mv2_cambist.h (22765B)
1 2 /* 3 * 4 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 5 * 6 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 7 */ 8 #define MV2_EGR_ZONE_2_EDITOR_CONTROL_TCAM {mv2_egr_zone_2_editor_control_tcam_name, NO_MODE, NO_MODE_FIELD, EGR_ZONE_2_EDITOR_CONTROL_CAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, EGR_ZONE_2_EDITOR_CONTROL_CAM_BIST_STATUSr} 9 10 #define MV2_TUNNEL_ADAPT_3_LOGICAL_TBL_SEL_TCAM {mv2_tunnel_adapt_3_logical_tbl_sel_tcam_name, NO_MODE, NO_MODE_FIELD, TUNNEL_ADAPT_3_KEY_GEN_CAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, TUNNEL_ADAPT_3_KEY_GEN_CAM_BIST_STATUSr} 11 12 #define MV2_IP_PARSER2_HME_STAGE_TCAM_ONLY_3 {mv2_ip_parser2_hme_stage_tcam_only_3_name, NO_MODE, NO_MODE_FIELD, IP_PARSER2_HME_STAGE_CAM_BIST_CONFIG_3r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, IP_PARSER2_HME_STAGE_TCAM_BIST_STATUS_3r} 13 14 #define MV2_PHB_SELECT_TCAM {mv2_phb_select_tcam_name, NO_MODE, NO_MODE_FIELD, PHB_SELECT_TCAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 2, PHB_SELECT_TCAM_CAM_BIST_STATUSr} 15 16 #define MV2_FORWARDING_2_LOGICAL_TBL_SEL_TCAM {mv2_forwarding_2_logical_tbl_sel_tcam_name, NO_MODE, NO_MODE_FIELD, FORWARDING_2_KEY_GEN_CAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, FORWARDING_2_KEY_GEN_CAM_BIST_STATUSr} 17 18 #define MV2_MY_STATION_TCAM_2 {mv2_my_station_tcam_2_name, NO_MODE, NO_MODE_FIELD, MY_STATION_TCAM_2_ENTRY_ONLY_CAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 4, MY_STATION_TCAM_2_ENTRY_ONLY_CAM_BIST_STATUSr} 19 20 #define MV2_EGR_FIELD_EXTRACTION_PROFILE_2_TCAM {mv2_egr_field_extraction_profile_2_tcam_name, NO_MODE, NO_MODE_FIELD, EGR_FIELD_EXTRACTION_PROFILE_2_CAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, EGR_FIELD_EXTRACTION_PROFILE_2_CAM_BIST_STATUSr} 21 22 #define MV2_EGR_FIELD_EXTRACTION_PROFILE_1_TCAM {mv2_egr_field_extraction_profile_1_tcam_name, NO_MODE, NO_MODE_FIELD, EGR_FIELD_EXTRACTION_PROFILE_1_CAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, EGR_FIELD_EXTRACTION_PROFILE_1_CAM_BIST_STATUSr} 23 24 #define MV2_L2_USER_ENTRY {mv2_l2_user_entry_name, NO_MODE, NO_MODE_FIELD, L2_USER_ENTRY_ONLY_CAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, L2_USER_ENTRY_ONLY_CAM_BIST_STATUSr} 25 26 #define MV2_IP_PARSER1_HME_STAGE_TCAM_ONLY_3 {mv2_ip_parser1_hme_stage_tcam_only_3_name, NO_MODE, NO_MODE_FIELD, IP_PARSER1_HME_STAGE_CAM_BIST_CONFIG_3r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, IP_PARSER1_HME_STAGE_TCAM_BIST_STATUS_3r} 27 28 #define MV2_PKT_FLOW_SELECT_TCAM_1 {mv2_pkt_flow_select_tcam_1_name, NO_MODE, NO_MODE_FIELD, PKT_FLOW_SELECT_TCAM_1_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, PKT_FLOW_SELECT_TCAM_1_BIST_STATUSr} 29 30 #define MV2_IP_PARSER2_HME_STAGE_TCAM_ONLY_4 {mv2_ip_parser2_hme_stage_tcam_only_4_name, NO_MODE, NO_MODE_FIELD, IP_PARSER2_HME_STAGE_CAM_BIST_CONFIG_4r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, IP_PARSER2_HME_STAGE_TCAM_BIST_STATUS_4r} 31 32 #define MV2_IP_PARSER1_HME_STAGE_TCAM_ONLY_0 {mv2_ip_parser1_hme_stage_tcam_only_0_name, NO_MODE, NO_MODE_FIELD, IP_PARSER1_HME_STAGE_CAM_BIST_CONFIG_0r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, IP_PARSER1_HME_STAGE_TCAM_BIST_STATUS_0r} 33 34 #define MV2_IP_MULTICAST_TCAM {mv2_ip_multicast_tcam_name, NO_MODE, NO_MODE_FIELD, IP_MULTICAST_TCAM_CAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, IP_MULTICAST_TCAM_CAM_BIST_STATUSr} 35 36 #define MV2_IP_PARSER0_HME_STAGE_TCAM_ONLY_0 {mv2_ip_parser0_hme_stage_tcam_only_0_name, NO_MODE, NO_MODE_FIELD, IP_PARSER0_HME_STAGE_CAM_BIST_CONFIG_0r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, IP_PARSER0_HME_STAGE_TCAM_BIST_STATUS_0r} 37 38 #define MV2_IFP_LOGICAL_TABLE_SELECT {mv2_ifp_logical_table_select_name, NO_MODE, NO_MODE_FIELD, IFP_LOGICAL_TABLE_SELECT_CAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, IFP_LOGICAL_TABLE_SELECT_CAM_BIST_STATUSr} 39 40 #define MV2_FLEX_RTAG7_HASH_TCAM_ONLY {mv2_flex_rtag7_hash_tcam_only_name, NO_MODE, NO_MODE_FIELD, FLEX_RTAG7_HASH_TCAM_ONLY_CAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, FLEX_RTAG7_HASH_TCAM_ONLY_CAM_BIST_STATUSr} 41 42 #define MV2_ING_SNAT {mv2_ing_snat_name, NO_MODE, NO_MODE_FIELD, ING_SNAT_CAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 2, ING_SNAT_CAM_BIST_STATUSr} 43 44 #define MV2_EGR_ZONE_0_EDITOR_CONTROL_TCAM {mv2_egr_zone_0_editor_control_tcam_name, NO_MODE, NO_MODE_FIELD, EGR_ZONE_0_EDITOR_CONTROL_CAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, EGR_ZONE_0_EDITOR_CONTROL_CAM_BIST_STATUSr} 45 46 #define MV2_TUNNEL_ADAPT_2_LOGICAL_TBL_SEL_TCAM {mv2_tunnel_adapt_2_logical_tbl_sel_tcam_name, NO_MODE, NO_MODE_FIELD, TUNNEL_ADAPT_2_KEY_GEN_CAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, TUNNEL_ADAPT_2_KEY_GEN_CAM_BIST_STATUSr} 47 48 #define MV2_IP_PARSER2_HME_STAGE_TCAM_ONLY_2 {mv2_ip_parser2_hme_stage_tcam_only_2_name, NO_MODE, NO_MODE_FIELD, IP_PARSER2_HME_STAGE_CAM_BIST_CONFIG_2r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, IP_PARSER2_HME_STAGE_TCAM_BIST_STATUS_2r} 49 50 #define MV2_EXACT_MATCH_LOGICAL_TABLE_SELECT {mv2_exact_match_logical_table_select_name, NO_MODE, NO_MODE_FIELD, EXACT_MATCH_LOGICAL_TABLE_SELECT_CAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, EXACT_MATCH_LOGICAL_TABLE_SELECT_CAM_BIST_STATUSr} 51 52 #define MV2_FORWARDING_3_LOGICAL_TBL_SEL_TCAM {mv2_forwarding_3_logical_tbl_sel_tcam_name, NO_MODE, NO_MODE_FIELD, FORWARDING_3_KEY_GEN_CAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, FORWARDING_3_KEY_GEN_CAM_BIST_STATUSr} 53 54 #define MV2_CPU_COS_MAP {mv2_cpu_cos_map_name, NO_MODE, NO_MODE_FIELD, CPU_COS_CAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, CPU_COS_CAM_BIST_STATUSr} 55 56 #define MV2_IP_PARSER1_MICE_TCAM_1 {mv2_ip_parser1_mice_tcam_1_name, NO_MODE, NO_MODE_FIELD, IP_PARSER1_MICE_CAM_BIST_CONFIG_1r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 2, IP_PARSER1_MICE_TCAM_BIST_STATUS_1r} 57 58 #define MV2_EGR_PKT_FLOW_SELECT_TCAM {mv2_egr_pkt_flow_select_tcam_name, NO_MODE, NO_MODE_FIELD, EGR_PKT_FLOW_SELECT_CAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 4, EGR_PKT_FLOW_SELECT_CAM_BIST_STATUSr} 59 60 #define MV2_MY_STATION_TCAM {mv2_my_station_tcam_name, NO_MODE, NO_MODE_FIELD, IVP_MY_STATION_TCAM_1_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 4, IVP_MY_STATION_TCAM_1_BIST_STATUSr} 61 62 #define MV2_IP_PARSER2_MICE_TCAM_0 {mv2_ip_parser2_mice_tcam_0_name, NO_MODE, NO_MODE_FIELD, IP_PARSER2_MICE_CAM_BIST_CONFIG_0r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 2, IP_PARSER2_MICE_TCAM_BIST_STATUS_0r} 63 64 #define MV2_IP_PARSER1_HME_STAGE_TCAM_ONLY_4 {mv2_ip_parser1_hme_stage_tcam_only_4_name, NO_MODE, NO_MODE_FIELD, IP_PARSER1_HME_STAGE_CAM_BIST_CONFIG_4r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, IP_PARSER1_HME_STAGE_TCAM_BIST_STATUS_4r} 65 66 #define MV2_EGR_ZONE_4_EDITOR_CONTROL_TCAM {mv2_egr_zone_4_editor_control_tcam_name, NO_MODE, NO_MODE_FIELD, EGR_ZONE_4_EDITOR_CONTROL_CAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, EGR_ZONE_4_EDITOR_CONTROL_CAM_BIST_STATUSr} 67 68 #define MV2_FORWARDING_1_LOGICAL_TBL_SEL_TCAM {mv2_forwarding_1_logical_tbl_sel_tcam_name, NO_MODE, NO_MODE_FIELD, FORWARDING_1_KEY_GEN_CAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, FORWARDING_1_KEY_GEN_CAM_BIST_STATUSr} 69 70 #define MV2_DST_COMPRESSION {mv2_dst_compression_name, NO_MODE, NO_MODE_FIELD, DST_COMPRESSION_CAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, DST_COMPRESSION_CAM_BIST_STATUSr} 71 72 #define MV2_VFP_TCAM {mv2_vfp_tcam_name, NO_MODE, NO_MODE_FIELD, VFP_CAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 8, VFP_CAM_BIST_STATUSr} 73 74 #define MV2_IP_PARSER1_HME_STAGE_TCAM_ONLY_2 {mv2_ip_parser1_hme_stage_tcam_only_2_name, NO_MODE, NO_MODE_FIELD, IP_PARSER1_HME_STAGE_CAM_BIST_CONFIG_2r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, IP_PARSER1_HME_STAGE_TCAM_BIST_STATUS_2r} 75 76 #define MV2_L3_TUNNEL {mv2_l3_tunnel_name, NO_MODE, NO_MODE_FIELD, L3_TUNNEL_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 16, L3_TUNNEL_BIST_STATUSr} 77 78 #define MV2_IP_PARSER1_HME_STAGE_TCAM_ONLY_1 {mv2_ip_parser1_hme_stage_tcam_only_1_name, NO_MODE, NO_MODE_FIELD, IP_PARSER1_HME_STAGE_CAM_BIST_CONFIG_1r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, IP_PARSER1_HME_STAGE_TCAM_BIST_STATUS_1r} 79 80 #define MV2_VLAN_SUBNET {mv2_vlan_subnet_name, NO_MODE, NO_MODE_FIELD, VLAN_SUBNET_ONLY_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, VLAN_SUBNET_ONLY_BIST_STATUSr} 81 82 #define MV2_PKT_FLOW_SELECT_TCAM_0 {mv2_pkt_flow_select_tcam_0_name, NO_MODE, NO_MODE_FIELD, PKT_FLOW_SELECT_TCAM_0_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 2, PKT_FLOW_SELECT_TCAM_0_BIST_STATUSr} 83 84 #define MV2_TUNNEL_ADAPT_1_LOGICAL_TBL_SEL_TCAM {mv2_tunnel_adapt_1_logical_tbl_sel_tcam_name, NO_MODE, NO_MODE_FIELD, TUNNEL_ADAPT_1_KEY_GEN_CAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, TUNNEL_ADAPT_1_KEY_GEN_CAM_BIST_STATUSr} 85 86 #define MV2_IFP_TCAM_POOL0 {mv2_ifp_tcam_pool0_name, NO_MODE, NO_MODE_FIELD, IFP_TCAM_POOL0_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 3, IFP_TCAM_POOL0_BIST_STATUSr} 87 #define MV2_IFP_TCAM_POOL1 {mv2_ifp_tcam_pool1_name, NO_MODE, NO_MODE_FIELD, IFP_TCAM_POOL1_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 3, IFP_TCAM_POOL1_BIST_STATUSr} 88 #define MV2_IFP_TCAM_POOL2 {mv2_ifp_tcam_pool2_name, NO_MODE, NO_MODE_FIELD, IFP_TCAM_POOL2_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 3, IFP_TCAM_POOL2_BIST_STATUSr} 89 #define MV2_IFP_TCAM_POOL3 {mv2_ifp_tcam_pool3_name, NO_MODE, NO_MODE_FIELD, IFP_TCAM_POOL3_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 3, IFP_TCAM_POOL3_BIST_STATUSr} 90 91 #define MV2_EFP_TCAM_POOL0 {mv2_efp_tcam_pool0_name, NO_MODE, NO_MODE_FIELD, EFP_SLICE_0_CAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 2, EFP_SLICE_0_CAM_BIST_STATUSr} 92 #define MV2_EFP_TCAM_POOL1 {mv2_efp_tcam_pool1_name, NO_MODE, NO_MODE_FIELD, EFP_SLICE_1_CAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 2, EFP_SLICE_1_CAM_BIST_STATUSr} 93 #define MV2_EFP_TCAM_POOL2 {mv2_efp_tcam_pool2_name, NO_MODE, NO_MODE_FIELD, EFP_SLICE_2_CAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 2, EFP_SLICE_2_CAM_BIST_STATUSr} 94 #define MV2_EFP_TCAM_POOL3 {mv2_efp_tcam_pool3_name, NO_MODE, NO_MODE_FIELD, EFP_SLICE_3_CAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 2, EFP_SLICE_3_CAM_BIST_STATUSr} 95 96 #define MV2_TUNNEL_ADAPT_4_LOGICAL_TBL_SEL_TCAM {mv2_tunnel_adapt_4_logical_tbl_sel_tcam_name, NO_MODE, NO_MODE_FIELD, TUNNEL_ADAPT_4_KEY_GEN_CAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, TUNNEL_ADAPT_4_KEY_GEN_CAM_BIST_STATUSr} 97 98 #define MV2_EGR_ADAPT_2_LOGICAL_TBL_SEL_TCAM {mv2_egr_adapt_2_logical_tbl_sel_tcam_name, NO_MODE, NO_MODE_FIELD, EGR_ADAPT_2_KEY_GEN_CAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, EGR_ADAPT_2_KEY_GEN_CAM_BIST_STATUSr} 99 100 #define MV2_IP_PARSER2_HME_STAGE_TCAM_ONLY_0 {mv2_ip_parser2_hme_stage_tcam_only_0_name, NO_MODE, NO_MODE_FIELD, IP_PARSER2_HME_STAGE_CAM_BIST_CONFIG_0r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, IP_PARSER2_HME_STAGE_TCAM_BIST_STATUS_0r} 101 102 #define MV2_EGR_QOS_CTRL_TCAM {mv2_egr_qos_ctrl_tcam_name, NO_MODE, NO_MODE_FIELD, EGR_QOS_CTRL_CAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, EGR_QOS_CTRL_CAM_BIST_STATUSr} 103 104 #define MV2_IP_PARSER2_MICE_TCAM_1 {mv2_ip_parser2_mice_tcam_1_name, NO_MODE, NO_MODE_FIELD, IP_PARSER2_MICE_CAM_BIST_CONFIG_1r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 2, IP_PARSER2_MICE_TCAM_BIST_STATUS_1r} 105 106 #define MV2_EGR_ZONE_3_EDITOR_CONTROL_TCAM {mv2_egr_zone_3_editor_control_tcam_name, NO_MODE, NO_MODE_FIELD, EGR_ZONE_3_EDITOR_CONTROL_CAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, EGR_ZONE_3_EDITOR_CONTROL_CAM_BIST_STATUSr} 107 108 #define MV2_IP_PARSER1_MICE_TCAM_0 {mv2_ip_parser1_mice_tcam_0_name, NO_MODE, NO_MODE_FIELD, IP_PARSER1_MICE_CAM_BIST_CONFIG_0r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 2, IP_PARSER1_MICE_TCAM_BIST_STATUS_0r} 109 110 #define MV2_L3_DEFIP {mv2_l3_defip_name, NO_MODE, NO_MODE_FIELD, L3_DEFIP_ONLY_CAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 16, L3_DEFIP_ONLY_CAM_BIST_STATUSr} 111 112 #define MV2_SRC_COMPRESSION {mv2_src_compression_name, NO_MODE, NO_MODE_FIELD, SRC_COMPRESSION_CAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, SRC_COMPRESSION_CAM_BIST_STATUSr} 113 114 #define MV2_EGR_ZONE_1_EDITOR_CONTROL_TCAM {mv2_egr_zone_1_editor_control_tcam_name, NO_MODE, NO_MODE_FIELD, EGR_ZONE_1_EDITOR_CONTROL_CAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, EGR_ZONE_1_EDITOR_CONTROL_CAM_BIST_STATUSr} 115 116 #define MV2_EGR_ADAPT_1_LOGICAL_TBL_SEL_TCAM {mv2_egr_adapt_1_logical_tbl_sel_tcam_name, NO_MODE, NO_MODE_FIELD, EGR_ADAPT_1_KEY_GEN_CAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, EGR_ADAPT_1_KEY_GEN_CAM_BIST_STATUSr} 117 118 #define MV2_IP_PARSER2_HME_STAGE_TCAM_ONLY_1 {mv2_ip_parser2_hme_stage_tcam_only_1_name, NO_MODE, NO_MODE_FIELD, IP_PARSER2_HME_STAGE_CAM_BIST_CONFIG_1r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, IP_PARSER2_HME_STAGE_TCAM_BIST_STATUS_1r} 119 120 #define MV2_PKT_FLOW_SELECT_TCAM_2_ENTRY_ONLY {mv2_pkt_flow_select_tcam_2_entry_only_name, NO_MODE, NO_MODE_FIELD, PKT_FLOW_SELECT_TCAM_2_ONLY_CAM_BIST_CONFIG_64r, NO_CONTROL_REGISTER, NO_CONTROL_ENABLE_FIELD, 1, PKT_FLOW_SELECT_TCAM_2_ONLY_CAM_BIST_STATUSr} 121 #define MV2_TOTAL_CAMBIST_COUNT 60 122 #define MV2_DONE_BIT_MASK 0x00000001 123 #define MV2_BIST_SUCCESS_MASK 0x00000002 124 125 static char mv2_egr_zone_2_editor_control_tcam_name[] = "EGR_ZONE_2_EDITOR_CONTROL_TCAM"; 126 127 static char mv2_tunnel_adapt_3_logical_tbl_sel_tcam_name[] = "TUNNEL_ADAPT_3_LOGICAL_TBL_SEL_TCAM"; 128 129 static char mv2_ip_parser2_hme_stage_tcam_only_3_name[] = "IP_PARSER2_HME_STAGE_TCAM_ONLY_3"; 130 131 static char mv2_phb_select_tcam_name[] = "PHB_SELECT_TCAM"; 132 133 static char mv2_forwarding_2_logical_tbl_sel_tcam_name[] = "FORWARDING_2_LOGICAL_TBL_SEL_TCAM"; 134 135 static char mv2_my_station_tcam_2_name[] = "MY_STATION_TCAM_2"; 136 137 static char mv2_egr_field_extraction_profile_2_tcam_name[] = "EGR_FIELD_EXTRACTION_PROFILE_2_TCAM"; 138 139 static char mv2_egr_field_extraction_profile_1_tcam_name[] = "EGR_FIELD_EXTRACTION_PROFILE_1_TCAM"; 140 141 static char mv2_l2_user_entry_name[] = "L2_USER_ENTRY"; 142 143 static char mv2_ip_parser1_hme_stage_tcam_only_3_name[] = "IP_PARSER1_HME_STAGE_TCAM_ONLY_3"; 144 145 static char mv2_pkt_flow_select_tcam_1_name[] = "PKT_FLOW_SELECT_TCAM_1"; 146 147 static char mv2_ip_parser2_hme_stage_tcam_only_4_name[] = "IP_PARSER2_HME_STAGE_TCAM_ONLY_4"; 148 149 static char mv2_ip_parser1_hme_stage_tcam_only_0_name[] = "IP_PARSER1_HME_STAGE_TCAM_ONLY_0"; 150 151 static char mv2_ip_multicast_tcam_name[] = "IP_MULTICAST_TCAM"; 152 153 static char mv2_ip_parser0_hme_stage_tcam_only_0_name[] = "IP_PARSER0_HME_STAGE_TCAM_ONLY_0"; 154 155 static char mv2_ifp_logical_table_select_name[] = "IFP_LOGICAL_TABLE_SELECT"; 156 157 static char mv2_flex_rtag7_hash_tcam_only_name[] = "FLEX_RTAG7_HASH_TCAM_ONLY"; 158 159 static char mv2_ing_snat_name[] = "ING_SNAT"; 160 161 static char mv2_egr_zone_0_editor_control_tcam_name[] = "EGR_ZONE_0_EDITOR_CONTROL_TCAM"; 162 163 static char mv2_tunnel_adapt_2_logical_tbl_sel_tcam_name[] = "TUNNEL_ADAPT_2_LOGICAL_TBL_SEL_TCAM"; 164 165 static char mv2_ip_parser2_hme_stage_tcam_only_2_name[] = "IP_PARSER2_HME_STAGE_TCAM_ONLY_2"; 166 167 static char mv2_exact_match_logical_table_select_name[] = "EXACT_MATCH_LOGICAL_TABLE_SELECT"; 168 169 static char mv2_forwarding_3_logical_tbl_sel_tcam_name[] = "FORWARDING_3_LOGICAL_TBL_SEL_TCAM"; 170 171 static char mv2_cpu_cos_map_name[] = "CPU_COS_MAP"; 172 173 static char mv2_ip_parser1_mice_tcam_1_name[] = "IP_PARSER1_MICE_TCAM_1"; 174 175 static char mv2_egr_pkt_flow_select_tcam_name[] = "EGR_PKT_FLOW_SELECT_TCAM"; 176 177 static char mv2_my_station_tcam_name[] = "MY_STATION_TCAM"; 178 179 static char mv2_ip_parser2_mice_tcam_0_name[] = "IP_PARSER2_MICE_TCAM_0"; 180 181 static char mv2_ip_parser1_hme_stage_tcam_only_4_name[] = "IP_PARSER1_HME_STAGE_TCAM_ONLY_4"; 182 183 static char mv2_egr_zone_4_editor_control_tcam_name[] = "EGR_ZONE_4_EDITOR_CONTROL_TCAM"; 184 185 static char mv2_forwarding_1_logical_tbl_sel_tcam_name[] = "FORWARDING_1_LOGICAL_TBL_SEL_TCAM"; 186 187 static char mv2_dst_compression_name[] = "DST_COMPRESSION"; 188 189 static char mv2_vfp_tcam_name[] = "VFP_TCAM"; 190 191 static char mv2_ip_parser1_hme_stage_tcam_only_2_name[] = "IP_PARSER1_HME_STAGE_TCAM_ONLY_2"; 192 193 static char mv2_l3_tunnel_name[] = "L3_TUNNEL"; 194 195 static char mv2_ip_parser1_hme_stage_tcam_only_1_name[] = "IP_PARSER1_HME_STAGE_TCAM_ONLY_1"; 196 197 static char mv2_vlan_subnet_name[] = "VLAN_SUBNET"; 198 199 static char mv2_pkt_flow_select_tcam_0_name[] = "PKT_FLOW_SELECT_TCAM_0"; 200 201 static char mv2_tunnel_adapt_1_logical_tbl_sel_tcam_name[] = "TUNNEL_ADAPT_1_LOGICAL_TBL_SEL_TCAM"; 202 203 static char mv2_ifp_tcam_pool0_name[] = "IFP_TCAM_POOL0"; 204 static char mv2_ifp_tcam_pool1_name[] = "IFP_TCAM_POOL1"; 205 static char mv2_ifp_tcam_pool2_name[] = "IFP_TCAM_POOL2"; 206 static char mv2_ifp_tcam_pool3_name[] = "IFP_TCAM_POOL3"; 207 208 static char mv2_efp_tcam_pool0_name[] = "EFP_TCAM_POOL0"; 209 static char mv2_efp_tcam_pool1_name[] = "EFP_TCAM_POOL1"; 210 static char mv2_efp_tcam_pool2_name[] = "EFP_TCAM_POOL2"; 211 static char mv2_efp_tcam_pool3_name[] = "EFP_TCAM_POOL3"; 212 213 static char mv2_tunnel_adapt_4_logical_tbl_sel_tcam_name[] = "TUNNEL_ADAPT_4_LOGICAL_TBL_SEL_TCAM"; 214 215 static char mv2_egr_adapt_2_logical_tbl_sel_tcam_name[] = "EGR_ADAPT_2_LOGICAL_TBL_SEL_TCAM"; 216 217 static char mv2_ip_parser2_hme_stage_tcam_only_0_name[] = "IP_PARSER2_HME_STAGE_TCAM_ONLY_0"; 218 219 static char mv2_egr_qos_ctrl_tcam_name[] = "EGR_QOS_CTRL_TCAM"; 220 221 static char mv2_ip_parser2_mice_tcam_1_name[] = "IP_PARSER2_MICE_TCAM_1"; 222 223 static char mv2_egr_zone_3_editor_control_tcam_name[] = "EGR_ZONE_3_EDITOR_CONTROL_TCAM"; 224 225 static char mv2_ip_parser1_mice_tcam_0_name[] = "IP_PARSER1_MICE_TCAM_0"; 226 227 static char mv2_l3_defip_name[] = "L3_DEFIP"; 228 229 static char mv2_src_compression_name[] = "SRC_COMPRESSION"; 230 231 static char mv2_egr_zone_1_editor_control_tcam_name[] = "EGR_ZONE_1_EDITOR_CONTROL_TCAM"; 232 233 static char mv2_egr_adapt_1_logical_tbl_sel_tcam_name[] = "EGR_ADAPT_1_LOGICAL_TBL_SEL_TCAM"; 234 235 static char mv2_ip_parser2_hme_stage_tcam_only_1_name[] = "IP_PARSER2_HME_STAGE_TCAM_ONLY_1"; 236 237 static char mv2_pkt_flow_select_tcam_2_entry_only_name[] = "PKT_FLOW_SELECT_TCAM_2_ENTRY_ONLY"; 238 239 static cambist_t mv2_cambist_array[] = { 240 MV2_EGR_ZONE_2_EDITOR_CONTROL_TCAM, 241 MV2_TUNNEL_ADAPT_3_LOGICAL_TBL_SEL_TCAM, 242 MV2_IP_PARSER2_HME_STAGE_TCAM_ONLY_3, 243 MV2_PHB_SELECT_TCAM, 244 MV2_FORWARDING_2_LOGICAL_TBL_SEL_TCAM, 245 MV2_MY_STATION_TCAM_2, 246 MV2_EGR_FIELD_EXTRACTION_PROFILE_2_TCAM, 247 MV2_EGR_FIELD_EXTRACTION_PROFILE_1_TCAM, 248 MV2_L2_USER_ENTRY, 249 MV2_IP_PARSER1_HME_STAGE_TCAM_ONLY_3, 250 MV2_PKT_FLOW_SELECT_TCAM_1, 251 MV2_IP_PARSER2_HME_STAGE_TCAM_ONLY_4, 252 MV2_IP_PARSER1_HME_STAGE_TCAM_ONLY_0, 253 MV2_IP_MULTICAST_TCAM, 254 MV2_IP_PARSER0_HME_STAGE_TCAM_ONLY_0, 255 MV2_IFP_LOGICAL_TABLE_SELECT, 256 MV2_FLEX_RTAG7_HASH_TCAM_ONLY, 257 MV2_ING_SNAT, 258 MV2_EGR_ZONE_0_EDITOR_CONTROL_TCAM, 259 MV2_TUNNEL_ADAPT_2_LOGICAL_TBL_SEL_TCAM, 260 MV2_IP_PARSER2_HME_STAGE_TCAM_ONLY_2, 261 MV2_EXACT_MATCH_LOGICAL_TABLE_SELECT, 262 MV2_FORWARDING_3_LOGICAL_TBL_SEL_TCAM, 263 MV2_CPU_COS_MAP, 264 MV2_IP_PARSER1_MICE_TCAM_1, 265 MV2_EGR_PKT_FLOW_SELECT_TCAM, 266 MV2_MY_STATION_TCAM, 267 MV2_IP_PARSER2_MICE_TCAM_0, 268 MV2_IP_PARSER1_HME_STAGE_TCAM_ONLY_4, 269 MV2_EGR_ZONE_4_EDITOR_CONTROL_TCAM, 270 MV2_FORWARDING_1_LOGICAL_TBL_SEL_TCAM, 271 MV2_DST_COMPRESSION, 272 MV2_VFP_TCAM, 273 MV2_IP_PARSER1_HME_STAGE_TCAM_ONLY_2, 274 MV2_L3_TUNNEL, 275 MV2_IP_PARSER1_HME_STAGE_TCAM_ONLY_1, 276 MV2_VLAN_SUBNET, 277 MV2_PKT_FLOW_SELECT_TCAM_0, 278 MV2_TUNNEL_ADAPT_1_LOGICAL_TBL_SEL_TCAM, 279 MV2_IFP_TCAM_POOL0, 280 MV2_IFP_TCAM_POOL1, 281 MV2_IFP_TCAM_POOL2, 282 MV2_IFP_TCAM_POOL3, 283 MV2_EFP_TCAM_POOL0, 284 MV2_EFP_TCAM_POOL1, 285 MV2_EFP_TCAM_POOL2, 286 MV2_EFP_TCAM_POOL3, 287 MV2_TUNNEL_ADAPT_4_LOGICAL_TBL_SEL_TCAM, 288 MV2_EGR_ADAPT_2_LOGICAL_TBL_SEL_TCAM, 289 MV2_IP_PARSER2_HME_STAGE_TCAM_ONLY_0, 290 MV2_EGR_QOS_CTRL_TCAM, 291 MV2_IP_PARSER2_MICE_TCAM_1, 292 MV2_EGR_ZONE_3_EDITOR_CONTROL_TCAM, 293 MV2_IP_PARSER1_MICE_TCAM_0, 294 MV2_L3_DEFIP, 295 MV2_SRC_COMPRESSION, 296 MV2_EGR_ZONE_1_EDITOR_CONTROL_TCAM, 297 MV2_EGR_ADAPT_1_LOGICAL_TBL_SEL_TCAM, 298 MV2_IP_PARSER2_HME_STAGE_TCAM_ONLY_1, 299 MV2_PKT_FLOW_SELECT_TCAM_2_ENTRY_ONLY 300 };