bcm_phy.h (34319B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * 7 * File: bcm_phy.h 8 */ 9 10 #ifndef _BCM_PHY_H_ 11 #define _BCM_PHY_H_ 12 13 #define montreal2_RTS_MHOST_0_CR5_RST_CTRLr 0x00280000 14 #define montreal2_RTS_MHOST_1_CR5_RST_CTRLr 0x00380000 15 #define montreal2_RTS_MHOST_2_CR5_RST_CTRLr 0x00480000 16 #define montreal2_RTS_MHOST_3_CR5_RST_CTRLr 0x00580000 17 18 #define montreal2_TOP_SOFT_RESET_REGr 0x02000100 19 #define montreal2_TOP_SOFT_RESET_REG_2r 0x02000200 20 21 #define montreal2_TOP_MISC_CONTROL2r 0x02000500 22 #define montreal2_TOP_MISC_CONTROL3r 0x02000600 23 24 #define montreal2_TOP_PVTMON_CTRL_0r 0x02002400 25 #define montreal2_TOP_PVTMON_CTRL_1r 0x02002500 26 #define montreal2_TOP_TMON_CTRL_0r 0x02002600 27 #define montreal2_TOP_PVTMON_RESULT_0r 0x02002700 28 #define montreal2_TOP_PVTMON_RESULT_1r 0x02002800 29 #define montreal2_TOP_PVTMON_RESULT_2r 0x02002900 30 #define montreal2_TOP_TMON_RESULTr 0x02002a00 31 32 #define montreal2_TOP_RTS_MISC_CTRLr 0x02006f00 33 34 #define montreal2_AXI_CONTROL_F0r 0x02804600 35 #define montreal2_AXI_CONTROL_F1r 0x02806600 36 37 #define montreal2_AXI_STATUS_F0r 0x02804700 38 #define montreal2_AXI_STATUS_F1r 0x02806700 39 40 #define montreal2_MISC_CONTROLr 0x02808000 41 42 #define montreal2_AXI_ADDR_LOWER_F0r 0x02804100 43 #define montreal2_AXI_ADDR_LOWER_F1r 0x02806100 44 #define montreal2_AXI_ADDR_UPPER_F0r 0x02804000 45 #define montreal2_AXI_ADDR_UPPER_F1r 0x02806000 46 47 #define montreal2_AXI_DATA_BYTES_7_6_F0r 0x02804500 48 #define montreal2_AXI_DATA_BYTES_5_4_F0r 0x02804400 49 #define montreal2_AXI_DATA_BYTES_3_2_F0r 0x02804300 50 #define montreal2_AXI_DATA_BYTES_1_0_F0r 0x02804200 51 52 #define montreal2_AXI_DATA_BYTES_7_6_F1r 0x02806500 53 #define montreal2_AXI_DATA_BYTES_5_4_F1r 0x02806400 54 #define montreal2_AXI_DATA_BYTES_3_2_F1r 0x02806300 55 #define montreal2_AXI_DATA_BYTES_1_0_F1r 0x02806200 56 57 #define montreal2_SBUS_DATA_BYTES_15_14r 0x02802b00 58 #define montreal2_SBUS_DATA_BYTES_13_12r 0x02802a00 59 #define montreal2_SBUS_DATA_BYTES_11_10r 0x02802900 60 #define montreal2_SBUS_DATA_BYTES_9_8r 0x02802800 61 #define montreal2_SBUS_DATA_BYTES_7_6r 0x02802700 62 #define montreal2_SBUS_DATA_BYTES_5_4r 0x02802600 63 #define montreal2_SBUS_DATA_BYTES_3_2r 0x02802500 64 #define montreal2_SBUS_DATA_BYTES_1_0r 0x02802400 65 66 #define montreal2_SBUS_COMMAND_UPPERr 0x02802200 67 #define montreal2_SBUS_COMMAND_LOWERr 0x02802300 68 #define montreal2_SBUS_ADDR_UPPERr 0x02802000 69 #define montreal2_SBUS_ADDR_LOWERr 0x02802100 70 71 #define montreal2_SBUS_STATUSr 0x02802d00 72 #define montreal2_SBUS_CONTROLr 0x02802c00 73 74 #define montreal2_SW_TO_FW_INTERRUPTr 0x00808900 75 #define montreal2_FW_TO_SW_MESSAGEr 0x00808c00 76 77 #define SCHAN_MAX_POLLS 1000 78 #define AXI_MAX_POLLS 1000 79 80 #define SBUS_CTRL_GO 0x8000 81 #define SBUS_STATUS_DONE 0x8000 82 #define SBUS_STATUS_ERR 0x4000 83 #define SBUS_STATUS_NAK 0x0100 84 85 /* Opcodes */ 86 #define SBUS_READ_MEMORY_CMD_MSG 0x07 87 #define SBUS_READ_MEMORY_ACK_MSG 0x08 88 #define SBUS_WRITE_MEMORY_CMD_MSG 0x09 89 #define SBUS_WRITE_MEMORY_ACK_MSG 0x0a 90 #define SBUS_READ_REGISTER_CMD_MSG 0x0b 91 #define SBUS_READ_REGISTER_ACK_MSG 0x0c 92 #define SBUS_WRITE_REGISTER_CMD_MSG 0x0d 93 #define SBUS_WRITE_REGISTER_ACK_MSG 0x0e 94 95 #define montreal2_CMIC_BLOCK 32 96 97 /* Additional block types */ 98 #define montreal2_BLKTYPE_AVS 0 99 #define montreal2_BLKTYPE_CMIC 1 100 #define montreal2_BLKTYPE_FCMAC 2 101 #define montreal2_BLKTYPE_LINESIDE_CL_PM 3 102 #define montreal2_BLKTYPE_LINE_FCPORT 4 103 #define montreal2_BLKTYPE_MAPPER 5 104 #define montreal2_BLKTYPE_MDIO 6 105 #define montreal2_BLKTYPE_PSM 7 106 #define montreal2_BLKTYPE_SYSSIDE_CL_PM 8 107 #define montreal2_BLKTYPE_SYS_FCPORT 9 108 /* #define montreal2_BLKTYPE_TOP 10 */ 109 #define montreal2_BLKTYPE_TOP 34 110 #define montreal2_BLKTYPE_UCSS 11 111 112 #define PHY8806X_C45_DEV1 0x1 113 114 #define PHY8806X_REG_READ(_unit, _phy_ctrl, _addr, _val) \ 115 READ_PHY_REG((_unit), (_phy_ctrl), (_addr), (_val)) 116 #define PHY8806X_REG_WRITE(_unit, _phy_ctrl, _addr, _val) \ 117 WRITE_PHY_REG((_unit), (_phy_ctrl), (_addr), (_val)) 118 #define PHY8806X_REG_MODIFY(_unit, _phy_ctrl, _addr, _val, _mask) \ 119 MODIFY_PHY_REG((_unit), (_phy_ctrl), (_addr), (_val), (_mask)) 120 121 #define READ_PHY8806X_DEV1_REG(_unit, _phy_ctrl, _reg,_val) \ 122 PHY8806X_REG_READ((_unit), (_phy_ctrl), (_reg), (_val)) 123 #define WRITE_PHY8806X_DEV1_REG(_unit, _phy_ctrl, _reg,_val) \ 124 PHY8806X_REG_WRITE((_unit), (_phy_ctrl), (_reg), (_val)) 125 #define MODIFY_PHY8806X_DEV1_REG(_unit, _phy_ctrl, _reg, _val, _mask) \ 126 PHY8806X_REG_MODIFY((_unit), (_phy_ctrl), (_reg), (_val), (_mask)) 127 128 #define CDK_DEV_READ32(_u, addr, pval) (*(pval) = *((uint32 *)addr)) 129 #define CDK_DEV_WRITE32(_u, addr, val) (*((uint32 *)addr) = val) 130 131 /* PHY Identifier Register 0 (Addr 0002h) */ 132 #define READ_PHY8806X_DEV1_ID0r(_unit, _phy_ctrl, _val) \ 133 READ_PHY8806X_DEV1_REG((_unit), (_phy_ctrl), 0x0002,(_val)) 134 135 /* PHY Identifier Register 1 (Addr 0003h) */ 136 #define READ_PHY8806X_DEV1_ID1r(_unit, _phy_ctrl, _val) \ 137 READ_PHY8806X_DEV1_REG((_unit), (_phy_ctrl), 0x0003,(_val)) 138 139 extern int _bcm_toplvl_sbus_write(int unit, phy_ctrl_t *pc, uint32 reg, uint32 arg[], int size); 140 extern int _bcm_toplvl_sbus_read(int unit, phy_ctrl_t *pc, uint32 reg, uint32 arg[], int size); 141 142 #define READ_TOP_SOFT_RESET_REG(_unit, _phy_ctrl, _val) \ 143 _bcm_toplvl_sbus_read((unit), (_phy_ctrl), montreal2_TOP_SOFT_RESET_REGr, (_val), 1) 144 145 #define WRITE_TOP_SOFT_RESET_REG(_unit, _phy_ctrl, _val) \ 146 { \ 147 uint32 temp = (_val); \ 148 int rv; \ 149 rv = _bcm_toplvl_sbus_write((unit), (_phy_ctrl), montreal2_TOP_SOFT_RESET_REGr, &temp, 1); \ 150 rv; \ 151 } 152 153 #define READ_TOP_SOFT_RESET_REG_2(_unit, _phy_ctrl, _val) \ 154 _bcm_toplvl_sbus_read((unit), (_phy_ctrl), montreal2_TOP_SOFT_RESET_REG_2r, (_val), 1) 155 156 #define WRITE_TOP_SOFT_RESET_REG_2(_unit, _phy_ctrl, _val) \ 157 { \ 158 uint32 temp = (_val); \ 159 int rv; \ 160 rv = _bcm_toplvl_sbus_write((unit), (_phy_ctrl), montreal2_TOP_SOFT_RESET_REG_2r, &temp, 1); \ 161 rv; \ 162 } 163 164 #define READ_TOP_MISC_CONTROL2_REG(_unit, _phy_ctrl, _val) \ 165 _bcm_toplvl_sbus_read((unit), (_phy_ctrl), montreal2_TOP_MISC_CONTROL2r, (_val), 1) 166 167 #define WRITE_TOP_MISC_CONTROL2_REG(_unit, _phy_ctrl, _val) \ 168 { \ 169 uint32 temp = (_val); \ 170 int rv; \ 171 rv = _bcm_toplvl_sbus_write((unit), (_phy_ctrl), montreal2_TOP_MISC_CONTROL2r, &temp, 1); \ 172 rv; \ 173 } 174 175 #define READ_TOP_MISC_CONTROL3_REG(_unit, _phy_ctrl, _val) \ 176 _bcm_toplvl_sbus_read((unit), (_phy_ctrl), montreal2_TOP_MISC_CONTROL3r, (_val), 1) 177 178 #define WRITE_TOP_MISC_CONTROL3_REG(_unit, _phy_ctrl, _val) \ 179 { \ 180 uint32 temp = (_val); \ 181 int rv; \ 182 rv = _bcm_toplvl_sbus_write((unit), (_phy_ctrl), montreal2_TOP_MISC_CONTROL3r, &temp, 1); \ 183 rv; \ 184 } 185 186 #define READ_TOP_RTS_MISC_CTRL_REG(_unit, _phy_ctrl, _val) \ 187 _bcm_toplvl_sbus_read((unit), (_phy_ctrl), montreal2_TOP_RTS_MISC_CTRLr, (_val), 1) 188 189 #define WRITE_TOP_RTS_MISC_CTRL_REG(_unit, _phy_ctrl, _val) \ 190 { \ 191 uint32 temp = (_val); \ 192 int rv; \ 193 rv = _bcm_toplvl_sbus_write((unit), (_phy_ctrl), montreal2_TOP_RTS_MISC_CTRLr, &temp, 1); \ 194 rv; \ 195 } 196 197 #define EXTRACT_REG(x) (((x) >> 8) & 0xffff) 198 199 #define READ_PHY8806X_MDIO_REG(_unit, _phy_ctrl, _reg,_val) \ 200 PHY8806X_REG_READ((_unit), (_phy_ctrl), (_reg), (_val)) 201 #define WRITE_PHY8806X_MDIO_REG(_unit, _phy_ctrl, _reg,_val) \ 202 PHY8806X_REG_WRITE((_unit), (_phy_ctrl), (_reg), (_val)) 203 #define MODIFY_PHY8806X_MDIO_REG(_unit, _phy_ctrl, _reg, _val, _mask) \ 204 PHY8806X_REG_MODIFY((_unit), (_phy_ctrl), (_reg), (_val), (_mask)) 205 206 #if 0 207 #define READ_PHY8806X_MDIO_REG_DF(_unit, _phy_ctrl, _reg,_val) \ 208 PHY8806X_REG_READ((_unit), (_phy_ctrl), (_reg), (_val)) 209 #define WRITE_PHY8806X_MDIO_REG_DF(_unit, _phy_ctrl, _reg,_val) \ 210 PHY8806X_REG_WRITE((_unit), (_phy_ctrl), (_reg), (_val)) 211 #endif 212 213 #define READ_PHY8806X_SBUS_STATUS_REG(_unit, _phy_ctrl, _val) \ 214 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_STATUSr), (_val)) 215 #define WRITE_PHY8806X_SBUS_STATUS_REG(_unit, _phy_ctrl, _val) \ 216 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_STATUSr), (_val)) 217 #define MODIFY_PHY8806X_SBUS_STATUS_REG(_unit, _phy_ctrl, _val, _mask) \ 218 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_STATUSr), (_val), (_mask)) 219 220 #define READ_PHY8806X_SBUS_CONTROL_REG(_unit, _phy_ctrl, _val) \ 221 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_CONTROLr), (_val)) 222 #define WRITE_PHY8806X_SBUS_CONTROL_REG(_unit, _phy_ctrl, _val) \ 223 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_CONTROLr), (_val)) 224 #define MODIFY_PHY8806X_SBUS_CONTROL_REG(_unit, _phy_ctrl, _val, _mask) \ 225 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_CONTROLr), (_val), (_mask)) 226 227 #define READ_PHY8806X_SBUS_COMMAND_UPPER_REG(_unit, _phy_ctrl, _val) \ 228 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_COMMAND_UPPERr), (_val)) 229 #define WRITE_PHY8806X_SBUS_COMMAND_UPPER_REG(_unit, _phy_ctrl, _val) \ 230 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_COMMAND_UPPERr), (_val)) 231 #define MODIFY_PHY8806X_SBUS_COMMAND_UPPER_REG(_unit, _phy_ctrl, _val, _mask) \ 232 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_COMMAND_UPPERr), (_val), (_mask)) 233 234 #define READ_PHY8806X_SBUS_COMMAND_LOWER_REG(_unit, _phy_ctrl, _val) \ 235 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_COMMAND_LOWERr), (_val)) 236 #define WRITE_PHY8806X_SBUS_COMMAND_LOWER_REG(_unit, _phy_ctrl, _val) \ 237 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_COMMAND_LOWERr), (_val)) 238 #define MODIFY_PHY8806X_SBUS_COMMAND_LOWER_REG(_unit, _phy_ctrl, _val, _mask) \ 239 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_COMMAND_LOWERr), (_val), (_mask)) 240 241 #define READ_PHY8806X_SBUS_ADDR_UPPER_REG(_unit, _phy_ctrl, _val) \ 242 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_ADDR_UPPERr), (_val)) 243 #define WRITE_PHY8806X_SBUS_ADDR_UPPER_REG(_unit, _phy_ctrl, _val) \ 244 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_ADDR_UPPERr), (_val)) 245 #define MODIFY_PHY8806X_SBUS_ADDR_UPPER_REG(_unit, _phy_ctrl, _val, _mask) \ 246 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_ADDR_UPPERr), (_val), (_mask)) 247 248 #define READ_PHY8806X_SBUS_ADDR_LOWER_REG(_unit, _phy_ctrl, _val) \ 249 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_ADDR_LOWERr), (_val)) 250 #define WRITE_PHY8806X_SBUS_ADDR_LOWER_REG(_unit, _phy_ctrl, _val) \ 251 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_ADDR_LOWERr), (_val)) 252 #define MODIFY_PHY8806X_SBUS_ADDR_LOWER_REG(_unit, _phy_ctrl, _val, _mask) \ 253 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_ADDR_LOWERr), (_val), (_mask)) 254 255 #define READ_PHY8806X_AXI_CONTROL_F0_REG(_unit, _phy_ctrl, _val) \ 256 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_CONTROL_F0r), (_val)) 257 #define WRITE_PHY8806X_AXI_CONTROL_F0_REG(_unit, _phy_ctrl, _val) \ 258 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_CONTROL_F0r), (_val)) 259 #define MODIFY_PHY8806X_AXI_CONTROL_F0_REG(_unit, _phy_ctrl, _val, _mask) \ 260 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_CONTROL_F0r), (_val), (_mask)) 261 262 #define READ_PHY8806X_AXI_CONTROL_F1_REG(_unit, _phy_ctrl, _val) \ 263 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_CONTROL_F1r), (_val)) 264 #define WRITE_PHY8806X_AXI_CONTROL_F1_REG(_unit, _phy_ctrl, _val) \ 265 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_CONTROL_F1r), (_val)) 266 #define MODIFY_PHY8806X_AXI_CONTROL_F1_REG(_unit, _phy_ctrl, _val, _mask) \ 267 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_CONTROL_F1r), (_val), (_mask)) 268 269 #define READ_PHY8806X_AXI_STATUS_F0_REG(_unit, _phy_ctrl, _val) \ 270 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_STATUS_F0r), (_val)) 271 #define WRITE_PHY8806X_AXI_STATUS_F0_REG(_unit, _phy_ctrl, _val) \ 272 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_STATUS_F0r), (_val)) 273 #define MODIFY_PHY8806X_AXI_STATUS_F0_REG(_unit, _phy_ctrl, _val, _mask) \ 274 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_STATUS_F0r), (_val), (_mask)) 275 276 #define READ_PHY8806X_AXI_STATUS_F1_REG(_unit, _phy_ctrl, _val) \ 277 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_STATUS_F1r), (_val)) 278 #define WRITE_PHY8806X_AXI_STATUS_F1_REG(_unit, _phy_ctrl, _val) \ 279 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_STATUS_F1r), (_val)) 280 #define MODIFY_PHY8806X_AXI_STATUS_F1_REG(_unit, _phy_ctrl, _val, _mask) \ 281 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_STATUS_F1r), (_val), (_mask)) 282 283 #define READ_PHY8806X_MISC_CONTROL_REG(_unit, _phy_ctrl, _val) \ 284 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_MISC_CONTROLr), (_val)) 285 #define WRITE_PHY8806X_MISC_CONTROL_REG(_unit, _phy_ctrl, _val) \ 286 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_MISC_CONTROLr), (_val)) 287 #define MODIFY_PHY8806X_MISC_CONTROL_REG(_unit, _phy_ctrl, _val, _mask) \ 288 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_MISC_CONTROLr), (_val), (_mask)) 289 290 #define READ_PHY8806X_AXI_ADDR_LOWER_F0_REG(_unit, _phy_ctrl, _val) \ 291 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_ADDR_LOWER_F0r), (_val)) 292 #define WRITE_PHY8806X_AXI_ADDR_LOWER_F0_REG(_unit, _phy_ctrl, _val) \ 293 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_ADDR_LOWER_F0r), (_val)) 294 #define MODIFY_PHY8806X_AXI_ADDR_LOWER_F0_REG(_unit, _phy_ctrl, _val, _mask) \ 295 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_ADDR_LOWER_F0r), (_val), (_mask)) 296 297 #define READ_PHY8806X_AXI_ADDR_LOWER_F1_REG(_unit, _phy_ctrl, _val) \ 298 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_ADDR_LOWER_F1r), (_val)) 299 #define WRITE_PHY8806X_AXI_ADDR_LOWER_F1_REG(_unit, _phy_ctrl, _val) \ 300 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_ADDR_LOWER_F1r), (_val)) 301 #define MODIFY_PHY8806X_AXI_ADDR_LOWER_F1_REG(_unit, _phy_ctrl, _val, _mask) \ 302 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_ADDR_LOWER_F1r), (_val), (_mask)) 303 304 #define READ_PHY8806X_AXI_ADDR_UPPER_F0_REG(_unit, _phy_ctrl, _val) \ 305 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_ADDR_UPPER_F0r), (_val)) 306 #define WRITE_PHY8806X_AXI_ADDR_UPPER_F0_REG(_unit, _phy_ctrl, _val) \ 307 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_ADDR_UPPER_F0r), (_val)) 308 #define MODIFY_PHY8806X_AXI_ADDR_UPPER_F0_REG(_unit, _phy_ctrl, _val, _mask) \ 309 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_ADDR_UPPER_F0r), (_val), (_mask)) 310 311 #define READ_PHY8806X_AXI_ADDR_UPPER_F1_REG(_unit, _phy_ctrl, _val) \ 312 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_ADDR_UPPER_F1r), (_val)) 313 #define WRITE_PHY8806X_AXI_ADDR_UPPER_F1_REG(_unit, _phy_ctrl, _val) \ 314 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_ADDR_UPPER_F1r), (_val)) 315 #define MODIFY_PHY8806X_AXI_ADDR_UPPER_F1_REG(_unit, _phy_ctrl, _val, _mask) \ 316 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_ADDR_UPPER_F1r), (_val), (_mask)) 317 318 #define READ_PHY8806X_SBUS_DATA_BYTES_1_0_REG(_unit, _phy_ctrl, _val) \ 319 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_DATA_BYTES_1_0r), (_val)) 320 #define WRITE_PHY8806X_SBUS_DATA_BYTES_1_0_REG(_unit, _phy_ctrl, _val) \ 321 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_DATA_BYTES_1_0r), (_val)) 322 #define MODIFY_PHY8806X_SBUS_DATA_BYTES_1_0_REG(_unit, _phy_ctrl, _val, _mask) \ 323 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_DATA_BYTES_1_0r), (_val), (_mask)) 324 325 #define READ_PHY8806X_SBUS_DATA_BYTES_3_2_REG(_unit, _phy_ctrl, _val) \ 326 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_DATA_BYTES_3_2r), (_val)) 327 #define WRITE_PHY8806X_SBUS_DATA_BYTES_3_2_REG(_unit, _phy_ctrl, _val) \ 328 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_DATA_BYTES_3_2r), (_val)) 329 #define MODIFY_PHY8806X_SBUS_DATA_BYTES_3_2_REG(_unit, _phy_ctrl, _val, _mask) \ 330 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_DATA_BYTES_3_2r), (_val), (_mask)) 331 332 #define READ_PHY8806X_SBUS_DATA_BYTES_5_4_REG(_unit, _phy_ctrl, _val) \ 333 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_DATA_BYTES_5_4r), (_val)) 334 #define WRITE_PHY8806X_SBUS_DATA_BYTES_5_4_REG(_unit, _phy_ctrl, _val) \ 335 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_DATA_BYTES_5_4r), (_val)) 336 #define MODIFY_PHY8806X_SBUS_DATA_BYTES_5_4_REG(_unit, _phy_ctrl, _val, _mask) \ 337 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_DATA_BYTES_5_4r), (_val), (_mask)) 338 339 #define READ_PHY8806X_SBUS_DATA_BYTES_7_6_REG(_unit, _phy_ctrl, _val) \ 340 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_DATA_BYTES_7_6r), (_val)) 341 #define WRITE_PHY8806X_SBUS_DATA_BYTES_7_6_REG(_unit, _phy_ctrl, _val) \ 342 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_DATA_BYTES_7_6r), (_val)) 343 #define MODIFY_PHY8806X_SBUS_DATA_BYTES_7_6_REG(_unit, _phy_ctrl, _val, _mask) \ 344 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_DATA_BYTES_7_6r), (_val), (_mask)) 345 346 #define READ_PHY8806X_SBUS_DATA_BYTES_9_8_REG(_unit, _phy_ctrl, _val) \ 347 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_DATA_BYTES_9_8r), (_val)) 348 #define WRITE_PHY8806X_SBUS_DATA_BYTES_9_8_REG(_unit, _phy_ctrl, _val) \ 349 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_DATA_BYTES_9_8r), (_val)) 350 #define MODIFY_PHY8806X_SBUS_DATA_BYTES_9_8_REG(_unit, _phy_ctrl, _val, _mask) \ 351 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_DATA_BYTES_9_8r), (_val), (_mask)) 352 353 #define READ_PHY8806X_SBUS_DATA_BYTES_11_10_REG(_unit, _phy_ctrl, _val) \ 354 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_DATA_BYTES_11_10r), (_val)) 355 #define WRITE_PHY8806X_SBUS_DATA_BYTES_11_10_REG(_unit, _phy_ctrl, _val) \ 356 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_DATA_BYTES_11_10r), (_val)) 357 #define MODIFY_PHY8806X_SBUS_DATA_BYTES_11_10_REG(_unit, _phy_ctrl, _val, _mask) \ 358 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_DATA_BYTES_11_10r), (_val), (_mask)) 359 360 #define READ_PHY8806X_SBUS_DATA_BYTES_13_12_REG(_unit, _phy_ctrl, _val) \ 361 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_DATA_BYTES_13_12r), (_val)) 362 #define WRITE_PHY8806X_SBUS_DATA_BYTES_13_12_REG(_unit, _phy_ctrl, _val) \ 363 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_DATA_BYTES_13_12r), (_val)) 364 #define MODIFY_PHY8806X_SBUS_DATA_BYTES_13_12_REG(_unit, _phy_ctrl, _val, _mask) \ 365 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_DATA_BYTES_13_12r), (_val), (_mask)) 366 367 #define READ_PHY8806X_SBUS_DATA_BYTES_15_14_REG(_unit, _phy_ctrl, _val) \ 368 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_DATA_BYTES_15_14r), (_val)) 369 #define WRITE_PHY8806X_SBUS_DATA_BYTES_15_14_REG(_unit, _phy_ctrl, _val) \ 370 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_DATA_BYTES_15_14r), (_val)) 371 #define MODIFY_PHY8806X_SBUS_DATA_BYTES_15_14_REG(_unit, _phy_ctrl, _val, _mask) \ 372 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SBUS_DATA_BYTES_15_14r), (_val), (_mask)) 373 374 #define READ_PHY8806X_AXI_DATA_BYTES_1_0_F0_REG(_unit, _phy_ctrl, _val) \ 375 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_1_0_F0r), (_val)) 376 #define WRITE_PHY8806X_AXI_DATA_BYTES_1_0_F0_REG(_unit, _phy_ctrl, _val) \ 377 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_1_0_F0r), (_val)) 378 #define MODIFY_PHY8806X_AXI_DATA_BYTES_1_0_F0_REG(_unit, _phy_ctrl, _val, _mask) \ 379 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_1_0_F0r), (_val), (_mask)) 380 381 #define READ_PHY8806X_AXI_DATA_BYTES_3_2_F0_REG(_unit, _phy_ctrl, _val) \ 382 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_3_2_F0r), (_val)) 383 #define WRITE_PHY8806X_AXI_DATA_BYTES_3_2_F0_REG(_unit, _phy_ctrl, _val) \ 384 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_3_2_F0r), (_val)) 385 #define MODIFY_PHY8806X_AXI_DATA_BYTES_3_2_F0_REG(_unit, _phy_ctrl, _val, _mask) \ 386 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_3_2_F0r), (_val), (_mask)) 387 388 #define READ_PHY8806X_AXI_DATA_BYTES_5_4_F0_REG(_unit, _phy_ctrl, _val) \ 389 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_5_4_F0r), (_val)) 390 #define WRITE_PHY8806X_AXI_DATA_BYTES_5_4_F0_REG(_unit, _phy_ctrl, _val) \ 391 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_5_4_F0r), (_val)) 392 #define MODIFY_PHY8806X_AXI_DATA_BYTES_5_4_F0_REG(_unit, _phy_ctrl, _val, _mask) \ 393 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_5_4_F0r), (_val), (_mask)) 394 395 #define READ_PHY8806X_AXI_DATA_BYTES_7_6_F0_REG(_unit, _phy_ctrl, _val) \ 396 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_7_6_F0r), (_val)) 397 #define WRITE_PHY8806X_AXI_DATA_BYTES_7_6_F0_REG(_unit, _phy_ctrl, _val) \ 398 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_7_6_F0r), (_val)) 399 #define MODIFY_PHY8806X_AXI_DATA_BYTES_7_6_F0_REG(_unit, _phy_ctrl, _val, _mask) \ 400 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_7_6_F0r), (_val), (_mask)) 401 402 #define READ_PHY8806X_AXI_DATA_BYTES_1_0_F1_REG(_unit, _phy_ctrl, _val) \ 403 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_1_0_F1r), (_val)) 404 #define WRITE_PHY8806X_AXI_DATA_BYTES_1_0_F1_REG(_unit, _phy_ctrl, _val) \ 405 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_1_0_F1r), (_val)) 406 #define MODIFY_PHY8806X_AXI_DATA_BYTES_1_0_F1_REG(_unit, _phy_ctrl, _val, _mask) \ 407 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_1_0_F1r), (_val), (_mask)) 408 409 #define READ_PHY8806X_AXI_DATA_BYTES_3_2_F1_REG(_unit, _phy_ctrl, _val) \ 410 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_3_2_F1r), (_val)) 411 #define WRITE_PHY8806X_AXI_DATA_BYTES_3_2_F1_REG(_unit, _phy_ctrl, _val) \ 412 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_3_2_F1r), (_val)) 413 #define MODIFY_PHY8806X_AXI_DATA_BYTES_3_2_F1_REG(_unit, _phy_ctrl, _val, _mask) \ 414 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_3_2_F1r), (_val), (_mask)) 415 416 #define READ_PHY8806X_AXI_DATA_BYTES_5_4_F1_REG(_unit, _phy_ctrl, _val) \ 417 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_5_4_F1r), (_val)) 418 #define WRITE_PHY8806X_AXI_DATA_BYTES_5_4_F1_REG(_unit, _phy_ctrl, _val) \ 419 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_5_4_F1r), (_val)) 420 #define MODIFY_PHY8806X_AXI_DATA_BYTES_5_4_F1_REG(_unit, _phy_ctrl, _val, _mask) \ 421 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_5_4_F1r), (_val), (_mask)) 422 423 #define READ_PHY8806X_AXI_DATA_BYTES_7_6_F1_REG(_unit, _phy_ctrl, _val) \ 424 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_7_6_F1r), (_val)) 425 #define WRITE_PHY8806X_AXI_DATA_BYTES_7_6_F1_REG(_unit, _phy_ctrl, _val) \ 426 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_7_6_F1r), (_val)) 427 #define MODIFY_PHY8806X_AXI_DATA_BYTES_7_6_F1_REG(_unit, _phy_ctrl, _val, _mask) \ 428 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_7_6_F1r), (_val), (_mask)) 429 430 #define AXI_DELTA (EXTRACT_REG(montreal2_AXI_CONTROL_F1r) - EXTRACT_REG(montreal2_AXI_CONTROL_F0r)) 431 432 #define READ_PHY8806X_AXI_ADDR_LOWER_FX_REG(_unit, _phy_ctrl, _val) \ 433 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_ADDR_LOWER_F0r) + (((_phy_ctrl)->phy_id & 0x4) ? AXI_DELTA : 0), (_val)) 434 #define WRITE_PHY8806X_AXI_ADDR_LOWER_FX_REG(_unit, _phy_ctrl, _val) \ 435 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_ADDR_LOWER_F0r) + (((_phy_ctrl)->phy_id & 0x4) ? AXI_DELTA : 0), (_val)) 436 #define MODIFY_PHY8806X_AXI_ADDR_LOWER_FX_REG(_unit, _phy_ctrl, _val, _mask) \ 437 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_ADDR_LOWER_F0r) + (((_phy_ctrl)->phy_id & 0x4) ? AXI_DELTA : 0), (_val), (_mask)) 438 439 #define READ_PHY8806X_AXI_ADDR_UPPER_FX_REG(_unit, _phy_ctrl, _val) \ 440 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_ADDR_UPPER_F0r) + (((_phy_ctrl)->phy_id & 0x4) ? AXI_DELTA : 0), (_val)) 441 #define WRITE_PHY8806X_AXI_ADDR_UPPER_FX_REG(_unit, _phy_ctrl, _val) \ 442 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_ADDR_UPPER_F0r) + (((_phy_ctrl)->phy_id & 0x4) ? AXI_DELTA : 0), (_val)) 443 #define MODIFY_PHY8806X_AXI_ADDR_UPPER_FX_REG(_unit, _phy_ctrl, _val, _mask) \ 444 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_ADDR_UPPER_F0r) + (((_phy_ctrl)->phy_id & 0x4) ? AXI_DELTA : 0), (_val), (_mask)) 445 446 #define READ_PHY8806X_AXI_CONTROL_FX_REG(_unit, _phy_ctrl, _val) \ 447 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_CONTROL_F0r) + (((_phy_ctrl)->phy_id & 0x4) ? AXI_DELTA : 0), (_val)) 448 #define WRITE_PHY8806X_AXI_CONTROL_FX_REG(_unit, _phy_ctrl, _val) \ 449 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_CONTROL_F0r) + (((_phy_ctrl)->phy_id & 0x4) ? AXI_DELTA : 0), (_val)) 450 #define MODIFY_PHY8806X_AXI_CONTROL_FX_REG(_unit, _phy_ctrl, _val, _mask) \ 451 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_CONTROL_F0r) + (((_phy_ctrl)->phy_id & 0x4) ? AXI_DELTA : 0), (_val), (_mask)) 452 453 #define READ_PHY8806X_AXI_STATUS_FX_REG(_unit, _phy_ctrl, _val) \ 454 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_STATUS_F0r) + (((_phy_ctrl)->phy_id & 0x4) ? AXI_DELTA : 0), (_val)) 455 #define WRITE_PHY8806X_AXI_STATUS_FX_REG(_unit, _phy_ctrl, _val) \ 456 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_STATUS_F0r) + (((_phy_ctrl)->phy_id & 0x4) ? AXI_DELTA : 0), (_val)) 457 #define MODIFY_PHY8806X_AXI_STATUS_FX_REG(_unit, _phy_ctrl, _val, _mask) \ 458 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_STATUS_F0r) + (((_phy_ctrl)->phy_id & 0x4) ? AXI_DELTA : 0), (_val), (_mask)) 459 460 #define READ_PHY8806X_AXI_DATA_BYTES_1_0_FX_REG(_unit, _phy_ctrl, _val) \ 461 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_1_0_F0r) + (((_phy_ctrl)->phy_id & 0x4) ? AXI_DELTA : 0), (_val)) 462 #define WRITE_PHY8806X_AXI_DATA_BYTES_1_0_FX_REG(_unit, _phy_ctrl, _val) \ 463 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_1_0_F0r) + (((_phy_ctrl)->phy_id & 0x4) ? AXI_DELTA : 0), (_val)) 464 #define MODIFY_PHY8806X_AXI_DATA_BYTES_1_0_FX_REG(_unit, _phy_ctrl, _val, _mask) \ 465 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_1_0_F0r) + (((_phy_ctrl)->phy_id & 0x4) ? AXI_DELTA : 0), (_val), (_mask)) 466 467 #define READ_PHY8806X_AXI_DATA_BYTES_3_2_FX_REG(_unit, _phy_ctrl, _val) \ 468 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_3_2_F0r) + (((_phy_ctrl)->phy_id & 0x4) ? AXI_DELTA : 0), (_val)) 469 #define WRITE_PHY8806X_AXI_DATA_BYTES_3_2_FX_REG(_unit, _phy_ctrl, _val) \ 470 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_3_2_F0r) + (((_phy_ctrl)->phy_id & 0x4) ? AXI_DELTA : 0), (_val)) 471 #define MODIFY_PHY8806X_AXI_DATA_BYTES_3_2_FX_REG(_unit, _phy_ctrl, _val, _mask) \ 472 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_3_2_F0r) + (((_phy_ctrl)->phy_id & 0x4) ? AXI_DELTA : 0), (_val), (_mask)) 473 474 #define READ_PHY8806X_AXI_DATA_BYTES_5_4_FX_REG(_unit, _phy_ctrl, _val) \ 475 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_5_4_F0r) + (((_phy_ctrl)->phy_id & 0x4) ? AXI_DELTA : 0), (_val)) 476 #define WRITE_PHY8806X_AXI_DATA_BYTES_5_4_FX_REG(_unit, _phy_ctrl, _val) \ 477 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_5_4_F0r) + (((_phy_ctrl)->phy_id & 0x4) ? AXI_DELTA : 0), (_val)) 478 #define MODIFY_PHY8806X_AXI_DATA_BYTES_5_4_FX_REG(_unit, _phy_ctrl, _val, _mask) \ 479 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_5_4_F0r) + (((_phy_ctrl)->phy_id & 0x4) ? AXI_DELTA : 0), (_val), (_mask)) 480 481 #define READ_PHY8806X_AXI_DATA_BYTES_7_6_FX_REG(_unit, _phy_ctrl, _val) \ 482 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_7_6_F0r) + (((_phy_ctrl)->phy_id & 0x4) ? AXI_DELTA : 0), (_val)) 483 #define WRITE_PHY8806X_AXI_DATA_BYTES_7_6_FX_REG(_unit, _phy_ctrl, _val) \ 484 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_7_6_F0r) + (((_phy_ctrl)->phy_id & 0x4) ? AXI_DELTA : 0), (_val)) 485 #define MODIFY_PHY8806X_AXI_DATA_BYTES_7_6_FX_REG(_unit, _phy_ctrl, _val, _mask) \ 486 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_AXI_DATA_BYTES_7_6_F0r) + (((_phy_ctrl)->phy_id & 0x4) ? AXI_DELTA : 0), (_val), (_mask)) 487 488 #define READ_PHY8806X_SW_TO_FW_INTERRUPT_REG(_unit, _phy_ctrl, _val) \ 489 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SW_TO_FW_INTERRUPTr), (_val)) 490 #define WRITE_PHY8806X_SW_TO_FW_INTERRUPT_REG(_unit, _phy_ctrl, _val) \ 491 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SW_TO_FW_INTERRUPTr), (_val)) 492 #define MODIFY_PHY8806X_SW_TO_FW_INTERRUPT_REG(_unit, _phy_ctrl, _val, _mask) \ 493 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_SW_TO_FW_INTERRUPTr), (_val), (_mask)) 494 495 #define READ_PHY8806X_FW_TO_SW_MESSAGE_REG(_unit, _phy_ctrl, _val) \ 496 READ_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_FW_TO_SW_MESSAGEr), (_val)) 497 #define WRITE_PHY8806X_FW_TO_SW_MESSAGE_REG(_unit, _phy_ctrl, _val) \ 498 WRITE_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_FW_TO_SW_MESSAGEr), (_val)) 499 #define MODIFY_PHY8806X_FW_TO_SW_MESSAGE_REG(_unit, _phy_ctrl, _val, _mask) \ 500 MODIFY_PHY8806X_MDIO_REG((_unit), (_phy_ctrl), EXTRACT_REG(montreal2_FW_TO_SW_MESSAGEr), (_val), (_mask)) 501 502 #define READ_PHY8806X_TOP_PVTMON_CTRL_0_REG(_unit, _phy_ctrl, _val) \ 503 _bcm_toplvl_sbus_read((unit), (_phy_ctrl), montreal2_TOP_PVTMON_CTRL_0r, (_val), 1) 504 #define WRITE_PHY8806X_TOP_PVTMON_CTRL_0_REG(_unit, _phy_ctrl, _val) \ 505 { \ 506 uint32 temp = (_val); \ 507 int rv; \ 508 rv = _bcm_toplvl_sbus_write((unit), (_phy_ctrl), montreal2_TOP_PVTMON_CTRL_0r, &temp, 1); \ 509 rv; \ 510 } 511 512 #define READ_PHY8806X_TOP_PVTMON_CTRL_1_REG(_unit, _phy_ctrl, _val) \ 513 _bcm_toplvl_sbus_read((unit), (_phy_ctrl), montreal2_TOP_PVTMON_CTRL_1r, (_val), 1) 514 #define WRITE_PHY8806X_TOP_PVTMON_CTRL_1_REG(_unit, _phy_ctrl, _val) \ 515 { \ 516 uint32 temp = (_val); \ 517 int rv; \ 518 rv = _bcm_toplvl_sbus_write((unit), (_phy_ctrl), montreal2_TOP_PVTMON_CTRL_1r, &temp, 1); \ 519 rv; \ 520 } 521 522 #define READ_PHY8806X_TOP_TMON_CTRL_0_REG(_unit, _phy_ctrl, _val) \ 523 _bcm_toplvl_sbus_read((unit), (_phy_ctrl), montreal2_TOP_TMON_CTRL_0r, (_val), 1) 524 #define WRITE_PHY8806X_TOP_TMON_CTRL_0_REG(_unit, _phy_ctrl, _val) \ 525 { \ 526 uint32 temp = (_val); \ 527 int rv; \ 528 rv = _bcm_toplvl_sbus_write((unit), (_phy_ctrl), montreal2_TOP_TMON_CTRL_0r, &temp, 1); \ 529 rv; \ 530 } 531 532 #define READ_PHY8806X_TOP_PVTMON_RESULT_0_REG(_unit, _phy_ctrl, _val) \ 533 _bcm_toplvl_sbus_read((unit), (_phy_ctrl), montreal2_TOP_PVTMON_RESULT_0r, (_val), 1) 534 535 #define READ_PHY8806X_TOP_PVTMON_RESULT_1_REG(_unit, _phy_ctrl, _val) \ 536 _bcm_toplvl_sbus_read((unit), (_phy_ctrl), montreal2_TOP_PVTMON_RESULT_1r, (_val), 1) 537 538 #define READ_PHY8806X_TOP_PVTMON_RESULT_2_REG(_unit, _phy_ctrl, _val) \ 539 _bcm_toplvl_sbus_read((unit), (_phy_ctrl), montreal2_TOP_PVTMON_RESULT_2r, (_val), 1) 540 541 #define READ_PHY8806X_TOP_TMON_RESULT_REG(_unit, _phy_ctrl, _val) \ 542 _bcm_toplvl_sbus_read((unit), (_phy_ctrl), montreal2_TOP_TMON_RESULTr, (_val), 1) 543 544 #endif /* _BCM_PHY_H_ */ 545 546