dump.c (93787B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * 7 * socdiag dump command 8 */ 9 10 #include <sal/appl/pci.h> 11 #include <sal/core/sync.h> 12 #include <shared/bsl.h> 13 #include <soc/counter.h> 14 #include <soc/mem.h> 15 #include <soc/debug.h> 16 #include <soc/phyctrl.h> 17 #include <soc/l2x.h> 18 #include <soc/ll.h> 19 #include <soc/cm.h> 20 #ifdef BCM_CMICM_SUPPORT 21 #include <soc/cmicm.h> 22 #endif 23 #ifdef BCM_TRIUMPH3_SUPPORT 24 #include <soc/triumph3.h> 25 #endif 26 #ifdef BCM_TRIDENT2_SUPPORT 27 #include <soc/trident2.h> 28 #endif 29 #ifdef BCM_TRIDENT2PLUS_SUPPORT 30 #include <soc/td2_td2p.h> 31 #endif 32 #ifdef BCM_TRIDENT3_SUPPORT 33 #include <soc/trident3.h> 34 #endif 35 #ifdef BCM_TOMAHAWK_SUPPORT 36 #include <soc/tomahawk.h> 37 #endif 38 #ifdef BCM_TOMAHAWK3_SUPPORT 39 #include <soc/tomahawk3.h> 40 #endif 41 42 #if defined(ALPM_ENABLE) 43 #include <soc/alpm.h> 44 #endif 45 46 #include <bcm/l2.h> 47 #include <bcm/pkt.h> 48 #include <bcm/time.h> 49 50 51 #if defined(BCM_WARM_BOOT_SUPPORT_SW_DUMP) || !defined(BCM_SW_STATE_DUMP_DISABLE) 52 #include <bcm/mirror.h> 53 #include <bcm_int/esw/port.h> 54 #include <bcm_int/esw/stack.h> 55 #include <bcm_int/esw/trunk.h> 56 #include <bcm_int/esw/vlan.h> 57 #include <bcm_int/esw/l2.h> 58 #include <bcm_int/esw/link.h> 59 #include <bcm_int/esw/mcast.h> 60 #include <bcm_int/esw/mirror.h> 61 #include <bcm_int/esw/multicast.h> 62 #include <bcm_int/esw/stat.h> 63 #include <bcm_int/esw/stg.h> 64 #include <bcm_int/esw/qos.h> 65 #include <bcm_int/esw/mpls.h> 66 #include <bcm/l3.h> 67 #include <bcm_int/esw/subport.h> 68 #include <bcm/mpls.h> 69 #include <bcm/extender.h> 70 #include <bcm_int/esw/failover.h> 71 #include <bcm_int/esw/l3.h> 72 #include <bcm_int/esw/ipmc.h> 73 #include <bcm_int/esw/cosq.h> 74 #include <bcm_int/common/time.h> 75 #include <bcm_int/esw/trx.h> 76 #include <bcm_int/esw/niv.h> 77 #include <bcm_int/esw/extender.h> 78 #include <bcm_int/esw/trill.h> 79 #include <bcm_int/esw/oam.h> 80 #include <bcm_int/esw/fcoe.h> 81 #include <bcm_int/esw/ecn.h> 82 #include <bcm/pstats.h> 83 #include <bcm_int/esw/flow.h> 84 #if defined(INCLUDE_PSTATS) 85 #include <bcm_int/esw/pstats.h> 86 #endif /* INCLUDE_PSTATS */ 87 #ifdef BCM_FIELD_SUPPORT 88 #include <bcm_int/esw/field.h> 89 #include <bcm/field.h> 90 #endif /* BCM_FIELD_SUPPORT */ 91 #endif /* defined(BCM_WARM_BOOT_SUPPORT_SW_DUMP) || !defined(BCM_SW_STATE_DUMP_DISABLE) */ 92 #ifdef BCM_TRIUMPH3_SUPPORT 93 #include <bcm_int/esw/l2gre.h> 94 #endif /* BCM_TRIUMPH3_SUPPORT */ 95 #ifdef BCM_TRIDENT2_SUPPORT 96 #include <bcm_int/esw/vxlan.h> 97 #endif /* BCM_TRIDENT2_SUPPORT */ 98 #ifdef INCLUDE_REGEX 99 #include <bcm_int/regex_api.h> 100 #endif 101 #if defined(INCLUDE_FLOWTRACKER) 102 #include <bcm_int/esw/flowtracker.h> 103 #endif 104 #if defined(BCM_FLOWTRACKER_SUPPORT) 105 #include <bcm_int/esw/flowtracker/ft_group.h> 106 #endif 107 #if defined(ALPM_ENABLE) 108 #if defined(BCM_TOMAHAWK_SUPPORT) 109 #include <bcm_int/esw/alpm.h> 110 #endif 111 #endif 112 113 #ifdef BCM_IPFIX_SUPPORT 114 #include <bcm/ipfix.h> 115 #include <bcm_int/esw/ipfix.h> 116 #endif 117 118 #if defined(INCLUDE_BFD) 119 #include <bcm_int/esw/bfd.h> 120 #endif 121 122 #if defined(BCM_COLLECTOR_SUPPORT) 123 #include <bcm_int/esw/collector.h> 124 #endif 125 126 #if defined(INCLUDE_TELEMETRY) 127 #include <bcm_int/esw/telemetry.h> 128 #endif 129 130 #include <appl/diag/system.h> 131 #include <appl/diag/decode.h> 132 #include <appl/diag/sysconf.h> 133 #include <appl/diag/diag.h> 134 #include <appl/diag/dport.h> 135 #include <appl/diag/bslcons.h> 136 #include <appl/diag/bslfile.h> 137 138 #include <ibde.h> 139 140 #if defined(BCM_TRIDENT3_SUPPORT) || defined(BCM_TOMAHAWK3_SUPPORT) 141 #include <soc/format.h> 142 #endif 143 #ifndef BCM_SW_STATE_DUMP_DISABLE 144 #include <bcm_int/esw/udf.h> 145 #endif /* BCM_SW_STATE_DUMP_DISABLE */ 146 #define DUMP_PHY_COLS 4 147 #define DUMP_MW_COLS 4 148 #define DUMP_MH_COLS 8 149 #define DUMP_MB_COLS 16 150 151 #ifdef BCM_CMICM_SUPPORT 152 static void 153 _do_dump_cpureg(int unit) 154 { 155 soc_reg_t reg; 156 int idx; 157 uint32 off, val; 158 159 for (reg = 0; reg < NUM_SOC_REG; reg++) { 160 if (!SOC_REG_IS_VALID(unit, reg)) { 161 continue; 162 } 163 if (!SOC_REG_IS_ENABLED(unit, reg)) { 164 continue; 165 } 166 if (SOC_REG_INFO(unit, reg).regtype == soc_cpureg) { 167 idx = 0; 168 off = SOC_REG_BASE(unit, reg); 169 if (soc_feature(unit, soc_feature_time_v3_no_bs)){ 170 if (off >= CMIC_BS0_CONFIG_OFFSET && 171 off <= CMIC_BS1_INITIAL_CRC_OFFSET){ 172 continue; 173 } 174 } 175 if (off >= CMIC_MMU_COSLC_COUNT_ADDR_OFFSET && 176 off < CMIC_TIM0_TIMER1LOAD_OFFSET) { 177 continue; 178 } 179 if (SOC_REG_IS_ARRAY(unit, reg)) { 180 for (idx = 0; idx < SOC_REG_NUMELS(unit,reg); idx ++) { 181 off += idx*4; 182 } 183 } 184 185 /* 186 * These registers do not ack the CPU until the FSCHAN read cycle is completed. 187 * Meaning you must activate a proper FSCHAN read command in order to read these registers. 188 */ 189 switch (reg) { 190 case CMIC_CMC0_FSCHAN_DATA32r : 191 case CMIC_CMC0_FSCHAN_DATA64_LOr : 192 case CMIC_FSCHAN_DATA32r : 193 case CMIC_FSCHAN_DATA64_LOr : 194 case CMIC_CMC1_FSCHAN_DATA32r : 195 case CMIC_CMC1_FSCHAN_DATA64_LOr : 196 case CMIC_CMC2_FSCHAN_DATA32r : 197 case CMIC_CMC2_FSCHAN_DATA64_LOr : 198 continue; 199 case CMIC_BS0_CLK_CTRLr : 200 case CMIC_BS0_CONFIGr : 201 case CMIC_BS0_HEARTBEAT_CTRLr : 202 case CMIC_BS0_HEARTBEAT_DOWN_DURATIONr : 203 case CMIC_BS0_HEARTBEAT_UP_DURATIONr : 204 case CMIC_BS0_INITIAL_CRCr : 205 case CMIC_BS0_INPUT_TIME_0r : 206 case CMIC_BS0_INPUT_TIME_1r : 207 case CMIC_BS0_INPUT_TIME_2r : 208 case CMIC_BS0_OUTPUT_TIME_0r : 209 case CMIC_BS0_OUTPUT_TIME_1r : 210 case CMIC_BS0_OUTPUT_TIME_2r : 211 case CMIC_BS1_CLK_CTRLr : 212 case CMIC_BS1_CONFIGr : 213 case CMIC_BS1_HEARTBEAT_CTRLr : 214 case CMIC_BS1_HEARTBEAT_DOWN_DURATIONr : 215 case CMIC_BS1_HEARTBEAT_UP_DURATIONr : 216 case CMIC_BS1_INITIAL_CRCr : 217 case CMIC_BS1_INPUT_TIME_0r : 218 case CMIC_BS1_INPUT_TIME_1r : 219 case CMIC_BS1_INPUT_TIME_2r : 220 case CMIC_BS1_OUTPUT_TIME_0r : 221 case CMIC_BS1_OUTPUT_TIME_1r : 222 case CMIC_BS1_OUTPUT_TIME_2r : 223 case CMIC_BS_CAPTURE_CTRLr : 224 case CMIC_BS_CAPTURE_FREE_RUN_TIME_0r : 225 case CMIC_BS_CAPTURE_FREE_RUN_TIME_1r : 226 case CMIC_BS_CAPTURE_STATUSr : 227 case CMIC_BS_CAPTURE_SYNC_TIME_0r : 228 case CMIC_BS_CAPTURE_SYNC_TIME_1r : 229 case CMIC_BS_CAPTURE_SYNT_TIME_0r : 230 case CMIC_BS_CAPTURE_SYNT_TIME_1r : 231 case CMIC_BS_CLK_CTRLr : 232 case CMIC_BS_CLK_CTRL_0r : 233 case CMIC_BS_CLK_CTRL_1r : 234 case CMIC_BS_CLK_TOGGLE_TIME_0r : 235 case CMIC_BS_CLK_TOGGLE_TIME_1r : 236 case CMIC_BS_CLK_TOGGLE_TIME_2r : 237 case CMIC_BS_CONFIGr : 238 case CMIC_BS_DRIFT_RATEr : 239 case CMIC_BS_HEARTBEAT_CTRLr : 240 case CMIC_BS_HEARTBEAT_DOWN_DURATIONr : 241 case CMIC_BS_HEARTBEAT_UP_DURATIONr : 242 case CMIC_BS_INITIAL_CRCr : 243 case CMIC_BS_INPUT_TIME_0r : 244 case CMIC_BS_INPUT_TIME_1r : 245 case CMIC_BS_INPUT_TIME_2r : 246 case CMIC_BS_OFFSET_ADJUST_0r : 247 case CMIC_BS_OFFSET_ADJUST_1r : 248 case CMIC_BS_OUTPUT_TIME_0r : 249 case CMIC_BS_OUTPUT_TIME_1r : 250 case CMIC_BS_OUTPUT_TIME_2r : 251 case CMIC_BS_REF_CLK_GEN_CTRLr : 252 if (SOC_IS_MONTEREY(unit)) { 253 continue; 254 } 255 default: 256 /* Do Nothing */ 257 break; 258 } 259 val = soc_pci_read(unit, off); 260 cli_out("0x%04x %s(%d): 0x%x\n", off,SOC_REG_NAME(unit, reg), idx,val); 261 } 262 } 263 } 264 #endif 265 266 /* 267 * Dump all of the CMIC registers. 268 */ 269 270 static void 271 do_dump_pcim(int unit, uint32 off_start, uint32 count) 272 { 273 uint32 off, val = 0, off32; 274 char *pcireg_name=NULL; 275 uint32 unused_reg_index=0; 276 #if defined (BCM_TRIUMPH3_SUPPORT) && defined (BCM_CMICM_SUPPORT) 277 uint32 unavail_reg_index=0; 278 #endif /* BCM_TRIUMPH3_SUPPORT */ 279 280 if ((off_start & 3) != 0) { 281 cli_out("dump_pcim ERROR: offset must be a multiple of 4\n"); 282 return; 283 } 284 285 for (off = off_start; count--; off += 4) { 286 off32 = off; 287 #if defined(BCM_IPROC_SUPPORT) && defined(IPROC_NO_ATL) 288 off32 += SOC_DRIVER(unit)->cmicd_base; 289 #endif 290 #ifdef BCM_TRIUMPH3_SUPPORT 291 #ifdef BCM_CMICM_SUPPORT 292 if ((off32 >= CMIC_MMU_COSLC_COUNT_ADDR_OFFSET && 293 off32 < CMIC_TIM0_TIMER1LOAD_OFFSET) && SOC_IS_TRIUMPH3(unit)) { 294 if (unavail_reg_index == 0) { 295 if (unused_reg_index) { 296 cli_out(" -- 0x%04x \n########\n",off32-4); 297 unused_reg_index = 0; 298 } 299 cli_out("\n########\n UNAVAILABLE REG OFFSETS 0x%04x",off32); 300 if (!count) { 301 cli_out("\n######## \n"); 302 } 303 unavail_reg_index=off; 304 } else { 305 if (!count) { 306 cli_out(" -- 0x%04x \n########\n",off32); 307 } 308 } 309 continue; 310 } 311 if (unavail_reg_index) { 312 cli_out(" -- 0x%04x \n########\n",off32); 313 unavail_reg_index=0; 314 } 315 #endif 316 #endif /* BCM_TRIUMPH3_SUPPORT */ 317 pcireg_name=soc_pci_off2name(unit, off); 318 if (!((sal_strlen(pcireg_name) == 0) || 319 (sal_strcmp(pcireg_name,"???") == 0))) { 320 val = soc_pci_read(unit, off); 321 } 322 if ((sal_strlen(pcireg_name) == 0) || 323 (sal_strcmp(pcireg_name,"???") == 0)) { 324 if (unused_reg_index == 0) { 325 cli_out("\n########\n UNUSED/UNKNOWN REG OFFSETS 0x%04x",off32); 326 unused_reg_index=off; 327 } 328 } else { 329 if (unused_reg_index) { 330 cli_out(" -- 0x%04x \n########\n",off32); 331 unused_reg_index=0; 332 } 333 cli_out("0x%04x %s: 0x%x\n", off32, soc_pci_off2name(unit, off), val); 334 } 335 } 336 if (unused_reg_index) { 337 cli_out("\n######## \n"); 338 } 339 } 340 341 /* 342 * Dump all of the SOC register addresses, and if do_values is true, 343 * read and dump their values along with the addresses. 344 */ 345 346 #define DREG_ADR_SEL_MASK 0xf /* Low order 4 bits */ 347 #define DREG_ADDR 0 /* Address only */ 348 #define DREG_RVAL 1 /* Address and reset default value */ 349 #define DREG_REGS 2 /* Address and real value */ 350 #define DREG_DIFF 3 /* Addr & real value if != default */ 351 #define DREG_CNTR 4 /* Address and real value if counter */ 352 353 #define DREG_PORT_ALL -1 354 #define DREG_BLOCK_ALL -1 355 356 struct dreg_data { 357 int unit; 358 int dreg_select; 359 int only_port; /* Select which port/block. -1 ==> all */ 360 int only_block; 361 }; 362 363 extern void 364 reg_above_64_print(int unit, 365 soc_regaddrinfo_t *ainfo, 366 soc_reg_above_64_val_t val, 367 uint32 flags, 368 char *fld_sep, 369 int wrap); 370 371 static int 372 dreg(int unit, soc_regaddrinfo_t *ainfo, void *data) 373 { 374 struct dreg_data *dd = data; 375 uint32 value; 376 uint64 val64, resetVal; 377 char name[80]; 378 int is64, is_default, rv, isabove64=0; 379 int no_match = FALSE; /* If specific port/block requested, turns true */ 380 char rval_str[20]; 381 soc_reg_above_64_val_t value_above_64, resval_above64; 382 383 /* Filter (set no_match) on ports and blocks if selected. */ 384 if (dd->only_port != DREG_PORT_ALL) { 385 /* Only print ports that match */ 386 if (ainfo->port != dd->only_port) { 387 no_match = TRUE; 388 } 389 } 390 391 if (dd->only_block != DREG_BLOCK_ALL) { 392 /* Only print blocks that match */ 393 if (ainfo->block != dd->only_block) { 394 no_match = TRUE; 395 } else { /* Match found; undo no_match */ 396 no_match = FALSE; 397 } 398 } 399 400 if (no_match) { 401 return 0; 402 } 403 404 soc_reg_sprint_addr(unit, name, ainfo); 405 406 if (dd->dreg_select == DREG_ADDR) { 407 cli_out("0x%08x %s\n", ainfo->addr, name); 408 return 0; 409 } 410 411 SOC_REG_RST_VAL_GET(unit, ainfo->reg, resetVal); 412 format_uint64(rval_str, resetVal); 413 414 if (dd->dreg_select == DREG_RVAL) { 415 cli_out("0x%08x %s = 0x%s\n", ainfo->addr, name, rval_str); 416 return 0; 417 } 418 419 if (SOC_REG_INFO(unit, ainfo->reg).flags & SOC_REG_FLAG_WO) { 420 cli_out("0x%08x %s = Write Only\n", ainfo->addr, name); 421 return 0; 422 } 423 424 if (SOC_REG_IS_SPECIAL(unit, ainfo->reg)) { 425 cli_out("0x%08x %s = Requires special processing\n", 426 ainfo->addr, name); 427 return 0; 428 } 429 430 if (reg_mask_subset(unit, ainfo, NULL)) { 431 /* Register does not exist on this port/cos */ 432 return 0; 433 } 434 435 is64 = SOC_REG_IS_64(unit, ainfo->reg); 436 isabove64 = SOC_REG_IS_ABOVE_64(unit, ainfo->reg); 437 438 if (is64) { 439 if (ainfo->cos >= 0) { 440 rv = soc_reg64_get(dd->unit, ainfo->reg, REG_PORT_ANY, ainfo->cos, 441 &val64); 442 } else { 443 rv = soc_reg64_get(dd->unit, ainfo->reg, ainfo->port, ainfo->idx, 444 &val64); 445 } 446 is_default = COMPILER_64_EQ(val64, resetVal); 447 } else if (isabove64) { 448 rv = soc_reg_above_64_get( 449 unit, ainfo->reg, ainfo->port, 450 SOC_REG_IS_ARRAY(unit, ainfo->reg) ? 451 ainfo->idx : 0, value_above_64); 452 453 SOC_REG_ABOVE_64_RST_VAL_GET(unit, ainfo->reg, resval_above64); 454 is_default = SOC_REG_ABOVE_64_IS_EQUAL(value_above_64, resval_above64); 455 } else { 456 if (ainfo->cos >= 0) { 457 rv = soc_reg32_get(dd->unit, ainfo->reg, REG_PORT_ANY, ainfo->cos, 458 &value); 459 } else { 460 rv = soc_reg32_get(dd->unit, ainfo->reg, ainfo->port, ainfo->idx, 461 &value); 462 } 463 is_default = (value == COMPILER_64_LO(resetVal)); 464 } 465 466 if (rv < 0) { 467 cli_out("0x%08x %s = ERROR\n", ainfo->addr, name); 468 return 0; 469 } 470 if (dd->dreg_select == DREG_DIFF && is_default) { 471 return 0; 472 } 473 if ((dd->dreg_select == DREG_CNTR) && 474 (!(SOC_REG_INFO(unit, ainfo->reg).flags & SOC_REG_FLAG_COUNTER))) { 475 return 0; 476 } 477 if (is64) { 478 cli_out("0x%08x %s = 0x%08x%08x\n", 479 ainfo->addr, name, 480 COMPILER_64_HI(val64), COMPILER_64_LO(val64)); 481 } else if (isabove64) { 482 cli_out("0x%08x %s = ", ainfo->addr, name); 483 reg_above_64_print(unit, ainfo, value_above_64, REG_PRINT_HEX, ",", 62 ); 484 } else { 485 cli_out("0x%08x %s = 0x%08x\n", ainfo->addr, name, value); 486 } 487 return 0; 488 } 489 490 static cmd_result_t 491 do_dump_soc(int unit, int dreg_select, int only_port, int only_block) 492 { 493 struct dreg_data dd; 494 495 dd.unit = unit; 496 dd.dreg_select = dreg_select; 497 dd.only_port = only_port; 498 dd.only_block = only_block; 499 500 (void) soc_reg_iterate(unit, dreg, &dd); 501 502 return CMD_OK; 503 } 504 505 static void 506 _pci_print_config(int unit) 507 { 508 uint32 data; 509 int cap_len, cap_base, next_cap_base, i; 510 511 if ((soc_cm_get_bus_type(unit) & SOC_PCI_DEV_TYPE) == 0) { 512 return; 513 } 514 515 516 data = soc_cm_pci_conf_read(unit, PCI_CONF_VENDOR_ID); 517 cli_out("%04x: %08x DeviceID=%04x VendorID=%04x\n", 518 PCI_CONF_VENDOR_ID, data, 519 (data & 0xffff0000) >> 16, 520 (data & 0x0000ffff) >> 0); 521 522 data = soc_cm_pci_conf_read(unit, PCI_CONF_COMMAND); 523 cli_out("%04x: %08x Status=%04x Command=%04x\n", 524 PCI_CONF_COMMAND, data, 525 (data & 0xffff0000) >> 16, 526 (data & 0x0000ffff) >> 0); 527 cap_len = (data >> 16) & 0x10 ? 4 : 0; 528 529 data = soc_cm_pci_conf_read(unit, PCI_CONF_REVISION_ID); 530 cli_out("%04x: %08x ClassCode=%06x RevisionID=%02x\n", 531 PCI_CONF_REVISION_ID, data, 532 (data & 0xffffff00) >> 8, 533 (data & 0x000000ff) >> 0); 534 535 data = soc_cm_pci_conf_read(unit, PCI_CONF_CACHE_LINE_SIZE); 536 cli_out("%04x: %08x BIST=%02x HeaderType=%02x " 537 "LatencyTimer=%02x CacheLineSize=%02x\n", 538 PCI_CONF_CACHE_LINE_SIZE, data, 539 (data & 0xff000000) >> 24, 540 (data & 0x00ff0000) >> 16, 541 (data & 0x0000ff00) >> 8, 542 (data & 0x000000ff) >> 0); 543 544 data = soc_cm_pci_conf_read(unit, PCI_CONF_BAR0); 545 cli_out("%04x: %08x BaseAddress0=%08x\n", 546 PCI_CONF_BAR0, data, data); 547 548 data = soc_cm_pci_conf_read(unit, PCI_CONF_BAR1); 549 cli_out("%04x: %08x BaseAddress1=%08x\n", 550 PCI_CONF_BAR1, data, data); 551 552 data = soc_cm_pci_conf_read(unit, PCI_CONF_BAR2); 553 cli_out("%04x: %08x BaseAddress2=%08x\n", 554 PCI_CONF_BAR2, data, data); 555 556 data = soc_cm_pci_conf_read(unit, PCI_CONF_BAR3); 557 cli_out("%04x: %08x BaseAddress3=%08x\n", 558 PCI_CONF_BAR3, data, data); 559 560 data = soc_cm_pci_conf_read(unit, PCI_CONF_BAR4); 561 cli_out("%04x: %08x BaseAddress4=%08x\n", 562 PCI_CONF_BAR4, data, data); 563 564 data = soc_cm_pci_conf_read(unit, PCI_CONF_BAR5); 565 cli_out("%04x: %08x BaseAddress5=%08x\n", 566 PCI_CONF_BAR5, data, data); 567 568 data = soc_cm_pci_conf_read(unit, PCI_CONF_CB_CIS_PTR); 569 cli_out("%04x: %08x CardbusCISPointer=%08x\n", 570 PCI_CONF_CB_CIS_PTR, data, data); 571 572 data = soc_cm_pci_conf_read(unit, PCI_CONF_SUBSYS_VENDOR_ID); 573 cli_out("%04x: %08x SubsystemID=%02x SubsystemVendorID=%02x\n", 574 PCI_CONF_SUBSYS_VENDOR_ID, data, 575 (data & 0xffff0000) >> 16, 576 (data & 0x0000ffff) >> 0); 577 578 data = soc_cm_pci_conf_read(unit, PCI_CONF_EXP_ROM); 579 cli_out("%04x: %08x ExpansionROMBaseAddress=%08x\n", 580 PCI_CONF_EXP_ROM, data, data); 581 582 data = soc_cm_pci_conf_read(unit, 0x34); 583 cli_out("%04x: %08x Reserved=%06x CapabilitiesPointer=%02x\n", 584 0x34, data, 585 (data & 0xffffff00) >> 8, 586 (data & 0x000000ff) >> 0); 587 cap_base = cap_len ? data & 0xff : 0; 588 589 data = soc_cm_pci_conf_read(unit, 0x38); 590 cli_out("%04x: %08x Reserved=%08x\n", 591 0x38, data, data); 592 593 data = soc_cm_pci_conf_read(unit, PCI_CONF_INTERRUPT_LINE); 594 cli_out("%04x: %08x Max_Lat=%02x Min_Gnt=%02x " 595 "InterruptPin=%02x InterruptLine=%02x\n", 596 PCI_CONF_INTERRUPT_LINE, data, 597 (data & 0xff000000) >> 24, 598 (data & 0x00ff0000) >> 16, 599 (data & 0x0000ff00) >> 8, 600 (data & 0x000000ff) >> 0); 601 602 data = soc_cm_pci_conf_read(unit, 0x40); 603 cli_out("%04x: %08x Reserved=%02x " 604 "RetryTimeoutValue=%02x TRDYTimeoutValue=%02x\n", 605 0x40, data, 606 (data & 0xffff0000) >> 16, 607 (data & 0x0000ff00) >> 8, 608 (data & 0x000000ff) >> 0); 609 610 data = soc_cm_pci_conf_read(unit, 0x44); 611 cli_out("%04x: %08x PLLConf=%01x\n", 612 0x44, data, 613 (data & 0x000000ff) >> 0); 614 615 data = soc_cm_pci_conf_read(unit,0x48); 616 cli_out("%04x: %08x -\n", 617 0x48, data); 618 619 while (cap_base) { 620 data = soc_cm_pci_conf_read(unit, cap_base); 621 cli_out("%04x: %08x CapabilityID=%02x " 622 "CapabilitiesPointer=%02x ", 623 cap_base, data, data & 0xff, (data >> 8) & 0xff); 624 next_cap_base = (data >> 8) & 0xff; 625 switch (data & 0xff) { 626 case 0x01: 627 cap_len = 2 * 4; 628 cli_out("PWR-MGMT\n"); 629 break; 630 case 0x03: 631 cap_len = 2 * 4; 632 cli_out("VPD\n"); 633 break; 634 case 0x05: 635 cap_len = 6 * 4; /* 3 to 6 DWORDS */ 636 cli_out("MSI\n"); 637 break; 638 case 0x10: 639 cap_len = 3 * 4; 640 cli_out("PCIE\n"); 641 break; 642 case 0x11: 643 cap_len = 3 * 4; 644 cli_out("MSI-X\n"); 645 break; 646 default: 647 break; 648 } 649 for (i = 4; i < cap_len; i += 4) { 650 data = soc_cm_pci_conf_read(unit,cap_base + i); 651 cli_out("%04x: %08x -\n", cap_base + i, data); 652 } 653 cap_base = next_cap_base; 654 } 655 656 #if defined(VXWORKS) && defined(INCLUDE_PCI) 657 658 { 659 #ifdef IDTRP334 660 extern void sysBusErrDisable(void); 661 extern void sysBusErrEnable(void); 662 #endif 663 664 /* HINT (R) HB4 PCI-PCI Bridge (21150 clone) */ 665 #define HINT_HB4_VENDOR_ID 0x3388 666 #define HINT_HB4_DEVICE_ID 0x0022 667 668 int BusNo, DevNo, FuncNo; 669 unsigned short tmp; 670 671 #ifdef IDTRP334 672 sysBusErrDisable(); 673 #endif 674 675 /* 676 * HINTCORP HB4 PCI-PCI Bridge 677 */ 678 if (pciFindDevice(HINT_HB4_VENDOR_ID, 679 HINT_HB4_DEVICE_ID, 680 0, 681 &BusNo, &DevNo, &FuncNo) != ERROR) { 682 683 cli_out("-------------------------------------\n"); 684 cli_out("HB4 PCI-PCI Bridge Status Registers \n"); 685 cli_out("-------------------------------------\n"); 686 687 /* Dump the status registers */ 688 pciConfigInWord(BusNo,DevNo,FuncNo, 0x06, &tmp); 689 cli_out("Primary Status (%xh): 0x%x\n", 0x06, tmp); 690 pciConfigInWord(BusNo,DevNo,FuncNo, 0x1e, &tmp); 691 cli_out("Secondary Status (%xh): 0x%x\n", 0x1e, tmp); 692 pciConfigInWord(BusNo,DevNo,FuncNo, 0x3e, &tmp); 693 cli_out("Bridge Control (%xh): 0x%x\n", 0x3e, tmp); 694 pciConfigInWord(BusNo,DevNo,FuncNo, 0x6a, &tmp); 695 cli_out("P_SERR Status (%xh): 0x%x\n", 0x6a, tmp); 696 } 697 698 #ifdef IDTRP334 699 sysBusErrEnable(); 700 #endif 701 } 702 #endif 703 } 704 705 /* 706 * Dump registers, tables, or an address space. 707 */ 708 709 static cmd_result_t 710 do_dump_registers(int unit, regtype_entry_t *rt, args_t *a) 711 { 712 int i; 713 sal_vaddr_t vaddr; 714 uint32 t1 = 0, t2 = 0; 715 pbmp_t pbmp; 716 soc_port_t port, dport; 717 int rv = CMD_OK; 718 uint32 flags = DREG_REGS; 719 int dump_port = DREG_PORT_ALL; 720 int dump_block = DREG_BLOCK_ALL; 721 char *an_arg; 722 char *count; 723 #ifdef BCM_CMICX_SUPPORT 724 uint32 min_reg_offset = 0, max_reg_offset = 0; 725 #endif 726 727 an_arg = ARG_GET(a); 728 count = ARG_GET(a); 729 730 /* PCI config space does not take an offset */ 731 switch (rt->type) { 732 case soc_pci_cfg_reg: 733 _pci_print_config(unit); 734 break; 735 case soc_cpureg: 736 if (an_arg) { 737 if (parse_cmic_regname(unit, an_arg, &t1) < 0) { 738 cli_out("ERROR: unknown CMIC register name: %s\n", an_arg); 739 rv = CMD_FAIL; 740 goto done; 741 } 742 t2 = count ? parse_integer(count) : 1; 743 } else { 744 #ifdef BCM_CMICM_SUPPORT 745 if (soc_feature(unit, soc_feature_cmicm)) { 746 if (soc_feature(unit, soc_feature_cpureg_dump)){ 747 _do_dump_cpureg(unit); 748 break; 749 } 750 } 751 #endif 752 753 #ifdef BCM_CMICM_SUPPORT 754 if(soc_feature(unit, soc_feature_cmicm)) { 755 t1 = CMICM_OFFSET_MIN; 756 t2 = (CMICM_OFFSET_MAX - CMICM_OFFSET_MIN) / 4 + 1; 757 } else 758 #endif 759 #ifdef BCM_CMICX_SUPPORT 760 if (soc_feature(unit, soc_feature_cmicx)) { 761 soc_cmicx_reg_offset_get(&min_reg_offset, &max_reg_offset); 762 t1 = min_reg_offset; 763 t2 = (max_reg_offset - min_reg_offset) / 4 + 1; 764 } else 765 #endif 766 { 767 t1 = CMIC_OFFSET_MIN; 768 t2 = (CMIC_OFFSET_MAX - CMIC_OFFSET_MIN) / 4 + 1; 769 } 770 } 771 772 do_dump_pcim(unit, t1, t2); 773 break; 774 #ifdef BCM_CMICM_SUPPORT 775 case soc_mcsreg: 776 if (!an_arg) { 777 cli_out("Dumping MCS memory requires address and " 778 "optional count\n"); 779 rv = CMD_FAIL; 780 goto done; 781 } 782 t1 = parse_integer(an_arg) & ~3; 783 t2 = count ? parse_integer(count) : 1; 784 for (i = 0; i < (int)t2; i++, t1 += 4) { 785 if ((i % DUMP_MW_COLS) == 0) 786 cli_out("%08x: ", t1); 787 cli_out("%08x%c", 788 soc_pci_mcs_read(unit, t1), 789 ((i + 1) % DUMP_MW_COLS) == 0 ? '\n' : ' '); 790 } 791 if (i % DUMP_MW_COLS) 792 cli_out("\n"); 793 break; 794 #endif 795 case soc_iprocreg: 796 goto done; 797 break; 798 case soc_schan_reg: 799 case soc_genreg: 800 case soc_portreg: 801 case soc_cosreg: 802 803 while (an_arg) { 804 if (sal_strcasecmp(an_arg, "addr") == 0) { 805 flags = DREG_ADDR; 806 } else if (sal_strcasecmp(an_arg, "rval") == 0) { 807 flags = DREG_RVAL; 808 } else if (sal_strcasecmp(an_arg, "diff") == 0) { 809 flags = DREG_DIFF; 810 } else if (sal_strcasecmp(an_arg, "counter") == 0) { 811 flags = DREG_CNTR; 812 } else if (sal_strcasecmp(an_arg, "port") == 0) { 813 an_arg = ARG_GET(a); 814 dump_port = an_arg ? parse_integer(an_arg) : 0; 815 } else if (sal_strcasecmp(an_arg, "block") == 0) { 816 an_arg = ARG_GET(a); 817 dump_block = an_arg ? parse_integer(an_arg) : 0; 818 } else { 819 cli_out("ERROR: unrecognized argument to DUMP SOC: %s\n", 820 an_arg); 821 return CMD_FAIL; 822 } 823 if (count != NULL) { 824 an_arg = count; 825 count = NULL; 826 } else { 827 an_arg = ARG_GET(a); 828 } 829 } 830 rv = do_dump_soc(unit, flags, dump_port, dump_block); 831 break; 832 833 case soc_phy_reg: 834 if (an_arg) { 835 if (parse_pbmp(unit, an_arg, &pbmp)) { 836 cli_out("Error: Invalid port identifier: %s\n", an_arg); 837 rv = CMD_FAIL; 838 break; 839 } 840 } else { 841 pbmp = PBMP_PORT_ALL(unit); 842 } 843 SOC_PBMP_AND(pbmp, PBMP_PORT_ALL(unit)); 844 /* coverity[overrun-local] */ 845 DPORT_SOC_PBMP_ITER(unit, pbmp, dport, port) { 846 uint8 phy_id = port_to_phyaddr(unit, port); 847 uint16 phy_data, phy_reg; 848 cli_out("\nPort %d (Phy ID %d)", port + 1, phy_id); 849 for (phy_reg = PHY_MIN_REG; phy_reg <= PHY_MAX_REG; phy_reg++) { 850 rv = soc_miim_read(unit, phy_id, phy_reg, &phy_data); 851 if (rv < 0) { 852 cli_out("Error: Port %d: cmic_read_miim failed: %s\n", 853 port + 1, soc_errmsg(rv)); 854 rv = CMD_FAIL; 855 goto done; 856 } 857 cli_out("%s\t0x%02x: 0x%04x", 858 ((phy_reg % DUMP_PHY_COLS) == 0) ? "\n" : "", 859 phy_reg, phy_data); 860 } 861 cli_out("\n"); 862 } 863 break; 864 865 case soc_hostmem_w: 866 if (!an_arg) { 867 cli_out("Dumping memory requires address and optional count\n"); 868 rv = CMD_FAIL; 869 goto done; 870 } 871 vaddr = parse_address(an_arg) & ~3; 872 t2 = count ? parse_integer(count) : 1; 873 for (i = 0; i < (int)t2; i++, vaddr += 4) { 874 uint32 *memptr = INT_TO_PTR(vaddr); 875 if ((i % DUMP_MW_COLS) == 0) { 876 cli_out("%p: ", (void *)memptr); 877 } 878 cli_out("%08x%c", *memptr, 879 ((i + 1) % DUMP_MW_COLS) == 0 ? '\n' : ' '); 880 } 881 if (i % DUMP_MW_COLS) { 882 cli_out("\n"); 883 } 884 break; 885 case soc_hostmem_h: 886 if (!an_arg) { 887 cli_out("Dumping memory requires address and optional count\n"); 888 rv = CMD_FAIL; 889 goto done; 890 } 891 vaddr = parse_address(an_arg) & ~1; 892 t2 = count ? parse_integer(count) : 1; 893 for (i = 0; i < (int)t2; i++, vaddr += 2) { 894 uint16 *memptr = INT_TO_PTR(vaddr); 895 if ((i % DUMP_MH_COLS) == 0) { 896 cli_out("%p: ", (void *)memptr); 897 } 898 cli_out("%04x%c", *memptr, 899 ((i + 1) % DUMP_MH_COLS) == 0 ? '\n' : ' '); 900 } 901 if (i % DUMP_MH_COLS) { 902 cli_out("\n"); 903 } 904 break; 905 case soc_hostmem_b: 906 if (!an_arg) { 907 cli_out("Dumping memory requires address and optional count\n"); 908 rv = CMD_FAIL; 909 goto done; 910 } 911 vaddr = parse_address(an_arg); 912 t2 = count ? parse_integer(count) : 1; 913 for (i = 0; i < (int)t2; i++, vaddr += 1) { 914 uint8 *memptr = INT_TO_PTR(vaddr); 915 if ((i % DUMP_MB_COLS) == 0) { 916 cli_out("%p: ", (void *)memptr); 917 } 918 cli_out("%02x%c", *memptr, 919 ((i + 1) % DUMP_MB_COLS) == 0 ? '\n' : ' '); 920 } 921 if (i % DUMP_MB_COLS) { 922 cli_out("\n"); 923 } 924 break; 925 default: 926 cli_out("Dumping register type %s is not yet implemented.\n", 927 rt->name); 928 rv = CMD_FAIL; 929 break; 930 } 931 932 done: 933 return rv; 934 } 935 936 #if defined(BCM_TRIUMPH3_SUPPORT) 937 STATIC INLINE int 938 _mem_tr3_mem_reduced(int unit, soc_mem_t mem, uint32 copyno) 939 { 940 switch (mem) { 941 case PORT_EHG_RX_TUNNEL_DATAm: 942 case PORT_EHG_RX_TUNNEL_MASKm: 943 case PORT_EHG_TX_TUNNEL_DATAm: 944 if ((SOC_BLOCK_TYPE(unit, copyno) == SOC_BLK_XLPORT) || 945 (SOC_BLOCK_TYPE(unit, copyno) == SOC_BLK_XWPORT)) { 946 return TRUE; 947 } else { 948 return FALSE; 949 } 950 951 default: 952 return FALSE; 953 } 954 } 955 #endif 956 957 #define DUMP_TABLE_RAW 0x01 958 #define DUMP_TABLE_HEX 0x02 959 #define DUMP_TABLE_ALL 0x04 960 #define DUMP_TABLE_CHANGED 0x08 961 #define DUMP_TABLE_EXT 0x10 962 #define DUMP_TABLE_PIPE_X 0x20 963 #define DUMP_TABLE_PIPE_Y 0x40 964 #define DUMP_TABLE_PIPE_0 0x80 965 #define DUMP_TABLE_PIPE_1 0x100 966 #define DUMP_TABLE_PIPE_2 0x200 967 #define DUMP_TABLE_PIPE_3 0x400 968 #define DUMP_TABLE_NO_CACHE 0x800 969 #define DUMP_TABLE_PHY_INDEX 0x1000 970 #define DUMP_TABLE_SIMPLIFIED 0x2000 971 #define DUMP_TABLE_FORMAT 0x4000 972 #define DUMP_TABLE_PIPE_4 0x8000 973 #define DUMP_TABLE_PIPE_5 0x10000 974 #define DUMP_TABLE_PIPE_6 0x20000 975 #define DUMP_TABLE_PIPE_7 0x40000 976 #define DUMP_TABLE_ALL_DMA_THRESHOLD 8 977 #define DUMP_TABLE_ITER_BEFORE_YIELD 8 978 979 #if defined(BCM_TRIUMPH3_SUPPORT) || defined (BCM_TRIDENT2_SUPPORT) || \ 980 defined(BCM_TOMAHAWK_SUPPORT) 981 STATIC INLINE int 982 _mem_tr3_skippable(int unit, soc_mem_t mem, uint32 copyno) 983 { 984 if (SOC_BLOCK_TYPE(unit, copyno) == SOC_BLK_IBOD) { 985 return TRUE; 986 } 987 988 /* Cannot dump the memory due to crash with pop command */ 989 switch (mem) { 990 case ING_SER_FIFOm: 991 case ING_SER_FIFO_Xm: 992 case ING_SER_FIFO_Ym: 993 case ISM_SER_FIFOm: 994 case EGR_SER_FIFOm: 995 case PORT_WC_UCMEM_DATAm: 996 #ifdef BCM_TOMAHAWK_SUPPORT 997 case CENTRAL_CTR_EVICTION_FIFOm: 998 case ING_SER_FIFO_PIPE0m: 999 case ING_SER_FIFO_PIPE1m: 1000 case ING_SER_FIFO_PIPE2m: 1001 case ING_SER_FIFO_PIPE3m: 1002 case EGR_SER_FIFO_PIPE0m: 1003 case EGR_SER_FIFO_PIPE1m: 1004 case EGR_SER_FIFO_PIPE2m: 1005 case EGR_SER_FIFO_PIPE3m: 1006 case L2_MGMT_SER_FIFOm: 1007 case MMU_GCFG_MEM_FAIL_ADDR_64m: 1008 case MMU_SCFG_MEM_FAIL_ADDR_64_SC0m: 1009 case MMU_SCFG_MEM_FAIL_ADDR_64_SC1m: 1010 case MMU_XCFG_MEM_FAIL_ADDR_64_XPE0m: 1011 case MMU_XCFG_MEM_FAIL_ADDR_64_XPE1m: 1012 case MMU_XCFG_MEM_FAIL_ADDR_64_XPE2m: 1013 case MMU_XCFG_MEM_FAIL_ADDR_64_XPE3m: 1014 #endif /* BCM_TOMAHAWK_SUPPORT */ 1015 #ifdef BCM_TOMAHAWK2_SUPPORT 1016 case MMU_SEDCFG_MEM_FAIL_ADDR_64m: 1017 case MMU_SEDCFG_MEM_FAIL_ADDR_64_SC0m: 1018 case MMU_SEDCFG_MEM_FAIL_ADDR_64_SC1m: 1019 #endif /* BCM_TOMAHAWK2_SUPPORT */ 1020 return TRUE; 1021 1022 default: 1023 return FALSE; 1024 } 1025 } 1026 #endif 1027 1028 /* 1029 * Utility function to determine whether 1030 * to skip DMA and use PIO for certain mems 1031 */ 1032 STATIC uint8 1033 soc_mem_dma_skip(int unit, soc_mem_t mem) { 1034 switch (mem) { 1035 case L2_MOD_FIFOm: 1036 return TRUE; 1037 1038 default: 1039 return FALSE; 1040 } 1041 } 1042 #if defined(BCM_TOMAHAWK_SUPPORT) 1043 #define IS_IFP_TCAM(unit, base_mem) ((SOC_IS_TOMAHAWKX(unit))? \ 1044 (base_mem == IFP_TCAMm || base_mem == IFP_TCAM_WIDEm):0) 1045 #else 1046 #define IS_IFP_TCAM(unit, base_mem) 0 1047 #endif 1048 1049 #ifdef BCM_TOMAHAWK3_SUPPORT 1050 STATIC int 1051 read_and_clear_learn_cache_entries(int unit, soc_mem_t mem, int copyno, int index, int count, int flags, char *field_names, int *sts) 1052 { 1053 int rv; 1054 int rv1 = SOC_E_NONE; 1055 void *buffer; 1056 int num_bytes; 1057 uint16 dev_id; 1058 uint8 rev_id; 1059 int i; 1060 int entry_dw; 1061 char *buff; 1062 char lineprefix[256]; 1063 1064 if (!SOC_IS_TOMAHAWK3(unit)) { 1065 return CMD_FAIL; 1066 } 1067 1068 soc_cm_get_id(unit, &dev_id, &rev_id); 1069 1070 /* Proceed only if revision is A0 */ 1071 if (rev_id != BCM56980_A0_REV_ID) { 1072 *sts = 1; 1073 return CMD_FAIL; 1074 } 1075 1076 assert(copyno >= 0); 1077 1078 num_bytes = soc_mem_entry_bytes(unit, mem); 1079 1080 buffer = soc_cm_salloc(unit, num_bytes * count, "Dump L2 lrn cache buffer"); 1081 if (buffer == NULL) { 1082 cli_out("ERROR: Dump buffer memory allocation for %d bytes failed\n", 1083 num_bytes * count); 1084 return CMD_FAIL; 1085 } 1086 1087 buff = (char *)soc_cm_salloc(unit, num_bytes * count, "zero buffer"); 1088 if (buff == NULL) { 1089 cli_out("read_and_clear_learn_cache_entries:" 1090 " Cannot allocate memory, %u bytes\n", num_bytes * count); 1091 rv = CMD_FAIL; 1092 goto done; 1093 } 1094 1095 /* Zero out the whole memory range */ 1096 sal_memset(buff, 0x0, num_bytes * count); 1097 1098 entry_dw = soc_mem_entry_words(unit, mem); 1099 1100 /* Read memory in to temp buffer, and clear memory at the same time, 1101 * while holding the lock 1102 */ 1103 soc_mem_lock(unit, mem); 1104 rv = soc_mem_read_range(unit, mem, copyno, index, index + count - 1, 1105 buffer); 1106 if (rv == SOC_E_NONE) { 1107 1108 /*rv1 = soc_mem_clear(unit, mem, MEM_BLOCK_ALL, FALSE); */ 1109 rv1 = soc_mem_write_range(unit, mem, copyno, index, index + count - 1, (void *)buff); 1110 } 1111 soc_mem_unlock(unit, mem); 1112 1113 /* Free zero buffer */ 1114 if (buff != NULL) { 1115 soc_cm_sfree(unit, buff); 1116 buff = NULL; 1117 } 1118 1119 if (SOC_FAILURE(rv)) { 1120 cli_out("ERROR: soc_mem_read_range failed for %s failed\n", 1121 SOC_MEM_NAME(unit, mem)); 1122 rv = CMD_FAIL; 1123 goto done; 1124 } 1125 1126 if (SOC_FAILURE(rv1)) { 1127 cli_out("ERROR: soc_mem_clear failed for %s failed, error %d\n", 1128 SOC_MEM_NAME(unit, mem), rv1); 1129 rv = CMD_FAIL; 1130 goto done; 1131 } 1132 1133 for (i = index; i < (index + count); i++) { 1134 uint32 *entry; 1135 int j; 1136 1137 /* Point to the next entry in the buffer */ 1138 entry = (uint32 *)((uint8 *)buffer + i * num_bytes); 1139 1140 if (!(flags & DUMP_TABLE_ALL)) { 1141 if (soc_mem_field32_get(unit, mem, entry, VALIDf) == 0) { 1142 continue; 1143 } 1144 } 1145 1146 if (flags & DUMP_TABLE_HEX) { 1147 for (j = 0; j < entry_dw; j++) { 1148 cli_out("%08x\n", entry[j]); 1149 } 1150 } else if (flags & DUMP_TABLE_CHANGED) { 1151 sal_sprintf(lineprefix, "%s.%s[%d]: ", 1152 SOC_MEM_UFNAME(unit, mem), 1153 SOC_BLOCK_NAME(unit, copyno), 1154 i); 1155 if (field_names == NULL) { 1156 soc_mem_entry_dump_if_changed(unit, mem, (void *)entry, lineprefix); 1157 } else { 1158 soc_mem_entry_dump_if_changed_fields(unit, mem, (void *)entry, 1159 lineprefix, field_names); 1160 } 1161 } else { 1162 cli_out("%s.%s[%d]: ", 1163 SOC_MEM_UFNAME(unit, mem), 1164 SOC_BLOCK_NAME(unit, copyno), 1165 i); 1166 1167 if (flags & DUMP_TABLE_RAW) { 1168 for (j = 0; j < entry_dw; j++) { 1169 cli_out("0x%08x ", entry[j]); 1170 } 1171 cli_out("\n"); 1172 } else { 1173 if (field_names == NULL) { 1174 soc_mem_entry_dump(unit, mem, (void *)entry, BSL_LSS_CLI); 1175 } else { 1176 soc_mem_entry_dump_fields(unit, mem, (void *)entry, field_names); 1177 } 1178 } 1179 } 1180 1181 /* Yield CPU so other processes are not starved */ 1182 if (((i - index + 1) % DUMP_TABLE_ITER_BEFORE_YIELD) == 0) { 1183 sal_thread_yield(); 1184 } 1185 } 1186 1187 rv = CMD_OK; 1188 1189 done: 1190 if (buffer != NULL) { 1191 soc_cm_sfree(unit, buffer); 1192 buffer = NULL; 1193 } 1194 1195 return rv; 1196 } 1197 #endif /* BCM_TOMAHAWK3_SUPPORT */ 1198 1199 cmd_result_t 1200 do_dump_table(int unit, soc_mem_t mem, 1201 int copyno, int index, int count, int flags, char *field_names, 1202 int enable_mem_mode_check) 1203 { 1204 int k, i; 1205 uint32 entry[SOC_MAX_MEM_WORDS]; 1206 char lineprefix[256]; 1207 int entry_dw; 1208 #ifdef BCM_TOMAHAWK3_SUPPORT 1209 int base_valid_count; 1210 #endif 1211 int rv = CMD_FAIL, rv1; 1212 #if defined(BCM_TRIUMPH3_SUPPORT) 1213 int tr3_special_case = (copyno >= 0) && SOC_IS_TRIUMPH3(unit) 1214 && _mem_tr3_mem_reduced(unit, mem, copyno); 1215 #endif 1216 #ifdef BCM_TRIDENT2_SUPPORT 1217 int check_view = FALSE; 1218 soc_mem_t view = mem; 1219 #endif /* BCM_TRIDENT2_SUPPORT */ 1220 #ifdef BCM_TOMAHAWK_SUPPORT 1221 int pipe_no; 1222 soc_mem_t base_mem; 1223 uint8 dual_mode = FALSE; 1224 int check_lpm_view = FALSE; 1225 soc_mem_t lpm_view = INVALIDm; 1226 int pair_lpm = 0; 1227 #endif 1228 uint32 *mem_buffer = NULL; 1229 uint8 do_dma = FALSE; 1230 uint32 read_flags = SOC_MEM_NO_FLAGS; 1231 1232 assert(copyno >= 0); 1233 1234 #if defined(BCM_TRIUMPH3_SUPPORT) || defined(BCM_TRIDENT2_SUPPORT) || \ 1235 defined(BCM_TOMAHAWK_SUPPORT) 1236 if ((SOC_IS_TRIUMPH3(unit) || (SOC_IS_TD2_TT2(unit))) && 1237 _mem_tr3_skippable(unit, mem, copyno)){ 1238 return CMD_OK; 1239 } 1240 #endif 1241 1242 entry_dw = soc_mem_entry_words(unit, mem); 1243 1244 #ifdef BCM_TRIDENT2_SUPPORT 1245 if (SOC_IS_TD2_TT2(unit) && 1246 (mem == L3_DEFIP_ALPM_IPV4m || mem == L3_DEFIP_ALPM_IPV4_1m || 1247 mem == L3_DEFIP_ALPM_IPV6_64m || mem == L3_DEFIP_ALPM_IPV6_64_1m || 1248 mem == L3_DEFIP_ALPM_IPV6_128m)) { 1249 check_view = TRUE; 1250 } 1251 #endif /* BCM_TRIDENT2_SUPPORT */ 1252 1253 #ifdef BCM_TOMAHAWK_SUPPORT 1254 if (SOC_IS_TOMAHAWKX(unit) && (flags & DUMP_TABLE_PHY_INDEX)) { 1255 if (soc_feature(unit, soc_feature_l3_defip_map) && 1256 (mem == L3_DEFIPm || 1257 #ifdef BCM_TOMAHAWK3_SUPPORT 1258 mem == L3_DEFIP_LEVEL1m || 1259 #endif 1260 mem == L3_DEFIP_ONLYm || 1261 mem == L3_DEFIP_PAIR_128m || 1262 #ifdef BCM_TOMAHAWK3_SUPPORT 1263 mem == L3_DEFIP_PAIR_LEVEL1m || 1264 #endif 1265 mem == L3_DEFIP_PAIR_128_ONLYm)) { 1266 check_lpm_view = TRUE; 1267 lpm_view = mem; 1268 pair_lpm = (mem == L3_DEFIP_PAIR_128m || 1269 #ifdef BCM_TOMAHAWK3_SUPPORT 1270 mem == L3_DEFIP_PAIR_LEVEL1m || 1271 #endif 1272 mem == L3_DEFIP_PAIR_128_ONLYm) ? 1 : 0; 1273 } 1274 } 1275 #endif /* BCM_TOMAHAWK_SUPPORT */ 1276 1277 #if defined(BCM_TOMAHAWK_SUPPORT) 1278 /* 1279 * Dual mode mems need special handling per index, 1280 * so cannot DMA, except IFP_TCAMm and IFP_TCAM_WIDEm. 1281 */ 1282 if (SOC_IS_TOMAHAWKX(unit)) { 1283 dual_mode = soc_th_mem_is_dual_mode(unit, mem, &base_mem, &pipe_no); 1284 } 1285 #endif /* BCM_TOMAHAWK_SUPPORT */ 1286 1287 #ifdef BCM_TOMAHAWK3_SUPPORT 1288 if (SOC_IS_TOMAHAWK3(unit) && 1289 ((mem >= L2_LEARN_CACHEm) && 1290 (mem <= L2_LEARN_CACHE_PIPE7m))) { 1291 if (soc_property_get(unit, spn_L2XLRN_CLEAR_ON_READ, 0)) { 1292 int ret_sts = 0; 1293 1294 /* For rev A0, this function will display mem contents. 1295 * For other revs, we proceed with the original code below 1296 * this 'if' 1297 */ 1298 if (read_and_clear_learn_cache_entries(unit, mem, copyno, 1299 index, count, flags, field_names, &ret_sts) == 1300 CMD_OK) { 1301 return CMD_OK; 1302 } else { 1303 /* If ret_sts is 0, a problem like mem alloc failed 1304 * occured. If ret_sts is 1, device is not rev A0 - 1305 * proceed with display processing below this 'if-else' 1306 */ 1307 if (ret_sts == 0) { 1308 return CMD_FAIL; 1309 } 1310 } 1311 } 1312 } 1313 #endif /* BCM_TOMAHAWK3_SUPPORT */ 1314 1315 /* 1316 * Attempt to do a DMA read of table for d socmem for all 1317 * memories that don't need additional per index processing 1318 */ 1319 if (soc_feature(unit, soc_feature_dump_socmem_uses_dma) && 1320 (0 == (flags ^ DUMP_TABLE_ALL))) { 1321 do_dma = TRUE; 1322 /* Skip DMA if per index processing is needed */ 1323 if ( 1324 #if defined(BCM_TRIUMPH3_SUPPORT) 1325 tr3_special_case || 1326 #endif 1327 #if defined(BCM_TRIDENT2_SUPPORT) 1328 check_view || 1329 #endif 1330 soc_mem_dma_skip(unit, mem)) { 1331 do_dma = FALSE; 1332 } 1333 #if defined(BCM_TOMAHAWK_SUPPORT) 1334 if (SOC_IS_TOMAHAWKX(unit)) { 1335 if (dual_mode) { 1336 do_dma = FALSE; 1337 } 1338 } 1339 #endif 1340 /* 1341 * Use threshold to determine whether to perform 1342 * DMA or fall back to PIO 1343 */ 1344 if (count < DUMP_TABLE_ALL_DMA_THRESHOLD) { 1345 do_dma = FALSE; 1346 } 1347 1348 if (TRUE == do_dma || IS_IFP_TCAM(unit, base_mem)) { 1349 do_dma = FALSE; 1350 if ((soc_mem_index_valid(unit, mem, index) && 1351 soc_mem_index_valid(unit, mem, index + count - 1)) || 1352 (flags & DUMP_TABLE_PHY_INDEX) || 1353 (SOC_DEFIP_HOLE_RANGE_CHECK(unit, mem, index))) { 1354 1355 mem_buffer = soc_cm_salloc(unit, count * 4 * entry_dw, 1356 "dump socmem dma buffer"); 1357 if (NULL != mem_buffer) { 1358 do_dma = TRUE; 1359 } 1360 } 1361 } 1362 if (TRUE == do_dma) 1363 { 1364 #ifdef BCM_TOMAHAWK_SUPPORT 1365 if (IS_IFP_TCAM(unit, base_mem) && 1366 enable_mem_mode_check && 1367 dual_mode == TRUE) { 1368 rv1 = soc_th_ifp_tcam_range_dma_read(unit, mem, copyno, 1369 index, index + count - 1, 1370 mem_buffer); 1371 } else 1372 #endif 1373 { 1374 rv1 = soc_mem_read_range(unit, mem, copyno, index, 1375 index + count - 1, mem_buffer); 1376 } 1377 if (SOC_E_NONE != rv1) { 1378 /* Fallback to PIO on DMA failure */ 1379 do_dma = FALSE; 1380 } 1381 } 1382 } 1383 1384 for (k = index; k < index + count; k++) { 1385 if (!soc_mem_index_valid(unit, mem, k)) { 1386 if (!(SOC_DEFIP_HOLE_RANGE_CHECK(unit, mem, k))) { 1387 if (!(flags & DUMP_TABLE_PHY_INDEX)) { 1388 continue; 1389 } 1390 } 1391 } 1392 sal_memset(entry, 0x00, SOC_MAX_MEM_WORDS * sizeof(uint32)); 1393 #if defined(BCM_TOMAHAWK_SUPPORT) 1394 /* 1395 * Dual mode mems need to judge whether index is valid or not 1396 */ 1397 if (SOC_IS_TOMAHAWKX(unit)) { 1398 if (enable_mem_mode_check && dual_mode == TRUE) { 1399 if (TRUE != soc_th_dual_tcam_index_valid(unit, mem, k)) { 1400 continue; 1401 } 1402 } 1403 } 1404 #endif 1405 #if defined(BCM_TRIUMPH3_SUPPORT) 1406 if (tr3_special_case) { 1407 if (k >= 16) { 1408 break; 1409 } 1410 i = soc_mem_read(unit, mem, copyno, k, entry); 1411 } else 1412 #endif 1413 { 1414 #ifdef BCM_TRIDENT2_SUPPORT 1415 if (check_view) { 1416 if (SOC_IS_TRIDENT2(unit) || SOC_IS_TRIDENT2PLUS(unit)) { 1417 view = _soc_trident2_alpm_bkt_view_get(unit, k); 1418 } 1419 #if defined(ALPM_ENABLE) 1420 #if defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_APACHE_SUPPORT) 1421 else { 1422 view = soc_alpm_cmn_bkt_view_get(unit, k); 1423 } 1424 #endif 1425 #endif 1426 if (!(view == INVALIDm || mem == view)) { 1427 continue; 1428 } 1429 } 1430 #endif /* BCM_TRIDENT2_SUPPORT */ 1431 1432 #ifdef BCM_TOMAHAWK_SUPPORT 1433 if (check_lpm_view) { 1434 #ifdef BCM_TOMAHAWK3_SUPPORT 1435 if (SOC_IS_TOMAHAWK3(unit)) { 1436 lpm_view = _soc_th3_lpm_view_get(unit, k, pair_lpm); 1437 } else 1438 #endif 1439 if (SOC_IS_TOMAHAWKX(unit)) { 1440 lpm_view = _soc_th_lpm_view_get(unit, k, pair_lpm); 1441 } 1442 if (mem != lpm_view) { 1443 continue; 1444 } 1445 } 1446 #endif /* BCM_TOMAHAWK_SUPPORT */ 1447 if (flags & DUMP_TABLE_PHY_INDEX) { 1448 read_flags = SOC_MEM_DONT_MAP_INDEX; 1449 } 1450 if (flags & DUMP_TABLE_PIPE_X) { 1451 i = soc_mem_pipe_select_read(unit, read_flags, mem, copyno, 1452 _SOC_MEM_ADDR_ACC_TYPE_PIPE_X, k, 1453 entry); 1454 } else if (flags & DUMP_TABLE_PIPE_Y) { 1455 i = soc_mem_pipe_select_read(unit, read_flags, mem, copyno, 1456 _SOC_MEM_ADDR_ACC_TYPE_PIPE_Y, k, 1457 entry); 1458 } else if (flags & DUMP_TABLE_PIPE_0) { 1459 i = soc_mem_pipe_select_read(unit, read_flags, mem, copyno, 1460 _SOC_MEM_ADDR_ACC_TYPE_PIPE_0, k, 1461 entry); 1462 } else if (flags & DUMP_TABLE_PIPE_1) { 1463 i = soc_mem_pipe_select_read(unit, read_flags, mem, copyno, 1464 _SOC_MEM_ADDR_ACC_TYPE_PIPE_1, k, 1465 entry); 1466 } else if (flags & DUMP_TABLE_PIPE_2) { 1467 i = soc_mem_pipe_select_read(unit, read_flags, mem, copyno, 1468 _SOC_MEM_ADDR_ACC_TYPE_PIPE_2, k, 1469 entry); 1470 } else if (flags & DUMP_TABLE_PIPE_3) { 1471 i = soc_mem_pipe_select_read(unit, read_flags, mem, copyno, 1472 _SOC_MEM_ADDR_ACC_TYPE_PIPE_3, k, 1473 entry); 1474 } else if (flags & DUMP_TABLE_PIPE_4) { 1475 i = soc_mem_pipe_select_read(unit, read_flags, mem, copyno, 1476 _SOC_MEM_ADDR_ACC_TYPE_PIPE_4, k, 1477 entry); 1478 } else if (flags & DUMP_TABLE_PIPE_5) { 1479 i = soc_mem_pipe_select_read(unit, read_flags, mem, copyno, 1480 _SOC_MEM_ADDR_ACC_TYPE_PIPE_5, k, 1481 entry); 1482 } else if (flags & DUMP_TABLE_PIPE_6) { 1483 i = soc_mem_pipe_select_read(unit, read_flags, mem, copyno, 1484 _SOC_MEM_ADDR_ACC_TYPE_PIPE_6, k, 1485 entry); 1486 } else if (flags & DUMP_TABLE_PIPE_7) { 1487 i = soc_mem_pipe_select_read(unit, read_flags, mem, copyno, 1488 _SOC_MEM_ADDR_ACC_TYPE_PIPE_7, k, 1489 entry); 1490 } else if (flags & DUMP_TABLE_NO_CACHE) { 1491 i = soc_mem_read_no_cache(unit, read_flags, mem, 0, copyno, k, entry); 1492 } else { 1493 if (soc_feature(unit, soc_feature_dump_socmem_uses_dma) && 1494 do_dma) { 1495 sal_memcpy(entry, 1496 (uint32*)&mem_buffer[entry_dw * (k - index)], 1497 4 * entry_dw); 1498 i = SOC_E_NONE; 1499 } else { 1500 i = soc_mem_read_physical_index(unit, read_flags, mem, 1501 copyno, k, entry); 1502 } 1503 } 1504 } 1505 1506 if (i < 0) { 1507 cli_out("Read ERROR: table %s.%s[%d]: %s\n", 1508 SOC_MEM_UFNAME(unit, mem), 1509 SOC_BLOCK_NAME(unit, copyno), k, soc_errmsg(i)); 1510 goto done; 1511 } 1512 1513 if (!(flags & DUMP_TABLE_ALL)) { 1514 int validf; 1515 1516 validf = -1; 1517 #if defined(BCM_TRX_SUPPORT) 1518 if (soc_mem_field_length(unit, mem, ACTIVEf) > 0) { 1519 validf = ACTIVEf; 1520 if (soc_mem_field32_get(unit, mem, entry, validf) == 0) { 1521 continue; 1522 } 1523 } 1524 #endif /* BCM_TRX_SUPPORT */ 1525 1526 #if defined(BCM_TRIUMPH_SUPPORT) 1527 if (mem == EXT_L2_ENTRY_TCAMm) { 1528 validf = FREEf; 1529 if (soc_mem_field32_get(unit, mem, entry, validf) == 1) { 1530 continue; 1531 } 1532 } 1533 #endif /* BCM_TRIUMPH_SUPPORT */ 1534 1535 if (soc_mem_field_length(unit, mem, VALIDf) > 0) { 1536 validf = VALIDf; 1537 if (soc_mem_field32_get(unit, mem, entry, validf) == 0) { 1538 continue; 1539 } 1540 } 1541 #ifdef BCM_TOMAHAWK3_SUPPORT 1542 base_valid_count = 0; 1543 if (soc_mem_field_length(unit, mem, BASE_VALIDf) > 0) { 1544 validf = BASE_VALIDf; 1545 if (soc_mem_field32_get(unit, mem, entry, validf) == 0) { 1546 continue; 1547 } 1548 } 1549 if (soc_mem_field_length(unit, mem, BASE_VALID_0f) > 0) { 1550 validf = BASE_VALID_0f; 1551 if (soc_mem_field32_get(unit, mem, entry, validf) == 0) { 1552 base_valid_count++; 1553 } 1554 } 1555 if (soc_mem_field_length(unit, mem, BASE_VALID_1f) > 0) { 1556 validf = BASE_VALID_1f; 1557 if (soc_mem_field32_get(unit, mem, entry, validf) == 0) { 1558 base_valid_count++; 1559 } 1560 } 1561 if (soc_mem_field_length(unit, mem, BASE_VALID_2f) > 0) { 1562 validf = BASE_VALID_2f; 1563 if (soc_mem_field32_get(unit, mem, entry, validf) == 0) { 1564 base_valid_count++; 1565 } 1566 } 1567 if (soc_mem_field_length(unit, mem, BASE_VALID_3f) > 0) { 1568 validf = BASE_VALID_3f; 1569 if (soc_mem_field32_get(unit, mem, entry, validf) == 0) { 1570 base_valid_count++; 1571 } 1572 } 1573 if (base_valid_count == 4) { 1574 continue; 1575 } 1576 #endif 1577 #ifdef BCM_TRIDENT2_SUPPORT 1578 #ifdef BCM_TOMAHAWK3_SUPPORT 1579 if (SOC_MEM_IS_VALID(unit, L3_DEFIP_LEVEL1m) && 1580 soc_mem_field_length(unit, mem, LWR_VALID0f) > 0 && 1581 soc_mem_field_length(unit, mem, LWR_VALID1f) > 0 && 1582 soc_mem_field_length(unit, mem, UPR_VALID0f) > 0 && 1583 soc_mem_field_length(unit, mem, UPR_VALID1f) > 0) { 1584 if (soc_mem_field32_get(unit, mem, entry, LWR_VALID0f) == 0 && 1585 soc_mem_field32_get(unit, mem, entry, LWR_VALID1f) == 0 && 1586 soc_mem_field32_get(unit, mem, entry, UPR_VALID0f) == 0 && 1587 soc_mem_field32_get(unit, mem, entry, UPR_VALID1f) == 0) { 1588 continue; 1589 } 1590 } else 1591 #endif 1592 1593 if (soc_mem_field_length(unit, mem, VALID0_LWRf) > 0 && 1594 soc_mem_field_length(unit, mem, VALID1_LWRf) > 0 && 1595 soc_mem_field_length(unit, mem, VALID0_UPRf) > 0 && 1596 soc_mem_field_length(unit, mem, VALID1_UPRf) > 0) { 1597 if (soc_mem_field32_get(unit, mem, entry, VALID0_LWRf) == 0 && 1598 soc_mem_field32_get(unit, mem, entry, VALID1_LWRf) == 0 && 1599 soc_mem_field32_get(unit, mem, entry, VALID0_UPRf) == 0 && 1600 soc_mem_field32_get(unit, mem, entry, VALID1_UPRf) == 0) { 1601 continue; 1602 } 1603 } 1604 #endif 1605 #ifdef BCM_TOMAHAWK3_SUPPORT 1606 if (SOC_IS_TOMAHAWK3(unit)) { 1607 if (soc_mem_field_length(unit, mem, BASE_VALIDf) > 0) { 1608 if ((soc_mem_field32_get(unit, mem, entry, BASE_VALIDf) != 1) || 1609 (soc_mem_field32_get(unit, mem, entry, KEY_TYPEf) != 0)) { 1610 continue; 1611 } 1612 } 1613 /* Double tables have 2 base valids, quad tables 4.This check covers both */ 1614 if (soc_mem_field_length(unit, mem, BASE_VALID_0f) > 0 && 1615 soc_mem_field_length(unit, mem, BASE_VALID_1f) > 0) { 1616 if (soc_mem_field_length(unit, mem, BASE_VALID_2f) > 0 && 1617 soc_mem_field_length(unit, mem, BASE_VALID_3f) > 0) { 1618 if (mem == L3_ENTRY_QUADm) { 1619 if (soc_mem_field32_get(unit, mem, entry, BASE_VALID_0f) != 1 || 1620 (soc_mem_field32_get(unit, mem, entry, BASE_VALID_1f) != 2) || 1621 (soc_mem_field32_get(unit, mem, entry, BASE_VALID_2f) != 2) || 1622 (soc_mem_field32_get(unit, mem, entry, BASE_VALID_3f) != 7)) { 1623 continue; 1624 } 1625 } 1626 } else { 1627 if (mem == L3_ENTRY_DOUBLEm) { 1628 if (soc_mem_field32_get(unit, mem, entry, KEY_TYPEf) == 2) { 1629 if ((soc_mem_field32_get(unit, mem, entry, BASE_VALID_0f) != 1) || 1630 (soc_mem_field32_get(unit, mem, entry, BASE_VALID_1f) != 2)) { 1631 continue; 1632 } 1633 } else if (soc_mem_field32_get(unit, mem, entry, KEY_TYPEf) == 4) { 1634 if ((soc_mem_field32_get(unit, mem, entry, BASE_VALID_0f) != 1) || 1635 (soc_mem_field32_get(unit, mem, entry, BASE_VALID_1f) != 7)) { 1636 continue; 1637 } 1638 } else { 1639 continue; 1640 } 1641 1642 } 1643 } 1644 } 1645 } 1646 #endif 1647 1648 #ifdef BCM_TRIDENT3_SUPPORT 1649 if (SOC_IS_TRIDENT3X(unit)) { 1650 if (soc_mem_field_length(unit, mem, BASE_VALIDf) > 0) { 1651 switch (mem) { 1652 case FT_KEY_SINGLEm: 1653 if ((soc_mem_field32_get(unit, mem, entry, BASE_VALIDf) != 1) && 1654 (soc_mem_field32_get(unit, mem, entry, BASE_VALIDf) != 2)) { 1655 continue; 1656 } 1657 break; 1658 default: 1659 if (soc_mem_field32_get(unit, mem, entry, BASE_VALIDf) != 1 ) { 1660 continue; 1661 } 1662 break; 1663 } 1664 } 1665 /* Double tables have 2 base valids, quad tables 4.This check covers both */ 1666 if (soc_mem_field_length(unit, mem, BASE_VALID_0f) > 0 && 1667 soc_mem_field_length(unit, mem, BASE_VALID_1f) > 0) { 1668 if (soc_mem_field_length(unit, mem, BASE_VALID_2f) > 0 && 1669 soc_mem_field_length(unit, mem, BASE_VALID_3f) > 0) { 1670 if ((mem == L3_ENTRY_QUADm) && 1671 (soc_mem_field32_get(unit, mem, entry, KEY_TYPEf) == 2)) { 1672 /* V6 Extended entry*/ 1673 if ((soc_mem_field32_get(unit, mem, entry, BASE_VALID_0f) != 3) || 1674 (soc_mem_field32_get(unit, mem, entry, BASE_VALID_1f) != 4) || 1675 (soc_mem_field32_get(unit, mem, entry, BASE_VALID_2f) != 7) || 1676 (soc_mem_field32_get(unit, mem, entry, BASE_VALID_3f) != 7)) { 1677 continue; 1678 } 1679 } else if (soc_mem_field32_get(unit, mem, entry, BASE_VALID_0f) != 5 || 1680 (soc_mem_field32_get(unit, mem, entry, BASE_VALID_1f) != 6 && 1681 soc_mem_field32_get(unit, mem, entry, BASE_VALID_1f) != 7) || 1682 (soc_mem_field32_get(unit, mem, entry, BASE_VALID_2f) != 6 && 1683 soc_mem_field32_get(unit, mem, entry, BASE_VALID_2f) != 7) || 1684 (soc_mem_field32_get(unit, mem, entry, BASE_VALID_3f) != 6 && 1685 soc_mem_field32_get(unit, mem, entry, BASE_VALID_3f) != 7)) { 1686 continue; 1687 } 1688 } else { 1689 switch (mem) { 1690 case FT_KEY_DOUBLEm: 1691 if ((soc_mem_field32_get(unit, mem, entry, BASE_VALID_0f) != 1) || 1692 (soc_mem_field32_get(unit, mem, entry, BASE_VALID_1f) != 2)) { 1693 continue; 1694 } 1695 break; 1696 case L3_ENTRY_DOUBLEm: 1697 /* V4 extended view */ 1698 if ((soc_mem_field32_get(unit, mem, entry, DATA_TYPEf) == 1)) { 1699 if ((soc_mem_field32_get(unit, mem, entry, BASE_VALID_0f) != 1) || 1700 (soc_mem_field32_get(unit, mem, entry, BASE_VALID_1f) != 7)) { 1701 continue; 1702 } 1703 } else if ((soc_mem_field32_get(unit, mem, entry, BASE_VALID_0f) != 3) || 1704 (soc_mem_field32_get(unit, mem, entry, BASE_VALID_1f) != 4) || 1705 (soc_mem_field32_get(unit, mem, entry, DATA_TYPEf) == 0)) { 1706 continue; 1707 } 1708 break; 1709 default: 1710 if (soc_mem_field32_get(unit, mem, entry, BASE_VALID_0f) != 3 || 1711 (soc_mem_field32_get(unit, mem, entry, BASE_VALID_1f) != 4 && 1712 soc_mem_field32_get(unit, mem, entry, BASE_VALID_1f) != 7)) { 1713 continue; 1714 } 1715 break; 1716 } 1717 } 1718 } 1719 } 1720 #endif 1721 #ifdef BCM_FIREBOLT_SUPPORT 1722 if (soc_mem_field_length(unit, mem, VALID0f) > 0) { 1723 validf = VALID0f; 1724 if (soc_mem_field32_get(unit, mem, entry, validf) == 0) { 1725 if (soc_mem_field_length(unit, mem, VALID1f) > 0) { 1726 validf = VALID1f; 1727 if (soc_mem_field32_get(unit, mem, entry, validf) == 0) { 1728 continue; 1729 } 1730 } 1731 } 1732 } 1733 1734 if (soc_mem_field_length(unit, mem, VALID_0f) > 0) { 1735 validf = VALID_0f; 1736 if (soc_mem_field32_get(unit, mem, entry, validf) == 0) { 1737 continue; 1738 } 1739 } 1740 1741 if (soc_mem_field_length(unit, mem, VALID_1f) > 0) { 1742 validf = VALID_1f; 1743 if (soc_mem_field32_get(unit, mem, entry, validf) == 0) { 1744 continue; 1745 } 1746 } 1747 1748 if (soc_mem_field_length(unit, mem, VALID_2f) > 0) { 1749 validf = VALID_2f; 1750 if (soc_mem_field32_get(unit, mem, entry, validf) == 0) { 1751 continue; 1752 } 1753 } 1754 1755 if (soc_mem_field_length(unit, mem, VALID_3f) > 0) { 1756 validf = VALID_3f; 1757 if (soc_mem_field32_get(unit, mem, entry, validf) == 0) { 1758 continue; 1759 } 1760 } 1761 #endif /* BCM_FIREBOLT_SUPPORT */ 1762 } 1763 1764 if (flags & DUMP_TABLE_HEX) { 1765 for (i = 0; i < entry_dw; i++) { 1766 cli_out("%08x\n", entry[i]); 1767 } 1768 } else if (flags & DUMP_TABLE_CHANGED) { 1769 sal_sprintf(lineprefix, "%s.%s[%d]: ", 1770 SOC_MEM_UFNAME(unit, mem), 1771 SOC_BLOCK_NAME(unit, copyno), 1772 k); 1773 if (field_names == NULL) { 1774 soc_mem_entry_dump_if_changed(unit, mem, entry, lineprefix); 1775 } else { 1776 soc_mem_entry_dump_if_changed_fields(unit, mem, entry, 1777 lineprefix, field_names); 1778 } 1779 } else { 1780 cli_out("%s.%s[%d]: ", 1781 SOC_MEM_UFNAME(unit, mem), 1782 SOC_BLOCK_NAME(unit, copyno), 1783 k); 1784 1785 if (flags & DUMP_TABLE_RAW) { 1786 for (i = 0; i < entry_dw; i++) { 1787 cli_out("0x%08x ", entry[i]); 1788 } 1789 cli_out("\n"); 1790 } else { 1791 if (field_names == NULL) { 1792 soc_mem_entry_dump(unit, mem, entry, BSL_LSS_CLI); 1793 } else { 1794 soc_mem_entry_dump_fields(unit, mem, entry,field_names); 1795 } 1796 } 1797 } 1798 #ifdef ALPM_ENABLE 1799 #if defined(BCM_TOMAHAWK_SUPPORT) 1800 if (soc_feature(unit, soc_feature_alpm2) && mem == L3_DEFIP_ALPM_RAWm) { 1801 int8 fmt = 0; 1802 char *fmt_pfx[] = { 1803 " NA:", 1804 " V4:", 1805 " V6_64:", 1806 " V6_128:", 1807 " V4_1:", 1808 " V6_64_1:", 1809 " V6_128:" 1810 }; 1811 1812 #if defined(BCM_TRIDENT3_SUPPORT) 1813 fmt = _soc_trident3_alpm2_bnk_fmt_get(unit, k); 1814 #endif 1815 th_alpm_table_ent_dump(unit, 1, mem, entry, copyno, k, fmt, 1816 -1, flags, fmt_pfx[fmt]); 1817 } 1818 #endif 1819 #endif 1820 /* Yield CPU so other processes are not starved */ 1821 if (((k - index + 1) % DUMP_TABLE_ITER_BEFORE_YIELD ) == 0) { 1822 sal_thread_yield(); 1823 } 1824 } 1825 1826 rv = CMD_OK; 1827 1828 done: 1829 if (NULL != mem_buffer) { 1830 soc_cm_sfree(unit, mem_buffer); 1831 mem_buffer = NULL; 1832 } 1833 return rv; 1834 } 1835 #ifndef BCM_SW_STATE_DUMP_DISABLE 1836 STATIC cmd_result_t 1837 do_dump_sw(int unit, args_t *a) 1838 { 1839 char *c; 1840 int dump_all = FALSE; 1841 1842 if ((c = ARG_GET(a)) == NULL) { 1843 return CMD_USAGE; 1844 } 1845 1846 if (!sal_strcasecmp(c, "all")) { 1847 dump_all = TRUE; 1848 } 1849 #ifndef BCM_SW_STATE_DUMP_DISABLE 1850 if (dump_all || !sal_strcasecmp(c, "cosq")) { 1851 _bcm_cosq_sw_dump(unit); 1852 } 1853 if (dump_all || !sal_strcasecmp(c, "mcast")) { 1854 _bcm_mcast_sw_dump(unit); 1855 } 1856 #endif /* BCM_SW_STATE_DUMP_DISABLE */ 1857 #ifdef BCM_WARM_BOOT_SUPPORT_SW_DUMP 1858 if (dump_all || !sal_strcasecmp(c, "stack")) { 1859 _bcm_stk_sw_dump(unit); 1860 } 1861 if (dump_all || !sal_strcasecmp(c, "time")) { 1862 _bcm_time_sw_dump(unit); 1863 } 1864 if (dump_all || !sal_strcasecmp(c, "mirror")) { 1865 _bcm_mirror_sw_dump(unit); 1866 } 1867 if (dump_all || !sal_strcasecmp(c, "stat")) { 1868 _bcm_stat_sw_dump(unit); 1869 } 1870 if (dump_all || !sal_strcasecmp(c, "qos")) { 1871 _bcm_esw_qos_sw_dump(unit); 1872 } 1873 if (dump_all || !sal_strcasecmp(c, "fcoe")) { 1874 _bcm_esw_fcoe_sw_dump(unit); 1875 } 1876 if (dump_all || !sal_strcasecmp(c, "ecn")) { 1877 _bcm_esw_ecn_sw_dump(unit); 1878 } 1879 #if defined(INCLUDE_PSTATS) 1880 if (dump_all || !sal_strcasecmp(c, "pstats")) { 1881 _bcm_esw_pstats_sw_dump(unit); 1882 } 1883 #endif /* INCLUDE_PSTATS */ 1884 #endif /* BCM_WARM_BOOT_SUPPORT_SW_DUMP */ 1885 #ifdef BCM_FIELD_SUPPORT 1886 if (dump_all || !sal_strcasecmp(c, "fp")) { 1887 _bcm_esw_field_udf_show(unit, "FP UDF"); 1888 } 1889 if (dump_all || !sal_strcasecmp(c, "ifp") || !sal_strcasecmp(c, "fp")) { 1890 _bcm_esw_field_range_show(unit, "IFP RANGE", _BCM_FIELD_STAGE_INGRESS); 1891 _bcm_esw_field_show(unit, "IFP ", _BCM_FIELD_STAGE_INGRESS); 1892 } 1893 if (dump_all || !sal_strcasecmp(c, "efp") || !sal_strcasecmp(c, "fp")) { 1894 _bcm_esw_field_show(unit, "EFP ", _BCM_FIELD_STAGE_EGRESS); 1895 } 1896 if (dump_all || !sal_strcasecmp(c, "vfp") || !sal_strcasecmp(c, "fp")) { 1897 _bcm_esw_field_show(unit, "VFP ", _BCM_FIELD_STAGE_LOOKUP); 1898 } 1899 #if defined(BCM_TOMAHAWK_SUPPORT) 1900 if (dump_all || !sal_strcasecmp(c, "fp_class") || !sal_strcasecmp(c, "fp")) { 1901 _bcm_esw_field_show(unit, "CLASS ", _BCM_FIELD_STAGE_CLASS); 1902 } 1903 if (dump_all || !sal_strcasecmp(c, "fp_em") || !sal_strcasecmp(c, "fp")) { 1904 _bcm_esw_field_show(unit, "EXACT_MATCH ", _BCM_FIELD_STAGE_EXACTMATCH); 1905 } 1906 #endif /* BCM_TOMAHAWK_SUPPORT */ 1907 #endif /* BCM_FIELD_SUPPORT */ 1908 1909 if (dump_all || !sal_strcasecmp(c, "stg")) { 1910 _bcm_stg_sw_dump(unit); 1911 } 1912 if (dump_all || !sal_strcasecmp(c, "link")) { 1913 _bcm_link_sw_dump(unit); 1914 } 1915 if (dump_all || !sal_strcasecmp(c, "port")) { 1916 _bcm_port_sw_dump(unit); 1917 } 1918 if (dump_all || !sal_strcasecmp(c, "trunk")) { 1919 _bcm_trunk_sw_dump(unit); 1920 } 1921 #ifdef INCLUDE_L3 1922 #if defined(BCM_FIREBOLT_SUPPORT) 1923 if (dump_all || !sal_strcasecmp(c, "l3")) { 1924 _bcm_l3_sw_dump(unit); 1925 } 1926 #endif 1927 if (dump_all || !sal_strcasecmp(c, "niv")) { 1928 _bcm_niv_sw_dump(unit); 1929 } 1930 #if defined(BCM_TRIUMPH2_SUPPORT) 1931 if (soc_feature(unit, soc_feature_failover)) { 1932 if (dump_all || !sal_strcasecmp(c, "failover")) { 1933 _bcm_tr2_failover_sw_dump(unit); 1934 } 1935 } 1936 #endif /* BCM_TRIUMPH2_SUPPORT */ 1937 #if defined(BCM_TRIDENT_SUPPORT) 1938 if (soc_feature(unit, soc_feature_trill)) { 1939 if (dump_all || !sal_strcasecmp(c, "trill")) { 1940 _bcm_td_trill_sw_dump(unit); 1941 } 1942 } 1943 #endif /* BCM_TRIDENT_SUPPORT */ 1944 #if defined(BCM_TRIDENT2_SUPPORT) || defined(BCM_GREYHOUND2_SUPPORT) 1945 if (soc_feature(unit, soc_feature_vxlan) || 1946 soc_feature(unit, soc_feature_vxlan_lite)) { 1947 if (dump_all || !sal_strcasecmp(c, "vxlan")) { 1948 _bcm_vxlan_sw_dump(unit); 1949 } 1950 } 1951 #endif /* BCM_TRIDENT2_SUPPORT || BCM_GREYHOUND2_SUPPORT */ 1952 1953 if (dump_all || !sal_strcasecmp(c, "extender")) { 1954 _bcm_extender_sw_dump(unit); 1955 } 1956 #endif /* INCLUDE_L3 */ 1957 if (dump_all || !sal_strcasecmp(c, "l2")) { 1958 _bcm_l2_sw_dump(unit); 1959 } 1960 1961 if (dump_all || !sal_strcasecmp(c, "vlan")) { 1962 _bcm_vlan_sw_dump(unit); 1963 } 1964 #if defined(BCM_TRIUMPH_SUPPORT) && defined(BCM_MPLS_SUPPORT) && \ 1965 defined(INCLUDE_L3) 1966 if (dump_all || !sal_strcasecmp(c, "mpls")) { 1967 _bcm_mpls_sw_dump(unit); 1968 } 1969 #endif 1970 1971 if (soc_feature(unit, soc_feature_flex_port)) { 1972 if (dump_all || !sal_strcasecmp(c, "flexport")) { 1973 char *pipe_str = NULL; 1974 char *speed_str = NULL; 1975 int pipe=0, speed_id=0; 1976 1977 if ((pipe_str = ARG_GET(a)) != NULL) { 1978 if (isint(pipe_str)) { 1979 pipe = parse_integer(pipe_str); 1980 } 1981 if ((speed_str = ARG_GET(a)) != NULL) { 1982 if (isint(speed_str)) { 1983 speed_id = parse_integer(speed_str); 1984 } 1985 _bcm_esw_flexport_sw_pipe_speed_group_dump(unit, 1986 pipe, 1987 speed_id); 1988 } 1989 } else { 1990 _bcm_esw_flexport_sw_dump(unit); 1991 } 1992 } 1993 } 1994 1995 #if defined(INCLUDE_FLOWTRACKER) 1996 if (soc_feature(unit, soc_feature_uc_flowtracker_learn) || 1997 soc_feature(unit, soc_feature_uc_flowtracker_export) || 1998 soc_feature(unit, soc_feature_mv2_style_flowtracker)) { 1999 if (dump_all || !sal_strcasecmp(c, "flowtracker")) { 2000 _bcm_esw_flowtracker_sw_dump(unit); 2001 } 2002 } 2003 #endif /* INCLUDE_FLOWTRACKER */ 2004 2005 #if defined(BCM_FLOWTRACKER_SUPPORT) 2006 if (soc_feature(unit, soc_feature_flex_flowtracker_ver_1)) { 2007 if (dump_all || !sal_strcasecmp(c, "flowtracker")) { 2008 bcmi_esw_flowtracker_sw_dump(unit); 2009 } 2010 } 2011 #endif /* INCLUDE_FLOWTRACKER */ 2012 #if defined(BCM_KATANA2_SUPPORT) 2013 if (soc_feature(unit,soc_feature_flex_stat_compaction_support)) { 2014 if (dump_all || !sal_strcasecmp(c, "ctrpoolinfo")) { 2015 _bcm_stat_flexctr_pool_info_sw_dump(unit); 2016 } 2017 } 2018 #endif 2019 2020 #if defined(BCM_COLLECTOR_SUPPORT) 2021 if (soc_feature(unit, soc_feature_collector)) { 2022 if (dump_all || !sal_strcasecmp(c, "collector")) { 2023 _bcm_esw_collector_sw_dump(unit); 2024 } 2025 } 2026 #endif /* BCM_COLLECTOR_SUPPORT */ 2027 2028 #if defined(INCLUDE_TELEMETRY) 2029 if (soc_feature(unit, soc_feature_telemetry)) { 2030 if (dump_all || !sal_strcasecmp(c, "telemetry")) { 2031 _bcm_esw_telemetry_sw_dump(unit); 2032 } 2033 } 2034 #endif /* INCLUDE_TELEMETRY */ 2035 2036 #ifdef BCM_WARM_BOOT_SUPPORT_SW_DUMP 2037 #ifdef INCLUDE_L3 2038 #if defined(BCM_FIREBOLT_SUPPORT) 2039 if (soc_feature(unit, soc_feature_ip_mcast)) { 2040 if (dump_all || !sal_strcasecmp(c, "ipmc")) { 2041 _bcm_ipmc_sw_dump(unit); 2042 } 2043 } 2044 #endif /* BCM_FIREBOLT_SUPPORT */ 2045 #if defined(BCM_TRIUMPH_SUPPORT) 2046 if (dump_all || !sal_strcasecmp(c, "extlpm")) { 2047 _bcm_tr_ext_lpm_sw_dump(unit); 2048 } 2049 #endif /* BCM_TRIUMPH_SUPPORT */ 2050 #if defined(BCM_TRIUMPH2_SUPPORT) || defined(BCM_ENDURO_SUPPORT) 2051 #endif /* BCM_TRIUMPH2_SUPPORT || BCM_ENDURO_SUPPORT */ 2052 #endif /* INCLUDE_L3 */ 2053 if (dump_all || !sal_strcasecmp(c, "multicast")) { 2054 _bcm_multicast_sw_dump(unit); 2055 } 2056 2057 #if defined(BCM_TRX_SUPPORT) 2058 if (dump_all || !sal_strcasecmp(c, "common")) { 2059 _bcm_common_sw_dump(unit); 2060 } 2061 #ifdef INCLUDE_L3 2062 #if defined(BCM_KATANA2_SUPPORT) 2063 if (soc_feature(unit, soc_feature_linkphy_coe) || 2064 soc_feature(unit, soc_feature_subtag_coe)) { 2065 if (dump_all || !sal_strcasecmp(c, "subport")) { 2066 _bcm_kt2_subport_sw_dump(unit); 2067 } 2068 } 2069 #endif /* BCM_KATANA2_SUPPORT */ 2070 #if defined(BCM_TRIUMPH2_SUPPORT) 2071 if (soc_feature(unit, soc_feature_subport_enhanced)) { 2072 if (dump_all || !sal_strcasecmp(c, "subport")) { 2073 _bcm_tr2_subport_sw_dump(unit); 2074 } 2075 } else 2076 #endif /* BCM_TRIUMPH2_SUPPORT */ 2077 { 2078 if (soc_feature(unit, soc_feature_subport)) { 2079 if (dump_all || !sal_strcasecmp(c, "subport")) { 2080 _bcm_tr_subport_sw_dump(unit); 2081 } 2082 } 2083 } 2084 #endif /* INCLUDE_L3 */ 2085 #endif /* BCM_TRX_SUPPORT */ 2086 2087 #ifdef BCM_IPFIX_SUPPORT 2088 /* 2089 * Routine to dump ipfix s/w data structure info. 2090 */ 2091 if (dump_all || !sal_strcasecmp(c, "ipfix")) { 2092 _bcm_ipfix_sw_dump(unit); 2093 } 2094 #endif /* !BCM_IPFIX_SUPPORT */ 2095 #if defined(INCLUDE_BFD) 2096 if (soc_feature(unit, soc_feature_bfd)) { 2097 /* 2098 * Routine to dump bfd end point info. 2099 */ 2100 if (dump_all || !sal_strcasecmp(c, "bfd")) { 2101 _bcm_bfd_sw_dump(unit); 2102 } 2103 } 2104 #endif 2105 #if defined(BCM_TRIDENT2PLUS_SUPPORT) 2106 if (soc_feature(unit, soc_feature_fp_based_oam)) 2107 { 2108 /* 2109 * Routine to dump oam s/w data structure info. 2110 */ 2111 if (dump_all || !sal_strcasecmp(c, "oam")) { 2112 _bcm_oam_sw_dump(unit); 2113 } 2114 } 2115 #endif 2116 #if defined(BCM_TRIUMPH2_SUPPORT) || defined(BCM_APOLLO_SUPPORT) \ 2117 || defined(BCM_VALKYRIE2_SUPPORT) 2118 if (soc_feature(unit, soc_feature_oam)) { 2119 /* 2120 * Routine to dump oam s/w data structure info. 2121 */ 2122 if (dump_all || !sal_strcasecmp(c, "oam")) { 2123 _bcm_oam_sw_dump(unit); 2124 } 2125 } 2126 #endif 2127 #if defined(BCM_TRIUMPH3_SUPPORT) && defined(INCLUDE_REGEX) 2128 if (soc_feature(unit, soc_feature_regex)) { 2129 if (dump_all || !sal_strcasecmp(c, "regex")) { 2130 _bcm_regex_sw_dump(unit); 2131 } 2132 } 2133 #endif /* !BCM_IPFIX_SUPPORT */ 2134 #if defined(BCM_TRIUMPH3_SUPPORT) && defined(INCLUDE_L3) 2135 if (soc_feature(unit, soc_feature_l2gre)) { 2136 if (dump_all || !sal_strcasecmp(c, "l2gre")) { 2137 _bcm_l2gre_sw_dump(unit); 2138 } 2139 } 2140 #endif /* BCM_TRIUMPH3_SUPPORT && INCLUDE_L3 */ 2141 2142 #if defined(BCM_TRIDENT3_SUPPORT) && defined(INCLUDE_L3) 2143 if (soc_feature(unit, soc_feature_flex_flow)) { 2144 if (dump_all || !sal_strcasecmp(c, "flow")) { 2145 bcmi_esw_flow_sw_dump(unit); 2146 } 2147 } 2148 #endif /*BCM_TRIDENT3_SUPPORT && INCLUDE_L3 */ 2149 #endif /* BCM_WARM_BOOT_SUPPORT_SW_DUMP */ 2150 2151 if (dump_all || !sal_strcasecmp(c, "udf")) { 2152 int idx = -1, copyno; 2153 soc_mem_t mem = INVALIDm; 2154 char *mem_name = NULL; 2155 char *idx_str = NULL; 2156 2157 if ((mem_name = ARG_GET(a)) != NULL) { 2158 if (parse_memory_name(unit, &mem, mem_name, ©no, 0) < 0) { 2159 cli_out("ERROR: unknown table \"%s\"\n", mem_name); 2160 goto done; 2161 } 2162 2163 if (!SOC_MEM_IS_VALID(unit, mem)) { 2164 cli_out("Error: Memory %s not valid for chip %s.\n", 2165 SOC_MEM_UFNAME(unit, mem), SOC_UNIT_NAME(unit)); 2166 goto done; 2167 } 2168 2169 if ((idx_str = ARG_GET(a)) != NULL) { 2170 idx = parse_memory_index(unit, mem, idx_str); 2171 if (idx == -1) { 2172 goto done; 2173 } 2174 } else { 2175 cli_out("ERROR: Memory index not mentioned\n"); 2176 goto done; 2177 } 2178 2179 _bcm_esw_udf_sw_mem_dump(unit, mem, idx); 2180 goto done; 2181 } 2182 2183 _bcm_esw_udf_sw_dump(unit); 2184 } 2185 2186 done: 2187 return CMD_OK; 2188 } 2189 #endif /* BCM_SW_STATE_DUMP_DISABLE */ 2190 2191 STATIC INLINE int 2192 bypass_dump_table(int unit, soc_mem_t mem, uint32 copyno, int flags) 2193 { 2194 if (!(flags & DUMP_TABLE_EXT)) { 2195 /* 2196 * Bypass dumping MMU memories. 2197 */ 2198 if (SOC_BLOCK_TYPE(unit, copyno) == SOC_BLK_MMU) { 2199 return TRUE; 2200 } 2201 } 2202 2203 if (flags & DUMP_TABLE_SIMPLIFIED) { 2204 /* 2205 * Bypass dumping these memories while in simplified mode. 2206 */ 2207 switch (mem) { 2208 case SER_MEMORYm: 2209 case CLPORT_WC_UCMEM_DATAm: 2210 case XLPORT_WC_UCMEM_DATAm: 2211 return TRUE; 2212 default: 2213 break; 2214 } 2215 } 2216 2217 #ifdef BCM_TOMAHAWK3_SUPPORT 2218 if (SOC_IS_TOMAHAWK3(unit)) { 2219 if (mem == CDPORT_TSC_UCMEM_DATAm) { 2220 return TRUE; 2221 } 2222 } 2223 #endif 2224 2225 return FALSE; 2226 } 2227 2228 int 2229 mem_dump_iter_callback(int unit, soc_mem_t mem, void *data) 2230 { 2231 uint32 index_min, count, copyno; 2232 int rv = SOC_E_NONE; 2233 int flags = PTR_TO_INT(data); 2234 2235 if (!SOC_MEM_IS_VALID(unit, mem) || 2236 (soc_mem_flags(unit, mem) & SOC_MEM_FLAG_DEBUG)) { 2237 return rv; 2238 } 2239 2240 index_min = soc_mem_index_min(unit, mem); 2241 count = soc_mem_index_count(unit, mem); 2242 2243 SOC_MEM_BLOCK_ITER(unit, mem, copyno) { 2244 if (bypass_dump_table(unit, mem, copyno, flags)) { 2245 continue; 2246 } 2247 2248 if ((do_dump_table(unit, mem, copyno, index_min, 2249 count, flags, NULL, 1)) != CMD_OK) { 2250 rv = SOC_E_INTERNAL; 2251 break; 2252 } 2253 } 2254 2255 return rv; 2256 } 2257 2258 static cmd_result_t 2259 do_dump_memories(int unit, args_t *a) 2260 { 2261 char *an_arg; 2262 int flags = DUMP_TABLE_ALL, rv = CMD_OK; 2263 2264 an_arg = ARG_GET(a); 2265 2266 while (an_arg) { 2267 if (sal_strcasecmp(an_arg, "diff") == 0) { 2268 flags = DUMP_TABLE_CHANGED; 2269 } else if (sal_strcasecmp(an_arg, "ext") == 0) { 2270 flags = DUMP_TABLE_EXT; 2271 } else if (sal_strcasecmp(an_arg, "simpl") == 0) { 2272 flags |= DUMP_TABLE_SIMPLIFIED; 2273 } else { 2274 cli_out("ERROR: unrecognized argument to DUMP SOC: %s\n", 2275 an_arg); 2276 return CMD_FAIL; 2277 } 2278 an_arg = ARG_GET(a); 2279 } 2280 2281 if ((soc_mem_iterate(unit, 2282 mem_dump_iter_callback, INT_TO_PTR(flags))) < 0) { 2283 rv = CMD_FAIL; 2284 } 2285 2286 return rv; 2287 } 2288 2289 2290 cmd_result_t 2291 cmd_esw_dump(int unit, args_t *a) 2292 { 2293 soc_control_t *soc = SOC_CONTROL(unit); 2294 regtype_entry_t *rt; 2295 soc_mem_t mem; 2296 char *arg1, *arg2, *arg3; 2297 volatile int flags = 0; 2298 int copyno; 2299 volatile int rv = CMD_FAIL; 2300 parse_table_t pt; 2301 volatile char *fname = ""; 2302 int append = FALSE; 2303 volatile int console_was_on = 0, console_disabled = 0, pushed_ctrl_c = 0; 2304 jmp_buf ctrl_c; 2305 char *temp_field_name = NULL ,*field_names = NULL; 2306 uint8 offset = 0; 2307 int enable_mem_mode_check = 1; 2308 #if defined(BCM_TRIDENT3_SUPPORT) || defined(BCM_TOMAHAWK3_SUPPORT) 2309 char *buf; 2310 char *tmp; 2311 soc_format_t format; 2312 uint32 format_val[SOC_MAX_MEM_WORDS]; 2313 int i = 0; 2314 #endif /* BCM_TRIDENT3_SUPPORT */ 2315 2316 parse_table_init(unit, &pt); 2317 parse_table_add(&pt, "File", PQ_STRING, 0, &fname, 0); 2318 parse_table_add(&pt, "Append", PQ_BOOL, 0, &append, FALSE); 2319 2320 if (!sh_check_attached(ARG_CMD(a), unit)) { 2321 goto done; 2322 } 2323 2324 if (parse_arg_eq(a, &pt) < 0) { 2325 rv = CMD_USAGE; 2326 goto done; 2327 } 2328 2329 console_was_on = bslcons_is_enabled(); 2330 2331 if (fname[0] != 0) { 2332 /* 2333 * Catch control-C in case if using file output option. 2334 */ 2335 2336 #ifndef NO_CTRL_C 2337 if (setjmp(ctrl_c)) { 2338 rv = CMD_INTR; 2339 goto done; 2340 } 2341 #endif 2342 2343 sh_push_ctrl_c(&ctrl_c); 2344 2345 pushed_ctrl_c = TRUE; 2346 2347 2348 2349 if (bslfile_is_enabled()) { 2350 cli_out("%s: Can't dump to file while logging is enabled\n", 2351 ARG_CMD(a)); 2352 rv = CMD_FAIL; 2353 goto done; 2354 } 2355 2356 if (bslfile_open((char *)fname, append) < 0) { 2357 cli_out("%s: Could not start log file\n", ARG_CMD(a)); 2358 rv = CMD_FAIL; 2359 goto done; 2360 } 2361 2362 bslcons_enable(FALSE); 2363 2364 console_disabled = 1; 2365 } 2366 2367 arg1 = ARG_GET(a); 2368 2369 for (;;) { 2370 if (arg1 != NULL && !sal_strcasecmp(arg1, "raw")) { 2371 flags |= DUMP_TABLE_RAW; 2372 arg1 = ARG_GET(a); 2373 } else if (arg1 != NULL && !sal_strcasecmp(arg1, "hex")) { 2374 flags |= DUMP_TABLE_HEX; 2375 arg1 = ARG_GET(a); 2376 } else if (arg1 != NULL && !sal_strcasecmp(arg1, "all")) { 2377 flags |= DUMP_TABLE_ALL; 2378 arg1 = ARG_GET(a); 2379 } else if (arg1 != NULL && !sal_strcasecmp(arg1, "chg")) { 2380 flags |= DUMP_TABLE_CHANGED; 2381 arg1 = ARG_GET(a); 2382 } else if (arg1 != NULL && !sal_strcasecmp(arg1, "pipe_x")) { 2383 flags |= DUMP_TABLE_PIPE_X; 2384 arg1 = ARG_GET(a); 2385 } else if (arg1 != NULL && !sal_strcasecmp(arg1, "pipe_y")) { 2386 flags |= DUMP_TABLE_PIPE_Y; 2387 arg1 = ARG_GET(a); 2388 } else if (arg1 != NULL && !sal_strcasecmp(arg1, "pipe0")) { 2389 flags |= DUMP_TABLE_PIPE_0; 2390 arg1 = ARG_GET(a); 2391 } else if (arg1 != NULL && !sal_strcasecmp(arg1, "pipe1")) { 2392 flags |= DUMP_TABLE_PIPE_1; 2393 arg1 = ARG_GET(a); 2394 } else if (arg1 != NULL && !sal_strcasecmp(arg1, "pipe2")) { 2395 flags |= DUMP_TABLE_PIPE_2; 2396 arg1 = ARG_GET(a); 2397 } else if (arg1 != NULL && !sal_strcasecmp(arg1, "pipe3")) { 2398 flags |= DUMP_TABLE_PIPE_3; 2399 arg1 = ARG_GET(a); 2400 } else if (arg1 != NULL && !sal_strcasecmp(arg1, "pipe4")) { 2401 flags |= DUMP_TABLE_PIPE_4; 2402 arg1 = ARG_GET(a); 2403 } else if (arg1 != NULL && !sal_strcasecmp(arg1, "pipe5")) { 2404 flags |= DUMP_TABLE_PIPE_5; 2405 arg1 = ARG_GET(a); 2406 } else if (arg1 != NULL && !sal_strcasecmp(arg1, "pipe6")) { 2407 flags |= DUMP_TABLE_PIPE_6; 2408 arg1 = ARG_GET(a); 2409 } else if (arg1 != NULL && !sal_strcasecmp(arg1, "pipe7")) { 2410 flags |= DUMP_TABLE_PIPE_7; 2411 arg1 = ARG_GET(a); 2412 } else if (arg1 != NULL && !sal_strcasecmp(arg1, "nocache")) { 2413 flags |= DUMP_TABLE_NO_CACHE; 2414 arg1 = ARG_GET(a); 2415 } else if (arg1 != NULL && !sal_strcasecmp(arg1, "nocheck_mem_mode")) { 2416 enable_mem_mode_check = 0; 2417 arg1 = ARG_GET(a); 2418 } else if (arg1 != NULL && !sal_strcasecmp(arg1, "idx_phy")){ 2419 flags |= DUMP_TABLE_PHY_INDEX; 2420 arg1 = ARG_GET(a); 2421 } else if (arg1 != NULL && !sal_strcasecmp(arg1, "format")){ 2422 flags |= DUMP_TABLE_FORMAT; 2423 arg1 = ARG_GET(a); 2424 } else { 2425 break; 2426 } 2427 } 2428 #if defined(BCM_TRIDENT3_SUPPORT) || defined(BCM_TOMAHAWK3_SUPPORT) 2429 if (SOC_IS_TRIDENT3X(unit) || SOC_IS_TOMAHAWK3(unit)) { 2430 if (flags & DUMP_TABLE_FORMAT) { 2431 sal_memset(format_val, 0, 2432 (sizeof(uint32) * SOC_MAX_MEM_WORDS)); 2433 buf = ARG_GET(a); 2434 if (buf != NULL) { 2435 int base = 10; 2436 int done = 0; 2437 tmp = buf; 2438 2439 tmp += (*tmp == '-'); 2440 if (*tmp == '0') { 2441 tmp++; 2442 if (*tmp == 'x' || *tmp == 'X') { 2443 base = 16; 2444 tmp++; 2445 } else if (*tmp == 'b' || *tmp == 'B') { 2446 base = 2; 2447 tmp++; 2448 } else { 2449 base = 8; 2450 } 2451 } 2452 2453 do { 2454 int chs = 0; 2455 uint32 n; 2456 for (n = 0; ((base != 16 || chs < 8) && 2457 ((*tmp >= 'a' && *tmp < 'a' + base - 10) || 2458 (*tmp >= 'A' && *tmp < 'A' + base - 10) || 2459 (*tmp >= '0' && *tmp <= '9'))); tmp++) { 2460 n = n * base + ((*tmp <= '9' ? *tmp : *tmp + 9) & 15); 2461 chs ++; 2462 } 2463 if (base != 16 || chs < 8) { 2464 done = 1; 2465 } 2466 format_val[i++] = n; 2467 } while ((*tmp != '\0') && (i < SOC_MAX_MEM_WORDS) && !done); 2468 2469 if (base == 16 && i > 1) { 2470 uint32 temp, t; 2471 for (t = 0; t < (i / 2); t++) { 2472 temp = format_val[t]; 2473 format_val[t] = format_val[i - t - 1]; 2474 format_val[i - t - 1] = temp; 2475 } 2476 } 2477 } 2478 if (parse_format_name(unit, arg1, &format) == -1) { 2479 cli_out ("Invalid format.\n"); 2480 rv = CMD_FAIL; 2481 goto done; 2482 } 2483 soc_format_entry_dump(unit, format, (uint32 *) &format_val); 2484 rv = CMD_OK; 2485 goto done; 2486 } 2487 } 2488 #endif /* BCM_TRIDENT3_SUPPORT */ 2489 if ((flags & DUMP_TABLE_PIPE_X) || (flags & DUMP_TABLE_PIPE_Y)) { 2490 if (NUM_PIPE(unit) != 2) { 2491 cli_out("Number of chip is %d, try to dump pipe0...3\n", NUM_PIPE(unit)); 2492 rv = CMD_FAIL; 2493 goto done; 2494 } 2495 } 2496 if ((flags & DUMP_TABLE_PIPE_7) || (flags & DUMP_TABLE_PIPE_6) || 2497 (flags & DUMP_TABLE_PIPE_5) || (flags & DUMP_TABLE_PIPE_4) || 2498 (flags & DUMP_TABLE_PIPE_3) || (flags & DUMP_TABLE_PIPE_2) || 2499 (flags & DUMP_TABLE_PIPE_1) || (flags & DUMP_TABLE_PIPE_0)){ 2500 #ifdef BCM_TRIDENT3_SUPPORT 2501 if (SOC_IS_TRIDENT3X(unit)) { 2502 if (flags & (DUMP_TABLE_PIPE_2|DUMP_TABLE_PIPE_3| 2503 DUMP_TABLE_PIPE_4|DUMP_TABLE_PIPE_5| 2504 DUMP_TABLE_PIPE_6|DUMP_TABLE_PIPE_7)) { 2505 cli_out("Number of chip is %d, try to dump pipe_0/pipe_1\n", NUM_PIPE(unit)); 2506 rv = CMD_FAIL; 2507 goto done; 2508 } 2509 } else 2510 #endif 2511 if ((NUM_PIPE(unit) != 4) && (NUM_PIPE(unit) != 8)) { 2512 cli_out("Number of chip is %d, try to dump pipe_x/pipe_y\n", NUM_PIPE(unit)); 2513 rv = CMD_FAIL; 2514 goto done; 2515 } 2516 } 2517 2518 if (arg1 == NULL) { 2519 rv = CMD_USAGE; 2520 goto done; 2521 } 2522 2523 /* See if dumping internal ARL/L2 shadow copy */ 2524 2525 if (!sal_strcasecmp(arg1, "sarl") || !sal_strcasecmp(arg1, "sa")) { 2526 if (soc->arlShadow == NULL) { 2527 cli_out("No software ARL shadow table\n"); 2528 rv = CMD_FAIL; 2529 goto done; 2530 } 2531 2532 sal_mutex_take(soc->arlShadowMutex, sal_mutex_FOREVER); 2533 2534 #ifdef BCM_XGS_SWITCH_SUPPORT 2535 if (soc_feature(unit, soc_feature_arl_hashed)) { 2536 #ifdef BCM_TRIUMPH3_SUPPORT 2537 if (SOC_IS_TRIUMPH3(unit)) { 2538 cli_out("Entries on Internal memory:\n"); 2539 shr_avl_traverse(soc->arlShadow, soc_tr3_l2_entry_dump, NULL); 2540 if (soc_feature(unit, soc_feature_esm_support)) { 2541 cli_out("Entries on External memory:\n"); 2542 shr_avl_traverse(soc->arlShadow_ext1, soc_tr3_ext_l2_1_entry_dump, NULL); 2543 shr_avl_traverse(soc->arlShadow_ext2, soc_tr3_ext_l2_2_entry_dump, NULL); 2544 } 2545 } else 2546 #endif /* BCM_TRIUMPH3_SUPPORT */ 2547 { 2548 shr_avl_traverse(soc->arlShadow, soc_l2x_entry_dump, NULL); 2549 } 2550 } 2551 #endif /* BCM_XGS_SWITCH_SUPPORT */ 2552 2553 sal_mutex_give(soc->arlShadowMutex); 2554 2555 rv = CMD_OK; 2556 goto done; 2557 } 2558 2559 #if defined(BCM_TOMAHAWK3_SUPPORT) 2560 /* Dump L2 learn shadow table */ 2561 if (!sal_strcasecmp(arg1, "l2lrn")) { 2562 if (!SOC_IS_TOMAHAWK3(unit)) { 2563 cli_out("Command supported on Tomahawk3 only\n"); 2564 rv = CMD_FAIL; 2565 goto done; 2566 } 2567 2568 if (soc->l2x_lrn_shadow == NULL) { 2569 cli_out("No learn shadow table\n"); 2570 rv = CMD_FAIL; 2571 goto done; 2572 } 2573 2574 sal_mutex_take(soc->l2x_lrn_shadow_mutex, sal_mutex_FOREVER); 2575 2576 #ifdef BCM_XGS_SWITCH_SUPPORT 2577 if (soc_feature(unit, soc_feature_arl_hashed)) { 2578 shr_avl_traverse(soc->l2x_lrn_shadow, soc_th3_lrn_shadow_show, NULL); 2579 } 2580 #endif /* BCM_XGS_SWITCH_SUPPORT */ 2581 2582 sal_mutex_give(soc->l2x_lrn_shadow_mutex); 2583 2584 rv = CMD_OK; 2585 goto done; 2586 } 2587 #endif /* BCM_TOMAHAWK3_SUPPORT */ 2588 2589 /* See if dumping a DV */ 2590 if (!sal_strcasecmp(arg1, "dv")) { 2591 arg2 = ARG_GET(a); 2592 if (!arg2 || !isint(arg2)) { 2593 rv = CMD_USAGE; 2594 goto done; 2595 } 2596 soc_dma_dump_dv(unit, " ", (void *)parse_address(arg2)); 2597 rv = CMD_OK; 2598 goto done; 2599 } 2600 2601 /* See if dumping a packet */ 2602 if (!sal_strcasecmp(arg1, "pkt")) { 2603 arg2 = ARG_GET(a); 2604 if (!arg2 || !isint(arg2)) { 2605 rv = CMD_USAGE; 2606 goto done; 2607 } 2608 #ifdef BROADCOM_DEBUG 2609 arg3 = ARG_GET(a); 2610 arg3 = arg3 ? arg3 : "0000"; 2611 bcm_pkt_dump(unit, 2612 INT_TO_PTR(parse_address(arg2)), 2613 parse_integer(arg3)); 2614 rv = CMD_OK; 2615 #else 2616 cli_out("cannot dump pkt in non-BROADCOM_DEBUG compilation\n"); 2617 rv = CMD_FAIL; 2618 #endif /* BROADCOM_DEBUG */ 2619 goto done; 2620 } 2621 2622 /* See if dumping a memory table */ 2623 2624 if (parse_memory_name(unit, &mem, arg1, ©no, 0) >= 0) { 2625 int index, count; 2626 2627 arg2 = ARG_GET(a); 2628 arg3 = ARG_GET(a); 2629 if (!SOC_MEM_IS_VALID(unit, mem)) { 2630 cli_out("Error: Memory %s not valid for chip %s.\n", 2631 SOC_MEM_UFNAME(unit, mem), SOC_UNIT_NAME(unit)); 2632 goto done; 2633 } 2634 2635 #if defined(BCM_HAWKEYE_SUPPORT) 2636 if (SOC_IS_HAWKEYE(unit) && (soc_mem_index_max(unit, mem) <= 0)) { 2637 cli_out("Error: Memory %s not valid for chip %s.\n", 2638 SOC_MEM_UFNAME(unit, mem), SOC_UNIT_NAME(unit)); 2639 goto done; 2640 } 2641 #endif /* BCM_HAWKEYE_SUPPORT */ 2642 2643 #if defined(BCM_TRIDENT3_SUPPORT) 2644 if (SOC_IS_TRIDENT3X(unit) && arg1 != NULL) { 2645 #ifdef NO_SAL_APPL 2646 if (strstr((char *)arg1,(char *)"flowset")) { 2647 #else 2648 if (sal_strcasestr((char *)arg1,(char *)"flowset")) { 2649 #endif 2650 if (soc_mem_is_shared_mem(unit, mem)) { 2651 #ifdef NO_SAL_APPL 2652 if (strstr((char *)arg1,(char *)"rh_")) { 2653 #else 2654 if (sal_strcasestr((char *)arg1,(char *)"rh_")) { 2655 #endif 2656 cli_out("Error: Memory %s cannot be dumped for chip %s with DLB mode selected.\n", 2657 SOC_MEM_UFNAME(unit, mem), SOC_UNIT_NAME(unit)); 2658 goto done; 2659 } 2660 #ifdef NO_SAL_APPL 2661 if (strstr((char *)arg1,(char *)"dlb_")) { 2662 #else 2663 if (sal_strcasestr((char *)arg1,(char *)"dlb_")) { 2664 #endif 2665 cli_out("Error: Memory %s cannot be dumped for chip %s in RH mode selected.\n", 2666 SOC_MEM_UFNAME(unit, mem), SOC_UNIT_NAME(unit)); 2667 goto done; 2668 } 2669 } 2670 } 2671 } 2672 #endif /* BCM_TRIDENT3_SUPPORT */ 2673 2674 if (copyno == COPYNO_ALL) { 2675 copyno = SOC_MEM_BLOCK_ANY(unit, mem); 2676 } 2677 if ((arg2) && (isint(arg2))) { 2678 index = parse_memory_index(unit, mem, arg2); 2679 2680 if (!soc_mem_index_valid(unit, mem, index)) { 2681 if (!(SOC_DEFIP_HOLE_RANGE_CHECK(unit, mem, index))) { 2682 if (!(flags & DUMP_TABLE_PHY_INDEX)) { 2683 goto done; 2684 } 2685 } 2686 } 2687 if ((arg3) && (isint(arg3))) { 2688 count = parse_integer(arg3); 2689 } else { 2690 count = 1; 2691 } 2692 } else { 2693 index = soc_mem_index_min(unit, mem); 2694 if (soc_mem_is_sorted(unit, mem) && 2695 !(flags & DUMP_TABLE_ALL)) { 2696 count = soc_mem_entries(unit, mem, copyno) + 2697 SOC_DEFIP_HOLE_OFFSET(unit, mem); 2698 } else { 2699 count = soc_mem_index_max(unit, mem) - index + 1 + 2700 SOC_DEFIP_HOLE_OFFSET(unit, mem); 2701 } 2702 2703 if (flags & DUMP_TABLE_PHY_INDEX) { 2704 if (soc_feature(unit, soc_feature_l3_defip_map) && 2705 (mem == L3_DEFIPm || 2706 mem == L3_DEFIP_ONLYm || 2707 mem == L3_DEFIP_DATA_ONLYm)) { 2708 index = 0; 2709 count = soc_mem_index_count(unit, L3_DEFIPm); 2710 count += soc_mem_index_count(unit, L3_DEFIP_PAIR_128m) * 2; 2711 } 2712 if (soc_feature(unit, soc_feature_l3_defip_map) && 2713 (mem == L3_DEFIP_PAIR_128m || 2714 mem == L3_DEFIP_PAIR_128_ONLYm || 2715 mem == L3_DEFIP_PAIR_128_DATA_ONLYm)) { 2716 index = 0; 2717 count = soc_mem_index_count(unit, L3_DEFIPm) >> 1; 2718 count += soc_mem_index_count(unit, L3_DEFIP_PAIR_128m); 2719 } 2720 } 2721 } 2722 if ((arg2) && (!isint(arg2))) { 2723 ARG_PREV(a); 2724 } 2725 if ((arg3) && (!isint(arg3))) { 2726 ARG_PREV(a); 2727 } 2728 field_names = NULL; 2729 while ((temp_field_name = ARG_GET(a)) != NULL) { 2730 if (field_names == NULL) { 2731 if ((field_names = sal_alloc(ARGS_BUFFER, "reg_set")) == 2732 NULL) { 2733 return (CMD_FAIL); 2734 } 2735 sal_strncpy(field_names, ",", 2); 2736 } 2737 for (offset=0 ; offset < sal_strlen(temp_field_name);offset++) { 2738 temp_field_name[offset] = toupper((int) 2739 temp_field_name[offset]); 2740 } 2741 sal_strncat(field_names, temp_field_name, 2742 sal_strlen(temp_field_name)); 2743 sal_strncat(field_names, ",", 1); 2744 } 2745 rv = do_dump_table(unit, mem, copyno, index, count, flags, field_names, 2746 enable_mem_mode_check); 2747 if (field_names != NULL) { 2748 sal_free(field_names); 2749 } 2750 goto done; 2751 } 2752 2753 if (!sal_strcasecmp(arg1, "socmem")) { 2754 rv = do_dump_memories(unit, a); 2755 goto done; 2756 } 2757 2758 /* 2759 * See if dumping a register type 2760 */ 2761 if ((rt = regtype_lookup_name(arg1)) != NULL) { 2762 rv = do_dump_registers(unit, rt, a); 2763 goto done; 2764 } 2765 2766 #ifndef BCM_SW_STATE_DUMP_DISABLE 2767 /* 2768 * SW data structures dump 2769 */ 2770 if (!sal_strcasecmp(arg1, "sw")) { 2771 rv = do_dump_sw(unit, a); 2772 goto done; 2773 } 2774 #endif 2775 2776 cli_out("Unknown option or memory to dump " 2777 "(use 'help dump' for more info)\n"); 2778 2779 rv = CMD_FAIL; 2780 2781 done: 2782 2783 if (fname[0] != 0) { 2784 bslfile_close(); 2785 } 2786 2787 if (console_disabled && console_was_on) { 2788 bslcons_enable(TRUE); 2789 } 2790 2791 if (pushed_ctrl_c) { 2792 sh_pop_ctrl_c(); 2793 } 2794 2795 parse_arg_eq_done(&pt); 2796 return rv; 2797 }