diag_cint_data.c (32167B)
1 /* 2 * 3 * 4 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 5 * 6 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 7 */ 8 #if defined(INCLUDE_LIB_CINT) 9 #include <appl/diag/system.h> 10 #include <appl/diag/diag.h> 11 12 #include <shared/bsl.h> 13 #include <sdk_config.h> 14 15 #include <soc/cm.h> 16 #include <soc/drv.h> 17 #include <soc/error.h> 18 #include <soc/register.h> 19 #include <soc/mem.h> 20 #include <soc/intr.h> 21 22 #include <cint_config.h> 23 #include <cint_types.h> 24 #include <cint_porting.h> 25 26 #if defined(BCM_SAND_SUPPORT) || defined(BCM_ESW_SUPPORT) 27 #include <bcm/port.h> 28 #include <soc/mcm/memregs.h> 29 30 #if defined(BCM_PETRA_SUPPORT) 31 #include <soc/dpp/drv.h> 32 #include <soc/dcmn/dcmn_mem.h> 33 #include <shared/swstate/access/sw_state_access.h> 34 #include <bcm_int/dpp/counters.h> 35 #include <bcm_int/dpp/stat.h> 36 #endif 37 38 #if defined(BCM_PETRA_SUPPORT) || defined(BCM_DFE_SUPPORT) 39 #include <appl/diag/dcmn/diag.h> 40 #include <appl/diag/shell.h> 41 #include <appl/diag/dcmn/init_deinit.h> 42 #endif 43 44 #include <sal/core/libc.h> 45 #include <sal/core/boot.h> 46 47 #if defined(BCM_PETRA_SUPPORT) 48 #include <soc/dpp/ARAD/arad_tbl_access.h> 49 #include <soc/dpp/ARAD/arad_init.h> 50 #include <soc/dpp/ARAD/arad_sw_db.h> 51 #include <soc/dpp/ARAD/arad_ingress_packet_queuing.h> 52 #include <soc/dpp/multicast.h> 53 #endif 54 #ifdef BCM_JERICHO_SUPPORT 55 #include <soc/dpp/JER/jer_init.h> 56 #include <soc/dpp/multicast.h> 57 #endif 58 59 #ifdef BCM_88750_A0 60 #include <soc/dfe/fe1600/fe1600_drv.h> 61 #endif 62 #ifdef BCM_88950_A0 63 #include <soc/dfe/fe3200/fe3200_drv.h> 64 #endif 65 #ifdef BCM_88790_A0 66 #include <soc/dnxf/ramon/ramon_drv.h> 67 #endif 68 #ifdef BCM_88690_A0 69 #include <soc/dnx/drv.h> 70 #endif 71 #ifdef BCM_CMICM_SUPPORT 72 #include <soc/cmicm.h> 73 #endif 74 75 #if defined(BCM_DFE_SUPPORT) || defined(BCM_PETRA_SUPPORT) 76 #if defined(INCLUDE_INTR) 77 #include <appl/dcmn/rx_los/rx_los.h> 78 #endif 79 #endif 80 81 #endif /* defined(BCM_SAND_SUPPORT) || defined(BCM_ESW_SUPPORT) */ 82 83 #if defined(BCM_SAND_SUPPORT) || defined(BCM_ESW_SUPPORT) 84 85 /* fill the table with the same given entry, using the device specific wrapper for the SLAM DMA function */ 86 static int diag_mem_fill(int unit, char *name, void *buffer) /* buffer needs to be allocated by soc_cm_salloc() / diag_pointer(unit, "dmabuf_alloc", void **pointer_var, char *size) */ 87 { 88 int copyno; 89 soc_mem_t mem; 90 int rv = SOC_E_NONE; 91 unsigned array_index; 92 93 if (!SOC_UNIT_VALID(unit)) { 94 cli_out("Invalid unit.\n"); 95 return SOC_E_UNIT; 96 } 97 98 if (name == NULL) { 99 return SOC_E_PARAM; 100 } 101 102 if (parse_memory_name(unit, &mem, name, ©no, &array_index) < 0) { 103 cli_out("ERROR: unknown table \"%s\"\n",name); 104 return SOC_E_PARAM; 105 } 106 if (buffer && ((rv = soc_mem_fill(unit, mem, copyno, buffer)))) { 107 cli_out("soc_mem_fill() failed in memory %s.%d returned %d\n", 108 SOC_MEM_UFNAME(unit, mem), copyno==COPYNO_ALL ? 0 : copyno, rv); 109 } 110 return rv; 111 } 112 113 /* fill the table with the same given entry, using the device specific wrapper for the SLAM DMA function */ 114 static int diag_mem_array_fill_range( 115 int unit, /* unit of the memory */ 116 uint32 flags, /* flags */ 117 char *name, /* Memory, block and array index to be written to */ 118 unsigned min_ar_index, /* min array index to be written to, not used in memories which are not arrays */ 119 unsigned max_ar_index, /* max array index to be written to, not used in memories which are not arrays */ 120 int index_min, /* first memory index to write to */ 121 int index_max, /* last memory index to write to */ 122 void *buffer) /* buffer of they entry to write. If the memory can be written to by SLAM DMA, 123 then the buffer must be allocated using soc_cm_salloc() / diag_pointer(unit, "dmabuf_alloc", void **pointer_var, char *size). */ 124 { 125 int copyno; 126 soc_mem_t mem; 127 int rv = SOC_E_NONE; 128 unsigned array_index; 129 130 if (!SOC_UNIT_VALID(unit)) { 131 cli_out("Invalid unit.\n"); 132 return SOC_E_UNIT; 133 } 134 135 if (name == NULL) { 136 return SOC_E_PARAM; 137 } 138 139 if (parse_memory_name(unit, &mem, name, ©no, &array_index) < 0) { 140 cli_out("ERROR: unknown table \"%s\"\n",name); 141 return SOC_E_PARAM; 142 } 143 if (buffer && ((rv = soc_mem_array_fill_range(unit, flags, mem, min_ar_index, max_ar_index, copyno, index_min, index_max, buffer)))) { 144 cli_out("soc_mem_fill() failed in memory %s.%d[%u] indices[%d:%d] returned %d\n", 145 SOC_MEM_UFNAME(unit, mem), copyno==COPYNO_ALL ? 0 : copyno, array_index, min_ar_index, max_ar_index, rv); 146 } 147 return rv; 148 } 149 150 151 /* fill the table with the same given entry, using the device specific wrapper for the SLAM DMA function */ 152 static int diag_fill_table(int unit, char *name, mem_val value) 153 { 154 int copyno; 155 soc_mem_t mem; 156 int rv = SOC_E_NONE; 157 unsigned array_index; 158 159 if (!SOC_UNIT_VALID(unit)) { 160 cli_out("Invalid unit.\n"); 161 return SOC_E_UNIT; 162 } 163 164 if (name == NULL) { 165 return SOC_E_PARAM; 166 } 167 168 if (parse_memory_name(unit, &mem, name, ©no, &array_index) < 0) { 169 cli_out("ERROR: unknown table \"%s\"\n",name); 170 return SOC_E_PARAM; 171 } 172 173 if (!SOC_MEM_IS_VALID(unit, mem)) { 174 cli_out("Error: Memory %s not valid for chip %s.\n", 175 SOC_MEM_UFNAME(unit, mem), SOC_UNIT_NAME(unit)); 176 return SOC_E_PARAM; 177 } 178 179 if (soc_mem_is_readonly(unit, mem)) { 180 cli_out("ERROR: Table %s is read-only\n", 181 SOC_MEM_UFNAME(unit, mem)); 182 return SOC_E_PARAM; 183 } 184 185 #if defined(BCM_PETRA_SUPPORT) 186 if(SOC_IS_ARAD(unit)) { 187 if ((value) && ((rv = arad_fill_partial_table_with_entry(unit, mem, array_index, array_index, copyno, 0, soc_mem_index_max(unit, mem), value)))) { 188 cli_out("Fill ERROR: table %s.%d: 0x%x\n", 189 SOC_MEM_UFNAME(unit, mem), copyno==COPYNO_ALL ? 190 0 : copyno, rv); 191 } 192 } else 193 #endif 194 { 195 cli_out("fast table filling not supported on this device\n"); 196 rv = SOC_E_UNIT; 197 } 198 199 return rv; 200 } 201 202 /* perform an MBIST test, destroying the contents of memories */ 203 static int diag_mbist(int unit, int skip_errors) 204 { 205 uint32 rv = SOC_E_NONE; 206 bcm_switch_event_t switch_event; 207 bcm_switch_event_control_t type; 208 bcm_switch_service_config_t config; 209 uint32 value; 210 switch_event = BCM_SWITCH_EVENT_DEVICE_INTERRUPT; 211 type.event_id = BCM_SWITCH_EVENT_CONTROL_ALL; 212 type.index = 0; 213 type.action = bcmSwitchEventMask; 214 value = 1; 215 bcm_switch_event_control_set(unit, switch_event, type, value); 216 bcm_switch_service_config_t_init(&config); 217 config.enabled = bcmServiceStateDisabled; 218 bcm_switch_service_set(unit, bcmServiceCounterCollection, &config); 219 220 if (!SOC_UNIT_VALID(unit)) { 221 cli_out("Invalid unit.\n"); 222 return SOC_E_UNIT; 223 } 224 225 #ifdef BCM_88650_A0 226 if (SOC_IS_ARADPLUS_AND_BELOW(unit)) { 227 if (SOC_IS_ARDON(unit)) { 228 rv = soc_bist_all_ardon(unit, skip_errors); 229 if (rv) { 230 cli_out("MBIST failed\n"); 231 } 232 } else { 233 rv = soc_bist_all_arad(unit, skip_errors); 234 if (rv) { 235 cli_out("MBIST failed\n"); 236 } 237 } 238 } else 239 #endif 240 #ifdef BCM_88750_A0 241 if (SOC_IS_FE1600(unit)) { 242 rv = soc_bist_all_fe1600(unit, skip_errors); 243 if (rv) { 244 cli_out("MBIST failed\n"); 245 } 246 } else 247 #endif 248 #ifdef BCM_88950_A0 249 if (SOC_IS_FE3200(unit)) { 250 rv = soc_fe3200_bist_all(unit, skip_errors); 251 if (rv) { 252 cli_out("MBIST failed\n"); 253 } 254 } else 255 #endif 256 #if defined(BCM_88470_A0) || defined(BCM_88270_A0) 257 if (SOC_IS_QAX(unit)) { 258 rv = soc_bist_all_qax(unit, skip_errors); 259 if (rv) { 260 cli_out("MBIST failed\n"); 261 } 262 } else 263 #endif 264 #if defined(BCM_88675_A0) || defined(BCM_88375_A0) 265 if (SOC_IS_JERICHO_AND_BELOW(unit) || SOC_IS_JERICHO_PLUS(unit)) { 266 rv = soc_bist_all_jer(unit, skip_errors); 267 if (rv) { 268 cli_out("MBIST failed\n"); 269 } 270 } else 271 #endif 272 #if defined(BCM_88790_A0) 273 if (SOC_IS_DNXF(unit)) { 274 rv = soc_bist_all_ramon(unit, skip_errors); 275 if (rv) { 276 cli_out("MBIST failed\n"); 277 } 278 } else 279 #endif 280 #ifdef BCM_88690_A0 281 if (SOC_IS_JERICHO_2_ONLY(unit)) { 282 rv = soc_bist_all_jr2(unit, skip_errors); 283 if (rv) { 284 cli_out("MBIST failed\n"); 285 } 286 } else 287 #endif 288 { 289 cli_out("MBIST not supported on this device\n"); 290 rv = SOC_E_UNIT; 291 } 292 bcm_switch_event_control_set(unit, switch_event, type, value); 293 return rv; 294 } 295 296 /* perform an MBIST bases SER test, destroying the contents of memories */ 297 static int diag_mbist_ser_test(const int unit, const int skip_errors, const uint32 nof_repeats, const uint32 time_to_wait, const uint32 ser_test_num) 298 { 299 uint32 rv = SOC_E_NONE; 300 301 if (!SOC_UNIT_VALID(unit)) { 302 cli_out("Invalid unit.\n"); 303 return SOC_E_UNIT; 304 } 305 306 #if defined(BCM_PETRA_SUPPORT) 307 if (SOC_IS_ARADPLUS_AND_BELOW(unit)) { 308 rv = soc_bist_arad_ser_test(unit, skip_errors, nof_repeats, time_to_wait, ser_test_num); 309 310 if (rv) { 311 cli_out("MBIST SER test failed\n"); 312 } 313 } else 314 #endif 315 #ifdef BCM_88750_A0 316 if (SOC_IS_FE1600(unit)) { 317 rv = soc_bist_fe1600_ser_test(unit, skip_errors, nof_repeats, time_to_wait); 318 319 if (rv) { 320 cli_out("MBIST SER test failed\n"); 321 } 322 } else 323 #endif 324 { 325 cli_out("MBIST SER test not supported on this device\n"); 326 rv = SOC_E_UNIT; 327 } 328 329 return rv; 330 } 331 332 /* clear, print or re-populate the Arad direct mapping modport2sysport table */ 333 static int diag_modport2sysport(int unit) 334 { 335 uint32 rv = SOC_E_NONE; 336 337 if (!SOC_UNIT_VALID(unit)) { 338 cli_out("Invalid unit.\n"); 339 return SOC_E_UNIT; 340 } 341 342 #if defined(BCM_PETRA_SUPPORT) 343 if(SOC_IS_ARAD(unit)) { 344 uint32 mod, port; 345 ARAD_SYSPORT sysport; 346 for (mod = 0; mod < ARAD_NOF_FAPS_IN_SYSTEM; ++mod) { 347 for (port = 0; port < ARAD_NOF_FAP_PORTS; ++port) { 348 if (arad_sw_db_modport2sysport_get(unit, mod, port, &sysport)) { 349 cli_out("failed to get the mapping for " 350 "module %u port %u\n", mod, port); 351 return SOC_E_FAIL; 352 } else if (sysport != ARAD_NOF_SYS_PHYS_PORTS_GET(unit)) { 353 cli_out("%u , %u -> %u\n", mod, port, sysport); 354 } 355 } 356 } 357 } else 358 #endif 359 { 360 cli_out("not supported on this device\n"); 361 rv = SOC_E_UNIT; 362 } 363 364 return rv; 365 } 366 367 int 368 fill_memory_with_incremental_field(const int unit, const soc_mem_t mem, const soc_field_t field, 369 unsigned array_index_min, unsigned array_index_max, 370 const int copyno, 371 int index_min, int index_max, 372 const void *initial_entry) 373 { 374 int rv = 0, mem_words, mem_size, entry_words, indices_num; 375 int index, blk, tmp; 376 unsigned array_index; 377 uint32 *buf; 378 uint32 *buf2; 379 const uint32 *input_entry = initial_entry; 380 uint32 field_buf[4] = {0}; /* To hold the field, max size 128 bits */ 381 382 if (initial_entry == NULL) { 383 return SOC_E_PARAM; 384 } 385 386 /* get legal values for indices, if too small/big use the memory's boundaries */ 387 tmp = soc_mem_index_min(unit, mem); 388 if (index_min < soc_mem_index_min(unit, mem)) { 389 index_min = tmp; 390 } 391 if (index_max < index_min) { 392 index_max = index_min; 393 } else { 394 tmp = soc_mem_index_max(unit, mem); 395 if (index_max > tmp) { 396 index_max = tmp; 397 } 398 } 399 400 entry_words = soc_mem_entry_words(unit, mem); 401 indices_num = index_max - index_min + 1; 402 mem_words = indices_num * entry_words; 403 mem_size = mem_words * 4; 404 405 /* get the initial field from the input */ 406 soc_mem_field_get(unit, mem, initial_entry, field, field_buf); 407 408 buf = soc_cm_salloc(unit, mem_size, "mem_clear_buf"); /* allocate DMA memory buffer */ 409 if (buf == NULL) { 410 return SOC_E_MEMORY; 411 } 412 413 /* get legal values for memory array indices */ 414 if (SOC_MEM_IS_ARRAY(unit, mem)) { 415 soc_mem_array_info_t *maip = SOC_MEM_ARRAY_INFOP(unit, mem); 416 if (maip) { 417 if (array_index_max >= maip->numels + maip->first_array_index) { 418 array_index_max = (maip->numels - 1) + maip->first_array_index; 419 } else if (array_index_min < array_index_max) { 420 array_index_min = maip->first_array_index; 421 } 422 } 423 } else { 424 array_index_min = array_index_max = 0; 425 } 426 427 /* fill the allocated memory with the input entry */ 428 for (index = 0; index < mem_words; ++index) { 429 buf[index] = input_entry[index % entry_words]; 430 } 431 432 SOC_MEM_BLOCK_ITER(unit, mem, blk) { 433 if (copyno != COPYNO_ALL && copyno != blk) { 434 continue; 435 } 436 for (array_index = array_index_min; array_index <= array_index_min; ++array_index) { 437 /* update the field of all the entries in the buffer */ 438 for (index = 0, buf2 = buf; index < indices_num; ++index, buf2+=entry_words) { 439 soc_mem_field_set(unit, mem, buf2, field, field_buf); /* set the index */ 440 /* increment the field, to be used in next entry */ 441 if (!++field_buf[0]) { 442 if (!++field_buf[1]) { 443 if (!++field_buf[2]) { 444 ++field_buf[3]; 445 } 446 } 447 } 448 } 449 450 #ifdef PLISIM 451 if (SAL_BOOT_PLISIM) { 452 for (index = index_min, buf2 = buf; index <= index_max; ++index, buf2+=entry_words) { 453 if ((rv = soc_mem_array_write(unit, mem, array_index, blk, index, buf2)) < 0) { 454 cli_out("Write ERROR: table %s.%d[%d]: %s\n", 455 SOC_MEM_UFNAME(unit, mem), copyno==COPYNO_ALL ? 456 0 : copyno, index, 457 soc_errmsg(rv)); 458 } 459 } 460 } else 461 #endif 462 { 463 if ((rv = soc_mem_array_write_range(unit, 0, mem, array_index, blk, index_min, index_max, buf)) < 0) { 464 cli_out("Write ERROR: table %s.%d[%d-%d]: %s\n", 465 SOC_MEM_UFNAME(unit, mem), copyno==COPYNO_ALL ? 466 0 : copyno, index_min, index_max, 467 soc_errmsg(rv)); 468 } 469 } 470 } 471 } 472 soc_cm_sfree(unit, buf); 473 return rv; 474 } 475 476 /* pointer management functions */ 477 static int diag_pointer(int unit, char *func_name, void **p, char *arg) 478 { 479 int rv; 480 unsigned long val; 481 482 if (!SOC_UNIT_VALID(unit)) { 483 cli_out("Invalid unit.\n"); 484 return SOC_E_UNIT; 485 } else if (!func_name || !p || !arg) { 486 return SOC_E_PARAM; 487 } 488 if (arg[0] == '0' && (arg[1] == 'x' || arg[1] == 'X')) { 489 /* coverity[secure_coding] */ 490 rv = sscanf(arg + 2, "%lx", &val); 491 } else { 492 /* coverity[secure_coding] */ 493 rv = sscanf(arg, "%lu", &val); 494 } 495 if (rv != 1) { 496 cli_out("could not interpret value\n"); 497 return SOC_E_PARAM; 498 } 499 if (!sal_strcmp(func_name, "set")) { 500 *p = (void*)(uint8*)val; 501 } else if (!sal_strcmp(func_name, "print")) { 502 cli_out("pointer value: %p\n", *p); 503 } else if (!sal_strcmp(func_name, "dmabuf_alloc")) { 504 if (!(*p = soc_cm_salloc(unit, val, "diag_pointer"))) { 505 cli_out("Could not allocte a DMA buffer of %lx bytes\n", val); 506 return SOC_E_MEMORY; 507 } 508 cli_out("Allocted a %lu bytes DMA buffer at %p\n", val, *p); 509 } else if (!sal_strcmp(func_name, "dmabuf_free")) { 510 soc_cm_sfree(unit, *p); 511 } else { 512 cli_out("ERROR: unknown pointer command, use one of: " 513 "set, print, dmabuf_alloc dmabuf_free\n"); 514 return SOC_E_PARAM; 515 } 516 return SOC_E_NONE; 517 } 518 519 static int diag_soc_device_reset(int unit, int mode, int action) 520 { 521 int rv = 0; 522 523 rv = soc_device_reset(unit, mode, action); 524 if (rv) { 525 cli_out("Error: soc_device_reset Failed. rv=%d\n", rv); 526 return rv; 527 } 528 529 return rv; 530 } 531 532 static int diag_cm_get_unit_by_id(uint16 dev_id, int occur, int *unit) 533 { 534 int 535 rv = 0, 536 num_devices = 0, 537 tmp_occur = 0, 538 tmp_unit, 539 found = 0; 540 uint16 541 tmp_dev_id; 542 uint8 543 tmp_rev_id; 544 545 546 num_devices = soc_cm_get_num_devices(); 547 548 for (tmp_unit = 0 ; tmp_unit < num_devices ; tmp_unit++ ) { 549 soc_cm_get_id(tmp_unit, &tmp_dev_id, &tmp_rev_id); 550 551 if (tmp_dev_id == dev_id) { 552 if (tmp_occur == occur) { 553 found = 1; 554 break; 555 } 556 tmp_occur++; 557 } 558 } 559 560 if (found == 1) { 561 *unit = tmp_unit; 562 } else { 563 *unit = 0xffffffff; 564 } 565 566 return rv; 567 } 568 569 570 571 572 static int diag_get_interrupt_id_byname(int unit, char *regName, int reg_index, char* fldName, int bit_in_field, int* interrupt_id) 573 { 574 int rc = SOC_E_NONE; 575 soc_reg_t reg=INVALIDr; 576 soc_field_t field=INVALIDf; 577 soc_regaddrlist_t alist; 578 soc_reg_info_t *reginfo; 579 int f; 580 int field_found = 0; 581 582 if (!SOC_INTR_IS_SUPPORTED(unit)) { 583 cli_out("No interrupts for device\n"); 584 return BCM_E_INTERNAL; 585 } 586 587 if (soc_regaddrlist_alloc(&alist) < 0) 588 { 589 cli_out("Could not allocate address list.\n"); 590 return BCM_E_INTERNAL; 591 } 592 593 if (parse_symbolic_reference(unit, &alist, regName) < 0) 594 { 595 cli_out("Syntax error parsing %s\n", regName); 596 soc_regaddrlist_free(&alist); 597 return BCM_E_INTERNAL; 598 } 599 else if (alist.count < 1) 600 { 601 /** wrong register got */ 602 cli_out("get wrong register %s\n", regName); 603 soc_regaddrlist_free(&alist); 604 return BCM_E_INTERNAL; 605 } else 606 { 607 /** get register */ 608 reg = alist.ainfo->reg; 609 soc_regaddrlist_free(&alist); 610 611 if (!SOC_REG_IS_VALID(unit,reg)) { 612 cli_out("get invalid register %s\n", regName); 613 return BCM_E_INTERNAL; 614 } 615 reginfo = &SOC_REG_INFO(unit, reg); 616 617 for (f = reginfo->nFields - 1; f >= 0; f--) 618 { 619 soc_field_info_t *fld = ®info->fields[f]; 620 if (sal_strcasecmp(SOC_FIELD_NAME(unit, fld->field), fldName)) 621 { 622 continue; 623 } 624 field_found = 1; 625 field = fld->field; 626 } 627 if (!field_found) { 628 cli_out("can not get field(%s) from %s\n", fldName, regName); 629 return BCM_E_INTERNAL; 630 } 631 } 632 633 rc = soc_get_interrupt_id(unit, reg, reg_index, field, bit_in_field, interrupt_id); 634 return rc; 635 } 636 637 #endif /* defined(BCM_SANDSUPPORT) || defined(BCM_ESW_SUPPORT) */ 638 639 static void diag_printk(char *str) 640 { 641 cli_out("%s", str); 642 } 643 644 #define DIAG_PRINTK_FLAGS_HEX 0x1 645 646 static void diag_printk_int(int num, int flags) 647 { 648 if(flags & DIAG_PRINTK_FLAGS_HEX) { 649 cli_out("%x",(uint32)num); 650 } else { 651 cli_out("%d",num); 652 } 653 } 654 655 static void diag_pcie_read(int unit, uint32 addr, uint32 *val, int swap) 656 { 657 658 *val = CMVEC(unit).read(&CMDEV(unit).dev, addr); 659 660 if(swap) { 661 *val = _shr_swap32(*val); 662 } 663 664 /* cli_out("%s(): unit=%d, addr=0x%x, swap=%d. after swap: *val=0x%x", 665 FUNCTION_NAME(), unit, addr, swap, *val); */ 666 } 667 668 static void diag_pcie_write(int unit, uint32 addr, uint32 val, int swap) 669 { 670 /* cli_out("%s(): unit=%d, addr=0x%x, val=0x%x, swap=%d", 671 FUNCTION_NAME(), unit, addr, val, swap); */ 672 673 if(swap) { 674 val = _shr_swap32(val); 675 } 676 677 CMVEC(unit).write(&CMDEV(unit).dev, addr, val); 678 679 } 680 681 682 CINT_FWRAPPER_CREATE_VP1(diag_printk, 683 char*, char, str, 1, 0); 684 685 CINT_FWRAPPER_CREATE_VP2(diag_printk_int, 686 int, int, num, 0, 0, 687 int, int, flags, 0, 0); 688 689 CINT_FWRAPPER_CREATE_VP4(diag_pcie_read, 690 int,int,unit,0,0, 691 uint32,uint32,addr,0,0, 692 uint32*,uint32,val,1,0, 693 int,int,swap,0,0); 694 695 CINT_FWRAPPER_CREATE_VP4(diag_pcie_write, 696 int,int,unit,0,0, 697 uint32,uint32,addr,0,0, 698 uint32,uint32,val,0,0, 699 int,int,swap,0,0); 700 701 #if defined(BCM_SAND_SUPPORT) || defined(BCM_ESW_SUPPORT) 702 CINT_FWRAPPER_CREATE_RP2(int, int, 0, 0, 703 diag_reg_bits, 704 int,int,unit,0,0, 705 char*,char,reg_name,1,0); 706 707 CINT_FWRAPPER_CREATE_RP3(int, int, 0, 0, 708 diag_reg_field_bits, 709 int,int,unit,0,0, 710 char*,char,reg_name,1,0, 711 char*,char,field_name,1,0); 712 713 CINT_FWRAPPER_CREATE_RP3(int, int, 0, 0, 714 diag_reg_get, 715 int,int,unit,0,0, 716 char*,char,name,1,0, 717 uint32*,uint32,value,1,0); 718 719 CINT_FWRAPPER_CREATE_RP4(int, int, 0, 0, 720 diag_reg_field_get, 721 int,int,unit,0,0, 722 char*,char,name,1,0, 723 char*,char,field_name,1,0, 724 uint32*,uint32,value,1,0); 725 726 CINT_FWRAPPER_CREATE_RP5(int, int, 0, 0, 727 diag_reg_field_only_get, 728 int,int,unit,0,0, 729 char*,char,name,1,0, 730 uint32*,uint32,reg_value,1,0, 731 char*,char,field_name,1,0, 732 uint32*,uint32,field_value,1,0); 733 734 CINT_FWRAPPER_CREATE_RP3(int, int, 0, 0, 735 diag_reg_set, 736 int,int,unit,0,0, 737 char*,char,name,1,0, 738 uint32*,uint32,value,1,0); 739 740 CINT_FWRAPPER_CREATE_RP4(int, int, 0, 0, 741 diag_reg_field_set, 742 int,int,unit,0,0, 743 char*,char,name,1,0, 744 char*,char,field_name,1,0, 745 uint32*,uint32,value,1,0); 746 747 CINT_FWRAPPER_CREATE_RP5(int, int, 0, 0, 748 diag_reg_field_only_set, 749 int,int,unit,0,0, 750 char*,char,name,1,0, 751 uint32*,uint32,reg_value,1,0, 752 char*,char,field_name,1,0, 753 uint32*,uint32,field_value,1,0); 754 755 CINT_FWRAPPER_CREATE_RP3(int, int, 0, 0, 756 diag_soc_device_reset, 757 int,int,unit,0,0, 758 int,int,mode,0,0, 759 int,int,action,0,0); 760 761 CINT_FWRAPPER_CREATE_RP3(int, int, 0, 0, 762 diag_cm_get_unit_by_id, 763 uint16,uint16,dev_id,0,0, 764 int,int,occur,0,0, 765 int*,int,unit,1,0); 766 767 CINT_FWRAPPER_CREATE_RP4(int, int, 0, 0, 768 diag_mem_get, 769 int,int,unit,0,0, 770 char*,char,name,1,0, 771 int,int,start,0,0, 772 uint32*,uint32,value,1,0); 773 774 CINT_FWRAPPER_CREATE_RP5(int, int, 0, 0, 775 diag_mem_field_get, 776 int,int,unit,0,0, 777 char*,char,name,1,0, 778 char*,char,field_name,1,0, 779 int,int,start,0,0, 780 uint32*,uint32,value,1,0); 781 782 CINT_FWRAPPER_CREATE_RP5(int, int, 0, 0, 783 diag_mem_field_only_get, 784 int,int,unit,0,0, 785 char*,char,name,1,0, 786 char*,char,field_name,1,0, 787 int,int,start,0,0, 788 uint32*,uint32,value,1,0); 789 790 CINT_FWRAPPER_CREATE_RP5(int, int, 0, 0, 791 diag_mem_set, 792 int,int,unit,0,0, 793 char*,char,name,1,0, 794 int,int,start,0,0, 795 int,int,count,0,0, 796 uint32*,uint32,value,1,0); 797 798 CINT_FWRAPPER_CREATE_RP6(int, int, 0, 0, 799 diag_mem_field_set, 800 int,int,unit,0,0, 801 char*,char,name,1,0, 802 char*,char,field_name,1,0, 803 int,int,start,0,0, 804 int,int,count,0,0, 805 uint32*,uint32,value,1,0); 806 807 CINT_FWRAPPER_CREATE_RP6(int, int, 0, 0, 808 diag_mem_field_only_set, 809 int,int,unit,0,0, 810 char*,char,name,1,0, 811 char*,char,field_name,1,0, 812 int,int,start,0,0, 813 int,int,count,0,0, 814 uint32*,uint32,value,1,0); 815 816 CINT_FWRAPPER_CREATE_RP5(int, int, 0, 0, 817 diag_soc_mem_read_range, 818 int,int,unit,0,0, 819 char*,char,name,1,0, 820 int,int,index1,0,0, 821 int,int,index2,0,0, 822 void*,void,buffer,1,0); 823 824 CINT_FWRAPPER_CREATE_RP5(int, int, 0, 0, 825 diag_soc_mem_write_range, 826 int,int,unit,0,0, 827 char*,char,name,1,0, 828 int,int,index1,0,0, 829 int,int,index2,0,0, 830 void*,void,buffer,1,0); 831 832 CINT_FWRAPPER_CREATE_RP3(int, int, 0, 0, 833 diag_mem_fill, 834 int,int,unit,0,0, 835 char*,char,name,1,0, 836 void*,void,buffer,1,0); 837 838 CINT_FWRAPPER_CREATE_RP8(int, int, 0, 0, 839 diag_mem_array_fill_range, 840 int, int, unit, 0, 0, 841 uint32, uint32, flags, 0, 0, 842 char*, char, name, 1, 0, 843 unsigned int, unsigned int, min_ar_index, 0, 0, 844 unsigned int, unsigned int, max_ar_index, 0, 0, 845 int, int, index_min, 0, 0, 846 int, int, index_max, 0, 0, 847 void*, void, buffer, 1, 0); 848 849 CINT_FWRAPPER_CREATE_RP3(int, int, 0, 0, 850 diag_fill_table, 851 int,int,unit,0,0, 852 char*,char,name,1,0, 853 uint32*,uint32,value,1,0); 854 855 CINT_FWRAPPER_CREATE_RP2(int, int, 0, 0, 856 diag_mbist, 857 int,int,unit,0,0, 858 int,int,skip_errors,0,0); 859 860 CINT_FWRAPPER_CREATE_RP5(int, int, 0, 0, 861 diag_mbist_ser_test, 862 int, int, unit, 0, 0, 863 int, int, skip_errors, 0, 0, 864 uint32, uint32, nof_repeats, 0, 0, 865 uint32, uint32, time_to_wait, 0, 0, 866 uint32, uint32, ser_test_num, 0, 0); 867 868 CINT_FWRAPPER_CREATE_RP1(int, int, 0, 0, 869 diag_modport2sysport, 870 int,int,unit,0,0); 871 872 CINT_FWRAPPER_CREATE_RP4(int, int, 0, 0, 873 diag_pointer, 874 int, int, unit, 0, 0, 875 char*, char, func_name, 1, 0, 876 void**, void, p, 2, 0, 877 char*, char, arg, 1, 0); 878 879 CINT_FWRAPPER_CREATE_RP5(int, int, 0, 0, 880 soc_direct_reg_get, 881 int,int,unit,0,0, 882 int,int,cmic_block,0,0, 883 uint32,uint32,addr,0,0, 884 uint32,uint32,dwc_read,0,0, 885 uint32*,uint32,data,1,0); 886 887 CINT_FWRAPPER_CREATE_RP5(int, int, 0, 0, 888 soc_direct_reg_set, 889 int,int,unit,0,0, 890 int,int,cmic_block,0,0, 891 uint32,uint32,addr,0,0, 892 uint32,uint32,dwc_write,0,0, 893 uint32*,uint32,data,1,0); 894 895 CINT_FWRAPPER_CREATE_RP6(int, int, 0, 0, 896 soc_direct_memreg_get, 897 int,int,unit,0,0, 898 int,int,cmic_block,0,0, 899 uint32,uint32,addr,0,0, 900 uint32,uint32,dwc_read,0,0, 901 int, int, is_mem, 0, 0, 902 uint32*,uint32,data,1,0); 903 904 CINT_FWRAPPER_CREATE_RP6(int, int, 0, 0, 905 soc_direct_memreg_set, 906 int,int,unit,0,0, 907 int,int,cmic_block,0,0, 908 uint32,uint32,addr,0,0, 909 uint32,uint32,dwc_write,0,0, 910 int, int, is_mem, 0, 0, 911 uint32*,uint32,data,1,0); 912 CINT_FWRAPPER_CREATE_RP6(int,int, 0, 0, 913 diag_get_interrupt_id_byname, 914 int,int,unit,0,0, 915 char *,char,regName, 1,0, 916 int,int,reg_index, 0,0, 917 char *,char,fldName, 1,0, 918 int,int,bit_in_field, 0,0, 919 int *,int,interrupt_id, 1,0); 920 921 922 #endif /* defined(BCM_SAND_SUPPORT) || defined(BCM_ESW_SUPPORT) */ 923 924 static cint_function_t __cint_diag_functions[] = 925 { 926 CINT_FWRAPPER_ENTRY(diag_printk), 927 CINT_FWRAPPER_ENTRY(diag_printk_int), 928 CINT_FWRAPPER_ENTRY(diag_pcie_read), 929 CINT_FWRAPPER_ENTRY(diag_pcie_write), 930 931 #if defined(BCM_SAND_SUPPORT) || defined(BCM_ESW_SUPPORT) 932 CINT_FWRAPPER_ENTRY(diag_reg_bits), 933 CINT_FWRAPPER_ENTRY(diag_reg_field_bits), 934 CINT_FWRAPPER_ENTRY(diag_reg_get), 935 CINT_FWRAPPER_ENTRY(diag_reg_field_get), 936 CINT_FWRAPPER_ENTRY(diag_reg_field_only_get), 937 CINT_FWRAPPER_ENTRY(diag_reg_set), 938 CINT_FWRAPPER_ENTRY(diag_reg_field_set), 939 CINT_FWRAPPER_ENTRY(diag_reg_field_only_set), 940 CINT_FWRAPPER_ENTRY(diag_mem_get), 941 CINT_FWRAPPER_ENTRY(diag_mem_field_get), 942 CINT_FWRAPPER_ENTRY(diag_mem_field_only_get), 943 CINT_FWRAPPER_ENTRY(diag_mem_set), 944 CINT_FWRAPPER_ENTRY(diag_mem_field_set), 945 CINT_FWRAPPER_ENTRY(diag_mem_field_only_set), 946 CINT_FWRAPPER_ENTRY(diag_soc_mem_read_range), 947 CINT_FWRAPPER_ENTRY(diag_soc_mem_write_range), 948 CINT_FWRAPPER_ENTRY(diag_mem_fill), 949 CINT_FWRAPPER_ENTRY(diag_mem_array_fill_range), 950 CINT_FWRAPPER_ENTRY(diag_fill_table), 951 CINT_FWRAPPER_ENTRY(diag_mbist), 952 CINT_FWRAPPER_ENTRY(diag_mbist_ser_test), 953 CINT_FWRAPPER_ENTRY(diag_modport2sysport), 954 CINT_FWRAPPER_ENTRY(diag_pointer), 955 CINT_FWRAPPER_ENTRY(soc_direct_reg_get), 956 CINT_FWRAPPER_ENTRY(soc_direct_reg_set), 957 CINT_FWRAPPER_ENTRY(soc_direct_memreg_get), 958 CINT_FWRAPPER_ENTRY(soc_direct_memreg_set), 959 CINT_FWRAPPER_ENTRY(diag_soc_device_reset), 960 CINT_FWRAPPER_ENTRY(diag_cm_get_unit_by_id), 961 CINT_FWRAPPER_ENTRY(diag_get_interrupt_id_byname), 962 963 #endif 964 965 CINT_ENTRY_LAST 966 }; 967 968 static cint_parameter_desc_t __cint_typedefs[] = 969 { 970 { 971 "uint32", 972 "reg_val", 973 0, 974 SOC_REG_ABOVE_64_MAX_SIZE_U32 975 }, 976 { 977 "uint32", 978 "mem_val", 979 0, 980 SOC_MAX_MEM_WORDS 981 }, 982 {NULL} 983 }; 984 985 static cint_constants_t __cint_diag_constants[] = 986 { 987 { "DIAG_PRINTK_FLAGS_HEX", DIAG_PRINTK_FLAGS_HEX }, 988 { NULL } 989 }; 990 991 cint_data_t diag_cint_data = 992 { 993 NULL, 994 __cint_diag_functions, 995 NULL, 996 NULL, 997 __cint_typedefs, 998 __cint_diag_constants, 999 NULL 1000 }; 1001 1002 #endif /* INCLUDE_LIB_CINT*/ 1003