cint_sdk_atomics.c (76566B)
1 /* 2 * 3 * 4 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 5 * 6 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 7 */ 8 #include "cint_sdk_atomics.h" 9 #include <cint_porting.h> 10 #include <cint_internal.h> 11 12 int cint_sdk_atomics_not_empty; 13 14 #ifdef INCLUDE_LIB_CINT 15 16 #include <sal/core/alloc.h> 17 #include <sal/core/libc.h> 18 #include <sal/appl/io.h> 19 #include <appl/diag/shell.h> 20 #include <appl/diag/parse.h> 21 #include <appl/diag/system.h> 22 #include <bcm/types.h> 23 #include <shared/util.h> 24 #ifdef INCLUDE_FCMAP 25 #include <shared/fcmap.h> 26 #endif 27 #include <bcm/error.h> 28 #include <bcm/stack.h> 29 #include <cint_error.h> 30 31 #include <bcm/rx.h> 32 #include <bcm/port.h> 33 #include <bcm/switch.h> 34 #ifdef INCLUDE_XFLOW_MACSEC 35 #include <bcm_int/common/xflow_macsec_cmn.h> 36 #endif 37 #ifdef CPRIMOD_SUPPORT 38 #include <shared/cpri.h> 39 #endif 40 41 /*********************************************************************** 42 * 43 * These are the atomic hand-coded type handlers for the SDK datatypes 44 * 45 * These structures are fed into the core cint library along 46 * with the autogenerated API data. 47 */ 48 49 static int 50 __cint_set_pbmp_t(void* p, const char* expr) 51 { 52 char tmp[64]; 53 char * s = tmp; 54 int port; 55 int c; 56 int open_brace, close_brace; 57 char *end; 58 bcm_pbmp_t* pp = (bcm_pbmp_t*)p; 59 60 BCM_PBMP_CLEAR(*pp); 61 s = tmp; 62 open_brace = close_brace = 0; 63 while((c=*expr++) != 0) { 64 switch (c) { 65 case '{': 66 open_brace++; 67 break; 68 69 case '}': 70 close_brace++; 71 /* fall through */ 72 case ' ': 73 /* convert non-empty integer port expression */ 74 *s = 0; 75 if (tmp[0]) { 76 port = sal_ctoi(tmp, &end); 77 if (*end != 0 || tmp == end || 78 port < 0 || port >= BCM_PBMP_PORT_MAX) { 79 return 1; 80 } 81 BCM_PBMP_PORT_ADD(*pp,port); 82 s = tmp; 83 } 84 break; 85 86 default: 87 /* copy */ 88 if ((s-tmp) < (sizeof(tmp)-1)) { 89 *s++ = c; 90 } else { 91 /* tmp overflow */ 92 return 1; 93 } 94 break; 95 } 96 } 97 return !(open_brace == 1 && close_brace == 1); 98 } 99 100 static int 101 __cint_format_pbmp_t(void* p, char* dst, int size, cint_atomic_format_t format) 102 { 103 bcm_pbmp_t* pp = (bcm_pbmp_t*)p; 104 int port; 105 106 cint_snprintf_ex(&dst, &size, "{ "); 107 BCM_PBMP_ITER((*pp), port) { 108 cint_snprintf_ex(&dst, &size, "%d ", port); 109 } 110 cint_snprintf_ex(&dst, &size, "}"); 111 return 0; 112 } 113 114 static int 115 __cint_set_bcm_mac_t(void* p, const char* expr) 116 { 117 bcm_mac_t m = { 0, 0, 0, 0, 0, 0 }; 118 char buffer[16] = "0x"; 119 120 const char* s = expr; 121 char* d = buffer+2; 122 int i = 0; 123 char *end; 124 125 for(s = expr;; s++) { 126 if(*s == ':' || *s == 0) { 127 if(i <= 5) { 128 m[i++] = sal_ctoi(buffer, &end); 129 if (*end != 0 || buffer == end) { 130 return 1; 131 } 132 } 133 d = buffer+2; 134 if(*s == 0) { 135 break; 136 } 137 } 138 else { 139 *d++ = *s; 140 } 141 } 142 143 144 CINT_MEMCPY(p, m, sizeof(m)); 145 return 0; 146 } 147 148 static int 149 __cint_format_bcm_mac_t(void* p, char* dst, int size, cint_atomic_format_t format) 150 { 151 unsigned char* m = (unsigned char*) p; 152 cint_snprintf_ex(&dst, &size, "%.2X:%.2X:%.2X:%.2X:%.2X:%.2X", 153 m[0], m[1], m[2], m[3], m[4], m[5]); 154 return 0; 155 } 156 157 158 static int 159 __cint_set_uint64(void* p, const char* expr) 160 { 161 uint64* u64 = (uint64*)p; 162 char slo[16] = { 0 }; 163 char shi[16] = { 0 }; 164 165 const char* s; 166 char* d; 167 char *end; 168 169 /* 170 * Format: "number" -- sets low 171 * Format: "number:number" -- sets hi and low 172 */ 173 uint32 lo = 0; 174 uint32 hi = 0; 175 176 d = shi; 177 for(s = expr; *s; s++) { 178 if(*s == ':' || *s == ',' || *s == ' ') { 179 *d = 0; 180 d = slo; 181 } 182 else { 183 *d++ = *s; 184 } 185 } 186 *d = 0; 187 188 if(slo[0] && shi[0]) { 189 /* Both specifier */ 190 lo = sal_ctoi(slo, &end); 191 if (*end != 0 || slo == end) { 192 return 1; 193 } 194 hi = sal_ctoi(shi, &end); 195 if (*end != 0 || shi == end) { 196 return 1; 197 } 198 } 199 else { 200 lo = sal_ctoi(shi, &end); 201 if (*end != 0 || shi == end) { 202 return 1; 203 } 204 hi = 0; 205 } 206 207 COMPILER_64_SET(*u64, hi, lo); 208 return 0; 209 } 210 211 static int 212 __cint_format_uint64(void* p, char* dst, int size, cint_atomic_format_t format) 213 { 214 uint64* u64 = (uint64*)p; 215 uint32 hi; 216 uint32 lo; 217 COMPILER_64_TO_32_LO(lo, *u64); 218 COMPILER_64_TO_32_HI(hi, *u64); 219 cint_snprintf_ex(&dst, &size, "{0x%.8X 0x%.8X}", hi, lo); 220 return 0; 221 } 222 223 224 static int 225 __cint_format_bcm_rx_reasons_t(void* p, char* dst, int size, cint_atomic_format_t format) 226 { 227 bcm_rx_reason_t r; 228 bcm_rx_reasons_t* rs = (bcm_rx_reasons_t*) p; 229 static char* rnames[] = BCM_RX_REASON_NAMES_INITIALIZER; 230 231 if(BCM_RX_REASON_IS_NULL(*rs)) { 232 cint_snprintf_ex(&dst, &size, "None"); 233 } 234 else { 235 /* coverity [mixed_enums] */ 236 BCM_RX_REASON_ITER((*rs), r) { 237 cint_snprintf_ex(&dst, &size, "%s ", rnames[r]); 238 } 239 } 240 return 0; 241 } 242 243 static int 244 __cint_set_bcm_rx_reasons_t(void* p, const char* expr) 245 { 246 return -1; 247 } 248 249 static int 250 __cint_format_bcm_ip_t(void *p, char *dst, int size, 251 cint_atomic_format_t format) 252 { 253 bcm_ip_t *ipp = (bcm_ip_t *)p; 254 255 cint_snprintf_ex(&dst, &size, "%d.%d.%d.%d", 256 (*ipp >> 24) & 0xFF, 257 (*ipp >> 16) & 0xFF, 258 (*ipp >> 8) & 0xFF, 259 *ipp & 0xFF); 260 return 0; 261 } 262 263 static int 264 __cint_set_bcm_ip_t(void *p, const char *expr) 265 { 266 ip_addr_t *ipp = (ip_addr_t *)p; 267 268 return parse_ipaddr((char *)expr, ipp); 269 } 270 271 static int 272 __cint_format_bcm_ip6_t(void *p, char *dst, int size, 273 cint_atomic_format_t format) 274 { 275 uint8 *ipaddr = p; 276 277 cint_snprintf_ex(&dst, &size, "%04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x", 278 (((uint16)ipaddr[0] << 8) | ipaddr[1]), 279 (((uint16)ipaddr[2] << 8) | ipaddr[3]), 280 (((uint16)ipaddr[4] << 8) | ipaddr[5]), 281 (((uint16)ipaddr[6] << 8) | ipaddr[7]), 282 (((uint16)ipaddr[8] << 8) | ipaddr[9]), 283 (((uint16)ipaddr[10] << 8) | ipaddr[11]), 284 (((uint16)ipaddr[12] << 8) | ipaddr[13]), 285 (((uint16)ipaddr[14] << 8) | ipaddr[15])); 286 return 0; 287 } 288 289 static int 290 __cint_set_bcm_ip6_t(void *p, const char *expr) 291 { 292 return parse_ip6addr((char *)expr, p); 293 } 294 295 /* 296 * This is the exported table for our datatypes 297 */ 298 cint_atomic_type_t cint_sdk_atomics[] = 299 { 300 { 301 "uint64", 302 sizeof(uint64), 303 0, 304 __cint_format_uint64, 305 __cint_set_uint64 306 }, 307 { 308 "int64", 309 sizeof(uint64), 310 0, 311 __cint_format_uint64, 312 __cint_set_uint64 313 }, 314 { 315 "bcm_pbmp_t", 316 sizeof(bcm_pbmp_t), 317 0, 318 __cint_format_pbmp_t, 319 __cint_set_pbmp_t, 320 }, 321 { 322 "bcm_mac_t", 323 sizeof(bcm_mac_t), 324 CINT_ATOMIC_TYPE_F_CAP_ONLY, 325 __cint_format_bcm_mac_t, 326 __cint_set_bcm_mac_t, 327 }, 328 { 329 "bcm_rx_reasons_t", 330 sizeof(bcm_rx_reasons_t), 331 0, 332 __cint_format_bcm_rx_reasons_t, 333 __cint_set_bcm_rx_reasons_t, 334 }, 335 { 336 "bcm_ip_t", 337 sizeof(bcm_ip_t), 338 CINT_ATOMIC_TYPE_F_CAP_ONLY, 339 __cint_format_bcm_ip_t, 340 __cint_set_bcm_ip_t, 341 }, 342 { 343 "bcm_ip6_t", 344 sizeof(bcm_ip6_t), 345 CINT_ATOMIC_TYPE_F_CAP_ONLY, 346 __cint_format_bcm_ip6_t, 347 __cint_set_bcm_ip6_t, 348 }, 349 { NULL }, 350 }; 351 352 353 static char* __macro__bcm_errmsg(int rc) 354 { 355 return bcm_errmsg(rc); 356 } 357 CINT_FWRAPPER_CREATE_RP1(char*,char,1,0, 358 __macro__bcm_errmsg, 359 int,int,rc,0,0); 360 361 static cint_function_t __cint_sdk_functions[] = 362 { 363 CINT_FWRAPPER_NENTRY("bcm_errmsg", __macro__bcm_errmsg), 364 CINT_ENTRY_LAST 365 }; 366 367 368 369 static cint_parameter_desc_t __cint_sdk_typedefs[] = 370 { 371 { "int", "bcm_port_mdix_t", 0, 0 }, 372 { "unsigned char", "uint8", 0, 0 }, 373 { "char", "int8", 0, 0 }, 374 { "char", "int8_t", 0, 0 }, 375 { "short", "int16", 0, 0 }, 376 { "short", "int16_t", 0, 0 }, 377 { "unsigned short", "uint16", 0, 0 }, 378 { "unsigned int", "uint32", 0, 0 }, 379 { "int", "int32", 0, 0 }, 380 { "uint32", "SHR_BITDCL", 0, 0 }, 381 { "bcm_pbmp_t", "soc_pbmp_t", 0, 0 }, 382 { "bcm_cos_t", "soc_cos_t", 0, 0 }, 383 { "bcm_mac_t", "const bcm_mac_t", 0, 0 }, 384 385 /* 386 * These are "broken" API definitions. 387 * Enumerations and structures are defined in <shared> and 388 * #defined or typedef'ed to the BCM API equivalents. 389 * 390 * The structures are defined here by hand. 391 * The enumerations are just typed as "int". The enumeration names are not available. 392 */ 393 { "int", "_shr_module_t", 0, 0 }, 394 { "int", "_shr_port_mode_t", 0, 0 }, 395 { "int", "_shr_pa_encap_t", 0, 0 }, 396 { "int", "_shr_port_mdix_t", 0, 0 }, 397 { "int", "_shr_port_mdix_status_t", 0, 0 }, 398 { "int", "_shr_dma_chan_t", 0, 0 }, 399 { "int", "_shr_port_stp_t", 0, 0 }, 400 { "int", "_shr_port_phy_control_t", 0, 0 }, 401 { "int", "_shr_port_cable_state_t", 0, 0 }, 402 { "int", "_shr_port_encap_t", 0, 0 }, 403 { "int", "_shr_port_mcast_flood_t", 0, 0 }, 404 { "int", "_shr_port_medium_t", 0, 0 }, 405 { "int", "_shr_port_duplex_t", 0, 0 }, 406 { "int", "_shr_port_if_t", 0, 0 }, 407 { "int", "_shr_port_ms_t", 0, 0 }, 408 { "int", "_shr_port_prbs_polynomial_t", 0, 0 }, 409 #ifdef INCLUDE_FCMAP 410 { "int", "_SHR_BFCMAP_DIR_EGRESS", 0, 0 }, 411 { "int", "_SHR_BFCMAP_DIR_INGRESS", 0, 0 }, 412 { "int", "_SHR_BFCMAP_CORE_UNKNOWN", 0, 0 }, 413 { "int", "_SHR_BFCMAP_CORE_OCTAL_GIG", 0, 0 }, 414 { "int", "_SHR_BFCMAP_CORE_BCM5458X", 0, 0 }, 415 { "int", "_SHR_BFCMAP_CORE_BCM5458X_B0", 0, 0 }, 416 { "int", "_SHR_BFCMAP_CORE_BCM8729", 0, 0 }, 417 { "int", "_SHR_BFCMAP_CORE_BCM8483X", 0, 0 }, 418 { "int", "_SHR_BFCMAP_CORE_BCM5438X", 0, 0 }, 419 { "int", "_SHR_BFCMAP_CORE_BCM84756", 0, 0 }, 420 { "int", "_SHR_BFCMAP_CORE_BCM88060_A0", 0, 0 }, 421 { "int", "_SHR_BFCMAP_CORE_BCM88061_A0", 0, 0 }, 422 { "int", "_SHR_BFCMAP_FCOE_TO_FC_MODE", 0, 0 }, 423 { "int", "_SHR_BFCMAP_FCOE_TO_FCOE_MODE", 0, 0 }, 424 { "int", "_SHR_BFCMAP_PORT_SPEED_AN", 0, 0 }, 425 { "int", "_SHR_BFCMAP_PORT_SPEED_2GBPS", 0, 0 }, 426 { "int", "_SHR_BFCMAP_PORT_SPEED_4GBPS", 0, 0 }, 427 { "int", "_SHR_BFCMAP_PORT_SPEED_8GBPS", 0, 0 }, 428 { "int", "_SHR_BFCMAP_PORT_SPEED_16GBPS", 0, 0 }, 429 { "int", "_SHR_BFCMAP_PORT_SPEED_32GBPS", 0, 0 }, 430 { "int", "_SHR_BFCMAP_PORT_SPEED_AN_2GBPS", 0, 0 }, 431 { "int", "_SHR_BFCMAP_PORT_SPEED_AN_4GBPS", 0, 0 }, 432 { "int", "_SHR_BFCMAP_PORT_SPEED_AN_8GBPS", 0, 0 }, 433 { "int", "_SHR_BFCMAP_PORT_SPEED_AN_16GBPS", 0, 0 }, 434 { "int", "_SHR_BFCMAP_PORT_SPEED_AN_32GBPS", 0, 0 }, 435 { "int", "_SHR_BFCMAP_PORT_SPEED_MAX_COUNT", 0, 0 }, 436 { "int", "_SHR_BFCMAP_PORT_STATE_INIT", 0, 0 }, 437 { "int", "_SHR_BFCMAP_PORT_STATE_RESET", 0, 0 }, 438 { "int", "_SHR_BFCMAP_PORT_STATE_ACTIVE", 0, 0 }, 439 { "int", "_SHR_BFCMAP_PORT_STATE_LINKDOWN", 0, 0 }, 440 { "int", "_SHR_BFCMAP_PORT_STATE_DISABLE", 0, 0 }, 441 { "int", "_SHR_BFCMAP_PORT_STATE_MAX_COUNT", 0, 0 }, 442 { "int", "_SHR_BFCMAP_EVENT_FC_LINK_INIT", 0, 0 }, 443 { "int", "_SHR_BFCMAP_EVENT_FC_LINK_RESET", 0, 0 }, 444 { "int", "_SHR_BFCMAP_EVENT_FC_LINK_DOWN", 0, 0 }, 445 { "int", "_SHR_BFCMAP_EVENT_FC_R_T_TIMEOUT", 0, 0 }, 446 { "int", "_SHR_BFCMAP_EVENT_FC_E_D_TIMEOUT", 0, 0 }, 447 { "int", "_SHR_BFCMAP_EVENT__COUNT", 0, 0 }, 448 { "int", "_SHR_BFCMAP_ENCAP_FCOE_FPMA", 0, 0 }, 449 { "int", "_SHR_BFCMAP_ENCAP_FCOE_ETH_ADDRESS_NULL", 0, 0 }, 450 { "int", "_SHR_BFCMAP_ENCAP_FCOE_ETH_ADDRESS_USER", 0, 0 }, 451 { "int", "_SHR_BFCMAP_LF_TR_NONE", 0, 0 }, 452 { "int", "_SHR_BFCMAP_LF_TR_PORT_INIT", 0, 0 }, 453 { "int", "_SHR_BFCMAP_LF_TR_OPEN_LINK", 0, 0 }, 454 { "int", "_SHR_BFCMAP_LF_TR_LINK_FAILURE", 0, 0 }, 455 { "int", "_SHR_BFCMAP_LF_TR_OLS_RCVD", 0, 0 }, 456 { "int", "_SHR_BFCMAP_LF_TR_NOS_RCVD", 0, 0 }, 457 { "int", "_SHR_BFCMAP_LF_TR_SYNC_LOSS", 0, 0 }, 458 { "int", "_SHR_BFCMAP_LF_TR_BOUCELINK_FROM_ADMIN", 0, 0 }, 459 { "int", "_SHR_BFCMAP_LF_TR_CHGSPEED_FROM_ADMIN", 0, 0 }, 460 { "int", "_SHR_BFCMAP_LF_TR_DISABLE_FROM_ADMIN", 0, 0 }, 461 { "int", "_SHR_BFCMAP_LF_TR_RESET_FROM_ADMIN", 0, 0 }, 462 { "int", "_SHR_BFCMAP_LF_TR_LR_RCVD", 0, 0 }, 463 { "int", "_SHR_BFCMAP_LF_TR_LRR_RCVD", 0, 0 }, 464 { "int", "_SHR_BFCMAP_LF_TR_ED_TOV", 0, 0 }, 465 { "int", "_SHR_BFCMAP_LF_TR_SYS_LNK_FAILURE", 0, 0 }, 466 { "int", "_SHR_BFCMAP_LF_RC_NONE", 0, 0 }, 467 { "int", "_SHR_BFCMAP_LF_RC_PORT_INIT", 0, 0 }, 468 { "int", "_SHR_BFCMAP_LF_RC_OPEN_LINK", 0, 0 }, 469 { "int", "_SHR_BFCMAP_LF_RC_LINK_FAILURE", 0, 0 }, 470 { "int", "_SHR_BFCMAP_LF_RC_OLS_RCVD", 0, 0 }, 471 { "int", "_SHR_BFCMAP_LF_RC_NOS_RCVD", 0, 0 }, 472 { "int", "_SHR_BFCMAP_LF_RC_SYNC_LOSS", 0, 0 }, 473 { "int", "_SHR_BFCMAP_LF_RC_BOUCELINK_FROM_ADMIN", 0, 0 }, 474 { "int", "_SHR_BFCMAP_LF_RC_CHGSPEED_FROM_ADMIN", 0, 0 }, 475 { "int", "_SHR_BFCMAP_LF_RC_DISABLE_FROM_ADMIN", 0, 0 }, 476 { "int", "_SHR_BFCMAP_LF_RC_RESET_FAILURE", 0, 0 }, 477 { "int", "_SHR_BFCMAP_LF_RC_SYS_LINK_FAILURE", 0, 0 }, 478 { "int", "_SHR_BFCMAP_DIAG_OK", 0, 0 }, 479 { "int", "_SHR_BFCMAP_DIAG_PORT_INIT", 0, 0 }, 480 { "int", "_SHR_BFCMAP_DIAG_OPEN_LINK", 0, 0 }, 481 { "int", "_SHR_BFCMAP_DIAG_LINK_FAILURE", 0, 0 }, 482 { "int", "_SHR_BFCMAP_DIAG_OLS_RCVD", 0, 0 }, 483 { "int", "_SHR_BFCMAP_DIAG_NOS_RCVD", 0, 0 }, 484 { "int", "_SHR_BFCMAP_DIAG_SYNC_LOSS", 0, 0 }, 485 { "int", "_SHR_BFCMAP_DIAG_BOUCELINK_FROM_ADMIN", 0, 0 }, 486 { "int", "_SHR_BFCMAP_DIAG_CHGSPEED_FROM_ADMIN", 0, 0 }, 487 { "int", "_SHR_BFCMAP_DIAG_DISABLE_FROM_ADMIN", 0, 0 }, 488 { "int", "_SHR_BFCMAP_DIAG_AN_NO_SIGNAL", 0, 0 }, 489 { "int", "_SHR_BFCMAP_DIAG_AN_TIMEOUT", 0, 0 }, 490 { "int", "_SHR_BFCMAP_DIAG_PROTO_TIMEOUT", 0, 0 }, 491 { "int", "_SHR_BFCMAP_DIAG_SYS_LNK_FAILURE", 0, 0 }, 492 { "int", "_SHR_FCMAP_PORT_ABILITY_SPEED_AN", 0, 0 }, 493 { "int", "_SHR_FCMAP_PORT_ABILITY_SPEED_2GBPS", 0, 0 }, 494 { "int", "_SHR_FCMAP_PORT_ABILITY_SPEED_4GBPS", 0, 0 }, 495 { "int", "_SHR_FCMAP_PORT_ABILITY_SPEED_8GBPS", 0, 0 }, 496 { "int", "_SHR_FCMAP_PORT_ABILITY_SPEED_16GBPS", 0, 0 }, 497 { "int", "_SHR_FCMAP_PORT_ABILITY_SPEED_32GBPS", 0, 0 }, 498 { "int", "_SHR_FCMAP_PORT_SCRAMBLING_SPEED_2GBPS", 0, 0 }, 499 { "int", "_SHR_FCMAP_PORT_SCRAMBLING_SPEED_4GBPS", 0, 0 }, 500 { "int", "_SHR_FCMAP_PORT_SCRAMBLING_SPEED_8GBPS", 0, 0 }, 501 { "int", "_SHR_FCMAP_PORT_SCRAMBLING_SPEED_16GBPS", 0, 0 }, 502 { "int", "_SHR_FCMAP_PORT_SCRAMBLING_SPEED_32GBPS", 0, 0 }, 503 { "int", "_shr_bfcmap_dir_t", 0, 0 }, 504 { "int", "_shr_bfcmap_core_t", 0, 0 }, 505 { "int", "_shr_bfcmap_port_mode_t", 0, 0 }, 506 { "int", "_shr_bfcmap_port_speed_t", 0, 0 }, 507 { "int", "_shr_bfcmap_port_state_t", 0, 0 }, 508 { "int", "_shr_bfcmap_8g_fw_on_active_t", 0, 0 }, 509 { "int", "_shr_bfcmap_map_table_input_t", 0, 0 }, 510 { "int", "_shr_bfcmap_map_table_input_t", 0, 0 }, 511 { "int", "_shr_bfcmap_fc_crc_mode_t", 0, 0 }, 512 { "int", "_shr_bfcmap_fc_crc_mode_t", 0, 0 }, 513 { "int", "_shr_bfcmap_vfthdr_proc_mode_t", 0, 0 }, 514 { "int", "_shr_bfcmap_vfthdr_proc_mode_t", 0, 0 }, 515 { "int", "_shr_bfcmap_vlantag_proc_mode_t", 0, 0 }, 516 { "int", "_shr_bfcmap_vlantag_proc_mode_t", 0, 0 }, 517 { "int", "_shr_bfcmap_vfid_mapsrc_t", 0, 0 }, 518 { "int", "_shr_bfcmap_vfid_mapsrc_t", 0, 0 }, 519 { "int", "_shr_bfcmap_vid_mapsrc_t", 0, 0 }, 520 { "int", "_shr_bfcmap_vid_mapsrc_t", 0, 0 }, 521 { "int", "_shr_bfcmap_vlan_pri_map_mode_t", 0, 0 }, 522 { "int", "_shr_bfcmap_vlan_pri_map_mode_t", 0, 0 }, 523 { "int", "_shr_bfcmap_hopcnt_check_mode_t", 0, 0 }, 524 { "uint32", "_shr_bfcmap_dev_addr_t", 0, 0 }, 525 { "uint8", "_shr_bmac_addr_t", 6, 1 }, 526 { "uint8", "_shr_bfcmap_wwn_t", 6, 1 }, 527 { "uint8", "_shr_bfcmap_nportid_t", 0, 0 }, 528 { "uint32", "_shr_bfcmap_pa_speed_t", 0, 0 }, 529 #endif 530 #if _SHR_PBMP_WIDTH == 0 531 { "uint32", "_shr_pbmp_t", 0, 0 }, 532 #endif 533 { "uint8", "uint8_t", 0, 0 }, 534 { "uint16", "uint16_t", 0, 0 }, 535 { "uint32", "uint32_t", 0, 0 }, 536 { "int32", "int32_t", 0, 0 }, 537 #ifdef INCLUDE_XFLOW_MACSEC 538 { "uint32", "xflow_macsec_secure_chan_id_t", 0, 0 }, 539 { "int", "XFLOW_MACSEC_CRYPTO_NONE", 0, 0 }, 540 { "int", "XFLOW_MACSEC_CRYPTO_AES_128_GCM", 0, 0 }, 541 { "int", "XFLOW_MACSEC_CRYPTO__COUNT", 0, 0 }, 542 { "int", "xflowMacsecCryptoAes128GcmIntegrityOnly", 0, 0 }, 543 { "int", "xflowMacsecCryptoAes128Gcm", 0, 0 }, 544 { "int", "xflowMacsecCryptoAes128GcmXpnIntegrityOnly", 0, 0 }, 545 { "int", "xflowMacsecCryptoAes128GcmXpn", 0, 0 }, 546 { "int", "xflowMacsecCryptoCount", 0, 0 }, 547 { "int", "xflowMacsecMtu0", 0, 0 }, 548 { "int", "xflowMacsecMtu1", 0, 0 }, 549 { "int", "xflowMacsecMtu2", 0, 0 }, 550 { "int", "xflowMacsecMtu3", 0, 0 }, 551 { "int", "xflowMacsecMtuCount", 0, 0 }, 552 { "int", "xflowMacsecSecTagEtype0", 0, 0 }, 553 { "int", "xflowMacsecSecTagEtype1", 0, 0 }, 554 { "int", "xflowMacsecSecTagEtype2", 0, 0 }, 555 { "int", "xflowMacsecSecTagEtype3", 0, 0 }, 556 { "int", "xflowMacsecSecTagEtypeCount", 0, 0 }, 557 { "int", "xflow_macsec_crypto_t", 0, 0 }, 558 { "int", "xflow_macsec_mtu_t", 0, 0 }, 559 { "int", "xflow_macsec_sectag_ethertype_t", 0, 0 }, 560 { "uint32", "xflow_macsec_secure_chan_id_t", 0, 0 }, 561 { "uint32", "xflow_macsec_secure_assoc_num_t", 0, 0 }, 562 { "uint32", "xflow_macsec_secure_assoc_id_t", 0, 0 }, 563 { "int", "xflowMacsecSecureAssocAnNormal", 0, 0 }, 564 { "int", "xflowMacsecSecureAssocAnRollover", 0, 0 }, 565 { "int", "xflowMacsecSecureAssocAnAuto", 0, 0 }, 566 { "int", "xflowMacsecSecureAssocAnCount", 0, 0 }, 567 { "int", "xflow_macsec_secure_assoc_an_control_t", 0, 0 }, 568 { "uint32", "xflow_macsec_policy_id_t", 0, 0 }, 569 { "uint32", "xflow_macsec_flow_id_t", 0, 0 }, 570 { "uint32", "xflow_macsec_instance_id_t", 0, 0 }, 571 { "uint32", "xflow_macsec_flow_info_t", 0, 0 }, 572 { "uint32", "xflow_macsec_mac_addr_info_t", 0, 0 }, 573 { "int", "xflowMacsecDecyptFlowAny", 0, 0 }, 574 { "int", "xflowMacsecDecyptFlowNonMacsec", 0, 0 }, 575 { "int", "xflowMacsecDecyptFlowMacSec", 0, 0 }, 576 { "int", "xflowMacsecDecyptFlowManagement", 0, 0 }, 577 { "int", "xflowMacsecDecyptFlowKay", 0, 0 }, 578 { "int", "xflowMacsecDecyptFlowCount", 0, 0 }, 579 { "int", "xflowMacsecFlowEtypeAny", 0, 0 }, 580 { "int", "xflowMacsecFlowEtypeEII", 0, 0 }, 581 { "int", "xflowMacsecFlowEtypeSnap", 0, 0 }, 582 { "int", "xflowMacsecFlowEtypeLlc", 0, 0 }, 583 { "int", "xflowMacsecFlowEtypeMpls", 0, 0 }, 584 { "int", "xflowMacsecFlowEtypeCount", 0, 0 }, 585 { "uint32", "xflow_macsec_subport_num_t", 0, 0 }, 586 { "int", "xflow_macsec_flow_pkt_type_t", 0, 0 }, 587 { "int", "xflow_macsec_flow_etype_t", 0, 0 }, 588 { "int", "xflowMacsecTagAny", 0, 0 }, 589 { "int", "xflowMacsecTagUntaggedVlan", 0, 0 }, 590 { "int", "xflowMacsecTagSingleVlan", 0, 0 }, 591 { "int", "xflowMacsecTagDoubleVlan", 0, 0 }, 592 { "int", "xflowMacsecTagOneMplsLabel", 0, 0 }, 593 { "int", "xflowMacsecTagTwoMplsLabel", 0, 0 }, 594 { "int", "xflowMacsecTagThreeMplsLabel", 0, 0 }, 595 { "int", "xflowMacsecTagCount", 0, 0 }, 596 { "int", "xflow_macsec_vlan_mpls_tag_status_t", 0, 0 }, 597 { "int", "xflowMacsecControlDecryptPadThreshold", 0, 0 }, 598 { "int", "xflowMacsecControlDecryptSectagC1E0Error", 0, 0 }, 599 { "int", "xflowMacsecControlDecryptFailSwitchToCpu", 0, 0 }, 600 { "int", "xflowMacsecControlEncryptFailSwitchToCpu", 0, 0 }, 601 { "int", "xflowMacsecControlCount", 0, 0 }, 602 { "int", "xflow_macsec_control_t", 0, 0 }, 603 { "int", "xflow_macsec_mac_addr_control_t", 0, 0 }, 604 { "int", "xflowMacsecStatTypeInvalid", 0, 0 }, 605 { "int", "xflowMacsecUnctrlPortInOctets", 0, 0 }, 606 { "int", "xflowMacsecUnctrlPortInUcastPkts", 0, 0 }, 607 { "int", "xflowMacsecUnctrlPortInMulticastPkts", 0, 0 }, 608 { "int", "xflowMacsecUnctrlPortInBroadcastPkts", 0, 0 }, 609 { "int", "xflowMacsecUnctrlPortInDiscards", 0, 0 }, 610 { "int", "xflowMacsecUnctrlPortOutOctets", 0, 0 }, 611 { "int", "xflowMacsecUnctrlPortOutUcastPkts", 0, 0 }, 612 { "int", "xflowMacsecUnctrlPortOutMulticastPkts", 0, 0 }, 613 { "int", "xflowMacsecUnctrlPortOutBroadcastPkts", 0, 0 }, 614 { "int", "xflowMacsecUnctrlPortOutErrors", 0, 0 }, 615 { "int", "xflowMacsecCtrlPortInOctets", 0, 0 }, 616 { "int", "xflowMacsecCtrlPortInUcastPkts", 0, 0 }, 617 { "int", "xflowMacsecCtrlPortInMulticastPkts", 0, 0 }, 618 { "int", "xflowMacsecCtrlPortInBroadcastPkts", 0, 0 }, 619 { "int", "xflowMacsecCtrlPortInDiscards", 0, 0 }, 620 { "int", "xflowMacsecCtrlPortInErrors", 0, 0 }, 621 { "int", "xflowMacsecCtrlPortOutOctets", 0, 0 }, 622 { "int", "xflowMacsecCtrlPortOutUcastPkts", 0, 0 }, 623 { "int", "xflowMacsecCtrlPortOutMulticastPkts", 0, 0 }, 624 { "int", "xflowMacsecCtrlPortOutBroadcastPkts", 0, 0 }, 625 { "int", "xflowMacsecCtrlPortOutErrors", 0, 0 }, 626 { "int", "xflowMacsecSecyStatsTxUntaggedPkts", 0, 0 }, 627 { "int", "xflowMacsecSecyStatsTxTooLongPkts", 0, 0 }, 628 { "int", "xflowMacsecSecyStatsRxUntaggedPkts", 0, 0 }, 629 { "int", "xflowMacsecSecyStatsRxNoTagPkts", 0, 0 }, 630 { "int", "xflowMacsecSecyStatsRxBadTagPkts", 0, 0 }, 631 { "int", "xflowMacsecSecyStatsRxUnknownSCIPkts", 0, 0 }, 632 { "int", "xflowMacsecSecyStatsRxNoSCIPkts", 0, 0 }, 633 { "int", "xflowMacsecSecyStatsRxOverrunPkts", 0, 0 }, 634 { "int", "xflowMacsecSecyTxSCStatsProtectedPkts", 0, 0 }, 635 { "int", "xflowMacsecSecyTxSCStatsEncryptedPkts", 0, 0 }, 636 { "int", "xflowMacsecSecyTxSCStatsOctetsProtected", 0, 0 }, 637 { "int", "xflowMacsecSecyTxSCStatsOctetsEncrypted", 0, 0 }, 638 { "int", "xflowMacsecSecyRxSCStatsUnusedSAPkts", 0, 0 }, 639 { "int", "xflowMacsecSecyRxSCStatsNotUsingSAPkts", 0, 0 }, 640 { "int", "xflowMacsecSecyRxSCStatsLatePkts", 0, 0 }, 641 { "int", "xflowMacsecSecyRxSCStatsNotValidPkts", 0, 0 }, 642 { "int", "xflowMacsecSecyRxSCStatsInvalidPkts", 0, 0 }, 643 { "int", "xflowMacsecSecyRxSCStatsDelayedPkts", 0, 0 }, 644 { "int", "xflowMacsecSecyRxSCStatsUncheckedPkts", 0, 0 }, 645 { "int", "xflowMacsecSecyRxSCStatsOKPkts", 0, 0 }, 646 { "int", "xflowMacsecSecyRxSCStatsOctetsValidated", 0, 0 }, 647 { "int", "xflowMacsecSecyRxSCStatsOctetsValidated", 0, 0 }, 648 { "int", "xflowMacsecSecyRxSCStatsOctetsDecrypted", 0, 0 }, 649 { "int", "xflowMacsecSecyTxSAStatsProtectedPkts", 0, 0 }, 650 { "int", "xflowMacsecSecyTxSAStatsEncryptedPkts", 0, 0 }, 651 { "int", "xflowMacsecSecyRxSAStatsUnusedSAPkts", 0, 0 }, 652 { "int", "xflowMacsecSecyRxSAStatsNotUsingSAPkts", 0, 0 }, 653 { "int", "xflowMacsecSecyRxSAStatsNotValidPkts", 0, 0 }, 654 { "int", "xflowMacsecSecyRxSAStatsInvalidPkts", 0, 0 }, 655 { "int", "xflowMacsecSecyRxSAStatsOKPkts", 0, 0 }, 656 { "int", "xflowMacsecInMgmtPkts", 0, 0 }, 657 { "int", "xflowMacsecFlowTcamHitCntr", 0, 0 }, 658 { "int", "xflowMacsecFlowTcamMissCntr", 0, 0 }, 659 { "int", "xflowMacsecScTcamHitCntr", 0, 0 }, 660 { "int", "xflowMacsecScTcamMissCntr", 0, 0 }, 661 { "int", "xflowMacsecOutMgmtPkts", 0, 0 }, 662 { "int", "xflowMacsecInPacketDropCntr", 0, 0 }, 663 { "int", "xflowMacsecOutPacketDropCntr", 0, 0 }, 664 { "int", "xflowMacsecBadOlpHdrCntr", 0, 0 }, 665 { "int", "xflowMacsecStatTypeCount", 0, 0 }, 666 { "int", "xflow_macsec_stat_type_t", 0, 0 }, 667 { "uint32", "xflow_macsec_id_t", 0, 0 }, 668 #endif 669 #ifdef CPRIMOD_SUPPORT 670 { "int", "_shr_cpri_hdlc_crc_byte_order_t", 0, 0 }, 671 { "int", "_shr_cpri_hdlc_fcs_err_check_t", 0, 0 }, 672 { "int", "_shr_cpri_hdlc_fcs_size_t", 0, 0 }, 673 { "int", "_shr_cpri_hdlc_filling_flag_pattern_t", 0, 0 }, 674 { "int", "_shr_cpri_hdlc_flag_size_t", 0, 0 }, 675 { "int", "_shr_cpri_hdlc_crc_mode_t", 0, 0 }, 676 { "int", "_shr_cpri_hdlc_crc_init_val_t", 0, 0 }, 677 { "int", "_shr_cpri_vsd_control_subchan_num_bytes_t", 0, 0 }, 678 { "int", "_shr_cpri_vsd_control_flow_num_bytes_t", 0, 0 }, 679 { "int", "_shr_cpri_vsd_control_subchan_size_t", 0, 0 }, 680 { "int", "_shr_cpri_cw_filter_mode_t", 0, 0 }, 681 { "int", "_shr_vsd_raw_map_mode_t", 0, 0 }, 682 { "int", "_shr_cpri_gcw_mask_t", 0, 0 }, 683 { "int", "_shr_rsvd4_control_msg_proc_type_t", 0, 0 }, 684 { "int", "_shr_cpri_tag_option_t", 0, 0 }, 685 { "int", "_shr_rsvd4_sync_count_cycle_t", 0, 0 }, 686 { "int", "_shr_rsvd4_crc_option_t", 0, 0 }, 687 { "int", "_shr_rsvd4_msg_ts_mode_t", 0, 0 }, 688 { "int", "_shr_cpri_1588_capture_mode_t", 0, 0 }, 689 { "int", "_shr_cpri_dir_t", 0, 0 }, 690 { "int", "_shr_cpri_interrupt_type_t", 0, 0 }, 691 { "int", "_shr_cpri_roe_payload_multiple_t", 0, 0 }, 692 { "int", "_shr_cpri_presentation_ts_attribute_t", 0, 0 }, 693 { "int", "_shr_cpri_frame_sync_mode_t", 0, 0 }, 694 { "int", "_shr_cpri_1588_ts_type_t", 0, 0 }, 695 { "int", "_shr_cpri_fec_ts_source_t", 0, 0 }, 696 { "int", "_shr_cpri_fec_aux_config_para_t", 0, 0 }, 697 { "int", "_shr_cpri_roe_frame_format_t", 0, 0 }, 698 { "int", "_shr_cpri_roe_ordering_info_option_t", 0, 0 }, 699 { "int", "_shr_cpri_roe_header_field_t", 0, 0 }, 700 { "int", "_shr_cpri_ecpri_header_field_t", 0, 0 }, 701 { "int", "_shr_rsvd4_sync_mode_t", 0, 0 }, 702 { "int", "_shr_cpri_fec_aux_config_t", 0, 0 }, 703 #endif 704 { NULL }, 705 }; 706 707 /* 708 * Custom Language extensions for BCM macros 709 */ 710 cint_ast_t* 711 __BCM_PBMP_ITER_HANDLER(const char* name, cint_ast_t* arguments, cint_ast_t* statements) 712 { 713 cint_ast_t* _for; 714 cint_ast_t* _if; 715 cint_ast_t* _condition; 716 cint_ast_t* arg1; 717 718 /* 719 * We only take two arguments 720 */ 721 if(cint_ast_count(arguments) != 2) { 722 cint_ast_error(arguments, CINT_E_BAD_AST, "wrong number of arguments to %s() -- expected 2, recieved %d", 723 name, cint_ast_count(arguments)); 724 return NULL; 725 } 726 arg1 = arguments->next; 727 728 /* 729 * This returns the following code tree: 730 * 731 * for(arg1 = 0; arg1 < BCM_PBMP_PORT_MAX; arg1++) { 732 * if(BCM_PBMP_MEMBER(arg0, arg1) 733 * [statements] 734 * 735 * to simulate BCM_PBMP_ITER() 736 */ 737 738 739 /* Function call "BCM_PBMP_MEMBER(arg0, arg1)" */ 740 _condition = cint_ast_function(cint_ast_identifier("BCM_PBMP_MEMBER"), arguments); 741 742 /* if(BCM_PBMP_MEMBER(pbmp,port)) { statements } */ 743 _if = cint_ast_if(_condition, statements, 0); 744 745 /* for(arg1 = 0; arg1 < BCM_PBMP_PORT_MAX; arg1++) (condition) */ 746 _for = cint_ast_for( /* arg1 = 0 */ 747 cint_ast_operator(cintOpAssign, 748 arg1, 749 cint_ast_integer(0)), 750 /* arg1 < BCM_PBMP_PORT_MAX */ 751 cint_ast_operator(cintOpLessThan, 752 arg1, 753 cint_ast_identifier("BCM_PBMP_PORT_MAX")), 754 755 /* arg1++ */ 756 cint_ast_operator(cintOpAssign, 757 arg1, 758 cint_ast_operator(cintOpAdd, 759 arg1, 760 cint_ast_integer(1))), 761 762 /* statements */ 763 _if); 764 765 return _for; 766 } 767 768 cint_ast_t* 769 __BCM_RX_REASON_ITER_HANDLER(const char* name, cint_ast_t* arguments, cint_ast_t* statements) 770 { 771 cint_ast_t* _for; 772 cint_ast_t* _if; 773 cint_ast_t* _condition; 774 cint_ast_t* arg1; 775 776 /* 777 * We only take two arguments 778 */ 779 if(cint_ast_count(arguments) != 2) { 780 cint_ast_error(arguments, CINT_E_BAD_AST, "wrong number of arguments to %s() -- expected 2, recieved %d", 781 name, cint_ast_count(arguments)); 782 return NULL; 783 } 784 arg1 = arguments->next; 785 786 /* 787 * This returns the following code tree: 788 * 789 * for(arg1 = bcmRxReasonInvalid; arg1 < bcmRxReasonCount; arg1++) { 790 * if(BCM_RX_REASON_GET(arg0, arg1) 791 * [statements] 792 * 793 * to simulate BCM_RX_REASON_ITER() 794 */ 795 796 797 /* Function call "BCM_PBMP_MEMBER(arg0, arg1)" */ 798 _condition = cint_ast_function(cint_ast_identifier("BCM_RX_REASON_GET"), arguments); 799 800 /* if(BCM_RX_REASON_GET(arg0,arg1)) { statements } */ 801 _if = cint_ast_if(_condition, statements, 0); 802 803 /* for(arg1 = bcmRxReasonInvalid; arg1 < bcmRxReasonCount; arg1++) (condition) */ 804 _for = cint_ast_for( /* arg1 = bcmRxReasonInvalid */ 805 cint_ast_operator(cintOpAssign, 806 arg1, 807 cint_ast_integer(bcmRxReasonInvalid)), 808 /* arg1 < bcmRxReasonCount */ 809 cint_ast_operator(cintOpLessThan, 810 arg1, 811 cint_ast_integer(bcmRxReasonCount)), 812 813 /* arg1++ */ 814 cint_ast_operator(cintOpAssign, 815 arg1, 816 cint_ast_operator(cintOpAdd, 817 arg1, 818 cint_ast_integer(1))), 819 820 /* statements */ 821 _if); 822 823 return _for; 824 } 825 826 static cint_ast_t* 827 __BCM_IF_ERROR_RETURN_HANDLER(const char* name, cint_ast_t* arguments) 828 { 829 /* Inserts the following code: 830 831 do { int __rv__; if ((__rv__ = (arguments)) < 0) return(__rv__); } while(0) 832 833 This is equivalent to the BCM_IF_ERROR_RETURN() macro 834 */ 835 cint_ast_t* _while; 836 cint_ast_t* __rv__ = cint_ast_identifier("__rv__"); 837 cint_ast_t* _decl_rv = cint_ast_declaration(); 838 cint_ast_t* _if; 839 cint_ast_t* _statements; 840 841 /* Declare __rv__ = (arguments) */ 842 _decl_rv->utype.declaration.type = cint_ast_type("int"); 843 _decl_rv->utype.declaration.pcount = 0; 844 _decl_rv->utype.declaration.num_dimension_initializers = 0; 845 _decl_rv->utype.declaration.identifier = __rv__; 846 _decl_rv->utype.declaration.init = arguments; 847 848 _if = cint_ast_if(cint_ast_operator(cintOpLessThan, 849 __rv__, 850 cint_ast_integer(0)), 851 cint_ast_return(__rv__), 852 NULL); 853 854 /* Make the if statement come after the declaration */ 855 cint_ast_append(_decl_rv, _if); 856 857 /* Need braces around statement list */ 858 _statements = cint_ast_operator(cintOpOpenBrace, 0, 0); 859 _statements->next = _decl_rv; 860 cint_ast_append(_statements, cint_ast_operator(cintOpCloseBrace, 0, 0)); 861 862 _while = cint_ast_while(/* while(0) */ 863 cint_ast_integer(0), 864 865 /* statements */ 866 _statements, 867 868 /* order */ 869 1); 870 return _while; 871 } 872 873 static cint_custom_iterator_t __sdk_custom_iterators[] = 874 { 875 { "BCM_PBMP_ITER", __BCM_PBMP_ITER_HANDLER }, 876 { "BCM_RX_REASON_ITER", __BCM_RX_REASON_ITER_HANDLER }, 877 { NULL } 878 }; 879 880 static cint_custom_macro_t __sdk_custom_macros[] = 881 { 882 { "BCM_IF_ERROR_RETURN", __BCM_IF_ERROR_RETURN_HANDLER }, 883 { NULL } 884 }; 885 886 887 888 /* 889 * Structures defined in <shared> which are #defined or typedef'ed to BCM datatypes. 890 * These have to be handled manually. 891 */ 892 static void* 893 __cint_maddr__shr_port_ability_t(void* p, int mnum, cint_struct_type_t* parent) 894 { 895 void* rv; 896 _shr_port_ability_t* s = (_shr_port_ability_t*) p; 897 898 switch(mnum) 899 { 900 case 0: rv = &(s->speed_half_duplex); break; 901 case 1: rv = &(s->speed_full_duplex); break; 902 case 2: rv = &(s->pause); break; 903 case 3: rv = &(s->interface); break; 904 case 4: rv = &(s->medium); break; 905 case 5: rv = &(s->loopback); break; 906 case 6: rv = &(s->flags); break; 907 case 7: rv = &(s->eee); break; 908 case 8: rv = &(s->rsvd); break; 909 case 9: rv = &(s->encap); break; 910 case 10: rv = &(s->fec); break; 911 case 11: rv = &(s->channel);break; 912 default: rv = NULL; break; 913 } 914 915 return rv; 916 } 917 918 static cint_parameter_desc_t __cint_struct_members__shr_port_ability_t[] = 919 { 920 { "_shr_port_mode_t", "speed_half_duplex", 0, 0 }, 921 { "_shr_port_mode_t", "speed_full_duplex", 0, 0 }, 922 { "_shr_port_mode_t", "pause", 0, 0 }, 923 { "_shr_port_mode_t", "interface", 0, 0 }, 924 { "_shr_port_mode_t", "medium", 0, 0 }, 925 { "_shr_port_mode_t", "loopback", 0, 0 }, 926 { "_shr_port_mode_t", "flags", 0, 0 }, 927 { "_shr_port_mode_t", "eee", 0, 0 }, 928 { "_shr_port_mode_t", "rsvd", 0, 0 }, 929 { "_shr_port_mode_t", "encap", 0, 0 }, 930 { "_shr_port_mode_t", "fec", 0, 0 }, 931 { "_shr_port_mode_t", "channel", 0, 0 }, 932 { NULL } 933 }; 934 935 static void* 936 __cint_maddr__shr_port_timestamp_adjust_t(void* p, int mnum, cint_struct_type_t* parent) 937 { 938 void* rv; 939 _shr_port_timestamp_adjust_t* s = (_shr_port_timestamp_adjust_t*) p; 940 941 switch(mnum) 942 { 943 case 0: rv = &(s->osts_adjust); break; 944 case 1: rv = &(s->tsts_adjust); break; 945 default: rv = NULL; break; 946 } 947 948 return rv; 949 } 950 951 static cint_parameter_desc_t __cint_struct_members__shr_port_timestamp_adjust_t[] = 952 { 953 { "uint32", "osts_adjust", 0, 0 }, 954 { "uint32", "tsts_adjust", 0, 0 }, 955 { NULL } 956 }; 957 958 static void* 959 __cint_maddr__shr_rx_reasons_t(void* p, int mnum, cint_struct_type_t* parent) 960 { 961 void* rv; 962 _shr_rx_reasons_t* s = (_shr_rx_reasons_t*) p; 963 964 switch(mnum) 965 { 966 case 0: rv = &(s->pbits); break; 967 default: rv = NULL; break; 968 } 969 970 return rv; 971 } 972 973 static cint_parameter_desc_t __cint_struct_members__shr_rx_reasons_t[] = 974 { 975 { "SHR_BITDCL", "pbits", 0, _SHR_BITDCLSIZE(_SHR_RX_REASON_COUNT)}, 976 { NULL } 977 }; 978 979 #if _SHR_PBMP_WIDTH != 0 /* new style */ 980 static void* 981 __cint_maddr__shr_pbmp_t(void* p, int mnum, cint_struct_type_t* parent) 982 { 983 void* rv; 984 _shr_pbmp_t* s = (_shr_pbmp_t*) p; 985 986 switch(mnum) 987 { 988 case 0: rv = &(s->pbits); break; 989 default: rv = NULL; break; 990 } 991 992 return rv; 993 } 994 995 static cint_parameter_desc_t __cint_struct_members__shr_pbmp_t[] = 996 { 997 { "uint32", "pbits", 0, _SHR_PBMP_WORD_MAX}, 998 { NULL } 999 }; 1000 1001 #endif 1002 1003 1004 #ifdef INCLUDE_FCMAP 1005 1006 static cint_parameter_desc_t __cint_struct_members___shr_bfcmap_cos_to_pri_t[] = 1007 { 1008 { "uint16", "cos", 0, 0 }, 1009 { "uint16", "pri", 0, 0 }, 1010 { NULL } 1011 }; 1012 1013 static void* 1014 __cint_maddr__shr_bfcmap_cos_to_pri_t(void* p, int mnum, cint_struct_type_t* parent) 1015 { 1016 void* rv; 1017 _shr_bfcmap_cos_to_pri_t* s = (_shr_bfcmap_cos_to_pri_t*) p; 1018 1019 switch(mnum) 1020 { 1021 case 0: rv = &(s->cos); break; 1022 case 1: rv = &(s->pri); break; 1023 default: rv = NULL; break; 1024 } 1025 1026 return rv; 1027 } 1028 #endif 1029 1030 #ifdef INCLUDE_FCMAP 1031 static cint_parameter_desc_t __cint_struct_members__shr_bfcmap_port_config_t[] = 1032 { 1033 { "uint32", "action_mask", 0, 0}, 1034 { "uint32", "action_mask2", 0, 0}, 1035 { "_shr_bfcmap_port_mode_t", "port_mode", 0, 0 }, 1036 { "_shr_bfcmap_port_speed_t", "speed", 0, 0 }, 1037 { "int", "tx_buffer_to_buffer_credits", 0, 0 }, 1038 { "int", "rx_buffer_to_buffer_credits", 0, 0 }, 1039 { "int", "max_frame_length", 0, 0 }, 1040 { "int", "bb_sc_n", 0, 0 }, 1041 { "_shr_bfcmap_port_state_t", "port_state", 0, 0 }, 1042 { "int", "r_t_tov", 0, 0 }, 1043 { "int", "interrupt_enable", 0, 0 }, 1044 { "_shr_bfcmap_8g_fw_on_active_t", "fw_on_active_8g", 0, 0 }, 1045 { "int", "src_mac_construct", 0, 0 }, 1046 { "bcm_mac_t", "src_mac_addr", 0, 0 }, 1047 { "uint32", "src_fcmap_prefix", 0, 0 }, 1048 { "int", "dst_mac_construct", 0, 0 }, 1049 { "bcm_mac_t", "dst_mac_addr", 0, 0 }, 1050 { "uint32", "dst_fcmap_prefix", 0, 0 }, 1051 { "uint32", "vlan_tag", 0, 0 }, 1052 { "uint32", "vft_tag", 0, 0 }, 1053 { "int", "mapper_len", 0, 0 }, 1054 { "int", "ingress_mapper_bypass", 0, 0 }, 1055 { "int", "egress_mapper_bypass", 0, 0 }, 1056 { "_shr_bfcmap_map_table_input_t", "ingress_map_table_input", 0, 0 }, 1057 { "_shr_bfcmap_map_table_input_t", "egress_map_table_input", 0, 0 }, 1058 { "_shr_bfcmap_fc_crc_mode_t", "ingress_fc_crc_mode", 0, 0 }, 1059 { "_shr_bfcmap_fc_crc_mode_t", "egress_fc_crc_mode", 0, 0 }, 1060 { "_shr_bfcmap_vfthdr_proc_mode_t", "ingress_vfthdr_proc_mode", 0, 0 }, 1061 { "_shr_bfcmap_vfthdr_proc_mode_t", "egress_vfthdr_proc_mode", 0, 0 }, 1062 { "_shr_bfcmap_vlantag_proc_mode_t", "ingress_vlantag_proc_mode", 0, 0 }, 1063 { "_shr_bfcmap_vlantag_proc_mode_t", "egress_vlantag_proc_mode", 0, 0 }, 1064 { "_shr_bfcmap_vfid_mapsrc_t", "ingress_vfid_mapsrc", 0, 0 }, 1065 { "_shr_bfcmap_vfid_mapsrc_t", "egress_vfid_mapsrc", 0, 0 }, 1066 { "_shr_bfcmap_vid_mapsrc_t", "ingress_vid_mapsrc", 0, 0 }, 1067 { "_shr_bfcmap_vid_mapsrc_t", "egress_vid_mapsrc", 0, 0 }, 1068 { "_shr_bfcmap_vlan_pri_map_mode_t", "ingress_vlan_pri_map_mode", 0, 0 }, 1069 { "_shr_bfcmap_vlan_pri_map_mode_t", "egress_vlan_pri_map_mode", 0, 0 }, 1070 { "_shr_bfcmap_hopcnt_check_mode_t", "ingress_hopCnt_check_mode", 0, 0 }, 1071 { "int", "egress_hopCnt_dec_enable", 0, 0 }, 1072 { "int", "use_tts_pcs_16G", 0, 0 }, 1073 { "int", "use_tts_pcs_32G", 0, 0 }, 1074 { "int", "training_enable_16G", 0, 0 }, 1075 { "int", "training_enable_32G", 0, 0 }, 1076 { "int", "fec_enable_16G", 0, 0 }, 1077 { "int", "fec_enable_32G", 0, 0 }, 1078 { "int", "ingress_fcs_crrpt_eof_enable", 0, 0 }, 1079 { "int", "ingress_vlantag_presence_enable", 0, 0 }, 1080 { "_shr_bfcmap_hopcnt_check_mode_t", "egress_hopcnt_check_mode", 0, 0 }, 1081 { "int", "ingress_hopcnt_dec_enable", 0, 0 }, 1082 { "int", "egress_pass_ctrl_frame_enable", 0, 0 }, 1083 { "int", "egress_pass_pfc_frame_enable", 0, 0 }, 1084 { "int", "egress_pass_pause_frame_enable", 0, 0 }, 1085 { "int", "egress_fcoe_version_chk_disable", 0, 0 }, 1086 { "int", "egress_default_cos_value", 0, 0 }, 1087 { "int", "egress_use_ip_cos_map", 0, 0 }, 1088 { "uint32", "scrambling_enable_mask", 0, 0 }, 1089 { "uint32", "scrambling_enable_value", 0, 0 }, 1090 { "int", "egress_pause_enable", 0, 0 }, 1091 { "int", "egress_pfc_enable", 0, 0 }, 1092 { "int", "stat_interval", 0, 0 }, 1093 { "uint32", "trcm_attribs", 0, 0 }, 1094 { "_shr_bfcmap_cos_to_pri_t", "cos_to_pri", 0, 0 }, 1095 { NULL } 1096 }; 1097 1098 static void* 1099 __cint_maddr__shr_bfcmap_port_config_t(void* p, int mnum, cint_struct_type_t* parent) 1100 { 1101 void* rv; 1102 _shr_bfcmap_port_config_t* s = (_shr_bfcmap_port_config_t*) p; 1103 1104 switch(mnum) 1105 { 1106 case 0: rv = &(s->action_mask); break; 1107 case 1: rv = &(s->action_mask2); break; 1108 case 2: rv = &(s->port_mode); break; 1109 case 3: rv = &(s->speed); break; 1110 case 4: rv = &(s->tx_buffer_to_buffer_credits); break; 1111 case 5: rv = &(s->rx_buffer_to_buffer_credits); break; 1112 case 6: rv = &(s->max_frame_length); break; 1113 case 7: rv = &(s->bb_sc_n); break; 1114 case 8: rv = &(s->port_state); break; 1115 case 9: rv = &(s->r_t_tov); break; 1116 case 10: rv = &(s->interrupt_enable); break; 1117 case 11: rv = &(s->fw_on_active_8g); break; 1118 case 12: rv = &(s->src_mac_construct); break; 1119 case 13: rv = &(s->src_mac_addr[0]); break; 1120 case 14: rv = &(s->src_fcmap_prefix); break; 1121 case 15: rv = &(s->dst_mac_construct); break; 1122 case 16: rv = &(s->dst_mac_addr[0]); break; 1123 case 17: rv = &(s->dst_fcmap_prefix); break; 1124 case 18: rv = &(s->vlan_tag); break; 1125 case 19: rv = &(s->vft_tag); break; 1126 case 20: rv = &(s->mapper_len); break; 1127 case 21: rv = &(s->ingress_mapper_bypass); break; 1128 case 22: rv = &(s->egress_mapper_bypass); break; 1129 case 23: rv = &(s->ingress_map_table_input); break; 1130 case 24: rv = &(s->egress_map_table_input); break; 1131 case 25: rv = &(s->ingress_fc_crc_mode); break; 1132 case 26: rv = &(s->egress_fc_crc_mode); break; 1133 case 27: rv = &(s->ingress_vfthdr_proc_mode); break; 1134 case 28: rv = &(s->egress_vfthdr_proc_mode); break; 1135 case 29: rv = &(s->ingress_vlantag_proc_mode); break; 1136 case 30: rv = &(s->egress_vlantag_proc_mode); break; 1137 case 31: rv = &(s->ingress_vfid_mapsrc); break; 1138 case 32: rv = &(s->egress_vfid_mapsrc); break; 1139 case 33: rv = &(s->ingress_vid_mapsrc); break; 1140 case 34: rv = &(s->egress_vid_mapsrc); break; 1141 case 35: rv = &(s->ingress_vlan_pri_map_mode); break; 1142 case 36: rv = &(s->egress_vlan_pri_map_mode); break; 1143 case 37: rv = &(s->ingress_hopCnt_check_mode); break; 1144 case 38: rv = &(s->egress_hopCnt_dec_enable); break; 1145 case 39: rv = &(s->use_tts_pcs_16G); break; 1146 case 40: rv = &(s->use_tts_pcs_32G); break; 1147 case 41: rv = &(s->training_enable_16G); break; 1148 case 42: rv = &(s->training_enable_32G); break; 1149 case 43: rv = &(s->fec_enable_16G); break; 1150 case 44: rv = &(s->fec_enable_32G); break; 1151 case 45: rv = &(s->ingress_fcs_crrpt_eof_enable); break; 1152 case 46: rv = &(s->ingress_vlantag_presence_enable); break; 1153 case 47: rv = &(s->egress_hopcnt_check_mode); break; 1154 case 48: rv = &(s->ingress_hopcnt_dec_enable); break; 1155 case 49: rv = &(s->egress_pass_ctrl_frame_enable); break; 1156 case 50: rv = &(s->egress_pass_pfc_frame_enable); break; 1157 case 51: rv = &(s->egress_pass_pause_frame_enable); break; 1158 case 52: rv = &(s->egress_fcoe_version_chk_disable); break; 1159 case 53: rv = &(s->egress_default_cos_value); break; 1160 case 54: rv = &(s->egress_use_ip_cos_map); break; 1161 case 55: rv = &(s->scrambling_enable_mask); break; 1162 case 56: rv = &(s->scrambling_enable_value); break; 1163 case 57: rv = &(s->egress_pause_enable); break; 1164 case 58: rv = &(s->egress_pfc_enable); break; 1165 case 59: rv = &(s->stat_interval); break; 1166 case 60: rv = &(s->trcm_attribs); break; 1167 case 61: rv = &(s->cos_to_pri); break; 1168 default: rv = NULL; break; 1169 } 1170 1171 return rv; 1172 } 1173 1174 static cint_parameter_desc_t __cint_struct_members___shr_bfcmap_vlan_vsan_map_t[] = 1175 { 1176 { "uint16", "vlan_vid", 0, 0 }, 1177 { "uint16", "vsan_vfid", 0, 0 }, 1178 { NULL } 1179 }; 1180 1181 static void* 1182 __cint_maddr__shr_bfcmap_vlan_vsan_map_t(void* p, int mnum, cint_struct_type_t* parent) 1183 { 1184 void* rv; 1185 _shr_bfcmap_vlan_vsan_map_t* s = (_shr_bfcmap_vlan_vsan_map_t*) p; 1186 1187 switch(mnum) 1188 { 1189 case 0: rv = &(s->vlan_vid); break; 1190 case 1: rv = &(s->vsan_vfid); break; 1191 default: rv = NULL; break; 1192 } 1193 1194 return rv; 1195 } 1196 1197 static cint_parameter_desc_t __cint_struct_members___shr_bfcmap_port_ability_t[] = 1198 { 1199 { "_shr_bfcmap_pa_speed_t", "port_ability_speed", 0, 0 }, 1200 { NULL } 1201 }; 1202 1203 static void* 1204 __cint_maddr__shr_bfcmap_port_ability_t(void* p, int mnum, cint_struct_type_t* parent) 1205 { 1206 void* rv; 1207 _shr_bfcmap_port_ability_t* s = (_shr_bfcmap_port_ability_t*) p; 1208 1209 switch(mnum) 1210 { 1211 case 0: rv = &(s->port_ability_speed); break; 1212 default: rv = NULL; break; 1213 } 1214 1215 return rv; 1216 } 1217 #endif 1218 1219 1220 1221 static void* 1222 __cint_maddr__shr_port_cable_diag_t(void* p, int mnum, cint_struct_type_t* parent) 1223 { 1224 void* rv; 1225 _shr_port_cable_diag_t* s = (_shr_port_cable_diag_t*) p; 1226 1227 switch(mnum) 1228 { 1229 case 0: rv = &(s->state); break; 1230 case 1: rv = &(s->npairs); break; 1231 case 2: rv = &(s->pair_state); break; 1232 case 3: rv = &(s->pair_len); break; 1233 case 4: rv = &(s->fuzz_len); break; 1234 default: rv = NULL; break; 1235 } 1236 1237 return rv; 1238 } 1239 1240 static cint_parameter_desc_t __cint_struct_members__shr_phy_config_t[] = 1241 { 1242 { "int", "enable", 0, 0 }, 1243 { "int", "preferred", 0, 0 }, 1244 { "int", "autoneg_enable", 0, 0 }, 1245 { "_shr_port_mode_t", "autoneg_advert", 0, 0 }, 1246 { "_shr_port_ability_t", "advert_ability", 0, 0 }, 1247 { "int", "force_speed", 0, 0 }, 1248 { "int", "force_duplex", 0, 0 }, 1249 { "int", "master", 0, 0 }, 1250 { "_shr_port_mdix_t", "mdix", 0, 0 }, 1251 { NULL } 1252 }; 1253 1254 static void* 1255 __cint_maddr__shr_phy_config_t(void* p, int mnum, cint_struct_type_t* parent) 1256 { 1257 void* rv; 1258 _shr_phy_config_t* s = (_shr_phy_config_t*) p; 1259 1260 switch(mnum) 1261 { 1262 case 0: rv = &(s->enable); break; 1263 case 1: rv = &(s->preferred); break; 1264 case 2: rv = &(s->autoneg_enable); break; 1265 case 3: rv = &(s->autoneg_advert); break; 1266 case 4: rv = &(s->advert_ability); break; 1267 case 5: rv = &(s->force_speed); break; 1268 case 6: rv = &(s->force_duplex); break; 1269 case 7: rv = &(s->master); break; 1270 case 8: rv = &(s->mdix); break; 1271 default: rv = NULL; break; 1272 } 1273 1274 return rv; 1275 } 1276 1277 static cint_parameter_desc_t __cint_struct_members__shr_port_cable_diag_t[] = 1278 { 1279 { "_shr_port_cable_state_t", "state", 0, 0 }, 1280 { "int", "npairs", 0, 0 }, 1281 { "_shr_port_cable_state_t", "pair_state", 0, 4 }, 1282 { "int", "pair_len", 0, 4 }, 1283 { "int", "fuzz_len", 0, 0 }, 1284 { NULL } 1285 }; 1286 1287 static void* 1288 __cint_maddr__shr_switch_temperature_monitor_t(void* p, int mnum, cint_struct_type_t* parent) 1289 { 1290 void* rv; 1291 _shr_switch_temperature_monitor_t* s = (_shr_switch_temperature_monitor_t*) p; 1292 1293 switch(mnum) 1294 { 1295 case 0: rv = &(s->curr); break; 1296 case 1: rv = &(s->peak); break; 1297 default: rv = NULL; break; 1298 } 1299 1300 return rv; 1301 } 1302 1303 static cint_parameter_desc_t __cint_struct_members__shr_switch_temperature_monitor_t[] = 1304 { 1305 { "int", "curr", 0, 0 }, 1306 { "int", "peak", 0, 0 }, 1307 { NULL } 1308 }; 1309 1310 #ifdef INCLUDE_XFLOW_MACSEC 1311 static void* 1312 __cint_maddr_xflow_macsec_secure_chan_info_t(void* p, int mnum, cint_struct_type_t* parent) 1313 { 1314 void* rv; 1315 xflow_macsec_secure_chan_info_t *s = (xflow_macsec_secure_chan_info_t*) p; 1316 1317 switch(mnum) 1318 { 1319 case 0: rv = &(s->sci); break; 1320 case 1: rv = &(s->crypto); break; 1321 case 2: rv = &(s->confidentiality_offset); break; 1322 case 3: rv = &(s->active_an); break; 1323 case 4: rv = &(s->flags); break; 1324 case 5: rv = &(s->tci); break; 1325 case 6: rv = &(s->sectag_offset); break; 1326 case 7: rv = &(s->mtu_sel); break; 1327 case 8: rv = &(s->sectag_etype_sel); break; 1328 case 9: rv = &(s->sci_mask); break; 1329 case 10: rv = &(s->replay_protect_window_size); break; 1330 case 11: rv = &(s->policy_id); break; 1331 case 12: rv = &(s->first_auth_range_offset_start); break; 1332 case 13: rv = &(s->first_auth_range_offset_end); break; 1333 default: rv = NULL; break; 1334 } 1335 1336 return rv; 1337 } 1338 1339 static void* 1340 __cint_maddr_xflow_macsec_mac_addr_info_t(void* p, int mnum, cint_struct_type_t* parent) 1341 { 1342 void* rv; 1343 xflow_macsec_mac_addr_info_t *s = (xflow_macsec_mac_addr_info_t*) p; 1344 1345 switch(mnum) 1346 { 1347 case 0: rv = &(s->mac_addr); break; 1348 default: rv = NULL; break; 1349 } 1350 1351 return rv; 1352 } 1353 1354 static cint_parameter_desc_t __cint_struct_members_xflow_macsec_secure_chan_info_t[] = 1355 { 1356 { "uint64", "sci", 0, 0 }, 1357 { "xflow_macsec_crypto_t", "crypto", 0, 0 }, 1358 { "uint32", "confidentiality_offset", 0, 0 }, 1359 { "uint32", "active_an", 0, 0 }, 1360 { "uint32", "flags", 0, 0 }, 1361 { "uint8", "tci", 0, 0 }, 1362 { "uint32", "sectag_offset", 0, 0 }, 1363 { "xflow_macsec_mtu_t", "mtu_sel", 0, 0 }, 1364 { "xflow_macsec_sectag_ethertype_t", "sectag_etype_sel", 0, 0 }, 1365 { "uint64", "sci_mask", 0, 0 }, 1366 { "uint32", "replay_protect_window_size", 0, 0 }, 1367 { "xflow_macsec_policy_id_t", "policy_id", 0, 0 }, 1368 { "uint8", "first_auth_range_offset_start", 0, 0 }, 1369 { "uint8", "first_auth_range_offset_end", 0, 0 }, 1370 { NULL } 1371 }; 1372 1373 static cint_parameter_desc_t __cint_struct_members_xflow_macsec_mac_addr_info_t[] = 1374 { 1375 { "bcm_mac_t", "mac_addr", 0, 0 }, 1376 { NULL } 1377 }; 1378 1379 static void* 1380 __cint_maddr_xflow_macsec_crypto_aes128_gcm_t(void* p, int mnum, cint_struct_type_t* parent) 1381 { 1382 void* rv; 1383 xflow_macsec_crypto_aes128_gcm_t *s = (xflow_macsec_crypto_aes128_gcm_t *) p; 1384 1385 switch(mnum) 1386 { 1387 case 0: rv = &(s->key); break; 1388 default: rv = NULL; break; 1389 } 1390 1391 return rv; 1392 } 1393 1394 static cint_parameter_desc_t __cint_struct_members_xflow_macsec_crypto_aes128_gcm_t[] = 1395 { 1396 { "uint8", "key", 0, 16 }, 1397 { NULL } 1398 }; 1399 1400 static void* 1401 __cint_maddr_xflow_macsec_secure_assoc_info_t(void* p, int mnum, cint_struct_type_t* parent) 1402 { 1403 void* rv; 1404 xflow_macsec_secure_assoc_info_t *s = (xflow_macsec_secure_assoc_info_t *) p; 1405 1406 switch(mnum) 1407 { 1408 case 0: rv = &(s->an); break; 1409 case 1: rv = &(s->aes); break; 1410 case 2: rv = &(s->an_control); break; 1411 case 3: rv = &(s->next_pkt_num); break; 1412 case 4: rv = &(s->next_pkt_num_upper); break; 1413 case 5: rv = &(s->salt); break; 1414 case 6: rv = &(s->ssci); break; 1415 case 7: rv = &(s->flags); break; 1416 default: rv = NULL; break; 1417 } 1418 1419 return rv; 1420 } 1421 1422 static cint_parameter_desc_t __cint_struct_members_xflow_macsec_secure_assoc_info_t[] = 1423 { 1424 { "xflow_macsec_secure_assoc_num_t", "an", 0, 0 }, 1425 { "xflow_macsec_crypto_aes128_gcm_t", "aes", 0, 0 }, 1426 { "xflow_macsec_secure_assoc_an_control_t", "an_control", 0, 0 }, 1427 { "uint32", "next_pkt_num", 0, 0 }, 1428 { "uint32", "next_pkt_num_upper", 0, 0 }, 1429 { "uint8", "salt", 0, 12 }, 1430 { "uint32", "ssci", 0, 0 }, 1431 { "uint32", "flags", 0, 0 }, 1432 { NULL } 1433 }; 1434 1435 static void* 1436 __cint_maddr_xflow_macsec_policy_info_t(void* p, int mnum, cint_struct_type_t* parent) 1437 { 1438 void* rv; 1439 xflow_macsec_policy_info_t *s = (xflow_macsec_policy_info_t *) p; 1440 1441 switch(mnum) 1442 { 1443 case 0: rv = &(s->flags); break; 1444 case 1: rv = &(s->sectag_offset); break; 1445 case 2: rv = &(s->sci); break; 1446 case 3: rv = &(s->mtu_sel); break; 1447 case 4: rv = &(s->etype_sel); break; 1448 default: rv = NULL; break; 1449 } 1450 1451 return rv; 1452 } 1453 1454 static cint_parameter_desc_t __cint_struct_members_xflow_macsec_policy_info_t[] = 1455 { 1456 { "uint32", "flags", 0, 0 }, 1457 { "uint32", "sectag_offset", 0, 0 }, 1458 { "uint64", "sci", 0, 0 }, 1459 { "xflow_macsec_mtu_t", "mtu_sel", 0, 0 }, 1460 { "xflow_macsec_sectag_ethertype_t", "etype_sel", 0, 0 }, 1461 { NULL } 1462 }; 1463 1464 static void* 1465 __cint_maddr_xflow_macsec_flow_info_t(void* p, int mnum, cint_struct_type_t* parent) 1466 { 1467 void* rv; 1468 xflow_macsec_flow_info_t *s = (xflow_macsec_flow_info_t *) p; 1469 1470 switch(mnum) 1471 { 1472 case 0: rv = &(s->flags); break; 1473 case 1: rv = &(s->pkt_type); break; 1474 case 2: rv = &(s->tpid); break; 1475 case 3: rv = &(s->tpid_mask); break; 1476 case 4: rv = &(s->vlan_mpls_tag_status); break; 1477 case 5: rv = &(s->etype_sel); break; 1478 case 6: rv = &(s->src_mac); break; 1479 case 7: rv = &(s->src_mac_mask); break; 1480 case 8: rv = &(s->dst_mac); break; 1481 case 9: rv = &(s->dst_mac_mask); break; 1482 case 10: rv = &(s->src_port); break; 1483 case 11: rv = &(s->src_port_mask); break; 1484 case 12: rv = &(s->udf); break; 1485 case 13: rv = &(s->udf_mask); break; 1486 case 14: rv = &(s->policy_id); break; 1487 case 15: rv = &(s->set_management_pkt); break; 1488 default: rv = NULL; break; 1489 } 1490 1491 return rv; 1492 } 1493 1494 static void* 1495 __cint_maddr_xflow_macsec_vlan_tpid_t(void* p, int mnum, cint_struct_type_t* parent) 1496 { 1497 void* rv; 1498 xflow_macsec_vlan_tpid_t *s = (xflow_macsec_vlan_tpid_t *) p; 1499 1500 switch(mnum) 1501 { 1502 case 0: rv = &(s->enable); break; 1503 case 1: rv = &(s->tpid); break; 1504 default: rv = NULL; break; 1505 } 1506 1507 return rv; 1508 } 1509 1510 static cint_parameter_desc_t __cint_struct_members_xflow_macsec_flow_info_t[] = 1511 { 1512 { "uint32", "flags", 0, 0 }, 1513 { "xflow_macsec_flow_pkt_type_t", "pkt_type", 0, 0 }, 1514 { "uint32", "tpid", 0, 0 }, 1515 { "uint32", "tpid_mask", 0, 0 }, 1516 { "xflow_macsec_vlan_mpls_tag_status_t", "vlan_mpls_tag_status", 0, 0 }, 1517 { "xflow_macsec_flow_etype_t", "etype_sel", 0, 0 }, 1518 { "bcm_mac_t", "src_mac", 0, 0 }, 1519 { "bcm_mac_t", "src_mac_mask", 0, 0 }, 1520 { "bcm_mac_t", "dst_mac", 0, 0 }, 1521 { "bcm_mac_t", "dst_mac_mask", 0, 0 }, 1522 { "bcm_port_t", "src_port", 0, 0 }, 1523 { "uint32", "src_port_mask", 0, 0 }, 1524 { "xflow_macsec_flow_udf_param_t", "udf", 0, 0 }, 1525 { "xflow_macsec_flow_udf_param_t", "udf_mask", 0, 0 }, 1526 { "xflow_macsec_policy_id_t", "policy_id", 0, 0 }, 1527 { "uint8", "set_management_pkt", 0, 0 }, 1528 { NULL } 1529 }; 1530 1531 static cint_parameter_desc_t __cint_struct_members_xflow_macsec_vlan_tpid_t[] = 1532 { 1533 { "int", "enable", 0, 4 }, 1534 { "uint32", "tpid", 0, 4 }, 1535 { NULL } 1536 }; 1537 1538 static void* 1539 __cint_maddr_xflow_macsec_flow_info_mpls_t(void* p, int mnum, cint_struct_type_t* parent) 1540 { 1541 void* rv; 1542 xflow_macsec_flow_info_mpls_t *s = (xflow_macsec_flow_info_mpls_t *) p; 1543 1544 switch(mnum) 1545 { 1546 case 0: rv = &(s->mpls_label); break; 1547 case 1: rv = &(s->mpls_exp); break; 1548 default: rv = NULL; break; 1549 } 1550 1551 return rv; 1552 } 1553 1554 static cint_parameter_desc_t __cint_struct_members_xflow_macsec_flow_info_mpls_t[] = 1555 { 1556 { "bcm_mpls_label_t", "mpls_label", 0, 0 }, 1557 { "uint8", "mpls_exp", 0, 0 }, 1558 { NULL } 1559 }; 1560 1561 static void* 1562 __cint_maddr_xflow_macsec_flow_udf_param_t(void* p, int mnum, cint_struct_type_t* parent) 1563 { 1564 void* rv; 1565 xflow_macsec_flow_udf_param_t *s = (xflow_macsec_flow_udf_param_t *) p; 1566 1567 switch(mnum) 1568 { 1569 case 0: rv = &(s->ethertype); break; 1570 case 1: rv = &(s->first_vlan); break; 1571 case 2: rv = &(s->first_vlan_priority); break; 1572 case 3: rv = &(s->second_vlan); break; 1573 case 4: rv = &(s->second_vlan_priority); break; 1574 case 5: rv = &(s->first_mpls); break; 1575 case 6: rv = &(s->second_mpls); break; 1576 case 7: rv = &(s->payload); break; 1577 default: rv = NULL; break; 1578 } 1579 1580 return rv; 1581 } 1582 1583 static cint_parameter_desc_t __cint_struct_members_xflow_macsec_flow_udf_param_t[] = 1584 { 1585 { "uint32", "ethertype", 0, 0 }, 1586 { "bcm_vlan_t", "first_vlan", 0, 0 }, 1587 { "uint8", "first_vlan_priority", 0, 0 }, 1588 { "bcm_vlan_t", "second_vlan", 0, 0 }, 1589 { "uint8", "second_vlan_priority", 0, 0 }, 1590 { "xflow_macsec_flow_info_mpls_t", "first_mpls", 0, 0 }, 1591 { "xflow_macsec_flow_info_mpls_t", "second_mpls", 0, 0 }, 1592 { "uint8", "payload", 0, 64 }, 1593 { NULL } 1594 }; 1595 1596 #endif 1597 1598 #ifdef CPRIMOD_SUPPORT 1599 1600 static void* 1601 __cint_maddr__shr_cpri_presentation_time_t(void* p, int mnum, 1602 cint_struct_type_t* parent) 1603 { 1604 void* rv; 1605 _shr_cpri_presentation_time_t* s = (_shr_cpri_presentation_time_t*) p; 1606 1607 switch(mnum) 1608 { 1609 case 0: rv = &(s->time); break; 1610 default: rv = NULL; break; 1611 } 1612 1613 return rv; 1614 } 1615 1616 1617 static cint_parameter_desc_t 1618 __cint_struct_members__shr_cpri_presentation_time_t[] = 1619 { 1620 { "uint32", "time", 0, 0 }, 1621 { NULL } 1622 }; 1623 1624 static void* 1625 __cint_maddr__shr_cpri_decap_presentation_config_t(void* p, int mnum, 1626 cint_struct_type_t* parent) 1627 { 1628 void* rv; 1629 _shr_cpri_decap_presentation_config_t* s = 1630 (_shr_cpri_decap_presentation_config_t*) p; 1631 1632 switch(mnum) 1633 { 1634 case 0: rv = &(s->time_mod_offset); break; 1635 case 1: rv = &(s->mod_count); break; 1636 default: rv = NULL; break; 1637 } 1638 1639 return rv; 1640 } 1641 1642 static cint_parameter_desc_t 1643 __cint_struct_members__shr_cpri_decap_presentation_config_t[] = 1644 { 1645 { "uint32", "time_mod_offset", 0, 0 }, 1646 { "uint32", "mod_count", 0, 0 }, 1647 { NULL } 1648 }; 1649 1650 static void* 1651 __cint_maddr__shr_cpri_fast_eth_config_t(void* p, int mnum, cint_struct_type_t* parent) 1652 { 1653 void* rv; 1654 _shr_cpri_fast_eth_config_t* s = (_shr_cpri_fast_eth_config_t*) p; 1655 1656 switch(mnum) 1657 { 1658 case 0: rv = &(s->queue_num); break; 1659 case 1: rv = &(s->no_fcs_err_check); break; 1660 case 2: rv = &(s->min_packet_size); break; 1661 case 3: rv = &(s->max_packet_size); break; 1662 case 4: rv = &(s->min_packet_drop); break; 1663 case 5: rv = &(s->max_packet_drop); break; 1664 case 6: rv = &(s->strip_crc); break; 1665 default: rv = NULL; break; 1666 } 1667 1668 return rv; 1669 } 1670 1671 static cint_parameter_desc_t __cint_struct_members__shr_cpri_fast_eth_config_t[] = 1672 { 1673 { "uint32", "queue_num", 0, 0 }, 1674 { "uint32", "no_fcs_err_check", 0, 0 }, 1675 { "uint32", "min_packet_size", 0, 0 }, 1676 { "uint32", "max_packet_size", 0, 0 }, 1677 { "int", "min_packet_drop", 0, 0 }, 1678 { "int", "max_packet_drop", 0, 0 }, 1679 { "int", "strip_crc[p", 0, 0 }, 1680 { NULL } 1681 }; 1682 1683 static void* 1684 __cint_maddr__shr_cpri_tag_gen_entry_t(void* p, int mnum, cint_struct_type_t* parent) 1685 { 1686 void* rv; 1687 _shr_cpri_tag_gen_entry_t* s = (_shr_cpri_tag_gen_entry_t*) p; 1688 1689 switch(mnum) 1690 { 1691 case 0: rv = &(s->tag_id); break; 1692 case 1: rv = &(s->mask); break; 1693 case 2: rv = &(s->header); break; 1694 case 3: rv = &(s->word_count); break; 1695 default: rv = NULL; break; 1696 } 1697 1698 return rv; 1699 } 1700 1701 static cint_parameter_desc_t __cint_struct_members__shr_cpri_tag_gen_entry_t[] = 1702 { 1703 { "uint32", "tag_id", 0, 0 }, 1704 { "uint32", "mask", 0, 0 }, 1705 { "uint32", "header", 0, 0 }, 1706 { "uint32", "word_count", 0, 0 }, 1707 { NULL } 1708 }; 1709 1710 static void* 1711 __cint_maddr__shr_cpri_cw_l1_protocol_info_t(void* p, int mnum, 1712 cint_struct_type_t* parent) 1713 { 1714 void* rv; 1715 _shr_cpri_cw_l1_protocol_info_t* s = (_shr_cpri_cw_l1_protocol_info_t*) p; 1716 1717 switch(mnum) 1718 { 1719 case 0: rv = &(s->protocol_ver); break; 1720 case 1: rv = &(s->hdlc_rate); break; 1721 case 2: rv = &(s->reset); break; 1722 case 3: rv = &(s->l1_lof); break; 1723 case 4: rv = &(s->l1_los); break; 1724 case 5: rv = &(s->l1_sdi); break; 1725 case 6: rv = &(s->l1_rai); break; 1726 case 7: rv = &(s->eth_pointer); break; 1727 default: rv = NULL; break; 1728 } 1729 1730 return rv; 1731 } 1732 1733 static cint_parameter_desc_t 1734 __cint_struct_members__shr_cpri_cw_l1_protocol_info_t[] = 1735 { 1736 { "uint32", "protocol_ver", 0, 0 }, 1737 { "uint32", "hdlc_rate", 0, 0 }, 1738 { "int", "reset", 0, 0 }, 1739 { "int", "l1_lof", 0, 0 }, 1740 { "int", "l1_los", 0, 0 }, 1741 { "int", "l1_sdi", 0, 0 }, 1742 { "int", "l1_rai", 0, 0 }, 1743 { "uint32", "eth_pointer", 0, 0 }, 1744 { NULL } 1745 }; 1746 1747 static void* 1748 __cint_maddr__shr_cpri_rx_vsd_flow_info_t(void* p, int mnum, 1749 cint_struct_type_t* parent) 1750 { 1751 void* rv; 1752 _shr_cpri_rx_vsd_flow_info_t* s = (_shr_cpri_rx_vsd_flow_info_t*) p; 1753 1754 switch(mnum) 1755 { 1756 case 0: rv = &(s->hyper_frame_number); break; 1757 case 1: rv = &(s->hyper_frame_modulo); break; 1758 case 2: rv = &(s->filter_zero_data); break; 1759 case 3: rv = &(s->section_num); break; 1760 case 4: rv = &(s->num_sector); break; 1761 case 5: rv = &(s->tag_id); break; 1762 default: rv = NULL; break; 1763 } 1764 1765 return rv; 1766 } 1767 1768 static cint_parameter_desc_t 1769 __cint_struct_members__shr_cpri_rx_vsd_flow_info_t[] = 1770 { 1771 { "uint32", "hyper_frame_number", 0, 0 }, 1772 { "uint32", "hyper_frame_modulo", 0, 0 }, 1773 { "int", "filter_zero_data", 0, 0 }, 1774 { "uint32", "section_num", 0, 4 }, 1775 { "uint32", "num_sector", 0, 0 }, 1776 { "uint32", "tag_id", 0, 0 }, 1777 { NULL } 1778 }; 1779 1780 static void* 1781 __cint_maddr__shr_cpri_cw_l1_config_info_t(void* p, int mnum, 1782 cint_struct_type_t* parent) 1783 { 1784 void* rv; 1785 _shr_cpri_cw_l1_config_info_t* s = (_shr_cpri_cw_l1_config_info_t*) p; 1786 1787 switch(mnum) 1788 { 1789 case 0: rv = &(s->enet_ptr); break; 1790 case 1: rv = &(s->l1_fun); break; 1791 case 2: rv = &(s->hdlc_rate); break; 1792 case 3: rv = &(s->protocol_ver); break; 1793 default: rv = NULL; break; 1794 } 1795 1796 return rv; 1797 } 1798 1799 static cint_parameter_desc_t 1800 __cint_struct_members__shr_cpri_cw_l1_config_info_t[] = 1801 { 1802 { "uint32", "enet_ptr", 0, 0 }, 1803 { "uint32", "l1_fun", 0, 0 }, 1804 { "uint32", "hdlc_rate", 0, 0 }, 1805 { "uint32", "protocol_ver", 0, 0 }, 1806 { NULL } 1807 }; 1808 1809 static void* 1810 __cint_maddr__shr_cpri_tx_vsd_flow_info_t(void* p, int mnum, 1811 cint_struct_type_t* parent) 1812 { 1813 void* rv; 1814 _shr_cpri_tx_vsd_flow_info_t* s = (_shr_cpri_tx_vsd_flow_info_t*) p; 1815 1816 switch(mnum) 1817 { 1818 case 0: rv = &(s->hyper_frame_number); break; 1819 case 1: rv = &(s->hyper_frame_modulo); break; 1820 case 2: rv = &(s->repeat_mode); break; 1821 case 3: rv = &(s->section_num); break; 1822 case 4: rv = &(s->num_sector); break; 1823 case 5: rv = &(s->roe_flow_id); break; 1824 default: rv = NULL; break; 1825 } 1826 1827 return rv; 1828 } 1829 1830 static cint_parameter_desc_t 1831 __cint_struct_members__shr_cpri_tx_vsd_flow_info_t[] = 1832 { 1833 { "uint32", "hyper_frame_number", 0, 0 }, 1834 { "uint32", "hyper_frame_modulo", 0, 0 }, 1835 { "int", "repeat_mode", 0, 0 }, 1836 { "uint32", "section_num", 0, 4 }, 1837 { "uint32", "num_sector", 0, 0 }, 1838 { "uint32", "roe_flow_id", 0, 0 }, 1839 { NULL } 1840 }; 1841 1842 static void* 1843 __cint_maddr__shr_cpri_1588_timestamp_ts_config_t(void* p, int mnum, 1844 cint_struct_type_t* parent) 1845 { 1846 void* rv; 1847 _shr_cpri_1588_timestamp_ts_config_t* s = 1848 (_shr_cpri_1588_timestamp_ts_config_t*) p; 1849 1850 switch(mnum) 1851 { 1852 case 0: rv = &(s->enable); break; 1853 case 1: rv = &(s->modulo_count); break; 1854 default: rv = NULL; break; 1855 } 1856 1857 return rv; 1858 } 1859 1860 static cint_parameter_desc_t 1861 __cint_struct_members__shr_cpri_1588_timestamp_ts_config_t[] = 1862 { 1863 { "int", "enable", 0, 0 }, 1864 { "uint32", "modulo_count", 0, 0 }, 1865 { NULL } 1866 }; 1867 1868 static void* 1869 __cint_maddr__shr_cpri_intr_info_t(void* p, int mnum, 1870 cint_struct_type_t* parent) 1871 { 1872 void* rv; 1873 _shr_cpri_intr_info_t* s = 1874 (_shr_cpri_intr_info_t*) p; 1875 1876 switch(mnum) 1877 { 1878 case 0: rv = &(s->cpri_intr_type); break; 1879 case 1: rv = &(s->axc_id); break; 1880 case 2: rv = &(s->queue_num); break; 1881 case 3: rv = &(s->data); break; 1882 case 4: rv = &(s->data64); break; 1883 default: rv = NULL; break; 1884 } 1885 1886 return rv; 1887 } 1888 1889 static cint_parameter_desc_t 1890 __cint_struct_members__shr_cpri_intr_info_t[] = 1891 { 1892 { "_shr_cpri_interrupt_type_t", "cpri_intr_type", 0, 0 }, 1893 { "int", "axc_id", 0, 0 }, 1894 { "int", "queue_num", 0, 0 }, 1895 { "int", "data", 0, 0 }, 1896 { "uint64", "data64", 0, _shrIntrDataNumOfData64}, 1897 { NULL } 1898 }; 1899 1900 1901 static void* 1902 __cint_maddr__shr_cpri_fec_timestamp_config_t(void* p, int mnum, 1903 cint_struct_type_t* parent) 1904 { 1905 void* rv; 1906 _shr_cpri_fec_timestamp_config_t* s = 1907 (_shr_cpri_fec_timestamp_config_t*) p; 1908 1909 switch(mnum) 1910 { 1911 case 0: rv = &(s->enable); break; 1912 case 1: rv = &(s->fec_fifo_ts_source_select); break; 1913 case 2: rv = &(s->fec_cmic_ts_source_select); break; 1914 case 3: rv = &(s->control_bit_offset_0); break; 1915 case 4: rv = &(s->control_bit_offset_1); break; 1916 case 5: rv = &(s->control_bit_offset_2); break; 1917 case 6: rv = &(s->control_bit_offset_3); break; 1918 default: rv = NULL; break; 1919 } 1920 1921 return rv; 1922 } 1923 1924 static cint_parameter_desc_t 1925 __cint_struct_members__shr_cpri_fec_timestamp_config_t[] = 1926 { 1927 { "int", "enable", 0, 0 }, 1928 { "_shr_cpri_fec_ts_source_t", "fec_fifo_ts_source_select", 0, 0 }, 1929 { "_shr_cpri_fec_ts_source_t", "fec_cmic_ts_source_select", 0, 0 }, 1930 { "uint32", "control_bit_offset_0", 0, 0 }, 1931 { "uint32", "control_bit_offset_1", 0, 0 }, 1932 { "uint32", "control_bit_offset_2", 0, 0 }, 1933 { "uint32", "control_bit_offset_0", 0, 0 }, 1934 { NULL } 1935 }; 1936 1937 #endif 1938 1939 cint_struct_type_t __cint_sdk_structures[] = 1940 { 1941 { 1942 "_shr_port_ability_t", 1943 sizeof(_shr_port_ability_t), 1944 __cint_struct_members__shr_port_ability_t, 1945 __cint_maddr__shr_port_ability_t 1946 }, 1947 { 1948 "_shr_port_cable_diag_t", 1949 sizeof(_shr_port_cable_diag_t), 1950 __cint_struct_members__shr_port_cable_diag_t, 1951 __cint_maddr__shr_port_cable_diag_t 1952 }, 1953 { 1954 "_shr_phy_config_t", 1955 sizeof(_shr_phy_config_t), 1956 __cint_struct_members__shr_phy_config_t, 1957 __cint_maddr__shr_phy_config_t, 1958 }, 1959 #ifdef INCLUDE_FCMAP 1960 { 1961 "_shr_bfcmap_port_config_t", 1962 sizeof(_shr_bfcmap_port_config_t), 1963 __cint_struct_members__shr_bfcmap_port_config_t, 1964 __cint_maddr__shr_bfcmap_port_config_t, 1965 }, 1966 { 1967 "_shr_bfcmap_vlan_vsan_map_t", 1968 sizeof(_shr_bfcmap_vlan_vsan_map_t), 1969 __cint_struct_members___shr_bfcmap_vlan_vsan_map_t, 1970 __cint_maddr__shr_bfcmap_vlan_vsan_map_t, 1971 }, 1972 { 1973 "_shr_bfcmap_port_ability_t", 1974 sizeof(_shr_bfcmap_port_ability_t), 1975 __cint_struct_members___shr_bfcmap_port_ability_t, 1976 __cint_maddr__shr_bfcmap_port_ability_t, 1977 }, 1978 { 1979 "_shr_bfcmap_cos_to_pri_t", 1980 sizeof(_shr_bfcmap_cos_to_pri_t), 1981 __cint_struct_members___shr_bfcmap_cos_to_pri_t, 1982 __cint_maddr__shr_bfcmap_cos_to_pri_t, 1983 }, 1984 #endif 1985 { 1986 "_shr_rx_reasons_t", 1987 sizeof(_shr_rx_reasons_t), 1988 __cint_struct_members__shr_rx_reasons_t, 1989 __cint_maddr__shr_rx_reasons_t 1990 }, 1991 #if _SHR_PBMP_WIDTH != 0 /* new style */ 1992 { 1993 "_shr_pbmp_t", 1994 sizeof(_shr_pbmp_t), 1995 __cint_struct_members__shr_pbmp_t, 1996 __cint_maddr__shr_pbmp_t 1997 }, 1998 #endif 1999 { 2000 "_shr_switch_temperature_monitor_t", 2001 sizeof(_shr_switch_temperature_monitor_t), 2002 __cint_struct_members__shr_switch_temperature_monitor_t, 2003 __cint_maddr__shr_switch_temperature_monitor_t 2004 }, 2005 #ifdef INCLUDE_XFLOW_MACSEC 2006 { 2007 "xflow_macsec_secure_chan_info_t", 2008 sizeof(xflow_macsec_secure_chan_info_t), 2009 __cint_struct_members_xflow_macsec_secure_chan_info_t, 2010 __cint_maddr_xflow_macsec_secure_chan_info_t 2011 }, 2012 { 2013 "xflow_macsec_crypto_aes128_gcm_t", 2014 sizeof(xflow_macsec_crypto_aes128_gcm_t), 2015 __cint_struct_members_xflow_macsec_crypto_aes128_gcm_t, 2016 __cint_maddr_xflow_macsec_crypto_aes128_gcm_t 2017 }, 2018 { 2019 "xflow_macsec_secure_assoc_info_t", 2020 sizeof(xflow_macsec_secure_assoc_info_t), 2021 __cint_struct_members_xflow_macsec_secure_assoc_info_t, 2022 __cint_maddr_xflow_macsec_secure_assoc_info_t 2023 }, 2024 { 2025 "xflow_macsec_policy_info_t", 2026 sizeof(xflow_macsec_policy_info_t), 2027 __cint_struct_members_xflow_macsec_policy_info_t, 2028 __cint_maddr_xflow_macsec_policy_info_t 2029 }, 2030 { 2031 "xflow_macsec_flow_info_t", 2032 sizeof(xflow_macsec_flow_info_t), 2033 __cint_struct_members_xflow_macsec_flow_info_t, 2034 __cint_maddr_xflow_macsec_flow_info_t 2035 }, 2036 { 2037 "xflow_macsec_vlan_tpid_t", 2038 sizeof(xflow_macsec_vlan_tpid_t), 2039 __cint_struct_members_xflow_macsec_vlan_tpid_t, 2040 __cint_maddr_xflow_macsec_vlan_tpid_t 2041 }, 2042 { 2043 "xflow_macsec_mac_addr_info_t", 2044 sizeof(xflow_macsec_mac_addr_info_t), 2045 __cint_struct_members_xflow_macsec_mac_addr_info_t, 2046 __cint_maddr_xflow_macsec_mac_addr_info_t 2047 }, 2048 { 2049 "xflow_macsec_flow_info_mpls_t", 2050 sizeof(xflow_macsec_flow_info_mpls_t), 2051 __cint_struct_members_xflow_macsec_flow_info_mpls_t, 2052 __cint_maddr_xflow_macsec_flow_info_mpls_t 2053 }, 2054 { 2055 "xflow_macsec_flow_udf_param_t", 2056 sizeof(xflow_macsec_flow_udf_param_t), 2057 __cint_struct_members_xflow_macsec_flow_udf_param_t, 2058 __cint_maddr_xflow_macsec_flow_udf_param_t 2059 }, 2060 #endif 2061 #ifdef CPRIMOD_SUPPORT 2062 { 2063 "_shr_cpri_fast_eth_config_t", 2064 sizeof(_shr_cpri_fast_eth_config_t), 2065 __cint_struct_members__shr_cpri_fast_eth_config_t, 2066 __cint_maddr__shr_cpri_fast_eth_config_t, 2067 }, 2068 { 2069 "_shr_cpri_tag_gen_entry_t", 2070 sizeof(_shr_cpri_tag_gen_entry_t), 2071 __cint_struct_members__shr_cpri_tag_gen_entry_t, 2072 __cint_maddr__shr_cpri_tag_gen_entry_t, 2073 }, 2074 { 2075 "_shr_cpri_cw_l1_protocol_info_t", 2076 sizeof(_shr_cpri_cw_l1_protocol_info_t), 2077 __cint_struct_members__shr_cpri_cw_l1_protocol_info_t, 2078 __cint_maddr__shr_cpri_cw_l1_protocol_info_t, 2079 }, 2080 { 2081 "_shr_cpri_rx_vsd_flow_info_t", 2082 sizeof(_shr_cpri_rx_vsd_flow_info_t), 2083 __cint_struct_members__shr_cpri_rx_vsd_flow_info_t, 2084 __cint_maddr__shr_cpri_rx_vsd_flow_info_t, 2085 }, 2086 { 2087 "_shr_cpri_presentation_time_t", 2088 sizeof(_shr_cpri_presentation_time_t), 2089 __cint_struct_members__shr_cpri_presentation_time_t, 2090 __cint_maddr__shr_cpri_presentation_time_t, 2091 }, 2092 { 2093 "_shr_cpri_decap_presentation_config_t", 2094 sizeof(_shr_cpri_decap_presentation_config_t), 2095 __cint_struct_members__shr_cpri_decap_presentation_config_t, 2096 __cint_maddr__shr_cpri_decap_presentation_config_t, 2097 }, 2098 2099 { 2100 "_shr_cpri_cw_l1_config_info_t", 2101 sizeof(_shr_cpri_cw_l1_config_info_t), 2102 __cint_struct_members__shr_cpri_cw_l1_config_info_t, 2103 __cint_maddr__shr_cpri_cw_l1_config_info_t, 2104 }, 2105 { 2106 "_shr_cpri_tx_vsd_flow_info_t", 2107 sizeof(_shr_cpri_tx_vsd_flow_info_t), 2108 __cint_struct_members__shr_cpri_tx_vsd_flow_info_t, 2109 __cint_maddr__shr_cpri_tx_vsd_flow_info_t, 2110 }, 2111 { 2112 "_shr_cpri_1588_timestamp_ts_config_t", 2113 sizeof(_shr_cpri_1588_timestamp_ts_config_t), 2114 __cint_struct_members__shr_cpri_1588_timestamp_ts_config_t, 2115 __cint_maddr__shr_cpri_1588_timestamp_ts_config_t, 2116 }, 2117 { 2118 "_shr_cpri_intr_info_t", 2119 sizeof(_shr_cpri_intr_info_t), 2120 __cint_struct_members__shr_cpri_intr_info_t, 2121 __cint_maddr__shr_cpri_intr_info_t, 2122 }, 2123 { 2124 "_shr_cpri_fec_timestamp_config_t", 2125 sizeof(_shr_cpri_fec_timestamp_config_t), 2126 __cint_struct_members__shr_cpri_fec_timestamp_config_t, 2127 __cint_maddr__shr_cpri_fec_timestamp_config_t, 2128 }, 2129 #endif 2130 { 2131 "_shr_port_timestamp_adjust_t", 2132 sizeof(_shr_port_timestamp_adjust_t), 2133 __cint_struct_members__shr_port_timestamp_adjust_t, 2134 __cint_maddr__shr_port_timestamp_adjust_t 2135 }, 2136 { NULL } 2137 }; 2138 2139 2140 /* 2141 * Function pointers in <shared> 2142 */ 2143 2144 static cint_function_pointer_t __cint_sdk_function_pointers[4]; 2145 2146 static int 2147 __cint_fpointer__shr_port_phy_reset_cb(int unit, _shr_port_t port, void* user_data) 2148 { 2149 int rc = 0; 2150 cint_interpreter_callback(__cint_sdk_function_pointers+0, 3, 1, &unit, &port, &user_data, &rc); 2151 return rc; 2152 } 2153 static cint_parameter_desc_t __cint_parameters__shr_port_phy_reset_cb[] = 2154 { 2155 { "int", "rc", 0, 0 }, 2156 { "int", "unit", 0, 0 }, 2157 { "int", "port", 0, 0 }, 2158 { "void", "user_data", 1, 0 }, 2159 { NULL } 2160 }; 2161 2162 static void 2163 __cint_fpointer__shr_port_medium_status_cb(int unit, int port, _shr_port_medium_t medium, void* user_arg) 2164 { 2165 cint_interpreter_callback(__cint_sdk_function_pointers+1, 4, 0, &unit, &port, &medium, &user_arg); 2166 } 2167 static cint_parameter_desc_t __cint_parameters__shr_port_medium_status_cb[] = 2168 { 2169 { "void", "r", 0, 0 }, 2170 { "int", "unit", 0, 0 }, 2171 { "int", "port", 0, 0 }, 2172 { "_shr_port_medium_t", "medium", 0, 0 }, 2173 { "void", "user_arg", 1, 0 }, 2174 { NULL } 2175 }; 2176 2177 #ifdef CPRIMOD_SUPPORT 2178 static void 2179 __cint_fpointer__shr_cpri_port_interrupt_callback(int unit, int port, _shr_cpri_intr_info_t* data , void* user_data) 2180 { 2181 cint_interpreter_callback(__cint_sdk_function_pointers+2, 4, 0, &unit, &port, &data, &user_data); 2182 } 2183 static cint_parameter_desc_t __cint_parameters__shr_cpri_port_interrupt_callback[] = 2184 { 2185 { "void", "r", 0, 0 }, 2186 { "int", "unit", 0, 0 }, 2187 { "int", "port", 0, 0 }, 2188 { "_shr_cpri_intr_info_t", "data", 1, 0 }, 2189 { "void", "user_data", 1, 0 }, 2190 { NULL } 2191 }; 2192 #endif 2193 2194 static cint_function_pointer_t __cint_sdk_function_pointers[4] = 2195 { 2196 { 2197 "_shr_port_phy_reset_cb_t", 2198 (cint_fpointer_t) __cint_fpointer__shr_port_phy_reset_cb, 2199 __cint_parameters__shr_port_phy_reset_cb 2200 }, 2201 { 2202 "_shr_port_medium_status_cb_t", 2203 (cint_fpointer_t) __cint_fpointer__shr_port_medium_status_cb, 2204 __cint_parameters__shr_port_medium_status_cb 2205 }, 2206 #ifdef CPRIMOD_SUPPORT 2207 { 2208 "_shr_cpri_port_interrupt_callback_t", 2209 (cint_fpointer_t) __cint_fpointer__shr_cpri_port_interrupt_callback, 2210 __cint_parameters__shr_cpri_port_interrupt_callback 2211 }, 2212 #endif 2213 { NULL } 2214 }; 2215 2216 cint_data_t cint_sdk_data = 2217 { 2218 NULL, 2219 __cint_sdk_functions, 2220 __cint_sdk_structures, 2221 NULL, 2222 __cint_sdk_typedefs, 2223 NULL, 2224 __cint_sdk_function_pointers, 2225 __sdk_custom_iterators, 2226 __sdk_custom_macros, 2227 }; 2228 2229 #endif /* INCLUDE_LIB_CINT */