tr71_bcm56770_a0.soc (428370B)
1 # 2 # This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 3 # 4 # Copyright 2007-2019 Broadcom Inc. All rights reserved. 5 counter off 6 l2mode off 7 linkscan off 8 memscan off 9 config add parity_enable=0 10 init soc; 11 cancun load cmh; 12 cancun load cch; 13 init misc; 14 echo "there are 2140 more memories to test.";echo "tr 71 M=AGM_MONITOR_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=AGM_MONITOR_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 15 echo "there are 2139 more memories to test.";echo "tr 71 M=ALTERNATE_EMIRROR_BITMAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ALTERNATE_EMIRROR_BITMAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 16 echo "there are 2138 more memories to test.";echo "tr 71 M=BCAST_BLOCK_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=BCAST_BLOCK_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 17 #echo "there are 2137 more memories to test.";echo "tr 71 M=CENTRAL_CTR_EVICTION_FIFO Start=0 Count=1 SlamLowToHigh=0";tr 71 M=CENTRAL_CTR_EVICTION_FIFO Start=0 Count=1 SlamLowToHigh=0;echo "done"; 18 #echo "there are 2136 more memories to test.";echo "tr 71 M=CLPORT_WC_UCMEM_DATA Start=0 Count=1 SlamLowToHigh=0";tr 71 M=CLPORT_WC_UCMEM_DATA Start=0 Count=1 SlamLowToHigh=0;echo "done"; 19 echo "there are 2135 more memories to test.";echo "tr 71 M=CNG_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=CNG_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 20 echo "there are 2134 more memories to test.";echo "tr 71 M=PORT_COS_MAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PORT_COS_MAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 21 echo "there are 2133 more memories to test.";echo "tr 71 M=COS_MAP_SEL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=COS_MAP_SEL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 22 echo "there are 2132 more memories to test.";echo "tr 71 M=CPU_COS_MAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=CPU_COS_MAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 23 echo "there are 2131 more memories to test.";echo "tr 71 M=CPU_COS_MAP_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=CPU_COS_MAP_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 24 echo "there are 2130 more memories to test.";echo "tr 71 M=CPU_COS_MAP_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=CPU_COS_MAP_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 25 echo "there are 2129 more memories to test.";echo "tr 71 M=CPU_PBM Start=0 Count=0 SlamLowToHigh=0";tr 71 M=CPU_PBM Start=0 Count=0 SlamLowToHigh=0;echo "done"; 26 echo "there are 2128 more memories to test.";echo "tr 71 M=CPU_PBM_2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=CPU_PBM_2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 27 echo "there are 2127 more memories to test.";echo "tr 71 M=CPU_TS_MAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=CPU_TS_MAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 28 echo "there are 2126 more memories to test.";echo "tr 71 M=CTRL_PKT_SIGNATURE_1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=CTRL_PKT_SIGNATURE_1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 29 echo "there are 2125 more memories to test.";echo "tr 71 M=CTRL_PKT_SIGNATURE_2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=CTRL_PKT_SIGNATURE_2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 30 echo "there are 2124 more memories to test.";echo "tr 71 M=CTRL_PKT_SIGNATURE_3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=CTRL_PKT_SIGNATURE_3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 31 echo "there are 2123 more memories to test.";echo "tr 71 M=CTRL_PKT_SIGNATURE_4 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=CTRL_PKT_SIGNATURE_4 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 32 echo "there are 2122 more memories to test.";echo "tr 71 M=DEVICE_LOOPBACK_PORTS_BITMAP Start=0 Count=0 SlamLowToHigh=0";tr 71 M=DEVICE_LOOPBACK_PORTS_BITMAP Start=0 Count=0 SlamLowToHigh=0;echo "done"; 33 echo "there are 2121 more memories to test.";echo "tr 71 M=DLB_ECMP_ETHERTYPE_ELIGIBILITY_MAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_ECMP_ETHERTYPE_ELIGIBILITY_MAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 34 echo "there are 2120 more memories to test.";echo "tr 71 M=DLB_ECMP_FINAL_MEMBERS_QUALITY_MEASURE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_ECMP_FINAL_MEMBERS_QUALITY_MEASURE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 35 echo "there are 2119 more memories to test.";echo "tr 71 M=DLB_ECMP_FINAL_MEMBERS_QUALITY_MEASURE_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_ECMP_FINAL_MEMBERS_QUALITY_MEASURE_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 36 echo "there are 2118 more memories to test.";echo "tr 71 M=DLB_ECMP_FLOWSET Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_ECMP_FLOWSET Start=0 Count=1 SlamLowToHigh=0;echo "done"; 37 echo "there are 2117 more memories to test.";echo "tr 71 M=DLB_ECMP_FLOWSET_MEMBER Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_ECMP_FLOWSET_MEMBER Start=0 Count=1 SlamLowToHigh=0;echo "done"; 38 echo "there are 2116 more memories to test.";echo "tr 71 M=DLB_ECMP_FLOWSET_MEMBER_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_ECMP_FLOWSET_MEMBER_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 39 echo "there are 2115 more memories to test.";echo "tr 71 M=DLB_ECMP_FLOWSET_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_ECMP_FLOWSET_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 40 echo "there are 2114 more memories to test.";echo "tr 71 M=DLB_ECMP_FLOWSET_TIMESTAMP_PAGE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_ECMP_FLOWSET_TIMESTAMP_PAGE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 41 echo "there are 2113 more memories to test.";echo "tr 71 M=DLB_ECMP_FLOWSET_TIMESTAMP_PAGE_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_ECMP_FLOWSET_TIMESTAMP_PAGE_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 42 echo "there are 2112 more memories to test.";echo "tr 71 M=DLB_ECMP_GLB_QUANTIZE_THRESHOLD Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_ECMP_GLB_QUANTIZE_THRESHOLD Start=0 Count=1 SlamLowToHigh=0;echo "done"; 43 echo "there are 2111 more memories to test.";echo "tr 71 M=DLB_ECMP_GROUP_CONTROL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_ECMP_GROUP_CONTROL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 44 echo "there are 2110 more memories to test.";echo "tr 71 M=DLB_ECMP_GROUP_MEMBERSHIP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_ECMP_GROUP_MEMBERSHIP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 45 echo "there are 2109 more memories to test.";echo "tr 71 M=DLB_ECMP_GROUP_PORT_TO_MEMBER Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_ECMP_GROUP_PORT_TO_MEMBER Start=0 Count=1 SlamLowToHigh=0;echo "done"; 46 echo "there are 2108 more memories to test.";echo "tr 71 M=DLB_ECMP_GROUP_STATS Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_ECMP_GROUP_STATS Start=0 Count=1 SlamLowToHigh=0;echo "done"; 47 echo "there are 2107 more memories to test.";echo "tr 71 M=DLB_ECMP_GROUP_STATS_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_ECMP_GROUP_STATS_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 48 echo "there are 2106 more memories to test.";echo "tr 71 M=DLB_ECMP_LINK_CONTROL Start=0 Count=0 SlamLowToHigh=0";tr 71 M=DLB_ECMP_LINK_CONTROL Start=0 Count=0 SlamLowToHigh=0;echo "done"; 49 echo "there are 2105 more memories to test.";echo "tr 71 M=DLB_ECMP_OPTIMAL_CANDIDATE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_ECMP_OPTIMAL_CANDIDATE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 50 echo "there are 2104 more memories to test.";echo "tr 71 M=DLB_ECMP_OPTIMAL_CANDIDATE_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_ECMP_OPTIMAL_CANDIDATE_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 51 echo "there are 2103 more memories to test.";echo "tr 71 M=DLB_ECMP_PORT_AVG_QUALITY_MEASURE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_ECMP_PORT_AVG_QUALITY_MEASURE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 52 echo "there are 2102 more memories to test.";echo "tr 71 M=DLB_ECMP_PORT_AVG_QUALITY_MEASURE_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_ECMP_PORT_AVG_QUALITY_MEASURE_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 53 echo "there are 2101 more memories to test.";echo "tr 71 M=DLB_ECMP_PORT_INST_QUALITY_MEASURE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_ECMP_PORT_INST_QUALITY_MEASURE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 54 echo "there are 2100 more memories to test.";echo "tr 71 M=DLB_ECMP_PORT_INST_QUALITY_MEASURE_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_ECMP_PORT_INST_QUALITY_MEASURE_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 55 echo "there are 2099 more memories to test.";echo "tr 71 M=DLB_ECMP_PORT_QUALITY_MAPPING Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_ECMP_PORT_QUALITY_MAPPING Start=0 Count=1 SlamLowToHigh=0;echo "done"; 56 echo "there are 2098 more memories to test.";echo "tr 71 M=DLB_ECMP_PORT_QUALITY_UPDATE_MEASURE_CONTROL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_ECMP_PORT_QUALITY_UPDATE_MEASURE_CONTROL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 57 echo "there are 2097 more memories to test.";echo "tr 71 M=DLB_ECMP_PORT_QUALITY_UPDATE_MEASURE_CONTROL_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_ECMP_PORT_QUALITY_UPDATE_MEASURE_CONTROL_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 58 echo "there are 2096 more memories to test.";echo "tr 71 M=DLB_ECMP_QUANTIZED_AVG_QUALITY_MEASURE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_ECMP_QUANTIZED_AVG_QUALITY_MEASURE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 59 echo "there are 2095 more memories to test.";echo "tr 71 M=DLB_ECMP_QUANTIZED_AVG_QUALITY_MEASURE_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_ECMP_QUANTIZED_AVG_QUALITY_MEASURE_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 60 echo "there are 2094 more memories to test.";echo "tr 71 M=DLB_ECMP_QUANTIZE_CONTROL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_ECMP_QUANTIZE_CONTROL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 61 echo "there are 2093 more memories to test.";echo "tr 71 M=DLB_HGT_LAG_ETHERTYPE_ELIGIBILITY_MAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_HGT_LAG_ETHERTYPE_ELIGIBILITY_MAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 62 echo "there are 2092 more memories to test.";echo "tr 71 M=DLB_HGT_LAG_FINAL_MEMBERS_QUALITY_MEASURE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_HGT_LAG_FINAL_MEMBERS_QUALITY_MEASURE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 63 echo "there are 2091 more memories to test.";echo "tr 71 M=DLB_HGT_LAG_FINAL_MEMBERS_QUALITY_MEASURE_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_HGT_LAG_FINAL_MEMBERS_QUALITY_MEASURE_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 64 echo "there are 2090 more memories to test.";echo "tr 71 M=DLB_HGT_LAG_FLOWSET Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_HGT_LAG_FLOWSET Start=0 Count=1 SlamLowToHigh=0;echo "done"; 65 echo "there are 2089 more memories to test.";echo "tr 71 M=DLB_HGT_LAG_FLOWSET_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_HGT_LAG_FLOWSET_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 66 echo "there are 2088 more memories to test.";echo "tr 71 M=DLB_HGT_LAG_FLOWSET_TIMESTAMP_PAGE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_HGT_LAG_FLOWSET_TIMESTAMP_PAGE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 67 echo "there are 2087 more memories to test.";echo "tr 71 M=DLB_HGT_LAG_FLOWSET_TIMESTAMP_PAGE_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_HGT_LAG_FLOWSET_TIMESTAMP_PAGE_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 68 echo "there are 2086 more memories to test.";echo "tr 71 M=DLB_HGT_LAG_GLB_QUANTIZE_THRESHOLD Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_HGT_LAG_GLB_QUANTIZE_THRESHOLD Start=0 Count=1 SlamLowToHigh=0;echo "done"; 69 echo "there are 2085 more memories to test.";echo "tr 71 M=DLB_HGT_LAG_GROUP_CONTROL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_HGT_LAG_GROUP_CONTROL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 70 echo "there are 2084 more memories to test.";echo "tr 71 M=DLB_HGT_LAG_GROUP_MEMBERSHIP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_HGT_LAG_GROUP_MEMBERSHIP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 71 echo "there are 2083 more memories to test.";echo "tr 71 M=DLB_HGT_LAG_GROUP_STATS Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_HGT_LAG_GROUP_STATS Start=0 Count=1 SlamLowToHigh=0;echo "done"; 72 echo "there are 2082 more memories to test.";echo "tr 71 M=DLB_HGT_LAG_GROUP_STATS_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_HGT_LAG_GROUP_STATS_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 73 echo "there are 2081 more memories to test.";echo "tr 71 M=DLB_HGT_LAG_LINK_CONTROL Start=0 Count=0 SlamLowToHigh=0";tr 71 M=DLB_HGT_LAG_LINK_CONTROL Start=0 Count=0 SlamLowToHigh=0;echo "done"; 74 echo "there are 2080 more memories to test.";echo "tr 71 M=DLB_HGT_LAG_OPTIMAL_CANDIDATE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_HGT_LAG_OPTIMAL_CANDIDATE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 75 echo "there are 2079 more memories to test.";echo "tr 71 M=DLB_HGT_LAG_OPTIMAL_CANDIDATE_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_HGT_LAG_OPTIMAL_CANDIDATE_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 76 echo "there are 2078 more memories to test.";echo "tr 71 M=DLB_HGT_LAG_PORT_AVG_QUALITY_MEASURE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_HGT_LAG_PORT_AVG_QUALITY_MEASURE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 77 echo "there are 2077 more memories to test.";echo "tr 71 M=DLB_HGT_LAG_PORT_AVG_QUALITY_MEASURE_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_HGT_LAG_PORT_AVG_QUALITY_MEASURE_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 78 echo "there are 2076 more memories to test.";echo "tr 71 M=DLB_HGT_LAG_PORT_INST_QUALITY_MEASURE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_HGT_LAG_PORT_INST_QUALITY_MEASURE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 79 echo "there are 2075 more memories to test.";echo "tr 71 M=DLB_HGT_LAG_PORT_INST_QUALITY_MEASURE_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_HGT_LAG_PORT_INST_QUALITY_MEASURE_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 80 echo "there are 2074 more memories to test.";echo "tr 71 M=DLB_HGT_LAG_PORT_QUALITY_MAPPING Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_HGT_LAG_PORT_QUALITY_MAPPING Start=0 Count=1 SlamLowToHigh=0;echo "done"; 81 echo "there are 2073 more memories to test.";echo "tr 71 M=DLB_HGT_LAG_PORT_QUALITY_UPDATE_MEASURE_CONTROL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_HGT_LAG_PORT_QUALITY_UPDATE_MEASURE_CONTROL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 82 echo "there are 2072 more memories to test.";echo "tr 71 M=DLB_HGT_LAG_PORT_QUALITY_UPDATE_MEASURE_CONTROL_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_HGT_LAG_PORT_QUALITY_UPDATE_MEASURE_CONTROL_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 83 echo "there are 2071 more memories to test.";echo "tr 71 M=DLB_HGT_LAG_QUANTIZED_AVG_QUALITY_MEASURE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_HGT_LAG_QUANTIZED_AVG_QUALITY_MEASURE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 84 echo "there are 2070 more memories to test.";echo "tr 71 M=DLB_HGT_LAG_QUANTIZED_AVG_QUALITY_MEASURE_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_HGT_LAG_QUANTIZED_AVG_QUALITY_MEASURE_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 85 echo "there are 2069 more memories to test.";echo "tr 71 M=DLB_HGT_LAG_QUANTIZE_CONTROL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DLB_HGT_LAG_QUANTIZE_CONTROL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 86 echo "there are 2068 more memories to test.";echo "tr 71 M=DSCP_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DSCP_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 87 echo "there are 2067 more memories to test.";echo "tr 71 M=DST_COMPRESSION Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DST_COMPRESSION Start=0 Count=1 SlamLowToHigh=0;echo "done"; 88 echo "there are 2066 more memories to test.";echo "tr 71 M=DST_COMPRESSION_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DST_COMPRESSION_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 89 echo "there are 2065 more memories to test.";echo "tr 71 M=DST_COMPRESSION_DATA_ONLY_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DST_COMPRESSION_DATA_ONLY_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 90 echo "there are 2064 more memories to test.";echo "tr 71 M=DST_COMPRESSION_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DST_COMPRESSION_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 91 echo "there are 2063 more memories to test.";echo "tr 71 M=DST_COMPRESSION_TCAM_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DST_COMPRESSION_TCAM_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 92 echo "there are 2062 more memories to test.";echo "tr 71 M=DST_COMPRESSION_TCAM_ONLY_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=DST_COMPRESSION_TCAM_ONLY_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 93 echo "there are 2061 more memories to test.";echo "tr 71 M=ECMP_DLB_CONTROL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ECMP_DLB_CONTROL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 94 echo "there are 2060 more memories to test.";echo "tr 71 M=EFP_COUNTER_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EFP_COUNTER_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 95 echo "there are 2059 more memories to test.";echo "tr 71 M=EFP_COUNTER_TABLE_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EFP_COUNTER_TABLE_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 96 echo "there are 2058 more memories to test.";echo "tr 71 M=EFP_METER_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EFP_METER_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 97 echo "there are 2057 more memories to test.";echo "tr 71 M=EFP_METER_TABLE_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EFP_METER_TABLE_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 98 echo "there are 2056 more memories to test.";echo "tr 71 M=EFP_POLICY_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EFP_POLICY_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 99 echo "there are 2055 more memories to test.";echo "tr 71 M=EFP_POLICY_TABLE_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EFP_POLICY_TABLE_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 100 echo "there are 2054 more memories to test.";echo "tr 71 M=EFP_TCAM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EFP_TCAM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 101 echo "there are 2053 more memories to test.";echo "tr 71 M=EFP_TCAM_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EFP_TCAM_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 102 echo "there are 2052 more memories to test.";echo "tr 71 M=EGR_1588_SA Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_1588_SA Start=0 Count=1 SlamLowToHigh=0;echo "done"; 103 echo "there are 2051 more memories to test.";echo "tr 71 M=EGR_ADAPT_1_ACTION_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ADAPT_1_ACTION_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 104 echo "there are 2050 more memories to test.";echo "tr 71 M=EGR_ADAPT_1_FIXED_KEY_TABLE_ATTRS Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ADAPT_1_FIXED_KEY_TABLE_ATTRS Start=0 Count=1 SlamLowToHigh=0;echo "done"; 105 echo "there are 2049 more memories to test.";echo "tr 71 M=EGR_ADAPT_1_KEY_GEN_1_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ADAPT_1_KEY_GEN_1_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 106 echo "there are 2048 more memories to test.";echo "tr 71 M=EGR_ADAPT_1_KEY_GEN_1_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ADAPT_1_KEY_GEN_1_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 107 echo "there are 2047 more memories to test.";echo "tr 71 M=EGR_ADAPT_1_KEY_GEN_2_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ADAPT_1_KEY_GEN_2_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 108 echo "there are 2046 more memories to test.";echo "tr 71 M=EGR_ADAPT_1_KEY_GEN_2_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ADAPT_1_KEY_GEN_2_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 109 echo "there are 2045 more memories to test.";echo "tr 71 M=EGR_ADAPT_1_LOGICAL_TBL_SEL_SRAM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ADAPT_1_LOGICAL_TBL_SEL_SRAM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 110 echo "there are 2044 more memories to test.";echo "tr 71 M=EGR_ADAPT_1_LOGICAL_TBL_SEL_TCAM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ADAPT_1_LOGICAL_TBL_SEL_TCAM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 111 echo "there are 2043 more memories to test.";echo "tr 71 M=EGR_ADAPT_1_MISS_POLICY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ADAPT_1_MISS_POLICY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 112 echo "there are 2042 more memories to test.";echo "tr 71 M=EGR_ADAPT_1_POLICY_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ADAPT_1_POLICY_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 113 echo "there are 2041 more memories to test.";echo "tr 71 M=EGR_ADAPT_2_ACTION_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ADAPT_2_ACTION_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 114 echo "there are 2040 more memories to test.";echo "tr 71 M=EGR_ADAPT_2_FIXED_KEY_TABLE_ATTRS Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ADAPT_2_FIXED_KEY_TABLE_ATTRS Start=0 Count=1 SlamLowToHigh=0;echo "done"; 115 echo "there are 2039 more memories to test.";echo "tr 71 M=EGR_ADAPT_2_KEY_GEN_1_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ADAPT_2_KEY_GEN_1_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 116 echo "there are 2038 more memories to test.";echo "tr 71 M=EGR_ADAPT_2_KEY_GEN_1_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ADAPT_2_KEY_GEN_1_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 117 echo "there are 2037 more memories to test.";echo "tr 71 M=EGR_ADAPT_2_KEY_GEN_2_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ADAPT_2_KEY_GEN_2_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 118 echo "there are 2036 more memories to test.";echo "tr 71 M=EGR_ADAPT_2_KEY_GEN_2_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ADAPT_2_KEY_GEN_2_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 119 echo "there are 2035 more memories to test.";echo "tr 71 M=EGR_ADAPT_2_LOGICAL_TBL_SEL_SRAM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ADAPT_2_LOGICAL_TBL_SEL_SRAM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 120 echo "there are 2034 more memories to test.";echo "tr 71 M=EGR_ADAPT_2_LOGICAL_TBL_SEL_TCAM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ADAPT_2_LOGICAL_TBL_SEL_TCAM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 121 echo "there are 2033 more memories to test.";echo "tr 71 M=EGR_ADAPT_2_MISS_POLICY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ADAPT_2_MISS_POLICY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 122 echo "there are 2032 more memories to test.";echo "tr 71 M=EGR_ADAPT_2_POLICY_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ADAPT_2_POLICY_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 123 echo "there are 2031 more memories to test.";echo "tr 71 M=EGR_COUNTER_CONTROL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_COUNTER_CONTROL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 124 echo "there are 2030 more memories to test.";echo "tr 71 M=EGR_DELETE_CONTROL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_DELETE_CONTROL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 125 echo "there are 2029 more memories to test.";echo "tr 71 M=EGR_DGPP_TO_NHI Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_DGPP_TO_NHI Start=0 Count=1 SlamLowToHigh=0;echo "done"; 126 echo "there are 2028 more memories to test.";echo "tr 71 M=EGR_DGPP_TO_NHI_MODBASE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_DGPP_TO_NHI_MODBASE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 127 echo "there are 2027 more memories to test.";echo "tr 71 M=EGR_DOP_STORAGE_MEM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_DOP_STORAGE_MEM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 128 echo "there are 2026 more memories to test.";echo "tr 71 M=EGR_DOP_STORAGE_MEM_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_DOP_STORAGE_MEM_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 129 echo "there are 2025 more memories to test.";echo "tr 71 M=EGR_DVP_ATTRIBUTE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_DVP_ATTRIBUTE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 130 echo "there are 2024 more memories to test.";echo "tr 71 M=EGR_DVP_ATTRIBUTE_ACTION_MASK_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_DVP_ATTRIBUTE_ACTION_MASK_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 131 echo "there are 2023 more memories to test.";echo "tr 71 M=EGR_DVP_ATTRIBUTE_ACTION_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_DVP_ATTRIBUTE_ACTION_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 132 echo "there are 2022 more memories to test.";echo "tr 71 M=EGR_EM_MTP_INDEX Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_EM_MTP_INDEX Start=0 Count=1 SlamLowToHigh=0;echo "done"; 133 echo "there are 2021 more memories to test.";echo "tr 71 M=EGR_ENABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ENABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 134 echo "there are 2020 more memories to test.";echo "tr 71 M=EGR_FIELD_EXTRACTION_PROFILE_1_TCAM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_FIELD_EXTRACTION_PROFILE_1_TCAM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 135 echo "there are 2019 more memories to test.";echo "tr 71 M=EGR_FIELD_EXTRACTION_PROFILE_1_TCAM_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_FIELD_EXTRACTION_PROFILE_1_TCAM_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 136 echo "there are 2018 more memories to test.";echo "tr 71 M=EGR_FIELD_EXTRACTION_PROFILE_1_TCAM_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_FIELD_EXTRACTION_PROFILE_1_TCAM_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 137 echo "there are 2017 more memories to test.";echo "tr 71 M=EGR_FIELD_EXTRACTION_PROFILE_2_TCAM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_FIELD_EXTRACTION_PROFILE_2_TCAM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 138 echo "there are 2016 more memories to test.";echo "tr 71 M=EGR_FIELD_EXTRACTION_PROFILE_2_TCAM_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_FIELD_EXTRACTION_PROFILE_2_TCAM_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 139 echo "there are 2015 more memories to test.";echo "tr 71 M=EGR_FIELD_EXTRACTION_PROFILE_2_TCAM_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_FIELD_EXTRACTION_PROFILE_2_TCAM_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 140 echo "there are 2014 more memories to test.";echo "tr 71 M=EGR_FIELD_EXTRACTION_PROFILE_CONTROL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_FIELD_EXTRACTION_PROFILE_CONTROL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 141 echo "there are 2013 more memories to test.";echo "tr 71 M=EGR_FLEX_CONTAINER_UPDATE_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_FLEX_CONTAINER_UPDATE_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 142 echo "there are 2012 more memories to test.";echo "tr 71 M=EGR_FLEX_CONTAINER_UPDATE_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_FLEX_CONTAINER_UPDATE_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 143 echo "there are 2011 more memories to test.";echo "tr 71 M=EGR_FLEX_CTR_COS_MAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_FLEX_CTR_COS_MAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 144 echo "there are 2010 more memories to test.";echo "tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 145 echo "there are 2009 more memories to test.";echo "tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 146 echo "there are 2008 more memories to test.";echo "tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 147 echo "there are 2007 more memories to test.";echo "tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_1_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_1_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 148 echo "there are 2006 more memories to test.";echo "tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 149 echo "there are 2005 more memories to test.";echo "tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_2_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_2_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 150 echo "there are 2004 more memories to test.";echo "tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 151 echo "there are 2003 more memories to test.";echo "tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_3_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_3_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 152 echo "there are 2002 more memories to test.";echo "tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 153 echo "there are 2001 more memories to test.";echo "tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 154 echo "there are 2000 more memories to test.";echo "tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 155 echo "there are 1999 more memories to test.";echo "tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 156 echo "there are 1998 more memories to test.";echo "tr 71 M=EGR_FLEX_CTR_PKT_PRI_MAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_FLEX_CTR_PKT_PRI_MAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 157 echo "there are 1997 more memories to test.";echo "tr 71 M=EGR_FLEX_CTR_PKT_RES_MAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_FLEX_CTR_PKT_RES_MAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 158 echo "there are 1996 more memories to test.";echo "tr 71 M=EGR_FLEX_CTR_PORT_MAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_FLEX_CTR_PORT_MAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 159 echo "there are 1995 more memories to test.";echo "tr 71 M=EGR_FLEX_CTR_PRI_CNG_MAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_FLEX_CTR_PRI_CNG_MAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 160 echo "there are 1994 more memories to test.";echo "tr 71 M=EGR_FLEX_CTR_TOS_MAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_FLEX_CTR_TOS_MAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 161 echo "there are 1993 more memories to test.";echo "tr 71 M=EGR_GPP_ATTRIBUTES Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_GPP_ATTRIBUTES Start=0 Count=1 SlamLowToHigh=0;echo "done"; 162 echo "there are 1992 more memories to test.";echo "tr 71 M=EGR_GPP_ATTRIBUTES_MODBASE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_GPP_ATTRIBUTES_MODBASE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 163 echo "there are 1991 more memories to test.";echo "tr 71 M=EGR_HDR_ID_EFPPARS_EN Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_HDR_ID_EFPPARS_EN Start=0 Count=1 SlamLowToHigh=0;echo "done"; 164 echo "there are 1990 more memories to test.";echo "tr 71 M=EGR_HDR_ID_EFPPARS_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_HDR_ID_EFPPARS_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 165 echo "there are 1989 more memories to test.";echo "tr 71 M=EGR_IM_MTP_INDEX Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_IM_MTP_INDEX Start=0 Count=1 SlamLowToHigh=0;echo "done"; 166 echo "there are 1988 more memories to test.";echo "tr 71 M=EGR_ING_PORT Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ING_PORT Start=0 Count=1 SlamLowToHigh=0;echo "done"; 167 echo "there are 1987 more memories to test.";echo "tr 71 M=EGR_INT_CN_TO_PKT_ECN_MAPPING Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_INT_CN_TO_PKT_ECN_MAPPING Start=0 Count=1 SlamLowToHigh=0;echo "done"; 168 echo "there are 1986 more memories to test.";echo "tr 71 M=EGR_INT_CN_UPDATE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_INT_CN_UPDATE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 169 echo "there are 1985 more memories to test.";echo "tr 71 M=EGR_IPMC Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_IPMC Start=0 Count=1 SlamLowToHigh=0;echo "done"; 170 echo "there are 1984 more memories to test.";echo "tr 71 M=EGR_IP_ADDRESS_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_IP_ADDRESS_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 171 echo "there are 1983 more memories to test.";echo "tr 71 M=EGR_IP_CUT_THRU_CLASS Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_IP_CUT_THRU_CLASS Start=0 Count=1 SlamLowToHigh=0;echo "done"; 172 echo "there are 1982 more memories to test.";echo "tr 71 M=EGR_IP_TUNNEL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_IP_TUNNEL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 173 echo "there are 1981 more memories to test.";echo "tr 71 M=EGR_IP_TUNNEL_ACTION_MASK_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_IP_TUNNEL_ACTION_MASK_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 174 echo "there are 1980 more memories to test.";echo "tr 71 M=EGR_IP_TUNNEL_ACTION_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_IP_TUNNEL_ACTION_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 175 echo "there are 1979 more memories to test.";echo "tr 71 M=EGR_IP_TUNNEL_IPV6 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_IP_TUNNEL_IPV6 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 176 echo "there are 1978 more memories to test.";echo "tr 71 M=EGR_IP_TUNNEL_MPLS Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_IP_TUNNEL_MPLS Start=0 Count=1 SlamLowToHigh=0;echo "done"; 177 echo "there are 1977 more memories to test.";echo "tr 71 M=EGR_IP_TUNNEL_MPLS_DOUBLE_WIDE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_IP_TUNNEL_MPLS_DOUBLE_WIDE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 178 echo "there are 1976 more memories to test.";echo "tr 71 M=EGR_L2_TAG_INHERIT_ACTION_MASK_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_L2_TAG_INHERIT_ACTION_MASK_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 179 echo "there are 1975 more memories to test.";echo "tr 71 M=EGR_L2_TAG_INHERIT_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_L2_TAG_INHERIT_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 180 echo "there are 1974 more memories to test.";echo "tr 71 M=EGR_L3_INTF Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_L3_INTF Start=0 Count=1 SlamLowToHigh=0;echo "done"; 181 echo "there are 1973 more memories to test.";echo "tr 71 M=EGR_L3_INTF_ACTION_MASK_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_L3_INTF_ACTION_MASK_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 182 echo "there are 1972 more memories to test.";echo "tr 71 M=EGR_L3_INTF_ACTION_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_L3_INTF_ACTION_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 183 echo "there are 1971 more memories to test.";echo "tr 71 M=EGR_L3_NEXT_HOP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_L3_NEXT_HOP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 184 echo "there are 1970 more memories to test.";echo "tr 71 M=EGR_L3_NEXT_HOP_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_L3_NEXT_HOP_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 185 echo "there are 1969 more memories to test.";echo "tr 71 M=EGR_L3_NEXT_HOP_ACTION_MASK_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_L3_NEXT_HOP_ACTION_MASK_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 186 echo "there are 1968 more memories to test.";echo "tr 71 M=EGR_L3_NEXT_HOP_ACTION_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_L3_NEXT_HOP_ACTION_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 187 echo "there are 1967 more memories to test.";echo "tr 71 M=EGR_LABEL_PRECEDENCE_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_LABEL_PRECEDENCE_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 188 echo "there are 1966 more memories to test.";echo "tr 71 M=EGR_LPORT_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_LPORT_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 189 echo "there are 1965 more memories to test.";echo "tr 71 M=EGR_MACDA_OUI_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_MACDA_OUI_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 190 echo "there are 1964 more memories to test.";echo "tr 71 M=EGR_MAC_DA_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_MAC_DA_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 191 echo "there are 1963 more memories to test.";echo "tr 71 M=EGR_MAP_MH Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_MAP_MH Start=0 Count=1 SlamLowToHigh=0;echo "done"; 192 echo "there are 1962 more memories to test.";echo "tr 71 M=EGR_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 193 echo "there are 1961 more memories to test.";echo "tr 71 M=EGR_MASK_MODBASE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_MASK_MODBASE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 194 echo "there are 1960 more memories to test.";echo "tr 71 M=EGR_MIM_ISID_DOT1P_MAPPING_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_MIM_ISID_DOT1P_MAPPING_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 195 echo "there are 1959 more memories to test.";echo "tr 71 M=EGR_MIRROR_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_MIRROR_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 196 echo "there are 1958 more memories to test.";echo "tr 71 M=EGR_MIRROR_TABLE_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_MIRROR_TABLE_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 197 echo "there are 1957 more memories to test.";echo "tr 71 M=EGR_MMU_CELL_CREDIT Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_MMU_CELL_CREDIT Start=0 Count=1 SlamLowToHigh=0;echo "done"; 198 echo "there are 1956 more memories to test.";echo "tr 71 M=EGR_MOD_MAP_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_MOD_MAP_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 199 echo "there are 1955 more memories to test.";echo "tr 71 M=EGR_MPLS_EXP_MAPPING_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_MPLS_EXP_MAPPING_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 200 echo "there are 1954 more memories to test.";echo "tr 71 M=EGR_MPLS_EXP_MAPPING_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_MPLS_EXP_MAPPING_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 201 echo "there are 1953 more memories to test.";echo "tr 71 M=EGR_MPLS_EXP_MAPPING_3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_MPLS_EXP_MAPPING_3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 202 echo "there are 1952 more memories to test.";echo "tr 71 M=EGR_MPLS_PRI_MAPPING Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_MPLS_PRI_MAPPING Start=0 Count=1 SlamLowToHigh=0;echo "done"; 203 echo "there are 1951 more memories to test.";echo "tr 71 M=EGR_MPLS_VC_AND_SWAP_LABEL_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_MPLS_VC_AND_SWAP_LABEL_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 204 echo "there are 1950 more memories to test.";echo "tr 71 M=EGR_MTU Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_MTU Start=0 Count=1 SlamLowToHigh=0;echo "done"; 205 echo "there are 1949 more memories to test.";echo "tr 71 M=EGR_NAT_PACKET_EDIT_INFO Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_NAT_PACKET_EDIT_INFO Start=0 Count=1 SlamLowToHigh=0;echo "done"; 206 echo "there are 1948 more memories to test.";echo "tr 71 M=EGR_NETWORK_PRUNE_CONTROL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_NETWORK_PRUNE_CONTROL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 207 echo "there are 1947 more memories to test.";echo "tr 71 M=EGR_PERQ_XMT_COUNTERS Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_PERQ_XMT_COUNTERS Start=0 Count=1 SlamLowToHigh=0;echo "done"; 208 echo "there are 1946 more memories to test.";echo "tr 71 M=EGR_PERQ_XMT_COUNTERS_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_PERQ_XMT_COUNTERS_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 209 echo "there are 1945 more memories to test.";echo "tr 71 M=EGR_PER_PORT_BUFFER_SFT_RESET Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_PER_PORT_BUFFER_SFT_RESET Start=0 Count=1 SlamLowToHigh=0;echo "done"; 210 echo "there are 1944 more memories to test.";echo "tr 71 M=EGR_PKT_ECN_TO_EXP_MAPPING_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_PKT_ECN_TO_EXP_MAPPING_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 211 echo "there are 1943 more memories to test.";echo "tr 71 M=EGR_PKT_ECN_TO_EXP_MAPPING_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_PKT_ECN_TO_EXP_MAPPING_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 212 echo "there are 1942 more memories to test.";echo "tr 71 M=EGR_PKT_ECN_TO_EXP_MAPPING_3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_PKT_ECN_TO_EXP_MAPPING_3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 213 echo "there are 1941 more memories to test.";echo "tr 71 M=EGR_PKT_ECN_TO_EXP_MAPPING_4 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_PKT_ECN_TO_EXP_MAPPING_4 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 214 echo "there are 1940 more memories to test.";echo "tr 71 M=EGR_PKT_FLOW_SELECT_TCAM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_PKT_FLOW_SELECT_TCAM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 215 echo "there are 1939 more memories to test.";echo "tr 71 M=EGR_PKT_FLOW_SELECT_TCAM_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_PKT_FLOW_SELECT_TCAM_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 216 echo "there are 1938 more memories to test.";echo "tr 71 M=EGR_PKT_FLOW_SELECT_TCAM_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_PKT_FLOW_SELECT_TCAM_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 217 echo "there are 1937 more memories to test.";echo "tr 71 M=EGR_PKT_FLOW_ZONE_SELECT_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_PKT_FLOW_ZONE_SELECT_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 218 echo "there are 1936 more memories to test.";echo "tr 71 M=EGR_PORT Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_PORT Start=0 Count=1 SlamLowToHigh=0;echo "done"; 219 echo "there are 1935 more memories to test.";echo "tr 71 M=EGR_PORT_CREDIT_RESET Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_PORT_CREDIT_RESET Start=0 Count=1 SlamLowToHigh=0;echo "done"; 220 echo "there are 1934 more memories to test.";echo "tr 71 M=EGR_QOS_CTRL_TCAM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_QOS_CTRL_TCAM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 221 echo "there are 1933 more memories to test.";echo "tr 71 M=EGR_QOS_CTRL_TCAM_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_QOS_CTRL_TCAM_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 222 echo "there are 1932 more memories to test.";echo "tr 71 M=EGR_QOS_CTRL_TCAM_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_QOS_CTRL_TCAM_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 223 echo "there are 1931 more memories to test.";echo "tr 71 M=EGR_QOS_ECN_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_QOS_ECN_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 224 echo "there are 1930 more memories to test.";echo "tr 71 M=EGR_SEQUENCE_NUMBER_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_SEQUENCE_NUMBER_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 225 echo "there are 1929 more memories to test.";echo "tr 71 M=EGR_SEQUENCE_NUMBER_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_SEQUENCE_NUMBER_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 226 echo "there are 1928 more memories to test.";echo "tr 71 M=EGR_SEQUENCE_NUMBER_TABLE_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_SEQUENCE_NUMBER_TABLE_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 227 #echo "there are 1927 more memories to test.";echo "tr 71 M=EGR_SER_FIFO Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_SER_FIFO Start=0 Count=1 SlamLowToHigh=0;echo "done"; 228 #echo "there are 1926 more memories to test.";echo "tr 71 M=EGR_SER_FIFO_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_SER_FIFO_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 229 echo "there are 1925 more memories to test.";echo "tr 71 M=EGR_SHAPING_CONTROL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_SHAPING_CONTROL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 230 echo "there are 1924 more memories to test.";echo "tr 71 M=EGR_SPECIAL_PKT_HANDLING_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_SPECIAL_PKT_HANDLING_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 231 echo "there are 1923 more memories to test.";echo "tr 71 M=EGR_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 232 echo "there are 1922 more memories to test.";echo "tr 71 M=EGR_TS_UTC_CONVERSION Start=0 Count=0 SlamLowToHigh=0";tr 71 M=EGR_TS_UTC_CONVERSION Start=0 Count=0 SlamLowToHigh=0;echo "done"; 233 echo "there are 1921 more memories to test.";echo "tr 71 M=EGR_TUNNEL_ECN_ENCAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_TUNNEL_ECN_ENCAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 234 echo "there are 1920 more memories to test.";echo "tr 71 M=EGR_TX_PROT_GROUP_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_TX_PROT_GROUP_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 235 echo "there are 1919 more memories to test.";echo "tr 71 M=EGR_VC_AND_SWAP_ACTION_MASK_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VC_AND_SWAP_ACTION_MASK_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 236 echo "there are 1918 more memories to test.";echo "tr 71 M=EGR_VC_AND_SWAP_ACTION_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VC_AND_SWAP_ACTION_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 237 echo "there are 1917 more memories to test.";echo "tr 71 M=EGR_VFI Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VFI Start=0 Count=1 SlamLowToHigh=0;echo "done"; 238 echo "there are 1916 more memories to test.";echo "tr 71 M=EGR_VFT_FIELDS_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VFT_FIELDS_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 239 echo "there are 1915 more memories to test.";echo "tr 71 M=EGR_VFT_PRI_MAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VFT_PRI_MAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 240 echo "there are 1914 more memories to test.";echo "tr 71 M=EGR_VLAN Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VLAN Start=0 Count=1 SlamLowToHigh=0;echo "done"; 241 echo "there are 1913 more memories to test.";echo "tr 71 M=EGR_VLAN_CONTROL_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VLAN_CONTROL_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 242 echo "there are 1912 more memories to test.";echo "tr 71 M=EGR_VLAN_CONTROL_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VLAN_CONTROL_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 243 echo "there are 1911 more memories to test.";echo "tr 71 M=EGR_VLAN_CONTROL_3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VLAN_CONTROL_3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 244 #echo "there are 1910 more memories to test.";echo "tr 71 M=EGR_VLAN_STG Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VLAN_STG Start=0 Count=1 SlamLowToHigh=0;echo "done"; 245 echo "there are 1909 more memories to test.";echo "tr 71 M=EGR_VLAN_TAG_ACTION_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VLAN_TAG_ACTION_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 246 echo "there are 1908 more memories to test.";echo "tr 71 M=EGR_VLAN_TAG_ACTION_PROFILE_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VLAN_TAG_ACTION_PROFILE_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 247 #echo "there are 1907 more memories to test.";echo "tr 71 M=EGR_VLAN_VFI_MEMBERSHIP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VLAN_VFI_MEMBERSHIP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 248 #echo "there are 1906 more memories to test.";echo "tr 71 M=EGR_VLAN_VFI_UNTAG Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VLAN_VFI_UNTAG Start=0 Count=1 SlamLowToHigh=0;echo "done"; 249 echo "there are 1905 more memories to test.";echo "tr 71 M=EGR_VLAN_XLATE_1_ACTION_TABLE_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VLAN_XLATE_1_ACTION_TABLE_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 250 echo "there are 1904 more memories to test.";echo "tr 71 M=EGR_VLAN_XLATE_1_ACTION_TABLE_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VLAN_XLATE_1_ACTION_TABLE_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 251 #echo "there are 1903 more memories to test.";echo "tr 71 M=EGR_VLAN_XLATE_1_DOUBLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VLAN_XLATE_1_DOUBLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 252 echo "there are 1902 more memories to test.";echo "tr 71 M=EGR_VLAN_XLATE_1_ECC Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VLAN_XLATE_1_ECC Start=0 Count=1 SlamLowToHigh=0;echo "done"; 253 echo "there are 1901 more memories to test.";echo "tr 71 M=EGR_VLAN_XLATE_1_KEY_ATTRIBUTES Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VLAN_XLATE_1_KEY_ATTRIBUTES Start=0 Count=1 SlamLowToHigh=0;echo "done"; 254 echo "there are 1900 more memories to test.";echo "tr 71 M=EGR_VLAN_XLATE_1_LP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VLAN_XLATE_1_LP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 255 echo "there are 1899 more memories to test.";echo "tr 71 M=EGR_VLAN_XLATE_1_REMAP_TABLE_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VLAN_XLATE_1_REMAP_TABLE_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 256 echo "there are 1898 more memories to test.";echo "tr 71 M=EGR_VLAN_XLATE_1_REMAP_TABLE_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VLAN_XLATE_1_REMAP_TABLE_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 257 #echo "there are 1897 more memories to test.";echo "tr 71 M=EGR_VLAN_XLATE_1_SINGLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VLAN_XLATE_1_SINGLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 258 echo "there are 1896 more memories to test.";echo "tr 71 M=EGR_VLAN_XLATE_2_ACTION_TABLE_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VLAN_XLATE_2_ACTION_TABLE_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 259 echo "there are 1895 more memories to test.";echo "tr 71 M=EGR_VLAN_XLATE_2_ACTION_TABLE_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VLAN_XLATE_2_ACTION_TABLE_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 260 echo "there are 1894 more memories to test.";echo "tr 71 M=EGR_VLAN_XLATE_2_DOUBLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VLAN_XLATE_2_DOUBLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 261 echo "there are 1893 more memories to test.";echo "tr 71 M=EGR_VLAN_XLATE_2_ECC Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VLAN_XLATE_2_ECC Start=0 Count=1 SlamLowToHigh=0;echo "done"; 262 echo "there are 1892 more memories to test.";echo "tr 71 M=EGR_VLAN_XLATE_2_KEY_ATTRIBUTES Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VLAN_XLATE_2_KEY_ATTRIBUTES Start=0 Count=1 SlamLowToHigh=0;echo "done"; 263 echo "there are 1891 more memories to test.";echo "tr 71 M=EGR_VLAN_XLATE_2_LP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VLAN_XLATE_2_LP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 264 echo "there are 1890 more memories to test.";echo "tr 71 M=EGR_VLAN_XLATE_2_REMAP_TABLE_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VLAN_XLATE_2_REMAP_TABLE_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 265 echo "there are 1889 more memories to test.";echo "tr 71 M=EGR_VLAN_XLATE_2_REMAP_TABLE_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VLAN_XLATE_2_REMAP_TABLE_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 266 echo "there are 1888 more memories to test.";echo "tr 71 M=EGR_VLAN_XLATE_2_SINGLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VLAN_XLATE_2_SINGLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 267 echo "there are 1887 more memories to test.";echo "tr 71 M=EGR_VNTAG_ETAG_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VNTAG_ETAG_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 268 echo "there are 1886 more memories to test.";echo "tr 71 M=EGR_VPLAG_GROUP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VPLAG_GROUP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 269 echo "there are 1885 more memories to test.";echo "tr 71 M=EGR_VPLAG_MEMBER Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VPLAG_MEMBER Start=0 Count=1 SlamLowToHigh=0;echo "done"; 270 echo "there are 1884 more memories to test.";echo "tr 71 M=EGR_VP_VLAN_MEMBERSHIP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VP_VLAN_MEMBERSHIP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 271 echo "there are 1883 more memories to test.";echo "tr 71 M=EGR_VP_VLAN_MEMBERSHIP_ACTION_TABLE_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VP_VLAN_MEMBERSHIP_ACTION_TABLE_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 272 echo "there are 1882 more memories to test.";echo "tr 71 M=EGR_VP_VLAN_MEMBERSHIP_ACTION_TABLE_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VP_VLAN_MEMBERSHIP_ACTION_TABLE_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 273 echo "there are 1881 more memories to test.";echo "tr 71 M=EGR_VP_VLAN_MEMBERSHIP_ECC Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VP_VLAN_MEMBERSHIP_ECC Start=0 Count=1 SlamLowToHigh=0;echo "done"; 274 echo "there are 1880 more memories to test.";echo "tr 71 M=EGR_VP_VLAN_MEMBERSHIP_KEY_ATTRIBUTES Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VP_VLAN_MEMBERSHIP_KEY_ATTRIBUTES Start=0 Count=1 SlamLowToHigh=0;echo "done"; 275 echo "there are 1879 more memories to test.";echo "tr 71 M=EGR_VP_VLAN_MEMBERSHIP_REMAP_TABLE_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VP_VLAN_MEMBERSHIP_REMAP_TABLE_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 276 echo "there are 1878 more memories to test.";echo "tr 71 M=EGR_VP_VLAN_MEMBERSHIP_REMAP_TABLE_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VP_VLAN_MEMBERSHIP_REMAP_TABLE_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 277 echo "there are 1877 more memories to test.";echo "tr 71 M=EGR_VSAN_INTPRI_MAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_VSAN_INTPRI_MAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 278 echo "there are 1876 more memories to test.";echo "tr 71 M=EGR_XMIT_START_COUNT Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_XMIT_START_COUNT Start=0 Count=1 SlamLowToHigh=0;echo "done"; 279 echo "there are 1875 more memories to test.";echo "tr 71 M=EGR_XMIT_START_COUNT_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_XMIT_START_COUNT_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 280 echo "there are 1874 more memories to test.";echo "tr 71 M=EGR_ZONE_0_EDITOR_CONTROL_TCAM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_0_EDITOR_CONTROL_TCAM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 281 echo "there are 1873 more memories to test.";echo "tr 71 M=EGR_ZONE_0_EDITOR_CONTROL_TCAM_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_0_EDITOR_CONTROL_TCAM_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 282 echo "there are 1872 more memories to test.";echo "tr 71 M=EGR_ZONE_0_EDITOR_CONTROL_TCAM_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_0_EDITOR_CONTROL_TCAM_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 283 echo "there are 1871 more memories to test.";echo "tr 71 M=EGR_ZONE_0_MATCH_ID_ATTRIBUTES_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_0_MATCH_ID_ATTRIBUTES_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 284 echo "there are 1870 more memories to test.";echo "tr 71 M=EGR_ZONE_0_VAR_LEN_HDR1_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_0_VAR_LEN_HDR1_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 285 echo "there are 1869 more memories to test.";echo "tr 71 M=EGR_ZONE_0_VAR_LEN_HDR2_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_0_VAR_LEN_HDR2_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 286 echo "there are 1868 more memories to test.";echo "tr 71 M=EGR_ZONE_1_DOT1P_MAPPING_TABLE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_1_DOT1P_MAPPING_TABLE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 287 echo "there are 1867 more memories to test.";echo "tr 71 M=EGR_ZONE_1_DOT1P_MAPPING_TABLE_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_1_DOT1P_MAPPING_TABLE_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 288 echo "there are 1866 more memories to test.";echo "tr 71 M=EGR_ZONE_1_DOT1P_MAPPING_TABLE_3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_1_DOT1P_MAPPING_TABLE_3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 289 echo "there are 1865 more memories to test.";echo "tr 71 M=EGR_ZONE_1_DOT1P_MAPPING_TABLE_4 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_1_DOT1P_MAPPING_TABLE_4 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 290 echo "there are 1864 more memories to test.";echo "tr 71 M=EGR_ZONE_1_DOT1P_STRENGTH_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_1_DOT1P_STRENGTH_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 291 echo "there are 1863 more memories to test.";echo "tr 71 M=EGR_ZONE_1_DOT1P_STRENGTH_PROFILE_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_1_DOT1P_STRENGTH_PROFILE_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 292 echo "there are 1862 more memories to test.";echo "tr 71 M=EGR_ZONE_1_EDITOR_CONTROL_TCAM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_1_EDITOR_CONTROL_TCAM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 293 echo "there are 1861 more memories to test.";echo "tr 71 M=EGR_ZONE_1_EDITOR_CONTROL_TCAM_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_1_EDITOR_CONTROL_TCAM_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 294 echo "there are 1860 more memories to test.";echo "tr 71 M=EGR_ZONE_1_EDITOR_CONTROL_TCAM_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_1_EDITOR_CONTROL_TCAM_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 295 echo "there are 1859 more memories to test.";echo "tr 71 M=EGR_ZONE_1_L2_TAG_CONTROL_PROFILE_DEL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_1_L2_TAG_CONTROL_PROFILE_DEL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 296 echo "there are 1858 more memories to test.";echo "tr 71 M=EGR_ZONE_1_L2_TAG_CONTROL_PROFILE_INS Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_1_L2_TAG_CONTROL_PROFILE_INS Start=0 Count=1 SlamLowToHigh=0;echo "done"; 297 echo "there are 1857 more memories to test.";echo "tr 71 M=EGR_ZONE_1_L2_TAG_CONTROL_PROFILE_RW Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_1_L2_TAG_CONTROL_PROFILE_RW Start=0 Count=1 SlamLowToHigh=0;echo "done"; 298 echo "there are 1856 more memories to test.";echo "tr 71 M=EGR_ZONE_1_MATCH_ID_ATTRIBUTES_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_1_MATCH_ID_ATTRIBUTES_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 299 echo "there are 1855 more memories to test.";echo "tr 71 M=EGR_ZONE_1_QOS_MAPPING_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_1_QOS_MAPPING_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 300 echo "there are 1854 more memories to test.";echo "tr 71 M=EGR_ZONE_1_QOS_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_1_QOS_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 301 echo "there are 1853 more memories to test.";echo "tr 71 M=EGR_ZONE_1_VAR_LEN_HDR1_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_1_VAR_LEN_HDR1_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 302 echo "there are 1852 more memories to test.";echo "tr 71 M=EGR_ZONE_1_VAR_LEN_HDR2_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_1_VAR_LEN_HDR2_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 303 echo "there are 1851 more memories to test.";echo "tr 71 M=EGR_ZONE_2_EDITOR_CONTROL_TCAM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_2_EDITOR_CONTROL_TCAM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 304 echo "there are 1850 more memories to test.";echo "tr 71 M=EGR_ZONE_2_EDITOR_CONTROL_TCAM_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_2_EDITOR_CONTROL_TCAM_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 305 echo "there are 1849 more memories to test.";echo "tr 71 M=EGR_ZONE_2_EDITOR_CONTROL_TCAM_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_2_EDITOR_CONTROL_TCAM_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 306 echo "there are 1848 more memories to test.";echo "tr 71 M=EGR_ZONE_2_MATCH_ID_ATTRIBUTES_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_2_MATCH_ID_ATTRIBUTES_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 307 echo "there are 1847 more memories to test.";echo "tr 71 M=EGR_ZONE_2_QOS_MAPPING_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_2_QOS_MAPPING_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 308 echo "there are 1846 more memories to test.";echo "tr 71 M=EGR_ZONE_2_QOS_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_2_QOS_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 309 echo "there are 1845 more memories to test.";echo "tr 71 M=EGR_ZONE_2_VAR_LEN_HDR1_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_2_VAR_LEN_HDR1_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 310 echo "there are 1844 more memories to test.";echo "tr 71 M=EGR_ZONE_2_VAR_LEN_HDR2_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_2_VAR_LEN_HDR2_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 311 echo "there are 1843 more memories to test.";echo "tr 71 M=EGR_ZONE_3_DOT1P_MAPPING_TABLE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_3_DOT1P_MAPPING_TABLE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 312 echo "there are 1842 more memories to test.";echo "tr 71 M=EGR_ZONE_3_DOT1P_MAPPING_TABLE_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_3_DOT1P_MAPPING_TABLE_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 313 echo "there are 1841 more memories to test.";echo "tr 71 M=EGR_ZONE_3_DOT1P_MAPPING_TABLE_3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_3_DOT1P_MAPPING_TABLE_3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 314 echo "there are 1840 more memories to test.";echo "tr 71 M=EGR_ZONE_3_DOT1P_MAPPING_TABLE_4 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_3_DOT1P_MAPPING_TABLE_4 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 315 echo "there are 1839 more memories to test.";echo "tr 71 M=EGR_ZONE_3_DOT1P_STRENGTH_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_3_DOT1P_STRENGTH_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 316 echo "there are 1838 more memories to test.";echo "tr 71 M=EGR_ZONE_3_DOT1P_STRENGTH_PROFILE_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_3_DOT1P_STRENGTH_PROFILE_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 317 echo "there are 1837 more memories to test.";echo "tr 71 M=EGR_ZONE_3_EDITOR_CONTROL_TCAM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_3_EDITOR_CONTROL_TCAM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 318 echo "there are 1836 more memories to test.";echo "tr 71 M=EGR_ZONE_3_EDITOR_CONTROL_TCAM_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_3_EDITOR_CONTROL_TCAM_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 319 echo "there are 1835 more memories to test.";echo "tr 71 M=EGR_ZONE_3_EDITOR_CONTROL_TCAM_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_3_EDITOR_CONTROL_TCAM_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 320 echo "there are 1834 more memories to test.";echo "tr 71 M=EGR_ZONE_3_L2_TAG_CONTROL_PROFILE_DEL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_3_L2_TAG_CONTROL_PROFILE_DEL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 321 echo "there are 1833 more memories to test.";echo "tr 71 M=EGR_ZONE_3_L2_TAG_CONTROL_PROFILE_INS Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_3_L2_TAG_CONTROL_PROFILE_INS Start=0 Count=1 SlamLowToHigh=0;echo "done"; 322 echo "there are 1832 more memories to test.";echo "tr 71 M=EGR_ZONE_3_L2_TAG_CONTROL_PROFILE_RW Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_3_L2_TAG_CONTROL_PROFILE_RW Start=0 Count=1 SlamLowToHigh=0;echo "done"; 323 echo "there are 1831 more memories to test.";echo "tr 71 M=EGR_ZONE_3_MATCH_ID_ATTRIBUTES_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_3_MATCH_ID_ATTRIBUTES_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 324 echo "there are 1830 more memories to test.";echo "tr 71 M=EGR_ZONE_3_QOS_MAPPING_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_3_QOS_MAPPING_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 325 echo "there are 1829 more memories to test.";echo "tr 71 M=EGR_ZONE_3_QOS_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_3_QOS_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 326 echo "there are 1828 more memories to test.";echo "tr 71 M=EGR_ZONE_3_VAR_LEN_HDR1_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_3_VAR_LEN_HDR1_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 327 echo "there are 1827 more memories to test.";echo "tr 71 M=EGR_ZONE_3_VAR_LEN_HDR2_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_3_VAR_LEN_HDR2_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 328 echo "there are 1826 more memories to test.";echo "tr 71 M=EGR_ZONE_4_EDITOR_CONTROL_TCAM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_4_EDITOR_CONTROL_TCAM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 329 echo "there are 1825 more memories to test.";echo "tr 71 M=EGR_ZONE_4_EDITOR_CONTROL_TCAM_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_4_EDITOR_CONTROL_TCAM_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 330 echo "there are 1824 more memories to test.";echo "tr 71 M=EGR_ZONE_4_EDITOR_CONTROL_TCAM_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_4_EDITOR_CONTROL_TCAM_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 331 echo "there are 1823 more memories to test.";echo "tr 71 M=EGR_ZONE_4_MATCH_ID_ATTRIBUTES_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_4_MATCH_ID_ATTRIBUTES_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 332 echo "there are 1822 more memories to test.";echo "tr 71 M=EGR_ZONE_4_QOS_MAPPING_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_4_QOS_MAPPING_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 333 echo "there are 1821 more memories to test.";echo "tr 71 M=EGR_ZONE_4_QOS_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_4_QOS_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 334 echo "there are 1820 more memories to test.";echo "tr 71 M=EGR_ZONE_4_VAR_LEN_HDR1_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_4_VAR_LEN_HDR1_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 335 echo "there are 1819 more memories to test.";echo "tr 71 M=EGR_ZONE_4_VAR_LEN_HDR2_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EGR_ZONE_4_VAR_LEN_HDR2_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 336 echo "there are 1818 more memories to test.";echo "tr 71 M=EH_MASK_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EH_MASK_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 337 echo "there are 1817 more memories to test.";echo "tr 71 M=EH_MASK_PROFILE_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EH_MASK_PROFILE_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 338 echo "there are 1816 more memories to test.";echo "tr 71 M=EMIRROR_CONTROL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EMIRROR_CONTROL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 339 echo "there are 1815 more memories to test.";echo "tr 71 M=EMIRROR_CONTROL1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EMIRROR_CONTROL1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 340 echo "there are 1814 more memories to test.";echo "tr 71 M=EMIRROR_CONTROL2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EMIRROR_CONTROL2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 341 echo "there are 1813 more memories to test.";echo "tr 71 M=EMIRROR_CONTROL3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EMIRROR_CONTROL3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 342 echo "there are 1812 more memories to test.";echo "tr 71 M=EM_MTP_INDEX Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EM_MTP_INDEX Start=0 Count=1 SlamLowToHigh=0;echo "done"; 343 echo "there are 1811 more memories to test.";echo "tr 71 M=EPC_LINK_BMAP Start=0 Count=0 SlamLowToHigh=0";tr 71 M=EPC_LINK_BMAP Start=0 Count=0 SlamLowToHigh=0;echo "done"; 344 echo "there are 1810 more memories to test.";echo "tr 71 M=EP_PARSER0_HFE_CONT_PROFILE_TABLE_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EP_PARSER0_HFE_CONT_PROFILE_TABLE_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 345 echo "there are 1809 more memories to test.";echo "tr 71 M=EP_PARSER0_HFE_CONT_PROFILE_TABLE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EP_PARSER0_HFE_CONT_PROFILE_TABLE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 346 echo "there are 1808 more memories to test.";echo "tr 71 M=EP_PARSER0_HFE_CONT_PROFILE_TABLE_10 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EP_PARSER0_HFE_CONT_PROFILE_TABLE_10 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 347 echo "there are 1807 more memories to test.";echo "tr 71 M=EP_PARSER0_HFE_CONT_PROFILE_TABLE_11 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EP_PARSER0_HFE_CONT_PROFILE_TABLE_11 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 348 echo "there are 1806 more memories to test.";echo "tr 71 M=EP_PARSER0_HFE_CONT_PROFILE_TABLE_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EP_PARSER0_HFE_CONT_PROFILE_TABLE_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 349 echo "there are 1805 more memories to test.";echo "tr 71 M=EP_PARSER0_HFE_CONT_PROFILE_TABLE_3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EP_PARSER0_HFE_CONT_PROFILE_TABLE_3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 350 echo "there are 1804 more memories to test.";echo "tr 71 M=EP_PARSER0_HFE_CONT_PROFILE_TABLE_4 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EP_PARSER0_HFE_CONT_PROFILE_TABLE_4 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 351 echo "there are 1803 more memories to test.";echo "tr 71 M=EP_PARSER0_HFE_CONT_PROFILE_TABLE_5 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EP_PARSER0_HFE_CONT_PROFILE_TABLE_5 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 352 echo "there are 1802 more memories to test.";echo "tr 71 M=EP_PARSER0_HFE_CONT_PROFILE_TABLE_6 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EP_PARSER0_HFE_CONT_PROFILE_TABLE_6 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 353 echo "there are 1801 more memories to test.";echo "tr 71 M=EP_PARSER0_HFE_CONT_PROFILE_TABLE_7 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EP_PARSER0_HFE_CONT_PROFILE_TABLE_7 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 354 echo "there are 1800 more memories to test.";echo "tr 71 M=EP_PARSER0_HFE_CONT_PROFILE_TABLE_8 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EP_PARSER0_HFE_CONT_PROFILE_TABLE_8 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 355 echo "there are 1799 more memories to test.";echo "tr 71 M=EP_PARSER0_HFE_CONT_PROFILE_TABLE_9 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EP_PARSER0_HFE_CONT_PROFILE_TABLE_9 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 356 echo "there are 1798 more memories to test.";echo "tr 71 M=EP_PARSER0_HFE_POLICY_TABLE_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EP_PARSER0_HFE_POLICY_TABLE_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 357 echo "there are 1797 more memories to test.";echo "tr 71 M=EP_PARSER1_HFE_CONT_PROFILE_TABLE_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EP_PARSER1_HFE_CONT_PROFILE_TABLE_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 358 echo "there are 1796 more memories to test.";echo "tr 71 M=EP_PARSER1_HFE_CONT_PROFILE_TABLE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EP_PARSER1_HFE_CONT_PROFILE_TABLE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 359 echo "there are 1795 more memories to test.";echo "tr 71 M=EP_PARSER1_HFE_CONT_PROFILE_TABLE_10 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EP_PARSER1_HFE_CONT_PROFILE_TABLE_10 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 360 echo "there are 1794 more memories to test.";echo "tr 71 M=EP_PARSER1_HFE_CONT_PROFILE_TABLE_11 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EP_PARSER1_HFE_CONT_PROFILE_TABLE_11 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 361 echo "there are 1793 more memories to test.";echo "tr 71 M=EP_PARSER1_HFE_CONT_PROFILE_TABLE_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EP_PARSER1_HFE_CONT_PROFILE_TABLE_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 362 echo "there are 1792 more memories to test.";echo "tr 71 M=EP_PARSER1_HFE_CONT_PROFILE_TABLE_3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EP_PARSER1_HFE_CONT_PROFILE_TABLE_3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 363 echo "there are 1791 more memories to test.";echo "tr 71 M=EP_PARSER1_HFE_CONT_PROFILE_TABLE_4 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EP_PARSER1_HFE_CONT_PROFILE_TABLE_4 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 364 echo "there are 1790 more memories to test.";echo "tr 71 M=EP_PARSER1_HFE_CONT_PROFILE_TABLE_5 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EP_PARSER1_HFE_CONT_PROFILE_TABLE_5 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 365 echo "there are 1789 more memories to test.";echo "tr 71 M=EP_PARSER1_HFE_CONT_PROFILE_TABLE_6 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EP_PARSER1_HFE_CONT_PROFILE_TABLE_6 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 366 echo "there are 1788 more memories to test.";echo "tr 71 M=EP_PARSER1_HFE_CONT_PROFILE_TABLE_7 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EP_PARSER1_HFE_CONT_PROFILE_TABLE_7 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 367 echo "there are 1787 more memories to test.";echo "tr 71 M=EP_PARSER1_HFE_CONT_PROFILE_TABLE_8 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EP_PARSER1_HFE_CONT_PROFILE_TABLE_8 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 368 echo "there are 1786 more memories to test.";echo "tr 71 M=EP_PARSER1_HFE_CONT_PROFILE_TABLE_9 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EP_PARSER1_HFE_CONT_PROFILE_TABLE_9 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 369 echo "there are 1785 more memories to test.";echo "tr 71 M=EP_PARSER1_HFE_POLICY_TABLE_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EP_PARSER1_HFE_POLICY_TABLE_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 370 echo "there are 1784 more memories to test.";echo "tr 71 M=EP_PARSER1_HFE_POLICY_TABLE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EP_PARSER1_HFE_POLICY_TABLE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 371 echo "there are 1783 more memories to test.";echo "tr 71 M=EP_PARSER1_HFE_POLICY_TABLE_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EP_PARSER1_HFE_POLICY_TABLE_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 372 echo "there are 1782 more memories to test.";echo "tr 71 M=EP_PARSER1_HFE_POLICY_TABLE_3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EP_PARSER1_HFE_POLICY_TABLE_3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 373 echo "there are 1781 more memories to test.";echo "tr 71 M=EXACT_MATCH_ACTION_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_ACTION_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 374 echo "there are 1780 more memories to test.";echo "tr 71 M=EXACT_MATCH_ACTION_PROFILE_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_ACTION_PROFILE_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 375 echo "there are 1779 more memories to test.";echo "tr 71 M=EXACT_MATCH_ACTION_TABLE_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_ACTION_TABLE_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 376 echo "there are 1778 more memories to test.";echo "tr 71 M=EXACT_MATCH_ACTION_TABLE_A_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_ACTION_TABLE_A_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 377 echo "there are 1777 more memories to test.";echo "tr 71 M=EXACT_MATCH_ACTION_TABLE_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_ACTION_TABLE_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 378 echo "there are 1776 more memories to test.";echo "tr 71 M=EXACT_MATCH_ACTION_TABLE_B_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_ACTION_TABLE_B_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 379 echo "there are 1775 more memories to test.";echo "tr 71 M=EXACT_MATCH_DEFAULT_POLICY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_DEFAULT_POLICY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 380 echo "there are 1774 more memories to test.";echo "tr 71 M=EXACT_MATCH_DEFAULT_POLICY_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_DEFAULT_POLICY_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 381 if $?fpem_mem_entries 'echo "there are 1773 more memories to test.";echo "tr 71 M=EXACT_MATCH_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_2 Start=0 Count=1 SlamLowToHigh=0;echo "done";' 382 echo "there are 1772 more memories to test.";echo "tr 71 M=EXACT_MATCH_2_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_2_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 383 if $?fpem_mem_entries 'echo "there are 1771 more memories to test.";echo "tr 71 M=EXACT_MATCH_ECC Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_ECC Start=0 Count=1 SlamLowToHigh=0;echo "done";' 384 if $?fpem_mem_entries 'echo "there are 1770 more memories to test.";echo "tr 71 M=EXACT_MATCH_ECC_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_ECC_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done";' 385 if $?fpem_mem_entries 'echo "there are 1769 more memories to test.";echo "tr 71 M=EXACT_MATCH_HIT_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_HIT_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done";' 386 echo "there are 1768 more memories to test.";echo "tr 71 M=EXACT_MATCH_KEY_ATTRIBUTES Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_KEY_ATTRIBUTES Start=0 Count=1 SlamLowToHigh=0;echo "done"; 387 echo "there are 1767 more memories to test.";echo "tr 71 M=EXACT_MATCH_KEY_ATTRIBUTES_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_KEY_ATTRIBUTES_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 388 echo "there are 1766 more memories to test.";echo "tr 71 M=EXACT_MATCH_KEY_GEN_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_KEY_GEN_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 389 echo "there are 1765 more memories to test.";echo "tr 71 M=EXACT_MATCH_KEY_GEN_MASK_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_KEY_GEN_MASK_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 390 echo "there are 1764 more memories to test.";echo "tr 71 M=EXACT_MATCH_KEY_GEN_PROGRAM_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_KEY_GEN_PROGRAM_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 391 echo "there are 1763 more memories to test.";echo "tr 71 M=EXACT_MATCH_KEY_GEN_PROGRAM_PROFILE_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_KEY_GEN_PROGRAM_PROFILE_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 392 echo "there are 1762 more memories to test.";echo "tr 71 M=EXACT_MATCH_LOGICAL_TABLE_SELECT Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_LOGICAL_TABLE_SELECT Start=0 Count=1 SlamLowToHigh=0;echo "done"; 393 echo "there are 1761 more memories to test.";echo "tr 71 M=EXACT_MATCH_LOGICAL_TABLE_SELECT_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_LOGICAL_TABLE_SELECT_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 394 echo "there are 1760 more memories to test.";echo "tr 71 M=EXACT_MATCH_LOGICAL_TABLE_SELECT_DATA_ONLY_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_LOGICAL_TABLE_SELECT_DATA_ONLY_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 395 echo "there are 1759 more memories to test.";echo "tr 71 M=EXACT_MATCH_LOGICAL_TABLE_SELECT_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_LOGICAL_TABLE_SELECT_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 396 echo "there are 1758 more memories to test.";echo "tr 71 M=EXACT_MATCH_LOGICAL_TABLE_SELECT_TCAM_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_LOGICAL_TABLE_SELECT_TCAM_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 397 echo "there are 1757 more memories to test.";echo "tr 71 M=EXACT_MATCH_LOGICAL_TABLE_SELECT_TCAM_ONLY_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_LOGICAL_TABLE_SELECT_TCAM_ONLY_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 398 if $?fpem_mem_entries 'echo "there are 1756 more memories to test.";echo "tr 71 M=EXACT_MATCH_LP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_LP Start=0 Count=1 SlamLowToHigh=0;echo "done";' 399 if $?fpem_mem_entries 'echo "there are 1755 more memories to test.";echo "tr 71 M=EXACT_MATCH_LP_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_LP_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done";' 400 if $?fpem_mem_entries 'echo "there are 1754 more memories to test.";echo "tr 71 M=EXACT_MATCH_2_ENTRY_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_2_ENTRY_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done";' 401 echo "there are 1753 more memories to test.";echo "tr 71 M=EXACT_MATCH_2_ENTRY_ONLY_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_2_ENTRY_ONLY_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 402 if $?fpem_mem_entries 'echo "there are 1752 more memories to test.";echo "tr 71 M=EXACT_MATCH_4_ENTRY_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_4_ENTRY_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done";' 403 echo "there are 1751 more memories to test.";echo "tr 71 M=EXACT_MATCH_4_ENTRY_ONLY_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_4_ENTRY_ONLY_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 404 echo "there are 1750 more memories to test.";echo "tr 71 M=EXACT_MATCH_QOS_ACTIONS_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_QOS_ACTIONS_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 405 echo "there are 1749 more memories to test.";echo "tr 71 M=EXACT_MATCH_QOS_ACTIONS_PROFILE_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_QOS_ACTIONS_PROFILE_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 406 if $?fpem_mem_entries 'echo "there are 1748 more memories to test.";echo "tr 71 M=EXACT_MATCH_4 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_4 Start=0 Count=1 SlamLowToHigh=0;echo "done";' 407 echo "there are 1747 more memories to test.";echo "tr 71 M=EXACT_MATCH_4_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_4_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 408 echo "there are 1746 more memories to test.";echo "tr 71 M=EXACT_MATCH_REMAP_TABLE_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_REMAP_TABLE_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 409 echo "there are 1745 more memories to test.";echo "tr 71 M=EXACT_MATCH_REMAP_TABLE_A_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_REMAP_TABLE_A_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 410 echo "there are 1744 more memories to test.";echo "tr 71 M=EXACT_MATCH_REMAP_TABLE_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_REMAP_TABLE_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 411 echo "there are 1743 more memories to test.";echo "tr 71 M=EXACT_MATCH_REMAP_TABLE_B_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=EXACT_MATCH_REMAP_TABLE_B_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 412 echo "there are 1742 more memories to test.";echo "tr 71 M=FCOE_CS_CTL_FN Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FCOE_CS_CTL_FN Start=0 Count=1 SlamLowToHigh=0;echo "done"; 413 echo "there are 1741 more memories to test.";echo "tr 71 M=FCOE_HOP_COUNT_FN Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FCOE_HOP_COUNT_FN Start=0 Count=1 SlamLowToHigh=0;echo "done"; 414 echo "there are 1740 more memories to test.";echo "tr 71 M=FC_MAP_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FC_MAP_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 415 echo "there are 1739 more memories to test.";echo "tr 71 M=FIELD_BUS_MERGE_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FIELD_BUS_MERGE_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 416 echo "there are 1738 more memories to test.";echo "tr 71 M=FIELD_BUS_MERGE_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FIELD_BUS_MERGE_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 417 echo "there are 1737 more memories to test.";echo "tr 71 M=FLEX_BIN_HASH_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_BIN_HASH_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 418 echo "there are 1736 more memories to test.";echo "tr 71 M=FLEX_BIN_HASH_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_BIN_HASH_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 419 echo "there are 1735 more memories to test.";echo "tr 71 M=FLEX_BIN_HASH_PROFILE_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_BIN_HASH_PROFILE_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 420 echo "there are 1734 more memories to test.";echo "tr 71 M=FLEX_BIN_HASH_PROFILE_3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_BIN_HASH_PROFILE_3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 421 echo "there are 1733 more memories to test.";echo "tr 71 M=FLEX_CTR_ACTION_MASK_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_CTR_ACTION_MASK_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 422 echo "there are 1732 more memories to test.";echo "tr 71 M=FLEX_EDITOR_FIXED_HDR_L2_0_NEXT_PROTO_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_FIXED_HDR_L2_0_NEXT_PROTO_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 423 echo "there are 1731 more memories to test.";echo "tr 71 M=FLEX_EDITOR_FIXED_HDR_L2_0_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_FIXED_HDR_L2_0_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 424 echo "there are 1730 more memories to test.";echo "tr 71 M=FLEX_EDITOR_FIXED_HDR_L2_1_NEXT_PROTO_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_FIXED_HDR_L2_1_NEXT_PROTO_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 425 echo "there are 1729 more memories to test.";echo "tr 71 M=FLEX_EDITOR_FIXED_HDR_L2_1_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_FIXED_HDR_L2_1_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 426 echo "there are 1728 more memories to test.";echo "tr 71 M=FLEX_EDITOR_FIXED_HDR_L3_0_NEXT_PROTO_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_FIXED_HDR_L3_0_NEXT_PROTO_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 427 echo "there are 1727 more memories to test.";echo "tr 71 M=FLEX_EDITOR_FIXED_HDR_L3_0_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_FIXED_HDR_L3_0_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 428 echo "there are 1726 more memories to test.";echo "tr 71 M=FLEX_EDITOR_FIXED_HDR_LOOPBACK_0_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_FIXED_HDR_LOOPBACK_0_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 429 echo "there are 1725 more memories to test.";echo "tr 71 M=FLEX_EDITOR_FIXED_HDR_SYS_0_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_FIXED_HDR_SYS_0_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 430 echo "there are 1724 more memories to test.";echo "tr 71 M=FLEX_EDITOR_FIXED_HDR_TUNNEL_0_GRE_NEXT_PROTO_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_FIXED_HDR_TUNNEL_0_GRE_NEXT_PROTO_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 431 echo "there are 1723 more memories to test.";echo "tr 71 M=FLEX_EDITOR_FIXED_HDR_TUNNEL_0_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_FIXED_HDR_TUNNEL_0_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 432 echo "there are 1722 more memories to test.";echo "tr 71 M=FLEX_EDITOR_FIXED_HDR_TUNNEL_0_UDP_NEXT_PROTO_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_FIXED_HDR_TUNNEL_0_UDP_NEXT_PROTO_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 433 echo "there are 1721 more memories to test.";echo "tr 71 M=FLEX_EDITOR_FIXED_HDR_TUNNEL_0_VXLAN_NEXT_PROTO_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_FIXED_HDR_TUNNEL_0_VXLAN_NEXT_PROTO_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 434 echo "there are 1720 more memories to test.";echo "tr 71 M=FLEX_EDITOR_FLEX_HDR_0_16BIT_FS_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_FLEX_HDR_0_16BIT_FS_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 435 echo "there are 1719 more memories to test.";echo "tr 71 M=FLEX_EDITOR_FLEX_HDR_0_32BIT_FS_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_FLEX_HDR_0_32BIT_FS_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 436 echo "there are 1718 more memories to test.";echo "tr 71 M=FLEX_EDITOR_FLEX_HDR_0_ALU_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_FLEX_HDR_0_ALU_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 437 echo "there are 1717 more memories to test.";echo "tr 71 M=FLEX_EDITOR_FLEX_HDR_0_HC_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_FLEX_HDR_0_HC_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 438 echo "there are 1716 more memories to test.";echo "tr 71 M=FLEX_EDITOR_FLEX_HDR_0_NEXT_PROTO_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_FLEX_HDR_0_NEXT_PROTO_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 439 echo "there are 1715 more memories to test.";echo "tr 71 M=FLEX_EDITOR_FLEX_HDR_0_OW_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_FLEX_HDR_0_OW_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 440 echo "there are 1714 more memories to test.";echo "tr 71 M=FLEX_EDITOR_FLEX_HDR_0_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_FLEX_HDR_0_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 441 echo "there are 1713 more memories to test.";echo "tr 71 M=FLEX_EDITOR_FLEX_HDR_1_16BIT_FS_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_FLEX_HDR_1_16BIT_FS_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 442 echo "there are 1712 more memories to test.";echo "tr 71 M=FLEX_EDITOR_FLEX_HDR_1_32BIT_FS_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_FLEX_HDR_1_32BIT_FS_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 443 echo "there are 1711 more memories to test.";echo "tr 71 M=FLEX_EDITOR_FLEX_HDR_1_ALU_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_FLEX_HDR_1_ALU_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 444 echo "there are 1710 more memories to test.";echo "tr 71 M=FLEX_EDITOR_FLEX_HDR_1_HC_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_FLEX_HDR_1_HC_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 445 echo "there are 1709 more memories to test.";echo "tr 71 M=FLEX_EDITOR_FLEX_HDR_1_NEXT_PROTO_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_FLEX_HDR_1_NEXT_PROTO_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 446 echo "there are 1708 more memories to test.";echo "tr 71 M=FLEX_EDITOR_FLEX_HDR_1_OW_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_FLEX_HDR_1_OW_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 447 echo "there are 1707 more memories to test.";echo "tr 71 M=FLEX_EDITOR_FLEX_HDR_1_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_FLEX_HDR_1_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 448 echo "there are 1706 more memories to test.";echo "tr 71 M=FLEX_EDITOR_FLEX_HDR_2_16BIT_FS_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_FLEX_HDR_2_16BIT_FS_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 449 echo "there are 1705 more memories to test.";echo "tr 71 M=FLEX_EDITOR_FLEX_HDR_2_32BIT_FS_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_FLEX_HDR_2_32BIT_FS_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 450 echo "there are 1704 more memories to test.";echo "tr 71 M=FLEX_EDITOR_FLEX_HDR_2_ALU_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_FLEX_HDR_2_ALU_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 451 echo "there are 1703 more memories to test.";echo "tr 71 M=FLEX_EDITOR_FLEX_HDR_2_HC_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_FLEX_HDR_2_HC_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 452 echo "there are 1702 more memories to test.";echo "tr 71 M=FLEX_EDITOR_FLEX_HDR_2_NEXT_PROTO_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_FLEX_HDR_2_NEXT_PROTO_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 453 echo "there are 1701 more memories to test.";echo "tr 71 M=FLEX_EDITOR_FLEX_HDR_2_OW_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_FLEX_HDR_2_OW_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 454 echo "there are 1700 more memories to test.";echo "tr 71 M=FLEX_EDITOR_FLEX_HDR_2_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_FLEX_HDR_2_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 455 echo "there are 1699 more memories to test.";echo "tr 71 M=FLEX_EDITOR_MHC_CHECKSUM_0_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_MHC_CHECKSUM_0_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 456 echo "there are 1698 more memories to test.";echo "tr 71 M=FLEX_EDITOR_MHC_CHECKSUM_1_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_MHC_CHECKSUM_1_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 457 echo "there are 1697 more memories to test.";echo "tr 71 M=FLEX_EDITOR_MHC_CHECKSUM_2_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_MHC_CHECKSUM_2_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 458 echo "there are 1696 more memories to test.";echo "tr 71 M=FLEX_EDITOR_MHC_CRC_0_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_MHC_CRC_0_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 459 echo "there are 1695 more memories to test.";echo "tr 71 M=FLEX_EDITOR_MIRROR_ENCAP_0_PROFILE_1_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_MIRROR_ENCAP_0_PROFILE_1_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 460 echo "there are 1694 more memories to test.";echo "tr 71 M=FLEX_EDITOR_MIRROR_ENCAP_0_PROFILE_2_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_MIRROR_ENCAP_0_PROFILE_2_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 461 echo "there are 1693 more memories to test.";echo "tr 71 M=FLEX_EDITOR_MIRROR_ENCAP_0_PROFILE_3_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_MIRROR_ENCAP_0_PROFILE_3_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 462 echo "there are 1692 more memories to test.";echo "tr 71 M=FLEX_EDITOR_RW_0_ALU_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_RW_0_ALU_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 463 echo "there are 1691 more memories to test.";echo "tr 71 M=FLEX_EDITOR_RW_0_FS_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_RW_0_FS_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 464 echo "there are 1690 more memories to test.";echo "tr 71 M=FLEX_EDITOR_RW_0_HC_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_RW_0_HC_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 465 echo "there are 1689 more memories to test.";echo "tr 71 M=FLEX_EDITOR_RW_0_NEXT_PROTO_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_RW_0_NEXT_PROTO_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 466 echo "there are 1688 more memories to test.";echo "tr 71 M=FLEX_EDITOR_RW_0_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_RW_0_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 467 echo "there are 1687 more memories to test.";echo "tr 71 M=FLEX_EDITOR_RW_1_ALU_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_RW_1_ALU_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 468 echo "there are 1686 more memories to test.";echo "tr 71 M=FLEX_EDITOR_RW_1_FS_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_RW_1_FS_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 469 echo "there are 1685 more memories to test.";echo "tr 71 M=FLEX_EDITOR_RW_1_HC_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_RW_1_HC_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 470 echo "there are 1684 more memories to test.";echo "tr 71 M=FLEX_EDITOR_RW_1_NEXT_PROTO_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_RW_1_NEXT_PROTO_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 471 echo "there are 1683 more memories to test.";echo "tr 71 M=FLEX_EDITOR_RW_1_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_RW_1_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 472 echo "there are 1682 more memories to test.";echo "tr 71 M=FLEX_EDITOR_ZONE_0_EDIT_ID_DEL_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_ZONE_0_EDIT_ID_DEL_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 473 echo "there are 1681 more memories to test.";echo "tr 71 M=FLEX_EDITOR_ZONE_0_EDIT_ID_INS_1_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_ZONE_0_EDIT_ID_INS_1_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 474 echo "there are 1680 more memories to test.";echo "tr 71 M=FLEX_EDITOR_ZONE_0_EDIT_ID_INS_2_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_ZONE_0_EDIT_ID_INS_2_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 475 echo "there are 1679 more memories to test.";echo "tr 71 M=FLEX_EDITOR_ZONE_0_EDIT_ID_RW_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_ZONE_0_EDIT_ID_RW_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 476 echo "there are 1678 more memories to test.";echo "tr 71 M=FLEX_EDITOR_ZONE_0_MATCH_ID_COMMAND_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_ZONE_0_MATCH_ID_COMMAND_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 477 echo "there are 1677 more memories to test.";echo "tr 71 M=FLEX_EDITOR_ZONE_0_MATCH_ID_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_ZONE_0_MATCH_ID_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 478 echo "there are 1676 more memories to test.";echo "tr 71 M=FLEX_EDITOR_ZONE_1_EDIT_ID_DEL_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_ZONE_1_EDIT_ID_DEL_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 479 echo "there are 1675 more memories to test.";echo "tr 71 M=FLEX_EDITOR_ZONE_1_EDIT_ID_INS_1_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_ZONE_1_EDIT_ID_INS_1_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 480 echo "there are 1674 more memories to test.";echo "tr 71 M=FLEX_EDITOR_ZONE_1_EDIT_ID_INS_2_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_ZONE_1_EDIT_ID_INS_2_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 481 echo "there are 1673 more memories to test.";echo "tr 71 M=FLEX_EDITOR_ZONE_1_EDIT_ID_RW_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_ZONE_1_EDIT_ID_RW_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 482 echo "there are 1672 more memories to test.";echo "tr 71 M=FLEX_EDITOR_ZONE_1_MATCH_ID_COMMAND_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_ZONE_1_MATCH_ID_COMMAND_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 483 echo "there are 1671 more memories to test.";echo "tr 71 M=FLEX_EDITOR_ZONE_1_MATCH_ID_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_ZONE_1_MATCH_ID_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 484 echo "there are 1670 more memories to test.";echo "tr 71 M=FLEX_EDITOR_ZONE_2_EDIT_ID_DEL_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_ZONE_2_EDIT_ID_DEL_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 485 echo "there are 1669 more memories to test.";echo "tr 71 M=FLEX_EDITOR_ZONE_2_EDIT_ID_INS_1_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_ZONE_2_EDIT_ID_INS_1_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 486 echo "there are 1668 more memories to test.";echo "tr 71 M=FLEX_EDITOR_ZONE_2_EDIT_ID_INS_2_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_ZONE_2_EDIT_ID_INS_2_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 487 echo "there are 1667 more memories to test.";echo "tr 71 M=FLEX_EDITOR_ZONE_2_EDIT_ID_RW_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_ZONE_2_EDIT_ID_RW_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 488 echo "there are 1666 more memories to test.";echo "tr 71 M=FLEX_EDITOR_ZONE_2_MATCH_ID_COMMAND_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_ZONE_2_MATCH_ID_COMMAND_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 489 echo "there are 1665 more memories to test.";echo "tr 71 M=FLEX_EDITOR_ZONE_2_MATCH_ID_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_ZONE_2_MATCH_ID_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 490 echo "there are 1664 more memories to test.";echo "tr 71 M=FLEX_EDITOR_ZONE_3_EDIT_ID_DEL_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_ZONE_3_EDIT_ID_DEL_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 491 echo "there are 1663 more memories to test.";echo "tr 71 M=FLEX_EDITOR_ZONE_3_EDIT_ID_INS_1_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_ZONE_3_EDIT_ID_INS_1_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 492 echo "there are 1662 more memories to test.";echo "tr 71 M=FLEX_EDITOR_ZONE_3_EDIT_ID_INS_2_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_ZONE_3_EDIT_ID_INS_2_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 493 echo "there are 1661 more memories to test.";echo "tr 71 M=FLEX_EDITOR_ZONE_3_EDIT_ID_RW_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_ZONE_3_EDIT_ID_RW_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 494 echo "there are 1660 more memories to test.";echo "tr 71 M=FLEX_EDITOR_ZONE_3_MATCH_ID_COMMAND_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_ZONE_3_MATCH_ID_COMMAND_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 495 echo "there are 1659 more memories to test.";echo "tr 71 M=FLEX_EDITOR_ZONE_3_MATCH_ID_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_ZONE_3_MATCH_ID_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 496 echo "there are 1658 more memories to test.";echo "tr 71 M=FLEX_EDITOR_ZONE_4_EDIT_ID_DEL_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_ZONE_4_EDIT_ID_DEL_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 497 echo "there are 1657 more memories to test.";echo "tr 71 M=FLEX_EDITOR_ZONE_4_EDIT_ID_INS_1_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_ZONE_4_EDIT_ID_INS_1_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 498 echo "there are 1656 more memories to test.";echo "tr 71 M=FLEX_EDITOR_ZONE_4_EDIT_ID_INS_2_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_ZONE_4_EDIT_ID_INS_2_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 499 echo "there are 1655 more memories to test.";echo "tr 71 M=FLEX_EDITOR_ZONE_4_EDIT_ID_RW_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_ZONE_4_EDIT_ID_RW_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 500 echo "there are 1654 more memories to test.";echo "tr 71 M=FLEX_EDITOR_ZONE_4_MATCH_ID_COMMAND_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_ZONE_4_MATCH_ID_COMMAND_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 501 echo "there are 1653 more memories to test.";echo "tr 71 M=FLEX_EDITOR_ZONE_4_MATCH_ID_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_EDITOR_ZONE_4_MATCH_ID_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 502 echo "there are 1652 more memories to test.";echo "tr 71 M=FLEX_RTAG7_HASH_TCAM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_RTAG7_HASH_TCAM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 503 echo "there are 1651 more memories to test.";echo "tr 71 M=FLEX_RTAG7_HASH_TCAM_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_RTAG7_HASH_TCAM_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 504 echo "there are 1650 more memories to test.";echo "tr 71 M=FLEX_RTAG7_HASH_TCAM_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FLEX_RTAG7_HASH_TCAM_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 505 echo "there are 1649 more memories to test.";echo "tr 71 M=FORWARDING_1_ACTION_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_1_ACTION_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 506 echo "there are 1648 more memories to test.";echo "tr 71 M=FORWARDING_1_FIXED_KEY_TABLE_ATTRS Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_1_FIXED_KEY_TABLE_ATTRS Start=0 Count=1 SlamLowToHigh=0;echo "done"; 507 echo "there are 1647 more memories to test.";echo "tr 71 M=FORWARDING_1_KEY_GEN_1_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_1_KEY_GEN_1_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 508 echo "there are 1646 more memories to test.";echo "tr 71 M=FORWARDING_1_KEY_GEN_1_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_1_KEY_GEN_1_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 509 echo "there are 1645 more memories to test.";echo "tr 71 M=FORWARDING_1_KEY_GEN_2_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_1_KEY_GEN_2_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 510 echo "there are 1644 more memories to test.";echo "tr 71 M=FORWARDING_1_KEY_GEN_2_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_1_KEY_GEN_2_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 511 echo "there are 1643 more memories to test.";echo "tr 71 M=FORWARDING_1_LOGICAL_TBL_SEL_SRAM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_1_LOGICAL_TBL_SEL_SRAM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 512 echo "there are 1642 more memories to test.";echo "tr 71 M=FORWARDING_1_LOGICAL_TBL_SEL_TCAM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_1_LOGICAL_TBL_SEL_TCAM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 513 echo "there are 1641 more memories to test.";echo "tr 71 M=FORWARDING_1_MISS_POLICY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_1_MISS_POLICY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 514 echo "there are 1640 more memories to test.";echo "tr 71 M=FORWARDING_1_POLICY_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_1_POLICY_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 515 echo "there are 1639 more memories to test.";echo "tr 71 M=FORWARDING_2_ACTION_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_2_ACTION_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 516 echo "there are 1638 more memories to test.";echo "tr 71 M=FORWARDING_2_FIXED_KEY_TABLE_ATTRS Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_2_FIXED_KEY_TABLE_ATTRS Start=0 Count=1 SlamLowToHigh=0;echo "done"; 517 echo "there are 1637 more memories to test.";echo "tr 71 M=FORWARDING_2_KEY_GEN_1_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_2_KEY_GEN_1_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 518 echo "there are 1636 more memories to test.";echo "tr 71 M=FORWARDING_2_KEY_GEN_1_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_2_KEY_GEN_1_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 519 echo "there are 1635 more memories to test.";echo "tr 71 M=FORWARDING_2_KEY_GEN_2_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_2_KEY_GEN_2_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 520 echo "there are 1634 more memories to test.";echo "tr 71 M=FORWARDING_2_KEY_GEN_2_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_2_KEY_GEN_2_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 521 echo "there are 1633 more memories to test.";echo "tr 71 M=FORWARDING_2_KEY_GEN_3_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_2_KEY_GEN_3_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 522 echo "there are 1632 more memories to test.";echo "tr 71 M=FORWARDING_2_KEY_GEN_3_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_2_KEY_GEN_3_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 523 echo "there are 1631 more memories to test.";echo "tr 71 M=FORWARDING_2_KEY_GEN_4_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_2_KEY_GEN_4_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 524 echo "there are 1630 more memories to test.";echo "tr 71 M=FORWARDING_2_KEY_GEN_4_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_2_KEY_GEN_4_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 525 echo "there are 1629 more memories to test.";echo "tr 71 M=FORWARDING_2_KEY_GEN_5_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_2_KEY_GEN_5_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 526 echo "there are 1628 more memories to test.";echo "tr 71 M=FORWARDING_2_KEY_GEN_5_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_2_KEY_GEN_5_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 527 echo "there are 1627 more memories to test.";echo "tr 71 M=FORWARDING_2_KEY_GEN_6_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_2_KEY_GEN_6_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 528 echo "there are 1626 more memories to test.";echo "tr 71 M=FORWARDING_2_KEY_GEN_6_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_2_KEY_GEN_6_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 529 echo "there are 1625 more memories to test.";echo "tr 71 M=FORWARDING_2_LOGICAL_TBL_SEL_SRAM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_2_LOGICAL_TBL_SEL_SRAM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 530 echo "there are 1624 more memories to test.";echo "tr 71 M=FORWARDING_2_LOGICAL_TBL_SEL_TCAM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_2_LOGICAL_TBL_SEL_TCAM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 531 echo "there are 1623 more memories to test.";echo "tr 71 M=FORWARDING_2_MISS_POLICY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_2_MISS_POLICY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 532 echo "there are 1622 more memories to test.";echo "tr 71 M=FORWARDING_2_POLICY_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_2_POLICY_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 533 echo "there are 1621 more memories to test.";echo "tr 71 M=FORWARDING_3_ACTION_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_3_ACTION_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 534 echo "there are 1620 more memories to test.";echo "tr 71 M=FORWARDING_3_FIXED_KEY_TABLE_ATTRS Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_3_FIXED_KEY_TABLE_ATTRS Start=0 Count=1 SlamLowToHigh=0;echo "done"; 535 echo "there are 1619 more memories to test.";echo "tr 71 M=FORWARDING_3_KEY_GEN_1_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_3_KEY_GEN_1_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 536 echo "there are 1618 more memories to test.";echo "tr 71 M=FORWARDING_3_KEY_GEN_1_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_3_KEY_GEN_1_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 537 echo "there are 1617 more memories to test.";echo "tr 71 M=FORWARDING_3_KEY_GEN_2_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_3_KEY_GEN_2_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 538 echo "there are 1616 more memories to test.";echo "tr 71 M=FORWARDING_3_KEY_GEN_2_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_3_KEY_GEN_2_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 539 echo "there are 1615 more memories to test.";echo "tr 71 M=FORWARDING_3_KEY_GEN_3_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_3_KEY_GEN_3_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 540 echo "there are 1614 more memories to test.";echo "tr 71 M=FORWARDING_3_KEY_GEN_3_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_3_KEY_GEN_3_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 541 echo "there are 1613 more memories to test.";echo "tr 71 M=FORWARDING_3_KEY_GEN_4_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_3_KEY_GEN_4_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 542 echo "there are 1612 more memories to test.";echo "tr 71 M=FORWARDING_3_KEY_GEN_4_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_3_KEY_GEN_4_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 543 echo "there are 1611 more memories to test.";echo "tr 71 M=FORWARDING_3_KEY_GEN_5_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_3_KEY_GEN_5_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 544 echo "there are 1610 more memories to test.";echo "tr 71 M=FORWARDING_3_KEY_GEN_5_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_3_KEY_GEN_5_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 545 echo "there are 1609 more memories to test.";echo "tr 71 M=FORWARDING_3_KEY_GEN_6_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_3_KEY_GEN_6_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 546 echo "there are 1608 more memories to test.";echo "tr 71 M=FORWARDING_3_KEY_GEN_6_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_3_KEY_GEN_6_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 547 echo "there are 1607 more memories to test.";echo "tr 71 M=FORWARDING_3_LOGICAL_TBL_SEL_SRAM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_3_LOGICAL_TBL_SEL_SRAM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 548 echo "there are 1606 more memories to test.";echo "tr 71 M=FORWARDING_3_LOGICAL_TBL_SEL_TCAM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_3_LOGICAL_TBL_SEL_TCAM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 549 echo "there are 1605 more memories to test.";echo "tr 71 M=FORWARDING_3_MISS_POLICY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_3_MISS_POLICY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 550 echo "there are 1604 more memories to test.";echo "tr 71 M=FORWARDING_3_POLICY_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FORWARDING_3_POLICY_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 551 #echo "there are 1603 more memories to test.";echo "tr 71 M=FT_COMMAND Start=0 Count=0 SlamLowToHigh=0";tr 71 M=FT_COMMAND Start=0 Count=0 SlamLowToHigh=0;echo "done"; 552 #echo "there are 1602 more memories to test.";echo "tr 71 M=FT_COMMAND_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=FT_COMMAND_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 553 echo "there are 1601 more memories to test.";echo "tr 71 M=FT_GROUP_TABLE_CNT Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FT_GROUP_TABLE_CNT Start=0 Count=1 SlamLowToHigh=0;echo "done"; 554 echo "there are 1600 more memories to test.";echo "tr 71 M=FT_GROUP_TABLE_CNT_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FT_GROUP_TABLE_CNT_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 555 echo "there are 1599 more memories to test.";echo "tr 71 M=FT_GROUP_TABLE_CONFIG Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FT_GROUP_TABLE_CONFIG Start=0 Count=1 SlamLowToHigh=0;echo "done"; 556 echo "there are 1598 more memories to test.";echo "tr 71 M=FT_GROUP_TABLE_CONFIG_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FT_GROUP_TABLE_CONFIG_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 557 echo "there are 1597 more memories to test.";echo "tr 71 M=FT_HITBIT Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FT_HITBIT Start=0 Count=1 SlamLowToHigh=0;echo "done"; 558 echo "there are 1596 more memories to test.";echo "tr 71 M=FT_HITBIT_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=FT_HITBIT_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 559 echo "there are 1595 more memories to test.";echo "tr 71 M=GTP_PORT_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=GTP_PORT_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 560 echo "there are 1594 more memories to test.";echo "tr 71 M=HGT_DLB_CONTROL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=HGT_DLB_CONTROL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 561 echo "there are 1593 more memories to test.";echo "tr 71 M=HG_TRUNK_BITMAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=HG_TRUNK_BITMAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 562 echo "there are 1592 more memories to test.";echo "tr 71 M=HG_TRUNK_FAILOVER_ENABLE Start=0 Count=0 SlamLowToHigh=0";tr 71 M=HG_TRUNK_FAILOVER_ENABLE Start=0 Count=0 SlamLowToHigh=0;echo "done"; 563 echo "there are 1591 more memories to test.";echo "tr 71 M=HG_TRUNK_FAILOVER_SET Start=0 Count=1 SlamLowToHigh=0";tr 71 M=HG_TRUNK_FAILOVER_SET Start=0 Count=1 SlamLowToHigh=0;echo "done"; 564 echo "there are 1590 more memories to test.";echo "tr 71 M=HG_TRUNK_GROUP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=HG_TRUNK_GROUP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 565 echo "there are 1589 more memories to test.";echo "tr 71 M=HG_TRUNK_RR_CNT Start=0 Count=1 SlamLowToHigh=0";tr 71 M=HG_TRUNK_RR_CNT Start=0 Count=1 SlamLowToHigh=0;echo "done"; 566 echo "there are 1588 more memories to test.";echo "tr 71 M=HG_TRUNK_RR_CNT_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=HG_TRUNK_RR_CNT_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 567 echo "there are 1587 more memories to test.";echo "tr 71 M=HG_TRUNK_MEMBER Start=0 Count=1 SlamLowToHigh=0";tr 71 M=HG_TRUNK_MEMBER Start=0 Count=1 SlamLowToHigh=0;echo "done"; 568 echo "there are 1586 more memories to test.";echo "tr 71 M=HG_TRUNK_MODE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=HG_TRUNK_MODE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 569 echo "there are 1585 more memories to test.";echo "tr 71 M=HIGIG_TRUNK_CONTROL Start=0 Count=0 SlamLowToHigh=0";tr 71 M=HIGIG_TRUNK_CONTROL Start=0 Count=0 SlamLowToHigh=0;echo "done"; 570 echo "there are 1584 more memories to test.";echo "tr 71 M=ICONTROL_OPCODE_BITMAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ICONTROL_OPCODE_BITMAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 571 echo "there are 1583 more memories to test.";echo "tr 71 M=IDB_OBM0_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM0_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 572 echo "there are 1582 more memories to test.";echo "tr 71 M=IDB_OBM0_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM0_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 573 echo "there are 1581 more memories to test.";echo "tr 71 M=IDB_OBM0_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM0_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 574 echo "there are 1580 more memories to test.";echo "tr 71 M=IDB_OBM0_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM0_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 575 echo "there are 1579 more memories to test.";echo "tr 71 M=IDB_OBM0_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM0_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 576 echo "there are 1578 more memories to test.";echo "tr 71 M=IDB_OBM0_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM0_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 577 echo "there are 1577 more memories to test.";echo "tr 71 M=IDB_OBM0_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM0_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 578 echo "there are 1576 more memories to test.";echo "tr 71 M=IDB_OBM0_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM0_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 579 echo "there are 1575 more memories to test.";echo "tr 71 M=IDB_OBM0_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM0_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 580 echo "there are 1574 more memories to test.";echo "tr 71 M=IDB_OBM0_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM0_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 581 echo "there are 1573 more memories to test.";echo "tr 71 M=IDB_OBM0_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM0_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 582 echo "there are 1572 more memories to test.";echo "tr 71 M=IDB_OBM0_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM0_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 583 echo "there are 1571 more memories to test.";echo "tr 71 M=IDB_OBM0_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM0_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 584 echo "there are 1570 more memories to test.";echo "tr 71 M=IDB_OBM0_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM0_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 585 echo "there are 1569 more memories to test.";echo "tr 71 M=IDB_OBM0_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM0_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 586 echo "there are 1568 more memories to test.";echo "tr 71 M=IDB_OBM0_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM0_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 587 echo "there are 1567 more memories to test.";echo "tr 71 M=IDB_OBM0_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM0_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 588 echo "there are 1566 more memories to test.";echo "tr 71 M=IDB_OBM0_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM0_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 589 echo "there are 1565 more memories to test.";echo "tr 71 M=IDB_OBM0_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM0_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 590 echo "there are 1564 more memories to test.";echo "tr 71 M=IDB_OBM0_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM0_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 591 echo "there are 1563 more memories to test.";echo "tr 71 M=IDB_OBM0_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM0_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 592 echo "there are 1562 more memories to test.";echo "tr 71 M=IDB_OBM0_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM0_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 593 echo "there are 1561 more memories to test.";echo "tr 71 M=IDB_OBM0_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM0_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 594 echo "there are 1560 more memories to test.";echo "tr 71 M=IDB_OBM0_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM0_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 595 echo "there are 1559 more memories to test.";echo "tr 71 M=IDB_OBM10_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM10_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 596 echo "there are 1558 more memories to test.";echo "tr 71 M=IDB_OBM10_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM10_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 597 echo "there are 1557 more memories to test.";echo "tr 71 M=IDB_OBM10_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM10_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 598 echo "there are 1556 more memories to test.";echo "tr 71 M=IDB_OBM10_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM10_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 599 echo "there are 1555 more memories to test.";echo "tr 71 M=IDB_OBM10_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM10_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 600 echo "there are 1554 more memories to test.";echo "tr 71 M=IDB_OBM10_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM10_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 601 echo "there are 1553 more memories to test.";echo "tr 71 M=IDB_OBM10_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM10_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 602 echo "there are 1552 more memories to test.";echo "tr 71 M=IDB_OBM10_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM10_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 603 echo "there are 1551 more memories to test.";echo "tr 71 M=IDB_OBM10_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM10_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 604 echo "there are 1550 more memories to test.";echo "tr 71 M=IDB_OBM10_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM10_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 605 echo "there are 1549 more memories to test.";echo "tr 71 M=IDB_OBM10_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM10_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 606 echo "there are 1548 more memories to test.";echo "tr 71 M=IDB_OBM10_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM10_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 607 echo "there are 1547 more memories to test.";echo "tr 71 M=IDB_OBM10_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM10_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 608 echo "there are 1546 more memories to test.";echo "tr 71 M=IDB_OBM10_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM10_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 609 echo "there are 1545 more memories to test.";echo "tr 71 M=IDB_OBM10_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM10_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 610 echo "there are 1544 more memories to test.";echo "tr 71 M=IDB_OBM10_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM10_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 611 echo "there are 1543 more memories to test.";echo "tr 71 M=IDB_OBM10_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM10_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 612 echo "there are 1542 more memories to test.";echo "tr 71 M=IDB_OBM10_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM10_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 613 echo "there are 1541 more memories to test.";echo "tr 71 M=IDB_OBM10_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM10_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 614 echo "there are 1540 more memories to test.";echo "tr 71 M=IDB_OBM10_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM10_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 615 echo "there are 1539 more memories to test.";echo "tr 71 M=IDB_OBM10_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM10_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 616 echo "there are 1538 more memories to test.";echo "tr 71 M=IDB_OBM10_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM10_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 617 echo "there are 1537 more memories to test.";echo "tr 71 M=IDB_OBM10_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM10_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 618 echo "there are 1536 more memories to test.";echo "tr 71 M=IDB_OBM10_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM10_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 619 echo "there are 1535 more memories to test.";echo "tr 71 M=IDB_OBM11_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM11_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 620 echo "there are 1534 more memories to test.";echo "tr 71 M=IDB_OBM11_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM11_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 621 echo "there are 1533 more memories to test.";echo "tr 71 M=IDB_OBM11_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM11_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 622 echo "there are 1532 more memories to test.";echo "tr 71 M=IDB_OBM11_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM11_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 623 echo "there are 1531 more memories to test.";echo "tr 71 M=IDB_OBM11_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM11_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 624 echo "there are 1530 more memories to test.";echo "tr 71 M=IDB_OBM11_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM11_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 625 echo "there are 1529 more memories to test.";echo "tr 71 M=IDB_OBM11_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM11_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 626 echo "there are 1528 more memories to test.";echo "tr 71 M=IDB_OBM11_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM11_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 627 echo "there are 1527 more memories to test.";echo "tr 71 M=IDB_OBM11_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM11_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 628 echo "there are 1526 more memories to test.";echo "tr 71 M=IDB_OBM11_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM11_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 629 echo "there are 1525 more memories to test.";echo "tr 71 M=IDB_OBM11_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM11_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 630 echo "there are 1524 more memories to test.";echo "tr 71 M=IDB_OBM11_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM11_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 631 echo "there are 1523 more memories to test.";echo "tr 71 M=IDB_OBM11_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM11_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 632 echo "there are 1522 more memories to test.";echo "tr 71 M=IDB_OBM11_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM11_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 633 echo "there are 1521 more memories to test.";echo "tr 71 M=IDB_OBM11_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM11_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 634 echo "there are 1520 more memories to test.";echo "tr 71 M=IDB_OBM11_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM11_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 635 echo "there are 1519 more memories to test.";echo "tr 71 M=IDB_OBM11_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM11_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 636 echo "there are 1518 more memories to test.";echo "tr 71 M=IDB_OBM11_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM11_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 637 echo "there are 1517 more memories to test.";echo "tr 71 M=IDB_OBM11_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM11_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 638 echo "there are 1516 more memories to test.";echo "tr 71 M=IDB_OBM11_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM11_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 639 echo "there are 1515 more memories to test.";echo "tr 71 M=IDB_OBM11_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM11_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 640 echo "there are 1514 more memories to test.";echo "tr 71 M=IDB_OBM11_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM11_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 641 echo "there are 1513 more memories to test.";echo "tr 71 M=IDB_OBM11_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM11_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 642 echo "there are 1512 more memories to test.";echo "tr 71 M=IDB_OBM11_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM11_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 643 echo "there are 1511 more memories to test.";echo "tr 71 M=IDB_OBM12_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM12_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 644 echo "there are 1510 more memories to test.";echo "tr 71 M=IDB_OBM12_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM12_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 645 echo "there are 1509 more memories to test.";echo "tr 71 M=IDB_OBM12_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM12_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 646 echo "there are 1508 more memories to test.";echo "tr 71 M=IDB_OBM12_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM12_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 647 echo "there are 1507 more memories to test.";echo "tr 71 M=IDB_OBM12_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM12_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 648 echo "there are 1506 more memories to test.";echo "tr 71 M=IDB_OBM12_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM12_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 649 echo "there are 1505 more memories to test.";echo "tr 71 M=IDB_OBM12_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM12_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 650 echo "there are 1504 more memories to test.";echo "tr 71 M=IDB_OBM12_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM12_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 651 echo "there are 1503 more memories to test.";echo "tr 71 M=IDB_OBM12_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM12_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 652 echo "there are 1502 more memories to test.";echo "tr 71 M=IDB_OBM12_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM12_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 653 echo "there are 1501 more memories to test.";echo "tr 71 M=IDB_OBM12_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM12_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 654 echo "there are 1500 more memories to test.";echo "tr 71 M=IDB_OBM12_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM12_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 655 echo "there are 1499 more memories to test.";echo "tr 71 M=IDB_OBM12_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM12_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 656 echo "there are 1498 more memories to test.";echo "tr 71 M=IDB_OBM12_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM12_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 657 echo "there are 1497 more memories to test.";echo "tr 71 M=IDB_OBM12_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM12_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 658 echo "there are 1496 more memories to test.";echo "tr 71 M=IDB_OBM12_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM12_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 659 echo "there are 1495 more memories to test.";echo "tr 71 M=IDB_OBM12_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM12_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 660 echo "there are 1494 more memories to test.";echo "tr 71 M=IDB_OBM12_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM12_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 661 echo "there are 1493 more memories to test.";echo "tr 71 M=IDB_OBM12_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM12_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 662 echo "there are 1492 more memories to test.";echo "tr 71 M=IDB_OBM12_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM12_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 663 echo "there are 1491 more memories to test.";echo "tr 71 M=IDB_OBM12_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM12_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 664 echo "there are 1490 more memories to test.";echo "tr 71 M=IDB_OBM12_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM12_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 665 echo "there are 1489 more memories to test.";echo "tr 71 M=IDB_OBM12_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM12_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 666 echo "there are 1488 more memories to test.";echo "tr 71 M=IDB_OBM12_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM12_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 667 echo "there are 1487 more memories to test.";echo "tr 71 M=IDB_OBM13_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM13_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 668 echo "there are 1486 more memories to test.";echo "tr 71 M=IDB_OBM13_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM13_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 669 echo "there are 1485 more memories to test.";echo "tr 71 M=IDB_OBM13_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM13_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 670 echo "there are 1484 more memories to test.";echo "tr 71 M=IDB_OBM13_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM13_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 671 echo "there are 1483 more memories to test.";echo "tr 71 M=IDB_OBM13_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM13_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 672 echo "there are 1482 more memories to test.";echo "tr 71 M=IDB_OBM13_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM13_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 673 echo "there are 1481 more memories to test.";echo "tr 71 M=IDB_OBM13_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM13_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 674 echo "there are 1480 more memories to test.";echo "tr 71 M=IDB_OBM13_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM13_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 675 echo "there are 1479 more memories to test.";echo "tr 71 M=IDB_OBM13_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM13_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 676 echo "there are 1478 more memories to test.";echo "tr 71 M=IDB_OBM13_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM13_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 677 echo "there are 1477 more memories to test.";echo "tr 71 M=IDB_OBM13_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM13_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 678 echo "there are 1476 more memories to test.";echo "tr 71 M=IDB_OBM13_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM13_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 679 echo "there are 1475 more memories to test.";echo "tr 71 M=IDB_OBM13_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM13_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 680 echo "there are 1474 more memories to test.";echo "tr 71 M=IDB_OBM13_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM13_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 681 echo "there are 1473 more memories to test.";echo "tr 71 M=IDB_OBM13_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM13_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 682 echo "there are 1472 more memories to test.";echo "tr 71 M=IDB_OBM13_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM13_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 683 echo "there are 1471 more memories to test.";echo "tr 71 M=IDB_OBM13_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM13_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 684 echo "there are 1470 more memories to test.";echo "tr 71 M=IDB_OBM13_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM13_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 685 echo "there are 1469 more memories to test.";echo "tr 71 M=IDB_OBM13_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM13_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 686 echo "there are 1468 more memories to test.";echo "tr 71 M=IDB_OBM13_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM13_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 687 echo "there are 1467 more memories to test.";echo "tr 71 M=IDB_OBM13_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM13_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 688 echo "there are 1466 more memories to test.";echo "tr 71 M=IDB_OBM13_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM13_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 689 echo "there are 1465 more memories to test.";echo "tr 71 M=IDB_OBM13_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM13_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 690 echo "there are 1464 more memories to test.";echo "tr 71 M=IDB_OBM13_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM13_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 691 echo "there are 1463 more memories to test.";echo "tr 71 M=IDB_OBM14_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM14_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 692 echo "there are 1462 more memories to test.";echo "tr 71 M=IDB_OBM14_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM14_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 693 echo "there are 1461 more memories to test.";echo "tr 71 M=IDB_OBM14_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM14_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 694 echo "there are 1460 more memories to test.";echo "tr 71 M=IDB_OBM14_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM14_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 695 echo "there are 1459 more memories to test.";echo "tr 71 M=IDB_OBM14_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM14_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 696 echo "there are 1458 more memories to test.";echo "tr 71 M=IDB_OBM14_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM14_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 697 echo "there are 1457 more memories to test.";echo "tr 71 M=IDB_OBM14_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM14_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 698 echo "there are 1456 more memories to test.";echo "tr 71 M=IDB_OBM14_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM14_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 699 echo "there are 1455 more memories to test.";echo "tr 71 M=IDB_OBM14_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM14_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 700 echo "there are 1454 more memories to test.";echo "tr 71 M=IDB_OBM14_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM14_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 701 echo "there are 1453 more memories to test.";echo "tr 71 M=IDB_OBM14_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM14_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 702 echo "there are 1452 more memories to test.";echo "tr 71 M=IDB_OBM14_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM14_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 703 echo "there are 1451 more memories to test.";echo "tr 71 M=IDB_OBM14_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM14_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 704 echo "there are 1450 more memories to test.";echo "tr 71 M=IDB_OBM14_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM14_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 705 echo "there are 1449 more memories to test.";echo "tr 71 M=IDB_OBM14_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM14_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 706 echo "there are 1448 more memories to test.";echo "tr 71 M=IDB_OBM14_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM14_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 707 echo "there are 1447 more memories to test.";echo "tr 71 M=IDB_OBM14_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM14_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 708 echo "there are 1446 more memories to test.";echo "tr 71 M=IDB_OBM14_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM14_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 709 echo "there are 1445 more memories to test.";echo "tr 71 M=IDB_OBM14_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM14_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 710 echo "there are 1444 more memories to test.";echo "tr 71 M=IDB_OBM14_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM14_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 711 echo "there are 1443 more memories to test.";echo "tr 71 M=IDB_OBM14_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM14_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 712 echo "there are 1442 more memories to test.";echo "tr 71 M=IDB_OBM14_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM14_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 713 echo "there are 1441 more memories to test.";echo "tr 71 M=IDB_OBM14_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM14_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 714 echo "there are 1440 more memories to test.";echo "tr 71 M=IDB_OBM14_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM14_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 715 echo "there are 1439 more memories to test.";echo "tr 71 M=IDB_OBM15_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM15_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 716 echo "there are 1438 more memories to test.";echo "tr 71 M=IDB_OBM15_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM15_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 717 echo "there are 1437 more memories to test.";echo "tr 71 M=IDB_OBM15_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM15_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 718 echo "there are 1436 more memories to test.";echo "tr 71 M=IDB_OBM15_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM15_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 719 echo "there are 1435 more memories to test.";echo "tr 71 M=IDB_OBM15_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM15_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 720 echo "there are 1434 more memories to test.";echo "tr 71 M=IDB_OBM15_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM15_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 721 echo "there are 1433 more memories to test.";echo "tr 71 M=IDB_OBM15_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM15_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 722 echo "there are 1432 more memories to test.";echo "tr 71 M=IDB_OBM15_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM15_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 723 echo "there are 1431 more memories to test.";echo "tr 71 M=IDB_OBM15_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM15_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 724 echo "there are 1430 more memories to test.";echo "tr 71 M=IDB_OBM15_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM15_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 725 echo "there are 1429 more memories to test.";echo "tr 71 M=IDB_OBM15_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM15_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 726 echo "there are 1428 more memories to test.";echo "tr 71 M=IDB_OBM15_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM15_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 727 echo "there are 1427 more memories to test.";echo "tr 71 M=IDB_OBM15_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM15_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 728 echo "there are 1426 more memories to test.";echo "tr 71 M=IDB_OBM15_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM15_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 729 echo "there are 1425 more memories to test.";echo "tr 71 M=IDB_OBM15_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM15_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 730 echo "there are 1424 more memories to test.";echo "tr 71 M=IDB_OBM15_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM15_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 731 echo "there are 1423 more memories to test.";echo "tr 71 M=IDB_OBM15_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM15_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 732 echo "there are 1422 more memories to test.";echo "tr 71 M=IDB_OBM15_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM15_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 733 echo "there are 1421 more memories to test.";echo "tr 71 M=IDB_OBM15_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM15_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 734 echo "there are 1420 more memories to test.";echo "tr 71 M=IDB_OBM15_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM15_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 735 echo "there are 1419 more memories to test.";echo "tr 71 M=IDB_OBM15_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM15_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 736 echo "there are 1418 more memories to test.";echo "tr 71 M=IDB_OBM15_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM15_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 737 echo "there are 1417 more memories to test.";echo "tr 71 M=IDB_OBM15_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM15_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 738 echo "there are 1416 more memories to test.";echo "tr 71 M=IDB_OBM15_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM15_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 739 echo "there are 1415 more memories to test.";echo "tr 71 M=IDB_OBM16_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM16_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 740 echo "there are 1414 more memories to test.";echo "tr 71 M=IDB_OBM16_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM16_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 741 echo "there are 1413 more memories to test.";echo "tr 71 M=IDB_OBM16_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM16_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 742 echo "there are 1412 more memories to test.";echo "tr 71 M=IDB_OBM16_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM16_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 743 echo "there are 1411 more memories to test.";echo "tr 71 M=IDB_OBM16_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM16_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 744 echo "there are 1410 more memories to test.";echo "tr 71 M=IDB_OBM16_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM16_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 745 echo "there are 1409 more memories to test.";echo "tr 71 M=IDB_OBM16_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM16_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 746 echo "there are 1408 more memories to test.";echo "tr 71 M=IDB_OBM16_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM16_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 747 echo "there are 1407 more memories to test.";echo "tr 71 M=IDB_OBM16_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM16_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 748 echo "there are 1406 more memories to test.";echo "tr 71 M=IDB_OBM16_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM16_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 749 echo "there are 1405 more memories to test.";echo "tr 71 M=IDB_OBM16_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM16_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 750 echo "there are 1404 more memories to test.";echo "tr 71 M=IDB_OBM16_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM16_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 751 echo "there are 1403 more memories to test.";echo "tr 71 M=IDB_OBM16_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM16_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 752 echo "there are 1402 more memories to test.";echo "tr 71 M=IDB_OBM16_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM16_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 753 echo "there are 1401 more memories to test.";echo "tr 71 M=IDB_OBM16_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM16_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 754 echo "there are 1400 more memories to test.";echo "tr 71 M=IDB_OBM16_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM16_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 755 echo "there are 1399 more memories to test.";echo "tr 71 M=IDB_OBM16_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM16_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 756 echo "there are 1398 more memories to test.";echo "tr 71 M=IDB_OBM16_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM16_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 757 echo "there are 1397 more memories to test.";echo "tr 71 M=IDB_OBM16_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM16_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 758 echo "there are 1396 more memories to test.";echo "tr 71 M=IDB_OBM16_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM16_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 759 echo "there are 1395 more memories to test.";echo "tr 71 M=IDB_OBM16_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM16_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 760 echo "there are 1394 more memories to test.";echo "tr 71 M=IDB_OBM16_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM16_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 761 echo "there are 1393 more memories to test.";echo "tr 71 M=IDB_OBM16_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM16_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 762 echo "there are 1392 more memories to test.";echo "tr 71 M=IDB_OBM16_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM16_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 763 echo "there are 1391 more memories to test.";echo "tr 71 M=IDB_OBM17_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM17_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 764 echo "there are 1390 more memories to test.";echo "tr 71 M=IDB_OBM17_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM17_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 765 echo "there are 1389 more memories to test.";echo "tr 71 M=IDB_OBM17_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM17_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 766 echo "there are 1388 more memories to test.";echo "tr 71 M=IDB_OBM17_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM17_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 767 echo "there are 1387 more memories to test.";echo "tr 71 M=IDB_OBM17_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM17_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 768 echo "there are 1386 more memories to test.";echo "tr 71 M=IDB_OBM17_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM17_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 769 echo "there are 1385 more memories to test.";echo "tr 71 M=IDB_OBM17_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM17_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 770 echo "there are 1384 more memories to test.";echo "tr 71 M=IDB_OBM17_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM17_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 771 echo "there are 1383 more memories to test.";echo "tr 71 M=IDB_OBM17_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM17_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 772 echo "there are 1382 more memories to test.";echo "tr 71 M=IDB_OBM17_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM17_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 773 echo "there are 1381 more memories to test.";echo "tr 71 M=IDB_OBM17_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM17_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 774 echo "there are 1380 more memories to test.";echo "tr 71 M=IDB_OBM17_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM17_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 775 echo "there are 1379 more memories to test.";echo "tr 71 M=IDB_OBM17_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM17_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 776 echo "there are 1378 more memories to test.";echo "tr 71 M=IDB_OBM17_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM17_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 777 echo "there are 1377 more memories to test.";echo "tr 71 M=IDB_OBM17_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM17_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 778 echo "there are 1376 more memories to test.";echo "tr 71 M=IDB_OBM17_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM17_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 779 echo "there are 1375 more memories to test.";echo "tr 71 M=IDB_OBM17_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM17_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 780 echo "there are 1374 more memories to test.";echo "tr 71 M=IDB_OBM17_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM17_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 781 echo "there are 1373 more memories to test.";echo "tr 71 M=IDB_OBM17_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM17_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 782 echo "there are 1372 more memories to test.";echo "tr 71 M=IDB_OBM17_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM17_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 783 echo "there are 1371 more memories to test.";echo "tr 71 M=IDB_OBM17_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM17_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 784 echo "there are 1370 more memories to test.";echo "tr 71 M=IDB_OBM17_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM17_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 785 echo "there are 1369 more memories to test.";echo "tr 71 M=IDB_OBM17_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM17_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 786 echo "there are 1368 more memories to test.";echo "tr 71 M=IDB_OBM17_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM17_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 787 echo "there are 1367 more memories to test.";echo "tr 71 M=IDB_OBM18_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM18_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 788 echo "there are 1366 more memories to test.";echo "tr 71 M=IDB_OBM18_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM18_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 789 echo "there are 1365 more memories to test.";echo "tr 71 M=IDB_OBM18_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM18_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 790 echo "there are 1364 more memories to test.";echo "tr 71 M=IDB_OBM18_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM18_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 791 echo "there are 1363 more memories to test.";echo "tr 71 M=IDB_OBM18_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM18_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 792 echo "there are 1362 more memories to test.";echo "tr 71 M=IDB_OBM18_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM18_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 793 echo "there are 1361 more memories to test.";echo "tr 71 M=IDB_OBM18_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM18_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 794 echo "there are 1360 more memories to test.";echo "tr 71 M=IDB_OBM18_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM18_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 795 echo "there are 1359 more memories to test.";echo "tr 71 M=IDB_OBM18_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM18_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 796 echo "there are 1358 more memories to test.";echo "tr 71 M=IDB_OBM18_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM18_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 797 echo "there are 1357 more memories to test.";echo "tr 71 M=IDB_OBM18_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM18_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 798 echo "there are 1356 more memories to test.";echo "tr 71 M=IDB_OBM18_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM18_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 799 echo "there are 1355 more memories to test.";echo "tr 71 M=IDB_OBM18_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM18_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 800 echo "there are 1354 more memories to test.";echo "tr 71 M=IDB_OBM18_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM18_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 801 echo "there are 1353 more memories to test.";echo "tr 71 M=IDB_OBM18_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM18_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 802 echo "there are 1352 more memories to test.";echo "tr 71 M=IDB_OBM18_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM18_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 803 echo "there are 1351 more memories to test.";echo "tr 71 M=IDB_OBM18_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM18_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 804 echo "there are 1350 more memories to test.";echo "tr 71 M=IDB_OBM18_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM18_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 805 echo "there are 1349 more memories to test.";echo "tr 71 M=IDB_OBM18_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM18_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 806 echo "there are 1348 more memories to test.";echo "tr 71 M=IDB_OBM18_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM18_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 807 echo "there are 1347 more memories to test.";echo "tr 71 M=IDB_OBM18_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM18_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 808 echo "there are 1346 more memories to test.";echo "tr 71 M=IDB_OBM18_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM18_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 809 echo "there are 1345 more memories to test.";echo "tr 71 M=IDB_OBM18_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM18_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 810 echo "there are 1344 more memories to test.";echo "tr 71 M=IDB_OBM18_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM18_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 811 echo "there are 1343 more memories to test.";echo "tr 71 M=IDB_OBM19_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM19_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 812 echo "there are 1342 more memories to test.";echo "tr 71 M=IDB_OBM19_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM19_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 813 echo "there are 1341 more memories to test.";echo "tr 71 M=IDB_OBM19_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM19_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 814 echo "there are 1340 more memories to test.";echo "tr 71 M=IDB_OBM19_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM19_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 815 echo "there are 1339 more memories to test.";echo "tr 71 M=IDB_OBM19_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM19_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 816 echo "there are 1338 more memories to test.";echo "tr 71 M=IDB_OBM19_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM19_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 817 echo "there are 1337 more memories to test.";echo "tr 71 M=IDB_OBM19_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM19_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 818 echo "there are 1336 more memories to test.";echo "tr 71 M=IDB_OBM19_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM19_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 819 echo "there are 1335 more memories to test.";echo "tr 71 M=IDB_OBM19_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM19_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 820 echo "there are 1334 more memories to test.";echo "tr 71 M=IDB_OBM19_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM19_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 821 echo "there are 1333 more memories to test.";echo "tr 71 M=IDB_OBM19_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM19_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 822 echo "there are 1332 more memories to test.";echo "tr 71 M=IDB_OBM19_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM19_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 823 echo "there are 1331 more memories to test.";echo "tr 71 M=IDB_OBM19_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM19_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 824 echo "there are 1330 more memories to test.";echo "tr 71 M=IDB_OBM19_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM19_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 825 echo "there are 1329 more memories to test.";echo "tr 71 M=IDB_OBM19_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM19_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 826 echo "there are 1328 more memories to test.";echo "tr 71 M=IDB_OBM19_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM19_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 827 echo "there are 1327 more memories to test.";echo "tr 71 M=IDB_OBM19_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM19_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 828 echo "there are 1326 more memories to test.";echo "tr 71 M=IDB_OBM19_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM19_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 829 echo "there are 1325 more memories to test.";echo "tr 71 M=IDB_OBM19_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM19_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 830 echo "there are 1324 more memories to test.";echo "tr 71 M=IDB_OBM19_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM19_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 831 echo "there are 1323 more memories to test.";echo "tr 71 M=IDB_OBM19_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM19_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 832 echo "there are 1322 more memories to test.";echo "tr 71 M=IDB_OBM19_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM19_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 833 echo "there are 1321 more memories to test.";echo "tr 71 M=IDB_OBM19_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM19_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 834 echo "there are 1320 more memories to test.";echo "tr 71 M=IDB_OBM19_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM19_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 835 echo "there are 1319 more memories to test.";echo "tr 71 M=IDB_OBM1_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM1_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 836 echo "there are 1318 more memories to test.";echo "tr 71 M=IDB_OBM1_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM1_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 837 echo "there are 1317 more memories to test.";echo "tr 71 M=IDB_OBM1_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM1_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 838 echo "there are 1316 more memories to test.";echo "tr 71 M=IDB_OBM1_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM1_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 839 echo "there are 1315 more memories to test.";echo "tr 71 M=IDB_OBM1_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM1_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 840 echo "there are 1314 more memories to test.";echo "tr 71 M=IDB_OBM1_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM1_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 841 echo "there are 1313 more memories to test.";echo "tr 71 M=IDB_OBM1_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM1_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 842 echo "there are 1312 more memories to test.";echo "tr 71 M=IDB_OBM1_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM1_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 843 echo "there are 1311 more memories to test.";echo "tr 71 M=IDB_OBM1_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM1_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 844 echo "there are 1310 more memories to test.";echo "tr 71 M=IDB_OBM1_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM1_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 845 echo "there are 1309 more memories to test.";echo "tr 71 M=IDB_OBM1_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM1_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 846 echo "there are 1308 more memories to test.";echo "tr 71 M=IDB_OBM1_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM1_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 847 echo "there are 1307 more memories to test.";echo "tr 71 M=IDB_OBM1_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM1_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 848 echo "there are 1306 more memories to test.";echo "tr 71 M=IDB_OBM1_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM1_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 849 echo "there are 1305 more memories to test.";echo "tr 71 M=IDB_OBM1_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM1_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 850 echo "there are 1304 more memories to test.";echo "tr 71 M=IDB_OBM1_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM1_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 851 echo "there are 1303 more memories to test.";echo "tr 71 M=IDB_OBM1_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM1_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 852 echo "there are 1302 more memories to test.";echo "tr 71 M=IDB_OBM1_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM1_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 853 echo "there are 1301 more memories to test.";echo "tr 71 M=IDB_OBM1_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM1_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 854 echo "there are 1300 more memories to test.";echo "tr 71 M=IDB_OBM1_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM1_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 855 echo "there are 1299 more memories to test.";echo "tr 71 M=IDB_OBM1_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM1_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 856 echo "there are 1298 more memories to test.";echo "tr 71 M=IDB_OBM1_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM1_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 857 echo "there are 1297 more memories to test.";echo "tr 71 M=IDB_OBM1_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM1_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 858 echo "there are 1296 more memories to test.";echo "tr 71 M=IDB_OBM1_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM1_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 859 echo "there are 1295 more memories to test.";echo "tr 71 M=IDB_OBM2_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM2_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 860 echo "there are 1294 more memories to test.";echo "tr 71 M=IDB_OBM2_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM2_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 861 echo "there are 1293 more memories to test.";echo "tr 71 M=IDB_OBM2_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM2_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 862 echo "there are 1292 more memories to test.";echo "tr 71 M=IDB_OBM2_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM2_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 863 echo "there are 1291 more memories to test.";echo "tr 71 M=IDB_OBM2_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM2_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 864 echo "there are 1290 more memories to test.";echo "tr 71 M=IDB_OBM2_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM2_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 865 echo "there are 1289 more memories to test.";echo "tr 71 M=IDB_OBM2_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM2_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 866 echo "there are 1288 more memories to test.";echo "tr 71 M=IDB_OBM2_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM2_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 867 echo "there are 1287 more memories to test.";echo "tr 71 M=IDB_OBM2_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM2_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 868 echo "there are 1286 more memories to test.";echo "tr 71 M=IDB_OBM2_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM2_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 869 echo "there are 1285 more memories to test.";echo "tr 71 M=IDB_OBM2_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM2_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 870 echo "there are 1284 more memories to test.";echo "tr 71 M=IDB_OBM2_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM2_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 871 echo "there are 1283 more memories to test.";echo "tr 71 M=IDB_OBM2_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM2_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 872 echo "there are 1282 more memories to test.";echo "tr 71 M=IDB_OBM2_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM2_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 873 echo "there are 1281 more memories to test.";echo "tr 71 M=IDB_OBM2_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM2_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 874 echo "there are 1280 more memories to test.";echo "tr 71 M=IDB_OBM2_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM2_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 875 echo "there are 1279 more memories to test.";echo "tr 71 M=IDB_OBM2_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM2_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 876 echo "there are 1278 more memories to test.";echo "tr 71 M=IDB_OBM2_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM2_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 877 echo "there are 1277 more memories to test.";echo "tr 71 M=IDB_OBM2_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM2_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 878 echo "there are 1276 more memories to test.";echo "tr 71 M=IDB_OBM2_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM2_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 879 echo "there are 1275 more memories to test.";echo "tr 71 M=IDB_OBM2_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM2_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 880 echo "there are 1274 more memories to test.";echo "tr 71 M=IDB_OBM2_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM2_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 881 echo "there are 1273 more memories to test.";echo "tr 71 M=IDB_OBM2_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM2_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 882 echo "there are 1272 more memories to test.";echo "tr 71 M=IDB_OBM2_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM2_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 883 echo "there are 1271 more memories to test.";echo "tr 71 M=IDB_OBM3_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM3_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 884 echo "there are 1270 more memories to test.";echo "tr 71 M=IDB_OBM3_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM3_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 885 echo "there are 1269 more memories to test.";echo "tr 71 M=IDB_OBM3_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM3_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 886 echo "there are 1268 more memories to test.";echo "tr 71 M=IDB_OBM3_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM3_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 887 echo "there are 1267 more memories to test.";echo "tr 71 M=IDB_OBM3_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM3_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 888 echo "there are 1266 more memories to test.";echo "tr 71 M=IDB_OBM3_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM3_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 889 echo "there are 1265 more memories to test.";echo "tr 71 M=IDB_OBM3_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM3_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 890 echo "there are 1264 more memories to test.";echo "tr 71 M=IDB_OBM3_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM3_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 891 echo "there are 1263 more memories to test.";echo "tr 71 M=IDB_OBM3_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM3_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 892 echo "there are 1262 more memories to test.";echo "tr 71 M=IDB_OBM3_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM3_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 893 echo "there are 1261 more memories to test.";echo "tr 71 M=IDB_OBM3_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM3_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 894 echo "there are 1260 more memories to test.";echo "tr 71 M=IDB_OBM3_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM3_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 895 echo "there are 1259 more memories to test.";echo "tr 71 M=IDB_OBM3_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM3_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 896 echo "there are 1258 more memories to test.";echo "tr 71 M=IDB_OBM3_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM3_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 897 echo "there are 1257 more memories to test.";echo "tr 71 M=IDB_OBM3_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM3_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 898 echo "there are 1256 more memories to test.";echo "tr 71 M=IDB_OBM3_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM3_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 899 echo "there are 1255 more memories to test.";echo "tr 71 M=IDB_OBM3_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM3_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 900 echo "there are 1254 more memories to test.";echo "tr 71 M=IDB_OBM3_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM3_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 901 echo "there are 1253 more memories to test.";echo "tr 71 M=IDB_OBM3_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM3_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 902 echo "there are 1252 more memories to test.";echo "tr 71 M=IDB_OBM3_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM3_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 903 echo "there are 1251 more memories to test.";echo "tr 71 M=IDB_OBM3_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM3_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 904 echo "there are 1250 more memories to test.";echo "tr 71 M=IDB_OBM3_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM3_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 905 echo "there are 1249 more memories to test.";echo "tr 71 M=IDB_OBM3_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM3_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 906 echo "there are 1248 more memories to test.";echo "tr 71 M=IDB_OBM3_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM3_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 907 echo "there are 1247 more memories to test.";echo "tr 71 M=IDB_OBM4_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM4_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 908 echo "there are 1246 more memories to test.";echo "tr 71 M=IDB_OBM4_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM4_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 909 echo "there are 1245 more memories to test.";echo "tr 71 M=IDB_OBM4_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM4_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 910 echo "there are 1244 more memories to test.";echo "tr 71 M=IDB_OBM4_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM4_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 911 echo "there are 1243 more memories to test.";echo "tr 71 M=IDB_OBM4_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM4_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 912 echo "there are 1242 more memories to test.";echo "tr 71 M=IDB_OBM4_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM4_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 913 echo "there are 1241 more memories to test.";echo "tr 71 M=IDB_OBM4_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM4_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 914 echo "there are 1240 more memories to test.";echo "tr 71 M=IDB_OBM4_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM4_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 915 echo "there are 1239 more memories to test.";echo "tr 71 M=IDB_OBM4_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM4_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 916 echo "there are 1238 more memories to test.";echo "tr 71 M=IDB_OBM4_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM4_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 917 echo "there are 1237 more memories to test.";echo "tr 71 M=IDB_OBM4_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM4_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 918 echo "there are 1236 more memories to test.";echo "tr 71 M=IDB_OBM4_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM4_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 919 echo "there are 1235 more memories to test.";echo "tr 71 M=IDB_OBM4_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM4_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 920 echo "there are 1234 more memories to test.";echo "tr 71 M=IDB_OBM4_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM4_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 921 echo "there are 1233 more memories to test.";echo "tr 71 M=IDB_OBM4_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM4_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 922 echo "there are 1232 more memories to test.";echo "tr 71 M=IDB_OBM4_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM4_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 923 echo "there are 1231 more memories to test.";echo "tr 71 M=IDB_OBM4_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM4_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 924 echo "there are 1230 more memories to test.";echo "tr 71 M=IDB_OBM4_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM4_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 925 echo "there are 1229 more memories to test.";echo "tr 71 M=IDB_OBM4_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM4_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 926 echo "there are 1228 more memories to test.";echo "tr 71 M=IDB_OBM4_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM4_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 927 echo "there are 1227 more memories to test.";echo "tr 71 M=IDB_OBM4_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM4_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 928 echo "there are 1226 more memories to test.";echo "tr 71 M=IDB_OBM4_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM4_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 929 echo "there are 1225 more memories to test.";echo "tr 71 M=IDB_OBM4_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM4_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 930 echo "there are 1224 more memories to test.";echo "tr 71 M=IDB_OBM4_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM4_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 931 echo "there are 1223 more memories to test.";echo "tr 71 M=IDB_OBM5_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM5_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 932 echo "there are 1222 more memories to test.";echo "tr 71 M=IDB_OBM5_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM5_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 933 echo "there are 1221 more memories to test.";echo "tr 71 M=IDB_OBM5_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM5_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 934 echo "there are 1220 more memories to test.";echo "tr 71 M=IDB_OBM5_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM5_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 935 echo "there are 1219 more memories to test.";echo "tr 71 M=IDB_OBM5_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM5_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 936 echo "there are 1218 more memories to test.";echo "tr 71 M=IDB_OBM5_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM5_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 937 echo "there are 1217 more memories to test.";echo "tr 71 M=IDB_OBM5_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM5_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 938 echo "there are 1216 more memories to test.";echo "tr 71 M=IDB_OBM5_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM5_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 939 echo "there are 1215 more memories to test.";echo "tr 71 M=IDB_OBM5_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM5_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 940 echo "there are 1214 more memories to test.";echo "tr 71 M=IDB_OBM5_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM5_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 941 echo "there are 1213 more memories to test.";echo "tr 71 M=IDB_OBM5_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM5_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 942 echo "there are 1212 more memories to test.";echo "tr 71 M=IDB_OBM5_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM5_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 943 echo "there are 1211 more memories to test.";echo "tr 71 M=IDB_OBM5_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM5_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 944 echo "there are 1210 more memories to test.";echo "tr 71 M=IDB_OBM5_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM5_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 945 echo "there are 1209 more memories to test.";echo "tr 71 M=IDB_OBM5_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM5_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 946 echo "there are 1208 more memories to test.";echo "tr 71 M=IDB_OBM5_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM5_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 947 echo "there are 1207 more memories to test.";echo "tr 71 M=IDB_OBM5_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM5_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 948 echo "there are 1206 more memories to test.";echo "tr 71 M=IDB_OBM5_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM5_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 949 echo "there are 1205 more memories to test.";echo "tr 71 M=IDB_OBM5_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM5_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 950 echo "there are 1204 more memories to test.";echo "tr 71 M=IDB_OBM5_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM5_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 951 echo "there are 1203 more memories to test.";echo "tr 71 M=IDB_OBM5_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM5_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 952 echo "there are 1202 more memories to test.";echo "tr 71 M=IDB_OBM5_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM5_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 953 echo "there are 1201 more memories to test.";echo "tr 71 M=IDB_OBM5_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM5_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 954 echo "there are 1200 more memories to test.";echo "tr 71 M=IDB_OBM5_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM5_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 955 echo "there are 1199 more memories to test.";echo "tr 71 M=IDB_OBM6_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM6_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 956 echo "there are 1198 more memories to test.";echo "tr 71 M=IDB_OBM6_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM6_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 957 echo "there are 1197 more memories to test.";echo "tr 71 M=IDB_OBM6_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM6_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 958 echo "there are 1196 more memories to test.";echo "tr 71 M=IDB_OBM6_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM6_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 959 echo "there are 1195 more memories to test.";echo "tr 71 M=IDB_OBM6_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM6_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 960 echo "there are 1194 more memories to test.";echo "tr 71 M=IDB_OBM6_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM6_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 961 echo "there are 1193 more memories to test.";echo "tr 71 M=IDB_OBM6_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM6_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 962 echo "there are 1192 more memories to test.";echo "tr 71 M=IDB_OBM6_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM6_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 963 echo "there are 1191 more memories to test.";echo "tr 71 M=IDB_OBM6_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM6_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 964 echo "there are 1190 more memories to test.";echo "tr 71 M=IDB_OBM6_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM6_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 965 echo "there are 1189 more memories to test.";echo "tr 71 M=IDB_OBM6_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM6_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 966 echo "there are 1188 more memories to test.";echo "tr 71 M=IDB_OBM6_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM6_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 967 echo "there are 1187 more memories to test.";echo "tr 71 M=IDB_OBM6_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM6_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 968 echo "there are 1186 more memories to test.";echo "tr 71 M=IDB_OBM6_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM6_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 969 echo "there are 1185 more memories to test.";echo "tr 71 M=IDB_OBM6_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM6_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 970 echo "there are 1184 more memories to test.";echo "tr 71 M=IDB_OBM6_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM6_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 971 echo "there are 1183 more memories to test.";echo "tr 71 M=IDB_OBM6_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM6_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 972 echo "there are 1182 more memories to test.";echo "tr 71 M=IDB_OBM6_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM6_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 973 echo "there are 1181 more memories to test.";echo "tr 71 M=IDB_OBM6_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM6_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 974 echo "there are 1180 more memories to test.";echo "tr 71 M=IDB_OBM6_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM6_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 975 echo "there are 1179 more memories to test.";echo "tr 71 M=IDB_OBM6_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM6_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 976 echo "there are 1178 more memories to test.";echo "tr 71 M=IDB_OBM6_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM6_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 977 echo "there are 1177 more memories to test.";echo "tr 71 M=IDB_OBM6_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM6_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 978 echo "there are 1176 more memories to test.";echo "tr 71 M=IDB_OBM6_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM6_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 979 echo "there are 1175 more memories to test.";echo "tr 71 M=IDB_OBM7_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM7_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 980 echo "there are 1174 more memories to test.";echo "tr 71 M=IDB_OBM7_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM7_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 981 echo "there are 1173 more memories to test.";echo "tr 71 M=IDB_OBM7_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM7_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 982 echo "there are 1172 more memories to test.";echo "tr 71 M=IDB_OBM7_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM7_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 983 echo "there are 1171 more memories to test.";echo "tr 71 M=IDB_OBM7_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM7_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 984 echo "there are 1170 more memories to test.";echo "tr 71 M=IDB_OBM7_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM7_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 985 echo "there are 1169 more memories to test.";echo "tr 71 M=IDB_OBM7_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM7_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 986 echo "there are 1168 more memories to test.";echo "tr 71 M=IDB_OBM7_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM7_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 987 echo "there are 1167 more memories to test.";echo "tr 71 M=IDB_OBM7_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM7_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 988 echo "there are 1166 more memories to test.";echo "tr 71 M=IDB_OBM7_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM7_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 989 echo "there are 1165 more memories to test.";echo "tr 71 M=IDB_OBM7_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM7_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 990 echo "there are 1164 more memories to test.";echo "tr 71 M=IDB_OBM7_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM7_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 991 echo "there are 1163 more memories to test.";echo "tr 71 M=IDB_OBM7_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM7_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 992 echo "there are 1162 more memories to test.";echo "tr 71 M=IDB_OBM7_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM7_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 993 echo "there are 1161 more memories to test.";echo "tr 71 M=IDB_OBM7_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM7_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 994 echo "there are 1160 more memories to test.";echo "tr 71 M=IDB_OBM7_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM7_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 995 echo "there are 1159 more memories to test.";echo "tr 71 M=IDB_OBM7_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM7_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 996 echo "there are 1158 more memories to test.";echo "tr 71 M=IDB_OBM7_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM7_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 997 echo "there are 1157 more memories to test.";echo "tr 71 M=IDB_OBM7_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM7_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 998 echo "there are 1156 more memories to test.";echo "tr 71 M=IDB_OBM7_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM7_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 999 echo "there are 1155 more memories to test.";echo "tr 71 M=IDB_OBM7_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM7_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1000 echo "there are 1154 more memories to test.";echo "tr 71 M=IDB_OBM7_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM7_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1001 echo "there are 1153 more memories to test.";echo "tr 71 M=IDB_OBM7_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM7_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1002 echo "there are 1152 more memories to test.";echo "tr 71 M=IDB_OBM7_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM7_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1003 echo "there are 1151 more memories to test.";echo "tr 71 M=IDB_OBM8_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM8_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1004 echo "there are 1150 more memories to test.";echo "tr 71 M=IDB_OBM8_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM8_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1005 echo "there are 1149 more memories to test.";echo "tr 71 M=IDB_OBM8_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM8_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1006 echo "there are 1148 more memories to test.";echo "tr 71 M=IDB_OBM8_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM8_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1007 echo "there are 1147 more memories to test.";echo "tr 71 M=IDB_OBM8_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM8_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1008 echo "there are 1146 more memories to test.";echo "tr 71 M=IDB_OBM8_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM8_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1009 echo "there are 1145 more memories to test.";echo "tr 71 M=IDB_OBM8_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM8_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1010 echo "there are 1144 more memories to test.";echo "tr 71 M=IDB_OBM8_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM8_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1011 echo "there are 1143 more memories to test.";echo "tr 71 M=IDB_OBM8_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM8_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1012 echo "there are 1142 more memories to test.";echo "tr 71 M=IDB_OBM8_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM8_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1013 echo "there are 1141 more memories to test.";echo "tr 71 M=IDB_OBM8_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM8_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1014 echo "there are 1140 more memories to test.";echo "tr 71 M=IDB_OBM8_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM8_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1015 echo "there are 1139 more memories to test.";echo "tr 71 M=IDB_OBM8_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM8_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1016 echo "there are 1138 more memories to test.";echo "tr 71 M=IDB_OBM8_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM8_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1017 echo "there are 1137 more memories to test.";echo "tr 71 M=IDB_OBM8_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM8_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1018 echo "there are 1136 more memories to test.";echo "tr 71 M=IDB_OBM8_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM8_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1019 echo "there are 1135 more memories to test.";echo "tr 71 M=IDB_OBM8_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM8_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1020 echo "there are 1134 more memories to test.";echo "tr 71 M=IDB_OBM8_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM8_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1021 echo "there are 1133 more memories to test.";echo "tr 71 M=IDB_OBM8_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM8_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1022 echo "there are 1132 more memories to test.";echo "tr 71 M=IDB_OBM8_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM8_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1023 echo "there are 1131 more memories to test.";echo "tr 71 M=IDB_OBM8_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM8_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1024 echo "there are 1130 more memories to test.";echo "tr 71 M=IDB_OBM8_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM8_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1025 echo "there are 1129 more memories to test.";echo "tr 71 M=IDB_OBM8_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM8_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1026 echo "there are 1128 more memories to test.";echo "tr 71 M=IDB_OBM8_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM8_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1027 echo "there are 1127 more memories to test.";echo "tr 71 M=IDB_OBM9_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM9_DSCP_MAP_PORT0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1028 echo "there are 1126 more memories to test.";echo "tr 71 M=IDB_OBM9_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM9_DSCP_MAP_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1029 echo "there are 1125 more memories to test.";echo "tr 71 M=IDB_OBM9_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM9_DSCP_MAP_PORT1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1030 echo "there are 1124 more memories to test.";echo "tr 71 M=IDB_OBM9_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM9_DSCP_MAP_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1031 echo "there are 1123 more memories to test.";echo "tr 71 M=IDB_OBM9_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM9_DSCP_MAP_PORT2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1032 echo "there are 1122 more memories to test.";echo "tr 71 M=IDB_OBM9_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM9_DSCP_MAP_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1033 echo "there are 1121 more memories to test.";echo "tr 71 M=IDB_OBM9_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM9_DSCP_MAP_PORT3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1034 echo "there are 1120 more memories to test.";echo "tr 71 M=IDB_OBM9_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IDB_OBM9_DSCP_MAP_PORT3_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1035 echo "there are 1119 more memories to test.";echo "tr 71 M=IDB_OBM9_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM9_ETAG_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1036 echo "there are 1118 more memories to test.";echo "tr 71 M=IDB_OBM9_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM9_ETAG_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1037 echo "there are 1117 more memories to test.";echo "tr 71 M=IDB_OBM9_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM9_ETAG_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1038 echo "there are 1116 more memories to test.";echo "tr 71 M=IDB_OBM9_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM9_ETAG_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1039 echo "there are 1115 more memories to test.";echo "tr 71 M=IDB_OBM9_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM9_ETAG_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1040 echo "there are 1114 more memories to test.";echo "tr 71 M=IDB_OBM9_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM9_ETAG_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1041 echo "there are 1113 more memories to test.";echo "tr 71 M=IDB_OBM9_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM9_ETAG_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1042 echo "there are 1112 more memories to test.";echo "tr 71 M=IDB_OBM9_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM9_ETAG_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1043 echo "there are 1111 more memories to test.";echo "tr 71 M=IDB_OBM9_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM9_PRI_MAP_PORT0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1044 echo "there are 1110 more memories to test.";echo "tr 71 M=IDB_OBM9_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM9_PRI_MAP_PORT0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1045 echo "there are 1109 more memories to test.";echo "tr 71 M=IDB_OBM9_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM9_PRI_MAP_PORT1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1046 echo "there are 1108 more memories to test.";echo "tr 71 M=IDB_OBM9_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM9_PRI_MAP_PORT1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1047 echo "there are 1107 more memories to test.";echo "tr 71 M=IDB_OBM9_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM9_PRI_MAP_PORT2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1048 echo "there are 1106 more memories to test.";echo "tr 71 M=IDB_OBM9_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM9_PRI_MAP_PORT2_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1049 echo "there are 1105 more memories to test.";echo "tr 71 M=IDB_OBM9_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM9_PRI_MAP_PORT3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1050 echo "there are 1104 more memories to test.";echo "tr 71 M=IDB_OBM9_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IDB_OBM9_PRI_MAP_PORT3_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1051 echo "there are 1103 more memories to test.";echo "tr 71 M=IFP_COS_MAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IFP_COS_MAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1052 echo "there are 1102 more memories to test.";echo "tr 71 M=IFP_EM_DROP_VECTOR_MASK_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IFP_EM_DROP_VECTOR_MASK_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1053 echo "there are 1101 more memories to test.";echo "tr 71 M=IFP_EM_DROP_VECTOR_MASK_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IFP_EM_DROP_VECTOR_MASK_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1054 echo "there are 1100 more memories to test.";echo "tr 71 M=IFP_HG_CLASSID_SELECT Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IFP_HG_CLASSID_SELECT Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1055 echo "there are 1099 more memories to test.";echo "tr 71 M=IFP_I2E_CLASSID_SELECT Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IFP_I2E_CLASSID_SELECT Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1056 echo "there are 1098 more memories to test.";echo "tr 71 M=IFP_KEY_GEN_PROGRAM_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IFP_KEY_GEN_PROGRAM_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1057 echo "there are 1097 more memories to test.";echo "tr 71 M=IFP_KEY_GEN_PROGRAM_PROFILE2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IFP_KEY_GEN_PROGRAM_PROFILE2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1058 echo "there are 1096 more memories to test.";echo "tr 71 M=IFP_KEY_GEN_PROGRAM_PROFILE2_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IFP_KEY_GEN_PROGRAM_PROFILE2_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1059 echo "there are 1095 more memories to test.";echo "tr 71 M=IFP_KEY_GEN_PROGRAM_PROFILE_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IFP_KEY_GEN_PROGRAM_PROFILE_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1060 echo "there are 1094 more memories to test.";echo "tr 71 M=IFP_LOGICAL_TABLE_ACTION_PRIORITY Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IFP_LOGICAL_TABLE_ACTION_PRIORITY Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1061 echo "there are 1093 more memories to test.";echo "tr 71 M=IFP_LOGICAL_TABLE_ACTION_PRIORITY_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IFP_LOGICAL_TABLE_ACTION_PRIORITY_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1062 echo "there are 1092 more memories to test.";echo "tr 71 M=IFP_LOGICAL_TABLE_SELECT Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IFP_LOGICAL_TABLE_SELECT Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1063 echo "there are 1091 more memories to test.";echo "tr 71 M=IFP_LOGICAL_TABLE_SELECT_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IFP_LOGICAL_TABLE_SELECT_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1064 echo "there are 1090 more memories to test.";echo "tr 71 M=IFP_LOGICAL_TABLE_SELECT_DATA_ONLY_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IFP_LOGICAL_TABLE_SELECT_DATA_ONLY_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1065 echo "there are 1089 more memories to test.";echo "tr 71 M=IFP_LOGICAL_TABLE_SELECT_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IFP_LOGICAL_TABLE_SELECT_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1066 echo "there are 1088 more memories to test.";echo "tr 71 M=IFP_LOGICAL_TABLE_SELECT_TCAM_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IFP_LOGICAL_TABLE_SELECT_TCAM_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1067 echo "there are 1087 more memories to test.";echo "tr 71 M=IFP_LOGICAL_TABLE_SELECT_TCAM_ONLY_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IFP_LOGICAL_TABLE_SELECT_TCAM_ONLY_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1068 echo "there are 1086 more memories to test.";echo "tr 71 M=IFP_METER_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IFP_METER_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1069 echo "there are 1085 more memories to test.";echo "tr 71 M=IFP_METER_TABLE_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IFP_METER_TABLE_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1070 echo "there are 1084 more memories to test.";echo "tr 71 M=IFP_POLICY_ACTION_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IFP_POLICY_ACTION_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1071 echo "there are 1083 more memories to test.";echo "tr 71 M=IFP_POLICY_ACTION_PROFILE_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IFP_POLICY_ACTION_PROFILE_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1072 echo "there are 1082 more memories to test.";echo "tr 71 M=IFP_POLICY_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IFP_POLICY_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1073 echo "there are 1081 more memories to test.";echo "tr 71 M=IFP_POLICY_TABLE_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IFP_POLICY_TABLE_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1074 echo "there are 1080 more memories to test.";echo "tr 71 M=IFP_POLICY_TABLE_WIDE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IFP_POLICY_TABLE_WIDE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1075 echo "there are 1079 more memories to test.";echo "tr 71 M=IFP_POLICY_TABLE_WIDE_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IFP_POLICY_TABLE_WIDE_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1076 echo "there are 1078 more memories to test.";echo "tr 71 M=IFP_PORT_METER_MAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IFP_PORT_METER_MAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1077 echo "there are 1077 more memories to test.";echo "tr 71 M=IFP_RANGE_CHECK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IFP_RANGE_CHECK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1078 echo "there are 1076 more memories to test.";echo "tr 71 M=IFP_RANGE_CHECK_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IFP_RANGE_CHECK_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1079 echo "there are 1075 more memories to test.";echo "tr 71 M=IFP_RANGE_CHECK_MASK_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IFP_RANGE_CHECK_MASK_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1080 echo "there are 1074 more memories to test.";echo "tr 71 M=IFP_RANGE_CHECK_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IFP_RANGE_CHECK_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1081 echo "there are 1073 more memories to test.";echo "tr 71 M=IFP_REDIRECTION_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IFP_REDIRECTION_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1082 echo "there are 1072 more memories to test.";echo "tr 71 M=IFP_STORM_CONTROL_METERS Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IFP_STORM_CONTROL_METERS Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1083 echo "there are 1071 more memories to test.";echo "tr 71 M=IFP_TCAM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IFP_TCAM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1084 echo "there are 1070 more memories to test.";echo "tr 71 M=IFP_TCAM_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IFP_TCAM_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1085 echo "there are 1069 more memories to test.";echo "tr 71 M=IFP_TCAM_WIDE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IFP_TCAM_WIDE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1086 echo "there are 1068 more memories to test.";echo "tr 71 M=IFP_TCAM_WIDE_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IFP_TCAM_WIDE_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1087 echo "there are 1067 more memories to test.";echo "tr 71 M=IMIRROR_BITMAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IMIRROR_BITMAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1088 echo "there are 1066 more memories to test.";echo "tr 71 M=IM_MTP_INDEX Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IM_MTP_INDEX Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1089 echo "there are 1065 more memories to test.";echo "tr 71 M=ING_1588_INGRESS_CTRL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_1588_INGRESS_CTRL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1090 echo "there are 1064 more memories to test.";echo "tr 71 M=ING_ACTIVE_L3_IIF_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_ACTIVE_L3_IIF_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1091 echo "there are 1063 more memories to test.";echo "tr 71 M=ING_ACTIVE_L3_IIF_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_ACTIVE_L3_IIF_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1092 echo "there are 1062 more memories to test.";echo "tr 71 M=ING_DEST_PORT_ENABLE Start=0 Count=0 SlamLowToHigh=0";tr 71 M=ING_DEST_PORT_ENABLE Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1093 echo "there are 1061 more memories to test.";echo "tr 71 M=ING_DEVICE_PORT Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_DEVICE_PORT Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1094 echo "there are 1060 more memories to test.";echo "tr 71 M=ING_DNAT_ADDRESS_TYPE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_DNAT_ADDRESS_TYPE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1095 echo "there are 1059 more memories to test.";echo "tr 71 M=ING_DNAT_ADDRESS_TYPE_ACTION_TABLE_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_DNAT_ADDRESS_TYPE_ACTION_TABLE_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1096 echo "there are 1058 more memories to test.";echo "tr 71 M=ING_DNAT_ADDRESS_TYPE_ACTION_TABLE_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_DNAT_ADDRESS_TYPE_ACTION_TABLE_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1097 echo "there are 1057 more memories to test.";echo "tr 71 M=ING_DNAT_ADDRESS_TYPE_ECC Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_DNAT_ADDRESS_TYPE_ECC Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1098 echo "there are 1056 more memories to test.";echo "tr 71 M=ING_DNAT_ADDRESS_TYPE_KEY_ATTRIBUTES Start=0 Count=0 SlamLowToHigh=0";tr 71 M=ING_DNAT_ADDRESS_TYPE_KEY_ATTRIBUTES Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1099 echo "there are 1055 more memories to test.";echo "tr 71 M=ING_DNAT_ADDRESS_TYPE_REMAP_TABLE_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_DNAT_ADDRESS_TYPE_REMAP_TABLE_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1100 echo "there are 1054 more memories to test.";echo "tr 71 M=ING_DNAT_ADDRESS_TYPE_REMAP_TABLE_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_DNAT_ADDRESS_TYPE_REMAP_TABLE_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1101 echo "there are 1053 more memories to test.";echo "tr 71 M=ING_DOP_STORAGE_MEM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_DOP_STORAGE_MEM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1102 echo "there are 1052 more memories to test.";echo "tr 71 M=ING_DOP_STORAGE_MEM_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_DOP_STORAGE_MEM_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1103 echo "there are 1051 more memories to test.";echo "tr 71 M=ING_DVP_2_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_DVP_2_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1104 echo "there are 1050 more memories to test.";echo "tr 71 M=ING_DVP_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_DVP_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1105 echo "there are 1049 more memories to test.";echo "tr 71 M=ING_EGRMSKBMAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_EGRMSKBMAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1106 echo "there are 1048 more memories to test.";echo "tr 71 M=ING_EN_EFILTER_BITMAP Start=0 Count=0 SlamLowToHigh=0";tr 71 M=ING_EN_EFILTER_BITMAP Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1107 echo "there are 1047 more memories to test.";echo "tr 71 M=ING_ETAG_PCP_MAPPING Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_ETAG_PCP_MAPPING Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1108 echo "there are 1046 more memories to test.";echo "tr 71 M=ING_EXP_TO_ECN_MAPPING_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_EXP_TO_ECN_MAPPING_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1109 echo "there are 1045 more memories to test.";echo "tr 71 M=ING_EXP_TO_ECN_MAPPING_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_EXP_TO_ECN_MAPPING_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1110 echo "there are 1044 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1111 echo "there are 1043 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1112 echo "there are 1042 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1113 echo "there are 1041 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_10 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_10 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1114 echo "there are 1040 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_10_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_10_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1115 echo "there are 1039 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_11 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_11 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1116 echo "there are 1038 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_11_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_11_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1117 echo "there are 1037 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_12 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_12 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1118 echo "there are 1036 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_12_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_12_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1119 echo "there are 1035 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_13 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_13 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1120 echo "there are 1034 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_13_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_13_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1121 echo "there are 1033 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_14 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_14 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1122 echo "there are 1032 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_14_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_14_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1123 echo "there are 1031 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_15 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_15 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1124 echo "there are 1030 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_15_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_15_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1125 echo "there are 1029 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_16 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_16 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1126 echo "there are 1028 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_16_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_16_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1127 echo "there are 1027 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_17 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_17 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1128 echo "there are 1026 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_17_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_17_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1129 echo "there are 1025 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_18 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_18 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1130 echo "there are 1024 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_18_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_18_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1131 echo "there are 1023 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_19 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_19 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1132 echo "there are 1022 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_19_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_19_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1133 echo "there are 1021 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_1_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_1_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1134 echo "there are 1020 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1135 echo "there are 1019 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_2_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_2_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1136 echo "there are 1018 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1137 echo "there are 1017 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_3_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_3_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1138 echo "there are 1016 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_4 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_4 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1139 echo "there are 1015 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_4_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_4_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1140 echo "there are 1014 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_5 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_5 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1141 echo "there are 1013 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_5_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_5_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1142 echo "there are 1012 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_6 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_6 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1143 echo "there are 1011 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_6_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_6_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1144 echo "there are 1010 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_7 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_7 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1145 echo "there are 1009 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_7_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_7_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1146 echo "there are 1008 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_8 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_8 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1147 echo "there are 1007 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_8_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_8_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1148 echo "there are 1006 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_9 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_9 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1149 echo "there are 1005 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_9_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_9_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1150 echo "there are 1004 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1151 echo "there are 1003 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1152 echo "there are 1002 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_10 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_10 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1153 echo "there are 1001 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_11 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_11 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1154 echo "there are 1000 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_12 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_12 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1155 echo "there are 999 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_13 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_13 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1156 echo "there are 998 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_14 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_14 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1157 echo "there are 997 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_15 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_15 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1158 echo "there are 996 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_16 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_16 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1159 echo "there are 995 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_17 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_17 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1160 echo "there are 994 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_18 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_18 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1161 echo "there are 993 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_19 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_19 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1162 echo "there are 992 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1163 echo "there are 991 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1164 echo "there are 990 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_4 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_4 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1165 echo "there are 989 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_5 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_5 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1166 echo "there are 988 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_6 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_6 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1167 echo "there are 987 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_7 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_7 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1168 echo "there are 986 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_8 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_8 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1169 echo "there are 985 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_9 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_9 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1170 echo "there are 984 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_PKT_PRI_MAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_PKT_PRI_MAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1171 echo "there are 983 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_PKT_RES_MAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_PKT_RES_MAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1172 echo "there are 982 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_PORT_MAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_PORT_MAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1173 echo "there are 981 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_PRI_CNG_MAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_PRI_CNG_MAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1174 echo "there are 980 more memories to test.";echo "tr 71 M=ING_FLEX_CTR_TOS_MAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_FLEX_CTR_TOS_MAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1175 echo "there are 979 more memories to test.";echo "tr 71 M=ING_HIGIG_TRUNK_OVERRIDE_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_HIGIG_TRUNK_OVERRIDE_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1176 echo "there are 978 more memories to test.";echo "tr 71 M=ING_L3_NEXT_HOP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_L3_NEXT_HOP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1177 echo "there are 977 more memories to test.";echo "tr 71 M=ING_LOOPBACK_DROP_VECTOR_MASK Start=0 Count=0 SlamLowToHigh=0";tr 71 M=ING_LOOPBACK_DROP_VECTOR_MASK Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1178 echo "there are 976 more memories to test.";echo "tr 71 M=ING_MOD_MAP_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_MOD_MAP_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1179 echo "there are 975 more memories to test.";echo "tr 71 M=ING_MPLS_INHERIT_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_MPLS_INHERIT_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1180 echo "there are 974 more memories to test.";echo "tr 71 M=ING_NETWORK_PRUNE_CONTROL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_NETWORK_PRUNE_CONTROL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1181 echo "there are 973 more memories to test.";echo "tr 71 M=ING_OUTER_DOT1P_MAPPING_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_OUTER_DOT1P_MAPPING_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1182 echo "there are 972 more memories to test.";echo "tr 71 M=ING_PHY_TO_IDB_PORT_MAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_PHY_TO_IDB_PORT_MAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1183 echo "there are 971 more memories to test.";echo "tr 71 M=ING_PHY_TO_IDB_PORT_MAP_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_PHY_TO_IDB_PORT_MAP_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1184 echo "there are 970 more memories to test.";echo "tr 71 M=ING_PW_TERM_SEQ_NUM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_PW_TERM_SEQ_NUM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1185 echo "there are 969 more memories to test.";echo "tr 71 M=ING_PW_TERM_SEQ_NUM_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_PW_TERM_SEQ_NUM_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1186 echo "there are 968 more memories to test.";echo "tr 71 M=ING_ROUTED_INT_PRI_MAPPING Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_ROUTED_INT_PRI_MAPPING Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1187 #echo "there are 967 more memories to test.";echo "tr 71 M=ING_SER_FIFO Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_SER_FIFO Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1188 #echo "there are 966 more memories to test.";echo "tr 71 M=ING_SER_FIFO_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_SER_FIFO_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1189 echo "there are 965 more memories to test.";echo "tr 71 M=ING_SNAT Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_SNAT Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1190 echo "there are 964 more memories to test.";echo "tr 71 M=ING_SNAT_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_SNAT_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1191 echo "there are 963 more memories to test.";echo "tr 71 M=ING_SNAT_HIT_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_SNAT_HIT_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1192 echo "there are 962 more memories to test.";echo "tr 71 M=ING_SNAT_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_SNAT_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1193 echo "there are 961 more memories to test.";echo "tr 71 M=ING_TUNNEL_ECN_DECAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_TUNNEL_ECN_DECAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1194 echo "there are 960 more memories to test.";echo "tr 71 M=ING_VFT_PRI_MAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_VFT_PRI_MAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1195 echo "there are 959 more memories to test.";echo "tr 71 M=ING_VLAN_RANGE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_VLAN_RANGE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1196 echo "there are 958 more memories to test.";echo "tr 71 M=ING_VLAN_TAG_ACTION_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_VLAN_TAG_ACTION_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1197 echo "there are 957 more memories to test.";echo "tr 71 M=ING_VLAN_TAG_ACTION_PROFILE_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_VLAN_TAG_ACTION_PROFILE_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1198 echo "there are 956 more memories to test.";echo "tr 71 M=ING_VLAN_VFI_MEMBERSHIP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_VLAN_VFI_MEMBERSHIP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1199 echo "there are 955 more memories to test.";echo "tr 71 M=ING_VP_VLAN_MEMBERSHIP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_VP_VLAN_MEMBERSHIP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1200 echo "there are 954 more memories to test.";echo "tr 71 M=ING_VP_VLAN_MEMBERSHIP_ACTION_TABLE_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_VP_VLAN_MEMBERSHIP_ACTION_TABLE_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1201 echo "there are 953 more memories to test.";echo "tr 71 M=ING_VP_VLAN_MEMBERSHIP_ACTION_TABLE_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_VP_VLAN_MEMBERSHIP_ACTION_TABLE_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1202 echo "there are 952 more memories to test.";echo "tr 71 M=ING_VP_VLAN_MEMBERSHIP_ECC Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_VP_VLAN_MEMBERSHIP_ECC Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1203 echo "there are 951 more memories to test.";echo "tr 71 M=ING_VP_VLAN_MEMBERSHIP_KEY_ATTRIBUTES Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_VP_VLAN_MEMBERSHIP_KEY_ATTRIBUTES Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1204 echo "there are 950 more memories to test.";echo "tr 71 M=ING_VP_VLAN_MEMBERSHIP_REMAP_TABLE_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_VP_VLAN_MEMBERSHIP_REMAP_TABLE_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1205 echo "there are 949 more memories to test.";echo "tr 71 M=ING_VP_VLAN_MEMBERSHIP_REMAP_TABLE_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_VP_VLAN_MEMBERSHIP_REMAP_TABLE_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1206 echo "there are 948 more memories to test.";echo "tr 71 M=ING_VSAN Start=0 Count=1 SlamLowToHigh=0";tr 71 M=ING_VSAN Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1207 echo "there are 947 more memories to test.";echo "tr 71 M=INITIAL_ING_L3_NEXT_HOP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=INITIAL_ING_L3_NEXT_HOP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1208 echo "there are 946 more memories to test.";echo "tr 71 M=INITIAL_L3_ECMP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=INITIAL_L3_ECMP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1209 echo "there are 945 more memories to test.";echo "tr 71 M=INITIAL_L3_ECMP_GROUP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=INITIAL_L3_ECMP_GROUP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1210 echo "there are 944 more memories to test.";echo "tr 71 M=INITIAL_PROT_NHI_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=INITIAL_PROT_NHI_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1211 echo "there are 943 more memories to test.";echo "tr 71 M=INITIAL_PROT_NHI_TABLE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=INITIAL_PROT_NHI_TABLE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1212 echo "there are 942 more memories to test.";echo "tr 71 M=INSTRUMENTATION_TRIGGERS_ENABLE Start=0 Count=0 SlamLowToHigh=0";tr 71 M=INSTRUMENTATION_TRIGGERS_ENABLE Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1213 echo "there are 941 more memories to test.";echo "tr 71 M=INT_CN_TO_MMUIF_MAPPING Start=0 Count=1 SlamLowToHigh=0";tr 71 M=INT_CN_TO_MMUIF_MAPPING Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1214 echo "there are 940 more memories to test.";echo "tr 71 M=INT_PRI_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=INT_PRI_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1215 echo "there are 939 more memories to test.";echo "tr 71 M=IP_MULTICAST_TCAM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_MULTICAST_TCAM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1216 echo "there are 938 more memories to test.";echo "tr 71 M=IP_OPTION_CONTROL_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_OPTION_CONTROL_PROFILE_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1217 echo "there are 937 more memories to test.";echo "tr 71 M=IP_PARSER0_HFE_CONT_PROFILE_TABLE_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER0_HFE_CONT_PROFILE_TABLE_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1218 echo "there are 936 more memories to test.";echo "tr 71 M=IP_PARSER0_HFE_CONT_PROFILE_TABLE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER0_HFE_CONT_PROFILE_TABLE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1219 echo "there are 935 more memories to test.";echo "tr 71 M=IP_PARSER0_HFE_CONT_PROFILE_TABLE_10 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER0_HFE_CONT_PROFILE_TABLE_10 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1220 echo "there are 934 more memories to test.";echo "tr 71 M=IP_PARSER0_HFE_CONT_PROFILE_TABLE_11 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER0_HFE_CONT_PROFILE_TABLE_11 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1221 echo "there are 933 more memories to test.";echo "tr 71 M=IP_PARSER0_HFE_CONT_PROFILE_TABLE_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER0_HFE_CONT_PROFILE_TABLE_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1222 echo "there are 932 more memories to test.";echo "tr 71 M=IP_PARSER0_HFE_CONT_PROFILE_TABLE_3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER0_HFE_CONT_PROFILE_TABLE_3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1223 echo "there are 931 more memories to test.";echo "tr 71 M=IP_PARSER0_HFE_CONT_PROFILE_TABLE_4 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER0_HFE_CONT_PROFILE_TABLE_4 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1224 echo "there are 930 more memories to test.";echo "tr 71 M=IP_PARSER0_HFE_CONT_PROFILE_TABLE_5 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER0_HFE_CONT_PROFILE_TABLE_5 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1225 echo "there are 929 more memories to test.";echo "tr 71 M=IP_PARSER0_HFE_CONT_PROFILE_TABLE_6 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER0_HFE_CONT_PROFILE_TABLE_6 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1226 echo "there are 928 more memories to test.";echo "tr 71 M=IP_PARSER0_HFE_CONT_PROFILE_TABLE_7 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER0_HFE_CONT_PROFILE_TABLE_7 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1227 echo "there are 927 more memories to test.";echo "tr 71 M=IP_PARSER0_HFE_CONT_PROFILE_TABLE_8 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER0_HFE_CONT_PROFILE_TABLE_8 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1228 echo "there are 926 more memories to test.";echo "tr 71 M=IP_PARSER0_HFE_CONT_PROFILE_TABLE_9 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER0_HFE_CONT_PROFILE_TABLE_9 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1229 echo "there are 925 more memories to test.";echo "tr 71 M=IP_PARSER0_HFE_POLICY_TABLE_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER0_HFE_POLICY_TABLE_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1230 echo "there are 924 more memories to test.";echo "tr 71 M=IP_PARSER0_HME_STAGE_KEY_VALID_BYTES_CHECK_TABLE_0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IP_PARSER0_HME_STAGE_KEY_VALID_BYTES_CHECK_TABLE_0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1231 echo "there are 923 more memories to test.";echo "tr 71 M=IP_PARSER0_HME_STAGE_TCAM_DATA_ONLY_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER0_HME_STAGE_TCAM_DATA_ONLY_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1232 #echo "there are 922 more memories to test.";echo "tr 71 M=IP_PARSER0_HME_STAGE_TCAM_NARROW_ONLY_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER0_HME_STAGE_TCAM_NARROW_ONLY_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1233 echo "there are 921 more memories to test.";echo "tr 71 M=IP_PARSER0_HME_STAGE_TCAM_ONLY_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER0_HME_STAGE_TCAM_ONLY_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1234 echo "there are 920 more memories to test.";echo "tr 71 M=IP_PARSER0_HVE_RC_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER0_HVE_RC_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1235 echo "there are 919 more memories to test.";echo "tr 71 M=IP_PARSER0_HVE_RC_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER0_HVE_RC_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1236 echo "there are 918 more memories to test.";echo "tr 71 M=IP_PARSER0_HVE_SCC_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER0_HVE_SCC_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1237 echo "there are 917 more memories to test.";echo "tr 71 M=IP_PARSER0_HVE_SCC_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER0_HVE_SCC_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1238 echo "there are 916 more memories to test.";echo "tr 71 M=IP_PARSER0_HVE_SCC_PROFILE_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER0_HVE_SCC_PROFILE_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1239 echo "there are 915 more memories to test.";echo "tr 71 M=IP_PARSER0_HVE_SCC_PROFILE_3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER0_HVE_SCC_PROFILE_3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1240 echo "there are 914 more memories to test.";echo "tr 71 M=IP_PARSER0_HVE_SCC_PROFILE_4 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER0_HVE_SCC_PROFILE_4 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1241 echo "there are 913 more memories to test.";echo "tr 71 M=IP_PARSER0_HVE_SCC_PROFILE_5 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER0_HVE_SCC_PROFILE_5 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1242 echo "there are 912 more memories to test.";echo "tr 71 M=IP_PARSER0_HVE_SCC_PROFILE_6 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER0_HVE_SCC_PROFILE_6 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1243 echo "there are 911 more memories to test.";echo "tr 71 M=IP_PARSER0_HVE_SCC_PROFILE_7 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER0_HVE_SCC_PROFILE_7 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1244 echo "there are 910 more memories to test.";echo "tr 71 M=IP_PARSER0_HVE_SCF_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER0_HVE_SCF_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1245 echo "there are 909 more memories to test.";echo "tr 71 M=IP_PARSER1_HFE_CONT_PROFILE_TABLE_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HFE_CONT_PROFILE_TABLE_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1246 echo "there are 908 more memories to test.";echo "tr 71 M=IP_PARSER1_HFE_CONT_PROFILE_TABLE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HFE_CONT_PROFILE_TABLE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1247 echo "there are 907 more memories to test.";echo "tr 71 M=IP_PARSER1_HFE_CONT_PROFILE_TABLE_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HFE_CONT_PROFILE_TABLE_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1248 echo "there are 906 more memories to test.";echo "tr 71 M=IP_PARSER1_HFE_CONT_PROFILE_TABLE_3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HFE_CONT_PROFILE_TABLE_3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1249 echo "there are 905 more memories to test.";echo "tr 71 M=IP_PARSER1_HFE_CONT_PROFILE_TABLE_4 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HFE_CONT_PROFILE_TABLE_4 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1250 echo "there are 904 more memories to test.";echo "tr 71 M=IP_PARSER1_HFE_CONT_PROFILE_TABLE_5 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HFE_CONT_PROFILE_TABLE_5 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1251 echo "there are 903 more memories to test.";echo "tr 71 M=IP_PARSER1_HFE_CONT_PROFILE_TABLE_6 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HFE_CONT_PROFILE_TABLE_6 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1252 echo "there are 902 more memories to test.";echo "tr 71 M=IP_PARSER1_HFE_CONT_PROFILE_TABLE_7 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HFE_CONT_PROFILE_TABLE_7 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1253 echo "there are 901 more memories to test.";echo "tr 71 M=IP_PARSER1_HFE_CONT_PROFILE_TABLE_8 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HFE_CONT_PROFILE_TABLE_8 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1254 echo "there are 900 more memories to test.";echo "tr 71 M=IP_PARSER1_HFE_CONT_PROFILE_TABLE_9 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HFE_CONT_PROFILE_TABLE_9 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1255 echo "there are 899 more memories to test.";echo "tr 71 M=IP_PARSER1_HFE_POLICY_TABLE_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HFE_POLICY_TABLE_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1256 echo "there are 898 more memories to test.";echo "tr 71 M=IP_PARSER1_HFE_POLICY_TABLE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HFE_POLICY_TABLE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1257 echo "there are 897 more memories to test.";echo "tr 71 M=IP_PARSER1_HFE_POLICY_TABLE_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HFE_POLICY_TABLE_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1258 echo "there are 896 more memories to test.";echo "tr 71 M=IP_PARSER1_HFE_POLICY_TABLE_3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HFE_POLICY_TABLE_3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1259 echo "there are 895 more memories to test.";echo "tr 71 M=IP_PARSER1_HFE_POLICY_TABLE_4 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HFE_POLICY_TABLE_4 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1260 echo "there are 894 more memories to test.";echo "tr 71 M=IP_PARSER1_HME_STAGE_KEY_VALID_BYTES_CHECK_TABLE_0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HME_STAGE_KEY_VALID_BYTES_CHECK_TABLE_0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1261 echo "there are 893 more memories to test.";echo "tr 71 M=IP_PARSER1_HME_STAGE_KEY_VALID_BYTES_CHECK_TABLE_1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HME_STAGE_KEY_VALID_BYTES_CHECK_TABLE_1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1262 echo "there are 892 more memories to test.";echo "tr 71 M=IP_PARSER1_HME_STAGE_KEY_VALID_BYTES_CHECK_TABLE_2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HME_STAGE_KEY_VALID_BYTES_CHECK_TABLE_2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1263 echo "there are 891 more memories to test.";echo "tr 71 M=IP_PARSER1_HME_STAGE_KEY_VALID_BYTES_CHECK_TABLE_3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HME_STAGE_KEY_VALID_BYTES_CHECK_TABLE_3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1264 echo "there are 890 more memories to test.";echo "tr 71 M=IP_PARSER1_HME_STAGE_KEY_VALID_BYTES_CHECK_TABLE_4 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HME_STAGE_KEY_VALID_BYTES_CHECK_TABLE_4 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1265 echo "there are 889 more memories to test.";echo "tr 71 M=IP_PARSER1_HME_STAGE_TCAM_DATA_ONLY_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HME_STAGE_TCAM_DATA_ONLY_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1266 echo "there are 888 more memories to test.";echo "tr 71 M=IP_PARSER1_HME_STAGE_TCAM_DATA_ONLY_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HME_STAGE_TCAM_DATA_ONLY_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1267 echo "there are 887 more memories to test.";echo "tr 71 M=IP_PARSER1_HME_STAGE_TCAM_DATA_ONLY_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HME_STAGE_TCAM_DATA_ONLY_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1268 echo "there are 886 more memories to test.";echo "tr 71 M=IP_PARSER1_HME_STAGE_TCAM_DATA_ONLY_3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HME_STAGE_TCAM_DATA_ONLY_3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1269 echo "there are 885 more memories to test.";echo "tr 71 M=IP_PARSER1_HME_STAGE_TCAM_DATA_ONLY_4 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HME_STAGE_TCAM_DATA_ONLY_4 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1270 #echo "there are 884 more memories to test.";echo "tr 71 M=IP_PARSER1_HME_STAGE_TCAM_NARROW_ONLY_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HME_STAGE_TCAM_NARROW_ONLY_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1271 #echo "there are 883 more memories to test.";echo "tr 71 M=IP_PARSER1_HME_STAGE_TCAM_NARROW_ONLY_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HME_STAGE_TCAM_NARROW_ONLY_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1272 #echo "there are 882 more memories to test.";echo "tr 71 M=IP_PARSER1_HME_STAGE_TCAM_NARROW_ONLY_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HME_STAGE_TCAM_NARROW_ONLY_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1273 #echo "there are 881 more memories to test.";echo "tr 71 M=IP_PARSER1_HME_STAGE_TCAM_NARROW_ONLY_3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HME_STAGE_TCAM_NARROW_ONLY_3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1274 #echo "there are 880 more memories to test.";echo "tr 71 M=IP_PARSER1_HME_STAGE_TCAM_NARROW_ONLY_4 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HME_STAGE_TCAM_NARROW_ONLY_4 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1275 echo "there are 879 more memories to test.";echo "tr 71 M=IP_PARSER1_HME_STAGE_TCAM_ONLY_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HME_STAGE_TCAM_ONLY_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1276 echo "there are 878 more memories to test.";echo "tr 71 M=IP_PARSER1_HME_STAGE_TCAM_ONLY_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HME_STAGE_TCAM_ONLY_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1277 echo "there are 877 more memories to test.";echo "tr 71 M=IP_PARSER1_HME_STAGE_TCAM_ONLY_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HME_STAGE_TCAM_ONLY_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1278 echo "there are 876 more memories to test.";echo "tr 71 M=IP_PARSER1_HME_STAGE_TCAM_ONLY_3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HME_STAGE_TCAM_ONLY_3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1279 echo "there are 875 more memories to test.";echo "tr 71 M=IP_PARSER1_HME_STAGE_TCAM_ONLY_4 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HME_STAGE_TCAM_ONLY_4 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1280 echo "there are 874 more memories to test.";echo "tr 71 M=IP_PARSER1_HVE_RC_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HVE_RC_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1281 echo "there are 873 more memories to test.";echo "tr 71 M=IP_PARSER1_HVE_RC_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HVE_RC_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1282 echo "there are 872 more memories to test.";echo "tr 71 M=IP_PARSER1_HVE_SCC_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HVE_SCC_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1283 echo "there are 871 more memories to test.";echo "tr 71 M=IP_PARSER1_HVE_SCC_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HVE_SCC_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1284 echo "there are 870 more memories to test.";echo "tr 71 M=IP_PARSER1_HVE_SCC_PROFILE_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HVE_SCC_PROFILE_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1285 echo "there are 869 more memories to test.";echo "tr 71 M=IP_PARSER1_HVE_SCC_PROFILE_3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HVE_SCC_PROFILE_3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1286 echo "there are 868 more memories to test.";echo "tr 71 M=IP_PARSER1_HVE_SCC_PROFILE_4 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HVE_SCC_PROFILE_4 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1287 echo "there are 867 more memories to test.";echo "tr 71 M=IP_PARSER1_HVE_SCC_PROFILE_5 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HVE_SCC_PROFILE_5 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1288 echo "there are 866 more memories to test.";echo "tr 71 M=IP_PARSER1_HVE_SCC_PROFILE_6 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HVE_SCC_PROFILE_6 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1289 echo "there are 865 more memories to test.";echo "tr 71 M=IP_PARSER1_HVE_SCC_PROFILE_7 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HVE_SCC_PROFILE_7 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1290 echo "there are 864 more memories to test.";echo "tr 71 M=IP_PARSER1_HVE_SCF_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_HVE_SCF_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1291 echo "there are 863 more memories to test.";echo "tr 71 M=IP_PARSER1_MICE_DEBUG_STATUS_0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IP_PARSER1_MICE_DEBUG_STATUS_0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1292 echo "there are 862 more memories to test.";echo "tr 71 M=IP_PARSER1_MICE_DEBUG_STATUS_0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IP_PARSER1_MICE_DEBUG_STATUS_0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1293 echo "there are 861 more memories to test.";echo "tr 71 M=IP_PARSER1_MICE_DEBUG_STATUS_1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IP_PARSER1_MICE_DEBUG_STATUS_1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1294 echo "there are 860 more memories to test.";echo "tr 71 M=IP_PARSER1_MICE_DEBUG_STATUS_1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IP_PARSER1_MICE_DEBUG_STATUS_1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1295 echo "there are 859 more memories to test.";echo "tr 71 M=IP_PARSER1_MICE_TCAM_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_MICE_TCAM_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1296 echo "there are 858 more memories to test.";echo "tr 71 M=IP_PARSER1_MICE_TCAM_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_MICE_TCAM_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1297 echo "there are 857 more memories to test.";echo "tr 71 M=IP_PARSER1_MICE_TCAM_DATA_ONLY_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_MICE_TCAM_DATA_ONLY_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1298 echo "there are 856 more memories to test.";echo "tr 71 M=IP_PARSER1_MICE_TCAM_DATA_ONLY_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_MICE_TCAM_DATA_ONLY_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1299 echo "there are 855 more memories to test.";echo "tr 71 M=IP_PARSER1_MICE_TCAM_ONLY_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_MICE_TCAM_ONLY_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1300 echo "there are 854 more memories to test.";echo "tr 71 M=IP_PARSER1_MICE_TCAM_ONLY_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER1_MICE_TCAM_ONLY_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1301 echo "there are 853 more memories to test.";echo "tr 71 M=IP_PARSER2_HFE_CONT_PROFILE_TABLE_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HFE_CONT_PROFILE_TABLE_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1302 echo "there are 852 more memories to test.";echo "tr 71 M=IP_PARSER2_HFE_CONT_PROFILE_TABLE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HFE_CONT_PROFILE_TABLE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1303 echo "there are 851 more memories to test.";echo "tr 71 M=IP_PARSER2_HFE_CONT_PROFILE_TABLE_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HFE_CONT_PROFILE_TABLE_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1304 echo "there are 850 more memories to test.";echo "tr 71 M=IP_PARSER2_HFE_CONT_PROFILE_TABLE_3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HFE_CONT_PROFILE_TABLE_3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1305 echo "there are 849 more memories to test.";echo "tr 71 M=IP_PARSER2_HFE_CONT_PROFILE_TABLE_4 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HFE_CONT_PROFILE_TABLE_4 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1306 echo "there are 848 more memories to test.";echo "tr 71 M=IP_PARSER2_HFE_CONT_PROFILE_TABLE_5 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HFE_CONT_PROFILE_TABLE_5 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1307 echo "there are 847 more memories to test.";echo "tr 71 M=IP_PARSER2_HFE_CONT_PROFILE_TABLE_6 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HFE_CONT_PROFILE_TABLE_6 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1308 echo "there are 846 more memories to test.";echo "tr 71 M=IP_PARSER2_HFE_CONT_PROFILE_TABLE_7 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HFE_CONT_PROFILE_TABLE_7 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1309 echo "there are 845 more memories to test.";echo "tr 71 M=IP_PARSER2_HFE_CONT_PROFILE_TABLE_8 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HFE_CONT_PROFILE_TABLE_8 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1310 echo "there are 844 more memories to test.";echo "tr 71 M=IP_PARSER2_HFE_CONT_PROFILE_TABLE_9 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HFE_CONT_PROFILE_TABLE_9 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1311 echo "there are 843 more memories to test.";echo "tr 71 M=IP_PARSER2_HFE_POLICY_TABLE_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HFE_POLICY_TABLE_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1312 echo "there are 842 more memories to test.";echo "tr 71 M=IP_PARSER2_HFE_POLICY_TABLE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HFE_POLICY_TABLE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1313 echo "there are 841 more memories to test.";echo "tr 71 M=IP_PARSER2_HFE_POLICY_TABLE_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HFE_POLICY_TABLE_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1314 echo "there are 840 more memories to test.";echo "tr 71 M=IP_PARSER2_HFE_POLICY_TABLE_3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HFE_POLICY_TABLE_3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1315 echo "there are 839 more memories to test.";echo "tr 71 M=IP_PARSER2_HFE_POLICY_TABLE_4 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HFE_POLICY_TABLE_4 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1316 echo "there are 838 more memories to test.";echo "tr 71 M=IP_PARSER2_HME_STAGE_KEY_VALID_BYTES_CHECK_TABLE_0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HME_STAGE_KEY_VALID_BYTES_CHECK_TABLE_0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1317 echo "there are 837 more memories to test.";echo "tr 71 M=IP_PARSER2_HME_STAGE_KEY_VALID_BYTES_CHECK_TABLE_1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HME_STAGE_KEY_VALID_BYTES_CHECK_TABLE_1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1318 echo "there are 836 more memories to test.";echo "tr 71 M=IP_PARSER2_HME_STAGE_KEY_VALID_BYTES_CHECK_TABLE_2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HME_STAGE_KEY_VALID_BYTES_CHECK_TABLE_2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1319 echo "there are 835 more memories to test.";echo "tr 71 M=IP_PARSER2_HME_STAGE_KEY_VALID_BYTES_CHECK_TABLE_3 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HME_STAGE_KEY_VALID_BYTES_CHECK_TABLE_3 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1320 echo "there are 834 more memories to test.";echo "tr 71 M=IP_PARSER2_HME_STAGE_KEY_VALID_BYTES_CHECK_TABLE_4 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HME_STAGE_KEY_VALID_BYTES_CHECK_TABLE_4 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1321 echo "there are 833 more memories to test.";echo "tr 71 M=IP_PARSER2_HME_STAGE_TCAM_DATA_ONLY_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HME_STAGE_TCAM_DATA_ONLY_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1322 echo "there are 832 more memories to test.";echo "tr 71 M=IP_PARSER2_HME_STAGE_TCAM_DATA_ONLY_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HME_STAGE_TCAM_DATA_ONLY_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1323 echo "there are 831 more memories to test.";echo "tr 71 M=IP_PARSER2_HME_STAGE_TCAM_DATA_ONLY_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HME_STAGE_TCAM_DATA_ONLY_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1324 echo "there are 830 more memories to test.";echo "tr 71 M=IP_PARSER2_HME_STAGE_TCAM_DATA_ONLY_3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HME_STAGE_TCAM_DATA_ONLY_3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1325 echo "there are 829 more memories to test.";echo "tr 71 M=IP_PARSER2_HME_STAGE_TCAM_DATA_ONLY_4 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HME_STAGE_TCAM_DATA_ONLY_4 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1326 #echo "there are 828 more memories to test.";echo "tr 71 M=IP_PARSER2_HME_STAGE_TCAM_NARROW_ONLY_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HME_STAGE_TCAM_NARROW_ONLY_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1327 #echo "there are 827 more memories to test.";echo "tr 71 M=IP_PARSER2_HME_STAGE_TCAM_NARROW_ONLY_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HME_STAGE_TCAM_NARROW_ONLY_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1328 #echo "there are 826 more memories to test.";echo "tr 71 M=IP_PARSER2_HME_STAGE_TCAM_NARROW_ONLY_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HME_STAGE_TCAM_NARROW_ONLY_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1329 #echo "there are 825 more memories to test.";echo "tr 71 M=IP_PARSER2_HME_STAGE_TCAM_NARROW_ONLY_3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HME_STAGE_TCAM_NARROW_ONLY_3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1330 #echo "there are 824 more memories to test.";echo "tr 71 M=IP_PARSER2_HME_STAGE_TCAM_NARROW_ONLY_4 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HME_STAGE_TCAM_NARROW_ONLY_4 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1331 echo "there are 823 more memories to test.";echo "tr 71 M=IP_PARSER2_HME_STAGE_TCAM_ONLY_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HME_STAGE_TCAM_ONLY_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1332 echo "there are 822 more memories to test.";echo "tr 71 M=IP_PARSER2_HME_STAGE_TCAM_ONLY_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HME_STAGE_TCAM_ONLY_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1333 echo "there are 821 more memories to test.";echo "tr 71 M=IP_PARSER2_HME_STAGE_TCAM_ONLY_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HME_STAGE_TCAM_ONLY_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1334 echo "there are 820 more memories to test.";echo "tr 71 M=IP_PARSER2_HME_STAGE_TCAM_ONLY_3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HME_STAGE_TCAM_ONLY_3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1335 echo "there are 819 more memories to test.";echo "tr 71 M=IP_PARSER2_HME_STAGE_TCAM_ONLY_4 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HME_STAGE_TCAM_ONLY_4 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1336 echo "there are 818 more memories to test.";echo "tr 71 M=IP_PARSER2_HVE_RC_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HVE_RC_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1337 echo "there are 817 more memories to test.";echo "tr 71 M=IP_PARSER2_HVE_RC_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HVE_RC_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1338 echo "there are 816 more memories to test.";echo "tr 71 M=IP_PARSER2_HVE_SCC_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HVE_SCC_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1339 echo "there are 815 more memories to test.";echo "tr 71 M=IP_PARSER2_HVE_SCC_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HVE_SCC_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1340 echo "there are 814 more memories to test.";echo "tr 71 M=IP_PARSER2_HVE_SCC_PROFILE_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HVE_SCC_PROFILE_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1341 echo "there are 813 more memories to test.";echo "tr 71 M=IP_PARSER2_HVE_SCC_PROFILE_3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HVE_SCC_PROFILE_3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1342 echo "there are 812 more memories to test.";echo "tr 71 M=IP_PARSER2_HVE_SCC_PROFILE_4 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HVE_SCC_PROFILE_4 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1343 echo "there are 811 more memories to test.";echo "tr 71 M=IP_PARSER2_HVE_SCC_PROFILE_5 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HVE_SCC_PROFILE_5 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1344 echo "there are 810 more memories to test.";echo "tr 71 M=IP_PARSER2_HVE_SCC_PROFILE_6 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HVE_SCC_PROFILE_6 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1345 echo "there are 809 more memories to test.";echo "tr 71 M=IP_PARSER2_HVE_SCC_PROFILE_7 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HVE_SCC_PROFILE_7 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1346 echo "there are 808 more memories to test.";echo "tr 71 M=IP_PARSER2_HVE_SCF_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_HVE_SCF_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1347 echo "there are 807 more memories to test.";echo "tr 71 M=IP_PARSER2_MICE_DEBUG_STATUS_0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IP_PARSER2_MICE_DEBUG_STATUS_0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1348 echo "there are 806 more memories to test.";echo "tr 71 M=IP_PARSER2_MICE_DEBUG_STATUS_0_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IP_PARSER2_MICE_DEBUG_STATUS_0_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1349 echo "there are 805 more memories to test.";echo "tr 71 M=IP_PARSER2_MICE_DEBUG_STATUS_1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IP_PARSER2_MICE_DEBUG_STATUS_1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1350 echo "there are 804 more memories to test.";echo "tr 71 M=IP_PARSER2_MICE_DEBUG_STATUS_1_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=IP_PARSER2_MICE_DEBUG_STATUS_1_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1351 echo "there are 803 more memories to test.";echo "tr 71 M=IP_PARSER2_MICE_TCAM_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_MICE_TCAM_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1352 echo "there are 802 more memories to test.";echo "tr 71 M=IP_PARSER2_MICE_TCAM_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_MICE_TCAM_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1353 echo "there are 801 more memories to test.";echo "tr 71 M=IP_PARSER2_MICE_TCAM_DATA_ONLY_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_MICE_TCAM_DATA_ONLY_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1354 echo "there are 800 more memories to test.";echo "tr 71 M=IP_PARSER2_MICE_TCAM_DATA_ONLY_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_MICE_TCAM_DATA_ONLY_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1355 echo "there are 799 more memories to test.";echo "tr 71 M=IP_PARSER2_MICE_TCAM_ONLY_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_MICE_TCAM_ONLY_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1356 echo "there are 798 more memories to test.";echo "tr 71 M=IP_PARSER2_MICE_TCAM_ONLY_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PARSER2_MICE_TCAM_ONLY_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1357 echo "there are 797 more memories to test.";echo "tr 71 M=IP_PROTO_MAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PROTO_MAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1358 echo "there are 796 more memories to test.";echo "tr 71 M=IP_PROTO_MAP_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IP_PROTO_MAP_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1359 #echo "there are 795 more memories to test.";echo "tr 71 M=IS_TDM_CALENDAR0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IS_TDM_CALENDAR0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1360 #echo "there are 794 more memories to test.";echo "tr 71 M=IS_TDM_CALENDAR0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IS_TDM_CALENDAR0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1361 #echo "there are 793 more memories to test.";echo "tr 71 M=IS_TDM_CALENDAR1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IS_TDM_CALENDAR1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1362 #echo "there are 792 more memories to test.";echo "tr 71 M=IS_TDM_CALENDAR1_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=IS_TDM_CALENDAR1_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1363 echo "there are 791 more memories to test.";echo "tr 71 M=KEYGEN_HDR_VALID_CHECK_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=KEYGEN_HDR_VALID_CHECK_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1364 echo "there are 790 more memories to test.";echo "tr 71 M=KEYGEN_HDR_VALID_CHECK_PROFILE_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=KEYGEN_HDR_VALID_CHECK_PROFILE_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1365 echo "there are 789 more memories to test.";echo "tr 71 M=KNOWN_MCAST_BLOCK_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=KNOWN_MCAST_BLOCK_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1366 echo "there are 788 more memories to test.";echo "tr 71 M=L2MC Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L2MC Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1367 echo "there are 787 more memories to test.";echo "tr 71 M=L2_BULK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L2_BULK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1368 echo "there are 786 more memories to test.";echo "tr 71 M=L2_DESTINATION_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L2_DESTINATION_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1369 echo "there are 785 more memories to test.";echo "tr 71 M=L2X Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L2X Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1370 echo "there are 784 more memories to test.";echo "tr 71 M=L2_ENTRY_ACTION_TABLE_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L2_ENTRY_ACTION_TABLE_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1371 echo "there are 783 more memories to test.";echo "tr 71 M=L2_ENTRY_ACTION_TABLE_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L2_ENTRY_ACTION_TABLE_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1372 echo "there are 782 more memories to test.";echo "tr 71 M=L2_ENTRY_ECC Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L2_ENTRY_ECC Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1373 echo "there are 781 more memories to test.";echo "tr 71 M=L2_ENTRY_KEY_ATTRIBUTES Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L2_ENTRY_KEY_ATTRIBUTES Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1374 echo "there are 780 more memories to test.";echo "tr 71 M=L2_ENTRY_LP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L2_ENTRY_LP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1375 #echo "there are 779 more memories to test.";echo "tr 71 M=L2_ENTRY_ONLY_SINGLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L2_ENTRY_ONLY_SINGLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1376 echo "there are 778 more memories to test.";echo "tr 71 M=L2_ENTRY_REMAP_TABLE_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L2_ENTRY_REMAP_TABLE_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1377 echo "there are 777 more memories to test.";echo "tr 71 M=L2_ENTRY_REMAP_TABLE_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L2_ENTRY_REMAP_TABLE_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1378 #echo "there are 776 more memories to test.";echo "tr 71 M=L2_ENTRY_SINGLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L2_ENTRY_SINGLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1379 echo "there are 775 more memories to test.";echo "tr 71 M=L2_HITDA_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L2_HITDA_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1380 echo "there are 774 more memories to test.";echo "tr 71 M=L2_HITSA_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L2_HITSA_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1381 echo "there are 773 more memories to test.";echo "tr 71 M=L2_LEARN_INSERT_FAILURE Start=0 Count=0 SlamLowToHigh=0";tr 71 M=L2_LEARN_INSERT_FAILURE Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1382 #echo "there are 772 more memories to test.";echo "tr 71 M=L2_MGMT_SER_FIFO Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L2_MGMT_SER_FIFO Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1383 echo "there are 771 more memories to test.";echo "tr 71 M=L2_MOD_FIFO Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L2_MOD_FIFO Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1384 echo "there are 770 more memories to test.";echo "tr 71 M=L2_USER_ENTRY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L2_USER_ENTRY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1385 echo "there are 769 more memories to test.";echo "tr 71 M=L2_USER_ENTRY_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L2_USER_ENTRY_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1386 echo "there are 768 more memories to test.";echo "tr 71 M=L2_USER_ENTRY_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L2_USER_ENTRY_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1387 echo "there are 767 more memories to test.";echo "tr 71 M=L3_DEFIP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_DEFIP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1388 if $?l3_alpm_enable 'echo "there are 766 more memories to test.";echo "tr 71 M=L3_DEFIP_ALPM_ECC Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_DEFIP_ALPM_ECC Start=0 Count=1 SlamLowToHigh=0;echo "done";' 1389 if $?l3_alpm_enable 'echo "there are 765 more memories to test.";echo "tr 71 M=L3_DEFIP_ALPM_HIT_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_DEFIP_ALPM_HIT_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done";' 1390 if $?l3_alpm_enable 'echo "there are 764 more memories to test.";echo "tr 71 M=L3_DEFIP_ALPM_IPV4 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_DEFIP_ALPM_IPV4 Start=0 Count=1 SlamLowToHigh=0;echo "done";' 1391 if $?l3_alpm_enable 'echo "there are 763 more memories to test.";echo "tr 71 M=L3_DEFIP_ALPM_IPV4_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_DEFIP_ALPM_IPV4_1 Start=0 Count=1 SlamLowToHigh=0;echo "done";' 1392 if $?l3_alpm_enable 'echo "there are 762 more memories to test.";echo "tr 71 M=L3_DEFIP_ALPM_IPV6_128 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_DEFIP_ALPM_IPV6_128 Start=0 Count=1 SlamLowToHigh=0;echo "done";' 1393 if $?l3_alpm_enable 'echo "there are 761 more memories to test.";echo "tr 71 M=L3_DEFIP_ALPM_IPV6_64 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_DEFIP_ALPM_IPV6_64 Start=0 Count=1 SlamLowToHigh=0;echo "done";' 1394 if $?l3_alpm_enable 'echo "there are 760 more memories to test.";echo "tr 71 M=L3_DEFIP_ALPM_IPV6_64_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_DEFIP_ALPM_IPV6_64_1 Start=0 Count=1 SlamLowToHigh=0;echo "done";' 1395 if $?l3_alpm_enable 'echo "there are 759 more memories to test.";echo "tr 71 M=L3_DEFIP_ALPM_RAW Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_DEFIP_ALPM_RAW Start=0 Count=1 SlamLowToHigh=0;echo "done";' 1396 echo "there are 758 more memories to test.";echo "tr 71 M=L3_DEFIP_AUX_HITBIT_UPDATE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_DEFIP_AUX_HITBIT_UPDATE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1397 echo "there are 757 more memories to test.";echo "tr 71 M=L3_DEFIP_AUX_SCRATCH Start=0 Count=0 SlamLowToHigh=0";tr 71 M=L3_DEFIP_AUX_SCRATCH Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1398 echo "there are 756 more memories to test.";echo "tr 71 M=L3_DEFIP_AUX_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_DEFIP_AUX_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1399 echo "there are 755 more memories to test.";echo "tr 71 M=L3_DEFIP_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_DEFIP_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1400 echo "there are 754 more memories to test.";echo "tr 71 M=L3_DEFIP_HIT_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_DEFIP_HIT_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1401 echo "there are 753 more memories to test.";echo "tr 71 M=L3_DEFIP_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_DEFIP_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1402 if $?l3_alpm_enable 'echo "there are 752 more memories to test.";echo "tr 71 M=L3_DEFIP_PAIR_128 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_DEFIP_PAIR_128 Start=0 Count=1 SlamLowToHigh=0;echo "done";' 1403 if $?l3_alpm_enable 'echo "there are 751 more memories to test.";echo "tr 71 M=L3_DEFIP_PAIR_128_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_DEFIP_PAIR_128_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done";' 1404 if $?l3_alpm_enable 'echo "there are 750 more memories to test.";echo "tr 71 M=L3_DEFIP_PAIR_128_HIT_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_DEFIP_PAIR_128_HIT_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done";' 1405 if $?l3_alpm_enable 'echo "there are 749 more memories to test.";echo "tr 71 M=L3_DEFIP_PAIR_128_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_DEFIP_PAIR_128_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done";' 1406 echo "there are 748 more memories to test.";echo "tr 71 M=L3_ECMP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_ECMP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1407 echo "there are 747 more memories to test.";echo "tr 71 M=L3_ECMP_COUNT Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_ECMP_COUNT Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1408 echo "there are 746 more memories to test.";echo "tr 71 M=L3_ECMP_RRLB_CNT Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_ECMP_RRLB_CNT Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1409 echo "there are 745 more memories to test.";echo "tr 71 M=L3_ECMP_RRLB_CNT_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_ECMP_RRLB_CNT_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1410 echo "there are 744 more memories to test.";echo "tr 71 M=L3_ENTRY_ACTION_TABLE_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_ENTRY_ACTION_TABLE_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1411 echo "there are 743 more memories to test.";echo "tr 71 M=L3_ENTRY_ACTION_TABLE_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_ENTRY_ACTION_TABLE_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1412 echo "there are 742 more memories to test.";echo "tr 71 M=L3_ENTRY_DOUBLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_ENTRY_DOUBLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1413 echo "there are 741 more memories to test.";echo "tr 71 M=L3_ENTRY_ECC Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_ENTRY_ECC Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1414 echo "there are 740 more memories to test.";echo "tr 71 M=L3_ENTRY_HIT_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_ENTRY_HIT_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1415 echo "there are 739 more memories to test.";echo "tr 71 M=L3_ENTRY_KEY_ATTRIBUTES Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_ENTRY_KEY_ATTRIBUTES Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1416 echo "there are 738 more memories to test.";echo "tr 71 M=L3_ENTRY_LP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_ENTRY_LP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1417 #echo "there are 737 more memories to test.";echo "tr 71 M=L3_ENTRY_ONLY_DOUBLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_ENTRY_ONLY_DOUBLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1418 #echo "there are 736 more memories to test.";echo "tr 71 M=L3_ENTRY_ONLY_QUAD Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_ENTRY_ONLY_QUAD Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1419 #echo "there are 735 more memories to test.";echo "tr 71 M=L3_ENTRY_ONLY_SINGLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_ENTRY_ONLY_SINGLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1420 #echo "there are 734 more memories to test.";echo "tr 71 M=L3_ENTRY_QUAD Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_ENTRY_QUAD Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1421 echo "there are 733 more memories to test.";echo "tr 71 M=L3_ENTRY_REMAP_TABLE_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_ENTRY_REMAP_TABLE_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1422 echo "there are 732 more memories to test.";echo "tr 71 M=L3_ENTRY_REMAP_TABLE_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_ENTRY_REMAP_TABLE_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1423 #echo "there are 731 more memories to test.";echo "tr 71 M=L3_ENTRY_SINGLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_ENTRY_SINGLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1424 echo "there are 730 more memories to test.";echo "tr 71 M=L3_IIF_ATTRS_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_IIF_ATTRS_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1425 echo "there are 729 more memories to test.";echo "tr 71 M=L3_IIF Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_IIF Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1426 echo "there are 728 more memories to test.";echo "tr 71 M=L3_IIF_CTRL_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_IIF_CTRL_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1427 echo "there are 727 more memories to test.";echo "tr 71 M=L3_IIF_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_IIF_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1428 echo "there are 726 more memories to test.";echo "tr 71 M=L3_IPMC Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_IPMC Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1429 echo "there are 725 more memories to test.";echo "tr 71 M=L3_IPMC_REMAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_IPMC_REMAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1430 echo "there are 724 more memories to test.";echo "tr 71 M=L3_MTU_VALUES Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_MTU_VALUES Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1431 echo "there are 723 more memories to test.";echo "tr 71 M=L3_TUNNEL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_TUNNEL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1432 echo "there are 722 more memories to test.";echo "tr 71 M=L3_TUNNEL_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_TUNNEL_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1433 echo "there are 721 more memories to test.";echo "tr 71 M=L3_TUNNEL_DEFAULT_VLAN_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_TUNNEL_DEFAULT_VLAN_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1434 echo "there are 720 more memories to test.";echo "tr 71 M=L3_TUNNEL_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=L3_TUNNEL_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1435 echo "there are 719 more memories to test.";echo "tr 71 M=LAG_DLB_CONTROL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=LAG_DLB_CONTROL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1436 echo "there are 718 more memories to test.";echo "tr 71 M=LOCAL_SW_DISABLE_DEFAULT_PBM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=LOCAL_SW_DISABLE_DEFAULT_PBM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1437 echo "there are 717 more memories to test.";echo "tr 71 M=LOCAL_SW_DISABLE_DEFAULT_PBM_MIRR Start=0 Count=1 SlamLowToHigh=0";tr 71 M=LOCAL_SW_DISABLE_DEFAULT_PBM_MIRR Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1438 echo "there are 716 more memories to test.";echo "tr 71 M=LPORT_TAB Start=0 Count=1 SlamLowToHigh=0";tr 71 M=LPORT_TAB Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1439 echo "there are 715 more memories to test.";echo "tr 71 M=MAC_BLOCK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MAC_BLOCK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1440 echo "there are 714 more memories to test.";echo "tr 71 M=MIRROR_CONTROL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MIRROR_CONTROL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1441 echo "there are 713 more memories to test.";echo "tr 71 M=MMU_AGING_CTR_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_AGING_CTR_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1442 echo "there are 712 more memories to test.";echo "tr 71 M=MMU_AGING_EXP_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_AGING_EXP_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1443 echo "there are 711 more memories to test.";echo "tr 71 M=MMU_AGING_MSK_TBL_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_AGING_MSK_TBL_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1444 echo "there are 710 more memories to test.";echo "tr 71 M=MMU_CBPData0_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData0_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1445 echo "there are 709 more memories to test.";echo "tr 71 M=MMU_CBPData100_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData100_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1446 echo "there are 708 more memories to test.";echo "tr 71 M=MMU_CBPData101_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData101_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1447 echo "there are 707 more memories to test.";echo "tr 71 M=MMU_CBPData102_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData102_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1448 echo "there are 706 more memories to test.";echo "tr 71 M=MMU_CBPData103_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData103_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1449 echo "there are 705 more memories to test.";echo "tr 71 M=MMU_CBPData104_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData104_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1450 echo "there are 704 more memories to test.";echo "tr 71 M=MMU_CBPData105_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData105_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1451 echo "there are 703 more memories to test.";echo "tr 71 M=MMU_CBPData106_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData106_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1452 echo "there are 702 more memories to test.";echo "tr 71 M=MMU_CBPData107_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData107_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1453 echo "there are 701 more memories to test.";echo "tr 71 M=MMU_CBPData108_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData108_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1454 echo "there are 700 more memories to test.";echo "tr 71 M=MMU_CBPData109_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData109_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1455 echo "there are 699 more memories to test.";echo "tr 71 M=MMU_CBPData10_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData10_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1456 echo "there are 698 more memories to test.";echo "tr 71 M=MMU_CBPData110_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData110_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1457 echo "there are 697 more memories to test.";echo "tr 71 M=MMU_CBPData111_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData111_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1458 echo "there are 696 more memories to test.";echo "tr 71 M=MMU_CBPData112_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData112_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1459 echo "there are 695 more memories to test.";echo "tr 71 M=MMU_CBPData113_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData113_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1460 echo "there are 694 more memories to test.";echo "tr 71 M=MMU_CBPData114_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData114_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1461 echo "there are 693 more memories to test.";echo "tr 71 M=MMU_CBPData115_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData115_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1462 echo "there are 692 more memories to test.";echo "tr 71 M=MMU_CBPData116_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData116_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1463 echo "there are 691 more memories to test.";echo "tr 71 M=MMU_CBPData117_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData117_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1464 echo "there are 690 more memories to test.";echo "tr 71 M=MMU_CBPData118_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData118_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1465 echo "there are 689 more memories to test.";echo "tr 71 M=MMU_CBPData119_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData119_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1466 echo "there are 688 more memories to test.";echo "tr 71 M=MMU_CBPData11_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData11_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1467 echo "there are 687 more memories to test.";echo "tr 71 M=MMU_CBPData120_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData120_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1468 echo "there are 686 more memories to test.";echo "tr 71 M=MMU_CBPData121_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData121_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1469 echo "there are 685 more memories to test.";echo "tr 71 M=MMU_CBPData122_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData122_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1470 echo "there are 684 more memories to test.";echo "tr 71 M=MMU_CBPData123_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData123_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1471 echo "there are 683 more memories to test.";echo "tr 71 M=MMU_CBPData124_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData124_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1472 echo "there are 682 more memories to test.";echo "tr 71 M=MMU_CBPData125_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData125_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1473 echo "there are 681 more memories to test.";echo "tr 71 M=MMU_CBPData126_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData126_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1474 echo "there are 680 more memories to test.";echo "tr 71 M=MMU_CBPData127_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData127_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1475 echo "there are 679 more memories to test.";echo "tr 71 M=MMU_CBPData128_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData128_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1476 echo "there are 678 more memories to test.";echo "tr 71 M=MMU_CBPData129_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData129_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1477 echo "there are 677 more memories to test.";echo "tr 71 M=MMU_CBPData12_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData12_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1478 echo "there are 676 more memories to test.";echo "tr 71 M=MMU_CBPData130_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData130_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1479 echo "there are 675 more memories to test.";echo "tr 71 M=MMU_CBPData131_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData131_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1480 echo "there are 674 more memories to test.";echo "tr 71 M=MMU_CBPData132_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData132_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1481 echo "there are 673 more memories to test.";echo "tr 71 M=MMU_CBPData133_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData133_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1482 echo "there are 672 more memories to test.";echo "tr 71 M=MMU_CBPData134_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData134_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1483 echo "there are 671 more memories to test.";echo "tr 71 M=MMU_CBPData135_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData135_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1484 echo "there are 670 more memories to test.";echo "tr 71 M=MMU_CBPData136_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData136_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1485 echo "there are 669 more memories to test.";echo "tr 71 M=MMU_CBPData137_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData137_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1486 echo "there are 668 more memories to test.";echo "tr 71 M=MMU_CBPData138_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData138_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1487 echo "there are 667 more memories to test.";echo "tr 71 M=MMU_CBPData139_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData139_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1488 echo "there are 666 more memories to test.";echo "tr 71 M=MMU_CBPData13_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData13_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1489 echo "there are 665 more memories to test.";echo "tr 71 M=MMU_CBPData140_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData140_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1490 echo "there are 664 more memories to test.";echo "tr 71 M=MMU_CBPData141_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData141_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1491 echo "there are 663 more memories to test.";echo "tr 71 M=MMU_CBPData142_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData142_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1492 echo "there are 662 more memories to test.";echo "tr 71 M=MMU_CBPData143_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData143_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1493 echo "there are 661 more memories to test.";echo "tr 71 M=MMU_CBPData144_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData144_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1494 echo "there are 660 more memories to test.";echo "tr 71 M=MMU_CBPData145_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData145_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1495 echo "there are 659 more memories to test.";echo "tr 71 M=MMU_CBPData146_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData146_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1496 echo "there are 658 more memories to test.";echo "tr 71 M=MMU_CBPData147_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData147_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1497 echo "there are 657 more memories to test.";echo "tr 71 M=MMU_CBPData148_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData148_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1498 echo "there are 656 more memories to test.";echo "tr 71 M=MMU_CBPData149_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData149_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1499 echo "there are 655 more memories to test.";echo "tr 71 M=MMU_CBPData14_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData14_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1500 echo "there are 654 more memories to test.";echo "tr 71 M=MMU_CBPData150_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData150_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1501 echo "there are 653 more memories to test.";echo "tr 71 M=MMU_CBPData151_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData151_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1502 echo "there are 652 more memories to test.";echo "tr 71 M=MMU_CBPData152_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData152_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1503 echo "there are 651 more memories to test.";echo "tr 71 M=MMU_CBPData153_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData153_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1504 echo "there are 650 more memories to test.";echo "tr 71 M=MMU_CBPData154_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData154_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1505 echo "there are 649 more memories to test.";echo "tr 71 M=MMU_CBPData155_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData155_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1506 echo "there are 648 more memories to test.";echo "tr 71 M=MMU_CBPData156_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData156_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1507 echo "there are 647 more memories to test.";echo "tr 71 M=MMU_CBPData157_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData157_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1508 echo "there are 646 more memories to test.";echo "tr 71 M=MMU_CBPData158_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData158_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1509 echo "there are 645 more memories to test.";echo "tr 71 M=MMU_CBPData159_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData159_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1510 echo "there are 644 more memories to test.";echo "tr 71 M=MMU_CBPData15_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData15_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1511 echo "there are 643 more memories to test.";echo "tr 71 M=MMU_CBPData16_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData16_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1512 echo "there are 642 more memories to test.";echo "tr 71 M=MMU_CBPData17_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData17_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1513 echo "there are 641 more memories to test.";echo "tr 71 M=MMU_CBPData18_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData18_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1514 echo "there are 640 more memories to test.";echo "tr 71 M=MMU_CBPData19_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData19_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1515 echo "there are 639 more memories to test.";echo "tr 71 M=MMU_CBPData1_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData1_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1516 echo "there are 638 more memories to test.";echo "tr 71 M=MMU_CBPData20_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData20_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1517 echo "there are 637 more memories to test.";echo "tr 71 M=MMU_CBPData21_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData21_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1518 echo "there are 636 more memories to test.";echo "tr 71 M=MMU_CBPData22_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData22_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1519 echo "there are 635 more memories to test.";echo "tr 71 M=MMU_CBPData23_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData23_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1520 echo "there are 634 more memories to test.";echo "tr 71 M=MMU_CBPData24_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData24_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1521 echo "there are 633 more memories to test.";echo "tr 71 M=MMU_CBPData25_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData25_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1522 echo "there are 632 more memories to test.";echo "tr 71 M=MMU_CBPData26_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData26_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1523 echo "there are 631 more memories to test.";echo "tr 71 M=MMU_CBPData27_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData27_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1524 echo "there are 630 more memories to test.";echo "tr 71 M=MMU_CBPData28_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData28_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1525 echo "there are 629 more memories to test.";echo "tr 71 M=MMU_CBPData29_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData29_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1526 echo "there are 628 more memories to test.";echo "tr 71 M=MMU_CBPData2_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData2_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1527 echo "there are 627 more memories to test.";echo "tr 71 M=MMU_CBPData30_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData30_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1528 echo "there are 626 more memories to test.";echo "tr 71 M=MMU_CBPData31_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData31_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1529 echo "there are 625 more memories to test.";echo "tr 71 M=MMU_CBPData32_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData32_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1530 echo "there are 624 more memories to test.";echo "tr 71 M=MMU_CBPData33_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData33_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1531 echo "there are 623 more memories to test.";echo "tr 71 M=MMU_CBPData34_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData34_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1532 echo "there are 622 more memories to test.";echo "tr 71 M=MMU_CBPData35_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData35_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1533 echo "there are 621 more memories to test.";echo "tr 71 M=MMU_CBPData36_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData36_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1534 echo "there are 620 more memories to test.";echo "tr 71 M=MMU_CBPData37_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData37_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1535 echo "there are 619 more memories to test.";echo "tr 71 M=MMU_CBPData38_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData38_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1536 echo "there are 618 more memories to test.";echo "tr 71 M=MMU_CBPData39_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData39_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1537 echo "there are 617 more memories to test.";echo "tr 71 M=MMU_CBPData3_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData3_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1538 echo "there are 616 more memories to test.";echo "tr 71 M=MMU_CBPData40_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData40_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1539 echo "there are 615 more memories to test.";echo "tr 71 M=MMU_CBPData41_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData41_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1540 echo "there are 614 more memories to test.";echo "tr 71 M=MMU_CBPData42_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData42_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1541 echo "there are 613 more memories to test.";echo "tr 71 M=MMU_CBPData43_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData43_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1542 echo "there are 612 more memories to test.";echo "tr 71 M=MMU_CBPData44_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData44_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1543 echo "there are 611 more memories to test.";echo "tr 71 M=MMU_CBPData45_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData45_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1544 echo "there are 610 more memories to test.";echo "tr 71 M=MMU_CBPData46_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData46_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1545 echo "there are 609 more memories to test.";echo "tr 71 M=MMU_CBPData47_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData47_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1546 echo "there are 608 more memories to test.";echo "tr 71 M=MMU_CBPData48_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData48_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1547 echo "there are 607 more memories to test.";echo "tr 71 M=MMU_CBPData49_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData49_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1548 echo "there are 606 more memories to test.";echo "tr 71 M=MMU_CBPData4_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData4_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1549 echo "there are 605 more memories to test.";echo "tr 71 M=MMU_CBPData50_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData50_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1550 echo "there are 604 more memories to test.";echo "tr 71 M=MMU_CBPData51_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData51_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1551 echo "there are 603 more memories to test.";echo "tr 71 M=MMU_CBPData52_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData52_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1552 echo "there are 602 more memories to test.";echo "tr 71 M=MMU_CBPData53_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData53_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1553 echo "there are 601 more memories to test.";echo "tr 71 M=MMU_CBPData54_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData54_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1554 echo "there are 600 more memories to test.";echo "tr 71 M=MMU_CBPData55_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData55_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1555 echo "there are 599 more memories to test.";echo "tr 71 M=MMU_CBPData56_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData56_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1556 echo "there are 598 more memories to test.";echo "tr 71 M=MMU_CBPData57_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData57_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1557 echo "there are 597 more memories to test.";echo "tr 71 M=MMU_CBPData58_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData58_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1558 echo "there are 596 more memories to test.";echo "tr 71 M=MMU_CBPData59_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData59_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1559 echo "there are 595 more memories to test.";echo "tr 71 M=MMU_CBPData5_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData5_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1560 echo "there are 594 more memories to test.";echo "tr 71 M=MMU_CBPData60_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData60_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1561 echo "there are 593 more memories to test.";echo "tr 71 M=MMU_CBPData61_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData61_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1562 echo "there are 592 more memories to test.";echo "tr 71 M=MMU_CBPData62_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData62_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1563 echo "there are 591 more memories to test.";echo "tr 71 M=MMU_CBPData63_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData63_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1564 echo "there are 590 more memories to test.";echo "tr 71 M=MMU_CBPData64_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData64_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1565 echo "there are 589 more memories to test.";echo "tr 71 M=MMU_CBPData65_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData65_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1566 echo "there are 588 more memories to test.";echo "tr 71 M=MMU_CBPData66_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData66_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1567 echo "there are 587 more memories to test.";echo "tr 71 M=MMU_CBPData67_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData67_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1568 echo "there are 586 more memories to test.";echo "tr 71 M=MMU_CBPData68_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData68_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1569 echo "there are 585 more memories to test.";echo "tr 71 M=MMU_CBPData69_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData69_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1570 echo "there are 584 more memories to test.";echo "tr 71 M=MMU_CBPData6_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData6_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1571 echo "there are 583 more memories to test.";echo "tr 71 M=MMU_CBPData70_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData70_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1572 echo "there are 582 more memories to test.";echo "tr 71 M=MMU_CBPData71_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData71_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1573 echo "there are 581 more memories to test.";echo "tr 71 M=MMU_CBPData72_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData72_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1574 echo "there are 580 more memories to test.";echo "tr 71 M=MMU_CBPData73_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData73_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1575 echo "there are 579 more memories to test.";echo "tr 71 M=MMU_CBPData74_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData74_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1576 echo "there are 578 more memories to test.";echo "tr 71 M=MMU_CBPData75_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData75_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1577 echo "there are 577 more memories to test.";echo "tr 71 M=MMU_CBPData76_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData76_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1578 echo "there are 576 more memories to test.";echo "tr 71 M=MMU_CBPData77_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData77_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1579 echo "there are 575 more memories to test.";echo "tr 71 M=MMU_CBPData78_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData78_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1580 echo "there are 574 more memories to test.";echo "tr 71 M=MMU_CBPData79_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData79_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1581 echo "there are 573 more memories to test.";echo "tr 71 M=MMU_CBPData7_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData7_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1582 echo "there are 572 more memories to test.";echo "tr 71 M=MMU_CBPData80_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData80_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1583 echo "there are 571 more memories to test.";echo "tr 71 M=MMU_CBPData81_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData81_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1584 echo "there are 570 more memories to test.";echo "tr 71 M=MMU_CBPData82_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData82_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1585 echo "there are 569 more memories to test.";echo "tr 71 M=MMU_CBPData83_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData83_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1586 echo "there are 568 more memories to test.";echo "tr 71 M=MMU_CBPData84_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData84_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1587 echo "there are 567 more memories to test.";echo "tr 71 M=MMU_CBPData85_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData85_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1588 echo "there are 566 more memories to test.";echo "tr 71 M=MMU_CBPData86_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData86_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1589 echo "there are 565 more memories to test.";echo "tr 71 M=MMU_CBPData87_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData87_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1590 echo "there are 564 more memories to test.";echo "tr 71 M=MMU_CBPData88_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData88_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1591 echo "there are 563 more memories to test.";echo "tr 71 M=MMU_CBPData89_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData89_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1592 echo "there are 562 more memories to test.";echo "tr 71 M=MMU_CBPData8_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData8_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1593 echo "there are 561 more memories to test.";echo "tr 71 M=MMU_CBPData90_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData90_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1594 echo "there are 560 more memories to test.";echo "tr 71 M=MMU_CBPData91_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData91_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1595 echo "there are 559 more memories to test.";echo "tr 71 M=MMU_CBPData92_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData92_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1596 echo "there are 558 more memories to test.";echo "tr 71 M=MMU_CBPData93_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData93_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1597 echo "there are 557 more memories to test.";echo "tr 71 M=MMU_CBPData94_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData94_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1598 echo "there are 556 more memories to test.";echo "tr 71 M=MMU_CBPData95_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData95_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1599 echo "there are 555 more memories to test.";echo "tr 71 M=MMU_CBPData96_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData96_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1600 echo "there are 554 more memories to test.";echo "tr 71 M=MMU_CBPData97_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData97_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1601 echo "there are 553 more memories to test.";echo "tr 71 M=MMU_CBPData98_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData98_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1602 echo "there are 552 more memories to test.";echo "tr 71 M=MMU_CBPData99_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData99_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1603 echo "there are 551 more memories to test.";echo "tr 71 M=MMU_CBPData9_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CBPData9_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1604 echo "there are 550 more memories to test.";echo "tr 71 M=MMU_CCP_MEM_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CCP_MEM_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1605 echo "there are 549 more memories to test.";echo "tr 71 M=MMU_CCP_RESEQ_MEM_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CCP_RESEQ_MEM_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1606 echo "there are 548 more memories to test.";echo "tr 71 M=MMU_CFAP_BANK0_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CFAP_BANK0_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1607 echo "there are 547 more memories to test.";echo "tr 71 M=MMU_CFAP_BANK10_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CFAP_BANK10_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1608 echo "there are 546 more memories to test.";echo "tr 71 M=MMU_CFAP_BANK11_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CFAP_BANK11_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1609 echo "there are 545 more memories to test.";echo "tr 71 M=MMU_CFAP_BANK12_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CFAP_BANK12_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1610 echo "there are 544 more memories to test.";echo "tr 71 M=MMU_CFAP_BANK13_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CFAP_BANK13_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1611 echo "there are 543 more memories to test.";echo "tr 71 M=MMU_CFAP_BANK14_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CFAP_BANK14_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1612 echo "there are 542 more memories to test.";echo "tr 71 M=MMU_CFAP_BANK15_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CFAP_BANK15_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1613 echo "there are 541 more memories to test.";echo "tr 71 M=MMU_CFAP_BANK16_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CFAP_BANK16_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1614 echo "there are 540 more memories to test.";echo "tr 71 M=MMU_CFAP_BANK17_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CFAP_BANK17_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1615 echo "there are 539 more memories to test.";echo "tr 71 M=MMU_CFAP_BANK18_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CFAP_BANK18_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1616 echo "there are 538 more memories to test.";echo "tr 71 M=MMU_CFAP_BANK19_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CFAP_BANK19_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1617 echo "there are 537 more memories to test.";echo "tr 71 M=MMU_CFAP_BANK1_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CFAP_BANK1_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1618 echo "there are 536 more memories to test.";echo "tr 71 M=MMU_CFAP_BANK20_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CFAP_BANK20_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1619 echo "there are 535 more memories to test.";echo "tr 71 M=MMU_CFAP_BANK21_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CFAP_BANK21_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1620 echo "there are 534 more memories to test.";echo "tr 71 M=MMU_CFAP_BANK22_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CFAP_BANK22_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1621 echo "there are 533 more memories to test.";echo "tr 71 M=MMU_CFAP_BANK23_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CFAP_BANK23_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1622 echo "there are 532 more memories to test.";echo "tr 71 M=MMU_CFAP_BANK24_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CFAP_BANK24_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1623 echo "there are 531 more memories to test.";echo "tr 71 M=MMU_CFAP_BANK25_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CFAP_BANK25_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1624 echo "there are 530 more memories to test.";echo "tr 71 M=MMU_CFAP_BANK26_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CFAP_BANK26_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1625 echo "there are 529 more memories to test.";echo "tr 71 M=MMU_CFAP_BANK27_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CFAP_BANK27_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1626 echo "there are 528 more memories to test.";echo "tr 71 M=MMU_CFAP_BANK28_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CFAP_BANK28_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1627 echo "there are 527 more memories to test.";echo "tr 71 M=MMU_CFAP_BANK29_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CFAP_BANK29_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1628 echo "there are 526 more memories to test.";echo "tr 71 M=MMU_CFAP_BANK2_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CFAP_BANK2_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1629 echo "there are 525 more memories to test.";echo "tr 71 M=MMU_CFAP_BANK30_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CFAP_BANK30_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1630 echo "there are 524 more memories to test.";echo "tr 71 M=MMU_CFAP_BANK31_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CFAP_BANK31_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1631 echo "there are 523 more memories to test.";echo "tr 71 M=MMU_CFAP_BANK3_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CFAP_BANK3_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1632 echo "there are 522 more memories to test.";echo "tr 71 M=MMU_CFAP_BANK4_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CFAP_BANK4_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1633 echo "there are 521 more memories to test.";echo "tr 71 M=MMU_CFAP_BANK5_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CFAP_BANK5_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1634 echo "there are 520 more memories to test.";echo "tr 71 M=MMU_CFAP_BANK6_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CFAP_BANK6_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1635 echo "there are 519 more memories to test.";echo "tr 71 M=MMU_CFAP_BANK7_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CFAP_BANK7_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1636 echo "there are 518 more memories to test.";echo "tr 71 M=MMU_CFAP_BANK8_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CFAP_BANK8_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1637 echo "there are 517 more memories to test.";echo "tr 71 M=MMU_CFAP_BANK9_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CFAP_BANK9_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1638 echo "there are 516 more memories to test.";echo "tr 71 M=MMU_CHFC_SYSPORT_MAPPING Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CHFC_SYSPORT_MAPPING Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1639 echo "there are 515 more memories to test.";echo "tr 71 M=MMU_CTR_COLOR_DROP_MEM_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CTR_COLOR_DROP_MEM_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1640 echo "there are 514 more memories to test.";echo "tr 71 M=MMU_CTR_ING_DROP_MEM_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CTR_ING_DROP_MEM_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1641 echo "there are 513 more memories to test.";echo "tr 71 M=MMU_CTR_MC_DROP_MEM_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CTR_MC_DROP_MEM_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1642 echo "there are 512 more memories to test.";echo "tr 71 M=MMU_CTR_UC_DROP_MEM_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CTR_UC_DROP_MEM_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1643 echo "there are 511 more memories to test.";echo "tr 71 M=MMU_CTR_WRED_DROP_MEM_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_CTR_WRED_DROP_MEM_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1644 echo "there are 510 more memories to test.";echo "tr 71 M=MMU_ENQS_CT_FIFO_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_ENQS_CT_FIFO_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1645 echo "there are 509 more memories to test.";echo "tr 71 M=MMU_ENQS_PBI_DB_SED0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_ENQS_PBI_DB_SED0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1646 echo "there are 508 more memories to test.";echo "tr 71 M=MMU_ENQX_EARLY_PIPEMEM_0_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_ENQX_EARLY_PIPEMEM_0_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1647 echo "there are 507 more memories to test.";echo "tr 71 M=MMU_ENQX_EARLY_PIPEMEM_1_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_ENQX_EARLY_PIPEMEM_1_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1648 echo "there are 506 more memories to test.";echo "tr 71 M=MMU_ENQX_EARLY_PIPEMEM_2_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_ENQX_EARLY_PIPEMEM_2_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1649 echo "there are 505 more memories to test.";echo "tr 71 M=MMU_ENQX_EARLY_PIPEMEM_3_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_ENQX_EARLY_PIPEMEM_3_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1650 echo "there are 504 more memories to test.";echo "tr 71 M=MMU_EPRG_MEM_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_EPRG_MEM_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1651 #echo "there are 503 more memories to test.";echo "tr 71 M=MMU_GCFG_MEM_FAIL_ADDR_64 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_GCFG_MEM_FAIL_ADDR_64 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1652 echo "there are 502 more memories to test.";echo "tr 71 M=MMU_INTFO_TC2PRI_MAPPING Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_INTFO_TC2PRI_MAPPING Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1653 echo "there are 501 more memories to test.";echo "tr 71 M=MMU_INTFO_TC2PRI_MAPPING0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_INTFO_TC2PRI_MAPPING0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1654 echo "there are 500 more memories to test.";echo "tr 71 M=MMU_INTFO_TC2PRI_MAPPING1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_INTFO_TC2PRI_MAPPING1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1655 echo "there are 499 more memories to test.";echo "tr 71 M=MMU_INTFO_TC2PRI_MAPPING2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_INTFO_TC2PRI_MAPPING2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1656 echo "there are 498 more memories to test.";echo "tr 71 M=MMU_INTFO_TC2PRI_MAPPING3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_INTFO_TC2PRI_MAPPING3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1657 #echo "there are 497 more memories to test.";echo "tr 71 M=MMU_INTFO_TIMESTAMP Start=0 Count=0 SlamLowToHigh=0";tr 71 M=MMU_INTFO_TIMESTAMP Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1658 echo "there are 496 more memories to test.";echo "tr 71 M=MMU_INTFO_TOD_TIMESTAMP Start=0 Count=0 SlamLowToHigh=0";tr 71 M=MMU_INTFO_TOD_TIMESTAMP Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1659 #echo "there are 495 more memories to test.";echo "tr 71 M=MMU_INTFO_UTC_TIMESTAMP Start=0 Count=0 SlamLowToHigh=0";tr 71 M=MMU_INTFO_UTC_TIMESTAMP Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1660 echo "there are 494 more memories to test.";echo "tr 71 M=MMU_LINK_MEM_SC0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_LINK_MEM_SC0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1661 echo "there are 493 more memories to test.";echo "tr 71 M=MMU_MCFP_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_MCFP_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1662 echo "there are 492 more memories to test.";echo "tr 71 M=MMU_MCQDB_X_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_MCQDB_X_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1663 echo "there are 491 more memories to test.";echo "tr 71 M=MMU_MCQE_PREFETCH_X_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_MCQE_PREFETCH_X_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1664 echo "there are 490 more memories to test.";echo "tr 71 M=MMU_MCQE_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_MCQE_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1665 echo "there are 489 more memories to test.";echo "tr 71 M=MMU_MCQN_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_MCQN_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1666 echo "there are 488 more memories to test.";echo "tr 71 M=MMU_MTRO_BUCKET_L0_MEM_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_MTRO_BUCKET_L0_MEM_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1667 echo "there are 487 more memories to test.";echo "tr 71 M=MMU_MTRO_BUCKET_L1_MEM_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_MTRO_BUCKET_L1_MEM_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1668 echo "there are 486 more memories to test.";echo "tr 71 M=MMU_MTRO_EGRMETERINGCONFIG_MEM_A_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_MTRO_EGRMETERINGCONFIG_MEM_A_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1669 echo "there are 485 more memories to test.";echo "tr 71 M=MMU_MTRO_EGRMETERINGCONFIG_MEM_B_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_MTRO_EGRMETERINGCONFIG_MEM_B_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1670 echo "there are 484 more memories to test.";echo "tr 71 M=MMU_MTRO_EGRMETERINGCONFIG_MEM_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_MTRO_EGRMETERINGCONFIG_MEM_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1671 echo "there are 483 more memories to test.";echo "tr 71 M=MMU_MTRO_L0_MEM_A_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_MTRO_L0_MEM_A_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1672 echo "there are 482 more memories to test.";echo "tr 71 M=MMU_MTRO_L0_MEM_B_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_MTRO_L0_MEM_B_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1673 echo "there are 481 more memories to test.";echo "tr 71 M=MMU_MTRO_L0_MEM_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_MTRO_L0_MEM_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1674 echo "there are 480 more memories to test.";echo "tr 71 M=MMU_MTRO_L1_MEM_A_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_MTRO_L1_MEM_A_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1675 echo "there are 479 more memories to test.";echo "tr 71 M=MMU_MTRO_L1_MEM_B_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_MTRO_L1_MEM_B_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1676 echo "there are 478 more memories to test.";echo "tr 71 M=MMU_MTRO_L1_MEM_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_MTRO_L1_MEM_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1677 echo "there are 477 more memories to test.";echo "tr 71 M=MMU_PDB_X_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_PDB_X_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1678 echo "there are 476 more memories to test.";echo "tr 71 M=MMU_PKTHDR_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_PKTHDR_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1679 echo "there are 475 more memories to test.";echo "tr 71 M=MMU_PORTCNT_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_PORTCNT_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1680 echo "there are 474 more memories to test.";echo "tr 71 M=MMU_PQE0_MEM_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_PQE0_MEM_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1681 echo "there are 473 more memories to test.";echo "tr 71 M=MMU_REPL_GROUP_INFO_TBL_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_REPL_GROUP_INFO_TBL_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1682 echo "there are 472 more memories to test.";echo "tr 71 M=MMU_REPL_GROUP_INITIAL_COPY_COUNT0_SC0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_REPL_GROUP_INITIAL_COPY_COUNT0_SC0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1683 echo "there are 471 more memories to test.";echo "tr 71 M=MMU_REPL_GROUP_INITIAL_COPY_COUNT1_SC0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_REPL_GROUP_INITIAL_COPY_COUNT1_SC0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1684 echo "there are 470 more memories to test.";echo "tr 71 M=MMU_REPL_GROUP_INITIAL_COPY_COUNT_SC0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_REPL_GROUP_INITIAL_COPY_COUNT_SC0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1685 echo "there are 469 more memories to test.";echo "tr 71 M=MMU_REPL_HEAD_TBL_SPLIT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_REPL_HEAD_TBL_SPLIT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1686 echo "there are 468 more memories to test.";echo "tr 71 M=MMU_REPL_HEAD_TBL_SPLIT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_REPL_HEAD_TBL_SPLIT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1687 echo "there are 467 more memories to test.";echo "tr 71 M=MMU_REPL_LIST_TBL_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_REPL_LIST_TBL_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1688 echo "there are 466 more memories to test.";echo "tr 71 M=MMU_REPL_STATE_TBL_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_REPL_STATE_TBL_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1689 #echo "there are 465 more memories to test.";echo "tr 71 M=MMU_SCFG_MEM_FAIL_ADDR_64_SC0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_SCFG_MEM_FAIL_ADDR_64_SC0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1690 #echo "there are 464 more memories to test.";echo "tr 71 M=MMU_SEDCFG_MEM_FAIL_ADDR_64_SC0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_SEDCFG_MEM_FAIL_ADDR_64_SC0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1691 echo "there are 463 more memories to test.";echo "tr 71 M=MMU_TCB_BUFFER_CELL_DATA_LOWER_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_TCB_BUFFER_CELL_DATA_LOWER_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1692 echo "there are 462 more memories to test.";echo "tr 71 M=MMU_TCB_BUFFER_CELL_DATA_SCRATCH_LOWER_SED0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_TCB_BUFFER_CELL_DATA_SCRATCH_LOWER_SED0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1693 echo "there are 461 more memories to test.";echo "tr 71 M=MMU_TCB_BUFFER_CELL_DATA_SCRATCH_UPPER_SED0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_TCB_BUFFER_CELL_DATA_SCRATCH_UPPER_SED0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1694 echo "there are 460 more memories to test.";echo "tr 71 M=MMU_TCB_BUFFER_CELL_DATA_UPPER_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_TCB_BUFFER_CELL_DATA_UPPER_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1695 echo "there are 459 more memories to test.";echo "tr 71 M=MMU_THDM_DB_POOL_MCUC_PKSTAT_XPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=MMU_THDM_DB_POOL_MCUC_PKSTAT_XPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1696 echo "there are 458 more memories to test.";echo "tr 71 M=MMU_THDM_DB_PORTSP_BST_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDM_DB_PORTSP_BST_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1697 echo "there are 457 more memories to test.";echo "tr 71 M=MMU_THDM_DB_PORTSP_CONFIG_A_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDM_DB_PORTSP_CONFIG_A_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1698 echo "there are 456 more memories to test.";echo "tr 71 M=MMU_THDM_DB_PORTSP_CONFIG_B_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDM_DB_PORTSP_CONFIG_B_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1699 echo "there are 455 more memories to test.";echo "tr 71 M=MMU_THDM_DB_PORTSP_CONFIG_C_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDM_DB_PORTSP_CONFIG_C_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1700 echo "there are 454 more memories to test.";echo "tr 71 M=MMU_THDM_DB_PORTSP_CONFIG_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDM_DB_PORTSP_CONFIG_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1701 echo "there are 453 more memories to test.";echo "tr 71 M=MMU_THDM_DB_QUEUE_BST_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDM_DB_QUEUE_BST_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1702 echo "there are 452 more memories to test.";echo "tr 71 M=MMU_THDM_DB_QUEUE_CONFIG_A_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDM_DB_QUEUE_CONFIG_A_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1703 echo "there are 451 more memories to test.";echo "tr 71 M=MMU_THDM_DB_QUEUE_CONFIG_B_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDM_DB_QUEUE_CONFIG_B_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1704 echo "there are 450 more memories to test.";echo "tr 71 M=MMU_THDM_DB_QUEUE_CONFIG_C_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDM_DB_QUEUE_CONFIG_C_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1705 echo "there are 449 more memories to test.";echo "tr 71 M=MMU_THDM_DB_QUEUE_CONFIG_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDM_DB_QUEUE_CONFIG_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1706 echo "there are 448 more memories to test.";echo "tr 71 M=MMU_THDM_DB_QUEUE_COUNT_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDM_DB_QUEUE_COUNT_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1707 echo "there are 447 more memories to test.";echo "tr 71 M=MMU_THDM_DB_QUEUE_OFFSET_A_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDM_DB_QUEUE_OFFSET_A_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1708 echo "there are 446 more memories to test.";echo "tr 71 M=MMU_THDM_DB_QUEUE_OFFSET_B_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDM_DB_QUEUE_OFFSET_B_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1709 echo "there are 445 more memories to test.";echo "tr 71 M=MMU_THDM_DB_QUEUE_OFFSET_C_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDM_DB_QUEUE_OFFSET_C_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1710 echo "there are 444 more memories to test.";echo "tr 71 M=MMU_THDM_DB_QUEUE_OFFSET_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDM_DB_QUEUE_OFFSET_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1711 echo "there are 443 more memories to test.";echo "tr 71 M=MMU_THDM_DB_QUEUE_RESUME_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDM_DB_QUEUE_RESUME_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1712 echo "there are 442 more memories to test.";echo "tr 71 M=MMU_THDM_MCQE_PORTSP_BST_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDM_MCQE_PORTSP_BST_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1713 echo "there are 441 more memories to test.";echo "tr 71 M=MMU_THDM_MCQE_PORTSP_CONFIG_A_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDM_MCQE_PORTSP_CONFIG_A_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1714 echo "there are 440 more memories to test.";echo "tr 71 M=MMU_THDM_MCQE_PORTSP_CONFIG_B_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDM_MCQE_PORTSP_CONFIG_B_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1715 echo "there are 439 more memories to test.";echo "tr 71 M=MMU_THDM_MCQE_PORTSP_CONFIG_C_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDM_MCQE_PORTSP_CONFIG_C_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1716 echo "there are 438 more memories to test.";echo "tr 71 M=MMU_THDM_MCQE_PORTSP_CONFIG_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDM_MCQE_PORTSP_CONFIG_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1717 echo "there are 437 more memories to test.";echo "tr 71 M=MMU_THDM_MCQE_QUEUE_BST_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDM_MCQE_QUEUE_BST_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1718 echo "there are 436 more memories to test.";echo "tr 71 M=MMU_THDM_MCQE_QUEUE_CONFIG_A_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDM_MCQE_QUEUE_CONFIG_A_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1719 echo "there are 435 more memories to test.";echo "tr 71 M=MMU_THDM_MCQE_QUEUE_CONFIG_B_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDM_MCQE_QUEUE_CONFIG_B_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1720 echo "there are 434 more memories to test.";echo "tr 71 M=MMU_THDM_MCQE_QUEUE_CONFIG_C_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDM_MCQE_QUEUE_CONFIG_C_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1721 echo "there are 433 more memories to test.";echo "tr 71 M=MMU_THDM_MCQE_QUEUE_CONFIG_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDM_MCQE_QUEUE_CONFIG_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1722 echo "there are 432 more memories to test.";echo "tr 71 M=MMU_THDM_MCQE_QUEUE_COUNT_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDM_MCQE_QUEUE_COUNT_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1723 echo "there are 431 more memories to test.";echo "tr 71 M=MMU_THDM_MCQE_QUEUE_OFFSET_A_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDM_MCQE_QUEUE_OFFSET_A_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1724 echo "there are 430 more memories to test.";echo "tr 71 M=MMU_THDM_MCQE_QUEUE_OFFSET_B_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDM_MCQE_QUEUE_OFFSET_B_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1725 echo "there are 429 more memories to test.";echo "tr 71 M=MMU_THDM_MCQE_QUEUE_OFFSET_C_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDM_MCQE_QUEUE_OFFSET_C_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1726 echo "there are 428 more memories to test.";echo "tr 71 M=MMU_THDM_MCQE_QUEUE_OFFSET_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDM_MCQE_QUEUE_OFFSET_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1727 echo "there are 427 more memories to test.";echo "tr 71 M=MMU_THDM_MCQE_QUEUE_RESUME_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDM_MCQE_QUEUE_RESUME_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1728 echo "there are 426 more memories to test.";echo "tr 71 M=MMU_THDU_BST_PORT_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDU_BST_PORT_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1729 echo "there are 425 more memories to test.";echo "tr 71 M=MMU_THDU_BST_QGROUP_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDU_BST_QGROUP_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1730 echo "there are 424 more memories to test.";echo "tr 71 M=MMU_THDU_BST_QUEUE_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDU_BST_QUEUE_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1731 echo "there are 423 more memories to test.";echo "tr 71 M=MMU_THDU_CONFIG_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDU_CONFIG_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1732 echo "there are 422 more memories to test.";echo "tr 71 M=MMU_THDU_CONFIG_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDU_CONFIG_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1733 echo "there are 421 more memories to test.";echo "tr 71 M=MMU_THDU_CONFIG_PORT_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDU_CONFIG_PORT_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1734 echo "there are 420 more memories to test.";echo "tr 71 M=MMU_THDU_CONFIG_QGROUP0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDU_CONFIG_QGROUP0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1735 echo "there are 419 more memories to test.";echo "tr 71 M=MMU_THDU_CONFIG_QGROUP1_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDU_CONFIG_QGROUP1_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1736 echo "there are 418 more memories to test.";echo "tr 71 M=MMU_THDU_CONFIG_QGROUP_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDU_CONFIG_QGROUP_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1737 echo "there are 417 more memories to test.";echo "tr 71 M=MMU_THDU_CONFIG_QUEUE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDU_CONFIG_QUEUE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1738 echo "there are 416 more memories to test.";echo "tr 71 M=MMU_THDU_CONFIG_QUEUE1_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDU_CONFIG_QUEUE1_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1739 echo "there are 415 more memories to test.";echo "tr 71 M=MMU_THDU_CONFIG_QUEUE_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDU_CONFIG_QUEUE_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1740 echo "there are 414 more memories to test.";echo "tr 71 M=MMU_THDU_COUNTER_PORT_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDU_COUNTER_PORT_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1741 echo "there are 413 more memories to test.";echo "tr 71 M=MMU_THDU_COUNTER_QGROUP_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDU_COUNTER_QGROUP_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1742 echo "there are 412 more memories to test.";echo "tr 71 M=MMU_THDU_COUNTER_QUEUE_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDU_COUNTER_QUEUE_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1743 echo "there are 411 more memories to test.";echo "tr 71 M=MMU_THDU_OFFSET_QGROUP0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDU_OFFSET_QGROUP0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1744 echo "there are 410 more memories to test.";echo "tr 71 M=MMU_THDU_OFFSET_QGROUP1_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDU_OFFSET_QGROUP1_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1745 echo "there are 409 more memories to test.";echo "tr 71 M=MMU_THDU_OFFSET_QGROUP_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDU_OFFSET_QGROUP_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1746 echo "there are 408 more memories to test.";echo "tr 71 M=MMU_THDU_OFFSET_QUEUE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDU_OFFSET_QUEUE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1747 echo "there are 407 more memories to test.";echo "tr 71 M=MMU_THDU_OFFSET_QUEUE1_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDU_OFFSET_QUEUE1_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1748 echo "there are 406 more memories to test.";echo "tr 71 M=MMU_THDU_OFFSET_QUEUE_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDU_OFFSET_QUEUE_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1749 echo "there are 405 more memories to test.";echo "tr 71 M=MMU_THDU_Q_TO_QGRP_MAP0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDU_Q_TO_QGRP_MAP0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1750 echo "there are 404 more memories to test.";echo "tr 71 M=MMU_THDU_Q_TO_QGRP_MAP1_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDU_Q_TO_QGRP_MAP1_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1751 echo "there are 403 more memories to test.";echo "tr 71 M=MMU_THDU_Q_TO_QGRP_MAP2_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDU_Q_TO_QGRP_MAP2_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1752 echo "there are 402 more memories to test.";echo "tr 71 M=MMU_THDU_Q_TO_QGRP_MAP_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDU_Q_TO_QGRP_MAP_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1753 echo "there are 401 more memories to test.";echo "tr 71 M=MMU_THDU_RESUME_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDU_RESUME_PORT0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1754 echo "there are 400 more memories to test.";echo "tr 71 M=MMU_THDU_RESUME_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDU_RESUME_PORT1_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1755 echo "there are 399 more memories to test.";echo "tr 71 M=MMU_THDU_RESUME_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDU_RESUME_PORT2_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1756 echo "there are 398 more memories to test.";echo "tr 71 M=MMU_THDU_RESUME_PORT_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDU_RESUME_PORT_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1757 echo "there are 397 more memories to test.";echo "tr 71 M=MMU_THDU_RESUME_QGROUP_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDU_RESUME_QGROUP_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1758 echo "there are 396 more memories to test.";echo "tr 71 M=MMU_THDU_RESUME_QUEUE_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDU_RESUME_QUEUE_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1759 echo "there are 395 more memories to test.";echo "tr 71 M=MMU_THDU_UCQ_STATS_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_THDU_UCQ_STATS_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1760 echo "there are 394 more memories to test.";echo "tr 71 M=MMU_UCQDB_X_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_UCQDB_X_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1761 echo "there are 393 more memories to test.";echo "tr 71 M=MMU_WRED_AVG_QSIZE_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_AVG_QSIZE_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1762 echo "there are 392 more memories to test.";echo "tr 71 M=MMU_WRED_CONFIG_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_CONFIG_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1763 echo "there are 391 more memories to test.";echo "tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1764 echo "there are 390 more memories to test.";echo "tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_0_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_0_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1765 echo "there are 389 more memories to test.";echo "tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_0_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_0_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1766 echo "there are 388 more memories to test.";echo "tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1767 echo "there are 387 more memories to test.";echo "tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_1_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_1_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1768 echo "there are 386 more memories to test.";echo "tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_1_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_1_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1769 echo "there are 385 more memories to test.";echo "tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1770 echo "there are 384 more memories to test.";echo "tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_2_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_2_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1771 echo "there are 383 more memories to test.";echo "tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_2_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_2_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1772 echo "there are 382 more memories to test.";echo "tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1773 echo "there are 381 more memories to test.";echo "tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_3_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_3_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1774 echo "there are 380 more memories to test.";echo "tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_3_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_3_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1775 echo "there are 379 more memories to test.";echo "tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_4 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_4 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1776 echo "there are 378 more memories to test.";echo "tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_4_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_4_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1777 echo "there are 377 more memories to test.";echo "tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_4_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_4_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1778 echo "there are 376 more memories to test.";echo "tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_5 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_5 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1779 echo "there are 375 more memories to test.";echo "tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_5_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_5_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1780 echo "there are 374 more memories to test.";echo "tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_5_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_5_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1781 echo "there are 373 more memories to test.";echo "tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_6 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_6 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1782 echo "there are 372 more memories to test.";echo "tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_6_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_6_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1783 echo "there are 371 more memories to test.";echo "tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_6_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_6_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1784 echo "there are 370 more memories to test.";echo "tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_7 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_7 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1785 echo "there are 369 more memories to test.";echo "tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_7_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_7_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1786 echo "there are 368 more memories to test.";echo "tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_7_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_7_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1787 echo "there are 367 more memories to test.";echo "tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_8 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_8 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1788 echo "there are 366 more memories to test.";echo "tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_8_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_8_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1789 echo "there are 365 more memories to test.";echo "tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_8_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_8_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1790 echo "there are 364 more memories to test.";echo "tr 71 M=MMU_WRED_PORT_SP_DROP_THD_MARK_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_PORT_SP_DROP_THD_MARK_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1791 echo "there are 363 more memories to test.";echo "tr 71 M=MMU_WRED_PORT_SP_DROP_THD_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_PORT_SP_DROP_THD_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1792 echo "there are 362 more memories to test.";echo "tr 71 M=MMU_WRED_PORT_SP_SHARED_COUNT_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_PORT_SP_SHARED_COUNT_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1793 echo "there are 361 more memories to test.";echo "tr 71 M=MMU_WRED_UC_QUEUE_DROP_THD_0_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_UC_QUEUE_DROP_THD_0_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1794 echo "there are 360 more memories to test.";echo "tr 71 M=MMU_WRED_UC_QUEUE_DROP_THD_1_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_UC_QUEUE_DROP_THD_1_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1795 echo "there are 359 more memories to test.";echo "tr 71 M=MMU_WRED_UC_QUEUE_DROP_THD_MARK_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_UC_QUEUE_DROP_THD_MARK_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1796 echo "there are 358 more memories to test.";echo "tr 71 M=MMU_WRED_UC_QUEUE_TOTAL_COUNT_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_WRED_UC_QUEUE_TOTAL_COUNT_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1797 #echo "there are 357 more memories to test.";echo "tr 71 M=MMU_XCFG_MEM_FAIL_ADDR_64_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MMU_XCFG_MEM_FAIL_ADDR_64_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1798 echo "there are 356 more memories to test.";echo "tr 71 M=MODID_BASE_PTR Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MODID_BASE_PTR Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1799 echo "there are 355 more memories to test.";echo "tr 71 M=MODPORT_MAP_M0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MODPORT_MAP_M0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1800 echo "there are 354 more memories to test.";echo "tr 71 M=MODPORT_MAP_M1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MODPORT_MAP_M1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1801 echo "there are 353 more memories to test.";echo "tr 71 M=MODPORT_MAP_M2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MODPORT_MAP_M2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1802 echo "there are 352 more memories to test.";echo "tr 71 M=MODPORT_MAP_M3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MODPORT_MAP_M3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1803 echo "there are 351 more memories to test.";echo "tr 71 M=MODPORT_MAP_MIRROR Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MODPORT_MAP_MIRROR Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1804 echo "there are 350 more memories to test.";echo "tr 71 M=MODPORT_MAP_SUBPORT Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MODPORT_MAP_SUBPORT Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1805 echo "there are 349 more memories to test.";echo "tr 71 M=MODPORT_MAP_SUBPORT_M0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MODPORT_MAP_SUBPORT_M0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1806 echo "there are 348 more memories to test.";echo "tr 71 M=MODPORT_MAP_SUBPORT_M1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MODPORT_MAP_SUBPORT_M1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1807 echo "there are 347 more memories to test.";echo "tr 71 M=MODPORT_MAP_SUBPORT_M2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MODPORT_MAP_SUBPORT_M2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1808 echo "there are 346 more memories to test.";echo "tr 71 M=MODPORT_MAP_SUBPORT_M3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MODPORT_MAP_SUBPORT_M3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1809 echo "there are 345 more memories to test.";echo "tr 71 M=MODPORT_MAP_SUBPORT_MIRROR Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MODPORT_MAP_SUBPORT_MIRROR Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1810 echo "there are 344 more memories to test.";echo "tr 71 M=MODPORT_MAP_SW Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MODPORT_MAP_SW Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1811 echo "there are 343 more memories to test.";echo "tr 71 M=MPLS_EDIT_CTRL_ID_MAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MPLS_EDIT_CTRL_ID_MAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1812 echo "there are 342 more memories to test.";echo "tr 71 M=MPLS_ENTRY_ACTION_TABLE_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MPLS_ENTRY_ACTION_TABLE_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1813 echo "there are 341 more memories to test.";echo "tr 71 M=MPLS_ENTRY_ACTION_TABLE_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MPLS_ENTRY_ACTION_TABLE_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1814 echo "there are 340 more memories to test.";echo "tr 71 M=MPLS_ENTRY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MPLS_ENTRY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1815 echo "there are 339 more memories to test.";echo "tr 71 M=MPLS_ENTRY_ECC Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MPLS_ENTRY_ECC Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1816 echo "there are 338 more memories to test.";echo "tr 71 M=MPLS_ENTRY_KEY_ATTRIBUTES Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MPLS_ENTRY_KEY_ATTRIBUTES Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1817 echo "there are 337 more memories to test.";echo "tr 71 M=MPLS_ENTRY_LP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MPLS_ENTRY_LP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1818 echo "there are 336 more memories to test.";echo "tr 71 M=MPLS_ENTRY_REMAP_TABLE_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MPLS_ENTRY_REMAP_TABLE_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1819 echo "there are 335 more memories to test.";echo "tr 71 M=MPLS_ENTRY_REMAP_TABLE_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MPLS_ENTRY_REMAP_TABLE_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1820 #echo "there are 334 more memories to test.";echo "tr 71 M=MPLS_ENTRY_SINGLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MPLS_ENTRY_SINGLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1821 echo "there are 333 more memories to test.";echo "tr 71 M=MPLS_PARSER2_CONTEXT_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MPLS_PARSER2_CONTEXT_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1822 echo "there are 332 more memories to test.";echo "tr 71 M=MULTIPASS_LOOPBACK_BITMAP Start=0 Count=0 SlamLowToHigh=0";tr 71 M=MULTIPASS_LOOPBACK_BITMAP Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1823 echo "there are 331 more memories to test.";echo "tr 71 M=MULTIPASS_LOOPBACK_BITMAP_PIPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=MULTIPASS_LOOPBACK_BITMAP_PIPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1824 echo "there are 330 more memories to test.";echo "tr 71 M=MY_STATION_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MY_STATION_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1825 echo "there are 329 more memories to test.";echo "tr 71 M=MY_STATION_PROFILE_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MY_STATION_PROFILE_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1826 echo "there are 328 more memories to test.";echo "tr 71 M=MY_STATION_TCAM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MY_STATION_TCAM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1827 echo "there are 327 more memories to test.";echo "tr 71 M=MY_STATION_TCAM_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MY_STATION_TCAM_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1828 echo "there are 326 more memories to test.";echo "tr 71 M=MY_STATION_TCAM_2_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MY_STATION_TCAM_2_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1829 echo "there are 325 more memories to test.";echo "tr 71 M=MY_STATION_TCAM_2_ENTRY_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MY_STATION_TCAM_2_ENTRY_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1830 echo "there are 324 more memories to test.";echo "tr 71 M=MY_STATION_TCAM_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MY_STATION_TCAM_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1831 echo "there are 323 more memories to test.";echo "tr 71 M=MY_STATION_TCAM_ENTRY_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=MY_STATION_TCAM_ENTRY_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1832 echo "there are 322 more memories to test.";echo "tr 71 M=NONUCAST_TRUNK_BLOCK_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=NONUCAST_TRUNK_BLOCK_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1833 echo "there are 321 more memories to test.";echo "tr 71 M=PARSER1_BFD_DIP_V4_LOOPBACK Start=0 Count=0 SlamLowToHigh=0";tr 71 M=PARSER1_BFD_DIP_V4_LOOPBACK Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1834 echo "there are 320 more memories to test.";echo "tr 71 M=PARSER1_BFD_DIP_V6_LOOPBACK Start=0 Count=0 SlamLowToHigh=0";tr 71 M=PARSER1_BFD_DIP_V6_LOOPBACK Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1835 echo "there are 319 more memories to test.";echo "tr 71 M=PARSER1_ING_FC_HEADER_TYPE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PARSER1_ING_FC_HEADER_TYPE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1836 echo "there are 318 more memories to test.";echo "tr 71 M=PARSER1_ING_IPV6_MC_RESERVED_ADDRESS Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PARSER1_ING_IPV6_MC_RESERVED_ADDRESS Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1837 echo "there are 317 more memories to test.";echo "tr 71 M=PARSER1_IPV4_IN_IPV6_PREFIX_MATCH_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PARSER1_IPV4_IN_IPV6_PREFIX_MATCH_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1838 echo "there are 316 more memories to test.";echo "tr 71 M=PARSER2_BFD_DIP_V4_LOOPBACK Start=0 Count=0 SlamLowToHigh=0";tr 71 M=PARSER2_BFD_DIP_V4_LOOPBACK Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1839 echo "there are 315 more memories to test.";echo "tr 71 M=PARSER2_BFD_DIP_V6_LOOPBACK Start=0 Count=0 SlamLowToHigh=0";tr 71 M=PARSER2_BFD_DIP_V6_LOOPBACK Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1840 echo "there are 314 more memories to test.";echo "tr 71 M=PARSER2_ING_FC_HEADER_TYPE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PARSER2_ING_FC_HEADER_TYPE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1841 echo "there are 313 more memories to test.";echo "tr 71 M=PARSER2_ING_IPV6_MC_RESERVED_ADDRESS Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PARSER2_ING_IPV6_MC_RESERVED_ADDRESS Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1842 echo "there are 312 more memories to test.";echo "tr 71 M=PARSER2_IPV4_IN_IPV6_PREFIX_MATCH_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PARSER2_IPV4_IN_IPV6_PREFIX_MATCH_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1843 echo "there are 311 more memories to test.";echo "tr 71 M=PHB2_COS_MAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PHB2_COS_MAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1844 echo "there are 310 more memories to test.";echo "tr 71 M=PHB2_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PHB2_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1845 echo "there are 309 more memories to test.";echo "tr 71 M=PHB_MAPPING_TBL_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PHB_MAPPING_TBL_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1846 echo "there are 308 more memories to test.";echo "tr 71 M=PHB_MAPPING_TBL_1_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PHB_MAPPING_TBL_1_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1847 echo "there are 307 more memories to test.";echo "tr 71 M=PHB_MAPPING_TBL_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PHB_MAPPING_TBL_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1848 echo "there are 306 more memories to test.";echo "tr 71 M=PHB_MAPPING_TBL_2_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PHB_MAPPING_TBL_2_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1849 echo "there are 305 more memories to test.";echo "tr 71 M=PHB_MAPPING_TBL_3 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PHB_MAPPING_TBL_3 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1850 echo "there are 304 more memories to test.";echo "tr 71 M=PHB_MAPPING_TBL_3_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PHB_MAPPING_TBL_3_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1851 echo "there are 303 more memories to test.";echo "tr 71 M=PHB_MAPPING_TBL_4 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PHB_MAPPING_TBL_4 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1852 echo "there are 302 more memories to test.";echo "tr 71 M=PHB_MAPPING_TBL_4_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PHB_MAPPING_TBL_4_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1853 echo "there are 301 more memories to test.";echo "tr 71 M=PHB_SELECT_TCAM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PHB_SELECT_TCAM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1854 echo "there are 300 more memories to test.";echo "tr 71 M=PHB_SELECT_TCAM_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PHB_SELECT_TCAM_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1855 echo "there are 299 more memories to test.";echo "tr 71 M=PHB_SELECT_TCAM_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PHB_SELECT_TCAM_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1856 echo "there are 298 more memories to test.";echo "tr 71 M=PKT_ECN_TO_INT_CN_MAPPING Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_ECN_TO_INT_CN_MAPPING Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1857 echo "there are 297 more memories to test.";echo "tr 71 M=PKT_FLOW_CTRL_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_FLOW_CTRL_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1858 echo "there are 296 more memories to test.";echo "tr 71 M=PKT_FLOW_CTRL_STRENGTH_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_FLOW_CTRL_STRENGTH_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1859 echo "there are 295 more memories to test.";echo "tr 71 M=PKT_FLOW_CTRL_STRENGTH_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_FLOW_CTRL_STRENGTH_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1860 echo "there are 294 more memories to test.";echo "tr 71 M=PKT_FLOW_EXTRACTION_CTRL_ID_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_FLOW_EXTRACTION_CTRL_ID_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1861 echo "there are 293 more memories to test.";echo "tr 71 M=PKT_FLOW_L3_IIF_STRENGTH_PROFILE_1_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_FLOW_L3_IIF_STRENGTH_PROFILE_1_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1862 echo "there are 292 more memories to test.";echo "tr 71 M=PKT_FLOW_L3_IIF_STRENGTH_PROFILE_1_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_FLOW_L3_IIF_STRENGTH_PROFILE_1_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1863 echo "there are 291 more memories to test.";echo "tr 71 M=PKT_FLOW_OPAQUE_1_STRENGTH_PROFILE_1_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_FLOW_OPAQUE_1_STRENGTH_PROFILE_1_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1864 echo "there are 290 more memories to test.";echo "tr 71 M=PKT_FLOW_OPAQUE_1_STRENGTH_PROFILE_1_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_FLOW_OPAQUE_1_STRENGTH_PROFILE_1_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1865 echo "there are 289 more memories to test.";echo "tr 71 M=PKT_FLOW_OPAQUE_2_STRENGTH_PROFILE_1_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_FLOW_OPAQUE_2_STRENGTH_PROFILE_1_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1866 echo "there are 288 more memories to test.";echo "tr 71 M=PKT_FLOW_OPAQUE_2_STRENGTH_PROFILE_1_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_FLOW_OPAQUE_2_STRENGTH_PROFILE_1_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1867 echo "there are 287 more memories to test.";echo "tr 71 M=PKT_FLOW_OPAQUE_3_STRENGTH_PROFILE_1_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_FLOW_OPAQUE_3_STRENGTH_PROFILE_1_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1868 echo "there are 286 more memories to test.";echo "tr 71 M=PKT_FLOW_OPAQUE_3_STRENGTH_PROFILE_1_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_FLOW_OPAQUE_3_STRENGTH_PROFILE_1_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1869 echo "there are 285 more memories to test.";echo "tr 71 M=PKT_FLOW_OPAQUE_4_STRENGTH_PROFILE_1_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_FLOW_OPAQUE_4_STRENGTH_PROFILE_1_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1870 echo "there are 284 more memories to test.";echo "tr 71 M=PKT_FLOW_OPAQUE_4_STRENGTH_PROFILE_1_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_FLOW_OPAQUE_4_STRENGTH_PROFILE_1_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1871 echo "there are 283 more memories to test.";echo "tr 71 M=PKT_FLOW_SELECT_HVE_CONTROL_0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=PKT_FLOW_SELECT_HVE_CONTROL_0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1872 echo "there are 282 more memories to test.";echo "tr 71 M=PKT_FLOW_SELECT_HVE_CONTROL_1 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=PKT_FLOW_SELECT_HVE_CONTROL_1 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1873 echo "there are 281 more memories to test.";echo "tr 71 M=PKT_FLOW_SELECT_HVE_CONTROL_2 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=PKT_FLOW_SELECT_HVE_CONTROL_2 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1874 echo "there are 280 more memories to test.";echo "tr 71 M=PKT_FLOW_SELECT_MY_STATION_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_FLOW_SELECT_MY_STATION_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1875 echo "there are 279 more memories to test.";echo "tr 71 M=PKT_FLOW_SELECT_MY_STATION_PROFILE_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_FLOW_SELECT_MY_STATION_PROFILE_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1876 echo "there are 278 more memories to test.";echo "tr 71 M=PKT_FLOW_SELECT_TCAM_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_FLOW_SELECT_TCAM_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1877 echo "there are 277 more memories to test.";echo "tr 71 M=PKT_FLOW_SELECT_TCAM_0_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_FLOW_SELECT_TCAM_0_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1878 echo "there are 276 more memories to test.";echo "tr 71 M=PKT_FLOW_SELECT_TCAM_0_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_FLOW_SELECT_TCAM_0_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1879 echo "there are 275 more memories to test.";echo "tr 71 M=PKT_FLOW_SELECT_TCAM_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_FLOW_SELECT_TCAM_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1880 echo "there are 274 more memories to test.";echo "tr 71 M=PKT_FLOW_SELECT_TCAM_1_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_FLOW_SELECT_TCAM_1_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1881 echo "there are 273 more memories to test.";echo "tr 71 M=PKT_FLOW_SELECT_TCAM_1_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_FLOW_SELECT_TCAM_1_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1882 echo "there are 272 more memories to test.";echo "tr 71 M=PKT_FLOW_SELECT_TCAM_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_FLOW_SELECT_TCAM_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1883 echo "there are 271 more memories to test.";echo "tr 71 M=PKT_FLOW_SELECT_TCAM_2_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_FLOW_SELECT_TCAM_2_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1884 echo "there are 270 more memories to test.";echo "tr 71 M=PKT_FLOW_SELECT_TCAM_2_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_FLOW_SELECT_TCAM_2_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1885 echo "there are 269 more memories to test.";echo "tr 71 M=PKT_FLOW_SVP_STRENGTH_PROFILE_1_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_FLOW_SVP_STRENGTH_PROFILE_1_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1886 echo "there are 268 more memories to test.";echo "tr 71 M=PKT_FLOW_VFI_STRENGTH_PROFILE_1_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_FLOW_VFI_STRENGTH_PROFILE_1_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1887 echo "there are 267 more memories to test.";echo "tr 71 M=PKT_FLOW_VFI_STRENGTH_PROFILE_1_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_FLOW_VFI_STRENGTH_PROFILE_1_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1888 echo "there are 266 more memories to test.";echo "tr 71 M=PKT_FLOW_VLAN_STRENGTH_PROFILE_1_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_FLOW_VLAN_STRENGTH_PROFILE_1_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1889 echo "there are 265 more memories to test.";echo "tr 71 M=PKT_FLOW_VLAN_STRENGTH_PROFILE_1_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_FLOW_VLAN_STRENGTH_PROFILE_1_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1890 echo "there are 264 more memories to test.";echo "tr 71 M=PKT_FLOW_VRF_STRENGTH_PROFILE_1_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_FLOW_VRF_STRENGTH_PROFILE_1_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1891 echo "there are 263 more memories to test.";echo "tr 71 M=PKT_FLOW_VRF_STRENGTH_PROFILE_1_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_FLOW_VRF_STRENGTH_PROFILE_1_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1892 echo "there are 262 more memories to test.";echo "tr 71 M=PKT_FLOW_VSAN_STRENGTH_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_FLOW_VSAN_STRENGTH_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1893 echo "there are 261 more memories to test.";echo "tr 71 M=PKT_PROC_HDR_VALID_CHECK_PROFILE_1_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_PROC_HDR_VALID_CHECK_PROFILE_1_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1894 echo "there are 260 more memories to test.";echo "tr 71 M=PKT_PROC_HDR_VALID_CHECK_PROFILE_1_VALUE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_PROC_HDR_VALID_CHECK_PROFILE_1_VALUE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1895 echo "there are 259 more memories to test.";echo "tr 71 M=PKT_PROC_HDR_VALID_CHECK_PROFILE_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_PROC_HDR_VALID_CHECK_PROFILE_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1896 #echo "there are 258 more memories to test.";echo "tr 71 M=PKT_SCH_CALENDAR0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_SCH_CALENDAR0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1897 #echo "there are 257 more memories to test.";echo "tr 71 M=PKT_SCH_CALENDAR0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_SCH_CALENDAR0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1898 #echo "there are 256 more memories to test.";echo "tr 71 M=PKT_SCH_CALENDAR1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_SCH_CALENDAR1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1899 #echo "there are 255 more memories to test.";echo "tr 71 M=PKT_SCH_CALENDAR1_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PKT_SCH_CALENDAR1_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1900 echo "there are 254 more memories to test.";echo "tr 71 M=PORT_BRIDGE_BMAP Start=0 Count=0 SlamLowToHigh=0";tr 71 M=PORT_BRIDGE_BMAP Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1901 echo "there are 253 more memories to test.";echo "tr 71 M=PORT_BRIDGE_MIRROR_BMAP Start=0 Count=0 SlamLowToHigh=0";tr 71 M=PORT_BRIDGE_MIRROR_BMAP Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1902 echo "there are 252 more memories to test.";echo "tr 71 M=PORT_CBL_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PORT_CBL_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1903 echo "there are 251 more memories to test.";echo "tr 71 M=PORT_CBL_TABLE_MODBASE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PORT_CBL_TABLE_MODBASE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1904 echo "there are 250 more memories to test.";echo "tr 71 M=PORT_LAG_FAILOVER_SET Start=0 Count=1 SlamLowToHigh=0";tr 71 M=PORT_LAG_FAILOVER_SET Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1905 echo "there are 249 more memories to test.";echo "tr 71 M=Q_SCHED_L0_ACCUM_COMP_MEM_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=Q_SCHED_L0_ACCUM_COMP_MEM_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1906 echo "there are 248 more memories to test.";echo "tr 71 M=Q_SCHED_L0_CREDIT_MEM_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=Q_SCHED_L0_CREDIT_MEM_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1907 echo "there are 247 more memories to test.";echo "tr 71 M=Q_SCHED_L0_WEIGHT_MEM_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=Q_SCHED_L0_WEIGHT_MEM_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1908 echo "there are 246 more memories to test.";echo "tr 71 M=Q_SCHED_L1_ACCUM_COMP_MEM_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=Q_SCHED_L1_ACCUM_COMP_MEM_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1909 echo "there are 245 more memories to test.";echo "tr 71 M=Q_SCHED_L1_CREDIT_MEM_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=Q_SCHED_L1_CREDIT_MEM_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1910 echo "there are 244 more memories to test.";echo "tr 71 M=Q_SCHED_L1_WEIGHT_MEM_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=Q_SCHED_L1_WEIGHT_MEM_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1911 echo "there are 243 more memories to test.";echo "tr 71 M=RANDOM_RRLB_HG_TRUNK_MEMBER Start=0 Count=1 SlamLowToHigh=0";tr 71 M=RANDOM_RRLB_HG_TRUNK_MEMBER Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1912 echo "there are 242 more memories to test.";echo "tr 71 M=REPLICATION_FIFO_BANK0_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=REPLICATION_FIFO_BANK0_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1913 echo "there are 241 more memories to test.";echo "tr 71 M=REPLICATION_FIFO_BANK1_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=REPLICATION_FIFO_BANK1_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1914 echo "there are 240 more memories to test.";echo "tr 71 M=REPLICATION_FIFO_BANK2_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=REPLICATION_FIFO_BANK2_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1915 echo "there are 239 more memories to test.";echo "tr 71 M=RESPONSIVE_PROTOCOL_MATCH Start=0 Count=1 SlamLowToHigh=0";tr 71 M=RESPONSIVE_PROTOCOL_MATCH Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1916 echo "there are 238 more memories to test.";echo "tr 71 M=RH_ECMP_ETHERTYPE_ELIGIBILITY_MAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=RH_ECMP_ETHERTYPE_ELIGIBILITY_MAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1917 #echo "there are 237 more memories to test.";echo "tr 71 M=RH_ECMP_FLOWSET Start=0 Count=1 SlamLowToHigh=0";tr 71 M=RH_ECMP_FLOWSET Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1918 #echo "there are 236 more memories to test.";echo "tr 71 M=RH_ECMP_FLOWSET_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=RH_ECMP_FLOWSET_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1919 echo "there are 235 more memories to test.";echo "tr 71 M=RH_HGT_ETHERTYPE_ELIGIBILITY_MAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=RH_HGT_ETHERTYPE_ELIGIBILITY_MAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1920 #echo "there are 234 more memories to test.";echo "tr 71 M=RH_HGT_FLOWSET Start=0 Count=1 SlamLowToHigh=0";tr 71 M=RH_HGT_FLOWSET Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1921 #echo "there are 233 more memories to test.";echo "tr 71 M=RH_HGT_FLOWSET_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=RH_HGT_FLOWSET_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1922 echo "there are 232 more memories to test.";echo "tr 71 M=RH_LAG_ETHERTYPE_ELIGIBILITY_MAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=RH_LAG_ETHERTYPE_ELIGIBILITY_MAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1923 #echo "there are 231 more memories to test.";echo "tr 71 M=RH_LAG_FLOWSET Start=0 Count=1 SlamLowToHigh=0";tr 71 M=RH_LAG_FLOWSET Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1924 #echo "there are 230 more memories to test.";echo "tr 71 M=RH_LAG_FLOWSET_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=RH_LAG_FLOWSET_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1925 echo "there are 229 more memories to test.";echo "tr 71 M=RQE_FREE_LIST_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=RQE_FREE_LIST_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1926 echo "there are 228 more memories to test.";echo "tr 71 M=RQE_LINK_LIST_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=RQE_LINK_LIST_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1927 echo "there are 227 more memories to test.";echo "tr 71 M=RTAG7_FLOW_BASED_HASH Start=0 Count=1 SlamLowToHigh=0";tr 71 M=RTAG7_FLOW_BASED_HASH Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1928 echo "there are 226 more memories to test.";echo "tr 71 M=RTAG7_PORT_BASED_HASH Start=0 Count=1 SlamLowToHigh=0";tr 71 M=RTAG7_PORT_BASED_HASH Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1929 echo "there are 225 more memories to test.";echo "tr 71 M=RX_PROT_GROUP_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=RX_PROT_GROUP_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1930 echo "there are 224 more memories to test.";echo "tr 71 M=RX_PROT_GROUP_TABLE2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=RX_PROT_GROUP_TABLE2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1931 echo "there are 223 more memories to test.";echo "tr 71 M=SFLOW_ING_DATA_SOURCE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=SFLOW_ING_DATA_SOURCE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1932 echo "there are 222 more memories to test.";echo "tr 71 M=SFLOW_ING_FLEX_DATA_SOURCE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=SFLOW_ING_FLEX_DATA_SOURCE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1933 echo "there are 221 more memories to test.";echo "tr 71 M=SGPP_CTRL_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=SGPP_CTRL_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1934 echo "there are 220 more memories to test.";echo "tr 71 M=SGPP_CTRL_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=SGPP_CTRL_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1935 echo "there are 219 more memories to test.";echo "tr 71 M=SOURCE_TRUNK_MAP_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=SOURCE_TRUNK_MAP_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1936 echo "there are 218 more memories to test.";echo "tr 71 M=SOURCE_TRUNK_MAP_MODBASE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=SOURCE_TRUNK_MAP_MODBASE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1937 echo "there are 217 more memories to test.";echo "tr 71 M=SPECIAL_LABEL_CONTROL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=SPECIAL_LABEL_CONTROL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1938 echo "there are 216 more memories to test.";echo "tr 71 M=SRC_COMPRESSION Start=0 Count=1 SlamLowToHigh=0";tr 71 M=SRC_COMPRESSION Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1939 echo "there are 215 more memories to test.";echo "tr 71 M=SRC_COMPRESSION_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=SRC_COMPRESSION_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1940 echo "there are 214 more memories to test.";echo "tr 71 M=SRC_COMPRESSION_DATA_ONLY_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=SRC_COMPRESSION_DATA_ONLY_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1941 echo "there are 213 more memories to test.";echo "tr 71 M=SRC_COMPRESSION_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=SRC_COMPRESSION_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1942 echo "there are 212 more memories to test.";echo "tr 71 M=SRC_COMPRESSION_TCAM_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=SRC_COMPRESSION_TCAM_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1943 echo "there are 211 more memories to test.";echo "tr 71 M=SRC_COMPRESSION_TCAM_ONLY_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=SRC_COMPRESSION_TCAM_ONLY_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1944 echo "there are 210 more memories to test.";echo "tr 71 M=SRC_MODID_EGRESS Start=0 Count=1 SlamLowToHigh=0";tr 71 M=SRC_MODID_EGRESS Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1945 #echo "there are 209 more memories to test.";echo "tr 71 M=SRC_MODID_INGRESS_BLOCK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=SRC_MODID_INGRESS_BLOCK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1946 echo "there are 208 more memories to test.";echo "tr 71 M=STATS_INTF_QUEUE_LIST Start=0 Count=1 SlamLowToHigh=0";tr 71 M=STATS_INTF_QUEUE_LIST Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1947 echo "there are 207 more memories to test.";echo "tr 71 M=STATS_INTF_SERVPOOL_LIST Start=0 Count=1 SlamLowToHigh=0";tr 71 M=STATS_INTF_SERVPOOL_LIST Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1948 echo "there are 206 more memories to test.";echo "tr 71 M=SUBPORT_ID_TO_SGPP_MAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=SUBPORT_ID_TO_SGPP_MAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1949 echo "there are 205 more memories to test.";echo "tr 71 M=SUBPORT_ID_TO_SGPP_MAP_ACTION_TABLE_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=SUBPORT_ID_TO_SGPP_MAP_ACTION_TABLE_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1950 echo "there are 204 more memories to test.";echo "tr 71 M=SUBPORT_ID_TO_SGPP_MAP_ACTION_TABLE_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=SUBPORT_ID_TO_SGPP_MAP_ACTION_TABLE_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1951 echo "there are 203 more memories to test.";echo "tr 71 M=SUBPORT_ID_TO_SGPP_MAP_ECC Start=0 Count=1 SlamLowToHigh=0";tr 71 M=SUBPORT_ID_TO_SGPP_MAP_ECC Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1952 echo "there are 202 more memories to test.";echo "tr 71 M=SUBPORT_ID_TO_SGPP_MAP_KEY_ATTRIBUTES Start=0 Count=0 SlamLowToHigh=0";tr 71 M=SUBPORT_ID_TO_SGPP_MAP_KEY_ATTRIBUTES Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1953 echo "there are 201 more memories to test.";echo "tr 71 M=SUBPORT_ID_TO_SGPP_MAP_REMAP_TABLE_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=SUBPORT_ID_TO_SGPP_MAP_REMAP_TABLE_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1954 echo "there are 200 more memories to test.";echo "tr 71 M=SUBPORT_ID_TO_SGPP_MAP_REMAP_TABLE_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=SUBPORT_ID_TO_SGPP_MAP_REMAP_TABLE_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1955 echo "there are 199 more memories to test.";echo "tr 71 M=SOURCE_VP_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=SOURCE_VP_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1956 echo "there are 198 more memories to test.";echo "tr 71 M=SVP_ATTRS_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=SVP_ATTRS_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1957 echo "there are 197 more memories to test.";echo "tr 71 M=SOURCE_VP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=SOURCE_VP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1958 echo "there are 196 more memories to test.";echo "tr 71 M=SVP_CTRL_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=SVP_CTRL_PROFILE_0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1959 echo "there are 195 more memories to test.";echo "tr 71 M=SVP_CTRL_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=SVP_CTRL_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1960 echo "there are 194 more memories to test.";echo "tr 71 M=SVP_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=SVP_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1961 echo "there are 193 more memories to test.";echo "tr 71 M=SYS_PORTMAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=SYS_PORTMAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1962 echo "there are 192 more memories to test.";echo "tr 71 M=TCB_BUFFER_METADATA_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TCB_BUFFER_METADATA_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1963 echo "there are 191 more memories to test.";echo "tr 71 M=TCB_EVENT_BUFFER_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TCB_EVENT_BUFFER_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1964 echo "there are 190 more memories to test.";echo "tr 71 M=TCB_SCRATCH_BUFFER_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TCB_SCRATCH_BUFFER_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1965 echo "there are 189 more memories to test.";echo "tr 71 M=TCB_THRESHOLD_PROFILE_MAP_A_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TCB_THRESHOLD_PROFILE_MAP_A_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1966 echo "there are 188 more memories to test.";echo "tr 71 M=TCB_THRESHOLD_PROFILE_MAP_B_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TCB_THRESHOLD_PROFILE_MAP_B_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1967 echo "there are 187 more memories to test.";echo "tr 71 M=TCB_THRESHOLD_PROFILE_MAP_XPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TCB_THRESHOLD_PROFILE_MAP_XPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1968 echo "there are 186 more memories to test.";echo "tr 71 M=TCP_FN Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TCP_FN Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1969 echo "there are 185 more memories to test.";echo "tr 71 M=TCP_FN_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TCP_FN_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1970 echo "there are 184 more memories to test.";echo "tr 71 M=TDM_CALENDAR0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TDM_CALENDAR0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1971 echo "there are 183 more memories to test.";echo "tr 71 M=TDM_CALENDAR1_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TDM_CALENDAR1_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1972 echo "there are 182 more memories to test.";echo "tr 71 M=THDI_PKT_STAT_SP_SHARED_COUNT_XPE0 Start=0 Count=0 SlamLowToHigh=0";tr 71 M=THDI_PKT_STAT_SP_SHARED_COUNT_XPE0 Start=0 Count=0 SlamLowToHigh=0;echo "done"; 1973 echo "there are 181 more memories to test.";echo "tr 71 M=THDI_PORT_PG_BST_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=THDI_PORT_PG_BST_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1974 echo "there are 180 more memories to test.";echo "tr 71 M=THDI_PORT_PG_CNTRS_RT1_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=THDI_PORT_PG_CNTRS_RT1_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1975 echo "there are 179 more memories to test.";echo "tr 71 M=THDI_PORT_PG_CNTRS_RT2_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=THDI_PORT_PG_CNTRS_RT2_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1976 echo "there are 178 more memories to test.";echo "tr 71 M=THDI_PORT_PG_CNTRS_SH1_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=THDI_PORT_PG_CNTRS_SH1_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1977 echo "there are 177 more memories to test.";echo "tr 71 M=THDI_PORT_PG_CNTRS_SH2_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=THDI_PORT_PG_CNTRS_SH2_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1978 echo "there are 176 more memories to test.";echo "tr 71 M=THDI_PORT_PG_CONFIG_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=THDI_PORT_PG_CONFIG_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1979 echo "there are 175 more memories to test.";echo "tr 71 M=THDI_PORT_SP_BST_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=THDI_PORT_SP_BST_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1980 echo "there are 174 more memories to test.";echo "tr 71 M=THDI_PORT_SP_CNTRS_RT_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=THDI_PORT_SP_CNTRS_RT_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1981 echo "there are 173 more memories to test.";echo "tr 71 M=THDI_PORT_SP_CNTRS_SH_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=THDI_PORT_SP_CNTRS_SH_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1982 echo "there are 172 more memories to test.";echo "tr 71 M=THDI_PORT_SP_CONFIG0_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=THDI_PORT_SP_CONFIG0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1983 echo "there are 171 more memories to test.";echo "tr 71 M=THDI_PORT_SP_CONFIG1_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=THDI_PORT_SP_CONFIG1_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1984 echo "there are 170 more memories to test.";echo "tr 71 M=THDI_PORT_SP_CONFIG2_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=THDI_PORT_SP_CONFIG2_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1985 echo "there are 169 more memories to test.";echo "tr 71 M=THDI_PORT_SP_CONFIG_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=THDI_PORT_SP_CONFIG_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1986 echo "there are 168 more memories to test.";echo "tr 71 M=TOS_FN Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TOS_FN Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1987 echo "there are 167 more memories to test.";echo "tr 71 M=TOS_FN_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TOS_FN_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1988 echo "there are 166 more memories to test.";echo "tr 71 M=TRUNK_BITMAP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TRUNK_BITMAP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1989 echo "there are 165 more memories to test.";echo "tr 71 M=TRUNK_CBL_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TRUNK_CBL_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1990 echo "there are 164 more memories to test.";echo "tr 71 M=TRUNK_GROUP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TRUNK_GROUP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1991 echo "there are 163 more memories to test.";echo "tr 71 M=TRUNK_RR_CNT Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TRUNK_RR_CNT Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1992 echo "there are 162 more memories to test.";echo "tr 71 M=TRUNK_RR_CNT_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TRUNK_RR_CNT_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1993 echo "there are 161 more memories to test.";echo "tr 71 M=TRUNK_MEMBER Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TRUNK_MEMBER Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1994 echo "there are 160 more memories to test.";echo "tr 71 M=TTL_FN Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TTL_FN Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1995 echo "there are 159 more memories to test.";echo "tr 71 M=TTL_FN_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TTL_FN_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1996 echo "there are 158 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_1_ACTION_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_1_ACTION_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1997 echo "there are 157 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_1_FIXED_KEY_TABLE_ATTRS Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_1_FIXED_KEY_TABLE_ATTRS Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1998 echo "there are 156 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_1_KEY_GEN_1_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_1_KEY_GEN_1_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 1999 echo "there are 155 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_1_KEY_GEN_1_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_1_KEY_GEN_1_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2000 echo "there are 154 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_1_KEY_GEN_2_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_1_KEY_GEN_2_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2001 echo "there are 153 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_1_KEY_GEN_2_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_1_KEY_GEN_2_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2002 echo "there are 152 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_1_LOGICAL_TBL_SEL_SRAM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_1_LOGICAL_TBL_SEL_SRAM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2003 echo "there are 151 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_1_LOGICAL_TBL_SEL_TCAM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_1_LOGICAL_TBL_SEL_TCAM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2004 echo "there are 150 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_1_MISS_POLICY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_1_MISS_POLICY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2005 echo "there are 149 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_1_POLICY_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_1_POLICY_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2006 echo "there are 148 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_2_ACTION_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_2_ACTION_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2007 echo "there are 147 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_2_FIXED_KEY_TABLE_ATTRS Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_2_FIXED_KEY_TABLE_ATTRS Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2008 echo "there are 146 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_2_KEY_GEN_1_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_2_KEY_GEN_1_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2009 echo "there are 145 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_2_KEY_GEN_1_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_2_KEY_GEN_1_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2010 echo "there are 144 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_2_KEY_GEN_2_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_2_KEY_GEN_2_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2011 echo "there are 143 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_2_KEY_GEN_2_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_2_KEY_GEN_2_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2012 echo "there are 142 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_2_LOGICAL_TBL_SEL_SRAM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_2_LOGICAL_TBL_SEL_SRAM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2013 echo "there are 141 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_2_LOGICAL_TBL_SEL_TCAM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_2_LOGICAL_TBL_SEL_TCAM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2014 echo "there are 140 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_2_MISS_POLICY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_2_MISS_POLICY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2015 echo "there are 139 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_2_POLICY_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_2_POLICY_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2016 echo "there are 138 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_3_ACTION_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_3_ACTION_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2017 echo "there are 137 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_3_FIXED_KEY_TABLE_ATTRS Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_3_FIXED_KEY_TABLE_ATTRS Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2018 echo "there are 136 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_3_KEY_GEN_1_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_3_KEY_GEN_1_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2019 echo "there are 135 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_3_KEY_GEN_1_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_3_KEY_GEN_1_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2020 echo "there are 134 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_3_KEY_GEN_2_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_3_KEY_GEN_2_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2021 echo "there are 133 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_3_KEY_GEN_2_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_3_KEY_GEN_2_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2022 echo "there are 132 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_3_KEY_GEN_3_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_3_KEY_GEN_3_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2023 echo "there are 131 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_3_KEY_GEN_3_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_3_KEY_GEN_3_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2024 echo "there are 130 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_3_LOGICAL_TBL_SEL_SRAM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_3_LOGICAL_TBL_SEL_SRAM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2025 echo "there are 129 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_3_LOGICAL_TBL_SEL_TCAM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_3_LOGICAL_TBL_SEL_TCAM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2026 echo "there are 128 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_3_MISS_POLICY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_3_MISS_POLICY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2027 echo "there are 127 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_3_POLICY_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_3_POLICY_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2028 echo "there are 126 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_4_ACTION_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_4_ACTION_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2029 echo "there are 125 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_4_FIXED_KEY_TABLE_ATTRS Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_4_FIXED_KEY_TABLE_ATTRS Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2030 echo "there are 124 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_4_KEY_GEN_1_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_4_KEY_GEN_1_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2031 echo "there are 123 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_4_KEY_GEN_1_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_4_KEY_GEN_1_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2032 echo "there are 122 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_4_KEY_GEN_2_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_4_KEY_GEN_2_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2033 echo "there are 121 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_4_KEY_GEN_2_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_4_KEY_GEN_2_MUX_CTRL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2034 echo "there are 120 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_4_LOGICAL_TBL_SEL_SRAM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_4_LOGICAL_TBL_SEL_SRAM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2035 echo "there are 119 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_4_LOGICAL_TBL_SEL_TCAM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_4_LOGICAL_TBL_SEL_TCAM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2036 echo "there are 118 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_4_MISS_POLICY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_4_MISS_POLICY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2037 echo "there are 117 more memories to test.";echo "tr 71 M=TUNNEL_ADAPT_4_POLICY_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TUNNEL_ADAPT_4_POLICY_STRENGTH_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2038 echo "there are 116 more memories to test.";echo "tr 71 M=TX_INITIAL_PROT_GROUP_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=TX_INITIAL_PROT_GROUP_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2039 echo "there are 115 more memories to test.";echo "tr 71 M=UAT_EXTRACTION_CTRL_ID_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=UAT_EXTRACTION_CTRL_ID_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2040 echo "there are 114 more memories to test.";echo "tr 71 M=UFT_EXTRACTION_CTRL_ID_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=UFT_EXTRACTION_CTRL_ID_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2041 echo "there are 113 more memories to test.";echo "tr 71 M=UNKNOWN_MCAST_BLOCK_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=UNKNOWN_MCAST_BLOCK_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2042 echo "there are 112 more memories to test.";echo "tr 71 M=UNKNOWN_UCAST_BLOCK_MASK Start=0 Count=1 SlamLowToHigh=0";tr 71 M=UNKNOWN_UCAST_BLOCK_MASK Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2043 echo "there are 111 more memories to test.";echo "tr 71 M=VFI_ATTRS_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VFI_ATTRS_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2044 echo "there are 110 more memories to test.";echo "tr 71 M=VFI Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VFI Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2045 echo "there are 109 more memories to test.";echo "tr 71 M=VFI_CTRL_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VFI_CTRL_PROFILE_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2046 echo "there are 108 more memories to test.";echo "tr 71 M=VFI_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VFI_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2047 echo "there are 107 more memories to test.";echo "tr 71 M=VFI_PROFILE_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VFI_PROFILE_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2048 echo "there are 106 more memories to test.";echo "tr 71 M=VFP_HASH_FIELD_BMAP_TABLE_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VFP_HASH_FIELD_BMAP_TABLE_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2049 echo "there are 105 more memories to test.";echo "tr 71 M=VFP_HASH_FIELD_BMAP_TABLE_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VFP_HASH_FIELD_BMAP_TABLE_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2050 echo "there are 104 more memories to test.";echo "tr 71 M=VFP_POLICY_TABLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VFP_POLICY_TABLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2051 echo "there are 103 more memories to test.";echo "tr 71 M=VFP_POLICY_TABLE_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VFP_POLICY_TABLE_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2052 echo "there are 102 more memories to test.";echo "tr 71 M=VFP_TCAM Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VFP_TCAM Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2053 echo "there are 101 more memories to test.";echo "tr 71 M=VFP_TCAM_PIPE0 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VFP_TCAM_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2054 echo "there are 100 more memories to test.";echo "tr 71 M=VLAN_ATTRS_1 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VLAN_ATTRS_1 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2055 echo "there are 99 more memories to test.";echo "tr 71 M=VLAN_TAB Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VLAN_TAB Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2056 echo "there are 98 more memories to test.";echo "tr 71 M=VLAN_PROFILE_TAB Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VLAN_PROFILE_TAB Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2057 echo "there are 97 more memories to test.";echo "tr 71 M=VLAN_PROFILE_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VLAN_PROFILE_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2058 echo "there are 96 more memories to test.";echo "tr 71 M=VLAN_PROTOCOL Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VLAN_PROTOCOL Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2059 echo "there are 95 more memories to test.";echo "tr 71 M=VLAN_PROTOCOL_DATA Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VLAN_PROTOCOL_DATA Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2060 echo "there are 94 more memories to test.";echo "tr 71 M=STG_TAB Start=0 Count=1 SlamLowToHigh=0";tr 71 M=STG_TAB Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2061 echo "there are 93 more memories to test.";echo "tr 71 M=VLAN_SUBNET Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VLAN_SUBNET Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2062 echo "there are 92 more memories to test.";echo "tr 71 M=VLAN_SUBNET_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VLAN_SUBNET_DATA_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2063 echo "there are 91 more memories to test.";echo "tr 71 M=VLAN_SUBNET_ONLY Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VLAN_SUBNET_ONLY Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2064 echo "there are 90 more memories to test.";echo "tr 71 M=VLAN_XLATE_1_ACTION_TABLE_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VLAN_XLATE_1_ACTION_TABLE_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2065 echo "there are 89 more memories to test.";echo "tr 71 M=VLAN_XLATE_1_ACTION_TABLE_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VLAN_XLATE_1_ACTION_TABLE_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2066 echo "there are 88 more memories to test.";echo "tr 71 M=VLAN_XLATE_1_DOUBLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VLAN_XLATE_1_DOUBLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2067 echo "there are 87 more memories to test.";echo "tr 71 M=VLAN_XLATE_1_ECC Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VLAN_XLATE_1_ECC Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2068 echo "there are 86 more memories to test.";echo "tr 71 M=VLAN_XLATE_1_KEY_ATTRIBUTES Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VLAN_XLATE_1_KEY_ATTRIBUTES Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2069 echo "there are 85 more memories to test.";echo "tr 71 M=VLAN_XLATE_1_LP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VLAN_XLATE_1_LP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2070 echo "there are 84 more memories to test.";echo "tr 71 M=VLAN_XLATE_1_REMAP_TABLE_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VLAN_XLATE_1_REMAP_TABLE_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2071 echo "there are 83 more memories to test.";echo "tr 71 M=VLAN_XLATE_1_REMAP_TABLE_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VLAN_XLATE_1_REMAP_TABLE_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2072 #echo "there are 82 more memories to test.";echo "tr 71 M=VLAN_XLATE_1_SINGLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VLAN_XLATE_1_SINGLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2073 echo "there are 81 more memories to test.";echo "tr 71 M=VLAN_XLATE_2_ACTION_TABLE_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VLAN_XLATE_2_ACTION_TABLE_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2074 echo "there are 80 more memories to test.";echo "tr 71 M=VLAN_XLATE_2_ACTION_TABLE_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VLAN_XLATE_2_ACTION_TABLE_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2075 echo "there are 79 more memories to test.";echo "tr 71 M=VLAN_XLATE_2_DOUBLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VLAN_XLATE_2_DOUBLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2076 echo "there are 78 more memories to test.";echo "tr 71 M=VLAN_XLATE_2_ECC Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VLAN_XLATE_2_ECC Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2077 echo "there are 77 more memories to test.";echo "tr 71 M=VLAN_XLATE_2_KEY_ATTRIBUTES Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VLAN_XLATE_2_KEY_ATTRIBUTES Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2078 echo "there are 76 more memories to test.";echo "tr 71 M=VLAN_XLATE_2_LP Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VLAN_XLATE_2_LP Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2079 echo "there are 75 more memories to test.";echo "tr 71 M=VLAN_XLATE_2_REMAP_TABLE_A Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VLAN_XLATE_2_REMAP_TABLE_A Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2080 echo "there are 74 more memories to test.";echo "tr 71 M=VLAN_XLATE_2_REMAP_TABLE_B Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VLAN_XLATE_2_REMAP_TABLE_B Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2081 #echo "there are 73 more memories to test.";echo "tr 71 M=VLAN_XLATE_2_SINGLE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VLAN_XLATE_2_SINGLE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2082 echo "there are 72 more memories to test.";echo "tr 71 M=VRF_ATTRS_2 Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VRF_ATTRS_2 Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2083 echo "there are 71 more memories to test.";echo "tr 71 M=VRF_PROFILE Start=0 Count=1 SlamLowToHigh=0";tr 71 M=VRF_PROFILE Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2084 #echo "there are 70 more memories to test.";echo "tr 71 M=XLPORT_WC_UCMEM_DATA Start=0 Count=1 SlamLowToHigh=0";tr 71 M=XLPORT_WC_UCMEM_DATA Start=0 Count=1 SlamLowToHigh=0;echo "done"; 2085 #----------------------------NOTEST memories------------------------------------------------------------------ 2086 #echo 'there are 69 more memories to test.';echo 'tr 71 M=DLB_HGT_LAG_PORT_STATE Start=0 Count=1 SlamLowToHigh=0';tr 71 M=DLB_HGT_LAG_PORT_STATE Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2087 #echo 'there are 68 more memories to test.';echo 'tr 71 M=EDB_1DBG_B Start=0 Count=1 SlamLowToHigh=0';tr 71 M=EDB_1DBG_B Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2088 #echo 'there are 67 more memories to test.';echo 'tr 71 M=EGR_VLAN_XLATE_1_HASH_CONTROL Start=0 Count=1 SlamLowToHigh=0';tr 71 M=EGR_VLAN_XLATE_1_HASH_CONTROL Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2089 #echo 'there are 66 more memories to test.';echo 'tr 71 M=EGR_VLAN_XLATE_2_HASH_CONTROL Start=0 Count=1 SlamLowToHigh=0';tr 71 M=EGR_VLAN_XLATE_2_HASH_CONTROL Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2090 #echo 'there are 65 more memories to test.';echo 'tr 71 M=EGR_VP_VLAN_MEMBERSHIP_HASH_CONTROL Start=0 Count=1 SlamLowToHigh=0';tr 71 M=EGR_VP_VLAN_MEMBERSHIP_HASH_CONTROL Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2091 #echo 'there are 64 more memories to test.';echo 'tr 71 M=EP_UAT_SHARED_BANKS_CONTROL Start=0 Count=1 SlamLowToHigh=0';tr 71 M=EP_UAT_SHARED_BANKS_CONTROL Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2092 #echo 'there are 63 more memories to test.';echo 'tr 71 M=EXACT_MATCH_HASH_CONTROL Start=0 Count=1 SlamLowToHigh=0';tr 71 M=EXACT_MATCH_HASH_CONTROL Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2093 #echo 'there are 62 more memories to test.';echo 'tr 71 M=EXACT_MATCH_HASH_CONTROL_PIPE0 Start=0 Count=1 SlamLowToHigh=0';tr 71 M=EXACT_MATCH_HASH_CONTROL_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2094 #echo 'there are 61 more memories to test.';echo 'tr 71 M=ING_DNAT_ADDRESS_TYPE_HASH_CONTROL Start=0 Count=1 SlamLowToHigh=0';tr 71 M=ING_DNAT_ADDRESS_TYPE_HASH_CONTROL Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2095 #echo 'there are 60 more memories to test.';echo 'tr 71 M=ING_VP_VLAN_MEMBERSHIP_HASH_CONTROL Start=0 Count=1 SlamLowToHigh=0';tr 71 M=ING_VP_VLAN_MEMBERSHIP_HASH_CONTROL Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2096 #echo 'there are 59 more memories to test.';echo 'tr 71 M=IP_UAT_16K_SHARED_BANKS_CONTROL Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IP_UAT_16K_SHARED_BANKS_CONTROL Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2097 #echo 'there are 58 more memories to test.';echo 'tr 71 M=IP_UAT_8K_SHARED_BANKS_CONTROL Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IP_UAT_8K_SHARED_BANKS_CONTROL Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2098 #echo 'there are 57 more memories to test.';echo 'tr 71 M=L2_ENTRY_HASH_CONTROL Start=0 Count=1 SlamLowToHigh=0';tr 71 M=L2_ENTRY_HASH_CONTROL Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2099 #echo 'there are 56 more memories to test.';echo 'tr 71 M=L3_ENTRY_HASH_CONTROL Start=0 Count=1 SlamLowToHigh=0';tr 71 M=L3_ENTRY_HASH_CONTROL Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2100 #echo 'there are 55 more memories to test.';echo 'tr 71 M=LINK_STATUS Start=0 Count=1 SlamLowToHigh=0';tr 71 M=LINK_STATUS Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2101 #echo 'there are 54 more memories to test.';echo 'tr 71 M=MPLS_ENTRY_HASH_CONTROL Start=0 Count=1 SlamLowToHigh=0';tr 71 M=MPLS_ENTRY_HASH_CONTROL Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2102 #echo 'there are 53 more memories to test.';echo 'tr 71 M=SUBPORT_ID_TO_SGPP_MAP_HASH_CONTROL Start=0 Count=1 SlamLowToHigh=0';tr 71 M=SUBPORT_ID_TO_SGPP_MAP_HASH_CONTROL Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2103 #echo 'there are 52 more memories to test.';echo 'tr 71 M=UFT_SHARED_BANKS_CONTROL Start=0 Count=1 SlamLowToHigh=0';tr 71 M=UFT_SHARED_BANKS_CONTROL Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2104 #echo 'there are 51 more memories to test.';echo 'tr 71 M=VLAN_XLATE_1_HASH_CONTROL Start=0 Count=1 SlamLowToHigh=0';tr 71 M=VLAN_XLATE_1_HASH_CONTROL Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2105 #echo 'there are 50 more memories to test.';echo 'tr 71 M=VLAN_XLATE_2_HASH_CONTROL Start=0 Count=1 SlamLowToHigh=0';tr 71 M=VLAN_XLATE_2_HASH_CONTROL Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2106 #---------------------------- READONLY memories----------------------------------------------------------------- 2107 #echo 'there are 49 more memories to test.';echo 'tr 71 M=DLB_ECMP_PORT_STATE Start=0 Count=1 SlamLowToHigh=0';tr 71 M=DLB_ECMP_PORT_STATE Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2108 #echo 'there are 48 more memories to test.';echo 'tr 71 M=EGR_MAX_USED_ENTRIES Start=0 Count=1 SlamLowToHigh=0';tr 71 M=EGR_MAX_USED_ENTRIES Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2109 #echo 'there are 47 more memories to test.';echo 'tr 71 M=EGR_MMU_REQUESTS Start=0 Count=1 SlamLowToHigh=0';tr 71 M=EGR_MMU_REQUESTS Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2110 #echo 'there are 46 more memories to test.';echo 'tr 71 M=EGR_PORT_REQUESTS Start=0 Count=1 SlamLowToHigh=0';tr 71 M=EGR_PORT_REQUESTS Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2111 #echo 'there are 45 more memories to test.';echo 'tr 71 M=MMU_MTRO_EGRMETERINGBUCKET_MEM Start=0 Count=1 SlamLowToHigh=0';tr 71 M=MMU_MTRO_EGRMETERINGBUCKET_MEM Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2112 #echo 'there are 44 more memories to test.';echo 'tr 71 M=MMU_MTRO_EGRMETERINGBUCKET_MEM_PIPE0 Start=0 Count=1 SlamLowToHigh=0';tr 71 M=MMU_MTRO_EGRMETERINGBUCKET_MEM_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2113 #echo 'there are 43 more memories to test.';echo 'tr 71 M=MMU_THDU_UCQ_STATS_TABLE Start=0 Count=1 SlamLowToHigh=0';tr 71 M=MMU_THDU_UCQ_STATS_TABLE Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2114 #echo 'there are 42 more memories to test.';echo 'tr 71 M=MMU_THDU_UCQ_STATS_TABLE_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0';tr 71 M=MMU_THDU_UCQ_STATS_TABLE_XPE0_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2115 #---------------------------- VENDOR memories----------------------------------------------------------------- 2116 #echo 'there are 41 more memories to test.';echo 'tr 71 M=IDB_OBM0_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM0_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2117 #echo 'there are 40 more memories to test.';echo 'tr 71 M=IDB_OBM0_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM0_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2118 #echo 'there are 39 more memories to test.';echo 'tr 71 M=IDB_OBM10_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM10_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2119 #echo 'there are 38 more memories to test.';echo 'tr 71 M=IDB_OBM10_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM10_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2120 #echo 'there are 37 more memories to test.';echo 'tr 71 M=IDB_OBM11_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM11_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2121 #echo 'there are 36 more memories to test.';echo 'tr 71 M=IDB_OBM11_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM11_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2122 #echo 'there are 35 more memories to test.';echo 'tr 71 M=IDB_OBM12_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM12_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2123 #echo 'there are 34 more memories to test.';echo 'tr 71 M=IDB_OBM12_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM12_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2124 #echo 'there are 33 more memories to test.';echo 'tr 71 M=IDB_OBM13_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM13_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2125 #echo 'there are 32 more memories to test.';echo 'tr 71 M=IDB_OBM13_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM13_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2126 #echo 'there are 31 more memories to test.';echo 'tr 71 M=IDB_OBM14_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM14_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2127 #echo 'there are 30 more memories to test.';echo 'tr 71 M=IDB_OBM14_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM14_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2128 #echo 'there are 29 more memories to test.';echo 'tr 71 M=IDB_OBM15_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM15_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2129 #echo 'there are 28 more memories to test.';echo 'tr 71 M=IDB_OBM15_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM15_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2130 #echo 'there are 27 more memories to test.';echo 'tr 71 M=IDB_OBM16_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM16_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2131 #echo 'there are 26 more memories to test.';echo 'tr 71 M=IDB_OBM16_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM16_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2132 #echo 'there are 25 more memories to test.';echo 'tr 71 M=IDB_OBM17_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM17_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2133 #echo 'there are 24 more memories to test.';echo 'tr 71 M=IDB_OBM17_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM17_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2134 #echo 'there are 23 more memories to test.';echo 'tr 71 M=IDB_OBM18_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM18_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2135 #echo 'there are 22 more memories to test.';echo 'tr 71 M=IDB_OBM18_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM18_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2136 #echo 'there are 21 more memories to test.';echo 'tr 71 M=IDB_OBM19_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM19_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2137 #echo 'there are 20 more memories to test.';echo 'tr 71 M=IDB_OBM19_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM19_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2138 #echo 'there are 19 more memories to test.';echo 'tr 71 M=IDB_OBM1_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM1_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2139 #echo 'there are 18 more memories to test.';echo 'tr 71 M=IDB_OBM1_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM1_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2140 #echo 'there are 17 more memories to test.';echo 'tr 71 M=IDB_OBM2_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM2_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2141 #echo 'there are 16 more memories to test.';echo 'tr 71 M=IDB_OBM2_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM2_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2142 #echo 'there are 15 more memories to test.';echo 'tr 71 M=IDB_OBM3_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM3_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2143 #echo 'there are 14 more memories to test.';echo 'tr 71 M=IDB_OBM3_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM3_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2144 #echo 'there are 13 more memories to test.';echo 'tr 71 M=IDB_OBM4_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM4_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2145 #echo 'there are 12 more memories to test.';echo 'tr 71 M=IDB_OBM4_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM4_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2146 #echo 'there are 11 more memories to test.';echo 'tr 71 M=IDB_OBM5_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM5_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2147 #echo 'there are 10 more memories to test.';echo 'tr 71 M=IDB_OBM5_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM5_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2148 #echo 'there are 9 more memories to test.';echo 'tr 71 M=IDB_OBM6_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM6_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2149 #echo 'there are 8 more memories to test.';echo 'tr 71 M=IDB_OBM6_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM6_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2150 #echo 'there are 7 more memories to test.';echo 'tr 71 M=IDB_OBM7_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM7_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2151 #echo 'there are 6 more memories to test.';echo 'tr 71 M=IDB_OBM7_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM7_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2152 #echo 'there are 5 more memories to test.';echo 'tr 71 M=IDB_OBM8_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM8_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2153 #echo 'there are 4 more memories to test.';echo 'tr 71 M=IDB_OBM8_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM8_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2154 #echo 'there are 3 more memories to test.';echo 'tr 71 M=IDB_OBM9_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM9_IOM_STATS_WINDOW_RESULTS Start=0 Count=1 SlamLowToHigh=0;echo 'done'; 2155 #echo 'there are 2 more memories to test.';echo 'tr 71 M=IDB_OBM9_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0';tr 71 M=IDB_OBM9_IOM_STATS_WINDOW_RESULTS_PIPE0 Start=0 Count=1 SlamLowToHigh=0;echo 'done';