tr52_bcm56270_a0.soc (109060B)
1 # 2 # This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 3 # 4 # Copyright 2007-2019 Broadcom Inc. All rights reserved. 5 6 counter off 7 l2mode off 8 linkscan off 9 memscan off 10 config add parity_enable=0 11 init soc 12 init misc 13 init mmu 14 # required for OAMP memories 15 s OAMP_ENABLE_DYNAMIC_MEMORY_ACCESS ENABLE_DYNAMIC_MEMORY_ACCESS=1 16 17 echo "there are 635 more memories to test.";echo "tr 52 M=ALTERNATE_EMIRROR_BITMAP IS=min IE=4 ITERations=1";tr 52 M=ALTERNATE_EMIRROR_BITMAP IS=min IE=4 ITERations=1;echo "done"; 18 echo "there are 634 more memories to test.";echo "tr 52 M=BCAST_BLOCK_MASK IS=min IE=4 ITERations=1";tr 52 M=BCAST_BLOCK_MASK IS=min IE=4 ITERations=1;echo "done"; 19 echo "there are 633 more memories to test.";echo "tr 52 M=PORT_COS_MAP IS=min IE=4 ITERations=1";tr 52 M=PORT_COS_MAP IS=min IE=4 ITERations=1;echo "done"; 20 echo "there are 632 more memories to test.";echo "tr 52 M=COS_MAP_SEL IS=min IE=4 ITERations=1";tr 52 M=COS_MAP_SEL IS=min IE=4 ITERations=1;echo "done"; 21 echo "there are 631 more memories to test.";echo "tr 52 M=CPU_COS_MAP IS=min IE=4 ITERations=1";tr 52 M=CPU_COS_MAP IS=min IE=4 ITERations=1;echo "done"; 22 echo "there are 630 more memories to test.";echo "tr 52 M=CPU_COS_MAP_DATA_ONLY IS=min IE=4 ITERations=1";tr 52 M=CPU_COS_MAP_DATA_ONLY IS=min IE=4 ITERations=1;echo "done"; 23 echo "there are 629 more memories to test.";echo "tr 52 M=CPU_COS_MAP_ONLY IS=min IE=4 ITERations=1";tr 52 M=CPU_COS_MAP_ONLY IS=min IE=4 ITERations=1;echo "done"; 24 #echo "there are 628 more memories to test.";echo "tr 52 M=CPU_PBM IS=min IE=0 ITERations=1";tr 52 M=CPU_PBM IS=min IE=0 ITERations=1;echo "done"; 25 #echo "there are 627 more memories to test.";echo "tr 52 M=CPU_PBM_2 IS=min IE=0 ITERations=1";tr 52 M=CPU_PBM_2 IS=min IE=0 ITERations=1;echo "done"; 26 echo "there are 626 more memories to test.";echo "tr 52 M=CPU_TS_MAP IS=min IE=4 ITERations=1";tr 52 M=CPU_TS_MAP IS=min IE=4 ITERations=1;echo "done"; 27 echo "there are 625 more memories to test.";echo "tr 52 M=CTR_DEQ_STATUS_MEM IS=min IE=4 ITERations=1";tr 52 M=CTR_DEQ_STATUS_MEM IS=min IE=4 ITERations=1;echo "done"; 28 echo "there are 624 more memories to test.";echo "tr 52 M=CTR_FLEX_COUNT_0 IS=min IE=4 ITERations=1";tr 52 M=CTR_FLEX_COUNT_0 IS=min IE=4 ITERations=1;echo "done"; 29 echo "there are 623 more memories to test.";echo "tr 52 M=CTR_FLEX_COUNT_1 IS=min IE=4 ITERations=1";tr 52 M=CTR_FLEX_COUNT_1 IS=min IE=4 ITERations=1;echo "done"; 30 echo "there are 622 more memories to test.";echo "tr 52 M=CTR_FLEX_COUNT_2 IS=min IE=4 ITERations=1";tr 52 M=CTR_FLEX_COUNT_2 IS=min IE=4 ITERations=1;echo "done"; 31 echo "there are 621 more memories to test.";echo "tr 52 M=CTR_FLEX_COUNT_3 IS=min IE=4 ITERations=1";tr 52 M=CTR_FLEX_COUNT_3 IS=min IE=4 ITERations=1;echo "done"; 32 echo "there are 620 more memories to test.";echo "tr 52 M=DEVICE_STREAM_ID_TO_PP_PORT_MAP IS=min IE=4 ITERations=1";tr 52 M=DEVICE_STREAM_ID_TO_PP_PORT_MAP IS=min IE=4 ITERations=1;echo "done"; 33 echo "there are 619 more memories to test.";echo "tr 52 M=DSCP_TABLE IS=min IE=4 ITERations=1";tr 52 M=DSCP_TABLE IS=min IE=4 ITERations=1;echo "done"; 34 echo "there are 618 more memories to test.";echo "tr 52 M=E2E_HOL_STATUS IS=min IE=4 ITERations=1";tr 52 M=E2E_HOL_STATUS IS=min IE=4 ITERations=1;echo "done"; 35 echo "there are 617 more memories to test.";echo "tr 52 M=E2E_HOL_STATUS_1 IS=min IE=4 ITERations=1";tr 52 M=E2E_HOL_STATUS_1 IS=min IE=4 ITERations=1;echo "done"; 36 echo "there are 616 more memories to test.";echo "tr 52 M=EFP_COUNTER_TABLE IS=min IE=4 ITERations=1";tr 52 M=EFP_COUNTER_TABLE IS=min IE=4 ITERations=1;echo "done"; 37 echo "there are 615 more memories to test.";echo "tr 52 M=EFP_METER_TABLE IS=min IE=4 ITERations=1";tr 52 M=EFP_METER_TABLE IS=min IE=4 ITERations=1;echo "done"; 38 echo "there are 614 more memories to test.";echo "tr 52 M=EFP_POLICY_TABLE IS=min IE=4 ITERations=1";tr 52 M=EFP_POLICY_TABLE IS=min IE=4 ITERations=1;echo "done"; 39 echo "there are 613 more memories to test.";echo "tr 52 M=EFP_TCAM IS=min IE=4 ITERations=1";tr 52 M=EFP_TCAM IS=min IE=4 ITERations=1;echo "done"; 40 echo "there are 612 more memories to test.";echo "tr 52 M=EGR_1588_SA IS=min IE=4 ITERations=1";tr 52 M=EGR_1588_SA IS=min IE=4 ITERations=1;echo "done"; 41 echo "there are 611 more memories to test.";echo "tr 52 M=EGR_COS_MAP IS=min IE=4 ITERations=1";tr 52 M=EGR_COS_MAP IS=min IE=4 ITERations=1;echo "done"; 42 echo "there are 610 more memories to test.";echo "tr 52 M=EGR_CPU_COS_MAP IS=min IE=4 ITERations=1";tr 52 M=EGR_CPU_COS_MAP IS=min IE=4 ITERations=1;echo "done"; 43 #echo "there are 609 more memories to test.";echo "tr 52 M=EGR_DNX_HEADER IS=min IE=0 ITERations=1";tr 52 M=EGR_DNX_HEADER IS=min IE=0 ITERations=1;echo "done"; 44 echo "there are 608 more memories to test.";echo "tr 52 M=EGR_DSCP_ECN_MAP IS=min IE=4 ITERations=1";tr 52 M=EGR_DSCP_ECN_MAP IS=min IE=4 ITERations=1;echo "done"; 45 echo "there are 607 more memories to test.";echo "tr 52 M=EGR_DSCP_TABLE IS=min IE=4 ITERations=1";tr 52 M=EGR_DSCP_TABLE IS=min IE=4 ITERations=1;echo "done"; 46 echo "there are 606 more memories to test.";echo "tr 52 M=EGR_DVP_ATTRIBUTE IS=min IE=4 ITERations=1";tr 52 M=EGR_DVP_ATTRIBUTE IS=min IE=4 ITERations=1;echo "done"; 47 echo "there are 605 more memories to test.";echo "tr 52 M=EGR_EM_MTP_INDEX IS=min IE=4 ITERations=1";tr 52 M=EGR_EM_MTP_INDEX IS=min IE=4 ITERations=1;echo "done"; 48 echo "there are 604 more memories to test.";echo "tr 52 M=EGR_ENABLE IS=min IE=4 ITERations=1";tr 52 M=EGR_ENABLE IS=min IE=4 ITERations=1;echo "done"; 49 echo "there are 603 more memories to test.";echo "tr 52 M=EGR_EP_REDIRECT_EM_MTP_INDEX IS=min IE=4 ITERations=1";tr 52 M=EGR_EP_REDIRECT_EM_MTP_INDEX IS=min IE=4 ITERations=1;echo "done"; 50 echo "there are 602 more memories to test.";echo "tr 52 M=EGR_FLEX_CTR_COUNTER_TABLE_0 IS=min IE=4 ITERations=1";tr 52 M=EGR_FLEX_CTR_COUNTER_TABLE_0 IS=min IE=4 ITERations=1;echo "done"; 51 echo "there are 601 more memories to test.";echo "tr 52 M=EGR_FLEX_CTR_COUNTER_TABLE_1 IS=min IE=4 ITERations=1";tr 52 M=EGR_FLEX_CTR_COUNTER_TABLE_1 IS=min IE=4 ITERations=1;echo "done"; 52 echo "there are 600 more memories to test.";echo "tr 52 M=EGR_FLEX_CTR_COUNTER_TABLE_2 IS=min IE=4 ITERations=1";tr 52 M=EGR_FLEX_CTR_COUNTER_TABLE_2 IS=min IE=4 ITERations=1;echo "done"; 53 echo "there are 599 more memories to test.";echo "tr 52 M=EGR_FLEX_CTR_COUNTER_TABLE_3 IS=min IE=4 ITERations=1";tr 52 M=EGR_FLEX_CTR_COUNTER_TABLE_3 IS=min IE=4 ITERations=1;echo "done"; 54 echo "there are 598 more memories to test.";echo "tr 52 M=EGR_FLEX_CTR_OFFSET_TABLE_0 IS=min IE=4 ITERations=1";tr 52 M=EGR_FLEX_CTR_OFFSET_TABLE_0 IS=min IE=4 ITERations=1;echo "done"; 55 echo "there are 597 more memories to test.";echo "tr 52 M=EGR_FLEX_CTR_OFFSET_TABLE_1 IS=min IE=4 ITERations=1";tr 52 M=EGR_FLEX_CTR_OFFSET_TABLE_1 IS=min IE=4 ITERations=1;echo "done"; 56 echo "there are 596 more memories to test.";echo "tr 52 M=EGR_FLEX_CTR_OFFSET_TABLE_2 IS=min IE=4 ITERations=1";tr 52 M=EGR_FLEX_CTR_OFFSET_TABLE_2 IS=min IE=4 ITERations=1;echo "done"; 57 echo "there are 595 more memories to test.";echo "tr 52 M=EGR_FLEX_CTR_OFFSET_TABLE_3 IS=min IE=4 ITERations=1";tr 52 M=EGR_FLEX_CTR_OFFSET_TABLE_3 IS=min IE=4 ITERations=1;echo "done"; 58 echo "there are 594 more memories to test.";echo "tr 52 M=EGR_FLEX_CTR_PKT_PRI_MAP IS=min IE=4 ITERations=1";tr 52 M=EGR_FLEX_CTR_PKT_PRI_MAP IS=min IE=4 ITERations=1;echo "done"; 59 echo "there are 593 more memories to test.";echo "tr 52 M=EGR_FLEX_CTR_PKT_RES_MAP IS=min IE=4 ITERations=1";tr 52 M=EGR_FLEX_CTR_PKT_RES_MAP IS=min IE=4 ITERations=1;echo "done"; 60 echo "there are 592 more memories to test.";echo "tr 52 M=EGR_FLEX_CTR_PORT_MAP IS=min IE=4 ITERations=1";tr 52 M=EGR_FLEX_CTR_PORT_MAP IS=min IE=4 ITERations=1;echo "done"; 61 echo "there are 591 more memories to test.";echo "tr 52 M=EGR_FLEX_CTR_PRI_CNG_MAP IS=min IE=4 ITERations=1";tr 52 M=EGR_FLEX_CTR_PRI_CNG_MAP IS=min IE=4 ITERations=1;echo "done"; 62 echo "there are 590 more memories to test.";echo "tr 52 M=EGR_FLEX_CTR_TOS_MAP IS=min IE=4 ITERations=1";tr 52 M=EGR_FLEX_CTR_TOS_MAP IS=min IE=4 ITERations=1;echo "done"; 63 echo "there are 589 more memories to test.";echo "tr 52 M=EGR_FRAGMENT_ID_TABLE IS=min IE=4 ITERations=1";tr 52 M=EGR_FRAGMENT_ID_TABLE IS=min IE=4 ITERations=1;echo "done"; 64 echo "there are 588 more memories to test.";echo "tr 52 M=EGR_GPP_ATTRIBUTES IS=min IE=4 ITERations=1";tr 52 M=EGR_GPP_ATTRIBUTES IS=min IE=4 ITERations=1;echo "done"; 65 echo "there are 587 more memories to test.";echo "tr 52 M=EGR_GPP_ATTRIBUTES_MODBASE IS=min IE=4 ITERations=1";tr 52 M=EGR_GPP_ATTRIBUTES_MODBASE IS=min IE=4 ITERations=1;echo "done"; 66 echo "there are 586 more memories to test.";echo "tr 52 M=EGR_IM_MTP_INDEX IS=min IE=4 ITERations=1";tr 52 M=EGR_IM_MTP_INDEX IS=min IE=4 ITERations=1;echo "done"; 67 echo "there are 585 more memories to test.";echo "tr 52 M=EGR_IPMC IS=min IE=4 ITERations=1";tr 52 M=EGR_IPMC IS=min IE=4 ITERations=1;echo "done"; 68 echo "there are 584 more memories to test.";echo "tr 52 M=EGR_IP_TUNNEL IS=min IE=4 ITERations=1";tr 52 M=EGR_IP_TUNNEL IS=min IE=4 ITERations=1;echo "done"; 69 echo "there are 583 more memories to test.";echo "tr 52 M=EGR_IP_TUNNEL_IPV6 IS=min IE=4 ITERations=1";tr 52 M=EGR_IP_TUNNEL_IPV6 IS=min IE=4 ITERations=1;echo "done"; 70 echo "there are 582 more memories to test.";echo "tr 52 M=EGR_IP_TUNNEL_MPLS IS=min IE=4 ITERations=1";tr 52 M=EGR_IP_TUNNEL_MPLS IS=min IE=4 ITERations=1;echo "done"; 71 echo "there are 581 more memories to test.";echo "tr 52 M=EGR_L3_INTF IS=min IE=4 ITERations=1";tr 52 M=EGR_L3_INTF IS=min IE=4 ITERations=1;echo "done"; 72 echo "there are 580 more memories to test.";echo "tr 52 M=EGR_L3_NEXT_HOP IS=min IE=4 ITERations=1";tr 52 M=EGR_L3_NEXT_HOP IS=min IE=4 ITERations=1;echo "done"; 73 echo "there are 579 more memories to test.";echo "tr 52 M=EGR_LM_COUNTER_CONTROL IS=min IE=4 ITERations=1";tr 52 M=EGR_LM_COUNTER_CONTROL IS=min IE=4 ITERations=1;echo "done"; 74 echo "there are 578 more memories to test.";echo "tr 52 M=EGR_MAC_DA_PROFILE IS=min IE=4 ITERations=1";tr 52 M=EGR_MAC_DA_PROFILE IS=min IE=4 ITERations=1;echo "done"; 75 echo "there are 577 more memories to test.";echo "tr 52 M=EGR_MAP_MH IS=min IE=4 ITERations=1";tr 52 M=EGR_MAP_MH IS=min IE=4 ITERations=1;echo "done"; 76 echo "there are 576 more memories to test.";echo "tr 52 M=EGR_MASK IS=min IE=4 ITERations=1";tr 52 M=EGR_MASK IS=min IE=4 ITERations=1;echo "done"; 77 echo "there are 575 more memories to test.";echo "tr 52 M=EGR_MASK_MODBASE IS=min IE=4 ITERations=1";tr 52 M=EGR_MASK_MODBASE IS=min IE=4 ITERations=1;echo "done"; 78 echo "there are 574 more memories to test.";echo "tr 52 M=EGR_MA_INDEX IS=min IE=4 ITERations=1";tr 52 M=EGR_MA_INDEX IS=min IE=4 ITERations=1;echo "done"; 79 echo "there are 573 more memories to test.";echo "tr 52 M=EGR_MIRROR_ENCAP_CONTROL IS=min IE=4 ITERations=1";tr 52 M=EGR_MIRROR_ENCAP_CONTROL IS=min IE=4 ITERations=1;echo "done"; 80 echo "there are 572 more memories to test.";echo "tr 52 M=EGR_MIRROR_ENCAP_DATA_1 IS=min IE=4 ITERations=1";tr 52 M=EGR_MIRROR_ENCAP_DATA_1 IS=min IE=4 ITERations=1;echo "done"; 81 echo "there are 571 more memories to test.";echo "tr 52 M=EGR_MIRROR_ENCAP_DATA_2 IS=min IE=4 ITERations=1";tr 52 M=EGR_MIRROR_ENCAP_DATA_2 IS=min IE=4 ITERations=1;echo "done"; 82 echo "there are 570 more memories to test.";echo "tr 52 M=EGR_MOD_MAP_TABLE IS=min IE=4 ITERations=1";tr 52 M=EGR_MOD_MAP_TABLE IS=min IE=4 ITERations=1;echo "done"; 83 echo "there are 569 more memories to test.";echo "tr 52 M=EGR_MPLS_EXP_MAPPING_1 IS=min IE=4 ITERations=1";tr 52 M=EGR_MPLS_EXP_MAPPING_1 IS=min IE=4 ITERations=1;echo "done"; 84 echo "there are 568 more memories to test.";echo "tr 52 M=EGR_MPLS_EXP_MAPPING_2 IS=min IE=4 ITERations=1";tr 52 M=EGR_MPLS_EXP_MAPPING_2 IS=min IE=4 ITERations=1;echo "done"; 85 echo "there are 567 more memories to test.";echo "tr 52 M=EGR_MPLS_EXP_PRI_MAPPING IS=min IE=4 ITERations=1";tr 52 M=EGR_MPLS_EXP_PRI_MAPPING IS=min IE=4 ITERations=1;echo "done"; 86 echo "there are 566 more memories to test.";echo "tr 52 M=EGR_MPLS_PRI_MAPPING IS=min IE=4 ITERations=1";tr 52 M=EGR_MPLS_PRI_MAPPING IS=min IE=4 ITERations=1;echo "done"; 87 echo "there are 565 more memories to test.";echo "tr 52 M=EGR_MPLS_VC_AND_SWAP_LABEL_TABLE IS=min IE=4 ITERations=1";tr 52 M=EGR_MPLS_VC_AND_SWAP_LABEL_TABLE IS=min IE=4 ITERations=1;echo "done"; 88 echo "there are 564 more memories to test.";echo "tr 52 M=EGR_MP_GROUP IS=min IE=4 ITERations=1";tr 52 M=EGR_MP_GROUP IS=min IE=4 ITERations=1;echo "done"; 89 echo "there are 563 more memories to test.";echo "tr 52 M=EGR_NETWORK_PRUNE_CONTROL IS=min IE=4 ITERations=1";tr 52 M=EGR_NETWORK_PRUNE_CONTROL IS=min IE=4 ITERations=1;echo "done"; 90 echo "there are 562 more memories to test.";echo "tr 52 M=EGR_OAM_DGLP_PROFILE IS=min IE=4 ITERations=1";tr 52 M=EGR_OAM_DGLP_PROFILE IS=min IE=4 ITERations=1;echo "done"; 91 echo "there are 561 more memories to test.";echo "tr 52 M=EGR_OAM_FLEXIBLE_DOMAIN_CONTROL IS=min IE=4 ITERations=1";tr 52 M=EGR_OAM_FLEXIBLE_DOMAIN_CONTROL IS=min IE=4 ITERations=1;echo "done"; 92 echo "there are 560 more memories to test.";echo "tr 52 M=EGR_OAM_LM_COUNTERS_0 IS=min IE=4 ITERations=1";tr 52 M=EGR_OAM_LM_COUNTERS_0 IS=min IE=4 ITERations=1;echo "done"; 93 echo "there are 559 more memories to test.";echo "tr 52 M=EGR_OAM_LM_COUNTERS_1 IS=min IE=4 ITERations=1";tr 52 M=EGR_OAM_LM_COUNTERS_1 IS=min IE=4 ITERations=1;echo "done"; 94 echo "there are 558 more memories to test.";echo "tr 52 M=EGR_OAM_LM_COUNTERS_2 IS=min IE=4 ITERations=1";tr 52 M=EGR_OAM_LM_COUNTERS_2 IS=min IE=4 ITERations=1;echo "done"; 95 echo "there are 557 more memories to test.";echo "tr 52 M=EGR_OAM_OPCODE_CONTROL_PROFILE IS=min IE=4 ITERations=1";tr 52 M=EGR_OAM_OPCODE_CONTROL_PROFILE IS=min IE=4 ITERations=1;echo "done"; 96 echo "there are 556 more memories to test.";echo "tr 52 M=EGR_OAM_OPCODE_GROUP IS=min IE=4 ITERations=1";tr 52 M=EGR_OAM_OPCODE_GROUP IS=min IE=4 ITERations=1;echo "done"; 97 #echo "there are 555 more memories to test.";echo "tr 52 M=EGR_OLP_CONFIG IS=min IE=0 ITERations=1";tr 52 M=EGR_OLP_CONFIG IS=min IE=0 ITERations=1;echo "done"; 98 echo "there are 554 more memories to test.";echo "tr 52 M=EGR_OLP_DGPP_CONFIG IS=min IE=4 ITERations=1";tr 52 M=EGR_OLP_DGPP_CONFIG IS=min IE=4 ITERations=1;echo "done"; 99 echo "there are 553 more memories to test.";echo "tr 52 M=EGR_OLP_HEADER_TYPE_MAPPING IS=min IE=4 ITERations=1";tr 52 M=EGR_OLP_HEADER_TYPE_MAPPING IS=min IE=4 ITERations=1;echo "done"; 100 echo "there are 552 more memories to test.";echo "tr 52 M=EGR_PCP_DE_MAPPING IS=min IE=4 ITERations=1";tr 52 M=EGR_PCP_DE_MAPPING IS=min IE=4 ITERations=1;echo "done"; 101 echo "there are 551 more memories to test.";echo "tr 52 M=EGR_PHYSICAL_PORT IS=min IE=4 ITERations=1";tr 52 M=EGR_PHYSICAL_PORT IS=min IE=4 ITERations=1;echo "done"; 102 echo "there are 550 more memories to test.";echo "tr 52 M=EGR_PORT IS=min IE=4 ITERations=1";tr 52 M=EGR_PORT IS=min IE=4 ITERations=1;echo "done"; 103 echo "there are 549 more memories to test.";echo "tr 52 M=EGR_PORT_PKT_SOP_ENABLE IS=min IE=4 ITERations=1";tr 52 M=EGR_PORT_PKT_SOP_ENABLE IS=min IE=4 ITERations=1;echo "done"; 104 #echo "there are 548 more memories to test.";echo "tr 52 M=EGR_PP_PORT_GPP_TRANSLATION_1 IS=min IE=0 ITERations=1";tr 52 M=EGR_PP_PORT_GPP_TRANSLATION_1 IS=min IE=0 ITERations=1;echo "done"; 105 #echo "there are 547 more memories to test.";echo "tr 52 M=EGR_PP_PORT_GPP_TRANSLATION_2 IS=min IE=0 ITERations=1";tr 52 M=EGR_PP_PORT_GPP_TRANSLATION_2 IS=min IE=0 ITERations=1;echo "done"; 106 echo "there are 546 more memories to test.";echo "tr 52 M=EGR_PRI_CNG_MAP IS=min IE=4 ITERations=1";tr 52 M=EGR_PRI_CNG_MAP IS=min IE=4 ITERations=1;echo "done"; 107 echo "there are 545 more memories to test.";echo "tr 52 M=EGR_PW_INIT_COUNTERS IS=min IE=4 ITERations=1";tr 52 M=EGR_PW_INIT_COUNTERS IS=min IE=4 ITERations=1;echo "done"; 108 echo "there are 544 more memories to test.";echo "tr 52 M=EGR_QUEUE_TO_PP_PORT_MAP IS=min IE=4 ITERations=1";tr 52 M=EGR_QUEUE_TO_PP_PORT_MAP IS=min IE=4 ITERations=1;echo "done"; 109 echo "there are 543 more memories to test.";echo "tr 52 M=EGR_SAT_CONFIG_MAC_SA IS=min IE=4 ITERations=1";tr 52 M=EGR_SAT_CONFIG_MAC_SA IS=min IE=4 ITERations=1;echo "done"; 110 echo "there are 542 more memories to test.";echo "tr 52 M=EGR_SAT_SAMP_DATA IS=min IE=4 ITERations=1";tr 52 M=EGR_SAT_SAMP_DATA IS=min IE=4 ITERations=1;echo "done"; 111 echo "there are 541 more memories to test.";echo "tr 52 M=EGR_SAT_SAMP_DATA_1 IS=min IE=4 ITERations=1";tr 52 M=EGR_SAT_SAMP_DATA_1 IS=min IE=4 ITERations=1;echo "done"; 112 echo "there are 540 more memories to test.";echo "tr 52 M=EGR_SAT_SAMP_TCAM IS=min IE=4 ITERations=1";tr 52 M=EGR_SAT_SAMP_TCAM IS=min IE=4 ITERations=1;echo "done"; 113 echo "there are 539 more memories to test.";echo "tr 52 M=EGR_SERVICE_PRI_MAP_0 IS=min IE=4 ITERations=1";tr 52 M=EGR_SERVICE_PRI_MAP_0 IS=min IE=4 ITERations=1;echo "done"; 114 echo "there are 538 more memories to test.";echo "tr 52 M=EGR_SERVICE_PRI_MAP_1 IS=min IE=4 ITERations=1";tr 52 M=EGR_SERVICE_PRI_MAP_1 IS=min IE=4 ITERations=1;echo "done"; 115 echo "there are 537 more memories to test.";echo "tr 52 M=EGR_SERVICE_PRI_MAP_2 IS=min IE=4 ITERations=1";tr 52 M=EGR_SERVICE_PRI_MAP_2 IS=min IE=4 ITERations=1;echo "done"; 116 #echo "there are 536 more memories to test.";echo "tr 52 M=EGR_SER_FIFO IS=min IE=4 ITERations=1";tr 52 M=EGR_SER_FIFO IS=min IE=4 ITERations=1;echo "done"; 117 echo "there are 535 more memories to test.";echo "tr 52 M=EGR_SUBPORT_TAG_DOT1P_MAP IS=min IE=4 ITERations=1";tr 52 M=EGR_SUBPORT_TAG_DOT1P_MAP IS=min IE=4 ITERations=1;echo "done"; 118 echo "there are 534 more memories to test.";echo "tr 52 M=EGR_VFI IS=min IE=4 ITERations=1";tr 52 M=EGR_VFI IS=min IE=4 ITERations=1;echo "done"; 119 echo "there are 533 more memories to test.";echo "tr 52 M=EGR_VLAN IS=min IE=4 ITERations=1";tr 52 M=EGR_VLAN IS=min IE=4 ITERations=1;echo "done"; 120 echo "there are 532 more memories to test.";echo "tr 52 M=EGR_VLAN_STG IS=min IE=4 ITERations=1";tr 52 M=EGR_VLAN_STG IS=min IE=4 ITERations=1;echo "done"; 121 echo "there are 531 more memories to test.";echo "tr 52 M=EGR_VLAN_TAG_ACTION_PROFILE IS=min IE=4 ITERations=1";tr 52 M=EGR_VLAN_TAG_ACTION_PROFILE IS=min IE=4 ITERations=1;echo "done"; 122 echo "there are 530 more memories to test.";echo "tr 52 M=EGR_VLAN_XLATE IS=min IE=4 ITERations=1";tr 52 M=EGR_VLAN_XLATE IS=min IE=4 ITERations=1;echo "done"; 123 echo "there are 529 more memories to test.";echo "tr 52 M=EGR_VLAN_XLATE_OVERFLOW IS=min IE=4 ITERations=1";tr 52 M=EGR_VLAN_XLATE_OVERFLOW IS=min IE=4 ITERations=1;echo "done"; 124 echo "there are 528 more memories to test.";echo "tr 52 M=EMIRROR_CONTROL IS=min IE=4 ITERations=1";tr 52 M=EMIRROR_CONTROL IS=min IE=4 ITERations=1;echo "done"; 125 echo "there are 527 more memories to test.";echo "tr 52 M=EMIRROR_CONTROL1 IS=min IE=4 ITERations=1";tr 52 M=EMIRROR_CONTROL1 IS=min IE=4 ITERations=1;echo "done"; 126 echo "there are 526 more memories to test.";echo "tr 52 M=EMIRROR_CONTROL2 IS=min IE=4 ITERations=1";tr 52 M=EMIRROR_CONTROL2 IS=min IE=4 ITERations=1;echo "done"; 127 echo "there are 525 more memories to test.";echo "tr 52 M=EMIRROR_CONTROL3 IS=min IE=4 ITERations=1";tr 52 M=EMIRROR_CONTROL3 IS=min IE=4 ITERations=1;echo "done"; 128 echo "there are 524 more memories to test.";echo "tr 52 M=EM_MTP_INDEX IS=min IE=3 ITERations=1";tr 52 M=EM_MTP_INDEX IS=min IE=3 ITERations=1;echo "done"; 129 #echo "there are 523 more memories to test.";echo "tr 52 M=EPC_LINK_BMAP IS=min IE=0 ITERations=1";tr 52 M=EPC_LINK_BMAP IS=min IE=0 ITERations=1;echo "done"; 130 echo "there are 522 more memories to test.";echo "tr 52 M=EP_REDIRECT_EM_MTP_INDEX IS=min IE=3 ITERations=1";tr 52 M=EP_REDIRECT_EM_MTP_INDEX IS=min IE=3 ITERations=1;echo "done"; 131 echo "there are 521 more memories to test.";echo "tr 52 M=FLOOD_LEARN_MATCH_VLANS_PORT_A IS=min IE=4 ITERations=1";tr 52 M=FLOOD_LEARN_MATCH_VLANS_PORT_A IS=min IE=4 ITERations=1;echo "done"; 132 echo "there are 520 more memories to test.";echo "tr 52 M=FLOOD_LEARN_MATCH_VLANS_PORT_B IS=min IE=4 ITERations=1";tr 52 M=FLOOD_LEARN_MATCH_VLANS_PORT_B IS=min IE=4 ITERations=1;echo "done"; 133 echo "there are 519 more memories to test.";echo "tr 52 M=FP_COUNTER_TABLE IS=min IE=4 ITERations=1";tr 52 M=FP_COUNTER_TABLE IS=min IE=4 ITERations=1;echo "done"; 134 echo "there are 518 more memories to test.";echo "tr 52 M=FP_FLEX_KEY_SELECTOR IS=min IE=3 ITERations=1";tr 52 M=FP_FLEX_KEY_SELECTOR IS=min IE=3 ITERations=1;echo "done"; 135 echo "there are 517 more memories to test.";echo "tr 52 M=FP_GLOBAL_MASK_TCAM IS=min IE=4 ITERations=1";tr 52 M=FP_GLOBAL_MASK_TCAM IS=min IE=4 ITERations=1;echo "done"; 136 echo "there are 516 more memories to test.";echo "tr 52 M=FP_HG_CLASSID_SELECT IS=min IE=4 ITERations=1";tr 52 M=FP_HG_CLASSID_SELECT IS=min IE=4 ITERations=1;echo "done"; 137 echo "there are 515 more memories to test.";echo "tr 52 M=FP_I2E_CLASSID_SELECT IS=min IE=4 ITERations=1";tr 52 M=FP_I2E_CLASSID_SELECT IS=min IE=4 ITERations=1;echo "done"; 138 echo "there are 514 more memories to test.";echo "tr 52 M=FP_METER_TABLE IS=min IE=4 ITERations=1";tr 52 M=FP_METER_TABLE IS=min IE=4 ITERations=1;echo "done"; 139 echo "there are 513 more memories to test.";echo "tr 52 M=FP_POLICY_TABLE IS=min IE=4 ITERations=1";tr 52 M=FP_POLICY_TABLE IS=min IE=4 ITERations=1;echo "done"; 140 echo "there are 512 more memories to test.";echo "tr 52 M=FP_PORT_FIELD_SEL IS=min IE=4 ITERations=1";tr 52 M=FP_PORT_FIELD_SEL IS=min IE=4 ITERations=1;echo "done"; 141 echo "there are 511 more memories to test.";echo "tr 52 M=FP_PORT_METER_MAP IS=min IE=4 ITERations=1";tr 52 M=FP_PORT_METER_MAP IS=min IE=4 ITERations=1;echo "done"; 142 echo "there are 510 more memories to test.";echo "tr 52 M=FP_RANGE_CHECK IS=min IE=4 ITERations=1";tr 52 M=FP_RANGE_CHECK IS=min IE=4 ITERations=1;echo "done"; 143 #echo "there are 509 more memories to test.";echo "tr 52 M=FP_SLICE_KEY_CONTROL IS=min IE=0 ITERations=1";tr 52 M=FP_SLICE_KEY_CONTROL IS=min IE=0 ITERations=1;echo "done"; 144 #echo "there are 508 more memories to test.";echo "tr 52 M=FP_SLICE_MAP IS=min IE=0 ITERations=1";tr 52 M=FP_SLICE_MAP IS=min IE=0 ITERations=1;echo "done"; 145 echo "there are 507 more memories to test.";echo "tr 52 M=FP_STORM_CONTROL_METERS IS=min IE=4 ITERations=1";tr 52 M=FP_STORM_CONTROL_METERS IS=min IE=4 ITERations=1;echo "done"; 146 echo "there are 506 more memories to test.";echo "tr 52 M=FP_TCAM IS=min IE=4 ITERations=1";tr 52 M=FP_TCAM IS=min IE=4 ITERations=1;echo "done"; 147 echo "there are 505 more memories to test.";echo "tr 52 M=GTP_PORT_TABLE IS=min IE=3 ITERations=1";tr 52 M=GTP_PORT_TABLE IS=min IE=3 ITERations=1;echo "done"; 148 echo "there are 504 more memories to test.";echo "tr 52 M=HG_TRUNK_BITMAP IS=min IE=4 ITERations=1";tr 52 M=HG_TRUNK_BITMAP IS=min IE=4 ITERations=1;echo "done"; 149 #echo "there are 503 more memories to test.";echo "tr 52 M=HG_TRUNK_FAILOVER_ENABLE IS=min IE=0 ITERations=1";tr 52 M=HG_TRUNK_FAILOVER_ENABLE IS=min IE=0 ITERations=1;echo "done"; 150 echo "there are 502 more memories to test.";echo "tr 52 M=HG_TRUNK_FAILOVER_SET IS=min IE=4 ITERations=1";tr 52 M=HG_TRUNK_FAILOVER_SET IS=min IE=4 ITERations=1;echo "done"; 151 echo "there are 501 more memories to test.";echo "tr 52 M=HG_TRUNK_GROUP IS=min IE=4 ITERations=1";tr 52 M=HG_TRUNK_GROUP IS=min IE=4 ITERations=1;echo "done"; 152 echo "there are 500 more memories to test.";echo "tr 52 M=HG_TRUNK_MEMBER IS=min IE=4 ITERations=1";tr 52 M=HG_TRUNK_MEMBER IS=min IE=4 ITERations=1;echo "done"; 153 #echo "there are 499 more memories to test.";echo "tr 52 M=HIGIG_TRUNK_CONTROL IS=min IE=0 ITERations=1";tr 52 M=HIGIG_TRUNK_CONTROL IS=min IE=0 ITERations=1;echo "done"; 154 echo "there are 498 more memories to test.";echo "tr 52 M=IARB_ING_PHYSICAL_PORT IS=min IE=4 ITERations=1";tr 52 M=IARB_ING_PHYSICAL_PORT IS=min IE=4 ITERations=1;echo "done"; 155 echo "there are 497 more memories to test.";echo "tr 52 M=IARB_TDM_TABLE IS=min IE=4 ITERations=1";tr 52 M=IARB_TDM_TABLE IS=min IE=4 ITERations=1;echo "done"; 156 echo "there are 496 more memories to test.";echo "tr 52 M=IARB_TDM_TABLE_1 IS=min IE=4 ITERations=1";tr 52 M=IARB_TDM_TABLE_1 IS=min IE=4 ITERations=1;echo "done"; 157 echo "there are 495 more memories to test.";echo "tr 52 M=ICONTROL_OPCODE_BITMAP IS=min IE=4 ITERations=1";tr 52 M=ICONTROL_OPCODE_BITMAP IS=min IE=4 ITERations=1;echo "done"; 158 echo "there are 494 more memories to test.";echo "tr 52 M=IFP_COS_MAP IS=min IE=4 ITERations=1";tr 52 M=IFP_COS_MAP IS=min IE=4 ITERations=1;echo "done"; 159 echo "there are 493 more memories to test.";echo "tr 52 M=IFP_REDIRECTION_PROFILE IS=min IE=4 ITERations=1";tr 52 M=IFP_REDIRECTION_PROFILE IS=min IE=4 ITERations=1;echo "done"; 160 echo "there are 492 more memories to test.";echo "tr 52 M=IMIRROR_BITMAP IS=min IE=4 ITERations=1";tr 52 M=IMIRROR_BITMAP IS=min IE=4 ITERations=1;echo "done"; 161 echo "there are 491 more memories to test.";echo "tr 52 M=IM_MTP_INDEX IS=min IE=3 ITERations=1";tr 52 M=IM_MTP_INDEX IS=min IE=3 ITERations=1;echo "done"; 162 echo "there are 490 more memories to test.";echo "tr 52 M=ING_1588_TS_DISPOSITION_PROFILE_TABLE IS=min IE=4 ITERations=1";tr 52 M=ING_1588_TS_DISPOSITION_PROFILE_TABLE IS=min IE=4 ITERations=1;echo "done"; 163 echo "there are 489 more memories to test.";echo "tr 52 M=ING_DVP_TABLE IS=min IE=4 ITERations=1";tr 52 M=ING_DVP_TABLE IS=min IE=4 ITERations=1;echo "done"; 164 echo "there are 488 more memories to test.";echo "tr 52 M=ING_EGRMSKBMAP IS=min IE=4 ITERations=1";tr 52 M=ING_EGRMSKBMAP IS=min IE=4 ITERations=1;echo "done"; 165 #echo "there are 487 more memories to test.";echo "tr 52 M=ING_EN_EFILTER_BITMAP IS=min IE=0 ITERations=1";tr 52 M=ING_EN_EFILTER_BITMAP IS=min IE=0 ITERations=1;echo "done"; 166 echo "there are 486 more memories to test.";echo "tr 52 M=ING_FLEX_CTR_COUNTER_TABLE_0 IS=min IE=4 ITERations=1";tr 52 M=ING_FLEX_CTR_COUNTER_TABLE_0 IS=min IE=4 ITERations=1;echo "done"; 167 echo "there are 485 more memories to test.";echo "tr 52 M=ING_FLEX_CTR_COUNTER_TABLE_1 IS=min IE=4 ITERations=1";tr 52 M=ING_FLEX_CTR_COUNTER_TABLE_1 IS=min IE=4 ITERations=1;echo "done"; 168 echo "there are 484 more memories to test.";echo "tr 52 M=ING_FLEX_CTR_COUNTER_TABLE_2 IS=min IE=4 ITERations=1";tr 52 M=ING_FLEX_CTR_COUNTER_TABLE_2 IS=min IE=4 ITERations=1;echo "done"; 169 echo "there are 483 more memories to test.";echo "tr 52 M=ING_FLEX_CTR_COUNTER_TABLE_3 IS=min IE=4 ITERations=1";tr 52 M=ING_FLEX_CTR_COUNTER_TABLE_3 IS=min IE=4 ITERations=1;echo "done"; 170 echo "there are 482 more memories to test.";echo "tr 52 M=ING_FLEX_CTR_OFFSET_TABLE_0 IS=min IE=4 ITERations=1";tr 52 M=ING_FLEX_CTR_OFFSET_TABLE_0 IS=min IE=4 ITERations=1;echo "done"; 171 echo "there are 481 more memories to test.";echo "tr 52 M=ING_FLEX_CTR_OFFSET_TABLE_1 IS=min IE=4 ITERations=1";tr 52 M=ING_FLEX_CTR_OFFSET_TABLE_1 IS=min IE=4 ITERations=1;echo "done"; 172 echo "there are 480 more memories to test.";echo "tr 52 M=ING_FLEX_CTR_OFFSET_TABLE_2 IS=min IE=4 ITERations=1";tr 52 M=ING_FLEX_CTR_OFFSET_TABLE_2 IS=min IE=4 ITERations=1;echo "done"; 173 echo "there are 479 more memories to test.";echo "tr 52 M=ING_FLEX_CTR_OFFSET_TABLE_3 IS=min IE=4 ITERations=1";tr 52 M=ING_FLEX_CTR_OFFSET_TABLE_3 IS=min IE=4 ITERations=1;echo "done"; 174 echo "there are 478 more memories to test.";echo "tr 52 M=ING_FLEX_CTR_PKT_PRI_MAP IS=min IE=4 ITERations=1";tr 52 M=ING_FLEX_CTR_PKT_PRI_MAP IS=min IE=4 ITERations=1;echo "done"; 175 echo "there are 477 more memories to test.";echo "tr 52 M=ING_FLEX_CTR_PKT_RES_MAP IS=min IE=4 ITERations=1";tr 52 M=ING_FLEX_CTR_PKT_RES_MAP IS=min IE=4 ITERations=1;echo "done"; 176 echo "there are 476 more memories to test.";echo "tr 52 M=ING_FLEX_CTR_PORT_MAP IS=min IE=4 ITERations=1";tr 52 M=ING_FLEX_CTR_PORT_MAP IS=min IE=4 ITERations=1;echo "done"; 177 echo "there are 475 more memories to test.";echo "tr 52 M=ING_FLEX_CTR_PRI_CNG_MAP IS=min IE=4 ITERations=1";tr 52 M=ING_FLEX_CTR_PRI_CNG_MAP IS=min IE=4 ITERations=1;echo "done"; 178 echo "there are 474 more memories to test.";echo "tr 52 M=ING_FLEX_CTR_TOS_MAP IS=min IE=4 ITERations=1";tr 52 M=ING_FLEX_CTR_TOS_MAP IS=min IE=4 ITERations=1;echo "done"; 179 echo "there are 473 more memories to test.";echo "tr 52 M=ING_HIGIG_TRUNK_OVERRIDE_PROFILE IS=min IE=3 ITERations=1";tr 52 M=ING_HIGIG_TRUNK_OVERRIDE_PROFILE IS=min IE=3 ITERations=1;echo "done"; 180 echo "there are 472 more memories to test.";echo "tr 52 M=ING_L3_NEXT_HOP IS=min IE=4 ITERations=1";tr 52 M=ING_L3_NEXT_HOP IS=min IE=4 ITERations=1;echo "done"; 181 echo "there are 471 more memories to test.";echo "tr 52 M=ING_LM_COUNTER_CONTROL IS=min IE=4 ITERations=1";tr 52 M=ING_LM_COUNTER_CONTROL IS=min IE=4 ITERations=1;echo "done"; 182 echo "there are 470 more memories to test.";echo "tr 52 M=ING_MOD_MAP_TABLE IS=min IE=4 ITERations=1";tr 52 M=ING_MOD_MAP_TABLE IS=min IE=4 ITERations=1;echo "done"; 183 echo "there are 469 more memories to test.";echo "tr 52 M=ING_MPLS_EXP_MAPPING IS=min IE=4 ITERations=1";tr 52 M=ING_MPLS_EXP_MAPPING IS=min IE=4 ITERations=1;echo "done"; 184 echo "there are 468 more memories to test.";echo "tr 52 M=ING_NETWORK_PRUNE_CONTROL IS=min IE=4 ITERations=1";tr 52 M=ING_NETWORK_PRUNE_CONTROL IS=min IE=4 ITERations=1;echo "done"; 185 echo "there are 467 more memories to test.";echo "tr 52 M=ING_OAM_LM_COUNTERS_0 IS=min IE=4 ITERations=1";tr 52 M=ING_OAM_LM_COUNTERS_0 IS=min IE=4 ITERations=1;echo "done"; 186 echo "there are 466 more memories to test.";echo "tr 52 M=ING_OAM_LM_COUNTERS_1 IS=min IE=4 ITERations=1";tr 52 M=ING_OAM_LM_COUNTERS_1 IS=min IE=4 ITERations=1;echo "done"; 187 echo "there are 465 more memories to test.";echo "tr 52 M=ING_OAM_LM_COUNTERS_2 IS=min IE=4 ITERations=1";tr 52 M=ING_OAM_LM_COUNTERS_2 IS=min IE=4 ITERations=1;echo "done"; 188 echo "there are 464 more memories to test.";echo "tr 52 M=ING_PHYSICAL_PORT_TABLE IS=min IE=4 ITERations=1";tr 52 M=ING_PHYSICAL_PORT_TABLE IS=min IE=4 ITERations=1;echo "done"; 189 echo "there are 463 more memories to test.";echo "tr 52 M=ING_PRI_CNG_MAP IS=min IE=4 ITERations=1";tr 52 M=ING_PRI_CNG_MAP IS=min IE=4 ITERations=1;echo "done"; 190 echo "there are 462 more memories to test.";echo "tr 52 M=ING_PW_TERM_SEQ_NUM IS=min IE=4 ITERations=1";tr 52 M=ING_PW_TERM_SEQ_NUM IS=min IE=4 ITERations=1;echo "done"; 191 echo "there are 461 more memories to test.";echo "tr 52 M=ING_QUEUE_MAP IS=min IE=4 ITERations=1";tr 52 M=ING_QUEUE_MAP IS=min IE=4 ITERations=1;echo "done"; 192 echo "there are 460 more memories to test.";echo "tr 52 M=ING_QUEUE_OFFSET_MAPPING_TABLE IS=min IE=4 ITERations=1";tr 52 M=ING_QUEUE_OFFSET_MAPPING_TABLE IS=min IE=4 ITERations=1;echo "done"; 193 echo "there are 459 more memories to test.";echo "tr 52 M=ING_SAT_SAMP_DATA IS=min IE=4 ITERations=1";tr 52 M=ING_SAT_SAMP_DATA IS=min IE=4 ITERations=1;echo "done"; 194 echo "there are 458 more memories to test.";echo "tr 52 M=ING_SAT_SAMP_TCAM IS=min IE=4 ITERations=1";tr 52 M=ING_SAT_SAMP_TCAM IS=min IE=4 ITERations=1;echo "done"; 195 echo "there are 457 more memories to test.";echo "tr 52 M=ING_SERVICE_PRI_MAP_0 IS=min IE=4 ITERations=1";tr 52 M=ING_SERVICE_PRI_MAP_0 IS=min IE=4 ITERations=1;echo "done"; 196 echo "there are 456 more memories to test.";echo "tr 52 M=ING_SERVICE_PRI_MAP_1 IS=min IE=4 ITERations=1";tr 52 M=ING_SERVICE_PRI_MAP_1 IS=min IE=4 ITERations=1;echo "done"; 197 echo "there are 455 more memories to test.";echo "tr 52 M=ING_SERVICE_PRI_MAP_2 IS=min IE=4 ITERations=1";tr 52 M=ING_SERVICE_PRI_MAP_2 IS=min IE=4 ITERations=1;echo "done"; 198 #echo "there are 454 more memories to test.";echo "tr 52 M=ING_SER_FIFO IS=min IE=4 ITERations=1";tr 52 M=ING_SER_FIFO IS=min IE=4 ITERations=1;echo "done"; 199 echo "there are 453 more memories to test.";echo "tr 52 M=ING_SVM_PKT_PRI_MAP IS=min IE=4 ITERations=1";tr 52 M=ING_SVM_PKT_PRI_MAP IS=min IE=4 ITERations=1;echo "done"; 200 echo "there are 452 more memories to test.";echo "tr 52 M=ING_SVM_PKT_RES_MAP IS=min IE=4 ITERations=1";tr 52 M=ING_SVM_PKT_RES_MAP IS=min IE=4 ITERations=1;echo "done"; 201 echo "there are 451 more memories to test.";echo "tr 52 M=ING_SVM_PORT_MAP IS=min IE=4 ITERations=1";tr 52 M=ING_SVM_PORT_MAP IS=min IE=4 ITERations=1;echo "done"; 202 echo "there are 450 more memories to test.";echo "tr 52 M=ING_SVM_PRI_CNG_MAP IS=min IE=4 ITERations=1";tr 52 M=ING_SVM_PRI_CNG_MAP IS=min IE=4 ITERations=1;echo "done"; 203 echo "there are 449 more memories to test.";echo "tr 52 M=ING_SVM_TOS_MAP IS=min IE=4 ITERations=1";tr 52 M=ING_SVM_TOS_MAP IS=min IE=4 ITERations=1;echo "done"; 204 echo "there are 448 more memories to test.";echo "tr 52 M=ING_UNTAGGED_PHB IS=min IE=4 ITERations=1";tr 52 M=ING_UNTAGGED_PHB IS=min IE=4 ITERations=1;echo "done"; 205 echo "there are 447 more memories to test.";echo "tr 52 M=ING_VLAN_RANGE IS=min IE=4 ITERations=1";tr 52 M=ING_VLAN_RANGE IS=min IE=4 ITERations=1;echo "done"; 206 echo "there are 446 more memories to test.";echo "tr 52 M=ING_VLAN_TAG_ACTION_PROFILE IS=min IE=4 ITERations=1";tr 52 M=ING_VLAN_TAG_ACTION_PROFILE IS=min IE=4 ITERations=1;echo "done"; 207 echo "there are 445 more memories to test.";echo "tr 52 M=INITIAL_ING_L3_NEXT_HOP IS=min IE=4 ITERations=1";tr 52 M=INITIAL_ING_L3_NEXT_HOP IS=min IE=4 ITERations=1;echo "done"; 208 echo "there are 444 more memories to test.";echo "tr 52 M=INITIAL_L3_ECMP IS=min IE=4 ITERations=1";tr 52 M=INITIAL_L3_ECMP IS=min IE=4 ITERations=1;echo "done"; 209 echo "there are 443 more memories to test.";echo "tr 52 M=INITIAL_L3_ECMP_GROUP IS=min IE=4 ITERations=1";tr 52 M=INITIAL_L3_ECMP_GROUP IS=min IE=4 ITERations=1;echo "done"; 210 echo "there are 442 more memories to test.";echo "tr 52 M=INITIAL_PROT_NHI_TABLE IS=min IE=4 ITERations=1";tr 52 M=INITIAL_PROT_NHI_TABLE IS=min IE=4 ITERations=1;echo "done"; 211 echo "there are 441 more memories to test.";echo "tr 52 M=INITIAL_PROT_NHI_TABLE_1 IS=min IE=4 ITERations=1";tr 52 M=INITIAL_PROT_NHI_TABLE_1 IS=min IE=4 ITERations=1;echo "done"; 212 echo "there are 440 more memories to test.";echo "tr 52 M=INITIAL_PROT_NHI_TABLE_1_DMA IS=min IE=4 ITERations=1";tr 52 M=INITIAL_PROT_NHI_TABLE_1_DMA IS=min IE=4 ITERations=1;echo "done"; 213 echo "there are 439 more memories to test.";echo "tr 52 M=IPV4_IN_IPV6_PREFIX_MATCH_TABLE IS=min IE=3 ITERations=1";tr 52 M=IPV4_IN_IPV6_PREFIX_MATCH_TABLE IS=min IE=3 ITERations=1;echo "done"; 214 echo "there are 438 more memories to test.";echo "tr 52 M=KNOWN_MCAST_BLOCK_MASK IS=min IE=4 ITERations=1";tr 52 M=KNOWN_MCAST_BLOCK_MASK IS=min IE=4 ITERations=1;echo "done"; 215 echo "there are 437 more memories to test.";echo "tr 52 M=L2MC IS=min IE=4 ITERations=1";tr 52 M=L2MC IS=min IE=4 ITERations=1;echo "done"; 216 #echo "there are 436 more memories to test.";echo "tr 52 M=L2_BULK_MATCH_DATA IS=min IE=0 ITERations=1";tr 52 M=L2_BULK_MATCH_DATA IS=min IE=0 ITERations=1;echo "done"; 217 #echo "there are 435 more memories to test.";echo "tr 52 M=L2_BULK_MATCH_MASK IS=min IE=0 ITERations=1";tr 52 M=L2_BULK_MATCH_MASK IS=min IE=0 ITERations=1;echo "done"; 218 echo "there are 434 more memories to test.";echo "tr 52 M=L2_BULK_MATCH_VLANS_PORT_A IS=min IE=4 ITERations=1";tr 52 M=L2_BULK_MATCH_VLANS_PORT_A IS=min IE=4 ITERations=1;echo "done"; 219 echo "there are 433 more memories to test.";echo "tr 52 M=L2_BULK_MATCH_VLANS_PORT_B IS=min IE=4 ITERations=1";tr 52 M=L2_BULK_MATCH_VLANS_PORT_B IS=min IE=4 ITERations=1;echo "done"; 220 #echo "there are 432 more memories to test.";echo "tr 52 M=L2_BULK_REPLACE_DATA IS=min IE=0 ITERations=1";tr 52 M=L2_BULK_REPLACE_DATA IS=min IE=0 ITERations=1;echo "done"; 221 #echo "there are 431 more memories to test.";echo "tr 52 M=L2_BULK_REPLACE_MASK IS=min IE=0 ITERations=1";tr 52 M=L2_BULK_REPLACE_MASK IS=min IE=0 ITERations=1;echo "done"; 222 echo "there are 430 more memories to test.";echo "tr 52 M=L2X IS=min IE=4 ITERations=1";tr 52 M=L2X IS=min IE=4 ITERations=1;echo "done"; 223 echo "there are 429 more memories to test.";echo "tr 52 M=L2_ENTRY_ONLY IS=min IE=4 ITERations=1";tr 52 M=L2_ENTRY_ONLY IS=min IE=4 ITERations=1;echo "done"; 224 #echo "there are 428 more memories to test.";echo "tr 52 M=L2_ENTRY_OVERFLOW IS=min IE=1 ITERations=1";tr 52 M=L2_ENTRY_OVERFLOW IS=min IE=1 ITERations=1;echo "done"; 225 echo "there are 427 more memories to test.";echo "tr 52 M=L2_HITDA_ONLY IS=min IE=4 ITERations=1";tr 52 M=L2_HITDA_ONLY IS=min IE=4 ITERations=1;echo "done"; 226 echo "there are 426 more memories to test.";echo "tr 52 M=L2_HITSA_ONLY IS=min IE=4 ITERations=1";tr 52 M=L2_HITSA_ONLY IS=min IE=4 ITERations=1;echo "done"; 227 echo "there are 425 more memories to test.";echo "tr 52 M=L2_MOD_FIFO IS=min IE=4 ITERations=1";tr 52 M=L2_MOD_FIFO IS=min IE=4 ITERations=1;echo "done"; 228 echo "there are 424 more memories to test.";echo "tr 52 M=L2_USER_ENTRY IS=min IE=4 ITERations=1";tr 52 M=L2_USER_ENTRY IS=min IE=4 ITERations=1;echo "done"; 229 echo "there are 423 more memories to test.";echo "tr 52 M=L2_USER_ENTRY_DATA_ONLY IS=min IE=4 ITERations=1";tr 52 M=L2_USER_ENTRY_DATA_ONLY IS=min IE=4 ITERations=1;echo "done"; 230 echo "there are 422 more memories to test.";echo "tr 52 M=L2_USER_ENTRY_ONLY IS=min IE=4 ITERations=1";tr 52 M=L2_USER_ENTRY_ONLY IS=min IE=4 ITERations=1;echo "done"; 231 echo "there are 421 more memories to test.";echo "tr 52 M=L3_DEFIP IS=min IE=4 ITERations=1";tr 52 M=L3_DEFIP IS=min IE=4 ITERations=1;echo "done"; 232 echo "there are 420 more memories to test.";echo "tr 52 M=L3_DEFIP_DATA_ONLY IS=min IE=4 ITERations=1";tr 52 M=L3_DEFIP_DATA_ONLY IS=min IE=4 ITERations=1;echo "done"; 233 echo "there are 419 more memories to test.";echo "tr 52 M=L3_DEFIP_HIT_ONLY IS=min IE=4 ITERations=1";tr 52 M=L3_DEFIP_HIT_ONLY IS=min IE=4 ITERations=1;echo "done"; 234 echo "there are 418 more memories to test.";echo "tr 52 M=L3_DEFIP_ONLY IS=min IE=4 ITERations=1";tr 52 M=L3_DEFIP_ONLY IS=min IE=4 ITERations=1;echo "done"; 235 echo "there are 417 more memories to test.";echo "tr 52 M=L3_DEFIP_PAIR_128 IS=min IE=4 ITERations=1";tr 52 M=L3_DEFIP_PAIR_128 IS=min IE=4 ITERations=1;echo "done"; 236 echo "there are 416 more memories to test.";echo "tr 52 M=L3_DEFIP_PAIR_128_DATA_ONLY IS=min IE=4 ITERations=1";tr 52 M=L3_DEFIP_PAIR_128_DATA_ONLY IS=min IE=4 ITERations=1;echo "done"; 237 echo "there are 415 more memories to test.";echo "tr 52 M=L3_DEFIP_PAIR_128_HIT_ONLY IS=min IE=4 ITERations=1";tr 52 M=L3_DEFIP_PAIR_128_HIT_ONLY IS=min IE=4 ITERations=1;echo "done"; 238 echo "there are 414 more memories to test.";echo "tr 52 M=L3_DEFIP_PAIR_128_ONLY IS=min IE=4 ITERations=1";tr 52 M=L3_DEFIP_PAIR_128_ONLY IS=min IE=4 ITERations=1;echo "done"; 239 echo "there are 413 more memories to test.";echo "tr 52 M=L3_ECMP IS=min IE=4 ITERations=1";tr 52 M=L3_ECMP IS=min IE=4 ITERations=1;echo "done"; 240 echo "there are 412 more memories to test.";echo "tr 52 M=L3_ECMP_COUNT IS=min IE=4 ITERations=1";tr 52 M=L3_ECMP_COUNT IS=min IE=4 ITERations=1;echo "done"; 241 echo "there are 411 more memories to test.";echo "tr 52 M=L3_ENTRY_HIT_ONLY IS=min IE=4 ITERations=1";tr 52 M=L3_ENTRY_HIT_ONLY IS=min IE=4 ITERations=1;echo "done"; 242 echo "there are 410 more memories to test.";echo "tr 52 M=L3_ENTRY_IPV4_MULTICAST IS=min IE=4 ITERations=1";tr 52 M=L3_ENTRY_IPV4_MULTICAST IS=min IE=4 ITERations=1;echo "done"; 243 echo "there are 409 more memories to test.";echo "tr 52 M=L3_ENTRY_IPV4_UNICAST IS=min IE=4 ITERations=1";tr 52 M=L3_ENTRY_IPV4_UNICAST IS=min IE=4 ITERations=1;echo "done"; 244 echo "there are 408 more memories to test.";echo "tr 52 M=L3_ENTRY_IPV6_MULTICAST IS=min IE=4 ITERations=1";tr 52 M=L3_ENTRY_IPV6_MULTICAST IS=min IE=4 ITERations=1;echo "done"; 245 echo "there are 407 more memories to test.";echo "tr 52 M=L3_ENTRY_IPV6_UNICAST IS=min IE=4 ITERations=1";tr 52 M=L3_ENTRY_IPV6_UNICAST IS=min IE=4 ITERations=1;echo "done"; 246 echo "there are 406 more memories to test.";echo "tr 52 M=L3_ENTRY_ONLY IS=min IE=4 ITERations=1";tr 52 M=L3_ENTRY_ONLY IS=min IE=4 ITERations=1;echo "done"; 247 echo "there are 405 more memories to test.";echo "tr 52 M=L3_IIF IS=min IE=4 ITERations=1";tr 52 M=L3_IIF IS=min IE=4 ITERations=1;echo "done"; 248 echo "there are 404 more memories to test.";echo "tr 52 M=L3_IPMC IS=min IE=4 ITERations=1";tr 52 M=L3_IPMC IS=min IE=4 ITERations=1;echo "done"; 249 echo "there are 403 more memories to test.";echo "tr 52 M=L3_IPMC_1 IS=min IE=4 ITERations=1";tr 52 M=L3_IPMC_1 IS=min IE=4 ITERations=1;echo "done"; 250 echo "there are 402 more memories to test.";echo "tr 52 M=L3_IPMC_REMAP IS=min IE=4 ITERations=1";tr 52 M=L3_IPMC_REMAP IS=min IE=4 ITERations=1;echo "done"; 251 echo "there are 401 more memories to test.";echo "tr 52 M=L3_MTU_VALUES IS=min IE=4 ITERations=1";tr 52 M=L3_MTU_VALUES IS=min IE=4 ITERations=1;echo "done"; 252 echo "there are 400 more memories to test.";echo "tr 52 M=L3_TUNNEL IS=min IE=4 ITERations=1";tr 52 M=L3_TUNNEL IS=min IE=4 ITERations=1;echo "done"; 253 echo "there are 399 more memories to test.";echo "tr 52 M=L3_TUNNEL_DATA_ONLY IS=min IE=4 ITERations=1";tr 52 M=L3_TUNNEL_DATA_ONLY IS=min IE=4 ITERations=1;echo "done"; 254 echo "there are 398 more memories to test.";echo "tr 52 M=L3_TUNNEL_ONLY IS=min IE=4 ITERations=1";tr 52 M=L3_TUNNEL_ONLY IS=min IE=4 ITERations=1;echo "done"; 255 echo "there are 397 more memories to test.";echo "tr 52 M=LLS_L0_CHILD_STATE1 IS=min IE=4 ITERations=1";tr 52 M=LLS_L0_CHILD_STATE1 IS=min IE=4 ITERations=1;echo "done"; 256 echo "there are 396 more memories to test.";echo "tr 52 M=LLS_L0_CHILD_WEIGHT_CFG_CNT IS=min IE=4 ITERations=1";tr 52 M=LLS_L0_CHILD_WEIGHT_CFG_CNT IS=min IE=4 ITERations=1;echo "done"; 257 echo "there are 395 more memories to test.";echo "tr 52 M=LLS_L0_CONFIG IS=min IE=4 ITERations=1";tr 52 M=LLS_L0_CONFIG IS=min IE=4 ITERations=1;echo "done"; 258 echo "there are 394 more memories to test.";echo "tr 52 M=LLS_L0_EF_NEXT IS=min IE=4 ITERations=1";tr 52 M=LLS_L0_EF_NEXT IS=min IE=4 ITERations=1;echo "done"; 259 echo "there are 393 more memories to test.";echo "tr 52 M=LLS_L0_ERROR IS=min IE=4 ITERations=1";tr 52 M=LLS_L0_ERROR IS=min IE=4 ITERations=1;echo "done"; 260 echo "there are 392 more memories to test.";echo "tr 52 M=LLS_L0_HEADS_TAILS IS=min IE=4 ITERations=1";tr 52 M=LLS_L0_HEADS_TAILS IS=min IE=4 ITERations=1;echo "done"; 261 #echo "there are 391 more memories to test.";echo "tr 52 M=LLS_L0_MIN_BUCKET_C IS=min IE=4 ITERations=1";tr 52 M=LLS_L0_MIN_BUCKET_C IS=min IE=4 ITERations=1;echo "done"; 262 echo "there are 390 more memories to test.";echo "tr 52 M=LLS_L0_MIN_CONFIG_C IS=min IE=4 ITERations=1";tr 52 M=LLS_L0_MIN_CONFIG_C IS=min IE=4 ITERations=1;echo "done"; 263 echo "there are 389 more memories to test.";echo "tr 52 M=LLS_L0_MIN_NEXT IS=min IE=4 ITERations=1";tr 52 M=LLS_L0_MIN_NEXT IS=min IE=4 ITERations=1;echo "done"; 264 echo "there are 388 more memories to test.";echo "tr 52 M=LLS_L0_PARENT IS=min IE=4 ITERations=1";tr 52 M=LLS_L0_PARENT IS=min IE=4 ITERations=1;echo "done"; 265 echo "there are 387 more memories to test.";echo "tr 52 M=LLS_L0_PARENT_STATE IS=min IE=4 ITERations=1";tr 52 M=LLS_L0_PARENT_STATE IS=min IE=4 ITERations=1;echo "done"; 266 #echo "there are 386 more memories to test.";echo "tr 52 M=LLS_L0_SHAPER_BUCKET_C IS=min IE=4 ITERations=1";tr 52 M=LLS_L0_SHAPER_BUCKET_C IS=min IE=4 ITERations=1;echo "done"; 267 echo "there are 385 more memories to test.";echo "tr 52 M=LLS_L0_SHAPER_CONFIG_C IS=min IE=4 ITERations=1";tr 52 M=LLS_L0_SHAPER_CONFIG_C IS=min IE=4 ITERations=1;echo "done"; 268 echo "there are 384 more memories to test.";echo "tr 52 M=LLS_L0_WERR_MAX_SC IS=min IE=4 ITERations=1";tr 52 M=LLS_L0_WERR_MAX_SC IS=min IE=4 ITERations=1;echo "done"; 269 echo "there are 383 more memories to test.";echo "tr 52 M=LLS_L0_WERR_NEXT IS=min IE=4 ITERations=1";tr 52 M=LLS_L0_WERR_NEXT IS=min IE=4 ITERations=1;echo "done"; 270 #echo "there are 382 more memories to test.";echo "tr 52 M=LLS_L0_XOFF IS=min IE=3 ITERations=1";tr 52 M=LLS_L0_XOFF IS=min IE=3 ITERations=1;echo "done"; 271 echo "there are 381 more memories to test.";echo "tr 52 M=LLS_L1_CHILD_STATE1 IS=min IE=4 ITERations=1";tr 52 M=LLS_L1_CHILD_STATE1 IS=min IE=4 ITERations=1;echo "done"; 272 echo "there are 380 more memories to test.";echo "tr 52 M=LLS_L1_CHILD_WEIGHT_CFG_CNT IS=min IE=4 ITERations=1";tr 52 M=LLS_L1_CHILD_WEIGHT_CFG_CNT IS=min IE=4 ITERations=1;echo "done"; 273 echo "there are 379 more memories to test.";echo "tr 52 M=LLS_L1_CONFIG IS=min IE=4 ITERations=1";tr 52 M=LLS_L1_CONFIG IS=min IE=4 ITERations=1;echo "done"; 274 echo "there are 378 more memories to test.";echo "tr 52 M=LLS_L1_EF_NEXT IS=min IE=4 ITERations=1";tr 52 M=LLS_L1_EF_NEXT IS=min IE=4 ITERations=1;echo "done"; 275 echo "there are 377 more memories to test.";echo "tr 52 M=LLS_L1_ERROR IS=min IE=4 ITERations=1";tr 52 M=LLS_L1_ERROR IS=min IE=4 ITERations=1;echo "done"; 276 echo "there are 376 more memories to test.";echo "tr 52 M=LLS_L1_HEADS_TAILS IS=min IE=4 ITERations=1";tr 52 M=LLS_L1_HEADS_TAILS IS=min IE=4 ITERations=1;echo "done"; 277 #echo "there are 375 more memories to test.";echo "tr 52 M=LLS_L1_MIN_BUCKET_C IS=min IE=4 ITERations=1";tr 52 M=LLS_L1_MIN_BUCKET_C IS=min IE=4 ITERations=1;echo "done"; 278 echo "there are 374 more memories to test.";echo "tr 52 M=LLS_L1_MIN_CONFIG_C IS=min IE=4 ITERations=1";tr 52 M=LLS_L1_MIN_CONFIG_C IS=min IE=4 ITERations=1;echo "done"; 279 echo "there are 373 more memories to test.";echo "tr 52 M=LLS_L1_MIN_NEXT IS=min IE=4 ITERations=1";tr 52 M=LLS_L1_MIN_NEXT IS=min IE=4 ITERations=1;echo "done"; 280 echo "there are 372 more memories to test.";echo "tr 52 M=LLS_L1_PARENT IS=min IE=4 ITERations=1";tr 52 M=LLS_L1_PARENT IS=min IE=4 ITERations=1;echo "done"; 281 echo "there are 371 more memories to test.";echo "tr 52 M=LLS_L1_PARENT_STATE IS=min IE=4 ITERations=1";tr 52 M=LLS_L1_PARENT_STATE IS=min IE=4 ITERations=1;echo "done"; 282 #echo "there are 370 more memories to test.";echo "tr 52 M=LLS_L1_SHAPER_BUCKET_C IS=min IE=4 ITERations=1";tr 52 M=LLS_L1_SHAPER_BUCKET_C IS=min IE=4 ITERations=1;echo "done"; 283 echo "there are 369 more memories to test.";echo "tr 52 M=LLS_L1_SHAPER_CONFIG_C IS=min IE=4 ITERations=1";tr 52 M=LLS_L1_SHAPER_CONFIG_C IS=min IE=4 ITERations=1;echo "done"; 284 echo "there are 368 more memories to test.";echo "tr 52 M=LLS_L1_WERR_MAX_SC IS=min IE=4 ITERations=1";tr 52 M=LLS_L1_WERR_MAX_SC IS=min IE=4 ITERations=1;echo "done"; 285 echo "there are 367 more memories to test.";echo "tr 52 M=LLS_L1_WERR_NEXT IS=min IE=4 ITERations=1";tr 52 M=LLS_L1_WERR_NEXT IS=min IE=4 ITERations=1;echo "done"; 286 #echo "there are 366 more memories to test.";echo "tr 52 M=LLS_L1_XOFF IS=min IE=4 ITERations=1";tr 52 M=LLS_L1_XOFF IS=min IE=4 ITERations=1;echo "done"; 287 echo "there are 365 more memories to test.";echo "tr 52 M=LLS_L2_CHILD_STATE1 IS=min IE=4 ITERations=1";tr 52 M=LLS_L2_CHILD_STATE1 IS=min IE=4 ITERations=1;echo "done"; 288 echo "there are 364 more memories to test.";echo "tr 52 M=LLS_L2_CHILD_WEIGHT_CFG_CNT IS=min IE=4 ITERations=1";tr 52 M=LLS_L2_CHILD_WEIGHT_CFG_CNT IS=min IE=4 ITERations=1;echo "done"; 289 echo "there are 363 more memories to test.";echo "tr 52 M=LLS_L2_EMPTY_STATE IS=min IE=4 ITERations=1";tr 52 M=LLS_L2_EMPTY_STATE IS=min IE=4 ITERations=1;echo "done"; 290 echo "there are 362 more memories to test.";echo "tr 52 M=LLS_L2_ERROR IS=min IE=4 ITERations=1";tr 52 M=LLS_L2_ERROR IS=min IE=4 ITERations=1;echo "done"; 291 #echo "there are 361 more memories to test.";echo "tr 52 M=LLS_L2_MIN_BUCKET_C IS=min IE=4 ITERations=1";tr 52 M=LLS_L2_MIN_BUCKET_C IS=min IE=4 ITERations=1;echo "done"; 292 echo "there are 360 more memories to test.";echo "tr 52 M=LLS_L2_MIN_CONFIG_C IS=min IE=4 ITERations=1";tr 52 M=LLS_L2_MIN_CONFIG_C IS=min IE=4 ITERations=1;echo "done"; 293 echo "there are 359 more memories to test.";echo "tr 52 M=LLS_L2_MIN_NEXT IS=min IE=4 ITERations=1";tr 52 M=LLS_L2_MIN_NEXT IS=min IE=4 ITERations=1;echo "done"; 294 echo "there are 358 more memories to test.";echo "tr 52 M=LLS_L2_PARENT IS=min IE=4 ITERations=1";tr 52 M=LLS_L2_PARENT IS=min IE=4 ITERations=1;echo "done"; 295 #echo "there are 357 more memories to test.";echo "tr 52 M=LLS_L2_SHAPER_BUCKET IS=min IE=4 ITERations=1";tr 52 M=LLS_L2_SHAPER_BUCKET IS=min IE=4 ITERations=1;echo "done"; 296 echo "there are 356 more memories to test.";echo "tr 52 M=LLS_L2_SHAPER_CONFIG_C IS=min IE=4 ITERations=1";tr 52 M=LLS_L2_SHAPER_CONFIG_C IS=min IE=4 ITERations=1;echo "done"; 297 echo "there are 355 more memories to test.";echo "tr 52 M=LLS_L2_WERR_NEXT IS=min IE=4 ITERations=1";tr 52 M=LLS_L2_WERR_NEXT IS=min IE=4 ITERations=1;echo "done"; 298 #echo "there are 354 more memories to test.";echo "tr 52 M=LLS_L2_XOFF IS=min IE=4 ITERations=1";tr 52 M=LLS_L2_XOFF IS=min IE=4 ITERations=1;echo "done"; 299 echo "there are 353 more memories to test.";echo "tr 52 M=LLS_PORT_CONFIG IS=min IE=4 ITERations=1";tr 52 M=LLS_PORT_CONFIG IS=min IE=4 ITERations=1;echo "done"; 300 echo "there are 352 more memories to test.";echo "tr 52 M=LLS_PORT_ERROR IS=min IE=4 ITERations=1";tr 52 M=LLS_PORT_ERROR IS=min IE=4 ITERations=1;echo "done"; 301 echo "there are 351 more memories to test.";echo "tr 52 M=LLS_PORT_HEADS IS=min IE=4 ITERations=1";tr 52 M=LLS_PORT_HEADS IS=min IE=4 ITERations=1;echo "done"; 302 echo "there are 350 more memories to test.";echo "tr 52 M=LLS_PORT_PARENT_STATE IS=min IE=4 ITERations=1";tr 52 M=LLS_PORT_PARENT_STATE IS=min IE=4 ITERations=1;echo "done"; 303 #echo "there are 349 more memories to test.";echo "tr 52 M=LLS_PORT_SHAPER_BUCKET_C IS=min IE=4 ITERations=1";tr 52 M=LLS_PORT_SHAPER_BUCKET_C IS=min IE=4 ITERations=1;echo "done"; 304 echo "there are 348 more memories to test.";echo "tr 52 M=LLS_PORT_SHAPER_CONFIG_C IS=min IE=4 ITERations=1";tr 52 M=LLS_PORT_SHAPER_CONFIG_C IS=min IE=4 ITERations=1;echo "done"; 305 #echo "there are 347 more memories to test.";echo "tr 52 M=LLS_PORT_TAILS IS=min IE=4 ITERations=1";tr 52 M=LLS_PORT_TAILS IS=min IE=4 ITERations=1;echo "done"; 306 echo "there are 346 more memories to test.";echo "tr 52 M=LLS_PORT_TDM IS=min IE=4 ITERations=1";tr 52 M=LLS_PORT_TDM IS=min IE=4 ITERations=1;echo "done"; 307 echo "there are 345 more memories to test.";echo "tr 52 M=LLS_PORT_WERR_MAX_SC IS=min IE=4 ITERations=1";tr 52 M=LLS_PORT_WERR_MAX_SC IS=min IE=4 ITERations=1;echo "done"; 308 #echo "there are 344 more memories to test.";echo "tr 52 M=LLS_PORT_XOFF IS=min IE=0 ITERations=1";tr 52 M=LLS_PORT_XOFF IS=min IE=0 ITERations=1;echo "done"; 309 echo "there are 343 more memories to test.";echo "tr 52 M=LLS_S1_CONFIG IS=min IE=4 ITERations=1";tr 52 M=LLS_S1_CONFIG IS=min IE=4 ITERations=1;echo "done"; 310 echo "there are 342 more memories to test.";echo "tr 52 M=LLS_S1_ERROR IS=min IE=4 ITERations=1";tr 52 M=LLS_S1_ERROR IS=min IE=4 ITERations=1;echo "done"; 311 echo "there are 341 more memories to test.";echo "tr 52 M=LLS_S1_HEADS IS=min IE=4 ITERations=1";tr 52 M=LLS_S1_HEADS IS=min IE=4 ITERations=1;echo "done"; 312 echo "there are 340 more memories to test.";echo "tr 52 M=LLS_S1_PARENT_STATE IS=min IE=4 ITERations=1";tr 52 M=LLS_S1_PARENT_STATE IS=min IE=4 ITERations=1;echo "done"; 313 #echo "there are 339 more memories to test.";echo "tr 52 M=LLS_S1_SHAPER_BUCKET_C IS=min IE=4 ITERations=1";tr 52 M=LLS_S1_SHAPER_BUCKET_C IS=min IE=4 ITERations=1;echo "done"; 314 echo "there are 338 more memories to test.";echo "tr 52 M=LLS_S1_SHAPER_CONFIG_C IS=min IE=4 ITERations=1";tr 52 M=LLS_S1_SHAPER_CONFIG_C IS=min IE=4 ITERations=1;echo "done"; 315 echo "there are 337 more memories to test.";echo "tr 52 M=LLS_S1_TAILS IS=min IE=4 ITERations=1";tr 52 M=LLS_S1_TAILS IS=min IE=4 ITERations=1;echo "done"; 316 echo "there are 336 more memories to test.";echo "tr 52 M=LLS_S1_WERR_MAX_SC IS=min IE=4 ITERations=1";tr 52 M=LLS_S1_WERR_MAX_SC IS=min IE=4 ITERations=1;echo "done"; 317 echo "there are 335 more memories to test.";echo "tr 52 M=LMEP IS=min IE=4 ITERations=1";tr 52 M=LMEP IS=min IE=4 ITERations=1;echo "done"; 318 echo "there are 334 more memories to test.";echo "tr 52 M=LMEP_1 IS=min IE=4 ITERations=1";tr 52 M=LMEP_1 IS=min IE=4 ITERations=1;echo "done"; 319 echo "there are 333 more memories to test.";echo "tr 52 M=LOCAL_SW_DISABLE_DEFAULT_PBM IS=min IE=4 ITERations=1";tr 52 M=LOCAL_SW_DISABLE_DEFAULT_PBM IS=min IE=4 ITERations=1;echo "done"; 320 echo "there are 332 more memories to test.";echo "tr 52 M=LOCAL_SW_DISABLE_DEFAULT_PBM_MIRR IS=min IE=4 ITERations=1";tr 52 M=LOCAL_SW_DISABLE_DEFAULT_PBM_MIRR IS=min IE=4 ITERations=1;echo "done"; 321 echo "there are 331 more memories to test.";echo "tr 52 M=LPORT_TAB IS=min IE=4 ITERations=1";tr 52 M=LPORT_TAB IS=min IE=4 ITERations=1;echo "done"; 322 echo "there are 330 more memories to test.";echo "tr 52 M=MAC_BLOCK IS=min IE=4 ITERations=1";tr 52 M=MAC_BLOCK IS=min IE=4 ITERations=1;echo "done"; 323 echo "there are 329 more memories to test.";echo "tr 52 M=MAID_REDUCTION IS=min IE=4 ITERations=1";tr 52 M=MAID_REDUCTION IS=min IE=4 ITERations=1;echo "done"; 324 echo "there are 328 more memories to test.";echo "tr 52 M=MA_INDEX IS=min IE=4 ITERations=1";tr 52 M=MA_INDEX IS=min IE=4 ITERations=1;echo "done"; 325 echo "there are 327 more memories to test.";echo "tr 52 M=MA_STATE IS=min IE=4 ITERations=1";tr 52 M=MA_STATE IS=min IE=4 ITERations=1;echo "done"; 326 echo "there are 326 more memories to test.";echo "tr 52 M=MIRROR_CONTROL IS=min IE=4 ITERations=1";tr 52 M=MIRROR_CONTROL IS=min IE=4 ITERations=1;echo "done"; 327 echo "there are 325 more memories to test.";echo "tr 52 M=MMU_AGING_CTR_INT IS=min IE=4 ITERations=1";tr 52 M=MMU_AGING_CTR_INT IS=min IE=4 ITERations=1;echo "done"; 328 echo "there are 324 more memories to test.";echo "tr 52 M=MMU_AGING_EXP_INT IS=min IE=4 ITERations=1";tr 52 M=MMU_AGING_EXP_INT IS=min IE=4 ITERations=1;echo "done"; 329 echo "there are 323 more memories to test.";echo "tr 52 M=MMU_AGING_LMT_INT IS=min IE=4 ITERations=1";tr 52 M=MMU_AGING_LMT_INT IS=min IE=4 ITERations=1;echo "done"; 330 echo "there are 322 more memories to test.";echo "tr 52 M=MMU_CBPI_0 IS=min IE=4 ITERations=1";tr 52 M=MMU_CBPI_0 IS=min IE=4 ITERations=1;echo "done"; 331 echo "there are 321 more memories to test.";echo "tr 52 M=MMU_CBPI_1 IS=min IE=4 ITERations=1";tr 52 M=MMU_CBPI_1 IS=min IE=4 ITERations=1;echo "done"; 332 echo "there are 320 more memories to test.";echo "tr 52 M=MMU_CBPI_10 IS=min IE=4 ITERations=1";tr 52 M=MMU_CBPI_10 IS=min IE=4 ITERations=1;echo "done"; 333 echo "there are 319 more memories to test.";echo "tr 52 M=MMU_CBPI_11 IS=min IE=4 ITERations=1";tr 52 M=MMU_CBPI_11 IS=min IE=4 ITERations=1;echo "done"; 334 echo "there are 318 more memories to test.";echo "tr 52 M=MMU_CBPI_2 IS=min IE=4 ITERations=1";tr 52 M=MMU_CBPI_2 IS=min IE=4 ITERations=1;echo "done"; 335 echo "there are 317 more memories to test.";echo "tr 52 M=MMU_CBPI_3 IS=min IE=4 ITERations=1";tr 52 M=MMU_CBPI_3 IS=min IE=4 ITERations=1;echo "done"; 336 echo "there are 316 more memories to test.";echo "tr 52 M=MMU_CBPI_4 IS=min IE=4 ITERations=1";tr 52 M=MMU_CBPI_4 IS=min IE=4 ITERations=1;echo "done"; 337 echo "there are 315 more memories to test.";echo "tr 52 M=MMU_CBPI_5 IS=min IE=4 ITERations=1";tr 52 M=MMU_CBPI_5 IS=min IE=4 ITERations=1;echo "done"; 338 echo "there are 314 more memories to test.";echo "tr 52 M=MMU_CBPI_6 IS=min IE=4 ITERations=1";tr 52 M=MMU_CBPI_6 IS=min IE=4 ITERations=1;echo "done"; 339 echo "there are 313 more memories to test.";echo "tr 52 M=MMU_CBPI_7 IS=min IE=4 ITERations=1";tr 52 M=MMU_CBPI_7 IS=min IE=4 ITERations=1;echo "done"; 340 echo "there are 312 more memories to test.";echo "tr 52 M=MMU_CBPI_8 IS=min IE=4 ITERations=1";tr 52 M=MMU_CBPI_8 IS=min IE=4 ITERations=1;echo "done"; 341 echo "there are 311 more memories to test.";echo "tr 52 M=MMU_CBPI_9 IS=min IE=4 ITERations=1";tr 52 M=MMU_CBPI_9 IS=min IE=4 ITERations=1;echo "done"; 342 echo "there are 310 more memories to test.";echo "tr 52 M=MMU_CCPI_MEM IS=min IE=4 ITERations=1";tr 52 M=MMU_CCPI_MEM IS=min IE=4 ITERations=1;echo "done"; 343 echo "there are 309 more memories to test.";echo "tr 52 M=MMU_CELLLINKI IS=min IE=4 ITERations=1";tr 52 M=MMU_CELLLINKI IS=min IE=4 ITERations=1;echo "done"; 344 echo "there are 308 more memories to test.";echo "tr 52 M=MMU_CFAPI_BITMAP IS=min IE=4 ITERations=1";tr 52 M=MMU_CFAPI_BITMAP IS=min IE=4 ITERations=1;echo "done"; 345 echo "there are 307 more memories to test.";echo "tr 52 M=MMU_CFAPI_STACK IS=min IE=4 ITERations=1";tr 52 M=MMU_CFAPI_STACK IS=min IE=4 ITERations=1;echo "done"; 346 echo "there are 306 more memories to test.";echo "tr 52 M=MMU_CHFC_SYSPORT_MAPPING IS=min IE=4 ITERations=1";tr 52 M=MMU_CHFC_SYSPORT_MAPPING IS=min IE=4 ITERations=1;echo "done"; 347 echo "there are 305 more memories to test.";echo "tr 52 M=MMU_DEQ_AGING_MASK_LOOKUP_TABLE_MEM IS=min IE=4 ITERations=1";tr 52 M=MMU_DEQ_AGING_MASK_LOOKUP_TABLE_MEM IS=min IE=4 ITERations=1;echo "done"; 348 #echo "there are 304 more memories to test.";echo "tr 52 M=MMU_ENQ_CBP_32B_WR_STORE_0 IS=min IE=4 ITERations=1";tr 52 M=MMU_ENQ_CBP_32B_WR_STORE_0 IS=min IE=4 ITERations=1;echo "done"; 349 #echo "there are 303 more memories to test.";echo "tr 52 M=MMU_ENQ_CBP_32B_WR_STORE_1 IS=min IE=4 ITERations=1";tr 52 M=MMU_ENQ_CBP_32B_WR_STORE_1 IS=min IE=4 ITERations=1;echo "done"; 350 echo "there are 302 more memories to test.";echo "tr 52 M=MMU_ENQ_CBP_32B_WR_STORE_2 IS=min IE=4 ITERations=1";tr 52 M=MMU_ENQ_CBP_32B_WR_STORE_2 IS=min IE=4 ITERations=1;echo "done"; 351 echo "there are 301 more memories to test.";echo "tr 52 M=MMU_ENQ_CFAPI_INTERNAL_RECYCLE IS=min IE=4 ITERations=1";tr 52 M=MMU_ENQ_CFAPI_INTERNAL_RECYCLE IS=min IE=4 ITERations=1;echo "done"; 352 echo "there are 300 more memories to test.";echo "tr 52 M=MMU_ENQ_FAP_BITMAP IS=min IE=4 ITERations=1";tr 52 M=MMU_ENQ_FAP_BITMAP IS=min IE=4 ITERations=1;echo "done"; 353 echo "there are 299 more memories to test.";echo "tr 52 M=MMU_ENQ_FAP_STACK IS=min IE=4 ITERations=1";tr 52 M=MMU_ENQ_FAP_STACK IS=min IE=4 ITERations=1;echo "done"; 354 #echo "there are 298 more memories to test.";echo "tr 52 M=MMU_ENQ_RQE_WR_COMPLETE_0 IS=min IE=4 ITERations=1";tr 52 M=MMU_ENQ_RQE_WR_COMPLETE_0 IS=min IE=4 ITERations=1;echo "done"; 355 #echo "there are 297 more memories to test.";echo "tr 52 M=MMU_ENQ_RQE_WR_COMPLETE_1 IS=min IE=4 ITERations=1";tr 52 M=MMU_ENQ_RQE_WR_COMPLETE_1 IS=min IE=4 ITERations=1;echo "done"; 356 echo "there are 296 more memories to test.";echo "tr 52 M=MMU_ENQ_RQE_WR_COMPLETE_2 IS=min IE=4 ITERations=1";tr 52 M=MMU_ENQ_RQE_WR_COMPLETE_2 IS=min IE=4 ITERations=1;echo "done"; 357 echo "there are 295 more memories to test.";echo "tr 52 M=MMU_ENQ_SRC_PORT_STATE_0 IS=min IE=4 ITERations=1";tr 52 M=MMU_ENQ_SRC_PORT_STATE_0 IS=min IE=4 ITERations=1;echo "done"; 358 echo "there are 294 more memories to test.";echo "tr 52 M=MMU_ENQ_SRC_PPP_TO_S1_LOOKUP IS=min IE=4 ITERations=1";tr 52 M=MMU_ENQ_SRC_PPP_TO_S1_LOOKUP IS=min IE=4 ITERations=1;echo "done"; 359 echo "there are 293 more memories to test.";echo "tr 52 M=MMU_EXT_MC_GROUP_MAP IS=min IE=4 ITERations=1";tr 52 M=MMU_EXT_MC_GROUP_MAP IS=min IE=4 ITERations=1;echo "done"; 360 echo "there are 292 more memories to test.";echo "tr 52 M=MMU_EXT_MC_QUEUE_LIST0 IS=min IE=4 ITERations=1";tr 52 M=MMU_EXT_MC_QUEUE_LIST0 IS=min IE=4 ITERations=1;echo "done"; 361 echo "there are 291 more memories to test.";echo "tr 52 M=MMU_EXT_MC_QUEUE_LIST4 IS=min IE=4 ITERations=1";tr 52 M=MMU_EXT_MC_QUEUE_LIST4 IS=min IE=4 ITERations=1;echo "done"; 362 echo "there are 290 more memories to test.";echo "tr 52 M=MMU_INITIAL_NHOP_TBL IS=min IE=4 ITERations=1";tr 52 M=MMU_INITIAL_NHOP_TBL IS=min IE=4 ITERations=1;echo "done"; 363 echo "there are 289 more memories to test.";echo "tr 52 M=MMU_INTFI_BASE_INDEX_TBL IS=min IE=4 ITERations=1";tr 52 M=MMU_INTFI_BASE_INDEX_TBL IS=min IE=4 ITERations=1;echo "done"; 364 echo "there are 288 more memories to test.";echo "tr 52 M=MMU_INTFI_FC_MAP_TBL0 IS=min IE=3 ITERations=1";tr 52 M=MMU_INTFI_FC_MAP_TBL0 IS=min IE=3 ITERations=1;echo "done"; 365 echo "there are 287 more memories to test.";echo "tr 52 M=MMU_INTFI_FC_MAP_TBL1 IS=min IE=4 ITERations=1";tr 52 M=MMU_INTFI_FC_MAP_TBL1 IS=min IE=4 ITERations=1;echo "done"; 366 echo "there are 286 more memories to test.";echo "tr 52 M=MMU_INTFI_FC_MAP_TBL2 IS=min IE=4 ITERations=1";tr 52 M=MMU_INTFI_FC_MAP_TBL2 IS=min IE=4 ITERations=1;echo "done"; 367 echo "there are 285 more memories to test.";echo "tr 52 M=MMU_INTFI_FC_ST_TBL0 IS=min IE=4 ITERations=1";tr 52 M=MMU_INTFI_FC_ST_TBL0 IS=min IE=4 ITERations=1;echo "done"; 368 echo "there are 284 more memories to test.";echo "tr 52 M=MMU_INTFI_FC_ST_TBL1 IS=min IE=4 ITERations=1";tr 52 M=MMU_INTFI_FC_ST_TBL1 IS=min IE=4 ITERations=1;echo "done"; 369 echo "there are 283 more memories to test.";echo "tr 52 M=MMU_INTFI_FC_ST_TBL2 IS=min IE=4 ITERations=1";tr 52 M=MMU_INTFI_FC_ST_TBL2 IS=min IE=4 ITERations=1;echo "done"; 370 echo "there are 282 more memories to test.";echo "tr 52 M=MMU_INTFI_MERGE_ST_TBL IS=min IE=4 ITERations=1";tr 52 M=MMU_INTFI_MERGE_ST_TBL IS=min IE=4 ITERations=1;echo "done"; 371 echo "there are 281 more memories to test.";echo "tr 52 M=MMU_INTFI_OFFSET_MAP_TBL IS=min IE=4 ITERations=1";tr 52 M=MMU_INTFI_OFFSET_MAP_TBL IS=min IE=4 ITERations=1;echo "done"; 372 #echo "there are 280 more memories to test.";echo "tr 52 M=MMU_INTFI_PFC_ST_TBL IS=min IE=4 ITERations=1";tr 52 M=MMU_INTFI_PFC_ST_TBL IS=min IE=4 ITERations=1;echo "done"; 373 echo "there are 279 more memories to test.";echo "tr 52 M=MMU_INTFI_ST_TRANS_TBL IS=min IE=4 ITERations=1";tr 52 M=MMU_INTFI_ST_TRANS_TBL IS=min IE=4 ITERations=1;echo "done"; 374 echo "there are 278 more memories to test.";echo "tr 52 M=MMU_INTFO_TC2PRI_MAPPING IS=min IE=4 ITERations=1";tr 52 M=MMU_INTFO_TC2PRI_MAPPING IS=min IE=4 ITERations=1;echo "done"; 375 echo "there are 277 more memories to test.";echo "tr 52 M=MMU_IPCTR_CTXT_COUNTER_0 IS=min IE=4 ITERations=1";tr 52 M=MMU_IPCTR_CTXT_COUNTER_0 IS=min IE=4 ITERations=1;echo "done"; 376 echo "there are 276 more memories to test.";echo "tr 52 M=MMU_IPCTR_PG_COUNTER_0 IS=min IE=4 ITERations=1";tr 52 M=MMU_IPCTR_PG_COUNTER_0 IS=min IE=4 ITERations=1;echo "done"; 377 #echo "there are 275 more memories to test.";echo "tr 52 M=MMU_IPCTR_PG_COUNTER_1 IS=min IE=4 ITERations=1";tr 52 M=MMU_IPCTR_PG_COUNTER_1 IS=min IE=4 ITERations=1;echo "done"; 378 echo "there are 274 more memories to test.";echo "tr 52 M=MMU_IPMC_GROUP_TBL IS=min IE=4 ITERations=1";tr 52 M=MMU_IPMC_GROUP_TBL IS=min IE=4 ITERations=1;echo "done"; 379 echo "there are 273 more memories to test.";echo "tr 52 M=MMU_PROT_GROUP_TABLE IS=min IE=4 ITERations=1";tr 52 M=MMU_PROT_GROUP_TABLE IS=min IE=4 ITERations=1;echo "done"; 380 echo "there are 272 more memories to test.";echo "tr 52 M=MMU_QSTRUCT_QBLOCK_BM_0 IS=min IE=4 ITERations=1";tr 52 M=MMU_QSTRUCT_QBLOCK_BM_0 IS=min IE=4 ITERations=1;echo "done"; 381 echo "there are 271 more memories to test.";echo "tr 52 M=MMU_QSTRUCT_QBLOCK_BM_1 IS=min IE=4 ITERations=1";tr 52 M=MMU_QSTRUCT_QBLOCK_BM_1 IS=min IE=4 ITERations=1;echo "done"; 382 echo "there are 270 more memories to test.";echo "tr 52 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_0 IS=min IE=4 ITERations=1";tr 52 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_0 IS=min IE=4 ITERations=1;echo "done"; 383 echo "there are 269 more memories to test.";echo "tr 52 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_1 IS=min IE=4 ITERations=1";tr 52 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_1 IS=min IE=4 ITERations=1;echo "done"; 384 echo "there are 268 more memories to test.";echo "tr 52 M=MMU_QSTRUCT_QBLOCK_NEXT IS=min IE=4 ITERations=1";tr 52 M=MMU_QSTRUCT_QBLOCK_NEXT IS=min IE=4 ITERations=1;echo "done"; 385 echo "there are 267 more memories to test.";echo "tr 52 M=MMU_QSTRUCT_QENTRY IS=min IE=4 ITERations=1";tr 52 M=MMU_QSTRUCT_QENTRY IS=min IE=4 ITERations=1;echo "done"; 386 echo "there are 266 more memories to test.";echo "tr 52 M=MMU_RDE_ADM_DPC_STORE_MEM IS=min IE=4 ITERations=1";tr 52 M=MMU_RDE_ADM_DPC_STORE_MEM IS=min IE=4 ITERations=1;echo "done"; 387 echo "there are 265 more memories to test.";echo "tr 52 M=MMU_RDE_REAL_CELL_FIFO_MEM IS=min IE=4 ITERations=1";tr 52 M=MMU_RDE_REAL_CELL_FIFO_MEM IS=min IE=4 ITERations=1;echo "done"; 388 echo "there are 264 more memories to test.";echo "tr 52 M=MMU_RDE_TXQ_FLL IS=min IE=4 ITERations=1";tr 52 M=MMU_RDE_TXQ_FLL IS=min IE=4 ITERations=1;echo "done"; 389 echo "there are 263 more memories to test.";echo "tr 52 M=MMU_RDE_TXQ_QLL IS=min IE=4 ITERations=1";tr 52 M=MMU_RDE_TXQ_QLL IS=min IE=4 ITERations=1;echo "done"; 390 echo "there are 262 more memories to test.";echo "tr 52 M=MMU_RDE_TXQ_STATE IS=min IE=4 ITERations=1";tr 52 M=MMU_RDE_TXQ_STATE IS=min IE=4 ITERations=1;echo "done"; 391 echo "there are 261 more memories to test.";echo "tr 52 M=MMU_REPL_GRP_TBL IS=min IE=4 ITERations=1";tr 52 M=MMU_REPL_GRP_TBL IS=min IE=4 ITERations=1;echo "done"; 392 echo "there are 260 more memories to test.";echo "tr 52 M=MMU_REPL_HEAD_TBL IS=min IE=4 ITERations=1";tr 52 M=MMU_REPL_HEAD_TBL IS=min IE=4 ITERations=1;echo "done"; 393 echo "there are 259 more memories to test.";echo "tr 52 M=MMU_REPL_LIST_TBL IS=min IE=4 ITERations=1";tr 52 M=MMU_REPL_LIST_TBL IS=min IE=4 ITERations=1;echo "done"; 394 echo "there are 258 more memories to test.";echo "tr 52 M=MMU_REPL_MAP_TBL IS=min IE=4 ITERations=1";tr 52 M=MMU_REPL_MAP_TBL IS=min IE=4 ITERations=1;echo "done"; 395 echo "there are 257 more memories to test.";echo "tr 52 M=MMU_REPL_STATE_TBL IS=min IE=4 ITERations=1";tr 52 M=MMU_REPL_STATE_TBL IS=min IE=4 ITERations=1;echo "done"; 396 echo "there are 256 more memories to test.";echo "tr 52 M=MMU_RPFAP_BITMAP IS=min IE=4 ITERations=1";tr 52 M=MMU_RPFAP_BITMAP IS=min IE=4 ITERations=1;echo "done"; 397 echo "there are 255 more memories to test.";echo "tr 52 M=MMU_RPFAP_STACK IS=min IE=4 ITERations=1";tr 52 M=MMU_RPFAP_STACK IS=min IE=4 ITERations=1;echo "done"; 398 echo "there are 254 more memories to test.";echo "tr 52 M=MMU_RQE_QMGR_FLL IS=min IE=4 ITERations=1";tr 52 M=MMU_RQE_QMGR_FLL IS=min IE=4 ITERations=1;echo "done"; 399 echo "there are 253 more memories to test.";echo "tr 52 M=MMU_RQE_QMGR_QLL IS=min IE=4 ITERations=1";tr 52 M=MMU_RQE_QMGR_QLL IS=min IE=4 ITERations=1;echo "done"; 400 echo "there are 252 more memories to test.";echo "tr 52 M=MMU_RQE_QUEUE_OP_NODE_MAP IS=min IE=4 ITERations=1";tr 52 M=MMU_RQE_QUEUE_OP_NODE_MAP IS=min IE=4 ITERations=1;echo "done"; 401 echo "there are 251 more memories to test.";echo "tr 52 M=MMU_RQE_WORK_QUEUE IS=min IE=4 ITERations=1";tr 52 M=MMU_RQE_WORK_QUEUE IS=min IE=4 ITERations=1;echo "done"; 402 echo "there are 250 more memories to test.";echo "tr 52 M=MMU_THDO_CTRO_UC_DTYPE IS=min IE=4 ITERations=1";tr 52 M=MMU_THDO_CTRO_UC_DTYPE IS=min IE=4 ITERations=1;echo "done"; 403 echo "there are 249 more memories to test.";echo "tr 52 M=MMU_THDO_CTRO_UC_PKT_STORE IS=min IE=4 ITERations=1";tr 52 M=MMU_THDO_CTRO_UC_PKT_STORE IS=min IE=4 ITERations=1;echo "done"; 404 echo "there are 248 more memories to test.";echo "tr 52 M=MMU_THDO_OPNCONFIG_CELL IS=min IE=4 ITERations=1";tr 52 M=MMU_THDO_OPNCONFIG_CELL IS=min IE=4 ITERations=1;echo "done"; 405 echo "there are 247 more memories to test.";echo "tr 52 M=MMU_THDO_OPNCONFIG_QENTRY IS=min IE=4 ITERations=1";tr 52 M=MMU_THDO_OPNCONFIG_QENTRY IS=min IE=4 ITERations=1;echo "done"; 406 echo "there are 246 more memories to test.";echo "tr 52 M=MMU_THDO_OPNCOUNT_CELL IS=min IE=4 ITERations=1";tr 52 M=MMU_THDO_OPNCOUNT_CELL IS=min IE=4 ITERations=1;echo "done"; 407 echo "there are 245 more memories to test.";echo "tr 52 M=THDO_OPNCOUNT_QENTRY IS=min IE=4 ITERations=1";tr 52 M=THDO_OPNCOUNT_QENTRY IS=min IE=4 ITERations=1;echo "done"; 408 echo "there are 244 more memories to test.";echo "tr 52 M=MMU_THDO_OPNOFFSET_CELL IS=min IE=4 ITERations=1";tr 52 M=MMU_THDO_OPNOFFSET_CELL IS=min IE=4 ITERations=1;echo "done"; 409 echo "there are 243 more memories to test.";echo "tr 52 M=MMU_THDO_OPNOFFSET_QENTRY IS=min IE=4 ITERations=1";tr 52 M=MMU_THDO_OPNOFFSET_QENTRY IS=min IE=4 ITERations=1;echo "done"; 410 echo "there are 242 more memories to test.";echo "tr 52 M=MMU_THDO_OPNSTATUS_CELL IS=min IE=4 ITERations=1";tr 52 M=MMU_THDO_OPNSTATUS_CELL IS=min IE=4 ITERations=1;echo "done"; 411 echo "there are 241 more memories to test.";echo "tr 52 M=MMU_THDO_OPNSTATUS_QENTRY IS=min IE=4 ITERations=1";tr 52 M=MMU_THDO_OPNSTATUS_QENTRY IS=min IE=4 ITERations=1;echo "done"; 412 echo "there are 240 more memories to test.";echo "tr 52 M=MMU_THDO_QCONFIG_CELL IS=min IE=4 ITERations=1";tr 52 M=MMU_THDO_QCONFIG_CELL IS=min IE=4 ITERations=1;echo "done"; 413 echo "there are 239 more memories to test.";echo "tr 52 M=MMU_THDO_QCONFIG_QENTRY IS=min IE=4 ITERations=1";tr 52 M=MMU_THDO_QCONFIG_QENTRY IS=min IE=4 ITERations=1;echo "done"; 414 echo "there are 238 more memories to test.";echo "tr 52 M=MMU_THDO_QCOUNT_CELL IS=min IE=4 ITERations=1";tr 52 M=MMU_THDO_QCOUNT_CELL IS=min IE=4 ITERations=1;echo "done"; 415 echo "there are 237 more memories to test.";echo "tr 52 M=THDO_QCOUNT_QENTRY IS=min IE=4 ITERations=1";tr 52 M=THDO_QCOUNT_QENTRY IS=min IE=4 ITERations=1;echo "done"; 416 echo "there are 236 more memories to test.";echo "tr 52 M=MMU_THDO_QOFFSET_CELL IS=min IE=4 ITERations=1";tr 52 M=MMU_THDO_QOFFSET_CELL IS=min IE=4 ITERations=1;echo "done"; 417 echo "there are 235 more memories to test.";echo "tr 52 M=MMU_THDO_QOFFSET_QENTRY IS=min IE=4 ITERations=1";tr 52 M=MMU_THDO_QOFFSET_QENTRY IS=min IE=4 ITERations=1;echo "done"; 418 echo "there are 234 more memories to test.";echo "tr 52 M=MMU_THDO_QRESET_VALUE_CELL IS=min IE=4 ITERations=1";tr 52 M=MMU_THDO_QRESET_VALUE_CELL IS=min IE=4 ITERations=1;echo "done"; 419 echo "there are 233 more memories to test.";echo "tr 52 M=MMU_THDO_QRESET_VALUE_QENTRY IS=min IE=4 ITERations=1";tr 52 M=MMU_THDO_QRESET_VALUE_QENTRY IS=min IE=4 ITERations=1;echo "done"; 420 echo "there are 232 more memories to test.";echo "tr 52 M=MMU_THDO_QSTATUS_CELL IS=min IE=4 ITERations=1";tr 52 M=MMU_THDO_QSTATUS_CELL IS=min IE=4 ITERations=1;echo "done"; 421 echo "there are 231 more memories to test.";echo "tr 52 M=MMU_THDO_QSTATUS_QENTRY IS=min IE=4 ITERations=1";tr 52 M=MMU_THDO_QSTATUS_QENTRY IS=min IE=4 ITERations=1;echo "done"; 422 echo "there are 230 more memories to test.";echo "tr 52 M=MMU_TOQ_PORT_STATE_MEM IS=min IE=4 ITERations=1";tr 52 M=MMU_TOQ_PORT_STATE_MEM IS=min IE=4 ITERations=1;echo "done"; 423 echo "there are 229 more memories to test.";echo "tr 52 M=MMU_TOQ_STATE_MEM0 IS=min IE=4 ITERations=1";tr 52 M=MMU_TOQ_STATE_MEM0 IS=min IE=4 ITERations=1;echo "done"; 424 echo "there are 228 more memories to test.";echo "tr 52 M=MMU_TOQ_STATE_MEM1 IS=min IE=4 ITERations=1";tr 52 M=MMU_TOQ_STATE_MEM1 IS=min IE=4 ITERations=1;echo "done"; 425 echo "there are 227 more memories to test.";echo "tr 52 M=MMU_WRED_DROP_CURVE_PROFILE_0 IS=min IE=4 ITERations=1";tr 52 M=MMU_WRED_DROP_CURVE_PROFILE_0 IS=min IE=4 ITERations=1;echo "done"; 426 echo "there are 226 more memories to test.";echo "tr 52 M=MMU_WRED_DROP_CURVE_PROFILE_1 IS=min IE=4 ITERations=1";tr 52 M=MMU_WRED_DROP_CURVE_PROFILE_1 IS=min IE=4 ITERations=1;echo "done"; 427 echo "there are 225 more memories to test.";echo "tr 52 M=MMU_WRED_DROP_CURVE_PROFILE_2 IS=min IE=4 ITERations=1";tr 52 M=MMU_WRED_DROP_CURVE_PROFILE_2 IS=min IE=4 ITERations=1;echo "done"; 428 echo "there are 224 more memories to test.";echo "tr 52 M=MMU_WRED_DROP_CURVE_PROFILE_3 IS=min IE=4 ITERations=1";tr 52 M=MMU_WRED_DROP_CURVE_PROFILE_3 IS=min IE=4 ITERations=1;echo "done"; 429 echo "there are 223 more memories to test.";echo "tr 52 M=MMU_WRED_DROP_CURVE_PROFILE_4 IS=min IE=4 ITERations=1";tr 52 M=MMU_WRED_DROP_CURVE_PROFILE_4 IS=min IE=4 ITERations=1;echo "done"; 430 echo "there are 222 more memories to test.";echo "tr 52 M=MMU_WRED_DROP_CURVE_PROFILE_5 IS=min IE=4 ITERations=1";tr 52 M=MMU_WRED_DROP_CURVE_PROFILE_5 IS=min IE=4 ITERations=1;echo "done"; 431 #echo "there are 221 more memories to test.";echo "tr 52 M=MMU_WRED_OPN_AVG_QSIZE_BUFFER IS=min IE=4 ITERations=1";tr 52 M=MMU_WRED_OPN_AVG_QSIZE_BUFFER IS=min IE=4 ITERations=1;echo "done"; 432 #echo "there are 220 more memories to test.";echo "tr 52 M=MMU_WRED_OPN_AVG_QSIZE_QENTRY IS=min IE=4 ITERations=1";tr 52 M=MMU_WRED_OPN_AVG_QSIZE_QENTRY IS=min IE=4 ITERations=1;echo "done"; 433 echo "there are 219 more memories to test.";echo "tr 52 M=MMU_WRED_OPN_CONFIG_BUFFER IS=min IE=4 ITERations=1";tr 52 M=MMU_WRED_OPN_CONFIG_BUFFER IS=min IE=4 ITERations=1;echo "done"; 434 echo "there are 218 more memories to test.";echo "tr 52 M=MMU_WRED_OPN_CONFIG_QENTRY IS=min IE=4 ITERations=1";tr 52 M=MMU_WRED_OPN_CONFIG_QENTRY IS=min IE=4 ITERations=1;echo "done"; 435 echo "there are 217 more memories to test.";echo "tr 52 M=MMU_WRED_OPN_DROP_THD_DEQ IS=min IE=4 ITERations=1";tr 52 M=MMU_WRED_OPN_DROP_THD_DEQ IS=min IE=4 ITERations=1;echo "done"; 436 echo "there are 216 more memories to test.";echo "tr 52 M=MMU_WRED_OPN_DROP_THD_ENQ IS=min IE=4 ITERations=1";tr 52 M=MMU_WRED_OPN_DROP_THD_ENQ IS=min IE=4 ITERations=1;echo "done"; 437 #echo "there are 215 more memories to test.";echo "tr 52 M=MMU_WRED_QUEUE_AVG_QSIZE_BUFFER IS=min IE=4 ITERations=1";tr 52 M=MMU_WRED_QUEUE_AVG_QSIZE_BUFFER IS=min IE=4 ITERations=1;echo "done"; 438 #echo "there are 214 more memories to test.";echo "tr 52 M=MMU_WRED_QUEUE_AVG_QSIZE_QENTRY IS=min IE=4 ITERations=1";tr 52 M=MMU_WRED_QUEUE_AVG_QSIZE_QENTRY IS=min IE=4 ITERations=1;echo "done"; 439 echo "there are 213 more memories to test.";echo "tr 52 M=MMU_WRED_QUEUE_CONFIG_BUFFER IS=min IE=4 ITERations=1";tr 52 M=MMU_WRED_QUEUE_CONFIG_BUFFER IS=min IE=4 ITERations=1;echo "done"; 440 echo "there are 212 more memories to test.";echo "tr 52 M=MMU_WRED_QUEUE_CONFIG_QENTRY IS=min IE=4 ITERations=1";tr 52 M=MMU_WRED_QUEUE_CONFIG_QENTRY IS=min IE=4 ITERations=1;echo "done"; 441 echo "there are 211 more memories to test.";echo "tr 52 M=MMU_WRED_QUEUE_DROP_THD_DEQ IS=min IE=4 ITERations=1";tr 52 M=MMU_WRED_QUEUE_DROP_THD_DEQ IS=min IE=4 ITERations=1;echo "done"; 442 echo "there are 210 more memories to test.";echo "tr 52 M=MMU_WRED_QUEUE_DROP_THD_ENQ IS=min IE=4 ITERations=1";tr 52 M=MMU_WRED_QUEUE_DROP_THD_ENQ IS=min IE=4 ITERations=1;echo "done"; 443 echo "there are 209 more memories to test.";echo "tr 52 M=MMU_WRED_QUEUE_OP_NODE_MAP IS=min IE=4 ITERations=1";tr 52 M=MMU_WRED_QUEUE_OP_NODE_MAP IS=min IE=4 ITERations=1;echo "done"; 444 echo "there are 208 more memories to test.";echo "tr 52 M=MODPORT_MAP_M0 IS=min IE=4 ITERations=1";tr 52 M=MODPORT_MAP_M0 IS=min IE=4 ITERations=1;echo "done"; 445 echo "there are 207 more memories to test.";echo "tr 52 M=MODPORT_MAP_M1 IS=min IE=4 ITERations=1";tr 52 M=MODPORT_MAP_M1 IS=min IE=4 ITERations=1;echo "done"; 446 echo "there are 206 more memories to test.";echo "tr 52 M=MODPORT_MAP_M2 IS=min IE=4 ITERations=1";tr 52 M=MODPORT_MAP_M2 IS=min IE=4 ITERations=1;echo "done"; 447 echo "there are 205 more memories to test.";echo "tr 52 M=MODPORT_MAP_M3 IS=min IE=4 ITERations=1";tr 52 M=MODPORT_MAP_M3 IS=min IE=4 ITERations=1;echo "done"; 448 echo "there are 204 more memories to test.";echo "tr 52 M=MODPORT_MAP_MIRROR IS=min IE=4 ITERations=1";tr 52 M=MODPORT_MAP_MIRROR IS=min IE=4 ITERations=1;echo "done"; 449 echo "there are 203 more memories to test.";echo "tr 52 M=MODPORT_MAP_SW IS=min IE=4 ITERations=1";tr 52 M=MODPORT_MAP_SW IS=min IE=4 ITERations=1;echo "done"; 450 echo "there are 202 more memories to test.";echo "tr 52 M=MPLS_ENTRY IS=min IE=4 ITERations=1";tr 52 M=MPLS_ENTRY IS=min IE=4 ITERations=1;echo "done"; 451 echo "there are 201 more memories to test.";echo "tr 52 M=MPLS_OAM_ACH_TYPE_CONFIG IS=min IE=4 ITERations=1";tr 52 M=MPLS_OAM_ACH_TYPE_CONFIG IS=min IE=4 ITERations=1;echo "done"; 452 echo "there are 200 more memories to test.";echo "tr 52 M=MP_GROUP IS=min IE=4 ITERations=1";tr 52 M=MP_GROUP IS=min IE=4 ITERations=1;echo "done"; 453 #echo "there are 199 more memories to test.";echo "tr 52 M=MULTIPASS_LOOPBACK_BITMAP IS=min IE=0 ITERations=1";tr 52 M=MULTIPASS_LOOPBACK_BITMAP IS=min IE=0 ITERations=1;echo "done"; 454 echo "there are 198 more memories to test.";echo "tr 52 M=MY_STATION_TCAM IS=min IE=4 ITERations=1";tr 52 M=MY_STATION_TCAM IS=min IE=4 ITERations=1;echo "done"; 455 echo "there are 197 more memories to test.";echo "tr 52 M=MY_STATION_TCAM_DATA_ONLY IS=min IE=4 ITERations=1";tr 52 M=MY_STATION_TCAM_DATA_ONLY IS=min IE=4 ITERations=1;echo "done"; 456 echo "there are 196 more memories to test.";echo "tr 52 M=MY_STATION_TCAM_ENTRY_ONLY IS=min IE=4 ITERations=1";tr 52 M=MY_STATION_TCAM_ENTRY_ONLY IS=min IE=4 ITERations=1;echo "done"; 457 echo "there are 195 more memories to test.";echo "tr 52 M=NHI_GROUP_TC_PROFILE IS=min IE=4 ITERations=1";tr 52 M=NHI_GROUP_TC_PROFILE IS=min IE=4 ITERations=1;echo "done"; 458 echo "there are 194 more memories to test.";echo "tr 52 M=NONUCAST_TRUNK_BLOCK_MASK IS=min IE=4 ITERations=1";tr 52 M=NONUCAST_TRUNK_BLOCK_MASK IS=min IE=4 ITERations=1;echo "done"; 459 echo "there are 193 more memories to test.";echo "tr 52 M=OAMP_FLOW_STAT_10_SEC_ENTRY_1 IS=min IE=4 ITERations=1";tr 52 M=OAMP_FLOW_STAT_10_SEC_ENTRY_1 IS=min IE=4 ITERations=1;echo "done"; 460 echo "there are 192 more memories to test.";echo "tr 52 M=OAMP_FLOW_STAT_10_SEC_ENTRY_2 IS=min IE=4 ITERations=1";tr 52 M=OAMP_FLOW_STAT_10_SEC_ENTRY_2 IS=min IE=4 ITERations=1;echo "done"; 461 echo "there are 191 more memories to test.";echo "tr 52 M=OAMP_FLOW_STAT_10_SEC_ENTRY_3 IS=min IE=4 ITERations=1";tr 52 M=OAMP_FLOW_STAT_10_SEC_ENTRY_3 IS=min IE=4 ITERations=1;echo "done"; 462 echo "there are 190 more memories to test.";echo "tr 52 M=OAMP_FLOW_STAT_1_SEC_ENTRY_1 IS=min IE=4 ITERations=1";tr 52 M=OAMP_FLOW_STAT_1_SEC_ENTRY_1 IS=min IE=4 ITERations=1;echo "done"; 463 echo "there are 189 more memories to test.";echo "tr 52 M=OAMP_FLOW_STAT_1_SEC_ENTRY_2 IS=min IE=4 ITERations=1";tr 52 M=OAMP_FLOW_STAT_1_SEC_ENTRY_2 IS=min IE=4 ITERations=1;echo "done"; 464 echo "there are 188 more memories to test.";echo "tr 52 M=OAMP_FLOW_STAT_1_SEC_ENTRY_3 IS=min IE=4 ITERations=1";tr 52 M=OAMP_FLOW_STAT_1_SEC_ENTRY_3 IS=min IE=4 ITERations=1;echo "done"; 465 echo "there are 187 more memories to test.";echo "tr 52 M=OAMP_FLOW_STAT_ACCUM_ENTRY_1 IS=min IE=4 ITERations=1";tr 52 M=OAMP_FLOW_STAT_ACCUM_ENTRY_1 IS=min IE=4 ITERations=1;echo "done"; 466 echo "there are 186 more memories to test.";echo "tr 52 M=OAMP_FLOW_STAT_ACCUM_ENTRY_2 IS=min IE=4 ITERations=1";tr 52 M=OAMP_FLOW_STAT_ACCUM_ENTRY_2 IS=min IE=4 ITERations=1;echo "done"; 467 echo "there are 185 more memories to test.";echo "tr 52 M=OAMP_FLOW_STAT_ACCUM_ENTRY_3 IS=min IE=4 ITERations=1";tr 52 M=OAMP_FLOW_STAT_ACCUM_ENTRY_3 IS=min IE=4 ITERations=1;echo "done"; 468 echo "there are 184 more memories to test.";echo "tr 52 M=OAMP_FLOW_STAT_ACCUM_ENTRY_4 IS=min IE=4 ITERations=1";tr 52 M=OAMP_FLOW_STAT_ACCUM_ENTRY_4 IS=min IE=4 ITERations=1;echo "done"; 469 echo "there are 183 more memories to test.";echo "tr 52 M=OAMP_PE_0_PROG_TCAM IS=min IE=4 ITERations=1";tr 52 M=OAMP_PE_0_PROG_TCAM IS=min IE=4 ITERations=1;echo "done"; 470 echo "there are 182 more memories to test.";echo "tr 52 M=OAMP_PE_1_PROG_TCAM IS=min IE=4 ITERations=1";tr 52 M=OAMP_PE_1_PROG_TCAM IS=min IE=4 ITERations=1;echo "done"; 471 echo "there are 181 more memories to test.";echo "tr 52 M=OAMP_RX_OAM_ID_TCAM IS=min IE=4 ITERations=1";tr 52 M=OAMP_RX_OAM_ID_TCAM IS=min IE=4 ITERations=1;echo "done"; 472 echo "there are 180 more memories to test.";echo "tr 52 M=OAMP_SAT_TX_EVC_PARAMS_ENTRY_1 IS=min IE=4 ITERations=1";tr 52 M=OAMP_SAT_TX_EVC_PARAMS_ENTRY_1 IS=min IE=4 ITERations=1;echo "done"; 473 echo "there are 179 more memories to test.";echo "tr 52 M=OAMP_SAT_TX_EVC_PARAMS_ENTRY_2 IS=min IE=4 ITERations=1";tr 52 M=OAMP_SAT_TX_EVC_PARAMS_ENTRY_2 IS=min IE=4 ITERations=1;echo "done"; 474 echo "there are 178 more memories to test.";echo "tr 52 M=OAMP_SAT_TX_GEN_PARAMS IS=min IE=4 ITERations=1";tr 52 M=OAMP_SAT_TX_GEN_PARAMS IS=min IE=4 ITERations=1;echo "done"; 475 echo "there are 177 more memories to test.";echo "tr 52 M=OAM_DGLP_PROFILE IS=min IE=4 ITERations=1";tr 52 M=OAM_DGLP_PROFILE IS=min IE=4 ITERations=1;echo "done"; 476 echo "there are 176 more memories to test.";echo "tr 52 M=OAM_FLEXIBLE_DOMAIN_CONTROL IS=min IE=4 ITERations=1";tr 52 M=OAM_FLEXIBLE_DOMAIN_CONTROL IS=min IE=4 ITERations=1;echo "done"; 477 echo "there are 175 more memories to test.";echo "tr 52 M=OAM_OPCODE_CONTROL_PROFILE IS=min IE=4 ITERations=1";tr 52 M=OAM_OPCODE_CONTROL_PROFILE IS=min IE=4 ITERations=1;echo "done"; 478 echo "there are 174 more memories to test.";echo "tr 52 M=OAM_OPCODE_GROUP IS=min IE=4 ITERations=1";tr 52 M=OAM_OPCODE_GROUP IS=min IE=4 ITERations=1;echo "done"; 479 echo "there are 173 more memories to test.";echo "tr 52 M=PHB2_COS_MAP IS=min IE=4 ITERations=1";tr 52 M=PHB2_COS_MAP IS=min IE=4 ITERations=1;echo "done"; 480 echo "there are 172 more memories to test.";echo "tr 52 M=PHYSICAL_PORT_BASE_QUEUE IS=min IE=4 ITERations=1";tr 52 M=PHYSICAL_PORT_BASE_QUEUE IS=min IE=4 ITERations=1;echo "done"; 481 #echo "there are 171 more memories to test.";echo "tr 52 M=PORT_BRIDGE_BMAP IS=min IE=0 ITERations=1";tr 52 M=PORT_BRIDGE_BMAP IS=min IE=0 ITERations=1;echo "done"; 482 #echo "there are 170 more memories to test.";echo "tr 52 M=PORT_BRIDGE_MIRROR_BMAP IS=min IE=0 ITERations=1";tr 52 M=PORT_BRIDGE_MIRROR_BMAP IS=min IE=0 ITERations=1;echo "done"; 483 echo "there are 169 more memories to test.";echo "tr 52 M=PORT_CBL_TABLE IS=min IE=4 ITERations=1";tr 52 M=PORT_CBL_TABLE IS=min IE=4 ITERations=1;echo "done"; 484 echo "there are 168 more memories to test.";echo "tr 52 M=PORT_CBL_TABLE_MODBASE IS=min IE=4 ITERations=1";tr 52 M=PORT_CBL_TABLE_MODBASE IS=min IE=4 ITERations=1;echo "done"; 485 echo "there are 167 more memories to test.";echo "tr 52 M=PORT_OR_TRUNK_MAC_COUNT IS=min IE=4 ITERations=1";tr 52 M=PORT_OR_TRUNK_MAC_COUNT IS=min IE=4 ITERations=1;echo "done"; 486 echo "there are 166 more memories to test.";echo "tr 52 M=PORT_OR_TRUNK_MAC_LIMIT IS=min IE=4 ITERations=1";tr 52 M=PORT_OR_TRUNK_MAC_LIMIT IS=min IE=4 ITERations=1;echo "done"; 487 echo "there are 165 more memories to test.";echo "tr 52 M=PORT_TAB IS=min IE=4 ITERations=1";tr 52 M=PORT_TAB IS=min IE=4 ITERations=1;echo "done"; 488 #echo "there are 164 more memories to test.";echo "tr 52 M=PP_PORT_GPP_TRANSLATION_1 IS=min IE=0 ITERations=1";tr 52 M=PP_PORT_GPP_TRANSLATION_1 IS=min IE=0 ITERations=1;echo "done"; 489 #echo "there are 163 more memories to test.";echo "tr 52 M=PP_PORT_GPP_TRANSLATION_2 IS=min IE=0 ITERations=1";tr 52 M=PP_PORT_GPP_TRANSLATION_2 IS=min IE=0 ITERations=1;echo "done"; 490 #echo "there are 162 more memories to test.";echo "tr 52 M=PP_PORT_GPP_TRANSLATION_3 IS=min IE=0 ITERations=1";tr 52 M=PP_PORT_GPP_TRANSLATION_3 IS=min IE=0 ITERations=1;echo "done"; 491 #echo "there are 161 more memories to test.";echo "tr 52 M=PP_PORT_GPP_TRANSLATION_4 IS=min IE=0 ITERations=1";tr 52 M=PP_PORT_GPP_TRANSLATION_4 IS=min IE=0 ITERations=1;echo "done"; 492 echo "there are 160 more memories to test.";echo "tr 52 M=PP_PORT_TO_PHYSICAL_PORT_MAP IS=min IE=4 ITERations=1";tr 52 M=PP_PORT_TO_PHYSICAL_PORT_MAP IS=min IE=4 ITERations=1;echo "done"; 493 echo "there are 159 more memories to test.";echo "tr 52 M=PTP_LABEL_RANGE_PROFILE_TABLE IS=min IE=4 ITERations=1";tr 52 M=PTP_LABEL_RANGE_PROFILE_TABLE IS=min IE=4 ITERations=1;echo "done"; 494 echo "there are 158 more memories to test.";echo "tr 52 M=RMEP IS=min IE=4 ITERations=1";tr 52 M=RMEP IS=min IE=4 ITERations=1;echo "done"; 495 echo "there are 157 more memories to test.";echo "tr 52 M=RTAG7_FLOW_BASED_HASH IS=min IE=4 ITERations=1";tr 52 M=RTAG7_FLOW_BASED_HASH IS=min IE=4 ITERations=1;echo "done"; 496 echo "there are 156 more memories to test.";echo "tr 52 M=RTAG7_PORT_BASED_HASH IS=min IE=4 ITERations=1";tr 52 M=RTAG7_PORT_BASED_HASH IS=min IE=4 ITERations=1;echo "done"; 497 echo "there are 155 more memories to test.";echo "tr 52 M=RXLP_DEBUG_COUNTER0 IS=min IE=4 ITERations=1";tr 52 M=RXLP_DEBUG_COUNTER0 IS=min IE=4 ITERations=1;echo "done"; 498 echo "there are 154 more memories to test.";echo "tr 52 M=RXLP_DEBUG_COUNTER1 IS=min IE=4 ITERations=1";tr 52 M=RXLP_DEBUG_COUNTER1 IS=min IE=4 ITERations=1;echo "done"; 499 echo "there are 153 more memories to test.";echo "tr 52 M=RXLP_DEBUG_COUNTER10 IS=min IE=4 ITERations=1";tr 52 M=RXLP_DEBUG_COUNTER10 IS=min IE=4 ITERations=1;echo "done"; 500 echo "there are 152 more memories to test.";echo "tr 52 M=RXLP_DEBUG_COUNTER11 IS=min IE=4 ITERations=1";tr 52 M=RXLP_DEBUG_COUNTER11 IS=min IE=4 ITERations=1;echo "done"; 501 echo "there are 151 more memories to test.";echo "tr 52 M=RXLP_DEBUG_COUNTER2 IS=min IE=4 ITERations=1";tr 52 M=RXLP_DEBUG_COUNTER2 IS=min IE=4 ITERations=1;echo "done"; 502 echo "there are 150 more memories to test.";echo "tr 52 M=RXLP_DEBUG_COUNTER3 IS=min IE=4 ITERations=1";tr 52 M=RXLP_DEBUG_COUNTER3 IS=min IE=4 ITERations=1;echo "done"; 503 echo "there are 149 more memories to test.";echo "tr 52 M=RXLP_DEBUG_COUNTER4 IS=min IE=4 ITERations=1";tr 52 M=RXLP_DEBUG_COUNTER4 IS=min IE=4 ITERations=1;echo "done"; 504 echo "there are 148 more memories to test.";echo "tr 52 M=RXLP_DEBUG_COUNTER5 IS=min IE=4 ITERations=1";tr 52 M=RXLP_DEBUG_COUNTER5 IS=min IE=4 ITERations=1;echo "done"; 505 echo "there are 147 more memories to test.";echo "tr 52 M=RXLP_DEBUG_COUNTER6 IS=min IE=4 ITERations=1";tr 52 M=RXLP_DEBUG_COUNTER6 IS=min IE=4 ITERations=1;echo "done"; 506 echo "there are 146 more memories to test.";echo "tr 52 M=RXLP_DEBUG_COUNTER7 IS=min IE=4 ITERations=1";tr 52 M=RXLP_DEBUG_COUNTER7 IS=min IE=4 ITERations=1;echo "done"; 507 echo "there are 145 more memories to test.";echo "tr 52 M=RXLP_DEBUG_COUNTER8 IS=min IE=4 ITERations=1";tr 52 M=RXLP_DEBUG_COUNTER8 IS=min IE=4 ITERations=1;echo "done"; 508 echo "there are 144 more memories to test.";echo "tr 52 M=RXLP_DEBUG_COUNTER9 IS=min IE=4 ITERations=1";tr 52 M=RXLP_DEBUG_COUNTER9 IS=min IE=4 ITERations=1;echo "done"; 509 echo "there are 143 more memories to test.";echo "tr 52 M=RXLP_DFC_MSG_BIT_REMAP_PORT_0 IS=min IE=4 ITERations=1";tr 52 M=RXLP_DFC_MSG_BIT_REMAP_PORT_0 IS=min IE=4 ITERations=1;echo "done"; 510 echo "there are 142 more memories to test.";echo "tr 52 M=RXLP_DFC_MSG_BIT_REMAP_PORT_1 IS=min IE=4 ITERations=1";tr 52 M=RXLP_DFC_MSG_BIT_REMAP_PORT_1 IS=min IE=4 ITERations=1;echo "done"; 511 echo "there are 141 more memories to test.";echo "tr 52 M=RXLP_DFC_MSG_BIT_REMAP_PORT_2 IS=min IE=4 ITERations=1";tr 52 M=RXLP_DFC_MSG_BIT_REMAP_PORT_2 IS=min IE=4 ITERations=1;echo "done"; 512 echo "there are 140 more memories to test.";echo "tr 52 M=RXLP_DFC_MSG_BIT_REMAP_PORT_3 IS=min IE=4 ITERations=1";tr 52 M=RXLP_DFC_MSG_BIT_REMAP_PORT_3 IS=min IE=4 ITERations=1;echo "done"; 513 echo "there are 139 more memories to test.";echo "tr 52 M=RXLP_INTERNAL_STREAM_MAP_PORT_0 IS=min IE=4 ITERations=1";tr 52 M=RXLP_INTERNAL_STREAM_MAP_PORT_0 IS=min IE=4 ITERations=1;echo "done"; 514 echo "there are 138 more memories to test.";echo "tr 52 M=RXLP_INTERNAL_STREAM_MAP_PORT_1 IS=min IE=4 ITERations=1";tr 52 M=RXLP_INTERNAL_STREAM_MAP_PORT_1 IS=min IE=4 ITERations=1;echo "done"; 515 echo "there are 137 more memories to test.";echo "tr 52 M=RXLP_INTERNAL_STREAM_MAP_PORT_2 IS=min IE=4 ITERations=1";tr 52 M=RXLP_INTERNAL_STREAM_MAP_PORT_2 IS=min IE=4 ITERations=1;echo "done"; 516 echo "there are 136 more memories to test.";echo "tr 52 M=RXLP_INTERNAL_STREAM_MAP_PORT_3 IS=min IE=4 ITERations=1";tr 52 M=RXLP_INTERNAL_STREAM_MAP_PORT_3 IS=min IE=4 ITERations=1;echo "done"; 517 echo "there are 135 more memories to test.";echo "tr 52 M=RXLP_MAX_FRAME_SIZE IS=min IE=4 ITERations=1";tr 52 M=RXLP_MAX_FRAME_SIZE IS=min IE=4 ITERations=1;echo "done"; 518 echo "there are 134 more memories to test.";echo "tr 52 M=RX_PROT_GROUP_TABLE IS=min IE=4 ITERations=1";tr 52 M=RX_PROT_GROUP_TABLE IS=min IE=4 ITERations=1;echo "done"; 519 echo "there are 133 more memories to test.";echo "tr 52 M=RX_PROT_GROUP_TABLE_1 IS=min IE=4 ITERations=1";tr 52 M=RX_PROT_GROUP_TABLE_1 IS=min IE=4 ITERations=1;echo "done"; 520 echo "there are 132 more memories to test.";echo "tr 52 M=RX_PROT_GROUP_TABLE_1_DMA IS=min IE=4 ITERations=1";tr 52 M=RX_PROT_GROUP_TABLE_1_DMA IS=min IE=4 ITERations=1;echo "done"; 521 echo "there are 131 more memories to test.";echo "tr 52 M=RX_PROT_GROUP_TABLE_DMA IS=min IE=4 ITERations=1";tr 52 M=RX_PROT_GROUP_TABLE_DMA IS=min IE=4 ITERations=1;echo "done"; 522 echo "there are 130 more memories to test.";echo "tr 52 M=SERVICE_COS_MAP IS=min IE=4 ITERations=1";tr 52 M=SERVICE_COS_MAP IS=min IE=4 ITERations=1;echo "done"; 523 echo "there are 129 more memories to test.";echo "tr 52 M=SER_ACC_TYPE_MAP IS=min IE=4 ITERations=1";tr 52 M=SER_ACC_TYPE_MAP IS=min IE=4 ITERations=1;echo "done"; 524 echo "there are 128 more memories to test.";echo "tr 52 M=SER_MEMORY IS=min IE=4 ITERations=1";tr 52 M=SER_MEMORY IS=min IE=4 ITERations=1;echo "done"; 525 #echo "there are 127 more memories to test.";echo "tr 52 M=SER_RESULT_0 IS=min IE=0 ITERations=1";tr 52 M=SER_RESULT_0 IS=min IE=0 ITERations=1;echo "done"; 526 #echo "there are 126 more memories to test.";echo "tr 52 M=SER_RESULT_1 IS=min IE=0 ITERations=1";tr 52 M=SER_RESULT_1 IS=min IE=0 ITERations=1;echo "done"; 527 #echo "there are 125 more memories to test.";echo "tr 52 M=SER_RESULT_DATA_0 IS=min IE=0 ITERations=1";tr 52 M=SER_RESULT_DATA_0 IS=min IE=0 ITERations=1;echo "done"; 528 #echo "there are 124 more memories to test.";echo "tr 52 M=SER_RESULT_DATA_1 IS=min IE=0 ITERations=1";tr 52 M=SER_RESULT_DATA_1 IS=min IE=0 ITERations=1;echo "done"; 529 #echo "there are 123 more memories to test.";echo "tr 52 M=SER_RESULT_EXPECTED_0 IS=min IE=0 ITERations=1";tr 52 M=SER_RESULT_EXPECTED_0 IS=min IE=0 ITERations=1;echo "done"; 530 #echo "there are 122 more memories to test.";echo "tr 52 M=SER_RESULT_EXPECTED_1 IS=min IE=0 ITERations=1";tr 52 M=SER_RESULT_EXPECTED_1 IS=min IE=0 ITERations=1;echo "done"; 531 echo "there are 121 more memories to test.";echo "tr 52 M=SOURCE_MOD_PROXY_TABLE IS=min IE=4 ITERations=1";tr 52 M=SOURCE_MOD_PROXY_TABLE IS=min IE=4 ITERations=1;echo "done"; 532 echo "there are 120 more memories to test.";echo "tr 52 M=SOURCE_TRUNK_MAP_TABLE IS=min IE=4 ITERations=1";tr 52 M=SOURCE_TRUNK_MAP_TABLE IS=min IE=4 ITERations=1;echo "done"; 533 echo "there are 119 more memories to test.";echo "tr 52 M=SOURCE_TRUNK_MAP_MODBASE IS=min IE=4 ITERations=1";tr 52 M=SOURCE_TRUNK_MAP_MODBASE IS=min IE=4 ITERations=1;echo "done"; 534 echo "there are 118 more memories to test.";echo "tr 52 M=SOURCE_VP IS=min IE=4 ITERations=1";tr 52 M=SOURCE_VP IS=min IE=4 ITERations=1;echo "done"; 535 echo "there are 117 more memories to test.";echo "tr 52 M=SRC_MODID_EGRESS IS=min IE=4 ITERations=1";tr 52 M=SRC_MODID_EGRESS IS=min IE=4 ITERations=1;echo "done"; 536 echo "there are 116 more memories to test.";echo "tr 52 M=SRC_MODID_INGRESS_BLOCK IS=min IE=4 ITERations=1";tr 52 M=SRC_MODID_INGRESS_BLOCK IS=min IE=4 ITERations=1;echo "done"; 537 echo "there are 115 more memories to test.";echo "tr 52 M=SUBPORT_TAG_TO_PP_PORT_MAP IS=min IE=4 ITERations=1";tr 52 M=SUBPORT_TAG_TO_PP_PORT_MAP IS=min IE=4 ITERations=1;echo "done"; 538 echo "there are 114 more memories to test.";echo "tr 52 M=SUBPORT_TAG_TO_PP_PORT_MAP_DATA_ONLY IS=min IE=4 ITERations=1";tr 52 M=SUBPORT_TAG_TO_PP_PORT_MAP_DATA_ONLY IS=min IE=4 ITERations=1;echo "done"; 539 echo "there are 113 more memories to test.";echo "tr 52 M=SUBPORT_TAG_TO_PP_PORT_MAP_ONLY IS=min IE=4 ITERations=1";tr 52 M=SUBPORT_TAG_TO_PP_PORT_MAP_ONLY IS=min IE=4 ITERations=1;echo "done"; 540 echo "there are 112 more memories to test.";echo "tr 52 M=SVM_MACROFLOW_INDEX_TABLE IS=min IE=4 ITERations=1";tr 52 M=SVM_MACROFLOW_INDEX_TABLE IS=min IE=4 ITERations=1;echo "done"; 541 echo "there are 111 more memories to test.";echo "tr 52 M=SVM_METER_TABLE IS=min IE=4 ITERations=1";tr 52 M=SVM_METER_TABLE IS=min IE=4 ITERations=1;echo "done"; 542 echo "there are 110 more memories to test.";echo "tr 52 M=SVM_OFFSET_TABLE IS=min IE=4 ITERations=1";tr 52 M=SVM_OFFSET_TABLE IS=min IE=4 ITERations=1;echo "done"; 543 echo "there are 109 more memories to test.";echo "tr 52 M=SVM_POLICY_TABLE IS=min IE=4 ITERations=1";tr 52 M=SVM_POLICY_TABLE IS=min IE=4 ITERations=1;echo "done"; 544 echo "there are 108 more memories to test.";echo "tr 52 M=SYSTEM_CONFIG_TABLE IS=min IE=4 ITERations=1";tr 52 M=SYSTEM_CONFIG_TABLE IS=min IE=4 ITERations=1;echo "done"; 545 echo "there are 107 more memories to test.";echo "tr 52 M=SYSTEM_CONFIG_TABLE_MODBASE IS=min IE=4 ITERations=1";tr 52 M=SYSTEM_CONFIG_TABLE_MODBASE IS=min IE=4 ITERations=1;echo "done"; 546 echo "there are 106 more memories to test.";echo "tr 52 M=TCP_FN IS=min IE=4 ITERations=1";tr 52 M=TCP_FN IS=min IE=4 ITERations=1;echo "done"; 547 echo "there are 105 more memories to test.";echo "tr 52 M=THDIQEN_THDI_PORT_PG_CNTRS IS=min IE=4 ITERations=1";tr 52 M=THDIQEN_THDI_PORT_PG_CNTRS IS=min IE=4 ITERations=1;echo "done"; 548 echo "there are 104 more memories to test.";echo "tr 52 M=THDIQEN_THDI_PORT_PG_CONFIG IS=min IE=4 ITERations=1";tr 52 M=THDIQEN_THDI_PORT_PG_CONFIG IS=min IE=4 ITERations=1;echo "done"; 549 echo "there are 103 more memories to test.";echo "tr 52 M=THDIQEN_THDI_PORT_SP_CONFIG IS=min IE=4 ITERations=1";tr 52 M=THDIQEN_THDI_PORT_SP_CONFIG IS=min IE=4 ITERations=1;echo "done"; 550 echo "there are 102 more memories to test.";echo "tr 52 M=THDIRQE_THDI_PORT_PG_CNTRS IS=min IE=4 ITERations=1";tr 52 M=THDIRQE_THDI_PORT_PG_CNTRS IS=min IE=4 ITERations=1;echo "done"; 551 echo "there are 101 more memories to test.";echo "tr 52 M=THDIRQE_THDI_PORT_PG_CONFIG IS=min IE=4 ITERations=1";tr 52 M=THDIRQE_THDI_PORT_PG_CONFIG IS=min IE=4 ITERations=1;echo "done"; 552 echo "there are 100 more memories to test.";echo "tr 52 M=THDI_PORT_PG_CNTRS IS=min IE=4 ITERations=1";tr 52 M=THDI_PORT_PG_CNTRS IS=min IE=4 ITERations=1;echo "done"; 553 echo "there are 99 more memories to test.";echo "tr 52 M=THDI_PORT_PG_CONFIG IS=min IE=4 ITERations=1";tr 52 M=THDI_PORT_PG_CONFIG IS=min IE=4 ITERations=1;echo "done"; 554 echo "there are 98 more memories to test.";echo "tr 52 M=TOS_FN IS=min IE=4 ITERations=1";tr 52 M=TOS_FN IS=min IE=4 ITERations=1;echo "done"; 555 echo "there are 97 more memories to test.";echo "tr 52 M=TRUNK_BITMAP IS=min IE=4 ITERations=1";tr 52 M=TRUNK_BITMAP IS=min IE=4 ITERations=1;echo "done"; 556 echo "there are 96 more memories to test.";echo "tr 52 M=TRUNK_CBL_TABLE IS=min IE=4 ITERations=1";tr 52 M=TRUNK_CBL_TABLE IS=min IE=4 ITERations=1;echo "done"; 557 echo "there are 95 more memories to test.";echo "tr 52 M=TRUNK_GROUP IS=min IE=4 ITERations=1";tr 52 M=TRUNK_GROUP IS=min IE=4 ITERations=1;echo "done"; 558 echo "there are 94 more memories to test.";echo "tr 52 M=TRUNK_MEMBER IS=min IE=4 ITERations=1";tr 52 M=TRUNK_MEMBER IS=min IE=4 ITERations=1;echo "done"; 559 echo "there are 93 more memories to test.";echo "tr 52 M=TTL_FN IS=min IE=4 ITERations=1";tr 52 M=TTL_FN IS=min IE=4 ITERations=1;echo "done"; 560 echo "there are 92 more memories to test.";echo "tr 52 M=TXLP_DEBUG_COUNTER0 IS=min IE=4 ITERations=1";tr 52 M=TXLP_DEBUG_COUNTER0 IS=min IE=4 ITERations=1;echo "done"; 561 echo "there are 91 more memories to test.";echo "tr 52 M=TXLP_DEBUG_COUNTER1 IS=min IE=4 ITERations=1";tr 52 M=TXLP_DEBUG_COUNTER1 IS=min IE=4 ITERations=1;echo "done"; 562 echo "there are 90 more memories to test.";echo "tr 52 M=TXLP_DEBUG_COUNTER10 IS=min IE=4 ITERations=1";tr 52 M=TXLP_DEBUG_COUNTER10 IS=min IE=4 ITERations=1;echo "done"; 563 echo "there are 89 more memories to test.";echo "tr 52 M=TXLP_DEBUG_COUNTER11 IS=min IE=4 ITERations=1";tr 52 M=TXLP_DEBUG_COUNTER11 IS=min IE=4 ITERations=1;echo "done"; 564 echo "there are 88 more memories to test.";echo "tr 52 M=TXLP_DEBUG_COUNTER2 IS=min IE=4 ITERations=1";tr 52 M=TXLP_DEBUG_COUNTER2 IS=min IE=4 ITERations=1;echo "done"; 565 echo "there are 87 more memories to test.";echo "tr 52 M=TXLP_DEBUG_COUNTER3 IS=min IE=4 ITERations=1";tr 52 M=TXLP_DEBUG_COUNTER3 IS=min IE=4 ITERations=1;echo "done"; 566 echo "there are 86 more memories to test.";echo "tr 52 M=TXLP_DEBUG_COUNTER4 IS=min IE=4 ITERations=1";tr 52 M=TXLP_DEBUG_COUNTER4 IS=min IE=4 ITERations=1;echo "done"; 567 echo "there are 85 more memories to test.";echo "tr 52 M=TXLP_DEBUG_COUNTER5 IS=min IE=4 ITERations=1";tr 52 M=TXLP_DEBUG_COUNTER5 IS=min IE=4 ITERations=1;echo "done"; 568 echo "there are 84 more memories to test.";echo "tr 52 M=TXLP_DEBUG_COUNTER6 IS=min IE=4 ITERations=1";tr 52 M=TXLP_DEBUG_COUNTER6 IS=min IE=4 ITERations=1;echo "done"; 569 echo "there are 83 more memories to test.";echo "tr 52 M=TXLP_DEBUG_COUNTER7 IS=min IE=4 ITERations=1";tr 52 M=TXLP_DEBUG_COUNTER7 IS=min IE=4 ITERations=1;echo "done"; 570 echo "there are 82 more memories to test.";echo "tr 52 M=TXLP_DEBUG_COUNTER8 IS=min IE=4 ITERations=1";tr 52 M=TXLP_DEBUG_COUNTER8 IS=min IE=4 ITERations=1;echo "done"; 571 echo "there are 81 more memories to test.";echo "tr 52 M=TXLP_DEBUG_COUNTER9 IS=min IE=4 ITERations=1";tr 52 M=TXLP_DEBUG_COUNTER9 IS=min IE=4 ITERations=1;echo "done"; 572 echo "there are 80 more memories to test.";echo "tr 52 M=TXLP_INT2EXT_STREAM_MAP_TABLE IS=min IE=4 ITERations=1";tr 52 M=TXLP_INT2EXT_STREAM_MAP_TABLE IS=min IE=4 ITERations=1;echo "done"; 573 echo "there are 79 more memories to test.";echo "tr 52 M=TXLP_PORT_ADDR_MAP_TABLE IS=min IE=3 ITERations=1";tr 52 M=TXLP_PORT_ADDR_MAP_TABLE IS=min IE=3 ITERations=1;echo "done"; 574 echo "there are 78 more memories to test.";echo "tr 52 M=TXLP_PORT_STREAM_BITMAP_TABLE IS=min IE=3 ITERations=1";tr 52 M=TXLP_PORT_STREAM_BITMAP_TABLE IS=min IE=3 ITERations=1;echo "done"; 575 echo "there are 77 more memories to test.";echo "tr 52 M=TXLP_STREAM_ADDR_MAP_TABLE IS=min IE=4 ITERations=1";tr 52 M=TXLP_STREAM_ADDR_MAP_TABLE IS=min IE=4 ITERations=1;echo "done"; 576 echo "there are 76 more memories to test.";echo "tr 52 M=INITIAL_PROT_GROUP_TABLE IS=min IE=4 ITERations=1";tr 52 M=INITIAL_PROT_GROUP_TABLE IS=min IE=4 ITERations=1;echo "done"; 577 echo "there are 75 more memories to test.";echo "tr 52 M=UDF_CONDITIONAL_CHECK_TABLE_CAM IS=min IE=4 ITERations=1";tr 52 M=UDF_CONDITIONAL_CHECK_TABLE_CAM IS=min IE=4 ITERations=1;echo "done"; 578 echo "there are 74 more memories to test.";echo "tr 52 M=UDF_CONDITIONAL_CHECK_TABLE_RAM IS=min IE=4 ITERations=1";tr 52 M=UDF_CONDITIONAL_CHECK_TABLE_RAM IS=min IE=4 ITERations=1;echo "done"; 579 echo "there are 73 more memories to test.";echo "tr 52 M=FP_UDF_OFFSET IS=min IE=4 ITERations=1";tr 52 M=FP_UDF_OFFSET IS=min IE=4 ITERations=1;echo "done"; 580 echo "there are 72 more memories to test.";echo "tr 52 M=FP_UDF_TCAM IS=min IE=4 ITERations=1";tr 52 M=FP_UDF_TCAM IS=min IE=4 ITERations=1;echo "done"; 581 echo "there are 71 more memories to test.";echo "tr 52 M=UNKNOWN_HGI_BITMAP IS=min IE=4 ITERations=1";tr 52 M=UNKNOWN_HGI_BITMAP IS=min IE=4 ITERations=1;echo "done"; 582 echo "there are 70 more memories to test.";echo "tr 52 M=UNKNOWN_MCAST_BLOCK_MASK IS=min IE=4 ITERations=1";tr 52 M=UNKNOWN_MCAST_BLOCK_MASK IS=min IE=4 ITERations=1;echo "done"; 583 echo "there are 69 more memories to test.";echo "tr 52 M=UNKNOWN_UCAST_BLOCK_MASK IS=min IE=4 ITERations=1";tr 52 M=UNKNOWN_UCAST_BLOCK_MASK IS=min IE=4 ITERations=1;echo "done"; 584 echo "there are 68 more memories to test.";echo "tr 52 M=VFI IS=min IE=4 ITERations=1";tr 52 M=VFI IS=min IE=4 ITERations=1;echo "done"; 585 echo "there are 67 more memories to test.";echo "tr 52 M=VFI_1 IS=min IE=4 ITERations=1";tr 52 M=VFI_1 IS=min IE=4 ITERations=1;echo "done"; 586 echo "there are 66 more memories to test.";echo "tr 52 M=VFP_HASH_FIELD_BMAP_TABLE_A IS=min IE=4 ITERations=1";tr 52 M=VFP_HASH_FIELD_BMAP_TABLE_A IS=min IE=4 ITERations=1;echo "done"; 587 echo "there are 65 more memories to test.";echo "tr 52 M=VFP_HASH_FIELD_BMAP_TABLE_B IS=min IE=4 ITERations=1";tr 52 M=VFP_HASH_FIELD_BMAP_TABLE_B IS=min IE=4 ITERations=1;echo "done"; 588 echo "there are 64 more memories to test.";echo "tr 52 M=VFP_POLICY_TABLE IS=min IE=4 ITERations=1";tr 52 M=VFP_POLICY_TABLE IS=min IE=4 ITERations=1;echo "done"; 589 echo "there are 63 more memories to test.";echo "tr 52 M=VFP_TCAM IS=min IE=4 ITERations=1";tr 52 M=VFP_TCAM IS=min IE=4 ITERations=1;echo "done"; 590 echo "there are 62 more memories to test.";echo "tr 52 M=VLAN_TAB IS=min IE=4 ITERations=1";tr 52 M=VLAN_TAB IS=min IE=4 ITERations=1;echo "done"; 591 echo "there are 61 more memories to test.";echo "tr 52 M=VLAN_MAC IS=min IE=4 ITERations=1";tr 52 M=VLAN_MAC IS=min IE=4 ITERations=1;echo "done"; 592 echo "there are 60 more memories to test.";echo "tr 52 M=VLAN_MAC_OVERFLOW IS=min IE=4 ITERations=1";tr 52 M=VLAN_MAC_OVERFLOW IS=min IE=4 ITERations=1;echo "done"; 593 echo "there are 59 more memories to test.";echo "tr 52 M=VLAN_MPLS IS=min IE=4 ITERations=1";tr 52 M=VLAN_MPLS IS=min IE=4 ITERations=1;echo "done"; 594 echo "there are 58 more memories to test.";echo "tr 52 M=VLAN_OR_VFI_MAC_COUNT IS=min IE=4 ITERations=1";tr 52 M=VLAN_OR_VFI_MAC_COUNT IS=min IE=4 ITERations=1;echo "done"; 595 echo "there are 57 more memories to test.";echo "tr 52 M=VLAN_OR_VFI_MAC_LIMIT IS=min IE=4 ITERations=1";tr 52 M=VLAN_OR_VFI_MAC_LIMIT IS=min IE=4 ITERations=1;echo "done"; 596 echo "there are 56 more memories to test.";echo "tr 52 M=VLAN_PROFILE_TAB IS=min IE=4 ITERations=1";tr 52 M=VLAN_PROFILE_TAB IS=min IE=4 ITERations=1;echo "done"; 597 echo "there are 55 more memories to test.";echo "tr 52 M=VLAN_PROFILE_2 IS=min IE=4 ITERations=1";tr 52 M=VLAN_PROFILE_2 IS=min IE=4 ITERations=1;echo "done"; 598 echo "there are 54 more memories to test.";echo "tr 52 M=VLAN_PROTOCOL IS=min IE=4 ITERations=1";tr 52 M=VLAN_PROTOCOL IS=min IE=4 ITERations=1;echo "done"; 599 echo "there are 53 more memories to test.";echo "tr 52 M=VLAN_PROTOCOL_DATA IS=min IE=4 ITERations=1";tr 52 M=VLAN_PROTOCOL_DATA IS=min IE=4 ITERations=1;echo "done"; 600 echo "there are 52 more memories to test.";echo "tr 52 M=STG_TAB IS=min IE=4 ITERations=1";tr 52 M=STG_TAB IS=min IE=4 ITERations=1;echo "done"; 601 echo "there are 51 more memories to test.";echo "tr 52 M=VLAN_SUBNET IS=min IE=4 ITERations=1";tr 52 M=VLAN_SUBNET IS=min IE=4 ITERations=1;echo "done"; 602 echo "there are 50 more memories to test.";echo "tr 52 M=VLAN_SUBNET_DATA_ONLY IS=min IE=4 ITERations=1";tr 52 M=VLAN_SUBNET_DATA_ONLY IS=min IE=4 ITERations=1;echo "done"; 603 echo "there are 49 more memories to test.";echo "tr 52 M=VLAN_SUBNET_ONLY IS=min IE=4 ITERations=1";tr 52 M=VLAN_SUBNET_ONLY IS=min IE=4 ITERations=1;echo "done"; 604 echo "there are 48 more memories to test.";echo "tr 52 M=VLAN_XLATE IS=min IE=4 ITERations=1";tr 52 M=VLAN_XLATE IS=min IE=4 ITERations=1;echo "done"; 605 echo "there are 47 more memories to test.";echo "tr 52 M=VLAN_XLATE_OVERFLOW IS=min IE=4 ITERations=1";tr 52 M=VLAN_XLATE_OVERFLOW IS=min IE=4 ITERations=1;echo "done"; 606 echo "there are 46 more memories to test.";echo "tr 52 M=VRF IS=min IE=4 ITERations=1";tr 52 M=VRF IS=min IE=4 ITERations=1;echo "done"; 607 #echo "there are 45 more memories to test.";echo "tr 52 M=XLPORT_WC_UCMEM_DATA IS=min IE=4 ITERations=1";tr 52 M=XLPORT_WC_UCMEM_DATA IS=min IE=4 ITERations=1;echo "done"; 608 #----------------------------NOTEST memories------------------------------------------------------------------ 609 #echo 'there are 44 more memories to test.';echo 'tr 52 M=EGRESS_PACKET_BUFFER0 IS=min IE=4 ITERations=1';tr 52 M=EGRESS_PACKET_BUFFER0 IS=min IE=4 ITERations=1;echo 'done'; 610 #echo 'there are 43 more memories to test.';echo 'tr 52 M=EGRESS_PACKET_BUFFER1 IS=min IE=4 ITERations=1';tr 52 M=EGRESS_PACKET_BUFFER1 IS=min IE=4 ITERations=1;echo 'done'; 611 #echo 'there are 42 more memories to test.';echo 'tr 52 M=EGRESS_PACKET_BUFFER2 IS=min IE=4 ITERations=1';tr 52 M=EGRESS_PACKET_BUFFER2 IS=min IE=4 ITERations=1;echo 'done'; 612 #echo 'there are 41 more memories to test.';echo 'tr 52 M=EGRESS_PACKET_BUFFER3 IS=min IE=4 ITERations=1';tr 52 M=EGRESS_PACKET_BUFFER3 IS=min IE=4 ITERations=1;echo 'done'; 613 #echo 'there are 40 more memories to test.';echo 'tr 52 M=EGR_PBE_DEBUG_0 IS=min IE=4 ITERations=1';tr 52 M=EGR_PBE_DEBUG_0 IS=min IE=4 ITERations=1;echo 'done'; 614 #echo 'there are 39 more memories to test.';echo 'tr 52 M=EGR_PBE_DEBUG_1 IS=min IE=4 ITERations=1';tr 52 M=EGR_PBE_DEBUG_1 IS=min IE=4 ITERations=1;echo 'done'; 615 #echo 'there are 38 more memories to test.';echo 'tr 52 M=IARB_GIH_DEBUG IS=min IE=4 ITERations=1';tr 52 M=IARB_GIH_DEBUG IS=min IE=4 ITERations=1;echo 'done'; 616 #echo 'there are 37 more memories to test.';echo 'tr 52 M=IARB_IPAD_DEBUG IS=min IE=4 ITERations=1';tr 52 M=IARB_IPAD_DEBUG IS=min IE=4 ITERations=1;echo 'done'; 617 #echo 'there are 36 more memories to test.';echo 'tr 52 M=ING_PBI_DEBUG_0_HI IS=min IE=4 ITERations=1';tr 52 M=ING_PBI_DEBUG_0_HI IS=min IE=4 ITERations=1;echo 'done'; 618 #echo 'there are 35 more memories to test.';echo 'tr 52 M=ING_PBI_DEBUG_0_LO IS=min IE=4 ITERations=1';tr 52 M=ING_PBI_DEBUG_0_LO IS=min IE=4 ITERations=1;echo 'done'; 619 #echo 'there are 34 more memories to test.';echo 'tr 52 M=ING_PBI_DEBUG_1 IS=min IE=4 ITERations=1';tr 52 M=ING_PBI_DEBUG_1 IS=min IE=4 ITERations=1;echo 'done'; 620 #echo 'there are 33 more memories to test.';echo 'tr 52 M=IPARS_PACKET_BUFFER0 IS=min IE=4 ITERations=1';tr 52 M=IPARS_PACKET_BUFFER0 IS=min IE=4 ITERations=1;echo 'done'; 621 #echo 'there are 32 more memories to test.';echo 'tr 52 M=IPARS_PACKET_BUFFER1 IS=min IE=4 ITERations=1';tr 52 M=IPARS_PACKET_BUFFER1 IS=min IE=4 ITERations=1;echo 'done'; 622 #echo 'there are 31 more memories to test.';echo 'tr 52 M=IPARS_PACKET_BUFFER2 IS=min IE=4 ITERations=1';tr 52 M=IPARS_PACKET_BUFFER2 IS=min IE=4 ITERations=1;echo 'done'; 623 #echo 'there are 30 more memories to test.';echo 'tr 52 M=IPARS_PACKET_BUFFER3 IS=min IE=4 ITERations=1';tr 52 M=IPARS_PACKET_BUFFER3 IS=min IE=4 ITERations=1;echo 'done'; 624 #echo 'there are 29 more memories to test.';echo 'tr 52 M=LINK_STATUS IS=min IE=4 ITERations=1';tr 52 M=LINK_STATUS IS=min IE=4 ITERations=1;echo 'done'; 625 #---------------------------- READONLY memories----------------------------------------------------------------- 626 #echo 'there are 28 more memories to test.';echo 'tr 52 M=EGR_EDBIL_PKT_SOP IS=min IE=4 ITERations=1';tr 52 M=EGR_EDBIL_PKT_SOP IS=min IE=4 ITERations=1;echo 'done'; 627 #echo 'there are 27 more memories to test.';echo 'tr 52 M=EGR_MAX_USED_ENTRIES IS=min IE=4 ITERations=1';tr 52 M=EGR_MAX_USED_ENTRIES IS=min IE=4 ITERations=1;echo 'done'; 628 #echo 'there are 26 more memories to test.';echo 'tr 52 M=EGR_MMU_REQUESTS IS=min IE=4 ITERations=1';tr 52 M=EGR_MMU_REQUESTS IS=min IE=4 ITERations=1;echo 'done'; 629 #echo 'there are 25 more memories to test.';echo 'tr 52 M=EGR_PORT_PKT_SOP IS=min IE=4 ITERations=1';tr 52 M=EGR_PORT_PKT_SOP IS=min IE=4 ITERations=1;echo 'done'; 630 #echo 'there are 24 more memories to test.';echo 'tr 52 M=EGR_PORT_REQUESTS IS=min IE=4 ITERations=1';tr 52 M=EGR_PORT_REQUESTS IS=min IE=4 ITERations=1;echo 'done'; 631 #echo 'there are 23 more memories to test.';echo 'tr 52 M=IARB_CELL_PKT_SOP IS=min IE=4 ITERations=1';tr 52 M=IARB_CELL_PKT_SOP IS=min IE=4 ITERations=1;echo 'done'; 632 #echo 'there are 22 more memories to test.';echo 'tr 52 M=MMU_INTFI_DEBUG_MEM IS=min IE=4 ITERations=1';tr 52 M=MMU_INTFI_DEBUG_MEM IS=min IE=4 ITERations=1;echo 'done'; 633 #echo 'there are 21 more memories to test.';echo 'tr 52 M=OAMP_PE_GEN_MEM IS=min IE=4 ITERations=1';tr 52 M=OAMP_PE_GEN_MEM IS=min IE=4 ITERations=1;echo 'done'; 634 #echo 'there are 20 more memories to test.';echo 'tr 52 M=OAMP_PE_PROGRAM IS=min IE=4 ITERations=1';tr 52 M=OAMP_PE_PROGRAM IS=min IE=4 ITERations=1;echo 'done'; 635 #echo 'there are 19 more memories to test.';echo 'tr 52 M=OAMP_SAT_RX_FLOW_ID IS=min IE=4 ITERations=1';tr 52 M=OAMP_SAT_RX_FLOW_ID IS=min IE=4 ITERations=1;echo 'done'; 636 #echo 'there are 18 more memories to test.';echo 'tr 52 M=OAMP_SAT_RX_FLOW_PARAMS IS=min IE=4 ITERations=1';tr 52 M=OAMP_SAT_RX_FLOW_PARAMS IS=min IE=4 ITERations=1;echo 'done'; 637 #echo 'there are 17 more memories to test.';echo 'tr 52 M=OAMP_SAT_RX_FLOW_STATS IS=min IE=4 ITERations=1';tr 52 M=OAMP_SAT_RX_FLOW_STATS IS=min IE=4 ITERations=1;echo 'done'; 638 #echo 'there are 16 more memories to test.';echo 'tr 52 M=OAMP_SAT_TX IS=min IE=4 ITERations=1';tr 52 M=OAMP_SAT_TX IS=min IE=4 ITERations=1;echo 'done'; 639 #echo 'there are 15 more memories to test.';echo 'tr 52 M=RXLP_CHANNEL_CONTROL_BUFFER IS=min IE=4 ITERations=1';tr 52 M=RXLP_CHANNEL_CONTROL_BUFFER IS=min IE=4 ITERations=1;echo 'done'; 640 #echo 'there are 14 more memories to test.';echo 'tr 52 M=RXLP_ERROR_ACTION_MAP_DATA IS=min IE=4 ITERations=1';tr 52 M=RXLP_ERROR_ACTION_MAP_DATA IS=min IE=4 ITERations=1;echo 'done'; 641 #echo 'there are 13 more memories to test.';echo 'tr 52 M=RXLP_ERROR_ACTION_MAP_TCAM IS=min IE=4 ITERations=1';tr 52 M=RXLP_ERROR_ACTION_MAP_TCAM IS=min IE=4 ITERations=1;echo 'done'; 642 #echo 'there are 12 more memories to test.';echo 'tr 52 M=RXLP_INTR_DATA_MEM IS=min IE=4 ITERations=1';tr 52 M=RXLP_INTR_DATA_MEM IS=min IE=4 ITERations=1;echo 'done'; 643 #echo 'there are 11 more memories to test.';echo 'tr 52 M=THDIQEN_THDI_PORT_SP_CNTRS IS=min IE=4 ITERations=1';tr 52 M=THDIQEN_THDI_PORT_SP_CNTRS IS=min IE=4 ITERations=1;echo 'done'; 644 #echo 'there are 10 more memories to test.';echo 'tr 52 M=THDIRQE_THDI_PORT_SP_CNTRS IS=min IE=4 ITERations=1';tr 52 M=THDIRQE_THDI_PORT_SP_CNTRS IS=min IE=4 ITERations=1;echo 'done'; 645 #echo 'there are 9 more memories to test.';echo 'tr 52 M=THDIRQE_THDI_PORT_SP_CONFIG IS=min IE=4 ITERations=1';tr 52 M=THDIRQE_THDI_PORT_SP_CONFIG IS=min IE=4 ITERations=1;echo 'done'; 646 #echo 'there are 8 more memories to test.';echo 'tr 52 M=THDI_PORT_SP_CNTRS IS=min IE=4 ITERations=1';tr 52 M=THDI_PORT_SP_CNTRS IS=min IE=4 ITERations=1;echo 'done'; 647 #echo 'there are 7 more memories to test.';echo 'tr 52 M=THDI_PORT_SP_CONFIG IS=min IE=4 ITERations=1';tr 52 M=THDI_PORT_SP_CONFIG IS=min IE=4 ITERations=1;echo 'done'; 648 #echo 'there are 6 more memories to test.';echo 'tr 52 M=TXLP_PORT_MMU_REQUESTS IS=min IE=4 ITERations=1';tr 52 M=TXLP_PORT_MMU_REQUESTS IS=min IE=4 ITERations=1;echo 'done'; 649 #echo 'there are 5 more memories to test.';echo 'tr 52 M=TXLP_PORT_PKT_SOP IS=min IE=4 ITERations=1';tr 52 M=TXLP_PORT_PKT_SOP IS=min IE=4 ITERations=1;echo 'done'; 650 #echo 'there are 4 more memories to test.';echo 'tr 52 M=TXLP_PORT_REQUESTS IS=min IE=4 ITERations=1';tr 52 M=TXLP_PORT_REQUESTS IS=min IE=4 ITERations=1;echo 'done'; 651 #echo 'there are 3 more memories to test.';echo 'tr 52 M=TXLP_PORT_USED_ENTRIES IS=min IE=4 ITERations=1';tr 52 M=TXLP_PORT_USED_ENTRIES IS=min IE=4 ITERations=1;echo 'done'; 652 #echo 'there are 2 more memories to test.';echo 'tr 52 M=TXLP_STREAM_MMU_REQUESTS IS=min IE=4 ITERations=1';tr 52 M=TXLP_STREAM_MMU_REQUESTS IS=min IE=4 ITERations=1;echo 'done'; 653 #echo 'there are 1 more memories to test.';echo 'tr 52 M=TXLP_STREAM_USED_ENTRIES IS=min IE=4 ITERations=1';tr 52 M=TXLP_STREAM_USED_ENTRIES IS=min IE=4 ITERations=1;echo 'done'; 654 #---------------------------- VENDOR memories-----------------------------------------------------------------