tr51_bcm56670_a0.soc - openbcm - Git mirror of https://github.com/Broadcom-Network-Switching-Software/OpenBCM

tr51_bcm56670_a0.soc (131729B)
      1 # 
      2 # This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file.
      3 # 
      4 # Copyright 2007-2019 Broadcom Inc. All rights reserved.
      5 echo "there are 757 more memories to test.";echo "tr 51 M=ALTERNATE_EMIRROR_BITMAP IS=min IE=4 ITERations=1";tr 51 M=ALTERNATE_EMIRROR_BITMAP IS=min IE=4 ITERations=1;echo "done";
      6 echo "there are 756 more memories to test.";echo "tr 51 M=BCAST_BLOCK_MASK IS=min IE=4 ITERations=1";tr 51 M=BCAST_BLOCK_MASK IS=min IE=4 ITERations=1;echo "done";
      7 #echo "there are 755 more memories to test.";echo "tr 51 M=CLPORT_WC_UCMEM_DATA IS=min IE=4 ITERations=1";tr 51 M=CLPORT_WC_UCMEM_DATA IS=min IE=4 ITERations=1;echo "done";
      8 echo "there are 754 more memories to test.";echo "tr 51 M=PORT_COS_MAP IS=min IE=4 ITERations=1";tr 51 M=PORT_COS_MAP IS=min IE=4 ITERations=1;echo "done";
      9 echo "there are 753 more memories to test.";echo "tr 51 M=COS_MAP_SEL IS=min IE=4 ITERations=1";tr 51 M=COS_MAP_SEL IS=min IE=4 ITERations=1;echo "done";
     10 echo "there are 752 more memories to test.";echo "tr 51 M=CPU_COS_MAP IS=min IE=4 ITERations=1";tr 51 M=CPU_COS_MAP IS=min IE=4 ITERations=1;echo "done";
     11 echo "there are 751 more memories to test.";echo "tr 51 M=CPU_COS_MAP_DATA_ONLY IS=min IE=4 ITERations=1";tr 51 M=CPU_COS_MAP_DATA_ONLY IS=min IE=4 ITERations=1;echo "done";
     12 echo "there are 750 more memories to test.";echo "tr 51 M=CPU_COS_MAP_ONLY IS=min IE=4 ITERations=1";tr 51 M=CPU_COS_MAP_ONLY IS=min IE=4 ITERations=1;echo "done";
     13 #echo "there are 749 more memories to test.";echo "tr 51 M=CPU_PBM IS=min IE=0 ITERations=1";tr 51 M=CPU_PBM IS=min IE=0 ITERations=1;echo "done";
     14 #echo "there are 748 more memories to test.";echo "tr 51 M=CPU_PBM_2 IS=min IE=0 ITERations=1";tr 51 M=CPU_PBM_2 IS=min IE=0 ITERations=1;echo "done";
     15 echo "there are 747 more memories to test.";echo "tr 51 M=CPU_TS_MAP IS=min IE=4 ITERations=1";tr 51 M=CPU_TS_MAP IS=min IE=4 ITERations=1;echo "done";
     16 echo "there are 746 more memories to test.";echo "tr 51 M=DEST_TRUNK_BITMAP IS=min IE=4 ITERations=1";tr 51 M=DEST_TRUNK_BITMAP IS=min IE=4 ITERations=1;echo "done";
     17 echo "there are 745 more memories to test.";echo "tr 51 M=DLB_HGT_ETHERTYPE_ELIGIBILITY_MAP IS=min IE=4 ITERations=1";tr 51 M=DLB_HGT_ETHERTYPE_ELIGIBILITY_MAP IS=min IE=4 ITERations=1;echo "done";
     18 echo "there are 744 more memories to test.";echo "tr 51 M=DLB_HGT_FLOWSET IS=min IE=4 ITERations=1";tr 51 M=DLB_HGT_FLOWSET IS=min IE=4 ITERations=1;echo "done";
     19 #echo "there are 743 more memories to test.";echo "tr 51 M=DLB_HGT_FLOWSET_TIMESTAMP_PAGE IS=min IE=4 ITERations=1";tr 51 M=DLB_HGT_FLOWSET_TIMESTAMP_PAGE IS=min IE=4 ITERations=1;echo "done";
     20 echo "there are 742 more memories to test.";echo "tr 51 M=DLB_HGT_GROUP_CONTROL IS=min IE=4 ITERations=1";tr 51 M=DLB_HGT_GROUP_CONTROL IS=min IE=4 ITERations=1;echo "done";
     21 echo "there are 741 more memories to test.";echo "tr 51 M=DLB_HGT_GROUP_MEMBERSHIP IS=min IE=4 ITERations=1";tr 51 M=DLB_HGT_GROUP_MEMBERSHIP IS=min IE=4 ITERations=1;echo "done";
     22 echo "there are 740 more memories to test.";echo "tr 51 M=DLB_HGT_GROUP_STATS IS=min IE=4 ITERations=1";tr 51 M=DLB_HGT_GROUP_STATS IS=min IE=4 ITERations=1;echo "done";
     23 #echo "there are 739 more memories to test.";echo "tr 51 M=DLB_HGT_HIST_LOAD IS=min IE=4 ITERations=1";tr 51 M=DLB_HGT_HIST_LOAD IS=min IE=4 ITERations=1;echo "done";
     24 #echo "there are 738 more memories to test.";echo "tr 51 M=DLB_HGT_INST_LOAD IS=min IE=4 ITERations=1";tr 51 M=DLB_HGT_INST_LOAD IS=min IE=4 ITERations=1;echo "done";
     25 echo "there are 737 more memories to test.";echo "tr 51 M=DLB_HGT_MEMBER_ATTRIBUTE IS=min IE=4 ITERations=1";tr 51 M=DLB_HGT_MEMBER_ATTRIBUTE IS=min IE=4 ITERations=1;echo "done";
     26 #echo "there are 736 more memories to test.";echo "tr 51 M=DLB_HGT_MEMBER_STATUS IS=min IE=4 ITERations=1";tr 51 M=DLB_HGT_MEMBER_STATUS IS=min IE=4 ITERations=1;echo "done";
     27 #echo "there are 735 more memories to test.";echo "tr 51 M=DLB_HGT_MEMBER_SW_STATE IS=min IE=0 ITERations=1";tr 51 M=DLB_HGT_MEMBER_SW_STATE IS=min IE=0 ITERations=1;echo "done";
     28 echo "there are 734 more memories to test.";echo "tr 51 M=DLB_HGT_OPTIMAL_CANDIDATE IS=min IE=4 ITERations=1";tr 51 M=DLB_HGT_OPTIMAL_CANDIDATE IS=min IE=4 ITERations=1;echo "done";
     29 echo "there are 733 more memories to test.";echo "tr 51 M=DLB_HGT_PLA_QUANTIZE_THRESHOLD IS=min IE=4 ITERations=1";tr 51 M=DLB_HGT_PLA_QUANTIZE_THRESHOLD IS=min IE=4 ITERations=1;echo "done";
     30 echo "there are 732 more memories to test.";echo "tr 51 M=DLB_HGT_PORT_MEMBER_MAP IS=min IE=4 ITERations=1";tr 51 M=DLB_HGT_PORT_MEMBER_MAP IS=min IE=4 ITERations=1;echo "done";
     31 echo "there are 731 more memories to test.";echo "tr 51 M=DLB_HGT_QUALITY_CONTROL IS=min IE=4 ITERations=1";tr 51 M=DLB_HGT_QUALITY_CONTROL IS=min IE=4 ITERations=1;echo "done";
     32 echo "there are 730 more memories to test.";echo "tr 51 M=DLB_HGT_QUALITY_MAPPING IS=min IE=4 ITERations=1";tr 51 M=DLB_HGT_QUALITY_MAPPING IS=min IE=4 ITERations=1;echo "done";
     33 #echo "there are 729 more memories to test.";echo "tr 51 M=DLB_HGT_QUALITY_RESULT IS=min IE=4 ITERations=1";tr 51 M=DLB_HGT_QUALITY_RESULT IS=min IE=4 ITERations=1;echo "done";
     34 echo "there are 728 more memories to test.";echo "tr 51 M=DLB_HGT_RR_SELECTION_POINTER IS=min IE=4 ITERations=1";tr 51 M=DLB_HGT_RR_SELECTION_POINTER IS=min IE=4 ITERations=1;echo "done";
     35 echo "there are 727 more memories to test.";echo "tr 51 M=DROP_VECTOR_MASK IS=min IE=4 ITERations=1";tr 51 M=DROP_VECTOR_MASK IS=min IE=4 ITERations=1;echo "done";
     36 echo "there are 726 more memories to test.";echo "tr 51 M=DSCP_TABLE IS=min IE=4 ITERations=1";tr 51 M=DSCP_TABLE IS=min IE=4 ITERations=1;echo "done";
     37 echo "there are 725 more memories to test.";echo "tr 51 M=E2E_HOL_STATUS IS=min IE=4 ITERations=1";tr 51 M=E2E_HOL_STATUS IS=min IE=4 ITERations=1;echo "done";
     38 echo "there are 724 more memories to test.";echo "tr 51 M=E2E_HOL_STATUS_1 IS=min IE=4 ITERations=1";tr 51 M=E2E_HOL_STATUS_1 IS=min IE=4 ITERations=1;echo "done";
     39 echo "there are 723 more memories to test.";echo "tr 51 M=EFFECTIVE_PHB_SELECT IS=min IE=4 ITERations=1";tr 51 M=EFFECTIVE_PHB_SELECT IS=min IE=4 ITERations=1;echo "done";
     40 echo "there are 722 more memories to test.";echo "tr 51 M=EFP_COUNTER_TABLE IS=min IE=4 ITERations=1";tr 51 M=EFP_COUNTER_TABLE IS=min IE=4 ITERations=1;echo "done";
     41 echo "there are 721 more memories to test.";echo "tr 51 M=EFP_METER_TABLE IS=min IE=4 ITERations=1";tr 51 M=EFP_METER_TABLE IS=min IE=4 ITERations=1;echo "done";
     42 echo "there are 720 more memories to test.";echo "tr 51 M=EFP_POLICY_TABLE IS=min IE=4 ITERations=1";tr 51 M=EFP_POLICY_TABLE IS=min IE=4 ITERations=1;echo "done";
     43 echo "there are 719 more memories to test.";echo "tr 51 M=EFP_TCAM IS=min IE=4 ITERations=1";tr 51 M=EFP_TCAM IS=min IE=4 ITERations=1;echo "done";
     44 echo "there are 718 more memories to test.";echo "tr 51 M=EGR_1588_SA IS=min IE=4 ITERations=1";tr 51 M=EGR_1588_SA IS=min IE=4 ITERations=1;echo "done";
     45 echo "there are 717 more memories to test.";echo "tr 51 M=EGR_COUNTER_CONTROL IS=min IE=4 ITERations=1";tr 51 M=EGR_COUNTER_CONTROL IS=min IE=4 ITERations=1;echo "done";
     46 echo "there are 716 more memories to test.";echo "tr 51 M=EGR_DGPP_TO_NHI IS=min IE=4 ITERations=1";tr 51 M=EGR_DGPP_TO_NHI IS=min IE=4 ITERations=1;echo "done";
     47 echo "there are 715 more memories to test.";echo "tr 51 M=EGR_DGPP_TO_NHI_MODBASE IS=min IE=4 ITERations=1";tr 51 M=EGR_DGPP_TO_NHI_MODBASE IS=min IE=4 ITERations=1;echo "done";
     48 echo "there are 714 more memories to test.";echo "tr 51 M=EGR_DSCP_ECN_MAP IS=min IE=4 ITERations=1";tr 51 M=EGR_DSCP_ECN_MAP IS=min IE=4 ITERations=1;echo "done";
     49 echo "there are 713 more memories to test.";echo "tr 51 M=EGR_DSCP_TABLE IS=min IE=4 ITERations=1";tr 51 M=EGR_DSCP_TABLE IS=min IE=4 ITERations=1;echo "done";
     50 echo "there are 712 more memories to test.";echo "tr 51 M=EGR_DVP_ATTRIBUTE IS=min IE=4 ITERations=1";tr 51 M=EGR_DVP_ATTRIBUTE IS=min IE=4 ITERations=1;echo "done";
     51 echo "there are 711 more memories to test.";echo "tr 51 M=EGR_DVP_ATTRIBUTE_1 IS=min IE=4 ITERations=1";tr 51 M=EGR_DVP_ATTRIBUTE_1 IS=min IE=4 ITERations=1;echo "done";
     52 echo "there are 710 more memories to test.";echo "tr 51 M=EGR_EDB_XMIT_CTRL IS=min IE=4 ITERations=1";tr 51 M=EGR_EDB_XMIT_CTRL IS=min IE=4 ITERations=1;echo "done";
     53 echo "there are 709 more memories to test.";echo "tr 51 M=EGR_EFFECTIVE_PHB_SELECT IS=min IE=4 ITERations=1";tr 51 M=EGR_EFFECTIVE_PHB_SELECT IS=min IE=4 ITERations=1;echo "done";
     54 echo "there are 708 more memories to test.";echo "tr 51 M=EGR_EM_MTP_INDEX IS=min IE=4 ITERations=1";tr 51 M=EGR_EM_MTP_INDEX IS=min IE=4 ITERations=1;echo "done";
     55 echo "there are 707 more memories to test.";echo "tr 51 M=EGR_ENABLE IS=min IE=4 ITERations=1";tr 51 M=EGR_ENABLE IS=min IE=4 ITERations=1;echo "done";
     56 echo "there are 706 more memories to test.";echo "tr 51 M=EGR_EP_REDIRECT_EM_MTP_INDEX IS=min IE=4 ITERations=1";tr 51 M=EGR_EP_REDIRECT_EM_MTP_INDEX IS=min IE=4 ITERations=1;echo "done";
     57 echo "there are 705 more memories to test.";echo "tr 51 M=EGR_ETAG_PCP_MAPPING IS=min IE=4 ITERations=1";tr 51 M=EGR_ETAG_PCP_MAPPING IS=min IE=4 ITERations=1;echo "done";
     58 echo "there are 704 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_START_LOOKUP0 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_START_LOOKUP0 IS=min IE=4 ITERations=1;echo "done";
     59 echo "there are 703 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_START_LOOKUP1 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_START_LOOKUP1 IS=min IE=4 ITERations=1;echo "done";
     60 echo "there are 702 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_START_LOOKUP10 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_START_LOOKUP10 IS=min IE=4 ITERations=1;echo "done";
     61 echo "there are 701 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_START_LOOKUP11 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_START_LOOKUP11 IS=min IE=4 ITERations=1;echo "done";
     62 echo "there are 700 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_START_LOOKUP12 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_START_LOOKUP12 IS=min IE=4 ITERations=1;echo "done";
     63 echo "there are 699 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_START_LOOKUP13 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_START_LOOKUP13 IS=min IE=4 ITERations=1;echo "done";
     64 echo "there are 698 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_START_LOOKUP14 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_START_LOOKUP14 IS=min IE=4 ITERations=1;echo "done";
     65 echo "there are 697 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_START_LOOKUP15 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_START_LOOKUP15 IS=min IE=4 ITERations=1;echo "done";
     66 echo "there are 696 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_START_LOOKUP2 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_START_LOOKUP2 IS=min IE=4 ITERations=1;echo "done";
     67 echo "there are 695 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_START_LOOKUP3 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_START_LOOKUP3 IS=min IE=4 ITERations=1;echo "done";
     68 echo "there are 694 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_START_LOOKUP4 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_START_LOOKUP4 IS=min IE=4 ITERations=1;echo "done";
     69 echo "there are 693 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_START_LOOKUP5 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_START_LOOKUP5 IS=min IE=4 ITERations=1;echo "done";
     70 echo "there are 692 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_START_LOOKUP6 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_START_LOOKUP6 IS=min IE=4 ITERations=1;echo "done";
     71 echo "there are 691 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_START_LOOKUP7 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_START_LOOKUP7 IS=min IE=4 ITERations=1;echo "done";
     72 echo "there are 690 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_START_LOOKUP8 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_START_LOOKUP8 IS=min IE=4 ITERations=1;echo "done";
     73 echo "there are 689 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_START_LOOKUP9 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_START_LOOKUP9 IS=min IE=4 ITERations=1;echo "done";
     74 echo "there are 688 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_TERMINATE_LOOKUP0 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_TERMINATE_LOOKUP0 IS=min IE=4 ITERations=1;echo "done";
     75 echo "there are 687 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_TERMINATE_LOOKUP1 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_TERMINATE_LOOKUP1 IS=min IE=4 ITERations=1;echo "done";
     76 echo "there are 686 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_TERMINATE_LOOKUP10 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_TERMINATE_LOOKUP10 IS=min IE=4 ITERations=1;echo "done";
     77 echo "there are 685 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_TERMINATE_LOOKUP11 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_TERMINATE_LOOKUP11 IS=min IE=4 ITERations=1;echo "done";
     78 echo "there are 684 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_TERMINATE_LOOKUP12 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_TERMINATE_LOOKUP12 IS=min IE=4 ITERations=1;echo "done";
     79 echo "there are 683 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_TERMINATE_LOOKUP13 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_TERMINATE_LOOKUP13 IS=min IE=4 ITERations=1;echo "done";
     80 echo "there are 682 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_TERMINATE_LOOKUP14 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_TERMINATE_LOOKUP14 IS=min IE=4 ITERations=1;echo "done";
     81 echo "there are 681 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_TERMINATE_LOOKUP15 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_TERMINATE_LOOKUP15 IS=min IE=4 ITERations=1;echo "done";
     82 echo "there are 680 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_TERMINATE_LOOKUP2 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_TERMINATE_LOOKUP2 IS=min IE=4 ITERations=1;echo "done";
     83 echo "there are 679 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_TERMINATE_LOOKUP3 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_TERMINATE_LOOKUP3 IS=min IE=4 ITERations=1;echo "done";
     84 echo "there are 678 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_TERMINATE_LOOKUP4 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_TERMINATE_LOOKUP4 IS=min IE=4 ITERations=1;echo "done";
     85 echo "there are 677 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_TERMINATE_LOOKUP5 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_TERMINATE_LOOKUP5 IS=min IE=4 ITERations=1;echo "done";
     86 echo "there are 676 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_TERMINATE_LOOKUP6 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_TERMINATE_LOOKUP6 IS=min IE=4 ITERations=1;echo "done";
     87 echo "there are 675 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_TERMINATE_LOOKUP7 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_TERMINATE_LOOKUP7 IS=min IE=4 ITERations=1;echo "done";
     88 echo "there are 674 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_TERMINATE_LOOKUP8 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_TERMINATE_LOOKUP8 IS=min IE=4 ITERations=1;echo "done";
     89 echo "there are 673 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_TERMINATE_LOOKUP9 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_TERMINATE_LOOKUP9 IS=min IE=4 ITERations=1;echo "done";
     90 echo "there are 672 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_XFR_COUNT0 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_XFR_COUNT0 IS=min IE=4 ITERations=1;echo "done";
     91 echo "there are 671 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_XFR_COUNT1 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_XFR_COUNT1 IS=min IE=4 ITERations=1;echo "done";
     92 echo "there are 670 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_XFR_COUNT10 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_XFR_COUNT10 IS=min IE=4 ITERations=1;echo "done";
     93 echo "there are 669 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_XFR_COUNT11 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_XFR_COUNT11 IS=min IE=4 ITERations=1;echo "done";
     94 echo "there are 668 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_XFR_COUNT12 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_XFR_COUNT12 IS=min IE=4 ITERations=1;echo "done";
     95 echo "there are 667 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_XFR_COUNT13 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_XFR_COUNT13 IS=min IE=4 ITERations=1;echo "done";
     96 echo "there are 666 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_XFR_COUNT14 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_XFR_COUNT14 IS=min IE=4 ITERations=1;echo "done";
     97 echo "there are 665 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_XFR_COUNT15 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_XFR_COUNT15 IS=min IE=4 ITERations=1;echo "done";
     98 echo "there are 664 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_XFR_COUNT2 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_XFR_COUNT2 IS=min IE=4 ITERations=1;echo "done";
     99 echo "there are 663 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_XFR_COUNT3 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_XFR_COUNT3 IS=min IE=4 ITERations=1;echo "done";
    100 echo "there are 662 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_XFR_COUNT4 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_XFR_COUNT4 IS=min IE=4 ITERations=1;echo "done";
    101 echo "there are 661 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_XFR_COUNT5 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_XFR_COUNT5 IS=min IE=4 ITERations=1;echo "done";
    102 echo "there are 660 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_XFR_COUNT6 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_XFR_COUNT6 IS=min IE=4 ITERations=1;echo "done";
    103 echo "there are 659 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_XFR_COUNT7 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_XFR_COUNT7 IS=min IE=4 ITERations=1;echo "done";
    104 echo "there are 658 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_XFR_COUNT8 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_XFR_COUNT8 IS=min IE=4 ITERations=1;echo "done";
    105 echo "there are 657 more memories to test.";echo "tr 51 M=EGR_FLEX_PREEMPT_XFR_COUNT9 IS=min IE=4 ITERations=1";tr 51 M=EGR_FLEX_PREEMPT_XFR_COUNT9 IS=min IE=4 ITERations=1;echo "done";
    106 echo "there are 656 more memories to test.";echo "tr 51 M=EGR_FORCE_REGEN_CRC_DST IS=min IE=4 ITERations=1";tr 51 M=EGR_FORCE_REGEN_CRC_DST IS=min IE=4 ITERations=1;echo "done";
    107 echo "there are 655 more memories to test.";echo "tr 51 M=EGR_FORCE_REGEN_CRC_SRC IS=min IE=4 ITERations=1";tr 51 M=EGR_FORCE_REGEN_CRC_SRC IS=min IE=4 ITERations=1;echo "done";
    108 echo "there are 654 more memories to test.";echo "tr 51 M=EGR_FRAGMENT_ID_TABLE IS=min IE=4 ITERations=1";tr 51 M=EGR_FRAGMENT_ID_TABLE IS=min IE=4 ITERations=1;echo "done";
    109 echo "there are 653 more memories to test.";echo "tr 51 M=EGR_GPP_ATTRIBUTES IS=min IE=4 ITERations=1";tr 51 M=EGR_GPP_ATTRIBUTES IS=min IE=4 ITERations=1;echo "done";
    110 echo "there are 652 more memories to test.";echo "tr 51 M=EGR_GPP_ATTRIBUTES_MODBASE IS=min IE=4 ITERations=1";tr 51 M=EGR_GPP_ATTRIBUTES_MODBASE IS=min IE=4 ITERations=1;echo "done";
    111 echo "there are 651 more memories to test.";echo "tr 51 M=EGR_IM_MTP_INDEX IS=min IE=4 ITERations=1";tr 51 M=EGR_IM_MTP_INDEX IS=min IE=4 ITERations=1;echo "done";
    112 echo "there are 650 more memories to test.";echo "tr 51 M=EGR_ING_PORT IS=min IE=4 ITERations=1";tr 51 M=EGR_ING_PORT IS=min IE=4 ITERations=1;echo "done";
    113 echo "there are 649 more memories to test.";echo "tr 51 M=EGR_IPMC IS=min IE=4 ITERations=1";tr 51 M=EGR_IPMC IS=min IE=4 ITERations=1;echo "done";
    114 echo "there are 648 more memories to test.";echo "tr 51 M=EGR_IPMC_CFG2 IS=min IE=4 ITERations=1";tr 51 M=EGR_IPMC_CFG2 IS=min IE=4 ITERations=1;echo "done";
    115 echo "there are 647 more memories to test.";echo "tr 51 M=EGR_IP_TUNNEL IS=min IE=4 ITERations=1";tr 51 M=EGR_IP_TUNNEL IS=min IE=4 ITERations=1;echo "done";
    116 echo "there are 646 more memories to test.";echo "tr 51 M=EGR_IP_TUNNEL_IPV6 IS=min IE=4 ITERations=1";tr 51 M=EGR_IP_TUNNEL_IPV6 IS=min IE=4 ITERations=1;echo "done";
    117 echo "there are 645 more memories to test.";echo "tr 51 M=EGR_IP_TUNNEL_MPLS IS=min IE=4 ITERations=1";tr 51 M=EGR_IP_TUNNEL_MPLS IS=min IE=4 ITERations=1;echo "done";
    118 echo "there are 644 more memories to test.";echo "tr 51 M=EGR_L3_INTF IS=min IE=4 ITERations=1";tr 51 M=EGR_L3_INTF IS=min IE=4 ITERations=1;echo "done";
    119 echo "there are 643 more memories to test.";echo "tr 51 M=EGR_L3_NEXT_HOP IS=min IE=4 ITERations=1";tr 51 M=EGR_L3_NEXT_HOP IS=min IE=4 ITERations=1;echo "done";
    120 echo "there are 642 more memories to test.";echo "tr 51 M=EGR_L3_NEXT_HOP_1 IS=min IE=4 ITERations=1";tr 51 M=EGR_L3_NEXT_HOP_1 IS=min IE=4 ITERations=1;echo "done";
    121 echo "there are 641 more memories to test.";echo "tr 51 M=EGR_LPORT_PROFILE IS=min IE=4 ITERations=1";tr 51 M=EGR_LPORT_PROFILE IS=min IE=4 ITERations=1;echo "done";
    122 echo "there are 640 more memories to test.";echo "tr 51 M=EGR_MACDA_OUI_PROFILE IS=min IE=4 ITERations=1";tr 51 M=EGR_MACDA_OUI_PROFILE IS=min IE=4 ITERations=1;echo "done";
    123 echo "there are 639 more memories to test.";echo "tr 51 M=EGR_MAC_DA_PROFILE IS=min IE=4 ITERations=1";tr 51 M=EGR_MAC_DA_PROFILE IS=min IE=4 ITERations=1;echo "done";
    124 echo "there are 638 more memories to test.";echo "tr 51 M=EGR_MAP_MH IS=min IE=4 ITERations=1";tr 51 M=EGR_MAP_MH IS=min IE=4 ITERations=1;echo "done";
    125 echo "there are 637 more memories to test.";echo "tr 51 M=EGR_MASK IS=min IE=4 ITERations=1";tr 51 M=EGR_MASK IS=min IE=4 ITERations=1;echo "done";
    126 echo "there are 636 more memories to test.";echo "tr 51 M=EGR_MASK_MODBASE IS=min IE=4 ITERations=1";tr 51 M=EGR_MASK_MODBASE IS=min IE=4 ITERations=1;echo "done";
    127 echo "there are 635 more memories to test.";echo "tr 51 M=EGR_MIRROR_ENCAP_CONTROL IS=min IE=4 ITERations=1";tr 51 M=EGR_MIRROR_ENCAP_CONTROL IS=min IE=4 ITERations=1;echo "done";
    128 echo "there are 634 more memories to test.";echo "tr 51 M=EGR_MIRROR_ENCAP_DATA_1 IS=min IE=4 ITERations=1";tr 51 M=EGR_MIRROR_ENCAP_DATA_1 IS=min IE=4 ITERations=1;echo "done";
    129 echo "there are 633 more memories to test.";echo "tr 51 M=EGR_MIRROR_ENCAP_DATA_2 IS=min IE=4 ITERations=1";tr 51 M=EGR_MIRROR_ENCAP_DATA_2 IS=min IE=4 ITERations=1;echo "done";
    130 #echo "there are 632 more memories to test.";echo "tr 51 M=EGR_MMU_CREDIT_LIMIT IS=min IE=4 ITERations=1";tr 51 M=EGR_MMU_CREDIT_LIMIT IS=min IE=4 ITERations=1;echo "done";
    131 echo "there are 631 more memories to test.";echo "tr 51 M=EGR_MOD_MAP_TABLE IS=min IE=4 ITERations=1";tr 51 M=EGR_MOD_MAP_TABLE IS=min IE=4 ITERations=1;echo "done";
    132 echo "there are 630 more memories to test.";echo "tr 51 M=EGR_MPLS_EXP_MAPPING_1 IS=min IE=4 ITERations=1";tr 51 M=EGR_MPLS_EXP_MAPPING_1 IS=min IE=4 ITERations=1;echo "done";
    133 echo "there are 629 more memories to test.";echo "tr 51 M=EGR_MPLS_EXP_MAPPING_2 IS=min IE=4 ITERations=1";tr 51 M=EGR_MPLS_EXP_MAPPING_2 IS=min IE=4 ITERations=1;echo "done";
    134 echo "there are 628 more memories to test.";echo "tr 51 M=EGR_MPLS_EXP_MAPPING_3 IS=min IE=4 ITERations=1";tr 51 M=EGR_MPLS_EXP_MAPPING_3 IS=min IE=4 ITERations=1;echo "done";
    135 echo "there are 627 more memories to test.";echo "tr 51 M=EGR_MPLS_EXP_PRI_MAPPING IS=min IE=4 ITERations=1";tr 51 M=EGR_MPLS_EXP_PRI_MAPPING IS=min IE=4 ITERations=1;echo "done";
    136 echo "there are 626 more memories to test.";echo "tr 51 M=EGR_MPLS_PRI_MAPPING IS=min IE=4 ITERations=1";tr 51 M=EGR_MPLS_PRI_MAPPING IS=min IE=4 ITERations=1;echo "done";
    137 echo "there are 625 more memories to test.";echo "tr 51 M=EGR_MPLS_VC_AND_SWAP_LABEL_TABLE IS=min IE=4 ITERations=1";tr 51 M=EGR_MPLS_VC_AND_SWAP_LABEL_TABLE IS=min IE=4 ITERations=1;echo "done";
    138 echo "there are 624 more memories to test.";echo "tr 51 M=EGR_MTU IS=min IE=4 ITERations=1";tr 51 M=EGR_MTU IS=min IE=4 ITERations=1;echo "done";
    139 #echo "there are 623 more memories to test.";echo "tr 51 M=EGR_MULTICAST_MAC_ADDR IS=min IE=0 ITERations=1";tr 51 M=EGR_MULTICAST_MAC_ADDR IS=min IE=0 ITERations=1;echo "done";
    140 echo "there are 622 more memories to test.";echo "tr 51 M=EGR_NAT_PACKET_EDIT_INFO IS=min IE=4 ITERations=1";tr 51 M=EGR_NAT_PACKET_EDIT_INFO IS=min IE=4 ITERations=1;echo "done";
    141 echo "there are 621 more memories to test.";echo "tr 51 M=EGR_NETWORK_PRUNE_CONTROL IS=min IE=4 ITERations=1";tr 51 M=EGR_NETWORK_PRUNE_CONTROL IS=min IE=4 ITERations=1;echo "done";
    142 #echo "there are 620 more memories to test.";echo "tr 51 M=EGR_OLP_CONFIG_1 IS=min IE=0 ITERations=1";tr 51 M=EGR_OLP_CONFIG_1 IS=min IE=0 ITERations=1;echo "done";
    143 #echo "there are 619 more memories to test.";echo "tr 51 M=EGR_OLP_CONFIG_2 IS=min IE=0 ITERations=1";tr 51 M=EGR_OLP_CONFIG_2 IS=min IE=0 ITERations=1;echo "done";
    144 echo "there are 618 more memories to test.";echo "tr 51 M=EGR_OLP_DGPP_CONFIG IS=min IE=4 ITERations=1";tr 51 M=EGR_OLP_DGPP_CONFIG IS=min IE=4 ITERations=1;echo "done";
    145 echo "there are 617 more memories to test.";echo "tr 51 M=EGR_OLP_DGPP_CONFIG_1 IS=min IE=4 ITERations=1";tr 51 M=EGR_OLP_DGPP_CONFIG_1 IS=min IE=4 ITERations=1;echo "done";
    146 echo "there are 616 more memories to test.";echo "tr 51 M=EGR_OLP_HEADER_TYPE_MAPPING IS=min IE=4 ITERations=1";tr 51 M=EGR_OLP_HEADER_TYPE_MAPPING IS=min IE=4 ITERations=1;echo "done";
    147 echo "there are 615 more memories to test.";echo "tr 51 M=EGR_OLP_HEADER_TYPE_MAPPING_1 IS=min IE=4 ITERations=1";tr 51 M=EGR_OLP_HEADER_TYPE_MAPPING_1 IS=min IE=4 ITERations=1;echo "done";
    148 echo "there are 614 more memories to test.";echo "tr 51 M=EGR_PERQ_XMT_COUNTERS IS=min IE=4 ITERations=1";tr 51 M=EGR_PERQ_XMT_COUNTERS IS=min IE=4 ITERations=1;echo "done";
    149 echo "there are 613 more memories to test.";echo "tr 51 M=EGR_PER_PORT_BUFFER_OVERFLOW IS=min IE=4 ITERations=1";tr 51 M=EGR_PER_PORT_BUFFER_OVERFLOW IS=min IE=4 ITERations=1;echo "done";
    150 echo "there are 612 more memories to test.";echo "tr 51 M=EGR_PER_PORT_BUFFER_SFT_RESET IS=min IE=4 ITERations=1";tr 51 M=EGR_PER_PORT_BUFFER_SFT_RESET IS=min IE=4 ITERations=1;echo "done";
    151 echo "there are 611 more memories to test.";echo "tr 51 M=EGR_PFC_CONTROL IS=min IE=4 ITERations=1";tr 51 M=EGR_PFC_CONTROL IS=min IE=4 ITERations=1;echo "done";
    152 echo "there are 610 more memories to test.";echo "tr 51 M=EGR_PORT IS=min IE=4 ITERations=1";tr 51 M=EGR_PORT IS=min IE=4 ITERations=1;echo "done";
    153 echo "there are 609 more memories to test.";echo "tr 51 M=EGR_PORT_1 IS=min IE=4 ITERations=1";tr 51 M=EGR_PORT_1 IS=min IE=4 ITERations=1;echo "done";
    154 echo "there are 608 more memories to test.";echo "tr 51 M=EGR_PORT_CREDIT_RESET IS=min IE=4 ITERations=1";tr 51 M=EGR_PORT_CREDIT_RESET IS=min IE=4 ITERations=1;echo "done";
    155 echo "there are 607 more memories to test.";echo "tr 51 M=EGR_PORT_MNFS_MFS_CONFIG IS=min IE=4 ITERations=1";tr 51 M=EGR_PORT_MNFS_MFS_CONFIG IS=min IE=4 ITERations=1;echo "done";
    156 echo "there are 606 more memories to test.";echo "tr 51 M=EGR_PORT_PREEMPTION_MODE IS=min IE=4 ITERations=1";tr 51 M=EGR_PORT_PREEMPTION_MODE IS=min IE=4 ITERations=1;echo "done";
    157 echo "there are 605 more memories to test.";echo "tr 51 M=EGR_PREEMPT_EDB_XMIT_CTRL IS=min IE=4 ITERations=1";tr 51 M=EGR_PREEMPT_EDB_XMIT_CTRL IS=min IE=4 ITERations=1;echo "done";
    158 echo "there are 604 more memories to test.";echo "tr 51 M=EGR_PREEMPT_ENABLE IS=min IE=4 ITERations=1";tr 51 M=EGR_PREEMPT_ENABLE IS=min IE=4 ITERations=1;echo "done";
    159 #echo "there are 603 more memories to test.";echo "tr 51 M=EGR_PREEMPT_MMU_CREDIT_LIMIT IS=min IE=4 ITERations=1";tr 51 M=EGR_PREEMPT_MMU_CREDIT_LIMIT IS=min IE=4 ITERations=1;echo "done";
    160 echo "there are 602 more memories to test.";echo "tr 51 M=EGR_PREEMPT_PER_PORT_BUFFER_OVERFLOW IS=min IE=4 ITERations=1";tr 51 M=EGR_PREEMPT_PER_PORT_BUFFER_OVERFLOW IS=min IE=4 ITERations=1;echo "done";
    161 echo "there are 601 more memories to test.";echo "tr 51 M=EGR_PREEMPT_PFC_CONTROL IS=min IE=4 ITERations=1";tr 51 M=EGR_PREEMPT_PFC_CONTROL IS=min IE=4 ITERations=1;echo "done";
    162 echo "there are 600 more memories to test.";echo "tr 51 M=EGR_PRI_CNG_MAP IS=min IE=4 ITERations=1";tr 51 M=EGR_PRI_CNG_MAP IS=min IE=4 ITERations=1;echo "done";
    163 echo "there are 599 more memories to test.";echo "tr 51 M=EGR_PW_INIT_COUNTERS IS=min IE=4 ITERations=1";tr 51 M=EGR_PW_INIT_COUNTERS IS=min IE=4 ITERations=1;echo "done";
    164 #echo "there are 598 more memories to test.";echo "tr 51 M=EGR_SER_FIFO IS=min IE=4 ITERations=1";tr 51 M=EGR_SER_FIFO IS=min IE=4 ITERations=1;echo "done";
    165 echo "there are 597 more memories to test.";echo "tr 51 M=EGR_SHAPING_CONTROL IS=min IE=4 ITERations=1";tr 51 M=EGR_SHAPING_CONTROL IS=min IE=4 ITERations=1;echo "done";
    166 echo "there are 596 more memories to test.";echo "tr 51 M=EGR_TX_PROT_GROUP_TABLE IS=min IE=4 ITERations=1";tr 51 M=EGR_TX_PROT_GROUP_TABLE IS=min IE=4 ITERations=1;echo "done";
    167 echo "there are 595 more memories to test.";echo "tr 51 M=EGR_VFI IS=min IE=4 ITERations=1";tr 51 M=EGR_VFI IS=min IE=4 ITERations=1;echo "done";
    168 echo "there are 594 more memories to test.";echo "tr 51 M=EGR_VLAN IS=min IE=4 ITERations=1";tr 51 M=EGR_VLAN IS=min IE=4 ITERations=1;echo "done";
    169 echo "there are 593 more memories to test.";echo "tr 51 M=EGR_VLAN_CONTROL_1 IS=min IE=4 ITERations=1";tr 51 M=EGR_VLAN_CONTROL_1 IS=min IE=4 ITERations=1;echo "done";
    170 echo "there are 592 more memories to test.";echo "tr 51 M=EGR_VLAN_CONTROL_2 IS=min IE=4 ITERations=1";tr 51 M=EGR_VLAN_CONTROL_2 IS=min IE=4 ITERations=1;echo "done";
    171 echo "there are 591 more memories to test.";echo "tr 51 M=EGR_VLAN_CONTROL_3 IS=min IE=4 ITERations=1";tr 51 M=EGR_VLAN_CONTROL_3 IS=min IE=4 ITERations=1;echo "done";
    172 echo "there are 590 more memories to test.";echo "tr 51 M=EGR_VLAN_STG IS=min IE=4 ITERations=1";tr 51 M=EGR_VLAN_STG IS=min IE=4 ITERations=1;echo "done";
    173 echo "there are 589 more memories to test.";echo "tr 51 M=EGR_VLAN_TAG_ACTION_PROFILE IS=min IE=4 ITERations=1";tr 51 M=EGR_VLAN_TAG_ACTION_PROFILE IS=min IE=4 ITERations=1;echo "done";
    174 echo "there are 588 more memories to test.";echo "tr 51 M=EGR_VLAN_VFI_MEMBERSHIP IS=min IE=4 ITERations=1";tr 51 M=EGR_VLAN_VFI_MEMBERSHIP IS=min IE=4 ITERations=1;echo "done";
    175 echo "there are 587 more memories to test.";echo "tr 51 M=EGR_VLAN_XLATE IS=min IE=4 ITERations=1";tr 51 M=EGR_VLAN_XLATE IS=min IE=4 ITERations=1;echo "done";
    176 echo "there are 586 more memories to test.";echo "tr 51 M=EGR_VLAN_XLATE_ECC IS=min IE=4 ITERations=1";tr 51 M=EGR_VLAN_XLATE_ECC IS=min IE=4 ITERations=1;echo "done";
    177 echo "there are 585 more memories to test.";echo "tr 51 M=EGR_VLAN_XLATE_LP IS=min IE=4 ITERations=1";tr 51 M=EGR_VLAN_XLATE_LP IS=min IE=4 ITERations=1;echo "done";
    178 echo "there are 584 more memories to test.";echo "tr 51 M=EGR_VSAN_INTPRI_MAP IS=min IE=4 ITERations=1";tr 51 M=EGR_VSAN_INTPRI_MAP IS=min IE=4 ITERations=1;echo "done";
    179 echo "there are 583 more memories to test.";echo "tr 51 M=EMIRROR_CONTROL IS=min IE=4 ITERations=1";tr 51 M=EMIRROR_CONTROL IS=min IE=4 ITERations=1;echo "done";
    180 echo "there are 582 more memories to test.";echo "tr 51 M=EMIRROR_CONTROL1 IS=min IE=4 ITERations=1";tr 51 M=EMIRROR_CONTROL1 IS=min IE=4 ITERations=1;echo "done";
    181 echo "there are 581 more memories to test.";echo "tr 51 M=EMIRROR_CONTROL2 IS=min IE=4 ITERations=1";tr 51 M=EMIRROR_CONTROL2 IS=min IE=4 ITERations=1;echo "done";
    182 echo "there are 580 more memories to test.";echo "tr 51 M=EMIRROR_CONTROL3 IS=min IE=4 ITERations=1";tr 51 M=EMIRROR_CONTROL3 IS=min IE=4 ITERations=1;echo "done";
    183 echo "there are 579 more memories to test.";echo "tr 51 M=EM_MTP_INDEX IS=min IE=3 ITERations=1";tr 51 M=EM_MTP_INDEX IS=min IE=3 ITERations=1;echo "done";
    184 #echo "there are 578 more memories to test.";echo "tr 51 M=EPC_LINK_BMAP IS=min IE=0 ITERations=1";tr 51 M=EPC_LINK_BMAP IS=min IE=0 ITERations=1;echo "done";
    185 echo "there are 577 more memories to test.";echo "tr 51 M=EP_REDIRECT_EM_MTP_INDEX IS=min IE=3 ITERations=1";tr 51 M=EP_REDIRECT_EM_MTP_INDEX IS=min IE=3 ITERations=1;echo "done";
    186 echo "there are 576 more memories to test.";echo "tr 51 M=ESEC_MIB0 IS=min IE=4 ITERations=1";tr 51 M=ESEC_MIB0 IS=min IE=4 ITERations=1;echo "done";
    187 echo "there are 575 more memories to test.";echo "tr 51 M=ESEC_MIB1 IS=min IE=4 ITERations=1";tr 51 M=ESEC_MIB1 IS=min IE=4 ITERations=1;echo "done";
    188 echo "there are 574 more memories to test.";echo "tr 51 M=ESEC_SA_TABLE IS=min IE=4 ITERations=1";tr 51 M=ESEC_SA_TABLE IS=min IE=4 ITERations=1;echo "done";
    189 echo "there are 573 more memories to test.";echo "tr 51 M=ESEC_SC_TABLE IS=min IE=4 ITERations=1";tr 51 M=ESEC_SC_TABLE IS=min IE=4 ITERations=1;echo "done";
    190 echo "there are 572 more memories to test.";echo "tr 51 M=ES_PIPE0_TDM_TABLE_0 IS=min IE=4 ITERations=1";tr 51 M=ES_PIPE0_TDM_TABLE_0 IS=min IE=4 ITERations=1;echo "done";
    191 echo "there are 571 more memories to test.";echo "tr 51 M=ES_PIPE0_TDM_TABLE_1 IS=min IE=4 ITERations=1";tr 51 M=ES_PIPE0_TDM_TABLE_1 IS=min IE=4 ITERations=1;echo "done";
    192 #echo "there are 570 more memories to test.";echo "tr 51 M=EXT_TM_MANAGED_PORT IS=min IE=0 ITERations=1";tr 51 M=EXT_TM_MANAGED_PORT IS=min IE=0 ITERations=1;echo "done";
    193 echo "there are 569 more memories to test.";echo "tr 51 M=FP_COUNTER_TABLE IS=min IE=4 ITERations=1";tr 51 M=FP_COUNTER_TABLE IS=min IE=4 ITERations=1;echo "done";
    194 #echo "there are 568 more memories to test.";echo "tr 51 M=FP_GLOBAL_MASK_TCAM IS=min IE=4 ITERations=1";tr 51 M=FP_GLOBAL_MASK_TCAM IS=min IE=4 ITERations=1;echo "done";
    195 echo "there are 567 more memories to test.";echo "tr 51 M=FP_GM_FIELDS IS=min IE=4 ITERations=1";tr 51 M=FP_GM_FIELDS IS=min IE=4 ITERations=1;echo "done";
    196 echo "there are 566 more memories to test.";echo "tr 51 M=FP_HG_CLASSID_SELECT IS=min IE=4 ITERations=1";tr 51 M=FP_HG_CLASSID_SELECT IS=min IE=4 ITERations=1;echo "done";
    197 echo "there are 565 more memories to test.";echo "tr 51 M=FP_I2E_CLASSID_SELECT IS=min IE=4 ITERations=1";tr 51 M=FP_I2E_CLASSID_SELECT IS=min IE=4 ITERations=1;echo "done";
    198 echo "there are 564 more memories to test.";echo "tr 51 M=FP_METER_CONTROL IS=min IE=4 ITERations=1";tr 51 M=FP_METER_CONTROL IS=min IE=4 ITERations=1;echo "done";
    199 echo "there are 563 more memories to test.";echo "tr 51 M=FP_METER_TABLE IS=min IE=4 ITERations=1";tr 51 M=FP_METER_TABLE IS=min IE=4 ITERations=1;echo "done";
    200 echo "there are 562 more memories to test.";echo "tr 51 M=FP_POLICY_TABLE IS=min IE=4 ITERations=1";tr 51 M=FP_POLICY_TABLE IS=min IE=4 ITERations=1;echo "done";
    201 echo "there are 561 more memories to test.";echo "tr 51 M=FP_PORT_FIELD_SEL IS=min IE=4 ITERations=1";tr 51 M=FP_PORT_FIELD_SEL IS=min IE=4 ITERations=1;echo "done";
    202 echo "there are 560 more memories to test.";echo "tr 51 M=FP_PORT_METER_MAP IS=min IE=4 ITERations=1";tr 51 M=FP_PORT_METER_MAP IS=min IE=4 ITERations=1;echo "done";
    203 echo "there are 559 more memories to test.";echo "tr 51 M=FP_RANGE_CHECK IS=min IE=4 ITERations=1";tr 51 M=FP_RANGE_CHECK IS=min IE=4 ITERations=1;echo "done";
    204 #echo "there are 558 more memories to test.";echo "tr 51 M=FP_SLICE_KEY_CONTROL IS=min IE=0 ITERations=1";tr 51 M=FP_SLICE_KEY_CONTROL IS=min IE=0 ITERations=1;echo "done";
    205 #echo "there are 557 more memories to test.";echo "tr 51 M=FP_SLICE_MAP IS=min IE=0 ITERations=1";tr 51 M=FP_SLICE_MAP IS=min IE=0 ITERations=1;echo "done";
    206 echo "there are 556 more memories to test.";echo "tr 51 M=FP_STORM_CONTROL_METERS IS=min IE=4 ITERations=1";tr 51 M=FP_STORM_CONTROL_METERS IS=min IE=4 ITERations=1;echo "done";
    207 echo "there are 555 more memories to test.";echo "tr 51 M=FP_TCAM IS=min IE=4 ITERations=1";tr 51 M=FP_TCAM IS=min IE=4 ITERations=1;echo "done";
    208 echo "there are 554 more memories to test.";echo "tr 51 M=GTP_PORT_TABLE IS=min IE=3 ITERations=1";tr 51 M=GTP_PORT_TABLE IS=min IE=3 ITERations=1;echo "done";
    209 echo "there are 553 more memories to test.";echo "tr 51 M=HG_TRUNK_BITMAP IS=min IE=4 ITERations=1";tr 51 M=HG_TRUNK_BITMAP IS=min IE=4 ITERations=1;echo "done";
    210 #echo "there are 552 more memories to test.";echo "tr 51 M=HG_TRUNK_FAILOVER_ENABLE IS=min IE=0 ITERations=1";tr 51 M=HG_TRUNK_FAILOVER_ENABLE IS=min IE=0 ITERations=1;echo "done";
    211 echo "there are 551 more memories to test.";echo "tr 51 M=HG_TRUNK_FAILOVER_SET IS=min IE=4 ITERations=1";tr 51 M=HG_TRUNK_FAILOVER_SET IS=min IE=4 ITERations=1;echo "done";
    212 echo "there are 550 more memories to test.";echo "tr 51 M=HG_TRUNK_GROUP IS=min IE=4 ITERations=1";tr 51 M=HG_TRUNK_GROUP IS=min IE=4 ITERations=1;echo "done";
    213 echo "there are 549 more memories to test.";echo "tr 51 M=HG_TRUNK_MEMBER IS=min IE=4 ITERations=1";tr 51 M=HG_TRUNK_MEMBER IS=min IE=4 ITERations=1;echo "done";
    214 #echo "there are 548 more memories to test.";echo "tr 51 M=HIGIG_TRUNK_CONTROL IS=min IE=0 ITERations=1";tr 51 M=HIGIG_TRUNK_CONTROL IS=min IE=0 ITERations=1;echo "done";
    215 echo "there are 547 more memories to test.";echo "tr 51 M=HSP_SCHED_L0_ACCUM_COMP_MEM_0 IS=min IE=4 ITERations=1";tr 51 M=HSP_SCHED_L0_ACCUM_COMP_MEM_0 IS=min IE=4 ITERations=1;echo "done";
    216 echo "there are 546 more memories to test.";echo "tr 51 M=HSP_SCHED_L0_CREDIT_MEM_0 IS=min IE=4 ITERations=1";tr 51 M=HSP_SCHED_L0_CREDIT_MEM_0 IS=min IE=4 ITERations=1;echo "done";
    217 echo "there are 545 more memories to test.";echo "tr 51 M=HSP_SCHED_L0_NODE_WEIGHT IS=min IE=4 ITERations=1";tr 51 M=HSP_SCHED_L0_NODE_WEIGHT IS=min IE=4 ITERations=1;echo "done";
    218 echo "there are 544 more memories to test.";echo "tr 51 M=HSP_SCHED_L1_ACCUM_COMP_MEM_0 IS=min IE=4 ITERations=1";tr 51 M=HSP_SCHED_L1_ACCUM_COMP_MEM_0 IS=min IE=4 ITERations=1;echo "done";
    219 echo "there are 543 more memories to test.";echo "tr 51 M=HSP_SCHED_L1_CREDIT_MEM_0 IS=min IE=4 ITERations=1";tr 51 M=HSP_SCHED_L1_CREDIT_MEM_0 IS=min IE=4 ITERations=1;echo "done";
    220 echo "there are 542 more memories to test.";echo "tr 51 M=HSP_SCHED_L1_NODE_WEIGHT IS=min IE=4 ITERations=1";tr 51 M=HSP_SCHED_L1_NODE_WEIGHT IS=min IE=4 ITERations=1;echo "done";
    221 echo "there are 541 more memories to test.";echo "tr 51 M=HSP_SCHED_L2_ACCUM_COMP_MEM_0 IS=min IE=4 ITERations=1";tr 51 M=HSP_SCHED_L2_ACCUM_COMP_MEM_0 IS=min IE=4 ITERations=1;echo "done";
    222 echo "there are 540 more memories to test.";echo "tr 51 M=HSP_SCHED_L2_CREDIT_MEM_0 IS=min IE=4 ITERations=1";tr 51 M=HSP_SCHED_L2_CREDIT_MEM_0 IS=min IE=4 ITERations=1;echo "done";
    223 echo "there are 539 more memories to test.";echo "tr 51 M=HSP_SCHED_L2_MC_QUEUE_WEIGHT IS=min IE=4 ITERations=1";tr 51 M=HSP_SCHED_L2_MC_QUEUE_WEIGHT IS=min IE=4 ITERations=1;echo "done";
    224 echo "there are 538 more memories to test.";echo "tr 51 M=HSP_SCHED_L2_UC_QUEUE_WEIGHT IS=min IE=4 ITERations=1";tr 51 M=HSP_SCHED_L2_UC_QUEUE_WEIGHT IS=min IE=4 ITERations=1;echo "done";
    225 echo "there are 537 more memories to test.";echo "tr 51 M=IARB_ING_PORT_TABLE IS=min IE=4 ITERations=1";tr 51 M=IARB_ING_PORT_TABLE IS=min IE=4 ITERations=1;echo "done";
    226 echo "there are 536 more memories to test.";echo "tr 51 M=IARB_MAIN_TDM IS=min IE=4 ITERations=1";tr 51 M=IARB_MAIN_TDM IS=min IE=4 ITERations=1;echo "done";
    227 echo "there are 535 more memories to test.";echo "tr 51 M=ICONTROL_OPCODE_BITMAP IS=min IE=4 ITERations=1";tr 51 M=ICONTROL_OPCODE_BITMAP IS=min IE=4 ITERations=1;echo "done";
    228 #echo "there are 534 more memories to test.";echo "tr 51 M=IDB_OBM0_DSCP_MAP_PORT0 IS=min IE=3 ITERations=1";tr 51 M=IDB_OBM0_DSCP_MAP_PORT0 IS=min IE=3 ITERations=1;echo "done";
    229 #echo "there are 533 more memories to test.";echo "tr 51 M=IDB_OBM0_DSCP_MAP_PORT1 IS=min IE=3 ITERations=1";tr 51 M=IDB_OBM0_DSCP_MAP_PORT1 IS=min IE=3 ITERations=1;echo "done";
    230 #echo "there are 532 more memories to test.";echo "tr 51 M=IDB_OBM0_DSCP_MAP_PORT2 IS=min IE=3 ITERations=1";tr 51 M=IDB_OBM0_DSCP_MAP_PORT2 IS=min IE=3 ITERations=1;echo "done";
    231 #echo "there are 531 more memories to test.";echo "tr 51 M=IDB_OBM0_DSCP_MAP_PORT3 IS=min IE=3 ITERations=1";tr 51 M=IDB_OBM0_DSCP_MAP_PORT3 IS=min IE=3 ITERations=1;echo "done";
    232 #echo "there are 530 more memories to test.";echo "tr 51 M=IDB_OBM0_ETAG_MAP_PORT0 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM0_ETAG_MAP_PORT0 IS=min IE=0 ITERations=1;echo "done";
    233 #echo "there are 529 more memories to test.";echo "tr 51 M=IDB_OBM0_ETAG_MAP_PORT1 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM0_ETAG_MAP_PORT1 IS=min IE=0 ITERations=1;echo "done";
    234 #echo "there are 528 more memories to test.";echo "tr 51 M=IDB_OBM0_ETAG_MAP_PORT2 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM0_ETAG_MAP_PORT2 IS=min IE=0 ITERations=1;echo "done";
    235 #echo "there are 527 more memories to test.";echo "tr 51 M=IDB_OBM0_ETAG_MAP_PORT3 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM0_ETAG_MAP_PORT3 IS=min IE=0 ITERations=1;echo "done";
    236 #echo "there are 526 more memories to test.";echo "tr 51 M=IDB_OBM0_MPLS_MAP_PORT0 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM0_MPLS_MAP_PORT0 IS=min IE=0 ITERations=1;echo "done";
    237 #echo "there are 525 more memories to test.";echo "tr 51 M=IDB_OBM0_MPLS_MAP_PORT1 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM0_MPLS_MAP_PORT1 IS=min IE=0 ITERations=1;echo "done";
    238 #echo "there are 524 more memories to test.";echo "tr 51 M=IDB_OBM0_MPLS_MAP_PORT2 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM0_MPLS_MAP_PORT2 IS=min IE=0 ITERations=1;echo "done";
    239 #echo "there are 523 more memories to test.";echo "tr 51 M=IDB_OBM0_MPLS_MAP_PORT3 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM0_MPLS_MAP_PORT3 IS=min IE=0 ITERations=1;echo "done";
    240 #echo "there are 522 more memories to test.";echo "tr 51 M=IDB_OBM0_PRI_MAP_PORT0 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM0_PRI_MAP_PORT0 IS=min IE=0 ITERations=1;echo "done";
    241 #echo "there are 521 more memories to test.";echo "tr 51 M=IDB_OBM0_PRI_MAP_PORT1 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM0_PRI_MAP_PORT1 IS=min IE=0 ITERations=1;echo "done";
    242 #echo "there are 520 more memories to test.";echo "tr 51 M=IDB_OBM0_PRI_MAP_PORT2 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM0_PRI_MAP_PORT2 IS=min IE=0 ITERations=1;echo "done";
    243 #echo "there are 519 more memories to test.";echo "tr 51 M=IDB_OBM0_PRI_MAP_PORT3 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM0_PRI_MAP_PORT3 IS=min IE=0 ITERations=1;echo "done";
    244 #echo "there are 518 more memories to test.";echo "tr 51 M=IDB_OBM1_DSCP_MAP_PORT0 IS=min IE=3 ITERations=1";tr 51 M=IDB_OBM1_DSCP_MAP_PORT0 IS=min IE=3 ITERations=1;echo "done";
    245 #echo "there are 517 more memories to test.";echo "tr 51 M=IDB_OBM1_DSCP_MAP_PORT1 IS=min IE=3 ITERations=1";tr 51 M=IDB_OBM1_DSCP_MAP_PORT1 IS=min IE=3 ITERations=1;echo "done";
    246 #echo "there are 516 more memories to test.";echo "tr 51 M=IDB_OBM1_DSCP_MAP_PORT2 IS=min IE=3 ITERations=1";tr 51 M=IDB_OBM1_DSCP_MAP_PORT2 IS=min IE=3 ITERations=1;echo "done";
    247 #echo "there are 515 more memories to test.";echo "tr 51 M=IDB_OBM1_DSCP_MAP_PORT3 IS=min IE=3 ITERations=1";tr 51 M=IDB_OBM1_DSCP_MAP_PORT3 IS=min IE=3 ITERations=1;echo "done";
    248 #echo "there are 514 more memories to test.";echo "tr 51 M=IDB_OBM1_ETAG_MAP_PORT0 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM1_ETAG_MAP_PORT0 IS=min IE=0 ITERations=1;echo "done";
    249 #echo "there are 513 more memories to test.";echo "tr 51 M=IDB_OBM1_ETAG_MAP_PORT1 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM1_ETAG_MAP_PORT1 IS=min IE=0 ITERations=1;echo "done";
    250 #echo "there are 512 more memories to test.";echo "tr 51 M=IDB_OBM1_ETAG_MAP_PORT2 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM1_ETAG_MAP_PORT2 IS=min IE=0 ITERations=1;echo "done";
    251 #echo "there are 511 more memories to test.";echo "tr 51 M=IDB_OBM1_ETAG_MAP_PORT3 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM1_ETAG_MAP_PORT3 IS=min IE=0 ITERations=1;echo "done";
    252 #echo "there are 510 more memories to test.";echo "tr 51 M=IDB_OBM1_MPLS_MAP_PORT0 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM1_MPLS_MAP_PORT0 IS=min IE=0 ITERations=1;echo "done";
    253 #echo "there are 509 more memories to test.";echo "tr 51 M=IDB_OBM1_MPLS_MAP_PORT1 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM1_MPLS_MAP_PORT1 IS=min IE=0 ITERations=1;echo "done";
    254 #echo "there are 508 more memories to test.";echo "tr 51 M=IDB_OBM1_MPLS_MAP_PORT2 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM1_MPLS_MAP_PORT2 IS=min IE=0 ITERations=1;echo "done";
    255 #echo "there are 507 more memories to test.";echo "tr 51 M=IDB_OBM1_MPLS_MAP_PORT3 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM1_MPLS_MAP_PORT3 IS=min IE=0 ITERations=1;echo "done";
    256 #echo "there are 506 more memories to test.";echo "tr 51 M=IDB_OBM1_PRI_MAP_PORT0 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM1_PRI_MAP_PORT0 IS=min IE=0 ITERations=1;echo "done";
    257 #echo "there are 505 more memories to test.";echo "tr 51 M=IDB_OBM1_PRI_MAP_PORT1 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM1_PRI_MAP_PORT1 IS=min IE=0 ITERations=1;echo "done";
    258 #echo "there are 504 more memories to test.";echo "tr 51 M=IDB_OBM1_PRI_MAP_PORT2 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM1_PRI_MAP_PORT2 IS=min IE=0 ITERations=1;echo "done";
    259 #echo "there are 503 more memories to test.";echo "tr 51 M=IDB_OBM1_PRI_MAP_PORT3 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM1_PRI_MAP_PORT3 IS=min IE=0 ITERations=1;echo "done";
    260 #echo "there are 502 more memories to test.";echo "tr 51 M=IDB_OBM2_DSCP_MAP_PORT0 IS=min IE=3 ITERations=1";tr 51 M=IDB_OBM2_DSCP_MAP_PORT0 IS=min IE=3 ITERations=1;echo "done";
    261 #echo "there are 501 more memories to test.";echo "tr 51 M=IDB_OBM2_DSCP_MAP_PORT1 IS=min IE=3 ITERations=1";tr 51 M=IDB_OBM2_DSCP_MAP_PORT1 IS=min IE=3 ITERations=1;echo "done";
    262 #echo "there are 500 more memories to test.";echo "tr 51 M=IDB_OBM2_DSCP_MAP_PORT2 IS=min IE=3 ITERations=1";tr 51 M=IDB_OBM2_DSCP_MAP_PORT2 IS=min IE=3 ITERations=1;echo "done";
    263 #echo "there are 499 more memories to test.";echo "tr 51 M=IDB_OBM2_DSCP_MAP_PORT3 IS=min IE=3 ITERations=1";tr 51 M=IDB_OBM2_DSCP_MAP_PORT3 IS=min IE=3 ITERations=1;echo "done";
    264 #echo "there are 498 more memories to test.";echo "tr 51 M=IDB_OBM2_ETAG_MAP_PORT0 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM2_ETAG_MAP_PORT0 IS=min IE=0 ITERations=1;echo "done";
    265 #echo "there are 497 more memories to test.";echo "tr 51 M=IDB_OBM2_ETAG_MAP_PORT1 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM2_ETAG_MAP_PORT1 IS=min IE=0 ITERations=1;echo "done";
    266 #echo "there are 496 more memories to test.";echo "tr 51 M=IDB_OBM2_ETAG_MAP_PORT2 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM2_ETAG_MAP_PORT2 IS=min IE=0 ITERations=1;echo "done";
    267 #echo "there are 495 more memories to test.";echo "tr 51 M=IDB_OBM2_ETAG_MAP_PORT3 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM2_ETAG_MAP_PORT3 IS=min IE=0 ITERations=1;echo "done";
    268 #echo "there are 494 more memories to test.";echo "tr 51 M=IDB_OBM2_MPLS_MAP_PORT0 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM2_MPLS_MAP_PORT0 IS=min IE=0 ITERations=1;echo "done";
    269 #echo "there are 493 more memories to test.";echo "tr 51 M=IDB_OBM2_MPLS_MAP_PORT1 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM2_MPLS_MAP_PORT1 IS=min IE=0 ITERations=1;echo "done";
    270 #echo "there are 492 more memories to test.";echo "tr 51 M=IDB_OBM2_MPLS_MAP_PORT2 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM2_MPLS_MAP_PORT2 IS=min IE=0 ITERations=1;echo "done";
    271 #echo "there are 491 more memories to test.";echo "tr 51 M=IDB_OBM2_MPLS_MAP_PORT3 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM2_MPLS_MAP_PORT3 IS=min IE=0 ITERations=1;echo "done";
    272 #echo "there are 490 more memories to test.";echo "tr 51 M=IDB_OBM2_PRI_MAP_PORT0 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM2_PRI_MAP_PORT0 IS=min IE=0 ITERations=1;echo "done";
    273 #echo "there are 489 more memories to test.";echo "tr 51 M=IDB_OBM2_PRI_MAP_PORT1 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM2_PRI_MAP_PORT1 IS=min IE=0 ITERations=1;echo "done";
    274 #echo "there are 488 more memories to test.";echo "tr 51 M=IDB_OBM2_PRI_MAP_PORT2 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM2_PRI_MAP_PORT2 IS=min IE=0 ITERations=1;echo "done";
    275 #echo "there are 487 more memories to test.";echo "tr 51 M=IDB_OBM2_PRI_MAP_PORT3 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM2_PRI_MAP_PORT3 IS=min IE=0 ITERations=1;echo "done";
    276 #echo "there are 486 more memories to test.";echo "tr 51 M=IDB_OBM3_DSCP_MAP_PORT0 IS=min IE=3 ITERations=1";tr 51 M=IDB_OBM3_DSCP_MAP_PORT0 IS=min IE=3 ITERations=1;echo "done";
    277 #echo "there are 485 more memories to test.";echo "tr 51 M=IDB_OBM3_DSCP_MAP_PORT1 IS=min IE=3 ITERations=1";tr 51 M=IDB_OBM3_DSCP_MAP_PORT1 IS=min IE=3 ITERations=1;echo "done";
    278 #echo "there are 484 more memories to test.";echo "tr 51 M=IDB_OBM3_DSCP_MAP_PORT2 IS=min IE=3 ITERations=1";tr 51 M=IDB_OBM3_DSCP_MAP_PORT2 IS=min IE=3 ITERations=1;echo "done";
    279 #echo "there are 483 more memories to test.";echo "tr 51 M=IDB_OBM3_DSCP_MAP_PORT3 IS=min IE=3 ITERations=1";tr 51 M=IDB_OBM3_DSCP_MAP_PORT3 IS=min IE=3 ITERations=1;echo "done";
    280 #echo "there are 482 more memories to test.";echo "tr 51 M=IDB_OBM3_ETAG_MAP_PORT0 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM3_ETAG_MAP_PORT0 IS=min IE=0 ITERations=1;echo "done";
    281 #echo "there are 481 more memories to test.";echo "tr 51 M=IDB_OBM3_ETAG_MAP_PORT1 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM3_ETAG_MAP_PORT1 IS=min IE=0 ITERations=1;echo "done";
    282 #echo "there are 480 more memories to test.";echo "tr 51 M=IDB_OBM3_ETAG_MAP_PORT2 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM3_ETAG_MAP_PORT2 IS=min IE=0 ITERations=1;echo "done";
    283 #echo "there are 479 more memories to test.";echo "tr 51 M=IDB_OBM3_ETAG_MAP_PORT3 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM3_ETAG_MAP_PORT3 IS=min IE=0 ITERations=1;echo "done";
    284 #echo "there are 478 more memories to test.";echo "tr 51 M=IDB_OBM3_MPLS_MAP_PORT0 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM3_MPLS_MAP_PORT0 IS=min IE=0 ITERations=1;echo "done";
    285 #echo "there are 477 more memories to test.";echo "tr 51 M=IDB_OBM3_MPLS_MAP_PORT1 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM3_MPLS_MAP_PORT1 IS=min IE=0 ITERations=1;echo "done";
    286 #echo "there are 476 more memories to test.";echo "tr 51 M=IDB_OBM3_MPLS_MAP_PORT2 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM3_MPLS_MAP_PORT2 IS=min IE=0 ITERations=1;echo "done";
    287 #echo "there are 475 more memories to test.";echo "tr 51 M=IDB_OBM3_MPLS_MAP_PORT3 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM3_MPLS_MAP_PORT3 IS=min IE=0 ITERations=1;echo "done";
    288 #echo "there are 474 more memories to test.";echo "tr 51 M=IDB_OBM3_PRI_MAP_PORT0 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM3_PRI_MAP_PORT0 IS=min IE=0 ITERations=1;echo "done";
    289 #echo "there are 473 more memories to test.";echo "tr 51 M=IDB_OBM3_PRI_MAP_PORT1 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM3_PRI_MAP_PORT1 IS=min IE=0 ITERations=1;echo "done";
    290 #echo "there are 472 more memories to test.";echo "tr 51 M=IDB_OBM3_PRI_MAP_PORT2 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM3_PRI_MAP_PORT2 IS=min IE=0 ITERations=1;echo "done";
    291 #echo "there are 471 more memories to test.";echo "tr 51 M=IDB_OBM3_PRI_MAP_PORT3 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM3_PRI_MAP_PORT3 IS=min IE=0 ITERations=1;echo "done";
    292 #echo "there are 470 more memories to test.";echo "tr 51 M=IDB_OBM4_DSCP_MAP_PORT0 IS=min IE=3 ITERations=1";tr 51 M=IDB_OBM4_DSCP_MAP_PORT0 IS=min IE=3 ITERations=1;echo "done";
    293 #echo "there are 469 more memories to test.";echo "tr 51 M=IDB_OBM4_DSCP_MAP_PORT1 IS=min IE=3 ITERations=1";tr 51 M=IDB_OBM4_DSCP_MAP_PORT1 IS=min IE=3 ITERations=1;echo "done";
    294 #echo "there are 468 more memories to test.";echo "tr 51 M=IDB_OBM4_DSCP_MAP_PORT2 IS=min IE=3 ITERations=1";tr 51 M=IDB_OBM4_DSCP_MAP_PORT2 IS=min IE=3 ITERations=1;echo "done";
    295 #echo "there are 467 more memories to test.";echo "tr 51 M=IDB_OBM4_DSCP_MAP_PORT3 IS=min IE=3 ITERations=1";tr 51 M=IDB_OBM4_DSCP_MAP_PORT3 IS=min IE=3 ITERations=1;echo "done";
    296 #echo "there are 466 more memories to test.";echo "tr 51 M=IDB_OBM4_ETAG_MAP_PORT0 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM4_ETAG_MAP_PORT0 IS=min IE=0 ITERations=1;echo "done";
    297 #echo "there are 465 more memories to test.";echo "tr 51 M=IDB_OBM4_ETAG_MAP_PORT1 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM4_ETAG_MAP_PORT1 IS=min IE=0 ITERations=1;echo "done";
    298 #echo "there are 464 more memories to test.";echo "tr 51 M=IDB_OBM4_ETAG_MAP_PORT2 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM4_ETAG_MAP_PORT2 IS=min IE=0 ITERations=1;echo "done";
    299 #echo "there are 463 more memories to test.";echo "tr 51 M=IDB_OBM4_ETAG_MAP_PORT3 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM4_ETAG_MAP_PORT3 IS=min IE=0 ITERations=1;echo "done";
    300 #echo "there are 462 more memories to test.";echo "tr 51 M=IDB_OBM4_MPLS_MAP_PORT0 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM4_MPLS_MAP_PORT0 IS=min IE=0 ITERations=1;echo "done";
    301 #echo "there are 461 more memories to test.";echo "tr 51 M=IDB_OBM4_MPLS_MAP_PORT1 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM4_MPLS_MAP_PORT1 IS=min IE=0 ITERations=1;echo "done";
    302 #echo "there are 460 more memories to test.";echo "tr 51 M=IDB_OBM4_MPLS_MAP_PORT2 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM4_MPLS_MAP_PORT2 IS=min IE=0 ITERations=1;echo "done";
    303 #echo "there are 459 more memories to test.";echo "tr 51 M=IDB_OBM4_MPLS_MAP_PORT3 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM4_MPLS_MAP_PORT3 IS=min IE=0 ITERations=1;echo "done";
    304 #echo "there are 458 more memories to test.";echo "tr 51 M=IDB_OBM4_PRI_MAP_PORT0 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM4_PRI_MAP_PORT0 IS=min IE=0 ITERations=1;echo "done";
    305 #echo "there are 457 more memories to test.";echo "tr 51 M=IDB_OBM4_PRI_MAP_PORT1 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM4_PRI_MAP_PORT1 IS=min IE=0 ITERations=1;echo "done";
    306 #echo "there are 456 more memories to test.";echo "tr 51 M=IDB_OBM4_PRI_MAP_PORT2 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM4_PRI_MAP_PORT2 IS=min IE=0 ITERations=1;echo "done";
    307 #echo "there are 455 more memories to test.";echo "tr 51 M=IDB_OBM4_PRI_MAP_PORT3 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM4_PRI_MAP_PORT3 IS=min IE=0 ITERations=1;echo "done";
    308 #echo "there are 454 more memories to test.";echo "tr 51 M=IDB_OBM5_DSCP_MAP_PORT0 IS=min IE=3 ITERations=1";tr 51 M=IDB_OBM5_DSCP_MAP_PORT0 IS=min IE=3 ITERations=1;echo "done";
    309 #echo "there are 453 more memories to test.";echo "tr 51 M=IDB_OBM5_DSCP_MAP_PORT1 IS=min IE=3 ITERations=1";tr 51 M=IDB_OBM5_DSCP_MAP_PORT1 IS=min IE=3 ITERations=1;echo "done";
    310 #echo "there are 452 more memories to test.";echo "tr 51 M=IDB_OBM5_DSCP_MAP_PORT2 IS=min IE=3 ITERations=1";tr 51 M=IDB_OBM5_DSCP_MAP_PORT2 IS=min IE=3 ITERations=1;echo "done";
    311 #echo "there are 451 more memories to test.";echo "tr 51 M=IDB_OBM5_DSCP_MAP_PORT3 IS=min IE=3 ITERations=1";tr 51 M=IDB_OBM5_DSCP_MAP_PORT3 IS=min IE=3 ITERations=1;echo "done";
    312 #echo "there are 450 more memories to test.";echo "tr 51 M=IDB_OBM5_ETAG_MAP_PORT0 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM5_ETAG_MAP_PORT0 IS=min IE=0 ITERations=1;echo "done";
    313 #echo "there are 449 more memories to test.";echo "tr 51 M=IDB_OBM5_ETAG_MAP_PORT1 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM5_ETAG_MAP_PORT1 IS=min IE=0 ITERations=1;echo "done";
    314 #echo "there are 448 more memories to test.";echo "tr 51 M=IDB_OBM5_ETAG_MAP_PORT2 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM5_ETAG_MAP_PORT2 IS=min IE=0 ITERations=1;echo "done";
    315 #echo "there are 447 more memories to test.";echo "tr 51 M=IDB_OBM5_ETAG_MAP_PORT3 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM5_ETAG_MAP_PORT3 IS=min IE=0 ITERations=1;echo "done";
    316 #echo "there are 446 more memories to test.";echo "tr 51 M=IDB_OBM5_MPLS_MAP_PORT0 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM5_MPLS_MAP_PORT0 IS=min IE=0 ITERations=1;echo "done";
    317 #echo "there are 445 more memories to test.";echo "tr 51 M=IDB_OBM5_MPLS_MAP_PORT1 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM5_MPLS_MAP_PORT1 IS=min IE=0 ITERations=1;echo "done";
    318 #echo "there are 444 more memories to test.";echo "tr 51 M=IDB_OBM5_MPLS_MAP_PORT2 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM5_MPLS_MAP_PORT2 IS=min IE=0 ITERations=1;echo "done";
    319 #echo "there are 443 more memories to test.";echo "tr 51 M=IDB_OBM5_MPLS_MAP_PORT3 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM5_MPLS_MAP_PORT3 IS=min IE=0 ITERations=1;echo "done";
    320 #echo "there are 442 more memories to test.";echo "tr 51 M=IDB_OBM5_PRI_MAP_PORT0 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM5_PRI_MAP_PORT0 IS=min IE=0 ITERations=1;echo "done";
    321 #echo "there are 441 more memories to test.";echo "tr 51 M=IDB_OBM5_PRI_MAP_PORT1 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM5_PRI_MAP_PORT1 IS=min IE=0 ITERations=1;echo "done";
    322 #echo "there are 440 more memories to test.";echo "tr 51 M=IDB_OBM5_PRI_MAP_PORT2 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM5_PRI_MAP_PORT2 IS=min IE=0 ITERations=1;echo "done";
    323 #echo "there are 439 more memories to test.";echo "tr 51 M=IDB_OBM5_PRI_MAP_PORT3 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM5_PRI_MAP_PORT3 IS=min IE=0 ITERations=1;echo "done";
    324 #echo "there are 438 more memories to test.";echo "tr 51 M=IDB_OBM6_DSCP_MAP_PORT0 IS=min IE=3 ITERations=1";tr 51 M=IDB_OBM6_DSCP_MAP_PORT0 IS=min IE=3 ITERations=1;echo "done";
    325 #echo "there are 437 more memories to test.";echo "tr 51 M=IDB_OBM6_DSCP_MAP_PORT1 IS=min IE=3 ITERations=1";tr 51 M=IDB_OBM6_DSCP_MAP_PORT1 IS=min IE=3 ITERations=1;echo "done";
    326 #echo "there are 436 more memories to test.";echo "tr 51 M=IDB_OBM6_DSCP_MAP_PORT2 IS=min IE=3 ITERations=1";tr 51 M=IDB_OBM6_DSCP_MAP_PORT2 IS=min IE=3 ITERations=1;echo "done";
    327 #echo "there are 435 more memories to test.";echo "tr 51 M=IDB_OBM6_DSCP_MAP_PORT3 IS=min IE=3 ITERations=1";tr 51 M=IDB_OBM6_DSCP_MAP_PORT3 IS=min IE=3 ITERations=1;echo "done";
    328 #echo "there are 434 more memories to test.";echo "tr 51 M=IDB_OBM6_ETAG_MAP_PORT0 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM6_ETAG_MAP_PORT0 IS=min IE=0 ITERations=1;echo "done";
    329 #echo "there are 433 more memories to test.";echo "tr 51 M=IDB_OBM6_ETAG_MAP_PORT1 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM6_ETAG_MAP_PORT1 IS=min IE=0 ITERations=1;echo "done";
    330 #echo "there are 432 more memories to test.";echo "tr 51 M=IDB_OBM6_ETAG_MAP_PORT2 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM6_ETAG_MAP_PORT2 IS=min IE=0 ITERations=1;echo "done";
    331 #echo "there are 431 more memories to test.";echo "tr 51 M=IDB_OBM6_ETAG_MAP_PORT3 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM6_ETAG_MAP_PORT3 IS=min IE=0 ITERations=1;echo "done";
    332 #echo "there are 430 more memories to test.";echo "tr 51 M=IDB_OBM6_MPLS_MAP_PORT0 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM6_MPLS_MAP_PORT0 IS=min IE=0 ITERations=1;echo "done";
    333 #echo "there are 429 more memories to test.";echo "tr 51 M=IDB_OBM6_MPLS_MAP_PORT1 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM6_MPLS_MAP_PORT1 IS=min IE=0 ITERations=1;echo "done";
    334 #echo "there are 428 more memories to test.";echo "tr 51 M=IDB_OBM6_MPLS_MAP_PORT2 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM6_MPLS_MAP_PORT2 IS=min IE=0 ITERations=1;echo "done";
    335 #echo "there are 427 more memories to test.";echo "tr 51 M=IDB_OBM6_MPLS_MAP_PORT3 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM6_MPLS_MAP_PORT3 IS=min IE=0 ITERations=1;echo "done";
    336 #echo "there are 426 more memories to test.";echo "tr 51 M=IDB_OBM6_PRI_MAP_PORT0 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM6_PRI_MAP_PORT0 IS=min IE=0 ITERations=1;echo "done";
    337 #echo "there are 425 more memories to test.";echo "tr 51 M=IDB_OBM6_PRI_MAP_PORT1 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM6_PRI_MAP_PORT1 IS=min IE=0 ITERations=1;echo "done";
    338 #echo "there are 424 more memories to test.";echo "tr 51 M=IDB_OBM6_PRI_MAP_PORT2 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM6_PRI_MAP_PORT2 IS=min IE=0 ITERations=1;echo "done";
    339 #echo "there are 423 more memories to test.";echo "tr 51 M=IDB_OBM6_PRI_MAP_PORT3 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM6_PRI_MAP_PORT3 IS=min IE=0 ITERations=1;echo "done";
    340 #echo "there are 422 more memories to test.";echo "tr 51 M=IDB_OBM7_DSCP_MAP_PORT0 IS=min IE=3 ITERations=1";tr 51 M=IDB_OBM7_DSCP_MAP_PORT0 IS=min IE=3 ITERations=1;echo "done";
    341 #echo "there are 421 more memories to test.";echo "tr 51 M=IDB_OBM7_DSCP_MAP_PORT1 IS=min IE=3 ITERations=1";tr 51 M=IDB_OBM7_DSCP_MAP_PORT1 IS=min IE=3 ITERations=1;echo "done";
    342 #echo "there are 420 more memories to test.";echo "tr 51 M=IDB_OBM7_DSCP_MAP_PORT2 IS=min IE=3 ITERations=1";tr 51 M=IDB_OBM7_DSCP_MAP_PORT2 IS=min IE=3 ITERations=1;echo "done";
    343 #echo "there are 419 more memories to test.";echo "tr 51 M=IDB_OBM7_DSCP_MAP_PORT3 IS=min IE=3 ITERations=1";tr 51 M=IDB_OBM7_DSCP_MAP_PORT3 IS=min IE=3 ITERations=1;echo "done";
    344 #echo "there are 418 more memories to test.";echo "tr 51 M=IDB_OBM7_ETAG_MAP_PORT0 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM7_ETAG_MAP_PORT0 IS=min IE=0 ITERations=1;echo "done";
    345 #echo "there are 417 more memories to test.";echo "tr 51 M=IDB_OBM7_ETAG_MAP_PORT1 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM7_ETAG_MAP_PORT1 IS=min IE=0 ITERations=1;echo "done";
    346 #echo "there are 416 more memories to test.";echo "tr 51 M=IDB_OBM7_ETAG_MAP_PORT2 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM7_ETAG_MAP_PORT2 IS=min IE=0 ITERations=1;echo "done";
    347 #echo "there are 415 more memories to test.";echo "tr 51 M=IDB_OBM7_ETAG_MAP_PORT3 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM7_ETAG_MAP_PORT3 IS=min IE=0 ITERations=1;echo "done";
    348 #echo "there are 414 more memories to test.";echo "tr 51 M=IDB_OBM7_MPLS_MAP_PORT0 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM7_MPLS_MAP_PORT0 IS=min IE=0 ITERations=1;echo "done";
    349 #echo "there are 413 more memories to test.";echo "tr 51 M=IDB_OBM7_MPLS_MAP_PORT1 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM7_MPLS_MAP_PORT1 IS=min IE=0 ITERations=1;echo "done";
    350 #echo "there are 412 more memories to test.";echo "tr 51 M=IDB_OBM7_MPLS_MAP_PORT2 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM7_MPLS_MAP_PORT2 IS=min IE=0 ITERations=1;echo "done";
    351 #echo "there are 411 more memories to test.";echo "tr 51 M=IDB_OBM7_MPLS_MAP_PORT3 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM7_MPLS_MAP_PORT3 IS=min IE=0 ITERations=1;echo "done";
    352 #echo "there are 410 more memories to test.";echo "tr 51 M=IDB_OBM7_PRI_MAP_PORT0 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM7_PRI_MAP_PORT0 IS=min IE=0 ITERations=1;echo "done";
    353 #echo "there are 409 more memories to test.";echo "tr 51 M=IDB_OBM7_PRI_MAP_PORT1 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM7_PRI_MAP_PORT1 IS=min IE=0 ITERations=1;echo "done";
    354 #echo "there are 408 more memories to test.";echo "tr 51 M=IDB_OBM7_PRI_MAP_PORT2 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM7_PRI_MAP_PORT2 IS=min IE=0 ITERations=1;echo "done";
    355 #echo "there are 407 more memories to test.";echo "tr 51 M=IDB_OBM7_PRI_MAP_PORT3 IS=min IE=0 ITERations=1";tr 51 M=IDB_OBM7_PRI_MAP_PORT3 IS=min IE=0 ITERations=1;echo "done";
    356 echo "there are 406 more memories to test.";echo "tr 51 M=IFP_COS_MAP IS=min IE=4 ITERations=1";tr 51 M=IFP_COS_MAP IS=min IE=4 ITERations=1;echo "done";
    357 echo "there are 405 more memories to test.";echo "tr 51 M=IFP_REDIRECTION_PROFILE IS=min IE=4 ITERations=1";tr 51 M=IFP_REDIRECTION_PROFILE IS=min IE=4 ITERations=1;echo "done";
    358 echo "there are 404 more memories to test.";echo "tr 51 M=IMIRROR_BITMAP IS=min IE=4 ITERations=1";tr 51 M=IMIRROR_BITMAP IS=min IE=4 ITERations=1;echo "done";
    359 echo "there are 403 more memories to test.";echo "tr 51 M=IM_MTP_INDEX IS=min IE=3 ITERations=1";tr 51 M=IM_MTP_INDEX IS=min IE=3 ITERations=1;echo "done";
    360 echo "there are 402 more memories to test.";echo "tr 51 M=ING_1588_INGRESS_CTRL IS=min IE=4 ITERations=1";tr 51 M=ING_1588_INGRESS_CTRL IS=min IE=4 ITERations=1;echo "done";
    361 echo "there are 401 more memories to test.";echo "tr 51 M=ING_ACTIVE_L3_IIF_PROFILE IS=min IE=4 ITERations=1";tr 51 M=ING_ACTIVE_L3_IIF_PROFILE IS=min IE=4 ITERations=1;echo "done";
    362 #echo "there are 400 more memories to test.";echo "tr 51 M=ING_DEST_PORT_ENABLE IS=min IE=0 ITERations=1";tr 51 M=ING_DEST_PORT_ENABLE IS=min IE=0 ITERations=1;echo "done";
    363 echo "there are 399 more memories to test.";echo "tr 51 M=ING_DNAT_ADDRESS_TYPE IS=min IE=4 ITERations=1";tr 51 M=ING_DNAT_ADDRESS_TYPE IS=min IE=4 ITERations=1;echo "done";
    364 echo "there are 398 more memories to test.";echo "tr 51 M=ING_DNAT_ADDRESS_TYPE_DATA_ONLY IS=min IE=4 ITERations=1";tr 51 M=ING_DNAT_ADDRESS_TYPE_DATA_ONLY IS=min IE=4 ITERations=1;echo "done";
    365 echo "there are 397 more memories to test.";echo "tr 51 M=ING_DNAT_ADDRESS_TYPE_ONLY IS=min IE=4 ITERations=1";tr 51 M=ING_DNAT_ADDRESS_TYPE_ONLY IS=min IE=4 ITERations=1;echo "done";
    366 echo "there are 396 more memories to test.";echo "tr 51 M=ING_DVP_2_TABLE IS=min IE=4 ITERations=1";tr 51 M=ING_DVP_2_TABLE IS=min IE=4 ITERations=1;echo "done";
    367 echo "there are 395 more memories to test.";echo "tr 51 M=ING_DVP_TABLE IS=min IE=4 ITERations=1";tr 51 M=ING_DVP_TABLE IS=min IE=4 ITERations=1;echo "done";
    368 echo "there are 394 more memories to test.";echo "tr 51 M=ING_EGRMSKBMAP IS=min IE=4 ITERations=1";tr 51 M=ING_EGRMSKBMAP IS=min IE=4 ITERations=1;echo "done";
    369 #echo "there are 393 more memories to test.";echo "tr 51 M=ING_EN_EFILTER_BITMAP IS=min IE=0 ITERations=1";tr 51 M=ING_EN_EFILTER_BITMAP IS=min IE=0 ITERations=1;echo "done";
    370 echo "there are 392 more memories to test.";echo "tr 51 M=ING_ETAG_PCP_MAPPING IS=min IE=4 ITERations=1";tr 51 M=ING_ETAG_PCP_MAPPING IS=min IE=4 ITERations=1;echo "done";
    371 echo "there are 391 more memories to test.";echo "tr 51 M=ING_HIGIG_TRUNK_OVERRIDE_PROFILE IS=min IE=4 ITERations=1";tr 51 M=ING_HIGIG_TRUNK_OVERRIDE_PROFILE IS=min IE=4 ITERations=1;echo "done";
    372 #echo "there are 390 more memories to test.";echo "tr 51 M=ING_IPV6_MC_RESERVED_ADDRESS IS=min IE=0 ITERations=1";tr 51 M=ING_IPV6_MC_RESERVED_ADDRESS IS=min IE=0 ITERations=1;echo "done";
    373 echo "there are 389 more memories to test.";echo "tr 51 M=ING_L3_NEXT_HOP IS=min IE=4 ITERations=1";tr 51 M=ING_L3_NEXT_HOP IS=min IE=4 ITERations=1;echo "done";
    374 echo "there are 388 more memories to test.";echo "tr 51 M=ING_MOD_MAP_TABLE IS=min IE=4 ITERations=1";tr 51 M=ING_MOD_MAP_TABLE IS=min IE=4 ITERations=1;echo "done";
    375 echo "there are 387 more memories to test.";echo "tr 51 M=ING_MPLS_EXP_MAPPING IS=min IE=4 ITERations=1";tr 51 M=ING_MPLS_EXP_MAPPING IS=min IE=4 ITERations=1;echo "done";
    376 echo "there are 386 more memories to test.";echo "tr 51 M=ING_MPLS_EXP_MAPPING_1 IS=min IE=4 ITERations=1";tr 51 M=ING_MPLS_EXP_MAPPING_1 IS=min IE=4 ITERations=1;echo "done";
    377 echo "there are 385 more memories to test.";echo "tr 51 M=ING_NETWORK_PRUNE_CONTROL IS=min IE=4 ITERations=1";tr 51 M=ING_NETWORK_PRUNE_CONTROL IS=min IE=4 ITERations=1;echo "done";
    378 echo "there are 384 more memories to test.";echo "tr 51 M=ING_OUTER_DOT1P_MAPPING_TABLE IS=min IE=4 ITERations=1";tr 51 M=ING_OUTER_DOT1P_MAPPING_TABLE IS=min IE=4 ITERations=1;echo "done";
    379 echo "there are 383 more memories to test.";echo "tr 51 M=ING_PHYSICAL_TO_LOGICAL_PORT_NUMBER_MAPPING_TABLE IS=min IE=4 ITERations=1";tr 51 M=ING_PHYSICAL_TO_LOGICAL_PORT_NUMBER_MAPPING_TABLE IS=min IE=4 ITERations=1;echo "done";
    380 echo "there are 382 more memories to test.";echo "tr 51 M=ING_PRI_CNG_MAP IS=min IE=4 ITERations=1";tr 51 M=ING_PRI_CNG_MAP IS=min IE=4 ITERations=1;echo "done";
    381 echo "there are 381 more memories to test.";echo "tr 51 M=ING_PW_TERM_SEQ_NUM IS=min IE=4 ITERations=1";tr 51 M=ING_PW_TERM_SEQ_NUM IS=min IE=4 ITERations=1;echo "done";
    382 echo "there are 380 more memories to test.";echo "tr 51 M=ING_ROUTED_INT_PRI_MAPPING IS=min IE=4 ITERations=1";tr 51 M=ING_ROUTED_INT_PRI_MAPPING IS=min IE=4 ITERations=1;echo "done";
    383 #echo "there are 379 more memories to test.";echo "tr 51 M=ING_SER_FIFO IS=min IE=4 ITERations=1";tr 51 M=ING_SER_FIFO IS=min IE=4 ITERations=1;echo "done";
    384 echo "there are 378 more memories to test.";echo "tr 51 M=ING_SNAT IS=min IE=4 ITERations=1";tr 51 M=ING_SNAT IS=min IE=4 ITERations=1;echo "done";
    385 echo "there are 377 more memories to test.";echo "tr 51 M=ING_SNAT_DATA_ONLY IS=min IE=4 ITERations=1";tr 51 M=ING_SNAT_DATA_ONLY IS=min IE=4 ITERations=1;echo "done";
    386 echo "there are 376 more memories to test.";echo "tr 51 M=ING_SNAT_HIT_ONLY IS=min IE=4 ITERations=1";tr 51 M=ING_SNAT_HIT_ONLY IS=min IE=4 ITERations=1;echo "done";
    387 echo "there are 375 more memories to test.";echo "tr 51 M=ING_SNAT_ONLY IS=min IE=4 ITERations=1";tr 51 M=ING_SNAT_ONLY IS=min IE=4 ITERations=1;echo "done";
    388 echo "there are 374 more memories to test.";echo "tr 51 M=ING_UNTAGGED_PHB IS=min IE=4 ITERations=1";tr 51 M=ING_UNTAGGED_PHB IS=min IE=4 ITERations=1;echo "done";
    389 echo "there are 373 more memories to test.";echo "tr 51 M=ING_VLAN_RANGE IS=min IE=4 ITERations=1";tr 51 M=ING_VLAN_RANGE IS=min IE=4 ITERations=1;echo "done";
    390 echo "there are 372 more memories to test.";echo "tr 51 M=ING_VLAN_TAG_ACTION_PROFILE IS=min IE=4 ITERations=1";tr 51 M=ING_VLAN_TAG_ACTION_PROFILE IS=min IE=4 ITERations=1;echo "done";
    391 echo "there are 371 more memories to test.";echo "tr 51 M=ING_VLAN_VFI_MEMBERSHIP IS=min IE=4 ITERations=1";tr 51 M=ING_VLAN_VFI_MEMBERSHIP IS=min IE=4 ITERations=1;echo "done";
    392 echo "there are 370 more memories to test.";echo "tr 51 M=INITIAL_ING_L3_NEXT_HOP IS=min IE=4 ITERations=1";tr 51 M=INITIAL_ING_L3_NEXT_HOP IS=min IE=4 ITERations=1;echo "done";
    393 echo "there are 369 more memories to test.";echo "tr 51 M=INITIAL_L3_ECMP IS=min IE=4 ITERations=1";tr 51 M=INITIAL_L3_ECMP IS=min IE=4 ITERations=1;echo "done";
    394 echo "there are 368 more memories to test.";echo "tr 51 M=INITIAL_L3_ECMP_GROUP IS=min IE=4 ITERations=1";tr 51 M=INITIAL_L3_ECMP_GROUP IS=min IE=4 ITERations=1;echo "done";
    395 echo "there are 367 more memories to test.";echo "tr 51 M=INITIAL_PROT_NHI_DOUBLE_WIDE_TABLE IS=min IE=4 ITERations=1";tr 51 M=INITIAL_PROT_NHI_DOUBLE_WIDE_TABLE IS=min IE=4 ITERations=1;echo "done";
    396 echo "there are 366 more memories to test.";echo "tr 51 M=INITIAL_PROT_NHI_TABLE IS=min IE=4 ITERations=1";tr 51 M=INITIAL_PROT_NHI_TABLE IS=min IE=4 ITERations=1;echo "done";
    397 echo "there are 365 more memories to test.";echo "tr 51 M=INITIAL_PROT_NHI_TABLE_1 IS=min IE=4 ITERations=1";tr 51 M=INITIAL_PROT_NHI_TABLE_1 IS=min IE=4 ITERations=1;echo "done";
    398 echo "there are 364 more memories to test.";echo "tr 51 M=INITIAL_PROT_OFFSET_TABLE IS=min IE=4 ITERations=1";tr 51 M=INITIAL_PROT_OFFSET_TABLE IS=min IE=4 ITERations=1;echo "done";
    399 echo "there are 363 more memories to test.";echo "tr 51 M=IPV4_IN_IPV6_PREFIX_MATCH_TABLE IS=min IE=3 ITERations=1";tr 51 M=IPV4_IN_IPV6_PREFIX_MATCH_TABLE IS=min IE=3 ITERations=1;echo "done";
    400 echo "there are 362 more memories to test.";echo "tr 51 M=IP_MULTICAST_TCAM IS=min IE=4 ITERations=1";tr 51 M=IP_MULTICAST_TCAM IS=min IE=4 ITERations=1;echo "done";
    401 echo "there are 361 more memories to test.";echo "tr 51 M=IP_OPTION_CONTROL_PROFILE_TABLE IS=min IE=4 ITERations=1";tr 51 M=IP_OPTION_CONTROL_PROFILE_TABLE IS=min IE=4 ITERations=1;echo "done";
    402 echo "there are 360 more memories to test.";echo "tr 51 M=ISEC_MIB0 IS=min IE=4 ITERations=1";tr 51 M=ISEC_MIB0 IS=min IE=4 ITERations=1;echo "done";
    403 echo "there are 359 more memories to test.";echo "tr 51 M=ISEC_MIB0_B IS=min IE=4 ITERations=1";tr 51 M=ISEC_MIB0_B IS=min IE=4 ITERations=1;echo "done";
    404 echo "there are 358 more memories to test.";echo "tr 51 M=ISEC_MIB1 IS=min IE=4 ITERations=1";tr 51 M=ISEC_MIB1 IS=min IE=4 ITERations=1;echo "done";
    405 echo "there are 357 more memories to test.";echo "tr 51 M=ISEC_MIB2 IS=min IE=4 ITERations=1";tr 51 M=ISEC_MIB2 IS=min IE=4 ITERations=1;echo "done";
    406 echo "there are 356 more memories to test.";echo "tr 51 M=ISEC_SA_TABLE IS=min IE=4 ITERations=1";tr 51 M=ISEC_SA_TABLE IS=min IE=4 ITERations=1;echo "done";
    407 echo "there are 355 more memories to test.";echo "tr 51 M=ISEC_SC_TABLE IS=min IE=4 ITERations=1";tr 51 M=ISEC_SC_TABLE IS=min IE=4 ITERations=1;echo "done";
    408 #echo "there are 354 more memories to test.";echo "tr 51 M=ISEC_SC_TCAM IS=min IE=4 ITERations=1";tr 51 M=ISEC_SC_TCAM IS=min IE=4 ITERations=1;echo "done";
    409 #echo "there are 353 more memories to test.";echo "tr 51 M=ISEC_SP_TCAM IS=min IE=4 ITERations=1";tr 51 M=ISEC_SP_TCAM IS=min IE=4 ITERations=1;echo "done";
    410 echo "there are 352 more memories to test.";echo "tr 51 M=KNOWN_MCAST_BLOCK_MASK IS=min IE=4 ITERations=1";tr 51 M=KNOWN_MCAST_BLOCK_MASK IS=min IE=4 ITERations=1;echo "done";
    411 echo "there are 351 more memories to test.";echo "tr 51 M=L2MC IS=min IE=4 ITERations=1";tr 51 M=L2MC IS=min IE=4 ITERations=1;echo "done";
    412 #echo "there are 350 more memories to test.";echo "tr 51 M=L2_BULK_MATCH_DATA IS=min IE=0 ITERations=1";tr 51 M=L2_BULK_MATCH_DATA IS=min IE=0 ITERations=1;echo "done";
    413 #echo "there are 349 more memories to test.";echo "tr 51 M=L2_BULK_MATCH_MASK IS=min IE=0 ITERations=1";tr 51 M=L2_BULK_MATCH_MASK IS=min IE=0 ITERations=1;echo "done";
    414 #echo "there are 348 more memories to test.";echo "tr 51 M=L2_BULK_REPLACE_DATA IS=min IE=0 ITERations=1";tr 51 M=L2_BULK_REPLACE_DATA IS=min IE=0 ITERations=1;echo "done";
    415 #echo "there are 347 more memories to test.";echo "tr 51 M=L2_BULK_REPLACE_MASK IS=min IE=0 ITERations=1";tr 51 M=L2_BULK_REPLACE_MASK IS=min IE=0 ITERations=1;echo "done";
    416 echo "there are 346 more memories to test.";echo "tr 51 M=L2X IS=min IE=4 ITERations=1";tr 51 M=L2X IS=min IE=4 ITERations=1;echo "done";
    417 #echo "there are 345 more memories to test.";echo "tr 51 M=L2_ENTRY_LP IS=min IE=4 ITERations=1";tr 51 M=L2_ENTRY_LP IS=min IE=4 ITERations=1;echo "done";
    418 echo "there are 344 more memories to test.";echo "tr 51 M=L2_ENTRY_ONLY IS=min IE=4 ITERations=1";tr 51 M=L2_ENTRY_ONLY IS=min IE=4 ITERations=1;echo "done";
    419 echo "there are 343 more memories to test.";echo "tr 51 M=L2_ENTRY_ONLY_ECC IS=min IE=4 ITERations=1";tr 51 M=L2_ENTRY_ONLY_ECC IS=min IE=4 ITERations=1;echo "done";
    420 echo "there are 342 more memories to test.";echo "tr 51 M=L2_HITDA_ONLY IS=min IE=4 ITERations=1";tr 51 M=L2_HITDA_ONLY IS=min IE=4 ITERations=1;echo "done";
    421 echo "there are 341 more memories to test.";echo "tr 51 M=L2_HITSA_ONLY IS=min IE=4 ITERations=1";tr 51 M=L2_HITSA_ONLY IS=min IE=4 ITERations=1;echo "done";
    422 #echo "there are 340 more memories to test.";echo "tr 51 M=L2_LEARN_INSERT_FAILURE IS=min IE=0 ITERations=1";tr 51 M=L2_LEARN_INSERT_FAILURE IS=min IE=0 ITERations=1;echo "done";
    423 echo "there are 339 more memories to test.";echo "tr 51 M=L2_MOD_FIFO IS=min IE=4 ITERations=1";tr 51 M=L2_MOD_FIFO IS=min IE=4 ITERations=1;echo "done";
    424 echo "there are 338 more memories to test.";echo "tr 51 M=L2_USER_ENTRY IS=min IE=4 ITERations=1";tr 51 M=L2_USER_ENTRY IS=min IE=4 ITERations=1;echo "done";
    425 echo "there are 337 more memories to test.";echo "tr 51 M=L2_USER_ENTRY_DATA_ONLY IS=min IE=4 ITERations=1";tr 51 M=L2_USER_ENTRY_DATA_ONLY IS=min IE=4 ITERations=1;echo "done";
    426 echo "there are 336 more memories to test.";echo "tr 51 M=L2_USER_ENTRY_ONLY IS=min IE=4 ITERations=1";tr 51 M=L2_USER_ENTRY_ONLY IS=min IE=4 ITERations=1;echo "done";
    427 echo "there are 335 more memories to test.";echo "tr 51 M=L3_DEFIP IS=min IE=4 ITERations=1";tr 51 M=L3_DEFIP IS=min IE=4 ITERations=1;echo "done";
    428 echo "there are 334 more memories to test.";echo "tr 51 M=L3_DEFIP_DATA_ONLY IS=min IE=4 ITERations=1";tr 51 M=L3_DEFIP_DATA_ONLY IS=min IE=4 ITERations=1;echo "done";
    429 echo "there are 333 more memories to test.";echo "tr 51 M=L3_DEFIP_HIT_ONLY IS=min IE=4 ITERations=1";tr 51 M=L3_DEFIP_HIT_ONLY IS=min IE=4 ITERations=1;echo "done";
    430 echo "there are 332 more memories to test.";echo "tr 51 M=L3_DEFIP_ONLY IS=min IE=4 ITERations=1";tr 51 M=L3_DEFIP_ONLY IS=min IE=4 ITERations=1;echo "done";
    431 echo "there are 331 more memories to test.";echo "tr 51 M=L3_DEFIP_PAIR_128 IS=min IE=4 ITERations=1";tr 51 M=L3_DEFIP_PAIR_128 IS=min IE=4 ITERations=1;echo "done";
    432 echo "there are 330 more memories to test.";echo "tr 51 M=L3_DEFIP_PAIR_128_DATA_ONLY IS=min IE=4 ITERations=1";tr 51 M=L3_DEFIP_PAIR_128_DATA_ONLY IS=min IE=4 ITERations=1;echo "done";
    433 echo "there are 329 more memories to test.";echo "tr 51 M=L3_DEFIP_PAIR_128_HIT_ONLY IS=min IE=4 ITERations=1";tr 51 M=L3_DEFIP_PAIR_128_HIT_ONLY IS=min IE=4 ITERations=1;echo "done";
    434 echo "there are 328 more memories to test.";echo "tr 51 M=L3_DEFIP_PAIR_128_ONLY IS=min IE=4 ITERations=1";tr 51 M=L3_DEFIP_PAIR_128_ONLY IS=min IE=4 ITERations=1;echo "done";
    435 echo "there are 327 more memories to test.";echo "tr 51 M=L3_ECMP IS=min IE=4 ITERations=1";tr 51 M=L3_ECMP IS=min IE=4 ITERations=1;echo "done";
    436 echo "there are 326 more memories to test.";echo "tr 51 M=L3_ECMP_COUNT IS=min IE=4 ITERations=1";tr 51 M=L3_ECMP_COUNT IS=min IE=4 ITERations=1;echo "done";
    437 echo "there are 325 more memories to test.";echo "tr 51 M=L3_ENTRY_HIT_ONLY IS=min IE=4 ITERations=1";tr 51 M=L3_ENTRY_HIT_ONLY IS=min IE=4 ITERations=1;echo "done";
    438 echo "there are 324 more memories to test.";echo "tr 51 M=L3_ENTRY_IPV4_MULTICAST IS=min IE=4 ITERations=1";tr 51 M=L3_ENTRY_IPV4_MULTICAST IS=min IE=4 ITERations=1;echo "done";
    439 echo "there are 323 more memories to test.";echo "tr 51 M=L3_ENTRY_IPV4_UNICAST IS=min IE=4 ITERations=1";tr 51 M=L3_ENTRY_IPV4_UNICAST IS=min IE=4 ITERations=1;echo "done";
    440 echo "there are 322 more memories to test.";echo "tr 51 M=L3_ENTRY_IPV6_MULTICAST IS=min IE=4 ITERations=1";tr 51 M=L3_ENTRY_IPV6_MULTICAST IS=min IE=4 ITERations=1;echo "done";
    441 echo "there are 321 more memories to test.";echo "tr 51 M=L3_ENTRY_IPV6_UNICAST IS=min IE=4 ITERations=1";tr 51 M=L3_ENTRY_IPV6_UNICAST IS=min IE=4 ITERations=1;echo "done";
    442 #echo "there are 320 more memories to test.";echo "tr 51 M=L3_ENTRY_LP IS=min IE=4 ITERations=1";tr 51 M=L3_ENTRY_LP IS=min IE=4 ITERations=1;echo "done";
    443 echo "there are 319 more memories to test.";echo "tr 51 M=L3_ENTRY_ONLY IS=min IE=4 ITERations=1";tr 51 M=L3_ENTRY_ONLY IS=min IE=4 ITERations=1;echo "done";
    444 echo "there are 318 more memories to test.";echo "tr 51 M=L3_ENTRY_ONLY_ECC IS=min IE=4 ITERations=1";tr 51 M=L3_ENTRY_ONLY_ECC IS=min IE=4 ITERations=1;echo "done";
    445 echo "there are 317 more memories to test.";echo "tr 51 M=L3_IIF IS=min IE=4 ITERations=1";tr 51 M=L3_IIF IS=min IE=4 ITERations=1;echo "done";
    446 echo "there are 316 more memories to test.";echo "tr 51 M=L3_IIF_PROFILE IS=min IE=4 ITERations=1";tr 51 M=L3_IIF_PROFILE IS=min IE=4 ITERations=1;echo "done";
    447 echo "there are 315 more memories to test.";echo "tr 51 M=L3_IPMC IS=min IE=4 ITERations=1";tr 51 M=L3_IPMC IS=min IE=4 ITERations=1;echo "done";
    448 echo "there are 314 more memories to test.";echo "tr 51 M=L3_IPMC_1 IS=min IE=4 ITERations=1";tr 51 M=L3_IPMC_1 IS=min IE=4 ITERations=1;echo "done";
    449 echo "there are 313 more memories to test.";echo "tr 51 M=L3_IPMC_REMAP IS=min IE=4 ITERations=1";tr 51 M=L3_IPMC_REMAP IS=min IE=4 ITERations=1;echo "done";
    450 echo "there are 312 more memories to test.";echo "tr 51 M=L3_MTU_VALUES IS=min IE=4 ITERations=1";tr 51 M=L3_MTU_VALUES IS=min IE=4 ITERations=1;echo "done";
    451 echo "there are 311 more memories to test.";echo "tr 51 M=L3_TUNNEL IS=min IE=4 ITERations=1";tr 51 M=L3_TUNNEL IS=min IE=4 ITERations=1;echo "done";
    452 echo "there are 310 more memories to test.";echo "tr 51 M=L3_TUNNEL_DATA_ONLY IS=min IE=4 ITERations=1";tr 51 M=L3_TUNNEL_DATA_ONLY IS=min IE=4 ITERations=1;echo "done";
    453 echo "there are 309 more memories to test.";echo "tr 51 M=L3_TUNNEL_ONLY IS=min IE=4 ITERations=1";tr 51 M=L3_TUNNEL_ONLY IS=min IE=4 ITERations=1;echo "done";
    454 echo "there are 308 more memories to test.";echo "tr 51 M=LOCAL_SW_DISABLE_DEFAULT_PBM IS=min IE=4 ITERations=1";tr 51 M=LOCAL_SW_DISABLE_DEFAULT_PBM IS=min IE=4 ITERations=1;echo "done";
    455 echo "there are 307 more memories to test.";echo "tr 51 M=LOCAL_SW_DISABLE_DEFAULT_PBM_2 IS=min IE=4 ITERations=1";tr 51 M=LOCAL_SW_DISABLE_DEFAULT_PBM_2 IS=min IE=4 ITERations=1;echo "done";
    456 echo "there are 306 more memories to test.";echo "tr 51 M=LOCAL_SW_DISABLE_DEFAULT_PBM_MIRR IS=min IE=4 ITERations=1";tr 51 M=LOCAL_SW_DISABLE_DEFAULT_PBM_MIRR IS=min IE=4 ITERations=1;echo "done";
    457 echo "there are 305 more memories to test.";echo "tr 51 M=LPORT_TAB IS=min IE=4 ITERations=1";tr 51 M=LPORT_TAB IS=min IE=4 ITERations=1;echo "done";
    458 #echo "there are 304 more memories to test.";echo "tr 51 M=MACSEC_DA_RANGE IS=min IE=0 ITERations=1";tr 51 M=MACSEC_DA_RANGE IS=min IE=0 ITERations=1;echo "done";
    459 echo "there are 303 more memories to test.";echo "tr 51 M=MAC_BLOCK IS=min IE=4 ITERations=1";tr 51 M=MAC_BLOCK IS=min IE=4 ITERations=1;echo "done";
    460 echo "there are 302 more memories to test.";echo "tr 51 M=MIRROR_CONTROL IS=min IE=4 ITERations=1";tr 51 M=MIRROR_CONTROL IS=min IE=4 ITERations=1;echo "done";
    461 echo "there are 301 more memories to test.";echo "tr 51 M=MMU_AGING_CTR IS=min IE=4 ITERations=1";tr 51 M=MMU_AGING_CTR IS=min IE=4 ITERations=1;echo "done";
    462 echo "there are 300 more memories to test.";echo "tr 51 M=MMU_AGING_EXP IS=min IE=4 ITERations=1";tr 51 M=MMU_AGING_EXP IS=min IE=4 ITERations=1;echo "done";
    463 echo "there are 299 more memories to test.";echo "tr 51 M=MMU_AGING_MASK_TBL_PIPE0 IS=min IE=4 ITERations=1";tr 51 M=MMU_AGING_MASK_TBL_PIPE0 IS=min IE=4 ITERations=1;echo "done";
    464 echo "there are 298 more memories to test.";echo "tr 51 M=MMU_CBPData0 IS=min IE=4 ITERations=1";tr 51 M=MMU_CBPData0 IS=min IE=4 ITERations=1;echo "done";
    465 echo "there are 297 more memories to test.";echo "tr 51 M=MMU_CBPData1 IS=min IE=4 ITERations=1";tr 51 M=MMU_CBPData1 IS=min IE=4 ITERations=1;echo "done";
    466 echo "there are 296 more memories to test.";echo "tr 51 M=MMU_CBPData2 IS=min IE=4 ITERations=1";tr 51 M=MMU_CBPData2 IS=min IE=4 ITERations=1;echo "done";
    467 echo "there are 295 more memories to test.";echo "tr 51 M=MMU_CBPData3 IS=min IE=4 ITERations=1";tr 51 M=MMU_CBPData3 IS=min IE=4 ITERations=1;echo "done";
    468 echo "there are 294 more memories to test.";echo "tr 51 M=MMU_CCP0_RESEQ_MEM IS=min IE=4 ITERations=1";tr 51 M=MMU_CCP0_RESEQ_MEM IS=min IE=4 ITERations=1;echo "done";
    469 echo "there are 293 more memories to test.";echo "tr 51 M=MMU_CCP_MEM IS=min IE=4 ITERations=1";tr 51 M=MMU_CCP_MEM IS=min IE=4 ITERations=1;echo "done";
    470 echo "there are 292 more memories to test.";echo "tr 51 M=MMU_CELL_LINK IS=min IE=4 ITERations=1";tr 51 M=MMU_CELL_LINK IS=min IE=4 ITERations=1;echo "done";
    471 echo "there are 291 more memories to test.";echo "tr 51 M=MMU_CFAPI0_BITMAP IS=min IE=4 ITERations=1";tr 51 M=MMU_CFAPI0_BITMAP IS=min IE=4 ITERations=1;echo "done";
    472 echo "there are 290 more memories to test.";echo "tr 51 M=MMU_CFAPI0_STACK IS=min IE=4 ITERations=1";tr 51 M=MMU_CFAPI0_STACK IS=min IE=4 ITERations=1;echo "done";
    473 echo "there are 289 more memories to test.";echo "tr 51 M=MMU_CFAPI1_BITMAP IS=min IE=4 ITERations=1";tr 51 M=MMU_CFAPI1_BITMAP IS=min IE=4 ITERations=1;echo "done";
    474 echo "there are 288 more memories to test.";echo "tr 51 M=MMU_CFAPI1_STACK IS=min IE=4 ITERations=1";tr 51 M=MMU_CFAPI1_STACK IS=min IE=4 ITERations=1;echo "done";
    475 echo "there are 287 more memories to test.";echo "tr 51 M=MMU_CTR_COLOR_DROP_MEM IS=min IE=4 ITERations=1";tr 51 M=MMU_CTR_COLOR_DROP_MEM IS=min IE=4 ITERations=1;echo "done";
    476 echo "there are 286 more memories to test.";echo "tr 51 M=MMU_CTR_ING_DROP_MEM IS=min IE=4 ITERations=1";tr 51 M=MMU_CTR_ING_DROP_MEM IS=min IE=4 ITERations=1;echo "done";
    477 echo "there are 285 more memories to test.";echo "tr 51 M=MMU_CTR_MC_DROP_MEM0 IS=min IE=4 ITERations=1";tr 51 M=MMU_CTR_MC_DROP_MEM0 IS=min IE=4 ITERations=1;echo "done";
    478 echo "there are 284 more memories to test.";echo "tr 51 M=MMU_CTR_MTRI_DROP_MEM IS=min IE=4 ITERations=1";tr 51 M=MMU_CTR_MTRI_DROP_MEM IS=min IE=4 ITERations=1;echo "done";
    479 echo "there are 283 more memories to test.";echo "tr 51 M=MMU_CTR_UC_DROP_MEM IS=min IE=4 ITERations=1";tr 51 M=MMU_CTR_UC_DROP_MEM IS=min IE=4 ITERations=1;echo "done";
    480 echo "there are 282 more memories to test.";echo "tr 51 M=MMU_ENQ_PBI_DB IS=min IE=4 ITERations=1";tr 51 M=MMU_ENQ_PBI_DB IS=min IE=4 ITERations=1;echo "done";
    481 echo "there are 281 more memories to test.";echo "tr 51 M=MMU_EPRG_MEM IS=min IE=4 ITERations=1";tr 51 M=MMU_EPRG_MEM IS=min IE=4 ITERations=1;echo "done";
    482 echo "there are 280 more memories to test.";echo "tr 51 M=MMU_INTFI_BASE_INDEX_TBL IS=min IE=4 ITERations=1";tr 51 M=MMU_INTFI_BASE_INDEX_TBL IS=min IE=4 ITERations=1;echo "done";
    483 echo "there are 279 more memories to test.";echo "tr 51 M=MMU_INTFI_FC_ST_TBL0 IS=min IE=4 ITERations=1";tr 51 M=MMU_INTFI_FC_ST_TBL0 IS=min IE=4 ITERations=1;echo "done";
    484 echo "there are 278 more memories to test.";echo "tr 51 M=MMU_INTFI_FC_ST_TBL1 IS=min IE=4 ITERations=1";tr 51 M=MMU_INTFI_FC_ST_TBL1 IS=min IE=4 ITERations=1;echo "done";
    485 echo "there are 277 more memories to test.";echo "tr 51 M=MMU_INTFI_FC_ST_TBL2 IS=min IE=4 ITERations=1";tr 51 M=MMU_INTFI_FC_ST_TBL2 IS=min IE=4 ITERations=1;echo "done";
    486 echo "there are 276 more memories to test.";echo "tr 51 M=MMU_INTFI_MERGE_ST_TBL IS=min IE=4 ITERations=1";tr 51 M=MMU_INTFI_MERGE_ST_TBL IS=min IE=4 ITERations=1;echo "done";
    487 echo "there are 275 more memories to test.";echo "tr 51 M=MMU_INTFI_OFFSET_MAP_TBL IS=min IE=4 ITERations=1";tr 51 M=MMU_INTFI_OFFSET_MAP_TBL IS=min IE=4 ITERations=1;echo "done";
    488 echo "there are 274 more memories to test.";echo "tr 51 M=MMU_INTFI_PFC_ST_TBL IS=min IE=4 ITERations=1";tr 51 M=MMU_INTFI_PFC_ST_TBL IS=min IE=4 ITERations=1;echo "done";
    489 echo "there are 273 more memories to test.";echo "tr 51 M=MMU_INTFI_PORT_COEFC_TB IS=min IE=4 ITERations=1";tr 51 M=MMU_INTFI_PORT_COEFC_TB IS=min IE=4 ITERations=1;echo "done";
    490 echo "there are 272 more memories to test.";echo "tr 51 M=MMU_INTFI_S1_ST_TB IS=min IE=4 ITERations=1";tr 51 M=MMU_INTFI_S1_ST_TB IS=min IE=4 ITERations=1;echo "done";
    491 echo "there are 271 more memories to test.";echo "tr 51 M=MMU_INTFI_ST_TRANS_TBL IS=min IE=4 ITERations=1";tr 51 M=MMU_INTFI_ST_TRANS_TBL IS=min IE=4 ITERations=1;echo "done";
    492 echo "there are 270 more memories to test.";echo "tr 51 M=MMU_INTFI_XPIPE_FC_MAP_TBL0 IS=min IE=4 ITERations=1";tr 51 M=MMU_INTFI_XPIPE_FC_MAP_TBL0 IS=min IE=4 ITERations=1;echo "done";
    493 echo "there are 269 more memories to test.";echo "tr 51 M=MMU_INTFI_XPIPE_FC_MAP_TBL1 IS=min IE=4 ITERations=1";tr 51 M=MMU_INTFI_XPIPE_FC_MAP_TBL1 IS=min IE=4 ITERations=1;echo "done";
    494 echo "there are 268 more memories to test.";echo "tr 51 M=MMU_INTFI_XPIPE_FC_MAP_TBL2 IS=min IE=4 ITERations=1";tr 51 M=MMU_INTFI_XPIPE_FC_MAP_TBL2 IS=min IE=4 ITERations=1;echo "done";
    495 #echo "there are 267 more memories to test.";echo "tr 51 M=MMU_MAPPER_X_LSB IS=min IE=4 ITERations=1";tr 51 M=MMU_MAPPER_X_LSB IS=min IE=4 ITERations=1;echo "done";
    496 echo "there are 266 more memories to test.";echo "tr 51 M=MMU_MCFP IS=min IE=4 ITERations=1";tr 51 M=MMU_MCFP IS=min IE=4 ITERations=1;echo "done";
    497 echo "there are 265 more memories to test.";echo "tr 51 M=MMU_MCQDB0 IS=min IE=4 ITERations=1";tr 51 M=MMU_MCQDB0 IS=min IE=4 ITERations=1;echo "done";
    498 echo "there are 264 more memories to test.";echo "tr 51 M=MMU_MCQDB1 IS=min IE=4 ITERations=1";tr 51 M=MMU_MCQDB1 IS=min IE=4 ITERations=1;echo "done";
    499 echo "there are 262 more memories to test.";echo "tr 51 M=MMU_MCQE_MAPPER IS=min IE=4 ITERations=1";tr 51 M=MMU_MCQE_MAPPER IS=min IE=4 ITERations=1;echo "done";
    500 echo "there are 261 more memories to test.";echo "tr 51 M=MMU_MCQN IS=min IE=4 ITERations=1";tr 51 M=MMU_MCQN IS=min IE=4 ITERations=1;echo "done";
    501 echo "there are 260 more memories to test.";echo "tr 51 M=MMU_MTRO_BUCKET_L0_MEM IS=min IE=4 ITERations=1";tr 51 M=MMU_MTRO_BUCKET_L0_MEM IS=min IE=4 ITERations=1;echo "done";
    502 echo "there are 259 more memories to test.";echo "tr 51 M=MMU_MTRO_BUCKET_L1_MEM IS=min IE=4 ITERations=1";tr 51 M=MMU_MTRO_BUCKET_L1_MEM IS=min IE=4 ITERations=1;echo "done";
    503 echo "there are 258 more memories to test.";echo "tr 51 M=MMU_MTRO_BUCKET_L2_MEM IS=min IE=4 ITERations=1";tr 51 M=MMU_MTRO_BUCKET_L2_MEM IS=min IE=4 ITERations=1;echo "done";
    504 echo "there are 257 more memories to test.";echo "tr 51 M=MMU_MTRO_EGRMETERINGCONFIG_MEM IS=min IE=4 ITERations=1";tr 51 M=MMU_MTRO_EGRMETERINGCONFIG_MEM IS=min IE=4 ITERations=1;echo "done";
    505 echo "there are 256 more memories to test.";echo "tr 51 M=MMU_MTRO_EGRMETERINGCONFIG_MEM_A IS=min IE=4 ITERations=1";tr 51 M=MMU_MTRO_EGRMETERINGCONFIG_MEM_A IS=min IE=4 ITERations=1;echo "done";
    506 echo "there are 255 more memories to test.";echo "tr 51 M=MMU_MTRO_EGRMETERINGCONFIG_MEM_B IS=min IE=4 ITERations=1";tr 51 M=MMU_MTRO_EGRMETERINGCONFIG_MEM_B IS=min IE=4 ITERations=1;echo "done";
    507 echo "there are 254 more memories to test.";echo "tr 51 M=MMU_MTRO_L0_MEM IS=min IE=4 ITERations=1";tr 51 M=MMU_MTRO_L0_MEM IS=min IE=4 ITERations=1;echo "done";
    508 echo "there are 253 more memories to test.";echo "tr 51 M=MMU_MTRO_L0_MEM_A IS=min IE=4 ITERations=1";tr 51 M=MMU_MTRO_L0_MEM_A IS=min IE=4 ITERations=1;echo "done";
    509 echo "there are 252 more memories to test.";echo "tr 51 M=MMU_MTRO_L0_MEM_B IS=min IE=4 ITERations=1";tr 51 M=MMU_MTRO_L0_MEM_B IS=min IE=4 ITERations=1;echo "done";
    510 echo "there are 251 more memories to test.";echo "tr 51 M=MMU_MTRO_L1_MEM IS=min IE=4 ITERations=1";tr 51 M=MMU_MTRO_L1_MEM IS=min IE=4 ITERations=1;echo "done";
    511 echo "there are 250 more memories to test.";echo "tr 51 M=MMU_MTRO_L1_MEM_A IS=min IE=4 ITERations=1";tr 51 M=MMU_MTRO_L1_MEM_A IS=min IE=4 ITERations=1;echo "done";
    512 echo "there are 249 more memories to test.";echo "tr 51 M=MMU_MTRO_L1_MEM_B IS=min IE=4 ITERations=1";tr 51 M=MMU_MTRO_L1_MEM_B IS=min IE=4 ITERations=1;echo "done";
    513 echo "there are 248 more memories to test.";echo "tr 51 M=MMU_MTRO_L2_MEM IS=min IE=4 ITERations=1";tr 51 M=MMU_MTRO_L2_MEM IS=min IE=4 ITERations=1;echo "done";
    514 echo "there are 247 more memories to test.";echo "tr 51 M=MMU_MTRO_L2_MEM_A IS=min IE=4 ITERations=1";tr 51 M=MMU_MTRO_L2_MEM_A IS=min IE=4 ITERations=1;echo "done";
    515 echo "there are 246 more memories to test.";echo "tr 51 M=MMU_MTRO_L2_MEM_B IS=min IE=4 ITERations=1";tr 51 M=MMU_MTRO_L2_MEM_B IS=min IE=4 ITERations=1;echo "done";
    516 echo "there are 245 more memories to test.";echo "tr 51 M=MMU_PDB0 IS=min IE=4 ITERations=1";tr 51 M=MMU_PDB0 IS=min IE=4 ITERations=1;echo "done";
    517 echo "there are 244 more memories to test.";echo "tr 51 M=MMU_PKTHDR IS=min IE=4 ITERations=1";tr 51 M=MMU_PKTHDR IS=min IE=4 ITERations=1;echo "done";
    518 echo "there are 243 more memories to test.";echo "tr 51 M=MMU_PORTCNT IS=min IE=4 ITERations=1";tr 51 M=MMU_PORTCNT IS=min IE=4 ITERations=1;echo "done";
    519 echo "there are 242 more memories to test.";echo "tr 51 M=MMU_PQE0_MEM IS=min IE=4 ITERations=1";tr 51 M=MMU_PQE0_MEM IS=min IE=4 ITERations=1;echo "done";
    520 echo "there are 241 more memories to test.";echo "tr 51 M=MMU_REPL_GROUP_INFO0 IS=min IE=4 ITERations=1";tr 51 M=MMU_REPL_GROUP_INFO0 IS=min IE=4 ITERations=1;echo "done";
    521 echo "there are 240 more memories to test.";echo "tr 51 M=MMU_REPL_GROUP_INITIAL_COPY_COUNT IS=min IE=4 ITERations=1";tr 51 M=MMU_REPL_GROUP_INITIAL_COPY_COUNT IS=min IE=4 ITERations=1;echo "done";
    522 echo "there are 239 more memories to test.";echo "tr 51 M=MMU_REPL_HEAD_TBL IS=min IE=4 ITERations=1";tr 51 M=MMU_REPL_HEAD_TBL IS=min IE=4 ITERations=1;echo "done";
    523 echo "there are 238 more memories to test.";echo "tr 51 M=MMU_REPL_HEAD_TBL_PIPE0 IS=min IE=4 ITERations=1";tr 51 M=MMU_REPL_HEAD_TBL_PIPE0 IS=min IE=4 ITERations=1;echo "done";
    524 echo "there are 237 more memories to test.";echo "tr 51 M=MMU_REPL_LIST_TBL IS=min IE=4 ITERations=1";tr 51 M=MMU_REPL_LIST_TBL IS=min IE=4 ITERations=1;echo "done";
    525 echo "there are 236 more memories to test.";echo "tr 51 M=MMU_REPL_LIST_TBL_PIPE0 IS=min IE=4 ITERations=1";tr 51 M=MMU_REPL_LIST_TBL_PIPE0 IS=min IE=4 ITERations=1;echo "done";
    526 echo "there are 235 more memories to test.";echo "tr 51 M=MMU_REPL_STATE_TBL_PIPE0 IS=min IE=4 ITERations=1";tr 51 M=MMU_REPL_STATE_TBL_PIPE0 IS=min IE=4 ITERations=1;echo "done";
    527 echo "there are 234 more memories to test.";echo "tr 51 M=MMU_THDM_DB_PORTSP_BST_0 IS=min IE=4 ITERations=1";tr 51 M=MMU_THDM_DB_PORTSP_BST_0 IS=min IE=4 ITERations=1;echo "done";
    528 echo "there are 233 more memories to test.";echo "tr 51 M=MMU_THDM_DB_PORTSP_CONFIG_0 IS=min IE=4 ITERations=1";tr 51 M=MMU_THDM_DB_PORTSP_CONFIG_0 IS=min IE=4 ITERations=1;echo "done";
    529 echo "there are 232 more memories to test.";echo "tr 51 M=MMU_THDM_DB_PORTSP_CONFIG_0A IS=min IE=4 ITERations=1";tr 51 M=MMU_THDM_DB_PORTSP_CONFIG_0A IS=min IE=4 ITERations=1;echo "done";
    530 echo "there are 231 more memories to test.";echo "tr 51 M=MMU_THDM_DB_PORTSP_CONFIG_0B IS=min IE=4 ITERations=1";tr 51 M=MMU_THDM_DB_PORTSP_CONFIG_0B IS=min IE=4 ITERations=1;echo "done";
    531 echo "there are 230 more memories to test.";echo "tr 51 M=MMU_THDM_DB_PORTSP_CONFIG_0C IS=min IE=4 ITERations=1";tr 51 M=MMU_THDM_DB_PORTSP_CONFIG_0C IS=min IE=4 ITERations=1;echo "done";
    532 echo "there are 229 more memories to test.";echo "tr 51 M=MMU_THDM_DB_QUEUE_BST_0 IS=min IE=4 ITERations=1";tr 51 M=MMU_THDM_DB_QUEUE_BST_0 IS=min IE=4 ITERations=1;echo "done";
    533 echo "there are 228 more memories to test.";echo "tr 51 M=MMU_THDM_DB_QUEUE_CONFIG_0 IS=min IE=4 ITERations=1";tr 51 M=MMU_THDM_DB_QUEUE_CONFIG_0 IS=min IE=4 ITERations=1;echo "done";
    534 echo "there are 227 more memories to test.";echo "tr 51 M=MMU_THDM_DB_QUEUE_CONFIG_0A IS=min IE=4 ITERations=1";tr 51 M=MMU_THDM_DB_QUEUE_CONFIG_0A IS=min IE=4 ITERations=1;echo "done";
    535 echo "there are 226 more memories to test.";echo "tr 51 M=MMU_THDM_DB_QUEUE_CONFIG_0B IS=min IE=4 ITERations=1";tr 51 M=MMU_THDM_DB_QUEUE_CONFIG_0B IS=min IE=4 ITERations=1;echo "done";
    536 echo "there are 225 more memories to test.";echo "tr 51 M=MMU_THDM_DB_QUEUE_CONFIG_0C IS=min IE=4 ITERations=1";tr 51 M=MMU_THDM_DB_QUEUE_CONFIG_0C IS=min IE=4 ITERations=1;echo "done";
    537 echo "there are 224 more memories to test.";echo "tr 51 M=MMU_THDM_DB_QUEUE_COUNT_0 IS=min IE=4 ITERations=1";tr 51 M=MMU_THDM_DB_QUEUE_COUNT_0 IS=min IE=4 ITERations=1;echo "done";
    538 echo "there are 223 more memories to test.";echo "tr 51 M=MMU_THDM_DB_QUEUE_OFFSET_0 IS=min IE=4 ITERations=1";tr 51 M=MMU_THDM_DB_QUEUE_OFFSET_0 IS=min IE=4 ITERations=1;echo "done";
    539 echo "there are 222 more memories to test.";echo "tr 51 M=MMU_THDM_DB_QUEUE_OFFSET_0A IS=min IE=4 ITERations=1";tr 51 M=MMU_THDM_DB_QUEUE_OFFSET_0A IS=min IE=4 ITERations=1;echo "done";
    540 echo "there are 221 more memories to test.";echo "tr 51 M=MMU_THDM_DB_QUEUE_OFFSET_0B IS=min IE=4 ITERations=1";tr 51 M=MMU_THDM_DB_QUEUE_OFFSET_0B IS=min IE=4 ITERations=1;echo "done";
    541 echo "there are 220 more memories to test.";echo "tr 51 M=MMU_THDM_DB_QUEUE_OFFSET_0C IS=min IE=4 ITERations=1";tr 51 M=MMU_THDM_DB_QUEUE_OFFSET_0C IS=min IE=4 ITERations=1;echo "done";
    542 echo "there are 219 more memories to test.";echo "tr 51 M=MMU_THDM_DB_QUEUE_RESUME_0 IS=min IE=4 ITERations=1";tr 51 M=MMU_THDM_DB_QUEUE_RESUME_0 IS=min IE=4 ITERations=1;echo "done";
    543 echo "there are 218 more memories to test.";echo "tr 51 M=MMU_THDM_MCQE_PORTSP_BST_0 IS=min IE=4 ITERations=1";tr 51 M=MMU_THDM_MCQE_PORTSP_BST_0 IS=min IE=4 ITERations=1;echo "done";
    544 echo "there are 217 more memories to test.";echo "tr 51 M=MMU_THDM_MCQE_PORTSP_CONFIG_0 IS=min IE=4 ITERations=1";tr 51 M=MMU_THDM_MCQE_PORTSP_CONFIG_0 IS=min IE=4 ITERations=1;echo "done";
    545 echo "there are 216 more memories to test.";echo "tr 51 M=MMU_THDM_MCQE_PORTSP_CONFIG_0A IS=min IE=4 ITERations=1";tr 51 M=MMU_THDM_MCQE_PORTSP_CONFIG_0A IS=min IE=4 ITERations=1;echo "done";
    546 echo "there are 215 more memories to test.";echo "tr 51 M=MMU_THDM_MCQE_PORTSP_CONFIG_0B IS=min IE=4 ITERations=1";tr 51 M=MMU_THDM_MCQE_PORTSP_CONFIG_0B IS=min IE=4 ITERations=1;echo "done";
    547 echo "there are 214 more memories to test.";echo "tr 51 M=MMU_THDM_MCQE_PORTSP_CONFIG_0C IS=min IE=4 ITERations=1";tr 51 M=MMU_THDM_MCQE_PORTSP_CONFIG_0C IS=min IE=4 ITERations=1;echo "done";
    548 echo "there are 213 more memories to test.";echo "tr 51 M=MMU_THDM_MCQE_QUEUE_BST_0 IS=min IE=4 ITERations=1";tr 51 M=MMU_THDM_MCQE_QUEUE_BST_0 IS=min IE=4 ITERations=1;echo "done";
    549 echo "there are 212 more memories to test.";echo "tr 51 M=MMU_THDM_MCQE_QUEUE_CONFIG_0 IS=min IE=4 ITERations=1";tr 51 M=MMU_THDM_MCQE_QUEUE_CONFIG_0 IS=min IE=4 ITERations=1;echo "done";
    550 echo "there are 211 more memories to test.";echo "tr 51 M=MMU_THDM_MCQE_QUEUE_CONFIG_0A IS=min IE=4 ITERations=1";tr 51 M=MMU_THDM_MCQE_QUEUE_CONFIG_0A IS=min IE=4 ITERations=1;echo "done";
    551 echo "there are 210 more memories to test.";echo "tr 51 M=MMU_THDM_MCQE_QUEUE_CONFIG_0B IS=min IE=4 ITERations=1";tr 51 M=MMU_THDM_MCQE_QUEUE_CONFIG_0B IS=min IE=4 ITERations=1;echo "done";
    552 echo "there are 209 more memories to test.";echo "tr 51 M=MMU_THDM_MCQE_QUEUE_CONFIG_0C IS=min IE=4 ITERations=1";tr 51 M=MMU_THDM_MCQE_QUEUE_CONFIG_0C IS=min IE=4 ITERations=1;echo "done";
    553 echo "there are 208 more memories to test.";echo "tr 51 M=MMU_THDM_MCQE_QUEUE_COUNT_0 IS=min IE=4 ITERations=1";tr 51 M=MMU_THDM_MCQE_QUEUE_COUNT_0 IS=min IE=4 ITERations=1;echo "done";
    554 echo "there are 207 more memories to test.";echo "tr 51 M=MMU_THDM_MCQE_QUEUE_OFFSET_0 IS=min IE=4 ITERations=1";tr 51 M=MMU_THDM_MCQE_QUEUE_OFFSET_0 IS=min IE=4 ITERations=1;echo "done";
    555 echo "there are 206 more memories to test.";echo "tr 51 M=MMU_THDM_MCQE_QUEUE_OFFSET_0A IS=min IE=4 ITERations=1";tr 51 M=MMU_THDM_MCQE_QUEUE_OFFSET_0A IS=min IE=4 ITERations=1;echo "done";
    556 echo "there are 205 more memories to test.";echo "tr 51 M=MMU_THDM_MCQE_QUEUE_OFFSET_0B IS=min IE=4 ITERations=1";tr 51 M=MMU_THDM_MCQE_QUEUE_OFFSET_0B IS=min IE=4 ITERations=1;echo "done";
    557 echo "there are 204 more memories to test.";echo "tr 51 M=MMU_THDM_MCQE_QUEUE_OFFSET_0C IS=min IE=4 ITERations=1";tr 51 M=MMU_THDM_MCQE_QUEUE_OFFSET_0C IS=min IE=4 ITERations=1;echo "done";
    558 echo "there are 203 more memories to test.";echo "tr 51 M=MMU_THDM_MCQE_QUEUE_RESUME_0 IS=min IE=4 ITERations=1";tr 51 M=MMU_THDM_MCQE_QUEUE_RESUME_0 IS=min IE=4 ITERations=1;echo "done";
    559 echo "there are 202 more memories to test.";echo "tr 51 M=MMU_THDU_XPIPE_BST_PORT IS=min IE=4 ITERations=1";tr 51 M=MMU_THDU_XPIPE_BST_PORT IS=min IE=4 ITERations=1;echo "done";
    560 echo "there are 201 more memories to test.";echo "tr 51 M=MMU_THDU_XPIPE_BST_QGROUP IS=min IE=4 ITERations=1";tr 51 M=MMU_THDU_XPIPE_BST_QGROUP IS=min IE=4 ITERations=1;echo "done";
    561 echo "there are 200 more memories to test.";echo "tr 51 M=MMU_THDU_XPIPE_BST_QUEUE IS=min IE=4 ITERations=1";tr 51 M=MMU_THDU_XPIPE_BST_QUEUE IS=min IE=4 ITERations=1;echo "done";
    562 echo "there are 199 more memories to test.";echo "tr 51 M=MMU_THDU_XPIPE_CONFIG_PORT IS=min IE=4 ITERations=1";tr 51 M=MMU_THDU_XPIPE_CONFIG_PORT IS=min IE=4 ITERations=1;echo "done";
    563 echo "there are 198 more memories to test.";echo "tr 51 M=MMU_THDU_XPIPE_CONFIG_QGROUP IS=min IE=4 ITERations=1";tr 51 M=MMU_THDU_XPIPE_CONFIG_QGROUP IS=min IE=4 ITERations=1;echo "done";
    564 echo "there are 197 more memories to test.";echo "tr 51 M=MMU_THDU_XPIPE_CONFIG_QUEUE IS=min IE=4 ITERations=1";tr 51 M=MMU_THDU_XPIPE_CONFIG_QUEUE IS=min IE=4 ITERations=1;echo "done";
    565 echo "there are 196 more memories to test.";echo "tr 51 M=MMU_THDU_XPIPE_COUNTER_PORT IS=min IE=4 ITERations=1";tr 51 M=MMU_THDU_XPIPE_COUNTER_PORT IS=min IE=4 ITERations=1;echo "done";
    566 echo "there are 195 more memories to test.";echo "tr 51 M=MMU_THDU_XPIPE_COUNTER_QGROUP IS=min IE=4 ITERations=1";tr 51 M=MMU_THDU_XPIPE_COUNTER_QGROUP IS=min IE=4 ITERations=1;echo "done";
    567 echo "there are 194 more memories to test.";echo "tr 51 M=MMU_THDU_XPIPE_COUNTER_QUEUE IS=min IE=4 ITERations=1";tr 51 M=MMU_THDU_XPIPE_COUNTER_QUEUE IS=min IE=4 ITERations=1;echo "done";
    568 echo "there are 193 more memories to test.";echo "tr 51 M=MMU_THDU_XPIPE_OFFSET_QGROUP IS=min IE=4 ITERations=1";tr 51 M=MMU_THDU_XPIPE_OFFSET_QGROUP IS=min IE=4 ITERations=1;echo "done";
    569 echo "there are 192 more memories to test.";echo "tr 51 M=MMU_THDU_XPIPE_OFFSET_QUEUE IS=min IE=4 ITERations=1";tr 51 M=MMU_THDU_XPIPE_OFFSET_QUEUE IS=min IE=4 ITERations=1;echo "done";
    570 echo "there are 191 more memories to test.";echo "tr 51 M=MMU_THDU_QGROUP_TICKET IS=min IE=4 ITERations=1";tr 51 M=MMU_THDU_QGROUP_TICKET IS=min IE=4 ITERations=1;echo "done";
    571 echo "there are 190 more memories to test.";echo "tr 51 M=MMU_THDU_QUEUE_TICKET IS=min IE=4 ITERations=1";tr 51 M=MMU_THDU_QUEUE_TICKET IS=min IE=4 ITERations=1;echo "done";
    572 echo "there are 189 more memories to test.";echo "tr 51 M=MMU_THDU_XPIPE_Q_TO_QGRP_MAP IS=min IE=4 ITERations=1";tr 51 M=MMU_THDU_XPIPE_Q_TO_QGRP_MAP IS=min IE=4 ITERations=1;echo "done";
    573 echo "there are 188 more memories to test.";echo "tr 51 M=MMU_THDU_XPIPE_RESUME_PORT IS=min IE=4 ITERations=1";tr 51 M=MMU_THDU_XPIPE_RESUME_PORT IS=min IE=4 ITERations=1;echo "done";
    574 echo "there are 187 more memories to test.";echo "tr 51 M=MMU_THDU_XPIPE_RESUME_QGROUP IS=min IE=4 ITERations=1";tr 51 M=MMU_THDU_XPIPE_RESUME_QGROUP IS=min IE=4 ITERations=1;echo "done";
    575 echo "there are 186 more memories to test.";echo "tr 51 M=MMU_THDU_XPIPE_RESUME_QUEUE IS=min IE=4 ITERations=1";tr 51 M=MMU_THDU_XPIPE_RESUME_QUEUE IS=min IE=4 ITERations=1;echo "done";
    576 echo "there are 185 more memories to test.";echo "tr 51 M=MMU_UCQDB0 IS=min IE=4 ITERations=1";tr 51 M=MMU_UCQDB0 IS=min IE=4 ITERations=1;echo "done";
    577 echo "there are 184 more memories to test.";echo "tr 51 M=MMU_WRED_AVG_QSIZE_X_PIPE IS=min IE=4 ITERations=1";tr 51 M=MMU_WRED_AVG_QSIZE_X_PIPE IS=min IE=4 ITERations=1;echo "done";
    578 echo "there are 183 more memories to test.";echo "tr 51 M=MMU_WRED_CONFIG_X_PIPE IS=min IE=4 ITERations=1";tr 51 M=MMU_WRED_CONFIG_X_PIPE IS=min IE=4 ITERations=1;echo "done";
    579 echo "there are 182 more memories to test.";echo "tr 51 M=MMU_WRED_DROP_CURVE_PROFILE_0_X_PIPE IS=min IE=4 ITERations=1";tr 51 M=MMU_WRED_DROP_CURVE_PROFILE_0_X_PIPE IS=min IE=4 ITERations=1;echo "done";
    580 echo "there are 181 more memories to test.";echo "tr 51 M=MMU_WRED_PORT_SP_DROP_THD_X_PIPE IS=min IE=4 ITERations=1";tr 51 M=MMU_WRED_PORT_SP_DROP_THD_X_PIPE IS=min IE=4 ITERations=1;echo "done";
    581 echo "there are 180 more memories to test.";echo "tr 51 M=MMU_WRED_PORT_SP_SHARED_COUNT_X_PIPE IS=min IE=4 ITERations=1";tr 51 M=MMU_WRED_PORT_SP_SHARED_COUNT_X_PIPE IS=min IE=4 ITERations=1;echo "done";
    582 echo "there are 179 more memories to test.";echo "tr 51 M=MMU_WRED_QGROUP_DROP_THD_X_PIPE IS=min IE=4 ITERations=1";tr 51 M=MMU_WRED_QGROUP_DROP_THD_X_PIPE IS=min IE=4 ITERations=1;echo "done";
    583 echo "there are 178 more memories to test.";echo "tr 51 M=MMU_WRED_QGROUP_SHARED_COUNT_X_PIPE IS=min IE=4 ITERations=1";tr 51 M=MMU_WRED_QGROUP_SHARED_COUNT_X_PIPE IS=min IE=4 ITERations=1;echo "done";
    584 echo "there are 177 more memories to test.";echo "tr 51 M=MMU_WRED_UC_QUEUE_DROP_THD_DEQ_X_PIPE_0 IS=min IE=4 ITERations=1";tr 51 M=MMU_WRED_UC_QUEUE_DROP_THD_DEQ_X_PIPE_0 IS=min IE=4 ITERations=1;echo "done";
    585 echo "there are 176 more memories to test.";echo "tr 51 M=MMU_WRED_UC_QUEUE_DROP_THD_ENQ_X_PIPE_0 IS=min IE=4 ITERations=1";tr 51 M=MMU_WRED_UC_QUEUE_DROP_THD_ENQ_X_PIPE_0 IS=min IE=4 ITERations=1;echo "done";
    586 echo "there are 175 more memories to test.";echo "tr 51 M=MMU_WRED_UC_QUEUE_TOTAL_COUNT_X_PIPE IS=min IE=4 ITERations=1";tr 51 M=MMU_WRED_UC_QUEUE_TOTAL_COUNT_X_PIPE IS=min IE=4 ITERations=1;echo "done";
    587 echo "there are 174 more memories to test.";echo "tr 51 M=MODID_BASE_PTR IS=min IE=4 ITERations=1";tr 51 M=MODID_BASE_PTR IS=min IE=4 ITERations=1;echo "done";
    588 echo "there are 173 more memories to test.";echo "tr 51 M=MODPORT_MAP_M0 IS=min IE=4 ITERations=1";tr 51 M=MODPORT_MAP_M0 IS=min IE=4 ITERations=1;echo "done";
    589 echo "there are 172 more memories to test.";echo "tr 51 M=MODPORT_MAP_M1 IS=min IE=4 ITERations=1";tr 51 M=MODPORT_MAP_M1 IS=min IE=4 ITERations=1;echo "done";
    590 echo "there are 171 more memories to test.";echo "tr 51 M=MODPORT_MAP_M2 IS=min IE=4 ITERations=1";tr 51 M=MODPORT_MAP_M2 IS=min IE=4 ITERations=1;echo "done";
    591 echo "there are 170 more memories to test.";echo "tr 51 M=MODPORT_MAP_M3 IS=min IE=4 ITERations=1";tr 51 M=MODPORT_MAP_M3 IS=min IE=4 ITERations=1;echo "done";
    592 echo "there are 169 more memories to test.";echo "tr 51 M=MODPORT_MAP_MIRROR IS=min IE=4 ITERations=1";tr 51 M=MODPORT_MAP_MIRROR IS=min IE=4 ITERations=1;echo "done";
    593 echo "there are 168 more memories to test.";echo "tr 51 M=MODPORT_MAP_SUBPORT IS=min IE=4 ITERations=1";tr 51 M=MODPORT_MAP_SUBPORT IS=min IE=4 ITERations=1;echo "done";
    594 echo "there are 167 more memories to test.";echo "tr 51 M=MODPORT_MAP_SUBPORT_M0 IS=min IE=4 ITERations=1";tr 51 M=MODPORT_MAP_SUBPORT_M0 IS=min IE=4 ITERations=1;echo "done";
    595 echo "there are 166 more memories to test.";echo "tr 51 M=MODPORT_MAP_SUBPORT_M1 IS=min IE=4 ITERations=1";tr 51 M=MODPORT_MAP_SUBPORT_M1 IS=min IE=4 ITERations=1;echo "done";
    596 echo "there are 165 more memories to test.";echo "tr 51 M=MODPORT_MAP_SUBPORT_M2 IS=min IE=4 ITERations=1";tr 51 M=MODPORT_MAP_SUBPORT_M2 IS=min IE=4 ITERations=1;echo "done";
    597 echo "there are 164 more memories to test.";echo "tr 51 M=MODPORT_MAP_SUBPORT_M3 IS=min IE=4 ITERations=1";tr 51 M=MODPORT_MAP_SUBPORT_M3 IS=min IE=4 ITERations=1;echo "done";
    598 echo "there are 163 more memories to test.";echo "tr 51 M=MODPORT_MAP_SUBPORT_MIRROR IS=min IE=4 ITERations=1";tr 51 M=MODPORT_MAP_SUBPORT_MIRROR IS=min IE=4 ITERations=1;echo "done";
    599 echo "there are 162 more memories to test.";echo "tr 51 M=MODPORT_MAP_SW IS=min IE=4 ITERations=1";tr 51 M=MODPORT_MAP_SW IS=min IE=4 ITERations=1;echo "done";
    600 #echo "there are 161 more memories to test.";echo "tr 51 M=MPLS_ENTROPY_LABEL_DATA IS=min IE=0 ITERations=1";tr 51 M=MPLS_ENTROPY_LABEL_DATA IS=min IE=0 ITERations=1;echo "done";
    601 echo "there are 160 more memories to test.";echo "tr 51 M=MPLS_ENTRY IS=min IE=4 ITERations=1";tr 51 M=MPLS_ENTRY IS=min IE=4 ITERations=1;echo "done";
    602 #echo "there are 159 more memories to test.";echo "tr 51 M=MULTIPASS_LOOPBACK_BITMAP IS=min IE=0 ITERations=1";tr 51 M=MULTIPASS_LOOPBACK_BITMAP IS=min IE=0 ITERations=1;echo "done";
    603 echo "there are 158 more memories to test.";echo "tr 51 M=MY_STATION_TCAM IS=min IE=4 ITERations=1";tr 51 M=MY_STATION_TCAM IS=min IE=4 ITERations=1;echo "done";
    604 echo "there are 157 more memories to test.";echo "tr 51 M=MY_STATION_TCAM_2 IS=min IE=4 ITERations=1";tr 51 M=MY_STATION_TCAM_2 IS=min IE=4 ITERations=1;echo "done";
    605 echo "there are 156 more memories to test.";echo "tr 51 M=MY_STATION_TCAM_2_DATA_ONLY IS=min IE=4 ITERations=1";tr 51 M=MY_STATION_TCAM_2_DATA_ONLY IS=min IE=4 ITERations=1;echo "done";
    606 echo "there are 155 more memories to test.";echo "tr 51 M=MY_STATION_TCAM_2_ENTRY_ONLY IS=min IE=4 ITERations=1";tr 51 M=MY_STATION_TCAM_2_ENTRY_ONLY IS=min IE=4 ITERations=1;echo "done";
    607 echo "there are 154 more memories to test.";echo "tr 51 M=MY_STATION_TCAM_DATA_ONLY IS=min IE=4 ITERations=1";tr 51 M=MY_STATION_TCAM_DATA_ONLY IS=min IE=4 ITERations=1;echo "done";
    608 echo "there are 153 more memories to test.";echo "tr 51 M=MY_STATION_TCAM_ENTRY_ONLY IS=min IE=4 ITERations=1";tr 51 M=MY_STATION_TCAM_ENTRY_ONLY IS=min IE=4 ITERations=1;echo "done";
    609 echo "there are 152 more memories to test.";echo "tr 51 M=NONUCAST_TRUNK_BLOCK_MASK IS=min IE=4 ITERations=1";tr 51 M=NONUCAST_TRUNK_BLOCK_MASK IS=min IE=4 ITERations=1;echo "done";
    610 echo "there are 151 more memories to test.";echo "tr 51 M=OAM_FLEX_COUNTER_OFFSET IS=min IE=4 ITERations=1";tr 51 M=OAM_FLEX_COUNTER_OFFSET IS=min IE=4 ITERations=1;echo "done";
    611 echo "there are 150 more memories to test.";echo "tr 51 M=OP_UC_QGROUP_DROP_STATE IS=min IE=4 ITERations=1";tr 51 M=OP_UC_QGROUP_DROP_STATE IS=min IE=4 ITERations=1;echo "done";
    612 echo "there are 149 more memories to test.";echo "tr 51 M=OP_UC_QGROUP_MINOK IS=min IE=4 ITERations=1";tr 51 M=OP_UC_QGROUP_MINOK IS=min IE=4 ITERations=1;echo "done";
    613 echo "there are 148 more memories to test.";echo "tr 51 M=OP_UC_QUEUE_DROP_STATE IS=min IE=4 ITERations=1";tr 51 M=OP_UC_QUEUE_DROP_STATE IS=min IE=4 ITERations=1;echo "done";
    614 echo "there are 147 more memories to test.";echo "tr 51 M=OP_UC_QUEUE_MINOK IS=min IE=4 ITERations=1";tr 51 M=OP_UC_QUEUE_MINOK IS=min IE=4 ITERations=1;echo "done";
    615 echo "there are 146 more memories to test.";echo "tr 51 M=PFS_PACKET_TYPE_OFFSET IS=min IE=4 ITERations=1";tr 51 M=PFS_PACKET_TYPE_OFFSET IS=min IE=4 ITERations=1;echo "done";
    616 echo "there are 145 more memories to test.";echo "tr 51 M=PHB2_COS_MAP IS=min IE=4 ITERations=1";tr 51 M=PHB2_COS_MAP IS=min IE=4 ITERations=1;echo "done";
    617 #echo "there are 144 more memories to test.";echo "tr 51 M=PORT_BRIDGE_BMAP IS=min IE=0 ITERations=1";tr 51 M=PORT_BRIDGE_BMAP IS=min IE=0 ITERations=1;echo "done";
    618 #echo "there are 143 more memories to test.";echo "tr 51 M=PORT_BRIDGE_MIRROR_BMAP IS=min IE=0 ITERations=1";tr 51 M=PORT_BRIDGE_MIRROR_BMAP IS=min IE=0 ITERations=1;echo "done";
    619 echo "there are 142 more memories to test.";echo "tr 51 M=PORT_CBL_TABLE IS=min IE=4 ITERations=1";tr 51 M=PORT_CBL_TABLE IS=min IE=4 ITERations=1;echo "done";
    620 echo "there are 141 more memories to test.";echo "tr 51 M=PORT_CBL_TABLE_MODBASE IS=min IE=4 ITERations=1";tr 51 M=PORT_CBL_TABLE_MODBASE IS=min IE=4 ITERations=1;echo "done";
    621 echo "there are 140 more memories to test.";echo "tr 51 M=PORT_LAG_FAILOVER_SET IS=min IE=4 ITERations=1";tr 51 M=PORT_LAG_FAILOVER_SET IS=min IE=4 ITERations=1;echo "done";
    622 echo "there are 139 more memories to test.";echo "tr 51 M=PORT_TAB IS=min IE=4 ITERations=1";tr 51 M=PORT_TAB IS=min IE=4 ITERations=1;echo "done";
    623 echo "there are 138 more memories to test.";echo "tr 51 M=PTP_LABEL_RANGE_PROFILE_TABLE IS=min IE=4 ITERations=1";tr 51 M=PTP_LABEL_RANGE_PROFILE_TABLE IS=min IE=4 ITERations=1;echo "done";
    624 echo "there are 137 more memories to test.";echo "tr 51 M=REPLICATION_FIFO_BANK0 IS=min IE=4 ITERations=1";tr 51 M=REPLICATION_FIFO_BANK0 IS=min IE=4 ITERations=1;echo "done";
    625 echo "there are 136 more memories to test.";echo "tr 51 M=REPLICATION_FIFO_BANK1 IS=min IE=4 ITERations=1";tr 51 M=REPLICATION_FIFO_BANK1 IS=min IE=4 ITERations=1;echo "done";
    626 #echo "there are 135 more memories to test.";echo "tr 51 M=RH_ECMP_DROPS IS=min IE=0 ITERations=1";tr 51 M=RH_ECMP_DROPS IS=min IE=0 ITERations=1;echo "done";
    627 echo "there are 134 more memories to test.";echo "tr 51 M=RH_ECMP_ETHERTYPE_ELIGIBILITY_MAP IS=min IE=4 ITERations=1";tr 51 M=RH_ECMP_ETHERTYPE_ELIGIBILITY_MAP IS=min IE=4 ITERations=1;echo "done";
    628 echo "there are 133 more memories to test.";echo "tr 51 M=RH_ECMP_FLOWSET IS=min IE=4 ITERations=1";tr 51 M=RH_ECMP_FLOWSET IS=min IE=4 ITERations=1;echo "done";
    629 echo "there are 132 more memories to test.";echo "tr 51 M=RH_HGT_DROPS IS=min IE=4 ITERations=1";tr 51 M=RH_HGT_DROPS IS=min IE=4 ITERations=1;echo "done";
    630 echo "there are 131 more memories to test.";echo "tr 51 M=RH_HGT_ETHERTYPE_ELIGIBILITY_MAP IS=min IE=4 ITERations=1";tr 51 M=RH_HGT_ETHERTYPE_ELIGIBILITY_MAP IS=min IE=4 ITERations=1;echo "done";
    631 echo "there are 130 more memories to test.";echo "tr 51 M=RH_HGT_FLOWSET IS=min IE=4 ITERations=1";tr 51 M=RH_HGT_FLOWSET IS=min IE=4 ITERations=1;echo "done";
    632 echo "there are 129 more memories to test.";echo "tr 51 M=RH_HGT_GROUP_CONTROL IS=min IE=4 ITERations=1";tr 51 M=RH_HGT_GROUP_CONTROL IS=min IE=4 ITERations=1;echo "done";
    633 #echo "there are 128 more memories to test.";echo "tr 51 M=RH_LAG_DROPS IS=min IE=0 ITERations=1";tr 51 M=RH_LAG_DROPS IS=min IE=0 ITERations=1;echo "done";
    634 echo "there are 127 more memories to test.";echo "tr 51 M=RH_LAG_ETHERTYPE_ELIGIBILITY_MAP IS=min IE=4 ITERations=1";tr 51 M=RH_LAG_ETHERTYPE_ELIGIBILITY_MAP IS=min IE=4 ITERations=1;echo "done";
    635 echo "there are 126 more memories to test.";echo "tr 51 M=RH_LAG_FLOWSET IS=min IE=4 ITERations=1";tr 51 M=RH_LAG_FLOWSET IS=min IE=4 ITERations=1;echo "done";
    636 echo "there are 125 more memories to test.";echo "tr 51 M=RQE_FREE_LIST IS=min IE=4 ITERations=1";tr 51 M=RQE_FREE_LIST IS=min IE=4 ITERations=1;echo "done";
    637 echo "there are 124 more memories to test.";echo "tr 51 M=RQE_LINK_LIST IS=min IE=4 ITERations=1";tr 51 M=RQE_LINK_LIST IS=min IE=4 ITERations=1;echo "done";
    638 echo "there are 123 more memories to test.";echo "tr 51 M=RTAG7_FLOW_BASED_HASH IS=min IE=4 ITERations=1";tr 51 M=RTAG7_FLOW_BASED_HASH IS=min IE=4 ITERations=1;echo "done";
    639 echo "there are 122 more memories to test.";echo "tr 51 M=RTAG7_PORT_BASED_HASH IS=min IE=4 ITERations=1";tr 51 M=RTAG7_PORT_BASED_HASH IS=min IE=4 ITERations=1;echo "done";
    640 echo "there are 121 more memories to test.";echo "tr 51 M=RX_PROT_GROUP_TABLE IS=min IE=4 ITERations=1";tr 51 M=RX_PROT_GROUP_TABLE IS=min IE=4 ITERations=1;echo "done";
    641 echo "there are 120 more memories to test.";echo "tr 51 M=RX_PROT_GROUP_TABLE_1 IS=min IE=4 ITERations=1";tr 51 M=RX_PROT_GROUP_TABLE_1 IS=min IE=4 ITERations=1;echo "done";
    642 echo "there are 119 more memories to test.";echo "tr 51 M=SER_ACC_TYPE_MAP IS=min IE=4 ITERations=1";tr 51 M=SER_ACC_TYPE_MAP IS=min IE=4 ITERations=1;echo "done";
    643 echo "there are 118 more memories to test.";echo "tr 51 M=SER_MEMORY IS=min IE=4 ITERations=1";tr 51 M=SER_MEMORY IS=min IE=4 ITERations=1;echo "done";
    644 #echo "there are 117 more memories to test.";echo "tr 51 M=SER_RESULT_0 IS=min IE=0 ITERations=1";tr 51 M=SER_RESULT_0 IS=min IE=0 ITERations=1;echo "done";
    645 #echo "there are 116 more memories to test.";echo "tr 51 M=SER_RESULT_1 IS=min IE=0 ITERations=1";tr 51 M=SER_RESULT_1 IS=min IE=0 ITERations=1;echo "done";
    646 #echo "there are 115 more memories to test.";echo "tr 51 M=SER_RESULT_DATA_0 IS=min IE=0 ITERations=1";tr 51 M=SER_RESULT_DATA_0 IS=min IE=0 ITERations=1;echo "done";
    647 #echo "there are 114 more memories to test.";echo "tr 51 M=SER_RESULT_DATA_1 IS=min IE=0 ITERations=1";tr 51 M=SER_RESULT_DATA_1 IS=min IE=0 ITERations=1;echo "done";
    648 #echo "there are 113 more memories to test.";echo "tr 51 M=SER_RESULT_EXPECTED_0 IS=min IE=0 ITERations=1";tr 51 M=SER_RESULT_EXPECTED_0 IS=min IE=0 ITERations=1;echo "done";
    649 #echo "there are 112 more memories to test.";echo "tr 51 M=SER_RESULT_EXPECTED_1 IS=min IE=0 ITERations=1";tr 51 M=SER_RESULT_EXPECTED_1 IS=min IE=0 ITERations=1;echo "done";
    650 echo "there are 111 more memories to test.";echo "tr 51 M=SOURCE_MOD_PROXY_TABLE IS=min IE=4 ITERations=1";tr 51 M=SOURCE_MOD_PROXY_TABLE IS=min IE=4 ITERations=1;echo "done";
    651 echo "there are 110 more memories to test.";echo "tr 51 M=SOURCE_TRUNK_MAP_TABLE IS=min IE=4 ITERations=1";tr 51 M=SOURCE_TRUNK_MAP_TABLE IS=min IE=4 ITERations=1;echo "done";
    652 echo "there are 109 more memories to test.";echo "tr 51 M=SOURCE_TRUNK_MAP_MODBASE IS=min IE=4 ITERations=1";tr 51 M=SOURCE_TRUNK_MAP_MODBASE IS=min IE=4 ITERations=1;echo "done";
    653 echo "there are 108 more memories to test.";echo "tr 51 M=SOURCE_VP IS=min IE=4 ITERations=1";tr 51 M=SOURCE_VP IS=min IE=4 ITERations=1;echo "done";
    654 echo "there are 107 more memories to test.";echo "tr 51 M=SOURCE_VP_2 IS=min IE=4 ITERations=1";tr 51 M=SOURCE_VP_2 IS=min IE=4 ITERations=1;echo "done";
    655 echo "there are 106 more memories to test.";echo "tr 51 M=SRC_MODID_EGRESS IS=min IE=4 ITERations=1";tr 51 M=SRC_MODID_EGRESS IS=min IE=4 ITERations=1;echo "done";
    656 echo "there are 105 more memories to test.";echo "tr 51 M=SRC_MODID_INGRESS_BLOCK IS=min IE=4 ITERations=1";tr 51 M=SRC_MODID_INGRESS_BLOCK IS=min IE=4 ITERations=1;echo "done";
    657 echo "there are 104 more memories to test.";echo "tr 51 M=SUB_PORT_DATA IS=min IE=4 ITERations=1";tr 51 M=SUB_PORT_DATA IS=min IE=4 ITERations=1;echo "done";
    658 echo "there are 103 more memories to test.";echo "tr 51 M=SUB_PORT_POLICY_TABLE IS=min IE=4 ITERations=1";tr 51 M=SUB_PORT_POLICY_TABLE IS=min IE=4 ITERations=1;echo "done";
    659 echo "there are 102 more memories to test.";echo "tr 51 M=SYSTEM_CONFIG_TABLE IS=min IE=4 ITERations=1";tr 51 M=SYSTEM_CONFIG_TABLE IS=min IE=4 ITERations=1;echo "done";
    660 echo "there are 101 more memories to test.";echo "tr 51 M=SYSTEM_CONFIG_TABLE_MODBASE IS=min IE=4 ITERations=1";tr 51 M=SYSTEM_CONFIG_TABLE_MODBASE IS=min IE=4 ITERations=1;echo "done";
    661 echo "there are 100 more memories to test.";echo "tr 51 M=TCP_FN IS=min IE=4 ITERations=1";tr 51 M=TCP_FN IS=min IE=4 ITERations=1;echo "done";
    662 echo "there are 99 more memories to test.";echo "tr 51 M=THDI_PORT_PG_BST_X IS=min IE=4 ITERations=1";tr 51 M=THDI_PORT_PG_BST_X IS=min IE=4 ITERations=1;echo "done";
    663 echo "there are 98 more memories to test.";echo "tr 51 M=THDI_PORT_PG_CNTRS_RT1_X IS=min IE=4 ITERations=1";tr 51 M=THDI_PORT_PG_CNTRS_RT1_X IS=min IE=4 ITERations=1;echo "done";
    664 echo "there are 97 more memories to test.";echo "tr 51 M=THDI_PORT_PG_CNTRS_RT2_X IS=min IE=4 ITERations=1";tr 51 M=THDI_PORT_PG_CNTRS_RT2_X IS=min IE=4 ITERations=1;echo "done";
    665 echo "there are 96 more memories to test.";echo "tr 51 M=THDI_PORT_PG_CNTRS_SH1_X IS=min IE=4 ITERations=1";tr 51 M=THDI_PORT_PG_CNTRS_SH1_X IS=min IE=4 ITERations=1;echo "done";
    666 echo "there are 95 more memories to test.";echo "tr 51 M=THDI_PORT_PG_CNTRS_SH2_X IS=min IE=4 ITERations=1";tr 51 M=THDI_PORT_PG_CNTRS_SH2_X IS=min IE=4 ITERations=1;echo "done";
    667 echo "there are 94 more memories to test.";echo "tr 51 M=THDI_PORT_PG_CONFIG_X IS=min IE=4 ITERations=1";tr 51 M=THDI_PORT_PG_CONFIG_X IS=min IE=4 ITERations=1;echo "done";
    668 echo "there are 93 more memories to test.";echo "tr 51 M=THDI_PORT_SP_BST_X IS=min IE=4 ITERations=1";tr 51 M=THDI_PORT_SP_BST_X IS=min IE=4 ITERations=1;echo "done";
    669 echo "there are 92 more memories to test.";echo "tr 51 M=THDI_PORT_SP_CNTRS_RT_X IS=min IE=4 ITERations=1";tr 51 M=THDI_PORT_SP_CNTRS_RT_X IS=min IE=4 ITERations=1;echo "done";
    670 echo "there are 91 more memories to test.";echo "tr 51 M=THDI_PORT_SP_CNTRS_SH_X IS=min IE=4 ITERations=1";tr 51 M=THDI_PORT_SP_CNTRS_SH_X IS=min IE=4 ITERations=1;echo "done";
    671 echo "there are 90 more memories to test.";echo "tr 51 M=THDI_PORT_SP_CONFIG0_X IS=min IE=4 ITERations=1";tr 51 M=THDI_PORT_SP_CONFIG0_X IS=min IE=4 ITERations=1;echo "done";
    672 echo "there are 89 more memories to test.";echo "tr 51 M=THDI_PORT_SP_CONFIG1_X IS=min IE=4 ITERations=1";tr 51 M=THDI_PORT_SP_CONFIG1_X IS=min IE=4 ITERations=1;echo "done";
    673 echo "there are 88 more memories to test.";echo "tr 51 M=THDI_PORT_SP_CONFIG_X IS=min IE=4 ITERations=1";tr 51 M=THDI_PORT_SP_CONFIG_X IS=min IE=4 ITERations=1;echo "done";
    674 echo "there are 87 more memories to test.";echo "tr 51 M=TOS_FN IS=min IE=4 ITERations=1";tr 51 M=TOS_FN IS=min IE=4 ITERations=1;echo "done";
    675 echo "there are 86 more memories to test.";echo "tr 51 M=TRUNK_BITMAP IS=min IE=4 ITERations=1";tr 51 M=TRUNK_BITMAP IS=min IE=4 ITERations=1;echo "done";
    676 echo "there are 85 more memories to test.";echo "tr 51 M=TRUNK_CBL_TABLE IS=min IE=4 ITERations=1";tr 51 M=TRUNK_CBL_TABLE IS=min IE=4 ITERations=1;echo "done";
    677 echo "there are 84 more memories to test.";echo "tr 51 M=TRUNK_GROUP IS=min IE=4 ITERations=1";tr 51 M=TRUNK_GROUP IS=min IE=4 ITERations=1;echo "done";
    678 echo "there are 83 more memories to test.";echo "tr 51 M=TRUNK_MEMBER IS=min IE=4 ITERations=1";tr 51 M=TRUNK_MEMBER IS=min IE=4 ITERations=1;echo "done";
    679 echo "there are 82 more memories to test.";echo "tr 51 M=TTL_FN IS=min IE=4 ITERations=1";tr 51 M=TTL_FN IS=min IE=4 ITERations=1;echo "done";
    680 echo "there are 81 more memories to test.";echo "tr 51 M=TX_PROT_GROUP_1_1_TABLE IS=min IE=4 ITERations=1";tr 51 M=TX_PROT_GROUP_1_1_TABLE IS=min IE=4 ITERations=1;echo "done";
    681 echo "there are 80 more memories to test.";echo "tr 51 M=TX_PROT_GROUP_1_TABLE IS=min IE=4 ITERations=1";tr 51 M=TX_PROT_GROUP_1_TABLE IS=min IE=4 ITERations=1;echo "done";
    682 echo "there are 79 more memories to test.";echo "tr 51 M=UDF_CONDITIONAL_CHECK_TABLE_CAM IS=min IE=4 ITERations=1";tr 51 M=UDF_CONDITIONAL_CHECK_TABLE_CAM IS=min IE=4 ITERations=1;echo "done";
    683 echo "there are 78 more memories to test.";echo "tr 51 M=UDF_CONDITIONAL_CHECK_TABLE_RAM IS=min IE=4 ITERations=1";tr 51 M=UDF_CONDITIONAL_CHECK_TABLE_RAM IS=min IE=4 ITERations=1;echo "done";
    684 echo "there are 77 more memories to test.";echo "tr 51 M=FP_UDF_OFFSET IS=min IE=4 ITERations=1";tr 51 M=FP_UDF_OFFSET IS=min IE=4 ITERations=1;echo "done";
    685 echo "there are 76 more memories to test.";echo "tr 51 M=FP_UDF_TCAM IS=min IE=4 ITERations=1";tr 51 M=FP_UDF_TCAM IS=min IE=4 ITERations=1;echo "done";
    686 echo "there are 75 more memories to test.";echo "tr 51 M=UNKNOWN_HGI_BITMAP IS=min IE=4 ITERations=1";tr 51 M=UNKNOWN_HGI_BITMAP IS=min IE=4 ITERations=1;echo "done";
    687 echo "there are 74 more memories to test.";echo "tr 51 M=UNKNOWN_MCAST_BLOCK_MASK IS=min IE=4 ITERations=1";tr 51 M=UNKNOWN_MCAST_BLOCK_MASK IS=min IE=4 ITERations=1;echo "done";
    688 echo "there are 73 more memories to test.";echo "tr 51 M=UNKNOWN_UCAST_BLOCK_MASK IS=min IE=4 ITERations=1";tr 51 M=UNKNOWN_UCAST_BLOCK_MASK IS=min IE=4 ITERations=1;echo "done";
    689 echo "there are 72 more memories to test.";echo "tr 51 M=VFI IS=min IE=4 ITERations=1";tr 51 M=VFI IS=min IE=4 ITERations=1;echo "done";
    690 echo "there are 71 more memories to test.";echo "tr 51 M=VFI_1 IS=min IE=4 ITERations=1";tr 51 M=VFI_1 IS=min IE=4 ITERations=1;echo "done";
    691 echo "there are 70 more memories to test.";echo "tr 51 M=VFI_PROFILE IS=min IE=4 ITERations=1";tr 51 M=VFI_PROFILE IS=min IE=4 ITERations=1;echo "done";
    692 echo "there are 69 more memories to test.";echo "tr 51 M=VFI_PROFILE_2 IS=min IE=4 ITERations=1";tr 51 M=VFI_PROFILE_2 IS=min IE=4 ITERations=1;echo "done";
    693 echo "there are 68 more memories to test.";echo "tr 51 M=VFP_HASH_FIELD_BMAP_TABLE_A IS=min IE=4 ITERations=1";tr 51 M=VFP_HASH_FIELD_BMAP_TABLE_A IS=min IE=4 ITERations=1;echo "done";
    694 echo "there are 67 more memories to test.";echo "tr 51 M=VFP_HASH_FIELD_BMAP_TABLE_B IS=min IE=4 ITERations=1";tr 51 M=VFP_HASH_FIELD_BMAP_TABLE_B IS=min IE=4 ITERations=1;echo "done";
    695 echo "there are 66 more memories to test.";echo "tr 51 M=VFP_POLICY_TABLE IS=min IE=4 ITERations=1";tr 51 M=VFP_POLICY_TABLE IS=min IE=4 ITERations=1;echo "done";
    696 echo "there are 65 more memories to test.";echo "tr 51 M=VFP_TCAM IS=min IE=4 ITERations=1";tr 51 M=VFP_TCAM IS=min IE=4 ITERations=1;echo "done";
    697 echo "there are 64 more memories to test.";echo "tr 51 M=VLAN_TAB IS=min IE=4 ITERations=1";tr 51 M=VLAN_TAB IS=min IE=4 ITERations=1;echo "done";
    698 echo "there are 63 more memories to test.";echo "tr 51 M=VLAN_MAC IS=min IE=4 ITERations=1";tr 51 M=VLAN_MAC IS=min IE=4 ITERations=1;echo "done";
    699 echo "there are 62 more memories to test.";echo "tr 51 M=VLAN_MPLS IS=min IE=4 ITERations=1";tr 51 M=VLAN_MPLS IS=min IE=4 ITERations=1;echo "done";
    700 echo "there are 61 more memories to test.";echo "tr 51 M=VLAN_PROFILE_TAB IS=min IE=4 ITERations=1";tr 51 M=VLAN_PROFILE_TAB IS=min IE=4 ITERations=1;echo "done";
    701 echo "there are 60 more memories to test.";echo "tr 51 M=VLAN_PROFILE_2 IS=min IE=4 ITERations=1";tr 51 M=VLAN_PROFILE_2 IS=min IE=4 ITERations=1;echo "done";
    702 echo "there are 59 more memories to test.";echo "tr 51 M=VLAN_PROTOCOL IS=min IE=4 ITERations=1";tr 51 M=VLAN_PROTOCOL IS=min IE=4 ITERations=1;echo "done";
    703 echo "there are 58 more memories to test.";echo "tr 51 M=VLAN_PROTOCOL_DATA IS=min IE=4 ITERations=1";tr 51 M=VLAN_PROTOCOL_DATA IS=min IE=4 ITERations=1;echo "done";
    704 echo "there are 57 more memories to test.";echo "tr 51 M=STG_TAB IS=min IE=4 ITERations=1";tr 51 M=STG_TAB IS=min IE=4 ITERations=1;echo "done";
    705 echo "there are 56 more memories to test.";echo "tr 51 M=VLAN_SUBNET IS=min IE=4 ITERations=1";tr 51 M=VLAN_SUBNET IS=min IE=4 ITERations=1;echo "done";
    706 echo "there are 55 more memories to test.";echo "tr 51 M=VLAN_SUBNET_DATA_ONLY IS=min IE=4 ITERations=1";tr 51 M=VLAN_SUBNET_DATA_ONLY IS=min IE=4 ITERations=1;echo "done";
    707 echo "there are 54 more memories to test.";echo "tr 51 M=VLAN_SUBNET_ONLY IS=min IE=4 ITERations=1";tr 51 M=VLAN_SUBNET_ONLY IS=min IE=4 ITERations=1;echo "done";
    708 echo "there are 53 more memories to test.";echo "tr 51 M=VLAN_XLATE IS=min IE=4 ITERations=1";tr 51 M=VLAN_XLATE IS=min IE=4 ITERations=1;echo "done";
    709 echo "there are 52 more memories to test.";echo "tr 51 M=VLAN_XLATE_ECC IS=min IE=4 ITERations=1";tr 51 M=VLAN_XLATE_ECC IS=min IE=4 ITERations=1;echo "done";
    710 echo "there are 51 more memories to test.";echo "tr 51 M=VLAN_XLATE_LP IS=min IE=4 ITERations=1";tr 51 M=VLAN_XLATE_LP IS=min IE=4 ITERations=1;echo "done";
    711 echo "there are 50 more memories to test.";echo "tr 51 M=VRF IS=min IE=4 ITERations=1";tr 51 M=VRF IS=min IE=4 ITERations=1;echo "done";
    712 #echo "there are 49 more memories to test.";echo "tr 51 M=XLPORT_WC_UCMEM_DATA IS=min IE=4 ITERations=1";tr 51 M=XLPORT_WC_UCMEM_DATA IS=min IE=4 ITERations=1;echo "done";
    713 #----------------------------NOTEST memories------------------------------------------------------------------
    714 #echo 'there are 48  more memories to test.';echo 'tr 51 M=EARB_FLEX_OPCODE IS=min IE=4 ITERations=1';tr 51 M=EARB_FLEX_OPCODE IS=min IE=4 ITERations=1;echo 'done';
    715 #echo 'there are 47  more memories to test.';echo 'tr 51 M=EDB_1DBG_B IS=min IE=4 ITERations=1';tr 51 M=EDB_1DBG_B IS=min IE=4 ITERations=1;echo 'done';
    716 #echo 'there are 46  more memories to test.';echo 'tr 51 M=EINITBUF_PACKET_BUFFER0 IS=min IE=4 ITERations=1';tr 51 M=EINITBUF_PACKET_BUFFER0 IS=min IE=4 ITERations=1;echo 'done';
    717 #echo 'there are 45  more memories to test.';echo 'tr 51 M=EINITBUF_PACKET_BUFFER1 IS=min IE=4 ITERations=1';tr 51 M=EINITBUF_PACKET_BUFFER1 IS=min IE=4 ITERations=1;echo 'done';
    718 #echo 'there are 44  more memories to test.';echo 'tr 51 M=EINITBUF_PACKET_BUFFER2 IS=min IE=4 ITERations=1';tr 51 M=EINITBUF_PACKET_BUFFER2 IS=min IE=4 ITERations=1;echo 'done';
    719 #echo 'there are 43  more memories to test.';echo 'tr 51 M=EINITBUF_PACKET_BUFFER3 IS=min IE=4 ITERations=1';tr 51 M=EINITBUF_PACKET_BUFFER3 IS=min IE=4 ITERations=1;echo 'done';
    720 #echo 'there are 42  more memories to test.';echo 'tr 51 M=EINITBUF_PACKET_BUFFER4 IS=min IE=4 ITERations=1';tr 51 M=EINITBUF_PACKET_BUFFER4 IS=min IE=4 ITERations=1;echo 'done';
    721 #echo 'there are 41  more memories to test.';echo 'tr 51 M=HSP_SCHED_LAST_PORT_INFO IS=min IE=4 ITERations=1';tr 51 M=HSP_SCHED_LAST_PORT_INFO IS=min IE=4 ITERations=1;echo 'done';
    722 #echo 'there are 40  more memories to test.';echo 'tr 51 M=HSP_SCHED_LAST_PREEMPT_PORT_INFO IS=min IE=4 ITERations=1';tr 51 M=HSP_SCHED_LAST_PREEMPT_PORT_INFO IS=min IE=4 ITERations=1;echo 'done';
    723 #echo 'there are 39  more memories to test.';echo 'tr 51 M=IARB_FLEX_OPCODE IS=min IE=4 ITERations=1';tr 51 M=IARB_FLEX_OPCODE IS=min IE=4 ITERations=1;echo 'done';
    724 #echo 'there are 38  more memories to test.';echo 'tr 51 M=ING_PBI_DEBUG_0_HI IS=min IE=4 ITERations=1';tr 51 M=ING_PBI_DEBUG_0_HI IS=min IE=4 ITERations=1;echo 'done';
    725 #echo 'there are 37  more memories to test.';echo 'tr 51 M=ING_PBI_DEBUG_0_LO IS=min IE=4 ITERations=1';tr 51 M=ING_PBI_DEBUG_0_LO IS=min IE=4 ITERations=1;echo 'done';
    726 #echo 'there are 36  more memories to test.';echo 'tr 51 M=ING_PBI_DEBUG_1 IS=min IE=4 ITERations=1';tr 51 M=ING_PBI_DEBUG_1 IS=min IE=4 ITERations=1;echo 'done';
    727 #echo 'there are 35  more memories to test.';echo 'tr 51 M=ING_SERVICE_PRI_MAP IS=min IE=4 ITERations=1';tr 51 M=ING_SERVICE_PRI_MAP IS=min IE=4 ITERations=1;echo 'done';
    728 #echo 'there are 34  more memories to test.';echo 'tr 51 M=IPARS_PACKET_BUFFER0 IS=min IE=4 ITERations=1';tr 51 M=IPARS_PACKET_BUFFER0 IS=min IE=4 ITERations=1;echo 'done';
    729 #echo 'there are 33  more memories to test.';echo 'tr 51 M=IPARS_PACKET_BUFFER1 IS=min IE=4 ITERations=1';tr 51 M=IPARS_PACKET_BUFFER1 IS=min IE=4 ITERations=1;echo 'done';
    730 #echo 'there are 32  more memories to test.';echo 'tr 51 M=IPARS_PACKET_BUFFER2 IS=min IE=4 ITERations=1';tr 51 M=IPARS_PACKET_BUFFER2 IS=min IE=4 ITERations=1;echo 'done';
    731 #echo 'there are 31  more memories to test.';echo 'tr 51 M=IPARS_PACKET_BUFFER3 IS=min IE=4 ITERations=1';tr 51 M=IPARS_PACKET_BUFFER3 IS=min IE=4 ITERations=1;echo 'done';
    732 #echo 'there are 30  more memories to test.';echo 'tr 51 M=IPARS_PACKET_BUFFER4 IS=min IE=4 ITERations=1';tr 51 M=IPARS_PACKET_BUFFER4 IS=min IE=4 ITERations=1;echo 'done';
    733 #echo 'there are 29  more memories to test.';echo 'tr 51 M=LINK_STATUS IS=min IE=4 ITERations=1';tr 51 M=LINK_STATUS IS=min IE=4 ITERations=1;echo 'done';
    734 #echo 'there are 28  more memories to test.';echo 'tr 51 M=MMU_ENQ_PIPE_DELAY_MEM IS=min IE=4 ITERations=1';tr 51 M=MMU_ENQ_PIPE_DELAY_MEM IS=min IE=4 ITERations=1;echo 'done';
    735 #echo 'there are 27  more memories to test.';echo 'tr 51 M=MMU_INTFI_IBUF IS=min IE=4 ITERations=1';tr 51 M=MMU_INTFI_IBUF IS=min IE=4 ITERations=1;echo 'done';
    736 #echo 'there are 26  more memories to test.';echo 'tr 51 M=MMU_INTFI_XPIPE_FC_MAP_TBS1 IS=min IE=4 ITERations=1';tr 51 M=MMU_INTFI_XPIPE_FC_MAP_TBS1 IS=min IE=4 ITERations=1;echo 'done';
    737 #echo 'there are 25  more memories to test.';echo 'tr 51 M=RQE_MCTHD1_MEM IS=min IE=4 ITERations=1';tr 51 M=RQE_MCTHD1_MEM IS=min IE=4 ITERations=1;echo 'done';
    738 #echo 'there are 24  more memories to test.';echo 'tr 51 M=RQE_MCTHD2_MEM IS=min IE=4 ITERations=1';tr 51 M=RQE_MCTHD2_MEM IS=min IE=4 ITERations=1;echo 'done';
    739 #echo 'there are 23  more memories to test.';echo 'tr 51 M=RQE_REPBUF_MEM IS=min IE=4 ITERations=1';tr 51 M=RQE_REPBUF_MEM IS=min IE=4 ITERations=1;echo 'done';
    740 #echo 'there are 22  more memories to test.';echo 'tr 51 M=RQE_WORK_FIFO_MEM IS=min IE=4 ITERations=1';tr 51 M=RQE_WORK_FIFO_MEM IS=min IE=4 ITERations=1;echo 'done';
    741 #echo 'there are 21  more memories to test.';echo 'tr 51 M=SAV_THDI_CFG_MEM IS=min IE=4 ITERations=1';tr 51 M=SAV_THDI_CFG_MEM IS=min IE=4 ITERations=1;echo 'done';
    742 #---------------------------- READONLY  memories-----------------------------------------------------------------
    743 #echo 'there are 20 more memories to test.';echo 'tr 51 M=DLB_HGT_MEMBER_HW_STATE IS=min IE=4 ITERations=1';tr 51 M=DLB_HGT_MEMBER_HW_STATE IS=min IE=4 ITERations=1;echo 'done';
    744 #echo 'there are 19 more memories to test.';echo 'tr 51 M=EGR_MAX_USED_ENTRIES IS=min IE=4 ITERations=1';tr 51 M=EGR_MAX_USED_ENTRIES IS=min IE=4 ITERations=1;echo 'done';
    745 #echo 'there are 18 more memories to test.';echo 'tr 51 M=EGR_MMU_REQUESTS IS=min IE=4 ITERations=1';tr 51 M=EGR_MMU_REQUESTS IS=min IE=4 ITERations=1;echo 'done';
    746 #echo 'there are 17 more memories to test.';echo 'tr 51 M=EGR_PBE_DEBUG_0 IS=min IE=4 ITERations=1';tr 51 M=EGR_PBE_DEBUG_0 IS=min IE=4 ITERations=1;echo 'done';
    747 #echo 'there are 16 more memories to test.';echo 'tr 51 M=EGR_PORT_REQUESTS IS=min IE=4 ITERations=1';tr 51 M=EGR_PORT_REQUESTS IS=min IE=4 ITERations=1;echo 'done';
    748 #echo 'there are 15 more memories to test.';echo 'tr 51 M=EGR_PREEMPT_MAX_USED_ENTRIES IS=min IE=4 ITERations=1';tr 51 M=EGR_PREEMPT_MAX_USED_ENTRIES IS=min IE=4 ITERations=1;echo 'done';
    749 #echo 'there are 14 more memories to test.';echo 'tr 51 M=EGR_PREEMPT_MMU_REQUESTS IS=min IE=4 ITERations=1';tr 51 M=EGR_PREEMPT_MMU_REQUESTS IS=min IE=4 ITERations=1;echo 'done';
    750 #echo 'there are 13 more memories to test.';echo 'tr 51 M=ESEC_MISC_COUNTERS IS=min IE=4 ITERations=1';tr 51 M=ESEC_MISC_COUNTERS IS=min IE=4 ITERations=1;echo 'done';
    751 #echo 'there are 12 more memories to test.';echo 'tr 51 M=ESEC_OUTMGMTPKTS_COUNT IS=min IE=4 ITERations=1';tr 51 M=ESEC_OUTMGMTPKTS_COUNT IS=min IE=4 ITERations=1;echo 'done';
    752 #echo 'there are 11 more memories to test.';echo 'tr 51 M=IARB_IPAD_DEBUG IS=min IE=4 ITERations=1';tr 51 M=IARB_IPAD_DEBUG IS=min IE=4 ITERations=1;echo 'done';
    753 #echo 'there are 10 more memories to test.';echo 'tr 51 M=IARB_MH_DEBUG IS=min IE=4 ITERations=1';tr 51 M=IARB_MH_DEBUG IS=min IE=4 ITERations=1;echo 'done';
    754 #echo 'there are 9 more memories to test.';echo 'tr 51 M=ISEC_INMGMTPKTS_COUNT IS=min IE=4 ITERations=1';tr 51 M=ISEC_INMGMTPKTS_COUNT IS=min IE=4 ITERations=1;echo 'done';
    755 #echo 'there are 8 more memories to test.';echo 'tr 51 M=ISEC_MISC_COUNTERS IS=min IE=4 ITERations=1';tr 51 M=ISEC_MISC_COUNTERS IS=min IE=4 ITERations=1;echo 'done';
    756 #echo 'there are 7 more memories to test.';echo 'tr 51 M=ISEC_SCTCAM_HIT_COUNT IS=min IE=4 ITERations=1';tr 51 M=ISEC_SCTCAM_HIT_COUNT IS=min IE=4 ITERations=1;echo 'done';
    757 #echo 'there are 6 more memories to test.';echo 'tr 51 M=ISEC_SPTCAM_HIT_COUNT IS=min IE=4 ITERations=1';tr 51 M=ISEC_SPTCAM_HIT_COUNT IS=min IE=4 ITERations=1;echo 'done';
    758 #echo 'there are 5 more memories to test.';echo 'tr 51 M=MMU_MTRO_EGRMETERINGBUCKET_MEM IS=min IE=4 ITERations=1';tr 51 M=MMU_MTRO_EGRMETERINGBUCKET_MEM IS=min IE=4 ITERations=1;echo 'done';
    759 #echo 'there are 4 more memories to test.';echo 'tr 51 M=SP_GLB_Egress_SA_EXPIRE_Status IS=min IE=4 ITERations=1';tr 51 M=SP_GLB_Egress_SA_EXPIRE_Status IS=min IE=4 ITERations=1;echo 'done';
    760 #echo 'there are 3 more memories to test.';echo 'tr 51 M=SP_GLB_Egress_SA_SOFT_EXPIRE_Status IS=min IE=4 ITERations=1';tr 51 M=SP_GLB_Egress_SA_SOFT_EXPIRE_Status IS=min IE=4 ITERations=1;echo 'done';
    761 #echo 'there are 2 more memories to test.';echo 'tr 51 M=SP_GLB_Ingress_SA_EXPIRE_Status IS=min IE=4 ITERations=1';tr 51 M=SP_GLB_Ingress_SA_EXPIRE_Status IS=min IE=4 ITERations=1;echo 'done';
    762 #echo 'there are 1 more memories to test.';echo 'tr 51 M=SP_GLB_Ingress_SA_SOFT_EXPIRE_Status IS=min IE=4 ITERations=1';tr 51 M=SP_GLB_Ingress_SA_SOFT_EXPIRE_Status IS=min IE=4 ITERations=1;echo 'done';
    763 #---------------------------- VENDOR memories-----------------------------------------------------------------
	openbcm Git mirror of https://github.com/Broadcom-Network-Switching-Software/OpenBCM
	git clone git://git.finwo.net/mirror/broadcom/openbcm
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