ktsanity_screen.soc (128131B)
1 # 2 # This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 3 # 4 # Copyright 2007-2019 Broadcom Inc. All rights reserved. 5 6 # Katana (BCM56440) Sanity 7 # 8 # Script to run all available tests as quickly as possible. 9 # For testing basic sanity of new drivers, simulators, chips, etc. 10 # 11 12 if $?BCM56440_A0 || $?BCM56441_A0 || $?BCM56443_A0 || $?BCM56249_A0 || $?BCM56449_A0 || $?BCM56240_A0 || \ 13 $?BCM55440_A0 || $?BCM55441_A0 \ 14 'local BCM56440 1' 15 if $?BCM56445_A0 || $?BCM56444_A0 || $?BCM56448_A0 || $?BCM56241_A0 \ 16 'local BCM56445 1' 17 18 if $?BCM56440_B0 || $?BCM56441_B0 || $?BCM56443_B0 || $?BCM56249_B0 || $?BCM56449_B0 || $?BCM56240_B0 || \ 19 $?BCM55440_B0 || $?BCM55441_B0 || $?BCM56449_B0 || $?BCM56242_B0 || $?BCM56243_B0 \ 20 'local BCM56440 1' 21 if $?BCM56445_B0 || $?BCM56447_B0 || $?BCM56444_B0 || $?BCM56448_B0 || $?BCM56241_B0 \ 22 'local BCM56445 1' 23 24 if $?BCM56440_B0 || $?BCM56441_B0 || $?BCM56443_B0 || $?BCM56249_B0 || $?BCM56449_B0 || $?BCM56240_B0 || \ 25 $?BCM56445_B0 || $?BCM56447_B0 || $?BCM56444_B0 || $?BCM56448_B0 || $?BCM56241_B0 || $?BCM55440_B0 || \ 26 $?BCM55441_B0 || $?BCM56242_B0 || $?BCM56243_B0 \ 27 'local BCM56X4X_B0 1' 28 29 if $?BCM56240_B0 || $?BCM56242_B0 || $?BCM56243_B0 \ 30 'local BCM56240_B0 1' 31 32 echo "testsuite: started: screen tests" 33 rcload rc.soc 34 counter off 35 l2mode off 36 37 # We need to print out port status since any cabling effects results. 38 *:ps 39 40 # Avoid link messages while testing 41 linkscan off 42 43 init 44 init misc 45 init mmu 46 47 local done 'echo " Done"' 48 49 # Set run command script not to fail on errors reported by commands 50 # this allows the script to continue if a test fails 51 set rcerror=false 52 53 # Set up test mode: don't stop on errors, show progress on each test 54 tm -stoponerror +progress 55 # Unselect all 56 ts -* 57 58 #Display some useful information 59 date 60 ver 61 soc 62 63 init soc; init mmu; init misc; 64 #Clean up after register read/write test. 65 66 rcload rc.soc 67 counter off 68 l2mode off 69 echo "Running CPU Benchmarks ..." 70 tr 21 71 $done 72 linkscan off 73 74 init soc; init mmu; init misc; 75 ktsanity_ecc_off 76 set rct=false 77 78 echo "Running Switching Memory Tests ..." 79 80 echo " ALTERNATE_EMIRROR_BITMAP"; 81 tr 50 M=ALTERNATE_EMIRROR_BITMAP; 82 tr 51 M=ALTERNATE_EMIRROR_BITMAP; 83 tr 52 M=ALTERNATE_EMIRROR_BITMAP; 84 tr 71 M=ALTERNATE_EMIRROR_BITMAP TSE=F SLTH=T; 85 tr 71 M=ALTERNATE_EMIRROR_BITMAP TSE=T SLTH=T; 86 tr 71 M=ALTERNATE_EMIRROR_BITMAP TSE=T SLTH=F; 87 echo " BCAST_BLOCK_MASK"; 88 tr 50 M=BCAST_BLOCK_MASK; 89 tr 51 M=BCAST_BLOCK_MASK; 90 tr 52 M=BCAST_BLOCK_MASK; 91 tr 71 M=BCAST_BLOCK_MASK TSE=F SLTH=T; 92 tr 71 M=BCAST_BLOCK_MASK TSE=T SLTH=T; 93 tr 71 M=BCAST_BLOCK_MASK TSE=T SLTH=F; 94 echo " COS_MAP_SEL"; 95 tr 50 M=COS_MAP_SEL; 96 tr 51 M=COS_MAP_SEL; 97 tr 52 M=COS_MAP_SEL; 98 tr 71 M=COS_MAP_SEL TSE=F SLTH=T; 99 tr 71 M=COS_MAP_SEL TSE=T SLTH=T; 100 tr 71 M=COS_MAP_SEL TSE=T SLTH=F; 101 echo " CPU_COS_MAP"; 102 tr 50 M=CPU_COS_MAP; 103 tr 51 M=CPU_COS_MAP; 104 tr 52 M=CPU_COS_MAP; 105 tr 71 M=CPU_COS_MAP TSE=F SLTH=T; 106 tr 71 M=CPU_COS_MAP TSE=T SLTH=T; 107 tr 71 M=CPU_COS_MAP TSE=T SLTH=F; 108 echo " CPU_COS_MAP_DATA_ONLY"; 109 tr 50 M=CPU_COS_MAP_DATA_ONLY; 110 tr 51 M=CPU_COS_MAP_DATA_ONLY; 111 tr 52 M=CPU_COS_MAP_DATA_ONLY; 112 tr 71 M=CPU_COS_MAP_DATA_ONLY TSE=F SLTH=T; 113 tr 71 M=CPU_COS_MAP_DATA_ONLY TSE=T SLTH=T; 114 tr 71 M=CPU_COS_MAP_DATA_ONLY TSE=T SLTH=F; 115 echo " CPU_COS_MAP_ONLY"; 116 tr 50 M=CPU_COS_MAP_ONLY; 117 tr 51 M=CPU_COS_MAP_ONLY; 118 tr 52 M=CPU_COS_MAP_ONLY; 119 tr 71 M=CPU_COS_MAP_ONLY TSE=F SLTH=T; 120 tr 71 M=CPU_COS_MAP_ONLY TSE=T SLTH=T; 121 tr 71 M=CPU_COS_MAP_ONLY TSE=T SLTH=F; 122 echo " CPU_PBM"; 123 tr 50 M=CPU_PBM; 124 #tr 51 M=CPU_PBM; 125 #tr 52 M=CPU_PBM; 126 tr 71 M=CPU_PBM TSE=F SLTH=T; 127 tr 71 M=CPU_PBM TSE=T SLTH=T; 128 tr 71 M=CPU_PBM TSE=T SLTH=F; 129 echo " CPU_PBM_2"; 130 tr 50 M=CPU_PBM_2; 131 #tr 51 M=CPU_PBM_2; 132 #tr 52 M=CPU_PBM_2; 133 tr 71 M=CPU_PBM_2 TSE=F SLTH=T; 134 tr 71 M=CPU_PBM_2 TSE=T SLTH=T; 135 tr 71 M=CPU_PBM_2 TSE=T SLTH=F; 136 echo " CPU_TS_MAP"; 137 tr 50 M=CPU_TS_MAP; 138 tr 51 M=CPU_TS_MAP; 139 tr 52 M=CPU_TS_MAP; 140 tr 71 M=CPU_TS_MAP TSE=F SLTH=T; 141 tr 71 M=CPU_TS_MAP TSE=T SLTH=T; 142 tr 71 M=CPU_TS_MAP TSE=T SLTH=F; 143 if !$?BCM56X4X_B0 \ 144 'echo " CTR_FLEX_COUNT_0"; \ 145 tr 50 M=CTR_FLEX_COUNT_0; \ 146 tr 51 M=CTR_FLEX_COUNT_0; \ 147 tr 52 M=CTR_FLEX_COUNT_0; \ 148 tr 71 M=CTR_FLEX_COUNT_0 TSE=F SLTH=T; \ 149 tr 71 M=CTR_FLEX_COUNT_0 TSE=T SLTH=T; \ 150 tr 71 M=CTR_FLEX_COUNT_0 TSE=T SLTH=F; \ 151 echo " CTR_FLEX_COUNT_1"; \ 152 tr 50 M=CTR_FLEX_COUNT_1; \ 153 tr 51 M=CTR_FLEX_COUNT_1; \ 154 tr 52 M=CTR_FLEX_COUNT_1; \ 155 tr 71 M=CTR_FLEX_COUNT_1 TSE=F SLTH=T; \ 156 tr 71 M=CTR_FLEX_COUNT_1 TSE=T SLTH=T; \ 157 tr 71 M=CTR_FLEX_COUNT_1 TSE=T SLTH=F; \ 158 echo " CTR_FLEX_COUNT_10"; \ 159 tr 50 M=CTR_FLEX_COUNT_10; \ 160 tr 51 M=CTR_FLEX_COUNT_10; \ 161 tr 52 M=CTR_FLEX_COUNT_10; \ 162 tr 71 M=CTR_FLEX_COUNT_10 TSE=F SLTH=T; \ 163 tr 71 M=CTR_FLEX_COUNT_10 TSE=T SLTH=T; \ 164 tr 71 M=CTR_FLEX_COUNT_10 TSE=T SLTH=F; \ 165 echo " CTR_FLEX_COUNT_11"; \ 166 tr 50 M=CTR_FLEX_COUNT_11; \ 167 tr 51 M=CTR_FLEX_COUNT_11; \ 168 tr 52 M=CTR_FLEX_COUNT_11; \ 169 tr 71 M=CTR_FLEX_COUNT_11 TSE=F SLTH=T; \ 170 tr 71 M=CTR_FLEX_COUNT_11 TSE=T SLTH=T; \ 171 tr 71 M=CTR_FLEX_COUNT_11 TSE=T SLTH=F; \ 172 echo " CTR_FLEX_COUNT_2"; \ 173 tr 50 M=CTR_FLEX_COUNT_2; \ 174 tr 51 M=CTR_FLEX_COUNT_2; \ 175 tr 52 M=CTR_FLEX_COUNT_2; \ 176 tr 71 M=CTR_FLEX_COUNT_2 TSE=F SLTH=T; \ 177 tr 71 M=CTR_FLEX_COUNT_2 TSE=T SLTH=T; \ 178 tr 71 M=CTR_FLEX_COUNT_2 TSE=T SLTH=F; \ 179 echo " CTR_FLEX_COUNT_3"; \ 180 tr 50 M=CTR_FLEX_COUNT_3; \ 181 tr 51 M=CTR_FLEX_COUNT_3; \ 182 tr 52 M=CTR_FLEX_COUNT_3; \ 183 tr 71 M=CTR_FLEX_COUNT_3 TSE=F SLTH=T; \ 184 tr 71 M=CTR_FLEX_COUNT_3 TSE=T SLTH=T; \ 185 tr 71 M=CTR_FLEX_COUNT_3 TSE=T SLTH=F; \ 186 echo " CTR_FLEX_COUNT_4"; \ 187 tr 50 M=CTR_FLEX_COUNT_4; \ 188 tr 51 M=CTR_FLEX_COUNT_4; \ 189 tr 52 M=CTR_FLEX_COUNT_4; \ 190 tr 71 M=CTR_FLEX_COUNT_4 TSE=F SLTH=T; \ 191 tr 71 M=CTR_FLEX_COUNT_4 TSE=T SLTH=T; \ 192 tr 71 M=CTR_FLEX_COUNT_4 TSE=T SLTH=F; \ 193 echo " CTR_FLEX_COUNT_5"; \ 194 tr 50 M=CTR_FLEX_COUNT_5; \ 195 tr 51 M=CTR_FLEX_COUNT_5; \ 196 tr 52 M=CTR_FLEX_COUNT_5; \ 197 tr 71 M=CTR_FLEX_COUNT_5 TSE=F SLTH=T; \ 198 tr 71 M=CTR_FLEX_COUNT_5 TSE=T SLTH=T; \ 199 tr 71 M=CTR_FLEX_COUNT_5 TSE=T SLTH=F; \ 200 echo " CTR_FLEX_COUNT_6"; \ 201 tr 50 M=CTR_FLEX_COUNT_6; \ 202 tr 51 M=CTR_FLEX_COUNT_6; \ 203 tr 52 M=CTR_FLEX_COUNT_6; \ 204 tr 71 M=CTR_FLEX_COUNT_6 TSE=F SLTH=T; \ 205 tr 71 M=CTR_FLEX_COUNT_6 TSE=T SLTH=T; \ 206 tr 71 M=CTR_FLEX_COUNT_6 TSE=T SLTH=F; \ 207 echo " CTR_FLEX_COUNT_7"; \ 208 tr 50 M=CTR_FLEX_COUNT_7; \ 209 tr 51 M=CTR_FLEX_COUNT_7; \ 210 tr 52 M=CTR_FLEX_COUNT_7; \ 211 tr 71 M=CTR_FLEX_COUNT_7 TSE=F SLTH=T; \ 212 tr 71 M=CTR_FLEX_COUNT_7 TSE=T SLTH=T; \ 213 tr 71 M=CTR_FLEX_COUNT_7 TSE=T SLTH=F; \ 214 echo " CTR_FLEX_COUNT_8"; \ 215 tr 50 M=CTR_FLEX_COUNT_8; \ 216 tr 51 M=CTR_FLEX_COUNT_8; \ 217 tr 52 M=CTR_FLEX_COUNT_8; \ 218 tr 71 M=CTR_FLEX_COUNT_8 TSE=F SLTH=T; \ 219 tr 71 M=CTR_FLEX_COUNT_8 TSE=T SLTH=T; \ 220 tr 71 M=CTR_FLEX_COUNT_8 TSE=T SLTH=F; \ 221 echo " CTR_FLEX_COUNT_9"; \ 222 tr 50 M=CTR_FLEX_COUNT_9; \ 223 tr 51 M=CTR_FLEX_COUNT_9; \ 224 tr 52 M=CTR_FLEX_COUNT_9; \ 225 tr 71 M=CTR_FLEX_COUNT_9 TSE=F SLTH=T; \ 226 tr 71 M=CTR_FLEX_COUNT_9 TSE=T SLTH=T; \ 227 tr 71 M=CTR_FLEX_COUNT_9 TSE=T SLTH=F;' 228 $done 229 echo " DLB_HGT_FLOWSET_PORT"; 230 tr 50 M=DLB_HGT_FLOWSET_PORT; 231 tr 51 M=DLB_HGT_FLOWSET_PORT; 232 tr 52 M=DLB_HGT_FLOWSET_PORT; 233 tr 71 M=DLB_HGT_FLOWSET_PORT TSE=F SLTH=T; 234 tr 71 M=DLB_HGT_FLOWSET_PORT TSE=T SLTH=T; 235 tr 71 M=DLB_HGT_FLOWSET_PORT TSE=T SLTH=F; 236 #echo " DLB_HGT_FLOWSET_TIMESTAMP"; 237 #tr 50 M=DLB_HGT_FLOWSET_TIMESTAMP; 238 #tr 51 M=DLB_HGT_FLOWSET_TIMESTAMP; 239 #tr 52 M=DLB_HGT_FLOWSET_TIMESTAMP; 240 #tr 71 M=DLB_HGT_FLOWSET_TIMESTAMP TSE=F SLTH=T; 241 #tr 71 M=DLB_HGT_FLOWSET_TIMESTAMP TSE=T SLTH=T; 242 #tr 71 M=DLB_HGT_FLOWSET_TIMESTAMP TSE=T SLTH=F; 243 #echo " DLB_HGT_FLOWSET_TIMESTAMP_PAGE"; 244 #tr 50 M=DLB_HGT_FLOWSET_TIMESTAMP_PAGE; 245 #tr 51 M=DLB_HGT_FLOWSET_TIMESTAMP_PAGE; 246 #tr 52 M=DLB_HGT_FLOWSET_TIMESTAMP_PAGE; 247 #tr 71 M=DLB_HGT_FLOWSET_TIMESTAMP_PAGE TSE=F SLTH=T; 248 #tr 71 M=DLB_HGT_FLOWSET_TIMESTAMP_PAGE TSE=T SLTH=T; 249 #tr 71 M=DLB_HGT_FLOWSET_TIMESTAMP_PAGE TSE=T SLTH=F; 250 echo " DLB_HGT_GLB_QUANTIZE_THRESHOLDS"; 251 tr 50 M=DLB_HGT_GLB_QUANTIZE_THRESHOLDS; 252 #tr 51 M=DLB_HGT_GLB_QUANTIZE_THRESHOLDS; 253 #tr 52 M=DLB_HGT_GLB_QUANTIZE_THRESHOLDS; 254 tr 71 M=DLB_HGT_GLB_QUANTIZE_THRESHOLDS TSE=F SLTH=T; 255 tr 71 M=DLB_HGT_GLB_QUANTIZE_THRESHOLDS TSE=T SLTH=T; 256 tr 71 M=DLB_HGT_GLB_QUANTIZE_THRESHOLDS TSE=T SLTH=F; 257 echo " DLB_HGT_GROUP_CONTROL"; 258 tr 50 M=DLB_HGT_GROUP_CONTROL; 259 tr 51 M=DLB_HGT_GROUP_CONTROL; 260 tr 52 M=DLB_HGT_GROUP_CONTROL; 261 tr 71 M=DLB_HGT_GROUP_CONTROL TSE=F SLTH=T; 262 tr 71 M=DLB_HGT_GROUP_CONTROL TSE=T SLTH=T; 263 tr 71 M=DLB_HGT_GROUP_CONTROL TSE=T SLTH=F; 264 echo " DLB_HGT_GROUP_MEMBERSHIP"; 265 tr 50 M=DLB_HGT_GROUP_MEMBERSHIP; 266 tr 51 M=DLB_HGT_GROUP_MEMBERSHIP; 267 tr 52 M=DLB_HGT_GROUP_MEMBERSHIP; 268 tr 71 M=DLB_HGT_GROUP_MEMBERSHIP TSE=F SLTH=T; 269 tr 71 M=DLB_HGT_GROUP_MEMBERSHIP TSE=T SLTH=T; 270 tr 71 M=DLB_HGT_GROUP_MEMBERSHIP TSE=T SLTH=F; 271 echo " DLB_HGT_GROUP_STATS"; 272 tr 50 M=DLB_HGT_GROUP_STATS; 273 tr 51 M=DLB_HGT_GROUP_STATS; 274 tr 52 M=DLB_HGT_GROUP_STATS; 275 tr 71 M=DLB_HGT_GROUP_STATS TSE=F SLTH=T; 276 tr 71 M=DLB_HGT_GROUP_STATS TSE=T SLTH=T; 277 tr 71 M=DLB_HGT_GROUP_STATS TSE=T SLTH=F; 278 echo " DLB_HGT_LINK_CONTROL"; 279 tr 50 M=DLB_HGT_LINK_CONTROL; 280 #tr 51 M=DLB_HGT_LINK_CONTROL; 281 #tr 52 M=DLB_HGT_LINK_CONTROL; 282 tr 71 M=DLB_HGT_LINK_CONTROL TSE=F SLTH=T; 283 tr 71 M=DLB_HGT_LINK_CONTROL TSE=T SLTH=T; 284 tr 71 M=DLB_HGT_LINK_CONTROL TSE=T SLTH=F; 285 echo " DLB_HGT_OPTIMAL_CANDIDATE"; 286 tr 50 M=DLB_HGT_OPTIMAL_CANDIDATE; 287 tr 51 M=DLB_HGT_OPTIMAL_CANDIDATE; 288 tr 52 M=DLB_HGT_OPTIMAL_CANDIDATE; 289 tr 71 M=DLB_HGT_OPTIMAL_CANDIDATE TSE=F SLTH=T; 290 tr 71 M=DLB_HGT_OPTIMAL_CANDIDATE TSE=T SLTH=T; 291 tr 71 M=DLB_HGT_OPTIMAL_CANDIDATE TSE=T SLTH=F; 292 echo " DLB_HGT_PORT_QUALITY_MAPPING"; 293 tr 50 M=DLB_HGT_PORT_QUALITY_MAPPING; 294 tr 51 M=DLB_HGT_PORT_QUALITY_MAPPING; 295 tr 52 M=DLB_HGT_PORT_QUALITY_MAPPING; 296 tr 71 M=DLB_HGT_PORT_QUALITY_MAPPING TSE=F SLTH=T; 297 tr 71 M=DLB_HGT_PORT_QUALITY_MAPPING TSE=T SLTH=T; 298 tr 71 M=DLB_HGT_PORT_QUALITY_MAPPING TSE=T SLTH=F; 299 #echo " DLB_HGT_PORT_STATE"; 300 #tr 50 M=DLB_HGT_PORT_STATE; 301 #tr 51 M=DLB_HGT_PORT_STATE; 302 #tr 52 M=DLB_HGT_PORT_STATE; 303 #tr 71 M=DLB_HGT_PORT_STATE TSE=F SLTH=T; 304 #tr 71 M=DLB_HGT_PORT_STATE TSE=T SLTH=T; 305 #tr 71 M=DLB_HGT_PORT_STATE TSE=T SLTH=F; 306 echo " DSCP_TABLE"; 307 tr 50 M=DSCP_TABLE; 308 tr 51 M=DSCP_TABLE; 309 tr 52 M=DSCP_TABLE; 310 tr 71 M=DSCP_TABLE TSE=F SLTH=T; 311 tr 71 M=DSCP_TABLE TSE=T SLTH=T; 312 tr 71 M=DSCP_TABLE TSE=T SLTH=F; 313 echo " E2E_HOL_STATUS"; 314 tr 50 M=E2E_HOL_STATUS; 315 tr 51 M=E2E_HOL_STATUS; 316 tr 52 M=E2E_HOL_STATUS; 317 tr 71 M=E2E_HOL_STATUS TSE=F SLTH=T; 318 tr 71 M=E2E_HOL_STATUS TSE=T SLTH=T; 319 tr 71 M=E2E_HOL_STATUS TSE=T SLTH=F; 320 echo " E2E_HOL_STATUS_1"; 321 tr 50 M=E2E_HOL_STATUS_1; 322 tr 51 M=E2E_HOL_STATUS_1; 323 tr 52 M=E2E_HOL_STATUS_1; 324 tr 71 M=E2E_HOL_STATUS_1 TSE=F SLTH=T; 325 tr 71 M=E2E_HOL_STATUS_1 TSE=T SLTH=T; 326 tr 71 M=E2E_HOL_STATUS_1 TSE=T SLTH=F; 327 echo " EFP_COUNTER_TABLE"; 328 tr 50 M=EFP_COUNTER_TABLE; 329 tr 51 M=EFP_COUNTER_TABLE; 330 tr 52 M=EFP_COUNTER_TABLE; 331 tr 71 M=EFP_COUNTER_TABLE TSE=F SLTH=T; 332 tr 71 M=EFP_COUNTER_TABLE TSE=T SLTH=T; 333 tr 71 M=EFP_COUNTER_TABLE TSE=T SLTH=F; 334 echo " EFP_METER_TABLE"; 335 tr 50 M=EFP_METER_TABLE; 336 tr 51 M=EFP_METER_TABLE; 337 tr 52 M=EFP_METER_TABLE; 338 tr 71 M=EFP_METER_TABLE TSE=F SLTH=T; 339 tr 71 M=EFP_METER_TABLE TSE=T SLTH=T; 340 tr 71 M=EFP_METER_TABLE TSE=T SLTH=F; 341 echo " EFP_POLICY_TABLE"; 342 tr 50 M=EFP_POLICY_TABLE; 343 tr 51 M=EFP_POLICY_TABLE; 344 tr 52 M=EFP_POLICY_TABLE; 345 tr 71 M=EFP_POLICY_TABLE TSE=F SLTH=T; 346 tr 71 M=EFP_POLICY_TABLE TSE=T SLTH=T; 347 tr 71 M=EFP_POLICY_TABLE TSE=T SLTH=F; 348 echo " EFP_TCAM"; 349 tr 50 M=EFP_TCAM; 350 tr 51 M=EFP_TCAM; 351 tr 52 M=EFP_TCAM; 352 tr 71 M=EFP_TCAM TSE=F SLTH=T; 353 tr 71 M=EFP_TCAM TSE=T SLTH=T; 354 tr 71 M=EFP_TCAM TSE=T SLTH=F; 355 echo " EGR_1588_SA"; 356 tr 50 M=EGR_1588_SA; 357 tr 51 M=EGR_1588_SA; 358 tr 52 M=EGR_1588_SA; 359 tr 71 M=EGR_1588_SA TSE=F SLTH=T; 360 tr 71 M=EGR_1588_SA TSE=T SLTH=T; 361 tr 71 M=EGR_1588_SA TSE=T SLTH=F; 362 echo " EGR_DSCP_ECN_MAP"; 363 tr 50 M=EGR_DSCP_ECN_MAP; 364 tr 51 M=EGR_DSCP_ECN_MAP; 365 tr 52 M=EGR_DSCP_ECN_MAP; 366 tr 71 M=EGR_DSCP_ECN_MAP TSE=F SLTH=T; 367 tr 71 M=EGR_DSCP_ECN_MAP TSE=T SLTH=T; 368 tr 71 M=EGR_DSCP_ECN_MAP TSE=T SLTH=F; 369 echo " EGR_DSCP_TABLE"; 370 tr 50 M=EGR_DSCP_TABLE; 371 tr 51 M=EGR_DSCP_TABLE; 372 tr 52 M=EGR_DSCP_TABLE; 373 tr 71 M=EGR_DSCP_TABLE TSE=F SLTH=T; 374 tr 71 M=EGR_DSCP_TABLE TSE=T SLTH=T; 375 tr 71 M=EGR_DSCP_TABLE TSE=T SLTH=F; 376 echo " EGR_DVP_ATTRIBUTE"; 377 tr 50 M=EGR_DVP_ATTRIBUTE; 378 tr 51 M=EGR_DVP_ATTRIBUTE; 379 tr 52 M=EGR_DVP_ATTRIBUTE; 380 tr 71 M=EGR_DVP_ATTRIBUTE TSE=F SLTH=T; 381 tr 71 M=EGR_DVP_ATTRIBUTE TSE=T SLTH=T; 382 tr 71 M=EGR_DVP_ATTRIBUTE TSE=T SLTH=F; 383 echo " EGR_EM_MTP_INDEX"; 384 tr 50 M=EGR_EM_MTP_INDEX; 385 tr 51 M=EGR_EM_MTP_INDEX; 386 tr 52 M=EGR_EM_MTP_INDEX; 387 tr 71 M=EGR_EM_MTP_INDEX TSE=F SLTH=T; 388 tr 71 M=EGR_EM_MTP_INDEX TSE=T SLTH=T; 389 tr 71 M=EGR_EM_MTP_INDEX TSE=T SLTH=F; 390 echo " EGR_ENABLE"; 391 tr 50 M=EGR_ENABLE; 392 tr 51 M=EGR_ENABLE; 393 tr 52 M=EGR_ENABLE; 394 tr 71 M=EGR_ENABLE TSE=F SLTH=T; 395 tr 71 M=EGR_ENABLE TSE=T SLTH=T; 396 tr 71 M=EGR_ENABLE TSE=T SLTH=F; 397 echo " EGR_FLEX_CTR_COUNTER_TABLE_0"; 398 tr 50 M=EGR_FLEX_CTR_COUNTER_TABLE_0; 399 tr 51 M=EGR_FLEX_CTR_COUNTER_TABLE_0; 400 tr 52 M=EGR_FLEX_CTR_COUNTER_TABLE_0; 401 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_0 TSE=F SLTH=T; 402 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_0 TSE=T SLTH=T; 403 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_0 TSE=T SLTH=F; 404 echo " EGR_FLEX_CTR_COUNTER_TABLE_1"; 405 tr 50 M=EGR_FLEX_CTR_COUNTER_TABLE_1; 406 tr 51 M=EGR_FLEX_CTR_COUNTER_TABLE_1; 407 tr 52 M=EGR_FLEX_CTR_COUNTER_TABLE_1; 408 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_1 TSE=F SLTH=T; 409 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_1 TSE=T SLTH=T; 410 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_1 TSE=T SLTH=F; 411 echo " EGR_FLEX_CTR_COUNTER_TABLE_2"; 412 tr 50 M=EGR_FLEX_CTR_COUNTER_TABLE_2; 413 tr 51 M=EGR_FLEX_CTR_COUNTER_TABLE_2; 414 tr 52 M=EGR_FLEX_CTR_COUNTER_TABLE_2; 415 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_2 TSE=F SLTH=T; 416 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_2 TSE=T SLTH=T; 417 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_2 TSE=T SLTH=F; 418 echo " EGR_FLEX_CTR_COUNTER_TABLE_3"; 419 tr 50 M=EGR_FLEX_CTR_COUNTER_TABLE_3; 420 tr 51 M=EGR_FLEX_CTR_COUNTER_TABLE_3; 421 tr 52 M=EGR_FLEX_CTR_COUNTER_TABLE_3; 422 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_3 TSE=F SLTH=T; 423 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_3 TSE=T SLTH=T; 424 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_3 TSE=T SLTH=F; 425 echo " EGR_FLEX_CTR_COUNTER_TABLE_4"; 426 tr 50 M=EGR_FLEX_CTR_COUNTER_TABLE_4; 427 tr 51 M=EGR_FLEX_CTR_COUNTER_TABLE_4; 428 tr 52 M=EGR_FLEX_CTR_COUNTER_TABLE_4; 429 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_4 TSE=F SLTH=T; 430 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_4 TSE=T SLTH=T; 431 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_4 TSE=T SLTH=F; 432 echo " EGR_FLEX_CTR_COUNTER_TABLE_5"; 433 tr 50 M=EGR_FLEX_CTR_COUNTER_TABLE_5; 434 tr 51 M=EGR_FLEX_CTR_COUNTER_TABLE_5; 435 tr 52 M=EGR_FLEX_CTR_COUNTER_TABLE_5; 436 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_5 TSE=F SLTH=T; 437 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_5 TSE=T SLTH=T; 438 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_5 TSE=T SLTH=F; 439 echo " EGR_FLEX_CTR_COUNTER_TABLE_6"; 440 tr 50 M=EGR_FLEX_CTR_COUNTER_TABLE_6; 441 tr 51 M=EGR_FLEX_CTR_COUNTER_TABLE_6; 442 tr 52 M=EGR_FLEX_CTR_COUNTER_TABLE_6; 443 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_6 TSE=F SLTH=T; 444 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_6 TSE=T SLTH=T; 445 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_6 TSE=T SLTH=F; 446 echo " EGR_FLEX_CTR_COUNTER_TABLE_7"; 447 tr 50 M=EGR_FLEX_CTR_COUNTER_TABLE_7; 448 tr 51 M=EGR_FLEX_CTR_COUNTER_TABLE_7; 449 tr 52 M=EGR_FLEX_CTR_COUNTER_TABLE_7; 450 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_7 TSE=F SLTH=T; 451 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_7 TSE=T SLTH=T; 452 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_7 TSE=T SLTH=F; 453 echo " EGR_FLEX_CTR_OFFSET_TABLE_0"; 454 tr 50 M=EGR_FLEX_CTR_OFFSET_TABLE_0; 455 tr 51 M=EGR_FLEX_CTR_OFFSET_TABLE_0; 456 tr 52 M=EGR_FLEX_CTR_OFFSET_TABLE_0; 457 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_0 TSE=F SLTH=T; 458 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_0 TSE=T SLTH=T; 459 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_0 TSE=T SLTH=F; 460 echo " EGR_FLEX_CTR_OFFSET_TABLE_1"; 461 tr 50 M=EGR_FLEX_CTR_OFFSET_TABLE_1; 462 tr 51 M=EGR_FLEX_CTR_OFFSET_TABLE_1; 463 tr 52 M=EGR_FLEX_CTR_OFFSET_TABLE_1; 464 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_1 TSE=F SLTH=T; 465 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_1 TSE=T SLTH=T; 466 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_1 TSE=T SLTH=F; 467 echo " EGR_FLEX_CTR_OFFSET_TABLE_2"; 468 tr 50 M=EGR_FLEX_CTR_OFFSET_TABLE_2; 469 tr 51 M=EGR_FLEX_CTR_OFFSET_TABLE_2; 470 tr 52 M=EGR_FLEX_CTR_OFFSET_TABLE_2; 471 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_2 TSE=F SLTH=T; 472 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_2 TSE=T SLTH=T; 473 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_2 TSE=T SLTH=F; 474 echo " EGR_FLEX_CTR_OFFSET_TABLE_3"; 475 tr 50 M=EGR_FLEX_CTR_OFFSET_TABLE_3; 476 tr 51 M=EGR_FLEX_CTR_OFFSET_TABLE_3; 477 tr 52 M=EGR_FLEX_CTR_OFFSET_TABLE_3; 478 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_3 TSE=F SLTH=T; 479 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_3 TSE=T SLTH=T; 480 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_3 TSE=T SLTH=F; 481 echo " EGR_FLEX_CTR_OFFSET_TABLE_4"; 482 tr 50 M=EGR_FLEX_CTR_OFFSET_TABLE_4; 483 tr 51 M=EGR_FLEX_CTR_OFFSET_TABLE_4; 484 tr 52 M=EGR_FLEX_CTR_OFFSET_TABLE_4; 485 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_4 TSE=F SLTH=T; 486 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_4 TSE=T SLTH=T; 487 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_4 TSE=T SLTH=F; 488 echo " EGR_FLEX_CTR_OFFSET_TABLE_5"; 489 tr 50 M=EGR_FLEX_CTR_OFFSET_TABLE_5; 490 tr 51 M=EGR_FLEX_CTR_OFFSET_TABLE_5; 491 tr 52 M=EGR_FLEX_CTR_OFFSET_TABLE_5; 492 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_5 TSE=F SLTH=T; 493 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_5 TSE=T SLTH=T; 494 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_5 TSE=T SLTH=F; 495 echo " EGR_FLEX_CTR_OFFSET_TABLE_6"; 496 tr 50 M=EGR_FLEX_CTR_OFFSET_TABLE_6; 497 tr 51 M=EGR_FLEX_CTR_OFFSET_TABLE_6; 498 tr 52 M=EGR_FLEX_CTR_OFFSET_TABLE_6; 499 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_6 TSE=F SLTH=T; 500 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_6 TSE=T SLTH=T; 501 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_6 TSE=T SLTH=F; 502 echo " EGR_FLEX_CTR_OFFSET_TABLE_7"; 503 tr 50 M=EGR_FLEX_CTR_OFFSET_TABLE_7; 504 tr 51 M=EGR_FLEX_CTR_OFFSET_TABLE_7; 505 tr 52 M=EGR_FLEX_CTR_OFFSET_TABLE_7; 506 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_7 TSE=F SLTH=T; 507 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_7 TSE=T SLTH=T; 508 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_7 TSE=T SLTH=F; 509 echo " EGR_FLEX_CTR_PKT_PRI_MAP"; 510 tr 50 M=EGR_FLEX_CTR_PKT_PRI_MAP; 511 tr 51 M=EGR_FLEX_CTR_PKT_PRI_MAP; 512 tr 52 M=EGR_FLEX_CTR_PKT_PRI_MAP; 513 tr 71 M=EGR_FLEX_CTR_PKT_PRI_MAP TSE=F SLTH=T; 514 tr 71 M=EGR_FLEX_CTR_PKT_PRI_MAP TSE=T SLTH=T; 515 tr 71 M=EGR_FLEX_CTR_PKT_PRI_MAP TSE=T SLTH=F; 516 echo " EGR_FLEX_CTR_PKT_RES_MAP"; 517 tr 50 M=EGR_FLEX_CTR_PKT_RES_MAP; 518 tr 51 M=EGR_FLEX_CTR_PKT_RES_MAP; 519 tr 52 M=EGR_FLEX_CTR_PKT_RES_MAP; 520 tr 71 M=EGR_FLEX_CTR_PKT_RES_MAP TSE=F SLTH=T; 521 tr 71 M=EGR_FLEX_CTR_PKT_RES_MAP TSE=T SLTH=T; 522 tr 71 M=EGR_FLEX_CTR_PKT_RES_MAP TSE=T SLTH=F; 523 echo " EGR_FLEX_CTR_PORT_MAP"; 524 tr 50 M=EGR_FLEX_CTR_PORT_MAP; 525 tr 51 M=EGR_FLEX_CTR_PORT_MAP; 526 tr 52 M=EGR_FLEX_CTR_PORT_MAP; 527 tr 71 M=EGR_FLEX_CTR_PORT_MAP TSE=F SLTH=T; 528 tr 71 M=EGR_FLEX_CTR_PORT_MAP TSE=T SLTH=T; 529 tr 71 M=EGR_FLEX_CTR_PORT_MAP TSE=T SLTH=F; 530 echo " EGR_FLEX_CTR_PRI_CNG_MAP"; 531 tr 50 M=EGR_FLEX_CTR_PRI_CNG_MAP; 532 tr 51 M=EGR_FLEX_CTR_PRI_CNG_MAP; 533 tr 52 M=EGR_FLEX_CTR_PRI_CNG_MAP; 534 tr 71 M=EGR_FLEX_CTR_PRI_CNG_MAP TSE=F SLTH=T; 535 tr 71 M=EGR_FLEX_CTR_PRI_CNG_MAP TSE=T SLTH=T; 536 tr 71 M=EGR_FLEX_CTR_PRI_CNG_MAP TSE=T SLTH=F; 537 echo " EGR_FLEX_CTR_TOS_MAP"; 538 tr 50 M=EGR_FLEX_CTR_TOS_MAP; 539 tr 51 M=EGR_FLEX_CTR_TOS_MAP; 540 tr 52 M=EGR_FLEX_CTR_TOS_MAP; 541 tr 71 M=EGR_FLEX_CTR_TOS_MAP TSE=F SLTH=T; 542 tr 71 M=EGR_FLEX_CTR_TOS_MAP TSE=T SLTH=T; 543 tr 71 M=EGR_FLEX_CTR_TOS_MAP TSE=T SLTH=F; 544 echo " EGR_FRAGMENT_ID_TABLE"; 545 tr 50 M=EGR_FRAGMENT_ID_TABLE; 546 tr 51 M=EGR_FRAGMENT_ID_TABLE; 547 tr 52 M=EGR_FRAGMENT_ID_TABLE; 548 tr 71 M=EGR_FRAGMENT_ID_TABLE TSE=F SLTH=T; 549 tr 71 M=EGR_FRAGMENT_ID_TABLE TSE=T SLTH=T; 550 tr 71 M=EGR_FRAGMENT_ID_TABLE TSE=T SLTH=F; 551 echo " EGR_IM_MTP_INDEX"; 552 tr 50 M=EGR_IM_MTP_INDEX; 553 tr 51 M=EGR_IM_MTP_INDEX; 554 tr 52 M=EGR_IM_MTP_INDEX; 555 tr 71 M=EGR_IM_MTP_INDEX TSE=F SLTH=T; 556 tr 71 M=EGR_IM_MTP_INDEX TSE=T SLTH=T; 557 tr 71 M=EGR_IM_MTP_INDEX TSE=T SLTH=F; 558 echo " EGR_ING_PORT"; 559 tr 50 M=EGR_ING_PORT; 560 tr 51 M=EGR_ING_PORT; 561 tr 52 M=EGR_ING_PORT; 562 tr 71 M=EGR_ING_PORT TSE=F SLTH=T; 563 tr 71 M=EGR_ING_PORT TSE=T SLTH=T; 564 tr 71 M=EGR_ING_PORT TSE=T SLTH=F; 565 echo " EGR_IPMC"; 566 tr 50 M=EGR_IPMC; 567 tr 51 M=EGR_IPMC; 568 tr 52 M=EGR_IPMC; 569 tr 71 M=EGR_IPMC TSE=F SLTH=T; 570 tr 71 M=EGR_IPMC TSE=T SLTH=T; 571 tr 71 M=EGR_IPMC TSE=T SLTH=F; 572 echo " EGR_IP_TUNNEL"; 573 tr 50 M=EGR_IP_TUNNEL; 574 tr 51 M=EGR_IP_TUNNEL; 575 tr 52 M=EGR_IP_TUNNEL; 576 tr 71 M=EGR_IP_TUNNEL TSE=F SLTH=T; 577 tr 71 M=EGR_IP_TUNNEL TSE=T SLTH=T; 578 tr 71 M=EGR_IP_TUNNEL TSE=T SLTH=F; 579 echo " EGR_IP_TUNNEL_IPV6"; 580 tr 50 M=EGR_IP_TUNNEL_IPV6; 581 tr 51 M=EGR_IP_TUNNEL_IPV6; 582 tr 52 M=EGR_IP_TUNNEL_IPV6; 583 tr 71 M=EGR_IP_TUNNEL_IPV6 TSE=F SLTH=T; 584 tr 71 M=EGR_IP_TUNNEL_IPV6 TSE=T SLTH=T; 585 tr 71 M=EGR_IP_TUNNEL_IPV6 TSE=T SLTH=F; 586 echo " EGR_IP_TUNNEL_MPLS"; 587 tr 50 M=EGR_IP_TUNNEL_MPLS; 588 tr 51 M=EGR_IP_TUNNEL_MPLS; 589 tr 52 M=EGR_IP_TUNNEL_MPLS; 590 tr 71 M=EGR_IP_TUNNEL_MPLS TSE=F SLTH=T; 591 tr 71 M=EGR_IP_TUNNEL_MPLS TSE=T SLTH=T; 592 tr 71 M=EGR_IP_TUNNEL_MPLS TSE=T SLTH=F; 593 echo " EGR_L3_INTF"; 594 tr 50 M=EGR_L3_INTF; 595 tr 51 M=EGR_L3_INTF; 596 tr 52 M=EGR_L3_INTF; 597 tr 71 M=EGR_L3_INTF TSE=F SLTH=T; 598 tr 71 M=EGR_L3_INTF TSE=T SLTH=T; 599 tr 71 M=EGR_L3_INTF TSE=T SLTH=F; 600 echo " EGR_L3_NEXT_HOP"; 601 tr 50 M=EGR_L3_NEXT_HOP; 602 tr 51 M=EGR_L3_NEXT_HOP; 603 tr 52 M=EGR_L3_NEXT_HOP; 604 tr 71 M=EGR_L3_NEXT_HOP TSE=F SLTH=T; 605 tr 71 M=EGR_L3_NEXT_HOP TSE=T SLTH=T; 606 tr 71 M=EGR_L3_NEXT_HOP TSE=T SLTH=F; 607 echo " EGR_MAC_DA_PROFILE"; 608 tr 50 M=EGR_MAC_DA_PROFILE; 609 tr 51 M=EGR_MAC_DA_PROFILE; 610 tr 52 M=EGR_MAC_DA_PROFILE; 611 tr 71 M=EGR_MAC_DA_PROFILE TSE=F SLTH=T; 612 tr 71 M=EGR_MAC_DA_PROFILE TSE=T SLTH=T; 613 tr 71 M=EGR_MAC_DA_PROFILE TSE=T SLTH=F; 614 echo " EGR_MAP_MH"; 615 tr 50 M=EGR_MAP_MH; 616 tr 51 M=EGR_MAP_MH; 617 tr 52 M=EGR_MAP_MH; 618 tr 71 M=EGR_MAP_MH TSE=F SLTH=T; 619 tr 71 M=EGR_MAP_MH TSE=T SLTH=T; 620 tr 71 M=EGR_MAP_MH TSE=T SLTH=F; 621 echo " EGR_MASK"; 622 tr 50 M=EGR_MASK; 623 tr 51 M=EGR_MASK; 624 tr 52 M=EGR_MASK; 625 tr 71 M=EGR_MASK TSE=F SLTH=T; 626 tr 71 M=EGR_MASK TSE=T SLTH=T; 627 tr 71 M=EGR_MASK TSE=T SLTH=F; 628 echo " EGR_MASK_MODBASE"; 629 tr 50 M=EGR_MASK_MODBASE; 630 tr 51 M=EGR_MASK_MODBASE; 631 tr 52 M=EGR_MASK_MODBASE; 632 tr 71 M=EGR_MASK_MODBASE TSE=F SLTH=T; 633 tr 71 M=EGR_MASK_MODBASE TSE=T SLTH=T; 634 tr 71 M=EGR_MASK_MODBASE TSE=T SLTH=F; 635 #echo " EGR_MAX_USED_ENTRIES"; 636 #tr 50 M=EGR_MAX_USED_ENTRIES; 637 #tr 51 M=EGR_MAX_USED_ENTRIES; 638 #tr 52 M=EGR_MAX_USED_ENTRIES; 639 #tr 71 M=EGR_MAX_USED_ENTRIES TSE=F SLTH=T; 640 #tr 71 M=EGR_MAX_USED_ENTRIES TSE=T SLTH=T; 641 #tr 71 M=EGR_MAX_USED_ENTRIES TSE=T SLTH=F; 642 echo " EGR_MIRROR_ENCAP_CONTROL"; 643 tr 50 M=EGR_MIRROR_ENCAP_CONTROL; 644 tr 51 M=EGR_MIRROR_ENCAP_CONTROL; 645 tr 52 M=EGR_MIRROR_ENCAP_CONTROL; 646 tr 71 M=EGR_MIRROR_ENCAP_CONTROL TSE=F SLTH=T; 647 tr 71 M=EGR_MIRROR_ENCAP_CONTROL TSE=T SLTH=T; 648 tr 71 M=EGR_MIRROR_ENCAP_CONTROL TSE=T SLTH=F; 649 echo " EGR_MIRROR_ENCAP_DATA_1"; 650 tr 50 M=EGR_MIRROR_ENCAP_DATA_1; 651 tr 51 M=EGR_MIRROR_ENCAP_DATA_1; 652 tr 52 M=EGR_MIRROR_ENCAP_DATA_1; 653 tr 71 M=EGR_MIRROR_ENCAP_DATA_1 TSE=F SLTH=T; 654 tr 71 M=EGR_MIRROR_ENCAP_DATA_1 TSE=T SLTH=T; 655 tr 71 M=EGR_MIRROR_ENCAP_DATA_1 TSE=T SLTH=F; 656 #echo " EGR_MMU_REQUESTS"; 657 #tr 50 M=EGR_MMU_REQUESTS; 658 #tr 51 M=EGR_MMU_REQUESTS; 659 #tr 52 M=EGR_MMU_REQUESTS; 660 #tr 71 M=EGR_MMU_REQUESTS TSE=F SLTH=T; 661 #tr 71 M=EGR_MMU_REQUESTS TSE=T SLTH=T; 662 #tr 71 M=EGR_MMU_REQUESTS TSE=T SLTH=F; 663 echo " EGR_MOD_MAP_TABLE"; 664 tr 50 M=EGR_MOD_MAP_TABLE; 665 tr 51 M=EGR_MOD_MAP_TABLE; 666 tr 52 M=EGR_MOD_MAP_TABLE; 667 tr 71 M=EGR_MOD_MAP_TABLE TSE=F SLTH=T; 668 tr 71 M=EGR_MOD_MAP_TABLE TSE=T SLTH=T; 669 tr 71 M=EGR_MOD_MAP_TABLE TSE=T SLTH=F; 670 echo " EGR_MPLS_EXP_MAPPING_1"; 671 tr 50 M=EGR_MPLS_EXP_MAPPING_1; 672 tr 51 M=EGR_MPLS_EXP_MAPPING_1; 673 tr 52 M=EGR_MPLS_EXP_MAPPING_1; 674 tr 71 M=EGR_MPLS_EXP_MAPPING_1 TSE=F SLTH=T; 675 tr 71 M=EGR_MPLS_EXP_MAPPING_1 TSE=T SLTH=T; 676 tr 71 M=EGR_MPLS_EXP_MAPPING_1 TSE=T SLTH=F; 677 echo " EGR_MPLS_EXP_MAPPING_2"; 678 tr 50 M=EGR_MPLS_EXP_MAPPING_2; 679 tr 51 M=EGR_MPLS_EXP_MAPPING_2; 680 tr 52 M=EGR_MPLS_EXP_MAPPING_2; 681 tr 71 M=EGR_MPLS_EXP_MAPPING_2 TSE=F SLTH=T; 682 tr 71 M=EGR_MPLS_EXP_MAPPING_2 TSE=T SLTH=T; 683 tr 71 M=EGR_MPLS_EXP_MAPPING_2 TSE=T SLTH=F; 684 echo " EGR_MPLS_EXP_PRI_MAPPING"; 685 tr 50 M=EGR_MPLS_EXP_PRI_MAPPING; 686 tr 51 M=EGR_MPLS_EXP_PRI_MAPPING; 687 tr 52 M=EGR_MPLS_EXP_PRI_MAPPING; 688 tr 71 M=EGR_MPLS_EXP_PRI_MAPPING TSE=F SLTH=T; 689 tr 71 M=EGR_MPLS_EXP_PRI_MAPPING TSE=T SLTH=T; 690 tr 71 M=EGR_MPLS_EXP_PRI_MAPPING TSE=T SLTH=F; 691 echo " EGR_MPLS_PRI_MAPPING"; 692 tr 50 M=EGR_MPLS_PRI_MAPPING; 693 tr 51 M=EGR_MPLS_PRI_MAPPING; 694 tr 52 M=EGR_MPLS_PRI_MAPPING; 695 tr 71 M=EGR_MPLS_PRI_MAPPING TSE=F SLTH=T; 696 tr 71 M=EGR_MPLS_PRI_MAPPING TSE=T SLTH=T; 697 tr 71 M=EGR_MPLS_PRI_MAPPING TSE=T SLTH=F; 698 echo " EGR_MPLS_VC_AND_SWAP_LABEL_TABLE"; 699 tr 50 M=EGR_MPLS_VC_AND_SWAP_LABEL_TABLE; 700 tr 51 M=EGR_MPLS_VC_AND_SWAP_LABEL_TABLE; 701 tr 52 M=EGR_MPLS_VC_AND_SWAP_LABEL_TABLE; 702 tr 71 M=EGR_MPLS_VC_AND_SWAP_LABEL_TABLE TSE=F SLTH=T; 703 tr 71 M=EGR_MPLS_VC_AND_SWAP_LABEL_TABLE TSE=T SLTH=T; 704 tr 71 M=EGR_MPLS_VC_AND_SWAP_LABEL_TABLE TSE=T SLTH=F; 705 #echo " EGR_PBE_DEBUG_0"; 706 #tr 50 M=EGR_PBE_DEBUG_0; 707 #tr 51 M=EGR_PBE_DEBUG_0; 708 #tr 52 M=EGR_PBE_DEBUG_0; 709 #tr 71 M=EGR_PBE_DEBUG_0 TSE=F SLTH=T; 710 #tr 71 M=EGR_PBE_DEBUG_0 TSE=T SLTH=T; 711 #tr 71 M=EGR_PBE_DEBUG_0 TSE=T SLTH=F; 712 #echo " EGR_PBE_DEBUG_1"; 713 #tr 50 M=EGR_PBE_DEBUG_1; 714 #tr 51 M=EGR_PBE_DEBUG_1; 715 #tr 52 M=EGR_PBE_DEBUG_1; 716 #tr 71 M=EGR_PBE_DEBUG_1 TSE=F SLTH=T; 717 #tr 71 M=EGR_PBE_DEBUG_1 TSE=T SLTH=T; 718 #tr 71 M=EGR_PBE_DEBUG_1 TSE=T SLTH=F; 719 echo " EGR_PORT"; 720 tr 50 M=EGR_PORT; 721 tr 51 M=EGR_PORT; 722 tr 52 M=EGR_PORT; 723 tr 71 M=EGR_PORT TSE=F SLTH=T; 724 tr 71 M=EGR_PORT TSE=T SLTH=T; 725 tr 71 M=EGR_PORT TSE=T SLTH=F; 726 #echo " EGR_PORT_REQUESTS"; 727 #tr 50 M=EGR_PORT_REQUESTS; 728 #tr 51 M=EGR_PORT_REQUESTS; 729 #tr 52 M=EGR_PORT_REQUESTS; 730 #tr 71 M=EGR_PORT_REQUESTS TSE=F SLTH=T; 731 #tr 71 M=EGR_PORT_REQUESTS TSE=T SLTH=T; 732 #tr 71 M=EGR_PORT_REQUESTS TSE=T SLTH=F; 733 echo " EGR_PRI_CNG_MAP"; 734 tr 50 M=EGR_PRI_CNG_MAP; 735 tr 51 M=EGR_PRI_CNG_MAP; 736 tr 52 M=EGR_PRI_CNG_MAP; 737 tr 71 M=EGR_PRI_CNG_MAP TSE=F SLTH=T; 738 tr 71 M=EGR_PRI_CNG_MAP TSE=T SLTH=T; 739 tr 71 M=EGR_PRI_CNG_MAP TSE=T SLTH=F; 740 echo " EGR_PW_INIT_COUNTERS"; 741 tr 50 M=EGR_PW_INIT_COUNTERS; 742 tr 51 M=EGR_PW_INIT_COUNTERS; 743 tr 52 M=EGR_PW_INIT_COUNTERS; 744 tr 71 M=EGR_PW_INIT_COUNTERS TSE=F SLTH=T; 745 tr 71 M=EGR_PW_INIT_COUNTERS TSE=T SLTH=T; 746 tr 71 M=EGR_PW_INIT_COUNTERS TSE=T SLTH=F; 747 echo " EGR_VFI"; 748 tr 50 M=EGR_VFI; 749 tr 51 M=EGR_VFI; 750 tr 52 M=EGR_VFI; 751 tr 71 M=EGR_VFI TSE=F SLTH=T; 752 tr 71 M=EGR_VFI TSE=T SLTH=T; 753 tr 71 M=EGR_VFI TSE=T SLTH=F; 754 echo " EGR_VLAN"; 755 tr 50 M=EGR_VLAN; 756 tr 51 M=EGR_VLAN; 757 tr 52 M=EGR_VLAN; 758 tr 71 M=EGR_VLAN TSE=F SLTH=T; 759 tr 71 M=EGR_VLAN TSE=T SLTH=T; 760 tr 71 M=EGR_VLAN TSE=T SLTH=F; 761 echo " EGR_VLAN_STG"; 762 tr 50 M=EGR_VLAN_STG; 763 tr 51 M=EGR_VLAN_STG; 764 tr 52 M=EGR_VLAN_STG; 765 tr 71 M=EGR_VLAN_STG TSE=F SLTH=T; 766 tr 71 M=EGR_VLAN_STG TSE=T SLTH=T; 767 tr 71 M=EGR_VLAN_STG TSE=T SLTH=F; 768 echo " EGR_VLAN_TAG_ACTION_PROFILE"; 769 tr 50 M=EGR_VLAN_TAG_ACTION_PROFILE; 770 tr 51 M=EGR_VLAN_TAG_ACTION_PROFILE; 771 tr 52 M=EGR_VLAN_TAG_ACTION_PROFILE; 772 tr 71 M=EGR_VLAN_TAG_ACTION_PROFILE TSE=F SLTH=T; 773 tr 71 M=EGR_VLAN_TAG_ACTION_PROFILE TSE=T SLTH=T; 774 tr 71 M=EGR_VLAN_TAG_ACTION_PROFILE TSE=T SLTH=F; 775 echo " EGR_VLAN_XLATE"; 776 tr 50 M=EGR_VLAN_XLATE; 777 tr 51 M=EGR_VLAN_XLATE; 778 tr 52 M=EGR_VLAN_XLATE; 779 tr 71 M=EGR_VLAN_XLATE TSE=F SLTH=T; 780 tr 71 M=EGR_VLAN_XLATE TSE=T SLTH=T; 781 tr 71 M=EGR_VLAN_XLATE TSE=T SLTH=F; 782 echo " EMIRROR_CONTROL"; 783 tr 50 M=EMIRROR_CONTROL; 784 tr 51 M=EMIRROR_CONTROL; 785 tr 52 M=EMIRROR_CONTROL; 786 tr 71 M=EMIRROR_CONTROL TSE=F SLTH=T; 787 tr 71 M=EMIRROR_CONTROL TSE=T SLTH=T; 788 tr 71 M=EMIRROR_CONTROL TSE=T SLTH=F; 789 echo " EMIRROR_CONTROL1"; 790 tr 50 M=EMIRROR_CONTROL1; 791 tr 51 M=EMIRROR_CONTROL1; 792 tr 52 M=EMIRROR_CONTROL1; 793 tr 71 M=EMIRROR_CONTROL1 TSE=F SLTH=T; 794 tr 71 M=EMIRROR_CONTROL1 TSE=T SLTH=T; 795 tr 71 M=EMIRROR_CONTROL1 TSE=T SLTH=F; 796 echo " EMIRROR_CONTROL2"; 797 tr 50 M=EMIRROR_CONTROL2; 798 tr 51 M=EMIRROR_CONTROL2; 799 tr 52 M=EMIRROR_CONTROL2; 800 tr 71 M=EMIRROR_CONTROL2 TSE=F SLTH=T; 801 tr 71 M=EMIRROR_CONTROL2 TSE=T SLTH=T; 802 tr 71 M=EMIRROR_CONTROL2 TSE=T SLTH=F; 803 echo " EMIRROR_CONTROL3"; 804 tr 50 M=EMIRROR_CONTROL3; 805 tr 51 M=EMIRROR_CONTROL3; 806 tr 52 M=EMIRROR_CONTROL3; 807 tr 71 M=EMIRROR_CONTROL3 TSE=F SLTH=T; 808 tr 71 M=EMIRROR_CONTROL3 TSE=T SLTH=T; 809 tr 71 M=EMIRROR_CONTROL3 TSE=T SLTH=F; 810 echo " EM_MTP_INDEX"; 811 tr 50 M=EM_MTP_INDEX; 812 tr 51 M=EM_MTP_INDEX; 813 tr 52 M=EM_MTP_INDEX; 814 tr 71 M=EM_MTP_INDEX TSE=F SLTH=T; 815 tr 71 M=EM_MTP_INDEX TSE=T SLTH=T; 816 tr 71 M=EM_MTP_INDEX TSE=T SLTH=F; 817 echo " EPC_LINK_BMAP"; 818 tr 50 M=EPC_LINK_BMAP; 819 #tr 51 M=EPC_LINK_BMAP; 820 #tr 52 M=EPC_LINK_BMAP; 821 tr 71 M=EPC_LINK_BMAP TSE=F SLTH=T; 822 tr 71 M=EPC_LINK_BMAP TSE=T SLTH=T; 823 tr 71 M=EPC_LINK_BMAP TSE=T SLTH=F; 824 echo " FP_COUNTER_TABLE"; 825 tr 50 M=FP_COUNTER_TABLE; 826 tr 51 M=FP_COUNTER_TABLE; 827 tr 52 M=FP_COUNTER_TABLE; 828 tr 71 M=FP_COUNTER_TABLE TSE=F SLTH=T; 829 tr 71 M=FP_COUNTER_TABLE TSE=T SLTH=T; 830 tr 71 M=FP_COUNTER_TABLE TSE=T SLTH=F; 831 echo " FP_GLOBAL_MASK_TCAM"; 832 tr 50 M=FP_GLOBAL_MASK_TCAM; 833 tr 51 M=FP_GLOBAL_MASK_TCAM; 834 tr 52 M=FP_GLOBAL_MASK_TCAM; 835 tr 71 M=FP_GLOBAL_MASK_TCAM TSE=F SLTH=T; 836 tr 71 M=FP_GLOBAL_MASK_TCAM TSE=T SLTH=T; 837 tr 71 M=FP_GLOBAL_MASK_TCAM TSE=T SLTH=F; 838 echo " FP_METER_TABLE"; 839 tr 50 M=FP_METER_TABLE; 840 tr 51 M=FP_METER_TABLE; 841 tr 52 M=FP_METER_TABLE; 842 tr 71 M=FP_METER_TABLE TSE=F SLTH=T; 843 tr 71 M=FP_METER_TABLE TSE=T SLTH=T; 844 tr 71 M=FP_METER_TABLE TSE=T SLTH=F; 845 echo " FP_POLICY_TABLE"; 846 tr 50 M=FP_POLICY_TABLE; 847 tr 51 M=FP_POLICY_TABLE; 848 tr 52 M=FP_POLICY_TABLE; 849 tr 71 M=FP_POLICY_TABLE TSE=F SLTH=T; 850 tr 71 M=FP_POLICY_TABLE TSE=T SLTH=T; 851 tr 71 M=FP_POLICY_TABLE TSE=T SLTH=F; 852 echo " FP_PORT_FIELD_SEL"; 853 tr 50 M=FP_PORT_FIELD_SEL; 854 tr 51 M=FP_PORT_FIELD_SEL; 855 tr 52 M=FP_PORT_FIELD_SEL; 856 tr 71 M=FP_PORT_FIELD_SEL TSE=F SLTH=T; 857 tr 71 M=FP_PORT_FIELD_SEL TSE=T SLTH=T; 858 tr 71 M=FP_PORT_FIELD_SEL TSE=T SLTH=F; 859 echo " FP_PORT_METER_MAP"; 860 tr 50 M=FP_PORT_METER_MAP; 861 tr 51 M=FP_PORT_METER_MAP; 862 tr 52 M=FP_PORT_METER_MAP; 863 tr 71 M=FP_PORT_METER_MAP TSE=F SLTH=T; 864 tr 71 M=FP_PORT_METER_MAP TSE=T SLTH=T; 865 tr 71 M=FP_PORT_METER_MAP TSE=T SLTH=F; 866 echo " FP_RANGE_CHECK"; 867 tr 50 M=FP_RANGE_CHECK; 868 tr 51 M=FP_RANGE_CHECK; 869 tr 52 M=FP_RANGE_CHECK; 870 tr 71 M=FP_RANGE_CHECK TSE=F SLTH=T; 871 tr 71 M=FP_RANGE_CHECK TSE=T SLTH=T; 872 tr 71 M=FP_RANGE_CHECK TSE=T SLTH=F; 873 echo " FP_SLICE_KEY_CONTROL"; 874 tr 50 M=FP_SLICE_KEY_CONTROL; 875 #tr 51 M=FP_SLICE_KEY_CONTROL; 876 #tr 52 M=FP_SLICE_KEY_CONTROL; 877 tr 71 M=FP_SLICE_KEY_CONTROL TSE=F SLTH=T; 878 tr 71 M=FP_SLICE_KEY_CONTROL TSE=T SLTH=T; 879 tr 71 M=FP_SLICE_KEY_CONTROL TSE=T SLTH=F; 880 echo " FP_SLICE_MAP"; 881 tr 50 M=FP_SLICE_MAP; 882 #tr 51 M=FP_SLICE_MAP; 883 #tr 52 M=FP_SLICE_MAP; 884 tr 71 M=FP_SLICE_MAP TSE=F SLTH=T; 885 tr 71 M=FP_SLICE_MAP TSE=T SLTH=T; 886 tr 71 M=FP_SLICE_MAP TSE=T SLTH=F; 887 echo " FP_STORM_CONTROL_METERS"; 888 tr 50 M=FP_STORM_CONTROL_METERS; 889 tr 51 M=FP_STORM_CONTROL_METERS; 890 tr 52 M=FP_STORM_CONTROL_METERS; 891 tr 71 M=FP_STORM_CONTROL_METERS TSE=F SLTH=T; 892 tr 71 M=FP_STORM_CONTROL_METERS TSE=T SLTH=T; 893 tr 71 M=FP_STORM_CONTROL_METERS TSE=T SLTH=F; 894 echo " FP_TCAM"; 895 tr 50 M=FP_TCAM; 896 tr 51 M=FP_TCAM; 897 tr 52 M=FP_TCAM; 898 tr 71 M=FP_TCAM TSE=F SLTH=T; 899 tr 71 M=FP_TCAM TSE=T SLTH=T; 900 tr 71 M=FP_TCAM TSE=T SLTH=F; 901 echo " FP_UDF_OFFSET"; 902 tr 50 M=FP_UDF_OFFSET; 903 tr 51 M=FP_UDF_OFFSET; 904 tr 52 M=FP_UDF_OFFSET; 905 tr 71 M=FP_UDF_OFFSET TSE=F SLTH=T; 906 tr 71 M=FP_UDF_OFFSET TSE=T SLTH=T; 907 tr 71 M=FP_UDF_OFFSET TSE=T SLTH=F; 908 echo " FP_UDF_TCAM"; 909 tr 50 M=FP_UDF_TCAM; 910 tr 51 M=FP_UDF_TCAM; 911 tr 52 M=FP_UDF_TCAM; 912 tr 71 M=FP_UDF_TCAM TSE=F SLTH=T; 913 tr 71 M=FP_UDF_TCAM TSE=T SLTH=T; 914 tr 71 M=FP_UDF_TCAM TSE=T SLTH=F; 915 echo " HG_TRUNK_BITMAP"; 916 tr 50 M=HG_TRUNK_BITMAP; 917 #tr 51 M=HG_TRUNK_BITMAP; 918 #tr 52 M=HG_TRUNK_BITMAP; 919 tr 71 M=HG_TRUNK_BITMAP TSE=F SLTH=T; 920 tr 71 M=HG_TRUNK_BITMAP TSE=T SLTH=T; 921 tr 71 M=HG_TRUNK_BITMAP TSE=T SLTH=F; 922 echo " HG_TRUNK_FAILOVER_ENABLE"; 923 tr 50 M=HG_TRUNK_FAILOVER_ENABLE; 924 #tr 51 M=HG_TRUNK_FAILOVER_ENABLE; 925 #tr 52 M=HG_TRUNK_FAILOVER_ENABLE; 926 tr 71 M=HG_TRUNK_FAILOVER_ENABLE TSE=F SLTH=T; 927 tr 71 M=HG_TRUNK_FAILOVER_ENABLE TSE=T SLTH=T; 928 tr 71 M=HG_TRUNK_FAILOVER_ENABLE TSE=T SLTH=F; 929 echo " HG_TRUNK_FAILOVER_SET"; 930 tr 50 M=HG_TRUNK_FAILOVER_SET; 931 tr 51 M=HG_TRUNK_FAILOVER_SET; 932 tr 52 M=HG_TRUNK_FAILOVER_SET; 933 tr 71 M=HG_TRUNK_FAILOVER_SET TSE=F SLTH=T; 934 tr 71 M=HG_TRUNK_FAILOVER_SET TSE=T SLTH=T; 935 tr 71 M=HG_TRUNK_FAILOVER_SET TSE=T SLTH=F; 936 echo " HG_TRUNK_GROUP"; 937 tr 50 M=HG_TRUNK_GROUP; 938 #tr 51 M=HG_TRUNK_GROUP; 939 #tr 52 M=HG_TRUNK_GROUP; 940 tr 71 M=HG_TRUNK_GROUP TSE=F SLTH=T; 941 tr 71 M=HG_TRUNK_GROUP TSE=T SLTH=T; 942 tr 71 M=HG_TRUNK_GROUP TSE=T SLTH=F; 943 echo " HG_TRUNK_MEMBER"; 944 tr 50 M=HG_TRUNK_MEMBER; 945 tr 51 M=HG_TRUNK_MEMBER; 946 tr 52 M=HG_TRUNK_MEMBER; 947 tr 71 M=HG_TRUNK_MEMBER TSE=F SLTH=T; 948 tr 71 M=HG_TRUNK_MEMBER TSE=T SLTH=T; 949 tr 71 M=HG_TRUNK_MEMBER TSE=T SLTH=F; 950 echo " HIGIG_TRUNK_CONTROL"; 951 tr 50 M=HIGIG_TRUNK_CONTROL; 952 #tr 51 M=HIGIG_TRUNK_CONTROL; 953 #tr 52 M=HIGIG_TRUNK_CONTROL; 954 tr 71 M=HIGIG_TRUNK_CONTROL TSE=F SLTH=T; 955 tr 71 M=HIGIG_TRUNK_CONTROL TSE=T SLTH=T; 956 tr 71 M=HIGIG_TRUNK_CONTROL TSE=T SLTH=F; 957 echo " IARB_TDM_TABLE"; 958 tr 50 M=IARB_TDM_TABLE; 959 tr 51 M=IARB_TDM_TABLE; 960 tr 52 M=IARB_TDM_TABLE; 961 tr 71 M=IARB_TDM_TABLE TSE=F SLTH=T; 962 tr 71 M=IARB_TDM_TABLE TSE=T SLTH=T; 963 tr 71 M=IARB_TDM_TABLE TSE=T SLTH=F; 964 echo " ICONTROL_OPCODE_BITMAP"; 965 tr 50 M=ICONTROL_OPCODE_BITMAP; 966 tr 51 M=ICONTROL_OPCODE_BITMAP; 967 tr 52 M=ICONTROL_OPCODE_BITMAP; 968 tr 71 M=ICONTROL_OPCODE_BITMAP TSE=F SLTH=T; 969 tr 71 M=ICONTROL_OPCODE_BITMAP TSE=T SLTH=T; 970 tr 71 M=ICONTROL_OPCODE_BITMAP TSE=T SLTH=F; 971 echo " IFP_REDIRECTION_PROFILE"; 972 tr 50 M=IFP_REDIRECTION_PROFILE; 973 tr 51 M=IFP_REDIRECTION_PROFILE; 974 tr 52 M=IFP_REDIRECTION_PROFILE; 975 tr 71 M=IFP_REDIRECTION_PROFILE TSE=F SLTH=T; 976 tr 71 M=IFP_REDIRECTION_PROFILE TSE=T SLTH=T; 977 tr 71 M=IFP_REDIRECTION_PROFILE TSE=T SLTH=F; 978 echo " IMIRROR_BITMAP"; 979 tr 50 M=IMIRROR_BITMAP; 980 tr 51 M=IMIRROR_BITMAP; 981 tr 52 M=IMIRROR_BITMAP; 982 tr 71 M=IMIRROR_BITMAP TSE=F SLTH=T; 983 tr 71 M=IMIRROR_BITMAP TSE=T SLTH=T; 984 tr 71 M=IMIRROR_BITMAP TSE=T SLTH=F; 985 echo " IM_MTP_INDEX"; 986 tr 50 M=IM_MTP_INDEX; 987 tr 51 M=IM_MTP_INDEX; 988 tr 52 M=IM_MTP_INDEX; 989 tr 71 M=IM_MTP_INDEX TSE=F SLTH=T; 990 tr 71 M=IM_MTP_INDEX TSE=T SLTH=T; 991 tr 71 M=IM_MTP_INDEX TSE=T SLTH=F; 992 echo " ING_1588_TS_DISPOSITION_PROFILE_TABLE"; 993 tr 50 M=ING_1588_TS_DISPOSITION_PROFILE_TABLE; 994 tr 51 M=ING_1588_TS_DISPOSITION_PROFILE_TABLE; 995 tr 52 M=ING_1588_TS_DISPOSITION_PROFILE_TABLE; 996 tr 71 M=ING_1588_TS_DISPOSITION_PROFILE_TABLE TSE=F SLTH=T; 997 tr 71 M=ING_1588_TS_DISPOSITION_PROFILE_TABLE TSE=T SLTH=T; 998 tr 71 M=ING_1588_TS_DISPOSITION_PROFILE_TABLE TSE=T SLTH=F; 999 echo " ING_DVP_TABLE"; 1000 tr 50 M=ING_DVP_TABLE; 1001 tr 51 M=ING_DVP_TABLE; 1002 tr 52 M=ING_DVP_TABLE; 1003 tr 71 M=ING_DVP_TABLE TSE=F SLTH=T; 1004 tr 71 M=ING_DVP_TABLE TSE=T SLTH=T; 1005 tr 71 M=ING_DVP_TABLE TSE=T SLTH=F; 1006 echo " ING_EGRMSKBMAP"; 1007 tr 50 M=ING_EGRMSKBMAP; 1008 tr 51 M=ING_EGRMSKBMAP; 1009 tr 52 M=ING_EGRMSKBMAP; 1010 tr 71 M=ING_EGRMSKBMAP TSE=F SLTH=T; 1011 tr 71 M=ING_EGRMSKBMAP TSE=T SLTH=T; 1012 tr 71 M=ING_EGRMSKBMAP TSE=T SLTH=F; 1013 echo " ING_EN_EFILTER_BITMAP"; 1014 tr 50 M=ING_EN_EFILTER_BITMAP; 1015 #tr 51 M=ING_EN_EFILTER_BITMAP; 1016 #tr 52 M=ING_EN_EFILTER_BITMAP; 1017 tr 71 M=ING_EN_EFILTER_BITMAP TSE=F SLTH=T; 1018 tr 71 M=ING_EN_EFILTER_BITMAP TSE=T SLTH=T; 1019 tr 71 M=ING_EN_EFILTER_BITMAP TSE=T SLTH=F; 1020 echo " ING_FLEX_CTR_COUNTER_TABLE_0"; 1021 tr 50 M=ING_FLEX_CTR_COUNTER_TABLE_0; 1022 tr 51 M=ING_FLEX_CTR_COUNTER_TABLE_0; 1023 tr 52 M=ING_FLEX_CTR_COUNTER_TABLE_0; 1024 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_0 TSE=F SLTH=T; 1025 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_0 TSE=T SLTH=T; 1026 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_0 TSE=T SLTH=F; 1027 echo " ING_FLEX_CTR_COUNTER_TABLE_1"; 1028 tr 50 M=ING_FLEX_CTR_COUNTER_TABLE_1; 1029 tr 51 M=ING_FLEX_CTR_COUNTER_TABLE_1; 1030 tr 52 M=ING_FLEX_CTR_COUNTER_TABLE_1; 1031 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_1 TSE=F SLTH=T; 1032 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_1 TSE=T SLTH=T; 1033 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_1 TSE=T SLTH=F; 1034 echo " ING_FLEX_CTR_COUNTER_TABLE_2"; 1035 tr 50 M=ING_FLEX_CTR_COUNTER_TABLE_2; 1036 tr 51 M=ING_FLEX_CTR_COUNTER_TABLE_2; 1037 tr 52 M=ING_FLEX_CTR_COUNTER_TABLE_2; 1038 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_2 TSE=F SLTH=T; 1039 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_2 TSE=T SLTH=T; 1040 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_2 TSE=T SLTH=F; 1041 echo " ING_FLEX_CTR_COUNTER_TABLE_3"; 1042 tr 50 M=ING_FLEX_CTR_COUNTER_TABLE_3; 1043 tr 51 M=ING_FLEX_CTR_COUNTER_TABLE_3; 1044 tr 52 M=ING_FLEX_CTR_COUNTER_TABLE_3; 1045 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_3 TSE=F SLTH=T; 1046 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_3 TSE=T SLTH=T; 1047 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_3 TSE=T SLTH=F; 1048 echo " ING_FLEX_CTR_COUNTER_TABLE_4"; 1049 tr 50 M=ING_FLEX_CTR_COUNTER_TABLE_4; 1050 tr 51 M=ING_FLEX_CTR_COUNTER_TABLE_4; 1051 tr 52 M=ING_FLEX_CTR_COUNTER_TABLE_4; 1052 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_4 TSE=F SLTH=T; 1053 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_4 TSE=T SLTH=T; 1054 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_4 TSE=T SLTH=F; 1055 echo " ING_FLEX_CTR_COUNTER_TABLE_5"; 1056 tr 50 M=ING_FLEX_CTR_COUNTER_TABLE_5; 1057 tr 51 M=ING_FLEX_CTR_COUNTER_TABLE_5; 1058 tr 52 M=ING_FLEX_CTR_COUNTER_TABLE_5; 1059 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_5 TSE=F SLTH=T; 1060 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_5 TSE=T SLTH=T; 1061 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_5 TSE=T SLTH=F; 1062 echo " ING_FLEX_CTR_COUNTER_TABLE_6"; 1063 tr 50 M=ING_FLEX_CTR_COUNTER_TABLE_6; 1064 tr 51 M=ING_FLEX_CTR_COUNTER_TABLE_6; 1065 tr 52 M=ING_FLEX_CTR_COUNTER_TABLE_6; 1066 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_6 TSE=F SLTH=T; 1067 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_6 TSE=T SLTH=T; 1068 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_6 TSE=T SLTH=F; 1069 echo " ING_FLEX_CTR_COUNTER_TABLE_7"; 1070 tr 50 M=ING_FLEX_CTR_COUNTER_TABLE_7; 1071 tr 51 M=ING_FLEX_CTR_COUNTER_TABLE_7; 1072 tr 52 M=ING_FLEX_CTR_COUNTER_TABLE_7; 1073 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_7 TSE=F SLTH=T; 1074 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_7 TSE=T SLTH=T; 1075 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_7 TSE=T SLTH=F; 1076 echo " ING_FLEX_CTR_OFFSET_TABLE_0"; 1077 tr 50 M=ING_FLEX_CTR_OFFSET_TABLE_0; 1078 tr 51 M=ING_FLEX_CTR_OFFSET_TABLE_0; 1079 tr 52 M=ING_FLEX_CTR_OFFSET_TABLE_0; 1080 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_0 TSE=F SLTH=T; 1081 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_0 TSE=T SLTH=T; 1082 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_0 TSE=T SLTH=F; 1083 echo " ING_FLEX_CTR_OFFSET_TABLE_1"; 1084 tr 50 M=ING_FLEX_CTR_OFFSET_TABLE_1; 1085 tr 51 M=ING_FLEX_CTR_OFFSET_TABLE_1; 1086 tr 52 M=ING_FLEX_CTR_OFFSET_TABLE_1; 1087 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_1 TSE=F SLTH=T; 1088 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_1 TSE=T SLTH=T; 1089 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_1 TSE=T SLTH=F; 1090 echo " ING_FLEX_CTR_OFFSET_TABLE_2"; 1091 tr 50 M=ING_FLEX_CTR_OFFSET_TABLE_2; 1092 tr 51 M=ING_FLEX_CTR_OFFSET_TABLE_2; 1093 tr 52 M=ING_FLEX_CTR_OFFSET_TABLE_2; 1094 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_2 TSE=F SLTH=T; 1095 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_2 TSE=T SLTH=T; 1096 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_2 TSE=T SLTH=F; 1097 echo " ING_FLEX_CTR_OFFSET_TABLE_3"; 1098 tr 50 M=ING_FLEX_CTR_OFFSET_TABLE_3; 1099 tr 51 M=ING_FLEX_CTR_OFFSET_TABLE_3; 1100 tr 52 M=ING_FLEX_CTR_OFFSET_TABLE_3; 1101 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_3 TSE=F SLTH=T; 1102 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_3 TSE=T SLTH=T; 1103 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_3 TSE=T SLTH=F; 1104 echo " ING_FLEX_CTR_OFFSET_TABLE_4"; 1105 tr 50 M=ING_FLEX_CTR_OFFSET_TABLE_4; 1106 tr 51 M=ING_FLEX_CTR_OFFSET_TABLE_4; 1107 tr 52 M=ING_FLEX_CTR_OFFSET_TABLE_4; 1108 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_4 TSE=F SLTH=T; 1109 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_4 TSE=T SLTH=T; 1110 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_4 TSE=T SLTH=F; 1111 echo " ING_FLEX_CTR_OFFSET_TABLE_5"; 1112 tr 50 M=ING_FLEX_CTR_OFFSET_TABLE_5; 1113 tr 51 M=ING_FLEX_CTR_OFFSET_TABLE_5; 1114 tr 52 M=ING_FLEX_CTR_OFFSET_TABLE_5; 1115 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_5 TSE=F SLTH=T; 1116 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_5 TSE=T SLTH=T; 1117 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_5 TSE=T SLTH=F; 1118 echo " ING_FLEX_CTR_OFFSET_TABLE_6"; 1119 tr 50 M=ING_FLEX_CTR_OFFSET_TABLE_6; 1120 tr 51 M=ING_FLEX_CTR_OFFSET_TABLE_6; 1121 tr 52 M=ING_FLEX_CTR_OFFSET_TABLE_6; 1122 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_6 TSE=F SLTH=T; 1123 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_6 TSE=T SLTH=T; 1124 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_6 TSE=T SLTH=F; 1125 echo " ING_FLEX_CTR_OFFSET_TABLE_7"; 1126 tr 50 M=ING_FLEX_CTR_OFFSET_TABLE_7; 1127 tr 51 M=ING_FLEX_CTR_OFFSET_TABLE_7; 1128 tr 52 M=ING_FLEX_CTR_OFFSET_TABLE_7; 1129 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_7 TSE=F SLTH=T; 1130 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_7 TSE=T SLTH=T; 1131 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_7 TSE=T SLTH=F; 1132 echo " ING_FLEX_CTR_PKT_PRI_MAP"; 1133 tr 50 M=ING_FLEX_CTR_PKT_PRI_MAP; 1134 tr 51 M=ING_FLEX_CTR_PKT_PRI_MAP; 1135 tr 52 M=ING_FLEX_CTR_PKT_PRI_MAP; 1136 tr 71 M=ING_FLEX_CTR_PKT_PRI_MAP TSE=F SLTH=T; 1137 tr 71 M=ING_FLEX_CTR_PKT_PRI_MAP TSE=T SLTH=T; 1138 tr 71 M=ING_FLEX_CTR_PKT_PRI_MAP TSE=T SLTH=F; 1139 echo " ING_FLEX_CTR_PKT_RES_MAP"; 1140 tr 50 M=ING_FLEX_CTR_PKT_RES_MAP; 1141 tr 51 M=ING_FLEX_CTR_PKT_RES_MAP; 1142 tr 52 M=ING_FLEX_CTR_PKT_RES_MAP; 1143 tr 71 M=ING_FLEX_CTR_PKT_RES_MAP TSE=F SLTH=T; 1144 tr 71 M=ING_FLEX_CTR_PKT_RES_MAP TSE=T SLTH=T; 1145 tr 71 M=ING_FLEX_CTR_PKT_RES_MAP TSE=T SLTH=F; 1146 echo " ING_FLEX_CTR_PORT_MAP"; 1147 tr 50 M=ING_FLEX_CTR_PORT_MAP; 1148 tr 51 M=ING_FLEX_CTR_PORT_MAP; 1149 tr 52 M=ING_FLEX_CTR_PORT_MAP; 1150 tr 71 M=ING_FLEX_CTR_PORT_MAP TSE=F SLTH=T; 1151 tr 71 M=ING_FLEX_CTR_PORT_MAP TSE=T SLTH=T; 1152 tr 71 M=ING_FLEX_CTR_PORT_MAP TSE=T SLTH=F; 1153 echo " ING_FLEX_CTR_PRI_CNG_MAP"; 1154 tr 50 M=ING_FLEX_CTR_PRI_CNG_MAP; 1155 tr 51 M=ING_FLEX_CTR_PRI_CNG_MAP; 1156 tr 52 M=ING_FLEX_CTR_PRI_CNG_MAP; 1157 tr 71 M=ING_FLEX_CTR_PRI_CNG_MAP TSE=F SLTH=T; 1158 tr 71 M=ING_FLEX_CTR_PRI_CNG_MAP TSE=T SLTH=T; 1159 tr 71 M=ING_FLEX_CTR_PRI_CNG_MAP TSE=T SLTH=F; 1160 echo " ING_FLEX_CTR_TOS_MAP"; 1161 tr 50 M=ING_FLEX_CTR_TOS_MAP; 1162 tr 51 M=ING_FLEX_CTR_TOS_MAP; 1163 tr 52 M=ING_FLEX_CTR_TOS_MAP; 1164 tr 71 M=ING_FLEX_CTR_TOS_MAP TSE=F SLTH=T; 1165 tr 71 M=ING_FLEX_CTR_TOS_MAP TSE=T SLTH=T; 1166 tr 71 M=ING_FLEX_CTR_TOS_MAP TSE=T SLTH=F; 1167 echo " ING_HIGIG_TRUNK_OVERRIDE_PROFILE"; 1168 tr 50 M=ING_HIGIG_TRUNK_OVERRIDE_PROFILE; 1169 tr 51 M=ING_HIGIG_TRUNK_OVERRIDE_PROFILE; 1170 tr 52 M=ING_HIGIG_TRUNK_OVERRIDE_PROFILE; 1171 tr 71 M=ING_HIGIG_TRUNK_OVERRIDE_PROFILE TSE=F SLTH=T; 1172 tr 71 M=ING_HIGIG_TRUNK_OVERRIDE_PROFILE TSE=T SLTH=T; 1173 tr 71 M=ING_HIGIG_TRUNK_OVERRIDE_PROFILE TSE=T SLTH=F; 1174 echo " ING_L3_NEXT_HOP"; 1175 tr 50 M=ING_L3_NEXT_HOP; 1176 tr 51 M=ING_L3_NEXT_HOP; 1177 tr 52 M=ING_L3_NEXT_HOP; 1178 tr 71 M=ING_L3_NEXT_HOP TSE=F SLTH=T; 1179 tr 71 M=ING_L3_NEXT_HOP TSE=T SLTH=T; 1180 tr 71 M=ING_L3_NEXT_HOP TSE=T SLTH=F; 1181 echo " ING_MOD_MAP_TABLE"; 1182 tr 50 M=ING_MOD_MAP_TABLE; 1183 tr 51 M=ING_MOD_MAP_TABLE; 1184 tr 52 M=ING_MOD_MAP_TABLE; 1185 tr 71 M=ING_MOD_MAP_TABLE TSE=F SLTH=T; 1186 tr 71 M=ING_MOD_MAP_TABLE TSE=T SLTH=T; 1187 tr 71 M=ING_MOD_MAP_TABLE TSE=T SLTH=F; 1188 echo " ING_MPLS_EXP_MAPPING"; 1189 tr 50 M=ING_MPLS_EXP_MAPPING; 1190 tr 51 M=ING_MPLS_EXP_MAPPING; 1191 tr 52 M=ING_MPLS_EXP_MAPPING; 1192 tr 71 M=ING_MPLS_EXP_MAPPING TSE=F SLTH=T; 1193 tr 71 M=ING_MPLS_EXP_MAPPING TSE=T SLTH=T; 1194 tr 71 M=ING_MPLS_EXP_MAPPING TSE=T SLTH=F; 1195 #echo " ING_PBI_DEBUG_0"; 1196 #tr 50 M=ING_PBI_DEBUG_0; 1197 #tr 51 M=ING_PBI_DEBUG_0; 1198 #tr 52 M=ING_PBI_DEBUG_0; 1199 #tr 71 M=ING_PBI_DEBUG_0 TSE=F SLTH=T; 1200 #tr 71 M=ING_PBI_DEBUG_0 TSE=T SLTH=T; 1201 #tr 71 M=ING_PBI_DEBUG_0 TSE=T SLTH=F; 1202 #echo " ING_PBI_DEBUG_1"; 1203 #tr 50 M=ING_PBI_DEBUG_1; 1204 #tr 51 M=ING_PBI_DEBUG_1; 1205 #tr 52 M=ING_PBI_DEBUG_1; 1206 #tr 71 M=ING_PBI_DEBUG_1 TSE=F SLTH=T; 1207 #tr 71 M=ING_PBI_DEBUG_1 TSE=T SLTH=T; 1208 #tr 71 M=ING_PBI_DEBUG_1 TSE=T SLTH=F; 1209 echo " ING_PRI_CNG_MAP"; 1210 tr 50 M=ING_PRI_CNG_MAP; 1211 tr 51 M=ING_PRI_CNG_MAP; 1212 tr 52 M=ING_PRI_CNG_MAP; 1213 tr 71 M=ING_PRI_CNG_MAP TSE=F SLTH=T; 1214 tr 71 M=ING_PRI_CNG_MAP TSE=T SLTH=T; 1215 tr 71 M=ING_PRI_CNG_MAP TSE=T SLTH=F; 1216 echo " ING_PW_TERM_SEQ_NUM"; 1217 tr 50 M=ING_PW_TERM_SEQ_NUM; 1218 tr 51 M=ING_PW_TERM_SEQ_NUM; 1219 tr 52 M=ING_PW_TERM_SEQ_NUM; 1220 tr 71 M=ING_PW_TERM_SEQ_NUM TSE=F SLTH=T; 1221 tr 71 M=ING_PW_TERM_SEQ_NUM TSE=T SLTH=T; 1222 tr 71 M=ING_PW_TERM_SEQ_NUM TSE=T SLTH=F; 1223 echo " ING_QUEUE_MAP"; 1224 tr 50 M=ING_QUEUE_MAP; 1225 tr 51 M=ING_QUEUE_MAP; 1226 tr 52 M=ING_QUEUE_MAP; 1227 tr 71 M=ING_QUEUE_MAP TSE=F SLTH=T; 1228 tr 71 M=ING_QUEUE_MAP TSE=T SLTH=T; 1229 tr 71 M=ING_QUEUE_MAP TSE=T SLTH=F; 1230 echo " ING_QUEUE_OFFSET_MAPPING_TABLE"; 1231 tr 50 M=ING_QUEUE_OFFSET_MAPPING_TABLE; 1232 tr 51 M=ING_QUEUE_OFFSET_MAPPING_TABLE; 1233 tr 52 M=ING_QUEUE_OFFSET_MAPPING_TABLE; 1234 tr 71 M=ING_QUEUE_OFFSET_MAPPING_TABLE TSE=F SLTH=T; 1235 tr 71 M=ING_QUEUE_OFFSET_MAPPING_TABLE TSE=T SLTH=T; 1236 tr 71 M=ING_QUEUE_OFFSET_MAPPING_TABLE TSE=T SLTH=F; 1237 echo " ING_SERVICE_PRI_MAP"; 1238 tr 50 M=ING_SERVICE_PRI_MAP; 1239 tr 51 M=ING_SERVICE_PRI_MAP; 1240 tr 52 M=ING_SERVICE_PRI_MAP; 1241 tr 71 M=ING_SERVICE_PRI_MAP TSE=F SLTH=T; 1242 tr 71 M=ING_SERVICE_PRI_MAP TSE=T SLTH=T; 1243 tr 71 M=ING_SERVICE_PRI_MAP TSE=T SLTH=F; 1244 echo " ING_SVM_PKT_PRI_MAP"; 1245 tr 50 M=ING_SVM_PKT_PRI_MAP; 1246 tr 51 M=ING_SVM_PKT_PRI_MAP; 1247 tr 52 M=ING_SVM_PKT_PRI_MAP; 1248 tr 71 M=ING_SVM_PKT_PRI_MAP TSE=F SLTH=T; 1249 tr 71 M=ING_SVM_PKT_PRI_MAP TSE=T SLTH=T; 1250 tr 71 M=ING_SVM_PKT_PRI_MAP TSE=T SLTH=F; 1251 echo " ING_SVM_PKT_RES_MAP"; 1252 tr 50 M=ING_SVM_PKT_RES_MAP; 1253 tr 51 M=ING_SVM_PKT_RES_MAP; 1254 tr 52 M=ING_SVM_PKT_RES_MAP; 1255 tr 71 M=ING_SVM_PKT_RES_MAP TSE=F SLTH=T; 1256 tr 71 M=ING_SVM_PKT_RES_MAP TSE=T SLTH=T; 1257 tr 71 M=ING_SVM_PKT_RES_MAP TSE=T SLTH=F; 1258 echo " ING_SVM_PORT_MAP"; 1259 tr 50 M=ING_SVM_PORT_MAP; 1260 tr 51 M=ING_SVM_PORT_MAP; 1261 tr 52 M=ING_SVM_PORT_MAP; 1262 tr 71 M=ING_SVM_PORT_MAP TSE=F SLTH=T; 1263 tr 71 M=ING_SVM_PORT_MAP TSE=T SLTH=T; 1264 tr 71 M=ING_SVM_PORT_MAP TSE=T SLTH=F; 1265 echo " ING_SVM_PRI_CNG_MAP"; 1266 tr 50 M=ING_SVM_PRI_CNG_MAP; 1267 tr 51 M=ING_SVM_PRI_CNG_MAP; 1268 tr 52 M=ING_SVM_PRI_CNG_MAP; 1269 tr 71 M=ING_SVM_PRI_CNG_MAP TSE=F SLTH=T; 1270 tr 71 M=ING_SVM_PRI_CNG_MAP TSE=T SLTH=T; 1271 tr 71 M=ING_SVM_PRI_CNG_MAP TSE=T SLTH=F; 1272 echo " ING_SVM_TOS_MAP"; 1273 tr 50 M=ING_SVM_TOS_MAP; 1274 tr 51 M=ING_SVM_TOS_MAP; 1275 tr 52 M=ING_SVM_TOS_MAP; 1276 tr 71 M=ING_SVM_TOS_MAP TSE=F SLTH=T; 1277 tr 71 M=ING_SVM_TOS_MAP TSE=T SLTH=T; 1278 tr 71 M=ING_SVM_TOS_MAP TSE=T SLTH=F; 1279 echo " ING_UNTAGGED_PHB"; 1280 tr 50 M=ING_UNTAGGED_PHB; 1281 tr 51 M=ING_UNTAGGED_PHB; 1282 tr 52 M=ING_UNTAGGED_PHB; 1283 tr 71 M=ING_UNTAGGED_PHB TSE=F SLTH=T; 1284 tr 71 M=ING_UNTAGGED_PHB TSE=T SLTH=T; 1285 tr 71 M=ING_UNTAGGED_PHB TSE=T SLTH=F; 1286 echo " ING_VLAN_RANGE"; 1287 tr 50 M=ING_VLAN_RANGE; 1288 tr 51 M=ING_VLAN_RANGE; 1289 tr 52 M=ING_VLAN_RANGE; 1290 tr 71 M=ING_VLAN_RANGE TSE=F SLTH=T; 1291 tr 71 M=ING_VLAN_RANGE TSE=T SLTH=T; 1292 tr 71 M=ING_VLAN_RANGE TSE=T SLTH=F; 1293 echo " ING_VLAN_TAG_ACTION_PROFILE"; 1294 tr 50 M=ING_VLAN_TAG_ACTION_PROFILE; 1295 tr 51 M=ING_VLAN_TAG_ACTION_PROFILE; 1296 tr 52 M=ING_VLAN_TAG_ACTION_PROFILE; 1297 tr 71 M=ING_VLAN_TAG_ACTION_PROFILE TSE=F SLTH=T; 1298 tr 71 M=ING_VLAN_TAG_ACTION_PROFILE TSE=T SLTH=T; 1299 tr 71 M=ING_VLAN_TAG_ACTION_PROFILE TSE=T SLTH=F; 1300 echo " INITIAL_ING_L3_NEXT_HOP"; 1301 tr 50 M=INITIAL_ING_L3_NEXT_HOP; 1302 tr 51 M=INITIAL_ING_L3_NEXT_HOP; 1303 tr 52 M=INITIAL_ING_L3_NEXT_HOP; 1304 tr 71 M=INITIAL_ING_L3_NEXT_HOP TSE=F SLTH=T; 1305 tr 71 M=INITIAL_ING_L3_NEXT_HOP TSE=T SLTH=T; 1306 tr 71 M=INITIAL_ING_L3_NEXT_HOP TSE=T SLTH=F; 1307 echo " INITIAL_L3_ECMP"; 1308 tr 50 M=INITIAL_L3_ECMP; 1309 tr 51 M=INITIAL_L3_ECMP; 1310 tr 52 M=INITIAL_L3_ECMP; 1311 tr 71 M=INITIAL_L3_ECMP TSE=F SLTH=T; 1312 tr 71 M=INITIAL_L3_ECMP TSE=T SLTH=T; 1313 tr 71 M=INITIAL_L3_ECMP TSE=T SLTH=F; 1314 echo " INITIAL_L3_ECMP_GROUP"; 1315 tr 50 M=INITIAL_L3_ECMP_GROUP; 1316 tr 51 M=INITIAL_L3_ECMP_GROUP; 1317 tr 52 M=INITIAL_L3_ECMP_GROUP; 1318 tr 71 M=INITIAL_L3_ECMP_GROUP TSE=F SLTH=T; 1319 tr 71 M=INITIAL_L3_ECMP_GROUP TSE=T SLTH=T; 1320 tr 71 M=INITIAL_L3_ECMP_GROUP TSE=T SLTH=F; 1321 echo " INITIAL_PROT_GROUP_TABLE"; 1322 tr 50 M=INITIAL_PROT_GROUP_TABLE; 1323 tr 51 M=INITIAL_PROT_GROUP_TABLE; 1324 tr 52 M=INITIAL_PROT_GROUP_TABLE; 1325 tr 71 M=INITIAL_PROT_GROUP_TABLE TSE=F SLTH=T; 1326 tr 71 M=INITIAL_PROT_GROUP_TABLE TSE=T SLTH=T; 1327 tr 71 M=INITIAL_PROT_GROUP_TABLE TSE=T SLTH=F; 1328 echo " INITIAL_PROT_NHI_TABLE"; 1329 tr 50 M=INITIAL_PROT_NHI_TABLE; 1330 tr 51 M=INITIAL_PROT_NHI_TABLE; 1331 tr 52 M=INITIAL_PROT_NHI_TABLE; 1332 tr 71 M=INITIAL_PROT_NHI_TABLE TSE=F SLTH=T; 1333 tr 71 M=INITIAL_PROT_NHI_TABLE TSE=T SLTH=T; 1334 tr 71 M=INITIAL_PROT_NHI_TABLE TSE=T SLTH=F; 1335 echo " IPV4_IN_IPV6_PREFIX_MATCH_TABLE"; 1336 tr 50 M=IPV4_IN_IPV6_PREFIX_MATCH_TABLE; 1337 tr 51 M=IPV4_IN_IPV6_PREFIX_MATCH_TABLE; 1338 tr 52 M=IPV4_IN_IPV6_PREFIX_MATCH_TABLE; 1339 tr 71 M=IPV4_IN_IPV6_PREFIX_MATCH_TABLE TSE=F SLTH=T; 1340 tr 71 M=IPV4_IN_IPV6_PREFIX_MATCH_TABLE TSE=T SLTH=T; 1341 tr 71 M=IPV4_IN_IPV6_PREFIX_MATCH_TABLE TSE=T SLTH=F; 1342 echo " KNOWN_MCAST_BLOCK_MASK"; 1343 tr 50 M=KNOWN_MCAST_BLOCK_MASK; 1344 tr 51 M=KNOWN_MCAST_BLOCK_MASK; 1345 tr 52 M=KNOWN_MCAST_BLOCK_MASK; 1346 tr 71 M=KNOWN_MCAST_BLOCK_MASK TSE=F SLTH=T; 1347 tr 71 M=KNOWN_MCAST_BLOCK_MASK TSE=T SLTH=T; 1348 tr 71 M=KNOWN_MCAST_BLOCK_MASK TSE=T SLTH=F; 1349 echo " L2MC"; 1350 tr 50 M=L2MC; 1351 tr 51 M=L2MC; 1352 tr 52 M=L2MC; 1353 tr 71 M=L2MC TSE=F SLTH=T; 1354 tr 71 M=L2MC TSE=T SLTH=T; 1355 tr 71 M=L2MC TSE=T SLTH=F; 1356 echo " L2X"; 1357 tr 50 M=L2X; 1358 tr 51 M=L2X; 1359 tr 52 M=L2X; 1360 tr 71 M=L2X TSE=F SLTH=T; 1361 tr 71 M=L2X TSE=T SLTH=T; 1362 tr 71 M=L2X TSE=T SLTH=F; 1363 echo " L2_BULK_MATCH_DATA"; 1364 tr 50 M=L2_BULK_MATCH_DATA; 1365 #tr 51 M=L2_BULK_MATCH_DATA; 1366 #tr 52 M=L2_BULK_MATCH_DATA; 1367 tr 71 M=L2_BULK_MATCH_DATA TSE=F SLTH=T; 1368 tr 71 M=L2_BULK_MATCH_DATA TSE=T SLTH=T; 1369 tr 71 M=L2_BULK_MATCH_DATA TSE=T SLTH=F; 1370 echo " L2_BULK_MATCH_MASK"; 1371 tr 50 M=L2_BULK_MATCH_MASK; 1372 #tr 51 M=L2_BULK_MATCH_MASK; 1373 #tr 52 M=L2_BULK_MATCH_MASK; 1374 tr 71 M=L2_BULK_MATCH_MASK TSE=F SLTH=T; 1375 tr 71 M=L2_BULK_MATCH_MASK TSE=T SLTH=T; 1376 tr 71 M=L2_BULK_MATCH_MASK TSE=T SLTH=F; 1377 echo " L2_BULK_REPLACE_DATA"; 1378 tr 50 M=L2_BULK_REPLACE_DATA; 1379 #tr 51 M=L2_BULK_REPLACE_DATA; 1380 #tr 52 M=L2_BULK_REPLACE_DATA; 1381 tr 71 M=L2_BULK_REPLACE_DATA TSE=F SLTH=T; 1382 tr 71 M=L2_BULK_REPLACE_DATA TSE=T SLTH=T; 1383 tr 71 M=L2_BULK_REPLACE_DATA TSE=T SLTH=F; 1384 echo " L2_BULK_REPLACE_MASK"; 1385 tr 50 M=L2_BULK_REPLACE_MASK; 1386 #tr 51 M=L2_BULK_REPLACE_MASK; 1387 #tr 52 M=L2_BULK_REPLACE_MASK; 1388 tr 71 M=L2_BULK_REPLACE_MASK TSE=F SLTH=T; 1389 tr 71 M=L2_BULK_REPLACE_MASK TSE=T SLTH=T; 1390 tr 71 M=L2_BULK_REPLACE_MASK TSE=T SLTH=F; 1391 echo " L2_ENTRY_ONLY"; 1392 tr 50 M=L2_ENTRY_ONLY; 1393 tr 51 M=L2_ENTRY_ONLY; 1394 tr 52 M=L2_ENTRY_ONLY; 1395 tr 71 M=L2_ENTRY_ONLY TSE=F SLTH=T; 1396 tr 71 M=L2_ENTRY_ONLY TSE=T SLTH=T; 1397 tr 71 M=L2_ENTRY_ONLY TSE=T SLTH=F; 1398 echo " L2_ENTRY_OVERFLOW"; 1399 tr 50 M=L2_ENTRY_OVERFLOW; 1400 #tr 51 M=L2_ENTRY_OVERFLOW; 1401 #tr 52 M=L2_ENTRY_OVERFLOW; 1402 tr 71 M=L2_ENTRY_OVERFLOW TSE=F SLTH=T; 1403 tr 71 M=L2_ENTRY_OVERFLOW TSE=T SLTH=T; 1404 tr 71 M=L2_ENTRY_OVERFLOW TSE=T SLTH=F; 1405 echo " L2_HITDA_ONLY"; 1406 tr 50 M=L2_HITDA_ONLY; 1407 tr 51 M=L2_HITDA_ONLY; 1408 tr 52 M=L2_HITDA_ONLY; 1409 tr 71 M=L2_HITDA_ONLY TSE=F SLTH=T; 1410 tr 71 M=L2_HITDA_ONLY TSE=T SLTH=T; 1411 tr 71 M=L2_HITDA_ONLY TSE=T SLTH=F; 1412 echo " L2_HITSA_ONLY"; 1413 tr 50 M=L2_HITSA_ONLY; 1414 tr 51 M=L2_HITSA_ONLY; 1415 tr 52 M=L2_HITSA_ONLY; 1416 tr 71 M=L2_HITSA_ONLY TSE=F SLTH=T; 1417 tr 71 M=L2_HITSA_ONLY TSE=T SLTH=T; 1418 tr 71 M=L2_HITSA_ONLY TSE=T SLTH=F; 1419 echo " L2_MOD_FIFO"; 1420 tr 50 M=L2_MOD_FIFO; 1421 tr 51 M=L2_MOD_FIFO; 1422 tr 52 M=L2_MOD_FIFO; 1423 tr 71 M=L2_MOD_FIFO TSE=F SLTH=T; 1424 tr 71 M=L2_MOD_FIFO TSE=T SLTH=T; 1425 tr 71 M=L2_MOD_FIFO TSE=T SLTH=F; 1426 echo " L2_USER_ENTRY"; 1427 tr 50 M=L2_USER_ENTRY; 1428 tr 51 M=L2_USER_ENTRY; 1429 tr 52 M=L2_USER_ENTRY; 1430 tr 71 M=L2_USER_ENTRY TSE=F SLTH=T; 1431 tr 71 M=L2_USER_ENTRY TSE=T SLTH=T; 1432 tr 71 M=L2_USER_ENTRY TSE=T SLTH=F; 1433 echo " L2_USER_ENTRY_DATA_ONLY"; 1434 tr 50 M=L2_USER_ENTRY_DATA_ONLY; 1435 tr 51 M=L2_USER_ENTRY_DATA_ONLY; 1436 tr 52 M=L2_USER_ENTRY_DATA_ONLY; 1437 tr 71 M=L2_USER_ENTRY_DATA_ONLY TSE=F SLTH=T; 1438 tr 71 M=L2_USER_ENTRY_DATA_ONLY TSE=T SLTH=T; 1439 tr 71 M=L2_USER_ENTRY_DATA_ONLY TSE=T SLTH=F; 1440 echo " L2_USER_ENTRY_ONLY"; 1441 tr 50 M=L2_USER_ENTRY_ONLY; 1442 tr 51 M=L2_USER_ENTRY_ONLY; 1443 tr 52 M=L2_USER_ENTRY_ONLY; 1444 tr 71 M=L2_USER_ENTRY_ONLY TSE=F SLTH=T; 1445 tr 71 M=L2_USER_ENTRY_ONLY TSE=T SLTH=T; 1446 tr 71 M=L2_USER_ENTRY_ONLY TSE=T SLTH=F; 1447 echo " L3_DEFIP"; 1448 tr 50 M=L3_DEFIP; 1449 tr 51 M=L3_DEFIP; 1450 tr 52 M=L3_DEFIP; 1451 tr 71 M=L3_DEFIP TSE=F SLTH=T; 1452 tr 71 M=L3_DEFIP TSE=T SLTH=T; 1453 tr 71 M=L3_DEFIP TSE=T SLTH=F; 1454 echo " L3_DEFIP_128"; 1455 tr 50 M=L3_DEFIP_128; 1456 tr 51 M=L3_DEFIP_128; 1457 tr 52 M=L3_DEFIP_128; 1458 tr 71 M=L3_DEFIP_128 TSE=F SLTH=T; 1459 tr 71 M=L3_DEFIP_128 TSE=T SLTH=T; 1460 tr 71 M=L3_DEFIP_128 TSE=T SLTH=F; 1461 echo " L3_DEFIP_128_DATA_ONLY"; 1462 tr 50 M=L3_DEFIP_128_DATA_ONLY; 1463 tr 51 M=L3_DEFIP_128_DATA_ONLY; 1464 tr 52 M=L3_DEFIP_128_DATA_ONLY; 1465 tr 71 M=L3_DEFIP_128_DATA_ONLY TSE=F SLTH=T; 1466 tr 71 M=L3_DEFIP_128_DATA_ONLY TSE=T SLTH=T; 1467 tr 71 M=L3_DEFIP_128_DATA_ONLY TSE=T SLTH=F; 1468 echo " L3_DEFIP_128_HIT_ONLY"; 1469 tr 50 M=L3_DEFIP_128_HIT_ONLY; 1470 tr 51 M=L3_DEFIP_128_HIT_ONLY; 1471 tr 52 M=L3_DEFIP_128_HIT_ONLY; 1472 tr 71 M=L3_DEFIP_128_HIT_ONLY TSE=F SLTH=T; 1473 tr 71 M=L3_DEFIP_128_HIT_ONLY TSE=T SLTH=T; 1474 tr 71 M=L3_DEFIP_128_HIT_ONLY TSE=T SLTH=F; 1475 echo " L3_DEFIP_128_ONLY"; 1476 tr 50 M=L3_DEFIP_128_ONLY; 1477 tr 51 M=L3_DEFIP_128_ONLY; 1478 tr 52 M=L3_DEFIP_128_ONLY; 1479 tr 71 M=L3_DEFIP_128_ONLY TSE=F SLTH=T; 1480 tr 71 M=L3_DEFIP_128_ONLY TSE=T SLTH=T; 1481 tr 71 M=L3_DEFIP_128_ONLY TSE=T SLTH=F; 1482 echo " L3_DEFIP_DATA_ONLY"; 1483 tr 50 M=L3_DEFIP_DATA_ONLY; 1484 tr 51 M=L3_DEFIP_DATA_ONLY; 1485 tr 52 M=L3_DEFIP_DATA_ONLY; 1486 tr 71 M=L3_DEFIP_DATA_ONLY TSE=F SLTH=T; 1487 tr 71 M=L3_DEFIP_DATA_ONLY TSE=T SLTH=T; 1488 tr 71 M=L3_DEFIP_DATA_ONLY TSE=T SLTH=F; 1489 echo " L3_DEFIP_HIT_ONLY"; 1490 tr 50 M=L3_DEFIP_HIT_ONLY; 1491 tr 51 M=L3_DEFIP_HIT_ONLY; 1492 tr 52 M=L3_DEFIP_HIT_ONLY; 1493 tr 71 M=L3_DEFIP_HIT_ONLY TSE=F SLTH=T; 1494 tr 71 M=L3_DEFIP_HIT_ONLY TSE=T SLTH=T; 1495 tr 71 M=L3_DEFIP_HIT_ONLY TSE=T SLTH=F; 1496 echo " L3_DEFIP_ONLY"; 1497 tr 50 M=L3_DEFIP_ONLY; 1498 tr 51 M=L3_DEFIP_ONLY; 1499 tr 52 M=L3_DEFIP_ONLY; 1500 tr 71 M=L3_DEFIP_ONLY TSE=F SLTH=T; 1501 tr 71 M=L3_DEFIP_ONLY TSE=T SLTH=T; 1502 tr 71 M=L3_DEFIP_ONLY TSE=T SLTH=F; 1503 ktsanity_ecc_off.soc 1504 echo " L3_DEFIP_PAIR_128"; 1505 tr 50 M=L3_DEFIP_PAIR_128; 1506 tr 51 M=L3_DEFIP_PAIR_128; 1507 tr 52 M=L3_DEFIP_PAIR_128; 1508 tr 71 M=L3_DEFIP_PAIR_128 TSE=F SLTH=T; 1509 tr 71 M=L3_DEFIP_PAIR_128 TSE=T SLTH=T; 1510 tr 71 M=L3_DEFIP_PAIR_128 TSE=T SLTH=F; 1511 echo " L3_DEFIP_PAIR_128_DATA_ONLY"; 1512 tr 50 M=L3_DEFIP_PAIR_128_DATA_ONLY; 1513 tr 51 M=L3_DEFIP_PAIR_128_DATA_ONLY; 1514 tr 52 M=L3_DEFIP_PAIR_128_DATA_ONLY; 1515 tr 71 M=L3_DEFIP_PAIR_128_DATA_ONLY TSE=F SLTH=T; 1516 tr 71 M=L3_DEFIP_PAIR_128_DATA_ONLY TSE=T SLTH=T; 1517 tr 71 M=L3_DEFIP_PAIR_128_DATA_ONLY TSE=T SLTH=F; 1518 echo " L3_DEFIP_PAIR_128_HIT_ONLY"; 1519 tr 50 M=L3_DEFIP_PAIR_128_HIT_ONLY; 1520 tr 51 M=L3_DEFIP_PAIR_128_HIT_ONLY; 1521 tr 52 M=L3_DEFIP_PAIR_128_HIT_ONLY; 1522 tr 71 M=L3_DEFIP_PAIR_128_HIT_ONLY TSE=F SLTH=T; 1523 tr 71 M=L3_DEFIP_PAIR_128_HIT_ONLY TSE=T SLTH=T; 1524 tr 71 M=L3_DEFIP_PAIR_128_HIT_ONLY TSE=T SLTH=F; 1525 echo " L3_DEFIP_PAIR_128_ONLY"; 1526 tr 50 M=L3_DEFIP_PAIR_128_ONLY; 1527 tr 51 M=L3_DEFIP_PAIR_128_ONLY; 1528 tr 52 M=L3_DEFIP_PAIR_128_ONLY; 1529 tr 71 M=L3_DEFIP_PAIR_128_ONLY TSE=F SLTH=T; 1530 tr 71 M=L3_DEFIP_PAIR_128_ONLY TSE=T SLTH=T; 1531 tr 71 M=L3_DEFIP_PAIR_128_ONLY TSE=T SLTH=F; 1532 echo " L3_ECMP"; 1533 tr 50 M=L3_ECMP; 1534 tr 51 M=L3_ECMP; 1535 tr 52 M=L3_ECMP; 1536 tr 71 M=L3_ECMP TSE=F SLTH=T; 1537 tr 71 M=L3_ECMP TSE=T SLTH=T; 1538 tr 71 M=L3_ECMP TSE=T SLTH=F; 1539 echo " L3_ECMP_COUNT"; 1540 tr 50 M=L3_ECMP_COUNT; 1541 tr 51 M=L3_ECMP_COUNT; 1542 tr 52 M=L3_ECMP_COUNT; 1543 tr 71 M=L3_ECMP_COUNT TSE=F SLTH=T; 1544 tr 71 M=L3_ECMP_COUNT TSE=T SLTH=T; 1545 tr 71 M=L3_ECMP_COUNT TSE=T SLTH=F; 1546 echo " L3_ENTRY_HIT_ONLY"; 1547 tr 50 M=L3_ENTRY_HIT_ONLY; 1548 tr 51 M=L3_ENTRY_HIT_ONLY; 1549 tr 52 M=L3_ENTRY_HIT_ONLY; 1550 tr 71 M=L3_ENTRY_HIT_ONLY TSE=F SLTH=T; 1551 tr 71 M=L3_ENTRY_HIT_ONLY TSE=T SLTH=T; 1552 tr 71 M=L3_ENTRY_HIT_ONLY TSE=T SLTH=F; 1553 echo " L3_ENTRY_IPV4_MULTICAST"; 1554 tr 50 M=L3_ENTRY_IPV4_MULTICAST; 1555 tr 51 M=L3_ENTRY_IPV4_MULTICAST; 1556 tr 52 M=L3_ENTRY_IPV4_MULTICAST; 1557 tr 71 M=L3_ENTRY_IPV4_MULTICAST TSE=F SLTH=T; 1558 tr 71 M=L3_ENTRY_IPV4_MULTICAST TSE=T SLTH=T; 1559 tr 71 M=L3_ENTRY_IPV4_MULTICAST TSE=T SLTH=F; 1560 echo " L3_ENTRY_IPV4_UNICAST"; 1561 tr 50 M=L3_ENTRY_IPV4_UNICAST; 1562 tr 51 M=L3_ENTRY_IPV4_UNICAST; 1563 tr 52 M=L3_ENTRY_IPV4_UNICAST; 1564 tr 71 M=L3_ENTRY_IPV4_UNICAST TSE=F SLTH=T; 1565 tr 71 M=L3_ENTRY_IPV4_UNICAST TSE=T SLTH=T; 1566 tr 71 M=L3_ENTRY_IPV4_UNICAST TSE=T SLTH=F; 1567 echo " L3_ENTRY_IPV6_MULTICAST"; 1568 tr 50 M=L3_ENTRY_IPV6_MULTICAST; 1569 tr 51 M=L3_ENTRY_IPV6_MULTICAST; 1570 tr 52 M=L3_ENTRY_IPV6_MULTICAST; 1571 tr 71 M=L3_ENTRY_IPV6_MULTICAST TSE=F SLTH=T; 1572 tr 71 M=L3_ENTRY_IPV6_MULTICAST TSE=T SLTH=T; 1573 tr 71 M=L3_ENTRY_IPV6_MULTICAST TSE=T SLTH=F; 1574 echo " L3_ENTRY_IPV6_UNICAST"; 1575 tr 50 M=L3_ENTRY_IPV6_UNICAST; 1576 tr 51 M=L3_ENTRY_IPV6_UNICAST; 1577 tr 52 M=L3_ENTRY_IPV6_UNICAST; 1578 tr 71 M=L3_ENTRY_IPV6_UNICAST TSE=F SLTH=T; 1579 tr 71 M=L3_ENTRY_IPV6_UNICAST TSE=T SLTH=T; 1580 tr 71 M=L3_ENTRY_IPV6_UNICAST TSE=T SLTH=F; 1581 echo " L3_ENTRY_ONLY"; 1582 tr 50 M=L3_ENTRY_ONLY; 1583 tr 51 M=L3_ENTRY_ONLY; 1584 tr 52 M=L3_ENTRY_ONLY; 1585 tr 71 M=L3_ENTRY_ONLY TSE=F SLTH=T; 1586 tr 71 M=L3_ENTRY_ONLY TSE=T SLTH=T; 1587 tr 71 M=L3_ENTRY_ONLY TSE=T SLTH=F; 1588 echo " L3_IIF"; 1589 tr 50 M=L3_IIF; 1590 tr 51 M=L3_IIF; 1591 tr 52 M=L3_IIF; 1592 tr 71 M=L3_IIF TSE=F SLTH=T; 1593 tr 71 M=L3_IIF TSE=T SLTH=T; 1594 tr 71 M=L3_IIF TSE=T SLTH=F; 1595 echo " L3_IPMC"; 1596 tr 50 M=L3_IPMC; 1597 tr 51 M=L3_IPMC; 1598 tr 52 M=L3_IPMC; 1599 tr 71 M=L3_IPMC TSE=F SLTH=T; 1600 tr 71 M=L3_IPMC TSE=T SLTH=T; 1601 tr 71 M=L3_IPMC TSE=T SLTH=F; 1602 echo " L3_IPMC_1"; 1603 tr 50 M=L3_IPMC_1; 1604 tr 51 M=L3_IPMC_1; 1605 tr 52 M=L3_IPMC_1; 1606 tr 71 M=L3_IPMC_1 TSE=F SLTH=T; 1607 tr 71 M=L3_IPMC_1 TSE=T SLTH=T; 1608 tr 71 M=L3_IPMC_1 TSE=T SLTH=F; 1609 echo " L3_IPMC_REMAP"; 1610 tr 50 M=L3_IPMC_REMAP; 1611 tr 51 M=L3_IPMC_REMAP; 1612 tr 52 M=L3_IPMC_REMAP; 1613 tr 71 M=L3_IPMC_REMAP TSE=F SLTH=T; 1614 tr 71 M=L3_IPMC_REMAP TSE=T SLTH=T; 1615 tr 71 M=L3_IPMC_REMAP TSE=T SLTH=F; 1616 echo " L3_MTU_VALUES"; 1617 tr 50 M=L3_MTU_VALUES; 1618 tr 51 M=L3_MTU_VALUES; 1619 tr 52 M=L3_MTU_VALUES; 1620 tr 71 M=L3_MTU_VALUES TSE=F SLTH=T; 1621 tr 71 M=L3_MTU_VALUES TSE=T SLTH=T; 1622 tr 71 M=L3_MTU_VALUES TSE=T SLTH=F; 1623 echo " L3_TUNNEL"; 1624 tr 50 M=L3_TUNNEL; 1625 tr 51 M=L3_TUNNEL; 1626 tr 52 M=L3_TUNNEL; 1627 tr 71 M=L3_TUNNEL TSE=F SLTH=T; 1628 tr 71 M=L3_TUNNEL TSE=T SLTH=T; 1629 tr 71 M=L3_TUNNEL TSE=T SLTH=F; 1630 #echo " LINK_STATUS"; 1631 #tr 50 M=LINK_STATUS; 1632 #tr 51 M=LINK_STATUS; 1633 #tr 52 M=LINK_STATUS; 1634 #tr 71 M=LINK_STATUS TSE=F SLTH=T; 1635 #tr 71 M=LINK_STATUS TSE=T SLTH=T; 1636 #tr 71 M=LINK_STATUS TSE=T SLTH=F; 1637 echo " LLS_L0_CHILD_STATE1"; 1638 tr 50 M=LLS_L0_CHILD_STATE1; 1639 tr 51 M=LLS_L0_CHILD_STATE1; 1640 tr 52 M=LLS_L0_CHILD_STATE1; 1641 tr 71 M=LLS_L0_CHILD_STATE1 TSE=F SLTH=T; 1642 tr 71 M=LLS_L0_CHILD_STATE1 TSE=T SLTH=T; 1643 tr 71 M=LLS_L0_CHILD_STATE1 TSE=T SLTH=F; 1644 echo " LLS_L0_CHILD_WEIGHT_CFG_CNT"; 1645 tr 50 M=LLS_L0_CHILD_WEIGHT_CFG_CNT; 1646 tr 51 M=LLS_L0_CHILD_WEIGHT_CFG_CNT; 1647 tr 52 M=LLS_L0_CHILD_WEIGHT_CFG_CNT; 1648 tr 71 M=LLS_L0_CHILD_WEIGHT_CFG_CNT TSE=F SLTH=T; 1649 tr 71 M=LLS_L0_CHILD_WEIGHT_CFG_CNT TSE=T SLTH=T; 1650 tr 71 M=LLS_L0_CHILD_WEIGHT_CFG_CNT TSE=T SLTH=F; 1651 echo " LLS_L0_CONFIG"; 1652 tr 50 M=LLS_L0_CONFIG; 1653 tr 51 M=LLS_L0_CONFIG; 1654 tr 52 M=LLS_L0_CONFIG; 1655 tr 71 M=LLS_L0_CONFIG TSE=F SLTH=T; 1656 tr 71 M=LLS_L0_CONFIG TSE=T SLTH=T; 1657 tr 71 M=LLS_L0_CONFIG TSE=T SLTH=F; 1658 echo " LLS_L0_EF_NEXT"; 1659 tr 50 M=LLS_L0_EF_NEXT; 1660 tr 51 M=LLS_L0_EF_NEXT; 1661 tr 52 M=LLS_L0_EF_NEXT; 1662 tr 71 M=LLS_L0_EF_NEXT TSE=F SLTH=T; 1663 tr 71 M=LLS_L0_EF_NEXT TSE=T SLTH=T; 1664 tr 71 M=LLS_L0_EF_NEXT TSE=T SLTH=F; 1665 echo " LLS_L0_ERROR"; 1666 tr 50 M=LLS_L0_ERROR; 1667 tr 51 M=LLS_L0_ERROR; 1668 tr 52 M=LLS_L0_ERROR; 1669 tr 71 M=LLS_L0_ERROR TSE=F SLTH=T; 1670 tr 71 M=LLS_L0_ERROR TSE=T SLTH=T; 1671 tr 71 M=LLS_L0_ERROR TSE=T SLTH=F; 1672 echo " LLS_L0_HEADS_TAILS"; 1673 tr 50 M=LLS_L0_HEADS_TAILS; 1674 tr 51 M=LLS_L0_HEADS_TAILS; 1675 tr 52 M=LLS_L0_HEADS_TAILS; 1676 tr 71 M=LLS_L0_HEADS_TAILS TSE=F SLTH=T; 1677 tr 71 M=LLS_L0_HEADS_TAILS TSE=T SLTH=T; 1678 tr 71 M=LLS_L0_HEADS_TAILS TSE=T SLTH=F; 1679 #echo " LLS_L0_MIN_BUCKET_C"; 1680 #tr 50 M=LLS_L0_MIN_BUCKET_C; 1681 #tr 51 M=LLS_L0_MIN_BUCKET_C; 1682 #tr 52 M=LLS_L0_MIN_BUCKET_C; 1683 #tr 71 M=LLS_L0_MIN_BUCKET_C TSE=F SLTH=T; 1684 #tr 71 M=LLS_L0_MIN_BUCKET_C TSE=T SLTH=T; 1685 #tr 71 M=LLS_L0_MIN_BUCKET_C TSE=T SLTH=F; 1686 echo " LLS_L0_MIN_CONFIG_C"; 1687 tr 50 M=LLS_L0_MIN_CONFIG_C; 1688 tr 51 M=LLS_L0_MIN_CONFIG_C; 1689 tr 52 M=LLS_L0_MIN_CONFIG_C; 1690 tr 71 M=LLS_L0_MIN_CONFIG_C TSE=F SLTH=T; 1691 tr 71 M=LLS_L0_MIN_CONFIG_C TSE=T SLTH=T; 1692 tr 71 M=LLS_L0_MIN_CONFIG_C TSE=T SLTH=F; 1693 echo " LLS_L0_MIN_NEXT"; 1694 tr 50 M=LLS_L0_MIN_NEXT; 1695 tr 51 M=LLS_L0_MIN_NEXT; 1696 tr 52 M=LLS_L0_MIN_NEXT; 1697 tr 71 M=LLS_L0_MIN_NEXT TSE=F SLTH=T; 1698 tr 71 M=LLS_L0_MIN_NEXT TSE=T SLTH=T; 1699 tr 71 M=LLS_L0_MIN_NEXT TSE=T SLTH=F; 1700 echo " LLS_L0_PARENT"; 1701 tr 50 M=LLS_L0_PARENT; 1702 tr 51 M=LLS_L0_PARENT; 1703 tr 52 M=LLS_L0_PARENT; 1704 tr 71 M=LLS_L0_PARENT TSE=F SLTH=T; 1705 tr 71 M=LLS_L0_PARENT TSE=T SLTH=T; 1706 tr 71 M=LLS_L0_PARENT TSE=T SLTH=F; 1707 echo " LLS_L0_PARENT_STATE"; 1708 tr 50 M=LLS_L0_PARENT_STATE; 1709 tr 51 M=LLS_L0_PARENT_STATE; 1710 tr 52 M=LLS_L0_PARENT_STATE; 1711 tr 71 M=LLS_L0_PARENT_STATE TSE=F SLTH=T; 1712 tr 71 M=LLS_L0_PARENT_STATE TSE=T SLTH=T; 1713 tr 71 M=LLS_L0_PARENT_STATE TSE=T SLTH=F; 1714 #echo " LLS_L0_SHAPER_BUCKET_C"; 1715 #tr 50 M=LLS_L0_SHAPER_BUCKET_C; 1716 #tr 51 M=LLS_L0_SHAPER_BUCKET_C; 1717 #tr 52 M=LLS_L0_SHAPER_BUCKET_C; 1718 #tr 71 M=LLS_L0_SHAPER_BUCKET_C TSE=F SLTH=T; 1719 #tr 71 M=LLS_L0_SHAPER_BUCKET_C TSE=T SLTH=T; 1720 #tr 71 M=LLS_L0_SHAPER_BUCKET_C TSE=T SLTH=F; 1721 echo " LLS_L0_SHAPER_CONFIG_C"; 1722 tr 50 M=LLS_L0_SHAPER_CONFIG_C; 1723 tr 51 M=LLS_L0_SHAPER_CONFIG_C; 1724 tr 52 M=LLS_L0_SHAPER_CONFIG_C; 1725 tr 71 M=LLS_L0_SHAPER_CONFIG_C TSE=F SLTH=T; 1726 tr 71 M=LLS_L0_SHAPER_CONFIG_C TSE=T SLTH=T; 1727 tr 71 M=LLS_L0_SHAPER_CONFIG_C TSE=T SLTH=F; 1728 echo " LLS_L0_WERR_MAX_SC"; 1729 tr 50 M=LLS_L0_WERR_MAX_SC; 1730 tr 51 M=LLS_L0_WERR_MAX_SC; 1731 tr 52 M=LLS_L0_WERR_MAX_SC; 1732 tr 71 M=LLS_L0_WERR_MAX_SC TSE=F SLTH=T; 1733 tr 71 M=LLS_L0_WERR_MAX_SC TSE=T SLTH=T; 1734 tr 71 M=LLS_L0_WERR_MAX_SC TSE=T SLTH=F; 1735 echo " LLS_L0_WERR_NEXT"; 1736 tr 50 M=LLS_L0_WERR_NEXT; 1737 tr 51 M=LLS_L0_WERR_NEXT; 1738 tr 52 M=LLS_L0_WERR_NEXT; 1739 tr 71 M=LLS_L0_WERR_NEXT TSE=F SLTH=T; 1740 tr 71 M=LLS_L0_WERR_NEXT TSE=T SLTH=T; 1741 tr 71 M=LLS_L0_WERR_NEXT TSE=T SLTH=F; 1742 echo " LLS_L0_XOFF"; 1743 tr 50 M=LLS_L0_XOFF; 1744 tr 51 M=LLS_L0_XOFF; 1745 tr 52 M=LLS_L0_XOFF; 1746 tr 71 M=LLS_L0_XOFF TSE=F SLTH=T; 1747 tr 71 M=LLS_L0_XOFF TSE=T SLTH=T; 1748 tr 71 M=LLS_L0_XOFF TSE=T SLTH=F; 1749 echo " LLS_L1_CHILD_STATE1"; 1750 tr 50 M=LLS_L1_CHILD_STATE1; 1751 tr 51 M=LLS_L1_CHILD_STATE1; 1752 tr 52 M=LLS_L1_CHILD_STATE1; 1753 tr 71 M=LLS_L1_CHILD_STATE1 TSE=F SLTH=T; 1754 tr 71 M=LLS_L1_CHILD_STATE1 TSE=T SLTH=T; 1755 tr 71 M=LLS_L1_CHILD_STATE1 TSE=T SLTH=F; 1756 echo " LLS_L1_CHILD_WEIGHT_CFG_CNT"; 1757 tr 50 M=LLS_L1_CHILD_WEIGHT_CFG_CNT; 1758 tr 51 M=LLS_L1_CHILD_WEIGHT_CFG_CNT; 1759 tr 52 M=LLS_L1_CHILD_WEIGHT_CFG_CNT; 1760 tr 71 M=LLS_L1_CHILD_WEIGHT_CFG_CNT TSE=F SLTH=T; 1761 tr 71 M=LLS_L1_CHILD_WEIGHT_CFG_CNT TSE=T SLTH=T; 1762 tr 71 M=LLS_L1_CHILD_WEIGHT_CFG_CNT TSE=T SLTH=F; 1763 echo " LLS_L1_CONFIG"; 1764 tr 50 M=LLS_L1_CONFIG; 1765 tr 51 M=LLS_L1_CONFIG; 1766 tr 52 M=LLS_L1_CONFIG; 1767 tr 71 M=LLS_L1_CONFIG TSE=F SLTH=T; 1768 tr 71 M=LLS_L1_CONFIG TSE=T SLTH=T; 1769 tr 71 M=LLS_L1_CONFIG TSE=T SLTH=F; 1770 echo " LLS_L1_EF_NEXT"; 1771 tr 50 M=LLS_L1_EF_NEXT; 1772 tr 51 M=LLS_L1_EF_NEXT; 1773 tr 52 M=LLS_L1_EF_NEXT; 1774 tr 71 M=LLS_L1_EF_NEXT TSE=F SLTH=T; 1775 tr 71 M=LLS_L1_EF_NEXT TSE=T SLTH=T; 1776 tr 71 M=LLS_L1_EF_NEXT TSE=T SLTH=F; 1777 echo " LLS_L1_ERROR"; 1778 tr 50 M=LLS_L1_ERROR; 1779 tr 51 M=LLS_L1_ERROR; 1780 tr 52 M=LLS_L1_ERROR; 1781 tr 71 M=LLS_L1_ERROR TSE=F SLTH=T; 1782 tr 71 M=LLS_L1_ERROR TSE=T SLTH=T; 1783 tr 71 M=LLS_L1_ERROR TSE=T SLTH=F; 1784 echo " LLS_L1_HEADS_TAILS"; 1785 tr 50 M=LLS_L1_HEADS_TAILS; 1786 tr 51 M=LLS_L1_HEADS_TAILS; 1787 tr 52 M=LLS_L1_HEADS_TAILS; 1788 tr 71 M=LLS_L1_HEADS_TAILS TSE=F SLTH=T; 1789 tr 71 M=LLS_L1_HEADS_TAILS TSE=T SLTH=T; 1790 tr 71 M=LLS_L1_HEADS_TAILS TSE=T SLTH=F; 1791 #echo " LLS_L1_MIN_BUCKET_C"; 1792 #tr 50 M=LLS_L1_MIN_BUCKET_C; 1793 #tr 51 M=LLS_L1_MIN_BUCKET_C; 1794 #tr 52 M=LLS_L1_MIN_BUCKET_C; 1795 #tr 71 M=LLS_L1_MIN_BUCKET_C TSE=F SLTH=T; 1796 #tr 71 M=LLS_L1_MIN_BUCKET_C TSE=T SLTH=T; 1797 #tr 71 M=LLS_L1_MIN_BUCKET_C TSE=T SLTH=F; 1798 echo " LLS_L1_MIN_CONFIG_C"; 1799 tr 50 M=LLS_L1_MIN_CONFIG_C; 1800 tr 51 M=LLS_L1_MIN_CONFIG_C; 1801 tr 52 M=LLS_L1_MIN_CONFIG_C; 1802 tr 71 M=LLS_L1_MIN_CONFIG_C TSE=F SLTH=T; 1803 tr 71 M=LLS_L1_MIN_CONFIG_C TSE=T SLTH=T; 1804 tr 71 M=LLS_L1_MIN_CONFIG_C TSE=T SLTH=F; 1805 echo " LLS_L1_MIN_NEXT"; 1806 tr 50 M=LLS_L1_MIN_NEXT; 1807 tr 51 M=LLS_L1_MIN_NEXT; 1808 tr 52 M=LLS_L1_MIN_NEXT; 1809 tr 71 M=LLS_L1_MIN_NEXT TSE=F SLTH=T; 1810 tr 71 M=LLS_L1_MIN_NEXT TSE=T SLTH=T; 1811 tr 71 M=LLS_L1_MIN_NEXT TSE=T SLTH=F; 1812 echo " LLS_L1_PARENT"; 1813 tr 50 M=LLS_L1_PARENT; 1814 tr 51 M=LLS_L1_PARENT; 1815 tr 52 M=LLS_L1_PARENT; 1816 tr 71 M=LLS_L1_PARENT TSE=F SLTH=T; 1817 tr 71 M=LLS_L1_PARENT TSE=T SLTH=T; 1818 tr 71 M=LLS_L1_PARENT TSE=T SLTH=F; 1819 echo " LLS_L1_PARENT_STATE"; 1820 tr 50 M=LLS_L1_PARENT_STATE; 1821 tr 51 M=LLS_L1_PARENT_STATE; 1822 tr 52 M=LLS_L1_PARENT_STATE; 1823 tr 71 M=LLS_L1_PARENT_STATE TSE=F SLTH=T; 1824 tr 71 M=LLS_L1_PARENT_STATE TSE=T SLTH=T; 1825 tr 71 M=LLS_L1_PARENT_STATE TSE=T SLTH=F; 1826 #echo " LLS_L1_SHAPER_BUCKET_C"; 1827 #tr 50 M=LLS_L1_SHAPER_BUCKET_C; 1828 #tr 51 M=LLS_L1_SHAPER_BUCKET_C; 1829 #tr 52 M=LLS_L1_SHAPER_BUCKET_C; 1830 #tr 71 M=LLS_L1_SHAPER_BUCKET_C TSE=F SLTH=T; 1831 #tr 71 M=LLS_L1_SHAPER_BUCKET_C TSE=T SLTH=T; 1832 #tr 71 M=LLS_L1_SHAPER_BUCKET_C TSE=T SLTH=F; 1833 echo " LLS_L1_SHAPER_CONFIG_C"; 1834 tr 50 M=LLS_L1_SHAPER_CONFIG_C; 1835 tr 51 M=LLS_L1_SHAPER_CONFIG_C; 1836 tr 52 M=LLS_L1_SHAPER_CONFIG_C; 1837 tr 71 M=LLS_L1_SHAPER_CONFIG_C TSE=F SLTH=T; 1838 tr 71 M=LLS_L1_SHAPER_CONFIG_C TSE=T SLTH=T; 1839 tr 71 M=LLS_L1_SHAPER_CONFIG_C TSE=T SLTH=F; 1840 echo " LLS_L1_WERR_MAX_SC"; 1841 tr 50 M=LLS_L1_WERR_MAX_SC; 1842 tr 51 M=LLS_L1_WERR_MAX_SC; 1843 tr 52 M=LLS_L1_WERR_MAX_SC; 1844 tr 71 M=LLS_L1_WERR_MAX_SC TSE=F SLTH=T; 1845 tr 71 M=LLS_L1_WERR_MAX_SC TSE=T SLTH=T; 1846 tr 71 M=LLS_L1_WERR_MAX_SC TSE=T SLTH=F; 1847 echo " LLS_L1_WERR_NEXT"; 1848 tr 50 M=LLS_L1_WERR_NEXT; 1849 tr 51 M=LLS_L1_WERR_NEXT; 1850 tr 52 M=LLS_L1_WERR_NEXT; 1851 tr 71 M=LLS_L1_WERR_NEXT TSE=F SLTH=T; 1852 tr 71 M=LLS_L1_WERR_NEXT TSE=T SLTH=T; 1853 tr 71 M=LLS_L1_WERR_NEXT TSE=T SLTH=F; 1854 echo " LLS_L1_XOFF"; 1855 tr 50 M=LLS_L1_XOFF; 1856 tr 51 M=LLS_L1_XOFF; 1857 tr 52 M=LLS_L1_XOFF; 1858 tr 71 M=LLS_L1_XOFF TSE=F SLTH=T; 1859 tr 71 M=LLS_L1_XOFF TSE=T SLTH=T; 1860 tr 71 M=LLS_L1_XOFF TSE=T SLTH=F; 1861 echo " LLS_L2_ACT_MIN"; 1862 tr 50 M=LLS_L2_ACT_MIN; 1863 tr 51 M=LLS_L2_ACT_MIN; 1864 tr 52 M=LLS_L2_ACT_MIN; 1865 tr 71 M=LLS_L2_ACT_MIN TSE=F SLTH=T; 1866 tr 71 M=LLS_L2_ACT_MIN TSE=T SLTH=T; 1867 tr 71 M=LLS_L2_ACT_MIN TSE=T SLTH=F; 1868 echo " LLS_L2_ACT_SHAPER"; 1869 tr 50 M=LLS_L2_ACT_SHAPER; 1870 tr 51 M=LLS_L2_ACT_SHAPER; 1871 tr 52 M=LLS_L2_ACT_SHAPER; 1872 tr 71 M=LLS_L2_ACT_SHAPER TSE=F SLTH=T; 1873 tr 71 M=LLS_L2_ACT_SHAPER TSE=T SLTH=T; 1874 tr 71 M=LLS_L2_ACT_SHAPER TSE=T SLTH=F; 1875 echo " LLS_L2_ACT_XON"; 1876 tr 50 M=LLS_L2_ACT_XON; 1877 tr 51 M=LLS_L2_ACT_XON; 1878 tr 52 M=LLS_L2_ACT_XON; 1879 tr 71 M=LLS_L2_ACT_XON TSE=F SLTH=T; 1880 tr 71 M=LLS_L2_ACT_XON TSE=T SLTH=T; 1881 tr 71 M=LLS_L2_ACT_XON TSE=T SLTH=F; 1882 echo " LLS_L2_CHILD_STATE1"; 1883 tr 50 M=LLS_L2_CHILD_STATE1; 1884 tr 51 M=LLS_L2_CHILD_STATE1; 1885 tr 52 M=LLS_L2_CHILD_STATE1; 1886 tr 71 M=LLS_L2_CHILD_STATE1 TSE=F SLTH=T; 1887 tr 71 M=LLS_L2_CHILD_STATE1 TSE=T SLTH=T; 1888 tr 71 M=LLS_L2_CHILD_STATE1 TSE=T SLTH=F; 1889 echo " LLS_L2_CHILD_WEIGHT_CFG_CNT"; 1890 tr 50 M=LLS_L2_CHILD_WEIGHT_CFG_CNT; 1891 tr 51 M=LLS_L2_CHILD_WEIGHT_CFG_CNT; 1892 tr 52 M=LLS_L2_CHILD_WEIGHT_CFG_CNT; 1893 tr 71 M=LLS_L2_CHILD_WEIGHT_CFG_CNT TSE=F SLTH=T; 1894 tr 71 M=LLS_L2_CHILD_WEIGHT_CFG_CNT TSE=T SLTH=T; 1895 tr 71 M=LLS_L2_CHILD_WEIGHT_CFG_CNT TSE=T SLTH=F; 1896 echo " LLS_L2_EMPTY_STATE"; 1897 tr 50 M=LLS_L2_EMPTY_STATE; 1898 tr 51 M=LLS_L2_EMPTY_STATE; 1899 tr 52 M=LLS_L2_EMPTY_STATE; 1900 tr 71 M=LLS_L2_EMPTY_STATE TSE=F SLTH=T; 1901 tr 71 M=LLS_L2_EMPTY_STATE TSE=T SLTH=T; 1902 tr 71 M=LLS_L2_EMPTY_STATE TSE=T SLTH=F; 1903 echo " LLS_L2_ERROR"; 1904 tr 50 M=LLS_L2_ERROR; 1905 tr 51 M=LLS_L2_ERROR; 1906 tr 52 M=LLS_L2_ERROR; 1907 tr 71 M=LLS_L2_ERROR TSE=F SLTH=T; 1908 tr 71 M=LLS_L2_ERROR TSE=T SLTH=T; 1909 tr 71 M=LLS_L2_ERROR TSE=T SLTH=F; 1910 #echo " LLS_L2_MIN_BUCKET_LOWER_C"; 1911 #tr 50 M=LLS_L2_MIN_BUCKET_LOWER_C; 1912 #tr 51 M=LLS_L2_MIN_BUCKET_LOWER_C; 1913 #tr 52 M=LLS_L2_MIN_BUCKET_LOWER_C; 1914 #tr 71 M=LLS_L2_MIN_BUCKET_LOWER_C TSE=F SLTH=T; 1915 #tr 71 M=LLS_L2_MIN_BUCKET_LOWER_C TSE=T SLTH=T; 1916 #tr 71 M=LLS_L2_MIN_BUCKET_LOWER_C TSE=T SLTH=F; 1917 #echo " LLS_L2_MIN_BUCKET_UPPER_C"; 1918 #tr 50 M=LLS_L2_MIN_BUCKET_UPPER_C; 1919 #tr 51 M=LLS_L2_MIN_BUCKET_UPPER_C; 1920 #tr 52 M=LLS_L2_MIN_BUCKET_UPPER_C; 1921 #tr 71 M=LLS_L2_MIN_BUCKET_UPPER_C TSE=F SLTH=T; 1922 #tr 71 M=LLS_L2_MIN_BUCKET_UPPER_C TSE=T SLTH=T; 1923 #tr 71 M=LLS_L2_MIN_BUCKET_UPPER_C TSE=T SLTH=F; 1924 echo " LLS_L2_MIN_CONFIG_LOWER_C"; 1925 tr 50 M=LLS_L2_MIN_CONFIG_LOWER_C; 1926 tr 51 M=LLS_L2_MIN_CONFIG_LOWER_C; 1927 tr 52 M=LLS_L2_MIN_CONFIG_LOWER_C; 1928 tr 71 M=LLS_L2_MIN_CONFIG_LOWER_C TSE=F SLTH=T; 1929 tr 71 M=LLS_L2_MIN_CONFIG_LOWER_C TSE=T SLTH=T; 1930 tr 71 M=LLS_L2_MIN_CONFIG_LOWER_C TSE=T SLTH=F; 1931 echo " LLS_L2_MIN_CONFIG_UPPER_C"; 1932 tr 50 M=LLS_L2_MIN_CONFIG_UPPER_C; 1933 tr 51 M=LLS_L2_MIN_CONFIG_UPPER_C; 1934 tr 52 M=LLS_L2_MIN_CONFIG_UPPER_C; 1935 tr 71 M=LLS_L2_MIN_CONFIG_UPPER_C TSE=F SLTH=T; 1936 tr 71 M=LLS_L2_MIN_CONFIG_UPPER_C TSE=T SLTH=T; 1937 tr 71 M=LLS_L2_MIN_CONFIG_UPPER_C TSE=T SLTH=F; 1938 echo " LLS_L2_MIN_NEXT"; 1939 tr 50 M=LLS_L2_MIN_NEXT; 1940 tr 51 M=LLS_L2_MIN_NEXT; 1941 tr 52 M=LLS_L2_MIN_NEXT; 1942 tr 71 M=LLS_L2_MIN_NEXT TSE=F SLTH=T; 1943 tr 71 M=LLS_L2_MIN_NEXT TSE=T SLTH=T; 1944 tr 71 M=LLS_L2_MIN_NEXT TSE=T SLTH=F; 1945 echo " LLS_L2_PARENT"; 1946 tr 50 M=LLS_L2_PARENT; 1947 tr 51 M=LLS_L2_PARENT; 1948 tr 52 M=LLS_L2_PARENT; 1949 tr 71 M=LLS_L2_PARENT TSE=F SLTH=T; 1950 tr 71 M=LLS_L2_PARENT TSE=T SLTH=T; 1951 tr 71 M=LLS_L2_PARENT TSE=T SLTH=F; 1952 #echo " LLS_L2_SHAPER_BUCKET_LOWER"; 1953 #tr 50 M=LLS_L2_SHAPER_BUCKET_LOWER; 1954 #tr 51 M=LLS_L2_SHAPER_BUCKET_LOWER; 1955 #tr 52 M=LLS_L2_SHAPER_BUCKET_LOWER; 1956 #tr 71 M=LLS_L2_SHAPER_BUCKET_LOWER TSE=F SLTH=T; 1957 #tr 71 M=LLS_L2_SHAPER_BUCKET_LOWER TSE=T SLTH=T; 1958 #tr 71 M=LLS_L2_SHAPER_BUCKET_LOWER TSE=T SLTH=F; 1959 #echo " LLS_L2_SHAPER_BUCKET_UPPER"; 1960 #tr 50 M=LLS_L2_SHAPER_BUCKET_UPPER; 1961 #tr 51 M=LLS_L2_SHAPER_BUCKET_UPPER; 1962 #tr 52 M=LLS_L2_SHAPER_BUCKET_UPPER; 1963 #tr 71 M=LLS_L2_SHAPER_BUCKET_UPPER TSE=F SLTH=T; 1964 #tr 71 M=LLS_L2_SHAPER_BUCKET_UPPER TSE=T SLTH=T; 1965 #tr 71 M=LLS_L2_SHAPER_BUCKET_UPPER TSE=T SLTH=F; 1966 echo " LLS_L2_SHAPER_CONFIG_LOWER"; 1967 tr 50 M=LLS_L2_SHAPER_CONFIG_LOWER; 1968 tr 51 M=LLS_L2_SHAPER_CONFIG_LOWER; 1969 tr 52 M=LLS_L2_SHAPER_CONFIG_LOWER; 1970 tr 71 M=LLS_L2_SHAPER_CONFIG_LOWER TSE=F SLTH=T; 1971 tr 71 M=LLS_L2_SHAPER_CONFIG_LOWER TSE=T SLTH=T; 1972 tr 71 M=LLS_L2_SHAPER_CONFIG_LOWER TSE=T SLTH=F; 1973 echo " LLS_L2_SHAPER_CONFIG_UPPER"; 1974 tr 50 M=LLS_L2_SHAPER_CONFIG_UPPER; 1975 tr 51 M=LLS_L2_SHAPER_CONFIG_UPPER; 1976 tr 52 M=LLS_L2_SHAPER_CONFIG_UPPER; 1977 tr 71 M=LLS_L2_SHAPER_CONFIG_UPPER TSE=F SLTH=T; 1978 tr 71 M=LLS_L2_SHAPER_CONFIG_UPPER TSE=T SLTH=T; 1979 tr 71 M=LLS_L2_SHAPER_CONFIG_UPPER TSE=T SLTH=F; 1980 echo " LLS_L2_WERR_NEXT"; 1981 tr 50 M=LLS_L2_WERR_NEXT; 1982 tr 51 M=LLS_L2_WERR_NEXT; 1983 tr 52 M=LLS_L2_WERR_NEXT; 1984 tr 71 M=LLS_L2_WERR_NEXT TSE=F SLTH=T; 1985 tr 71 M=LLS_L2_WERR_NEXT TSE=T SLTH=T; 1986 tr 71 M=LLS_L2_WERR_NEXT TSE=T SLTH=F; 1987 echo " LLS_L2_XOFF"; 1988 tr 50 M=LLS_L2_XOFF; 1989 tr 51 M=LLS_L2_XOFF; 1990 tr 52 M=LLS_L2_XOFF; 1991 tr 71 M=LLS_L2_XOFF TSE=F SLTH=T; 1992 tr 71 M=LLS_L2_XOFF TSE=T SLTH=T; 1993 tr 71 M=LLS_L2_XOFF TSE=T SLTH=F; 1994 echo " LLS_PORT_CONFIG"; 1995 tr 50 M=LLS_PORT_CONFIG; 1996 tr 51 M=LLS_PORT_CONFIG; 1997 tr 52 M=LLS_PORT_CONFIG; 1998 tr 71 M=LLS_PORT_CONFIG TSE=F SLTH=T; 1999 tr 71 M=LLS_PORT_CONFIG TSE=T SLTH=T; 2000 tr 71 M=LLS_PORT_CONFIG TSE=T SLTH=F; 2001 echo " LLS_PORT_ERROR"; 2002 tr 50 M=LLS_PORT_ERROR; 2003 tr 51 M=LLS_PORT_ERROR; 2004 tr 52 M=LLS_PORT_ERROR; 2005 tr 71 M=LLS_PORT_ERROR TSE=F SLTH=T; 2006 tr 71 M=LLS_PORT_ERROR TSE=T SLTH=T; 2007 tr 71 M=LLS_PORT_ERROR TSE=T SLTH=F; 2008 echo " LLS_PORT_HEADS"; 2009 tr 50 M=LLS_PORT_HEADS; 2010 tr 51 M=LLS_PORT_HEADS; 2011 tr 52 M=LLS_PORT_HEADS; 2012 tr 71 M=LLS_PORT_HEADS TSE=F SLTH=T; 2013 tr 71 M=LLS_PORT_HEADS TSE=T SLTH=T; 2014 tr 71 M=LLS_PORT_HEADS TSE=T SLTH=F; 2015 echo " LLS_PORT_PARENT_STATE"; 2016 tr 50 M=LLS_PORT_PARENT_STATE; 2017 tr 51 M=LLS_PORT_PARENT_STATE; 2018 tr 52 M=LLS_PORT_PARENT_STATE; 2019 tr 71 M=LLS_PORT_PARENT_STATE TSE=F SLTH=T; 2020 tr 71 M=LLS_PORT_PARENT_STATE TSE=T SLTH=T; 2021 tr 71 M=LLS_PORT_PARENT_STATE TSE=T SLTH=F; 2022 #echo " LLS_PORT_SHAPER_BUCKET_C"; 2023 #tr 50 M=LLS_PORT_SHAPER_BUCKET_C; 2024 #tr 51 M=LLS_PORT_SHAPER_BUCKET_C; 2025 #tr 52 M=LLS_PORT_SHAPER_BUCKET_C; 2026 #tr 71 M=LLS_PORT_SHAPER_BUCKET_C TSE=F SLTH=T; 2027 #tr 71 M=LLS_PORT_SHAPER_BUCKET_C TSE=T SLTH=T; 2028 #tr 71 M=LLS_PORT_SHAPER_BUCKET_C TSE=T SLTH=F; 2029 #echo " LLS_PORT_SHAPER_CONFIG_C"; 2030 #tr 50 M=LLS_PORT_SHAPER_CONFIG_C; 2031 #tr 51 M=LLS_PORT_SHAPER_CONFIG_C; 2032 #tr 52 M=LLS_PORT_SHAPER_CONFIG_C; 2033 #tr 71 M=LLS_PORT_SHAPER_CONFIG_C TSE=F SLTH=T; 2034 #tr 71 M=LLS_PORT_SHAPER_CONFIG_C TSE=T SLTH=T; 2035 #tr 71 M=LLS_PORT_SHAPER_CONFIG_C TSE=T SLTH=F; 2036 echo " LLS_PORT_TAILS"; 2037 tr 50 M=LLS_PORT_TAILS; 2038 tr 51 M=LLS_PORT_TAILS; 2039 tr 52 M=LLS_PORT_TAILS; 2040 tr 71 M=LLS_PORT_TAILS TSE=F SLTH=T; 2041 tr 71 M=LLS_PORT_TAILS TSE=T SLTH=T; 2042 tr 71 M=LLS_PORT_TAILS TSE=T SLTH=F; 2043 #echo " LLS_PORT_TDM"; 2044 #tr 50 M=LLS_PORT_TDM; 2045 #tr 51 M=LLS_PORT_TDM; 2046 #tr 52 M=LLS_PORT_TDM; 2047 #tr 71 M=LLS_PORT_TDM TSE=F SLTH=T; 2048 #tr 71 M=LLS_PORT_TDM TSE=T SLTH=T; 2049 #tr 71 M=LLS_PORT_TDM TSE=T SLTH=F; 2050 #echo " LLS_PORT_WERR_MAX_SC"; 2051 #tr 50 M=LLS_PORT_WERR_MAX_SC; 2052 #tr 51 M=LLS_PORT_WERR_MAX_SC; 2053 #tr 52 M=LLS_PORT_WERR_MAX_SC; 2054 #tr 71 M=LLS_PORT_WERR_MAX_SC TSE=F SLTH=T; 2055 #tr 71 M=LLS_PORT_WERR_MAX_SC TSE=T SLTH=T; 2056 #tr 71 M=LLS_PORT_WERR_MAX_SC TSE=T SLTH=F; 2057 echo " LLS_PORT_XOFF"; 2058 tr 50 M=LLS_PORT_XOFF; 2059 #tr 51 M=LLS_PORT_XOFF; 2060 #tr 52 M=LLS_PORT_XOFF; 2061 tr 71 M=LLS_PORT_XOFF TSE=F SLTH=T; 2062 tr 71 M=LLS_PORT_XOFF TSE=T SLTH=T; 2063 tr 71 M=LLS_PORT_XOFF TSE=T SLTH=F; 2064 echo " LMEP"; 2065 tr 50 M=LMEP; 2066 tr 51 M=LMEP; 2067 tr 52 M=LMEP; 2068 tr 71 M=LMEP TSE=F SLTH=T; 2069 tr 71 M=LMEP TSE=T SLTH=T; 2070 tr 71 M=LMEP TSE=T SLTH=F; 2071 echo " LMEP_1"; 2072 tr 50 M=LMEP_1; 2073 tr 51 M=LMEP_1; 2074 tr 52 M=LMEP_1; 2075 tr 71 M=LMEP_1 TSE=F SLTH=T; 2076 tr 71 M=LMEP_1 TSE=T SLTH=T; 2077 tr 71 M=LMEP_1 TSE=T SLTH=F; 2078 echo " LOCAL_SW_DISABLE_DEFAULT_PBM"; 2079 tr 50 M=LOCAL_SW_DISABLE_DEFAULT_PBM; 2080 tr 51 M=LOCAL_SW_DISABLE_DEFAULT_PBM; 2081 tr 52 M=LOCAL_SW_DISABLE_DEFAULT_PBM; 2082 tr 71 M=LOCAL_SW_DISABLE_DEFAULT_PBM TSE=F SLTH=T; 2083 tr 71 M=LOCAL_SW_DISABLE_DEFAULT_PBM TSE=T SLTH=T; 2084 tr 71 M=LOCAL_SW_DISABLE_DEFAULT_PBM TSE=T SLTH=F; 2085 echo " LOCAL_SW_DISABLE_DEFAULT_PBM_MIRR"; 2086 tr 50 M=LOCAL_SW_DISABLE_DEFAULT_PBM_MIRR; 2087 tr 51 M=LOCAL_SW_DISABLE_DEFAULT_PBM_MIRR; 2088 tr 52 M=LOCAL_SW_DISABLE_DEFAULT_PBM_MIRR; 2089 tr 71 M=LOCAL_SW_DISABLE_DEFAULT_PBM_MIRR TSE=F SLTH=T; 2090 tr 71 M=LOCAL_SW_DISABLE_DEFAULT_PBM_MIRR TSE=T SLTH=T; 2091 tr 71 M=LOCAL_SW_DISABLE_DEFAULT_PBM_MIRR TSE=T SLTH=F; 2092 echo " LPORT_TAB"; 2093 tr 50 M=LPORT_TAB; 2094 tr 51 M=LPORT_TAB; 2095 tr 52 M=LPORT_TAB; 2096 tr 71 M=LPORT_TAB TSE=F SLTH=T; 2097 tr 71 M=LPORT_TAB TSE=T SLTH=T; 2098 tr 71 M=LPORT_TAB TSE=T SLTH=F; 2099 echo " MAC_BLOCK"; 2100 tr 50 M=MAC_BLOCK; 2101 tr 51 M=MAC_BLOCK; 2102 tr 52 M=MAC_BLOCK; 2103 tr 71 M=MAC_BLOCK TSE=F SLTH=T; 2104 tr 71 M=MAC_BLOCK TSE=T SLTH=T; 2105 tr 71 M=MAC_BLOCK TSE=T SLTH=F; 2106 echo " MAID_REDUCTION"; 2107 tr 50 M=MAID_REDUCTION; 2108 tr 51 M=MAID_REDUCTION; 2109 tr 52 M=MAID_REDUCTION; 2110 tr 71 M=MAID_REDUCTION TSE=F SLTH=T; 2111 tr 71 M=MAID_REDUCTION TSE=T SLTH=T; 2112 tr 71 M=MAID_REDUCTION TSE=T SLTH=F; 2113 echo " MA_INDEX"; 2114 tr 50 M=MA_INDEX; 2115 tr 51 M=MA_INDEX; 2116 tr 52 M=MA_INDEX; 2117 tr 71 M=MA_INDEX TSE=F SLTH=T; 2118 tr 71 M=MA_INDEX TSE=T SLTH=T; 2119 tr 71 M=MA_INDEX TSE=T SLTH=F; 2120 #echo " MA_STATE"; 2121 #tr 50 M=MA_STATE; 2122 #tr 51 M=MA_STATE; 2123 #tr 52 M=MA_STATE; 2124 #tr 71 M=MA_STATE TSE=F SLTH=T; 2125 #tr 71 M=MA_STATE TSE=T SLTH=T; 2126 #tr 71 M=MA_STATE TSE=T SLTH=F; 2127 echo " MIRROR_CONTROL"; 2128 tr 50 M=MIRROR_CONTROL; 2129 tr 51 M=MIRROR_CONTROL; 2130 tr 52 M=MIRROR_CONTROL; 2131 tr 71 M=MIRROR_CONTROL TSE=F SLTH=T; 2132 tr 71 M=MIRROR_CONTROL TSE=T SLTH=T; 2133 tr 71 M=MIRROR_CONTROL TSE=T SLTH=F; 2134 echo " MMU_AGING_CTR_EXT"; 2135 tr 50 M=MMU_AGING_CTR_EXT; 2136 tr 51 M=MMU_AGING_CTR_EXT; 2137 tr 52 M=MMU_AGING_CTR_EXT; 2138 tr 71 M=MMU_AGING_CTR_EXT TSE=F SLTH=T; 2139 tr 71 M=MMU_AGING_CTR_EXT TSE=T SLTH=T; 2140 tr 71 M=MMU_AGING_CTR_EXT TSE=T SLTH=F; 2141 echo " MMU_AGING_CTR_INT"; 2142 tr 50 M=MMU_AGING_CTR_INT; 2143 tr 51 M=MMU_AGING_CTR_INT; 2144 tr 52 M=MMU_AGING_CTR_INT; 2145 tr 71 M=MMU_AGING_CTR_INT TSE=F SLTH=T; 2146 tr 71 M=MMU_AGING_CTR_INT TSE=T SLTH=T; 2147 tr 71 M=MMU_AGING_CTR_INT TSE=T SLTH=F; 2148 echo " MMU_AGING_EXP_EXT"; 2149 tr 50 M=MMU_AGING_EXP_EXT; 2150 tr 51 M=MMU_AGING_EXP_EXT; 2151 tr 52 M=MMU_AGING_EXP_EXT; 2152 tr 71 M=MMU_AGING_EXP_EXT TSE=F SLTH=T; 2153 tr 71 M=MMU_AGING_EXP_EXT TSE=T SLTH=T; 2154 tr 71 M=MMU_AGING_EXP_EXT TSE=T SLTH=F; 2155 echo " MMU_AGING_EXP_INT"; 2156 tr 50 M=MMU_AGING_EXP_INT; 2157 tr 51 M=MMU_AGING_EXP_INT; 2158 tr 52 M=MMU_AGING_EXP_INT; 2159 tr 71 M=MMU_AGING_EXP_INT TSE=F SLTH=T; 2160 tr 71 M=MMU_AGING_EXP_INT TSE=T SLTH=T; 2161 tr 71 M=MMU_AGING_EXP_INT TSE=T SLTH=F; 2162 echo " MMU_AGING_LMT_EXT"; 2163 tr 50 M=MMU_AGING_LMT_EXT; 2164 tr 51 M=MMU_AGING_LMT_EXT; 2165 tr 52 M=MMU_AGING_LMT_EXT; 2166 tr 71 M=MMU_AGING_LMT_EXT TSE=F SLTH=T; 2167 tr 71 M=MMU_AGING_LMT_EXT TSE=T SLTH=T; 2168 tr 71 M=MMU_AGING_LMT_EXT TSE=T SLTH=F; 2169 echo " MMU_AGING_LMT_INT"; 2170 tr 50 M=MMU_AGING_LMT_INT; 2171 tr 51 M=MMU_AGING_LMT_INT; 2172 tr 52 M=MMU_AGING_LMT_INT; 2173 tr 71 M=MMU_AGING_LMT_INT TSE=F SLTH=T; 2174 tr 71 M=MMU_AGING_LMT_INT TSE=T SLTH=T; 2175 tr 71 M=MMU_AGING_LMT_INT TSE=T SLTH=F; 2176 if !$?BCM56240_B0 \ 2177 'echo " MMU_CBPI_0"; \ 2178 tr 50 M=MMU_CBPI_0; \ 2179 tr 51 M=MMU_CBPI_0; \ 2180 tr 52 M=MMU_CBPI_0; \ 2181 tr 71 M=MMU_CBPI_0 TSE=F SLTH=T; \ 2182 tr 71 M=MMU_CBPI_0 TSE=T SLTH=T; \ 2183 tr 71 M=MMU_CBPI_0 TSE=T SLTH=F; \ 2184 echo " MMU_CBPI_1"; \ 2185 tr 50 M=MMU_CBPI_1; \ 2186 tr 51 M=MMU_CBPI_1; \ 2187 tr 52 M=MMU_CBPI_1; \ 2188 tr 71 M=MMU_CBPI_1 TSE=F SLTH=T; \ 2189 tr 71 M=MMU_CBPI_1 TSE=T SLTH=T; \ 2190 tr 71 M=MMU_CBPI_1 TSE=T SLTH=F; \ 2191 echo " MMU_CBPI_10"; \ 2192 tr 50 M=MMU_CBPI_10; \ 2193 tr 51 M=MMU_CBPI_10; \ 2194 tr 52 M=MMU_CBPI_10; \ 2195 tr 71 M=MMU_CBPI_10 TSE=F SLTH=T; \ 2196 tr 71 M=MMU_CBPI_10 TSE=T SLTH=T; \ 2197 tr 71 M=MMU_CBPI_10 TSE=T SLTH=F; \ 2198 echo " MMU_CBPI_11"; \ 2199 tr 50 M=MMU_CBPI_11; \ 2200 tr 51 M=MMU_CBPI_11; \ 2201 tr 52 M=MMU_CBPI_11; \ 2202 tr 71 M=MMU_CBPI_11 TSE=F SLTH=T; \ 2203 tr 71 M=MMU_CBPI_11 TSE=T SLTH=T; \ 2204 tr 71 M=MMU_CBPI_11 TSE=T SLTH=F; \ 2205 echo " MMU_CBPI_2"; \ 2206 tr 50 M=MMU_CBPI_2; \ 2207 tr 51 M=MMU_CBPI_2; \ 2208 tr 52 M=MMU_CBPI_2; \ 2209 tr 71 M=MMU_CBPI_2 TSE=F SLTH=T; \ 2210 tr 71 M=MMU_CBPI_2 TSE=T SLTH=T; \ 2211 tr 71 M=MMU_CBPI_2 TSE=T SLTH=F; \ 2212 echo " MMU_CBPI_3"; \ 2213 tr 50 M=MMU_CBPI_3; \ 2214 tr 51 M=MMU_CBPI_3; \ 2215 tr 52 M=MMU_CBPI_3; \ 2216 tr 71 M=MMU_CBPI_3 TSE=F SLTH=T; \ 2217 tr 71 M=MMU_CBPI_3 TSE=T SLTH=T; \ 2218 tr 71 M=MMU_CBPI_3 TSE=T SLTH=F; \ 2219 echo " MMU_CBPI_4"; \ 2220 tr 50 M=MMU_CBPI_4; \ 2221 tr 51 M=MMU_CBPI_4; \ 2222 tr 52 M=MMU_CBPI_4; \ 2223 tr 71 M=MMU_CBPI_4 TSE=F SLTH=T; \ 2224 tr 71 M=MMU_CBPI_4 TSE=T SLTH=T; \ 2225 tr 71 M=MMU_CBPI_4 TSE=T SLTH=F; \ 2226 echo " MMU_CBPI_5"; \ 2227 tr 50 M=MMU_CBPI_5; \ 2228 tr 51 M=MMU_CBPI_5; \ 2229 tr 52 M=MMU_CBPI_5; \ 2230 tr 71 M=MMU_CBPI_5 TSE=F SLTH=T; \ 2231 tr 71 M=MMU_CBPI_5 TSE=T SLTH=T; \ 2232 tr 71 M=MMU_CBPI_5 TSE=T SLTH=F; \ 2233 echo " MMU_CBPI_6"; \ 2234 tr 50 M=MMU_CBPI_6; \ 2235 tr 51 M=MMU_CBPI_6; \ 2236 tr 52 M=MMU_CBPI_6; \ 2237 tr 71 M=MMU_CBPI_6 TSE=F SLTH=T; \ 2238 tr 71 M=MMU_CBPI_6 TSE=T SLTH=T; \ 2239 tr 71 M=MMU_CBPI_6 TSE=T SLTH=F; \ 2240 echo " MMU_CBPI_7"; \ 2241 tr 50 M=MMU_CBPI_7; \ 2242 tr 51 M=MMU_CBPI_7; \ 2243 tr 52 M=MMU_CBPI_7; \ 2244 tr 71 M=MMU_CBPI_7 TSE=F SLTH=T; \ 2245 tr 71 M=MMU_CBPI_7 TSE=T SLTH=T; \ 2246 tr 71 M=MMU_CBPI_7 TSE=T SLTH=F; \ 2247 echo " MMU_CBPI_8"; \ 2248 tr 50 M=MMU_CBPI_8; \ 2249 tr 51 M=MMU_CBPI_8; \ 2250 tr 52 M=MMU_CBPI_8; \ 2251 tr 71 M=MMU_CBPI_8 TSE=F SLTH=T; \ 2252 tr 71 M=MMU_CBPI_8 TSE=T SLTH=T; \ 2253 tr 71 M=MMU_CBPI_8 TSE=T SLTH=F; \ 2254 echo " MMU_CBPI_9"; \ 2255 tr 50 M=MMU_CBPI_9; \ 2256 tr 51 M=MMU_CBPI_9; \ 2257 tr 52 M=MMU_CBPI_9; \ 2258 tr 71 M=MMU_CBPI_9 TSE=F SLTH=T; \ 2259 tr 71 M=MMU_CBPI_9 TSE=T SLTH=T; \ 2260 tr 71 M=MMU_CBPI_9 TSE=T SLTH=F;' 2261 $done 2262 if $?BCM56440 && !$?BCM56240_B0\ 2263 'echo " MMU_CCPE_MEM"; \ 2264 tr 50 M=MMU_CCPE_MEM; \ 2265 tr 51 M=MMU_CCPE_MEM; \ 2266 tr 52 M=MMU_CCPE_MEM; \ 2267 tr 71 M=MMU_CCPE_MEM TSE=F SLTH=T; \ 2268 tr 71 M=MMU_CCPE_MEM TSE=T SLTH=T; \ 2269 tr 71 M=MMU_CCPE_MEM TSE=T SLTH=F;' 2270 $done 2271 echo " MMU_CCPI_MEM"; 2272 tr 50 M=MMU_CCPI_MEM; 2273 tr 51 M=MMU_CCPI_MEM; 2274 tr 52 M=MMU_CCPI_MEM; 2275 tr 71 M=MMU_CCPI_MEM TSE=F SLTH=T; 2276 tr 71 M=MMU_CCPI_MEM TSE=T SLTH=T; 2277 tr 71 M=MMU_CCPI_MEM TSE=T SLTH=F; 2278 if $?BCM56440 && !$?BCM56240_B0 \ 2279 'echo " MMU_CELLLINKE"; \ 2280 tr 50 M=MMU_CELLLINKE; \ 2281 tr 51 M=MMU_CELLLINKE; \ 2282 tr 52 M=MMU_CELLLINKE; \ 2283 tr 71 M=MMU_CELLLINKE TSE=F SLTH=T; \ 2284 tr 71 M=MMU_CELLLINKE TSE=T SLTH=T; \ 2285 tr 71 M=MMU_CELLLINKE TSE=T SLTH=F;' 2286 $done 2287 echo " MMU_CELLLINKI"; 2288 tr 50 M=MMU_CELLLINKI; 2289 tr 51 M=MMU_CELLLINKI; 2290 tr 52 M=MMU_CELLLINKI; 2291 tr 71 M=MMU_CELLLINKI TSE=F SLTH=T; 2292 tr 71 M=MMU_CELLLINKI TSE=T SLTH=T; 2293 tr 71 M=MMU_CELLLINKI TSE=T SLTH=F; 2294 echo " MMU_CFAPE_BITMAP"; 2295 tr 50 M=MMU_CFAPE_BITMAP; 2296 tr 51 M=MMU_CFAPE_BITMAP; 2297 tr 52 M=MMU_CFAPE_BITMAP; 2298 tr 71 M=MMU_CFAPE_BITMAP TSE=F SLTH=T; 2299 tr 71 M=MMU_CFAPE_BITMAP TSE=T SLTH=T; 2300 tr 71 M=MMU_CFAPE_BITMAP TSE=T SLTH=F; 2301 echo " MMU_CFAPE_STACK"; 2302 tr 50 M=MMU_CFAPE_STACK; 2303 tr 51 M=MMU_CFAPE_STACK; 2304 tr 52 M=MMU_CFAPE_STACK; 2305 tr 71 M=MMU_CFAPE_STACK TSE=F SLTH=T; 2306 tr 71 M=MMU_CFAPE_STACK TSE=T SLTH=T; 2307 tr 71 M=MMU_CFAPE_STACK TSE=T SLTH=F; 2308 echo " MMU_CFAPI_BITMAP"; 2309 tr 50 M=MMU_CFAPI_BITMAP; 2310 tr 51 M=MMU_CFAPI_BITMAP; 2311 tr 52 M=MMU_CFAPI_BITMAP; 2312 tr 71 M=MMU_CFAPI_BITMAP TSE=F SLTH=T; 2313 tr 71 M=MMU_CFAPI_BITMAP TSE=T SLTH=T; 2314 tr 71 M=MMU_CFAPI_BITMAP TSE=T SLTH=F; 2315 echo " MMU_CFAPI_STACK"; 2316 tr 50 M=MMU_CFAPI_STACK; 2317 tr 51 M=MMU_CFAPI_STACK; 2318 tr 52 M=MMU_CFAPI_STACK; 2319 tr 71 M=MMU_CFAPI_STACK TSE=F SLTH=T; 2320 tr 71 M=MMU_CFAPI_STACK TSE=T SLTH=T; 2321 tr 71 M=MMU_CFAPI_STACK TSE=T SLTH=F; 2322 echo " MMU_DEQ_AGING_MASK_LOOKUP_TABLE_MEM"; 2323 tr 50 M=MMU_DEQ_AGING_MASK_LOOKUP_TABLE_MEM; 2324 tr 51 M=MMU_DEQ_AGING_MASK_LOOKUP_TABLE_MEM; 2325 tr 52 M=MMU_DEQ_AGING_MASK_LOOKUP_TABLE_MEM; 2326 tr 71 M=MMU_DEQ_AGING_MASK_LOOKUP_TABLE_MEM TSE=F SLTH=T; 2327 tr 71 M=MMU_DEQ_AGING_MASK_LOOKUP_TABLE_MEM TSE=T SLTH=T; 2328 tr 71 M=MMU_DEQ_AGING_MASK_LOOKUP_TABLE_MEM TSE=T SLTH=F; 2329 #echo " MMU_ENQ_CBP_32B_WR_STORE_0"; 2330 #tr 50 M=MMU_ENQ_CBP_32B_WR_STORE_0; 2331 #tr 51 M=MMU_ENQ_CBP_32B_WR_STORE_0; 2332 #tr 52 M=MMU_ENQ_CBP_32B_WR_STORE_0; 2333 #tr 71 M=MMU_ENQ_CBP_32B_WR_STORE_0 TSE=F SLTH=T; 2334 #tr 71 M=MMU_ENQ_CBP_32B_WR_STORE_0 TSE=T SLTH=T; 2335 #tr 71 M=MMU_ENQ_CBP_32B_WR_STORE_0 TSE=T SLTH=F; 2336 #echo " MMU_ENQ_CBP_32B_WR_STORE_1"; 2337 #tr 50 M=MMU_ENQ_CBP_32B_WR_STORE_1; 2338 #tr 51 M=MMU_ENQ_CBP_32B_WR_STORE_1; 2339 #tr 52 M=MMU_ENQ_CBP_32B_WR_STORE_1; 2340 #tr 71 M=MMU_ENQ_CBP_32B_WR_STORE_1 TSE=F SLTH=T; 2341 #tr 71 M=MMU_ENQ_CBP_32B_WR_STORE_1 TSE=T SLTH=T; 2342 #tr 71 M=MMU_ENQ_CBP_32B_WR_STORE_1 TSE=T SLTH=F; 2343 echo " MMU_ENQ_CBP_32B_WR_STORE_2"; 2344 tr 50 M=MMU_ENQ_CBP_32B_WR_STORE_2; 2345 tr 51 M=MMU_ENQ_CBP_32B_WR_STORE_2; 2346 tr 52 M=MMU_ENQ_CBP_32B_WR_STORE_2; 2347 tr 71 M=MMU_ENQ_CBP_32B_WR_STORE_2 TSE=F SLTH=T; 2348 tr 71 M=MMU_ENQ_CBP_32B_WR_STORE_2 TSE=T SLTH=T; 2349 tr 71 M=MMU_ENQ_CBP_32B_WR_STORE_2 TSE=T SLTH=F; 2350 echo " MMU_ENQ_FAP_BITMAP"; 2351 tr 50 M=MMU_ENQ_FAP_BITMAP; 2352 tr 51 M=MMU_ENQ_FAP_BITMAP; 2353 tr 52 M=MMU_ENQ_FAP_BITMAP; 2354 tr 71 M=MMU_ENQ_FAP_BITMAP TSE=F SLTH=T; 2355 tr 71 M=MMU_ENQ_FAP_BITMAP TSE=T SLTH=T; 2356 tr 71 M=MMU_ENQ_FAP_BITMAP TSE=T SLTH=F; 2357 echo " MMU_ENQ_FAP_STACK"; 2358 tr 50 M=MMU_ENQ_FAP_STACK; 2359 tr 51 M=MMU_ENQ_FAP_STACK; 2360 tr 52 M=MMU_ENQ_FAP_STACK; 2361 tr 71 M=MMU_ENQ_FAP_STACK TSE=F SLTH=T; 2362 tr 71 M=MMU_ENQ_FAP_STACK TSE=T SLTH=T; 2363 tr 71 M=MMU_ENQ_FAP_STACK TSE=T SLTH=F; 2364 #echo " MMU_ENQ_RQE_WR_COMPLETE_0"; 2365 #tr 50 M=MMU_ENQ_RQE_WR_COMPLETE_0; 2366 #tr 51 M=MMU_ENQ_RQE_WR_COMPLETE_0; 2367 #tr 52 M=MMU_ENQ_RQE_WR_COMPLETE_0; 2368 #tr 71 M=MMU_ENQ_RQE_WR_COMPLETE_0 TSE=F SLTH=T; 2369 #tr 71 M=MMU_ENQ_RQE_WR_COMPLETE_0 TSE=T SLTH=T; 2370 #tr 71 M=MMU_ENQ_RQE_WR_COMPLETE_0 TSE=T SLTH=F; 2371 #echo " MMU_ENQ_RQE_WR_COMPLETE_1"; 2372 #tr 50 M=MMU_ENQ_RQE_WR_COMPLETE_1; 2373 #tr 51 M=MMU_ENQ_RQE_WR_COMPLETE_1; 2374 #tr 52 M=MMU_ENQ_RQE_WR_COMPLETE_1; 2375 #tr 71 M=MMU_ENQ_RQE_WR_COMPLETE_1 TSE=F SLTH=T; 2376 #tr 71 M=MMU_ENQ_RQE_WR_COMPLETE_1 TSE=T SLTH=T; 2377 #tr 71 M=MMU_ENQ_RQE_WR_COMPLETE_1 TSE=T SLTH=F; 2378 echo " MMU_ENQ_RQE_WR_COMPLETE_2"; 2379 tr 50 M=MMU_ENQ_RQE_WR_COMPLETE_2; 2380 tr 51 M=MMU_ENQ_RQE_WR_COMPLETE_2; 2381 tr 52 M=MMU_ENQ_RQE_WR_COMPLETE_2; 2382 tr 71 M=MMU_ENQ_RQE_WR_COMPLETE_2 TSE=F SLTH=T; 2383 tr 71 M=MMU_ENQ_RQE_WR_COMPLETE_2 TSE=T SLTH=T; 2384 tr 71 M=MMU_ENQ_RQE_WR_COMPLETE_2 TSE=T SLTH=F; 2385 echo " MMU_EXT_MC_GROUP_MAP"; 2386 tr 50 M=MMU_EXT_MC_GROUP_MAP; 2387 tr 51 M=MMU_EXT_MC_GROUP_MAP; 2388 tr 52 M=MMU_EXT_MC_GROUP_MAP; 2389 tr 71 M=MMU_EXT_MC_GROUP_MAP TSE=F SLTH=T; 2390 tr 71 M=MMU_EXT_MC_GROUP_MAP TSE=T SLTH=T; 2391 tr 71 M=MMU_EXT_MC_GROUP_MAP TSE=T SLTH=F; 2392 echo " MMU_EXT_MC_QUEUE_LIST0"; 2393 tr 50 M=MMU_EXT_MC_QUEUE_LIST0; 2394 tr 51 M=MMU_EXT_MC_QUEUE_LIST0; 2395 tr 52 M=MMU_EXT_MC_QUEUE_LIST0; 2396 tr 71 M=MMU_EXT_MC_QUEUE_LIST0 TSE=F SLTH=T; 2397 tr 71 M=MMU_EXT_MC_QUEUE_LIST0 TSE=T SLTH=T; 2398 tr 71 M=MMU_EXT_MC_QUEUE_LIST0 TSE=T SLTH=F; 2399 echo " MMU_EXT_MC_QUEUE_LIST1"; 2400 tr 50 M=MMU_EXT_MC_QUEUE_LIST1; 2401 tr 51 M=MMU_EXT_MC_QUEUE_LIST1; 2402 tr 52 M=MMU_EXT_MC_QUEUE_LIST1; 2403 tr 71 M=MMU_EXT_MC_QUEUE_LIST1 TSE=F SLTH=T; 2404 tr 71 M=MMU_EXT_MC_QUEUE_LIST1 TSE=T SLTH=T; 2405 tr 71 M=MMU_EXT_MC_QUEUE_LIST1 TSE=T SLTH=F; 2406 echo " MMU_EXT_MC_QUEUE_LIST4"; 2407 tr 50 M=MMU_EXT_MC_QUEUE_LIST4; 2408 tr 51 M=MMU_EXT_MC_QUEUE_LIST4; 2409 tr 52 M=MMU_EXT_MC_QUEUE_LIST4; 2410 tr 71 M=MMU_EXT_MC_QUEUE_LIST4 TSE=F SLTH=T; 2411 tr 71 M=MMU_EXT_MC_QUEUE_LIST4 TSE=T SLTH=T; 2412 tr 71 M=MMU_EXT_MC_QUEUE_LIST4 TSE=T SLTH=F; 2413 echo " MMU_INTFI_BASE_TBL"; 2414 tr 50 M=MMU_INTFI_BASE_TBL; 2415 tr 51 M=MMU_INTFI_BASE_TBL; 2416 tr 52 M=MMU_INTFI_BASE_TBL; 2417 tr 71 M=MMU_INTFI_BASE_TBL TSE=F SLTH=T; 2418 tr 71 M=MMU_INTFI_BASE_TBL TSE=T SLTH=T; 2419 tr 71 M=MMU_INTFI_BASE_TBL TSE=T SLTH=F; 2420 #echo " MMU_INTFI_DEBUG_MEM"; 2421 #tr 50 M=MMU_INTFI_DEBUG_MEM; 2422 #tr 51 M=MMU_INTFI_DEBUG_MEM; 2423 #tr 52 M=MMU_INTFI_DEBUG_MEM; 2424 #tr 71 M=MMU_INTFI_DEBUG_MEM TSE=F SLTH=T; 2425 #tr 71 M=MMU_INTFI_DEBUG_MEM TSE=T SLTH=T; 2426 #tr 71 M=MMU_INTFI_DEBUG_MEM TSE=T SLTH=F; 2427 echo " MMU_INTFI_FC_STATE_TBL"; 2428 tr 50 M=MMU_INTFI_FC_STATE_TBL; 2429 tr 51 M=MMU_INTFI_FC_STATE_TBL; 2430 tr 52 M=MMU_INTFI_FC_STATE_TBL; 2431 tr 71 M=MMU_INTFI_FC_STATE_TBL TSE=F SLTH=T; 2432 tr 71 M=MMU_INTFI_FC_STATE_TBL TSE=T SLTH=T; 2433 tr 71 M=MMU_INTFI_FC_STATE_TBL TSE=T SLTH=F; 2434 echo " MMU_INTFI_MAP_TBL"; 2435 tr 50 M=MMU_INTFI_MAP_TBL; 2436 tr 51 M=MMU_INTFI_MAP_TBL; 2437 tr 52 M=MMU_INTFI_MAP_TBL; 2438 tr 71 M=MMU_INTFI_MAP_TBL TSE=F SLTH=T; 2439 tr 71 M=MMU_INTFI_MAP_TBL TSE=T SLTH=T; 2440 tr 71 M=MMU_INTFI_MAP_TBL TSE=T SLTH=F; 2441 echo " MMU_INTFI_XLATE_TBL"; 2442 tr 50 M=MMU_INTFI_XLATE_TBL; 2443 tr 51 M=MMU_INTFI_XLATE_TBL; 2444 tr 52 M=MMU_INTFI_XLATE_TBL; 2445 tr 71 M=MMU_INTFI_XLATE_TBL TSE=F SLTH=T; 2446 tr 71 M=MMU_INTFI_XLATE_TBL TSE=T SLTH=T; 2447 tr 71 M=MMU_INTFI_XLATE_TBL TSE=T SLTH=F; 2448 echo " MMU_IPMC_GROUP_TBL0"; 2449 tr 50 M=MMU_IPMC_GROUP_TBL0; 2450 tr 51 M=MMU_IPMC_GROUP_TBL0; 2451 tr 52 M=MMU_IPMC_GROUP_TBL0; 2452 tr 71 M=MMU_IPMC_GROUP_TBL0 TSE=F SLTH=T; 2453 tr 71 M=MMU_IPMC_GROUP_TBL0 TSE=T SLTH=T; 2454 tr 71 M=MMU_IPMC_GROUP_TBL0 TSE=T SLTH=F; 2455 echo " MMU_IPMC_GROUP_TBL1"; 2456 tr 50 M=MMU_IPMC_GROUP_TBL1; 2457 tr 51 M=MMU_IPMC_GROUP_TBL1; 2458 tr 52 M=MMU_IPMC_GROUP_TBL1; 2459 tr 71 M=MMU_IPMC_GROUP_TBL1 TSE=F SLTH=T; 2460 tr 71 M=MMU_IPMC_GROUP_TBL1 TSE=T SLTH=T; 2461 tr 71 M=MMU_IPMC_GROUP_TBL1 TSE=T SLTH=F; 2462 echo " MMU_IPMC_GROUP_TBL2"; 2463 tr 50 M=MMU_IPMC_GROUP_TBL2; 2464 tr 51 M=MMU_IPMC_GROUP_TBL2; 2465 tr 52 M=MMU_IPMC_GROUP_TBL2; 2466 tr 71 M=MMU_IPMC_GROUP_TBL2 TSE=F SLTH=T; 2467 tr 71 M=MMU_IPMC_GROUP_TBL2 TSE=T SLTH=T; 2468 tr 71 M=MMU_IPMC_GROUP_TBL2 TSE=T SLTH=F; 2469 echo " MMU_IPMC_GROUP_TBL3"; 2470 tr 50 M=MMU_IPMC_GROUP_TBL3; 2471 tr 51 M=MMU_IPMC_GROUP_TBL3; 2472 tr 52 M=MMU_IPMC_GROUP_TBL3; 2473 tr 71 M=MMU_IPMC_GROUP_TBL3 TSE=F SLTH=T; 2474 tr 71 M=MMU_IPMC_GROUP_TBL3 TSE=T SLTH=T; 2475 tr 71 M=MMU_IPMC_GROUP_TBL3 TSE=T SLTH=F; 2476 echo " MMU_IPMC_GROUP_TBL4"; 2477 tr 50 M=MMU_IPMC_GROUP_TBL4; 2478 tr 51 M=MMU_IPMC_GROUP_TBL4; 2479 tr 52 M=MMU_IPMC_GROUP_TBL4; 2480 tr 71 M=MMU_IPMC_GROUP_TBL4 TSE=F SLTH=T; 2481 tr 71 M=MMU_IPMC_GROUP_TBL4 TSE=T SLTH=T; 2482 tr 71 M=MMU_IPMC_GROUP_TBL4 TSE=T SLTH=F; 2483 echo " MMU_IPMC_VLAN_TBL"; 2484 tr 50 M=MMU_IPMC_VLAN_TBL; 2485 tr 51 M=MMU_IPMC_VLAN_TBL; 2486 tr 52 M=MMU_IPMC_VLAN_TBL; 2487 tr 71 M=MMU_IPMC_VLAN_TBL TSE=F SLTH=T; 2488 tr 71 M=MMU_IPMC_VLAN_TBL TSE=T SLTH=T; 2489 tr 71 M=MMU_IPMC_VLAN_TBL TSE=T SLTH=F; 2490 #echo " MMU_ITE_CTRL_0"; 2491 #tr 50 M=MMU_ITE_CTRL_0; 2492 #tr 51 M=MMU_ITE_CTRL_0; 2493 #tr 52 M=MMU_ITE_CTRL_0; 2494 #tr 71 M=MMU_ITE_CTRL_0 TSE=F SLTH=T; 2495 #tr 71 M=MMU_ITE_CTRL_0 TSE=T SLTH=T; 2496 #tr 71 M=MMU_ITE_CTRL_0 TSE=T SLTH=F; 2497 echo " MMU_ITE_CTRL_1"; 2498 tr 50 M=MMU_ITE_CTRL_1; 2499 tr 51 M=MMU_ITE_CTRL_1; 2500 tr 52 M=MMU_ITE_CTRL_1; 2501 tr 71 M=MMU_ITE_CTRL_1 TSE=F SLTH=T; 2502 tr 71 M=MMU_ITE_CTRL_1 TSE=T SLTH=T; 2503 tr 71 M=MMU_ITE_CTRL_1 TSE=T SLTH=F; 2504 echo " MMU_ITE_PACKET_PTR_STORE"; 2505 tr 50 M=MMU_ITE_PACKET_PTR_STORE; 2506 tr 51 M=MMU_ITE_PACKET_PTR_STORE; 2507 tr 52 M=MMU_ITE_PACKET_PTR_STORE; 2508 tr 71 M=MMU_ITE_PACKET_PTR_STORE TSE=F SLTH=T; 2509 tr 71 M=MMU_ITE_PACKET_PTR_STORE TSE=T SLTH=T; 2510 tr 71 M=MMU_ITE_PACKET_PTR_STORE TSE=T SLTH=F; 2511 echo " MMU_ITE_QMGR_FLL"; 2512 tr 50 M=MMU_ITE_QMGR_FLL; 2513 tr 51 M=MMU_ITE_QMGR_FLL; 2514 tr 52 M=MMU_ITE_QMGR_FLL; 2515 tr 71 M=MMU_ITE_QMGR_FLL TSE=F SLTH=T; 2516 tr 71 M=MMU_ITE_QMGR_FLL TSE=T SLTH=T; 2517 tr 71 M=MMU_ITE_QMGR_FLL TSE=T SLTH=F; 2518 echo " MMU_ITE_QMGR_QLL"; 2519 tr 50 M=MMU_ITE_QMGR_QLL; 2520 tr 51 M=MMU_ITE_QMGR_QLL; 2521 tr 52 M=MMU_ITE_QMGR_QLL; 2522 tr 71 M=MMU_ITE_QMGR_QLL TSE=F SLTH=T; 2523 tr 71 M=MMU_ITE_QMGR_QLL TSE=T SLTH=T; 2524 tr 71 M=MMU_ITE_QMGR_QLL TSE=T SLTH=F; 2525 #echo " MMU_ITE_WORK_QUEUE_0"; 2526 #tr 50 M=MMU_ITE_WORK_QUEUE_0; 2527 #tr 51 M=MMU_ITE_WORK_QUEUE_0; 2528 #tr 52 M=MMU_ITE_WORK_QUEUE_0; 2529 #tr 71 M=MMU_ITE_WORK_QUEUE_0 TSE=F SLTH=T; 2530 #tr 71 M=MMU_ITE_WORK_QUEUE_0 TSE=T SLTH=T; 2531 #tr 71 M=MMU_ITE_WORK_QUEUE_0 TSE=T SLTH=F; 2532 #echo " MMU_ITE_WORK_QUEUE_1"; 2533 #tr 50 M=MMU_ITE_WORK_QUEUE_1; 2534 #tr 51 M=MMU_ITE_WORK_QUEUE_1; 2535 #tr 52 M=MMU_ITE_WORK_QUEUE_1; 2536 #tr 71 M=MMU_ITE_WORK_QUEUE_1 TSE=F SLTH=T; 2537 #tr 71 M=MMU_ITE_WORK_QUEUE_1 TSE=T SLTH=T; 2538 #tr 71 M=MMU_ITE_WORK_QUEUE_1 TSE=T SLTH=F; 2539 echo " MMU_ITE_WORK_QUEUE_2"; 2540 tr 50 M=MMU_ITE_WORK_QUEUE_2; 2541 tr 51 M=MMU_ITE_WORK_QUEUE_2; 2542 tr 52 M=MMU_ITE_WORK_QUEUE_2; 2543 tr 71 M=MMU_ITE_WORK_QUEUE_2 TSE=F SLTH=T; 2544 tr 71 M=MMU_ITE_WORK_QUEUE_2 TSE=T SLTH=T; 2545 tr 71 M=MMU_ITE_WORK_QUEUE_2 TSE=T SLTH=F; 2546 echo " MMU_QSTRUCT_QBLOCK_BM_0"; 2547 tr 50 M=MMU_QSTRUCT_QBLOCK_BM_0; 2548 tr 51 M=MMU_QSTRUCT_QBLOCK_BM_0; 2549 tr 52 M=MMU_QSTRUCT_QBLOCK_BM_0; 2550 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_0 TSE=F SLTH=T; 2551 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_0 TSE=T SLTH=T; 2552 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_0 TSE=T SLTH=F; 2553 echo " MMU_QSTRUCT_QBLOCK_BM_1"; 2554 tr 50 M=MMU_QSTRUCT_QBLOCK_BM_1; 2555 tr 51 M=MMU_QSTRUCT_QBLOCK_BM_1; 2556 tr 52 M=MMU_QSTRUCT_QBLOCK_BM_1; 2557 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_1 TSE=F SLTH=T; 2558 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_1 TSE=T SLTH=T; 2559 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_1 TSE=T SLTH=F; 2560 echo " MMU_QSTRUCT_QBLOCK_BM_2"; 2561 tr 50 M=MMU_QSTRUCT_QBLOCK_BM_2; 2562 tr 51 M=MMU_QSTRUCT_QBLOCK_BM_2; 2563 tr 52 M=MMU_QSTRUCT_QBLOCK_BM_2; 2564 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_2 TSE=F SLTH=T; 2565 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_2 TSE=T SLTH=T; 2566 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_2 TSE=T SLTH=F; 2567 echo " MMU_QSTRUCT_QBLOCK_BM_3"; 2568 tr 50 M=MMU_QSTRUCT_QBLOCK_BM_3; 2569 tr 51 M=MMU_QSTRUCT_QBLOCK_BM_3; 2570 tr 52 M=MMU_QSTRUCT_QBLOCK_BM_3; 2571 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_3 TSE=F SLTH=T; 2572 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_3 TSE=T SLTH=T; 2573 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_3 TSE=T SLTH=F; 2574 echo " MMU_QSTRUCT_QBLOCK_BM_FIFO_0"; 2575 tr 50 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_0; 2576 tr 51 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_0; 2577 tr 52 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_0; 2578 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_0 TSE=F SLTH=T; 2579 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_0 TSE=T SLTH=T; 2580 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_0 TSE=T SLTH=F; 2581 echo " MMU_QSTRUCT_QBLOCK_BM_FIFO_1"; 2582 tr 50 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_1; 2583 tr 51 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_1; 2584 tr 52 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_1; 2585 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_1 TSE=F SLTH=T; 2586 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_1 TSE=T SLTH=T; 2587 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_1 TSE=T SLTH=F; 2588 echo " MMU_QSTRUCT_QBLOCK_BM_FIFO_2"; 2589 tr 50 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_2; 2590 tr 51 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_2; 2591 tr 52 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_2; 2592 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_2 TSE=F SLTH=T; 2593 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_2 TSE=T SLTH=T; 2594 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_2 TSE=T SLTH=F; 2595 echo " MMU_QSTRUCT_QBLOCK_BM_FIFO_3"; 2596 tr 50 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_3; 2597 tr 51 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_3; 2598 tr 52 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_3; 2599 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_3 TSE=F SLTH=T; 2600 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_3 TSE=T SLTH=T; 2601 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_3 TSE=T SLTH=F; 2602 echo " MMU_QSTRUCT_QBLOCK_NEXT_0"; 2603 tr 50 M=MMU_QSTRUCT_QBLOCK_NEXT_0; 2604 tr 51 M=MMU_QSTRUCT_QBLOCK_NEXT_0; 2605 tr 52 M=MMU_QSTRUCT_QBLOCK_NEXT_0; 2606 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_0 TSE=F SLTH=T; 2607 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_0 TSE=T SLTH=T; 2608 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_0 TSE=T SLTH=F; 2609 echo " MMU_QSTRUCT_QBLOCK_NEXT_1"; 2610 tr 50 M=MMU_QSTRUCT_QBLOCK_NEXT_1; 2611 tr 51 M=MMU_QSTRUCT_QBLOCK_NEXT_1; 2612 tr 52 M=MMU_QSTRUCT_QBLOCK_NEXT_1; 2613 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_1 TSE=F SLTH=T; 2614 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_1 TSE=T SLTH=T; 2615 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_1 TSE=T SLTH=F; 2616 echo " MMU_QSTRUCT_QBLOCK_NEXT_2"; 2617 tr 50 M=MMU_QSTRUCT_QBLOCK_NEXT_2; 2618 tr 51 M=MMU_QSTRUCT_QBLOCK_NEXT_2; 2619 tr 52 M=MMU_QSTRUCT_QBLOCK_NEXT_2; 2620 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_2 TSE=F SLTH=T; 2621 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_2 TSE=T SLTH=T; 2622 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_2 TSE=T SLTH=F; 2623 echo " MMU_QSTRUCT_QBLOCK_NEXT_3"; 2624 tr 50 M=MMU_QSTRUCT_QBLOCK_NEXT_3; 2625 tr 51 M=MMU_QSTRUCT_QBLOCK_NEXT_3; 2626 tr 52 M=MMU_QSTRUCT_QBLOCK_NEXT_3; 2627 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_3 TSE=F SLTH=T; 2628 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_3 TSE=T SLTH=T; 2629 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_3 TSE=T SLTH=F; 2630 echo " MMU_QSTRUCT_QBLOCK_NEXT_4"; 2631 tr 50 M=MMU_QSTRUCT_QBLOCK_NEXT_4; 2632 tr 51 M=MMU_QSTRUCT_QBLOCK_NEXT_4; 2633 tr 52 M=MMU_QSTRUCT_QBLOCK_NEXT_4; 2634 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_4 TSE=F SLTH=T; 2635 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_4 TSE=T SLTH=T; 2636 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_4 TSE=T SLTH=F; 2637 echo " MMU_QSTRUCT_QBLOCK_NEXT_5"; 2638 tr 50 M=MMU_QSTRUCT_QBLOCK_NEXT_5; 2639 tr 51 M=MMU_QSTRUCT_QBLOCK_NEXT_5; 2640 tr 52 M=MMU_QSTRUCT_QBLOCK_NEXT_5; 2641 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_5 TSE=F SLTH=T; 2642 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_5 TSE=T SLTH=T; 2643 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_5 TSE=T SLTH=F; 2644 echo " MMU_QSTRUCT_QBLOCK_NEXT_6"; 2645 tr 50 M=MMU_QSTRUCT_QBLOCK_NEXT_6; 2646 tr 51 M=MMU_QSTRUCT_QBLOCK_NEXT_6; 2647 tr 52 M=MMU_QSTRUCT_QBLOCK_NEXT_6; 2648 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_6 TSE=F SLTH=T; 2649 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_6 TSE=T SLTH=T; 2650 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_6 TSE=T SLTH=F; 2651 echo " MMU_QSTRUCT_QBLOCK_NEXT_7"; 2652 tr 50 M=MMU_QSTRUCT_QBLOCK_NEXT_7; 2653 tr 51 M=MMU_QSTRUCT_QBLOCK_NEXT_7; 2654 tr 52 M=MMU_QSTRUCT_QBLOCK_NEXT_7; 2655 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_7 TSE=F SLTH=T; 2656 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_7 TSE=T SLTH=T; 2657 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_7 TSE=T SLTH=F; 2658 if $?BCM56440 && !$?BCM56240_B0 \ 2659 'echo " MMU_QSTRUCT_QENTRY_LOWER_0"; \ 2660 tr 50 M=MMU_QSTRUCT_QENTRY_LOWER_0; \ 2661 tr 51 M=MMU_QSTRUCT_QENTRY_LOWER_0; \ 2662 tr 52 M=MMU_QSTRUCT_QENTRY_LOWER_0; \ 2663 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_0 TSE=F SLTH=T; \ 2664 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_0 TSE=T SLTH=T; \ 2665 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_0 TSE=T SLTH=F; \ 2666 echo " MMU_QSTRUCT_QENTRY_LOWER_1"; \ 2667 tr 50 M=MMU_QSTRUCT_QENTRY_LOWER_1; \ 2668 tr 51 M=MMU_QSTRUCT_QENTRY_LOWER_1; \ 2669 tr 52 M=MMU_QSTRUCT_QENTRY_LOWER_1; \ 2670 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_1 TSE=F SLTH=T; \ 2671 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_1 TSE=T SLTH=T; \ 2672 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_1 TSE=T SLTH=F; \ 2673 echo " MMU_QSTRUCT_QENTRY_LOWER_2"; \ 2674 tr 50 M=MMU_QSTRUCT_QENTRY_LOWER_2; \ 2675 tr 51 M=MMU_QSTRUCT_QENTRY_LOWER_2; \ 2676 tr 52 M=MMU_QSTRUCT_QENTRY_LOWER_2; \ 2677 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_2 TSE=F SLTH=T; \ 2678 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_2 TSE=T SLTH=T; \ 2679 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_2 TSE=T SLTH=F; \ 2680 echo " MMU_QSTRUCT_QENTRY_LOWER_3"; \ 2681 tr 50 M=MMU_QSTRUCT_QENTRY_LOWER_3; \ 2682 tr 51 M=MMU_QSTRUCT_QENTRY_LOWER_3; \ 2683 tr 52 M=MMU_QSTRUCT_QENTRY_LOWER_3; \ 2684 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_3 TSE=F SLTH=T; \ 2685 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_3 TSE=T SLTH=T; \ 2686 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_3 TSE=T SLTH=F; \ 2687 echo " MMU_QSTRUCT_QENTRY_LOWER_4"; \ 2688 tr 50 M=MMU_QSTRUCT_QENTRY_LOWER_4; \ 2689 tr 51 M=MMU_QSTRUCT_QENTRY_LOWER_4; \ 2690 tr 52 M=MMU_QSTRUCT_QENTRY_LOWER_4; \ 2691 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_4 TSE=F SLTH=T; \ 2692 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_4 TSE=T SLTH=T; \ 2693 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_4 TSE=T SLTH=F; \ 2694 echo " MMU_QSTRUCT_QENTRY_LOWER_5"; \ 2695 tr 50 M=MMU_QSTRUCT_QENTRY_LOWER_5; \ 2696 tr 51 M=MMU_QSTRUCT_QENTRY_LOWER_5; \ 2697 tr 52 M=MMU_QSTRUCT_QENTRY_LOWER_5; \ 2698 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_5 TSE=F SLTH=T; \ 2699 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_5 TSE=T SLTH=T; \ 2700 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_5 TSE=T SLTH=F; \ 2701 echo " MMU_QSTRUCT_QENTRY_LOWER_6"; \ 2702 tr 50 M=MMU_QSTRUCT_QENTRY_LOWER_6; \ 2703 tr 51 M=MMU_QSTRUCT_QENTRY_LOWER_6; \ 2704 tr 52 M=MMU_QSTRUCT_QENTRY_LOWER_6; \ 2705 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_6 TSE=F SLTH=T; \ 2706 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_6 TSE=T SLTH=T; \ 2707 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_6 TSE=T SLTH=F; \ 2708 echo " MMU_QSTRUCT_QENTRY_LOWER_7"; \ 2709 tr 50 M=MMU_QSTRUCT_QENTRY_LOWER_7; \ 2710 tr 51 M=MMU_QSTRUCT_QENTRY_LOWER_7; \ 2711 tr 52 M=MMU_QSTRUCT_QENTRY_LOWER_7; \ 2712 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_7 TSE=F SLTH=T; \ 2713 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_7 TSE=T SLTH=T; \ 2714 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_7 TSE=T SLTH=F;' 2715 $done 2716 echo " MMU_QSTRUCT_QENTRY_UPPER_0"; 2717 tr 50 M=MMU_QSTRUCT_QENTRY_UPPER_0; 2718 tr 51 M=MMU_QSTRUCT_QENTRY_UPPER_0; 2719 tr 52 M=MMU_QSTRUCT_QENTRY_UPPER_0; 2720 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_0 TSE=F SLTH=T; 2721 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_0 TSE=T SLTH=T; 2722 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_0 TSE=T SLTH=F; 2723 echo " MMU_QSTRUCT_QENTRY_UPPER_1"; 2724 tr 50 M=MMU_QSTRUCT_QENTRY_UPPER_1; 2725 tr 51 M=MMU_QSTRUCT_QENTRY_UPPER_1; 2726 tr 52 M=MMU_QSTRUCT_QENTRY_UPPER_1; 2727 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_1 TSE=F SLTH=T; 2728 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_1 TSE=T SLTH=T; 2729 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_1 TSE=T SLTH=F; 2730 echo " MMU_QSTRUCT_QENTRY_UPPER_2"; 2731 tr 50 M=MMU_QSTRUCT_QENTRY_UPPER_2; 2732 tr 51 M=MMU_QSTRUCT_QENTRY_UPPER_2; 2733 tr 52 M=MMU_QSTRUCT_QENTRY_UPPER_2; 2734 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_2 TSE=F SLTH=T; 2735 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_2 TSE=T SLTH=T; 2736 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_2 TSE=T SLTH=F; 2737 echo " MMU_QSTRUCT_QENTRY_UPPER_3"; 2738 tr 50 M=MMU_QSTRUCT_QENTRY_UPPER_3; 2739 tr 51 M=MMU_QSTRUCT_QENTRY_UPPER_3; 2740 tr 52 M=MMU_QSTRUCT_QENTRY_UPPER_3; 2741 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_3 TSE=F SLTH=T; 2742 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_3 TSE=T SLTH=T; 2743 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_3 TSE=T SLTH=F; 2744 echo " MMU_QSTRUCT_QENTRY_UPPER_4"; 2745 tr 50 M=MMU_QSTRUCT_QENTRY_UPPER_4; 2746 tr 51 M=MMU_QSTRUCT_QENTRY_UPPER_4; 2747 tr 52 M=MMU_QSTRUCT_QENTRY_UPPER_4; 2748 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_4 TSE=F SLTH=T; 2749 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_4 TSE=T SLTH=T; 2750 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_4 TSE=T SLTH=F; 2751 echo " MMU_QSTRUCT_QENTRY_UPPER_5"; 2752 tr 50 M=MMU_QSTRUCT_QENTRY_UPPER_5; 2753 tr 51 M=MMU_QSTRUCT_QENTRY_UPPER_5; 2754 tr 52 M=MMU_QSTRUCT_QENTRY_UPPER_5; 2755 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_5 TSE=F SLTH=T; 2756 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_5 TSE=T SLTH=T; 2757 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_5 TSE=T SLTH=F; 2758 echo " MMU_QSTRUCT_QENTRY_UPPER_6"; 2759 tr 50 M=MMU_QSTRUCT_QENTRY_UPPER_6; 2760 tr 51 M=MMU_QSTRUCT_QENTRY_UPPER_6; 2761 tr 52 M=MMU_QSTRUCT_QENTRY_UPPER_6; 2762 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_6 TSE=F SLTH=T; 2763 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_6 TSE=T SLTH=T; 2764 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_6 TSE=T SLTH=F; 2765 echo " MMU_QSTRUCT_QENTRY_UPPER_7"; 2766 tr 50 M=MMU_QSTRUCT_QENTRY_UPPER_7; 2767 tr 51 M=MMU_QSTRUCT_QENTRY_UPPER_7; 2768 tr 52 M=MMU_QSTRUCT_QENTRY_UPPER_7; 2769 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_7 TSE=F SLTH=T; 2770 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_7 TSE=T SLTH=T; 2771 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_7 TSE=T SLTH=F; 2772 echo " MMU_RQE_QMGR_FLL"; 2773 tr 50 M=MMU_RQE_QMGR_FLL; 2774 tr 51 M=MMU_RQE_QMGR_FLL; 2775 tr 52 M=MMU_RQE_QMGR_FLL; 2776 tr 71 M=MMU_RQE_QMGR_FLL TSE=F SLTH=T; 2777 tr 71 M=MMU_RQE_QMGR_FLL TSE=T SLTH=T; 2778 tr 71 M=MMU_RQE_QMGR_FLL TSE=T SLTH=F; 2779 echo " MMU_RQE_QMGR_QLL"; 2780 tr 50 M=MMU_RQE_QMGR_QLL; 2781 tr 51 M=MMU_RQE_QMGR_QLL; 2782 tr 52 M=MMU_RQE_QMGR_QLL; 2783 tr 71 M=MMU_RQE_QMGR_QLL TSE=F SLTH=T; 2784 tr 71 M=MMU_RQE_QMGR_QLL TSE=T SLTH=T; 2785 tr 71 M=MMU_RQE_QMGR_QLL TSE=T SLTH=F; 2786 echo " MMU_RQE_QUEUE_OP_NODE_MAP"; 2787 tr 50 M=MMU_RQE_QUEUE_OP_NODE_MAP; 2788 tr 51 M=MMU_RQE_QUEUE_OP_NODE_MAP; 2789 tr 52 M=MMU_RQE_QUEUE_OP_NODE_MAP; 2790 tr 71 M=MMU_RQE_QUEUE_OP_NODE_MAP TSE=F SLTH=T; 2791 tr 71 M=MMU_RQE_QUEUE_OP_NODE_MAP TSE=T SLTH=T; 2792 tr 71 M=MMU_RQE_QUEUE_OP_NODE_MAP TSE=T SLTH=F; 2793 echo " MMU_RQE_WORK_QUEUE"; 2794 tr 50 M=MMU_RQE_WORK_QUEUE; 2795 tr 51 M=MMU_RQE_WORK_QUEUE; 2796 tr 52 M=MMU_RQE_WORK_QUEUE; 2797 tr 71 M=MMU_RQE_WORK_QUEUE TSE=F SLTH=T; 2798 tr 71 M=MMU_RQE_WORK_QUEUE TSE=T SLTH=T; 2799 tr 71 M=MMU_RQE_WORK_QUEUE TSE=T SLTH=F; 2800 echo " MMU_THDO_OPNCONFIG_CELL"; 2801 tr 50 M=MMU_THDO_OPNCONFIG_CELL; 2802 tr 51 M=MMU_THDO_OPNCONFIG_CELL; 2803 tr 52 M=MMU_THDO_OPNCONFIG_CELL; 2804 tr 71 M=MMU_THDO_OPNCONFIG_CELL TSE=F SLTH=T; 2805 tr 71 M=MMU_THDO_OPNCONFIG_CELL TSE=T SLTH=T; 2806 tr 71 M=MMU_THDO_OPNCONFIG_CELL TSE=T SLTH=F; 2807 echo " MMU_THDO_OPNCONFIG_QENTRY"; 2808 tr 50 M=MMU_THDO_OPNCONFIG_QENTRY; 2809 tr 51 M=MMU_THDO_OPNCONFIG_QENTRY; 2810 tr 52 M=MMU_THDO_OPNCONFIG_QENTRY; 2811 tr 71 M=MMU_THDO_OPNCONFIG_QENTRY TSE=F SLTH=T; 2812 tr 71 M=MMU_THDO_OPNCONFIG_QENTRY TSE=T SLTH=T; 2813 tr 71 M=MMU_THDO_OPNCONFIG_QENTRY TSE=T SLTH=F; 2814 echo " MMU_THDO_OPNCOUNT_CELL"; 2815 tr 50 M=MMU_THDO_OPNCOUNT_CELL; 2816 tr 51 M=MMU_THDO_OPNCOUNT_CELL; 2817 tr 52 M=MMU_THDO_OPNCOUNT_CELL; 2818 tr 71 M=MMU_THDO_OPNCOUNT_CELL TSE=F SLTH=T; 2819 tr 71 M=MMU_THDO_OPNCOUNT_CELL TSE=T SLTH=T; 2820 tr 71 M=MMU_THDO_OPNCOUNT_CELL TSE=T SLTH=F; 2821 echo " MMU_THDO_OPNOFFSET_CELL"; 2822 tr 50 M=MMU_THDO_OPNOFFSET_CELL; 2823 tr 51 M=MMU_THDO_OPNOFFSET_CELL; 2824 tr 52 M=MMU_THDO_OPNOFFSET_CELL; 2825 tr 71 M=MMU_THDO_OPNOFFSET_CELL TSE=F SLTH=T; 2826 tr 71 M=MMU_THDO_OPNOFFSET_CELL TSE=T SLTH=T; 2827 tr 71 M=MMU_THDO_OPNOFFSET_CELL TSE=T SLTH=F; 2828 echo " MMU_THDO_OPNOFFSET_QENTRY"; 2829 tr 50 M=MMU_THDO_OPNOFFSET_QENTRY; 2830 tr 51 M=MMU_THDO_OPNOFFSET_QENTRY; 2831 tr 52 M=MMU_THDO_OPNOFFSET_QENTRY; 2832 tr 71 M=MMU_THDO_OPNOFFSET_QENTRY TSE=F SLTH=T; 2833 tr 71 M=MMU_THDO_OPNOFFSET_QENTRY TSE=T SLTH=T; 2834 tr 71 M=MMU_THDO_OPNOFFSET_QENTRY TSE=T SLTH=F; 2835 echo " MMU_THDO_OPNSTATUS_CELL"; 2836 tr 50 M=MMU_THDO_OPNSTATUS_CELL; 2837 tr 51 M=MMU_THDO_OPNSTATUS_CELL; 2838 tr 52 M=MMU_THDO_OPNSTATUS_CELL; 2839 tr 71 M=MMU_THDO_OPNSTATUS_CELL TSE=F SLTH=T; 2840 tr 71 M=MMU_THDO_OPNSTATUS_CELL TSE=T SLTH=T; 2841 tr 71 M=MMU_THDO_OPNSTATUS_CELL TSE=T SLTH=F; 2842 echo " MMU_THDO_OPNSTATUS_QENTRY"; 2843 tr 50 M=MMU_THDO_OPNSTATUS_QENTRY; 2844 tr 51 M=MMU_THDO_OPNSTATUS_QENTRY; 2845 tr 52 M=MMU_THDO_OPNSTATUS_QENTRY; 2846 tr 71 M=MMU_THDO_OPNSTATUS_QENTRY TSE=F SLTH=T; 2847 tr 71 M=MMU_THDO_OPNSTATUS_QENTRY TSE=T SLTH=T; 2848 tr 71 M=MMU_THDO_OPNSTATUS_QENTRY TSE=T SLTH=F; 2849 echo " MMU_THDO_QCONFIG_CELL"; 2850 tr 50 M=MMU_THDO_QCONFIG_CELL; 2851 tr 51 M=MMU_THDO_QCONFIG_CELL; 2852 tr 52 M=MMU_THDO_QCONFIG_CELL; 2853 tr 71 M=MMU_THDO_QCONFIG_CELL TSE=F SLTH=T; 2854 tr 71 M=MMU_THDO_QCONFIG_CELL TSE=T SLTH=T; 2855 tr 71 M=MMU_THDO_QCONFIG_CELL TSE=T SLTH=F; 2856 echo " MMU_THDO_QCONFIG_QENTRY"; 2857 tr 50 M=MMU_THDO_QCONFIG_QENTRY; 2858 tr 51 M=MMU_THDO_QCONFIG_QENTRY; 2859 tr 52 M=MMU_THDO_QCONFIG_QENTRY; 2860 tr 71 M=MMU_THDO_QCONFIG_QENTRY TSE=F SLTH=T; 2861 tr 71 M=MMU_THDO_QCONFIG_QENTRY TSE=T SLTH=T; 2862 tr 71 M=MMU_THDO_QCONFIG_QENTRY TSE=T SLTH=F; 2863 echo " MMU_THDO_QCOUNT_CELL_0"; 2864 tr 50 M=MMU_THDO_QCOUNT_CELL_0; 2865 tr 51 M=MMU_THDO_QCOUNT_CELL_0; 2866 tr 52 M=MMU_THDO_QCOUNT_CELL_0; 2867 tr 71 M=MMU_THDO_QCOUNT_CELL_0 TSE=F SLTH=T; 2868 tr 71 M=MMU_THDO_QCOUNT_CELL_0 TSE=T SLTH=T; 2869 tr 71 M=MMU_THDO_QCOUNT_CELL_0 TSE=T SLTH=F; 2870 echo " MMU_THDO_QOFFSET_CELL"; 2871 tr 50 M=MMU_THDO_QOFFSET_CELL; 2872 tr 51 M=MMU_THDO_QOFFSET_CELL; 2873 tr 52 M=MMU_THDO_QOFFSET_CELL; 2874 tr 71 M=MMU_THDO_QOFFSET_CELL TSE=F SLTH=T; 2875 tr 71 M=MMU_THDO_QOFFSET_CELL TSE=T SLTH=T; 2876 tr 71 M=MMU_THDO_QOFFSET_CELL TSE=T SLTH=F; 2877 echo " MMU_THDO_QOFFSET_QENTRY"; 2878 tr 50 M=MMU_THDO_QOFFSET_QENTRY; 2879 tr 51 M=MMU_THDO_QOFFSET_QENTRY; 2880 tr 52 M=MMU_THDO_QOFFSET_QENTRY; 2881 tr 71 M=MMU_THDO_QOFFSET_QENTRY TSE=F SLTH=T; 2882 tr 71 M=MMU_THDO_QOFFSET_QENTRY TSE=T SLTH=T; 2883 tr 71 M=MMU_THDO_QOFFSET_QENTRY TSE=T SLTH=F; 2884 echo " MMU_THDO_QRESET_VALUE_CELL_0"; 2885 tr 50 M=MMU_THDO_QRESET_VALUE_CELL_0; 2886 tr 51 M=MMU_THDO_QRESET_VALUE_CELL_0; 2887 tr 52 M=MMU_THDO_QRESET_VALUE_CELL_0; 2888 tr 71 M=MMU_THDO_QRESET_VALUE_CELL_0 TSE=F SLTH=T; 2889 tr 71 M=MMU_THDO_QRESET_VALUE_CELL_0 TSE=T SLTH=T; 2890 tr 71 M=MMU_THDO_QRESET_VALUE_CELL_0 TSE=T SLTH=F; 2891 echo " MMU_THDO_QRESET_VALUE_QENTRY_0"; 2892 tr 50 M=MMU_THDO_QRESET_VALUE_QENTRY_0; 2893 tr 51 M=MMU_THDO_QRESET_VALUE_QENTRY_0; 2894 tr 52 M=MMU_THDO_QRESET_VALUE_QENTRY_0; 2895 tr 71 M=MMU_THDO_QRESET_VALUE_QENTRY_0 TSE=F SLTH=T; 2896 tr 71 M=MMU_THDO_QRESET_VALUE_QENTRY_0 TSE=T SLTH=T; 2897 tr 71 M=MMU_THDO_QRESET_VALUE_QENTRY_0 TSE=T SLTH=F; 2898 echo " MMU_THDO_QSTATUS_CELL_0"; 2899 tr 50 M=MMU_THDO_QSTATUS_CELL_0; 2900 tr 51 M=MMU_THDO_QSTATUS_CELL_0; 2901 tr 52 M=MMU_THDO_QSTATUS_CELL_0; 2902 tr 71 M=MMU_THDO_QSTATUS_CELL_0 TSE=F SLTH=T; 2903 tr 71 M=MMU_THDO_QSTATUS_CELL_0 TSE=T SLTH=T; 2904 tr 71 M=MMU_THDO_QSTATUS_CELL_0 TSE=T SLTH=F; 2905 echo " MMU_THDO_QSTATUS_QENTRY_0"; 2906 tr 50 M=MMU_THDO_QSTATUS_QENTRY_0; 2907 tr 51 M=MMU_THDO_QSTATUS_QENTRY_0; 2908 tr 52 M=MMU_THDO_QSTATUS_QENTRY_0; 2909 tr 71 M=MMU_THDO_QSTATUS_QENTRY_0 TSE=F SLTH=T; 2910 tr 71 M=MMU_THDO_QSTATUS_QENTRY_0 TSE=T SLTH=T; 2911 tr 71 M=MMU_THDO_QSTATUS_QENTRY_0 TSE=T SLTH=F; 2912 echo " MMU_TOQ_STATE_MEM0"; 2913 tr 50 M=MMU_TOQ_STATE_MEM0; 2914 tr 51 M=MMU_TOQ_STATE_MEM0; 2915 tr 52 M=MMU_TOQ_STATE_MEM0; 2916 tr 71 M=MMU_TOQ_STATE_MEM0 TSE=F SLTH=T; 2917 tr 71 M=MMU_TOQ_STATE_MEM0 TSE=T SLTH=T; 2918 tr 71 M=MMU_TOQ_STATE_MEM0 TSE=T SLTH=F; 2919 echo " MMU_TOQ_STATE_MEM1"; 2920 tr 50 M=MMU_TOQ_STATE_MEM1; 2921 tr 51 M=MMU_TOQ_STATE_MEM1; 2922 tr 52 M=MMU_TOQ_STATE_MEM1; 2923 tr 71 M=MMU_TOQ_STATE_MEM1 TSE=F SLTH=T; 2924 tr 71 M=MMU_TOQ_STATE_MEM1 TSE=T SLTH=T; 2925 tr 71 M=MMU_TOQ_STATE_MEM1 TSE=T SLTH=F; 2926 echo " MMU_WRED_DROP_CURVE_PROFILE_0"; 2927 tr 50 M=MMU_WRED_DROP_CURVE_PROFILE_0; 2928 tr 51 M=MMU_WRED_DROP_CURVE_PROFILE_0; 2929 tr 52 M=MMU_WRED_DROP_CURVE_PROFILE_0; 2930 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_0 TSE=F SLTH=T; 2931 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_0 TSE=T SLTH=T; 2932 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_0 TSE=T SLTH=F; 2933 echo " MMU_WRED_DROP_CURVE_PROFILE_1"; 2934 tr 50 M=MMU_WRED_DROP_CURVE_PROFILE_1; 2935 tr 51 M=MMU_WRED_DROP_CURVE_PROFILE_1; 2936 tr 52 M=MMU_WRED_DROP_CURVE_PROFILE_1; 2937 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_1 TSE=F SLTH=T; 2938 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_1 TSE=T SLTH=T; 2939 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_1 TSE=T SLTH=F; 2940 echo " MMU_WRED_DROP_CURVE_PROFILE_2"; 2941 tr 50 M=MMU_WRED_DROP_CURVE_PROFILE_2; 2942 tr 51 M=MMU_WRED_DROP_CURVE_PROFILE_2; 2943 tr 52 M=MMU_WRED_DROP_CURVE_PROFILE_2; 2944 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_2 TSE=F SLTH=T; 2945 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_2 TSE=T SLTH=T; 2946 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_2 TSE=T SLTH=F; 2947 echo " MMU_WRED_DROP_CURVE_PROFILE_3"; 2948 tr 50 M=MMU_WRED_DROP_CURVE_PROFILE_3; 2949 tr 51 M=MMU_WRED_DROP_CURVE_PROFILE_3; 2950 tr 52 M=MMU_WRED_DROP_CURVE_PROFILE_3; 2951 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_3 TSE=F SLTH=T; 2952 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_3 TSE=T SLTH=T; 2953 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_3 TSE=T SLTH=F; 2954 echo " MMU_WRED_DROP_CURVE_PROFILE_4"; 2955 tr 50 M=MMU_WRED_DROP_CURVE_PROFILE_4; 2956 tr 51 M=MMU_WRED_DROP_CURVE_PROFILE_4; 2957 tr 52 M=MMU_WRED_DROP_CURVE_PROFILE_4; 2958 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_4 TSE=F SLTH=T; 2959 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_4 TSE=T SLTH=T; 2960 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_4 TSE=T SLTH=F; 2961 echo " MMU_WRED_DROP_CURVE_PROFILE_5"; 2962 tr 50 M=MMU_WRED_DROP_CURVE_PROFILE_5; 2963 tr 51 M=MMU_WRED_DROP_CURVE_PROFILE_5; 2964 tr 52 M=MMU_WRED_DROP_CURVE_PROFILE_5; 2965 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_5 TSE=F SLTH=T; 2966 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_5 TSE=T SLTH=T; 2967 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_5 TSE=T SLTH=F; 2968 echo " MMU_WRED_OPN_AVG_QSIZE_BUFFER"; 2969 tr 50 M=MMU_WRED_OPN_AVG_QSIZE_BUFFER; 2970 tr 51 M=MMU_WRED_OPN_AVG_QSIZE_BUFFER; 2971 tr 52 M=MMU_WRED_OPN_AVG_QSIZE_BUFFER; 2972 tr 71 M=MMU_WRED_OPN_AVG_QSIZE_BUFFER TSE=F SLTH=T; 2973 tr 71 M=MMU_WRED_OPN_AVG_QSIZE_BUFFER TSE=T SLTH=T; 2974 tr 71 M=MMU_WRED_OPN_AVG_QSIZE_BUFFER TSE=T SLTH=F; 2975 echo " MMU_WRED_OPN_AVG_QSIZE_QENTRY"; 2976 tr 50 M=MMU_WRED_OPN_AVG_QSIZE_QENTRY; 2977 tr 51 M=MMU_WRED_OPN_AVG_QSIZE_QENTRY; 2978 tr 52 M=MMU_WRED_OPN_AVG_QSIZE_QENTRY; 2979 tr 71 M=MMU_WRED_OPN_AVG_QSIZE_QENTRY TSE=F SLTH=T; 2980 tr 71 M=MMU_WRED_OPN_AVG_QSIZE_QENTRY TSE=T SLTH=T; 2981 tr 71 M=MMU_WRED_OPN_AVG_QSIZE_QENTRY TSE=T SLTH=F; 2982 echo " MMU_WRED_OPN_CONFIG_BUFFER"; 2983 tr 50 M=MMU_WRED_OPN_CONFIG_BUFFER; 2984 tr 51 M=MMU_WRED_OPN_CONFIG_BUFFER; 2985 tr 52 M=MMU_WRED_OPN_CONFIG_BUFFER; 2986 tr 71 M=MMU_WRED_OPN_CONFIG_BUFFER TSE=F SLTH=T; 2987 tr 71 M=MMU_WRED_OPN_CONFIG_BUFFER TSE=T SLTH=T; 2988 tr 71 M=MMU_WRED_OPN_CONFIG_BUFFER TSE=T SLTH=F; 2989 echo " MMU_WRED_OPN_CONFIG_QENTRY"; 2990 tr 50 M=MMU_WRED_OPN_CONFIG_QENTRY; 2991 tr 51 M=MMU_WRED_OPN_CONFIG_QENTRY; 2992 tr 52 M=MMU_WRED_OPN_CONFIG_QENTRY; 2993 tr 71 M=MMU_WRED_OPN_CONFIG_QENTRY TSE=F SLTH=T; 2994 tr 71 M=MMU_WRED_OPN_CONFIG_QENTRY TSE=T SLTH=T; 2995 tr 71 M=MMU_WRED_OPN_CONFIG_QENTRY TSE=T SLTH=F; 2996 echo " MMU_WRED_OPN_DROP_THD_DEQ"; 2997 tr 50 M=MMU_WRED_OPN_DROP_THD_DEQ; 2998 tr 51 M=MMU_WRED_OPN_DROP_THD_DEQ; 2999 tr 52 M=MMU_WRED_OPN_DROP_THD_DEQ; 3000 tr 71 M=MMU_WRED_OPN_DROP_THD_DEQ TSE=F SLTH=T; 3001 tr 71 M=MMU_WRED_OPN_DROP_THD_DEQ TSE=T SLTH=T; 3002 tr 71 M=MMU_WRED_OPN_DROP_THD_DEQ TSE=T SLTH=F; 3003 echo " MMU_WRED_OPN_DROP_THD_ENQ"; 3004 tr 50 M=MMU_WRED_OPN_DROP_THD_ENQ; 3005 tr 51 M=MMU_WRED_OPN_DROP_THD_ENQ; 3006 tr 52 M=MMU_WRED_OPN_DROP_THD_ENQ; 3007 tr 71 M=MMU_WRED_OPN_DROP_THD_ENQ TSE=F SLTH=T; 3008 tr 71 M=MMU_WRED_OPN_DROP_THD_ENQ TSE=T SLTH=T; 3009 tr 71 M=MMU_WRED_OPN_DROP_THD_ENQ TSE=T SLTH=F; 3010 echo " MMU_WRED_QUEUE_AVG_QSIZE_BUFFER"; 3011 tr 50 M=MMU_WRED_QUEUE_AVG_QSIZE_BUFFER; 3012 tr 51 M=MMU_WRED_QUEUE_AVG_QSIZE_BUFFER; 3013 tr 52 M=MMU_WRED_QUEUE_AVG_QSIZE_BUFFER; 3014 tr 71 M=MMU_WRED_QUEUE_AVG_QSIZE_BUFFER TSE=F SLTH=T; 3015 tr 71 M=MMU_WRED_QUEUE_AVG_QSIZE_BUFFER TSE=T SLTH=T; 3016 tr 71 M=MMU_WRED_QUEUE_AVG_QSIZE_BUFFER TSE=T SLTH=F; 3017 echo " MMU_WRED_QUEUE_AVG_QSIZE_QENTRY"; 3018 tr 50 M=MMU_WRED_QUEUE_AVG_QSIZE_QENTRY; 3019 tr 51 M=MMU_WRED_QUEUE_AVG_QSIZE_QENTRY; 3020 tr 52 M=MMU_WRED_QUEUE_AVG_QSIZE_QENTRY; 3021 tr 71 M=MMU_WRED_QUEUE_AVG_QSIZE_QENTRY TSE=F SLTH=T; 3022 tr 71 M=MMU_WRED_QUEUE_AVG_QSIZE_QENTRY TSE=T SLTH=T; 3023 tr 71 M=MMU_WRED_QUEUE_AVG_QSIZE_QENTRY TSE=T SLTH=F; 3024 echo " MMU_WRED_QUEUE_CONFIG_BUFFER"; 3025 tr 50 M=MMU_WRED_QUEUE_CONFIG_BUFFER; 3026 tr 51 M=MMU_WRED_QUEUE_CONFIG_BUFFER; 3027 tr 52 M=MMU_WRED_QUEUE_CONFIG_BUFFER; 3028 tr 71 M=MMU_WRED_QUEUE_CONFIG_BUFFER TSE=F SLTH=T; 3029 tr 71 M=MMU_WRED_QUEUE_CONFIG_BUFFER TSE=T SLTH=T; 3030 tr 71 M=MMU_WRED_QUEUE_CONFIG_BUFFER TSE=T SLTH=F; 3031 echo " MMU_WRED_QUEUE_CONFIG_QENTRY"; 3032 tr 50 M=MMU_WRED_QUEUE_CONFIG_QENTRY; 3033 tr 51 M=MMU_WRED_QUEUE_CONFIG_QENTRY; 3034 tr 52 M=MMU_WRED_QUEUE_CONFIG_QENTRY; 3035 tr 71 M=MMU_WRED_QUEUE_CONFIG_QENTRY TSE=F SLTH=T; 3036 tr 71 M=MMU_WRED_QUEUE_CONFIG_QENTRY TSE=T SLTH=T; 3037 tr 71 M=MMU_WRED_QUEUE_CONFIG_QENTRY TSE=T SLTH=F; 3038 echo " MMU_WRED_QUEUE_DROP_THD_DEQ"; 3039 tr 50 M=MMU_WRED_QUEUE_DROP_THD_DEQ; 3040 tr 51 M=MMU_WRED_QUEUE_DROP_THD_DEQ; 3041 tr 52 M=MMU_WRED_QUEUE_DROP_THD_DEQ; 3042 tr 71 M=MMU_WRED_QUEUE_DROP_THD_DEQ TSE=F SLTH=T; 3043 tr 71 M=MMU_WRED_QUEUE_DROP_THD_DEQ TSE=T SLTH=T; 3044 tr 71 M=MMU_WRED_QUEUE_DROP_THD_DEQ TSE=T SLTH=F; 3045 echo " MMU_WRED_QUEUE_DROP_THD_ENQ_0"; 3046 tr 50 M=MMU_WRED_QUEUE_DROP_THD_ENQ_0; 3047 tr 51 M=MMU_WRED_QUEUE_DROP_THD_ENQ_0; 3048 tr 52 M=MMU_WRED_QUEUE_DROP_THD_ENQ_0; 3049 tr 71 M=MMU_WRED_QUEUE_DROP_THD_ENQ_0 TSE=F SLTH=T; 3050 tr 71 M=MMU_WRED_QUEUE_DROP_THD_ENQ_0 TSE=T SLTH=T; 3051 tr 71 M=MMU_WRED_QUEUE_DROP_THD_ENQ_0 TSE=T SLTH=F; 3052 echo " MMU_WRED_QUEUE_DROP_THD_ENQ_1"; 3053 tr 50 M=MMU_WRED_QUEUE_DROP_THD_ENQ_1; 3054 tr 51 M=MMU_WRED_QUEUE_DROP_THD_ENQ_1; 3055 tr 52 M=MMU_WRED_QUEUE_DROP_THD_ENQ_1; 3056 tr 71 M=MMU_WRED_QUEUE_DROP_THD_ENQ_1 TSE=F SLTH=T; 3057 tr 71 M=MMU_WRED_QUEUE_DROP_THD_ENQ_1 TSE=T SLTH=T; 3058 tr 71 M=MMU_WRED_QUEUE_DROP_THD_ENQ_1 TSE=T SLTH=F; 3059 echo " MMU_WRED_QUEUE_OP_NODE_MAP"; 3060 tr 50 M=MMU_WRED_QUEUE_OP_NODE_MAP; 3061 tr 51 M=MMU_WRED_QUEUE_OP_NODE_MAP; 3062 tr 52 M=MMU_WRED_QUEUE_OP_NODE_MAP; 3063 tr 71 M=MMU_WRED_QUEUE_OP_NODE_MAP TSE=F SLTH=T; 3064 tr 71 M=MMU_WRED_QUEUE_OP_NODE_MAP TSE=T SLTH=T; 3065 tr 71 M=MMU_WRED_QUEUE_OP_NODE_MAP TSE=T SLTH=F; 3066 echo " MODPORT_MAP_M0"; 3067 tr 50 M=MODPORT_MAP_M0; 3068 tr 51 M=MODPORT_MAP_M0; 3069 tr 52 M=MODPORT_MAP_M0; 3070 tr 71 M=MODPORT_MAP_M0 TSE=F SLTH=T; 3071 tr 71 M=MODPORT_MAP_M0 TSE=T SLTH=T; 3072 tr 71 M=MODPORT_MAP_M0 TSE=T SLTH=F; 3073 echo " MODPORT_MAP_M1"; 3074 tr 50 M=MODPORT_MAP_M1; 3075 tr 51 M=MODPORT_MAP_M1; 3076 tr 52 M=MODPORT_MAP_M1; 3077 tr 71 M=MODPORT_MAP_M1 TSE=F SLTH=T; 3078 tr 71 M=MODPORT_MAP_M1 TSE=T SLTH=T; 3079 tr 71 M=MODPORT_MAP_M1 TSE=T SLTH=F; 3080 echo " MODPORT_MAP_M2"; 3081 tr 50 M=MODPORT_MAP_M2; 3082 tr 51 M=MODPORT_MAP_M2; 3083 tr 52 M=MODPORT_MAP_M2; 3084 tr 71 M=MODPORT_MAP_M2 TSE=F SLTH=T; 3085 tr 71 M=MODPORT_MAP_M2 TSE=T SLTH=T; 3086 tr 71 M=MODPORT_MAP_M2 TSE=T SLTH=F; 3087 echo " MODPORT_MAP_M3"; 3088 tr 50 M=MODPORT_MAP_M3; 3089 tr 51 M=MODPORT_MAP_M3; 3090 tr 52 M=MODPORT_MAP_M3; 3091 tr 71 M=MODPORT_MAP_M3 TSE=F SLTH=T; 3092 tr 71 M=MODPORT_MAP_M3 TSE=T SLTH=T; 3093 tr 71 M=MODPORT_MAP_M3 TSE=T SLTH=F; 3094 ktsanity_ecc_off.soc 3095 echo " MODPORT_MAP_MIRROR"; 3096 tr 50 M=MODPORT_MAP_MIRROR; 3097 tr 51 M=MODPORT_MAP_MIRROR; 3098 tr 52 M=MODPORT_MAP_MIRROR; 3099 tr 71 M=MODPORT_MAP_MIRROR TSE=F SLTH=T; 3100 tr 71 M=MODPORT_MAP_MIRROR TSE=T SLTH=T; 3101 tr 71 M=MODPORT_MAP_MIRROR TSE=T SLTH=F; 3102 echo " MODPORT_MAP_SW"; 3103 tr 50 M=MODPORT_MAP_SW; 3104 tr 51 M=MODPORT_MAP_SW; 3105 tr 52 M=MODPORT_MAP_SW; 3106 tr 71 M=MODPORT_MAP_SW TSE=F SLTH=T; 3107 tr 71 M=MODPORT_MAP_SW TSE=T SLTH=T; 3108 tr 71 M=MODPORT_MAP_SW TSE=T SLTH=F; 3109 echo " MPLS_ENTRY"; 3110 tr 50 M=MPLS_ENTRY; 3111 tr 51 M=MPLS_ENTRY; 3112 tr 52 M=MPLS_ENTRY; 3113 tr 71 M=MPLS_ENTRY TSE=F SLTH=T; 3114 tr 71 M=MPLS_ENTRY TSE=T SLTH=T; 3115 tr 71 M=MPLS_ENTRY TSE=T SLTH=F; 3116 echo " MULTIPASS_LOOPBACK_BITMAP"; 3117 tr 50 M=MULTIPASS_LOOPBACK_BITMAP; 3118 #tr 51 M=MULTIPASS_LOOPBACK_BITMAP; 3119 #tr 52 M=MULTIPASS_LOOPBACK_BITMAP; 3120 tr 71 M=MULTIPASS_LOOPBACK_BITMAP TSE=F SLTH=T; 3121 tr 71 M=MULTIPASS_LOOPBACK_BITMAP TSE=T SLTH=T; 3122 tr 71 M=MULTIPASS_LOOPBACK_BITMAP TSE=T SLTH=F; 3123 echo " MY_STATION_TCAM"; 3124 tr 50 M=MY_STATION_TCAM; 3125 tr 51 M=MY_STATION_TCAM; 3126 tr 52 M=MY_STATION_TCAM; 3127 tr 71 M=MY_STATION_TCAM TSE=F SLTH=T; 3128 tr 71 M=MY_STATION_TCAM TSE=T SLTH=T; 3129 tr 71 M=MY_STATION_TCAM TSE=T SLTH=F; 3130 echo " MY_STATION_TCAM_DATA_ONLY"; 3131 tr 50 M=MY_STATION_TCAM_DATA_ONLY; 3132 tr 51 M=MY_STATION_TCAM_DATA_ONLY; 3133 tr 52 M=MY_STATION_TCAM_DATA_ONLY; 3134 tr 71 M=MY_STATION_TCAM_DATA_ONLY TSE=F SLTH=T; 3135 tr 71 M=MY_STATION_TCAM_DATA_ONLY TSE=T SLTH=T; 3136 tr 71 M=MY_STATION_TCAM_DATA_ONLY TSE=T SLTH=F; 3137 echo " MY_STATION_TCAM_ENTRY_ONLY"; 3138 tr 50 M=MY_STATION_TCAM_ENTRY_ONLY; 3139 tr 51 M=MY_STATION_TCAM_ENTRY_ONLY; 3140 tr 52 M=MY_STATION_TCAM_ENTRY_ONLY; 3141 tr 71 M=MY_STATION_TCAM_ENTRY_ONLY TSE=F SLTH=T; 3142 tr 71 M=MY_STATION_TCAM_ENTRY_ONLY TSE=T SLTH=T; 3143 tr 71 M=MY_STATION_TCAM_ENTRY_ONLY TSE=T SLTH=F; 3144 echo " NONUCAST_TRUNK_BLOCK_MASK"; 3145 tr 50 M=NONUCAST_TRUNK_BLOCK_MASK; 3146 tr 51 M=NONUCAST_TRUNK_BLOCK_MASK; 3147 tr 52 M=NONUCAST_TRUNK_BLOCK_MASK; 3148 tr 71 M=NONUCAST_TRUNK_BLOCK_MASK TSE=F SLTH=T; 3149 tr 71 M=NONUCAST_TRUNK_BLOCK_MASK TSE=T SLTH=T; 3150 tr 71 M=NONUCAST_TRUNK_BLOCK_MASK TSE=T SLTH=F; 3151 echo " OAM_LM_COUNTERS"; 3152 tr 50 M=OAM_LM_COUNTERS; 3153 tr 51 M=OAM_LM_COUNTERS; 3154 tr 52 M=OAM_LM_COUNTERS; 3155 tr 71 M=OAM_LM_COUNTERS TSE=F SLTH=T; 3156 tr 71 M=OAM_LM_COUNTERS TSE=T SLTH=T; 3157 tr 71 M=OAM_LM_COUNTERS TSE=T SLTH=F; 3158 echo " OAM_OPCODE_CONTROL_PROFILE"; 3159 tr 50 M=OAM_OPCODE_CONTROL_PROFILE; 3160 tr 51 M=OAM_OPCODE_CONTROL_PROFILE; 3161 tr 52 M=OAM_OPCODE_CONTROL_PROFILE; 3162 tr 71 M=OAM_OPCODE_CONTROL_PROFILE TSE=F SLTH=T; 3163 tr 71 M=OAM_OPCODE_CONTROL_PROFILE TSE=T SLTH=T; 3164 tr 71 M=OAM_OPCODE_CONTROL_PROFILE TSE=T SLTH=F; 3165 echo " PHB2_COS_MAP"; 3166 tr 50 M=PHB2_COS_MAP; 3167 tr 51 M=PHB2_COS_MAP; 3168 tr 52 M=PHB2_COS_MAP; 3169 tr 71 M=PHB2_COS_MAP TSE=F SLTH=T; 3170 tr 71 M=PHB2_COS_MAP TSE=T SLTH=T; 3171 tr 71 M=PHB2_COS_MAP TSE=T SLTH=F; 3172 echo " PORT_BRIDGE_BMAP"; 3173 tr 50 M=PORT_BRIDGE_BMAP; 3174 #tr 51 M=PORT_BRIDGE_BMAP; 3175 #tr 52 M=PORT_BRIDGE_BMAP; 3176 tr 71 M=PORT_BRIDGE_BMAP TSE=F SLTH=T; 3177 tr 71 M=PORT_BRIDGE_BMAP TSE=T SLTH=T; 3178 tr 71 M=PORT_BRIDGE_BMAP TSE=T SLTH=F; 3179 echo " PORT_BRIDGE_MIRROR_BMAP"; 3180 tr 50 M=PORT_BRIDGE_MIRROR_BMAP; 3181 #tr 51 M=PORT_BRIDGE_MIRROR_BMAP; 3182 #tr 52 M=PORT_BRIDGE_MIRROR_BMAP; 3183 tr 71 M=PORT_BRIDGE_MIRROR_BMAP TSE=F SLTH=T; 3184 tr 71 M=PORT_BRIDGE_MIRROR_BMAP TSE=T SLTH=T; 3185 tr 71 M=PORT_BRIDGE_MIRROR_BMAP TSE=T SLTH=F; 3186 echo " PORT_CBL_TABLE"; 3187 tr 50 M=PORT_CBL_TABLE; 3188 tr 51 M=PORT_CBL_TABLE; 3189 tr 52 M=PORT_CBL_TABLE; 3190 tr 71 M=PORT_CBL_TABLE TSE=F SLTH=T; 3191 tr 71 M=PORT_CBL_TABLE TSE=T SLTH=T; 3192 tr 71 M=PORT_CBL_TABLE TSE=T SLTH=F; 3193 echo " PORT_CBL_TABLE_MODBASE"; 3194 tr 50 M=PORT_CBL_TABLE_MODBASE; 3195 tr 51 M=PORT_CBL_TABLE_MODBASE; 3196 tr 52 M=PORT_CBL_TABLE_MODBASE; 3197 tr 71 M=PORT_CBL_TABLE_MODBASE TSE=F SLTH=T; 3198 tr 71 M=PORT_CBL_TABLE_MODBASE TSE=T SLTH=T; 3199 tr 71 M=PORT_CBL_TABLE_MODBASE TSE=T SLTH=F; 3200 echo " PORT_COS_MAP"; 3201 tr 50 M=PORT_COS_MAP; 3202 tr 51 M=PORT_COS_MAP; 3203 tr 52 M=PORT_COS_MAP; 3204 tr 71 M=PORT_COS_MAP TSE=F SLTH=T; 3205 tr 71 M=PORT_COS_MAP TSE=T SLTH=T; 3206 tr 71 M=PORT_COS_MAP TSE=T SLTH=F; 3207 echo " PORT_LAG_FAILOVER_SET"; 3208 tr 50 M=PORT_LAG_FAILOVER_SET; 3209 tr 51 M=PORT_LAG_FAILOVER_SET; 3210 tr 52 M=PORT_LAG_FAILOVER_SET; 3211 tr 71 M=PORT_LAG_FAILOVER_SET TSE=F SLTH=T; 3212 tr 71 M=PORT_LAG_FAILOVER_SET TSE=T SLTH=T; 3213 tr 71 M=PORT_LAG_FAILOVER_SET TSE=T SLTH=F; 3214 echo " PORT_OR_TRUNK_MAC_COUNT"; 3215 tr 50 M=PORT_OR_TRUNK_MAC_COUNT; 3216 tr 51 M=PORT_OR_TRUNK_MAC_COUNT; 3217 tr 52 M=PORT_OR_TRUNK_MAC_COUNT; 3218 tr 71 M=PORT_OR_TRUNK_MAC_COUNT TSE=F SLTH=T; 3219 tr 71 M=PORT_OR_TRUNK_MAC_COUNT TSE=T SLTH=T; 3220 tr 71 M=PORT_OR_TRUNK_MAC_COUNT TSE=T SLTH=F; 3221 echo " PORT_OR_TRUNK_MAC_LIMIT"; 3222 tr 50 M=PORT_OR_TRUNK_MAC_LIMIT; 3223 tr 51 M=PORT_OR_TRUNK_MAC_LIMIT; 3224 tr 52 M=PORT_OR_TRUNK_MAC_LIMIT; 3225 tr 71 M=PORT_OR_TRUNK_MAC_LIMIT TSE=F SLTH=T; 3226 tr 71 M=PORT_OR_TRUNK_MAC_LIMIT TSE=T SLTH=T; 3227 tr 71 M=PORT_OR_TRUNK_MAC_LIMIT TSE=T SLTH=F; 3228 echo " PORT_TAB"; 3229 tr 50 M=PORT_TAB; 3230 tr 51 M=PORT_TAB; 3231 tr 52 M=PORT_TAB; 3232 tr 71 M=PORT_TAB TSE=F SLTH=T; 3233 tr 71 M=PORT_TAB TSE=T SLTH=T; 3234 tr 71 M=PORT_TAB TSE=T SLTH=F; 3235 #echo " RMEP"; 3236 #tr 50 M=RMEP; 3237 #tr 51 M=RMEP; 3238 #tr 52 M=RMEP; 3239 #tr 71 M=RMEP TSE=F SLTH=T; 3240 #tr 71 M=RMEP TSE=T SLTH=T; 3241 #tr 71 M=RMEP TSE=T SLTH=F; 3242 echo " SOURCE_MOD_PROXY_TABLE"; 3243 tr 50 M=SOURCE_MOD_PROXY_TABLE; 3244 tr 51 M=SOURCE_MOD_PROXY_TABLE; 3245 tr 52 M=SOURCE_MOD_PROXY_TABLE; 3246 tr 71 M=SOURCE_MOD_PROXY_TABLE TSE=F SLTH=T; 3247 tr 71 M=SOURCE_MOD_PROXY_TABLE TSE=T SLTH=T; 3248 tr 71 M=SOURCE_MOD_PROXY_TABLE TSE=T SLTH=F; 3249 echo " SOURCE_TRUNK_MAP_MODBASE"; 3250 tr 50 M=SOURCE_TRUNK_MAP_MODBASE; 3251 tr 51 M=SOURCE_TRUNK_MAP_MODBASE; 3252 tr 52 M=SOURCE_TRUNK_MAP_MODBASE; 3253 tr 71 M=SOURCE_TRUNK_MAP_MODBASE TSE=F SLTH=T; 3254 tr 71 M=SOURCE_TRUNK_MAP_MODBASE TSE=T SLTH=T; 3255 tr 71 M=SOURCE_TRUNK_MAP_MODBASE TSE=T SLTH=F; 3256 echo " SOURCE_TRUNK_MAP_TABLE"; 3257 tr 50 M=SOURCE_TRUNK_MAP_TABLE; 3258 tr 51 M=SOURCE_TRUNK_MAP_TABLE; 3259 tr 52 M=SOURCE_TRUNK_MAP_TABLE; 3260 tr 71 M=SOURCE_TRUNK_MAP_TABLE TSE=F SLTH=T; 3261 tr 71 M=SOURCE_TRUNK_MAP_TABLE TSE=T SLTH=T; 3262 tr 71 M=SOURCE_TRUNK_MAP_TABLE TSE=T SLTH=F; 3263 echo " SOURCE_VP"; 3264 tr 50 M=SOURCE_VP; 3265 tr 51 M=SOURCE_VP; 3266 tr 52 M=SOURCE_VP; 3267 tr 71 M=SOURCE_VP TSE=F SLTH=T; 3268 tr 71 M=SOURCE_VP TSE=T SLTH=T; 3269 tr 71 M=SOURCE_VP TSE=T SLTH=F; 3270 echo " SRC_MODID_EGRESS"; 3271 tr 50 M=SRC_MODID_EGRESS; 3272 tr 51 M=SRC_MODID_EGRESS; 3273 tr 52 M=SRC_MODID_EGRESS; 3274 tr 71 M=SRC_MODID_EGRESS TSE=F SLTH=T; 3275 tr 71 M=SRC_MODID_EGRESS TSE=T SLTH=T; 3276 tr 71 M=SRC_MODID_EGRESS TSE=T SLTH=F; 3277 echo " SRC_MODID_INGRESS_BLOCK"; 3278 tr 50 M=SRC_MODID_INGRESS_BLOCK; 3279 tr 51 M=SRC_MODID_INGRESS_BLOCK; 3280 tr 52 M=SRC_MODID_INGRESS_BLOCK; 3281 tr 71 M=SRC_MODID_INGRESS_BLOCK TSE=F SLTH=T; 3282 tr 71 M=SRC_MODID_INGRESS_BLOCK TSE=T SLTH=T; 3283 tr 71 M=SRC_MODID_INGRESS_BLOCK TSE=T SLTH=F; 3284 echo " STG_TAB"; 3285 tr 50 M=STG_TAB; 3286 tr 51 M=STG_TAB; 3287 tr 52 M=STG_TAB; 3288 tr 71 M=STG_TAB TSE=F SLTH=T; 3289 tr 71 M=STG_TAB TSE=T SLTH=T; 3290 tr 71 M=STG_TAB TSE=T SLTH=F; 3291 echo " SVM_MACROFLOW_INDEX_TABLE"; 3292 tr 50 M=SVM_MACROFLOW_INDEX_TABLE; 3293 tr 51 M=SVM_MACROFLOW_INDEX_TABLE; 3294 tr 52 M=SVM_MACROFLOW_INDEX_TABLE; 3295 tr 71 M=SVM_MACROFLOW_INDEX_TABLE TSE=F SLTH=T; 3296 tr 71 M=SVM_MACROFLOW_INDEX_TABLE TSE=T SLTH=T; 3297 tr 71 M=SVM_MACROFLOW_INDEX_TABLE TSE=T SLTH=F; 3298 echo " SVM_METER_TABLE"; 3299 tr 50 M=SVM_METER_TABLE; 3300 tr 51 M=SVM_METER_TABLE; 3301 tr 52 M=SVM_METER_TABLE; 3302 tr 71 M=SVM_METER_TABLE TSE=F SLTH=T; 3303 tr 71 M=SVM_METER_TABLE TSE=T SLTH=T; 3304 tr 71 M=SVM_METER_TABLE TSE=T SLTH=F; 3305 echo " SVM_OFFSET_TABLE"; 3306 tr 50 M=SVM_OFFSET_TABLE; 3307 tr 51 M=SVM_OFFSET_TABLE; 3308 tr 52 M=SVM_OFFSET_TABLE; 3309 tr 71 M=SVM_OFFSET_TABLE TSE=F SLTH=T; 3310 tr 71 M=SVM_OFFSET_TABLE TSE=T SLTH=T; 3311 tr 71 M=SVM_OFFSET_TABLE TSE=T SLTH=F; 3312 echo " SVM_POLICY_TABLE"; 3313 tr 50 M=SVM_POLICY_TABLE; 3314 tr 51 M=SVM_POLICY_TABLE; 3315 tr 52 M=SVM_POLICY_TABLE; 3316 tr 71 M=SVM_POLICY_TABLE TSE=F SLTH=T; 3317 tr 71 M=SVM_POLICY_TABLE TSE=T SLTH=T; 3318 tr 71 M=SVM_POLICY_TABLE TSE=T SLTH=F; 3319 echo " SYSTEM_CONFIG_TABLE"; 3320 tr 50 M=SYSTEM_CONFIG_TABLE; 3321 tr 51 M=SYSTEM_CONFIG_TABLE; 3322 tr 52 M=SYSTEM_CONFIG_TABLE; 3323 tr 71 M=SYSTEM_CONFIG_TABLE TSE=F SLTH=T; 3324 tr 71 M=SYSTEM_CONFIG_TABLE TSE=T SLTH=T; 3325 tr 71 M=SYSTEM_CONFIG_TABLE TSE=T SLTH=F; 3326 echo " SYSTEM_CONFIG_TABLE_MODBASE"; 3327 tr 50 M=SYSTEM_CONFIG_TABLE_MODBASE; 3328 tr 51 M=SYSTEM_CONFIG_TABLE_MODBASE; 3329 tr 52 M=SYSTEM_CONFIG_TABLE_MODBASE; 3330 tr 71 M=SYSTEM_CONFIG_TABLE_MODBASE TSE=F SLTH=T; 3331 tr 71 M=SYSTEM_CONFIG_TABLE_MODBASE TSE=T SLTH=T; 3332 tr 71 M=SYSTEM_CONFIG_TABLE_MODBASE TSE=T SLTH=F; 3333 echo " TCP_FN"; 3334 tr 50 M=TCP_FN; 3335 tr 51 M=TCP_FN; 3336 tr 52 M=TCP_FN; 3337 tr 71 M=TCP_FN TSE=F SLTH=T; 3338 tr 71 M=TCP_FN TSE=T SLTH=T; 3339 tr 71 M=TCP_FN TSE=T SLTH=F; 3340 echo " THDO_OPNCOUNT_QENTRY"; 3341 tr 50 M=THDO_OPNCOUNT_QENTRY; 3342 tr 51 M=THDO_OPNCOUNT_QENTRY; 3343 tr 52 M=THDO_OPNCOUNT_QENTRY; 3344 tr 71 M=THDO_OPNCOUNT_QENTRY TSE=F SLTH=T; 3345 tr 71 M=THDO_OPNCOUNT_QENTRY TSE=T SLTH=T; 3346 tr 71 M=THDO_OPNCOUNT_QENTRY TSE=T SLTH=F; 3347 echo " THDO_QCOUNT_CELL_1"; 3348 tr 50 M=THDO_QCOUNT_CELL_1; 3349 tr 51 M=THDO_QCOUNT_CELL_1; 3350 tr 52 M=THDO_QCOUNT_CELL_1; 3351 tr 71 M=THDO_QCOUNT_CELL_1 TSE=F SLTH=T; 3352 tr 71 M=THDO_QCOUNT_CELL_1 TSE=T SLTH=T; 3353 tr 71 M=THDO_QCOUNT_CELL_1 TSE=T SLTH=F; 3354 echo " THDO_QCOUNT_QENTRY_0"; 3355 tr 50 M=THDO_QCOUNT_QENTRY_0; 3356 tr 51 M=THDO_QCOUNT_QENTRY_0; 3357 tr 52 M=THDO_QCOUNT_QENTRY_0; 3358 tr 71 M=THDO_QCOUNT_QENTRY_0 TSE=F SLTH=T; 3359 tr 71 M=THDO_QCOUNT_QENTRY_0 TSE=T SLTH=T; 3360 tr 71 M=THDO_QCOUNT_QENTRY_0 TSE=T SLTH=F; 3361 echo " THDO_QCOUNT_QENTRY_1"; 3362 tr 50 M=THDO_QCOUNT_QENTRY_1; 3363 tr 51 M=THDO_QCOUNT_QENTRY_1; 3364 tr 52 M=THDO_QCOUNT_QENTRY_1; 3365 tr 71 M=THDO_QCOUNT_QENTRY_1 TSE=F SLTH=T; 3366 tr 71 M=THDO_QCOUNT_QENTRY_1 TSE=T SLTH=T; 3367 tr 71 M=THDO_QCOUNT_QENTRY_1 TSE=T SLTH=F; 3368 echo " THDO_QRESET_VALUE_CELL_1"; 3369 tr 50 M=THDO_QRESET_VALUE_CELL_1; 3370 tr 51 M=THDO_QRESET_VALUE_CELL_1; 3371 tr 52 M=THDO_QRESET_VALUE_CELL_1; 3372 tr 71 M=THDO_QRESET_VALUE_CELL_1 TSE=F SLTH=T; 3373 tr 71 M=THDO_QRESET_VALUE_CELL_1 TSE=T SLTH=T; 3374 tr 71 M=THDO_QRESET_VALUE_CELL_1 TSE=T SLTH=F; 3375 echo " THDO_QRESET_VALUE_QENTRY_1"; 3376 tr 50 M=THDO_QRESET_VALUE_QENTRY_1; 3377 tr 51 M=THDO_QRESET_VALUE_QENTRY_1; 3378 tr 52 M=THDO_QRESET_VALUE_QENTRY_1; 3379 tr 71 M=THDO_QRESET_VALUE_QENTRY_1 TSE=F SLTH=T; 3380 tr 71 M=THDO_QRESET_VALUE_QENTRY_1 TSE=T SLTH=T; 3381 tr 71 M=THDO_QRESET_VALUE_QENTRY_1 TSE=T SLTH=F; 3382 echo " THDO_QSTATUS_CELL_1"; 3383 tr 50 M=THDO_QSTATUS_CELL_1; 3384 tr 51 M=THDO_QSTATUS_CELL_1; 3385 tr 52 M=THDO_QSTATUS_CELL_1; 3386 tr 71 M=THDO_QSTATUS_CELL_1 TSE=F SLTH=T; 3387 tr 71 M=THDO_QSTATUS_CELL_1 TSE=T SLTH=T; 3388 tr 71 M=THDO_QSTATUS_CELL_1 TSE=T SLTH=F; 3389 echo " THDO_QSTATUS_QENTRY_1"; 3390 tr 50 M=THDO_QSTATUS_QENTRY_1; 3391 tr 51 M=THDO_QSTATUS_QENTRY_1; 3392 tr 52 M=THDO_QSTATUS_QENTRY_1; 3393 tr 71 M=THDO_QSTATUS_QENTRY_1 TSE=F SLTH=T; 3394 tr 71 M=THDO_QSTATUS_QENTRY_1 TSE=T SLTH=T; 3395 tr 71 M=THDO_QSTATUS_QENTRY_1 TSE=T SLTH=F; 3396 echo " TOS_FN"; 3397 tr 50 M=TOS_FN; 3398 tr 51 M=TOS_FN; 3399 tr 52 M=TOS_FN; 3400 tr 71 M=TOS_FN TSE=F SLTH=T; 3401 tr 71 M=TOS_FN TSE=T SLTH=T; 3402 tr 71 M=TOS_FN TSE=T SLTH=F; 3403 echo " TRUNK_BITMAP"; 3404 tr 50 M=TRUNK_BITMAP; 3405 tr 51 M=TRUNK_BITMAP; 3406 tr 52 M=TRUNK_BITMAP; 3407 tr 71 M=TRUNK_BITMAP TSE=F SLTH=T; 3408 tr 71 M=TRUNK_BITMAP TSE=T SLTH=T; 3409 tr 71 M=TRUNK_BITMAP TSE=T SLTH=F; 3410 echo " TRUNK_CBL_TABLE"; 3411 tr 50 M=TRUNK_CBL_TABLE; 3412 tr 51 M=TRUNK_CBL_TABLE; 3413 tr 52 M=TRUNK_CBL_TABLE; 3414 tr 71 M=TRUNK_CBL_TABLE TSE=F SLTH=T; 3415 tr 71 M=TRUNK_CBL_TABLE TSE=T SLTH=T; 3416 tr 71 M=TRUNK_CBL_TABLE TSE=T SLTH=F; 3417 echo " TRUNK_GROUP"; 3418 tr 50 M=TRUNK_GROUP; 3419 tr 51 M=TRUNK_GROUP; 3420 tr 52 M=TRUNK_GROUP; 3421 tr 71 M=TRUNK_GROUP TSE=F SLTH=T; 3422 tr 71 M=TRUNK_GROUP TSE=T SLTH=T; 3423 tr 71 M=TRUNK_GROUP TSE=T SLTH=F; 3424 echo " TRUNK_MEMBER"; 3425 tr 50 M=TRUNK_MEMBER; 3426 tr 51 M=TRUNK_MEMBER; 3427 tr 52 M=TRUNK_MEMBER; 3428 tr 71 M=TRUNK_MEMBER TSE=F SLTH=T; 3429 tr 71 M=TRUNK_MEMBER TSE=T SLTH=T; 3430 tr 71 M=TRUNK_MEMBER TSE=T SLTH=F; 3431 echo " TTL_FN"; 3432 tr 50 M=TTL_FN; 3433 tr 51 M=TTL_FN; 3434 tr 52 M=TTL_FN; 3435 tr 71 M=TTL_FN TSE=F SLTH=T; 3436 tr 71 M=TTL_FN TSE=T SLTH=T; 3437 tr 71 M=TTL_FN TSE=T SLTH=F; 3438 echo " UNKNOWN_HGI_BITMAP"; 3439 tr 50 M=UNKNOWN_HGI_BITMAP; 3440 tr 51 M=UNKNOWN_HGI_BITMAP; 3441 tr 52 M=UNKNOWN_HGI_BITMAP; 3442 tr 71 M=UNKNOWN_HGI_BITMAP TSE=F SLTH=T; 3443 tr 71 M=UNKNOWN_HGI_BITMAP TSE=T SLTH=T; 3444 tr 71 M=UNKNOWN_HGI_BITMAP TSE=T SLTH=F; 3445 echo " UNKNOWN_MCAST_BLOCK_MASK"; 3446 tr 50 M=UNKNOWN_MCAST_BLOCK_MASK; 3447 tr 51 M=UNKNOWN_MCAST_BLOCK_MASK; 3448 tr 52 M=UNKNOWN_MCAST_BLOCK_MASK; 3449 tr 71 M=UNKNOWN_MCAST_BLOCK_MASK TSE=F SLTH=T; 3450 tr 71 M=UNKNOWN_MCAST_BLOCK_MASK TSE=T SLTH=T; 3451 tr 71 M=UNKNOWN_MCAST_BLOCK_MASK TSE=T SLTH=F; 3452 echo " UNKNOWN_UCAST_BLOCK_MASK"; 3453 tr 50 M=UNKNOWN_UCAST_BLOCK_MASK; 3454 tr 51 M=UNKNOWN_UCAST_BLOCK_MASK; 3455 tr 52 M=UNKNOWN_UCAST_BLOCK_MASK; 3456 tr 71 M=UNKNOWN_UCAST_BLOCK_MASK TSE=F SLTH=T; 3457 tr 71 M=UNKNOWN_UCAST_BLOCK_MASK TSE=T SLTH=T; 3458 tr 71 M=UNKNOWN_UCAST_BLOCK_MASK TSE=T SLTH=F; 3459 echo " VFI"; 3460 tr 50 M=VFI; 3461 tr 51 M=VFI; 3462 tr 52 M=VFI; 3463 tr 71 M=VFI TSE=F SLTH=T; 3464 tr 71 M=VFI TSE=T SLTH=T; 3465 tr 71 M=VFI TSE=T SLTH=F; 3466 echo " VFI_1"; 3467 tr 50 M=VFI_1; 3468 tr 51 M=VFI_1; 3469 tr 52 M=VFI_1; 3470 tr 71 M=VFI_1 TSE=F SLTH=T; 3471 tr 71 M=VFI_1 TSE=T SLTH=T; 3472 tr 71 M=VFI_1 TSE=T SLTH=F; 3473 echo " VFP_POLICY_TABLE"; 3474 tr 50 M=VFP_POLICY_TABLE; 3475 tr 51 M=VFP_POLICY_TABLE; 3476 tr 52 M=VFP_POLICY_TABLE; 3477 tr 71 M=VFP_POLICY_TABLE TSE=F SLTH=T; 3478 tr 71 M=VFP_POLICY_TABLE TSE=T SLTH=T; 3479 tr 71 M=VFP_POLICY_TABLE TSE=T SLTH=F; 3480 echo " VFP_TCAM"; 3481 tr 50 M=VFP_TCAM; 3482 tr 51 M=VFP_TCAM; 3483 tr 52 M=VFP_TCAM; 3484 tr 71 M=VFP_TCAM TSE=F SLTH=T; 3485 tr 71 M=VFP_TCAM TSE=T SLTH=T; 3486 tr 71 M=VFP_TCAM TSE=T SLTH=F; 3487 echo " VLAN_COS_MAP"; 3488 tr 50 M=VLAN_COS_MAP; 3489 tr 51 M=VLAN_COS_MAP; 3490 tr 52 M=VLAN_COS_MAP; 3491 tr 71 M=VLAN_COS_MAP TSE=F SLTH=T; 3492 tr 71 M=VLAN_COS_MAP TSE=T SLTH=T; 3493 tr 71 M=VLAN_COS_MAP TSE=T SLTH=F; 3494 echo " VLAN_MAC"; 3495 tr 50 M=VLAN_MAC; 3496 tr 51 M=VLAN_MAC; 3497 tr 52 M=VLAN_MAC; 3498 tr 71 M=VLAN_MAC TSE=F SLTH=T; 3499 tr 71 M=VLAN_MAC TSE=T SLTH=T; 3500 tr 71 M=VLAN_MAC TSE=T SLTH=F; 3501 echo " VLAN_MPLS"; 3502 tr 50 M=VLAN_MPLS; 3503 tr 51 M=VLAN_MPLS; 3504 tr 52 M=VLAN_MPLS; 3505 tr 71 M=VLAN_MPLS TSE=F SLTH=T; 3506 tr 71 M=VLAN_MPLS TSE=T SLTH=T; 3507 tr 71 M=VLAN_MPLS TSE=T SLTH=F; 3508 echo " VLAN_OR_VFI_MAC_COUNT"; 3509 tr 50 M=VLAN_OR_VFI_MAC_COUNT; 3510 tr 51 M=VLAN_OR_VFI_MAC_COUNT; 3511 tr 52 M=VLAN_OR_VFI_MAC_COUNT; 3512 tr 71 M=VLAN_OR_VFI_MAC_COUNT TSE=F SLTH=T; 3513 tr 71 M=VLAN_OR_VFI_MAC_COUNT TSE=T SLTH=T; 3514 tr 71 M=VLAN_OR_VFI_MAC_COUNT TSE=T SLTH=F; 3515 echo " VLAN_OR_VFI_MAC_LIMIT"; 3516 tr 50 M=VLAN_OR_VFI_MAC_LIMIT; 3517 tr 51 M=VLAN_OR_VFI_MAC_LIMIT; 3518 tr 52 M=VLAN_OR_VFI_MAC_LIMIT; 3519 tr 71 M=VLAN_OR_VFI_MAC_LIMIT TSE=F SLTH=T; 3520 tr 71 M=VLAN_OR_VFI_MAC_LIMIT TSE=T SLTH=T; 3521 tr 71 M=VLAN_OR_VFI_MAC_LIMIT TSE=T SLTH=F; 3522 echo " VLAN_PROFILE_2"; 3523 tr 50 M=VLAN_PROFILE_2; 3524 tr 51 M=VLAN_PROFILE_2; 3525 tr 52 M=VLAN_PROFILE_2; 3526 tr 71 M=VLAN_PROFILE_2 TSE=F SLTH=T; 3527 tr 71 M=VLAN_PROFILE_2 TSE=T SLTH=T; 3528 tr 71 M=VLAN_PROFILE_2 TSE=T SLTH=F; 3529 echo " VLAN_PROFILE_TAB"; 3530 tr 50 M=VLAN_PROFILE_TAB; 3531 tr 51 M=VLAN_PROFILE_TAB; 3532 tr 52 M=VLAN_PROFILE_TAB; 3533 tr 71 M=VLAN_PROFILE_TAB TSE=F SLTH=T; 3534 tr 71 M=VLAN_PROFILE_TAB TSE=T SLTH=T; 3535 tr 71 M=VLAN_PROFILE_TAB TSE=T SLTH=F; 3536 echo " VLAN_PROTOCOL"; 3537 tr 50 M=VLAN_PROTOCOL; 3538 tr 51 M=VLAN_PROTOCOL; 3539 tr 52 M=VLAN_PROTOCOL; 3540 tr 71 M=VLAN_PROTOCOL TSE=F SLTH=T; 3541 tr 71 M=VLAN_PROTOCOL TSE=T SLTH=T; 3542 tr 71 M=VLAN_PROTOCOL TSE=T SLTH=F; 3543 echo " VLAN_PROTOCOL_DATA"; 3544 tr 50 M=VLAN_PROTOCOL_DATA; 3545 tr 51 M=VLAN_PROTOCOL_DATA; 3546 tr 52 M=VLAN_PROTOCOL_DATA; 3547 tr 71 M=VLAN_PROTOCOL_DATA TSE=F SLTH=T; 3548 tr 71 M=VLAN_PROTOCOL_DATA TSE=T SLTH=T; 3549 tr 71 M=VLAN_PROTOCOL_DATA TSE=T SLTH=F; 3550 echo " VLAN_SUBNET"; 3551 tr 50 M=VLAN_SUBNET; 3552 tr 51 M=VLAN_SUBNET; 3553 tr 52 M=VLAN_SUBNET; 3554 tr 71 M=VLAN_SUBNET TSE=F SLTH=T; 3555 tr 71 M=VLAN_SUBNET TSE=T SLTH=T; 3556 tr 71 M=VLAN_SUBNET TSE=T SLTH=F; 3557 echo " VLAN_SUBNET_DATA_ONLY"; 3558 tr 50 M=VLAN_SUBNET_DATA_ONLY; 3559 tr 51 M=VLAN_SUBNET_DATA_ONLY; 3560 tr 52 M=VLAN_SUBNET_DATA_ONLY; 3561 tr 71 M=VLAN_SUBNET_DATA_ONLY TSE=F SLTH=T; 3562 tr 71 M=VLAN_SUBNET_DATA_ONLY TSE=T SLTH=T; 3563 tr 71 M=VLAN_SUBNET_DATA_ONLY TSE=T SLTH=F; 3564 echo " VLAN_SUBNET_ONLY"; 3565 tr 50 M=VLAN_SUBNET_ONLY; 3566 tr 51 M=VLAN_SUBNET_ONLY; 3567 tr 52 M=VLAN_SUBNET_ONLY; 3568 tr 71 M=VLAN_SUBNET_ONLY TSE=F SLTH=T; 3569 tr 71 M=VLAN_SUBNET_ONLY TSE=T SLTH=T; 3570 tr 71 M=VLAN_SUBNET_ONLY TSE=T SLTH=F; 3571 echo " VLAN_TAB"; 3572 tr 50 M=VLAN_TAB; 3573 tr 51 M=VLAN_TAB; 3574 tr 52 M=VLAN_TAB; 3575 tr 71 M=VLAN_TAB TSE=F SLTH=T; 3576 tr 71 M=VLAN_TAB TSE=T SLTH=T; 3577 tr 71 M=VLAN_TAB TSE=T SLTH=F; 3578 echo " VLAN_XLATE"; 3579 tr 50 M=VLAN_XLATE; 3580 tr 51 M=VLAN_XLATE; 3581 tr 52 M=VLAN_XLATE; 3582 tr 71 M=VLAN_XLATE TSE=F SLTH=T; 3583 tr 71 M=VLAN_XLATE TSE=T SLTH=T; 3584 tr 71 M=VLAN_XLATE TSE=T SLTH=F; 3585 echo " VRF"; 3586 tr 50 M=VRF; 3587 tr 51 M=VRF; 3588 tr 52 M=VRF; 3589 tr 71 M=VRF TSE=F SLTH=T; 3590 tr 71 M=VRF TSE=T SLTH=T; 3591 tr 71 M=VRF TSE=T SLTH=F; 3592 #echo " XPORT_WC_UCMEM_DATA"; 3593 #tr 50 M=XPORT_WC_UCMEM_DATA; 3594 #tr 51 M=XPORT_WC_UCMEM_DATA; 3595 #tr 52 M=XPORT_WC_UCMEM_DATA; 3596 #tr 71 M=XPORT_WC_UCMEM_DATA TSE=F SLTH=T; 3597 #tr 71 M=XPORT_WC_UCMEM_DATA TSE=T SLTH=T; 3598 #tr 71 M=XPORT_WC_UCMEM_DATA TSE=T SLTH=F; 3599 if $?BCM56X4X_B0 \ 3600 'echo " LLS_L0_ERROR_MIN"; \ 3601 tr 50 M=LLS_L0_ERROR_MIN; \ 3602 tr 51 M=LLS_L0_ERROR_MIN; \ 3603 tr 52 M=LLS_L0_ERROR_MIN; \ 3604 tr 71 M=LLS_L0_ERROR_MIN TSE=F SLTH=T; \ 3605 tr 71 M=LLS_L0_ERROR_MIN TSE=T SLTH=T; \ 3606 tr 71 M=LLS_L0_ERROR_MIN TSE=T SLTH=F; \ 3607 echo " LLS_L1_ERROR_MIN"; \ 3608 tr 50 M=LLS_L1_ERROR_MIN; \ 3609 tr 51 M=LLS_L1_ERROR_MIN; \ 3610 tr 52 M=LLS_L1_ERROR_MIN; \ 3611 tr 71 M=LLS_L1_ERROR_MIN TSE=F SLTH=T; \ 3612 tr 71 M=LLS_L1_ERROR_MIN TSE=T SLTH=T; \ 3613 tr 71 M=LLS_L1_ERROR_MIN TSE=T SLTH=F; \ 3614 echo " LLS_L2_ERROR_MIN"; \ 3615 tr 50 M=LLS_L2_ERROR_MIN; \ 3616 tr 51 M=LLS_L2_ERROR_MIN; \ 3617 tr 52 M=LLS_L2_ERROR_MIN; \ 3618 tr 71 M=LLS_L2_ERROR_MIN TSE=F SLTH=T; \ 3619 tr 71 M=LLS_L2_ERROR_MIN TSE=T SLTH=T; \ 3620 tr 71 M=LLS_L2_ERROR_MIN TSE=T SLTH=F; \ 3621 echo " MMU_TOQ_IPMC_GROUP_TBL0"; \ 3622 tr 50 M=MMU_TOQ_IPMC_GROUP_TBL0; \ 3623 tr 51 M=MMU_TOQ_IPMC_GROUP_TBL0; \ 3624 tr 52 M=MMU_TOQ_IPMC_GROUP_TBL0; \ 3625 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL0 TSE=F SLTH=T; \ 3626 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL0 TSE=T SLTH=T; \ 3627 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL0 TSE=T SLTH=F; \ 3628 echo " MMU_TOQ_IPMC_GROUP_TBL1"; \ 3629 tr 50 M=MMU_TOQ_IPMC_GROUP_TBL1; \ 3630 tr 51 M=MMU_TOQ_IPMC_GROUP_TBL1; \ 3631 tr 52 M=MMU_TOQ_IPMC_GROUP_TBL1; \ 3632 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL1 TSE=F SLTH=T; \ 3633 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL1 TSE=T SLTH=T; \ 3634 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL1 TSE=T SLTH=F; \ 3635 echo " MMU_TOQ_IPMC_GROUP_TBL2"; \ 3636 tr 50 M=MMU_TOQ_IPMC_GROUP_TBL2; \ 3637 tr 51 M=MMU_TOQ_IPMC_GROUP_TBL2; \ 3638 tr 52 M=MMU_TOQ_IPMC_GROUP_TBL2; \ 3639 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL2 TSE=F SLTH=T; \ 3640 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL2 TSE=T SLTH=T; \ 3641 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL2 TSE=T SLTH=F; \ 3642 echo " MMU_TOQ_IPMC_GROUP_TBL3"; \ 3643 tr 50 M=MMU_TOQ_IPMC_GROUP_TBL3; \ 3644 tr 51 M=MMU_TOQ_IPMC_GROUP_TBL3; \ 3645 tr 52 M=MMU_TOQ_IPMC_GROUP_TBL3; \ 3646 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL3 TSE=F SLTH=T; \ 3647 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL3 TSE=T SLTH=T; \ 3648 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL3 TSE=T SLTH=F; \ 3649 echo " MMU_TOQ_IPMC_GROUP_TBL4"; \ 3650 tr 50 M=MMU_TOQ_IPMC_GROUP_TBL4; \ 3651 tr 51 M=MMU_TOQ_IPMC_GROUP_TBL4; \ 3652 tr 52 M=MMU_TOQ_IPMC_GROUP_TBL4; \ 3653 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL4 TSE=F SLTH=T; \ 3654 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL4 TSE=T SLTH=T; \ 3655 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL4 TSE=T SLTH=F; \ 3656 echo " MMU_TOQ_IPMC_GROUP_TBL5"; \ 3657 tr 50 M=MMU_TOQ_IPMC_GROUP_TBL5; \ 3658 tr 51 M=MMU_TOQ_IPMC_GROUP_TBL5; \ 3659 tr 52 M=MMU_TOQ_IPMC_GROUP_TBL5; \ 3660 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL5 TSE=F SLTH=T; \ 3661 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL5 TSE=T SLTH=T; \ 3662 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL5 TSE=T SLTH=F; \ 3663 echo " MMU_TOQ_IPMC_GROUP_TBL6"; \ 3664 tr 50 M=MMU_TOQ_IPMC_GROUP_TBL6; \ 3665 tr 51 M=MMU_TOQ_IPMC_GROUP_TBL6; \ 3666 tr 52 M=MMU_TOQ_IPMC_GROUP_TBL6; \ 3667 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL6 TSE=F SLTH=T; \ 3668 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL6 TSE=T SLTH=T; \ 3669 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL6 TSE=T SLTH=F;' 3670 $done 3671 3672 # Re-initialize to clean up of various read/wrires to MMU memories 3673 set rct=true 3674 rcload rc.soc 3675 counter off 3676 l2mode off 3677 linkscan off 3678 3679 echo "Running counter width verification test ..." 3680 tr 30 3681 $done 3682 3683 echo "Running counter read/write test ..." 3684 tr 31 3685 $done 3686 3687 #L2/L3 hashing tests 3688 echo "Running L2 insert/delete/lookup test ..." 3689 tr 32 3690 $done 3691 3692 echo "Running L2 overflow insert test ..." 3693 tr 33 3694 $done 3695 3696 echo "Running L2 hash test ..." 3697 tr 34 3698 $done 3699 3700 echo "Running L2 delete by port test ..." 3701 tr 35 3702 $done 3703 3704 echo "Running L2 delete by vlan test ..." 3705 tr 36 3706 $done 3707 3708 echo "Running VLAN translate overflow insert test ..." 3709 tr 100 3710 3711 echo "Running Egress VLAN translate overflow insert test ..." 3712 tr 102 3713 $done 3714 3715 echo "Running MDIO Linkscan test" 3716 tr 60 readcount=10000 3717 $done 3718 3719 set rct=f; set rcl=f; 3720 #Traffic Test 3721 echo "Running Traffic Test in EXT mode ..." 3722 tr 72 RM=ext PBM=fe 3723 tr 72 RM=ext PBM=ge 3724 tr 72 RM=ext PBM=xe 3725 tr 72 RM=ext PBM=hg 3726 $done 3727 3728 if $?BCM56440 \ 3729 'echo "DDR memory Test"; \ 3730 ddrphytune ci0,ci2 plot=false pt=1; \ 3731 tr 53' 3732 $done 3733 3734 set rct=t; set rcl=t; 3735 # Show status 3736 date 3737 tl 3738 local returnCode $? 3739 3740 echo Tests Complete. Reinitializing ... 3741 config refresh 3742 rcload rc.soc 3743 counter off 3744 l2mode off 3745 3746 # We want to show the return code from the tl command which 3747 # lists the results. The automated test infrastructure keys off of this 3748 # value 3749 echo "testsuite: finished: sanity: $returnCode"