ktsanity.soc (137232B)
1 # 2 # This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 3 # 4 # Copyright 2007-2019 Broadcom Inc. All rights reserved. 5 6 # Katana (BCM56440) Sanity 7 # 8 # Script to run all available tests as quickly as possible. 9 # For testing basic sanity of new drivers, simulators, chips, etc. 10 # 11 12 if $?BCM56440_A0 || $?BCM56441_A0 || $?BCM56443_A0 || $?BCM56249_A0 || $?BCM56449_A0 || $?BCM56240_A0 || \ 13 $?BCM55440_A0 || $?BCM55441_A0 || $?BCM65245_A0 \ 14 'local BCM56440 1' 15 if $?BCM56445_A0 || $?BCM56444_A0 || $?BCM56448_A0 || $?BCM56241_A0 \ 16 'local BCM56445 1' 17 18 if $?BCM56440_B0 || $?BCM56441_B0 || $?BCM56443_B0 || $?BCM56249_B0 || $?BCM56449_B0 || $?BCM56240_B0 || \ 19 $?BCM55440_B0 || $?BCM55441_B0 || $?BCM56242_B0 || $?BCM56243_B0 || $?BCM65245_B0 || $?BCM56246_B0\ 20 'local BCM56440 1' 21 if $?BCM56445_B0 || $?BCM56444_B0 || $?BCM56448_B0 || $?BCM56241_B0 \ 22 'local BCM56445 1' 23 24 if $?BCM56440_B0 || $?BCM56441_B0 || $?BCM56443_B0 || $?BCM56249_B0 || $?BCM56449_B0 || $?BCM56240_B0 || \ 25 $?BCM56445_B0 || $?BCM56444_B0 || $?BCM56448_B0 || $?BCM56241_B0 || $?BCM55440_B0 || $?BCM55441_B0 || \ 26 $?BCM56242_B0 || $?BCM56243_B0 || $?BCM56446_B0 || $?BCM56447_B0 || $?BCM56442_B0 || $?BCM56245_B0 || \ 27 $?BCM56246_B0 \ 28 'local BCM56X4X_B0 1' 29 30 if $?BCM56240_B0 || $?BCM56242_B0 || $?BCM56243_B0 || $?BCM56245_B0 || $?BCM56246_B0 \ 31 'local BCM56240 1' 32 33 if $?BCM55440_B0 'local BCM55440_B0 1' 34 35 if $?BCM56448_A0 || $?BCM56449_A0 \ 36 'local BCM56448 1' 37 38 if $?BCM56448_B0 || $?BCM56449_B0 \ 39 'local BCM56448 1' 40 41 if $?BCM56442_B0 || $?BCM56442_A0 \ 42 'local BCM56442 1' 43 44 if $?BCM56449_A0 || $?BCM56449_B0 || $?BCM56245_B0 || $?BCM56240_A0 || $?BCM56240_B0 \ 45 'local SKIP_SNAKE_TEST 1' 46 47 local SKIP_L3_DEFIP_TEST 0; 48 local SKIP_L3_DEFIP_128_TEST 0; 49 50 if $?BCM56240 || $?BCM56445 || $?BCM56440 || $?BCM56442 'config get ipv6_lpm_128b_enable'; 51 if $?BCM56240 && $config_var_val "local SKIP_L3_DEFIP_TEST 1" 52 if $?BCM56240 || $?BCM56440 || $?BCM56445 || $?BCM56442 && !$config_var_val\ 53 "local SKIP_L3_DEFIP_128_TEST 1" 54 55 echo "skip_l3_defip_128 $SKIP_L3_DEFIP_128_TEST skip_l3_defip $SKIP_L3_DEFIP_TEST" 56 57 echo "testsuite: started: sanity" 58 rcload rc.soc 59 counter off 60 l2mode off 61 62 # We need to print out port status since any cabling effects results. 63 *:ps 64 65 # Avoid link messages while testing 66 linkscan off 67 68 init 69 init misc 70 init mmu 71 72 local done 'echo " Done"' 73 74 # Set run command script not to fail on errors reported by commands 75 # this allows the script to continue if a test fails 76 set rcerror=false 77 78 # Set up test mode: don't stop on errors, show progress on each test 79 tm -stoponerror +progress 80 # Unselect all 81 ts -* 82 83 #Display some useful information 84 date 85 ver 86 soc 87 88 #Start Test 89 echo "Running PCI S-Channel Buf ..." 90 tr 4 91 $done 92 93 echo "Running Register reset defaults ..." 94 tr 1 95 $done 96 97 echo "Running Register read/write ..." 98 tr 3 mask64 99 $done 100 101 init soc; init mmu; init misc; 102 #Clean up after register read/write test. 103 104 rcload rc.soc 105 counter off 106 l2mode off 107 echo "Running CPU Benchmarks ..." 108 tr 21 109 $done 110 linkscan off 111 112 # Turn off Mem cache and Parity checks for mem tests 113 config add mem_cache_enable=0 114 config add parity_enable=0 115 116 init soc; init mmu; init misc; 117 ktsanity_ecc_off 118 set rct=false 119 120 echo "Running Switching Memory Tests ..." 121 122 echo " ALTERNATE_EMIRROR_BITMAP"; 123 tr 50 M=ALTERNATE_EMIRROR_BITMAP; 124 tr 51 M=ALTERNATE_EMIRROR_BITMAP; 125 tr 52 M=ALTERNATE_EMIRROR_BITMAP; 126 tr 71 M=ALTERNATE_EMIRROR_BITMAP TSE=F SLTH=T; 127 tr 71 M=ALTERNATE_EMIRROR_BITMAP TSE=T SLTH=T; 128 tr 71 M=ALTERNATE_EMIRROR_BITMAP TSE=T SLTH=F; 129 echo " BCAST_BLOCK_MASK"; 130 tr 50 M=BCAST_BLOCK_MASK; 131 tr 51 M=BCAST_BLOCK_MASK; 132 tr 52 M=BCAST_BLOCK_MASK; 133 tr 71 M=BCAST_BLOCK_MASK TSE=F SLTH=T; 134 tr 71 M=BCAST_BLOCK_MASK TSE=T SLTH=T; 135 tr 71 M=BCAST_BLOCK_MASK TSE=T SLTH=F; 136 echo " COS_MAP_SEL"; 137 tr 50 M=COS_MAP_SEL; 138 tr 51 M=COS_MAP_SEL; 139 tr 52 M=COS_MAP_SEL; 140 tr 71 M=COS_MAP_SEL TSE=F SLTH=T; 141 tr 71 M=COS_MAP_SEL TSE=T SLTH=T; 142 tr 71 M=COS_MAP_SEL TSE=T SLTH=F; 143 echo " CPU_COS_MAP"; 144 tr 50 M=CPU_COS_MAP; 145 tr 51 M=CPU_COS_MAP; 146 tr 52 M=CPU_COS_MAP; 147 tr 71 M=CPU_COS_MAP TSE=F SLTH=T; 148 tr 71 M=CPU_COS_MAP TSE=T SLTH=T; 149 tr 71 M=CPU_COS_MAP TSE=T SLTH=F; 150 echo " CPU_COS_MAP_DATA_ONLY"; 151 tr 50 M=CPU_COS_MAP_DATA_ONLY; 152 tr 51 M=CPU_COS_MAP_DATA_ONLY; 153 tr 52 M=CPU_COS_MAP_DATA_ONLY; 154 tr 71 M=CPU_COS_MAP_DATA_ONLY TSE=F SLTH=T; 155 tr 71 M=CPU_COS_MAP_DATA_ONLY TSE=T SLTH=T; 156 tr 71 M=CPU_COS_MAP_DATA_ONLY TSE=T SLTH=F; 157 echo " CPU_COS_MAP_ONLY"; 158 tr 50 M=CPU_COS_MAP_ONLY; 159 tr 51 M=CPU_COS_MAP_ONLY; 160 tr 52 M=CPU_COS_MAP_ONLY; 161 tr 71 M=CPU_COS_MAP_ONLY TSE=F SLTH=T; 162 tr 71 M=CPU_COS_MAP_ONLY TSE=T SLTH=T; 163 tr 71 M=CPU_COS_MAP_ONLY TSE=T SLTH=F; 164 echo " CPU_PBM"; 165 tr 50 M=CPU_PBM; 166 #tr 51 M=CPU_PBM; 167 #tr 52 M=CPU_PBM; 168 tr 71 M=CPU_PBM TSE=F SLTH=T; 169 tr 71 M=CPU_PBM TSE=T SLTH=T; 170 tr 71 M=CPU_PBM TSE=T SLTH=F; 171 echo " CPU_PBM_2"; 172 tr 50 M=CPU_PBM_2; 173 #tr 51 M=CPU_PBM_2; 174 #tr 52 M=CPU_PBM_2; 175 tr 71 M=CPU_PBM_2 TSE=F SLTH=T; 176 tr 71 M=CPU_PBM_2 TSE=T SLTH=T; 177 tr 71 M=CPU_PBM_2 TSE=T SLTH=F; 178 echo " CPU_TS_MAP"; 179 tr 50 M=CPU_TS_MAP; 180 tr 51 M=CPU_TS_MAP; 181 tr 52 M=CPU_TS_MAP; 182 tr 71 M=CPU_TS_MAP TSE=F SLTH=T; 183 tr 71 M=CPU_TS_MAP TSE=T SLTH=T; 184 tr 71 M=CPU_TS_MAP TSE=T SLTH=F; 185 if !$?BCM56X4X_B0 \ 186 'echo " CTR_FLEX_COUNT_0"; \ 187 tr 50 M=CTR_FLEX_COUNT_0; \ 188 tr 51 M=CTR_FLEX_COUNT_0; \ 189 tr 52 M=CTR_FLEX_COUNT_0; \ 190 tr 71 M=CTR_FLEX_COUNT_0 TSE=F SLTH=T; \ 191 tr 71 M=CTR_FLEX_COUNT_0 TSE=T SLTH=T; \ 192 tr 71 M=CTR_FLEX_COUNT_0 TSE=T SLTH=F; \ 193 echo " CTR_FLEX_COUNT_1"; \ 194 tr 50 M=CTR_FLEX_COUNT_1; \ 195 tr 51 M=CTR_FLEX_COUNT_1; \ 196 tr 52 M=CTR_FLEX_COUNT_1; \ 197 tr 71 M=CTR_FLEX_COUNT_1 TSE=F SLTH=T; \ 198 tr 71 M=CTR_FLEX_COUNT_1 TSE=T SLTH=T; \ 199 tr 71 M=CTR_FLEX_COUNT_1 TSE=T SLTH=F; \ 200 echo " CTR_FLEX_COUNT_10"; \ 201 tr 50 M=CTR_FLEX_COUNT_10; \ 202 tr 51 M=CTR_FLEX_COUNT_10; \ 203 tr 52 M=CTR_FLEX_COUNT_10; \ 204 tr 71 M=CTR_FLEX_COUNT_10 TSE=F SLTH=T; \ 205 tr 71 M=CTR_FLEX_COUNT_10 TSE=T SLTH=T; \ 206 tr 71 M=CTR_FLEX_COUNT_10 TSE=T SLTH=F; \ 207 echo " CTR_FLEX_COUNT_11"; \ 208 tr 50 M=CTR_FLEX_COUNT_11; \ 209 tr 51 M=CTR_FLEX_COUNT_11; \ 210 tr 52 M=CTR_FLEX_COUNT_11; \ 211 tr 71 M=CTR_FLEX_COUNT_11 TSE=F SLTH=T; \ 212 tr 71 M=CTR_FLEX_COUNT_11 TSE=T SLTH=T; \ 213 tr 71 M=CTR_FLEX_COUNT_11 TSE=T SLTH=F; \ 214 echo " CTR_FLEX_COUNT_2"; \ 215 tr 50 M=CTR_FLEX_COUNT_2; \ 216 tr 51 M=CTR_FLEX_COUNT_2; \ 217 tr 52 M=CTR_FLEX_COUNT_2; \ 218 tr 71 M=CTR_FLEX_COUNT_2 TSE=F SLTH=T; \ 219 tr 71 M=CTR_FLEX_COUNT_2 TSE=T SLTH=T; \ 220 tr 71 M=CTR_FLEX_COUNT_2 TSE=T SLTH=F; \ 221 echo " CTR_FLEX_COUNT_3"; \ 222 tr 50 M=CTR_FLEX_COUNT_3; \ 223 tr 51 M=CTR_FLEX_COUNT_3; \ 224 tr 52 M=CTR_FLEX_COUNT_3; \ 225 tr 71 M=CTR_FLEX_COUNT_3 TSE=F SLTH=T; \ 226 tr 71 M=CTR_FLEX_COUNT_3 TSE=T SLTH=T; \ 227 tr 71 M=CTR_FLEX_COUNT_3 TSE=T SLTH=F; \ 228 echo " CTR_FLEX_COUNT_4"; \ 229 tr 50 M=CTR_FLEX_COUNT_4; \ 230 tr 51 M=CTR_FLEX_COUNT_4; \ 231 tr 52 M=CTR_FLEX_COUNT_4; \ 232 tr 71 M=CTR_FLEX_COUNT_4 TSE=F SLTH=T; \ 233 tr 71 M=CTR_FLEX_COUNT_4 TSE=T SLTH=T; \ 234 tr 71 M=CTR_FLEX_COUNT_4 TSE=T SLTH=F; \ 235 echo " CTR_FLEX_COUNT_5"; \ 236 tr 50 M=CTR_FLEX_COUNT_5; \ 237 tr 51 M=CTR_FLEX_COUNT_5; \ 238 tr 52 M=CTR_FLEX_COUNT_5; \ 239 tr 71 M=CTR_FLEX_COUNT_5 TSE=F SLTH=T; \ 240 tr 71 M=CTR_FLEX_COUNT_5 TSE=T SLTH=T; \ 241 tr 71 M=CTR_FLEX_COUNT_5 TSE=T SLTH=F; \ 242 echo " CTR_FLEX_COUNT_6"; \ 243 tr 50 M=CTR_FLEX_COUNT_6; \ 244 tr 51 M=CTR_FLEX_COUNT_6; \ 245 tr 52 M=CTR_FLEX_COUNT_6; \ 246 tr 71 M=CTR_FLEX_COUNT_6 TSE=F SLTH=T; \ 247 tr 71 M=CTR_FLEX_COUNT_6 TSE=T SLTH=T; \ 248 tr 71 M=CTR_FLEX_COUNT_6 TSE=T SLTH=F; \ 249 echo " CTR_FLEX_COUNT_7"; \ 250 tr 50 M=CTR_FLEX_COUNT_7; \ 251 tr 51 M=CTR_FLEX_COUNT_7; \ 252 tr 52 M=CTR_FLEX_COUNT_7; \ 253 tr 71 M=CTR_FLEX_COUNT_7 TSE=F SLTH=T; \ 254 tr 71 M=CTR_FLEX_COUNT_7 TSE=T SLTH=T; \ 255 tr 71 M=CTR_FLEX_COUNT_7 TSE=T SLTH=F; \ 256 echo " CTR_FLEX_COUNT_8"; \ 257 tr 50 M=CTR_FLEX_COUNT_8; \ 258 tr 51 M=CTR_FLEX_COUNT_8; \ 259 tr 52 M=CTR_FLEX_COUNT_8; \ 260 tr 71 M=CTR_FLEX_COUNT_8 TSE=F SLTH=T; \ 261 tr 71 M=CTR_FLEX_COUNT_8 TSE=T SLTH=T; \ 262 tr 71 M=CTR_FLEX_COUNT_8 TSE=T SLTH=F; \ 263 echo " CTR_FLEX_COUNT_9"; \ 264 tr 50 M=CTR_FLEX_COUNT_9; \ 265 tr 51 M=CTR_FLEX_COUNT_9; \ 266 tr 52 M=CTR_FLEX_COUNT_9; \ 267 tr 71 M=CTR_FLEX_COUNT_9 TSE=F SLTH=T; \ 268 tr 71 M=CTR_FLEX_COUNT_9 TSE=T SLTH=T; \ 269 tr 71 M=CTR_FLEX_COUNT_9 TSE=T SLTH=F;' 270 $done 271 echo " DLB_HGT_FLOWSET_PORT"; 272 tr 50 M=DLB_HGT_FLOWSET_PORT; 273 tr 51 M=DLB_HGT_FLOWSET_PORT; 274 tr 52 M=DLB_HGT_FLOWSET_PORT; 275 tr 71 M=DLB_HGT_FLOWSET_PORT TSE=F SLTH=T; 276 tr 71 M=DLB_HGT_FLOWSET_PORT TSE=T SLTH=T; 277 tr 71 M=DLB_HGT_FLOWSET_PORT TSE=T SLTH=F; 278 #echo " DLB_HGT_FLOWSET_TIMESTAMP"; 279 #tr 50 M=DLB_HGT_FLOWSET_TIMESTAMP; 280 #tr 51 M=DLB_HGT_FLOWSET_TIMESTAMP; 281 #tr 52 M=DLB_HGT_FLOWSET_TIMESTAMP; 282 #tr 71 M=DLB_HGT_FLOWSET_TIMESTAMP TSE=F SLTH=T; 283 #tr 71 M=DLB_HGT_FLOWSET_TIMESTAMP TSE=T SLTH=T; 284 #tr 71 M=DLB_HGT_FLOWSET_TIMESTAMP TSE=T SLTH=F; 285 #echo " DLB_HGT_FLOWSET_TIMESTAMP_PAGE"; 286 #tr 50 M=DLB_HGT_FLOWSET_TIMESTAMP_PAGE; 287 #tr 51 M=DLB_HGT_FLOWSET_TIMESTAMP_PAGE; 288 #tr 52 M=DLB_HGT_FLOWSET_TIMESTAMP_PAGE; 289 #tr 71 M=DLB_HGT_FLOWSET_TIMESTAMP_PAGE TSE=F SLTH=T; 290 #tr 71 M=DLB_HGT_FLOWSET_TIMESTAMP_PAGE TSE=T SLTH=T; 291 #tr 71 M=DLB_HGT_FLOWSET_TIMESTAMP_PAGE TSE=T SLTH=F; 292 echo " DLB_HGT_GLB_QUANTIZE_THRESHOLDS"; 293 tr 50 M=DLB_HGT_GLB_QUANTIZE_THRESHOLDS; 294 #tr 51 M=DLB_HGT_GLB_QUANTIZE_THRESHOLDS; 295 #tr 52 M=DLB_HGT_GLB_QUANTIZE_THRESHOLDS; 296 tr 71 M=DLB_HGT_GLB_QUANTIZE_THRESHOLDS TSE=F SLTH=T; 297 tr 71 M=DLB_HGT_GLB_QUANTIZE_THRESHOLDS TSE=T SLTH=T; 298 tr 71 M=DLB_HGT_GLB_QUANTIZE_THRESHOLDS TSE=T SLTH=F; 299 echo " DLB_HGT_GROUP_CONTROL"; 300 tr 50 M=DLB_HGT_GROUP_CONTROL; 301 tr 51 M=DLB_HGT_GROUP_CONTROL; 302 tr 52 M=DLB_HGT_GROUP_CONTROL; 303 tr 71 M=DLB_HGT_GROUP_CONTROL TSE=F SLTH=T; 304 tr 71 M=DLB_HGT_GROUP_CONTROL TSE=T SLTH=T; 305 tr 71 M=DLB_HGT_GROUP_CONTROL TSE=T SLTH=F; 306 echo " DLB_HGT_GROUP_MEMBERSHIP"; 307 tr 50 M=DLB_HGT_GROUP_MEMBERSHIP; 308 tr 51 M=DLB_HGT_GROUP_MEMBERSHIP; 309 tr 52 M=DLB_HGT_GROUP_MEMBERSHIP; 310 tr 71 M=DLB_HGT_GROUP_MEMBERSHIP TSE=F SLTH=T; 311 tr 71 M=DLB_HGT_GROUP_MEMBERSHIP TSE=T SLTH=T; 312 tr 71 M=DLB_HGT_GROUP_MEMBERSHIP TSE=T SLTH=F; 313 echo " DLB_HGT_GROUP_STATS"; 314 tr 50 M=DLB_HGT_GROUP_STATS; 315 tr 51 M=DLB_HGT_GROUP_STATS; 316 tr 52 M=DLB_HGT_GROUP_STATS; 317 tr 71 M=DLB_HGT_GROUP_STATS TSE=F SLTH=T; 318 tr 71 M=DLB_HGT_GROUP_STATS TSE=T SLTH=T; 319 tr 71 M=DLB_HGT_GROUP_STATS TSE=T SLTH=F; 320 echo " DLB_HGT_LINK_CONTROL"; 321 tr 50 M=DLB_HGT_LINK_CONTROL; 322 #tr 51 M=DLB_HGT_LINK_CONTROL; 323 #tr 52 M=DLB_HGT_LINK_CONTROL; 324 tr 71 M=DLB_HGT_LINK_CONTROL TSE=F SLTH=T; 325 tr 71 M=DLB_HGT_LINK_CONTROL TSE=T SLTH=T; 326 tr 71 M=DLB_HGT_LINK_CONTROL TSE=T SLTH=F; 327 echo " DLB_HGT_OPTIMAL_CANDIDATE"; 328 tr 50 M=DLB_HGT_OPTIMAL_CANDIDATE; 329 tr 51 M=DLB_HGT_OPTIMAL_CANDIDATE; 330 tr 52 M=DLB_HGT_OPTIMAL_CANDIDATE; 331 tr 71 M=DLB_HGT_OPTIMAL_CANDIDATE TSE=F SLTH=T; 332 tr 71 M=DLB_HGT_OPTIMAL_CANDIDATE TSE=T SLTH=T; 333 tr 71 M=DLB_HGT_OPTIMAL_CANDIDATE TSE=T SLTH=F; 334 echo " DLB_HGT_PORT_QUALITY_MAPPING"; 335 tr 50 M=DLB_HGT_PORT_QUALITY_MAPPING; 336 tr 51 M=DLB_HGT_PORT_QUALITY_MAPPING; 337 tr 52 M=DLB_HGT_PORT_QUALITY_MAPPING; 338 tr 71 M=DLB_HGT_PORT_QUALITY_MAPPING TSE=F SLTH=T; 339 tr 71 M=DLB_HGT_PORT_QUALITY_MAPPING TSE=T SLTH=T; 340 tr 71 M=DLB_HGT_PORT_QUALITY_MAPPING TSE=T SLTH=F; 341 #echo " DLB_HGT_PORT_STATE"; 342 #tr 50 M=DLB_HGT_PORT_STATE; 343 #tr 51 M=DLB_HGT_PORT_STATE; 344 #tr 52 M=DLB_HGT_PORT_STATE; 345 #tr 71 M=DLB_HGT_PORT_STATE TSE=F SLTH=T; 346 #tr 71 M=DLB_HGT_PORT_STATE TSE=T SLTH=T; 347 #tr 71 M=DLB_HGT_PORT_STATE TSE=T SLTH=F; 348 echo " DSCP_TABLE"; 349 tr 50 M=DSCP_TABLE; 350 tr 51 M=DSCP_TABLE; 351 tr 52 M=DSCP_TABLE; 352 tr 71 M=DSCP_TABLE TSE=F SLTH=T; 353 tr 71 M=DSCP_TABLE TSE=T SLTH=T; 354 tr 71 M=DSCP_TABLE TSE=T SLTH=F; 355 echo " E2E_HOL_STATUS"; 356 tr 50 M=E2E_HOL_STATUS; 357 tr 51 M=E2E_HOL_STATUS; 358 tr 52 M=E2E_HOL_STATUS; 359 tr 71 M=E2E_HOL_STATUS TSE=F SLTH=T; 360 tr 71 M=E2E_HOL_STATUS TSE=T SLTH=T; 361 tr 71 M=E2E_HOL_STATUS TSE=T SLTH=F; 362 echo " E2E_HOL_STATUS_1"; 363 tr 50 M=E2E_HOL_STATUS_1; 364 tr 51 M=E2E_HOL_STATUS_1; 365 tr 52 M=E2E_HOL_STATUS_1; 366 tr 71 M=E2E_HOL_STATUS_1 TSE=F SLTH=T; 367 tr 71 M=E2E_HOL_STATUS_1 TSE=T SLTH=T; 368 tr 71 M=E2E_HOL_STATUS_1 TSE=T SLTH=F; 369 echo " EFP_COUNTER_TABLE"; 370 tr 50 M=EFP_COUNTER_TABLE; 371 tr 51 M=EFP_COUNTER_TABLE; 372 tr 52 M=EFP_COUNTER_TABLE; 373 tr 71 M=EFP_COUNTER_TABLE TSE=F SLTH=T; 374 tr 71 M=EFP_COUNTER_TABLE TSE=T SLTH=T; 375 tr 71 M=EFP_COUNTER_TABLE TSE=T SLTH=F; 376 echo " EFP_METER_TABLE"; 377 tr 50 M=EFP_METER_TABLE; 378 tr 51 M=EFP_METER_TABLE; 379 tr 52 M=EFP_METER_TABLE; 380 tr 71 M=EFP_METER_TABLE TSE=F SLTH=T; 381 tr 71 M=EFP_METER_TABLE TSE=T SLTH=T; 382 tr 71 M=EFP_METER_TABLE TSE=T SLTH=F; 383 echo " EFP_POLICY_TABLE"; 384 tr 50 M=EFP_POLICY_TABLE; 385 tr 51 M=EFP_POLICY_TABLE; 386 tr 52 M=EFP_POLICY_TABLE; 387 tr 71 M=EFP_POLICY_TABLE TSE=F SLTH=T; 388 tr 71 M=EFP_POLICY_TABLE TSE=T SLTH=T; 389 tr 71 M=EFP_POLICY_TABLE TSE=T SLTH=F; 390 echo " EFP_TCAM"; 391 tr 50 M=EFP_TCAM; 392 tr 51 M=EFP_TCAM; 393 tr 52 M=EFP_TCAM; 394 tr 71 M=EFP_TCAM TSE=F SLTH=T; 395 tr 71 M=EFP_TCAM TSE=T SLTH=T; 396 tr 71 M=EFP_TCAM TSE=T SLTH=F; 397 echo " EGR_1588_SA"; 398 tr 50 M=EGR_1588_SA; 399 tr 51 M=EGR_1588_SA; 400 tr 52 M=EGR_1588_SA; 401 tr 71 M=EGR_1588_SA TSE=F SLTH=T; 402 tr 71 M=EGR_1588_SA TSE=T SLTH=T; 403 tr 71 M=EGR_1588_SA TSE=T SLTH=F; 404 echo " EGR_DSCP_ECN_MAP"; 405 tr 50 M=EGR_DSCP_ECN_MAP; 406 tr 51 M=EGR_DSCP_ECN_MAP; 407 tr 52 M=EGR_DSCP_ECN_MAP; 408 tr 71 M=EGR_DSCP_ECN_MAP TSE=F SLTH=T; 409 tr 71 M=EGR_DSCP_ECN_MAP TSE=T SLTH=T; 410 tr 71 M=EGR_DSCP_ECN_MAP TSE=T SLTH=F; 411 echo " EGR_DSCP_TABLE"; 412 tr 50 M=EGR_DSCP_TABLE; 413 tr 51 M=EGR_DSCP_TABLE; 414 tr 52 M=EGR_DSCP_TABLE; 415 tr 71 M=EGR_DSCP_TABLE TSE=F SLTH=T; 416 tr 71 M=EGR_DSCP_TABLE TSE=T SLTH=T; 417 tr 71 M=EGR_DSCP_TABLE TSE=T SLTH=F; 418 echo " EGR_DVP_ATTRIBUTE"; 419 tr 50 M=EGR_DVP_ATTRIBUTE; 420 tr 51 M=EGR_DVP_ATTRIBUTE; 421 tr 52 M=EGR_DVP_ATTRIBUTE; 422 tr 71 M=EGR_DVP_ATTRIBUTE TSE=F SLTH=T; 423 tr 71 M=EGR_DVP_ATTRIBUTE TSE=T SLTH=T; 424 tr 71 M=EGR_DVP_ATTRIBUTE TSE=T SLTH=F; 425 echo " EGR_EM_MTP_INDEX"; 426 tr 50 M=EGR_EM_MTP_INDEX; 427 tr 51 M=EGR_EM_MTP_INDEX; 428 tr 52 M=EGR_EM_MTP_INDEX; 429 tr 71 M=EGR_EM_MTP_INDEX TSE=F SLTH=T; 430 tr 71 M=EGR_EM_MTP_INDEX TSE=T SLTH=T; 431 tr 71 M=EGR_EM_MTP_INDEX TSE=T SLTH=F; 432 echo " EGR_ENABLE"; 433 tr 50 M=EGR_ENABLE; 434 tr 51 M=EGR_ENABLE; 435 tr 52 M=EGR_ENABLE; 436 tr 71 M=EGR_ENABLE TSE=F SLTH=T; 437 tr 71 M=EGR_ENABLE TSE=T SLTH=T; 438 tr 71 M=EGR_ENABLE TSE=T SLTH=F; 439 echo " EGR_FLEX_CTR_COUNTER_TABLE_0"; 440 tr 50 M=EGR_FLEX_CTR_COUNTER_TABLE_0; 441 tr 51 M=EGR_FLEX_CTR_COUNTER_TABLE_0; 442 tr 52 M=EGR_FLEX_CTR_COUNTER_TABLE_0; 443 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_0 TSE=F SLTH=T; 444 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_0 TSE=T SLTH=T; 445 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_0 TSE=T SLTH=F; 446 echo " EGR_FLEX_CTR_COUNTER_TABLE_1"; 447 tr 50 M=EGR_FLEX_CTR_COUNTER_TABLE_1; 448 tr 51 M=EGR_FLEX_CTR_COUNTER_TABLE_1; 449 tr 52 M=EGR_FLEX_CTR_COUNTER_TABLE_1; 450 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_1 TSE=F SLTH=T; 451 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_1 TSE=T SLTH=T; 452 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_1 TSE=T SLTH=F; 453 echo " EGR_FLEX_CTR_COUNTER_TABLE_2"; 454 tr 50 M=EGR_FLEX_CTR_COUNTER_TABLE_2; 455 tr 51 M=EGR_FLEX_CTR_COUNTER_TABLE_2; 456 tr 52 M=EGR_FLEX_CTR_COUNTER_TABLE_2; 457 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_2 TSE=F SLTH=T; 458 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_2 TSE=T SLTH=T; 459 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_2 TSE=T SLTH=F; 460 echo " EGR_FLEX_CTR_COUNTER_TABLE_3"; 461 tr 50 M=EGR_FLEX_CTR_COUNTER_TABLE_3; 462 tr 51 M=EGR_FLEX_CTR_COUNTER_TABLE_3; 463 tr 52 M=EGR_FLEX_CTR_COUNTER_TABLE_3; 464 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_3 TSE=F SLTH=T; 465 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_3 TSE=T SLTH=T; 466 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_3 TSE=T SLTH=F; 467 echo " EGR_FLEX_CTR_COUNTER_TABLE_4"; 468 tr 50 M=EGR_FLEX_CTR_COUNTER_TABLE_4; 469 tr 51 M=EGR_FLEX_CTR_COUNTER_TABLE_4; 470 tr 52 M=EGR_FLEX_CTR_COUNTER_TABLE_4; 471 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_4 TSE=F SLTH=T; 472 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_4 TSE=T SLTH=T; 473 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_4 TSE=T SLTH=F; 474 echo " EGR_FLEX_CTR_COUNTER_TABLE_5"; 475 tr 50 M=EGR_FLEX_CTR_COUNTER_TABLE_5; 476 tr 51 M=EGR_FLEX_CTR_COUNTER_TABLE_5; 477 tr 52 M=EGR_FLEX_CTR_COUNTER_TABLE_5; 478 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_5 TSE=F SLTH=T; 479 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_5 TSE=T SLTH=T; 480 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_5 TSE=T SLTH=F; 481 echo " EGR_FLEX_CTR_COUNTER_TABLE_6"; 482 tr 50 M=EGR_FLEX_CTR_COUNTER_TABLE_6; 483 tr 51 M=EGR_FLEX_CTR_COUNTER_TABLE_6; 484 tr 52 M=EGR_FLEX_CTR_COUNTER_TABLE_6; 485 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_6 TSE=F SLTH=T; 486 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_6 TSE=T SLTH=T; 487 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_6 TSE=T SLTH=F; 488 echo " EGR_FLEX_CTR_COUNTER_TABLE_7"; 489 tr 50 M=EGR_FLEX_CTR_COUNTER_TABLE_7; 490 tr 51 M=EGR_FLEX_CTR_COUNTER_TABLE_7; 491 tr 52 M=EGR_FLEX_CTR_COUNTER_TABLE_7; 492 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_7 TSE=F SLTH=T; 493 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_7 TSE=T SLTH=T; 494 tr 71 M=EGR_FLEX_CTR_COUNTER_TABLE_7 TSE=T SLTH=F; 495 echo " EGR_FLEX_CTR_OFFSET_TABLE_0"; 496 tr 50 M=EGR_FLEX_CTR_OFFSET_TABLE_0; 497 tr 51 M=EGR_FLEX_CTR_OFFSET_TABLE_0; 498 tr 52 M=EGR_FLEX_CTR_OFFSET_TABLE_0; 499 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_0 TSE=F SLTH=T; 500 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_0 TSE=T SLTH=T; 501 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_0 TSE=T SLTH=F; 502 echo " EGR_FLEX_CTR_OFFSET_TABLE_1"; 503 tr 50 M=EGR_FLEX_CTR_OFFSET_TABLE_1; 504 tr 51 M=EGR_FLEX_CTR_OFFSET_TABLE_1; 505 tr 52 M=EGR_FLEX_CTR_OFFSET_TABLE_1; 506 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_1 TSE=F SLTH=T; 507 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_1 TSE=T SLTH=T; 508 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_1 TSE=T SLTH=F; 509 echo " EGR_FLEX_CTR_OFFSET_TABLE_2"; 510 tr 50 M=EGR_FLEX_CTR_OFFSET_TABLE_2; 511 tr 51 M=EGR_FLEX_CTR_OFFSET_TABLE_2; 512 tr 52 M=EGR_FLEX_CTR_OFFSET_TABLE_2; 513 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_2 TSE=F SLTH=T; 514 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_2 TSE=T SLTH=T; 515 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_2 TSE=T SLTH=F; 516 echo " EGR_FLEX_CTR_OFFSET_TABLE_3"; 517 tr 50 M=EGR_FLEX_CTR_OFFSET_TABLE_3; 518 tr 51 M=EGR_FLEX_CTR_OFFSET_TABLE_3; 519 tr 52 M=EGR_FLEX_CTR_OFFSET_TABLE_3; 520 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_3 TSE=F SLTH=T; 521 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_3 TSE=T SLTH=T; 522 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_3 TSE=T SLTH=F; 523 echo " EGR_FLEX_CTR_OFFSET_TABLE_4"; 524 tr 50 M=EGR_FLEX_CTR_OFFSET_TABLE_4; 525 tr 51 M=EGR_FLEX_CTR_OFFSET_TABLE_4; 526 tr 52 M=EGR_FLEX_CTR_OFFSET_TABLE_4; 527 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_4 TSE=F SLTH=T; 528 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_4 TSE=T SLTH=T; 529 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_4 TSE=T SLTH=F; 530 echo " EGR_FLEX_CTR_OFFSET_TABLE_5"; 531 tr 50 M=EGR_FLEX_CTR_OFFSET_TABLE_5; 532 tr 51 M=EGR_FLEX_CTR_OFFSET_TABLE_5; 533 tr 52 M=EGR_FLEX_CTR_OFFSET_TABLE_5; 534 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_5 TSE=F SLTH=T; 535 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_5 TSE=T SLTH=T; 536 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_5 TSE=T SLTH=F; 537 echo " EGR_FLEX_CTR_OFFSET_TABLE_6"; 538 tr 50 M=EGR_FLEX_CTR_OFFSET_TABLE_6; 539 tr 51 M=EGR_FLEX_CTR_OFFSET_TABLE_6; 540 tr 52 M=EGR_FLEX_CTR_OFFSET_TABLE_6; 541 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_6 TSE=F SLTH=T; 542 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_6 TSE=T SLTH=T; 543 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_6 TSE=T SLTH=F; 544 echo " EGR_FLEX_CTR_OFFSET_TABLE_7"; 545 tr 50 M=EGR_FLEX_CTR_OFFSET_TABLE_7; 546 tr 51 M=EGR_FLEX_CTR_OFFSET_TABLE_7; 547 tr 52 M=EGR_FLEX_CTR_OFFSET_TABLE_7; 548 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_7 TSE=F SLTH=T; 549 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_7 TSE=T SLTH=T; 550 tr 71 M=EGR_FLEX_CTR_OFFSET_TABLE_7 TSE=T SLTH=F; 551 echo " EGR_FLEX_CTR_PKT_PRI_MAP"; 552 tr 50 M=EGR_FLEX_CTR_PKT_PRI_MAP; 553 tr 51 M=EGR_FLEX_CTR_PKT_PRI_MAP; 554 tr 52 M=EGR_FLEX_CTR_PKT_PRI_MAP; 555 tr 71 M=EGR_FLEX_CTR_PKT_PRI_MAP TSE=F SLTH=T; 556 tr 71 M=EGR_FLEX_CTR_PKT_PRI_MAP TSE=T SLTH=T; 557 tr 71 M=EGR_FLEX_CTR_PKT_PRI_MAP TSE=T SLTH=F; 558 echo " EGR_FLEX_CTR_PKT_RES_MAP"; 559 tr 50 M=EGR_FLEX_CTR_PKT_RES_MAP; 560 tr 51 M=EGR_FLEX_CTR_PKT_RES_MAP; 561 tr 52 M=EGR_FLEX_CTR_PKT_RES_MAP; 562 tr 71 M=EGR_FLEX_CTR_PKT_RES_MAP TSE=F SLTH=T; 563 tr 71 M=EGR_FLEX_CTR_PKT_RES_MAP TSE=T SLTH=T; 564 tr 71 M=EGR_FLEX_CTR_PKT_RES_MAP TSE=T SLTH=F; 565 echo " EGR_FLEX_CTR_PORT_MAP"; 566 tr 50 M=EGR_FLEX_CTR_PORT_MAP; 567 tr 51 M=EGR_FLEX_CTR_PORT_MAP; 568 tr 52 M=EGR_FLEX_CTR_PORT_MAP; 569 tr 71 M=EGR_FLEX_CTR_PORT_MAP TSE=F SLTH=T; 570 tr 71 M=EGR_FLEX_CTR_PORT_MAP TSE=T SLTH=T; 571 tr 71 M=EGR_FLEX_CTR_PORT_MAP TSE=T SLTH=F; 572 echo " EGR_FLEX_CTR_PRI_CNG_MAP"; 573 tr 50 M=EGR_FLEX_CTR_PRI_CNG_MAP; 574 tr 51 M=EGR_FLEX_CTR_PRI_CNG_MAP; 575 tr 52 M=EGR_FLEX_CTR_PRI_CNG_MAP; 576 tr 71 M=EGR_FLEX_CTR_PRI_CNG_MAP TSE=F SLTH=T; 577 tr 71 M=EGR_FLEX_CTR_PRI_CNG_MAP TSE=T SLTH=T; 578 tr 71 M=EGR_FLEX_CTR_PRI_CNG_MAP TSE=T SLTH=F; 579 echo " EGR_FLEX_CTR_TOS_MAP"; 580 tr 50 M=EGR_FLEX_CTR_TOS_MAP; 581 tr 51 M=EGR_FLEX_CTR_TOS_MAP; 582 tr 52 M=EGR_FLEX_CTR_TOS_MAP; 583 tr 71 M=EGR_FLEX_CTR_TOS_MAP TSE=F SLTH=T; 584 tr 71 M=EGR_FLEX_CTR_TOS_MAP TSE=T SLTH=T; 585 tr 71 M=EGR_FLEX_CTR_TOS_MAP TSE=T SLTH=F; 586 echo " EGR_FRAGMENT_ID_TABLE"; 587 tr 50 M=EGR_FRAGMENT_ID_TABLE; 588 tr 51 M=EGR_FRAGMENT_ID_TABLE; 589 tr 52 M=EGR_FRAGMENT_ID_TABLE; 590 tr 71 M=EGR_FRAGMENT_ID_TABLE TSE=F SLTH=T; 591 tr 71 M=EGR_FRAGMENT_ID_TABLE TSE=T SLTH=T; 592 tr 71 M=EGR_FRAGMENT_ID_TABLE TSE=T SLTH=F; 593 echo " EGR_IM_MTP_INDEX"; 594 tr 50 M=EGR_IM_MTP_INDEX; 595 tr 51 M=EGR_IM_MTP_INDEX; 596 tr 52 M=EGR_IM_MTP_INDEX; 597 tr 71 M=EGR_IM_MTP_INDEX TSE=F SLTH=T; 598 tr 71 M=EGR_IM_MTP_INDEX TSE=T SLTH=T; 599 tr 71 M=EGR_IM_MTP_INDEX TSE=T SLTH=F; 600 echo " EGR_ING_PORT"; 601 tr 50 M=EGR_ING_PORT; 602 tr 51 M=EGR_ING_PORT; 603 tr 52 M=EGR_ING_PORT; 604 tr 71 M=EGR_ING_PORT TSE=F SLTH=T; 605 tr 71 M=EGR_ING_PORT TSE=T SLTH=T; 606 tr 71 M=EGR_ING_PORT TSE=T SLTH=F; 607 echo " EGR_IPMC"; 608 tr 50 M=EGR_IPMC; 609 tr 51 M=EGR_IPMC; 610 tr 52 M=EGR_IPMC; 611 tr 71 M=EGR_IPMC TSE=F SLTH=T; 612 tr 71 M=EGR_IPMC TSE=T SLTH=T; 613 tr 71 M=EGR_IPMC TSE=T SLTH=F; 614 echo " EGR_IP_TUNNEL"; 615 tr 50 M=EGR_IP_TUNNEL; 616 tr 51 M=EGR_IP_TUNNEL; 617 tr 52 M=EGR_IP_TUNNEL; 618 tr 71 M=EGR_IP_TUNNEL TSE=F SLTH=T; 619 tr 71 M=EGR_IP_TUNNEL TSE=T SLTH=T; 620 tr 71 M=EGR_IP_TUNNEL TSE=T SLTH=F; 621 echo " EGR_IP_TUNNEL_IPV6"; 622 tr 50 M=EGR_IP_TUNNEL_IPV6; 623 tr 51 M=EGR_IP_TUNNEL_IPV6; 624 tr 52 M=EGR_IP_TUNNEL_IPV6; 625 tr 71 M=EGR_IP_TUNNEL_IPV6 TSE=F SLTH=T; 626 tr 71 M=EGR_IP_TUNNEL_IPV6 TSE=T SLTH=T; 627 tr 71 M=EGR_IP_TUNNEL_IPV6 TSE=T SLTH=F; 628 echo " EGR_IP_TUNNEL_MPLS"; 629 tr 50 M=EGR_IP_TUNNEL_MPLS; 630 tr 51 M=EGR_IP_TUNNEL_MPLS; 631 tr 52 M=EGR_IP_TUNNEL_MPLS; 632 tr 71 M=EGR_IP_TUNNEL_MPLS TSE=F SLTH=T; 633 tr 71 M=EGR_IP_TUNNEL_MPLS TSE=T SLTH=T; 634 tr 71 M=EGR_IP_TUNNEL_MPLS TSE=T SLTH=F; 635 echo " EGR_L3_INTF"; 636 tr 50 M=EGR_L3_INTF; 637 tr 51 M=EGR_L3_INTF; 638 tr 52 M=EGR_L3_INTF; 639 tr 71 M=EGR_L3_INTF TSE=F SLTH=T; 640 tr 71 M=EGR_L3_INTF TSE=T SLTH=T; 641 tr 71 M=EGR_L3_INTF TSE=T SLTH=F; 642 echo " EGR_L3_NEXT_HOP"; 643 tr 50 M=EGR_L3_NEXT_HOP; 644 tr 51 M=EGR_L3_NEXT_HOP; 645 tr 52 M=EGR_L3_NEXT_HOP; 646 tr 71 M=EGR_L3_NEXT_HOP TSE=F SLTH=T; 647 tr 71 M=EGR_L3_NEXT_HOP TSE=T SLTH=T; 648 tr 71 M=EGR_L3_NEXT_HOP TSE=T SLTH=F; 649 echo " EGR_MAC_DA_PROFILE"; 650 tr 50 M=EGR_MAC_DA_PROFILE; 651 tr 51 M=EGR_MAC_DA_PROFILE; 652 tr 52 M=EGR_MAC_DA_PROFILE; 653 tr 71 M=EGR_MAC_DA_PROFILE TSE=F SLTH=T; 654 tr 71 M=EGR_MAC_DA_PROFILE TSE=T SLTH=T; 655 tr 71 M=EGR_MAC_DA_PROFILE TSE=T SLTH=F; 656 echo " EGR_MAP_MH"; 657 tr 50 M=EGR_MAP_MH; 658 tr 51 M=EGR_MAP_MH; 659 tr 52 M=EGR_MAP_MH; 660 tr 71 M=EGR_MAP_MH TSE=F SLTH=T; 661 tr 71 M=EGR_MAP_MH TSE=T SLTH=T; 662 tr 71 M=EGR_MAP_MH TSE=T SLTH=F; 663 echo " EGR_MASK"; 664 tr 50 M=EGR_MASK; 665 tr 51 M=EGR_MASK; 666 tr 52 M=EGR_MASK; 667 tr 71 M=EGR_MASK TSE=F SLTH=T; 668 tr 71 M=EGR_MASK TSE=T SLTH=T; 669 tr 71 M=EGR_MASK TSE=T SLTH=F; 670 echo " EGR_MASK_MODBASE"; 671 tr 50 M=EGR_MASK_MODBASE; 672 tr 51 M=EGR_MASK_MODBASE; 673 tr 52 M=EGR_MASK_MODBASE; 674 tr 71 M=EGR_MASK_MODBASE TSE=F SLTH=T; 675 tr 71 M=EGR_MASK_MODBASE TSE=T SLTH=T; 676 tr 71 M=EGR_MASK_MODBASE TSE=T SLTH=F; 677 #echo " EGR_MAX_USED_ENTRIES"; 678 #tr 50 M=EGR_MAX_USED_ENTRIES; 679 #tr 51 M=EGR_MAX_USED_ENTRIES; 680 #tr 52 M=EGR_MAX_USED_ENTRIES; 681 #tr 71 M=EGR_MAX_USED_ENTRIES TSE=F SLTH=T; 682 #tr 71 M=EGR_MAX_USED_ENTRIES TSE=T SLTH=T; 683 #tr 71 M=EGR_MAX_USED_ENTRIES TSE=T SLTH=F; 684 echo " EGR_MIRROR_ENCAP_CONTROL"; 685 tr 50 M=EGR_MIRROR_ENCAP_CONTROL; 686 tr 51 M=EGR_MIRROR_ENCAP_CONTROL; 687 tr 52 M=EGR_MIRROR_ENCAP_CONTROL; 688 tr 71 M=EGR_MIRROR_ENCAP_CONTROL TSE=F SLTH=T; 689 tr 71 M=EGR_MIRROR_ENCAP_CONTROL TSE=T SLTH=T; 690 tr 71 M=EGR_MIRROR_ENCAP_CONTROL TSE=T SLTH=F; 691 echo " EGR_MIRROR_ENCAP_DATA_1"; 692 tr 50 M=EGR_MIRROR_ENCAP_DATA_1; 693 tr 51 M=EGR_MIRROR_ENCAP_DATA_1; 694 tr 52 M=EGR_MIRROR_ENCAP_DATA_1; 695 tr 71 M=EGR_MIRROR_ENCAP_DATA_1 TSE=F SLTH=T; 696 tr 71 M=EGR_MIRROR_ENCAP_DATA_1 TSE=T SLTH=T; 697 tr 71 M=EGR_MIRROR_ENCAP_DATA_1 TSE=T SLTH=F; 698 #echo " EGR_MMU_REQUESTS"; 699 #tr 50 M=EGR_MMU_REQUESTS; 700 #tr 51 M=EGR_MMU_REQUESTS; 701 #tr 52 M=EGR_MMU_REQUESTS; 702 #tr 71 M=EGR_MMU_REQUESTS TSE=F SLTH=T; 703 #tr 71 M=EGR_MMU_REQUESTS TSE=T SLTH=T; 704 #tr 71 M=EGR_MMU_REQUESTS TSE=T SLTH=F; 705 echo " EGR_MOD_MAP_TABLE"; 706 tr 50 M=EGR_MOD_MAP_TABLE; 707 tr 51 M=EGR_MOD_MAP_TABLE; 708 tr 52 M=EGR_MOD_MAP_TABLE; 709 tr 71 M=EGR_MOD_MAP_TABLE TSE=F SLTH=T; 710 tr 71 M=EGR_MOD_MAP_TABLE TSE=T SLTH=T; 711 tr 71 M=EGR_MOD_MAP_TABLE TSE=T SLTH=F; 712 echo " EGR_MPLS_EXP_MAPPING_1"; 713 tr 50 M=EGR_MPLS_EXP_MAPPING_1; 714 tr 51 M=EGR_MPLS_EXP_MAPPING_1; 715 tr 52 M=EGR_MPLS_EXP_MAPPING_1; 716 tr 71 M=EGR_MPLS_EXP_MAPPING_1 TSE=F SLTH=T; 717 tr 71 M=EGR_MPLS_EXP_MAPPING_1 TSE=T SLTH=T; 718 tr 71 M=EGR_MPLS_EXP_MAPPING_1 TSE=T SLTH=F; 719 echo " EGR_MPLS_EXP_MAPPING_2"; 720 tr 50 M=EGR_MPLS_EXP_MAPPING_2; 721 tr 51 M=EGR_MPLS_EXP_MAPPING_2; 722 tr 52 M=EGR_MPLS_EXP_MAPPING_2; 723 tr 71 M=EGR_MPLS_EXP_MAPPING_2 TSE=F SLTH=T; 724 tr 71 M=EGR_MPLS_EXP_MAPPING_2 TSE=T SLTH=T; 725 tr 71 M=EGR_MPLS_EXP_MAPPING_2 TSE=T SLTH=F; 726 echo " EGR_MPLS_EXP_PRI_MAPPING"; 727 tr 50 M=EGR_MPLS_EXP_PRI_MAPPING; 728 tr 51 M=EGR_MPLS_EXP_PRI_MAPPING; 729 tr 52 M=EGR_MPLS_EXP_PRI_MAPPING; 730 tr 71 M=EGR_MPLS_EXP_PRI_MAPPING TSE=F SLTH=T; 731 tr 71 M=EGR_MPLS_EXP_PRI_MAPPING TSE=T SLTH=T; 732 tr 71 M=EGR_MPLS_EXP_PRI_MAPPING TSE=T SLTH=F; 733 echo " EGR_MPLS_PRI_MAPPING"; 734 tr 50 M=EGR_MPLS_PRI_MAPPING; 735 tr 51 M=EGR_MPLS_PRI_MAPPING; 736 tr 52 M=EGR_MPLS_PRI_MAPPING; 737 tr 71 M=EGR_MPLS_PRI_MAPPING TSE=F SLTH=T; 738 tr 71 M=EGR_MPLS_PRI_MAPPING TSE=T SLTH=T; 739 tr 71 M=EGR_MPLS_PRI_MAPPING TSE=T SLTH=F; 740 echo " EGR_MPLS_VC_AND_SWAP_LABEL_TABLE"; 741 tr 50 M=EGR_MPLS_VC_AND_SWAP_LABEL_TABLE; 742 tr 51 M=EGR_MPLS_VC_AND_SWAP_LABEL_TABLE; 743 tr 52 M=EGR_MPLS_VC_AND_SWAP_LABEL_TABLE; 744 tr 71 M=EGR_MPLS_VC_AND_SWAP_LABEL_TABLE TSE=F SLTH=T; 745 tr 71 M=EGR_MPLS_VC_AND_SWAP_LABEL_TABLE TSE=T SLTH=T; 746 tr 71 M=EGR_MPLS_VC_AND_SWAP_LABEL_TABLE TSE=T SLTH=F; 747 #echo " EGR_PBE_DEBUG_0"; 748 #tr 50 M=EGR_PBE_DEBUG_0; 749 #tr 51 M=EGR_PBE_DEBUG_0; 750 #tr 52 M=EGR_PBE_DEBUG_0; 751 #tr 71 M=EGR_PBE_DEBUG_0 TSE=F SLTH=T; 752 #tr 71 M=EGR_PBE_DEBUG_0 TSE=T SLTH=T; 753 #tr 71 M=EGR_PBE_DEBUG_0 TSE=T SLTH=F; 754 #echo " EGR_PBE_DEBUG_1"; 755 #tr 50 M=EGR_PBE_DEBUG_1; 756 #tr 51 M=EGR_PBE_DEBUG_1; 757 #tr 52 M=EGR_PBE_DEBUG_1; 758 #tr 71 M=EGR_PBE_DEBUG_1 TSE=F SLTH=T; 759 #tr 71 M=EGR_PBE_DEBUG_1 TSE=T SLTH=T; 760 #tr 71 M=EGR_PBE_DEBUG_1 TSE=T SLTH=F; 761 echo " EGR_PORT"; 762 tr 50 M=EGR_PORT; 763 tr 51 M=EGR_PORT; 764 tr 52 M=EGR_PORT; 765 tr 71 M=EGR_PORT TSE=F SLTH=T; 766 tr 71 M=EGR_PORT TSE=T SLTH=T; 767 tr 71 M=EGR_PORT TSE=T SLTH=F; 768 #echo " EGR_PORT_REQUESTS"; 769 #tr 50 M=EGR_PORT_REQUESTS; 770 #tr 51 M=EGR_PORT_REQUESTS; 771 #tr 52 M=EGR_PORT_REQUESTS; 772 #tr 71 M=EGR_PORT_REQUESTS TSE=F SLTH=T; 773 #tr 71 M=EGR_PORT_REQUESTS TSE=T SLTH=T; 774 #tr 71 M=EGR_PORT_REQUESTS TSE=T SLTH=F; 775 echo " EGR_PRI_CNG_MAP"; 776 tr 50 M=EGR_PRI_CNG_MAP; 777 tr 51 M=EGR_PRI_CNG_MAP; 778 tr 52 M=EGR_PRI_CNG_MAP; 779 tr 71 M=EGR_PRI_CNG_MAP TSE=F SLTH=T; 780 tr 71 M=EGR_PRI_CNG_MAP TSE=T SLTH=T; 781 tr 71 M=EGR_PRI_CNG_MAP TSE=T SLTH=F; 782 echo " EGR_PW_INIT_COUNTERS"; 783 tr 50 M=EGR_PW_INIT_COUNTERS; 784 tr 51 M=EGR_PW_INIT_COUNTERS; 785 tr 52 M=EGR_PW_INIT_COUNTERS; 786 tr 71 M=EGR_PW_INIT_COUNTERS TSE=F SLTH=T; 787 tr 71 M=EGR_PW_INIT_COUNTERS TSE=T SLTH=T; 788 tr 71 M=EGR_PW_INIT_COUNTERS TSE=T SLTH=F; 789 echo " EGR_VFI"; 790 tr 50 M=EGR_VFI; 791 tr 51 M=EGR_VFI; 792 tr 52 M=EGR_VFI; 793 tr 71 M=EGR_VFI TSE=F SLTH=T; 794 tr 71 M=EGR_VFI TSE=T SLTH=T; 795 tr 71 M=EGR_VFI TSE=T SLTH=F; 796 echo " EGR_VLAN"; 797 tr 50 M=EGR_VLAN; 798 tr 51 M=EGR_VLAN; 799 tr 52 M=EGR_VLAN; 800 tr 71 M=EGR_VLAN TSE=F SLTH=T; 801 tr 71 M=EGR_VLAN TSE=T SLTH=T; 802 tr 71 M=EGR_VLAN TSE=T SLTH=F; 803 echo " EGR_VLAN_STG"; 804 tr 50 M=EGR_VLAN_STG; 805 tr 51 M=EGR_VLAN_STG; 806 tr 52 M=EGR_VLAN_STG; 807 tr 71 M=EGR_VLAN_STG TSE=F SLTH=T; 808 tr 71 M=EGR_VLAN_STG TSE=T SLTH=T; 809 tr 71 M=EGR_VLAN_STG TSE=T SLTH=F; 810 echo " EGR_VLAN_TAG_ACTION_PROFILE"; 811 tr 50 M=EGR_VLAN_TAG_ACTION_PROFILE; 812 tr 51 M=EGR_VLAN_TAG_ACTION_PROFILE; 813 tr 52 M=EGR_VLAN_TAG_ACTION_PROFILE; 814 tr 71 M=EGR_VLAN_TAG_ACTION_PROFILE TSE=F SLTH=T; 815 tr 71 M=EGR_VLAN_TAG_ACTION_PROFILE TSE=T SLTH=T; 816 tr 71 M=EGR_VLAN_TAG_ACTION_PROFILE TSE=T SLTH=F; 817 echo " EGR_VLAN_XLATE"; 818 tr 50 M=EGR_VLAN_XLATE; 819 tr 51 M=EGR_VLAN_XLATE; 820 tr 52 M=EGR_VLAN_XLATE; 821 tr 71 M=EGR_VLAN_XLATE TSE=F SLTH=T; 822 tr 71 M=EGR_VLAN_XLATE TSE=T SLTH=T; 823 tr 71 M=EGR_VLAN_XLATE TSE=T SLTH=F; 824 echo " EMIRROR_CONTROL"; 825 tr 50 M=EMIRROR_CONTROL; 826 tr 51 M=EMIRROR_CONTROL; 827 tr 52 M=EMIRROR_CONTROL; 828 tr 71 M=EMIRROR_CONTROL TSE=F SLTH=T; 829 tr 71 M=EMIRROR_CONTROL TSE=T SLTH=T; 830 tr 71 M=EMIRROR_CONTROL TSE=T SLTH=F; 831 echo " EMIRROR_CONTROL1"; 832 tr 50 M=EMIRROR_CONTROL1; 833 tr 51 M=EMIRROR_CONTROL1; 834 tr 52 M=EMIRROR_CONTROL1; 835 tr 71 M=EMIRROR_CONTROL1 TSE=F SLTH=T; 836 tr 71 M=EMIRROR_CONTROL1 TSE=T SLTH=T; 837 tr 71 M=EMIRROR_CONTROL1 TSE=T SLTH=F; 838 echo " EMIRROR_CONTROL2"; 839 tr 50 M=EMIRROR_CONTROL2; 840 tr 51 M=EMIRROR_CONTROL2; 841 tr 52 M=EMIRROR_CONTROL2; 842 tr 71 M=EMIRROR_CONTROL2 TSE=F SLTH=T; 843 tr 71 M=EMIRROR_CONTROL2 TSE=T SLTH=T; 844 tr 71 M=EMIRROR_CONTROL2 TSE=T SLTH=F; 845 echo " EMIRROR_CONTROL3"; 846 tr 50 M=EMIRROR_CONTROL3; 847 tr 51 M=EMIRROR_CONTROL3; 848 tr 52 M=EMIRROR_CONTROL3; 849 tr 71 M=EMIRROR_CONTROL3 TSE=F SLTH=T; 850 tr 71 M=EMIRROR_CONTROL3 TSE=T SLTH=T; 851 tr 71 M=EMIRROR_CONTROL3 TSE=T SLTH=F; 852 echo " EM_MTP_INDEX"; 853 tr 50 M=EM_MTP_INDEX; 854 tr 51 M=EM_MTP_INDEX; 855 tr 52 M=EM_MTP_INDEX; 856 tr 71 M=EM_MTP_INDEX TSE=F SLTH=T; 857 tr 71 M=EM_MTP_INDEX TSE=T SLTH=T; 858 tr 71 M=EM_MTP_INDEX TSE=T SLTH=F; 859 echo " EPC_LINK_BMAP"; 860 tr 50 M=EPC_LINK_BMAP; 861 #tr 51 M=EPC_LINK_BMAP; 862 #tr 52 M=EPC_LINK_BMAP; 863 tr 71 M=EPC_LINK_BMAP TSE=F SLTH=T; 864 tr 71 M=EPC_LINK_BMAP TSE=T SLTH=T; 865 tr 71 M=EPC_LINK_BMAP TSE=T SLTH=F; 866 echo " FP_COUNTER_TABLE"; 867 tr 50 M=FP_COUNTER_TABLE; 868 tr 51 M=FP_COUNTER_TABLE; 869 tr 52 M=FP_COUNTER_TABLE; 870 tr 71 M=FP_COUNTER_TABLE TSE=F SLTH=T; 871 tr 71 M=FP_COUNTER_TABLE TSE=T SLTH=T; 872 tr 71 M=FP_COUNTER_TABLE TSE=T SLTH=F; 873 echo " FP_GLOBAL_MASK_TCAM"; 874 tr 50 M=FP_GLOBAL_MASK_TCAM; 875 tr 51 M=FP_GLOBAL_MASK_TCAM; 876 tr 52 M=FP_GLOBAL_MASK_TCAM; 877 tr 71 M=FP_GLOBAL_MASK_TCAM TSE=F SLTH=T; 878 tr 71 M=FP_GLOBAL_MASK_TCAM TSE=T SLTH=T; 879 tr 71 M=FP_GLOBAL_MASK_TCAM TSE=T SLTH=F; 880 echo " FP_METER_TABLE"; 881 tr 50 M=FP_METER_TABLE; 882 tr 51 M=FP_METER_TABLE; 883 tr 52 M=FP_METER_TABLE; 884 tr 71 M=FP_METER_TABLE TSE=F SLTH=T; 885 tr 71 M=FP_METER_TABLE TSE=T SLTH=T; 886 tr 71 M=FP_METER_TABLE TSE=T SLTH=F; 887 echo " FP_POLICY_TABLE"; 888 tr 50 M=FP_POLICY_TABLE; 889 tr 51 M=FP_POLICY_TABLE; 890 tr 52 M=FP_POLICY_TABLE; 891 tr 71 M=FP_POLICY_TABLE TSE=F SLTH=T; 892 tr 71 M=FP_POLICY_TABLE TSE=T SLTH=T; 893 tr 71 M=FP_POLICY_TABLE TSE=T SLTH=F; 894 echo " FP_PORT_FIELD_SEL"; 895 tr 50 M=FP_PORT_FIELD_SEL; 896 tr 51 M=FP_PORT_FIELD_SEL; 897 tr 52 M=FP_PORT_FIELD_SEL; 898 tr 71 M=FP_PORT_FIELD_SEL TSE=F SLTH=T; 899 tr 71 M=FP_PORT_FIELD_SEL TSE=T SLTH=T; 900 tr 71 M=FP_PORT_FIELD_SEL TSE=T SLTH=F; 901 echo " FP_PORT_METER_MAP"; 902 tr 50 M=FP_PORT_METER_MAP; 903 tr 51 M=FP_PORT_METER_MAP; 904 tr 52 M=FP_PORT_METER_MAP; 905 tr 71 M=FP_PORT_METER_MAP TSE=F SLTH=T; 906 tr 71 M=FP_PORT_METER_MAP TSE=T SLTH=T; 907 tr 71 M=FP_PORT_METER_MAP TSE=T SLTH=F; 908 echo " FP_RANGE_CHECK"; 909 tr 50 M=FP_RANGE_CHECK; 910 tr 51 M=FP_RANGE_CHECK; 911 tr 52 M=FP_RANGE_CHECK; 912 tr 71 M=FP_RANGE_CHECK TSE=F SLTH=T; 913 tr 71 M=FP_RANGE_CHECK TSE=T SLTH=T; 914 tr 71 M=FP_RANGE_CHECK TSE=T SLTH=F; 915 echo " FP_SLICE_KEY_CONTROL"; 916 tr 50 M=FP_SLICE_KEY_CONTROL; 917 #tr 51 M=FP_SLICE_KEY_CONTROL; 918 #tr 52 M=FP_SLICE_KEY_CONTROL; 919 tr 71 M=FP_SLICE_KEY_CONTROL TSE=F SLTH=T; 920 tr 71 M=FP_SLICE_KEY_CONTROL TSE=T SLTH=T; 921 tr 71 M=FP_SLICE_KEY_CONTROL TSE=T SLTH=F; 922 echo " FP_SLICE_MAP"; 923 tr 50 M=FP_SLICE_MAP; 924 #tr 51 M=FP_SLICE_MAP; 925 #tr 52 M=FP_SLICE_MAP; 926 tr 71 M=FP_SLICE_MAP TSE=F SLTH=T; 927 tr 71 M=FP_SLICE_MAP TSE=T SLTH=T; 928 tr 71 M=FP_SLICE_MAP TSE=T SLTH=F; 929 echo " FP_STORM_CONTROL_METERS"; 930 tr 50 M=FP_STORM_CONTROL_METERS; 931 tr 51 M=FP_STORM_CONTROL_METERS; 932 tr 52 M=FP_STORM_CONTROL_METERS; 933 tr 71 M=FP_STORM_CONTROL_METERS TSE=F SLTH=T; 934 tr 71 M=FP_STORM_CONTROL_METERS TSE=T SLTH=T; 935 tr 71 M=FP_STORM_CONTROL_METERS TSE=T SLTH=F; 936 echo " FP_TCAM"; 937 tr 50 M=FP_TCAM; 938 tr 51 M=FP_TCAM; 939 tr 52 M=FP_TCAM; 940 tr 71 M=FP_TCAM TSE=F SLTH=T; 941 tr 71 M=FP_TCAM TSE=T SLTH=T; 942 tr 71 M=FP_TCAM TSE=T SLTH=F; 943 echo " FP_UDF_OFFSET"; 944 tr 50 M=FP_UDF_OFFSET; 945 tr 51 M=FP_UDF_OFFSET; 946 tr 52 M=FP_UDF_OFFSET; 947 tr 71 M=FP_UDF_OFFSET TSE=F SLTH=T; 948 tr 71 M=FP_UDF_OFFSET TSE=T SLTH=T; 949 tr 71 M=FP_UDF_OFFSET TSE=T SLTH=F; 950 echo " FP_UDF_TCAM"; 951 tr 50 M=FP_UDF_TCAM; 952 tr 51 M=FP_UDF_TCAM; 953 tr 52 M=FP_UDF_TCAM; 954 tr 71 M=FP_UDF_TCAM TSE=F SLTH=T; 955 tr 71 M=FP_UDF_TCAM TSE=T SLTH=T; 956 tr 71 M=FP_UDF_TCAM TSE=T SLTH=F; 957 echo " HG_TRUNK_BITMAP"; 958 tr 50 M=HG_TRUNK_BITMAP; 959 #tr 51 M=HG_TRUNK_BITMAP; 960 #tr 52 M=HG_TRUNK_BITMAP; 961 tr 71 M=HG_TRUNK_BITMAP TSE=F SLTH=T; 962 tr 71 M=HG_TRUNK_BITMAP TSE=T SLTH=T; 963 tr 71 M=HG_TRUNK_BITMAP TSE=T SLTH=F; 964 echo " HG_TRUNK_FAILOVER_ENABLE"; 965 tr 50 M=HG_TRUNK_FAILOVER_ENABLE; 966 #tr 51 M=HG_TRUNK_FAILOVER_ENABLE; 967 #tr 52 M=HG_TRUNK_FAILOVER_ENABLE; 968 tr 71 M=HG_TRUNK_FAILOVER_ENABLE TSE=F SLTH=T; 969 tr 71 M=HG_TRUNK_FAILOVER_ENABLE TSE=T SLTH=T; 970 tr 71 M=HG_TRUNK_FAILOVER_ENABLE TSE=T SLTH=F; 971 echo " HG_TRUNK_FAILOVER_SET"; 972 tr 50 M=HG_TRUNK_FAILOVER_SET; 973 tr 51 M=HG_TRUNK_FAILOVER_SET; 974 tr 52 M=HG_TRUNK_FAILOVER_SET; 975 tr 71 M=HG_TRUNK_FAILOVER_SET TSE=F SLTH=T; 976 tr 71 M=HG_TRUNK_FAILOVER_SET TSE=T SLTH=T; 977 tr 71 M=HG_TRUNK_FAILOVER_SET TSE=T SLTH=F; 978 echo " HG_TRUNK_GROUP"; 979 tr 50 M=HG_TRUNK_GROUP; 980 #tr 51 M=HG_TRUNK_GROUP; 981 #tr 52 M=HG_TRUNK_GROUP; 982 tr 71 M=HG_TRUNK_GROUP TSE=F SLTH=T; 983 tr 71 M=HG_TRUNK_GROUP TSE=T SLTH=T; 984 tr 71 M=HG_TRUNK_GROUP TSE=T SLTH=F; 985 echo " HG_TRUNK_MEMBER"; 986 tr 50 M=HG_TRUNK_MEMBER; 987 tr 51 M=HG_TRUNK_MEMBER; 988 tr 52 M=HG_TRUNK_MEMBER; 989 tr 71 M=HG_TRUNK_MEMBER TSE=F SLTH=T; 990 tr 71 M=HG_TRUNK_MEMBER TSE=T SLTH=T; 991 tr 71 M=HG_TRUNK_MEMBER TSE=T SLTH=F; 992 echo " HIGIG_TRUNK_CONTROL"; 993 tr 50 M=HIGIG_TRUNK_CONTROL; 994 #tr 51 M=HIGIG_TRUNK_CONTROL; 995 #tr 52 M=HIGIG_TRUNK_CONTROL; 996 tr 71 M=HIGIG_TRUNK_CONTROL TSE=F SLTH=T; 997 tr 71 M=HIGIG_TRUNK_CONTROL TSE=T SLTH=T; 998 tr 71 M=HIGIG_TRUNK_CONTROL TSE=T SLTH=F; 999 echo " IARB_TDM_TABLE"; 1000 tr 50 M=IARB_TDM_TABLE; 1001 tr 51 M=IARB_TDM_TABLE; 1002 tr 52 M=IARB_TDM_TABLE; 1003 tr 71 M=IARB_TDM_TABLE TSE=F SLTH=T; 1004 tr 71 M=IARB_TDM_TABLE TSE=T SLTH=T; 1005 tr 71 M=IARB_TDM_TABLE TSE=T SLTH=F; 1006 echo " ICONTROL_OPCODE_BITMAP"; 1007 tr 50 M=ICONTROL_OPCODE_BITMAP; 1008 tr 51 M=ICONTROL_OPCODE_BITMAP; 1009 tr 52 M=ICONTROL_OPCODE_BITMAP; 1010 tr 71 M=ICONTROL_OPCODE_BITMAP TSE=F SLTH=T; 1011 tr 71 M=ICONTROL_OPCODE_BITMAP TSE=T SLTH=T; 1012 tr 71 M=ICONTROL_OPCODE_BITMAP TSE=T SLTH=F; 1013 echo " IFP_REDIRECTION_PROFILE"; 1014 tr 50 M=IFP_REDIRECTION_PROFILE; 1015 tr 51 M=IFP_REDIRECTION_PROFILE; 1016 tr 52 M=IFP_REDIRECTION_PROFILE; 1017 tr 71 M=IFP_REDIRECTION_PROFILE TSE=F SLTH=T; 1018 tr 71 M=IFP_REDIRECTION_PROFILE TSE=T SLTH=T; 1019 tr 71 M=IFP_REDIRECTION_PROFILE TSE=T SLTH=F; 1020 echo " IMIRROR_BITMAP"; 1021 tr 50 M=IMIRROR_BITMAP; 1022 tr 51 M=IMIRROR_BITMAP; 1023 tr 52 M=IMIRROR_BITMAP; 1024 tr 71 M=IMIRROR_BITMAP TSE=F SLTH=T; 1025 tr 71 M=IMIRROR_BITMAP TSE=T SLTH=T; 1026 tr 71 M=IMIRROR_BITMAP TSE=T SLTH=F; 1027 echo " IM_MTP_INDEX"; 1028 tr 50 M=IM_MTP_INDEX; 1029 tr 51 M=IM_MTP_INDEX; 1030 tr 52 M=IM_MTP_INDEX; 1031 tr 71 M=IM_MTP_INDEX TSE=F SLTH=T; 1032 tr 71 M=IM_MTP_INDEX TSE=T SLTH=T; 1033 tr 71 M=IM_MTP_INDEX TSE=T SLTH=F; 1034 echo " ING_1588_TS_DISPOSITION_PROFILE_TABLE"; 1035 tr 50 M=ING_1588_TS_DISPOSITION_PROFILE_TABLE; 1036 tr 51 M=ING_1588_TS_DISPOSITION_PROFILE_TABLE; 1037 tr 52 M=ING_1588_TS_DISPOSITION_PROFILE_TABLE; 1038 tr 71 M=ING_1588_TS_DISPOSITION_PROFILE_TABLE TSE=F SLTH=T; 1039 tr 71 M=ING_1588_TS_DISPOSITION_PROFILE_TABLE TSE=T SLTH=T; 1040 tr 71 M=ING_1588_TS_DISPOSITION_PROFILE_TABLE TSE=T SLTH=F; 1041 echo " ING_DVP_TABLE"; 1042 tr 50 M=ING_DVP_TABLE; 1043 tr 51 M=ING_DVP_TABLE; 1044 tr 52 M=ING_DVP_TABLE; 1045 tr 71 M=ING_DVP_TABLE TSE=F SLTH=T; 1046 tr 71 M=ING_DVP_TABLE TSE=T SLTH=T; 1047 tr 71 M=ING_DVP_TABLE TSE=T SLTH=F; 1048 echo " ING_EGRMSKBMAP"; 1049 tr 50 M=ING_EGRMSKBMAP; 1050 tr 51 M=ING_EGRMSKBMAP; 1051 tr 52 M=ING_EGRMSKBMAP; 1052 tr 71 M=ING_EGRMSKBMAP TSE=F SLTH=T; 1053 tr 71 M=ING_EGRMSKBMAP TSE=T SLTH=T; 1054 tr 71 M=ING_EGRMSKBMAP TSE=T SLTH=F; 1055 echo " ING_EN_EFILTER_BITMAP"; 1056 tr 50 M=ING_EN_EFILTER_BITMAP; 1057 #tr 51 M=ING_EN_EFILTER_BITMAP; 1058 #tr 52 M=ING_EN_EFILTER_BITMAP; 1059 tr 71 M=ING_EN_EFILTER_BITMAP TSE=F SLTH=T; 1060 tr 71 M=ING_EN_EFILTER_BITMAP TSE=T SLTH=T; 1061 tr 71 M=ING_EN_EFILTER_BITMAP TSE=T SLTH=F; 1062 echo " ING_FLEX_CTR_COUNTER_TABLE_0"; 1063 tr 50 M=ING_FLEX_CTR_COUNTER_TABLE_0; 1064 tr 51 M=ING_FLEX_CTR_COUNTER_TABLE_0; 1065 tr 52 M=ING_FLEX_CTR_COUNTER_TABLE_0; 1066 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_0 TSE=F SLTH=T; 1067 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_0 TSE=T SLTH=T; 1068 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_0 TSE=T SLTH=F; 1069 echo " ING_FLEX_CTR_COUNTER_TABLE_1"; 1070 tr 50 M=ING_FLEX_CTR_COUNTER_TABLE_1; 1071 tr 51 M=ING_FLEX_CTR_COUNTER_TABLE_1; 1072 tr 52 M=ING_FLEX_CTR_COUNTER_TABLE_1; 1073 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_1 TSE=F SLTH=T; 1074 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_1 TSE=T SLTH=T; 1075 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_1 TSE=T SLTH=F; 1076 echo " ING_FLEX_CTR_COUNTER_TABLE_2"; 1077 tr 50 M=ING_FLEX_CTR_COUNTER_TABLE_2; 1078 tr 51 M=ING_FLEX_CTR_COUNTER_TABLE_2; 1079 tr 52 M=ING_FLEX_CTR_COUNTER_TABLE_2; 1080 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_2 TSE=F SLTH=T; 1081 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_2 TSE=T SLTH=T; 1082 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_2 TSE=T SLTH=F; 1083 echo " ING_FLEX_CTR_COUNTER_TABLE_3"; 1084 tr 50 M=ING_FLEX_CTR_COUNTER_TABLE_3; 1085 tr 51 M=ING_FLEX_CTR_COUNTER_TABLE_3; 1086 tr 52 M=ING_FLEX_CTR_COUNTER_TABLE_3; 1087 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_3 TSE=F SLTH=T; 1088 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_3 TSE=T SLTH=T; 1089 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_3 TSE=T SLTH=F; 1090 echo " ING_FLEX_CTR_COUNTER_TABLE_4"; 1091 tr 50 M=ING_FLEX_CTR_COUNTER_TABLE_4; 1092 tr 51 M=ING_FLEX_CTR_COUNTER_TABLE_4; 1093 tr 52 M=ING_FLEX_CTR_COUNTER_TABLE_4; 1094 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_4 TSE=F SLTH=T; 1095 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_4 TSE=T SLTH=T; 1096 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_4 TSE=T SLTH=F; 1097 echo " ING_FLEX_CTR_COUNTER_TABLE_5"; 1098 tr 50 M=ING_FLEX_CTR_COUNTER_TABLE_5; 1099 tr 51 M=ING_FLEX_CTR_COUNTER_TABLE_5; 1100 tr 52 M=ING_FLEX_CTR_COUNTER_TABLE_5; 1101 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_5 TSE=F SLTH=T; 1102 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_5 TSE=T SLTH=T; 1103 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_5 TSE=T SLTH=F; 1104 echo " ING_FLEX_CTR_COUNTER_TABLE_6"; 1105 tr 50 M=ING_FLEX_CTR_COUNTER_TABLE_6; 1106 tr 51 M=ING_FLEX_CTR_COUNTER_TABLE_6; 1107 tr 52 M=ING_FLEX_CTR_COUNTER_TABLE_6; 1108 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_6 TSE=F SLTH=T; 1109 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_6 TSE=T SLTH=T; 1110 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_6 TSE=T SLTH=F; 1111 echo " ING_FLEX_CTR_COUNTER_TABLE_7"; 1112 tr 50 M=ING_FLEX_CTR_COUNTER_TABLE_7; 1113 tr 51 M=ING_FLEX_CTR_COUNTER_TABLE_7; 1114 tr 52 M=ING_FLEX_CTR_COUNTER_TABLE_7; 1115 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_7 TSE=F SLTH=T; 1116 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_7 TSE=T SLTH=T; 1117 tr 71 M=ING_FLEX_CTR_COUNTER_TABLE_7 TSE=T SLTH=F; 1118 echo " ING_FLEX_CTR_OFFSET_TABLE_0"; 1119 tr 50 M=ING_FLEX_CTR_OFFSET_TABLE_0; 1120 tr 51 M=ING_FLEX_CTR_OFFSET_TABLE_0; 1121 tr 52 M=ING_FLEX_CTR_OFFSET_TABLE_0; 1122 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_0 TSE=F SLTH=T; 1123 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_0 TSE=T SLTH=T; 1124 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_0 TSE=T SLTH=F; 1125 echo " ING_FLEX_CTR_OFFSET_TABLE_1"; 1126 tr 50 M=ING_FLEX_CTR_OFFSET_TABLE_1; 1127 tr 51 M=ING_FLEX_CTR_OFFSET_TABLE_1; 1128 tr 52 M=ING_FLEX_CTR_OFFSET_TABLE_1; 1129 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_1 TSE=F SLTH=T; 1130 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_1 TSE=T SLTH=T; 1131 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_1 TSE=T SLTH=F; 1132 echo " ING_FLEX_CTR_OFFSET_TABLE_2"; 1133 tr 50 M=ING_FLEX_CTR_OFFSET_TABLE_2; 1134 tr 51 M=ING_FLEX_CTR_OFFSET_TABLE_2; 1135 tr 52 M=ING_FLEX_CTR_OFFSET_TABLE_2; 1136 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_2 TSE=F SLTH=T; 1137 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_2 TSE=T SLTH=T; 1138 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_2 TSE=T SLTH=F; 1139 echo " ING_FLEX_CTR_OFFSET_TABLE_3"; 1140 tr 50 M=ING_FLEX_CTR_OFFSET_TABLE_3; 1141 tr 51 M=ING_FLEX_CTR_OFFSET_TABLE_3; 1142 tr 52 M=ING_FLEX_CTR_OFFSET_TABLE_3; 1143 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_3 TSE=F SLTH=T; 1144 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_3 TSE=T SLTH=T; 1145 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_3 TSE=T SLTH=F; 1146 echo " ING_FLEX_CTR_OFFSET_TABLE_4"; 1147 tr 50 M=ING_FLEX_CTR_OFFSET_TABLE_4; 1148 tr 51 M=ING_FLEX_CTR_OFFSET_TABLE_4; 1149 tr 52 M=ING_FLEX_CTR_OFFSET_TABLE_4; 1150 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_4 TSE=F SLTH=T; 1151 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_4 TSE=T SLTH=T; 1152 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_4 TSE=T SLTH=F; 1153 echo " ING_FLEX_CTR_OFFSET_TABLE_5"; 1154 tr 50 M=ING_FLEX_CTR_OFFSET_TABLE_5; 1155 tr 51 M=ING_FLEX_CTR_OFFSET_TABLE_5; 1156 tr 52 M=ING_FLEX_CTR_OFFSET_TABLE_5; 1157 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_5 TSE=F SLTH=T; 1158 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_5 TSE=T SLTH=T; 1159 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_5 TSE=T SLTH=F; 1160 echo " ING_FLEX_CTR_OFFSET_TABLE_6"; 1161 tr 50 M=ING_FLEX_CTR_OFFSET_TABLE_6; 1162 tr 51 M=ING_FLEX_CTR_OFFSET_TABLE_6; 1163 tr 52 M=ING_FLEX_CTR_OFFSET_TABLE_6; 1164 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_6 TSE=F SLTH=T; 1165 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_6 TSE=T SLTH=T; 1166 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_6 TSE=T SLTH=F; 1167 echo " ING_FLEX_CTR_OFFSET_TABLE_7"; 1168 tr 50 M=ING_FLEX_CTR_OFFSET_TABLE_7; 1169 tr 51 M=ING_FLEX_CTR_OFFSET_TABLE_7; 1170 tr 52 M=ING_FLEX_CTR_OFFSET_TABLE_7; 1171 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_7 TSE=F SLTH=T; 1172 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_7 TSE=T SLTH=T; 1173 tr 71 M=ING_FLEX_CTR_OFFSET_TABLE_7 TSE=T SLTH=F; 1174 echo " ING_FLEX_CTR_PKT_PRI_MAP"; 1175 tr 50 M=ING_FLEX_CTR_PKT_PRI_MAP; 1176 tr 51 M=ING_FLEX_CTR_PKT_PRI_MAP; 1177 tr 52 M=ING_FLEX_CTR_PKT_PRI_MAP; 1178 tr 71 M=ING_FLEX_CTR_PKT_PRI_MAP TSE=F SLTH=T; 1179 tr 71 M=ING_FLEX_CTR_PKT_PRI_MAP TSE=T SLTH=T; 1180 tr 71 M=ING_FLEX_CTR_PKT_PRI_MAP TSE=T SLTH=F; 1181 echo " ING_FLEX_CTR_PKT_RES_MAP"; 1182 tr 50 M=ING_FLEX_CTR_PKT_RES_MAP; 1183 tr 51 M=ING_FLEX_CTR_PKT_RES_MAP; 1184 tr 52 M=ING_FLEX_CTR_PKT_RES_MAP; 1185 tr 71 M=ING_FLEX_CTR_PKT_RES_MAP TSE=F SLTH=T; 1186 tr 71 M=ING_FLEX_CTR_PKT_RES_MAP TSE=T SLTH=T; 1187 tr 71 M=ING_FLEX_CTR_PKT_RES_MAP TSE=T SLTH=F; 1188 echo " ING_FLEX_CTR_PORT_MAP"; 1189 tr 50 M=ING_FLEX_CTR_PORT_MAP; 1190 tr 51 M=ING_FLEX_CTR_PORT_MAP; 1191 tr 52 M=ING_FLEX_CTR_PORT_MAP; 1192 tr 71 M=ING_FLEX_CTR_PORT_MAP TSE=F SLTH=T; 1193 tr 71 M=ING_FLEX_CTR_PORT_MAP TSE=T SLTH=T; 1194 tr 71 M=ING_FLEX_CTR_PORT_MAP TSE=T SLTH=F; 1195 echo " ING_FLEX_CTR_PRI_CNG_MAP"; 1196 tr 50 M=ING_FLEX_CTR_PRI_CNG_MAP; 1197 tr 51 M=ING_FLEX_CTR_PRI_CNG_MAP; 1198 tr 52 M=ING_FLEX_CTR_PRI_CNG_MAP; 1199 tr 71 M=ING_FLEX_CTR_PRI_CNG_MAP TSE=F SLTH=T; 1200 tr 71 M=ING_FLEX_CTR_PRI_CNG_MAP TSE=T SLTH=T; 1201 tr 71 M=ING_FLEX_CTR_PRI_CNG_MAP TSE=T SLTH=F; 1202 echo " ING_FLEX_CTR_TOS_MAP"; 1203 tr 50 M=ING_FLEX_CTR_TOS_MAP; 1204 tr 51 M=ING_FLEX_CTR_TOS_MAP; 1205 tr 52 M=ING_FLEX_CTR_TOS_MAP; 1206 tr 71 M=ING_FLEX_CTR_TOS_MAP TSE=F SLTH=T; 1207 tr 71 M=ING_FLEX_CTR_TOS_MAP TSE=T SLTH=T; 1208 tr 71 M=ING_FLEX_CTR_TOS_MAP TSE=T SLTH=F; 1209 echo " ING_HIGIG_TRUNK_OVERRIDE_PROFILE"; 1210 tr 50 M=ING_HIGIG_TRUNK_OVERRIDE_PROFILE; 1211 tr 51 M=ING_HIGIG_TRUNK_OVERRIDE_PROFILE; 1212 tr 52 M=ING_HIGIG_TRUNK_OVERRIDE_PROFILE; 1213 tr 71 M=ING_HIGIG_TRUNK_OVERRIDE_PROFILE TSE=F SLTH=T; 1214 tr 71 M=ING_HIGIG_TRUNK_OVERRIDE_PROFILE TSE=T SLTH=T; 1215 tr 71 M=ING_HIGIG_TRUNK_OVERRIDE_PROFILE TSE=T SLTH=F; 1216 echo " ING_L3_NEXT_HOP"; 1217 tr 50 M=ING_L3_NEXT_HOP; 1218 tr 51 M=ING_L3_NEXT_HOP; 1219 tr 52 M=ING_L3_NEXT_HOP; 1220 tr 71 M=ING_L3_NEXT_HOP TSE=F SLTH=T; 1221 tr 71 M=ING_L3_NEXT_HOP TSE=T SLTH=T; 1222 tr 71 M=ING_L3_NEXT_HOP TSE=T SLTH=F; 1223 echo " ING_MOD_MAP_TABLE"; 1224 tr 50 M=ING_MOD_MAP_TABLE; 1225 tr 51 M=ING_MOD_MAP_TABLE; 1226 tr 52 M=ING_MOD_MAP_TABLE; 1227 tr 71 M=ING_MOD_MAP_TABLE TSE=F SLTH=T; 1228 tr 71 M=ING_MOD_MAP_TABLE TSE=T SLTH=T; 1229 tr 71 M=ING_MOD_MAP_TABLE TSE=T SLTH=F; 1230 echo " ING_MPLS_EXP_MAPPING"; 1231 tr 50 M=ING_MPLS_EXP_MAPPING; 1232 tr 51 M=ING_MPLS_EXP_MAPPING; 1233 tr 52 M=ING_MPLS_EXP_MAPPING; 1234 tr 71 M=ING_MPLS_EXP_MAPPING TSE=F SLTH=T; 1235 tr 71 M=ING_MPLS_EXP_MAPPING TSE=T SLTH=T; 1236 tr 71 M=ING_MPLS_EXP_MAPPING TSE=T SLTH=F; 1237 #echo " ING_PBI_DEBUG_0"; 1238 #tr 50 M=ING_PBI_DEBUG_0; 1239 #tr 51 M=ING_PBI_DEBUG_0; 1240 #tr 52 M=ING_PBI_DEBUG_0; 1241 #tr 71 M=ING_PBI_DEBUG_0 TSE=F SLTH=T; 1242 #tr 71 M=ING_PBI_DEBUG_0 TSE=T SLTH=T; 1243 #tr 71 M=ING_PBI_DEBUG_0 TSE=T SLTH=F; 1244 #echo " ING_PBI_DEBUG_1"; 1245 #tr 50 M=ING_PBI_DEBUG_1; 1246 #tr 51 M=ING_PBI_DEBUG_1; 1247 #tr 52 M=ING_PBI_DEBUG_1; 1248 #tr 71 M=ING_PBI_DEBUG_1 TSE=F SLTH=T; 1249 #tr 71 M=ING_PBI_DEBUG_1 TSE=T SLTH=T; 1250 #tr 71 M=ING_PBI_DEBUG_1 TSE=T SLTH=F; 1251 echo " ING_PRI_CNG_MAP"; 1252 tr 50 M=ING_PRI_CNG_MAP; 1253 tr 51 M=ING_PRI_CNG_MAP; 1254 tr 52 M=ING_PRI_CNG_MAP; 1255 tr 71 M=ING_PRI_CNG_MAP TSE=F SLTH=T; 1256 tr 71 M=ING_PRI_CNG_MAP TSE=T SLTH=T; 1257 tr 71 M=ING_PRI_CNG_MAP TSE=T SLTH=F; 1258 echo " ING_PW_TERM_SEQ_NUM"; 1259 tr 50 M=ING_PW_TERM_SEQ_NUM; 1260 tr 51 M=ING_PW_TERM_SEQ_NUM; 1261 tr 52 M=ING_PW_TERM_SEQ_NUM; 1262 tr 71 M=ING_PW_TERM_SEQ_NUM TSE=F SLTH=T; 1263 tr 71 M=ING_PW_TERM_SEQ_NUM TSE=T SLTH=T; 1264 tr 71 M=ING_PW_TERM_SEQ_NUM TSE=T SLTH=F; 1265 echo " ING_QUEUE_MAP"; 1266 tr 50 M=ING_QUEUE_MAP; 1267 tr 51 M=ING_QUEUE_MAP; 1268 tr 52 M=ING_QUEUE_MAP; 1269 tr 71 M=ING_QUEUE_MAP TSE=F SLTH=T; 1270 tr 71 M=ING_QUEUE_MAP TSE=T SLTH=T; 1271 tr 71 M=ING_QUEUE_MAP TSE=T SLTH=F; 1272 echo " ING_QUEUE_OFFSET_MAPPING_TABLE"; 1273 tr 50 M=ING_QUEUE_OFFSET_MAPPING_TABLE; 1274 tr 51 M=ING_QUEUE_OFFSET_MAPPING_TABLE; 1275 tr 52 M=ING_QUEUE_OFFSET_MAPPING_TABLE; 1276 tr 71 M=ING_QUEUE_OFFSET_MAPPING_TABLE TSE=F SLTH=T; 1277 tr 71 M=ING_QUEUE_OFFSET_MAPPING_TABLE TSE=T SLTH=T; 1278 tr 71 M=ING_QUEUE_OFFSET_MAPPING_TABLE TSE=T SLTH=F; 1279 echo " ING_SERVICE_PRI_MAP"; 1280 tr 50 M=ING_SERVICE_PRI_MAP; 1281 tr 51 M=ING_SERVICE_PRI_MAP; 1282 tr 52 M=ING_SERVICE_PRI_MAP; 1283 tr 71 M=ING_SERVICE_PRI_MAP TSE=F SLTH=T; 1284 tr 71 M=ING_SERVICE_PRI_MAP TSE=T SLTH=T; 1285 tr 71 M=ING_SERVICE_PRI_MAP TSE=T SLTH=F; 1286 echo " ING_SVM_PKT_PRI_MAP"; 1287 tr 50 M=ING_SVM_PKT_PRI_MAP; 1288 tr 51 M=ING_SVM_PKT_PRI_MAP; 1289 tr 52 M=ING_SVM_PKT_PRI_MAP; 1290 tr 71 M=ING_SVM_PKT_PRI_MAP TSE=F SLTH=T; 1291 tr 71 M=ING_SVM_PKT_PRI_MAP TSE=T SLTH=T; 1292 tr 71 M=ING_SVM_PKT_PRI_MAP TSE=T SLTH=F; 1293 echo " ING_SVM_PKT_RES_MAP"; 1294 tr 50 M=ING_SVM_PKT_RES_MAP; 1295 tr 51 M=ING_SVM_PKT_RES_MAP; 1296 tr 52 M=ING_SVM_PKT_RES_MAP; 1297 tr 71 M=ING_SVM_PKT_RES_MAP TSE=F SLTH=T; 1298 tr 71 M=ING_SVM_PKT_RES_MAP TSE=T SLTH=T; 1299 tr 71 M=ING_SVM_PKT_RES_MAP TSE=T SLTH=F; 1300 echo " ING_SVM_PORT_MAP"; 1301 tr 50 M=ING_SVM_PORT_MAP; 1302 tr 51 M=ING_SVM_PORT_MAP; 1303 tr 52 M=ING_SVM_PORT_MAP; 1304 tr 71 M=ING_SVM_PORT_MAP TSE=F SLTH=T; 1305 tr 71 M=ING_SVM_PORT_MAP TSE=T SLTH=T; 1306 tr 71 M=ING_SVM_PORT_MAP TSE=T SLTH=F; 1307 echo " ING_SVM_PRI_CNG_MAP"; 1308 tr 50 M=ING_SVM_PRI_CNG_MAP; 1309 tr 51 M=ING_SVM_PRI_CNG_MAP; 1310 tr 52 M=ING_SVM_PRI_CNG_MAP; 1311 tr 71 M=ING_SVM_PRI_CNG_MAP TSE=F SLTH=T; 1312 tr 71 M=ING_SVM_PRI_CNG_MAP TSE=T SLTH=T; 1313 tr 71 M=ING_SVM_PRI_CNG_MAP TSE=T SLTH=F; 1314 echo " ING_SVM_TOS_MAP"; 1315 tr 50 M=ING_SVM_TOS_MAP; 1316 tr 51 M=ING_SVM_TOS_MAP; 1317 tr 52 M=ING_SVM_TOS_MAP; 1318 tr 71 M=ING_SVM_TOS_MAP TSE=F SLTH=T; 1319 tr 71 M=ING_SVM_TOS_MAP TSE=T SLTH=T; 1320 tr 71 M=ING_SVM_TOS_MAP TSE=T SLTH=F; 1321 echo " ING_UNTAGGED_PHB"; 1322 tr 50 M=ING_UNTAGGED_PHB; 1323 tr 51 M=ING_UNTAGGED_PHB; 1324 tr 52 M=ING_UNTAGGED_PHB; 1325 tr 71 M=ING_UNTAGGED_PHB TSE=F SLTH=T; 1326 tr 71 M=ING_UNTAGGED_PHB TSE=T SLTH=T; 1327 tr 71 M=ING_UNTAGGED_PHB TSE=T SLTH=F; 1328 echo " ING_VLAN_RANGE"; 1329 tr 50 M=ING_VLAN_RANGE; 1330 tr 51 M=ING_VLAN_RANGE; 1331 tr 52 M=ING_VLAN_RANGE; 1332 tr 71 M=ING_VLAN_RANGE TSE=F SLTH=T; 1333 tr 71 M=ING_VLAN_RANGE TSE=T SLTH=T; 1334 tr 71 M=ING_VLAN_RANGE TSE=T SLTH=F; 1335 echo " ING_VLAN_TAG_ACTION_PROFILE"; 1336 tr 50 M=ING_VLAN_TAG_ACTION_PROFILE; 1337 tr 51 M=ING_VLAN_TAG_ACTION_PROFILE; 1338 tr 52 M=ING_VLAN_TAG_ACTION_PROFILE; 1339 tr 71 M=ING_VLAN_TAG_ACTION_PROFILE TSE=F SLTH=T; 1340 tr 71 M=ING_VLAN_TAG_ACTION_PROFILE TSE=T SLTH=T; 1341 tr 71 M=ING_VLAN_TAG_ACTION_PROFILE TSE=T SLTH=F; 1342 echo " INITIAL_ING_L3_NEXT_HOP"; 1343 tr 50 M=INITIAL_ING_L3_NEXT_HOP; 1344 tr 51 M=INITIAL_ING_L3_NEXT_HOP; 1345 tr 52 M=INITIAL_ING_L3_NEXT_HOP; 1346 tr 71 M=INITIAL_ING_L3_NEXT_HOP TSE=F SLTH=T; 1347 tr 71 M=INITIAL_ING_L3_NEXT_HOP TSE=T SLTH=T; 1348 tr 71 M=INITIAL_ING_L3_NEXT_HOP TSE=T SLTH=F; 1349 echo " INITIAL_L3_ECMP"; 1350 tr 50 M=INITIAL_L3_ECMP; 1351 tr 51 M=INITIAL_L3_ECMP; 1352 tr 52 M=INITIAL_L3_ECMP; 1353 tr 71 M=INITIAL_L3_ECMP TSE=F SLTH=T; 1354 tr 71 M=INITIAL_L3_ECMP TSE=T SLTH=T; 1355 tr 71 M=INITIAL_L3_ECMP TSE=T SLTH=F; 1356 echo " INITIAL_L3_ECMP_GROUP"; 1357 tr 50 M=INITIAL_L3_ECMP_GROUP; 1358 tr 51 M=INITIAL_L3_ECMP_GROUP; 1359 tr 52 M=INITIAL_L3_ECMP_GROUP; 1360 tr 71 M=INITIAL_L3_ECMP_GROUP TSE=F SLTH=T; 1361 tr 71 M=INITIAL_L3_ECMP_GROUP TSE=T SLTH=T; 1362 tr 71 M=INITIAL_L3_ECMP_GROUP TSE=T SLTH=F; 1363 echo " INITIAL_PROT_GROUP_TABLE"; 1364 tr 50 M=INITIAL_PROT_GROUP_TABLE; 1365 tr 51 M=INITIAL_PROT_GROUP_TABLE; 1366 tr 52 M=INITIAL_PROT_GROUP_TABLE; 1367 tr 71 M=INITIAL_PROT_GROUP_TABLE TSE=F SLTH=T; 1368 tr 71 M=INITIAL_PROT_GROUP_TABLE TSE=T SLTH=T; 1369 tr 71 M=INITIAL_PROT_GROUP_TABLE TSE=T SLTH=F; 1370 echo " INITIAL_PROT_NHI_TABLE"; 1371 tr 50 M=INITIAL_PROT_NHI_TABLE; 1372 tr 51 M=INITIAL_PROT_NHI_TABLE; 1373 tr 52 M=INITIAL_PROT_NHI_TABLE; 1374 tr 71 M=INITIAL_PROT_NHI_TABLE TSE=F SLTH=T; 1375 tr 71 M=INITIAL_PROT_NHI_TABLE TSE=T SLTH=T; 1376 tr 71 M=INITIAL_PROT_NHI_TABLE TSE=T SLTH=F; 1377 echo " IPV4_IN_IPV6_PREFIX_MATCH_TABLE"; 1378 tr 50 M=IPV4_IN_IPV6_PREFIX_MATCH_TABLE; 1379 tr 51 M=IPV4_IN_IPV6_PREFIX_MATCH_TABLE; 1380 tr 52 M=IPV4_IN_IPV6_PREFIX_MATCH_TABLE; 1381 tr 71 M=IPV4_IN_IPV6_PREFIX_MATCH_TABLE TSE=F SLTH=T; 1382 tr 71 M=IPV4_IN_IPV6_PREFIX_MATCH_TABLE TSE=T SLTH=T; 1383 tr 71 M=IPV4_IN_IPV6_PREFIX_MATCH_TABLE TSE=T SLTH=F; 1384 echo " KNOWN_MCAST_BLOCK_MASK"; 1385 tr 50 M=KNOWN_MCAST_BLOCK_MASK; 1386 tr 51 M=KNOWN_MCAST_BLOCK_MASK; 1387 tr 52 M=KNOWN_MCAST_BLOCK_MASK; 1388 tr 71 M=KNOWN_MCAST_BLOCK_MASK TSE=F SLTH=T; 1389 tr 71 M=KNOWN_MCAST_BLOCK_MASK TSE=T SLTH=T; 1390 tr 71 M=KNOWN_MCAST_BLOCK_MASK TSE=T SLTH=F; 1391 echo " L2MC"; 1392 tr 50 M=L2MC; 1393 tr 51 M=L2MC; 1394 tr 52 M=L2MC; 1395 tr 71 M=L2MC TSE=F SLTH=T; 1396 tr 71 M=L2MC TSE=T SLTH=T; 1397 tr 71 M=L2MC TSE=T SLTH=F; 1398 echo " L2X"; 1399 tr 50 M=L2X; 1400 tr 51 M=L2X; 1401 tr 52 M=L2X; 1402 tr 71 M=L2X TSE=F SLTH=T; 1403 tr 71 M=L2X TSE=T SLTH=T; 1404 tr 71 M=L2X TSE=T SLTH=F; 1405 echo " L2_BULK_MATCH_DATA"; 1406 tr 50 M=L2_BULK_MATCH_DATA; 1407 #tr 51 M=L2_BULK_MATCH_DATA; 1408 #tr 52 M=L2_BULK_MATCH_DATA; 1409 tr 71 M=L2_BULK_MATCH_DATA TSE=F SLTH=T; 1410 tr 71 M=L2_BULK_MATCH_DATA TSE=T SLTH=T; 1411 tr 71 M=L2_BULK_MATCH_DATA TSE=T SLTH=F; 1412 echo " L2_BULK_MATCH_MASK"; 1413 tr 50 M=L2_BULK_MATCH_MASK; 1414 #tr 51 M=L2_BULK_MATCH_MASK; 1415 #tr 52 M=L2_BULK_MATCH_MASK; 1416 tr 71 M=L2_BULK_MATCH_MASK TSE=F SLTH=T; 1417 tr 71 M=L2_BULK_MATCH_MASK TSE=T SLTH=T; 1418 tr 71 M=L2_BULK_MATCH_MASK TSE=T SLTH=F; 1419 echo " L2_BULK_REPLACE_DATA"; 1420 tr 50 M=L2_BULK_REPLACE_DATA; 1421 #tr 51 M=L2_BULK_REPLACE_DATA; 1422 #tr 52 M=L2_BULK_REPLACE_DATA; 1423 tr 71 M=L2_BULK_REPLACE_DATA TSE=F SLTH=T; 1424 tr 71 M=L2_BULK_REPLACE_DATA TSE=T SLTH=T; 1425 tr 71 M=L2_BULK_REPLACE_DATA TSE=T SLTH=F; 1426 echo " L2_BULK_REPLACE_MASK"; 1427 tr 50 M=L2_BULK_REPLACE_MASK; 1428 #tr 51 M=L2_BULK_REPLACE_MASK; 1429 #tr 52 M=L2_BULK_REPLACE_MASK; 1430 tr 71 M=L2_BULK_REPLACE_MASK TSE=F SLTH=T; 1431 tr 71 M=L2_BULK_REPLACE_MASK TSE=T SLTH=T; 1432 tr 71 M=L2_BULK_REPLACE_MASK TSE=T SLTH=F; 1433 echo " L2_ENTRY_ONLY"; 1434 tr 50 M=L2_ENTRY_ONLY; 1435 tr 51 M=L2_ENTRY_ONLY; 1436 tr 52 M=L2_ENTRY_ONLY; 1437 tr 71 M=L2_ENTRY_ONLY TSE=F SLTH=T; 1438 tr 71 M=L2_ENTRY_ONLY TSE=T SLTH=T; 1439 tr 71 M=L2_ENTRY_ONLY TSE=T SLTH=F; 1440 echo " L2_ENTRY_OVERFLOW"; 1441 tr 50 M=L2_ENTRY_OVERFLOW; 1442 #tr 51 M=L2_ENTRY_OVERFLOW; 1443 #tr 52 M=L2_ENTRY_OVERFLOW; 1444 tr 71 M=L2_ENTRY_OVERFLOW TSE=F SLTH=T; 1445 tr 71 M=L2_ENTRY_OVERFLOW TSE=T SLTH=T; 1446 tr 71 M=L2_ENTRY_OVERFLOW TSE=T SLTH=F; 1447 echo " L2_HITDA_ONLY"; 1448 tr 50 M=L2_HITDA_ONLY; 1449 tr 51 M=L2_HITDA_ONLY; 1450 tr 52 M=L2_HITDA_ONLY; 1451 tr 71 M=L2_HITDA_ONLY TSE=F SLTH=T; 1452 tr 71 M=L2_HITDA_ONLY TSE=T SLTH=T; 1453 tr 71 M=L2_HITDA_ONLY TSE=T SLTH=F; 1454 echo " L2_HITSA_ONLY"; 1455 tr 50 M=L2_HITSA_ONLY; 1456 tr 51 M=L2_HITSA_ONLY; 1457 tr 52 M=L2_HITSA_ONLY; 1458 tr 71 M=L2_HITSA_ONLY TSE=F SLTH=T; 1459 tr 71 M=L2_HITSA_ONLY TSE=T SLTH=T; 1460 tr 71 M=L2_HITSA_ONLY TSE=T SLTH=F; 1461 echo " L2_MOD_FIFO"; 1462 tr 50 M=L2_MOD_FIFO; 1463 tr 51 M=L2_MOD_FIFO; 1464 tr 52 M=L2_MOD_FIFO; 1465 tr 71 M=L2_MOD_FIFO TSE=F SLTH=T; 1466 tr 71 M=L2_MOD_FIFO TSE=T SLTH=T; 1467 tr 71 M=L2_MOD_FIFO TSE=T SLTH=F; 1468 echo " L2_USER_ENTRY"; 1469 tr 50 M=L2_USER_ENTRY; 1470 tr 51 M=L2_USER_ENTRY; 1471 tr 52 M=L2_USER_ENTRY; 1472 tr 71 M=L2_USER_ENTRY TSE=F SLTH=T; 1473 tr 71 M=L2_USER_ENTRY TSE=T SLTH=T; 1474 tr 71 M=L2_USER_ENTRY TSE=T SLTH=F; 1475 echo " L2_USER_ENTRY_DATA_ONLY"; 1476 tr 50 M=L2_USER_ENTRY_DATA_ONLY; 1477 tr 51 M=L2_USER_ENTRY_DATA_ONLY; 1478 tr 52 M=L2_USER_ENTRY_DATA_ONLY; 1479 tr 71 M=L2_USER_ENTRY_DATA_ONLY TSE=F SLTH=T; 1480 tr 71 M=L2_USER_ENTRY_DATA_ONLY TSE=T SLTH=T; 1481 tr 71 M=L2_USER_ENTRY_DATA_ONLY TSE=T SLTH=F; 1482 echo " L2_USER_ENTRY_ONLY"; 1483 tr 50 M=L2_USER_ENTRY_ONLY; 1484 tr 51 M=L2_USER_ENTRY_ONLY; 1485 tr 52 M=L2_USER_ENTRY_ONLY; 1486 tr 71 M=L2_USER_ENTRY_ONLY TSE=F SLTH=T; 1487 tr 71 M=L2_USER_ENTRY_ONLY TSE=T SLTH=T; 1488 tr 71 M=L2_USER_ENTRY_ONLY TSE=T SLTH=F; 1489 if !$SKIP_L3_DEFIP_TEST \ 1490 'echo " L3_DEFIP";\ 1491 tr 50 M=L3_DEFIP;\ 1492 tr 51 M=L3_DEFIP;\ 1493 tr 52 M=L3_DEFIP;\ 1494 tr 71 M=L3_DEFIP TSE=F SLTH=T;\ 1495 tr 71 M=L3_DEFIP TSE=T SLTH=T;\ 1496 tr 71 M=L3_DEFIP TSE=T SLTH=F;' 1497 1498 if !$SKIP_L3_DEFIP_128_TEST \ 1499 'echo " L3_DEFIP_128";\ 1500 tr 50 M=L3_DEFIP_128;\ 1501 tr 51 M=L3_DEFIP_128;\ 1502 tr 52 M=L3_DEFIP_128;\ 1503 tr 71 M=L3_DEFIP_128 TSE=F SLTH=T;\ 1504 tr 71 M=L3_DEFIP_128 TSE=T SLTH=T;\ 1505 tr 71 M=L3_DEFIP_128 TSE=T SLTH=F;\ 1506 echo " L3_DEFIP_128_DATA_ONLY";\ 1507 tr 50 M=L3_DEFIP_128_DATA_ONLY;\ 1508 tr 51 M=L3_DEFIP_128_DATA_ONLY;\ 1509 tr 52 M=L3_DEFIP_128_DATA_ONLY;\ 1510 tr 71 M=L3_DEFIP_128_DATA_ONLY TSE=F SLTH=T;\ 1511 tr 71 M=L3_DEFIP_128_DATA_ONLY TSE=T SLTH=T;\ 1512 tr 71 M=L3_DEFIP_128_DATA_ONLY TSE=T SLTH=F;\ 1513 echo " L3_DEFIP_128_HIT_ONLY";\ 1514 tr 50 M=L3_DEFIP_128_HIT_ONLY;\ 1515 tr 51 M=L3_DEFIP_128_HIT_ONLY;\ 1516 tr 52 M=L3_DEFIP_128_HIT_ONLY;\ 1517 tr 71 M=L3_DEFIP_128_HIT_ONLY TSE=F SLTH=T;\ 1518 tr 71 M=L3_DEFIP_128_HIT_ONLY TSE=T SLTH=T;\ 1519 tr 71 M=L3_DEFIP_128_HIT_ONLY TSE=T SLTH=F;\ 1520 echo " L3_DEFIP_128_ONLY";\ 1521 tr 50 M=L3_DEFIP_128_ONLY;\ 1522 tr 51 M=L3_DEFIP_128_ONLY;\ 1523 tr 52 M=L3_DEFIP_128_ONLY;\ 1524 tr 71 M=L3_DEFIP_128_ONLY TSE=F SLTH=T;\ 1525 tr 71 M=L3_DEFIP_128_ONLY TSE=T SLTH=T;\ 1526 tr 71 M=L3_DEFIP_128_ONLY TSE=T SLTH=F;' 1527 1528 if !$SKIP_L3_DEFIP_TEST \ 1529 'echo " L3_DEFIP_DATA_ONLY";\ 1530 tr 50 M=L3_DEFIP_DATA_ONLY;\ 1531 tr 51 M=L3_DEFIP_DATA_ONLY;\ 1532 tr 52 M=L3_DEFIP_DATA_ONLY;\ 1533 tr 71 M=L3_DEFIP_DATA_ONLY TSE=F SLTH=T;\ 1534 tr 71 M=L3_DEFIP_DATA_ONLY TSE=T SLTH=T;\ 1535 tr 71 M=L3_DEFIP_DATA_ONLY TSE=T SLTH=F;\ 1536 echo " L3_DEFIP_HIT_ONLY";\ 1537 tr 50 M=L3_DEFIP_HIT_ONLY;\ 1538 tr 51 M=L3_DEFIP_HIT_ONLY;\ 1539 tr 52 M=L3_DEFIP_HIT_ONLY;\ 1540 tr 71 M=L3_DEFIP_HIT_ONLY TSE=F SLTH=T;\ 1541 tr 71 M=L3_DEFIP_HIT_ONLY TSE=T SLTH=T;\ 1542 tr 71 M=L3_DEFIP_HIT_ONLY TSE=T SLTH=F;\ 1543 echo " L3_DEFIP_ONLY";\ 1544 tr 50 M=L3_DEFIP_ONLY;\ 1545 tr 51 M=L3_DEFIP_ONLY;\ 1546 tr 52 M=L3_DEFIP_ONLY;\ 1547 tr 71 M=L3_DEFIP_ONLY TSE=F SLTH=T;\ 1548 tr 71 M=L3_DEFIP_ONLY TSE=T SLTH=T;\ 1549 tr 71 M=L3_DEFIP_ONLY TSE=T SLTH=F;' 1550 1551 ktsanity_ecc_off.soc 1552 if !$SKIP_L3_DEFIP_128_TEST \ 1553 'echo " L3_DEFIP_PAIR_128";\ 1554 tr 50 M=L3_DEFIP_PAIR_128;\ 1555 tr 51 M=L3_DEFIP_PAIR_128;\ 1556 tr 52 M=L3_DEFIP_PAIR_128;\ 1557 tr 71 M=L3_DEFIP_PAIR_128 TSE=F SLTH=T;\ 1558 tr 71 M=L3_DEFIP_PAIR_128 TSE=T SLTH=T;\ 1559 tr 71 M=L3_DEFIP_PAIR_128 TSE=T SLTH=F;\ 1560 echo " L3_DEFIP_PAIR_128_DATA_ONLY";\ 1561 tr 50 M=L3_DEFIP_PAIR_128_DATA_ONLY;\ 1562 tr 51 M=L3_DEFIP_PAIR_128_DATA_ONLY;\ 1563 tr 52 M=L3_DEFIP_PAIR_128_DATA_ONLY;\ 1564 tr 71 M=L3_DEFIP_PAIR_128_DATA_ONLY TSE=F SLTH=T;\ 1565 tr 71 M=L3_DEFIP_PAIR_128_DATA_ONLY TSE=T SLTH=T;\ 1566 tr 71 M=L3_DEFIP_PAIR_128_DATA_ONLY TSE=T SLTH=F;\ 1567 echo " L3_DEFIP_PAIR_128_HIT_ONLY";\ 1568 tr 50 M=L3_DEFIP_PAIR_128_HIT_ONLY;\ 1569 tr 51 M=L3_DEFIP_PAIR_128_HIT_ONLY;\ 1570 tr 52 M=L3_DEFIP_PAIR_128_HIT_ONLY;\ 1571 tr 71 M=L3_DEFIP_PAIR_128_HIT_ONLY TSE=F SLTH=T;\ 1572 tr 71 M=L3_DEFIP_PAIR_128_HIT_ONLY TSE=T SLTH=T;\ 1573 tr 71 M=L3_DEFIP_PAIR_128_HIT_ONLY TSE=T SLTH=F;\ 1574 echo " L3_DEFIP_PAIR_128_ONLY";\ 1575 tr 50 M=L3_DEFIP_PAIR_128_ONLY;\ 1576 tr 51 M=L3_DEFIP_PAIR_128_ONLY;\ 1577 tr 52 M=L3_DEFIP_PAIR_128_ONLY;\ 1578 tr 71 M=L3_DEFIP_PAIR_128_ONLY TSE=F SLTH=T;\ 1579 tr 71 M=L3_DEFIP_PAIR_128_ONLY TSE=T SLTH=T;\ 1580 tr 71 M=L3_DEFIP_PAIR_128_ONLY TSE=T SLTH=F;' 1581 1582 echo " L3_ECMP"; 1583 tr 50 M=L3_ECMP; 1584 tr 51 M=L3_ECMP; 1585 tr 52 M=L3_ECMP; 1586 tr 71 M=L3_ECMP TSE=F SLTH=T; 1587 tr 71 M=L3_ECMP TSE=T SLTH=T; 1588 tr 71 M=L3_ECMP TSE=T SLTH=F; 1589 echo " L3_ECMP_COUNT"; 1590 tr 50 M=L3_ECMP_COUNT; 1591 tr 51 M=L3_ECMP_COUNT; 1592 tr 52 M=L3_ECMP_COUNT; 1593 tr 71 M=L3_ECMP_COUNT TSE=F SLTH=T; 1594 tr 71 M=L3_ECMP_COUNT TSE=T SLTH=T; 1595 tr 71 M=L3_ECMP_COUNT TSE=T SLTH=F; 1596 echo " L3_ENTRY_HIT_ONLY"; 1597 tr 50 M=L3_ENTRY_HIT_ONLY; 1598 tr 51 M=L3_ENTRY_HIT_ONLY; 1599 tr 52 M=L3_ENTRY_HIT_ONLY; 1600 tr 71 M=L3_ENTRY_HIT_ONLY TSE=F SLTH=T; 1601 tr 71 M=L3_ENTRY_HIT_ONLY TSE=T SLTH=T; 1602 tr 71 M=L3_ENTRY_HIT_ONLY TSE=T SLTH=F; 1603 echo " L3_ENTRY_IPV4_MULTICAST"; 1604 tr 50 M=L3_ENTRY_IPV4_MULTICAST; 1605 tr 51 M=L3_ENTRY_IPV4_MULTICAST; 1606 tr 52 M=L3_ENTRY_IPV4_MULTICAST; 1607 tr 71 M=L3_ENTRY_IPV4_MULTICAST TSE=F SLTH=T; 1608 tr 71 M=L3_ENTRY_IPV4_MULTICAST TSE=T SLTH=T; 1609 tr 71 M=L3_ENTRY_IPV4_MULTICAST TSE=T SLTH=F; 1610 echo " L3_ENTRY_IPV4_UNICAST"; 1611 tr 50 M=L3_ENTRY_IPV4_UNICAST; 1612 tr 51 M=L3_ENTRY_IPV4_UNICAST; 1613 tr 52 M=L3_ENTRY_IPV4_UNICAST; 1614 tr 71 M=L3_ENTRY_IPV4_UNICAST TSE=F SLTH=T; 1615 tr 71 M=L3_ENTRY_IPV4_UNICAST TSE=T SLTH=T; 1616 tr 71 M=L3_ENTRY_IPV4_UNICAST TSE=T SLTH=F; 1617 echo " L3_ENTRY_IPV6_MULTICAST"; 1618 tr 50 M=L3_ENTRY_IPV6_MULTICAST; 1619 tr 51 M=L3_ENTRY_IPV6_MULTICAST; 1620 tr 52 M=L3_ENTRY_IPV6_MULTICAST; 1621 tr 71 M=L3_ENTRY_IPV6_MULTICAST TSE=F SLTH=T; 1622 tr 71 M=L3_ENTRY_IPV6_MULTICAST TSE=T SLTH=T; 1623 tr 71 M=L3_ENTRY_IPV6_MULTICAST TSE=T SLTH=F; 1624 echo " L3_ENTRY_IPV6_UNICAST"; 1625 tr 50 M=L3_ENTRY_IPV6_UNICAST; 1626 tr 51 M=L3_ENTRY_IPV6_UNICAST; 1627 tr 52 M=L3_ENTRY_IPV6_UNICAST; 1628 tr 71 M=L3_ENTRY_IPV6_UNICAST TSE=F SLTH=T; 1629 tr 71 M=L3_ENTRY_IPV6_UNICAST TSE=T SLTH=T; 1630 tr 71 M=L3_ENTRY_IPV6_UNICAST TSE=T SLTH=F; 1631 echo " L3_ENTRY_ONLY"; 1632 tr 50 M=L3_ENTRY_ONLY; 1633 tr 51 M=L3_ENTRY_ONLY; 1634 tr 52 M=L3_ENTRY_ONLY; 1635 tr 71 M=L3_ENTRY_ONLY TSE=F SLTH=T; 1636 tr 71 M=L3_ENTRY_ONLY TSE=T SLTH=T; 1637 tr 71 M=L3_ENTRY_ONLY TSE=T SLTH=F; 1638 echo " L3_IIF"; 1639 tr 50 M=L3_IIF; 1640 tr 51 M=L3_IIF; 1641 tr 52 M=L3_IIF; 1642 tr 71 M=L3_IIF TSE=F SLTH=T; 1643 tr 71 M=L3_IIF TSE=T SLTH=T; 1644 tr 71 M=L3_IIF TSE=T SLTH=F; 1645 echo " L3_IPMC"; 1646 tr 50 M=L3_IPMC; 1647 tr 51 M=L3_IPMC; 1648 tr 52 M=L3_IPMC; 1649 tr 71 M=L3_IPMC TSE=F SLTH=T; 1650 tr 71 M=L3_IPMC TSE=T SLTH=T; 1651 tr 71 M=L3_IPMC TSE=T SLTH=F; 1652 echo " L3_IPMC_1"; 1653 tr 50 M=L3_IPMC_1; 1654 tr 51 M=L3_IPMC_1; 1655 tr 52 M=L3_IPMC_1; 1656 tr 71 M=L3_IPMC_1 TSE=F SLTH=T; 1657 tr 71 M=L3_IPMC_1 TSE=T SLTH=T; 1658 tr 71 M=L3_IPMC_1 TSE=T SLTH=F; 1659 echo " L3_IPMC_REMAP"; 1660 tr 50 M=L3_IPMC_REMAP; 1661 tr 51 M=L3_IPMC_REMAP; 1662 tr 52 M=L3_IPMC_REMAP; 1663 tr 71 M=L3_IPMC_REMAP TSE=F SLTH=T; 1664 tr 71 M=L3_IPMC_REMAP TSE=T SLTH=T; 1665 tr 71 M=L3_IPMC_REMAP TSE=T SLTH=F; 1666 echo " L3_MTU_VALUES"; 1667 tr 50 M=L3_MTU_VALUES; 1668 tr 51 M=L3_MTU_VALUES; 1669 tr 52 M=L3_MTU_VALUES; 1670 tr 71 M=L3_MTU_VALUES TSE=F SLTH=T; 1671 tr 71 M=L3_MTU_VALUES TSE=T SLTH=T; 1672 tr 71 M=L3_MTU_VALUES TSE=T SLTH=F; 1673 echo " L3_TUNNEL"; 1674 tr 50 M=L3_TUNNEL; 1675 tr 51 M=L3_TUNNEL; 1676 tr 52 M=L3_TUNNEL; 1677 tr 71 M=L3_TUNNEL TSE=F SLTH=T; 1678 tr 71 M=L3_TUNNEL TSE=T SLTH=T; 1679 tr 71 M=L3_TUNNEL TSE=T SLTH=F; 1680 #echo " LINK_STATUS"; 1681 #tr 50 M=LINK_STATUS; 1682 #tr 51 M=LINK_STATUS; 1683 #tr 52 M=LINK_STATUS; 1684 #tr 71 M=LINK_STATUS TSE=F SLTH=T; 1685 #tr 71 M=LINK_STATUS TSE=T SLTH=T; 1686 #tr 71 M=LINK_STATUS TSE=T SLTH=F; 1687 echo " LLS_L0_CHILD_STATE1"; 1688 tr 50 M=LLS_L0_CHILD_STATE1; 1689 tr 51 M=LLS_L0_CHILD_STATE1; 1690 tr 52 M=LLS_L0_CHILD_STATE1; 1691 tr 71 M=LLS_L0_CHILD_STATE1 TSE=F SLTH=T; 1692 tr 71 M=LLS_L0_CHILD_STATE1 TSE=T SLTH=T; 1693 tr 71 M=LLS_L0_CHILD_STATE1 TSE=T SLTH=F; 1694 echo " LLS_L0_CHILD_WEIGHT_CFG_CNT"; 1695 tr 50 M=LLS_L0_CHILD_WEIGHT_CFG_CNT; 1696 tr 51 M=LLS_L0_CHILD_WEIGHT_CFG_CNT; 1697 tr 52 M=LLS_L0_CHILD_WEIGHT_CFG_CNT; 1698 tr 71 M=LLS_L0_CHILD_WEIGHT_CFG_CNT TSE=F SLTH=T; 1699 tr 71 M=LLS_L0_CHILD_WEIGHT_CFG_CNT TSE=T SLTH=T; 1700 tr 71 M=LLS_L0_CHILD_WEIGHT_CFG_CNT TSE=T SLTH=F; 1701 echo " LLS_L0_CONFIG"; 1702 tr 50 M=LLS_L0_CONFIG; 1703 tr 51 M=LLS_L0_CONFIG; 1704 tr 52 M=LLS_L0_CONFIG; 1705 tr 71 M=LLS_L0_CONFIG TSE=F SLTH=T; 1706 tr 71 M=LLS_L0_CONFIG TSE=T SLTH=T; 1707 tr 71 M=LLS_L0_CONFIG TSE=T SLTH=F; 1708 echo " LLS_L0_EF_NEXT"; 1709 tr 50 M=LLS_L0_EF_NEXT; 1710 tr 51 M=LLS_L0_EF_NEXT; 1711 tr 52 M=LLS_L0_EF_NEXT; 1712 tr 71 M=LLS_L0_EF_NEXT TSE=F SLTH=T; 1713 tr 71 M=LLS_L0_EF_NEXT TSE=T SLTH=T; 1714 tr 71 M=LLS_L0_EF_NEXT TSE=T SLTH=F; 1715 echo " LLS_L0_ERROR"; 1716 tr 50 M=LLS_L0_ERROR; 1717 tr 51 M=LLS_L0_ERROR; 1718 tr 52 M=LLS_L0_ERROR; 1719 tr 71 M=LLS_L0_ERROR TSE=F SLTH=T; 1720 tr 71 M=LLS_L0_ERROR TSE=T SLTH=T; 1721 tr 71 M=LLS_L0_ERROR TSE=T SLTH=F; 1722 echo " LLS_L0_HEADS_TAILS"; 1723 tr 50 M=LLS_L0_HEADS_TAILS; 1724 tr 51 M=LLS_L0_HEADS_TAILS; 1725 tr 52 M=LLS_L0_HEADS_TAILS; 1726 tr 71 M=LLS_L0_HEADS_TAILS TSE=F SLTH=T; 1727 tr 71 M=LLS_L0_HEADS_TAILS TSE=T SLTH=T; 1728 tr 71 M=LLS_L0_HEADS_TAILS TSE=T SLTH=F; 1729 #echo " LLS_L0_MIN_BUCKET_C"; 1730 #tr 50 M=LLS_L0_MIN_BUCKET_C; 1731 #tr 51 M=LLS_L0_MIN_BUCKET_C; 1732 #tr 52 M=LLS_L0_MIN_BUCKET_C; 1733 #tr 71 M=LLS_L0_MIN_BUCKET_C TSE=F SLTH=T; 1734 #tr 71 M=LLS_L0_MIN_BUCKET_C TSE=T SLTH=T; 1735 #tr 71 M=LLS_L0_MIN_BUCKET_C TSE=T SLTH=F; 1736 echo " LLS_L0_MIN_CONFIG_C"; 1737 tr 50 M=LLS_L0_MIN_CONFIG_C; 1738 tr 51 M=LLS_L0_MIN_CONFIG_C; 1739 tr 52 M=LLS_L0_MIN_CONFIG_C; 1740 tr 71 M=LLS_L0_MIN_CONFIG_C TSE=F SLTH=T; 1741 tr 71 M=LLS_L0_MIN_CONFIG_C TSE=T SLTH=T; 1742 tr 71 M=LLS_L0_MIN_CONFIG_C TSE=T SLTH=F; 1743 echo " LLS_L0_MIN_NEXT"; 1744 tr 50 M=LLS_L0_MIN_NEXT; 1745 tr 51 M=LLS_L0_MIN_NEXT; 1746 tr 52 M=LLS_L0_MIN_NEXT; 1747 tr 71 M=LLS_L0_MIN_NEXT TSE=F SLTH=T; 1748 tr 71 M=LLS_L0_MIN_NEXT TSE=T SLTH=T; 1749 tr 71 M=LLS_L0_MIN_NEXT TSE=T SLTH=F; 1750 echo " LLS_L0_PARENT"; 1751 tr 50 M=LLS_L0_PARENT; 1752 tr 51 M=LLS_L0_PARENT; 1753 tr 52 M=LLS_L0_PARENT; 1754 tr 71 M=LLS_L0_PARENT TSE=F SLTH=T; 1755 tr 71 M=LLS_L0_PARENT TSE=T SLTH=T; 1756 tr 71 M=LLS_L0_PARENT TSE=T SLTH=F; 1757 echo " LLS_L0_PARENT_STATE"; 1758 tr 50 M=LLS_L0_PARENT_STATE; 1759 tr 51 M=LLS_L0_PARENT_STATE; 1760 tr 52 M=LLS_L0_PARENT_STATE; 1761 tr 71 M=LLS_L0_PARENT_STATE TSE=F SLTH=T; 1762 tr 71 M=LLS_L0_PARENT_STATE TSE=T SLTH=T; 1763 tr 71 M=LLS_L0_PARENT_STATE TSE=T SLTH=F; 1764 #echo " LLS_L0_SHAPER_BUCKET_C"; 1765 #tr 50 M=LLS_L0_SHAPER_BUCKET_C; 1766 #tr 51 M=LLS_L0_SHAPER_BUCKET_C; 1767 #tr 52 M=LLS_L0_SHAPER_BUCKET_C; 1768 #tr 71 M=LLS_L0_SHAPER_BUCKET_C TSE=F SLTH=T; 1769 #tr 71 M=LLS_L0_SHAPER_BUCKET_C TSE=T SLTH=T; 1770 #tr 71 M=LLS_L0_SHAPER_BUCKET_C TSE=T SLTH=F; 1771 echo " LLS_L0_SHAPER_CONFIG_C"; 1772 tr 50 M=LLS_L0_SHAPER_CONFIG_C; 1773 tr 51 M=LLS_L0_SHAPER_CONFIG_C; 1774 tr 52 M=LLS_L0_SHAPER_CONFIG_C; 1775 tr 71 M=LLS_L0_SHAPER_CONFIG_C TSE=F SLTH=T; 1776 tr 71 M=LLS_L0_SHAPER_CONFIG_C TSE=T SLTH=T; 1777 tr 71 M=LLS_L0_SHAPER_CONFIG_C TSE=T SLTH=F; 1778 echo " LLS_L0_WERR_MAX_SC"; 1779 tr 50 M=LLS_L0_WERR_MAX_SC; 1780 tr 51 M=LLS_L0_WERR_MAX_SC; 1781 tr 52 M=LLS_L0_WERR_MAX_SC; 1782 tr 71 M=LLS_L0_WERR_MAX_SC TSE=F SLTH=T; 1783 tr 71 M=LLS_L0_WERR_MAX_SC TSE=T SLTH=T; 1784 tr 71 M=LLS_L0_WERR_MAX_SC TSE=T SLTH=F; 1785 echo " LLS_L0_WERR_NEXT"; 1786 tr 50 M=LLS_L0_WERR_NEXT; 1787 tr 51 M=LLS_L0_WERR_NEXT; 1788 tr 52 M=LLS_L0_WERR_NEXT; 1789 tr 71 M=LLS_L0_WERR_NEXT TSE=F SLTH=T; 1790 tr 71 M=LLS_L0_WERR_NEXT TSE=T SLTH=T; 1791 tr 71 M=LLS_L0_WERR_NEXT TSE=T SLTH=F; 1792 echo " LLS_L0_XOFF"; 1793 tr 50 M=LLS_L0_XOFF; 1794 tr 51 M=LLS_L0_XOFF; 1795 tr 52 M=LLS_L0_XOFF; 1796 tr 71 M=LLS_L0_XOFF TSE=F SLTH=T; 1797 tr 71 M=LLS_L0_XOFF TSE=T SLTH=T; 1798 tr 71 M=LLS_L0_XOFF TSE=T SLTH=F; 1799 echo " LLS_L1_CHILD_STATE1"; 1800 tr 50 M=LLS_L1_CHILD_STATE1; 1801 tr 51 M=LLS_L1_CHILD_STATE1; 1802 tr 52 M=LLS_L1_CHILD_STATE1; 1803 tr 71 M=LLS_L1_CHILD_STATE1 TSE=F SLTH=T; 1804 tr 71 M=LLS_L1_CHILD_STATE1 TSE=T SLTH=T; 1805 tr 71 M=LLS_L1_CHILD_STATE1 TSE=T SLTH=F; 1806 echo " LLS_L1_CHILD_WEIGHT_CFG_CNT"; 1807 tr 50 M=LLS_L1_CHILD_WEIGHT_CFG_CNT; 1808 tr 51 M=LLS_L1_CHILD_WEIGHT_CFG_CNT; 1809 tr 52 M=LLS_L1_CHILD_WEIGHT_CFG_CNT; 1810 tr 71 M=LLS_L1_CHILD_WEIGHT_CFG_CNT TSE=F SLTH=T; 1811 tr 71 M=LLS_L1_CHILD_WEIGHT_CFG_CNT TSE=T SLTH=T; 1812 tr 71 M=LLS_L1_CHILD_WEIGHT_CFG_CNT TSE=T SLTH=F; 1813 echo " LLS_L1_CONFIG"; 1814 tr 50 M=LLS_L1_CONFIG; 1815 tr 51 M=LLS_L1_CONFIG; 1816 tr 52 M=LLS_L1_CONFIG; 1817 tr 71 M=LLS_L1_CONFIG TSE=F SLTH=T; 1818 tr 71 M=LLS_L1_CONFIG TSE=T SLTH=T; 1819 tr 71 M=LLS_L1_CONFIG TSE=T SLTH=F; 1820 echo " LLS_L1_EF_NEXT"; 1821 tr 50 M=LLS_L1_EF_NEXT; 1822 tr 51 M=LLS_L1_EF_NEXT; 1823 tr 52 M=LLS_L1_EF_NEXT; 1824 tr 71 M=LLS_L1_EF_NEXT TSE=F SLTH=T; 1825 tr 71 M=LLS_L1_EF_NEXT TSE=T SLTH=T; 1826 tr 71 M=LLS_L1_EF_NEXT TSE=T SLTH=F; 1827 echo " LLS_L1_ERROR"; 1828 tr 50 M=LLS_L1_ERROR; 1829 tr 51 M=LLS_L1_ERROR; 1830 tr 52 M=LLS_L1_ERROR; 1831 tr 71 M=LLS_L1_ERROR TSE=F SLTH=T; 1832 tr 71 M=LLS_L1_ERROR TSE=T SLTH=T; 1833 tr 71 M=LLS_L1_ERROR TSE=T SLTH=F; 1834 echo " LLS_L1_HEADS_TAILS"; 1835 tr 50 M=LLS_L1_HEADS_TAILS; 1836 tr 51 M=LLS_L1_HEADS_TAILS; 1837 tr 52 M=LLS_L1_HEADS_TAILS; 1838 tr 71 M=LLS_L1_HEADS_TAILS TSE=F SLTH=T; 1839 tr 71 M=LLS_L1_HEADS_TAILS TSE=T SLTH=T; 1840 tr 71 M=LLS_L1_HEADS_TAILS TSE=T SLTH=F; 1841 #echo " LLS_L1_MIN_BUCKET_C"; 1842 #tr 50 M=LLS_L1_MIN_BUCKET_C; 1843 #tr 51 M=LLS_L1_MIN_BUCKET_C; 1844 #tr 52 M=LLS_L1_MIN_BUCKET_C; 1845 #tr 71 M=LLS_L1_MIN_BUCKET_C TSE=F SLTH=T; 1846 #tr 71 M=LLS_L1_MIN_BUCKET_C TSE=T SLTH=T; 1847 #tr 71 M=LLS_L1_MIN_BUCKET_C TSE=T SLTH=F; 1848 echo " LLS_L1_MIN_CONFIG_C"; 1849 tr 50 M=LLS_L1_MIN_CONFIG_C; 1850 tr 51 M=LLS_L1_MIN_CONFIG_C; 1851 tr 52 M=LLS_L1_MIN_CONFIG_C; 1852 tr 71 M=LLS_L1_MIN_CONFIG_C TSE=F SLTH=T; 1853 tr 71 M=LLS_L1_MIN_CONFIG_C TSE=T SLTH=T; 1854 tr 71 M=LLS_L1_MIN_CONFIG_C TSE=T SLTH=F; 1855 echo " LLS_L1_MIN_NEXT"; 1856 tr 50 M=LLS_L1_MIN_NEXT; 1857 tr 51 M=LLS_L1_MIN_NEXT; 1858 tr 52 M=LLS_L1_MIN_NEXT; 1859 tr 71 M=LLS_L1_MIN_NEXT TSE=F SLTH=T; 1860 tr 71 M=LLS_L1_MIN_NEXT TSE=T SLTH=T; 1861 tr 71 M=LLS_L1_MIN_NEXT TSE=T SLTH=F; 1862 echo " LLS_L1_PARENT"; 1863 tr 50 M=LLS_L1_PARENT; 1864 tr 51 M=LLS_L1_PARENT; 1865 tr 52 M=LLS_L1_PARENT; 1866 tr 71 M=LLS_L1_PARENT TSE=F SLTH=T; 1867 tr 71 M=LLS_L1_PARENT TSE=T SLTH=T; 1868 tr 71 M=LLS_L1_PARENT TSE=T SLTH=F; 1869 echo " LLS_L1_PARENT_STATE"; 1870 tr 50 M=LLS_L1_PARENT_STATE; 1871 tr 51 M=LLS_L1_PARENT_STATE; 1872 tr 52 M=LLS_L1_PARENT_STATE; 1873 tr 71 M=LLS_L1_PARENT_STATE TSE=F SLTH=T; 1874 tr 71 M=LLS_L1_PARENT_STATE TSE=T SLTH=T; 1875 tr 71 M=LLS_L1_PARENT_STATE TSE=T SLTH=F; 1876 #echo " LLS_L1_SHAPER_BUCKET_C"; 1877 #tr 50 M=LLS_L1_SHAPER_BUCKET_C; 1878 #tr 51 M=LLS_L1_SHAPER_BUCKET_C; 1879 #tr 52 M=LLS_L1_SHAPER_BUCKET_C; 1880 #tr 71 M=LLS_L1_SHAPER_BUCKET_C TSE=F SLTH=T; 1881 #tr 71 M=LLS_L1_SHAPER_BUCKET_C TSE=T SLTH=T; 1882 #tr 71 M=LLS_L1_SHAPER_BUCKET_C TSE=T SLTH=F; 1883 echo " LLS_L1_SHAPER_CONFIG_C"; 1884 tr 50 M=LLS_L1_SHAPER_CONFIG_C; 1885 tr 51 M=LLS_L1_SHAPER_CONFIG_C; 1886 tr 52 M=LLS_L1_SHAPER_CONFIG_C; 1887 tr 71 M=LLS_L1_SHAPER_CONFIG_C TSE=F SLTH=T; 1888 tr 71 M=LLS_L1_SHAPER_CONFIG_C TSE=T SLTH=T; 1889 tr 71 M=LLS_L1_SHAPER_CONFIG_C TSE=T SLTH=F; 1890 echo " LLS_L1_WERR_MAX_SC"; 1891 tr 50 M=LLS_L1_WERR_MAX_SC; 1892 tr 51 M=LLS_L1_WERR_MAX_SC; 1893 tr 52 M=LLS_L1_WERR_MAX_SC; 1894 tr 71 M=LLS_L1_WERR_MAX_SC TSE=F SLTH=T; 1895 tr 71 M=LLS_L1_WERR_MAX_SC TSE=T SLTH=T; 1896 tr 71 M=LLS_L1_WERR_MAX_SC TSE=T SLTH=F; 1897 echo " LLS_L1_WERR_NEXT"; 1898 tr 50 M=LLS_L1_WERR_NEXT; 1899 tr 51 M=LLS_L1_WERR_NEXT; 1900 tr 52 M=LLS_L1_WERR_NEXT; 1901 tr 71 M=LLS_L1_WERR_NEXT TSE=F SLTH=T; 1902 tr 71 M=LLS_L1_WERR_NEXT TSE=T SLTH=T; 1903 tr 71 M=LLS_L1_WERR_NEXT TSE=T SLTH=F; 1904 echo " LLS_L1_XOFF"; 1905 tr 50 M=LLS_L1_XOFF; 1906 tr 51 M=LLS_L1_XOFF; 1907 tr 52 M=LLS_L1_XOFF; 1908 tr 71 M=LLS_L1_XOFF TSE=F SLTH=T; 1909 tr 71 M=LLS_L1_XOFF TSE=T SLTH=T; 1910 tr 71 M=LLS_L1_XOFF TSE=T SLTH=F; 1911 echo " LLS_L2_ACT_MIN"; 1912 tr 50 M=LLS_L2_ACT_MIN; 1913 tr 51 M=LLS_L2_ACT_MIN; 1914 tr 52 M=LLS_L2_ACT_MIN; 1915 tr 71 M=LLS_L2_ACT_MIN TSE=F SLTH=T; 1916 tr 71 M=LLS_L2_ACT_MIN TSE=T SLTH=T; 1917 tr 71 M=LLS_L2_ACT_MIN TSE=T SLTH=F; 1918 echo " LLS_L2_ACT_SHAPER"; 1919 tr 50 M=LLS_L2_ACT_SHAPER; 1920 tr 51 M=LLS_L2_ACT_SHAPER; 1921 tr 52 M=LLS_L2_ACT_SHAPER; 1922 tr 71 M=LLS_L2_ACT_SHAPER TSE=F SLTH=T; 1923 tr 71 M=LLS_L2_ACT_SHAPER TSE=T SLTH=T; 1924 tr 71 M=LLS_L2_ACT_SHAPER TSE=T SLTH=F; 1925 echo " LLS_L2_ACT_XON"; 1926 tr 50 M=LLS_L2_ACT_XON; 1927 tr 51 M=LLS_L2_ACT_XON; 1928 tr 52 M=LLS_L2_ACT_XON; 1929 tr 71 M=LLS_L2_ACT_XON TSE=F SLTH=T; 1930 tr 71 M=LLS_L2_ACT_XON TSE=T SLTH=T; 1931 tr 71 M=LLS_L2_ACT_XON TSE=T SLTH=F; 1932 echo " LLS_L2_CHILD_STATE1"; 1933 tr 50 M=LLS_L2_CHILD_STATE1; 1934 tr 51 M=LLS_L2_CHILD_STATE1; 1935 tr 52 M=LLS_L2_CHILD_STATE1; 1936 tr 71 M=LLS_L2_CHILD_STATE1 TSE=F SLTH=T; 1937 tr 71 M=LLS_L2_CHILD_STATE1 TSE=T SLTH=T; 1938 tr 71 M=LLS_L2_CHILD_STATE1 TSE=T SLTH=F; 1939 echo " LLS_L2_CHILD_WEIGHT_CFG_CNT"; 1940 tr 50 M=LLS_L2_CHILD_WEIGHT_CFG_CNT; 1941 tr 51 M=LLS_L2_CHILD_WEIGHT_CFG_CNT; 1942 tr 52 M=LLS_L2_CHILD_WEIGHT_CFG_CNT; 1943 tr 71 M=LLS_L2_CHILD_WEIGHT_CFG_CNT TSE=F SLTH=T; 1944 tr 71 M=LLS_L2_CHILD_WEIGHT_CFG_CNT TSE=T SLTH=T; 1945 tr 71 M=LLS_L2_CHILD_WEIGHT_CFG_CNT TSE=T SLTH=F; 1946 echo " LLS_L2_EMPTY_STATE"; 1947 tr 50 M=LLS_L2_EMPTY_STATE; 1948 tr 51 M=LLS_L2_EMPTY_STATE; 1949 tr 52 M=LLS_L2_EMPTY_STATE; 1950 tr 71 M=LLS_L2_EMPTY_STATE TSE=F SLTH=T; 1951 tr 71 M=LLS_L2_EMPTY_STATE TSE=T SLTH=T; 1952 tr 71 M=LLS_L2_EMPTY_STATE TSE=T SLTH=F; 1953 echo " LLS_L2_ERROR"; 1954 tr 50 M=LLS_L2_ERROR; 1955 tr 51 M=LLS_L2_ERROR; 1956 tr 52 M=LLS_L2_ERROR; 1957 tr 71 M=LLS_L2_ERROR TSE=F SLTH=T; 1958 tr 71 M=LLS_L2_ERROR TSE=T SLTH=T; 1959 tr 71 M=LLS_L2_ERROR TSE=T SLTH=F; 1960 #echo " LLS_L2_MIN_BUCKET_LOWER_C"; 1961 #tr 50 M=LLS_L2_MIN_BUCKET_LOWER_C; 1962 #tr 51 M=LLS_L2_MIN_BUCKET_LOWER_C; 1963 #tr 52 M=LLS_L2_MIN_BUCKET_LOWER_C; 1964 #tr 71 M=LLS_L2_MIN_BUCKET_LOWER_C TSE=F SLTH=T; 1965 #tr 71 M=LLS_L2_MIN_BUCKET_LOWER_C TSE=T SLTH=T; 1966 #tr 71 M=LLS_L2_MIN_BUCKET_LOWER_C TSE=T SLTH=F; 1967 #echo " LLS_L2_MIN_BUCKET_UPPER_C"; 1968 #tr 50 M=LLS_L2_MIN_BUCKET_UPPER_C; 1969 #tr 51 M=LLS_L2_MIN_BUCKET_UPPER_C; 1970 #tr 52 M=LLS_L2_MIN_BUCKET_UPPER_C; 1971 #tr 71 M=LLS_L2_MIN_BUCKET_UPPER_C TSE=F SLTH=T; 1972 #tr 71 M=LLS_L2_MIN_BUCKET_UPPER_C TSE=T SLTH=T; 1973 #tr 71 M=LLS_L2_MIN_BUCKET_UPPER_C TSE=T SLTH=F; 1974 echo " LLS_L2_MIN_CONFIG_LOWER_C"; 1975 tr 50 M=LLS_L2_MIN_CONFIG_LOWER_C; 1976 tr 51 M=LLS_L2_MIN_CONFIG_LOWER_C; 1977 tr 52 M=LLS_L2_MIN_CONFIG_LOWER_C; 1978 tr 71 M=LLS_L2_MIN_CONFIG_LOWER_C TSE=F SLTH=T; 1979 tr 71 M=LLS_L2_MIN_CONFIG_LOWER_C TSE=T SLTH=T; 1980 tr 71 M=LLS_L2_MIN_CONFIG_LOWER_C TSE=T SLTH=F; 1981 echo " LLS_L2_MIN_CONFIG_UPPER_C"; 1982 tr 50 M=LLS_L2_MIN_CONFIG_UPPER_C; 1983 tr 51 M=LLS_L2_MIN_CONFIG_UPPER_C; 1984 tr 52 M=LLS_L2_MIN_CONFIG_UPPER_C; 1985 tr 71 M=LLS_L2_MIN_CONFIG_UPPER_C TSE=F SLTH=T; 1986 tr 71 M=LLS_L2_MIN_CONFIG_UPPER_C TSE=T SLTH=T; 1987 tr 71 M=LLS_L2_MIN_CONFIG_UPPER_C TSE=T SLTH=F; 1988 echo " LLS_L2_MIN_NEXT"; 1989 tr 50 M=LLS_L2_MIN_NEXT; 1990 tr 51 M=LLS_L2_MIN_NEXT; 1991 tr 52 M=LLS_L2_MIN_NEXT; 1992 tr 71 M=LLS_L2_MIN_NEXT TSE=F SLTH=T; 1993 tr 71 M=LLS_L2_MIN_NEXT TSE=T SLTH=T; 1994 tr 71 M=LLS_L2_MIN_NEXT TSE=T SLTH=F; 1995 echo " LLS_L2_PARENT"; 1996 tr 50 M=LLS_L2_PARENT; 1997 tr 51 M=LLS_L2_PARENT; 1998 tr 52 M=LLS_L2_PARENT; 1999 tr 71 M=LLS_L2_PARENT TSE=F SLTH=T; 2000 tr 71 M=LLS_L2_PARENT TSE=T SLTH=T; 2001 tr 71 M=LLS_L2_PARENT TSE=T SLTH=F; 2002 #echo " LLS_L2_SHAPER_BUCKET_LOWER"; 2003 #tr 50 M=LLS_L2_SHAPER_BUCKET_LOWER; 2004 #tr 51 M=LLS_L2_SHAPER_BUCKET_LOWER; 2005 #tr 52 M=LLS_L2_SHAPER_BUCKET_LOWER; 2006 #tr 71 M=LLS_L2_SHAPER_BUCKET_LOWER TSE=F SLTH=T; 2007 #tr 71 M=LLS_L2_SHAPER_BUCKET_LOWER TSE=T SLTH=T; 2008 #tr 71 M=LLS_L2_SHAPER_BUCKET_LOWER TSE=T SLTH=F; 2009 #echo " LLS_L2_SHAPER_BUCKET_UPPER"; 2010 #tr 50 M=LLS_L2_SHAPER_BUCKET_UPPER; 2011 #tr 51 M=LLS_L2_SHAPER_BUCKET_UPPER; 2012 #tr 52 M=LLS_L2_SHAPER_BUCKET_UPPER; 2013 #tr 71 M=LLS_L2_SHAPER_BUCKET_UPPER TSE=F SLTH=T; 2014 #tr 71 M=LLS_L2_SHAPER_BUCKET_UPPER TSE=T SLTH=T; 2015 #tr 71 M=LLS_L2_SHAPER_BUCKET_UPPER TSE=T SLTH=F; 2016 echo " LLS_L2_SHAPER_CONFIG_LOWER"; 2017 tr 50 M=LLS_L2_SHAPER_CONFIG_LOWER; 2018 tr 51 M=LLS_L2_SHAPER_CONFIG_LOWER; 2019 tr 52 M=LLS_L2_SHAPER_CONFIG_LOWER; 2020 tr 71 M=LLS_L2_SHAPER_CONFIG_LOWER TSE=F SLTH=T; 2021 tr 71 M=LLS_L2_SHAPER_CONFIG_LOWER TSE=T SLTH=T; 2022 tr 71 M=LLS_L2_SHAPER_CONFIG_LOWER TSE=T SLTH=F; 2023 echo " LLS_L2_SHAPER_CONFIG_UPPER"; 2024 tr 50 M=LLS_L2_SHAPER_CONFIG_UPPER; 2025 tr 51 M=LLS_L2_SHAPER_CONFIG_UPPER; 2026 tr 52 M=LLS_L2_SHAPER_CONFIG_UPPER; 2027 tr 71 M=LLS_L2_SHAPER_CONFIG_UPPER TSE=F SLTH=T; 2028 tr 71 M=LLS_L2_SHAPER_CONFIG_UPPER TSE=T SLTH=T; 2029 tr 71 M=LLS_L2_SHAPER_CONFIG_UPPER TSE=T SLTH=F; 2030 echo " LLS_L2_WERR_NEXT"; 2031 tr 50 M=LLS_L2_WERR_NEXT; 2032 tr 51 M=LLS_L2_WERR_NEXT; 2033 tr 52 M=LLS_L2_WERR_NEXT; 2034 tr 71 M=LLS_L2_WERR_NEXT TSE=F SLTH=T; 2035 tr 71 M=LLS_L2_WERR_NEXT TSE=T SLTH=T; 2036 tr 71 M=LLS_L2_WERR_NEXT TSE=T SLTH=F; 2037 echo " LLS_L2_XOFF"; 2038 tr 50 M=LLS_L2_XOFF; 2039 tr 51 M=LLS_L2_XOFF; 2040 tr 52 M=LLS_L2_XOFF; 2041 tr 71 M=LLS_L2_XOFF TSE=F SLTH=T; 2042 tr 71 M=LLS_L2_XOFF TSE=T SLTH=T; 2043 tr 71 M=LLS_L2_XOFF TSE=T SLTH=F; 2044 echo " LLS_PORT_CONFIG"; 2045 tr 50 M=LLS_PORT_CONFIG; 2046 tr 51 M=LLS_PORT_CONFIG; 2047 tr 52 M=LLS_PORT_CONFIG; 2048 tr 71 M=LLS_PORT_CONFIG TSE=F SLTH=T; 2049 tr 71 M=LLS_PORT_CONFIG TSE=T SLTH=T; 2050 tr 71 M=LLS_PORT_CONFIG TSE=T SLTH=F; 2051 echo " LLS_PORT_ERROR"; 2052 tr 50 M=LLS_PORT_ERROR; 2053 tr 51 M=LLS_PORT_ERROR; 2054 tr 52 M=LLS_PORT_ERROR; 2055 tr 71 M=LLS_PORT_ERROR TSE=F SLTH=T; 2056 tr 71 M=LLS_PORT_ERROR TSE=T SLTH=T; 2057 tr 71 M=LLS_PORT_ERROR TSE=T SLTH=F; 2058 echo " LLS_PORT_HEADS"; 2059 tr 50 M=LLS_PORT_HEADS; 2060 tr 51 M=LLS_PORT_HEADS; 2061 tr 52 M=LLS_PORT_HEADS; 2062 tr 71 M=LLS_PORT_HEADS TSE=F SLTH=T; 2063 tr 71 M=LLS_PORT_HEADS TSE=T SLTH=T; 2064 tr 71 M=LLS_PORT_HEADS TSE=T SLTH=F; 2065 echo " LLS_PORT_PARENT_STATE"; 2066 tr 50 M=LLS_PORT_PARENT_STATE; 2067 tr 51 M=LLS_PORT_PARENT_STATE; 2068 tr 52 M=LLS_PORT_PARENT_STATE; 2069 tr 71 M=LLS_PORT_PARENT_STATE TSE=F SLTH=T; 2070 tr 71 M=LLS_PORT_PARENT_STATE TSE=T SLTH=T; 2071 tr 71 M=LLS_PORT_PARENT_STATE TSE=T SLTH=F; 2072 #echo " LLS_PORT_SHAPER_BUCKET_C"; 2073 #tr 50 M=LLS_PORT_SHAPER_BUCKET_C; 2074 #tr 51 M=LLS_PORT_SHAPER_BUCKET_C; 2075 #tr 52 M=LLS_PORT_SHAPER_BUCKET_C; 2076 #tr 71 M=LLS_PORT_SHAPER_BUCKET_C TSE=F SLTH=T; 2077 #tr 71 M=LLS_PORT_SHAPER_BUCKET_C TSE=T SLTH=T; 2078 #tr 71 M=LLS_PORT_SHAPER_BUCKET_C TSE=T SLTH=F; 2079 #echo " LLS_PORT_SHAPER_CONFIG_C"; 2080 #tr 50 M=LLS_PORT_SHAPER_CONFIG_C; 2081 #tr 51 M=LLS_PORT_SHAPER_CONFIG_C; 2082 #tr 52 M=LLS_PORT_SHAPER_CONFIG_C; 2083 #tr 71 M=LLS_PORT_SHAPER_CONFIG_C TSE=F SLTH=T; 2084 #tr 71 M=LLS_PORT_SHAPER_CONFIG_C TSE=T SLTH=T; 2085 #tr 71 M=LLS_PORT_SHAPER_CONFIG_C TSE=T SLTH=F; 2086 echo " LLS_PORT_TAILS"; 2087 tr 50 M=LLS_PORT_TAILS; 2088 tr 51 M=LLS_PORT_TAILS; 2089 tr 52 M=LLS_PORT_TAILS; 2090 tr 71 M=LLS_PORT_TAILS TSE=F SLTH=T; 2091 tr 71 M=LLS_PORT_TAILS TSE=T SLTH=T; 2092 tr 71 M=LLS_PORT_TAILS TSE=T SLTH=F; 2093 #echo " LLS_PORT_TDM"; 2094 #tr 50 M=LLS_PORT_TDM; 2095 #tr 51 M=LLS_PORT_TDM; 2096 #tr 52 M=LLS_PORT_TDM; 2097 #tr 71 M=LLS_PORT_TDM TSE=F SLTH=T; 2098 #tr 71 M=LLS_PORT_TDM TSE=T SLTH=T; 2099 #tr 71 M=LLS_PORT_TDM TSE=T SLTH=F; 2100 #echo " LLS_PORT_WERR_MAX_SC"; 2101 #tr 50 M=LLS_PORT_WERR_MAX_SC; 2102 #tr 51 M=LLS_PORT_WERR_MAX_SC; 2103 #tr 52 M=LLS_PORT_WERR_MAX_SC; 2104 #tr 71 M=LLS_PORT_WERR_MAX_SC TSE=F SLTH=T; 2105 #tr 71 M=LLS_PORT_WERR_MAX_SC TSE=T SLTH=T; 2106 #tr 71 M=LLS_PORT_WERR_MAX_SC TSE=T SLTH=F; 2107 echo " LLS_PORT_XOFF"; 2108 tr 50 M=LLS_PORT_XOFF; 2109 #tr 51 M=LLS_PORT_XOFF; 2110 #tr 52 M=LLS_PORT_XOFF; 2111 tr 71 M=LLS_PORT_XOFF TSE=F SLTH=T; 2112 tr 71 M=LLS_PORT_XOFF TSE=T SLTH=T; 2113 tr 71 M=LLS_PORT_XOFF TSE=T SLTH=F; 2114 echo " LMEP"; 2115 tr 50 M=LMEP; 2116 tr 51 M=LMEP; 2117 tr 52 M=LMEP; 2118 tr 71 M=LMEP TSE=F SLTH=T; 2119 tr 71 M=LMEP TSE=T SLTH=T; 2120 tr 71 M=LMEP TSE=T SLTH=F; 2121 echo " LMEP_1"; 2122 tr 50 M=LMEP_1; 2123 tr 51 M=LMEP_1; 2124 tr 52 M=LMEP_1; 2125 tr 71 M=LMEP_1 TSE=F SLTH=T; 2126 tr 71 M=LMEP_1 TSE=T SLTH=T; 2127 tr 71 M=LMEP_1 TSE=T SLTH=F; 2128 echo " LOCAL_SW_DISABLE_DEFAULT_PBM"; 2129 tr 50 M=LOCAL_SW_DISABLE_DEFAULT_PBM; 2130 tr 51 M=LOCAL_SW_DISABLE_DEFAULT_PBM; 2131 tr 52 M=LOCAL_SW_DISABLE_DEFAULT_PBM; 2132 tr 71 M=LOCAL_SW_DISABLE_DEFAULT_PBM TSE=F SLTH=T; 2133 tr 71 M=LOCAL_SW_DISABLE_DEFAULT_PBM TSE=T SLTH=T; 2134 tr 71 M=LOCAL_SW_DISABLE_DEFAULT_PBM TSE=T SLTH=F; 2135 echo " LOCAL_SW_DISABLE_DEFAULT_PBM_MIRR"; 2136 tr 50 M=LOCAL_SW_DISABLE_DEFAULT_PBM_MIRR; 2137 tr 51 M=LOCAL_SW_DISABLE_DEFAULT_PBM_MIRR; 2138 tr 52 M=LOCAL_SW_DISABLE_DEFAULT_PBM_MIRR; 2139 tr 71 M=LOCAL_SW_DISABLE_DEFAULT_PBM_MIRR TSE=F SLTH=T; 2140 tr 71 M=LOCAL_SW_DISABLE_DEFAULT_PBM_MIRR TSE=T SLTH=T; 2141 tr 71 M=LOCAL_SW_DISABLE_DEFAULT_PBM_MIRR TSE=T SLTH=F; 2142 echo " LPORT_TAB"; 2143 tr 50 M=LPORT_TAB; 2144 tr 51 M=LPORT_TAB; 2145 tr 52 M=LPORT_TAB; 2146 tr 71 M=LPORT_TAB TSE=F SLTH=T; 2147 tr 71 M=LPORT_TAB TSE=T SLTH=T; 2148 tr 71 M=LPORT_TAB TSE=T SLTH=F; 2149 echo " MAC_BLOCK"; 2150 tr 50 M=MAC_BLOCK; 2151 tr 51 M=MAC_BLOCK; 2152 tr 52 M=MAC_BLOCK; 2153 tr 71 M=MAC_BLOCK TSE=F SLTH=T; 2154 tr 71 M=MAC_BLOCK TSE=T SLTH=T; 2155 tr 71 M=MAC_BLOCK TSE=T SLTH=F; 2156 echo " MAID_REDUCTION"; 2157 tr 50 M=MAID_REDUCTION; 2158 tr 51 M=MAID_REDUCTION; 2159 tr 52 M=MAID_REDUCTION; 2160 tr 71 M=MAID_REDUCTION TSE=F SLTH=T; 2161 tr 71 M=MAID_REDUCTION TSE=T SLTH=T; 2162 tr 71 M=MAID_REDUCTION TSE=T SLTH=F; 2163 echo " MA_INDEX"; 2164 tr 50 M=MA_INDEX; 2165 tr 51 M=MA_INDEX; 2166 tr 52 M=MA_INDEX; 2167 tr 71 M=MA_INDEX TSE=F SLTH=T; 2168 tr 71 M=MA_INDEX TSE=T SLTH=T; 2169 tr 71 M=MA_INDEX TSE=T SLTH=F; 2170 #echo " MA_STATE"; 2171 #tr 50 M=MA_STATE; 2172 #tr 51 M=MA_STATE; 2173 #tr 52 M=MA_STATE; 2174 #tr 71 M=MA_STATE TSE=F SLTH=T; 2175 #tr 71 M=MA_STATE TSE=T SLTH=T; 2176 #tr 71 M=MA_STATE TSE=T SLTH=F; 2177 echo " MIRROR_CONTROL"; 2178 tr 50 M=MIRROR_CONTROL; 2179 tr 51 M=MIRROR_CONTROL; 2180 tr 52 M=MIRROR_CONTROL; 2181 tr 71 M=MIRROR_CONTROL TSE=F SLTH=T; 2182 tr 71 M=MIRROR_CONTROL TSE=T SLTH=T; 2183 tr 71 M=MIRROR_CONTROL TSE=T SLTH=F; 2184 echo " MMU_AGING_CTR_EXT"; 2185 tr 50 M=MMU_AGING_CTR_EXT; 2186 tr 51 M=MMU_AGING_CTR_EXT; 2187 tr 52 M=MMU_AGING_CTR_EXT; 2188 tr 71 M=MMU_AGING_CTR_EXT TSE=F SLTH=T; 2189 tr 71 M=MMU_AGING_CTR_EXT TSE=T SLTH=T; 2190 tr 71 M=MMU_AGING_CTR_EXT TSE=T SLTH=F; 2191 echo " MMU_AGING_CTR_INT"; 2192 tr 50 M=MMU_AGING_CTR_INT; 2193 tr 51 M=MMU_AGING_CTR_INT; 2194 tr 52 M=MMU_AGING_CTR_INT; 2195 tr 71 M=MMU_AGING_CTR_INT TSE=F SLTH=T; 2196 tr 71 M=MMU_AGING_CTR_INT TSE=T SLTH=T; 2197 tr 71 M=MMU_AGING_CTR_INT TSE=T SLTH=F; 2198 echo " MMU_AGING_EXP_EXT"; 2199 tr 50 M=MMU_AGING_EXP_EXT; 2200 tr 51 M=MMU_AGING_EXP_EXT; 2201 tr 52 M=MMU_AGING_EXP_EXT; 2202 tr 71 M=MMU_AGING_EXP_EXT TSE=F SLTH=T; 2203 tr 71 M=MMU_AGING_EXP_EXT TSE=T SLTH=T; 2204 tr 71 M=MMU_AGING_EXP_EXT TSE=T SLTH=F; 2205 echo " MMU_AGING_EXP_INT"; 2206 tr 50 M=MMU_AGING_EXP_INT; 2207 tr 51 M=MMU_AGING_EXP_INT; 2208 tr 52 M=MMU_AGING_EXP_INT; 2209 tr 71 M=MMU_AGING_EXP_INT TSE=F SLTH=T; 2210 tr 71 M=MMU_AGING_EXP_INT TSE=T SLTH=T; 2211 tr 71 M=MMU_AGING_EXP_INT TSE=T SLTH=F; 2212 echo " MMU_AGING_LMT_EXT"; 2213 tr 50 M=MMU_AGING_LMT_EXT; 2214 tr 51 M=MMU_AGING_LMT_EXT; 2215 tr 52 M=MMU_AGING_LMT_EXT; 2216 tr 71 M=MMU_AGING_LMT_EXT TSE=F SLTH=T; 2217 tr 71 M=MMU_AGING_LMT_EXT TSE=T SLTH=T; 2218 tr 71 M=MMU_AGING_LMT_EXT TSE=T SLTH=F; 2219 echo " MMU_AGING_LMT_INT"; 2220 tr 50 M=MMU_AGING_LMT_INT; 2221 tr 51 M=MMU_AGING_LMT_INT; 2222 tr 52 M=MMU_AGING_LMT_INT; 2223 tr 71 M=MMU_AGING_LMT_INT TSE=F SLTH=T; 2224 tr 71 M=MMU_AGING_LMT_INT TSE=T SLTH=T; 2225 tr 71 M=MMU_AGING_LMT_INT TSE=T SLTH=F; 2226 if !$?BCM56240 && !$?BCM56240_A0 && !$?BCM56242_A0 \ 2227 'echo " MMU_CBPI_0"; \ 2228 tr 50 M=MMU_CBPI_0; \ 2229 tr 51 M=MMU_CBPI_0; \ 2230 tr 52 M=MMU_CBPI_0; \ 2231 tr 71 M=MMU_CBPI_0 TSE=F SLTH=T; \ 2232 tr 71 M=MMU_CBPI_0 TSE=T SLTH=T; \ 2233 tr 71 M=MMU_CBPI_0 TSE=T SLTH=F; \ 2234 echo " MMU_CBPI_1"; \ 2235 tr 50 M=MMU_CBPI_1; \ 2236 tr 51 M=MMU_CBPI_1; \ 2237 tr 52 M=MMU_CBPI_1; \ 2238 tr 71 M=MMU_CBPI_1 TSE=F SLTH=T; \ 2239 tr 71 M=MMU_CBPI_1 TSE=T SLTH=T; \ 2240 tr 71 M=MMU_CBPI_1 TSE=T SLTH=F; \ 2241 echo " MMU_CBPI_10"; \ 2242 tr 50 M=MMU_CBPI_10; \ 2243 tr 51 M=MMU_CBPI_10; \ 2244 tr 52 M=MMU_CBPI_10; \ 2245 tr 71 M=MMU_CBPI_10 TSE=F SLTH=T; \ 2246 tr 71 M=MMU_CBPI_10 TSE=T SLTH=T; \ 2247 tr 71 M=MMU_CBPI_10 TSE=T SLTH=F; \ 2248 echo " MMU_CBPI_11"; \ 2249 tr 50 M=MMU_CBPI_11; \ 2250 tr 51 M=MMU_CBPI_11; \ 2251 tr 52 M=MMU_CBPI_11; \ 2252 tr 71 M=MMU_CBPI_11 TSE=F SLTH=T; \ 2253 tr 71 M=MMU_CBPI_11 TSE=T SLTH=T; \ 2254 tr 71 M=MMU_CBPI_11 TSE=T SLTH=F; \ 2255 echo " MMU_CBPI_2"; \ 2256 tr 50 M=MMU_CBPI_2; \ 2257 tr 51 M=MMU_CBPI_2; \ 2258 tr 52 M=MMU_CBPI_2; \ 2259 tr 71 M=MMU_CBPI_2 TSE=F SLTH=T; \ 2260 tr 71 M=MMU_CBPI_2 TSE=T SLTH=T; \ 2261 tr 71 M=MMU_CBPI_2 TSE=T SLTH=F; \ 2262 echo " MMU_CBPI_3"; \ 2263 tr 50 M=MMU_CBPI_3; \ 2264 tr 51 M=MMU_CBPI_3; \ 2265 tr 52 M=MMU_CBPI_3; \ 2266 tr 71 M=MMU_CBPI_3 TSE=F SLTH=T; \ 2267 tr 71 M=MMU_CBPI_3 TSE=T SLTH=T; \ 2268 tr 71 M=MMU_CBPI_3 TSE=T SLTH=F; \ 2269 echo " MMU_CBPI_4"; \ 2270 tr 50 M=MMU_CBPI_4; \ 2271 tr 51 M=MMU_CBPI_4; \ 2272 tr 52 M=MMU_CBPI_4; \ 2273 tr 71 M=MMU_CBPI_4 TSE=F SLTH=T; \ 2274 tr 71 M=MMU_CBPI_4 TSE=T SLTH=T; \ 2275 tr 71 M=MMU_CBPI_4 TSE=T SLTH=F; \ 2276 echo " MMU_CBPI_5"; \ 2277 tr 50 M=MMU_CBPI_5; \ 2278 tr 51 M=MMU_CBPI_5; \ 2279 tr 52 M=MMU_CBPI_5; \ 2280 tr 71 M=MMU_CBPI_5 TSE=F SLTH=T; \ 2281 tr 71 M=MMU_CBPI_5 TSE=T SLTH=T; \ 2282 tr 71 M=MMU_CBPI_5 TSE=T SLTH=F; \ 2283 echo " MMU_CBPI_6"; \ 2284 tr 50 M=MMU_CBPI_6; \ 2285 tr 51 M=MMU_CBPI_6; \ 2286 tr 52 M=MMU_CBPI_6; \ 2287 tr 71 M=MMU_CBPI_6 TSE=F SLTH=T; \ 2288 tr 71 M=MMU_CBPI_6 TSE=T SLTH=T; \ 2289 tr 71 M=MMU_CBPI_6 TSE=T SLTH=F; \ 2290 echo " MMU_CBPI_7"; \ 2291 tr 50 M=MMU_CBPI_7; \ 2292 tr 51 M=MMU_CBPI_7; \ 2293 tr 52 M=MMU_CBPI_7; \ 2294 tr 71 M=MMU_CBPI_7 TSE=F SLTH=T; \ 2295 tr 71 M=MMU_CBPI_7 TSE=T SLTH=T; \ 2296 tr 71 M=MMU_CBPI_7 TSE=T SLTH=F; \ 2297 echo " MMU_CBPI_8"; \ 2298 tr 50 M=MMU_CBPI_8; \ 2299 tr 51 M=MMU_CBPI_8; \ 2300 tr 52 M=MMU_CBPI_8; \ 2301 tr 71 M=MMU_CBPI_8 TSE=F SLTH=T; \ 2302 tr 71 M=MMU_CBPI_8 TSE=T SLTH=T; \ 2303 tr 71 M=MMU_CBPI_8 TSE=T SLTH=F; \ 2304 echo " MMU_CBPI_9"; \ 2305 tr 50 M=MMU_CBPI_9; \ 2306 tr 51 M=MMU_CBPI_9; \ 2307 tr 52 M=MMU_CBPI_9; \ 2308 tr 71 M=MMU_CBPI_9 TSE=F SLTH=T; \ 2309 tr 71 M=MMU_CBPI_9 TSE=T SLTH=T; \ 2310 tr 71 M=MMU_CBPI_9 TSE=T SLTH=F;' 2311 $done 2312 if $?BCM56440 && !$?BCM56240 \ 2313 'echo " MMU_CCPE_MEM"; \ 2314 tr 50 M=MMU_CCPE_MEM; \ 2315 tr 51 M=MMU_CCPE_MEM; \ 2316 tr 52 M=MMU_CCPE_MEM; \ 2317 tr 71 M=MMU_CCPE_MEM TSE=F SLTH=T; \ 2318 tr 71 M=MMU_CCPE_MEM TSE=T SLTH=T; \ 2319 tr 71 M=MMU_CCPE_MEM TSE=T SLTH=F;' 2320 $done 2321 echo " MMU_CCPI_MEM"; 2322 tr 50 M=MMU_CCPI_MEM; 2323 tr 51 M=MMU_CCPI_MEM; 2324 tr 52 M=MMU_CCPI_MEM; 2325 tr 71 M=MMU_CCPI_MEM TSE=F SLTH=T; 2326 tr 71 M=MMU_CCPI_MEM TSE=T SLTH=T; 2327 tr 71 M=MMU_CCPI_MEM TSE=T SLTH=F; 2328 if $?BCM56440 && !$?BCM56240 \ 2329 'echo " MMU_CELLLINKE"; \ 2330 tr 50 M=MMU_CELLLINKE; \ 2331 tr 51 M=MMU_CELLLINKE; \ 2332 tr 52 M=MMU_CELLLINKE; \ 2333 tr 71 M=MMU_CELLLINKE TSE=F SLTH=T; \ 2334 tr 71 M=MMU_CELLLINKE TSE=T SLTH=T; \ 2335 tr 71 M=MMU_CELLLINKE TSE=T SLTH=F;' 2336 $done 2337 echo " MMU_CELLLINKI"; 2338 tr 50 M=MMU_CELLLINKI; 2339 tr 51 M=MMU_CELLLINKI; 2340 tr 52 M=MMU_CELLLINKI; 2341 tr 71 M=MMU_CELLLINKI TSE=F SLTH=T; 2342 tr 71 M=MMU_CELLLINKI TSE=T SLTH=T; 2343 tr 71 M=MMU_CELLLINKI TSE=T SLTH=F; 2344 echo " MMU_CFAPE_BITMAP"; 2345 tr 50 M=MMU_CFAPE_BITMAP; 2346 tr 51 M=MMU_CFAPE_BITMAP; 2347 tr 52 M=MMU_CFAPE_BITMAP; 2348 tr 71 M=MMU_CFAPE_BITMAP TSE=F SLTH=T; 2349 tr 71 M=MMU_CFAPE_BITMAP TSE=T SLTH=T; 2350 tr 71 M=MMU_CFAPE_BITMAP TSE=T SLTH=F; 2351 echo " MMU_CFAPE_STACK"; 2352 tr 50 M=MMU_CFAPE_STACK; 2353 tr 51 M=MMU_CFAPE_STACK; 2354 tr 52 M=MMU_CFAPE_STACK; 2355 tr 71 M=MMU_CFAPE_STACK TSE=F SLTH=T; 2356 tr 71 M=MMU_CFAPE_STACK TSE=T SLTH=T; 2357 tr 71 M=MMU_CFAPE_STACK TSE=T SLTH=F; 2358 echo " MMU_CFAPI_BITMAP"; 2359 tr 50 M=MMU_CFAPI_BITMAP; 2360 tr 51 M=MMU_CFAPI_BITMAP; 2361 tr 52 M=MMU_CFAPI_BITMAP; 2362 tr 71 M=MMU_CFAPI_BITMAP TSE=F SLTH=T; 2363 tr 71 M=MMU_CFAPI_BITMAP TSE=T SLTH=T; 2364 tr 71 M=MMU_CFAPI_BITMAP TSE=T SLTH=F; 2365 echo " MMU_CFAPI_STACK"; 2366 tr 50 M=MMU_CFAPI_STACK; 2367 tr 51 M=MMU_CFAPI_STACK; 2368 tr 52 M=MMU_CFAPI_STACK; 2369 tr 71 M=MMU_CFAPI_STACK TSE=F SLTH=T; 2370 tr 71 M=MMU_CFAPI_STACK TSE=T SLTH=T; 2371 tr 71 M=MMU_CFAPI_STACK TSE=T SLTH=F; 2372 echo " MMU_DEQ_AGING_MASK_LOOKUP_TABLE_MEM"; 2373 tr 50 M=MMU_DEQ_AGING_MASK_LOOKUP_TABLE_MEM; 2374 tr 51 M=MMU_DEQ_AGING_MASK_LOOKUP_TABLE_MEM; 2375 tr 52 M=MMU_DEQ_AGING_MASK_LOOKUP_TABLE_MEM; 2376 tr 71 M=MMU_DEQ_AGING_MASK_LOOKUP_TABLE_MEM TSE=F SLTH=T; 2377 tr 71 M=MMU_DEQ_AGING_MASK_LOOKUP_TABLE_MEM TSE=T SLTH=T; 2378 tr 71 M=MMU_DEQ_AGING_MASK_LOOKUP_TABLE_MEM TSE=T SLTH=F; 2379 #echo " MMU_ENQ_CBP_32B_WR_STORE_0"; 2380 #tr 50 M=MMU_ENQ_CBP_32B_WR_STORE_0; 2381 #tr 51 M=MMU_ENQ_CBP_32B_WR_STORE_0; 2382 #tr 52 M=MMU_ENQ_CBP_32B_WR_STORE_0; 2383 #tr 71 M=MMU_ENQ_CBP_32B_WR_STORE_0 TSE=F SLTH=T; 2384 #tr 71 M=MMU_ENQ_CBP_32B_WR_STORE_0 TSE=T SLTH=T; 2385 #tr 71 M=MMU_ENQ_CBP_32B_WR_STORE_0 TSE=T SLTH=F; 2386 #echo " MMU_ENQ_CBP_32B_WR_STORE_1"; 2387 #tr 50 M=MMU_ENQ_CBP_32B_WR_STORE_1; 2388 #tr 51 M=MMU_ENQ_CBP_32B_WR_STORE_1; 2389 #tr 52 M=MMU_ENQ_CBP_32B_WR_STORE_1; 2390 #tr 71 M=MMU_ENQ_CBP_32B_WR_STORE_1 TSE=F SLTH=T; 2391 #tr 71 M=MMU_ENQ_CBP_32B_WR_STORE_1 TSE=T SLTH=T; 2392 #tr 71 M=MMU_ENQ_CBP_32B_WR_STORE_1 TSE=T SLTH=F; 2393 echo " MMU_ENQ_CBP_32B_WR_STORE_2"; 2394 tr 50 M=MMU_ENQ_CBP_32B_WR_STORE_2; 2395 tr 51 M=MMU_ENQ_CBP_32B_WR_STORE_2; 2396 tr 52 M=MMU_ENQ_CBP_32B_WR_STORE_2; 2397 tr 71 M=MMU_ENQ_CBP_32B_WR_STORE_2 TSE=F SLTH=T; 2398 tr 71 M=MMU_ENQ_CBP_32B_WR_STORE_2 TSE=T SLTH=T; 2399 tr 71 M=MMU_ENQ_CBP_32B_WR_STORE_2 TSE=T SLTH=F; 2400 echo " MMU_ENQ_FAP_BITMAP"; 2401 tr 50 M=MMU_ENQ_FAP_BITMAP; 2402 tr 51 M=MMU_ENQ_FAP_BITMAP; 2403 tr 52 M=MMU_ENQ_FAP_BITMAP; 2404 tr 71 M=MMU_ENQ_FAP_BITMAP TSE=F SLTH=T; 2405 tr 71 M=MMU_ENQ_FAP_BITMAP TSE=T SLTH=T; 2406 tr 71 M=MMU_ENQ_FAP_BITMAP TSE=T SLTH=F; 2407 echo " MMU_ENQ_FAP_STACK"; 2408 tr 50 M=MMU_ENQ_FAP_STACK; 2409 tr 51 M=MMU_ENQ_FAP_STACK; 2410 tr 52 M=MMU_ENQ_FAP_STACK; 2411 tr 71 M=MMU_ENQ_FAP_STACK TSE=F SLTH=T; 2412 tr 71 M=MMU_ENQ_FAP_STACK TSE=T SLTH=T; 2413 tr 71 M=MMU_ENQ_FAP_STACK TSE=T SLTH=F; 2414 #echo " MMU_ENQ_RQE_WR_COMPLETE_0"; 2415 #tr 50 M=MMU_ENQ_RQE_WR_COMPLETE_0; 2416 #tr 51 M=MMU_ENQ_RQE_WR_COMPLETE_0; 2417 #tr 52 M=MMU_ENQ_RQE_WR_COMPLETE_0; 2418 #tr 71 M=MMU_ENQ_RQE_WR_COMPLETE_0 TSE=F SLTH=T; 2419 #tr 71 M=MMU_ENQ_RQE_WR_COMPLETE_0 TSE=T SLTH=T; 2420 #tr 71 M=MMU_ENQ_RQE_WR_COMPLETE_0 TSE=T SLTH=F; 2421 #echo " MMU_ENQ_RQE_WR_COMPLETE_1"; 2422 #tr 50 M=MMU_ENQ_RQE_WR_COMPLETE_1; 2423 #tr 51 M=MMU_ENQ_RQE_WR_COMPLETE_1; 2424 #tr 52 M=MMU_ENQ_RQE_WR_COMPLETE_1; 2425 #tr 71 M=MMU_ENQ_RQE_WR_COMPLETE_1 TSE=F SLTH=T; 2426 #tr 71 M=MMU_ENQ_RQE_WR_COMPLETE_1 TSE=T SLTH=T; 2427 #tr 71 M=MMU_ENQ_RQE_WR_COMPLETE_1 TSE=T SLTH=F; 2428 echo " MMU_ENQ_RQE_WR_COMPLETE_2"; 2429 tr 50 M=MMU_ENQ_RQE_WR_COMPLETE_2; 2430 tr 51 M=MMU_ENQ_RQE_WR_COMPLETE_2; 2431 tr 52 M=MMU_ENQ_RQE_WR_COMPLETE_2; 2432 tr 71 M=MMU_ENQ_RQE_WR_COMPLETE_2 TSE=F SLTH=T; 2433 tr 71 M=MMU_ENQ_RQE_WR_COMPLETE_2 TSE=T SLTH=T; 2434 tr 71 M=MMU_ENQ_RQE_WR_COMPLETE_2 TSE=T SLTH=F; 2435 echo " MMU_EXT_MC_GROUP_MAP"; 2436 tr 50 M=MMU_EXT_MC_GROUP_MAP; 2437 tr 51 M=MMU_EXT_MC_GROUP_MAP; 2438 tr 52 M=MMU_EXT_MC_GROUP_MAP; 2439 tr 71 M=MMU_EXT_MC_GROUP_MAP TSE=F SLTH=T; 2440 tr 71 M=MMU_EXT_MC_GROUP_MAP TSE=T SLTH=T; 2441 tr 71 M=MMU_EXT_MC_GROUP_MAP TSE=T SLTH=F; 2442 echo " MMU_EXT_MC_QUEUE_LIST0"; 2443 tr 50 M=MMU_EXT_MC_QUEUE_LIST0; 2444 tr 51 M=MMU_EXT_MC_QUEUE_LIST0; 2445 tr 52 M=MMU_EXT_MC_QUEUE_LIST0; 2446 tr 71 M=MMU_EXT_MC_QUEUE_LIST0 TSE=F SLTH=T; 2447 tr 71 M=MMU_EXT_MC_QUEUE_LIST0 TSE=T SLTH=T; 2448 tr 71 M=MMU_EXT_MC_QUEUE_LIST0 TSE=T SLTH=F; 2449 echo " MMU_EXT_MC_QUEUE_LIST1"; 2450 tr 50 M=MMU_EXT_MC_QUEUE_LIST1; 2451 tr 51 M=MMU_EXT_MC_QUEUE_LIST1; 2452 tr 52 M=MMU_EXT_MC_QUEUE_LIST1; 2453 tr 71 M=MMU_EXT_MC_QUEUE_LIST1 TSE=F SLTH=T; 2454 tr 71 M=MMU_EXT_MC_QUEUE_LIST1 TSE=T SLTH=T; 2455 tr 71 M=MMU_EXT_MC_QUEUE_LIST1 TSE=T SLTH=F; 2456 echo " MMU_EXT_MC_QUEUE_LIST4"; 2457 tr 50 M=MMU_EXT_MC_QUEUE_LIST4; 2458 tr 51 M=MMU_EXT_MC_QUEUE_LIST4; 2459 tr 52 M=MMU_EXT_MC_QUEUE_LIST4; 2460 tr 71 M=MMU_EXT_MC_QUEUE_LIST4 TSE=F SLTH=T; 2461 tr 71 M=MMU_EXT_MC_QUEUE_LIST4 TSE=T SLTH=T; 2462 tr 71 M=MMU_EXT_MC_QUEUE_LIST4 TSE=T SLTH=F; 2463 echo " MMU_INTFI_BASE_TBL"; 2464 tr 50 M=MMU_INTFI_BASE_TBL; 2465 tr 51 M=MMU_INTFI_BASE_TBL; 2466 tr 52 M=MMU_INTFI_BASE_TBL; 2467 tr 71 M=MMU_INTFI_BASE_TBL TSE=F SLTH=T; 2468 tr 71 M=MMU_INTFI_BASE_TBL TSE=T SLTH=T; 2469 tr 71 M=MMU_INTFI_BASE_TBL TSE=T SLTH=F; 2470 #echo " MMU_INTFI_DEBUG_MEM"; 2471 #tr 50 M=MMU_INTFI_DEBUG_MEM; 2472 #tr 51 M=MMU_INTFI_DEBUG_MEM; 2473 #tr 52 M=MMU_INTFI_DEBUG_MEM; 2474 #tr 71 M=MMU_INTFI_DEBUG_MEM TSE=F SLTH=T; 2475 #tr 71 M=MMU_INTFI_DEBUG_MEM TSE=T SLTH=T; 2476 #tr 71 M=MMU_INTFI_DEBUG_MEM TSE=T SLTH=F; 2477 echo " MMU_INTFI_FC_STATE_TBL"; 2478 tr 50 M=MMU_INTFI_FC_STATE_TBL; 2479 tr 51 M=MMU_INTFI_FC_STATE_TBL; 2480 tr 52 M=MMU_INTFI_FC_STATE_TBL; 2481 tr 71 M=MMU_INTFI_FC_STATE_TBL TSE=F SLTH=T; 2482 tr 71 M=MMU_INTFI_FC_STATE_TBL TSE=T SLTH=T; 2483 tr 71 M=MMU_INTFI_FC_STATE_TBL TSE=T SLTH=F; 2484 echo " MMU_INTFI_MAP_TBL"; 2485 tr 50 M=MMU_INTFI_MAP_TBL; 2486 tr 51 M=MMU_INTFI_MAP_TBL; 2487 tr 52 M=MMU_INTFI_MAP_TBL; 2488 tr 71 M=MMU_INTFI_MAP_TBL TSE=F SLTH=T; 2489 tr 71 M=MMU_INTFI_MAP_TBL TSE=T SLTH=T; 2490 tr 71 M=MMU_INTFI_MAP_TBL TSE=T SLTH=F; 2491 echo " MMU_INTFI_XLATE_TBL"; 2492 tr 50 M=MMU_INTFI_XLATE_TBL; 2493 tr 51 M=MMU_INTFI_XLATE_TBL; 2494 tr 52 M=MMU_INTFI_XLATE_TBL; 2495 tr 71 M=MMU_INTFI_XLATE_TBL TSE=F SLTH=T; 2496 tr 71 M=MMU_INTFI_XLATE_TBL TSE=T SLTH=T; 2497 tr 71 M=MMU_INTFI_XLATE_TBL TSE=T SLTH=F; 2498 echo " MMU_IPMC_GROUP_TBL0"; 2499 tr 50 M=MMU_IPMC_GROUP_TBL0; 2500 tr 51 M=MMU_IPMC_GROUP_TBL0; 2501 tr 52 M=MMU_IPMC_GROUP_TBL0; 2502 tr 71 M=MMU_IPMC_GROUP_TBL0 TSE=F SLTH=T; 2503 tr 71 M=MMU_IPMC_GROUP_TBL0 TSE=T SLTH=T; 2504 tr 71 M=MMU_IPMC_GROUP_TBL0 TSE=T SLTH=F; 2505 echo " MMU_IPMC_GROUP_TBL1"; 2506 tr 50 M=MMU_IPMC_GROUP_TBL1; 2507 tr 51 M=MMU_IPMC_GROUP_TBL1; 2508 tr 52 M=MMU_IPMC_GROUP_TBL1; 2509 tr 71 M=MMU_IPMC_GROUP_TBL1 TSE=F SLTH=T; 2510 tr 71 M=MMU_IPMC_GROUP_TBL1 TSE=T SLTH=T; 2511 tr 71 M=MMU_IPMC_GROUP_TBL1 TSE=T SLTH=F; 2512 echo " MMU_IPMC_GROUP_TBL2"; 2513 tr 50 M=MMU_IPMC_GROUP_TBL2; 2514 tr 51 M=MMU_IPMC_GROUP_TBL2; 2515 tr 52 M=MMU_IPMC_GROUP_TBL2; 2516 tr 71 M=MMU_IPMC_GROUP_TBL2 TSE=F SLTH=T; 2517 tr 71 M=MMU_IPMC_GROUP_TBL2 TSE=T SLTH=T; 2518 tr 71 M=MMU_IPMC_GROUP_TBL2 TSE=T SLTH=F; 2519 echo " MMU_IPMC_GROUP_TBL3"; 2520 tr 50 M=MMU_IPMC_GROUP_TBL3; 2521 tr 51 M=MMU_IPMC_GROUP_TBL3; 2522 tr 52 M=MMU_IPMC_GROUP_TBL3; 2523 tr 71 M=MMU_IPMC_GROUP_TBL3 TSE=F SLTH=T; 2524 tr 71 M=MMU_IPMC_GROUP_TBL3 TSE=T SLTH=T; 2525 tr 71 M=MMU_IPMC_GROUP_TBL3 TSE=T SLTH=F; 2526 echo " MMU_IPMC_GROUP_TBL4"; 2527 tr 50 M=MMU_IPMC_GROUP_TBL4; 2528 tr 51 M=MMU_IPMC_GROUP_TBL4; 2529 tr 52 M=MMU_IPMC_GROUP_TBL4; 2530 tr 71 M=MMU_IPMC_GROUP_TBL4 TSE=F SLTH=T; 2531 tr 71 M=MMU_IPMC_GROUP_TBL4 TSE=T SLTH=T; 2532 tr 71 M=MMU_IPMC_GROUP_TBL4 TSE=T SLTH=F; 2533 echo " MMU_IPMC_VLAN_TBL"; 2534 tr 50 M=MMU_IPMC_VLAN_TBL; 2535 tr 51 M=MMU_IPMC_VLAN_TBL; 2536 tr 52 M=MMU_IPMC_VLAN_TBL; 2537 tr 71 M=MMU_IPMC_VLAN_TBL TSE=F SLTH=T; 2538 tr 71 M=MMU_IPMC_VLAN_TBL TSE=T SLTH=T; 2539 tr 71 M=MMU_IPMC_VLAN_TBL TSE=T SLTH=F; 2540 #echo " MMU_ITE_CTRL_0"; 2541 #tr 50 M=MMU_ITE_CTRL_0; 2542 #tr 51 M=MMU_ITE_CTRL_0; 2543 #tr 52 M=MMU_ITE_CTRL_0; 2544 #tr 71 M=MMU_ITE_CTRL_0 TSE=F SLTH=T; 2545 #tr 71 M=MMU_ITE_CTRL_0 TSE=T SLTH=T; 2546 #tr 71 M=MMU_ITE_CTRL_0 TSE=T SLTH=F; 2547 echo " MMU_ITE_CTRL_1"; 2548 tr 50 M=MMU_ITE_CTRL_1; 2549 tr 51 M=MMU_ITE_CTRL_1; 2550 tr 52 M=MMU_ITE_CTRL_1; 2551 tr 71 M=MMU_ITE_CTRL_1 TSE=F SLTH=T; 2552 tr 71 M=MMU_ITE_CTRL_1 TSE=T SLTH=T; 2553 tr 71 M=MMU_ITE_CTRL_1 TSE=T SLTH=F; 2554 echo " MMU_ITE_PACKET_PTR_STORE"; 2555 tr 50 M=MMU_ITE_PACKET_PTR_STORE; 2556 tr 51 M=MMU_ITE_PACKET_PTR_STORE; 2557 tr 52 M=MMU_ITE_PACKET_PTR_STORE; 2558 tr 71 M=MMU_ITE_PACKET_PTR_STORE TSE=F SLTH=T; 2559 tr 71 M=MMU_ITE_PACKET_PTR_STORE TSE=T SLTH=T; 2560 tr 71 M=MMU_ITE_PACKET_PTR_STORE TSE=T SLTH=F; 2561 echo " MMU_ITE_QMGR_FLL"; 2562 tr 50 M=MMU_ITE_QMGR_FLL; 2563 tr 51 M=MMU_ITE_QMGR_FLL; 2564 tr 52 M=MMU_ITE_QMGR_FLL; 2565 tr 71 M=MMU_ITE_QMGR_FLL TSE=F SLTH=T; 2566 tr 71 M=MMU_ITE_QMGR_FLL TSE=T SLTH=T; 2567 tr 71 M=MMU_ITE_QMGR_FLL TSE=T SLTH=F; 2568 echo " MMU_ITE_QMGR_QLL"; 2569 tr 50 M=MMU_ITE_QMGR_QLL; 2570 tr 51 M=MMU_ITE_QMGR_QLL; 2571 tr 52 M=MMU_ITE_QMGR_QLL; 2572 tr 71 M=MMU_ITE_QMGR_QLL TSE=F SLTH=T; 2573 tr 71 M=MMU_ITE_QMGR_QLL TSE=T SLTH=T; 2574 tr 71 M=MMU_ITE_QMGR_QLL TSE=T SLTH=F; 2575 #echo " MMU_ITE_WORK_QUEUE_0"; 2576 #tr 50 M=MMU_ITE_WORK_QUEUE_0; 2577 #tr 51 M=MMU_ITE_WORK_QUEUE_0; 2578 #tr 52 M=MMU_ITE_WORK_QUEUE_0; 2579 #tr 71 M=MMU_ITE_WORK_QUEUE_0 TSE=F SLTH=T; 2580 #tr 71 M=MMU_ITE_WORK_QUEUE_0 TSE=T SLTH=T; 2581 #tr 71 M=MMU_ITE_WORK_QUEUE_0 TSE=T SLTH=F; 2582 #echo " MMU_ITE_WORK_QUEUE_1"; 2583 #tr 50 M=MMU_ITE_WORK_QUEUE_1; 2584 #tr 51 M=MMU_ITE_WORK_QUEUE_1; 2585 #tr 52 M=MMU_ITE_WORK_QUEUE_1; 2586 #tr 71 M=MMU_ITE_WORK_QUEUE_1 TSE=F SLTH=T; 2587 #tr 71 M=MMU_ITE_WORK_QUEUE_1 TSE=T SLTH=T; 2588 #tr 71 M=MMU_ITE_WORK_QUEUE_1 TSE=T SLTH=F; 2589 echo " MMU_ITE_WORK_QUEUE_2"; 2590 tr 50 M=MMU_ITE_WORK_QUEUE_2; 2591 tr 51 M=MMU_ITE_WORK_QUEUE_2; 2592 tr 52 M=MMU_ITE_WORK_QUEUE_2; 2593 tr 71 M=MMU_ITE_WORK_QUEUE_2 TSE=F SLTH=T; 2594 tr 71 M=MMU_ITE_WORK_QUEUE_2 TSE=T SLTH=T; 2595 tr 71 M=MMU_ITE_WORK_QUEUE_2 TSE=T SLTH=F; 2596 echo " MMU_QSTRUCT_QBLOCK_BM_0"; 2597 tr 50 M=MMU_QSTRUCT_QBLOCK_BM_0; 2598 tr 51 M=MMU_QSTRUCT_QBLOCK_BM_0; 2599 tr 52 M=MMU_QSTRUCT_QBLOCK_BM_0; 2600 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_0 TSE=F SLTH=T; 2601 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_0 TSE=T SLTH=T; 2602 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_0 TSE=T SLTH=F; 2603 echo " MMU_QSTRUCT_QBLOCK_BM_1"; 2604 tr 50 M=MMU_QSTRUCT_QBLOCK_BM_1; 2605 tr 51 M=MMU_QSTRUCT_QBLOCK_BM_1; 2606 tr 52 M=MMU_QSTRUCT_QBLOCK_BM_1; 2607 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_1 TSE=F SLTH=T; 2608 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_1 TSE=T SLTH=T; 2609 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_1 TSE=T SLTH=F; 2610 echo " MMU_QSTRUCT_QBLOCK_BM_2"; 2611 tr 50 M=MMU_QSTRUCT_QBLOCK_BM_2; 2612 tr 51 M=MMU_QSTRUCT_QBLOCK_BM_2; 2613 tr 52 M=MMU_QSTRUCT_QBLOCK_BM_2; 2614 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_2 TSE=F SLTH=T; 2615 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_2 TSE=T SLTH=T; 2616 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_2 TSE=T SLTH=F; 2617 echo " MMU_QSTRUCT_QBLOCK_BM_3"; 2618 tr 50 M=MMU_QSTRUCT_QBLOCK_BM_3; 2619 tr 51 M=MMU_QSTRUCT_QBLOCK_BM_3; 2620 tr 52 M=MMU_QSTRUCT_QBLOCK_BM_3; 2621 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_3 TSE=F SLTH=T; 2622 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_3 TSE=T SLTH=T; 2623 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_3 TSE=T SLTH=F; 2624 echo " MMU_QSTRUCT_QBLOCK_BM_FIFO_0"; 2625 tr 50 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_0; 2626 tr 51 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_0; 2627 tr 52 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_0; 2628 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_0 TSE=F SLTH=T; 2629 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_0 TSE=T SLTH=T; 2630 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_0 TSE=T SLTH=F; 2631 echo " MMU_QSTRUCT_QBLOCK_BM_FIFO_1"; 2632 tr 50 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_1; 2633 tr 51 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_1; 2634 tr 52 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_1; 2635 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_1 TSE=F SLTH=T; 2636 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_1 TSE=T SLTH=T; 2637 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_1 TSE=T SLTH=F; 2638 echo " MMU_QSTRUCT_QBLOCK_BM_FIFO_2"; 2639 tr 50 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_2; 2640 tr 51 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_2; 2641 tr 52 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_2; 2642 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_2 TSE=F SLTH=T; 2643 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_2 TSE=T SLTH=T; 2644 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_2 TSE=T SLTH=F; 2645 echo " MMU_QSTRUCT_QBLOCK_BM_FIFO_3"; 2646 tr 50 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_3; 2647 tr 51 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_3; 2648 tr 52 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_3; 2649 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_3 TSE=F SLTH=T; 2650 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_3 TSE=T SLTH=T; 2651 tr 71 M=MMU_QSTRUCT_QBLOCK_BM_FIFO_3 TSE=T SLTH=F; 2652 echo " MMU_QSTRUCT_QBLOCK_NEXT_0"; 2653 tr 50 M=MMU_QSTRUCT_QBLOCK_NEXT_0; 2654 tr 51 M=MMU_QSTRUCT_QBLOCK_NEXT_0; 2655 tr 52 M=MMU_QSTRUCT_QBLOCK_NEXT_0; 2656 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_0 TSE=F SLTH=T; 2657 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_0 TSE=T SLTH=T; 2658 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_0 TSE=T SLTH=F; 2659 echo " MMU_QSTRUCT_QBLOCK_NEXT_1"; 2660 tr 50 M=MMU_QSTRUCT_QBLOCK_NEXT_1; 2661 tr 51 M=MMU_QSTRUCT_QBLOCK_NEXT_1; 2662 tr 52 M=MMU_QSTRUCT_QBLOCK_NEXT_1; 2663 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_1 TSE=F SLTH=T; 2664 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_1 TSE=T SLTH=T; 2665 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_1 TSE=T SLTH=F; 2666 echo " MMU_QSTRUCT_QBLOCK_NEXT_2"; 2667 tr 50 M=MMU_QSTRUCT_QBLOCK_NEXT_2; 2668 tr 51 M=MMU_QSTRUCT_QBLOCK_NEXT_2; 2669 tr 52 M=MMU_QSTRUCT_QBLOCK_NEXT_2; 2670 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_2 TSE=F SLTH=T; 2671 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_2 TSE=T SLTH=T; 2672 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_2 TSE=T SLTH=F; 2673 echo " MMU_QSTRUCT_QBLOCK_NEXT_3"; 2674 tr 50 M=MMU_QSTRUCT_QBLOCK_NEXT_3; 2675 tr 51 M=MMU_QSTRUCT_QBLOCK_NEXT_3; 2676 tr 52 M=MMU_QSTRUCT_QBLOCK_NEXT_3; 2677 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_3 TSE=F SLTH=T; 2678 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_3 TSE=T SLTH=T; 2679 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_3 TSE=T SLTH=F; 2680 echo " MMU_QSTRUCT_QBLOCK_NEXT_4"; 2681 tr 50 M=MMU_QSTRUCT_QBLOCK_NEXT_4; 2682 tr 51 M=MMU_QSTRUCT_QBLOCK_NEXT_4; 2683 tr 52 M=MMU_QSTRUCT_QBLOCK_NEXT_4; 2684 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_4 TSE=F SLTH=T; 2685 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_4 TSE=T SLTH=T; 2686 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_4 TSE=T SLTH=F; 2687 echo " MMU_QSTRUCT_QBLOCK_NEXT_5"; 2688 tr 50 M=MMU_QSTRUCT_QBLOCK_NEXT_5; 2689 tr 51 M=MMU_QSTRUCT_QBLOCK_NEXT_5; 2690 tr 52 M=MMU_QSTRUCT_QBLOCK_NEXT_5; 2691 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_5 TSE=F SLTH=T; 2692 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_5 TSE=T SLTH=T; 2693 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_5 TSE=T SLTH=F; 2694 echo " MMU_QSTRUCT_QBLOCK_NEXT_6"; 2695 tr 50 M=MMU_QSTRUCT_QBLOCK_NEXT_6; 2696 tr 51 M=MMU_QSTRUCT_QBLOCK_NEXT_6; 2697 tr 52 M=MMU_QSTRUCT_QBLOCK_NEXT_6; 2698 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_6 TSE=F SLTH=T; 2699 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_6 TSE=T SLTH=T; 2700 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_6 TSE=T SLTH=F; 2701 echo " MMU_QSTRUCT_QBLOCK_NEXT_7"; 2702 tr 50 M=MMU_QSTRUCT_QBLOCK_NEXT_7; 2703 tr 51 M=MMU_QSTRUCT_QBLOCK_NEXT_7; 2704 tr 52 M=MMU_QSTRUCT_QBLOCK_NEXT_7; 2705 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_7 TSE=F SLTH=T; 2706 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_7 TSE=T SLTH=T; 2707 tr 71 M=MMU_QSTRUCT_QBLOCK_NEXT_7 TSE=T SLTH=F; 2708 if $?BCM56440 && !$?BCM56240 \ 2709 'echo " MMU_QSTRUCT_QENTRY_LOWER_0"; \ 2710 tr 50 M=MMU_QSTRUCT_QENTRY_LOWER_0; \ 2711 tr 51 M=MMU_QSTRUCT_QENTRY_LOWER_0; \ 2712 tr 52 M=MMU_QSTRUCT_QENTRY_LOWER_0; \ 2713 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_0 TSE=F SLTH=T; \ 2714 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_0 TSE=T SLTH=T; \ 2715 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_0 TSE=T SLTH=F; \ 2716 echo " MMU_QSTRUCT_QENTRY_LOWER_1"; \ 2717 tr 50 M=MMU_QSTRUCT_QENTRY_LOWER_1; \ 2718 tr 51 M=MMU_QSTRUCT_QENTRY_LOWER_1; \ 2719 tr 52 M=MMU_QSTRUCT_QENTRY_LOWER_1; \ 2720 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_1 TSE=F SLTH=T; \ 2721 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_1 TSE=T SLTH=T; \ 2722 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_1 TSE=T SLTH=F; \ 2723 echo " MMU_QSTRUCT_QENTRY_LOWER_2"; \ 2724 tr 50 M=MMU_QSTRUCT_QENTRY_LOWER_2; \ 2725 tr 51 M=MMU_QSTRUCT_QENTRY_LOWER_2; \ 2726 tr 52 M=MMU_QSTRUCT_QENTRY_LOWER_2; \ 2727 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_2 TSE=F SLTH=T; \ 2728 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_2 TSE=T SLTH=T; \ 2729 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_2 TSE=T SLTH=F; \ 2730 echo " MMU_QSTRUCT_QENTRY_LOWER_3"; \ 2731 tr 50 M=MMU_QSTRUCT_QENTRY_LOWER_3; \ 2732 tr 51 M=MMU_QSTRUCT_QENTRY_LOWER_3; \ 2733 tr 52 M=MMU_QSTRUCT_QENTRY_LOWER_3; \ 2734 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_3 TSE=F SLTH=T; \ 2735 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_3 TSE=T SLTH=T; \ 2736 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_3 TSE=T SLTH=F; \ 2737 echo " MMU_QSTRUCT_QENTRY_LOWER_4"; \ 2738 tr 50 M=MMU_QSTRUCT_QENTRY_LOWER_4; \ 2739 tr 51 M=MMU_QSTRUCT_QENTRY_LOWER_4; \ 2740 tr 52 M=MMU_QSTRUCT_QENTRY_LOWER_4; \ 2741 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_4 TSE=F SLTH=T; \ 2742 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_4 TSE=T SLTH=T; \ 2743 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_4 TSE=T SLTH=F; \ 2744 echo " MMU_QSTRUCT_QENTRY_LOWER_5"; \ 2745 tr 50 M=MMU_QSTRUCT_QENTRY_LOWER_5; \ 2746 tr 51 M=MMU_QSTRUCT_QENTRY_LOWER_5; \ 2747 tr 52 M=MMU_QSTRUCT_QENTRY_LOWER_5; \ 2748 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_5 TSE=F SLTH=T; \ 2749 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_5 TSE=T SLTH=T; \ 2750 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_5 TSE=T SLTH=F; \ 2751 echo " MMU_QSTRUCT_QENTRY_LOWER_6"; \ 2752 tr 50 M=MMU_QSTRUCT_QENTRY_LOWER_6; \ 2753 tr 51 M=MMU_QSTRUCT_QENTRY_LOWER_6; \ 2754 tr 52 M=MMU_QSTRUCT_QENTRY_LOWER_6; \ 2755 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_6 TSE=F SLTH=T; \ 2756 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_6 TSE=T SLTH=T; \ 2757 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_6 TSE=T SLTH=F; \ 2758 echo " MMU_QSTRUCT_QENTRY_LOWER_7"; \ 2759 tr 50 M=MMU_QSTRUCT_QENTRY_LOWER_7; \ 2760 tr 51 M=MMU_QSTRUCT_QENTRY_LOWER_7; \ 2761 tr 52 M=MMU_QSTRUCT_QENTRY_LOWER_7; \ 2762 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_7 TSE=F SLTH=T; \ 2763 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_7 TSE=T SLTH=T; \ 2764 tr 71 M=MMU_QSTRUCT_QENTRY_LOWER_7 TSE=T SLTH=F;' 2765 $done 2766 echo " MMU_QSTRUCT_QENTRY_UPPER_0"; 2767 tr 50 M=MMU_QSTRUCT_QENTRY_UPPER_0; 2768 tr 51 M=MMU_QSTRUCT_QENTRY_UPPER_0; 2769 tr 52 M=MMU_QSTRUCT_QENTRY_UPPER_0; 2770 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_0 TSE=F SLTH=T; 2771 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_0 TSE=T SLTH=T; 2772 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_0 TSE=T SLTH=F; 2773 echo " MMU_QSTRUCT_QENTRY_UPPER_1"; 2774 tr 50 M=MMU_QSTRUCT_QENTRY_UPPER_1; 2775 tr 51 M=MMU_QSTRUCT_QENTRY_UPPER_1; 2776 tr 52 M=MMU_QSTRUCT_QENTRY_UPPER_1; 2777 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_1 TSE=F SLTH=T; 2778 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_1 TSE=T SLTH=T; 2779 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_1 TSE=T SLTH=F; 2780 echo " MMU_QSTRUCT_QENTRY_UPPER_2"; 2781 tr 50 M=MMU_QSTRUCT_QENTRY_UPPER_2; 2782 tr 51 M=MMU_QSTRUCT_QENTRY_UPPER_2; 2783 tr 52 M=MMU_QSTRUCT_QENTRY_UPPER_2; 2784 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_2 TSE=F SLTH=T; 2785 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_2 TSE=T SLTH=T; 2786 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_2 TSE=T SLTH=F; 2787 echo " MMU_QSTRUCT_QENTRY_UPPER_3"; 2788 tr 50 M=MMU_QSTRUCT_QENTRY_UPPER_3; 2789 tr 51 M=MMU_QSTRUCT_QENTRY_UPPER_3; 2790 tr 52 M=MMU_QSTRUCT_QENTRY_UPPER_3; 2791 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_3 TSE=F SLTH=T; 2792 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_3 TSE=T SLTH=T; 2793 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_3 TSE=T SLTH=F; 2794 echo " MMU_QSTRUCT_QENTRY_UPPER_4"; 2795 tr 50 M=MMU_QSTRUCT_QENTRY_UPPER_4; 2796 tr 51 M=MMU_QSTRUCT_QENTRY_UPPER_4; 2797 tr 52 M=MMU_QSTRUCT_QENTRY_UPPER_4; 2798 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_4 TSE=F SLTH=T; 2799 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_4 TSE=T SLTH=T; 2800 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_4 TSE=T SLTH=F; 2801 echo " MMU_QSTRUCT_QENTRY_UPPER_5"; 2802 tr 50 M=MMU_QSTRUCT_QENTRY_UPPER_5; 2803 tr 51 M=MMU_QSTRUCT_QENTRY_UPPER_5; 2804 tr 52 M=MMU_QSTRUCT_QENTRY_UPPER_5; 2805 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_5 TSE=F SLTH=T; 2806 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_5 TSE=T SLTH=T; 2807 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_5 TSE=T SLTH=F; 2808 echo " MMU_QSTRUCT_QENTRY_UPPER_6"; 2809 tr 50 M=MMU_QSTRUCT_QENTRY_UPPER_6; 2810 tr 51 M=MMU_QSTRUCT_QENTRY_UPPER_6; 2811 tr 52 M=MMU_QSTRUCT_QENTRY_UPPER_6; 2812 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_6 TSE=F SLTH=T; 2813 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_6 TSE=T SLTH=T; 2814 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_6 TSE=T SLTH=F; 2815 echo " MMU_QSTRUCT_QENTRY_UPPER_7"; 2816 tr 50 M=MMU_QSTRUCT_QENTRY_UPPER_7; 2817 tr 51 M=MMU_QSTRUCT_QENTRY_UPPER_7; 2818 tr 52 M=MMU_QSTRUCT_QENTRY_UPPER_7; 2819 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_7 TSE=F SLTH=T; 2820 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_7 TSE=T SLTH=T; 2821 tr 71 M=MMU_QSTRUCT_QENTRY_UPPER_7 TSE=T SLTH=F; 2822 echo " MMU_RQE_QMGR_FLL"; 2823 tr 50 M=MMU_RQE_QMGR_FLL; 2824 tr 51 M=MMU_RQE_QMGR_FLL; 2825 tr 52 M=MMU_RQE_QMGR_FLL; 2826 tr 71 M=MMU_RQE_QMGR_FLL TSE=F SLTH=T; 2827 tr 71 M=MMU_RQE_QMGR_FLL TSE=T SLTH=T; 2828 tr 71 M=MMU_RQE_QMGR_FLL TSE=T SLTH=F; 2829 echo " MMU_RQE_QMGR_QLL"; 2830 tr 50 M=MMU_RQE_QMGR_QLL; 2831 tr 51 M=MMU_RQE_QMGR_QLL; 2832 tr 52 M=MMU_RQE_QMGR_QLL; 2833 tr 71 M=MMU_RQE_QMGR_QLL TSE=F SLTH=T; 2834 tr 71 M=MMU_RQE_QMGR_QLL TSE=T SLTH=T; 2835 tr 71 M=MMU_RQE_QMGR_QLL TSE=T SLTH=F; 2836 echo " MMU_RQE_QUEUE_OP_NODE_MAP"; 2837 tr 50 M=MMU_RQE_QUEUE_OP_NODE_MAP; 2838 tr 51 M=MMU_RQE_QUEUE_OP_NODE_MAP; 2839 tr 52 M=MMU_RQE_QUEUE_OP_NODE_MAP; 2840 tr 71 M=MMU_RQE_QUEUE_OP_NODE_MAP TSE=F SLTH=T; 2841 tr 71 M=MMU_RQE_QUEUE_OP_NODE_MAP TSE=T SLTH=T; 2842 tr 71 M=MMU_RQE_QUEUE_OP_NODE_MAP TSE=T SLTH=F; 2843 echo " MMU_RQE_WORK_QUEUE"; 2844 tr 50 M=MMU_RQE_WORK_QUEUE; 2845 tr 51 M=MMU_RQE_WORK_QUEUE; 2846 tr 52 M=MMU_RQE_WORK_QUEUE; 2847 tr 71 M=MMU_RQE_WORK_QUEUE TSE=F SLTH=T; 2848 tr 71 M=MMU_RQE_WORK_QUEUE TSE=T SLTH=T; 2849 tr 71 M=MMU_RQE_WORK_QUEUE TSE=T SLTH=F; 2850 echo " MMU_THDO_OPNCONFIG_CELL"; 2851 tr 50 M=MMU_THDO_OPNCONFIG_CELL; 2852 tr 51 M=MMU_THDO_OPNCONFIG_CELL; 2853 tr 52 M=MMU_THDO_OPNCONFIG_CELL; 2854 tr 71 M=MMU_THDO_OPNCONFIG_CELL TSE=F SLTH=T; 2855 tr 71 M=MMU_THDO_OPNCONFIG_CELL TSE=T SLTH=T; 2856 tr 71 M=MMU_THDO_OPNCONFIG_CELL TSE=T SLTH=F; 2857 echo " MMU_THDO_OPNCONFIG_QENTRY"; 2858 tr 50 M=MMU_THDO_OPNCONFIG_QENTRY; 2859 tr 51 M=MMU_THDO_OPNCONFIG_QENTRY; 2860 tr 52 M=MMU_THDO_OPNCONFIG_QENTRY; 2861 tr 71 M=MMU_THDO_OPNCONFIG_QENTRY TSE=F SLTH=T; 2862 tr 71 M=MMU_THDO_OPNCONFIG_QENTRY TSE=T SLTH=T; 2863 tr 71 M=MMU_THDO_OPNCONFIG_QENTRY TSE=T SLTH=F; 2864 echo " MMU_THDO_OPNCOUNT_CELL"; 2865 tr 50 M=MMU_THDO_OPNCOUNT_CELL; 2866 tr 51 M=MMU_THDO_OPNCOUNT_CELL; 2867 tr 52 M=MMU_THDO_OPNCOUNT_CELL; 2868 tr 71 M=MMU_THDO_OPNCOUNT_CELL TSE=F SLTH=T; 2869 tr 71 M=MMU_THDO_OPNCOUNT_CELL TSE=T SLTH=T; 2870 tr 71 M=MMU_THDO_OPNCOUNT_CELL TSE=T SLTH=F; 2871 echo " MMU_THDO_OPNOFFSET_CELL"; 2872 tr 50 M=MMU_THDO_OPNOFFSET_CELL; 2873 tr 51 M=MMU_THDO_OPNOFFSET_CELL; 2874 tr 52 M=MMU_THDO_OPNOFFSET_CELL; 2875 tr 71 M=MMU_THDO_OPNOFFSET_CELL TSE=F SLTH=T; 2876 tr 71 M=MMU_THDO_OPNOFFSET_CELL TSE=T SLTH=T; 2877 tr 71 M=MMU_THDO_OPNOFFSET_CELL TSE=T SLTH=F; 2878 echo " MMU_THDO_OPNOFFSET_QENTRY"; 2879 tr 50 M=MMU_THDO_OPNOFFSET_QENTRY; 2880 tr 51 M=MMU_THDO_OPNOFFSET_QENTRY; 2881 tr 52 M=MMU_THDO_OPNOFFSET_QENTRY; 2882 tr 71 M=MMU_THDO_OPNOFFSET_QENTRY TSE=F SLTH=T; 2883 tr 71 M=MMU_THDO_OPNOFFSET_QENTRY TSE=T SLTH=T; 2884 tr 71 M=MMU_THDO_OPNOFFSET_QENTRY TSE=T SLTH=F; 2885 echo " MMU_THDO_OPNSTATUS_CELL"; 2886 tr 50 M=MMU_THDO_OPNSTATUS_CELL; 2887 tr 51 M=MMU_THDO_OPNSTATUS_CELL; 2888 tr 52 M=MMU_THDO_OPNSTATUS_CELL; 2889 tr 71 M=MMU_THDO_OPNSTATUS_CELL TSE=F SLTH=T; 2890 tr 71 M=MMU_THDO_OPNSTATUS_CELL TSE=T SLTH=T; 2891 tr 71 M=MMU_THDO_OPNSTATUS_CELL TSE=T SLTH=F; 2892 echo " MMU_THDO_OPNSTATUS_QENTRY"; 2893 tr 50 M=MMU_THDO_OPNSTATUS_QENTRY; 2894 tr 51 M=MMU_THDO_OPNSTATUS_QENTRY; 2895 tr 52 M=MMU_THDO_OPNSTATUS_QENTRY; 2896 tr 71 M=MMU_THDO_OPNSTATUS_QENTRY TSE=F SLTH=T; 2897 tr 71 M=MMU_THDO_OPNSTATUS_QENTRY TSE=T SLTH=T; 2898 tr 71 M=MMU_THDO_OPNSTATUS_QENTRY TSE=T SLTH=F; 2899 echo " MMU_THDO_QCONFIG_CELL"; 2900 tr 50 M=MMU_THDO_QCONFIG_CELL; 2901 tr 51 M=MMU_THDO_QCONFIG_CELL; 2902 tr 52 M=MMU_THDO_QCONFIG_CELL; 2903 tr 71 M=MMU_THDO_QCONFIG_CELL TSE=F SLTH=T; 2904 tr 71 M=MMU_THDO_QCONFIG_CELL TSE=T SLTH=T; 2905 tr 71 M=MMU_THDO_QCONFIG_CELL TSE=T SLTH=F; 2906 echo " MMU_THDO_QCONFIG_QENTRY"; 2907 tr 50 M=MMU_THDO_QCONFIG_QENTRY; 2908 tr 51 M=MMU_THDO_QCONFIG_QENTRY; 2909 tr 52 M=MMU_THDO_QCONFIG_QENTRY; 2910 tr 71 M=MMU_THDO_QCONFIG_QENTRY TSE=F SLTH=T; 2911 tr 71 M=MMU_THDO_QCONFIG_QENTRY TSE=T SLTH=T; 2912 tr 71 M=MMU_THDO_QCONFIG_QENTRY TSE=T SLTH=F; 2913 echo " MMU_THDO_QCOUNT_CELL_0"; 2914 tr 50 M=MMU_THDO_QCOUNT_CELL_0; 2915 tr 51 M=MMU_THDO_QCOUNT_CELL_0; 2916 tr 52 M=MMU_THDO_QCOUNT_CELL_0; 2917 tr 71 M=MMU_THDO_QCOUNT_CELL_0 TSE=F SLTH=T; 2918 tr 71 M=MMU_THDO_QCOUNT_CELL_0 TSE=T SLTH=T; 2919 tr 71 M=MMU_THDO_QCOUNT_CELL_0 TSE=T SLTH=F; 2920 echo " MMU_THDO_QOFFSET_CELL"; 2921 tr 50 M=MMU_THDO_QOFFSET_CELL; 2922 tr 51 M=MMU_THDO_QOFFSET_CELL; 2923 tr 52 M=MMU_THDO_QOFFSET_CELL; 2924 tr 71 M=MMU_THDO_QOFFSET_CELL TSE=F SLTH=T; 2925 tr 71 M=MMU_THDO_QOFFSET_CELL TSE=T SLTH=T; 2926 tr 71 M=MMU_THDO_QOFFSET_CELL TSE=T SLTH=F; 2927 echo " MMU_THDO_QOFFSET_QENTRY"; 2928 tr 50 M=MMU_THDO_QOFFSET_QENTRY; 2929 tr 51 M=MMU_THDO_QOFFSET_QENTRY; 2930 tr 52 M=MMU_THDO_QOFFSET_QENTRY; 2931 tr 71 M=MMU_THDO_QOFFSET_QENTRY TSE=F SLTH=T; 2932 tr 71 M=MMU_THDO_QOFFSET_QENTRY TSE=T SLTH=T; 2933 tr 71 M=MMU_THDO_QOFFSET_QENTRY TSE=T SLTH=F; 2934 echo " MMU_THDO_QRESET_VALUE_CELL_0"; 2935 tr 50 M=MMU_THDO_QRESET_VALUE_CELL_0; 2936 tr 51 M=MMU_THDO_QRESET_VALUE_CELL_0; 2937 tr 52 M=MMU_THDO_QRESET_VALUE_CELL_0; 2938 tr 71 M=MMU_THDO_QRESET_VALUE_CELL_0 TSE=F SLTH=T; 2939 tr 71 M=MMU_THDO_QRESET_VALUE_CELL_0 TSE=T SLTH=T; 2940 tr 71 M=MMU_THDO_QRESET_VALUE_CELL_0 TSE=T SLTH=F; 2941 echo " MMU_THDO_QRESET_VALUE_QENTRY_0"; 2942 tr 50 M=MMU_THDO_QRESET_VALUE_QENTRY_0; 2943 tr 51 M=MMU_THDO_QRESET_VALUE_QENTRY_0; 2944 tr 52 M=MMU_THDO_QRESET_VALUE_QENTRY_0; 2945 tr 71 M=MMU_THDO_QRESET_VALUE_QENTRY_0 TSE=F SLTH=T; 2946 tr 71 M=MMU_THDO_QRESET_VALUE_QENTRY_0 TSE=T SLTH=T; 2947 tr 71 M=MMU_THDO_QRESET_VALUE_QENTRY_0 TSE=T SLTH=F; 2948 echo " MMU_THDO_QSTATUS_CELL_0"; 2949 tr 50 M=MMU_THDO_QSTATUS_CELL_0; 2950 tr 51 M=MMU_THDO_QSTATUS_CELL_0; 2951 tr 52 M=MMU_THDO_QSTATUS_CELL_0; 2952 tr 71 M=MMU_THDO_QSTATUS_CELL_0 TSE=F SLTH=T; 2953 tr 71 M=MMU_THDO_QSTATUS_CELL_0 TSE=T SLTH=T; 2954 tr 71 M=MMU_THDO_QSTATUS_CELL_0 TSE=T SLTH=F; 2955 echo " MMU_THDO_QSTATUS_QENTRY_0"; 2956 tr 50 M=MMU_THDO_QSTATUS_QENTRY_0; 2957 tr 51 M=MMU_THDO_QSTATUS_QENTRY_0; 2958 tr 52 M=MMU_THDO_QSTATUS_QENTRY_0; 2959 tr 71 M=MMU_THDO_QSTATUS_QENTRY_0 TSE=F SLTH=T; 2960 tr 71 M=MMU_THDO_QSTATUS_QENTRY_0 TSE=T SLTH=T; 2961 tr 71 M=MMU_THDO_QSTATUS_QENTRY_0 TSE=T SLTH=F; 2962 echo " MMU_TOQ_STATE_MEM0"; 2963 tr 50 M=MMU_TOQ_STATE_MEM0; 2964 tr 51 M=MMU_TOQ_STATE_MEM0; 2965 tr 52 M=MMU_TOQ_STATE_MEM0; 2966 tr 71 M=MMU_TOQ_STATE_MEM0 TSE=F SLTH=T; 2967 tr 71 M=MMU_TOQ_STATE_MEM0 TSE=T SLTH=T; 2968 tr 71 M=MMU_TOQ_STATE_MEM0 TSE=T SLTH=F; 2969 echo " MMU_TOQ_STATE_MEM1"; 2970 tr 50 M=MMU_TOQ_STATE_MEM1; 2971 tr 51 M=MMU_TOQ_STATE_MEM1; 2972 tr 52 M=MMU_TOQ_STATE_MEM1; 2973 tr 71 M=MMU_TOQ_STATE_MEM1 TSE=F SLTH=T; 2974 tr 71 M=MMU_TOQ_STATE_MEM1 TSE=T SLTH=T; 2975 tr 71 M=MMU_TOQ_STATE_MEM1 TSE=T SLTH=F; 2976 echo " MMU_WRED_DROP_CURVE_PROFILE_0"; 2977 tr 50 M=MMU_WRED_DROP_CURVE_PROFILE_0; 2978 tr 51 M=MMU_WRED_DROP_CURVE_PROFILE_0; 2979 tr 52 M=MMU_WRED_DROP_CURVE_PROFILE_0; 2980 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_0 TSE=F SLTH=T; 2981 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_0 TSE=T SLTH=T; 2982 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_0 TSE=T SLTH=F; 2983 echo " MMU_WRED_DROP_CURVE_PROFILE_1"; 2984 tr 50 M=MMU_WRED_DROP_CURVE_PROFILE_1; 2985 tr 51 M=MMU_WRED_DROP_CURVE_PROFILE_1; 2986 tr 52 M=MMU_WRED_DROP_CURVE_PROFILE_1; 2987 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_1 TSE=F SLTH=T; 2988 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_1 TSE=T SLTH=T; 2989 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_1 TSE=T SLTH=F; 2990 echo " MMU_WRED_DROP_CURVE_PROFILE_2"; 2991 tr 50 M=MMU_WRED_DROP_CURVE_PROFILE_2; 2992 tr 51 M=MMU_WRED_DROP_CURVE_PROFILE_2; 2993 tr 52 M=MMU_WRED_DROP_CURVE_PROFILE_2; 2994 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_2 TSE=F SLTH=T; 2995 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_2 TSE=T SLTH=T; 2996 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_2 TSE=T SLTH=F; 2997 echo " MMU_WRED_DROP_CURVE_PROFILE_3"; 2998 tr 50 M=MMU_WRED_DROP_CURVE_PROFILE_3; 2999 tr 51 M=MMU_WRED_DROP_CURVE_PROFILE_3; 3000 tr 52 M=MMU_WRED_DROP_CURVE_PROFILE_3; 3001 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_3 TSE=F SLTH=T; 3002 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_3 TSE=T SLTH=T; 3003 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_3 TSE=T SLTH=F; 3004 echo " MMU_WRED_DROP_CURVE_PROFILE_4"; 3005 tr 50 M=MMU_WRED_DROP_CURVE_PROFILE_4; 3006 tr 51 M=MMU_WRED_DROP_CURVE_PROFILE_4; 3007 tr 52 M=MMU_WRED_DROP_CURVE_PROFILE_4; 3008 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_4 TSE=F SLTH=T; 3009 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_4 TSE=T SLTH=T; 3010 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_4 TSE=T SLTH=F; 3011 echo " MMU_WRED_DROP_CURVE_PROFILE_5"; 3012 tr 50 M=MMU_WRED_DROP_CURVE_PROFILE_5; 3013 tr 51 M=MMU_WRED_DROP_CURVE_PROFILE_5; 3014 tr 52 M=MMU_WRED_DROP_CURVE_PROFILE_5; 3015 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_5 TSE=F SLTH=T; 3016 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_5 TSE=T SLTH=T; 3017 tr 71 M=MMU_WRED_DROP_CURVE_PROFILE_5 TSE=T SLTH=F; 3018 echo " MMU_WRED_OPN_AVG_QSIZE_BUFFER"; 3019 tr 50 M=MMU_WRED_OPN_AVG_QSIZE_BUFFER; 3020 tr 51 M=MMU_WRED_OPN_AVG_QSIZE_BUFFER; 3021 tr 52 M=MMU_WRED_OPN_AVG_QSIZE_BUFFER; 3022 tr 71 M=MMU_WRED_OPN_AVG_QSIZE_BUFFER TSE=F SLTH=T; 3023 tr 71 M=MMU_WRED_OPN_AVG_QSIZE_BUFFER TSE=T SLTH=T; 3024 tr 71 M=MMU_WRED_OPN_AVG_QSIZE_BUFFER TSE=T SLTH=F; 3025 echo " MMU_WRED_OPN_AVG_QSIZE_QENTRY"; 3026 tr 50 M=MMU_WRED_OPN_AVG_QSIZE_QENTRY; 3027 tr 51 M=MMU_WRED_OPN_AVG_QSIZE_QENTRY; 3028 tr 52 M=MMU_WRED_OPN_AVG_QSIZE_QENTRY; 3029 tr 71 M=MMU_WRED_OPN_AVG_QSIZE_QENTRY TSE=F SLTH=T; 3030 tr 71 M=MMU_WRED_OPN_AVG_QSIZE_QENTRY TSE=T SLTH=T; 3031 tr 71 M=MMU_WRED_OPN_AVG_QSIZE_QENTRY TSE=T SLTH=F; 3032 echo " MMU_WRED_OPN_CONFIG_BUFFER"; 3033 tr 50 M=MMU_WRED_OPN_CONFIG_BUFFER; 3034 tr 51 M=MMU_WRED_OPN_CONFIG_BUFFER; 3035 tr 52 M=MMU_WRED_OPN_CONFIG_BUFFER; 3036 tr 71 M=MMU_WRED_OPN_CONFIG_BUFFER TSE=F SLTH=T; 3037 tr 71 M=MMU_WRED_OPN_CONFIG_BUFFER TSE=T SLTH=T; 3038 tr 71 M=MMU_WRED_OPN_CONFIG_BUFFER TSE=T SLTH=F; 3039 echo " MMU_WRED_OPN_CONFIG_QENTRY"; 3040 tr 50 M=MMU_WRED_OPN_CONFIG_QENTRY; 3041 tr 51 M=MMU_WRED_OPN_CONFIG_QENTRY; 3042 tr 52 M=MMU_WRED_OPN_CONFIG_QENTRY; 3043 tr 71 M=MMU_WRED_OPN_CONFIG_QENTRY TSE=F SLTH=T; 3044 tr 71 M=MMU_WRED_OPN_CONFIG_QENTRY TSE=T SLTH=T; 3045 tr 71 M=MMU_WRED_OPN_CONFIG_QENTRY TSE=T SLTH=F; 3046 echo " MMU_WRED_OPN_DROP_THD_DEQ"; 3047 tr 50 M=MMU_WRED_OPN_DROP_THD_DEQ; 3048 tr 51 M=MMU_WRED_OPN_DROP_THD_DEQ; 3049 tr 52 M=MMU_WRED_OPN_DROP_THD_DEQ; 3050 tr 71 M=MMU_WRED_OPN_DROP_THD_DEQ TSE=F SLTH=T; 3051 tr 71 M=MMU_WRED_OPN_DROP_THD_DEQ TSE=T SLTH=T; 3052 tr 71 M=MMU_WRED_OPN_DROP_THD_DEQ TSE=T SLTH=F; 3053 echo " MMU_WRED_OPN_DROP_THD_ENQ"; 3054 tr 50 M=MMU_WRED_OPN_DROP_THD_ENQ; 3055 tr 51 M=MMU_WRED_OPN_DROP_THD_ENQ; 3056 tr 52 M=MMU_WRED_OPN_DROP_THD_ENQ; 3057 tr 71 M=MMU_WRED_OPN_DROP_THD_ENQ TSE=F SLTH=T; 3058 tr 71 M=MMU_WRED_OPN_DROP_THD_ENQ TSE=T SLTH=T; 3059 tr 71 M=MMU_WRED_OPN_DROP_THD_ENQ TSE=T SLTH=F; 3060 echo " MMU_WRED_QUEUE_AVG_QSIZE_BUFFER"; 3061 tr 50 M=MMU_WRED_QUEUE_AVG_QSIZE_BUFFER; 3062 tr 51 M=MMU_WRED_QUEUE_AVG_QSIZE_BUFFER; 3063 tr 52 M=MMU_WRED_QUEUE_AVG_QSIZE_BUFFER; 3064 tr 71 M=MMU_WRED_QUEUE_AVG_QSIZE_BUFFER TSE=F SLTH=T; 3065 tr 71 M=MMU_WRED_QUEUE_AVG_QSIZE_BUFFER TSE=T SLTH=T; 3066 tr 71 M=MMU_WRED_QUEUE_AVG_QSIZE_BUFFER TSE=T SLTH=F; 3067 echo " MMU_WRED_QUEUE_AVG_QSIZE_QENTRY"; 3068 tr 50 M=MMU_WRED_QUEUE_AVG_QSIZE_QENTRY; 3069 tr 51 M=MMU_WRED_QUEUE_AVG_QSIZE_QENTRY; 3070 tr 52 M=MMU_WRED_QUEUE_AVG_QSIZE_QENTRY; 3071 tr 71 M=MMU_WRED_QUEUE_AVG_QSIZE_QENTRY TSE=F SLTH=T; 3072 tr 71 M=MMU_WRED_QUEUE_AVG_QSIZE_QENTRY TSE=T SLTH=T; 3073 tr 71 M=MMU_WRED_QUEUE_AVG_QSIZE_QENTRY TSE=T SLTH=F; 3074 echo " MMU_WRED_QUEUE_CONFIG_BUFFER"; 3075 tr 50 M=MMU_WRED_QUEUE_CONFIG_BUFFER; 3076 tr 51 M=MMU_WRED_QUEUE_CONFIG_BUFFER; 3077 tr 52 M=MMU_WRED_QUEUE_CONFIG_BUFFER; 3078 tr 71 M=MMU_WRED_QUEUE_CONFIG_BUFFER TSE=F SLTH=T; 3079 tr 71 M=MMU_WRED_QUEUE_CONFIG_BUFFER TSE=T SLTH=T; 3080 tr 71 M=MMU_WRED_QUEUE_CONFIG_BUFFER TSE=T SLTH=F; 3081 echo " MMU_WRED_QUEUE_CONFIG_QENTRY"; 3082 tr 50 M=MMU_WRED_QUEUE_CONFIG_QENTRY; 3083 tr 51 M=MMU_WRED_QUEUE_CONFIG_QENTRY; 3084 tr 52 M=MMU_WRED_QUEUE_CONFIG_QENTRY; 3085 tr 71 M=MMU_WRED_QUEUE_CONFIG_QENTRY TSE=F SLTH=T; 3086 tr 71 M=MMU_WRED_QUEUE_CONFIG_QENTRY TSE=T SLTH=T; 3087 tr 71 M=MMU_WRED_QUEUE_CONFIG_QENTRY TSE=T SLTH=F; 3088 echo " MMU_WRED_QUEUE_DROP_THD_DEQ"; 3089 tr 50 M=MMU_WRED_QUEUE_DROP_THD_DEQ; 3090 tr 51 M=MMU_WRED_QUEUE_DROP_THD_DEQ; 3091 tr 52 M=MMU_WRED_QUEUE_DROP_THD_DEQ; 3092 tr 71 M=MMU_WRED_QUEUE_DROP_THD_DEQ TSE=F SLTH=T; 3093 tr 71 M=MMU_WRED_QUEUE_DROP_THD_DEQ TSE=T SLTH=T; 3094 tr 71 M=MMU_WRED_QUEUE_DROP_THD_DEQ TSE=T SLTH=F; 3095 echo " MMU_WRED_QUEUE_DROP_THD_ENQ_0"; 3096 tr 50 M=MMU_WRED_QUEUE_DROP_THD_ENQ_0; 3097 tr 51 M=MMU_WRED_QUEUE_DROP_THD_ENQ_0; 3098 tr 52 M=MMU_WRED_QUEUE_DROP_THD_ENQ_0; 3099 tr 71 M=MMU_WRED_QUEUE_DROP_THD_ENQ_0 TSE=F SLTH=T; 3100 tr 71 M=MMU_WRED_QUEUE_DROP_THD_ENQ_0 TSE=T SLTH=T; 3101 tr 71 M=MMU_WRED_QUEUE_DROP_THD_ENQ_0 TSE=T SLTH=F; 3102 echo " MMU_WRED_QUEUE_DROP_THD_ENQ_1"; 3103 tr 50 M=MMU_WRED_QUEUE_DROP_THD_ENQ_1; 3104 tr 51 M=MMU_WRED_QUEUE_DROP_THD_ENQ_1; 3105 tr 52 M=MMU_WRED_QUEUE_DROP_THD_ENQ_1; 3106 tr 71 M=MMU_WRED_QUEUE_DROP_THD_ENQ_1 TSE=F SLTH=T; 3107 tr 71 M=MMU_WRED_QUEUE_DROP_THD_ENQ_1 TSE=T SLTH=T; 3108 tr 71 M=MMU_WRED_QUEUE_DROP_THD_ENQ_1 TSE=T SLTH=F; 3109 echo " MMU_WRED_QUEUE_OP_NODE_MAP"; 3110 tr 50 M=MMU_WRED_QUEUE_OP_NODE_MAP; 3111 tr 51 M=MMU_WRED_QUEUE_OP_NODE_MAP; 3112 tr 52 M=MMU_WRED_QUEUE_OP_NODE_MAP; 3113 tr 71 M=MMU_WRED_QUEUE_OP_NODE_MAP TSE=F SLTH=T; 3114 tr 71 M=MMU_WRED_QUEUE_OP_NODE_MAP TSE=T SLTH=T; 3115 tr 71 M=MMU_WRED_QUEUE_OP_NODE_MAP TSE=T SLTH=F; 3116 echo " MODPORT_MAP_M0"; 3117 tr 50 M=MODPORT_MAP_M0; 3118 tr 51 M=MODPORT_MAP_M0; 3119 tr 52 M=MODPORT_MAP_M0; 3120 tr 71 M=MODPORT_MAP_M0 TSE=F SLTH=T; 3121 tr 71 M=MODPORT_MAP_M0 TSE=T SLTH=T; 3122 tr 71 M=MODPORT_MAP_M0 TSE=T SLTH=F; 3123 echo " MODPORT_MAP_M1"; 3124 tr 50 M=MODPORT_MAP_M1; 3125 tr 51 M=MODPORT_MAP_M1; 3126 tr 52 M=MODPORT_MAP_M1; 3127 tr 71 M=MODPORT_MAP_M1 TSE=F SLTH=T; 3128 tr 71 M=MODPORT_MAP_M1 TSE=T SLTH=T; 3129 tr 71 M=MODPORT_MAP_M1 TSE=T SLTH=F; 3130 echo " MODPORT_MAP_M2"; 3131 tr 50 M=MODPORT_MAP_M2; 3132 tr 51 M=MODPORT_MAP_M2; 3133 tr 52 M=MODPORT_MAP_M2; 3134 tr 71 M=MODPORT_MAP_M2 TSE=F SLTH=T; 3135 tr 71 M=MODPORT_MAP_M2 TSE=T SLTH=T; 3136 tr 71 M=MODPORT_MAP_M2 TSE=T SLTH=F; 3137 echo " MODPORT_MAP_M3"; 3138 tr 50 M=MODPORT_MAP_M3; 3139 tr 51 M=MODPORT_MAP_M3; 3140 tr 52 M=MODPORT_MAP_M3; 3141 tr 71 M=MODPORT_MAP_M3 TSE=F SLTH=T; 3142 tr 71 M=MODPORT_MAP_M3 TSE=T SLTH=T; 3143 tr 71 M=MODPORT_MAP_M3 TSE=T SLTH=F; 3144 ktsanity_ecc_off.soc 3145 echo " MODPORT_MAP_MIRROR"; 3146 tr 50 M=MODPORT_MAP_MIRROR; 3147 tr 51 M=MODPORT_MAP_MIRROR; 3148 tr 52 M=MODPORT_MAP_MIRROR; 3149 tr 71 M=MODPORT_MAP_MIRROR TSE=F SLTH=T; 3150 tr 71 M=MODPORT_MAP_MIRROR TSE=T SLTH=T; 3151 tr 71 M=MODPORT_MAP_MIRROR TSE=T SLTH=F; 3152 echo " MODPORT_MAP_SW"; 3153 tr 50 M=MODPORT_MAP_SW; 3154 tr 51 M=MODPORT_MAP_SW; 3155 tr 52 M=MODPORT_MAP_SW; 3156 tr 71 M=MODPORT_MAP_SW TSE=F SLTH=T; 3157 tr 71 M=MODPORT_MAP_SW TSE=T SLTH=T; 3158 tr 71 M=MODPORT_MAP_SW TSE=T SLTH=F; 3159 echo " MPLS_ENTRY"; 3160 tr 50 M=MPLS_ENTRY; 3161 tr 51 M=MPLS_ENTRY; 3162 tr 52 M=MPLS_ENTRY; 3163 tr 71 M=MPLS_ENTRY TSE=F SLTH=T; 3164 tr 71 M=MPLS_ENTRY TSE=T SLTH=T; 3165 tr 71 M=MPLS_ENTRY TSE=T SLTH=F; 3166 echo " MULTIPASS_LOOPBACK_BITMAP"; 3167 tr 50 M=MULTIPASS_LOOPBACK_BITMAP; 3168 #tr 51 M=MULTIPASS_LOOPBACK_BITMAP; 3169 #tr 52 M=MULTIPASS_LOOPBACK_BITMAP; 3170 tr 71 M=MULTIPASS_LOOPBACK_BITMAP TSE=F SLTH=T; 3171 tr 71 M=MULTIPASS_LOOPBACK_BITMAP TSE=T SLTH=T; 3172 tr 71 M=MULTIPASS_LOOPBACK_BITMAP TSE=T SLTH=F; 3173 echo " MY_STATION_TCAM"; 3174 tr 50 M=MY_STATION_TCAM; 3175 tr 51 M=MY_STATION_TCAM; 3176 tr 52 M=MY_STATION_TCAM; 3177 tr 71 M=MY_STATION_TCAM TSE=F SLTH=T; 3178 tr 71 M=MY_STATION_TCAM TSE=T SLTH=T; 3179 tr 71 M=MY_STATION_TCAM TSE=T SLTH=F; 3180 echo " MY_STATION_TCAM_DATA_ONLY"; 3181 tr 50 M=MY_STATION_TCAM_DATA_ONLY; 3182 tr 51 M=MY_STATION_TCAM_DATA_ONLY; 3183 tr 52 M=MY_STATION_TCAM_DATA_ONLY; 3184 tr 71 M=MY_STATION_TCAM_DATA_ONLY TSE=F SLTH=T; 3185 tr 71 M=MY_STATION_TCAM_DATA_ONLY TSE=T SLTH=T; 3186 tr 71 M=MY_STATION_TCAM_DATA_ONLY TSE=T SLTH=F; 3187 echo " MY_STATION_TCAM_ENTRY_ONLY"; 3188 tr 50 M=MY_STATION_TCAM_ENTRY_ONLY; 3189 tr 51 M=MY_STATION_TCAM_ENTRY_ONLY; 3190 tr 52 M=MY_STATION_TCAM_ENTRY_ONLY; 3191 tr 71 M=MY_STATION_TCAM_ENTRY_ONLY TSE=F SLTH=T; 3192 tr 71 M=MY_STATION_TCAM_ENTRY_ONLY TSE=T SLTH=T; 3193 tr 71 M=MY_STATION_TCAM_ENTRY_ONLY TSE=T SLTH=F; 3194 echo " NONUCAST_TRUNK_BLOCK_MASK"; 3195 tr 50 M=NONUCAST_TRUNK_BLOCK_MASK; 3196 tr 51 M=NONUCAST_TRUNK_BLOCK_MASK; 3197 tr 52 M=NONUCAST_TRUNK_BLOCK_MASK; 3198 tr 71 M=NONUCAST_TRUNK_BLOCK_MASK TSE=F SLTH=T; 3199 tr 71 M=NONUCAST_TRUNK_BLOCK_MASK TSE=T SLTH=T; 3200 tr 71 M=NONUCAST_TRUNK_BLOCK_MASK TSE=T SLTH=F; 3201 echo " OAM_LM_COUNTERS"; 3202 tr 50 M=OAM_LM_COUNTERS; 3203 tr 51 M=OAM_LM_COUNTERS; 3204 tr 52 M=OAM_LM_COUNTERS; 3205 tr 71 M=OAM_LM_COUNTERS TSE=F SLTH=T; 3206 tr 71 M=OAM_LM_COUNTERS TSE=T SLTH=T; 3207 tr 71 M=OAM_LM_COUNTERS TSE=T SLTH=F; 3208 echo " OAM_OPCODE_CONTROL_PROFILE"; 3209 tr 50 M=OAM_OPCODE_CONTROL_PROFILE; 3210 tr 51 M=OAM_OPCODE_CONTROL_PROFILE; 3211 tr 52 M=OAM_OPCODE_CONTROL_PROFILE; 3212 tr 71 M=OAM_OPCODE_CONTROL_PROFILE TSE=F SLTH=T; 3213 tr 71 M=OAM_OPCODE_CONTROL_PROFILE TSE=T SLTH=T; 3214 tr 71 M=OAM_OPCODE_CONTROL_PROFILE TSE=T SLTH=F; 3215 echo " PHB2_COS_MAP"; 3216 tr 50 M=PHB2_COS_MAP; 3217 tr 51 M=PHB2_COS_MAP; 3218 tr 52 M=PHB2_COS_MAP; 3219 tr 71 M=PHB2_COS_MAP TSE=F SLTH=T; 3220 tr 71 M=PHB2_COS_MAP TSE=T SLTH=T; 3221 tr 71 M=PHB2_COS_MAP TSE=T SLTH=F; 3222 echo " PORT_BRIDGE_BMAP"; 3223 tr 50 M=PORT_BRIDGE_BMAP; 3224 #tr 51 M=PORT_BRIDGE_BMAP; 3225 #tr 52 M=PORT_BRIDGE_BMAP; 3226 tr 71 M=PORT_BRIDGE_BMAP TSE=F SLTH=T; 3227 tr 71 M=PORT_BRIDGE_BMAP TSE=T SLTH=T; 3228 tr 71 M=PORT_BRIDGE_BMAP TSE=T SLTH=F; 3229 echo " PORT_BRIDGE_MIRROR_BMAP"; 3230 tr 50 M=PORT_BRIDGE_MIRROR_BMAP; 3231 #tr 51 M=PORT_BRIDGE_MIRROR_BMAP; 3232 #tr 52 M=PORT_BRIDGE_MIRROR_BMAP; 3233 tr 71 M=PORT_BRIDGE_MIRROR_BMAP TSE=F SLTH=T; 3234 tr 71 M=PORT_BRIDGE_MIRROR_BMAP TSE=T SLTH=T; 3235 tr 71 M=PORT_BRIDGE_MIRROR_BMAP TSE=T SLTH=F; 3236 echo " PORT_CBL_TABLE"; 3237 tr 50 M=PORT_CBL_TABLE; 3238 tr 51 M=PORT_CBL_TABLE; 3239 tr 52 M=PORT_CBL_TABLE; 3240 tr 71 M=PORT_CBL_TABLE TSE=F SLTH=T; 3241 tr 71 M=PORT_CBL_TABLE TSE=T SLTH=T; 3242 tr 71 M=PORT_CBL_TABLE TSE=T SLTH=F; 3243 echo " PORT_CBL_TABLE_MODBASE"; 3244 tr 50 M=PORT_CBL_TABLE_MODBASE; 3245 tr 51 M=PORT_CBL_TABLE_MODBASE; 3246 tr 52 M=PORT_CBL_TABLE_MODBASE; 3247 tr 71 M=PORT_CBL_TABLE_MODBASE TSE=F SLTH=T; 3248 tr 71 M=PORT_CBL_TABLE_MODBASE TSE=T SLTH=T; 3249 tr 71 M=PORT_CBL_TABLE_MODBASE TSE=T SLTH=F; 3250 echo " PORT_COS_MAP"; 3251 tr 50 M=PORT_COS_MAP; 3252 tr 51 M=PORT_COS_MAP; 3253 tr 52 M=PORT_COS_MAP; 3254 tr 71 M=PORT_COS_MAP TSE=F SLTH=T; 3255 tr 71 M=PORT_COS_MAP TSE=T SLTH=T; 3256 tr 71 M=PORT_COS_MAP TSE=T SLTH=F; 3257 echo " PORT_LAG_FAILOVER_SET"; 3258 tr 50 M=PORT_LAG_FAILOVER_SET; 3259 tr 51 M=PORT_LAG_FAILOVER_SET; 3260 tr 52 M=PORT_LAG_FAILOVER_SET; 3261 tr 71 M=PORT_LAG_FAILOVER_SET TSE=F SLTH=T; 3262 tr 71 M=PORT_LAG_FAILOVER_SET TSE=T SLTH=T; 3263 tr 71 M=PORT_LAG_FAILOVER_SET TSE=T SLTH=F; 3264 echo " PORT_OR_TRUNK_MAC_COUNT"; 3265 tr 50 M=PORT_OR_TRUNK_MAC_COUNT; 3266 tr 51 M=PORT_OR_TRUNK_MAC_COUNT; 3267 tr 52 M=PORT_OR_TRUNK_MAC_COUNT; 3268 tr 71 M=PORT_OR_TRUNK_MAC_COUNT TSE=F SLTH=T; 3269 tr 71 M=PORT_OR_TRUNK_MAC_COUNT TSE=T SLTH=T; 3270 tr 71 M=PORT_OR_TRUNK_MAC_COUNT TSE=T SLTH=F; 3271 echo " PORT_OR_TRUNK_MAC_LIMIT"; 3272 tr 50 M=PORT_OR_TRUNK_MAC_LIMIT; 3273 tr 51 M=PORT_OR_TRUNK_MAC_LIMIT; 3274 tr 52 M=PORT_OR_TRUNK_MAC_LIMIT; 3275 tr 71 M=PORT_OR_TRUNK_MAC_LIMIT TSE=F SLTH=T; 3276 tr 71 M=PORT_OR_TRUNK_MAC_LIMIT TSE=T SLTH=T; 3277 tr 71 M=PORT_OR_TRUNK_MAC_LIMIT TSE=T SLTH=F; 3278 echo " PORT_TAB"; 3279 tr 50 M=PORT_TAB; 3280 tr 51 M=PORT_TAB; 3281 tr 52 M=PORT_TAB; 3282 tr 71 M=PORT_TAB TSE=F SLTH=T; 3283 tr 71 M=PORT_TAB TSE=T SLTH=T; 3284 tr 71 M=PORT_TAB TSE=T SLTH=F; 3285 #echo " RMEP"; 3286 #tr 50 M=RMEP; 3287 #tr 51 M=RMEP; 3288 #tr 52 M=RMEP; 3289 #tr 71 M=RMEP TSE=F SLTH=T; 3290 #tr 71 M=RMEP TSE=T SLTH=T; 3291 #tr 71 M=RMEP TSE=T SLTH=F; 3292 echo " SOURCE_MOD_PROXY_TABLE"; 3293 tr 50 M=SOURCE_MOD_PROXY_TABLE; 3294 tr 51 M=SOURCE_MOD_PROXY_TABLE; 3295 tr 52 M=SOURCE_MOD_PROXY_TABLE; 3296 tr 71 M=SOURCE_MOD_PROXY_TABLE TSE=F SLTH=T; 3297 tr 71 M=SOURCE_MOD_PROXY_TABLE TSE=T SLTH=T; 3298 tr 71 M=SOURCE_MOD_PROXY_TABLE TSE=T SLTH=F; 3299 echo " SOURCE_TRUNK_MAP_MODBASE"; 3300 tr 50 M=SOURCE_TRUNK_MAP_MODBASE; 3301 tr 51 M=SOURCE_TRUNK_MAP_MODBASE; 3302 tr 52 M=SOURCE_TRUNK_MAP_MODBASE; 3303 tr 71 M=SOURCE_TRUNK_MAP_MODBASE TSE=F SLTH=T; 3304 tr 71 M=SOURCE_TRUNK_MAP_MODBASE TSE=T SLTH=T; 3305 tr 71 M=SOURCE_TRUNK_MAP_MODBASE TSE=T SLTH=F; 3306 echo " SOURCE_TRUNK_MAP_TABLE"; 3307 tr 50 M=SOURCE_TRUNK_MAP_TABLE; 3308 tr 51 M=SOURCE_TRUNK_MAP_TABLE; 3309 tr 52 M=SOURCE_TRUNK_MAP_TABLE; 3310 tr 71 M=SOURCE_TRUNK_MAP_TABLE TSE=F SLTH=T; 3311 tr 71 M=SOURCE_TRUNK_MAP_TABLE TSE=T SLTH=T; 3312 tr 71 M=SOURCE_TRUNK_MAP_TABLE TSE=T SLTH=F; 3313 echo " SOURCE_VP"; 3314 tr 50 M=SOURCE_VP; 3315 tr 51 M=SOURCE_VP; 3316 tr 52 M=SOURCE_VP; 3317 tr 71 M=SOURCE_VP TSE=F SLTH=T; 3318 tr 71 M=SOURCE_VP TSE=T SLTH=T; 3319 tr 71 M=SOURCE_VP TSE=T SLTH=F; 3320 echo " SRC_MODID_EGRESS"; 3321 tr 50 M=SRC_MODID_EGRESS; 3322 tr 51 M=SRC_MODID_EGRESS; 3323 tr 52 M=SRC_MODID_EGRESS; 3324 tr 71 M=SRC_MODID_EGRESS TSE=F SLTH=T; 3325 tr 71 M=SRC_MODID_EGRESS TSE=T SLTH=T; 3326 tr 71 M=SRC_MODID_EGRESS TSE=T SLTH=F; 3327 echo " SRC_MODID_INGRESS_BLOCK"; 3328 tr 50 M=SRC_MODID_INGRESS_BLOCK; 3329 tr 51 M=SRC_MODID_INGRESS_BLOCK; 3330 tr 52 M=SRC_MODID_INGRESS_BLOCK; 3331 tr 71 M=SRC_MODID_INGRESS_BLOCK TSE=F SLTH=T; 3332 tr 71 M=SRC_MODID_INGRESS_BLOCK TSE=T SLTH=T; 3333 tr 71 M=SRC_MODID_INGRESS_BLOCK TSE=T SLTH=F; 3334 echo " STG_TAB"; 3335 tr 50 M=STG_TAB; 3336 tr 51 M=STG_TAB; 3337 tr 52 M=STG_TAB; 3338 tr 71 M=STG_TAB TSE=F SLTH=T; 3339 tr 71 M=STG_TAB TSE=T SLTH=T; 3340 tr 71 M=STG_TAB TSE=T SLTH=F; 3341 echo " SVM_MACROFLOW_INDEX_TABLE"; 3342 tr 50 M=SVM_MACROFLOW_INDEX_TABLE; 3343 tr 51 M=SVM_MACROFLOW_INDEX_TABLE; 3344 tr 52 M=SVM_MACROFLOW_INDEX_TABLE; 3345 tr 71 M=SVM_MACROFLOW_INDEX_TABLE TSE=F SLTH=T; 3346 tr 71 M=SVM_MACROFLOW_INDEX_TABLE TSE=T SLTH=T; 3347 tr 71 M=SVM_MACROFLOW_INDEX_TABLE TSE=T SLTH=F; 3348 echo " SVM_METER_TABLE"; 3349 tr 50 M=SVM_METER_TABLE; 3350 tr 51 M=SVM_METER_TABLE; 3351 tr 52 M=SVM_METER_TABLE; 3352 tr 71 M=SVM_METER_TABLE TSE=F SLTH=T; 3353 tr 71 M=SVM_METER_TABLE TSE=T SLTH=T; 3354 tr 71 M=SVM_METER_TABLE TSE=T SLTH=F; 3355 echo " SVM_OFFSET_TABLE"; 3356 tr 50 M=SVM_OFFSET_TABLE; 3357 tr 51 M=SVM_OFFSET_TABLE; 3358 tr 52 M=SVM_OFFSET_TABLE; 3359 tr 71 M=SVM_OFFSET_TABLE TSE=F SLTH=T; 3360 tr 71 M=SVM_OFFSET_TABLE TSE=T SLTH=T; 3361 tr 71 M=SVM_OFFSET_TABLE TSE=T SLTH=F; 3362 echo " SVM_POLICY_TABLE"; 3363 tr 50 M=SVM_POLICY_TABLE; 3364 tr 51 M=SVM_POLICY_TABLE; 3365 tr 52 M=SVM_POLICY_TABLE; 3366 tr 71 M=SVM_POLICY_TABLE TSE=F SLTH=T; 3367 tr 71 M=SVM_POLICY_TABLE TSE=T SLTH=T; 3368 tr 71 M=SVM_POLICY_TABLE TSE=T SLTH=F; 3369 echo " SYSTEM_CONFIG_TABLE"; 3370 tr 50 M=SYSTEM_CONFIG_TABLE; 3371 tr 51 M=SYSTEM_CONFIG_TABLE; 3372 tr 52 M=SYSTEM_CONFIG_TABLE; 3373 tr 71 M=SYSTEM_CONFIG_TABLE TSE=F SLTH=T; 3374 tr 71 M=SYSTEM_CONFIG_TABLE TSE=T SLTH=T; 3375 tr 71 M=SYSTEM_CONFIG_TABLE TSE=T SLTH=F; 3376 echo " SYSTEM_CONFIG_TABLE_MODBASE"; 3377 tr 50 M=SYSTEM_CONFIG_TABLE_MODBASE; 3378 tr 51 M=SYSTEM_CONFIG_TABLE_MODBASE; 3379 tr 52 M=SYSTEM_CONFIG_TABLE_MODBASE; 3380 tr 71 M=SYSTEM_CONFIG_TABLE_MODBASE TSE=F SLTH=T; 3381 tr 71 M=SYSTEM_CONFIG_TABLE_MODBASE TSE=T SLTH=T; 3382 tr 71 M=SYSTEM_CONFIG_TABLE_MODBASE TSE=T SLTH=F; 3383 echo " TCP_FN"; 3384 tr 50 M=TCP_FN; 3385 tr 51 M=TCP_FN; 3386 tr 52 M=TCP_FN; 3387 tr 71 M=TCP_FN TSE=F SLTH=T; 3388 tr 71 M=TCP_FN TSE=T SLTH=T; 3389 tr 71 M=TCP_FN TSE=T SLTH=F; 3390 echo " THDO_OPNCOUNT_QENTRY"; 3391 tr 50 M=THDO_OPNCOUNT_QENTRY; 3392 tr 51 M=THDO_OPNCOUNT_QENTRY; 3393 tr 52 M=THDO_OPNCOUNT_QENTRY; 3394 tr 71 M=THDO_OPNCOUNT_QENTRY TSE=F SLTH=T; 3395 tr 71 M=THDO_OPNCOUNT_QENTRY TSE=T SLTH=T; 3396 tr 71 M=THDO_OPNCOUNT_QENTRY TSE=T SLTH=F; 3397 echo " THDO_QCOUNT_CELL_1"; 3398 tr 50 M=THDO_QCOUNT_CELL_1; 3399 tr 51 M=THDO_QCOUNT_CELL_1; 3400 tr 52 M=THDO_QCOUNT_CELL_1; 3401 tr 71 M=THDO_QCOUNT_CELL_1 TSE=F SLTH=T; 3402 tr 71 M=THDO_QCOUNT_CELL_1 TSE=T SLTH=T; 3403 tr 71 M=THDO_QCOUNT_CELL_1 TSE=T SLTH=F; 3404 echo " THDO_QCOUNT_QENTRY_0"; 3405 tr 50 M=THDO_QCOUNT_QENTRY_0; 3406 tr 51 M=THDO_QCOUNT_QENTRY_0; 3407 tr 52 M=THDO_QCOUNT_QENTRY_0; 3408 tr 71 M=THDO_QCOUNT_QENTRY_0 TSE=F SLTH=T; 3409 tr 71 M=THDO_QCOUNT_QENTRY_0 TSE=T SLTH=T; 3410 tr 71 M=THDO_QCOUNT_QENTRY_0 TSE=T SLTH=F; 3411 echo " THDO_QCOUNT_QENTRY_1"; 3412 tr 50 M=THDO_QCOUNT_QENTRY_1; 3413 tr 51 M=THDO_QCOUNT_QENTRY_1; 3414 tr 52 M=THDO_QCOUNT_QENTRY_1; 3415 tr 71 M=THDO_QCOUNT_QENTRY_1 TSE=F SLTH=T; 3416 tr 71 M=THDO_QCOUNT_QENTRY_1 TSE=T SLTH=T; 3417 tr 71 M=THDO_QCOUNT_QENTRY_1 TSE=T SLTH=F; 3418 echo " THDO_QRESET_VALUE_CELL_1"; 3419 tr 50 M=THDO_QRESET_VALUE_CELL_1; 3420 tr 51 M=THDO_QRESET_VALUE_CELL_1; 3421 tr 52 M=THDO_QRESET_VALUE_CELL_1; 3422 tr 71 M=THDO_QRESET_VALUE_CELL_1 TSE=F SLTH=T; 3423 tr 71 M=THDO_QRESET_VALUE_CELL_1 TSE=T SLTH=T; 3424 tr 71 M=THDO_QRESET_VALUE_CELL_1 TSE=T SLTH=F; 3425 echo " THDO_QRESET_VALUE_QENTRY_1"; 3426 tr 50 M=THDO_QRESET_VALUE_QENTRY_1; 3427 tr 51 M=THDO_QRESET_VALUE_QENTRY_1; 3428 tr 52 M=THDO_QRESET_VALUE_QENTRY_1; 3429 tr 71 M=THDO_QRESET_VALUE_QENTRY_1 TSE=F SLTH=T; 3430 tr 71 M=THDO_QRESET_VALUE_QENTRY_1 TSE=T SLTH=T; 3431 tr 71 M=THDO_QRESET_VALUE_QENTRY_1 TSE=T SLTH=F; 3432 echo " THDO_QSTATUS_CELL_1"; 3433 tr 50 M=THDO_QSTATUS_CELL_1; 3434 tr 51 M=THDO_QSTATUS_CELL_1; 3435 tr 52 M=THDO_QSTATUS_CELL_1; 3436 tr 71 M=THDO_QSTATUS_CELL_1 TSE=F SLTH=T; 3437 tr 71 M=THDO_QSTATUS_CELL_1 TSE=T SLTH=T; 3438 tr 71 M=THDO_QSTATUS_CELL_1 TSE=T SLTH=F; 3439 echo " THDO_QSTATUS_QENTRY_1"; 3440 tr 50 M=THDO_QSTATUS_QENTRY_1; 3441 tr 51 M=THDO_QSTATUS_QENTRY_1; 3442 tr 52 M=THDO_QSTATUS_QENTRY_1; 3443 tr 71 M=THDO_QSTATUS_QENTRY_1 TSE=F SLTH=T; 3444 tr 71 M=THDO_QSTATUS_QENTRY_1 TSE=T SLTH=T; 3445 tr 71 M=THDO_QSTATUS_QENTRY_1 TSE=T SLTH=F; 3446 echo " TOS_FN"; 3447 tr 50 M=TOS_FN; 3448 tr 51 M=TOS_FN; 3449 tr 52 M=TOS_FN; 3450 tr 71 M=TOS_FN TSE=F SLTH=T; 3451 tr 71 M=TOS_FN TSE=T SLTH=T; 3452 tr 71 M=TOS_FN TSE=T SLTH=F; 3453 echo " TRUNK_BITMAP"; 3454 tr 50 M=TRUNK_BITMAP; 3455 tr 51 M=TRUNK_BITMAP; 3456 tr 52 M=TRUNK_BITMAP; 3457 tr 71 M=TRUNK_BITMAP TSE=F SLTH=T; 3458 tr 71 M=TRUNK_BITMAP TSE=T SLTH=T; 3459 tr 71 M=TRUNK_BITMAP TSE=T SLTH=F; 3460 echo " TRUNK_CBL_TABLE"; 3461 tr 50 M=TRUNK_CBL_TABLE; 3462 tr 51 M=TRUNK_CBL_TABLE; 3463 tr 52 M=TRUNK_CBL_TABLE; 3464 tr 71 M=TRUNK_CBL_TABLE TSE=F SLTH=T; 3465 tr 71 M=TRUNK_CBL_TABLE TSE=T SLTH=T; 3466 tr 71 M=TRUNK_CBL_TABLE TSE=T SLTH=F; 3467 echo " TRUNK_GROUP"; 3468 tr 50 M=TRUNK_GROUP; 3469 tr 51 M=TRUNK_GROUP; 3470 tr 52 M=TRUNK_GROUP; 3471 tr 71 M=TRUNK_GROUP TSE=F SLTH=T; 3472 tr 71 M=TRUNK_GROUP TSE=T SLTH=T; 3473 tr 71 M=TRUNK_GROUP TSE=T SLTH=F; 3474 echo " TRUNK_MEMBER"; 3475 tr 50 M=TRUNK_MEMBER; 3476 tr 51 M=TRUNK_MEMBER; 3477 tr 52 M=TRUNK_MEMBER; 3478 tr 71 M=TRUNK_MEMBER TSE=F SLTH=T; 3479 tr 71 M=TRUNK_MEMBER TSE=T SLTH=T; 3480 tr 71 M=TRUNK_MEMBER TSE=T SLTH=F; 3481 echo " TTL_FN"; 3482 tr 50 M=TTL_FN; 3483 tr 51 M=TTL_FN; 3484 tr 52 M=TTL_FN; 3485 tr 71 M=TTL_FN TSE=F SLTH=T; 3486 tr 71 M=TTL_FN TSE=T SLTH=T; 3487 tr 71 M=TTL_FN TSE=T SLTH=F; 3488 echo " UNKNOWN_HGI_BITMAP"; 3489 tr 50 M=UNKNOWN_HGI_BITMAP; 3490 tr 51 M=UNKNOWN_HGI_BITMAP; 3491 tr 52 M=UNKNOWN_HGI_BITMAP; 3492 tr 71 M=UNKNOWN_HGI_BITMAP TSE=F SLTH=T; 3493 tr 71 M=UNKNOWN_HGI_BITMAP TSE=T SLTH=T; 3494 tr 71 M=UNKNOWN_HGI_BITMAP TSE=T SLTH=F; 3495 echo " UNKNOWN_MCAST_BLOCK_MASK"; 3496 tr 50 M=UNKNOWN_MCAST_BLOCK_MASK; 3497 tr 51 M=UNKNOWN_MCAST_BLOCK_MASK; 3498 tr 52 M=UNKNOWN_MCAST_BLOCK_MASK; 3499 tr 71 M=UNKNOWN_MCAST_BLOCK_MASK TSE=F SLTH=T; 3500 tr 71 M=UNKNOWN_MCAST_BLOCK_MASK TSE=T SLTH=T; 3501 tr 71 M=UNKNOWN_MCAST_BLOCK_MASK TSE=T SLTH=F; 3502 echo " UNKNOWN_UCAST_BLOCK_MASK"; 3503 tr 50 M=UNKNOWN_UCAST_BLOCK_MASK; 3504 tr 51 M=UNKNOWN_UCAST_BLOCK_MASK; 3505 tr 52 M=UNKNOWN_UCAST_BLOCK_MASK; 3506 tr 71 M=UNKNOWN_UCAST_BLOCK_MASK TSE=F SLTH=T; 3507 tr 71 M=UNKNOWN_UCAST_BLOCK_MASK TSE=T SLTH=T; 3508 tr 71 M=UNKNOWN_UCAST_BLOCK_MASK TSE=T SLTH=F; 3509 echo " VFI"; 3510 tr 50 M=VFI; 3511 tr 51 M=VFI; 3512 tr 52 M=VFI; 3513 tr 71 M=VFI TSE=F SLTH=T; 3514 tr 71 M=VFI TSE=T SLTH=T; 3515 tr 71 M=VFI TSE=T SLTH=F; 3516 echo " VFI_1"; 3517 tr 50 M=VFI_1; 3518 tr 51 M=VFI_1; 3519 tr 52 M=VFI_1; 3520 tr 71 M=VFI_1 TSE=F SLTH=T; 3521 tr 71 M=VFI_1 TSE=T SLTH=T; 3522 tr 71 M=VFI_1 TSE=T SLTH=F; 3523 echo " VFP_POLICY_TABLE"; 3524 tr 50 M=VFP_POLICY_TABLE; 3525 tr 51 M=VFP_POLICY_TABLE; 3526 tr 52 M=VFP_POLICY_TABLE; 3527 tr 71 M=VFP_POLICY_TABLE TSE=F SLTH=T; 3528 tr 71 M=VFP_POLICY_TABLE TSE=T SLTH=T; 3529 tr 71 M=VFP_POLICY_TABLE TSE=T SLTH=F; 3530 echo " VFP_TCAM"; 3531 tr 50 M=VFP_TCAM; 3532 tr 51 M=VFP_TCAM; 3533 tr 52 M=VFP_TCAM; 3534 tr 71 M=VFP_TCAM TSE=F SLTH=T; 3535 tr 71 M=VFP_TCAM TSE=T SLTH=T; 3536 tr 71 M=VFP_TCAM TSE=T SLTH=F; 3537 echo " VLAN_COS_MAP"; 3538 tr 50 M=VLAN_COS_MAP; 3539 tr 51 M=VLAN_COS_MAP; 3540 tr 52 M=VLAN_COS_MAP; 3541 tr 71 M=VLAN_COS_MAP TSE=F SLTH=T; 3542 tr 71 M=VLAN_COS_MAP TSE=T SLTH=T; 3543 tr 71 M=VLAN_COS_MAP TSE=T SLTH=F; 3544 echo " VLAN_MAC"; 3545 tr 50 M=VLAN_MAC; 3546 tr 51 M=VLAN_MAC; 3547 tr 52 M=VLAN_MAC; 3548 tr 71 M=VLAN_MAC TSE=F SLTH=T; 3549 tr 71 M=VLAN_MAC TSE=T SLTH=T; 3550 tr 71 M=VLAN_MAC TSE=T SLTH=F; 3551 echo " VLAN_MPLS"; 3552 tr 50 M=VLAN_MPLS; 3553 tr 51 M=VLAN_MPLS; 3554 tr 52 M=VLAN_MPLS; 3555 tr 71 M=VLAN_MPLS TSE=F SLTH=T; 3556 tr 71 M=VLAN_MPLS TSE=T SLTH=T; 3557 tr 71 M=VLAN_MPLS TSE=T SLTH=F; 3558 echo " VLAN_OR_VFI_MAC_COUNT"; 3559 tr 50 M=VLAN_OR_VFI_MAC_COUNT; 3560 tr 51 M=VLAN_OR_VFI_MAC_COUNT; 3561 tr 52 M=VLAN_OR_VFI_MAC_COUNT; 3562 tr 71 M=VLAN_OR_VFI_MAC_COUNT TSE=F SLTH=T; 3563 tr 71 M=VLAN_OR_VFI_MAC_COUNT TSE=T SLTH=T; 3564 tr 71 M=VLAN_OR_VFI_MAC_COUNT TSE=T SLTH=F; 3565 echo " VLAN_OR_VFI_MAC_LIMIT"; 3566 tr 50 M=VLAN_OR_VFI_MAC_LIMIT; 3567 tr 51 M=VLAN_OR_VFI_MAC_LIMIT; 3568 tr 52 M=VLAN_OR_VFI_MAC_LIMIT; 3569 tr 71 M=VLAN_OR_VFI_MAC_LIMIT TSE=F SLTH=T; 3570 tr 71 M=VLAN_OR_VFI_MAC_LIMIT TSE=T SLTH=T; 3571 tr 71 M=VLAN_OR_VFI_MAC_LIMIT TSE=T SLTH=F; 3572 echo " VLAN_PROFILE_2"; 3573 tr 50 M=VLAN_PROFILE_2; 3574 tr 51 M=VLAN_PROFILE_2; 3575 tr 52 M=VLAN_PROFILE_2; 3576 tr 71 M=VLAN_PROFILE_2 TSE=F SLTH=T; 3577 tr 71 M=VLAN_PROFILE_2 TSE=T SLTH=T; 3578 tr 71 M=VLAN_PROFILE_2 TSE=T SLTH=F; 3579 echo " VLAN_PROFILE_TAB"; 3580 tr 50 M=VLAN_PROFILE_TAB; 3581 tr 51 M=VLAN_PROFILE_TAB; 3582 tr 52 M=VLAN_PROFILE_TAB; 3583 tr 71 M=VLAN_PROFILE_TAB TSE=F SLTH=T; 3584 tr 71 M=VLAN_PROFILE_TAB TSE=T SLTH=T; 3585 tr 71 M=VLAN_PROFILE_TAB TSE=T SLTH=F; 3586 echo " VLAN_PROTOCOL"; 3587 tr 50 M=VLAN_PROTOCOL; 3588 tr 51 M=VLAN_PROTOCOL; 3589 tr 52 M=VLAN_PROTOCOL; 3590 tr 71 M=VLAN_PROTOCOL TSE=F SLTH=T; 3591 tr 71 M=VLAN_PROTOCOL TSE=T SLTH=T; 3592 tr 71 M=VLAN_PROTOCOL TSE=T SLTH=F; 3593 echo " VLAN_PROTOCOL_DATA"; 3594 tr 50 M=VLAN_PROTOCOL_DATA; 3595 tr 51 M=VLAN_PROTOCOL_DATA; 3596 tr 52 M=VLAN_PROTOCOL_DATA; 3597 tr 71 M=VLAN_PROTOCOL_DATA TSE=F SLTH=T; 3598 tr 71 M=VLAN_PROTOCOL_DATA TSE=T SLTH=T; 3599 tr 71 M=VLAN_PROTOCOL_DATA TSE=T SLTH=F; 3600 echo " VLAN_SUBNET"; 3601 tr 50 M=VLAN_SUBNET; 3602 tr 51 M=VLAN_SUBNET; 3603 tr 52 M=VLAN_SUBNET; 3604 tr 71 M=VLAN_SUBNET TSE=F SLTH=T; 3605 tr 71 M=VLAN_SUBNET TSE=T SLTH=T; 3606 tr 71 M=VLAN_SUBNET TSE=T SLTH=F; 3607 echo " VLAN_SUBNET_DATA_ONLY"; 3608 tr 50 M=VLAN_SUBNET_DATA_ONLY; 3609 tr 51 M=VLAN_SUBNET_DATA_ONLY; 3610 tr 52 M=VLAN_SUBNET_DATA_ONLY; 3611 tr 71 M=VLAN_SUBNET_DATA_ONLY TSE=F SLTH=T; 3612 tr 71 M=VLAN_SUBNET_DATA_ONLY TSE=T SLTH=T; 3613 tr 71 M=VLAN_SUBNET_DATA_ONLY TSE=T SLTH=F; 3614 echo " VLAN_SUBNET_ONLY"; 3615 tr 50 M=VLAN_SUBNET_ONLY; 3616 tr 51 M=VLAN_SUBNET_ONLY; 3617 tr 52 M=VLAN_SUBNET_ONLY; 3618 tr 71 M=VLAN_SUBNET_ONLY TSE=F SLTH=T; 3619 tr 71 M=VLAN_SUBNET_ONLY TSE=T SLTH=T; 3620 tr 71 M=VLAN_SUBNET_ONLY TSE=T SLTH=F; 3621 echo " VLAN_TAB"; 3622 tr 50 M=VLAN_TAB; 3623 tr 51 M=VLAN_TAB; 3624 tr 52 M=VLAN_TAB; 3625 tr 71 M=VLAN_TAB TSE=F SLTH=T; 3626 tr 71 M=VLAN_TAB TSE=T SLTH=T; 3627 tr 71 M=VLAN_TAB TSE=T SLTH=F; 3628 echo " VLAN_XLATE"; 3629 tr 50 M=VLAN_XLATE; 3630 tr 51 M=VLAN_XLATE; 3631 tr 52 M=VLAN_XLATE; 3632 tr 71 M=VLAN_XLATE TSE=F SLTH=T; 3633 tr 71 M=VLAN_XLATE TSE=T SLTH=T; 3634 tr 71 M=VLAN_XLATE TSE=T SLTH=F; 3635 echo " VRF"; 3636 tr 50 M=VRF; 3637 tr 51 M=VRF; 3638 tr 52 M=VRF; 3639 tr 71 M=VRF TSE=F SLTH=T; 3640 tr 71 M=VRF TSE=T SLTH=T; 3641 tr 71 M=VRF TSE=T SLTH=F; 3642 #echo " XPORT_WC_UCMEM_DATA"; 3643 #tr 50 M=XPORT_WC_UCMEM_DATA; 3644 #tr 51 M=XPORT_WC_UCMEM_DATA; 3645 #tr 52 M=XPORT_WC_UCMEM_DATA; 3646 #tr 71 M=XPORT_WC_UCMEM_DATA TSE=F SLTH=T; 3647 #tr 71 M=XPORT_WC_UCMEM_DATA TSE=T SLTH=T; 3648 #tr 71 M=XPORT_WC_UCMEM_DATA TSE=T SLTH=F; 3649 if $?BCM56X4X_B0 \ 3650 'echo " LLS_L0_ERROR_MIN"; \ 3651 tr 50 M=LLS_L0_ERROR_MIN; \ 3652 tr 51 M=LLS_L0_ERROR_MIN; \ 3653 tr 52 M=LLS_L0_ERROR_MIN; \ 3654 tr 71 M=LLS_L0_ERROR_MIN TSE=F SLTH=T; \ 3655 tr 71 M=LLS_L0_ERROR_MIN TSE=T SLTH=T; \ 3656 tr 71 M=LLS_L0_ERROR_MIN TSE=T SLTH=F; \ 3657 echo " LLS_L1_ERROR_MIN"; \ 3658 tr 50 M=LLS_L1_ERROR_MIN; \ 3659 tr 51 M=LLS_L1_ERROR_MIN; \ 3660 tr 52 M=LLS_L1_ERROR_MIN; \ 3661 tr 71 M=LLS_L1_ERROR_MIN TSE=F SLTH=T; \ 3662 tr 71 M=LLS_L1_ERROR_MIN TSE=T SLTH=T; \ 3663 tr 71 M=LLS_L1_ERROR_MIN TSE=T SLTH=F; \ 3664 echo " LLS_L2_ERROR_MIN"; \ 3665 tr 50 M=LLS_L2_ERROR_MIN; \ 3666 tr 51 M=LLS_L2_ERROR_MIN; \ 3667 tr 52 M=LLS_L2_ERROR_MIN; \ 3668 tr 71 M=LLS_L2_ERROR_MIN TSE=F SLTH=T; \ 3669 tr 71 M=LLS_L2_ERROR_MIN TSE=T SLTH=T; \ 3670 tr 71 M=LLS_L2_ERROR_MIN TSE=T SLTH=F; \ 3671 echo " MMU_TOQ_IPMC_GROUP_TBL0"; \ 3672 tr 50 M=MMU_TOQ_IPMC_GROUP_TBL0; \ 3673 tr 51 M=MMU_TOQ_IPMC_GROUP_TBL0; \ 3674 tr 52 M=MMU_TOQ_IPMC_GROUP_TBL0; \ 3675 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL0 TSE=F SLTH=T; \ 3676 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL0 TSE=T SLTH=T; \ 3677 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL0 TSE=T SLTH=F; \ 3678 echo " MMU_TOQ_IPMC_GROUP_TBL1"; \ 3679 tr 50 M=MMU_TOQ_IPMC_GROUP_TBL1; \ 3680 tr 51 M=MMU_TOQ_IPMC_GROUP_TBL1; \ 3681 tr 52 M=MMU_TOQ_IPMC_GROUP_TBL1; \ 3682 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL1 TSE=F SLTH=T; \ 3683 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL1 TSE=T SLTH=T; \ 3684 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL1 TSE=T SLTH=F; \ 3685 echo " MMU_TOQ_IPMC_GROUP_TBL2"; \ 3686 tr 50 M=MMU_TOQ_IPMC_GROUP_TBL2; \ 3687 tr 51 M=MMU_TOQ_IPMC_GROUP_TBL2; \ 3688 tr 52 M=MMU_TOQ_IPMC_GROUP_TBL2; \ 3689 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL2 TSE=F SLTH=T; \ 3690 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL2 TSE=T SLTH=T; \ 3691 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL2 TSE=T SLTH=F; \ 3692 echo " MMU_TOQ_IPMC_GROUP_TBL3"; \ 3693 tr 50 M=MMU_TOQ_IPMC_GROUP_TBL3; \ 3694 tr 51 M=MMU_TOQ_IPMC_GROUP_TBL3; \ 3695 tr 52 M=MMU_TOQ_IPMC_GROUP_TBL3; \ 3696 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL3 TSE=F SLTH=T; \ 3697 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL3 TSE=T SLTH=T; \ 3698 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL3 TSE=T SLTH=F; \ 3699 echo " MMU_TOQ_IPMC_GROUP_TBL4"; \ 3700 tr 50 M=MMU_TOQ_IPMC_GROUP_TBL4; \ 3701 tr 51 M=MMU_TOQ_IPMC_GROUP_TBL4; \ 3702 tr 52 M=MMU_TOQ_IPMC_GROUP_TBL4; \ 3703 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL4 TSE=F SLTH=T; \ 3704 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL4 TSE=T SLTH=T; \ 3705 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL4 TSE=T SLTH=F; \ 3706 echo " MMU_TOQ_IPMC_GROUP_TBL5"; \ 3707 tr 50 M=MMU_TOQ_IPMC_GROUP_TBL5; \ 3708 tr 51 M=MMU_TOQ_IPMC_GROUP_TBL5; \ 3709 tr 52 M=MMU_TOQ_IPMC_GROUP_TBL5; \ 3710 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL5 TSE=F SLTH=T; \ 3711 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL5 TSE=T SLTH=T; \ 3712 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL5 TSE=T SLTH=F; \ 3713 echo " MMU_TOQ_IPMC_GROUP_TBL6"; \ 3714 tr 50 M=MMU_TOQ_IPMC_GROUP_TBL6; \ 3715 tr 51 M=MMU_TOQ_IPMC_GROUP_TBL6; \ 3716 tr 52 M=MMU_TOQ_IPMC_GROUP_TBL6; \ 3717 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL6 TSE=F SLTH=T; \ 3718 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL6 TSE=T SLTH=T; \ 3719 tr 71 M=MMU_TOQ_IPMC_GROUP_TBL6 TSE=T SLTH=F;' 3720 $done 3721 3722 # Re-initialize to clean up of various read/wrires to MMU memories 3723 set rct=true 3724 config refresh 3725 rcload rc.soc 3726 counter off 3727 l2mode off 3728 linkscan off 3729 3730 echo "Running counter width verification test ..." 3731 tr 30 3732 $done 3733 3734 echo "Running counter read/write test ..." 3735 tr 31 3736 $done 3737 3738 #L2/L3 hashing tests 3739 echo "Running L2 insert/delete/lookup test ..." 3740 tr 32 3741 $done 3742 3743 echo "Running L2 overflow insert test ..." 3744 tr 33 3745 $done 3746 3747 echo "Running L2 hash test ..." 3748 tr 34 3749 $done 3750 3751 echo "Running L2 delete by port test ..." 3752 tr 35 3753 $done 3754 3755 echo "Running L2 delete by vlan test ..." 3756 tr 36 3757 $done 3758 3759 if !$?BCM55440_B0 \ 3760 'echo "Running IPV4 overflow insert test ..."; \ 3761 tr 87 IPMCEnable=False; \ 3762 tr 87 IPMCEnable=True; \ 3763 echo "Running IPV6 hash test ..."; \ 3764 tr 88 IPMCEnable=False; \ 3765 tr 88 IPMCEnable=True; \ 3766 echo "Running IPV6 overflow insert test ..."; \ 3767 tr 85 IPMCEnable=False; \ 3768 tr 85 IPMCEnable=True; \ 3769 echo "Running IPV6 hash test ..." ;\ 3770 tr 86 IPMCEnable=False; \ 3771 tr 86 IPMCEnable=True' 3772 $done 3773 3774 echo "Running VLAN translate overflow insert test ..." 3775 tr 100 3776 3777 echo "Running VLAN translate hash tests ..." 3778 tr 101 hash=0 3779 tr 101 hash=1 3780 tr 101 hash=2 3781 tr 101 hash=3 3782 tr 101 hash=4 3783 tr 101 hash=5 3784 $done 3785 3786 echo "Running Egress VLAN translate overflow insert test ..." 3787 tr 102 3788 $done 3789 3790 echo "Running Egress VLAN translate hash tests ..." 3791 tr 103 hash=0 3792 tr 103 hash=1 3793 tr 103 hash=2 3794 tr 103 hash=3 3795 tr 103 hash=4 3796 tr 103 hash=5 3797 $done 3798 3799 echo "Running MPLS overflow insert test ..." 3800 tr 104 3801 $done 3802 3803 echo "Running MPLS hash tests ..." 3804 tr 105 hash=0 3805 tr 105 hash=1 3806 tr 105 hash=2 3807 tr 105 hash=3 3808 tr 105 hash=4 3809 tr 105 hash=5 3810 $done 3811 3812 echo "Running MDIO Linkscan test" 3813 tr 60 readcount=10000 3814 $done 3815 3816 echo "Testing CPU DMA loopback ..." 3817 tr 17 c=5 3818 $done 3819 3820 echo "Testing CPU DMA, Scatter/Gather Reload ..." 3821 tr 22 3822 $done 3823 3824 echo "Testing CPU DMA, Scatter/Gather Simple ..." 3825 tr 23 3826 $done 3827 3828 echo "Testing CPU DMA, Scatter/Gather Random ..." 3829 tr 24 3830 $done 3831 3832 if !$?BCM56448 \ 3833 'echo " Running MAC Loopback V2 on all ports ..."; \ 3834 tr 48 smi=103 dmi=42 vlan=5 pi=0x11335577 sendm=single;' 3835 $done 3836 3837 if $?BCM56449_A0 || $?BCM56449_B0 \ 3838 'echo "Running MAC Loopback V2 on all ports ..."; \ 3839 tr 48 smi=103 dmi=42 vlan=5 pi=0x11335577 sendm=single pbm=hg; \ 3840 tr 48 smi=103 dmi=42 vlan=5 pi=0x11335577 sendm=single pbm=xe; \ 3841 echo "Running PHY loopback V2 on all ports ..."; \ 3842 tr 49 smi=52 dmi=83 vlan=23 pi=0x01204007 pbm=hg; \ 3843 tr 49 smi=52 dmi=83 vlan=23 pi=0x01204007 pbm=xe;' 3844 $done 3845 3846 if $?BCM56448_A0 || $?BCM56448_B0 \ 3847 'echo "Running MAC Loopback V2 on ge0-ge23 ports ..."; \ 3848 tr 48 smi=103 dmi=42 vlan=5 pi=0x11335577 sendm=single pbm=ge0-ge23; \ 3849 echo "Running PHY loopback V2 on ge0-ge23 ports ..."; \ 3850 tr 49 smi=52 dmi=83 vlan=23 pi=0x01204007 pbm=ge0-ge23;' 3851 $done 3852 3853 if !$?BCM56448 \ 3854 'echo "Running PHY loopback V2 on all ports ..."; \ 3855 tr 49 smi=52 dmi=83 vlan=23 pi=0x01204007;' 3856 $done 3857 3858 #Internal snake Loopback 3859 if !$?SKIP_SNAKE_TEST \ 3860 'echo "Running internal snake on all ports, MAC loopback ..."; \ 3861 tr 39 loopbackmode=mac snakepath=two PBM=e; \ 3862 echo "Running internal snake on all ports, PHY loopback ..."; \ 3863 tr 39 loopbackmode=phy snakepath=two PBM=e;' 3864 $done 3865 3866 if $?BCM56440_A0 || $?BCM56440_B0 || \ 3867 $?BCM55440_A0 || $?BCM55440_B0 || $?BCM55441_A0 || $?BCM55441_B0 \ 3868 'echo "bcm56440 <24GE + 4x HG[13]> tr 18 & tr 19 tests"; \ 3869 tr 18 pbm=ge speed=10; \ 3870 tr 18 pbm=ge speed=100; \ 3871 tr 18 pbm=ge speed=1000; \ 3872 tr 18 pbm=xe speed=10G; \ 3873 tr 18 pbm=hg speed=10G; \ 3874 tr 18 pbm=hg speed=12G; \ 3875 tr 18 pbm=hg speed=MAX; \ 3876 tr 19 pbm=ge speed=10; \ 3877 tr 19 pbm=ge speed=100; \ 3878 tr 19 pbm=ge speed=1000; \ 3879 tr 19 pbm=xe speed=10G; \ 3880 tr 19 pbm=hg speed=10G; \ 3881 tr 19 pbm=hg speed=12G; \ 3882 tr 19 pbm=hg speed=MAX;' 3883 $done 3884 3885 if $?BCM56240_A0 || $?BCM56240_B0 || $?BCM56245_B0 \ 3886 'echo "bcm56440 <2X 10G + 2x HG[13]> tr 18 & tr 19 tests"; \ 3887 tr 18 pbm=hg speed=10G; \ 3888 tr 18 pbm=hg0-hg1 speed=12G; \ 3889 tr 18 pbm=hg speed=MAX; \ 3890 tr 19 pbm=hg speed=10G; \ 3891 tr 19 pbm=hg0-hg1 speed=12G; \ 3892 tr 19 pbm=hg speed=MAX;' 3893 $done 3894 3895 if $?BCM56242_B0 || $?BCM56243_B0 || $?BCM56246_B0\ 3896 'echo "bcm56242 <8X 2.5G + 2x 2.5G> tr 18 & tr 19 tests"; \ 3897 tr 18 pbm=ge speed=100; \ 3898 tr 18 pbm=ge speed=1000; \ 3899 tr 18 pbm=ge speed=2500; \ 3900 tr 19 pbm=ge speed=100; \ 3901 tr 19 pbm=ge speed=1000; \ 3902 tr 19 pbm=ge speed=2500;' 3903 $done 3904 3905 if $?BCM56443_A0 || $?BCM56443_B0 \ 3906 'echo "bcm56443 <8 x 1G/2.5G + 2 x HG[13]> tr 18 & tr 19 tests"; \ 3907 tr 18 pbm=ge speed=10; \ 3908 tr 18 pbm=ge speed=100; \ 3909 tr 18 pbm=ge speed=1000; \ 3910 tr 18 pbm=ge speed=2500; \ 3911 tr 18 pbm=xe speed=10G; \ 3912 tr 18 pbm=hg speed=10G; \ 3913 tr 18 pbm=hg speed=12G; \ 3914 tr 18 pbm=hg speed=MAX; \ 3915 tr 19 pbm=ge speed=10; \ 3916 tr 19 pbm=ge speed=100; \ 3917 tr 19 pbm=ge speed=1000; \ 3918 tr 19 pbm=ge speed=2500; \ 3919 tr 19 pbm=xe speed=10G; \ 3920 tr 19 pbm=hg speed=10G; \ 3921 tr 19 pbm=hg speed=12G; \ 3922 tr 19 pbm=hg speed=MAX;' 3923 $done 3924 3925 if $?BCM56444_A0 || $?BCM56444_B0 \ 3926 'echo "bcm56444 <24FE + 2 x HG[13] + 2 x 2.5HGL> tr 18 & tr 19 tests"; \ 3927 tr 18 pbm=fe speed=10; \ 3928 tr 18 pbm=fe speed=100; \ 3929 tr 18 pbm=ge speed=10; \ 3930 tr 18 pbm=ge speed=100; \ 3931 tr 18 pbm=ge speed=1000; \ 3932 tr 18 pbm=ge speed=2500; \ 3933 tr 18 pbm=xe speed=10G; \ 3934 tr 18 pbm=hg speed=10G; \ 3935 tr 18 pbm=hg speed=12G; \ 3936 tr 18 pbm=hg speed=MAX; \ 3937 tr 19 pbm=fe speed=10; \ 3938 tr 19 pbm=fe speed=100; \ 3939 tr 19 pbm=ge speed=10; \ 3940 tr 19 pbm=ge speed=100; \ 3941 tr 19 pbm=ge speed=1000; \ 3942 tr 19 pbm=ge speed=2500; \ 3943 tr 19 pbm=xe speed=10G; \ 3944 tr 19 pbm=hg speed=10G; \ 3945 tr 19 pbm=hg speed=12G; \ 3946 tr 19 pbm=hg speed=MAX;' 3947 $done 3948 3949 if $?BCM56445_A0 || $?BCM56445_B0 \ 3950 'echo "bcm56445 <24GE + 4x HG[13]> tr 18 & tr 19 tests"; \ 3951 tr 18 pbm=ge speed=10; \ 3952 tr 18 pbm=ge speed=100; \ 3953 tr 18 pbm=ge speed=1000; \ 3954 tr 18 pbm=xe speed=10G; \ 3955 tr 18 pbm=hg speed=10G; \ 3956 tr 18 pbm=hg speed=12G; \ 3957 tr 18 pbm=hg speed=MAX; \ 3958 tr 19 pbm=ge speed=10; \ 3959 tr 19 pbm=ge speed=100; \ 3960 tr 19 pbm=ge speed=1000; \ 3961 tr 19 pbm=xe speed=10G; \ 3962 tr 19 pbm=hg speed=10G; \ 3963 tr 19 pbm=hg speed=12G; \ 3964 tr 19 pbm=hg speed=MAX;' 3965 $done 3966 3967 if $?BCM56449_A0 || $?BCM56449_B0 \ 3968 'echo "bcm56449 < 2 x HG[13] + 2 x 2.5HGL or 4x2.5HGL> tr 18 & tr 19 tests"; \ 3969 tr 18 pbm=xe speed=10G; \ 3970 tr 18 pbm=hg speed=10G; \ 3971 tr 18 pbm=hg speed=12G; \ 3972 tr 18 pbm=hg speed=MAX; \ 3973 tr 19 pbm=xe speed=10G; \ 3974 tr 19 pbm=hg speed=10G; \ 3975 tr 19 pbm=hg speed=12G; \ 3976 tr 19 pbm=hg speed=MAX;' 3977 $done 3978 3979 if $?BCM56249_A0 || $?BCM56249_B0 \ 3980 'echo "bcm56249 <24FE + 2 x HG[13] + 2 x 2.5HGL> tr 18 & tr 19 tests"; \ 3981 tr 18 pbm=ge speed=10; \ 3982 tr 18 pbm=ge speed=100; \ 3983 tr 18 pbm=ge speed=1000; \ 3984 tr 18 pbm=ge speed=2500; \ 3985 tr 18 pbm=xe speed=10G; \ 3986 tr 18 pbm=hg speed=10G; \ 3987 tr 18 pbm=hg speed=12G; \ 3988 tr 18 pbm=hg speed=MAX; \ 3989 tr 19 pbm=ge speed=10; \ 3990 tr 19 pbm=ge speed=100; \ 3991 tr 19 pbm=ge speed=1000; \ 3992 tr 19 pbm=ge speed=2500; \ 3993 tr 19 pbm=xe speed=10G; \ 3994 tr 19 pbm=hg speed=10G; \ 3995 tr 19 pbm=hg speed=12G; \ 3996 tr 19 pbm=hg speed=MAX;' 3997 $done 3998 3999 4000 4001 if $?BCM56241_A0 || $?BCM56241_B0 \ 4002 'echo "bcm56241 <6 x 1G + 2 x 2.5G> tr 18 & tr 19 tests"; \ 4003 tr 18 pbm=ge speed=10; \ 4004 tr 18 pbm=ge speed=100; \ 4005 tr 18 pbm=ge speed=1000; \ 4006 tr 18 pbm=ge3-ge4 speed=2500; \ 4007 tr 18 pbm=xe speed=10G; \ 4008 tr 18 pbm=hg speed=10G; \ 4009 tr 18 pbm=hg speed=12G; \ 4010 tr 18 pbm=hg speed=MAX; \ 4011 tr 19 pbm=ge speed=10; \ 4012 tr 19 pbm=ge speed=100; \ 4013 tr 19 pbm=ge speed=1000; \ 4014 tr 19 pbm=ge3-ge4 speed=2500; \ 4015 tr 19 pbm=xe speed=10G; \ 4016 tr 19 pbm=hg speed=10G; \ 4017 tr 19 pbm=hg speed=12G; \ 4018 tr 19 pbm=hg speed=MAX;' 4019 $done 4020 4021 if $?BCM56448_A0 || $?BCM56448_B0 \ 4022 'echo "bcm56448 <24GE + 4 x 1G/2.5G> tr 18 & tr 19 tests"; \ 4023 tr 18 pbm=ge0-ge23 speed=10; \ 4024 tr 18 pbm=ge0-ge23 speed=100; \ 4025 tr 18 pbm=ge0-ge23 speed=1000; \ 4026 tr 18 pbm=xe speed=10G; \ 4027 tr 18 pbm=hg speed=MAX; \ 4028 tr 19 pbm=ge0-ge23 speed=10; \ 4029 tr 19 pbm=ge0-ge23 speed=100; \ 4030 tr 19 pbm=ge0-ge23 speed=1000; \ 4031 tr 19 pbm=xe speed=10G; \ 4032 tr 19 pbm=hg speed=10G; \ 4033 tr 19 pbm=hg speed=12G; \ 4034 tr 19 pbm=hg speed=MAX;' 4035 $done 4036 4037 if $?BCM56246_A0 || $?BCM56246_B0 \ 4038 'echo "bcm56246 <8x2.5GE + 2x2.5GE> tr 18 & tr 19 tests"; \ 4039 tr 18 pbm=ge speed=100; \ 4040 tr 18 pbm=ge speed=1000; \ 4041 tr 18 pbm=ge speed=2500; \ 4042 tr 19 pbm=ge speed=100; \ 4043 tr 19 pbm=ge speed=1000; \ 4044 tr 19 pbm=ge speed=2500;' 4045 $done 4046 4047 if $?BCM56245_A0 || $?BCM56245_B0 \ 4048 'echo "bcm56245 <[2xXAUI | 4x2.5GE] + 2xHG[13]> tr 18 & tr 19 tests"; \ 4049 tr 18 pbm=ge speed=2500; \ 4050 tr 18 pbm=xe speed=10G; \ 4051 tr 18 pbm=hg speed=10G; \ 4052 tr 18 pbm=hg0-hg1 speed=12G; \ 4053 tr 18 pbm=hg speed=MAX; \ 4054 tr 19 pbm=ge speed=2500; \ 4055 tr 19 pbm=xe speed=10G; \ 4056 tr 19 pbm=hg speed=10G; \ 4057 tr 19 pbm=hg0-hg1 speed=12G; \ 4058 tr 19 pbm=hg speed=MAX;' 4059 $done 4060 4061 4062 #Traffic Test 4063 echo "Running Traffic Test in MAC mode ..." 4064 tr 72 RM=MAC PBM=e 4065 tr 72 RM=MAC PBM=hg 4066 $done 4067 4068 echo "Running Traffic Test in PHY mode ..." 4069 tr 72 RM=PHY PBM=e 4070 tr 72 RM=PHY PBM=hg 4071 $done 4072 4073 #SNMP 4074 echo "SNMP MIB Object Test" 4075 tr 73 4076 $done 4077 4078 #Reload Test 4079 echo "TX Reload Test" 4080 tr 90 4081 $done 4082 4083 echo "RX Reload Test" 4084 tr 91 4085 $done 4086 4087 set rct=false; 4088 if $?BCM56440 \ 4089 'echo "DDR memory Test"; \ 4090 ddrphytune ci0,ci2 plot=false pt=1; \ 4091 tr 53' 4092 $done 4093 4094 # Show status 4095 date 4096 tl 4097 local returnCode $? 4098 4099 echo Tests Complete. Reinitializing ... 4100 set rct=true 4101 config refresh 4102 rcload rc.soc 4103 counter off 4104 l2mode off 4105 4106 # We want to show the return code from the tl command which 4107 # lists the results. The automated test infrastructure keys off of this 4108 # value 4109 echo "testsuite: finished: sanity: $returnCode"