husanity.soc (45240B)
1 # 2 # This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 3 # 4 # Copyright 2007-2019 Broadcom Inc. All rights reserved. 5 6 # Hurricane (BCM56142) Sanity 7 # 8 # Script to run all available tests as quickly as possible. 9 # For testing basic sanity of new drivers, simulators, chips, etc. 10 # 11 12 if $?BCM56142_A0 \ 13 'local BCM56142 1' 14 if $?BCM56143_A0 \ 15 'local BCM56143 1' 16 if $?BCM56144_A0 \ 17 'local BCM56144 1' 18 if $?BCM56146_A0 \ 19 'local BCM56146 1' 20 if $?BCM56147_A0 \ 21 'local BCM56147 1' 22 if $?BCM56149_A0 \ 23 'local BCM56149 1' 24 25 echo "testsuite: started: sanity" 26 rcload rc.soc 27 counter off 28 l2mode off 29 30 # We need to print out port status since any cabling effects results. 31 *:ps 32 33 # Avoid link messages while testing 34 linkscan off 35 36 init 37 init misc 38 init mmu 39 40 local done 'echo " Done"' 41 42 # Set run command script not to fail on errors reported by commands 43 # this allows the script to continue if a test fails 44 set rcerror=false 45 46 # Set up test mode: don't stop on errors, show progress on each test 47 tm -stoponerror +progress 48 # Unselect all 49 ts -* 50 51 #Display some useful information 52 date 53 ver 54 soc 55 56 #Start Test 57 echo "Running PCI S-Channel Buf ..." 58 tr 4 59 $done 60 61 echo "Running Register reset defaults ..." 62 tr 1 63 $done 64 65 echo "Running Register read/write ..." 66 tr 3 mask64 67 $done 68 69 init soc; init misc; init mmu; 70 #Clean up after register read/write test. 71 72 rcload rc.soc 73 counter off 74 l2mode off 75 echo "Running CPU Benchmarks ..." 76 tr 21 77 $done 78 linkscan off 79 80 init soc; init mmu; 81 set rct=false 82 83 echo "Running Switching Memory Tests ..." 84 85 echo " ALTERNATE_EMIRROR_BITMAP"; 86 tr 50 M=ALTERNATE_EMIRROR_BITMAP; 87 tr 51 M=ALTERNATE_EMIRROR_BITMAP; 88 tr 52 M=ALTERNATE_EMIRROR_BITMAP; 89 tr 71 M=ALTERNATE_EMIRROR_BITMAP TSE=F SLTH=T; 90 tr 71 M=ALTERNATE_EMIRROR_BITMAP TSE=T SLTH=T; 91 tr 71 M=ALTERNATE_EMIRROR_BITMAP TSE=T SLTH=F; 92 echo " CPU_COS_MAP"; 93 tr 50 M=CPU_COS_MAP; 94 tr 51 M=CPU_COS_MAP; 95 tr 52 M=CPU_COS_MAP; 96 tr 71 M=CPU_COS_MAP TSE=F SLTH=T; 97 tr 71 M=CPU_COS_MAP TSE=T SLTH=T; 98 tr 71 M=CPU_COS_MAP TSE=T SLTH=F; 99 echo " CPU_COS_MAP_DATA_ONLY"; 100 tr 50 M=CPU_COS_MAP_DATA_ONLY; 101 tr 51 M=CPU_COS_MAP_DATA_ONLY; 102 tr 52 M=CPU_COS_MAP_DATA_ONLY; 103 tr 71 M=CPU_COS_MAP_DATA_ONLY TSE=F SLTH=T; 104 tr 71 M=CPU_COS_MAP_DATA_ONLY TSE=T SLTH=T; 105 tr 71 M=CPU_COS_MAP_DATA_ONLY TSE=T SLTH=F; 106 echo " CPU_COS_MAP_ONLY"; 107 tr 50 M=CPU_COS_MAP_ONLY; 108 tr 51 M=CPU_COS_MAP_ONLY; 109 tr 52 M=CPU_COS_MAP_ONLY; 110 tr 71 M=CPU_COS_MAP_ONLY TSE=F SLTH=T; 111 tr 71 M=CPU_COS_MAP_ONLY TSE=T SLTH=T; 112 tr 71 M=CPU_COS_MAP_ONLY TSE=T SLTH=F; 113 echo " CPU_TS_MAP"; 114 tr 50 M=CPU_TS_MAP; 115 tr 51 M=CPU_TS_MAP; 116 tr 52 M=CPU_TS_MAP; 117 tr 71 M=CPU_TS_MAP TSE=F SLTH=T; 118 tr 71 M=CPU_TS_MAP TSE=T SLTH=T; 119 tr 71 M=CPU_TS_MAP TSE=T SLTH=F; 120 echo " DSCP_TABLE"; 121 tr 50 M=DSCP_TABLE; 122 tr 51 M=DSCP_TABLE; 123 tr 52 M=DSCP_TABLE; 124 tr 71 M=DSCP_TABLE TSE=F SLTH=T; 125 tr 71 M=DSCP_TABLE TSE=T SLTH=T; 126 tr 71 M=DSCP_TABLE TSE=T SLTH=F; 127 echo " EGR_DSCP_ECN_MAP"; 128 tr 50 M=EGR_DSCP_ECN_MAP; 129 tr 51 M=EGR_DSCP_ECN_MAP; 130 tr 52 M=EGR_DSCP_ECN_MAP; 131 tr 71 M=EGR_DSCP_ECN_MAP TSE=F SLTH=T; 132 tr 71 M=EGR_DSCP_ECN_MAP TSE=T SLTH=T; 133 tr 71 M=EGR_DSCP_ECN_MAP TSE=T SLTH=F; 134 echo " EGR_DSCP_TABLE"; 135 tr 50 M=EGR_DSCP_TABLE; 136 tr 51 M=EGR_DSCP_TABLE; 137 tr 52 M=EGR_DSCP_TABLE; 138 tr 71 M=EGR_DSCP_TABLE TSE=F SLTH=T; 139 tr 71 M=EGR_DSCP_TABLE TSE=T SLTH=T; 140 tr 71 M=EGR_DSCP_TABLE TSE=T SLTH=F; 141 echo " EGR_EINITBUF_DATA_RAM_0"; 142 tr 50 M=EGR_EINITBUF_DATA_RAM_0; 143 tr 51 M=EGR_EINITBUF_DATA_RAM_0; 144 tr 52 M=EGR_EINITBUF_DATA_RAM_0; 145 tr 71 M=EGR_EINITBUF_DATA_RAM_0 TSE=F SLTH=T; 146 tr 71 M=EGR_EINITBUF_DATA_RAM_0 TSE=T SLTH=T; 147 tr 71 M=EGR_EINITBUF_DATA_RAM_0 TSE=T SLTH=F; 148 echo " EGR_EINITBUF_DATA_RAM_1"; 149 tr 50 M=EGR_EINITBUF_DATA_RAM_1; 150 tr 51 M=EGR_EINITBUF_DATA_RAM_1; 151 tr 52 M=EGR_EINITBUF_DATA_RAM_1; 152 tr 71 M=EGR_EINITBUF_DATA_RAM_1 TSE=F SLTH=T; 153 tr 71 M=EGR_EINITBUF_DATA_RAM_1 TSE=T SLTH=T; 154 tr 71 M=EGR_EINITBUF_DATA_RAM_1 TSE=T SLTH=F; 155 echo " EGR_EINITBUF_DATA_RAM_2"; 156 tr 50 M=EGR_EINITBUF_DATA_RAM_2; 157 tr 51 M=EGR_EINITBUF_DATA_RAM_2; 158 tr 52 M=EGR_EINITBUF_DATA_RAM_2; 159 tr 71 M=EGR_EINITBUF_DATA_RAM_2 TSE=F SLTH=T; 160 tr 71 M=EGR_EINITBUF_DATA_RAM_2 TSE=T SLTH=T; 161 tr 71 M=EGR_EINITBUF_DATA_RAM_2 TSE=T SLTH=F; 162 echo " EGR_EINITBUF_DATA_RAM_3"; 163 tr 50 M=EGR_EINITBUF_DATA_RAM_3; 164 tr 51 M=EGR_EINITBUF_DATA_RAM_3; 165 tr 52 M=EGR_EINITBUF_DATA_RAM_3; 166 tr 71 M=EGR_EINITBUF_DATA_RAM_3 TSE=F SLTH=T; 167 tr 71 M=EGR_EINITBUF_DATA_RAM_3 TSE=T SLTH=T; 168 tr 71 M=EGR_EINITBUF_DATA_RAM_3 TSE=T SLTH=F; 169 echo " EGR_EINITBUF_ECC_RAM"; 170 tr 50 M=EGR_EINITBUF_ECC_RAM; 171 tr 51 M=EGR_EINITBUF_ECC_RAM; 172 tr 52 M=EGR_EINITBUF_ECC_RAM; 173 tr 71 M=EGR_EINITBUF_ECC_RAM TSE=F SLTH=T; 174 tr 71 M=EGR_EINITBUF_ECC_RAM TSE=T SLTH=T; 175 tr 71 M=EGR_EINITBUF_ECC_RAM TSE=T SLTH=F; 176 echo " EGR_EM_MTP_INDEX"; 177 tr 50 M=EGR_EM_MTP_INDEX; 178 tr 51 M=EGR_EM_MTP_INDEX; 179 tr 52 M=EGR_EM_MTP_INDEX; 180 tr 71 M=EGR_EM_MTP_INDEX TSE=F SLTH=T; 181 tr 71 M=EGR_EM_MTP_INDEX TSE=T SLTH=T; 182 tr 71 M=EGR_EM_MTP_INDEX TSE=T SLTH=F; 183 echo " EGR_ERSPAN"; 184 tr 50 M=EGR_ERSPAN; 185 tr 51 M=EGR_ERSPAN; 186 tr 52 M=EGR_ERSPAN; 187 tr 71 M=EGR_ERSPAN TSE=F SLTH=T; 188 tr 71 M=EGR_ERSPAN TSE=T SLTH=T; 189 tr 71 M=EGR_ERSPAN TSE=T SLTH=F; 190 echo " EGR_IM_MTP_INDEX"; 191 tr 50 M=EGR_IM_MTP_INDEX; 192 tr 51 M=EGR_IM_MTP_INDEX; 193 tr 52 M=EGR_IM_MTP_INDEX; 194 tr 71 M=EGR_IM_MTP_INDEX TSE=F SLTH=T; 195 tr 71 M=EGR_IM_MTP_INDEX TSE=T SLTH=T; 196 tr 71 M=EGR_IM_MTP_INDEX TSE=T SLTH=F; 197 echo " EGR_L3_INTF"; 198 tr 50 M=EGR_L3_INTF; 199 tr 51 M=EGR_L3_INTF; 200 tr 52 M=EGR_L3_INTF; 201 tr 71 M=EGR_L3_INTF TSE=F SLTH=T; 202 tr 71 M=EGR_L3_INTF TSE=T SLTH=T; 203 tr 71 M=EGR_L3_INTF TSE=T SLTH=F; 204 echo " EGR_L3_NEXT_HOP"; 205 tr 50 M=EGR_L3_NEXT_HOP; 206 tr 51 M=EGR_L3_NEXT_HOP; 207 tr 52 M=EGR_L3_NEXT_HOP; 208 tr 71 M=EGR_L3_NEXT_HOP TSE=F SLTH=T; 209 tr 71 M=EGR_L3_NEXT_HOP TSE=T SLTH=T; 210 tr 71 M=EGR_L3_NEXT_HOP TSE=T SLTH=F; 211 echo " EGR_MASK"; 212 tr 50 M=EGR_MASK; 213 tr 51 M=EGR_MASK; 214 tr 52 M=EGR_MASK; 215 tr 71 M=EGR_MASK TSE=F SLTH=T; 216 tr 71 M=EGR_MASK TSE=T SLTH=T; 217 tr 71 M=EGR_MASK TSE=T SLTH=F; 218 echo " EGR_MOD_MAP_TABLE"; 219 tr 50 M=EGR_MOD_MAP_TABLE; 220 tr 51 M=EGR_MOD_MAP_TABLE; 221 tr 52 M=EGR_MOD_MAP_TABLE; 222 tr 71 M=EGR_MOD_MAP_TABLE TSE=F SLTH=T; 223 tr 71 M=EGR_MOD_MAP_TABLE TSE=T SLTH=T; 224 tr 71 M=EGR_MOD_MAP_TABLE TSE=T SLTH=F; 225 echo " EGR_MPLS_PRI_MAPPING"; 226 tr 50 M=EGR_MPLS_PRI_MAPPING; 227 tr 51 M=EGR_MPLS_PRI_MAPPING; 228 tr 52 M=EGR_MPLS_PRI_MAPPING; 229 tr 71 M=EGR_MPLS_PRI_MAPPING TSE=F SLTH=T; 230 tr 71 M=EGR_MPLS_PRI_MAPPING TSE=T SLTH=T; 231 tr 71 M=EGR_MPLS_PRI_MAPPING TSE=T SLTH=F; 232 233 echo " EGR_PBE_DEBUG"; 234 #tr 50 M=EGR_PBE_DEBUG; # EGR_PBE_DEBUG table is NOTEST; 235 #tr 51 M=EGR_PBE_DEBUG; # EGR_PBE_DEBUG table is NOTEST; 236 #tr 52 M=EGR_PBE_DEBUG; # EGR_PBE_DEBUG table is NOTEST; 237 #tr 71 M=EGR_PBE_DEBUG TSE=F SLTH=T; # EGR_PBE_DEBUG table is NOTEST; 238 #tr 71 M=EGR_PBE_DEBUG TSE=T SLTH=T; # EGR_PBE_DEBUG table is NOTEST; 239 #tr 71 M=EGR_PBE_DEBUG TSE=T SLTH=F; # EGR_PBE_DEBUG table is NOTEST; 240 echo " EGR_PERQ_XMT_COUNTERS"; 241 tr 50 M=EGR_PERQ_XMT_COUNTERS; 242 tr 51 M=EGR_PERQ_XMT_COUNTERS; 243 tr 52 M=EGR_PERQ_XMT_COUNTERS; 244 tr 71 M=EGR_PERQ_XMT_COUNTERS TSE=F SLTH=T; 245 tr 71 M=EGR_PERQ_XMT_COUNTERS TSE=T SLTH=T; 246 tr 71 M=EGR_PERQ_XMT_COUNTERS TSE=T SLTH=F; 247 echo " EGR_PRI_CNG_MAP"; 248 tr 50 M=EGR_PRI_CNG_MAP; 249 tr 51 M=EGR_PRI_CNG_MAP; 250 tr 52 M=EGR_PRI_CNG_MAP; 251 tr 71 M=EGR_PRI_CNG_MAP TSE=F SLTH=T; 252 tr 71 M=EGR_PRI_CNG_MAP TSE=T SLTH=T; 253 tr 71 M=EGR_PRI_CNG_MAP TSE=T SLTH=F; 254 echo " EGR_VLAN"; 255 tr 50 M=EGR_VLAN; 256 tr 51 M=EGR_VLAN; 257 tr 52 M=EGR_VLAN; 258 tr 71 M=EGR_VLAN TSE=F SLTH=T; 259 tr 71 M=EGR_VLAN TSE=T SLTH=T; 260 tr 71 M=EGR_VLAN TSE=T SLTH=F; 261 echo " EGR_VLAN_STG"; 262 tr 50 M=EGR_VLAN_STG; 263 tr 51 M=EGR_VLAN_STG; 264 tr 52 M=EGR_VLAN_STG; 265 tr 71 M=EGR_VLAN_STG TSE=F SLTH=T; 266 tr 71 M=EGR_VLAN_STG TSE=T SLTH=T; 267 tr 71 M=EGR_VLAN_STG TSE=T SLTH=F; 268 echo " EGR_VLAN_TAG_ACTION_PROFILE"; 269 tr 50 M=EGR_VLAN_TAG_ACTION_PROFILE; 270 tr 51 M=EGR_VLAN_TAG_ACTION_PROFILE; 271 tr 52 M=EGR_VLAN_TAG_ACTION_PROFILE; 272 tr 71 M=EGR_VLAN_TAG_ACTION_PROFILE TSE=F SLTH=T; 273 tr 71 M=EGR_VLAN_TAG_ACTION_PROFILE TSE=T SLTH=T; 274 tr 71 M=EGR_VLAN_TAG_ACTION_PROFILE TSE=T SLTH=F; 275 echo " EGR_VLAN_XLATE"; 276 tr 50 M=EGR_VLAN_XLATE; 277 tr 51 M=EGR_VLAN_XLATE; 278 tr 52 M=EGR_VLAN_XLATE; 279 tr 71 M=EGR_VLAN_XLATE TSE=F SLTH=T; 280 tr 71 M=EGR_VLAN_XLATE TSE=T SLTH=T; 281 tr 71 M=EGR_VLAN_XLATE TSE=T SLTH=F; 282 echo " EGR_VLAN_XLATE_SCRATCH"; 283 tr 50 M=EGR_VLAN_XLATE_SCRATCH; 284 #tr 51 M=EGR_VLAN_XLATE_SCRATCH # test not supported on single-entry tables; 285 #tr 52 M=EGR_VLAN_XLATE_SCRATCH # test not supported on single-entry tables; 286 tr 71 M=EGR_VLAN_XLATE_SCRATCH TSE=F SLTH=T; 287 tr 71 M=EGR_VLAN_XLATE_SCRATCH TSE=T SLTH=T; 288 tr 71 M=EGR_VLAN_XLATE_SCRATCH TSE=T SLTH=F; 289 echo " EM_MTP_INDEX"; 290 tr 50 M=EM_MTP_INDEX; 291 tr 51 M=EM_MTP_INDEX; 292 tr 52 M=EM_MTP_INDEX; 293 tr 71 M=EM_MTP_INDEX TSE=F SLTH=T; 294 tr 71 M=EM_MTP_INDEX TSE=T SLTH=T; 295 tr 71 M=EM_MTP_INDEX TSE=T SLTH=F; 296 echo " FP_COUNTER_TABLE"; 297 tr 50 M=FP_COUNTER_TABLE; 298 tr 51 M=FP_COUNTER_TABLE; 299 tr 52 M=FP_COUNTER_TABLE; 300 tr 71 M=FP_COUNTER_TABLE TSE=F SLTH=T; 301 tr 71 M=FP_COUNTER_TABLE TSE=T SLTH=T; 302 tr 71 M=FP_COUNTER_TABLE TSE=T SLTH=F; 303 echo " FP_GLOBAL_MASK_TCAM"; 304 tr 50 M=FP_GLOBAL_MASK_TCAM; 305 tr 51 M=FP_GLOBAL_MASK_TCAM; 306 tr 52 M=FP_GLOBAL_MASK_TCAM; 307 tr 71 M=FP_GLOBAL_MASK_TCAM TSE=F SLTH=T; 308 tr 71 M=FP_GLOBAL_MASK_TCAM TSE=T SLTH=T; 309 tr 71 M=FP_GLOBAL_MASK_TCAM TSE=T SLTH=F; 310 echo " FP_METER_TABLE"; 311 tr 50 M=FP_METER_TABLE; 312 tr 51 M=FP_METER_TABLE; 313 tr 52 M=FP_METER_TABLE; 314 tr 71 M=FP_METER_TABLE TSE=F SLTH=T; 315 tr 71 M=FP_METER_TABLE TSE=T SLTH=T; 316 tr 71 M=FP_METER_TABLE TSE=T SLTH=F; 317 echo " FP_POLICY_TABLE"; 318 tr 50 M=FP_POLICY_TABLE; 319 tr 51 M=FP_POLICY_TABLE; 320 tr 52 M=FP_POLICY_TABLE; 321 tr 71 M=FP_POLICY_TABLE TSE=F SLTH=T; 322 tr 71 M=FP_POLICY_TABLE TSE=T SLTH=T; 323 tr 71 M=FP_POLICY_TABLE TSE=T SLTH=F; 324 echo " FP_PORT_FIELD_SEL"; 325 tr 50 M=FP_PORT_FIELD_SEL; 326 tr 51 M=FP_PORT_FIELD_SEL; 327 tr 52 M=FP_PORT_FIELD_SEL; 328 tr 71 M=FP_PORT_FIELD_SEL TSE=F SLTH=T; 329 tr 71 M=FP_PORT_FIELD_SEL TSE=T SLTH=T; 330 tr 71 M=FP_PORT_FIELD_SEL TSE=T SLTH=F; 331 echo " FP_PORT_METER_MAP"; 332 tr 50 M=FP_PORT_METER_MAP; 333 tr 51 M=FP_PORT_METER_MAP; 334 tr 52 M=FP_PORT_METER_MAP; 335 tr 71 M=FP_PORT_METER_MAP TSE=F SLTH=T; 336 tr 71 M=FP_PORT_METER_MAP TSE=T SLTH=T; 337 tr 71 M=FP_PORT_METER_MAP TSE=T SLTH=F; 338 echo " FP_RANGE_CHECK"; 339 tr 50 M=FP_RANGE_CHECK; 340 tr 51 M=FP_RANGE_CHECK; 341 tr 52 M=FP_RANGE_CHECK; 342 tr 71 M=FP_RANGE_CHECK TSE=F SLTH=T; 343 tr 71 M=FP_RANGE_CHECK TSE=T SLTH=T; 344 tr 71 M=FP_RANGE_CHECK TSE=T SLTH=F; 345 echo " FP_SLICE_KEY_CONTROL"; 346 tr 50 M=FP_SLICE_KEY_CONTROL; 347 #tr 51 M=FP_SLICE_KEY_CONTROL # test not supported on single-entry tables; 348 #TR 52 m=fp_slice_key_cONTROL # test not supported on single-entry tables; 349 tr 71 M=FP_SLICE_KEY_CONTROL TSE=F SLTH=T; 350 tr 71 M=FP_SLICE_KEY_CONTROL TSE=T SLTH=T; 351 tr 71 M=FP_SLICE_KEY_CONTROL TSE=T SLTH=F; 352 echo " FP_SLICE_MAP"; 353 tr 50 M=FP_SLICE_MAP; 354 #tr 51 M=FP_SLICE_MAP # test not supported on single-entry tables; 355 #tr 52 M=FP_SLICE_MAP # test not supported on single-entry tables; 356 tr 71 M=FP_SLICE_MAP TSE=F SLTH=T; 357 tr 71 M=FP_SLICE_MAP TSE=T SLTH=T; 358 tr 71 M=FP_SLICE_MAP TSE=T SLTH=F; 359 echo " FP_STORM_CONTROL_METERS"; 360 tr 50 M=FP_STORM_CONTROL_METERS; 361 tr 51 M=FP_STORM_CONTROL_METERS; 362 tr 52 M=FP_STORM_CONTROL_METERS; 363 tr 71 M=FP_STORM_CONTROL_METERS TSE=F SLTH=T; 364 tr 71 M=FP_STORM_CONTROL_METERS TSE=T SLTH=T; 365 tr 71 M=FP_STORM_CONTROL_METERS TSE=T SLTH=F; 366 echo " FP_TCAM"; 367 tr 50 M=FP_TCAM; 368 tr 51 M=FP_TCAM; 369 tr 52 M=FP_TCAM; 370 tr 71 M=FP_TCAM TSE=F SLTH=T; 371 tr 71 M=FP_TCAM TSE=T SLTH=T; 372 tr 71 M=FP_TCAM TSE=T SLTH=F; 373 echo " FP_UDF_OFFSET"; 374 tr 50 M=FP_UDF_OFFSET; 375 tr 51 M=FP_UDF_OFFSET; 376 tr 52 M=FP_UDF_OFFSET; 377 tr 71 M=FP_UDF_OFFSET TSE=F SLTH=T; 378 tr 71 M=FP_UDF_OFFSET TSE=T SLTH=T; 379 tr 71 M=FP_UDF_OFFSET TSE=T SLTH=F; 380 echo " HG_TRUNK_FAILOVER_SET"; 381 tr 50 M=HG_TRUNK_FAILOVER_SET; 382 tr 51 M=HG_TRUNK_FAILOVER_SET; 383 tr 52 M=HG_TRUNK_FAILOVER_SET; 384 tr 71 M=HG_TRUNK_FAILOVER_SET TSE=F SLTH=T; 385 tr 71 M=HG_TRUNK_FAILOVER_SET TSE=T SLTH=T; 386 tr 71 M=HG_TRUNK_FAILOVER_SET TSE=T SLTH=F; 387 echo " IARB_TDM_TABLE"; 388 tr 50 M=IARB_TDM_TABLE; 389 tr 51 M=IARB_TDM_TABLE; 390 tr 52 M=IARB_TDM_TABLE; 391 tr 71 M=IARB_TDM_TABLE TSE=F SLTH=T; 392 tr 71 M=IARB_TDM_TABLE TSE=T SLTH=T; 393 tr 71 M=IARB_TDM_TABLE TSE=T SLTH=F; 394 echo " IFP_PORT_FIELD_SEL"; 395 tr 50 M=IFP_PORT_FIELD_SEL IS=0 IE=0; 396 #tr 51 M=IFP_PORT_FIELD_SEL IS=0 IE=0; 397 #tr 52 M=IFP_PORT_FIELD_SEL IS=0 IE=0; 398 tr 71 M=IFP_PORT_FIELD_SEL S=0 C=1 TSE=F SLTH=T; 399 tr 71 M=IFP_PORT_FIELD_SEL S=0 C=1 TSE=T SLTH=T; 400 tr 71 M=IFP_PORT_FIELD_SEL S=0 C=1 TSE=T SLTH=F; 401 echo " IFP_REDIRECTION_PROFILE"; 402 tr 50 M=IFP_REDIRECTION_PROFILE; 403 tr 51 M=IFP_REDIRECTION_PROFILE; 404 tr 52 M=IFP_REDIRECTION_PROFILE; 405 tr 71 M=IFP_REDIRECTION_PROFILE TSE=F SLTH=T; 406 tr 71 M=IFP_REDIRECTION_PROFILE TSE=T SLTH=T; 407 tr 71 M=IFP_REDIRECTION_PROFILE TSE=T SLTH=F; 408 echo " IM_MTP_INDEX"; 409 tr 50 M=IM_MTP_INDEX; 410 tr 51 M=IM_MTP_INDEX; 411 tr 52 M=IM_MTP_INDEX; 412 tr 71 M=IM_MTP_INDEX TSE=F SLTH=T; 413 tr 71 M=IM_MTP_INDEX TSE=T SLTH=T; 414 tr 71 M=IM_MTP_INDEX TSE=T SLTH=F; 415 echo " ING_L3_NEXT_HOP"; 416 tr 50 M=ING_L3_NEXT_HOP; 417 tr 51 M=ING_L3_NEXT_HOP; 418 tr 52 M=ING_L3_NEXT_HOP; 419 tr 71 M=ING_L3_NEXT_HOP TSE=F SLTH=T; 420 tr 71 M=ING_L3_NEXT_HOP TSE=T SLTH=T; 421 tr 71 M=ING_L3_NEXT_HOP TSE=T SLTH=F; 422 echo " ING_MOD_MAP_TABLE"; 423 tr 50 M=ING_MOD_MAP_TABLE; 424 tr 51 M=ING_MOD_MAP_TABLE; 425 tr 52 M=ING_MOD_MAP_TABLE; 426 tr 71 M=ING_MOD_MAP_TABLE TSE=F SLTH=T; 427 tr 71 M=ING_MOD_MAP_TABLE TSE=T SLTH=T; 428 tr 71 M=ING_MOD_MAP_TABLE TSE=T SLTH=F; 429 echo " ING_PRI_CNG_MAP"; 430 tr 50 M=ING_PRI_CNG_MAP; 431 tr 51 M=ING_PRI_CNG_MAP; 432 tr 52 M=ING_PRI_CNG_MAP; 433 tr 71 M=ING_PRI_CNG_MAP TSE=F SLTH=T; 434 tr 71 M=ING_PRI_CNG_MAP TSE=T SLTH=T; 435 tr 71 M=ING_PRI_CNG_MAP TSE=T SLTH=F; 436 echo " ING_VLAN_RANGE"; 437 tr 50 M=ING_VLAN_RANGE; 438 tr 51 M=ING_VLAN_RANGE; 439 tr 52 M=ING_VLAN_RANGE; 440 tr 71 M=ING_VLAN_RANGE TSE=F SLTH=T; 441 tr 71 M=ING_VLAN_RANGE TSE=T SLTH=T; 442 tr 71 M=ING_VLAN_RANGE TSE=T SLTH=F; 443 echo " ING_VLAN_TAG_ACTION_PROFILE"; 444 tr 50 M=ING_VLAN_TAG_ACTION_PROFILE; 445 tr 51 M=ING_VLAN_TAG_ACTION_PROFILE; 446 tr 52 M=ING_VLAN_TAG_ACTION_PROFILE; 447 tr 71 M=ING_VLAN_TAG_ACTION_PROFILE TSE=F SLTH=T; 448 tr 71 M=ING_VLAN_TAG_ACTION_PROFILE TSE=T SLTH=T; 449 tr 71 M=ING_VLAN_TAG_ACTION_PROFILE TSE=T SLTH=F; 450 echo " INITIAL_ING_L3_NEXT_HOP"; 451 tr 50 M=INITIAL_ING_L3_NEXT_HOP; 452 tr 51 M=INITIAL_ING_L3_NEXT_HOP; 453 tr 52 M=INITIAL_ING_L3_NEXT_HOP; 454 tr 71 M=INITIAL_ING_L3_NEXT_HOP TSE=F SLTH=T; 455 tr 71 M=INITIAL_ING_L3_NEXT_HOP TSE=T SLTH=T; 456 tr 71 M=INITIAL_ING_L3_NEXT_HOP TSE=T SLTH=F; 457 echo " IPORT_TABLE"; 458 tr 50 M=IPORT_TABLE; 459 tr 51 M=IPORT_TABLE; 460 tr 52 M=IPORT_TABLE; 461 tr 71 M=IPORT_TABLE TSE=F SLTH=T; 462 tr 71 M=IPORT_TABLE TSE=T SLTH=T; 463 tr 71 M=IPORT_TABLE TSE=T SLTH=F; 464 echo " IPV4_IN_IPV6_PREFIX_MATCH_TABLE"; 465 tr 50 M=IPV4_IN_IPV6_PREFIX_MATCH_TABLE; 466 tr 51 M=IPV4_IN_IPV6_PREFIX_MATCH_TABLE; 467 tr 52 M=IPV4_IN_IPV6_PREFIX_MATCH_TABLE; 468 tr 71 M=IPV4_IN_IPV6_PREFIX_MATCH_TABLE TSE=F SLTH=T; 469 tr 71 M=IPV4_IN_IPV6_PREFIX_MATCH_TABLE TSE=T SLTH=T; 470 tr 71 M=IPV4_IN_IPV6_PREFIX_MATCH_TABLE TSE=T SLTH=F; 471 echo " IPV6_PROXY_ENABLE_TABLE"; 472 tr 50 M=IPV6_PROXY_ENABLE_TABLE; 473 tr 51 M=IPV6_PROXY_ENABLE_TABLE; 474 tr 52 M=IPV6_PROXY_ENABLE_TABLE; 475 tr 71 M=IPV6_PROXY_ENABLE_TABLE TSE=F SLTH=T; 476 tr 71 M=IPV6_PROXY_ENABLE_TABLE TSE=T SLTH=T; 477 tr 71 M=IPV6_PROXY_ENABLE_TABLE TSE=T SLTH=F; 478 echo " L2MC"; 479 tr 50 M=L2MC; 480 tr 51 M=L2MC; 481 tr 52 M=L2MC; 482 tr 71 M=L2MC TSE=F SLTH=T; 483 tr 71 M=L2MC TSE=T SLTH=T; 484 tr 71 M=L2MC TSE=T SLTH=F; 485 echo " L2X"; 486 tr 50 M=L2X; 487 tr 51 M=L2X; 488 tr 52 M=L2X; 489 tr 71 M=L2X TSE=F SLTH=T; 490 tr 71 M=L2X TSE=T SLTH=T; 491 tr 71 M=L2X TSE=T SLTH=F; 492 echo " L2_ENTRY_ONLY"; 493 tr 50 M=L2_ENTRY_ONLY; 494 tr 51 M=L2_ENTRY_ONLY; 495 tr 52 M=L2_ENTRY_ONLY; 496 tr 71 M=L2_ENTRY_ONLY TSE=F SLTH=T; 497 tr 71 M=L2_ENTRY_ONLY TSE=T SLTH=T; 498 tr 71 M=L2_ENTRY_ONLY TSE=T SLTH=F; 499 echo " L2_ENTRY_OVERFLOW"; 500 tr 50 M=L2_ENTRY_OVERFLOW; 501 #tr 51 M=L2_ENTRY_OVERFLOW # test not supported on single-entry tables; 502 #tr 52 M=L2_ENTRY_OVERFLOW # test not supported on single-entry tables; 503 tr 71 M=L2_ENTRY_OVERFLOW TSE=F SLTH=T; 504 tr 71 M=L2_ENTRY_OVERFLOW TSE=T SLTH=T; 505 tr 71 M=L2_ENTRY_OVERFLOW TSE=T SLTH=F; 506 echo " L2_ENTRY_SCRATCH"; 507 tr 50 M=L2_ENTRY_SCRATCH; 508 #tr 51 M=L2_ENTRY_SCRATCH # test not supported on single-entry tables; 509 #tr 52 M=L2_ENTRY_SCRATCH # test not supported on single-entry tables; 510 tr 71 M=L2_ENTRY_SCRATCH TSE=F SLTH=T; 511 tr 71 M=L2_ENTRY_SCRATCH TSE=T SLTH=T; 512 tr 71 M=L2_ENTRY_SCRATCH TSE=T SLTH=F; 513 echo " L2_HITDA_ONLY"; 514 tr 50 M=L2_HITDA_ONLY; 515 tr 51 M=L2_HITDA_ONLY; 516 tr 52 M=L2_HITDA_ONLY; 517 tr 71 M=L2_HITDA_ONLY TSE=F SLTH=T; 518 tr 71 M=L2_HITDA_ONLY TSE=T SLTH=T; 519 tr 71 M=L2_HITDA_ONLY TSE=T SLTH=F; 520 echo " L2_HITSA_ONLY"; 521 tr 50 M=L2_HITSA_ONLY; 522 tr 51 M=L2_HITSA_ONLY; 523 tr 52 M=L2_HITSA_ONLY; 524 tr 71 M=L2_HITSA_ONLY TSE=F SLTH=T; 525 tr 71 M=L2_HITSA_ONLY TSE=T SLTH=T; 526 tr 71 M=L2_HITSA_ONLY TSE=T SLTH=F; 527 echo " L2_MOD_FIFO"; 528 tr 50 M=L2_MOD_FIFO; 529 tr 51 M=L2_MOD_FIFO; 530 tr 52 M=L2_MOD_FIFO; 531 tr 71 M=L2_MOD_FIFO TSE=F SLTH=T; 532 tr 71 M=L2_MOD_FIFO TSE=T SLTH=T; 533 tr 71 M=L2_MOD_FIFO TSE=T SLTH=F; 534 echo " L2_USER_ENTRY"; 535 tr 50 M=L2_USER_ENTRY; 536 tr 51 M=L2_USER_ENTRY; 537 tr 52 M=L2_USER_ENTRY; 538 tr 71 M=L2_USER_ENTRY TSE=F SLTH=T; 539 tr 71 M=L2_USER_ENTRY TSE=T SLTH=T; 540 tr 71 M=L2_USER_ENTRY TSE=T SLTH=F; 541 echo " L2_USER_ENTRY_DATA_ONLY"; 542 tr 50 M=L2_USER_ENTRY_DATA_ONLY; 543 tr 51 M=L2_USER_ENTRY_DATA_ONLY; 544 tr 52 M=L2_USER_ENTRY_DATA_ONLY; 545 tr 71 M=L2_USER_ENTRY_DATA_ONLY TSE=F SLTH=T; 546 tr 71 M=L2_USER_ENTRY_DATA_ONLY TSE=T SLTH=T; 547 tr 71 M=L2_USER_ENTRY_DATA_ONLY TSE=T SLTH=F; 548 echo " L2_USER_ENTRY_ONLY"; 549 tr 50 M=L2_USER_ENTRY_ONLY; 550 tr 51 M=L2_USER_ENTRY_ONLY; 551 tr 52 M=L2_USER_ENTRY_ONLY; 552 tr 71 M=L2_USER_ENTRY_ONLY TSE=F SLTH=T; 553 tr 71 M=L2_USER_ENTRY_ONLY TSE=T SLTH=T; 554 tr 71 M=L2_USER_ENTRY_ONLY TSE=T SLTH=F; 555 echo " L3_DEFIP"; 556 tr 50 M=L3_DEFIP; 557 tr 51 M=L3_DEFIP; 558 tr 52 M=L3_DEFIP; 559 tr 71 M=L3_DEFIP TSE=F SLTH=T; 560 tr 71 M=L3_DEFIP TSE=T SLTH=T; 561 tr 71 M=L3_DEFIP TSE=T SLTH=F; 562 echo " L3_DEFIP_DATA_ONLY"; 563 tr 50 M=L3_DEFIP_DATA_ONLY; 564 tr 51 M=L3_DEFIP_DATA_ONLY; 565 tr 52 M=L3_DEFIP_DATA_ONLY; 566 tr 71 M=L3_DEFIP_DATA_ONLY TSE=F SLTH=T; 567 tr 71 M=L3_DEFIP_DATA_ONLY TSE=T SLTH=T; 568 tr 71 M=L3_DEFIP_DATA_ONLY TSE=T SLTH=F; 569 echo " L3_DEFIP_HIT_ONLY"; 570 tr 50 M=L3_DEFIP_HIT_ONLY; 571 tr 51 M=L3_DEFIP_HIT_ONLY; 572 tr 52 M=L3_DEFIP_HIT_ONLY; 573 tr 71 M=L3_DEFIP_HIT_ONLY TSE=F SLTH=T; 574 tr 71 M=L3_DEFIP_HIT_ONLY TSE=T SLTH=T; 575 tr 71 M=L3_DEFIP_HIT_ONLY TSE=T SLTH=F; 576 echo " L3_DEFIP_ONLY"; 577 tr 50 M=L3_DEFIP_ONLY; 578 tr 51 M=L3_DEFIP_ONLY; 579 tr 52 M=L3_DEFIP_ONLY; 580 tr 71 M=L3_DEFIP_ONLY TSE=F SLTH=T; 581 tr 71 M=L3_DEFIP_ONLY TSE=T SLTH=T; 582 tr 71 M=L3_DEFIP_ONLY TSE=T SLTH=F; 583 echo " L3_ENTRY_HIT_ONLY"; 584 tr 50 M=L3_ENTRY_HIT_ONLY; 585 tr 51 M=L3_ENTRY_HIT_ONLY; 586 tr 52 M=L3_ENTRY_HIT_ONLY; 587 tr 71 M=L3_ENTRY_HIT_ONLY TSE=F SLTH=T; 588 tr 71 M=L3_ENTRY_HIT_ONLY TSE=T SLTH=T; 589 tr 71 M=L3_ENTRY_HIT_ONLY TSE=T SLTH=F; 590 echo " L3_ENTRY_IPV4_MULTICAST"; 591 tr 50 M=L3_ENTRY_IPV4_MULTICAST; 592 tr 51 M=L3_ENTRY_IPV4_MULTICAST; 593 tr 52 M=L3_ENTRY_IPV4_MULTICAST; 594 tr 71 M=L3_ENTRY_IPV4_MULTICAST TSE=F SLTH=T; 595 tr 71 M=L3_ENTRY_IPV4_MULTICAST TSE=T SLTH=T; 596 tr 71 M=L3_ENTRY_IPV4_MULTICAST TSE=T SLTH=F; 597 echo " L3_ENTRY_IPV4_MULTICAST_SCRATCH"; 598 tr 50 M=L3_ENTRY_IPV4_MULTICAST_SCRATCH; 599 #tr 51 M=L3_ENTRY_IPV4_MULTICAST_SCRATCH # test not supported on single-entry tables; 600 #tr 52 M=L3_ENTRY_IPV4_MULTICAST_SCRATCH # test not supported on single-entry tables; 601 tr 71 M=L3_ENTRY_IPV4_MULTICAST_SCRATCH TSE=F SLTH=T; 602 tr 71 M=L3_ENTRY_IPV4_MULTICAST_SCRATCH TSE=T SLTH=T; 603 tr 71 M=L3_ENTRY_IPV4_MULTICAST_SCRATCH TSE=T SLTH=F; 604 echo " L3_ENTRY_IPV4_UNICAST"; 605 tr 50 M=L3_ENTRY_IPV4_UNICAST; 606 tr 51 M=L3_ENTRY_IPV4_UNICAST; 607 tr 52 M=L3_ENTRY_IPV4_UNICAST; 608 tr 71 M=L3_ENTRY_IPV4_UNICAST TSE=F SLTH=T; 609 tr 71 M=L3_ENTRY_IPV4_UNICAST TSE=T SLTH=T; 610 tr 71 M=L3_ENTRY_IPV4_UNICAST TSE=T SLTH=F; 611 echo " L3_ENTRY_IPV4_UNICAST_SCRATCH"; 612 tr 50 M=L3_ENTRY_IPV4_UNICAST_SCRATCH; 613 #tr 51 M=L3_ENTRY_IPV4_UNICAST_SCRATCH # test not supported on single-entry tables; 614 #tr 52 M=L3_ENTRY_IPV4_UNICAST_SCRATCH # test not supported on single-entry tables; 615 tr 71 M=L3_ENTRY_IPV4_UNICAST_SCRATCH TSE=F SLTH=T; 616 tr 71 M=L3_ENTRY_IPV4_UNICAST_SCRATCH TSE=T SLTH=T; 617 tr 71 M=L3_ENTRY_IPV4_UNICAST_SCRATCH TSE=T SLTH=F; 618 echo " L3_ENTRY_IPV6_MULTICAST"; 619 tr 50 M=L3_ENTRY_IPV6_MULTICAST; 620 tr 51 M=L3_ENTRY_IPV6_MULTICAST; 621 tr 52 M=L3_ENTRY_IPV6_MULTICAST; 622 tr 71 M=L3_ENTRY_IPV6_MULTICAST TSE=F SLTH=T; 623 tr 71 M=L3_ENTRY_IPV6_MULTICAST TSE=T SLTH=T; 624 tr 71 M=L3_ENTRY_IPV6_MULTICAST TSE=T SLTH=F; 625 echo " L3_ENTRY_IPV6_MULTICAST_SCRATCH"; 626 tr 50 M=L3_ENTRY_IPV6_MULTICAST_SCRATCH; 627 #tr 51 M=L3_ENTRY_IPV6_MULTICAST_SCRATCH # test not supported on single-entry tables; 628 #tr 52 M=L3_ENTRY_IPV6_MULTICAST_SCRATCH # test not supported on single-entry tables; 629 tr 71 M=L3_ENTRY_IPV6_MULTICAST_SCRATCH TSE=F SLTH=T; 630 tr 71 M=L3_ENTRY_IPV6_MULTICAST_SCRATCH TSE=T SLTH=T; 631 tr 71 M=L3_ENTRY_IPV6_MULTICAST_SCRATCH TSE=T SLTH=F; 632 echo " L3_ENTRY_IPV6_UNICAST"; 633 tr 50 M=L3_ENTRY_IPV6_UNICAST; 634 tr 51 M=L3_ENTRY_IPV6_UNICAST; 635 tr 52 M=L3_ENTRY_IPV6_UNICAST; 636 tr 71 M=L3_ENTRY_IPV6_UNICAST TSE=F SLTH=T; 637 tr 71 M=L3_ENTRY_IPV6_UNICAST TSE=T SLTH=T; 638 tr 71 M=L3_ENTRY_IPV6_UNICAST TSE=T SLTH=F; 639 echo " L3_ENTRY_IPV6_UNICAST_SCRATCH"; 640 tr 50 M=L3_ENTRY_IPV6_UNICAST_SCRATCH; 641 #tr 51 M=L3_ENTRY_IPV6_UNICAST_SCRATCH # test not supported on single-entry tables; 642 #tr 52 M=L3_ENTRY_IPV6_UNICAST_SCRATCH # test not supported on single-entry tables; 643 tr 71 M=L3_ENTRY_IPV6_UNICAST_SCRATCH TSE=F SLTH=T; 644 tr 71 M=L3_ENTRY_IPV6_UNICAST_SCRATCH TSE=T SLTH=T; 645 tr 71 M=L3_ENTRY_IPV6_UNICAST_SCRATCH TSE=T SLTH=F; 646 echo " L3_ENTRY_ONLY"; 647 tr 50 M=L3_ENTRY_ONLY; 648 tr 51 M=L3_ENTRY_ONLY; 649 tr 52 M=L3_ENTRY_ONLY; 650 tr 71 M=L3_ENTRY_ONLY TSE=F SLTH=T; 651 tr 71 M=L3_ENTRY_ONLY TSE=T SLTH=T; 652 tr 71 M=L3_ENTRY_ONLY TSE=T SLTH=F; 653 echo " L3_ENTRY_VALID_ONLY"; 654 tr 50 M=L3_ENTRY_VALID_ONLY; 655 tr 51 M=L3_ENTRY_VALID_ONLY; 656 tr 52 M=L3_ENTRY_VALID_ONLY; 657 tr 71 M=L3_ENTRY_VALID_ONLY TSE=F SLTH=T; 658 tr 71 M=L3_ENTRY_VALID_ONLY TSE=T SLTH=T; 659 tr 71 M=L3_ENTRY_VALID_ONLY TSE=T SLTH=F; 660 echo " L3_IPMC"; 661 tr 50 M=L3_IPMC; 662 tr 51 M=L3_IPMC; 663 tr 52 M=L3_IPMC; 664 tr 71 M=L3_IPMC TSE=F SLTH=T; 665 tr 71 M=L3_IPMC TSE=T SLTH=T; 666 tr 71 M=L3_IPMC TSE=T SLTH=F; 667 echo " L3_MTU_VALUES"; 668 tr 50 M=L3_MTU_VALUES; 669 tr 51 M=L3_MTU_VALUES; 670 tr 52 M=L3_MTU_VALUES; 671 tr 71 M=L3_MTU_VALUES TSE=F SLTH=T; 672 tr 71 M=L3_MTU_VALUES TSE=T SLTH=T; 673 tr 71 M=L3_MTU_VALUES TSE=T SLTH=F; 674 echo " LPORT_TAB"; 675 tr 50 M=LPORT_TAB; 676 tr 51 M=LPORT_TAB; 677 tr 52 M=LPORT_TAB; 678 tr 71 M=LPORT_TAB TSE=F SLTH=T; 679 tr 71 M=LPORT_TAB TSE=T SLTH=T; 680 tr 71 M=LPORT_TAB TSE=T SLTH=F; 681 echo " MAC_BLOCK"; 682 tr 50 M=MAC_BLOCK; 683 tr 51 M=MAC_BLOCK; 684 tr 52 M=MAC_BLOCK; 685 tr 71 M=MAC_BLOCK TSE=F SLTH=T; 686 tr 71 M=MAC_BLOCK TSE=T SLTH=T; 687 tr 71 M=MAC_BLOCK TSE=T SLTH=F; 688 echo " MMU_AGING_CTR"; 689 tr 50 M=MMU_AGING_CTR; 690 tr 51 M=MMU_AGING_CTR; 691 tr 52 M=MMU_AGING_CTR; 692 tr 71 M=MMU_AGING_CTR TSE=F SLTH=T; 693 tr 71 M=MMU_AGING_CTR TSE=T SLTH=T; 694 tr 71 M=MMU_AGING_CTR TSE=T SLTH=F; 695 echo " MMU_AGING_EXP"; 696 tr 50 M=MMU_AGING_EXP; 697 tr 51 M=MMU_AGING_EXP; 698 tr 52 M=MMU_AGING_EXP; 699 tr 71 M=MMU_AGING_EXP TSE=F SLTH=T; 700 tr 71 M=MMU_AGING_EXP TSE=T SLTH=T; 701 tr 71 M=MMU_AGING_EXP TSE=T SLTH=F; 702 echo " MMU_ARB_TDM_TABLE"; 703 tr 50 M=MMU_ARB_TDM_TABLE; 704 tr 51 M=MMU_ARB_TDM_TABLE; 705 tr 52 M=MMU_ARB_TDM_TABLE; 706 tr 71 M=MMU_ARB_TDM_TABLE TSE=F SLTH=T; 707 tr 71 M=MMU_ARB_TDM_TABLE TSE=T SLTH=T; 708 tr 71 M=MMU_ARB_TDM_TABLE TSE=T SLTH=F; 709 echo " MMU_CBPCellHeader"; 710 tr 50 M=MMU_CBPCellHeader; 711 tr 51 M=MMU_CBPCellHeader; 712 tr 52 M=MMU_CBPCellHeader; 713 tr 71 M=MMU_CBPCellHeader TSE=F SLTH=T; 714 tr 71 M=MMU_CBPCellHeader TSE=T SLTH=T; 715 tr 71 M=MMU_CBPCellHeader TSE=T SLTH=F; 716 echo " MMU_CBPData0"; 717 tr 50 M=MMU_CBPData0; 718 tr 51 M=MMU_CBPData0; 719 tr 52 M=MMU_CBPData0; 720 tr 71 M=MMU_CBPData0 TSE=F SLTH=T; 721 tr 71 M=MMU_CBPData0 TSE=T SLTH=T; 722 tr 71 M=MMU_CBPData0 TSE=T SLTH=F; 723 echo " MMU_CBPData1"; 724 tr 50 M=MMU_CBPData1; 725 tr 51 M=MMU_CBPData1; 726 tr 52 M=MMU_CBPData1; 727 tr 71 M=MMU_CBPData1 TSE=F SLTH=T; 728 tr 71 M=MMU_CBPData1 TSE=T SLTH=T; 729 tr 71 M=MMU_CBPData1 TSE=T SLTH=F; 730 echo " MMU_CBPData2"; 731 tr 50 M=MMU_CBPData2; 732 tr 51 M=MMU_CBPData2; 733 tr 52 M=MMU_CBPData2; 734 tr 71 M=MMU_CBPData2 TSE=F SLTH=T; 735 tr 71 M=MMU_CBPData2 TSE=T SLTH=T; 736 tr 71 M=MMU_CBPData2 TSE=T SLTH=F; 737 echo " MMU_CBPData3"; 738 tr 50 M=MMU_CBPData3; 739 tr 51 M=MMU_CBPData3; 740 tr 52 M=MMU_CBPData3; 741 tr 71 M=MMU_CBPData3 TSE=F SLTH=T; 742 tr 71 M=MMU_CBPData3 TSE=T SLTH=T; 743 tr 71 M=MMU_CBPData3 TSE=T SLTH=F; 744 echo " MMU_CBPData4"; 745 tr 50 M=MMU_CBPData4; 746 tr 51 M=MMU_CBPData4; 747 tr 52 M=MMU_CBPData4; 748 tr 71 M=MMU_CBPData4 TSE=F SLTH=T; 749 tr 71 M=MMU_CBPData4 TSE=T SLTH=T; 750 tr 71 M=MMU_CBPData4 TSE=T SLTH=F; 751 echo " MMU_CBPData5"; 752 tr 50 M=MMU_CBPData5; 753 tr 51 M=MMU_CBPData5; 754 tr 52 M=MMU_CBPData5; 755 tr 71 M=MMU_CBPData5 TSE=F SLTH=T; 756 tr 71 M=MMU_CBPData5 TSE=T SLTH=T; 757 tr 71 M=MMU_CBPData5 TSE=T SLTH=F; 758 echo " MMU_CBPData6"; 759 tr 50 M=MMU_CBPData6; 760 tr 51 M=MMU_CBPData6; 761 tr 52 M=MMU_CBPData6; 762 tr 71 M=MMU_CBPData6 TSE=F SLTH=T; 763 tr 71 M=MMU_CBPData6 TSE=T SLTH=T; 764 tr 71 M=MMU_CBPData6 TSE=T SLTH=F; 765 echo " MMU_CBPData7"; 766 tr 50 M=MMU_CBPData7; 767 tr 51 M=MMU_CBPData7; 768 tr 52 M=MMU_CBPData7; 769 tr 71 M=MMU_CBPData7 TSE=F SLTH=T; 770 tr 71 M=MMU_CBPData7 TSE=T SLTH=T; 771 tr 71 M=MMU_CBPData7 TSE=T SLTH=F; 772 echo " MMU_CBPPktHeader0"; 773 tr 50 M=MMU_CBPPktHeader0; 774 tr 51 M=MMU_CBPPktHeader0; 775 tr 52 M=MMU_CBPPktHeader0; 776 tr 71 M=MMU_CBPPktHeader0 TSE=F SLTH=T; 777 tr 71 M=MMU_CBPPktHeader0 TSE=T SLTH=T; 778 tr 71 M=MMU_CBPPktHeader0 TSE=T SLTH=F; 779 echo " MMU_CBPPktHeader1"; 780 tr 50 M=MMU_CBPPktHeader1; 781 tr 51 M=MMU_CBPPktHeader1; 782 tr 52 M=MMU_CBPPktHeader1; 783 tr 71 M=MMU_CBPPktHeader1 TSE=F SLTH=T; 784 tr 71 M=MMU_CBPPktHeader1 TSE=T SLTH=T; 785 tr 71 M=MMU_CBPPktHeader1 TSE=T SLTH=F; 786 echo " MMU_CBPPktHeader_EXT"; 787 tr 50 M=MMU_CBPPktHeader_EXT; 788 tr 51 M=MMU_CBPPktHeader_EXT; 789 tr 52 M=MMU_CBPPktHeader_EXT; 790 tr 71 M=MMU_CBPPktHeader_EXT TSE=F SLTH=T; 791 tr 71 M=MMU_CBPPktHeader_EXT TSE=T SLTH=T; 792 tr 71 M=MMU_CBPPktHeader_EXT TSE=T SLTH=F; 793 echo " MMU_CCP"; 794 tr 50 M=MMU_CCP; 795 tr 51 M=MMU_CCP; 796 tr 52 M=MMU_CCP; 797 tr 71 M=MMU_CCP TSE=F SLTH=T; 798 tr 71 M=MMU_CCP TSE=T SLTH=T; 799 tr 71 M=MMU_CCP TSE=T SLTH=F; 800 echo " MMU_CFAP"; 801 tr 50 M=MMU_CFAP; 802 tr 51 M=MMU_CFAP; 803 tr 52 M=MMU_CFAP; 804 tr 71 M=MMU_CFAP TSE=F SLTH=T; 805 tr 71 M=MMU_CFAP TSE=T SLTH=T; 806 tr 71 M=MMU_CFAP TSE=T SLTH=F; 807 echo " MMU_IPMC_GROUP_TBL0"; 808 tr 50 M=MMU_IPMC_GROUP_TBL0; 809 tr 51 M=MMU_IPMC_GROUP_TBL0; 810 tr 52 M=MMU_IPMC_GROUP_TBL0; 811 tr 71 M=MMU_IPMC_GROUP_TBL0 TSE=F SLTH=T; 812 tr 71 M=MMU_IPMC_GROUP_TBL0 TSE=T SLTH=T; 813 tr 71 M=MMU_IPMC_GROUP_TBL0 TSE=T SLTH=F; 814 echo " MMU_IPMC_GROUP_TBL1"; 815 tr 50 M=MMU_IPMC_GROUP_TBL1; 816 tr 51 M=MMU_IPMC_GROUP_TBL1; 817 tr 52 M=MMU_IPMC_GROUP_TBL1; 818 tr 71 M=MMU_IPMC_GROUP_TBL1 TSE=F SLTH=T; 819 tr 71 M=MMU_IPMC_GROUP_TBL1 TSE=T SLTH=T; 820 tr 71 M=MMU_IPMC_GROUP_TBL1 TSE=T SLTH=F; 821 echo " MMU_IPMC_GROUP_TBL2"; 822 tr 50 M=MMU_IPMC_GROUP_TBL2; 823 tr 51 M=MMU_IPMC_GROUP_TBL2; 824 tr 52 M=MMU_IPMC_GROUP_TBL2; 825 tr 71 M=MMU_IPMC_GROUP_TBL2 TSE=F SLTH=T; 826 tr 71 M=MMU_IPMC_GROUP_TBL2 TSE=T SLTH=T; 827 tr 71 M=MMU_IPMC_GROUP_TBL2 TSE=T SLTH=F; 828 echo " MMU_IPMC_GROUP_TBL3"; 829 tr 50 M=MMU_IPMC_GROUP_TBL3; 830 tr 51 M=MMU_IPMC_GROUP_TBL3; 831 tr 52 M=MMU_IPMC_GROUP_TBL3; 832 tr 71 M=MMU_IPMC_GROUP_TBL3 TSE=F SLTH=T; 833 tr 71 M=MMU_IPMC_GROUP_TBL3 TSE=T SLTH=T; 834 tr 71 M=MMU_IPMC_GROUP_TBL3 TSE=T SLTH=F; 835 echo " MMU_IPMC_GROUP_TBL4"; 836 tr 50 M=MMU_IPMC_GROUP_TBL4; 837 tr 51 M=MMU_IPMC_GROUP_TBL4; 838 tr 52 M=MMU_IPMC_GROUP_TBL4; 839 tr 71 M=MMU_IPMC_GROUP_TBL4 TSE=F SLTH=T; 840 tr 71 M=MMU_IPMC_GROUP_TBL4 TSE=T SLTH=T; 841 tr 71 M=MMU_IPMC_GROUP_TBL4 TSE=T SLTH=F; 842 echo " MMU_IPMC_GROUP_TBL5"; 843 tr 50 M=MMU_IPMC_GROUP_TBL5; 844 tr 51 M=MMU_IPMC_GROUP_TBL5; 845 tr 52 M=MMU_IPMC_GROUP_TBL5; 846 tr 71 M=MMU_IPMC_GROUP_TBL5 TSE=F SLTH=T; 847 tr 71 M=MMU_IPMC_GROUP_TBL5 TSE=T SLTH=T; 848 tr 71 M=MMU_IPMC_GROUP_TBL5 TSE=T SLTH=F; 849 echo " MMU_IPMC_VLAN_TBL"; 850 tr 50 M=MMU_IPMC_VLAN_TBL; 851 tr 51 M=MMU_IPMC_VLAN_TBL; 852 tr 52 M=MMU_IPMC_VLAN_TBL; 853 tr 71 M=MMU_IPMC_VLAN_TBL TSE=F SLTH=T; 854 tr 71 M=MMU_IPMC_VLAN_TBL TSE=T SLTH=T; 855 tr 71 M=MMU_IPMC_VLAN_TBL TSE=T SLTH=F; 856 echo " MMU_MAX_BUCKET_GPORT"; 857 tr 50 M=MMU_MAX_BUCKET_GPORT; 858 tr 51 M=MMU_MAX_BUCKET_GPORT; 859 tr 52 M=MMU_MAX_BUCKET_GPORT; 860 tr 71 M=MMU_MAX_BUCKET_GPORT TSE=F SLTH=T; 861 tr 71 M=MMU_MAX_BUCKET_GPORT TSE=T SLTH=T; 862 tr 71 M=MMU_MAX_BUCKET_GPORT TSE=T SLTH=F; 863 echo " MMU_MIN_BUCKET_GPORT"; 864 tr 50 M=MMU_MIN_BUCKET_GPORT; 865 tr 51 M=MMU_MIN_BUCKET_GPORT; 866 tr 52 M=MMU_MIN_BUCKET_GPORT; 867 tr 71 M=MMU_MIN_BUCKET_GPORT TSE=F SLTH=T; 868 tr 71 M=MMU_MIN_BUCKET_GPORT TSE=T SLTH=T; 869 tr 71 M=MMU_MIN_BUCKET_GPORT TSE=T SLTH=F; 870 echo " MMU_XQ0"; 871 tr 50 M=MMU_XQ0; 872 tr 51 M=MMU_XQ0; 873 tr 52 M=MMU_XQ0; 874 tr 71 M=MMU_XQ0 TSE=F SLTH=T; 875 tr 71 M=MMU_XQ0 TSE=T SLTH=T; 876 tr 71 M=MMU_XQ0 TSE=T SLTH=F; 877 echo " MMU_XQ10"; 878 tr 50 M=MMU_XQ10; 879 tr 51 M=MMU_XQ10; 880 tr 52 M=MMU_XQ10; 881 tr 71 M=MMU_XQ10 TSE=F SLTH=T; 882 tr 71 M=MMU_XQ10 TSE=T SLTH=T; 883 tr 71 M=MMU_XQ10 TSE=T SLTH=F; 884 echo " MMU_XQ11"; 885 tr 50 M=MMU_XQ11; 886 tr 51 M=MMU_XQ11; 887 tr 52 M=MMU_XQ11; 888 tr 71 M=MMU_XQ11 TSE=F SLTH=T; 889 tr 71 M=MMU_XQ11 TSE=T SLTH=T; 890 tr 71 M=MMU_XQ11 TSE=T SLTH=F; 891 echo " MMU_XQ12"; 892 tr 50 M=MMU_XQ12; 893 tr 51 M=MMU_XQ12; 894 tr 52 M=MMU_XQ12; 895 tr 71 M=MMU_XQ12 TSE=F SLTH=T; 896 tr 71 M=MMU_XQ12 TSE=T SLTH=T; 897 tr 71 M=MMU_XQ12 TSE=T SLTH=F; 898 echo " MMU_XQ13"; 899 tr 50 M=MMU_XQ13; 900 tr 51 M=MMU_XQ13; 901 tr 52 M=MMU_XQ13; 902 tr 71 M=MMU_XQ13 TSE=F SLTH=T; 903 tr 71 M=MMU_XQ13 TSE=T SLTH=T; 904 tr 71 M=MMU_XQ13 TSE=T SLTH=F; 905 echo " MMU_XQ14"; 906 tr 50 M=MMU_XQ14; 907 tr 51 M=MMU_XQ14; 908 tr 52 M=MMU_XQ14; 909 tr 71 M=MMU_XQ14 TSE=F SLTH=T; 910 tr 71 M=MMU_XQ14 TSE=T SLTH=T; 911 tr 71 M=MMU_XQ14 TSE=T SLTH=F; 912 echo " MMU_XQ15"; 913 tr 50 M=MMU_XQ15; 914 tr 51 M=MMU_XQ15; 915 tr 52 M=MMU_XQ15; 916 tr 71 M=MMU_XQ15 TSE=F SLTH=T; 917 tr 71 M=MMU_XQ15 TSE=T SLTH=T; 918 tr 71 M=MMU_XQ15 TSE=T SLTH=F; 919 echo " MMU_XQ16"; 920 tr 50 M=MMU_XQ16; 921 tr 51 M=MMU_XQ16; 922 tr 52 M=MMU_XQ16; 923 tr 71 M=MMU_XQ16 TSE=F SLTH=T; 924 tr 71 M=MMU_XQ16 TSE=T SLTH=T; 925 tr 71 M=MMU_XQ16 TSE=T SLTH=F; 926 echo " MMU_XQ17"; 927 tr 50 M=MMU_XQ17; 928 tr 51 M=MMU_XQ17; 929 tr 52 M=MMU_XQ17; 930 tr 71 M=MMU_XQ17 TSE=F SLTH=T; 931 tr 71 M=MMU_XQ17 TSE=T SLTH=T; 932 tr 71 M=MMU_XQ17 TSE=T SLTH=F; 933 echo " MMU_XQ18"; 934 tr 50 M=MMU_XQ18; 935 tr 51 M=MMU_XQ18; 936 tr 52 M=MMU_XQ18; 937 tr 71 M=MMU_XQ18 TSE=F SLTH=T; 938 tr 71 M=MMU_XQ18 TSE=T SLTH=T; 939 tr 71 M=MMU_XQ18 TSE=T SLTH=F; 940 echo " MMU_XQ19"; 941 tr 50 M=MMU_XQ19; 942 tr 51 M=MMU_XQ19; 943 tr 52 M=MMU_XQ19; 944 tr 71 M=MMU_XQ19 TSE=F SLTH=T; 945 tr 71 M=MMU_XQ19 TSE=T SLTH=T; 946 tr 71 M=MMU_XQ19 TSE=T SLTH=F; 947 echo " MMU_XQ2"; 948 tr 50 M=MMU_XQ2; 949 tr 51 M=MMU_XQ2; 950 tr 52 M=MMU_XQ2; 951 tr 71 M=MMU_XQ2 TSE=F SLTH=T; 952 tr 71 M=MMU_XQ2 TSE=T SLTH=T; 953 tr 71 M=MMU_XQ2 TSE=T SLTH=F; 954 echo " MMU_XQ20"; 955 tr 50 M=MMU_XQ20; 956 tr 51 M=MMU_XQ20; 957 tr 52 M=MMU_XQ20; 958 tr 71 M=MMU_XQ20 TSE=F SLTH=T; 959 tr 71 M=MMU_XQ20 TSE=T SLTH=T; 960 tr 71 M=MMU_XQ20 TSE=T SLTH=F; 961 echo " MMU_XQ21"; 962 tr 50 M=MMU_XQ21; 963 tr 51 M=MMU_XQ21; 964 tr 52 M=MMU_XQ21; 965 tr 71 M=MMU_XQ21 TSE=F SLTH=T; 966 tr 71 M=MMU_XQ21 TSE=T SLTH=T; 967 tr 71 M=MMU_XQ21 TSE=T SLTH=F; 968 echo " MMU_XQ22"; 969 tr 50 M=MMU_XQ22; 970 tr 51 M=MMU_XQ22; 971 tr 52 M=MMU_XQ22; 972 tr 71 M=MMU_XQ22 TSE=F SLTH=T; 973 tr 71 M=MMU_XQ22 TSE=T SLTH=T; 974 tr 71 M=MMU_XQ22 TSE=T SLTH=F; 975 echo " MMU_XQ23"; 976 tr 50 M=MMU_XQ23; 977 tr 51 M=MMU_XQ23; 978 tr 52 M=MMU_XQ23; 979 tr 71 M=MMU_XQ23 TSE=F SLTH=T; 980 tr 71 M=MMU_XQ23 TSE=T SLTH=T; 981 tr 71 M=MMU_XQ23 TSE=T SLTH=F; 982 echo " MMU_XQ24"; 983 tr 50 M=MMU_XQ24; 984 tr 51 M=MMU_XQ24; 985 tr 52 M=MMU_XQ24; 986 tr 71 M=MMU_XQ24 TSE=F SLTH=T; 987 tr 71 M=MMU_XQ24 TSE=T SLTH=T; 988 tr 71 M=MMU_XQ24 TSE=T SLTH=F; 989 echo " MMU_XQ25"; 990 tr 50 M=MMU_XQ25; 991 tr 51 M=MMU_XQ25; 992 tr 52 M=MMU_XQ25; 993 tr 71 M=MMU_XQ25 TSE=F SLTH=T; 994 tr 71 M=MMU_XQ25 TSE=T SLTH=T; 995 tr 71 M=MMU_XQ25 TSE=T SLTH=F; 996 echo " MMU_XQ26"; 997 tr 50 M=MMU_XQ26; 998 tr 51 M=MMU_XQ26; 999 tr 52 M=MMU_XQ26; 1000 tr 71 M=MMU_XQ26 TSE=F SLTH=T; 1001 tr 71 M=MMU_XQ26 TSE=T SLTH=T; 1002 tr 71 M=MMU_XQ26 TSE=T SLTH=F; 1003 echo " MMU_XQ27"; 1004 tr 50 M=MMU_XQ27; 1005 tr 51 M=MMU_XQ27; 1006 tr 52 M=MMU_XQ27; 1007 tr 71 M=MMU_XQ27 TSE=F SLTH=T; 1008 tr 71 M=MMU_XQ27 TSE=T SLTH=T; 1009 tr 71 M=MMU_XQ27 TSE=T SLTH=F; 1010 echo " MMU_XQ28"; 1011 tr 50 M=MMU_XQ28; 1012 tr 51 M=MMU_XQ28; 1013 tr 52 M=MMU_XQ28; 1014 tr 71 M=MMU_XQ28 TSE=F SLTH=T; 1015 tr 71 M=MMU_XQ28 TSE=T SLTH=T; 1016 tr 71 M=MMU_XQ28 TSE=T SLTH=F; 1017 echo " MMU_XQ29"; 1018 tr 50 M=MMU_XQ29; 1019 tr 51 M=MMU_XQ29; 1020 tr 52 M=MMU_XQ29; 1021 tr 71 M=MMU_XQ29 TSE=F SLTH=T; 1022 tr 71 M=MMU_XQ29 TSE=T SLTH=T; 1023 tr 71 M=MMU_XQ29 TSE=T SLTH=F; 1024 echo " MMU_XQ3"; 1025 tr 50 M=MMU_XQ3; 1026 tr 51 M=MMU_XQ3; 1027 tr 52 M=MMU_XQ3; 1028 tr 71 M=MMU_XQ3 TSE=F SLTH=T; 1029 tr 71 M=MMU_XQ3 TSE=T SLTH=T; 1030 tr 71 M=MMU_XQ3 TSE=T SLTH=F; 1031 echo " MMU_XQ4"; 1032 tr 50 M=MMU_XQ4; 1033 tr 51 M=MMU_XQ4; 1034 tr 52 M=MMU_XQ4; 1035 tr 71 M=MMU_XQ4 TSE=F SLTH=T; 1036 tr 71 M=MMU_XQ4 TSE=T SLTH=T; 1037 tr 71 M=MMU_XQ4 TSE=T SLTH=F; 1038 echo " MMU_XQ5"; 1039 tr 50 M=MMU_XQ5; 1040 tr 51 M=MMU_XQ5; 1041 tr 52 M=MMU_XQ5; 1042 tr 71 M=MMU_XQ5 TSE=F SLTH=T; 1043 tr 71 M=MMU_XQ5 TSE=T SLTH=T; 1044 tr 71 M=MMU_XQ5 TSE=T SLTH=F; 1045 echo " MMU_XQ6"; 1046 tr 50 M=MMU_XQ6; 1047 tr 51 M=MMU_XQ6; 1048 tr 52 M=MMU_XQ6; 1049 tr 71 M=MMU_XQ6 TSE=F SLTH=T; 1050 tr 71 M=MMU_XQ6 TSE=T SLTH=T; 1051 tr 71 M=MMU_XQ6 TSE=T SLTH=F; 1052 echo " MMU_XQ7"; 1053 tr 50 M=MMU_XQ7; 1054 tr 51 M=MMU_XQ7; 1055 tr 52 M=MMU_XQ7; 1056 tr 71 M=MMU_XQ7 TSE=F SLTH=T; 1057 tr 71 M=MMU_XQ7 TSE=T SLTH=T; 1058 tr 71 M=MMU_XQ7 TSE=T SLTH=F; 1059 echo " MMU_XQ8"; 1060 tr 50 M=MMU_XQ8; 1061 tr 51 M=MMU_XQ8; 1062 tr 52 M=MMU_XQ8; 1063 tr 71 M=MMU_XQ8 TSE=F SLTH=T; 1064 tr 71 M=MMU_XQ8 TSE=T SLTH=T; 1065 tr 71 M=MMU_XQ8 TSE=T SLTH=F; 1066 echo " MMU_XQ9"; 1067 tr 50 M=MMU_XQ9; 1068 tr 51 M=MMU_XQ9; 1069 tr 52 M=MMU_XQ9; 1070 tr 71 M=MMU_XQ9 TSE=F SLTH=T; 1071 tr 71 M=MMU_XQ9 TSE=T SLTH=T; 1072 tr 71 M=MMU_XQ9 TSE=T SLTH=F; 1073 echo " MODPORT_MAP"; 1074 tr 50 M=MODPORT_MAP; 1075 tr 51 M=MODPORT_MAP; 1076 tr 52 M=MODPORT_MAP; 1077 tr 71 M=MODPORT_MAP TSE=F SLTH=T; 1078 tr 71 M=MODPORT_MAP TSE=T SLTH=T; 1079 tr 71 M=MODPORT_MAP TSE=T SLTH=F; 1080 echo " MODPORT_MAP_EM"; 1081 tr 50 M=MODPORT_MAP_EM; 1082 tr 51 M=MODPORT_MAP_EM; 1083 tr 52 M=MODPORT_MAP_EM; 1084 tr 71 M=MODPORT_MAP_EM TSE=F SLTH=T; 1085 tr 71 M=MODPORT_MAP_EM TSE=T SLTH=T; 1086 tr 71 M=MODPORT_MAP_EM TSE=T SLTH=F; 1087 echo " MODPORT_MAP_IM"; 1088 tr 50 M=MODPORT_MAP_IM; 1089 tr 51 M=MODPORT_MAP_IM; 1090 tr 52 M=MODPORT_MAP_IM; 1091 tr 71 M=MODPORT_MAP_IM TSE=F SLTH=T; 1092 tr 71 M=MODPORT_MAP_IM TSE=T SLTH=T; 1093 tr 71 M=MODPORT_MAP_IM TSE=T SLTH=F; 1094 echo " MODPORT_MAP_SW"; 1095 tr 50 M=MODPORT_MAP_SW; 1096 tr 51 M=MODPORT_MAP_SW; 1097 tr 52 M=MODPORT_MAP_SW; 1098 tr 71 M=MODPORT_MAP_SW TSE=F SLTH=T; 1099 tr 71 M=MODPORT_MAP_SW TSE=T SLTH=T; 1100 tr 71 M=MODPORT_MAP_SW TSE=T SLTH=F; 1101 echo " NONUCAST_TRUNK_BLOCK_MASK"; 1102 tr 50 M=NONUCAST_TRUNK_BLOCK_MASK; 1103 tr 51 M=NONUCAST_TRUNK_BLOCK_MASK; 1104 tr 52 M=NONUCAST_TRUNK_BLOCK_MASK; 1105 tr 71 M=NONUCAST_TRUNK_BLOCK_MASK TSE=F SLTH=T; 1106 tr 71 M=NONUCAST_TRUNK_BLOCK_MASK TSE=T SLTH=T; 1107 tr 71 M=NONUCAST_TRUNK_BLOCK_MASK TSE=T SLTH=F; 1108 echo " PORT_COS_MAP"; 1109 tr 50 M=PORT_COS_MAP; 1110 tr 51 M=PORT_COS_MAP; 1111 tr 52 M=PORT_COS_MAP; 1112 tr 71 M=PORT_COS_MAP TSE=F SLTH=T; 1113 tr 71 M=PORT_COS_MAP TSE=T SLTH=T; 1114 tr 71 M=PORT_COS_MAP TSE=T SLTH=F; 1115 echo " PORT_OR_TRUNK_MAC_COUNT"; 1116 tr 50 M=PORT_OR_TRUNK_MAC_COUNT; 1117 tr 51 M=PORT_OR_TRUNK_MAC_COUNT; 1118 tr 52 M=PORT_OR_TRUNK_MAC_COUNT; 1119 tr 71 M=PORT_OR_TRUNK_MAC_COUNT TSE=F SLTH=T; 1120 tr 71 M=PORT_OR_TRUNK_MAC_COUNT TSE=T SLTH=T; 1121 tr 71 M=PORT_OR_TRUNK_MAC_COUNT TSE=T SLTH=F; 1122 echo " PORT_OR_TRUNK_MAC_LIMIT"; 1123 tr 50 M=PORT_OR_TRUNK_MAC_LIMIT; 1124 tr 51 M=PORT_OR_TRUNK_MAC_LIMIT; 1125 tr 52 M=PORT_OR_TRUNK_MAC_LIMIT; 1126 tr 71 M=PORT_OR_TRUNK_MAC_LIMIT TSE=F SLTH=T; 1127 tr 71 M=PORT_OR_TRUNK_MAC_LIMIT TSE=T SLTH=T; 1128 tr 71 M=PORT_OR_TRUNK_MAC_LIMIT TSE=T SLTH=F; 1129 echo " PORT_TAB"; 1130 tr 50 M=PORT_TAB; 1131 tr 51 M=PORT_TAB; 1132 tr 52 M=PORT_TAB; 1133 tr 71 M=PORT_TAB TSE=F SLTH=T; 1134 tr 71 M=PORT_TAB TSE=T SLTH=T; 1135 tr 71 M=PORT_TAB TSE=T SLTH=F; 1136 echo " SOURCE_TRUNK_MAP_TABLE"; 1137 tr 50 M=SOURCE_TRUNK_MAP_TABLE; 1138 tr 51 M=SOURCE_TRUNK_MAP_TABLE; 1139 tr 52 M=SOURCE_TRUNK_MAP_TABLE; 1140 tr 71 M=SOURCE_TRUNK_MAP_TABLE TSE=F SLTH=T; 1141 tr 71 M=SOURCE_TRUNK_MAP_TABLE TSE=T SLTH=T; 1142 tr 71 M=SOURCE_TRUNK_MAP_TABLE TSE=T SLTH=F; 1143 echo " SRC_MODID_BLOCK"; 1144 tr 50 M=SRC_MODID_BLOCK; 1145 tr 51 M=SRC_MODID_BLOCK; 1146 tr 52 M=SRC_MODID_BLOCK; 1147 tr 71 M=SRC_MODID_BLOCK TSE=F SLTH=T; 1148 tr 71 M=SRC_MODID_BLOCK TSE=T SLTH=T; 1149 tr 71 M=SRC_MODID_BLOCK TSE=T SLTH=F; 1150 echo " STG_TAB"; 1151 tr 50 M=STG_TAB; 1152 tr 51 M=STG_TAB; 1153 tr 52 M=STG_TAB; 1154 tr 71 M=STG_TAB TSE=F SLTH=T; 1155 tr 71 M=STG_TAB TSE=T SLTH=T; 1156 tr 71 M=STG_TAB TSE=T SLTH=F; 1157 echo " SYSTEM_CONFIG_TABLE"; 1158 tr 50 M=SYSTEM_CONFIG_TABLE; 1159 tr 51 M=SYSTEM_CONFIG_TABLE; 1160 tr 52 M=SYSTEM_CONFIG_TABLE; 1161 tr 71 M=SYSTEM_CONFIG_TABLE TSE=F SLTH=T; 1162 tr 71 M=SYSTEM_CONFIG_TABLE TSE=T SLTH=T; 1163 tr 71 M=SYSTEM_CONFIG_TABLE TSE=T SLTH=F; 1164 echo " TCP_FN"; 1165 tr 50 M=TCP_FN; 1166 tr 51 M=TCP_FN; 1167 tr 52 M=TCP_FN; 1168 tr 71 M=TCP_FN TSE=F SLTH=T; 1169 tr 71 M=TCP_FN TSE=T SLTH=T; 1170 tr 71 M=TCP_FN TSE=T SLTH=F; 1171 echo " TOS_FN"; 1172 tr 50 M=TOS_FN; 1173 tr 51 M=TOS_FN; 1174 tr 52 M=TOS_FN; 1175 tr 71 M=TOS_FN TSE=F SLTH=T; 1176 tr 71 M=TOS_FN TSE=T SLTH=T; 1177 tr 71 M=TOS_FN TSE=T SLTH=F; 1178 echo " TRUNK32_CONFIG_TABLE"; 1179 tr 50 M=TRUNK32_CONFIG_TABLE; 1180 tr 51 M=TRUNK32_CONFIG_TABLE; 1181 tr 52 M=TRUNK32_CONFIG_TABLE; 1182 tr 71 M=TRUNK32_CONFIG_TABLE TSE=F SLTH=T; 1183 tr 71 M=TRUNK32_CONFIG_TABLE TSE=T SLTH=T; 1184 tr 71 M=TRUNK32_CONFIG_TABLE TSE=T SLTH=F; 1185 echo " TRUNK32_PORT_TABLE"; 1186 tr 50 M=TRUNK32_PORT_TABLE; 1187 tr 51 M=TRUNK32_PORT_TABLE; 1188 tr 52 M=TRUNK32_PORT_TABLE; 1189 tr 71 M=TRUNK32_PORT_TABLE TSE=F SLTH=T; 1190 tr 71 M=TRUNK32_PORT_TABLE TSE=T SLTH=T; 1191 tr 71 M=TRUNK32_PORT_TABLE TSE=T SLTH=F; 1192 echo " TRUNK_BITMAP"; 1193 tr 50 M=TRUNK_BITMAP; 1194 tr 51 M=TRUNK_BITMAP; 1195 tr 52 M=TRUNK_BITMAP; 1196 tr 71 M=TRUNK_BITMAP TSE=F SLTH=T; 1197 tr 71 M=TRUNK_BITMAP TSE=T SLTH=T; 1198 tr 71 M=TRUNK_BITMAP TSE=T SLTH=F; 1199 echo " TRUNK_EGR_MASK"; 1200 tr 50 M=TRUNK_EGR_MASK; 1201 tr 51 M=TRUNK_EGR_MASK; 1202 tr 52 M=TRUNK_EGR_MASK; 1203 tr 71 M=TRUNK_EGR_MASK TSE=F SLTH=T; 1204 tr 71 M=TRUNK_EGR_MASK TSE=T SLTH=T; 1205 tr 71 M=TRUNK_EGR_MASK TSE=T SLTH=F; 1206 echo " TRUNK_GROUP"; 1207 tr 50 M=TRUNK_GROUP; 1208 tr 51 M=TRUNK_GROUP; 1209 tr 52 M=TRUNK_GROUP; 1210 tr 71 M=TRUNK_GROUP TSE=F SLTH=T; 1211 tr 71 M=TRUNK_GROUP TSE=T SLTH=T; 1212 tr 71 M=TRUNK_GROUP TSE=T SLTH=F; 1213 echo " TTL_FN"; 1214 tr 50 M=TTL_FN; 1215 tr 51 M=TTL_FN; 1216 tr 52 M=TTL_FN; 1217 tr 71 M=TTL_FN TSE=F SLTH=T; 1218 tr 71 M=TTL_FN TSE=T SLTH=T; 1219 tr 71 M=TTL_FN TSE=T SLTH=F; 1220 echo " VLAN_MAC"; 1221 tr 50 M=VLAN_MAC; 1222 tr 51 M=VLAN_MAC; 1223 tr 52 M=VLAN_MAC; 1224 tr 71 M=VLAN_MAC TSE=F SLTH=T; 1225 tr 71 M=VLAN_MAC TSE=T SLTH=T; 1226 tr 71 M=VLAN_MAC TSE=T SLTH=F; 1227 echo " VLAN_MAC_SCRATCH"; 1228 tr 50 M=VLAN_MAC_SCRATCH; 1229 #tr 51 M=VLAN_MAC_SCRATCH # test not supported on single-entry tables; 1230 #tr 52 M=VLAN_MAC_SCRATCH # test not supported on single-entry tables; 1231 tr 71 M=VLAN_MAC_SCRATCH TSE=F SLTH=T; 1232 tr 71 M=VLAN_MAC_SCRATCH TSE=T SLTH=T; 1233 tr 71 M=VLAN_MAC_SCRATCH TSE=T SLTH=F; 1234 echo " VLAN_OR_VFI_MAC_COUNT"; 1235 tr 50 M=VLAN_OR_VFI_MAC_COUNT; 1236 tr 51 M=VLAN_OR_VFI_MAC_COUNT; 1237 tr 52 M=VLAN_OR_VFI_MAC_COUNT; 1238 tr 71 M=VLAN_OR_VFI_MAC_COUNT TSE=F SLTH=T; 1239 tr 71 M=VLAN_OR_VFI_MAC_COUNT TSE=T SLTH=T; 1240 tr 71 M=VLAN_OR_VFI_MAC_COUNT TSE=T SLTH=F; 1241 echo " VLAN_OR_VFI_MAC_LIMIT"; 1242 tr 50 M=VLAN_OR_VFI_MAC_LIMIT; 1243 tr 51 M=VLAN_OR_VFI_MAC_LIMIT; 1244 tr 52 M=VLAN_OR_VFI_MAC_LIMIT; 1245 tr 71 M=VLAN_OR_VFI_MAC_LIMIT TSE=F SLTH=T; 1246 tr 71 M=VLAN_OR_VFI_MAC_LIMIT TSE=T SLTH=T; 1247 tr 71 M=VLAN_OR_VFI_MAC_LIMIT TSE=T SLTH=F; 1248 echo " VLAN_PROFILE_2"; 1249 tr 50 M=VLAN_PROFILE_2; 1250 tr 51 M=VLAN_PROFILE_2; 1251 tr 52 M=VLAN_PROFILE_2; 1252 tr 71 M=VLAN_PROFILE_2 TSE=F SLTH=T; 1253 tr 71 M=VLAN_PROFILE_2 TSE=T SLTH=T; 1254 tr 71 M=VLAN_PROFILE_2 TSE=T SLTH=F; 1255 echo " VLAN_PROFILE_TAB"; 1256 tr 50 M=VLAN_PROFILE_TAB; 1257 tr 51 M=VLAN_PROFILE_TAB; 1258 tr 52 M=VLAN_PROFILE_TAB; 1259 tr 71 M=VLAN_PROFILE_TAB TSE=F SLTH=T; 1260 tr 71 M=VLAN_PROFILE_TAB TSE=T SLTH=T; 1261 tr 71 M=VLAN_PROFILE_TAB TSE=T SLTH=F; 1262 echo " VLAN_PROTOCOL"; 1263 tr 50 M=VLAN_PROTOCOL; 1264 tr 51 M=VLAN_PROTOCOL; 1265 tr 52 M=VLAN_PROTOCOL; 1266 tr 71 M=VLAN_PROTOCOL TSE=F SLTH=T; 1267 tr 71 M=VLAN_PROTOCOL TSE=T SLTH=T; 1268 tr 71 M=VLAN_PROTOCOL TSE=T SLTH=F; 1269 echo " VLAN_PROTOCOL_DATA"; 1270 tr 50 M=VLAN_PROTOCOL_DATA; 1271 tr 51 M=VLAN_PROTOCOL_DATA; 1272 tr 52 M=VLAN_PROTOCOL_DATA; 1273 tr 71 M=VLAN_PROTOCOL_DATA TSE=F SLTH=T; 1274 tr 71 M=VLAN_PROTOCOL_DATA TSE=T SLTH=T; 1275 tr 71 M=VLAN_PROTOCOL_DATA TSE=T SLTH=F; 1276 echo " VLAN_SUBNET"; 1277 tr 50 M=VLAN_SUBNET; 1278 tr 51 M=VLAN_SUBNET; 1279 tr 52 M=VLAN_SUBNET; 1280 tr 71 M=VLAN_SUBNET TSE=F SLTH=T; 1281 tr 71 M=VLAN_SUBNET TSE=T SLTH=T; 1282 tr 71 M=VLAN_SUBNET TSE=T SLTH=F; 1283 echo " VLAN_SUBNET_DATA_ONLY"; 1284 tr 50 M=VLAN_SUBNET_DATA_ONLY; 1285 tr 51 M=VLAN_SUBNET_DATA_ONLY; 1286 tr 52 M=VLAN_SUBNET_DATA_ONLY; 1287 tr 71 M=VLAN_SUBNET_DATA_ONLY TSE=F SLTH=T; 1288 tr 71 M=VLAN_SUBNET_DATA_ONLY TSE=T SLTH=T; 1289 tr 71 M=VLAN_SUBNET_DATA_ONLY TSE=T SLTH=F; 1290 echo " VLAN_SUBNET_ONLY"; 1291 tr 50 M=VLAN_SUBNET_ONLY; 1292 tr 51 M=VLAN_SUBNET_ONLY; 1293 tr 52 M=VLAN_SUBNET_ONLY; 1294 tr 71 M=VLAN_SUBNET_ONLY TSE=F SLTH=T; 1295 tr 71 M=VLAN_SUBNET_ONLY TSE=T SLTH=T; 1296 tr 71 M=VLAN_SUBNET_ONLY TSE=T SLTH=F; 1297 echo " VLAN_TAB"; 1298 tr 50 M=VLAN_TAB; 1299 tr 51 M=VLAN_TAB; 1300 tr 52 M=VLAN_TAB; 1301 tr 71 M=VLAN_TAB TSE=F SLTH=T; 1302 tr 71 M=VLAN_TAB TSE=T SLTH=T; 1303 tr 71 M=VLAN_TAB TSE=T SLTH=F; 1304 echo " VLAN_XLATE"; 1305 tr 50 M=VLAN_XLATE; 1306 tr 51 M=VLAN_XLATE; 1307 tr 52 M=VLAN_XLATE; 1308 tr 71 M=VLAN_XLATE TSE=F SLTH=T; 1309 tr 71 M=VLAN_XLATE TSE=T SLTH=T; 1310 tr 71 M=VLAN_XLATE TSE=T SLTH=F; 1311 echo " VLAN_XLATE_SCRATCH"; 1312 tr 50 M=VLAN_XLATE_SCRATCH; 1313 #tr 51 M=VLAN_XLATE_SCRATCH # test not supported on single-entry tables; 1314 #tr 52 M=VLAN_XLATE_SCRATCH # test not supported on single-entry tables; 1315 tr 71 M=VLAN_XLATE_SCRATCH TSE=F SLTH=T; 1316 tr 71 M=VLAN_XLATE_SCRATCH TSE=T SLTH=T; 1317 tr 71 M=VLAN_XLATE_SCRATCH TSE=T SLTH=F; 1318 1319 # Re-initialize to clean up of various read/wrires to MMU memories 1320 set rct=true 1321 rcload rc.soc 1322 counter off 1323 l2mode off 1324 linkscan off 1325 1326 echo "Running counter width verification test ..." 1327 tr 30 1328 $done 1329 1330 echo "Running counter read/write test ..." 1331 tr 31 1332 $done 1333 1334 #L2/L3 hashing tests 1335 echo "Running L2 insert/delete/lookup test ..." 1336 tr 32 1337 $done 1338 1339 echo "Running L2 overflow insert test ..." 1340 tr 33 1341 $done 1342 1343 echo "Running L2 hash test ..." 1344 tr 34 1345 $done 1346 1347 echo "Running L2 delete by port test ..." 1348 tr 35 1349 $done 1350 1351 echo "Running L2 delete by vlan test ..." 1352 tr 36 1353 $done 1354 1355 echo "Running IPV4 overflow insert test ..." 1356 tr 87 IPMCEnable=False 1357 tr 87 IPMCEnable=True 1358 $done 1359 1360 echo "Running IPV6 hash test ..." 1361 tr 88 IPMCEnable=False 1362 tr 88 IPMCEnable=True 1363 $done 1364 1365 echo "Running IPV6 overflow insert test ..." 1366 tr 85 IPMCEnable=False 1367 tr 85 IPMCEnable=True 1368 $done 1369 1370 echo "Running IPV6 hash test ..." 1371 tr 86 IPMCEnable=False 1372 tr 86 IPMCEnable=True 1373 $done 1374 1375 echo "Running VLAN translate overflow insert test ..." 1376 tr 100 1377 1378 echo "Running VLAN translate hash tests ..." 1379 tr 101 hash=0 1380 tr 101 hash=1 1381 tr 101 hash=2 1382 tr 101 hash=3 1383 tr 101 hash=4 1384 tr 101 hash=5 1385 $done 1386 1387 echo "Running Egress VLAN translate overflow insert test ..." 1388 tr 102 1389 $done 1390 1391 echo "Running Egress VLAN translate hash tests ..." 1392 tr 103 hash=0 1393 tr 103 hash=1 1394 tr 103 hash=2 1395 tr 103 hash=3 1396 tr 103 hash=4 1397 tr 103 hash=5 1398 $done 1399 #no mpls in hurricane 1400 #echo "Running MPLS overflow insert test ..." 1401 #tr 104 1402 #$done 1403 1404 #echo "Running MPLS hash tests ..." 1405 #tr 105 hash=0 1406 #tr 105 hash=1 1407 #tr 105 hash=2 1408 #tr 105 hash=3 1409 #tr 105 hash=4 1410 #tr 105 hash=5 1411 #$done 1412 1413 echo "Running MDIO Linkscan test" 1414 tr 60 readcount=10000 1415 $done 1416 1417 echo "Testing CPU DMA loopback ..." 1418 tr 17 c=5 1419 $done 1420 1421 echo "Testing CPU DMA, Scatter/Gather Reload ..." 1422 tr 22 1423 $done 1424 1425 echo "Testing CPU DMA, Scatter/Gather Simple ..." 1426 tr 23 1427 $done 1428 1429 echo "Testing CPU DMA, Scatter/Gather Random ..." 1430 tr 24 1431 $done 1432 1433 tr 48 smi=103 dmi=42 vlan=5 pi=0x11335577 sendm=single 1434 $done 1435 1436 echo "Running PHY loopback V2 on all ports ..." 1437 tr 49 smi=52 dmi=83 vlan=23 pi=0x01204007 1438 $done 1439 1440 #Internal snake Loopback 1441 echo "Running internal snake on all ports, MAC loopback ..." 1442 tr 39 loopbackmode=mac snakepath=two PBM=e 1443 $done 1444 1445 echo "Running internal snake on all ports, PHY loopback ..." 1446 tr 39 loopbackmode=phy snakepath=two PBM=e 1447 $done 1448 1449 if $?BCM56142_A0 \ 1450 'echo "bcm56142 <24ge+1xXUAI[10]+2HGd[12]> tr 18 & tr 19 tests"; \ 1451 tr 18 pbm=ge speed=10; \ 1452 tr 18 pbm=ge speed=100; \ 1453 tr 18 pbm=ge speed=1000; \ 1454 tr 18 pbm=xe speed=10G; \ 1455 tr 18 pbm=hg speed=12G; \ 1456 tr 18 pbm=hg speed=MAX; \ 1457 tr 19 pbm=ge speed=10; \ 1458 tr 19 pbm=ge speed=100; \ 1459 tr 19 pbm=ge speed=1000; \ 1460 tr 19 pbm=xe speed=10G; \ 1461 tr 19 pbm=hg speed=12G; \ 1462 tr 19 pbm=hg speed=MAX' 1463 $done 1464 1465 if $?BCM56143_A0 \ 1466 'echo "bcm56143 <24ge+2xHGd[12]+2x2.5G> tr 18 & tr 19 tests"; \ 1467 port hg an=f sp=12000; \ 1468 port ge24-ge25 an=f rxpau=f txpau=f sp=2500; \ 1469 tr 18 pbm=ge speed=10; \ 1470 tr 18 pbm=ge speed=100; \ 1471 tr 18 pbm=ge speed=1000; \ 1472 tr 18 pbm=ge24-ge25 speed=2500; \ 1473 tr 18 pbm=hg speed=12G; \ 1474 tr 18 pbm=hg speed=MAX; \ 1475 tr 19 pbm=ge0-ge23 speed=10; \ 1476 tr 19 pbm=ge0-ge23 speed=100; \ 1477 tr 19 pbm=ge speed=1000; \ 1478 tr 19 pbm=ge24-ge25 speed=2500; \ 1479 tr 19 pbm=hg speed=12G; \ 1480 tr 19 pbm=hg speed=MAX' 1481 $done 1482 1483 if $?BCM56144_A0 \ 1484 'echo "bcm56144 <16ge+2x2.5G+2x2.5G> tr 18 & tr 19 tests"; \ 1485 tr 18 pbm=ge0-ge15 speed=10; \ 1486 tr 18 pbm=ge0-ge15 speed=100; \ 1487 tr 18 pbm=ge speed=1000; \ 1488 tr 18 pbm=ge16-ge19 speed=2500; \ 1489 tr 18 pbm=ge speed=MAX; \ 1490 tr 19 pbm=ge0-ge15 speed=10; \ 1491 tr 19 pbm=ge0-ge15 speed=100; \ 1492 tr 19 pbm=ge speed=1000; \ 1493 tr 19 pbm=ge16-ge19 speed=2500; \ 1494 tr 19 pbm=ge speed=MAX' 1495 $done 1496 1497 if $?BCM56146_A0 \ 1498 'echo "bcm56146 <24fe+2x2.5G+2x2.5G> tr 18 & tr 19 tests"; \ 1499 tr 18 pbm=fe speed=10; \ 1500 tr 18 pbm=fe speed=100; \ 1501 tr 18 pbm=ge speed=1000; \ 1502 tr 18 pbm=ge speed=2500; \ 1503 tr 18 pbm=ge speed=MAX; \ 1504 tr 19 pbm=fe speed=10; \ 1505 tr 19 pbm=fe speed=100; \ 1506 tr 19 pbm=ge speed=1000; \ 1507 tr 19 pbm=ge speed=2500; \ 1508 tr 19 pbm=ge speed=MAX' 1509 $done 1510 1511 if $?BCM56147_A0 \ 1512 'echo "bcm56147 <24fe+1xHG+2x2.5G> tr 18 & tr 19 tests"; \ 1513 tr 18 pbm=fe speed=10; \ 1514 tr 18 pbm=fe speed=100; \ 1515 tr 18 pbm=ge speed=1000; \ 1516 tr 18 pbm=ge speed=2500; \ 1517 tr 18 pbm=ge speed=MAX; \ 1518 tr 18 pbm=hg speed=12G; \ 1519 tr 18 pbm=hg speed=MAX; \ 1520 tr 19 pbm=fe speed=10; \ 1521 tr 19 pbm=fe speed=100; \ 1522 tr 19 pbm=ge speed=1000; \ 1523 tr 19 pbm=ge speed=2500; \ 1524 tr 19 pbm=ge speed=MAX; \ 1525 tr 19 pbm=hg speed=12G; \ 1526 tr 19 pbm=hg speed=MAX' 1527 $done 1528 1529 if $?BCM56149_A0 \ 1530 'echo "bcm56149 <24ge+4xe[10]> tr 18 & tr 19 tests"; \ 1531 tr 18 pbm=ge speed=10; \ 1532 tr 18 pbm=ge speed=100; \ 1533 tr 18 pbm=ge speed=1000; \ 1534 tr 18 pbm=xe speed=10G; \ 1535 tr 19 pbm=ge speed=10; \ 1536 tr 19 pbm=ge speed=100; \ 1537 tr 19 pbm=ge speed=1000; \ 1538 tr 19 pbm=xe speed=10G' 1539 $done 1540 1541 #Traffic Test 1542 echo "Running Traffic Test in MAC mode ..." 1543 tr 72 RM=MAC PBM=e 1544 $done 1545 1546 echo "Running Traffic Test in PHY mode ..." 1547 tr 72 RM=PHY PBM=e 1548 $done 1549 1550 #SNMP 1551 echo "SNMP MIB Object Test" 1552 tr 73 1553 $done 1554 1555 #Reload Test 1556 echo "TX Reload Test" 1557 tr 90 1558 $done 1559 1560 echo "RX Reload Test" 1561 tr 91 1562 $done 1563 1564 # Show status 1565 date 1566 tl 1567 local returnCode $? 1568 1569 echo Tests Complete. Reinitializing ... 1570 config refresh 1571 rcload rc.soc 1572 counter off 1573 l2mode off 1574 1575 # We want to show the return code from the tl command which 1576 # lists the results. The automated test infrastructure keys off of this 1577 # value 1578 echo "testsuite: finished: sanity: $returnCode"