openbcm

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hr3sanity.soc (69763B)


      1 # 
      2 # This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file.
      3 # 
      4 # Copyright 2007-2019 Broadcom Inc. All rights reserved.
      5 
      6 # Hurricane3 (BCM56160) Sanity
      7 #
      8 # Script to run all available tests as quickly as possible.
      9 # For testing basic sanity of new drivers, simulators, chips, etc.
     10 #
     11 
     12 # Hurricane3
     13 if $?BCM56160_A0 || $?BCM56162_A0 \
     14     'local BCM5616X_A0 1'
     15 
     16 # Hurricane3-Lite
     17 if $?BCM56163_A0 || $?BCM56164_A0 || $?BCM56166_A0 \
     18     'local BCM5616XLITE_A0 1'
     19 
     20 # Buckhound
     21 if $?BCM53440_A0 || $?BCM53442_A0 || $?BCM53443_A0 \
     22     'local BCM5344X_A0 1'
     23 
     24 # Foxhound2
     25 if $?BCM53434_A0 \
     26     'local BCM5343X_A0 1'
     27 
     28 echo "testsuite: started: sanity"
     29 rcload rc.soc
     30 counter off
     31 l2mode off
     32 
     33 # We need to print out port status since any cabling effects results.
     34 *:ps
     35 
     36 # Avoid link messages while testing
     37 linkscan off
     38 
     39 init
     40 init misc
     41 init mmu
     42 
     43 local done 'echo "   Done"'
     44 
     45 # Set run command script not to fail on errors reported by commands
     46 # this allows the script to continue if a test fails
     47 set rcerror=false
     48 
     49 # Set up test mode: don't stop on errors, show progress on each test
     50 tm -stoponerror +progress
     51 # Unselect all
     52 ts -*
     53 
     54 #Display some useful information
     55 date
     56 ver
     57 soc
     58 
     59 #Start Test
     60 #if !$?ihost_mode \
     61 #    'echo "Running PCI Compliance ...";\
     62 #     tr 2;\
     63 #     $done;'
     64 
     65 #Start Test
     66 echo "Running PCI S-Channel Buf ..."
     67 tr 4
     68 $done
     69 
     70 echo "Running Register reset defaults ..."
     71 tr 1
     72 $done
     73 
     74 echo "Running Register read/write ..."
     75 tr 3 mask64
     76 $done
     77 
     78 init soc; init misc; init mmu;
     79 #Clean up after register read/write test.
     80 
     81 rcload rc.soc
     82 counter off
     83 l2mode off
     84 echo "Running CPU Benchmarks ..."
     85 tr 21
     86 $done
     87 linkscan off
     88 
     89 set rct=false
     90 
     91 echo "Running Switching Memory Tests ..."
     92 
     93 #Need to init misc before testing for MMU_XQ0, 1 ~29
     94 init soc; init misc;
     95 
     96 echo " MMU_XQ0";
     97 tr 50 M=MMU_XQ0;
     98 tr 51 M=MMU_XQ0;
     99 tr 52 M=MMU_XQ0;
    100 tr 71 M=MMU_XQ0 TSE=F SLTH=T;
    101 tr 71 M=MMU_XQ0 TSE=T SLTH=T;
    102 tr 71 M=MMU_XQ0 TSE=T SLTH=F;
    103 echo " MMU_XQ10";
    104 tr 50 M=MMU_XQ10;
    105 tr 51 M=MMU_XQ10;
    106 tr 52 M=MMU_XQ10;
    107 tr 71 M=MMU_XQ10 TSE=F SLTH=T;
    108 tr 71 M=MMU_XQ10 TSE=T SLTH=T;
    109 tr 71 M=MMU_XQ10 TSE=T SLTH=F;
    110 echo " MMU_XQ11";
    111 tr 50 M=MMU_XQ11;
    112 tr 51 M=MMU_XQ11;
    113 tr 52 M=MMU_XQ11;
    114 tr 71 M=MMU_XQ11 TSE=F SLTH=T;
    115 tr 71 M=MMU_XQ11 TSE=T SLTH=T;
    116 tr 71 M=MMU_XQ11 TSE=T SLTH=F;
    117 echo " MMU_XQ12";
    118 tr 50 M=MMU_XQ12;
    119 tr 51 M=MMU_XQ12;
    120 tr 52 M=MMU_XQ12;
    121 tr 71 M=MMU_XQ12 TSE=F SLTH=T;
    122 tr 71 M=MMU_XQ12 TSE=T SLTH=T;
    123 tr 71 M=MMU_XQ12 TSE=T SLTH=F;
    124 echo " MMU_XQ13";
    125 tr 50 M=MMU_XQ13;
    126 tr 51 M=MMU_XQ13;
    127 tr 52 M=MMU_XQ13;
    128 tr 71 M=MMU_XQ13 TSE=F SLTH=T;
    129 tr 71 M=MMU_XQ13 TSE=T SLTH=T;
    130 tr 71 M=MMU_XQ13 TSE=T SLTH=F;
    131 echo " MMU_XQ14";
    132 tr 50 M=MMU_XQ14;
    133 tr 51 M=MMU_XQ14;
    134 tr 52 M=MMU_XQ14;
    135 tr 71 M=MMU_XQ14 TSE=F SLTH=T;
    136 tr 71 M=MMU_XQ14 TSE=T SLTH=T;
    137 tr 71 M=MMU_XQ14 TSE=T SLTH=F;
    138 echo " MMU_XQ15";
    139 tr 50 M=MMU_XQ15;
    140 tr 51 M=MMU_XQ15;
    141 tr 52 M=MMU_XQ15;
    142 tr 71 M=MMU_XQ15 TSE=F SLTH=T;
    143 tr 71 M=MMU_XQ15 TSE=T SLTH=T;
    144 tr 71 M=MMU_XQ15 TSE=T SLTH=F;
    145 echo " MMU_XQ16";
    146 tr 50 M=MMU_XQ16;
    147 tr 51 M=MMU_XQ16;
    148 tr 52 M=MMU_XQ16;
    149 tr 71 M=MMU_XQ16 TSE=F SLTH=T;
    150 tr 71 M=MMU_XQ16 TSE=T SLTH=T;
    151 tr 71 M=MMU_XQ16 TSE=T SLTH=F;
    152 echo " MMU_XQ17";
    153 tr 50 M=MMU_XQ17;
    154 tr 51 M=MMU_XQ17;
    155 tr 52 M=MMU_XQ17;
    156 tr 71 M=MMU_XQ17 TSE=F SLTH=T;
    157 tr 71 M=MMU_XQ17 TSE=T SLTH=T;
    158 tr 71 M=MMU_XQ17 TSE=T SLTH=F;
    159 echo " MMU_XQ18";
    160 tr 50 M=MMU_XQ18;
    161 tr 51 M=MMU_XQ18;
    162 tr 52 M=MMU_XQ18;
    163 tr 71 M=MMU_XQ18 TSE=F SLTH=T;
    164 tr 71 M=MMU_XQ18 TSE=T SLTH=T;
    165 tr 71 M=MMU_XQ18 TSE=T SLTH=F;
    166 echo " MMU_XQ19";
    167 tr 50 M=MMU_XQ19;
    168 tr 51 M=MMU_XQ19;
    169 tr 52 M=MMU_XQ19;
    170 tr 71 M=MMU_XQ19 TSE=F SLTH=T;
    171 tr 71 M=MMU_XQ19 TSE=T SLTH=T;
    172 tr 71 M=MMU_XQ19 TSE=T SLTH=F;
    173 echo " MMU_XQ2";
    174 tr 50 M=MMU_XQ2;
    175 tr 51 M=MMU_XQ2;
    176 tr 52 M=MMU_XQ2;
    177 tr 71 M=MMU_XQ2 TSE=F SLTH=T;
    178 tr 71 M=MMU_XQ2 TSE=T SLTH=T;
    179 tr 71 M=MMU_XQ2 TSE=T SLTH=F;
    180 echo " MMU_XQ20";
    181 tr 50 M=MMU_XQ20;
    182 tr 51 M=MMU_XQ20;
    183 tr 52 M=MMU_XQ20;
    184 tr 71 M=MMU_XQ20 TSE=F SLTH=T;
    185 tr 71 M=MMU_XQ20 TSE=T SLTH=T;
    186 tr 71 M=MMU_XQ20 TSE=T SLTH=F;
    187 echo " MMU_XQ21";
    188 tr 50 M=MMU_XQ21;
    189 tr 51 M=MMU_XQ21;
    190 tr 52 M=MMU_XQ21;
    191 tr 71 M=MMU_XQ21 TSE=F SLTH=T;
    192 tr 71 M=MMU_XQ21 TSE=T SLTH=T;
    193 tr 71 M=MMU_XQ21 TSE=T SLTH=F;
    194 echo " MMU_XQ22";
    195 tr 50 M=MMU_XQ22;
    196 tr 51 M=MMU_XQ22;
    197 tr 52 M=MMU_XQ22;
    198 tr 71 M=MMU_XQ22 TSE=F SLTH=T;
    199 tr 71 M=MMU_XQ22 TSE=T SLTH=T;
    200 tr 71 M=MMU_XQ22 TSE=T SLTH=F;
    201 echo " MMU_XQ23";
    202 tr 50 M=MMU_XQ23;
    203 tr 51 M=MMU_XQ23;
    204 tr 52 M=MMU_XQ23;
    205 tr 71 M=MMU_XQ23 TSE=F SLTH=T;
    206 tr 71 M=MMU_XQ23 TSE=T SLTH=T;
    207 tr 71 M=MMU_XQ23 TSE=T SLTH=F;
    208 echo " MMU_XQ24";
    209 tr 50 M=MMU_XQ24;
    210 tr 51 M=MMU_XQ24;
    211 tr 52 M=MMU_XQ24;
    212 tr 71 M=MMU_XQ24 TSE=F SLTH=T;
    213 tr 71 M=MMU_XQ24 TSE=T SLTH=T;
    214 tr 71 M=MMU_XQ24 TSE=T SLTH=F;
    215 echo " MMU_XQ25";
    216 tr 50 M=MMU_XQ25;
    217 tr 51 M=MMU_XQ25;
    218 tr 52 M=MMU_XQ25;
    219 tr 71 M=MMU_XQ25 TSE=F SLTH=T;
    220 tr 71 M=MMU_XQ25 TSE=T SLTH=T;
    221 tr 71 M=MMU_XQ25 TSE=T SLTH=F;
    222 echo " MMU_XQ26";
    223 tr 50 M=MMU_XQ26;
    224 tr 51 M=MMU_XQ26;
    225 tr 52 M=MMU_XQ26;
    226 tr 71 M=MMU_XQ26 TSE=F SLTH=T;
    227 tr 71 M=MMU_XQ26 TSE=T SLTH=T;
    228 tr 71 M=MMU_XQ26 TSE=T SLTH=F;
    229 echo " MMU_XQ27";
    230 tr 50 M=MMU_XQ27;
    231 tr 51 M=MMU_XQ27;
    232 tr 52 M=MMU_XQ27;
    233 tr 71 M=MMU_XQ27 TSE=F SLTH=T;
    234 tr 71 M=MMU_XQ27 TSE=T SLTH=T;
    235 tr 71 M=MMU_XQ27 TSE=T SLTH=F;
    236 echo " MMU_XQ28";
    237 tr 50 M=MMU_XQ28;
    238 tr 51 M=MMU_XQ28;
    239 tr 52 M=MMU_XQ28;
    240 tr 71 M=MMU_XQ28 TSE=F SLTH=T;
    241 tr 71 M=MMU_XQ28 TSE=T SLTH=T;
    242 tr 71 M=MMU_XQ28 TSE=T SLTH=F;
    243 echo " MMU_XQ29";
    244 tr 50 M=MMU_XQ29;
    245 tr 51 M=MMU_XQ29;
    246 tr 52 M=MMU_XQ29;
    247 tr 71 M=MMU_XQ29 TSE=F SLTH=T;
    248 tr 71 M=MMU_XQ29 TSE=T SLTH=T;
    249 tr 71 M=MMU_XQ29 TSE=T SLTH=F;
    250 echo " MMU_XQ3";
    251 tr 50 M=MMU_XQ3;
    252 tr 51 M=MMU_XQ3;
    253 tr 52 M=MMU_XQ3;
    254 tr 71 M=MMU_XQ3 TSE=F SLTH=T;
    255 tr 71 M=MMU_XQ3 TSE=T SLTH=T;
    256 tr 71 M=MMU_XQ3 TSE=T SLTH=F;
    257 echo " MMU_XQ30";
    258 tr 50 M=MMU_XQ30;
    259 tr 51 M=MMU_XQ30;
    260 tr 52 M=MMU_XQ30;
    261 tr 71 M=MMU_XQ30 TSE=F SLTH=T;
    262 tr 71 M=MMU_XQ30 TSE=T SLTH=T;
    263 tr 71 M=MMU_XQ30 TSE=T SLTH=F;
    264 echo " MMU_XQ31";
    265 tr 50 M=MMU_XQ31;
    266 tr 51 M=MMU_XQ31;
    267 tr 52 M=MMU_XQ31;
    268 tr 71 M=MMU_XQ31 TSE=F SLTH=T;
    269 tr 71 M=MMU_XQ31 TSE=T SLTH=T;
    270 tr 71 M=MMU_XQ31 TSE=T SLTH=F;
    271 echo " MMU_XQ4";
    272 tr 50 M=MMU_XQ4;
    273 tr 51 M=MMU_XQ4;
    274 tr 52 M=MMU_XQ4;
    275 tr 71 M=MMU_XQ4 TSE=F SLTH=T;
    276 tr 71 M=MMU_XQ4 TSE=T SLTH=T;
    277 tr 71 M=MMU_XQ4 TSE=T SLTH=F;
    278 echo " MMU_XQ5";
    279 tr 50 M=MMU_XQ5;
    280 tr 51 M=MMU_XQ5;
    281 tr 52 M=MMU_XQ5;
    282 tr 71 M=MMU_XQ5 TSE=F SLTH=T;
    283 tr 71 M=MMU_XQ5 TSE=T SLTH=T;
    284 tr 71 M=MMU_XQ5 TSE=T SLTH=F;
    285 echo " MMU_XQ6";
    286 tr 50 M=MMU_XQ6;
    287 tr 51 M=MMU_XQ6;
    288 tr 52 M=MMU_XQ6;
    289 tr 71 M=MMU_XQ6 TSE=F SLTH=T;
    290 tr 71 M=MMU_XQ6 TSE=T SLTH=T;
    291 tr 71 M=MMU_XQ6 TSE=T SLTH=F;
    292 echo " MMU_XQ7";
    293 tr 50 M=MMU_XQ7;
    294 tr 51 M=MMU_XQ7;
    295 tr 52 M=MMU_XQ7;
    296 tr 71 M=MMU_XQ7 TSE=F SLTH=T;
    297 tr 71 M=MMU_XQ7 TSE=T SLTH=T;
    298 tr 71 M=MMU_XQ7 TSE=T SLTH=F;
    299 echo " MMU_XQ8";
    300 tr 50 M=MMU_XQ8;
    301 tr 51 M=MMU_XQ8;
    302 tr 52 M=MMU_XQ8;
    303 tr 71 M=MMU_XQ8 TSE=F SLTH=T;
    304 tr 71 M=MMU_XQ8 TSE=T SLTH=T;
    305 tr 71 M=MMU_XQ8 TSE=T SLTH=F;
    306 echo " MMU_XQ9";
    307 tr 50 M=MMU_XQ9;
    308 tr 51 M=MMU_XQ9;
    309 tr 52 M=MMU_XQ9;
    310 tr 71 M=MMU_XQ9 TSE=F SLTH=T;
    311 tr 71 M=MMU_XQ9 TSE=T SLTH=T;
    312 tr 71 M=MMU_XQ9 TSE=T SLTH=F;
    313 
    314 init soc; init mmu;
    315 
    316 echo " ALTERNATE_EMIRROR_BITMAP";
    317 tr 50 M=ALTERNATE_EMIRROR_BITMAP;
    318 tr 51 M=ALTERNATE_EMIRROR_BITMAP;
    319 tr 52 M=ALTERNATE_EMIRROR_BITMAP;
    320 tr 71 M=ALTERNATE_EMIRROR_BITMAP TSE=F SLTH=T;
    321 tr 71 M=ALTERNATE_EMIRROR_BITMAP TSE=T SLTH=T;
    322 tr 71 M=ALTERNATE_EMIRROR_BITMAP TSE=T SLTH=F;
    323 echo " CNG_MAP";
    324 tr 50 M=CNG_MAP;
    325 tr 51 M=CNG_MAP;
    326 tr 52 M=CNG_MAP;
    327 tr 71 M=CNG_MAP TSE=F SLTH=T;
    328 tr 71 M=CNG_MAP TSE=T SLTH=T;
    329 tr 71 M=CNG_MAP TSE=T SLTH=F;
    330 echo " CPU_COS_MAP";
    331 tr 50 M=CPU_COS_MAP;
    332 tr 51 M=CPU_COS_MAP;
    333 tr 52 M=CPU_COS_MAP;
    334 tr 71 M=CPU_COS_MAP TSE=F SLTH=T;
    335 tr 71 M=CPU_COS_MAP TSE=T SLTH=T;
    336 tr 71 M=CPU_COS_MAP TSE=T SLTH=F;
    337 echo " CPU_COS_MAP_DATA_ONLY";
    338 tr 50 M=CPU_COS_MAP_DATA_ONLY;
    339 tr 51 M=CPU_COS_MAP_DATA_ONLY;
    340 tr 52 M=CPU_COS_MAP_DATA_ONLY;
    341 tr 71 M=CPU_COS_MAP_DATA_ONLY TSE=F SLTH=T;
    342 tr 71 M=CPU_COS_MAP_DATA_ONLY TSE=T SLTH=T;
    343 tr 71 M=CPU_COS_MAP_DATA_ONLY TSE=T SLTH=F;
    344 echo " CPU_COS_MAP_ONLY";
    345 tr 50 M=CPU_COS_MAP_ONLY;
    346 tr 51 M=CPU_COS_MAP_ONLY;
    347 tr 52 M=CPU_COS_MAP_ONLY;
    348 tr 71 M=CPU_COS_MAP_ONLY TSE=F SLTH=T;
    349 tr 71 M=CPU_COS_MAP_ONLY TSE=T SLTH=T;
    350 tr 71 M=CPU_COS_MAP_ONLY TSE=T SLTH=F;
    351 echo " CPU_TS_MAP";
    352 tr 50 M=CPU_TS_MAP;
    353 tr 51 M=CPU_TS_MAP;
    354 tr 52 M=CPU_TS_MAP;
    355 tr 71 M=CPU_TS_MAP TSE=F SLTH=T;
    356 tr 71 M=CPU_TS_MAP TSE=T SLTH=T;
    357 tr 71 M=CPU_TS_MAP TSE=T SLTH=F;
    358 echo " CUSTOM_HEADER_MATCH";
    359 tr 50 M=CUSTOM_HEADER_MATCH;
    360 tr 51 M=CUSTOM_HEADER_MATCH;
    361 tr 52 M=CUSTOM_HEADER_MATCH;
    362 tr 71 M=CUSTOM_HEADER_MATCH TSE=F SLTH=T;
    363 tr 71 M=CUSTOM_HEADER_MATCH TSE=T SLTH=T;
    364 tr 71 M=CUSTOM_HEADER_MATCH TSE=T SLTH=F;
    365 echo " CUSTOM_HEADER_POLICY_TABLE";
    366 tr 50 M=CUSTOM_HEADER_POLICY_TABLE;
    367 tr 51 M=CUSTOM_HEADER_POLICY_TABLE;
    368 tr 52 M=CUSTOM_HEADER_POLICY_TABLE;
    369 tr 71 M=CUSTOM_HEADER_POLICY_TABLE TSE=F SLTH=T;
    370 tr 71 M=CUSTOM_HEADER_POLICY_TABLE TSE=T SLTH=T;
    371 tr 71 M=CUSTOM_HEADER_POLICY_TABLE TSE=T SLTH=F;
    372 echo " DSCP_TABLE";
    373 tr 50 M=DSCP_TABLE;
    374 tr 51 M=DSCP_TABLE;
    375 tr 52 M=DSCP_TABLE;
    376 tr 71 M=DSCP_TABLE TSE=F SLTH=T;
    377 tr 71 M=DSCP_TABLE TSE=T SLTH=T;
    378 tr 71 M=DSCP_TABLE TSE=T SLTH=F;
    379 echo " E2E_HOL_STATUS";
    380 tr 50 M=E2E_HOL_STATUS;
    381 tr 51 M=E2E_HOL_STATUS;
    382 tr 52 M=E2E_HOL_STATUS;
    383 tr 71 M=E2E_HOL_STATUS TSE=F SLTH=T;
    384 tr 71 M=E2E_HOL_STATUS TSE=T SLTH=T;
    385 tr 71 M=E2E_HOL_STATUS TSE=T SLTH=F;
    386 if  $?BCM5616X_A0 || $?BCM5344X_A0 \
    387     'echo " EFP_COUNTER_TABLE"; \
    388     tr 50 M=EFP_COUNTER_TABLE; \
    389     tr 51 M=EFP_COUNTER_TABLE; \
    390     tr 52 M=EFP_COUNTER_TABLE; \
    391     tr 71 M=EFP_COUNTER_TABLE TSE=F SLTH=T; \
    392     tr 71 M=EFP_COUNTER_TABLE TSE=T SLTH=T; \
    393     tr 71 M=EFP_COUNTER_TABLE TSE=T SLTH=F; \
    394     echo " EFP_METER_TABLE"; \
    395     tr 50 M=EFP_METER_TABLE; \
    396     tr 51 M=EFP_METER_TABLE; \
    397     tr 52 M=EFP_METER_TABLE; \
    398     tr 71 M=EFP_METER_TABLE TSE=F SLTH=T; \
    399     tr 71 M=EFP_METER_TABLE TSE=T SLTH=T; \
    400     tr 71 M=EFP_METER_TABLE TSE=T SLTH=F; \
    401     echo " EFP_POLICY_TABLE"; \
    402     tr 50 M=EFP_POLICY_TABLE; \
    403     tr 51 M=EFP_POLICY_TABLE; \
    404     tr 52 M=EFP_POLICY_TABLE; \
    405     tr 71 M=EFP_POLICY_TABLE TSE=F SLTH=T; \
    406     tr 71 M=EFP_POLICY_TABLE TSE=T SLTH=T; \
    407     tr 71 M=EFP_POLICY_TABLE TSE=T SLTH=F; \
    408     echo " EFP_TCAM"; \
    409     tr 50 M=EFP_TCAM; \
    410     tr 51 M=EFP_TCAM; \
    411     tr 52 M=EFP_TCAM; \
    412     tr 71 M=EFP_TCAM TSE=F SLTH=T; \
    413     tr 71 M=EFP_TCAM TSE=T SLTH=T; \
    414     tr 71 M=EFP_TCAM TSE=T SLTH=F; \
    415     echo " VFP_POLICY_TABLE"; \
    416     tr 50 M=VFP_POLICY_TABLE; \
    417     tr 51 M=VFP_POLICY_TABLE; \
    418     tr 52 M=VFP_POLICY_TABLE; \
    419     tr 71 M=VFP_POLICY_TABLE TSE=F SLTH=T; \
    420     tr 71 M=VFP_POLICY_TABLE TSE=T SLTH=T; \
    421     tr 71 M=VFP_POLICY_TABLE TSE=T SLTH=F; \
    422     echo " VFP_TCAM"; \
    423     tr 50 M=VFP_TCAM; \
    424     tr 51 M=VFP_TCAM; \
    425     tr 52 M=VFP_TCAM; \
    426     tr 71 M=VFP_TCAM TSE=F SLTH=T; \
    427     tr 71 M=VFP_TCAM TSE=T SLTH=T; \
    428     tr 71 M=VFP_TCAM TSE=T SLTH=F;'
    429 if  $?BCM5616X_A0 \
    430     'echo " INITIAL_L3_ECMP"; \
    431     tr 50 M=INITIAL_L3_ECMP; \
    432     tr 51 M=INITIAL_L3_ECMP; \
    433     tr 52 M=INITIAL_L3_ECMP; \
    434     tr 71 M=INITIAL_L3_ECMP TSE=F SLTH=T; \
    435     tr 71 M=INITIAL_L3_ECMP TSE=T SLTH=T; \
    436     tr 71 M=INITIAL_L3_ECMP TSE=T SLTH=F; \
    437     echo " INITIAL_L3_ECMP_GROUP"; \
    438     tr 50 M=INITIAL_L3_ECMP_GROUP; \
    439     tr 51 M=INITIAL_L3_ECMP_GROUP; \
    440     tr 52 M=INITIAL_L3_ECMP_GROUP; \
    441     tr 71 M=INITIAL_L3_ECMP_GROUP TSE=F SLTH=T; \
    442     tr 71 M=INITIAL_L3_ECMP_GROUP TSE=T SLTH=T; \
    443     tr 71 M=INITIAL_L3_ECMP_GROUP TSE=T SLTH=F; \
    444     echo " L3_ECMP"; \
    445     tr 50 M=L3_ECMP; \
    446     tr 51 M=L3_ECMP; \
    447     tr 52 M=L3_ECMP; \
    448     tr 71 M=L3_ECMP TSE=F SLTH=T; \
    449     tr 71 M=L3_ECMP TSE=T SLTH=T; \
    450     tr 71 M=L3_ECMP TSE=T SLTH=F; \
    451     echo " L3_ECMP_GROUP"; \
    452     tr 50 M=L3_ECMP_GROUP; \
    453     tr 51 M=L3_ECMP_GROUP; \
    454     tr 52 M=L3_ECMP_GROUP; \
    455     tr 71 M=L3_ECMP_GROUP TSE=F SLTH=T; \
    456     tr 71 M=L3_ECMP_GROUP TSE=T SLTH=T; \
    457     tr 71 M=L3_ECMP_GROUP TSE=T SLTH=F;'
    458 echo " FP_GLOBAL_MASK_TCAM";
    459 tr 50 M=FP_GLOBAL_MASK_TCAM;
    460 tr 51 M=FP_GLOBAL_MASK_TCAM;
    461 tr 52 M=FP_GLOBAL_MASK_TCAM;
    462 if  $?BCM5616X_A0 || $?BCM5344X_A0 \
    463     'tr 71 M=FP_GLOBAL_MASK_TCAM TSE=F SLTH=T; \
    464     tr 71 M=FP_GLOBAL_MASK_TCAM TSE=T SLTH=T; \
    465     tr 71 M=FP_GLOBAL_MASK_TCAM TSE=T SLTH=F;'
    466 if $?BCM5616XLITE_A0 
    467     for s=0,1920,128 \
    468         'echo " Start = $s Count = 64"; \
    469         tr 71 Start=$s Count=64 M=FP_GLOBAL_MASK_TCAM TSE=F SLTH=T; \
    470         tr 71 Start=$s Count=64 M=FP_GLOBAL_MASK_TCAM TSE=T SLTH=T; \
    471         tr 71 Start=$s Count=64 M=FP_GLOBAL_MASK_TCAM TSE=T SLTH=F;'
    472 if $?BCM5343X_A0 
    473     for s=0,896,128 \
    474         'echo " Start = $s Count = 64"; \
    475         tr 71 Start=$s Count=64 M=FP_GLOBAL_MASK_TCAM TSE=F SLTH=T; \
    476         tr 71 Start=$s Count=64 M=FP_GLOBAL_MASK_TCAM TSE=T SLTH=T; \
    477         tr 71 Start=$s Count=64 M=FP_GLOBAL_MASK_TCAM TSE=T SLTH=F;'
    478 echo " FP_TCAM";
    479 tr 50 M=FP_TCAM;
    480 tr 51 M=FP_TCAM;
    481 tr 52 M=FP_TCAM;
    482 if  $?BCM5616X_A0 || $?BCM5344X_A0 \
    483     'tr 71 M=FP_TCAM TSE=F SLTH=T; \
    484     tr 71 M=FP_TCAM TSE=T SLTH=T; \
    485     tr 71 M=FP_TCAM TSE=T SLTH=F;' 
    486 if  $?BCM5616XLITE_A0 
    487     for s=0,1920,128 \
    488         'echo " Start = $s Count = 64"; \
    489         tr 71 Start=$s Count=64 M=FP_TCAM TSE=F SLTH=T; \
    490         tr 71 Start=$s Count=64 M=FP_TCAM TSE=T SLTH=T; \
    491         tr 71 Start=$s Count=64 M=FP_TCAM TSE=T SLTH=F;'
    492 if  $?BCM5343X_A0 
    493     for s=0,896,128 \
    494         'echo " Start = $s Count = 64"; \
    495         tr 71 Start=$s Count=64 M=FP_TCAM TSE=F SLTH=T; \
    496         tr 71 Start=$s Count=64 M=FP_TCAM TSE=T SLTH=T; \
    497         tr 71 Start=$s Count=64 M=FP_TCAM TSE=T SLTH=F;'        
    498 echo " EGR_1588_SA";
    499 tr 50 M=EGR_1588_SA;
    500 tr 51 M=EGR_1588_SA;
    501 tr 52 M=EGR_1588_SA;
    502 tr 71 M=EGR_1588_SA TSE=F SLTH=T;
    503 tr 71 M=EGR_1588_SA TSE=T SLTH=T;
    504 tr 71 M=EGR_1588_SA TSE=T SLTH=F;
    505 echo " EGR_DSCP_ECN_MAP";
    506 tr 50 M=EGR_DSCP_ECN_MAP;
    507 tr 51 M=EGR_DSCP_ECN_MAP;
    508 tr 52 M=EGR_DSCP_ECN_MAP;
    509 tr 71 M=EGR_DSCP_ECN_MAP TSE=F SLTH=T;
    510 tr 71 M=EGR_DSCP_ECN_MAP TSE=T SLTH=T;
    511 tr 71 M=EGR_DSCP_ECN_MAP TSE=T SLTH=F;
    512 echo " EGR_DSCP_TABLE";
    513 tr 50 M=EGR_DSCP_TABLE;
    514 tr 51 M=EGR_DSCP_TABLE;
    515 tr 52 M=EGR_DSCP_TABLE;
    516 tr 71 M=EGR_DSCP_TABLE TSE=F SLTH=T;
    517 tr 71 M=EGR_DSCP_TABLE TSE=T SLTH=T;
    518 tr 71 M=EGR_DSCP_TABLE TSE=T SLTH=F;
    519 echo " EGR_EDB_XMIT_CTRL";
    520 tr 50 M=EGR_EDB_XMIT_CTRL;
    521 tr 51 M=EGR_EDB_XMIT_CTRL;
    522 tr 52 M=EGR_EDB_XMIT_CTRL;
    523 tr 71 M=EGR_EDB_XMIT_CTRL TSE=F SLTH=T;
    524 tr 71 M=EGR_EDB_XMIT_CTRL TSE=T SLTH=T;
    525 tr 71 M=EGR_EDB_XMIT_CTRL TSE=T SLTH=F;
    526 echo " EGR_EM_MTP_INDEX";
    527 tr 50 M=EGR_EM_MTP_INDEX;
    528 tr 51 M=EGR_EM_MTP_INDEX;
    529 tr 52 M=EGR_EM_MTP_INDEX;
    530 tr 71 M=EGR_EM_MTP_INDEX TSE=F SLTH=T;
    531 tr 71 M=EGR_EM_MTP_INDEX TSE=T SLTH=T;
    532 tr 71 M=EGR_EM_MTP_INDEX TSE=T SLTH=F;
    533 echo " EGR_ENABLE";
    534 tr 50 M=EGR_ENABLE;
    535 tr 51 M=EGR_ENABLE;
    536 tr 52 M=EGR_ENABLE;
    537 tr 71 M=EGR_ENABLE TSE=F SLTH=T;
    538 tr 71 M=EGR_ENABLE TSE=T SLTH=T;
    539 tr 71 M=EGR_ENABLE TSE=T SLTH=F;
    540 echo " EGR_ETAG_PCP_MAPPING";
    541 tr 50 M=EGR_ETAG_PCP_MAPPING;
    542 tr 51 M=EGR_ETAG_PCP_MAPPING;
    543 tr 52 M=EGR_ETAG_PCP_MAPPING;
    544 tr 71 M=EGR_ETAG_PCP_MAPPING TSE=F SLTH=T;
    545 tr 71 M=EGR_ETAG_PCP_MAPPING TSE=T SLTH=T;
    546 tr 71 M=EGR_ETAG_PCP_MAPPING TSE=T SLTH=F;
    547 echo " EGR_GPP_ATTRIBUTES";
    548 tr 50 M=EGR_GPP_ATTRIBUTES;
    549 tr 51 M=EGR_GPP_ATTRIBUTES;
    550 tr 52 M=EGR_GPP_ATTRIBUTES;
    551 tr 71 M=EGR_GPP_ATTRIBUTES TSE=F SLTH=T;
    552 tr 71 M=EGR_GPP_ATTRIBUTES TSE=T SLTH=T;
    553 tr 71 M=EGR_GPP_ATTRIBUTES TSE=T SLTH=F;
    554 echo " EGR_GPP_ATTRIBUTES_MODBASE";
    555 tr 50 M=EGR_GPP_ATTRIBUTES_MODBASE;
    556 tr 51 M=EGR_GPP_ATTRIBUTES_MODBASE;
    557 tr 52 M=EGR_GPP_ATTRIBUTES_MODBASE;
    558 tr 71 M=EGR_GPP_ATTRIBUTES_MODBASE TSE=F SLTH=T;
    559 tr 71 M=EGR_GPP_ATTRIBUTES_MODBASE TSE=T SLTH=T;
    560 tr 71 M=EGR_GPP_ATTRIBUTES_MODBASE TSE=T SLTH=F;
    561 echo " EGR_HEADER_ENCAP_DATA";
    562 tr 50 M=EGR_HEADER_ENCAP_DATA;
    563 tr 51 M=EGR_HEADER_ENCAP_DATA;
    564 tr 52 M=EGR_HEADER_ENCAP_DATA;
    565 tr 71 M=EGR_HEADER_ENCAP_DATA TSE=F SLTH=T;
    566 tr 71 M=EGR_HEADER_ENCAP_DATA TSE=T SLTH=T;
    567 tr 71 M=EGR_HEADER_ENCAP_DATA TSE=T SLTH=F;
    568 echo " EGR_IM_MTP_INDEX";
    569 tr 50 M=EGR_IM_MTP_INDEX;
    570 tr 51 M=EGR_IM_MTP_INDEX;
    571 tr 52 M=EGR_IM_MTP_INDEX;
    572 tr 71 M=EGR_IM_MTP_INDEX TSE=F SLTH=T;
    573 tr 71 M=EGR_IM_MTP_INDEX TSE=T SLTH=T;
    574 tr 71 M=EGR_IM_MTP_INDEX TSE=T SLTH=F;
    575 echo " EGR_INT_CN_TO_IP_MAPPING";
    576 tr 50 M=EGR_INT_CN_TO_IP_MAPPING;
    577 tr 51 M=EGR_INT_CN_TO_IP_MAPPING;
    578 tr 52 M=EGR_INT_CN_TO_IP_MAPPING;
    579 tr 71 M=EGR_INT_CN_TO_IP_MAPPING TSE=F SLTH=T;
    580 tr 71 M=EGR_INT_CN_TO_IP_MAPPING TSE=T SLTH=T;
    581 tr 71 M=EGR_INT_CN_TO_IP_MAPPING TSE=T SLTH=F;
    582 echo " EGR_INT_CN_UPDATE";
    583 tr 50 M=EGR_INT_CN_UPDATE;
    584 tr 51 M=EGR_INT_CN_UPDATE;
    585 tr 52 M=EGR_INT_CN_UPDATE;
    586 tr 71 M=EGR_INT_CN_UPDATE TSE=F SLTH=T;
    587 tr 71 M=EGR_INT_CN_UPDATE TSE=T SLTH=T;
    588 tr 71 M=EGR_INT_CN_UPDATE TSE=T SLTH=F;
    589 if $?BCM5616X_A0 || $?BCM5616XLITE_A0 \
    590     'echo " EGR_L3_INTF"; \
    591     tr 50 M=EGR_L3_INTF; \
    592     tr 51 M=EGR_L3_INTF; \
    593     tr 52 M=EGR_L3_INTF; \
    594     tr 71 M=EGR_L3_INTF TSE=F SLTH=T; \
    595     tr 71 M=EGR_L3_INTF TSE=T SLTH=T; \
    596     tr 71 M=EGR_L3_INTF TSE=T SLTH=F; \
    597     echo " EGR_L3_NEXT_HOP"; \
    598     tr 50 M=EGR_L3_NEXT_HOP; \
    599     tr 51 M=EGR_L3_NEXT_HOP; \
    600     tr 52 M=EGR_L3_NEXT_HOP; \
    601     tr 71 M=EGR_L3_NEXT_HOP TSE=F SLTH=T; \
    602     tr 71 M=EGR_L3_NEXT_HOP TSE=T SLTH=T; \
    603     tr 71 M=EGR_L3_NEXT_HOP TSE=T SLTH=F;'
    604 echo " EGR_MAC_DA_PROFILE";
    605 tr 50 M=EGR_MAC_DA_PROFILE;
    606 tr 51 M=EGR_MAC_DA_PROFILE;
    607 tr 52 M=EGR_MAC_DA_PROFILE;
    608 tr 71 M=EGR_MAC_DA_PROFILE TSE=F SLTH=T;
    609 tr 71 M=EGR_MAC_DA_PROFILE TSE=T SLTH=T;
    610 tr 71 M=EGR_MAC_DA_PROFILE TSE=T SLTH=F;
    611 echo " EGR_MASK";
    612 tr 50 M=EGR_MASK;
    613 tr 51 M=EGR_MASK;
    614 tr 52 M=EGR_MASK;
    615 tr 71 M=EGR_MASK TSE=F SLTH=T;
    616 tr 71 M=EGR_MASK TSE=T SLTH=T;
    617 tr 71 M=EGR_MASK TSE=T SLTH=F;
    618 echo " EGR_MASK_MODBASE";
    619 tr 50 M=EGR_MASK_MODBASE;
    620 tr 51 M=EGR_MASK_MODBASE;
    621 tr 52 M=EGR_MASK_MODBASE;
    622 tr 71 M=EGR_MASK_MODBASE TSE=F SLTH=T;
    623 tr 71 M=EGR_MASK_MODBASE TSE=T SLTH=T;
    624 tr 71 M=EGR_MASK_MODBASE TSE=T SLTH=F;
    625 #echo " EGR_MAX_USED_ENTRIES";
    626 #tr 50 M=EGR_MAX_USED_ENTRIES;
    627 #tr 51 M=EGR_MAX_USED_ENTRIES;
    628 #tr 52 M=EGR_MAX_USED_ENTRIES;
    629 #tr 71 M=EGR_MAX_USED_ENTRIES TSE=F SLTH=T;
    630 #tr 71 M=EGR_MAX_USED_ENTRIES TSE=T SLTH=T;
    631 #tr 71 M=EGR_MAX_USED_ENTRIES TSE=T SLTH=F;
    632 echo " EGR_MIRROR_ENCAP_CONTROL";
    633 tr 50 M=EGR_MIRROR_ENCAP_CONTROL;
    634 tr 51 M=EGR_MIRROR_ENCAP_CONTROL;
    635 tr 52 M=EGR_MIRROR_ENCAP_CONTROL;
    636 tr 71 M=EGR_MIRROR_ENCAP_CONTROL TSE=F SLTH=T;
    637 tr 71 M=EGR_MIRROR_ENCAP_CONTROL TSE=T SLTH=T;
    638 tr 71 M=EGR_MIRROR_ENCAP_CONTROL TSE=T SLTH=F;
    639 echo " EGR_MIRROR_ENCAP_DATA_1";
    640 tr 50 M=EGR_MIRROR_ENCAP_DATA_1;
    641 tr 51 M=EGR_MIRROR_ENCAP_DATA_1;
    642 tr 52 M=EGR_MIRROR_ENCAP_DATA_1;
    643 tr 71 M=EGR_MIRROR_ENCAP_DATA_1 TSE=F SLTH=T;
    644 tr 71 M=EGR_MIRROR_ENCAP_DATA_1 TSE=T SLTH=T;
    645 tr 71 M=EGR_MIRROR_ENCAP_DATA_1 TSE=T SLTH=F;
    646 echo " EGR_MIRROR_ENCAP_DATA_2";
    647 tr 50 M=EGR_MIRROR_ENCAP_DATA_2;
    648 tr 51 M=EGR_MIRROR_ENCAP_DATA_2;
    649 tr 52 M=EGR_MIRROR_ENCAP_DATA_2;
    650 tr 71 M=EGR_MIRROR_ENCAP_DATA_2 TSE=F SLTH=T;
    651 tr 71 M=EGR_MIRROR_ENCAP_DATA_2 TSE=T SLTH=T;
    652 tr 71 M=EGR_MIRROR_ENCAP_DATA_2 TSE=T SLTH=F;
    653 #echo " EGR_MMU_REQUESTS";
    654 #tr 50 M=EGR_MMU_REQUESTS;
    655 #tr 51 M=EGR_MMU_REQUESTS;
    656 #tr 52 M=EGR_MMU_REQUESTS;
    657 #tr 71 M=EGR_MMU_REQUESTS TSE=F SLTH=T;
    658 #tr 71 M=EGR_MMU_REQUESTS TSE=T SLTH=T;
    659 #tr 71 M=EGR_MMU_REQUESTS TSE=T SLTH=F;
    660 echo " EGR_MOD_MAP_TABLE";
    661 tr 50 M=EGR_MOD_MAP_TABLE;
    662 tr 51 M=EGR_MOD_MAP_TABLE;
    663 tr 52 M=EGR_MOD_MAP_TABLE;
    664 tr 71 M=EGR_MOD_MAP_TABLE TSE=F SLTH=T;
    665 tr 71 M=EGR_MOD_MAP_TABLE TSE=T SLTH=T;
    666 tr 71 M=EGR_MOD_MAP_TABLE TSE=T SLTH=F;
    667 echo " EGR_MPLS_PRI_MAPPING";
    668 tr 50 M=EGR_MPLS_PRI_MAPPING;
    669 tr 51 M=EGR_MPLS_PRI_MAPPING;
    670 tr 52 M=EGR_MPLS_PRI_MAPPING;
    671 tr 71 M=EGR_MPLS_PRI_MAPPING TSE=F SLTH=T;
    672 tr 71 M=EGR_MPLS_PRI_MAPPING TSE=T SLTH=T;
    673 tr 71 M=EGR_MPLS_PRI_MAPPING TSE=T SLTH=F;
    674 echo " EGR_OAM_MAC_ADDRESS";
    675 tr 50 M=EGR_OAM_MAC_ADDRESS;
    676 tr 51 M=EGR_OAM_MAC_ADDRESS;
    677 tr 52 M=EGR_OAM_MAC_ADDRESS;
    678 tr 71 M=EGR_OAM_MAC_ADDRESS TSE=F SLTH=T;
    679 tr 71 M=EGR_OAM_MAC_ADDRESS TSE=T SLTH=T;
    680 tr 71 M=EGR_OAM_MAC_ADDRESS TSE=T SLTH=F;
    681 echo " EGR_PERQ_XMT_COUNTERS";
    682 tr 50 M=EGR_PERQ_XMT_COUNTERS;
    683 tr 51 M=EGR_PERQ_XMT_COUNTERS;
    684 tr 52 M=EGR_PERQ_XMT_COUNTERS;
    685 tr 71 M=EGR_PERQ_XMT_COUNTERS TSE=F SLTH=T;
    686 tr 71 M=EGR_PERQ_XMT_COUNTERS TSE=T SLTH=T;
    687 tr 71 M=EGR_PERQ_XMT_COUNTERS TSE=T SLTH=F;
    688 echo " EGR_PER_Q_ECN_MARKED";
    689 tr 50 M=EGR_PER_Q_ECN_MARKED;
    690 tr 51 M=EGR_PER_Q_ECN_MARKED;
    691 tr 52 M=EGR_PER_Q_ECN_MARKED;
    692 tr 71 M=EGR_PER_Q_ECN_MARKED TSE=F SLTH=T;
    693 tr 71 M=EGR_PER_Q_ECN_MARKED TSE=T SLTH=T;
    694 tr 71 M=EGR_PER_Q_ECN_MARKED TSE=T SLTH=F;
    695 echo " EGR_PFC_CONTROL";
    696 tr 50 M=EGR_PFC_CONTROL;
    697 tr 51 M=EGR_PFC_CONTROL;
    698 tr 52 M=EGR_PFC_CONTROL;
    699 tr 71 M=EGR_PFC_CONTROL TSE=F SLTH=T;
    700 tr 71 M=EGR_PFC_CONTROL TSE=T SLTH=T;
    701 tr 71 M=EGR_PFC_CONTROL TSE=T SLTH=F;
    702 echo " EGR_PORT_CREDIT_RESET";
    703 tr 50 M=EGR_PORT_CREDIT_RESET;
    704 tr 51 M=EGR_PORT_CREDIT_RESET;
    705 tr 52 M=EGR_PORT_CREDIT_RESET;
    706 tr 71 M=EGR_PORT_CREDIT_RESET TSE=F SLTH=T;
    707 tr 71 M=EGR_PORT_CREDIT_RESET TSE=T SLTH=T;
    708 tr 71 M=EGR_PORT_CREDIT_RESET TSE=T SLTH=F;
    709 #echo " EGR_PORT_REQUESTS";
    710 #tr 50 M=EGR_PORT_REQUESTS;
    711 #tr 51 M=EGR_PORT_REQUESTS;
    712 #tr 52 M=EGR_PORT_REQUESTS;
    713 #tr 71 M=EGR_PORT_REQUESTS TSE=F SLTH=T;
    714 #tr 71 M=EGR_PORT_REQUESTS TSE=T SLTH=T;
    715 #tr 71 M=EGR_PORT_REQUESTS TSE=T SLTH=F;
    716 echo " EGR_PRI_CNG_MAP";
    717 tr 50 M=EGR_PRI_CNG_MAP;
    718 tr 51 M=EGR_PRI_CNG_MAP;
    719 tr 52 M=EGR_PRI_CNG_MAP;
    720 tr 71 M=EGR_PRI_CNG_MAP TSE=F SLTH=T;
    721 tr 71 M=EGR_PRI_CNG_MAP TSE=T SLTH=T;
    722 tr 71 M=EGR_PRI_CNG_MAP TSE=T SLTH=F;
    723 echo " EGR_VLAN";
    724 tr 50 M=EGR_VLAN;
    725 tr 51 M=EGR_VLAN;
    726 tr 52 M=EGR_VLAN;
    727 tr 71 M=EGR_VLAN TSE=F SLTH=T;
    728 tr 71 M=EGR_VLAN TSE=T SLTH=T;
    729 tr 71 M=EGR_VLAN TSE=T SLTH=F;
    730 echo " EGR_VLAN_COUNTER_PRI_COS_MAP";
    731 tr 50 M=EGR_VLAN_COUNTER_PRI_COS_MAP;
    732 tr 51 M=EGR_VLAN_COUNTER_PRI_COS_MAP;
    733 tr 52 M=EGR_VLAN_COUNTER_PRI_COS_MAP;
    734 tr 71 M=EGR_VLAN_COUNTER_PRI_COS_MAP TSE=F SLTH=T;
    735 tr 71 M=EGR_VLAN_COUNTER_PRI_COS_MAP TSE=T SLTH=T;
    736 tr 71 M=EGR_VLAN_COUNTER_PRI_COS_MAP TSE=T SLTH=F;
    737 echo " EGR_VLAN_COUNTER_TABLE";
    738 tr 50 M=EGR_VLAN_COUNTER_TABLE;
    739 tr 51 M=EGR_VLAN_COUNTER_TABLE;
    740 tr 52 M=EGR_VLAN_COUNTER_TABLE;
    741 tr 71 M=EGR_VLAN_COUNTER_TABLE TSE=F SLTH=T;
    742 tr 71 M=EGR_VLAN_COUNTER_TABLE TSE=T SLTH=T;
    743 tr 71 M=EGR_VLAN_COUNTER_TABLE TSE=T SLTH=F;
    744 echo " EGR_VLAN_STG";
    745 tr 50 M=EGR_VLAN_STG;
    746 tr 51 M=EGR_VLAN_STG;
    747 tr 52 M=EGR_VLAN_STG;
    748 tr 71 M=EGR_VLAN_STG TSE=F SLTH=T;
    749 tr 71 M=EGR_VLAN_STG TSE=T SLTH=T;
    750 tr 71 M=EGR_VLAN_STG TSE=T SLTH=F;
    751 echo " EGR_VLAN_TAG_ACTION_PROFILE";
    752 tr 50 M=EGR_VLAN_TAG_ACTION_PROFILE;
    753 tr 51 M=EGR_VLAN_TAG_ACTION_PROFILE;
    754 tr 52 M=EGR_VLAN_TAG_ACTION_PROFILE;
    755 tr 71 M=EGR_VLAN_TAG_ACTION_PROFILE TSE=F SLTH=T;
    756 tr 71 M=EGR_VLAN_TAG_ACTION_PROFILE TSE=T SLTH=T;
    757 tr 71 M=EGR_VLAN_TAG_ACTION_PROFILE TSE=T SLTH=F;
    758 echo " EGR_VLAN_XLATE";
    759 tr 50 M=EGR_VLAN_XLATE;
    760 tr 51 M=EGR_VLAN_XLATE;
    761 tr 52 M=EGR_VLAN_XLATE;
    762 tr 71 M=EGR_VLAN_XLATE TSE=F SLTH=T;
    763 tr 71 M=EGR_VLAN_XLATE TSE=T SLTH=T;
    764 tr 71 M=EGR_VLAN_XLATE TSE=T SLTH=F;
    765 echo " EM_MTP_INDEX";
    766 tr 50 M=EM_MTP_INDEX;
    767 tr 51 M=EM_MTP_INDEX;
    768 tr 52 M=EM_MTP_INDEX;
    769 tr 71 M=EM_MTP_INDEX TSE=F SLTH=T;
    770 tr 71 M=EM_MTP_INDEX TSE=T SLTH=T;
    771 tr 71 M=EM_MTP_INDEX TSE=T SLTH=F;
    772 echo " FP_COUNTER_TABLE";
    773 tr 50 M=FP_COUNTER_TABLE;
    774 tr 51 M=FP_COUNTER_TABLE;
    775 tr 52 M=FP_COUNTER_TABLE;
    776 tr 71 M=FP_COUNTER_TABLE TSE=F SLTH=T;
    777 tr 71 M=FP_COUNTER_TABLE TSE=T SLTH=T;
    778 tr 71 M=FP_COUNTER_TABLE TSE=T SLTH=F;
    779 echo " FP_METER_TABLE";
    780 tr 50 M=FP_METER_TABLE;
    781 tr 51 M=FP_METER_TABLE;
    782 tr 52 M=FP_METER_TABLE;
    783 tr 71 M=FP_METER_TABLE TSE=F SLTH=T;
    784 tr 71 M=FP_METER_TABLE TSE=T SLTH=T;
    785 tr 71 M=FP_METER_TABLE TSE=T SLTH=F;
    786 echo " FP_POLICY_TABLE";
    787 tr 50 M=FP_POLICY_TABLE;
    788 tr 51 M=FP_POLICY_TABLE;
    789 tr 52 M=FP_POLICY_TABLE;
    790 tr 71 M=FP_POLICY_TABLE TSE=F SLTH=T;
    791 tr 71 M=FP_POLICY_TABLE TSE=T SLTH=T;
    792 tr 71 M=FP_POLICY_TABLE TSE=T SLTH=F;
    793 echo " FP_PORT_FIELD_SEL";
    794 tr 50 M=FP_PORT_FIELD_SEL;
    795 tr 51 M=FP_PORT_FIELD_SEL;
    796 tr 52 M=FP_PORT_FIELD_SEL;
    797 tr 71 M=FP_PORT_FIELD_SEL TSE=F SLTH=T;
    798 tr 71 M=FP_PORT_FIELD_SEL TSE=T SLTH=T;
    799 tr 71 M=FP_PORT_FIELD_SEL TSE=T SLTH=F;
    800 echo " FP_PORT_METER_MAP";
    801 tr 50 M=FP_PORT_METER_MAP;
    802 tr 51 M=FP_PORT_METER_MAP;
    803 tr 52 M=FP_PORT_METER_MAP;
    804 tr 71 M=FP_PORT_METER_MAP TSE=F SLTH=T;
    805 tr 71 M=FP_PORT_METER_MAP TSE=T SLTH=T;
    806 tr 71 M=FP_PORT_METER_MAP TSE=T SLTH=F;
    807 echo " FP_RANGE_CHECK";
    808 tr 50 M=FP_RANGE_CHECK;
    809 tr 51 M=FP_RANGE_CHECK;
    810 tr 52 M=FP_RANGE_CHECK;
    811 tr 71 M=FP_RANGE_CHECK TSE=F SLTH=T;
    812 tr 71 M=FP_RANGE_CHECK TSE=T SLTH=T;
    813 tr 71 M=FP_RANGE_CHECK TSE=T SLTH=F;
    814 echo " FP_SLICE_KEY_CONTROL";
    815 tr 50 M=FP_SLICE_KEY_CONTROL;
    816 #tr 51 M=FP_SLICE_KEY_CONTROL;
    817 #tr 52 M=FP_SLICE_KEY_CONTROL;
    818 tr 71 M=FP_SLICE_KEY_CONTROL TSE=F SLTH=T;
    819 tr 71 M=FP_SLICE_KEY_CONTROL TSE=T SLTH=T;
    820 tr 71 M=FP_SLICE_KEY_CONTROL TSE=T SLTH=F;
    821 echo " FP_SLICE_MAP";
    822 tr 50 M=FP_SLICE_MAP;
    823 #tr 51 M=FP_SLICE_MAP;
    824 #tr 52 M=FP_SLICE_MAP;
    825 tr 71 M=FP_SLICE_MAP TSE=F SLTH=T;
    826 tr 71 M=FP_SLICE_MAP TSE=T SLTH=T;
    827 tr 71 M=FP_SLICE_MAP TSE=T SLTH=F;
    828 echo " FP_STORM_CONTROL_METERS";
    829 tr 50 M=FP_STORM_CONTROL_METERS;
    830 tr 51 M=FP_STORM_CONTROL_METERS;
    831 tr 52 M=FP_STORM_CONTROL_METERS;
    832 tr 71 M=FP_STORM_CONTROL_METERS TSE=F SLTH=T;
    833 tr 71 M=FP_STORM_CONTROL_METERS TSE=T SLTH=T;
    834 tr 71 M=FP_STORM_CONTROL_METERS TSE=T SLTH=F;
    835 echo " FP_UDF_OFFSET";
    836 tr 50 M=FP_UDF_OFFSET;
    837 tr 51 M=FP_UDF_OFFSET;
    838 tr 52 M=FP_UDF_OFFSET;
    839 tr 71 M=FP_UDF_OFFSET TSE=F SLTH=T;
    840 tr 71 M=FP_UDF_OFFSET TSE=T SLTH=T;
    841 tr 71 M=FP_UDF_OFFSET TSE=T SLTH=F;
    842 echo " HG_TRUNK_FAILOVER_SET";
    843 tr 50 M=HG_TRUNK_FAILOVER_SET;
    844 tr 51 M=HG_TRUNK_FAILOVER_SET;
    845 tr 52 M=HG_TRUNK_FAILOVER_SET;
    846 tr 71 M=HG_TRUNK_FAILOVER_SET TSE=F SLTH=T;
    847 tr 71 M=HG_TRUNK_FAILOVER_SET TSE=T SLTH=T;
    848 tr 71 M=HG_TRUNK_FAILOVER_SET TSE=T SLTH=F;
    849 echo " IARB_TDM_TABLE";
    850 tr 50 M=IARB_TDM_TABLE;
    851 tr 51 M=IARB_TDM_TABLE;
    852 tr 52 M=IARB_TDM_TABLE;
    853 tr 71 M=IARB_TDM_TABLE TSE=F SLTH=T;
    854 tr 71 M=IARB_TDM_TABLE TSE=T SLTH=T;
    855 tr 71 M=IARB_TDM_TABLE TSE=T SLTH=F;
    856 #echo " IFP_PORT_FIELD_SEL";
    857 #HWALIAS to FP_PORT_FIELD_SEL -- NOTEST
    858 #tr 50 M=IFP_PORT_FIELD_SEL;
    859 #tr 51 M=IFP_PORT_FIELD_SEL;
    860 #tr 52 M=IFP_PORT_FIELD_SEL;
    861 #tr 71 M=IFP_PORT_FIELD_SEL TSE=F SLTH=T;
    862 #tr 71 M=IFP_PORT_FIELD_SEL TSE=T SLTH=T;
    863 #tr 71 M=IFP_PORT_FIELD_SEL TSE=T SLTH=F;
    864 echo " IFP_REDIRECTION_PROFILE";
    865 tr 50 M=IFP_REDIRECTION_PROFILE;
    866 tr 51 M=IFP_REDIRECTION_PROFILE;
    867 tr 52 M=IFP_REDIRECTION_PROFILE;
    868 tr 71 M=IFP_REDIRECTION_PROFILE TSE=F SLTH=T;
    869 tr 71 M=IFP_REDIRECTION_PROFILE TSE=T SLTH=T;
    870 tr 71 M=IFP_REDIRECTION_PROFILE TSE=T SLTH=F;
    871 echo " IM_MTP_INDEX";
    872 tr 50 M=IM_MTP_INDEX;
    873 tr 51 M=IM_MTP_INDEX;
    874 tr 52 M=IM_MTP_INDEX;
    875 tr 71 M=IM_MTP_INDEX TSE=F SLTH=T;
    876 tr 71 M=IM_MTP_INDEX TSE=T SLTH=T;
    877 tr 71 M=IM_MTP_INDEX TSE=T SLTH=F;
    878 echo " ING_1588_INGRESS_CTRL";
    879 tr 50 M=ING_1588_INGRESS_CTRL;
    880 tr 51 M=ING_1588_INGRESS_CTRL;
    881 tr 52 M=ING_1588_INGRESS_CTRL;
    882 tr 71 M=ING_1588_INGRESS_CTRL TSE=F SLTH=T;
    883 tr 71 M=ING_1588_INGRESS_CTRL TSE=T SLTH=T;
    884 tr 71 M=ING_1588_INGRESS_CTRL TSE=T SLTH=F;
    885 echo " ING_ETAG_PCP_MAPPING";
    886 tr 50 M=ING_ETAG_PCP_MAPPING;
    887 tr 51 M=ING_ETAG_PCP_MAPPING;
    888 tr 52 M=ING_ETAG_PCP_MAPPING;
    889 tr 71 M=ING_ETAG_PCP_MAPPING TSE=F SLTH=T;
    890 tr 71 M=ING_ETAG_PCP_MAPPING TSE=T SLTH=T;
    891 tr 71 M=ING_ETAG_PCP_MAPPING TSE=T SLTH=F;
    892 echo " ING_IPV6_MC_RESERVED_ADDRESS";
    893 tr 50 M=ING_IPV6_MC_RESERVED_ADDRESS;
    894 #tr 51 M=ING_IPV6_MC_RESERVED_ADDRESS;
    895 #tr 52 M=ING_IPV6_MC_RESERVED_ADDRESS;
    896 tr 71 M=ING_IPV6_MC_RESERVED_ADDRESS TSE=F SLTH=T;
    897 tr 71 M=ING_IPV6_MC_RESERVED_ADDRESS TSE=T SLTH=T;
    898 tr 71 M=ING_IPV6_MC_RESERVED_ADDRESS TSE=T SLTH=F;
    899 if $?BCM5616X_A0 || $?BCM5616XLITE_A0 \
    900     'echo " ING_L3_NEXT_HOP"; \
    901     tr 50 M=ING_L3_NEXT_HOP; \
    902     tr 51 M=ING_L3_NEXT_HOP; \
    903     tr 52 M=ING_L3_NEXT_HOP; \
    904     tr 71 M=ING_L3_NEXT_HOP TSE=F SLTH=T; \
    905     tr 71 M=ING_L3_NEXT_HOP TSE=T SLTH=T; \
    906     tr 71 M=ING_L3_NEXT_HOP TSE=T SLTH=F;'
    907 echo " ING_MOD_MAP_TABLE";
    908 tr 50 M=ING_MOD_MAP_TABLE;
    909 tr 51 M=ING_MOD_MAP_TABLE;
    910 tr 52 M=ING_MOD_MAP_TABLE;
    911 tr 71 M=ING_MOD_MAP_TABLE TSE=F SLTH=T;
    912 tr 71 M=ING_MOD_MAP_TABLE TSE=T SLTH=T;
    913 tr 71 M=ING_MOD_MAP_TABLE TSE=T SLTH=F;
    914 echo " ING_PHYSICAL_TO_LOGICAL_PORT_NUMBER_MAPPING_TABLE";
    915 tr 50 M=ING_PHYSICAL_TO_LOGICAL_PORT_NUMBER_MAPPING_TABLE;
    916 tr 51 M=ING_PHYSICAL_TO_LOGICAL_PORT_NUMBER_MAPPING_TABLE;
    917 tr 52 M=ING_PHYSICAL_TO_LOGICAL_PORT_NUMBER_MAPPING_TABLE;
    918 tr 71 M=ING_PHYSICAL_TO_LOGICAL_PORT_NUMBER_MAPPING_TABLE TSE=F SLTH=T;
    919 tr 71 M=ING_PHYSICAL_TO_LOGICAL_PORT_NUMBER_MAPPING_TABLE TSE=T SLTH=T;
    920 tr 71 M=ING_PHYSICAL_TO_LOGICAL_PORT_NUMBER_MAPPING_TABLE TSE=T SLTH=F;
    921 echo " ING_PRI_CNG_MAP";
    922 tr 50 M=ING_PRI_CNG_MAP;
    923 tr 51 M=ING_PRI_CNG_MAP;
    924 tr 52 M=ING_PRI_CNG_MAP;
    925 tr 71 M=ING_PRI_CNG_MAP TSE=F SLTH=T;
    926 tr 71 M=ING_PRI_CNG_MAP TSE=T SLTH=T;
    927 tr 71 M=ING_PRI_CNG_MAP TSE=T SLTH=F;
    928 echo " ING_SERVICE_PRI_MAP";
    929 tr 50 M=ING_SERVICE_PRI_MAP;
    930 tr 51 M=ING_SERVICE_PRI_MAP;
    931 tr 52 M=ING_SERVICE_PRI_MAP;
    932 tr 71 M=ING_SERVICE_PRI_MAP TSE=F SLTH=T;
    933 tr 71 M=ING_SERVICE_PRI_MAP TSE=T SLTH=T;
    934 tr 71 M=ING_SERVICE_PRI_MAP TSE=T SLTH=F;
    935 echo " ING_VLAN_COUNTER_PRI_COS_MAP";
    936 tr 50 M=ING_VLAN_COUNTER_PRI_COS_MAP;
    937 tr 51 M=ING_VLAN_COUNTER_PRI_COS_MAP;
    938 tr 52 M=ING_VLAN_COUNTER_PRI_COS_MAP;
    939 tr 71 M=ING_VLAN_COUNTER_PRI_COS_MAP TSE=F SLTH=T;
    940 tr 71 M=ING_VLAN_COUNTER_PRI_COS_MAP TSE=T SLTH=T;
    941 tr 71 M=ING_VLAN_COUNTER_PRI_COS_MAP TSE=T SLTH=F;
    942 echo " ING_VLAN_COUNTER_TABLE";
    943 tr 50 M=ING_VLAN_COUNTER_TABLE;
    944 tr 51 M=ING_VLAN_COUNTER_TABLE;
    945 tr 52 M=ING_VLAN_COUNTER_TABLE;
    946 tr 71 M=ING_VLAN_COUNTER_TABLE TSE=F SLTH=T;
    947 tr 71 M=ING_VLAN_COUNTER_TABLE TSE=T SLTH=T;
    948 tr 71 M=ING_VLAN_COUNTER_TABLE TSE=T SLTH=F;
    949 echo " ING_VLAN_RANGE";
    950 tr 50 M=ING_VLAN_RANGE;
    951 tr 51 M=ING_VLAN_RANGE;
    952 tr 52 M=ING_VLAN_RANGE;
    953 tr 71 M=ING_VLAN_RANGE TSE=F SLTH=T;
    954 tr 71 M=ING_VLAN_RANGE TSE=T SLTH=T;
    955 tr 71 M=ING_VLAN_RANGE TSE=T SLTH=F;
    956 echo " ING_VLAN_TAG_ACTION_PROFILE";
    957 tr 50 M=ING_VLAN_TAG_ACTION_PROFILE;
    958 tr 51 M=ING_VLAN_TAG_ACTION_PROFILE;
    959 tr 52 M=ING_VLAN_TAG_ACTION_PROFILE;
    960 tr 71 M=ING_VLAN_TAG_ACTION_PROFILE TSE=F SLTH=T;
    961 tr 71 M=ING_VLAN_TAG_ACTION_PROFILE TSE=T SLTH=T;
    962 tr 71 M=ING_VLAN_TAG_ACTION_PROFILE TSE=T SLTH=F;
    963 if $?BCM5616X_A0 || $?BCM5616XLITE_A0 \
    964     'echo " INITIAL_ING_L3_NEXT_HOP"; \
    965     tr 50 M=INITIAL_ING_L3_NEXT_HOP; \
    966     tr 51 M=INITIAL_ING_L3_NEXT_HOP; \
    967     tr 52 M=INITIAL_ING_L3_NEXT_HOP; \
    968     tr 71 M=INITIAL_ING_L3_NEXT_HOP TSE=F SLTH=T; \
    969     tr 71 M=INITIAL_ING_L3_NEXT_HOP TSE=T SLTH=T; \
    970     tr 71 M=INITIAL_ING_L3_NEXT_HOP TSE=T SLTH=F;'
    971 echo " INT_CN_TO_MMUIF_MAPPING";
    972 tr 50 M=INT_CN_TO_MMUIF_MAPPING;
    973 tr 51 M=INT_CN_TO_MMUIF_MAPPING;
    974 tr 52 M=INT_CN_TO_MMUIF_MAPPING;
    975 tr 71 M=INT_CN_TO_MMUIF_MAPPING TSE=F SLTH=T;
    976 tr 71 M=INT_CN_TO_MMUIF_MAPPING TSE=T SLTH=T;
    977 tr 71 M=INT_CN_TO_MMUIF_MAPPING TSE=T SLTH=F;
    978 echo " IPORT_TABLE";
    979 tr 50 M=IPORT_TABLE;
    980 tr 51 M=IPORT_TABLE;
    981 tr 52 M=IPORT_TABLE;
    982 tr 71 M=IPORT_TABLE TSE=F SLTH=T;
    983 tr 71 M=IPORT_TABLE TSE=T SLTH=T;
    984 tr 71 M=IPORT_TABLE TSE=T SLTH=F;
    985 echo " IPV4_IN_IPV6_PREFIX_MATCH_TABLE";
    986 tr 50 M=IPV4_IN_IPV6_PREFIX_MATCH_TABLE;
    987 tr 51 M=IPV4_IN_IPV6_PREFIX_MATCH_TABLE;
    988 tr 52 M=IPV4_IN_IPV6_PREFIX_MATCH_TABLE;
    989 tr 71 M=IPV4_IN_IPV6_PREFIX_MATCH_TABLE TSE=F SLTH=T;
    990 tr 71 M=IPV4_IN_IPV6_PREFIX_MATCH_TABLE TSE=T SLTH=T;
    991 tr 71 M=IPV4_IN_IPV6_PREFIX_MATCH_TABLE TSE=T SLTH=F;
    992 echo " IPV6_PROXY_ENABLE_TABLE";
    993 tr 50 M=IPV6_PROXY_ENABLE_TABLE;
    994 tr 51 M=IPV6_PROXY_ENABLE_TABLE;
    995 tr 52 M=IPV6_PROXY_ENABLE_TABLE;
    996 tr 71 M=IPV6_PROXY_ENABLE_TABLE TSE=F SLTH=T;
    997 tr 71 M=IPV6_PROXY_ENABLE_TABLE TSE=T SLTH=T;
    998 tr 71 M=IPV6_PROXY_ENABLE_TABLE TSE=T SLTH=F;
    999 echo " IP_TO_INT_CN_MAPPING";
   1000 tr 50 M=IP_TO_INT_CN_MAPPING;
   1001 tr 51 M=IP_TO_INT_CN_MAPPING;
   1002 tr 52 M=IP_TO_INT_CN_MAPPING;
   1003 tr 71 M=IP_TO_INT_CN_MAPPING TSE=F SLTH=T;
   1004 tr 71 M=IP_TO_INT_CN_MAPPING TSE=T SLTH=T;
   1005 tr 71 M=IP_TO_INT_CN_MAPPING TSE=T SLTH=F;
   1006 echo " L2MC";
   1007 tr 50 M=L2MC;
   1008 tr 51 M=L2MC;
   1009 tr 52 M=L2MC;
   1010 tr 71 M=L2MC TSE=F SLTH=T;
   1011 tr 71 M=L2MC TSE=T SLTH=T;
   1012 tr 71 M=L2MC TSE=T SLTH=F;
   1013 echo " L2X";
   1014 tr 50 M=L2X;
   1015 tr 51 M=L2X;
   1016 tr 52 M=L2X;
   1017 tr 71 M=L2X TSE=F SLTH=T;
   1018 tr 71 M=L2X TSE=T SLTH=T;
   1019 tr 71 M=L2X TSE=T SLTH=F;
   1020 echo " L2_ENTRY_ONLY";
   1021 tr 50 M=L2_ENTRY_ONLY;
   1022 tr 51 M=L2_ENTRY_ONLY;
   1023 tr 52 M=L2_ENTRY_ONLY;
   1024 tr 71 M=L2_ENTRY_ONLY TSE=F SLTH=T;
   1025 tr 71 M=L2_ENTRY_ONLY TSE=T SLTH=T;
   1026 tr 71 M=L2_ENTRY_ONLY TSE=T SLTH=F;
   1027 echo " L2_ENTRY_OVERFLOW";
   1028 tr 50 M=L2_ENTRY_OVERFLOW;
   1029 tr 51 M=L2_ENTRY_OVERFLOW;
   1030 tr 52 M=L2_ENTRY_OVERFLOW;
   1031 tr 71 M=L2_ENTRY_OVERFLOW TSE=F SLTH=T;
   1032 tr 71 M=L2_ENTRY_OVERFLOW TSE=T SLTH=T;
   1033 tr 71 M=L2_ENTRY_OVERFLOW TSE=T SLTH=F;
   1034 echo " L2_HITDA_ONLY";
   1035 tr 50 M=L2_HITDA_ONLY;
   1036 tr 51 M=L2_HITDA_ONLY;
   1037 tr 52 M=L2_HITDA_ONLY;
   1038 tr 71 M=L2_HITDA_ONLY TSE=F SLTH=T;
   1039 tr 71 M=L2_HITDA_ONLY TSE=T SLTH=T;
   1040 tr 71 M=L2_HITDA_ONLY TSE=T SLTH=F;
   1041 echo " L2_HITSA_ONLY";
   1042 tr 50 M=L2_HITSA_ONLY;
   1043 tr 51 M=L2_HITSA_ONLY;
   1044 tr 52 M=L2_HITSA_ONLY;
   1045 tr 71 M=L2_HITSA_ONLY TSE=F SLTH=T;
   1046 tr 71 M=L2_HITSA_ONLY TSE=T SLTH=T;
   1047 tr 71 M=L2_HITSA_ONLY TSE=T SLTH=F;
   1048 echo " L2_MOD_FIFO";
   1049 tr 50 M=L2_MOD_FIFO;
   1050 tr 51 M=L2_MOD_FIFO;
   1051 tr 52 M=L2_MOD_FIFO;
   1052 tr 71 M=L2_MOD_FIFO TSE=F SLTH=T;
   1053 tr 71 M=L2_MOD_FIFO TSE=T SLTH=T;
   1054 tr 71 M=L2_MOD_FIFO TSE=T SLTH=F;
   1055 echo " L2_USER_ENTRY";
   1056 tr 50 M=L2_USER_ENTRY;
   1057 tr 51 M=L2_USER_ENTRY;
   1058 tr 52 M=L2_USER_ENTRY;
   1059 tr 71 M=L2_USER_ENTRY TSE=F SLTH=T;
   1060 tr 71 M=L2_USER_ENTRY TSE=T SLTH=T;
   1061 tr 71 M=L2_USER_ENTRY TSE=T SLTH=F;
   1062 echo " L2_USER_ENTRY_DATA_ONLY";
   1063 tr 50 M=L2_USER_ENTRY_DATA_ONLY;
   1064 tr 51 M=L2_USER_ENTRY_DATA_ONLY;
   1065 tr 52 M=L2_USER_ENTRY_DATA_ONLY;
   1066 tr 71 M=L2_USER_ENTRY_DATA_ONLY TSE=F SLTH=T;
   1067 tr 71 M=L2_USER_ENTRY_DATA_ONLY TSE=T SLTH=T;
   1068 tr 71 M=L2_USER_ENTRY_DATA_ONLY TSE=T SLTH=F;
   1069 echo " L2_USER_ENTRY_ONLY";
   1070 tr 50 M=L2_USER_ENTRY_ONLY;
   1071 tr 51 M=L2_USER_ENTRY_ONLY;
   1072 tr 52 M=L2_USER_ENTRY_ONLY;
   1073 tr 71 M=L2_USER_ENTRY_ONLY TSE=F SLTH=T;
   1074 tr 71 M=L2_USER_ENTRY_ONLY TSE=T SLTH=T;
   1075 tr 71 M=L2_USER_ENTRY_ONLY TSE=T SLTH=F;
   1076 if $?BCM5616X_A0 || $?BCM5616XLITE_A0 \
   1077     'echo " L3_DEFIP"; \
   1078     tr 50 M=L3_DEFIP; \
   1079     tr 51 M=L3_DEFIP; \
   1080     tr 52 M=L3_DEFIP; \
   1081     tr 71 M=L3_DEFIP TSE=F SLTH=T; \
   1082     tr 71 M=L3_DEFIP TSE=T SLTH=T; \
   1083     tr 71 M=L3_DEFIP TSE=T SLTH=F; \
   1084     echo " L3_DEFIP_DATA_ONLY"; \
   1085     tr 50 M=L3_DEFIP_DATA_ONLY; \
   1086     tr 51 M=L3_DEFIP_DATA_ONLY; \
   1087     tr 52 M=L3_DEFIP_DATA_ONLY; \
   1088     tr 71 M=L3_DEFIP_DATA_ONLY TSE=F SLTH=T; \
   1089     tr 71 M=L3_DEFIP_DATA_ONLY TSE=T SLTH=T; \
   1090     tr 71 M=L3_DEFIP_DATA_ONLY TSE=T SLTH=F; \
   1091     echo " L3_DEFIP_HIT_ONLY"; \
   1092     tr 50 M=L3_DEFIP_HIT_ONLY; \
   1093     tr 51 M=L3_DEFIP_HIT_ONLY; \
   1094     tr 52 M=L3_DEFIP_HIT_ONLY; \
   1095     tr 71 M=L3_DEFIP_HIT_ONLY TSE=F SLTH=T; \
   1096     tr 71 M=L3_DEFIP_HIT_ONLY TSE=T SLTH=T; \
   1097     tr 71 M=L3_DEFIP_HIT_ONLY TSE=T SLTH=F; \
   1098     echo " L3_DEFIP_ONLY"; \
   1099     tr 50 M=L3_DEFIP_ONLY; \
   1100     tr 51 M=L3_DEFIP_ONLY; \
   1101     tr 52 M=L3_DEFIP_ONLY; \
   1102     tr 71 M=L3_DEFIP_ONLY TSE=F SLTH=T; \
   1103     tr 71 M=L3_DEFIP_ONLY TSE=T SLTH=T; \
   1104     tr 71 M=L3_DEFIP_ONLY TSE=T SLTH=F; \
   1105     echo " L3_ENTRY_HIT_ONLY"; \
   1106     tr 50 M=L3_ENTRY_HIT_ONLY; \
   1107     tr 51 M=L3_ENTRY_HIT_ONLY; \
   1108     tr 52 M=L3_ENTRY_HIT_ONLY; \
   1109     tr 71 M=L3_ENTRY_HIT_ONLY TSE=F SLTH=T; \
   1110     tr 71 M=L3_ENTRY_HIT_ONLY TSE=T SLTH=T; \
   1111     tr 71 M=L3_ENTRY_HIT_ONLY TSE=T SLTH=F; \
   1112     echo " L3_ENTRY_IPV4_MULTICAST"; \
   1113     tr 50 M=L3_ENTRY_IPV4_MULTICAST; \
   1114     tr 51 M=L3_ENTRY_IPV4_MULTICAST; \
   1115     tr 52 M=L3_ENTRY_IPV4_MULTICAST; \
   1116     tr 71 M=L3_ENTRY_IPV4_MULTICAST TSE=F SLTH=T; \
   1117     tr 71 M=L3_ENTRY_IPV4_MULTICAST TSE=T SLTH=T; \
   1118     tr 71 M=L3_ENTRY_IPV4_MULTICAST TSE=T SLTH=F; \
   1119     echo " L3_ENTRY_IPV4_UNICAST"; \
   1120     tr 50 M=L3_ENTRY_IPV4_UNICAST; \
   1121     tr 51 M=L3_ENTRY_IPV4_UNICAST; \
   1122     tr 52 M=L3_ENTRY_IPV4_UNICAST; \
   1123     tr 71 M=L3_ENTRY_IPV4_UNICAST TSE=F SLTH=T; \
   1124     tr 71 M=L3_ENTRY_IPV4_UNICAST TSE=T SLTH=T; \
   1125     tr 71 M=L3_ENTRY_IPV4_UNICAST TSE=T SLTH=F; \
   1126     echo " L3_ENTRY_IPV6_MULTICAST"; \
   1127     tr 50 M=L3_ENTRY_IPV6_MULTICAST; \
   1128     tr 51 M=L3_ENTRY_IPV6_MULTICAST; \
   1129     tr 52 M=L3_ENTRY_IPV6_MULTICAST; \
   1130     tr 71 M=L3_ENTRY_IPV6_MULTICAST TSE=F SLTH=T; \
   1131     tr 71 M=L3_ENTRY_IPV6_MULTICAST TSE=T SLTH=T; \
   1132     tr 71 M=L3_ENTRY_IPV6_MULTICAST TSE=T SLTH=F; \
   1133     echo " L3_ENTRY_IPV6_UNICAST"; \
   1134     tr 50 M=L3_ENTRY_IPV6_UNICAST; \
   1135     tr 51 M=L3_ENTRY_IPV6_UNICAST; \
   1136     tr 52 M=L3_ENTRY_IPV6_UNICAST; \
   1137     tr 71 M=L3_ENTRY_IPV6_UNICAST TSE=F SLTH=T; \
   1138     tr 71 M=L3_ENTRY_IPV6_UNICAST TSE=T SLTH=T; \
   1139     tr 71 M=L3_ENTRY_IPV6_UNICAST TSE=T SLTH=F; \
   1140     echo " L3_ENTRY_ONLY"; \
   1141     tr 50 M=L3_ENTRY_ONLY; \
   1142     tr 51 M=L3_ENTRY_ONLY; \
   1143     tr 52 M=L3_ENTRY_ONLY; \
   1144     tr 71 M=L3_ENTRY_ONLY TSE=F SLTH=T; \
   1145     tr 71 M=L3_ENTRY_ONLY TSE=T SLTH=T; \
   1146     tr 71 M=L3_ENTRY_ONLY TSE=T SLTH=F; \
   1147     echo " L3_ENTRY_VALID_ONLY"; \
   1148     tr 50 M=L3_ENTRY_VALID_ONLY; \
   1149     tr 51 M=L3_ENTRY_VALID_ONLY; \
   1150     tr 52 M=L3_ENTRY_VALID_ONLY; \
   1151     tr 71 M=L3_ENTRY_VALID_ONLY TSE=F SLTH=T; \
   1152     tr 71 M=L3_ENTRY_VALID_ONLY TSE=T SLTH=T; \
   1153     tr 71 M=L3_ENTRY_VALID_ONLY TSE=T SLTH=F; \
   1154     echo " L3_IPMC"; \
   1155     tr 50 M=L3_IPMC; \
   1156     tr 51 M=L3_IPMC; \
   1157     tr 52 M=L3_IPMC; \
   1158     tr 71 M=L3_IPMC TSE=F SLTH=T; \
   1159     tr 71 M=L3_IPMC TSE=T SLTH=T; \
   1160     tr 71 M=L3_IPMC TSE=T SLTH=F; \
   1161     echo " L3_MTU_VALUES"; \
   1162     tr 50 M=L3_MTU_VALUES; \
   1163     tr 51 M=L3_MTU_VALUES; \
   1164     tr 52 M=L3_MTU_VALUES; \
   1165     tr 71 M=L3_MTU_VALUES TSE=F SLTH=T; \
   1166     tr 71 M=L3_MTU_VALUES TSE=T SLTH=T; \
   1167     tr 71 M=L3_MTU_VALUES TSE=T SLTH=F;'
   1168 if $?BCM5616X_A0 \
   1169     'echo " L3_IIF"; \
   1170     tr 50 M=L3_IIF; \
   1171     tr 51 M=L3_IIF; \
   1172     tr 52 M=L3_IIF; \
   1173     tr 71 M=L3_IIF TSE=F SLTH=T; \
   1174     tr 71 M=L3_IIF TSE=T SLTH=T; \
   1175     tr 71 M=L3_IIF TSE=T SLTH=F;' 
   1176 echo " LMEP";
   1177 tr 50 M=LMEP;
   1178 tr 51 M=LMEP;
   1179 tr 52 M=LMEP;
   1180 tr 71 M=LMEP TSE=F SLTH=T;
   1181 tr 71 M=LMEP TSE=T SLTH=T;
   1182 tr 71 M=LMEP TSE=T SLTH=F;
   1183 echo " LMEP_DA";
   1184 tr 50 M=LMEP_DA;
   1185 tr 51 M=LMEP_DA;
   1186 tr 52 M=LMEP_DA;
   1187 tr 71 M=LMEP_DA TSE=F SLTH=T;
   1188 tr 71 M=LMEP_DA TSE=T SLTH=T;
   1189 tr 71 M=LMEP_DA TSE=T SLTH=F;
   1190 echo " LPORT_TAB";
   1191 tr 50 M=LPORT_TAB;
   1192 tr 51 M=LPORT_TAB;
   1193 tr 52 M=LPORT_TAB;
   1194 tr 71 M=LPORT_TAB TSE=F SLTH=T;
   1195 tr 71 M=LPORT_TAB TSE=T SLTH=T;
   1196 tr 71 M=LPORT_TAB TSE=T SLTH=F;
   1197 echo " MAC_BLOCK";
   1198 tr 50 M=MAC_BLOCK;
   1199 tr 51 M=MAC_BLOCK;
   1200 tr 52 M=MAC_BLOCK;
   1201 tr 71 M=MAC_BLOCK TSE=F SLTH=T;
   1202 tr 71 M=MAC_BLOCK TSE=T SLTH=T;
   1203 tr 71 M=MAC_BLOCK TSE=T SLTH=F;
   1204 echo " MAID_REDUCTION";
   1205 tr 50 M=MAID_REDUCTION;
   1206 tr 51 M=MAID_REDUCTION;
   1207 tr 52 M=MAID_REDUCTION;
   1208 tr 71 M=MAID_REDUCTION TSE=F SLTH=T;
   1209 tr 71 M=MAID_REDUCTION TSE=T SLTH=T;
   1210 tr 71 M=MAID_REDUCTION TSE=T SLTH=F;
   1211 echo " MA_INDEX";
   1212 tr 50 M=MA_INDEX;
   1213 tr 51 M=MA_INDEX;
   1214 tr 52 M=MA_INDEX;
   1215 tr 71 M=MA_INDEX TSE=F SLTH=T;
   1216 tr 71 M=MA_INDEX TSE=T SLTH=T;
   1217 tr 71 M=MA_INDEX TSE=T SLTH=F;
   1218 echo " MA_STATE";
   1219 tr 50 M=MA_STATE;
   1220 tr 51 M=MA_STATE;
   1221 tr 52 M=MA_STATE;
   1222 tr 71 M=MA_STATE TSE=F SLTH=T;
   1223 tr 71 M=MA_STATE TSE=T SLTH=T;
   1224 tr 71 M=MA_STATE TSE=T SLTH=F;
   1225 echo " MMU_AGING_CTR";
   1226 tr 50 M=MMU_AGING_CTR;
   1227 tr 51 M=MMU_AGING_CTR;
   1228 tr 52 M=MMU_AGING_CTR;
   1229 tr 71 M=MMU_AGING_CTR TSE=F SLTH=T;
   1230 tr 71 M=MMU_AGING_CTR TSE=T SLTH=T;
   1231 tr 71 M=MMU_AGING_CTR TSE=T SLTH=F;
   1232 echo " MMU_AGING_EXP";
   1233 tr 50 M=MMU_AGING_EXP;
   1234 tr 51 M=MMU_AGING_EXP;
   1235 tr 52 M=MMU_AGING_EXP;
   1236 tr 71 M=MMU_AGING_EXP TSE=F SLTH=T;
   1237 tr 71 M=MMU_AGING_EXP TSE=T SLTH=T;
   1238 tr 71 M=MMU_AGING_EXP TSE=T SLTH=F;
   1239 echo " MMU_ARB_TDM_TABLE";
   1240 tr 50 M=MMU_ARB_TDM_TABLE;
   1241 tr 51 M=MMU_ARB_TDM_TABLE;
   1242 tr 52 M=MMU_ARB_TDM_TABLE;
   1243 tr 71 M=MMU_ARB_TDM_TABLE TSE=F SLTH=T;
   1244 tr 71 M=MMU_ARB_TDM_TABLE TSE=T SLTH=T;
   1245 tr 71 M=MMU_ARB_TDM_TABLE TSE=T SLTH=F;
   1246 echo " MMU_CBPCellHeader";
   1247 tr 50 M=MMU_CBPCellHeader;
   1248 tr 51 M=MMU_CBPCellHeader;
   1249 tr 52 M=MMU_CBPCellHeader;
   1250 tr 71 M=MMU_CBPCellHeader TSE=F SLTH=T;
   1251 tr 71 M=MMU_CBPCellHeader TSE=T SLTH=T;
   1252 tr 71 M=MMU_CBPCellHeader TSE=T SLTH=F;
   1253 echo " MMU_CBPData0";
   1254 tr 50 M=MMU_CBPData0;
   1255 tr 51 M=MMU_CBPData0;
   1256 tr 52 M=MMU_CBPData0;
   1257 tr 71 M=MMU_CBPData0 TSE=F SLTH=T;
   1258 tr 71 M=MMU_CBPData0 TSE=T SLTH=T;
   1259 tr 71 M=MMU_CBPData0 TSE=T SLTH=F;
   1260 echo " MMU_CBPData1";
   1261 tr 50 M=MMU_CBPData1;
   1262 tr 51 M=MMU_CBPData1;
   1263 tr 52 M=MMU_CBPData1;
   1264 tr 71 M=MMU_CBPData1 TSE=F SLTH=T;
   1265 tr 71 M=MMU_CBPData1 TSE=T SLTH=T;
   1266 tr 71 M=MMU_CBPData1 TSE=T SLTH=F;
   1267 echo " MMU_CBPData2";
   1268 tr 50 M=MMU_CBPData2;
   1269 tr 51 M=MMU_CBPData2;
   1270 tr 52 M=MMU_CBPData2;
   1271 tr 71 M=MMU_CBPData2 TSE=F SLTH=T;
   1272 tr 71 M=MMU_CBPData2 TSE=T SLTH=T;
   1273 tr 71 M=MMU_CBPData2 TSE=T SLTH=F;
   1274 echo " MMU_CBPData3";
   1275 tr 50 M=MMU_CBPData3;
   1276 tr 51 M=MMU_CBPData3;
   1277 tr 52 M=MMU_CBPData3;
   1278 tr 71 M=MMU_CBPData3 TSE=F SLTH=T;
   1279 tr 71 M=MMU_CBPData3 TSE=T SLTH=T;
   1280 tr 71 M=MMU_CBPData3 TSE=T SLTH=F;
   1281 echo " MMU_CBPData4";
   1282 tr 50 M=MMU_CBPData4;
   1283 tr 51 M=MMU_CBPData4;
   1284 tr 52 M=MMU_CBPData4;
   1285 tr 71 M=MMU_CBPData4 TSE=F SLTH=T;
   1286 tr 71 M=MMU_CBPData4 TSE=T SLTH=T;
   1287 tr 71 M=MMU_CBPData4 TSE=T SLTH=F;
   1288 echo " MMU_CBPData5";
   1289 tr 50 M=MMU_CBPData5;
   1290 tr 51 M=MMU_CBPData5;
   1291 tr 52 M=MMU_CBPData5;
   1292 tr 71 M=MMU_CBPData5 TSE=F SLTH=T;
   1293 tr 71 M=MMU_CBPData5 TSE=T SLTH=T;
   1294 tr 71 M=MMU_CBPData5 TSE=T SLTH=F;
   1295 echo " MMU_CBPData6";
   1296 tr 50 M=MMU_CBPData6;
   1297 tr 51 M=MMU_CBPData6;
   1298 tr 52 M=MMU_CBPData6;
   1299 tr 71 M=MMU_CBPData6 TSE=F SLTH=T;
   1300 tr 71 M=MMU_CBPData6 TSE=T SLTH=T;
   1301 tr 71 M=MMU_CBPData6 TSE=T SLTH=F;
   1302 echo " MMU_CBPData7";
   1303 tr 50 M=MMU_CBPData7;
   1304 tr 51 M=MMU_CBPData7;
   1305 tr 52 M=MMU_CBPData7;
   1306 tr 71 M=MMU_CBPData7 TSE=F SLTH=T;
   1307 tr 71 M=MMU_CBPData7 TSE=T SLTH=T;
   1308 tr 71 M=MMU_CBPData7 TSE=T SLTH=F;
   1309 echo " MMU_CBPPktHeader0";
   1310 tr 50 M=MMU_CBPPktHeader0;
   1311 tr 51 M=MMU_CBPPktHeader0;
   1312 tr 52 M=MMU_CBPPktHeader0;
   1313 tr 71 M=MMU_CBPPktHeader0 TSE=F SLTH=T;
   1314 tr 71 M=MMU_CBPPktHeader0 TSE=T SLTH=T;
   1315 tr 71 M=MMU_CBPPktHeader0 TSE=T SLTH=F;
   1316 echo " MMU_CBPPktHeader1";
   1317 tr 50 M=MMU_CBPPktHeader1;
   1318 tr 51 M=MMU_CBPPktHeader1;
   1319 tr 52 M=MMU_CBPPktHeader1;
   1320 tr 71 M=MMU_CBPPktHeader1 TSE=F SLTH=T;
   1321 tr 71 M=MMU_CBPPktHeader1 TSE=T SLTH=T;
   1322 tr 71 M=MMU_CBPPktHeader1 TSE=T SLTH=F;
   1323 echo " MMU_CBPPktHeader2";
   1324 tr 50 M=MMU_CBPPktHeader2;
   1325 tr 51 M=MMU_CBPPktHeader2;
   1326 tr 52 M=MMU_CBPPktHeader2;
   1327 tr 71 M=MMU_CBPPktHeader2 TSE=F SLTH=T;
   1328 tr 71 M=MMU_CBPPktHeader2 TSE=T SLTH=T;
   1329 tr 71 M=MMU_CBPPktHeader2 TSE=T SLTH=F;
   1330 echo " MMU_CBPPktHeader_EXT";
   1331 tr 50 M=MMU_CBPPktHeader_EXT;
   1332 tr 51 M=MMU_CBPPktHeader_EXT;
   1333 tr 52 M=MMU_CBPPktHeader_EXT;
   1334 tr 71 M=MMU_CBPPktHeader_EXT TSE=F SLTH=T;
   1335 tr 71 M=MMU_CBPPktHeader_EXT TSE=T SLTH=T;
   1336 tr 71 M=MMU_CBPPktHeader_EXT TSE=T SLTH=F;
   1337 echo " MMU_CCP";
   1338 tr 50 M=MMU_CCP;
   1339 tr 51 M=MMU_CCP;
   1340 tr 52 M=MMU_CCP;
   1341 tr 71 M=MMU_CCP TSE=F SLTH=T;
   1342 tr 71 M=MMU_CCP TSE=T SLTH=T;
   1343 tr 71 M=MMU_CCP TSE=T SLTH=F;
   1344 echo " MMU_CFAP";
   1345 tr 50 M=MMU_CFAP;
   1346 tr 51 M=MMU_CFAP;
   1347 tr 52 M=MMU_CFAP;
   1348 tr 71 M=MMU_CFAP TSE=F SLTH=T;
   1349 tr 71 M=MMU_CFAP TSE=T SLTH=T;
   1350 tr 71 M=MMU_CFAP TSE=T SLTH=F;
   1351 echo " MMU_IPMC_GROUP_TBL10";
   1352 tr 50 M=MMU_IPMC_GROUP_TBL10;
   1353 tr 51 M=MMU_IPMC_GROUP_TBL10;
   1354 tr 52 M=MMU_IPMC_GROUP_TBL10;
   1355 tr 71 M=MMU_IPMC_GROUP_TBL10 TSE=F SLTH=T;
   1356 tr 71 M=MMU_IPMC_GROUP_TBL10 TSE=T SLTH=T;
   1357 tr 71 M=MMU_IPMC_GROUP_TBL10 TSE=T SLTH=F;
   1358 echo " MMU_IPMC_GROUP_TBL11";
   1359 tr 50 M=MMU_IPMC_GROUP_TBL11;
   1360 tr 51 M=MMU_IPMC_GROUP_TBL11;
   1361 tr 52 M=MMU_IPMC_GROUP_TBL11;
   1362 tr 71 M=MMU_IPMC_GROUP_TBL11 TSE=F SLTH=T;
   1363 tr 71 M=MMU_IPMC_GROUP_TBL11 TSE=T SLTH=T;
   1364 tr 71 M=MMU_IPMC_GROUP_TBL11 TSE=T SLTH=F;
   1365 echo " MMU_IPMC_GROUP_TBL12";
   1366 tr 50 M=MMU_IPMC_GROUP_TBL12;
   1367 tr 51 M=MMU_IPMC_GROUP_TBL12;
   1368 tr 52 M=MMU_IPMC_GROUP_TBL12;
   1369 tr 71 M=MMU_IPMC_GROUP_TBL12 TSE=F SLTH=T;
   1370 tr 71 M=MMU_IPMC_GROUP_TBL12 TSE=T SLTH=T;
   1371 tr 71 M=MMU_IPMC_GROUP_TBL12 TSE=T SLTH=F;
   1372 echo " MMU_IPMC_GROUP_TBL13";
   1373 tr 50 M=MMU_IPMC_GROUP_TBL13;
   1374 tr 51 M=MMU_IPMC_GROUP_TBL13;
   1375 tr 52 M=MMU_IPMC_GROUP_TBL13;
   1376 tr 71 M=MMU_IPMC_GROUP_TBL13 TSE=F SLTH=T;
   1377 tr 71 M=MMU_IPMC_GROUP_TBL13 TSE=T SLTH=T;
   1378 tr 71 M=MMU_IPMC_GROUP_TBL13 TSE=T SLTH=F;
   1379 echo " MMU_IPMC_GROUP_TBL14";
   1380 tr 50 M=MMU_IPMC_GROUP_TBL14;
   1381 tr 51 M=MMU_IPMC_GROUP_TBL14;
   1382 tr 52 M=MMU_IPMC_GROUP_TBL14;
   1383 tr 71 M=MMU_IPMC_GROUP_TBL14 TSE=F SLTH=T;
   1384 tr 71 M=MMU_IPMC_GROUP_TBL14 TSE=T SLTH=T;
   1385 tr 71 M=MMU_IPMC_GROUP_TBL14 TSE=T SLTH=F;
   1386 echo " MMU_IPMC_GROUP_TBL15";
   1387 tr 50 M=MMU_IPMC_GROUP_TBL15;
   1388 tr 51 M=MMU_IPMC_GROUP_TBL15;
   1389 tr 52 M=MMU_IPMC_GROUP_TBL15;
   1390 tr 71 M=MMU_IPMC_GROUP_TBL15 TSE=F SLTH=T;
   1391 tr 71 M=MMU_IPMC_GROUP_TBL15 TSE=T SLTH=T;
   1392 tr 71 M=MMU_IPMC_GROUP_TBL15 TSE=T SLTH=F;
   1393 echo " MMU_IPMC_GROUP_TBL16";
   1394 tr 50 M=MMU_IPMC_GROUP_TBL16;
   1395 tr 51 M=MMU_IPMC_GROUP_TBL16;
   1396 tr 52 M=MMU_IPMC_GROUP_TBL16;
   1397 tr 71 M=MMU_IPMC_GROUP_TBL16 TSE=F SLTH=T;
   1398 tr 71 M=MMU_IPMC_GROUP_TBL16 TSE=T SLTH=T;
   1399 tr 71 M=MMU_IPMC_GROUP_TBL16 TSE=T SLTH=F;
   1400 echo " MMU_IPMC_GROUP_TBL17";
   1401 tr 50 M=MMU_IPMC_GROUP_TBL17;
   1402 tr 51 M=MMU_IPMC_GROUP_TBL17;
   1403 tr 52 M=MMU_IPMC_GROUP_TBL17;
   1404 tr 71 M=MMU_IPMC_GROUP_TBL17 TSE=F SLTH=T;
   1405 tr 71 M=MMU_IPMC_GROUP_TBL17 TSE=T SLTH=T;
   1406 tr 71 M=MMU_IPMC_GROUP_TBL17 TSE=T SLTH=F;
   1407 echo " MMU_IPMC_GROUP_TBL18";
   1408 tr 50 M=MMU_IPMC_GROUP_TBL18;
   1409 tr 51 M=MMU_IPMC_GROUP_TBL18;
   1410 tr 52 M=MMU_IPMC_GROUP_TBL18;
   1411 tr 71 M=MMU_IPMC_GROUP_TBL18 TSE=F SLTH=T;
   1412 tr 71 M=MMU_IPMC_GROUP_TBL18 TSE=T SLTH=T;
   1413 tr 71 M=MMU_IPMC_GROUP_TBL18 TSE=T SLTH=F;
   1414 echo " MMU_IPMC_GROUP_TBL19";
   1415 tr 50 M=MMU_IPMC_GROUP_TBL19;
   1416 tr 51 M=MMU_IPMC_GROUP_TBL19;
   1417 tr 52 M=MMU_IPMC_GROUP_TBL19;
   1418 tr 71 M=MMU_IPMC_GROUP_TBL19 TSE=F SLTH=T;
   1419 tr 71 M=MMU_IPMC_GROUP_TBL19 TSE=T SLTH=T;
   1420 tr 71 M=MMU_IPMC_GROUP_TBL19 TSE=T SLTH=F;
   1421 echo " MMU_IPMC_GROUP_TBL2";
   1422 tr 50 M=MMU_IPMC_GROUP_TBL2;
   1423 tr 51 M=MMU_IPMC_GROUP_TBL2;
   1424 tr 52 M=MMU_IPMC_GROUP_TBL2;
   1425 tr 71 M=MMU_IPMC_GROUP_TBL2 TSE=F SLTH=T;
   1426 tr 71 M=MMU_IPMC_GROUP_TBL2 TSE=T SLTH=T;
   1427 tr 71 M=MMU_IPMC_GROUP_TBL2 TSE=T SLTH=F;
   1428 echo " MMU_IPMC_GROUP_TBL20";
   1429 tr 50 M=MMU_IPMC_GROUP_TBL20;
   1430 tr 51 M=MMU_IPMC_GROUP_TBL20;
   1431 tr 52 M=MMU_IPMC_GROUP_TBL20;
   1432 tr 71 M=MMU_IPMC_GROUP_TBL20 TSE=F SLTH=T;
   1433 tr 71 M=MMU_IPMC_GROUP_TBL20 TSE=T SLTH=T;
   1434 tr 71 M=MMU_IPMC_GROUP_TBL20 TSE=T SLTH=F;
   1435 echo " MMU_IPMC_GROUP_TBL21";
   1436 tr 50 M=MMU_IPMC_GROUP_TBL21;
   1437 tr 51 M=MMU_IPMC_GROUP_TBL21;
   1438 tr 52 M=MMU_IPMC_GROUP_TBL21;
   1439 tr 71 M=MMU_IPMC_GROUP_TBL21 TSE=F SLTH=T;
   1440 tr 71 M=MMU_IPMC_GROUP_TBL21 TSE=T SLTH=T;
   1441 tr 71 M=MMU_IPMC_GROUP_TBL21 TSE=T SLTH=F;
   1442 echo " MMU_IPMC_GROUP_TBL22";
   1443 tr 50 M=MMU_IPMC_GROUP_TBL22;
   1444 tr 51 M=MMU_IPMC_GROUP_TBL22;
   1445 tr 52 M=MMU_IPMC_GROUP_TBL22;
   1446 tr 71 M=MMU_IPMC_GROUP_TBL22 TSE=F SLTH=T;
   1447 tr 71 M=MMU_IPMC_GROUP_TBL22 TSE=T SLTH=T;
   1448 tr 71 M=MMU_IPMC_GROUP_TBL22 TSE=T SLTH=F;
   1449 echo " MMU_IPMC_GROUP_TBL23";
   1450 tr 50 M=MMU_IPMC_GROUP_TBL23;
   1451 tr 51 M=MMU_IPMC_GROUP_TBL23;
   1452 tr 52 M=MMU_IPMC_GROUP_TBL23;
   1453 tr 71 M=MMU_IPMC_GROUP_TBL23 TSE=F SLTH=T;
   1454 tr 71 M=MMU_IPMC_GROUP_TBL23 TSE=T SLTH=T;
   1455 tr 71 M=MMU_IPMC_GROUP_TBL23 TSE=T SLTH=F;
   1456 echo " MMU_IPMC_GROUP_TBL24";
   1457 tr 50 M=MMU_IPMC_GROUP_TBL24;
   1458 tr 51 M=MMU_IPMC_GROUP_TBL24;
   1459 tr 52 M=MMU_IPMC_GROUP_TBL24;
   1460 tr 71 M=MMU_IPMC_GROUP_TBL24 TSE=F SLTH=T;
   1461 tr 71 M=MMU_IPMC_GROUP_TBL24 TSE=T SLTH=T;
   1462 tr 71 M=MMU_IPMC_GROUP_TBL24 TSE=T SLTH=F;
   1463 echo " MMU_IPMC_GROUP_TBL25";
   1464 tr 50 M=MMU_IPMC_GROUP_TBL25;
   1465 tr 51 M=MMU_IPMC_GROUP_TBL25;
   1466 tr 52 M=MMU_IPMC_GROUP_TBL25;
   1467 tr 71 M=MMU_IPMC_GROUP_TBL25 TSE=F SLTH=T;
   1468 tr 71 M=MMU_IPMC_GROUP_TBL25 TSE=T SLTH=T;
   1469 tr 71 M=MMU_IPMC_GROUP_TBL25 TSE=T SLTH=F;
   1470 echo " MMU_IPMC_GROUP_TBL26";
   1471 tr 50 M=MMU_IPMC_GROUP_TBL26;
   1472 tr 51 M=MMU_IPMC_GROUP_TBL26;
   1473 tr 52 M=MMU_IPMC_GROUP_TBL26;
   1474 tr 71 M=MMU_IPMC_GROUP_TBL26 TSE=F SLTH=T;
   1475 tr 71 M=MMU_IPMC_GROUP_TBL26 TSE=T SLTH=T;
   1476 tr 71 M=MMU_IPMC_GROUP_TBL26 TSE=T SLTH=F;
   1477 echo " MMU_IPMC_GROUP_TBL27";
   1478 tr 50 M=MMU_IPMC_GROUP_TBL27;
   1479 tr 51 M=MMU_IPMC_GROUP_TBL27;
   1480 tr 52 M=MMU_IPMC_GROUP_TBL27;
   1481 tr 71 M=MMU_IPMC_GROUP_TBL27 TSE=F SLTH=T;
   1482 tr 71 M=MMU_IPMC_GROUP_TBL27 TSE=T SLTH=T;
   1483 tr 71 M=MMU_IPMC_GROUP_TBL27 TSE=T SLTH=F;
   1484 echo " MMU_IPMC_GROUP_TBL28";
   1485 tr 50 M=MMU_IPMC_GROUP_TBL28;
   1486 tr 51 M=MMU_IPMC_GROUP_TBL28;
   1487 tr 52 M=MMU_IPMC_GROUP_TBL28;
   1488 tr 71 M=MMU_IPMC_GROUP_TBL28 TSE=F SLTH=T;
   1489 tr 71 M=MMU_IPMC_GROUP_TBL28 TSE=T SLTH=T;
   1490 tr 71 M=MMU_IPMC_GROUP_TBL28 TSE=T SLTH=F;
   1491 echo " MMU_IPMC_GROUP_TBL29";
   1492 tr 50 M=MMU_IPMC_GROUP_TBL29;
   1493 tr 51 M=MMU_IPMC_GROUP_TBL29;
   1494 tr 52 M=MMU_IPMC_GROUP_TBL29;
   1495 tr 71 M=MMU_IPMC_GROUP_TBL29 TSE=F SLTH=T;
   1496 tr 71 M=MMU_IPMC_GROUP_TBL29 TSE=T SLTH=T;
   1497 tr 71 M=MMU_IPMC_GROUP_TBL29 TSE=T SLTH=F;
   1498 echo " MMU_IPMC_GROUP_TBL3";
   1499 tr 50 M=MMU_IPMC_GROUP_TBL3;
   1500 tr 51 M=MMU_IPMC_GROUP_TBL3;
   1501 tr 52 M=MMU_IPMC_GROUP_TBL3;
   1502 tr 71 M=MMU_IPMC_GROUP_TBL3 TSE=F SLTH=T;
   1503 tr 71 M=MMU_IPMC_GROUP_TBL3 TSE=T SLTH=T;
   1504 tr 71 M=MMU_IPMC_GROUP_TBL3 TSE=T SLTH=F;
   1505 echo " MMU_IPMC_GROUP_TBL30";
   1506 tr 50 M=MMU_IPMC_GROUP_TBL30;
   1507 tr 51 M=MMU_IPMC_GROUP_TBL30;
   1508 tr 52 M=MMU_IPMC_GROUP_TBL30;
   1509 tr 71 M=MMU_IPMC_GROUP_TBL30 TSE=F SLTH=T;
   1510 tr 71 M=MMU_IPMC_GROUP_TBL30 TSE=T SLTH=T;
   1511 tr 71 M=MMU_IPMC_GROUP_TBL30 TSE=T SLTH=F;
   1512 echo " MMU_IPMC_GROUP_TBL31";
   1513 tr 50 M=MMU_IPMC_GROUP_TBL31;
   1514 tr 51 M=MMU_IPMC_GROUP_TBL31;
   1515 tr 52 M=MMU_IPMC_GROUP_TBL31;
   1516 tr 71 M=MMU_IPMC_GROUP_TBL31 TSE=F SLTH=T;
   1517 tr 71 M=MMU_IPMC_GROUP_TBL31 TSE=T SLTH=T;
   1518 tr 71 M=MMU_IPMC_GROUP_TBL31 TSE=T SLTH=F;
   1519 echo " MMU_IPMC_GROUP_TBL4";
   1520 tr 50 M=MMU_IPMC_GROUP_TBL4;
   1521 tr 51 M=MMU_IPMC_GROUP_TBL4;
   1522 tr 52 M=MMU_IPMC_GROUP_TBL4;
   1523 tr 71 M=MMU_IPMC_GROUP_TBL4 TSE=F SLTH=T;
   1524 tr 71 M=MMU_IPMC_GROUP_TBL4 TSE=T SLTH=T;
   1525 tr 71 M=MMU_IPMC_GROUP_TBL4 TSE=T SLTH=F;
   1526 echo " MMU_IPMC_GROUP_TBL5";
   1527 tr 50 M=MMU_IPMC_GROUP_TBL5;
   1528 tr 51 M=MMU_IPMC_GROUP_TBL5;
   1529 tr 52 M=MMU_IPMC_GROUP_TBL5;
   1530 tr 71 M=MMU_IPMC_GROUP_TBL5 TSE=F SLTH=T;
   1531 tr 71 M=MMU_IPMC_GROUP_TBL5 TSE=T SLTH=T;
   1532 tr 71 M=MMU_IPMC_GROUP_TBL5 TSE=T SLTH=F;
   1533 echo " MMU_IPMC_GROUP_TBL6";
   1534 tr 50 M=MMU_IPMC_GROUP_TBL6;
   1535 tr 51 M=MMU_IPMC_GROUP_TBL6;
   1536 tr 52 M=MMU_IPMC_GROUP_TBL6;
   1537 tr 71 M=MMU_IPMC_GROUP_TBL6 TSE=F SLTH=T;
   1538 tr 71 M=MMU_IPMC_GROUP_TBL6 TSE=T SLTH=T;
   1539 tr 71 M=MMU_IPMC_GROUP_TBL6 TSE=T SLTH=F;
   1540 echo " MMU_IPMC_GROUP_TBL7";
   1541 tr 50 M=MMU_IPMC_GROUP_TBL7;
   1542 tr 51 M=MMU_IPMC_GROUP_TBL7;
   1543 tr 52 M=MMU_IPMC_GROUP_TBL7;
   1544 tr 71 M=MMU_IPMC_GROUP_TBL7 TSE=F SLTH=T;
   1545 tr 71 M=MMU_IPMC_GROUP_TBL7 TSE=T SLTH=T;
   1546 tr 71 M=MMU_IPMC_GROUP_TBL7 TSE=T SLTH=F;
   1547 echo " MMU_IPMC_GROUP_TBL8";
   1548 tr 50 M=MMU_IPMC_GROUP_TBL8;
   1549 tr 51 M=MMU_IPMC_GROUP_TBL8;
   1550 tr 52 M=MMU_IPMC_GROUP_TBL8;
   1551 tr 71 M=MMU_IPMC_GROUP_TBL8 TSE=F SLTH=T;
   1552 tr 71 M=MMU_IPMC_GROUP_TBL8 TSE=T SLTH=T;
   1553 tr 71 M=MMU_IPMC_GROUP_TBL8 TSE=T SLTH=F;
   1554 echo " MMU_IPMC_GROUP_TBL9";
   1555 tr 50 M=MMU_IPMC_GROUP_TBL9;
   1556 tr 51 M=MMU_IPMC_GROUP_TBL9;
   1557 tr 52 M=MMU_IPMC_GROUP_TBL9;
   1558 tr 71 M=MMU_IPMC_GROUP_TBL9 TSE=F SLTH=T;
   1559 tr 71 M=MMU_IPMC_GROUP_TBL9 TSE=T SLTH=T;
   1560 tr 71 M=MMU_IPMC_GROUP_TBL9 TSE=T SLTH=F;
   1561 echo " MMU_IPMC_VLAN_TBL";
   1562 tr 50 M=MMU_IPMC_VLAN_TBL;
   1563 tr 51 M=MMU_IPMC_VLAN_TBL;
   1564 tr 52 M=MMU_IPMC_VLAN_TBL;
   1565 tr 71 M=MMU_IPMC_VLAN_TBL TSE=F SLTH=T;
   1566 tr 71 M=MMU_IPMC_VLAN_TBL TSE=T SLTH=T;
   1567 tr 71 M=MMU_IPMC_VLAN_TBL TSE=T SLTH=F;
   1568 echo " MODPORT_MAP";
   1569 tr 50 M=MODPORT_MAP;
   1570 tr 51 M=MODPORT_MAP;
   1571 tr 52 M=MODPORT_MAP;
   1572 tr 71 M=MODPORT_MAP TSE=F SLTH=T;
   1573 tr 71 M=MODPORT_MAP TSE=T SLTH=T;
   1574 tr 71 M=MODPORT_MAP TSE=T SLTH=F;
   1575 echo " MODPORT_MAP_EM";
   1576 tr 50 M=MODPORT_MAP_EM;
   1577 tr 51 M=MODPORT_MAP_EM;
   1578 tr 52 M=MODPORT_MAP_EM;
   1579 tr 71 M=MODPORT_MAP_EM TSE=F SLTH=T;
   1580 tr 71 M=MODPORT_MAP_EM TSE=T SLTH=T;
   1581 tr 71 M=MODPORT_MAP_EM TSE=T SLTH=F;
   1582 echo " MODPORT_MAP_IM";
   1583 tr 50 M=MODPORT_MAP_IM;
   1584 tr 51 M=MODPORT_MAP_IM;
   1585 tr 52 M=MODPORT_MAP_IM;
   1586 tr 71 M=MODPORT_MAP_IM TSE=F SLTH=T;
   1587 tr 71 M=MODPORT_MAP_IM TSE=T SLTH=T;
   1588 tr 71 M=MODPORT_MAP_IM TSE=T SLTH=F;
   1589 echo " MODPORT_MAP_SW";
   1590 tr 50 M=MODPORT_MAP_SW;
   1591 tr 51 M=MODPORT_MAP_SW;
   1592 tr 52 M=MODPORT_MAP_SW;
   1593 tr 71 M=MODPORT_MAP_SW TSE=F SLTH=T;
   1594 tr 71 M=MODPORT_MAP_SW TSE=T SLTH=T;
   1595 tr 71 M=MODPORT_MAP_SW TSE=T SLTH=F;
   1596 echo " NONUCAST_TRUNK_BLOCK_MASK";
   1597 tr 50 M=NONUCAST_TRUNK_BLOCK_MASK;
   1598 tr 51 M=NONUCAST_TRUNK_BLOCK_MASK;
   1599 tr 52 M=NONUCAST_TRUNK_BLOCK_MASK;
   1600 tr 71 M=NONUCAST_TRUNK_BLOCK_MASK TSE=F SLTH=T;
   1601 tr 71 M=NONUCAST_TRUNK_BLOCK_MASK TSE=T SLTH=T;
   1602 tr 71 M=NONUCAST_TRUNK_BLOCK_MASK TSE=T SLTH=F;
   1603 echo " OAM_LM_COUNTERS";
   1604 tr 50 M=OAM_LM_COUNTERS;
   1605 tr 51 M=OAM_LM_COUNTERS;
   1606 tr 52 M=OAM_LM_COUNTERS;
   1607 tr 71 M=OAM_LM_COUNTERS TSE=F SLTH=T;
   1608 tr 71 M=OAM_LM_COUNTERS TSE=T SLTH=T;
   1609 tr 71 M=OAM_LM_COUNTERS TSE=T SLTH=F;
   1610 echo " OAM_OPCODE_CONTROL_PROFILE";
   1611 tr 50 M=OAM_OPCODE_CONTROL_PROFILE;
   1612 tr 51 M=OAM_OPCODE_CONTROL_PROFILE;
   1613 tr 52 M=OAM_OPCODE_CONTROL_PROFILE;
   1614 tr 71 M=OAM_OPCODE_CONTROL_PROFILE TSE=F SLTH=T;
   1615 tr 71 M=OAM_OPCODE_CONTROL_PROFILE TSE=T SLTH=T;
   1616 tr 71 M=OAM_OPCODE_CONTROL_PROFILE TSE=T SLTH=F;
   1617 echo " PAYLOAD_TOS_FN";
   1618 tr 50 M=PAYLOAD_TOS_FN;
   1619 tr 51 M=PAYLOAD_TOS_FN;
   1620 tr 52 M=PAYLOAD_TOS_FN;
   1621 tr 71 M=PAYLOAD_TOS_FN TSE=F SLTH=T;
   1622 tr 71 M=PAYLOAD_TOS_FN TSE=T SLTH=T;
   1623 tr 71 M=PAYLOAD_TOS_FN TSE=T SLTH=F;
   1624 echo " PORT_COS_MAP";
   1625 tr 50 M=PORT_COS_MAP;
   1626 tr 51 M=PORT_COS_MAP;
   1627 tr 52 M=PORT_COS_MAP;
   1628 tr 71 M=PORT_COS_MAP TSE=F SLTH=T;
   1629 tr 71 M=PORT_COS_MAP TSE=T SLTH=T;
   1630 tr 71 M=PORT_COS_MAP TSE=T SLTH=F;
   1631 echo " PORT_OR_TRUNK_MAC_COUNT";
   1632 tr 50 M=PORT_OR_TRUNK_MAC_COUNT;
   1633 tr 51 M=PORT_OR_TRUNK_MAC_COUNT;
   1634 tr 52 M=PORT_OR_TRUNK_MAC_COUNT;
   1635 tr 71 M=PORT_OR_TRUNK_MAC_COUNT TSE=F SLTH=T;
   1636 tr 71 M=PORT_OR_TRUNK_MAC_COUNT TSE=T SLTH=T;
   1637 tr 71 M=PORT_OR_TRUNK_MAC_COUNT TSE=T SLTH=F;
   1638 echo " PORT_OR_TRUNK_MAC_LIMIT";
   1639 tr 50 M=PORT_OR_TRUNK_MAC_LIMIT;
   1640 tr 51 M=PORT_OR_TRUNK_MAC_LIMIT;
   1641 tr 52 M=PORT_OR_TRUNK_MAC_LIMIT;
   1642 tr 71 M=PORT_OR_TRUNK_MAC_LIMIT TSE=F SLTH=T;
   1643 tr 71 M=PORT_OR_TRUNK_MAC_LIMIT TSE=T SLTH=T;
   1644 tr 71 M=PORT_OR_TRUNK_MAC_LIMIT TSE=T SLTH=F;
   1645 echo " PORT_TAB";
   1646 tr 50 M=PORT_TAB;
   1647 tr 51 M=PORT_TAB;
   1648 tr 52 M=PORT_TAB;
   1649 tr 71 M=PORT_TAB TSE=F SLTH=T;
   1650 tr 71 M=PORT_TAB TSE=T SLTH=T;
   1651 tr 71 M=PORT_TAB TSE=T SLTH=F;
   1652 echo " RESPONSIVE_PROTOCOL_MATCH";
   1653 tr 50 M=RESPONSIVE_PROTOCOL_MATCH;
   1654 tr 51 M=RESPONSIVE_PROTOCOL_MATCH;
   1655 tr 52 M=RESPONSIVE_PROTOCOL_MATCH;
   1656 tr 71 M=RESPONSIVE_PROTOCOL_MATCH TSE=F SLTH=T;
   1657 tr 71 M=RESPONSIVE_PROTOCOL_MATCH TSE=T SLTH=T;
   1658 tr 71 M=RESPONSIVE_PROTOCOL_MATCH TSE=T SLTH=F;
   1659 echo " RMEP";
   1660 tr 50 M=RMEP;
   1661 tr 51 M=RMEP;
   1662 tr 52 M=RMEP;
   1663 tr 71 M=RMEP TSE=F SLTH=T;
   1664 tr 71 M=RMEP TSE=T SLTH=T;
   1665 tr 71 M=RMEP TSE=T SLTH=F;
   1666 echo " SER_MEMORY";
   1667 tr 50 M=SER_MEMORY;
   1668 tr 51 M=SER_MEMORY;
   1669 tr 52 M=SER_MEMORY;
   1670 tr 71 M=SER_MEMORY TSE=F SLTH=T;
   1671 tr 71 M=SER_MEMORY TSE=T SLTH=T;
   1672 tr 71 M=SER_MEMORY TSE=T SLTH=F;
   1673 echo " SER_RESULT_0";
   1674 tr 50 M=SER_RESULT_0;
   1675 #tr 51 M=SER_RESULT_0;
   1676 #tr 52 M=SER_RESULT_0;
   1677 tr 71 M=SER_RESULT_0 TSE=F SLTH=T;
   1678 tr 71 M=SER_RESULT_0 TSE=T SLTH=T;
   1679 tr 71 M=SER_RESULT_0 TSE=T SLTH=F;
   1680 echo " SER_RESULT_1";
   1681 tr 50 M=SER_RESULT_1;
   1682 #tr 51 M=SER_RESULT_1;
   1683 #tr 52 M=SER_RESULT_1;
   1684 tr 71 M=SER_RESULT_1 TSE=F SLTH=T;
   1685 tr 71 M=SER_RESULT_1 TSE=T SLTH=T;
   1686 tr 71 M=SER_RESULT_1 TSE=T SLTH=F;
   1687 echo " SER_RESULT_DATA_0";
   1688 tr 50 M=SER_RESULT_DATA_0;
   1689 #tr 51 M=SER_RESULT_DATA_0;
   1690 #tr 52 M=SER_RESULT_DATA_0;
   1691 tr 71 M=SER_RESULT_DATA_0 TSE=F SLTH=T;
   1692 tr 71 M=SER_RESULT_DATA_0 TSE=T SLTH=T;
   1693 tr 71 M=SER_RESULT_DATA_0 TSE=T SLTH=F;
   1694 echo " SER_RESULT_DATA_1";
   1695 tr 50 M=SER_RESULT_DATA_1;
   1696 #tr 51 M=SER_RESULT_DATA_1;
   1697 #tr 52 M=SER_RESULT_DATA_1;
   1698 tr 71 M=SER_RESULT_DATA_1 TSE=F SLTH=T;
   1699 tr 71 M=SER_RESULT_DATA_1 TSE=T SLTH=T;
   1700 tr 71 M=SER_RESULT_DATA_1 TSE=T SLTH=F;
   1701 echo " SER_RESULT_EXPECTED_0";
   1702 tr 50 M=SER_RESULT_EXPECTED_0;
   1703 #tr 51 M=SER_RESULT_EXPECTED_0;
   1704 #tr 52 M=SER_RESULT_EXPECTED_0;
   1705 tr 71 M=SER_RESULT_EXPECTED_0 TSE=F SLTH=T;
   1706 tr 71 M=SER_RESULT_EXPECTED_0 TSE=T SLTH=T;
   1707 tr 71 M=SER_RESULT_EXPECTED_0 TSE=T SLTH=F;
   1708 echo " SER_RESULT_EXPECTED_1";
   1709 tr 50 M=SER_RESULT_EXPECTED_1;
   1710 #tr 51 M=SER_RESULT_EXPECTED_1;
   1711 #tr 52 M=SER_RESULT_EXPECTED_1;
   1712 tr 71 M=SER_RESULT_EXPECTED_1 TSE=F SLTH=T;
   1713 tr 71 M=SER_RESULT_EXPECTED_1 TSE=T SLTH=T;
   1714 tr 71 M=SER_RESULT_EXPECTED_1 TSE=T SLTH=F;
   1715 echo " SOURCE_TRUNK_MAP_MODBASE";
   1716 tr 50 M=SOURCE_TRUNK_MAP_MODBASE;
   1717 tr 51 M=SOURCE_TRUNK_MAP_MODBASE;
   1718 tr 52 M=SOURCE_TRUNK_MAP_MODBASE;
   1719 tr 71 M=SOURCE_TRUNK_MAP_MODBASE TSE=F SLTH=T;
   1720 tr 71 M=SOURCE_TRUNK_MAP_MODBASE TSE=T SLTH=T;
   1721 tr 71 M=SOURCE_TRUNK_MAP_MODBASE TSE=T SLTH=F;
   1722 echo " SOURCE_TRUNK_MAP_TABLE";
   1723 tr 50 M=SOURCE_TRUNK_MAP_TABLE;
   1724 tr 51 M=SOURCE_TRUNK_MAP_TABLE;
   1725 tr 52 M=SOURCE_TRUNK_MAP_TABLE;
   1726 tr 71 M=SOURCE_TRUNK_MAP_TABLE TSE=F SLTH=T;
   1727 tr 71 M=SOURCE_TRUNK_MAP_TABLE TSE=T SLTH=T;
   1728 tr 71 M=SOURCE_TRUNK_MAP_TABLE TSE=T SLTH=F;
   1729 echo " SRC_MODID_BLOCK";
   1730 tr 50 M=SRC_MODID_BLOCK;
   1731 tr 51 M=SRC_MODID_BLOCK;
   1732 tr 52 M=SRC_MODID_BLOCK;
   1733 tr 71 M=SRC_MODID_BLOCK TSE=F SLTH=T;
   1734 tr 71 M=SRC_MODID_BLOCK TSE=T SLTH=T;
   1735 tr 71 M=SRC_MODID_BLOCK TSE=T SLTH=F;
   1736 echo " STG_TAB";
   1737 tr 50 M=STG_TAB;
   1738 tr 51 M=STG_TAB;
   1739 tr 52 M=STG_TAB;
   1740 tr 71 M=STG_TAB TSE=F SLTH=T;
   1741 tr 71 M=STG_TAB TSE=T SLTH=T;
   1742 tr 71 M=STG_TAB TSE=T SLTH=F;
   1743 echo " SYSTEM_CONFIG_TABLE";
   1744 tr 50 M=SYSTEM_CONFIG_TABLE;
   1745 tr 51 M=SYSTEM_CONFIG_TABLE;
   1746 tr 52 M=SYSTEM_CONFIG_TABLE;
   1747 tr 71 M=SYSTEM_CONFIG_TABLE TSE=F SLTH=T;
   1748 tr 71 M=SYSTEM_CONFIG_TABLE TSE=T SLTH=T;
   1749 tr 71 M=SYSTEM_CONFIG_TABLE TSE=T SLTH=F;
   1750 echo " SYSTEM_CONFIG_TABLE_MODBASE";
   1751 tr 50 M=SYSTEM_CONFIG_TABLE_MODBASE;
   1752 tr 51 M=SYSTEM_CONFIG_TABLE_MODBASE;
   1753 tr 52 M=SYSTEM_CONFIG_TABLE_MODBASE;
   1754 tr 71 M=SYSTEM_CONFIG_TABLE_MODBASE TSE=F SLTH=T;
   1755 tr 71 M=SYSTEM_CONFIG_TABLE_MODBASE TSE=T SLTH=T;
   1756 tr 71 M=SYSTEM_CONFIG_TABLE_MODBASE TSE=T SLTH=F;
   1757 echo " TCP_FN";
   1758 tr 50 M=TCP_FN;
   1759 tr 51 M=TCP_FN;
   1760 tr 52 M=TCP_FN;
   1761 tr 71 M=TCP_FN TSE=F SLTH=T;
   1762 tr 71 M=TCP_FN TSE=T SLTH=T;
   1763 tr 71 M=TCP_FN TSE=T SLTH=F;
   1764 echo " TOS_FN";
   1765 tr 50 M=TOS_FN;
   1766 tr 51 M=TOS_FN;
   1767 tr 52 M=TOS_FN;
   1768 tr 71 M=TOS_FN TSE=F SLTH=T;
   1769 tr 71 M=TOS_FN TSE=T SLTH=T;
   1770 tr 71 M=TOS_FN TSE=T SLTH=F;
   1771 echo " TRUNK32_CONFIG_TABLE";
   1772 tr 50 M=TRUNK32_CONFIG_TABLE;
   1773 tr 51 M=TRUNK32_CONFIG_TABLE;
   1774 tr 52 M=TRUNK32_CONFIG_TABLE;
   1775 tr 71 M=TRUNK32_CONFIG_TABLE TSE=F SLTH=T;
   1776 tr 71 M=TRUNK32_CONFIG_TABLE TSE=T SLTH=T;
   1777 tr 71 M=TRUNK32_CONFIG_TABLE TSE=T SLTH=F;
   1778 echo " TRUNK32_PORT_TABLE";
   1779 tr 50 M=TRUNK32_PORT_TABLE;
   1780 tr 51 M=TRUNK32_PORT_TABLE;
   1781 tr 52 M=TRUNK32_PORT_TABLE;
   1782 tr 71 M=TRUNK32_PORT_TABLE TSE=F SLTH=T;
   1783 tr 71 M=TRUNK32_PORT_TABLE TSE=T SLTH=T;
   1784 tr 71 M=TRUNK32_PORT_TABLE TSE=T SLTH=F;
   1785 echo " TRUNK_BITMAP";
   1786 tr 50 M=TRUNK_BITMAP;
   1787 tr 51 M=TRUNK_BITMAP;
   1788 tr 52 M=TRUNK_BITMAP;
   1789 tr 71 M=TRUNK_BITMAP TSE=F SLTH=T;
   1790 tr 71 M=TRUNK_BITMAP TSE=T SLTH=T;
   1791 tr 71 M=TRUNK_BITMAP TSE=T SLTH=F;
   1792 echo " TRUNK_EGR_MASK";
   1793 tr 50 M=TRUNK_EGR_MASK;
   1794 tr 51 M=TRUNK_EGR_MASK;
   1795 tr 52 M=TRUNK_EGR_MASK;
   1796 tr 71 M=TRUNK_EGR_MASK TSE=F SLTH=T;
   1797 tr 71 M=TRUNK_EGR_MASK TSE=T SLTH=T;
   1798 tr 71 M=TRUNK_EGR_MASK TSE=T SLTH=F;
   1799 echo " TRUNK_GROUP";
   1800 tr 50 M=TRUNK_GROUP;
   1801 tr 51 M=TRUNK_GROUP;
   1802 tr 52 M=TRUNK_GROUP;
   1803 tr 71 M=TRUNK_GROUP TSE=F SLTH=T;
   1804 tr 71 M=TRUNK_GROUP TSE=T SLTH=T;
   1805 tr 71 M=TRUNK_GROUP TSE=T SLTH=F;
   1806 echo " TTL_FN";
   1807 tr 50 M=TTL_FN;
   1808 tr 51 M=TTL_FN;
   1809 tr 52 M=TTL_FN;
   1810 tr 71 M=TTL_FN TSE=F SLTH=T;
   1811 tr 71 M=TTL_FN TSE=T SLTH=T;
   1812 tr 71 M=TTL_FN TSE=T SLTH=F;
   1813 echo " VLAN_MAC";
   1814 tr 50 M=VLAN_MAC;
   1815 tr 51 M=VLAN_MAC;
   1816 tr 52 M=VLAN_MAC;
   1817 tr 71 M=VLAN_MAC TSE=F SLTH=T;
   1818 tr 71 M=VLAN_MAC TSE=T SLTH=T;
   1819 tr 71 M=VLAN_MAC TSE=T SLTH=F;
   1820 echo " VLAN_OR_VFI_MAC_COUNT";
   1821 tr 50 M=VLAN_OR_VFI_MAC_COUNT;
   1822 tr 51 M=VLAN_OR_VFI_MAC_COUNT;
   1823 tr 52 M=VLAN_OR_VFI_MAC_COUNT;
   1824 tr 71 M=VLAN_OR_VFI_MAC_COUNT TSE=F SLTH=T;
   1825 tr 71 M=VLAN_OR_VFI_MAC_COUNT TSE=T SLTH=T;
   1826 tr 71 M=VLAN_OR_VFI_MAC_COUNT TSE=T SLTH=F;
   1827 echo " VLAN_OR_VFI_MAC_LIMIT";
   1828 tr 50 M=VLAN_OR_VFI_MAC_LIMIT;
   1829 tr 51 M=VLAN_OR_VFI_MAC_LIMIT;
   1830 tr 52 M=VLAN_OR_VFI_MAC_LIMIT;
   1831 tr 71 M=VLAN_OR_VFI_MAC_LIMIT TSE=F SLTH=T;
   1832 tr 71 M=VLAN_OR_VFI_MAC_LIMIT TSE=T SLTH=T;
   1833 tr 71 M=VLAN_OR_VFI_MAC_LIMIT TSE=T SLTH=F;
   1834 echo " VLAN_PROFILE_2";
   1835 tr 50 M=VLAN_PROFILE_2;
   1836 tr 51 M=VLAN_PROFILE_2;
   1837 tr 52 M=VLAN_PROFILE_2;
   1838 tr 71 M=VLAN_PROFILE_2 TSE=F SLTH=T;
   1839 tr 71 M=VLAN_PROFILE_2 TSE=T SLTH=T;
   1840 tr 71 M=VLAN_PROFILE_2 TSE=T SLTH=F;
   1841 echo " VLAN_PROFILE_TAB";
   1842 tr 50 M=VLAN_PROFILE_TAB;
   1843 tr 51 M=VLAN_PROFILE_TAB;
   1844 tr 52 M=VLAN_PROFILE_TAB;
   1845 tr 71 M=VLAN_PROFILE_TAB TSE=F SLTH=T;
   1846 tr 71 M=VLAN_PROFILE_TAB TSE=T SLTH=T;
   1847 tr 71 M=VLAN_PROFILE_TAB TSE=T SLTH=F;
   1848 echo " VLAN_PROTOCOL";
   1849 tr 50 M=VLAN_PROTOCOL;
   1850 tr 51 M=VLAN_PROTOCOL;
   1851 tr 52 M=VLAN_PROTOCOL;
   1852 tr 71 M=VLAN_PROTOCOL TSE=F SLTH=T;
   1853 tr 71 M=VLAN_PROTOCOL TSE=T SLTH=T;
   1854 tr 71 M=VLAN_PROTOCOL TSE=T SLTH=F;
   1855 echo " VLAN_PROTOCOL_DATA";
   1856 tr 50 M=VLAN_PROTOCOL_DATA;
   1857 tr 51 M=VLAN_PROTOCOL_DATA;
   1858 tr 52 M=VLAN_PROTOCOL_DATA;
   1859 tr 71 M=VLAN_PROTOCOL_DATA TSE=F SLTH=T;
   1860 tr 71 M=VLAN_PROTOCOL_DATA TSE=T SLTH=T;
   1861 tr 71 M=VLAN_PROTOCOL_DATA TSE=T SLTH=F;
   1862 if !$?BCM5343X_A0 \
   1863 	'echo " VLAN_SUBNET"; \
   1864 	tr 50 M=VLAN_SUBNET; \
   1865 	tr 51 M=VLAN_SUBNET; \
   1866 	tr 52 M=VLAN_SUBNET; \
   1867 	tr 71 M=VLAN_SUBNET TSE=F SLTH=T; \
   1868 	tr 71 M=VLAN_SUBNET TSE=T SLTH=T; \
   1869 	tr 71 M=VLAN_SUBNET TSE=T SLTH=F; \
   1870 	echo " VLAN_SUBNET_DATA_ONLY"; \
   1871 	tr 50 M=VLAN_SUBNET_DATA_ONLY; \
   1872 	tr 51 M=VLAN_SUBNET_DATA_ONLY; \
   1873 	tr 52 M=VLAN_SUBNET_DATA_ONLY; \
   1874 	tr 71 M=VLAN_SUBNET_DATA_ONLY TSE=F SLTH=T; \
   1875 	tr 71 M=VLAN_SUBNET_DATA_ONLY TSE=T SLTH=T; \
   1876 	tr 71 M=VLAN_SUBNET_DATA_ONLY TSE=T SLTH=F; \
   1877 	echo " VLAN_SUBNET_ONLY"; \
   1878 	tr 50 M=VLAN_SUBNET_ONLY; \
   1879 	tr 51 M=VLAN_SUBNET_ONLY; \
   1880 	tr 52 M=VLAN_SUBNET_ONLY; \
   1881 	tr 71 M=VLAN_SUBNET_ONLY TSE=F SLTH=T; \
   1882 	tr 71 M=VLAN_SUBNET_ONLY TSE=T SLTH=T; \
   1883 	tr 71 M=VLAN_SUBNET_ONLY TSE=T SLTH=F;'
   1884 echo " VLAN_TAB";
   1885 tr 50 M=VLAN_TAB;
   1886 tr 51 M=VLAN_TAB;
   1887 tr 52 M=VLAN_TAB;
   1888 tr 71 M=VLAN_TAB TSE=F SLTH=T;
   1889 tr 71 M=VLAN_TAB TSE=T SLTH=T;
   1890 tr 71 M=VLAN_TAB TSE=T SLTH=F;
   1891 echo " VLAN_XLATE";
   1892 tr 50 M=VLAN_XLATE;
   1893 tr 51 M=VLAN_XLATE;
   1894 tr 52 M=VLAN_XLATE;
   1895 tr 71 M=VLAN_XLATE TSE=F SLTH=T;
   1896 tr 71 M=VLAN_XLATE TSE=T SLTH=T;
   1897 tr 71 M=VLAN_XLATE TSE=T SLTH=F;
   1898 
   1899 
   1900 echo " PORT_MAC_BLOCK";
   1901 tr 50 M=PORT_MAC_BLOCK;
   1902 tr 51 M=PORT_MAC_BLOCK;
   1903 tr 52 M=PORT_MAC_BLOCK;
   1904 tr 71 M=PORT_MAC_BLOCK TSE=F SLTH=T;
   1905 tr 71 M=PORT_MAC_BLOCK TSE=T SLTH=T;
   1906 tr 71 M=PORT_MAC_BLOCK TSE=T SLTH=F;
   1907 echo " CBPCELLHEADER";
   1908 tr 50 M=CBPCELLHEADER;
   1909 tr 51 M=CBPCELLHEADER;
   1910 tr 52 M=CBPCELLHEADER;
   1911 tr 71 M=CBPCELLHEADER TSE=F SLTH=T;
   1912 tr 71 M=CBPCELLHEADER TSE=T SLTH=T;
   1913 tr 71 M=CBPCELLHEADER TSE=T SLTH=F;
   1914 echo " CBPDATA0";
   1915 tr 50 M=CBPDATA0;
   1916 tr 51 M=CBPDATA0;
   1917 tr 52 M=CBPDATA0;
   1918 tr 71 M=CBPDATA0 TSE=F SLTH=T;
   1919 tr 71 M=CBPDATA0 TSE=T SLTH=T;
   1920 tr 71 M=CBPDATA0 TSE=T SLTH=F;
   1921 echo " CBPDATA1";
   1922 tr 50 M=CBPDATA1;
   1923 tr 51 M=CBPDATA1;
   1924 tr 52 M=CBPDATA1;
   1925 tr 71 M=CBPDATA1 TSE=F SLTH=T;
   1926 tr 71 M=CBPDATA1 TSE=T SLTH=T;
   1927 tr 71 M=CBPDATA1 TSE=T SLTH=F;
   1928 echo " CBPDATA2";
   1929 tr 50 M=CBPDATA2;
   1930 tr 51 M=CBPDATA2;
   1931 tr 52 M=CBPDATA2;
   1932 tr 71 M=CBPDATA2 TSE=F SLTH=T;
   1933 tr 71 M=CBPDATA2 TSE=T SLTH=T;
   1934 tr 71 M=CBPDATA2 TSE=T SLTH=F;
   1935 echo " CBPDATA3";
   1936 tr 50 M=CBPDATA3;
   1937 tr 51 M=CBPDATA3;
   1938 tr 52 M=CBPDATA3;
   1939 tr 71 M=CBPDATA3 TSE=F SLTH=T;
   1940 tr 71 M=CBPDATA3 TSE=T SLTH=T;
   1941 tr 71 M=CBPDATA3 TSE=T SLTH=F;
   1942 echo " CBPDATA4";
   1943 tr 50 M=CBPDATA4;
   1944 tr 51 M=CBPDATA4;
   1945 tr 52 M=CBPDATA4;
   1946 tr 71 M=CBPDATA4 TSE=F SLTH=T;
   1947 tr 71 M=CBPDATA4 TSE=T SLTH=T;
   1948 tr 71 M=CBPDATA4 TSE=T SLTH=F;
   1949 echo " CBPDATA5";
   1950 tr 50 M=CBPDATA5;
   1951 tr 51 M=CBPDATA5;
   1952 tr 52 M=CBPDATA5;
   1953 tr 71 M=CBPDATA5 TSE=F SLTH=T;
   1954 tr 71 M=CBPDATA5 TSE=T SLTH=T;
   1955 tr 71 M=CBPDATA5 TSE=T SLTH=F;
   1956 echo " CBPDATA6";
   1957 tr 50 M=CBPDATA6;
   1958 tr 51 M=CBPDATA6;
   1959 tr 52 M=CBPDATA6;
   1960 tr 71 M=CBPDATA6 TSE=F SLTH=T;
   1961 tr 71 M=CBPDATA6 TSE=T SLTH=T;
   1962 tr 71 M=CBPDATA6 TSE=T SLTH=F;
   1963 echo " CBPDATA7";
   1964 tr 50 M=CBPDATA7;
   1965 tr 51 M=CBPDATA7;
   1966 tr 52 M=CBPDATA7;
   1967 tr 71 M=CBPDATA7 TSE=F SLTH=T;
   1968 tr 71 M=CBPDATA7 TSE=T SLTH=T;
   1969 tr 71 M=CBPDATA7 TSE=T SLTH=F;
   1970 echo " CBPPKTHEADER0";
   1971 tr 50 M=CBPPKTHEADER0;
   1972 tr 51 M=CBPPKTHEADER0;
   1973 tr 52 M=CBPPKTHEADER0;
   1974 tr 71 M=CBPPKTHEADER0 TSE=F SLTH=T;
   1975 tr 71 M=CBPPKTHEADER0 TSE=T SLTH=T;
   1976 tr 71 M=CBPPKTHEADER0 TSE=T SLTH=F;
   1977 echo " CBPPKTHEADER1";
   1978 tr 50 M=CBPPKTHEADER1;
   1979 tr 51 M=CBPPKTHEADER1;
   1980 tr 52 M=CBPPKTHEADER1;
   1981 tr 71 M=CBPPKTHEADER1 TSE=F SLTH=T;
   1982 tr 71 M=CBPPKTHEADER1 TSE=T SLTH=T;
   1983 tr 71 M=CBPPKTHEADER1 TSE=T SLTH=F;
   1984 echo " CBPPKTHEADER2";
   1985 tr 50 M=CBPPKTHEADER2;
   1986 tr 51 M=CBPPKTHEADER2;
   1987 tr 52 M=CBPPKTHEADER2;
   1988 tr 71 M=CBPPKTHEADER2 TSE=F SLTH=T;
   1989 tr 71 M=CBPPKTHEADER2 TSE=T SLTH=T;
   1990 tr 71 M=CBPPKTHEADER2 TSE=T SLTH=F;
   1991 echo " CBPPKTHEADER_EXT";
   1992 tr 50 M=CBPPKTHEADER_EXT;
   1993 tr 51 M=CBPPKTHEADER_EXT;
   1994 tr 52 M=CBPPKTHEADER_EXT;
   1995 tr 71 M=CBPPKTHEADER_EXT TSE=F SLTH=T;
   1996 tr 71 M=CBPPKTHEADER_EXT TSE=T SLTH=T;
   1997 tr 71 M=CBPPKTHEADER_EXT TSE=T SLTH=F;
   1998 echo " MMU_WRED_UC_QUEUE_CONFIG";
   1999 tr 50 M=MMU_WRED_UC_QUEUE_CONFIG;
   2000 tr 51 M=MMU_WRED_UC_QUEUE_CONFIG;
   2001 tr 52 M=MMU_WRED_UC_QUEUE_CONFIG;
   2002 tr 71 M=MMU_WRED_UC_QUEUE_CONFIG TSE=F SLTH=T;
   2003 tr 71 M=MMU_WRED_UC_QUEUE_CONFIG TSE=T SLTH=T;
   2004 tr 71 M=MMU_WRED_UC_QUEUE_CONFIG TSE=T SLTH=F;
   2005 echo " MMU_WRED_DROP_PROFILE_GREEN";
   2006 tr 50 M=MMU_WRED_DROP_PROFILE_GREEN;
   2007 tr 51 M=MMU_WRED_DROP_PROFILE_GREEN;
   2008 tr 52 M=MMU_WRED_DROP_PROFILE_GREEN;
   2009 tr 71 M=MMU_WRED_DROP_PROFILE_GREEN TSE=F SLTH=T;
   2010 tr 71 M=MMU_WRED_DROP_PROFILE_GREEN TSE=T SLTH=T;
   2011 tr 71 M=MMU_WRED_DROP_PROFILE_GREEN TSE=T SLTH=F;
   2012 echo " MMU_WRED_DROP_PROFILE_RED";
   2013 tr 50 M=MMU_WRED_DROP_PROFILE_RED;
   2014 tr 51 M=MMU_WRED_DROP_PROFILE_RED;
   2015 tr 52 M=MMU_WRED_DROP_PROFILE_RED;
   2016 tr 71 M=MMU_WRED_DROP_PROFILE_RED TSE=F SLTH=T;
   2017 tr 71 M=MMU_WRED_DROP_PROFILE_RED TSE=T SLTH=T;
   2018 tr 71 M=MMU_WRED_DROP_PROFILE_RED TSE=T SLTH=F;
   2019 echo " MMU_WRED_DROP_PROFILE_YELLOW";
   2020 tr 50 M=MMU_WRED_DROP_PROFILE_YELLOW;
   2021 tr 51 M=MMU_WRED_DROP_PROFILE_YELLOW;
   2022 tr 52 M=MMU_WRED_DROP_PROFILE_YELLOW;
   2023 tr 71 M=MMU_WRED_DROP_PROFILE_YELLOW TSE=F SLTH=T;
   2024 tr 71 M=MMU_WRED_DROP_PROFILE_YELLOW TSE=T SLTH=T;
   2025 tr 71 M=MMU_WRED_DROP_PROFILE_YELLOW TSE=T SLTH=F;
   2026 echo " MMU_WRED_MARK_PROFILE_GREEN";
   2027 tr 50 M=MMU_WRED_MARK_PROFILE_GREEN;
   2028 tr 51 M=MMU_WRED_MARK_PROFILE_GREEN;
   2029 tr 52 M=MMU_WRED_MARK_PROFILE_GREEN;
   2030 tr 71 M=MMU_WRED_MARK_PROFILE_GREEN TSE=F SLTH=T;
   2031 tr 71 M=MMU_WRED_MARK_PROFILE_GREEN TSE=T SLTH=T;
   2032 tr 71 M=MMU_WRED_MARK_PROFILE_GREEN TSE=T SLTH=F;
   2033 echo " MMU_WRED_MARK_PROFILE_RED";
   2034 tr 50 M=MMU_WRED_MARK_PROFILE_RED;
   2035 tr 51 M=MMU_WRED_MARK_PROFILE_RED;
   2036 tr 52 M=MMU_WRED_MARK_PROFILE_RED;
   2037 tr 71 M=MMU_WRED_MARK_PROFILE_RED TSE=F SLTH=T;
   2038 tr 71 M=MMU_WRED_MARK_PROFILE_RED TSE=T SLTH=T;
   2039 tr 71 M=MMU_WRED_MARK_PROFILE_RED TSE=T SLTH=F;
   2040 echo " MMU_WRED_MARK_PROFILE_YELLOW";
   2041 tr 50 M=MMU_WRED_MARK_PROFILE_YELLOW;
   2042 tr 51 M=MMU_WRED_MARK_PROFILE_YELLOW;
   2043 tr 52 M=MMU_WRED_MARK_PROFILE_YELLOW;
   2044 tr 71 M=MMU_WRED_MARK_PROFILE_YELLOW TSE=F SLTH=T;
   2045 tr 71 M=MMU_WRED_MARK_PROFILE_YELLOW TSE=T SLTH=T;
   2046 tr 71 M=MMU_WRED_MARK_PROFILE_YELLOW TSE=T SLTH=F;
   2047 
   2048 echo " SER_ACC_TYPE_MAP";
   2049 tr 50 M=SER_ACC_TYPE_MAP;
   2050 tr 51 M=SER_ACC_TYPE_MAP;
   2051 tr 52 M=SER_ACC_TYPE_MAP;
   2052 tr 71 M=SER_ACC_TYPE_MAP TSE=F SLTH=T;
   2053 tr 71 M=SER_ACC_TYPE_MAP TSE=T SLTH=T;
   2054 tr 71 M=SER_ACC_TYPE_MAP TSE=T SLTH=F;
   2055 
   2056 #The BUCKETf will be updated if MISCCONFIG.METERING_CLK_ENf=1
   2057 # The bit will be set after doing init misc
   2058 echo " MMU_MAX_BUCKET_EVEN";
   2059 tr 50 M=MMU_MAX_BUCKET_EVEN;
   2060 tr 51 M=MMU_MAX_BUCKET_EVEN;
   2061 tr 52 M=MMU_MAX_BUCKET_EVEN;
   2062 tr 71 M=MMU_MAX_BUCKET_EVEN TSE=F SLTH=T;
   2063 tr 71 M=MMU_MAX_BUCKET_EVEN TSE=T SLTH=T;
   2064 tr 71 M=MMU_MAX_BUCKET_EVEN TSE=T SLTH=F;
   2065 echo " MMU_MAX_BUCKET_ODD";
   2066 tr 50 M=MMU_MAX_BUCKET_ODD;
   2067 tr 51 M=MMU_MAX_BUCKET_ODD;
   2068 tr 52 M=MMU_MAX_BUCKET_ODD;
   2069 tr 71 M=MMU_MAX_BUCKET_ODD TSE=F SLTH=T;
   2070 tr 71 M=MMU_MAX_BUCKET_ODD TSE=T SLTH=T;
   2071 tr 71 M=MMU_MAX_BUCKET_ODD TSE=T SLTH=F;
   2072 echo " MMU_MIN_BUCKET_EVEN";
   2073 tr 50 M=MMU_MIN_BUCKET_EVEN;
   2074 tr 51 M=MMU_MIN_BUCKET_EVEN;
   2075 tr 52 M=MMU_MIN_BUCKET_EVEN;
   2076 tr 71 M=MMU_MIN_BUCKET_EVEN TSE=F SLTH=T;
   2077 tr 71 M=MMU_MIN_BUCKET_EVEN TSE=T SLTH=T;
   2078 tr 71 M=MMU_MIN_BUCKET_EVEN TSE=T SLTH=F;
   2079 tr 51 M=MMU_MIN_BUCKET_ODD;
   2080 echo " MMU_MIN_BUCKET_ODD";
   2081 tr 50 M=MMU_MIN_BUCKET_ODD;
   2082 tr 52 M=MMU_MIN_BUCKET_ODD;
   2083 tr 71 M=MMU_MIN_BUCKET_ODD TSE=F SLTH=T;
   2084 tr 71 M=MMU_MIN_BUCKET_ODD TSE=T SLTH=T;
   2085 tr 71 M=MMU_MIN_BUCKET_ODD TSE=T SLTH=F;
   2086 
   2087 #It doesn't support read. Write also require MMU_MIN_BUCKET_ODDother commends. 
   2088 #echo " XLPORT_WC_UCMEM_DATA";
   2089 #tr 50 M=XLPORT_WC_UCMEM_DATA;
   2090 #tr 51 M=XLPORT_WC_UCMEM_DATA;
   2091 #tr 52 M=XLPORT_WC_UCMEM_DATA;
   2092 #tr 71 M=XLPORT_WC_UCMEM_DATA TSE=F SLTH=T;
   2093 #tr 71 M=XLPORT_WC_UCMEM_DATA TSE=T SLTH=T;
   2094 #tr 71 M=XLPORT_WC_UCMEM_DATA TSE=T SLTH=F;
   2095 
   2096 #Need to disable WRED_REFRESH_ENf before testing
   2097 #echo " MMU_WRED_UC_QUEUE_AVG_QSIZE";
   2098 #tr 50 M=MMU_WRED_UC_QUEUE_AVG_QSIZE;
   2099 #tr 51 M=MMU_WRED_UC_QUEUE_AVG_QSIZE;
   2100 #tr 52 M=MMU_WRED_UC_QUEUE_AVG_QSIZE;
   2101 #tr 71 M=MMU_WRED_UC_QUEUE_AVG_QSIZE TSE=F SLTH=T;
   2102 #tr 71 M=MMU_WRED_UC_QUEUE_AVG_QSIZE TSE=T SLTH=T;
   2103 #tr 71 M=MMU_WRED_UC_QUEUE_AVG_QSIZE TSE=T SLTH=F;
   2104 #echo " MMU_WRED_MARK_THD";
   2105 #tr 50 M=MMU_WRED_MARK_THD;
   2106 #tr 51 M=MMU_WRED_MARK_THD;
   2107 #tr 52 M=MMU_WRED_MARK_THD;
   2108 #tr 71 M=MMU_WRED_MARK_THD TSE=F SLTH=T;
   2109 #tr 71 M=MMU_WRED_MARK_THD TSE=T SLTH=T;
   2110 #tr 71 M=MMU_WRED_MARK_THD TSE=T SLTH=F;
   2111 
   2112 # Re-initialize to clean up of various read/wrires to MMU memories
   2113 set rct=true
   2114 rcload rc.soc
   2115 counter off
   2116 l2mode off
   2117 linkscan off
   2118 
   2119 echo "Running counter width verification test ..."
   2120 tr 30
   2121 $done
   2122 
   2123 echo "Running counter read/write test ..."
   2124 tr 31
   2125 $done
   2126 
   2127 #L2/L3 hashing tests
   2128 echo "Running L2 insert/delete/lookup test ..."
   2129 tr 32
   2130 $done
   2131 
   2132 echo "Running L2 overflow insert test ..."
   2133 tr 33
   2134 $done
   2135 
   2136 echo "Running L2 hash test ..."
   2137 tr 34
   2138 $done
   2139 
   2140 echo "Running L2 delete by port test ..."
   2141 tr 35
   2142 $done
   2143 
   2144 echo "Running L2 delete by vlan test ..."
   2145 tr 36
   2146 $done
   2147 
   2148 if $?BCM5616X_A0 || $?BCM5616XLITE_A0 \
   2149    'echo "Running IPV4 overflow insert test ..."; \
   2150    tr 87 IPMCEnable=False; \
   2151    tr 87 IPMCEnable=True; \
   2152    echo "Running IPV4 hash test ..."; \
   2153    tr 88 IPMCEnable=False; \
   2154    tr 88 IPMCEnable=True; \
   2155    echo "Running IPV6 overflow insert test ..."; \
   2156    tr 85 IPMCEnable=False; \
   2157    tr 85 IPMCEnable=True; \
   2158    echo "Running IPV6 hash test ..."; \
   2159    tr 86 IPMCEnable=False; \
   2160    tr 86 IPMCEnable=True;'
   2161 
   2162 echo "Running VLAN translate overflow insert test ..."
   2163 tr 100
   2164 
   2165 echo "Running VLAN translate hash tests ..."
   2166 tr 101 hash=0
   2167 tr 101 hash=1
   2168 tr 101 hash=2
   2169 tr 101 hash=3
   2170 tr 101 hash=4
   2171 tr 101 hash=5
   2172 $done
   2173 
   2174 echo "Running Egress VLAN translate overflow insert test ..."
   2175 tr 102
   2176 $done
   2177 
   2178 echo "Running Egress VLAN translate hash tests ..."
   2179 tr 103 hash=0
   2180 tr 103 hash=1
   2181 tr 103 hash=2
   2182 tr 103 hash=3
   2183 tr 103 hash=4
   2184 tr 103 hash=5
   2185 $done
   2186 #no mpls in hurricane3
   2187 #echo "Running MPLS overflow insert test ..."
   2188 #tr 104
   2189 #$done
   2190 
   2191 #echo "Running MPLS hash tests ..."
   2192 #tr 105 hash=0
   2193 #tr 105 hash=1
   2194 #tr 105 hash=2
   2195 #tr 105 hash=3
   2196 #tr 105 hash=4
   2197 #tr 105 hash=5
   2198 #$done
   2199 
   2200 echo "Running Software Error Recovery ..."
   2201 tr 144 testType=spread
   2202 $done
   2203 
   2204 # Disable the link thread while testing the tr 60 
   2205 # Reload rc will restart the link thread, so set rct=false before testing
   2206 set rct=false
   2207 rcload rc.soc
   2208 linkscan off
   2209 
   2210 echo "Running MDIO Linkscan test"
   2211 tr 60 readcount=10000
   2212 $done
   2213 # Re-initialize to set rct=true after tr 60 testing
   2214 set rct=true
   2215 
   2216 echo "Testing CPU DMA loopback ..."
   2217 tr 17 c=5
   2218 $done
   2219 
   2220 echo "Testing CPU DMA, Scatter/Gather Reload ..."
   2221 tr 22
   2222 $done
   2223 
   2224 echo "Testing CPU DMA, Scatter/Gather Simple ..."
   2225 tr 23
   2226 $done
   2227 
   2228 echo "Testing CPU DMA, Scatter/Gather Random ..."
   2229 tr 24
   2230 $done
   2231 
   2232 tr 48 smi=103 dmi=42 vlan=5 pi=0x11335577 sendm=single
   2233 $done
   2234 
   2235 echo "Running PHY loopback V2 on all ports ..."
   2236 tr 49 smi=52 dmi=83 vlan=23 pi=0x01204007
   2237 $done
   2238 
   2239 #Internal snake Loopback
   2240 echo "Running internal snake on all ports, MAC loopback ..."
   2241 tr 39 loopbackmode=mac snakepath=two PBM=e
   2242 $done
   2243 
   2244 echo "Running internal snake on all ports, PHY loopback ..."
   2245 tr 39 loopbackmode=phy snakepath=two PBM=e
   2246 $done
   2247 
   2248 echo "Running MAC loopback TR 18 on all ports ..."
   2249 tr 18 pbm=ge speed=10
   2250 tr 18 pbm=ge speed=100
   2251 tr 18 pbm=ge speed=1000
   2252 tr 18 pbm=xe speed=MAX
   2253 tr 18 pbm=hg speed=MAX
   2254 $done
   2255 
   2256 echo "Running PHY loopback TR 19 on all ports ..."
   2257 tr 19 pbm=ge speed=10
   2258 tr 19 pbm=ge speed=100
   2259 tr 19 pbm=ge speed=1000
   2260 tr 19 pbm=xe speed=MAX
   2261 tr 19 pbm=hg speed=MAX
   2262 $done
   2263 
   2264 #Traffic Test
   2265 echo "Running Traffic Test in MAC mode ..."
   2266 tr 72 RM=MAC PBM=ge
   2267 tr 72 RM=MAC PBM=xe
   2268 $done
   2269 
   2270 echo "Running Traffic Test in PHY mode ..."
   2271 tr 72 RM=PHY PBM=ge
   2272 tr 72 RM=PHY PBM=xe
   2273 $done
   2274 
   2275 #SNMP
   2276 echo "SNMP MIB Object Test"
   2277 tr 73
   2278 $done
   2279 
   2280 #Reload Test
   2281 echo "TX Reload Test"
   2282 tr 90 port=ge0
   2283 
   2284 echo "RX Reload Test"
   2285 tr 91 port=ge1 TxPktCount=10
   2286 
   2287 # Show status
   2288 date
   2289 tl
   2290 local returnCode $?
   2291 
   2292 echo Tests Complete.  Reinitializing ...
   2293 config refresh
   2294 rcload rc.soc
   2295 counter off
   2296 l2mode off
   2297 
   2298 # We want to show the return code from the tl command which
   2299 # lists the results. The automated test infrastructure keys off of this
   2300 # value
   2301 echo "testsuite: finished: sanity: $returnCode"