bcmi_viper_xgxs_sym.c (159647B)
1 /******************************************************************************* 2 * 3 * 4 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 5 * 6 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 7 * 8 * DO NOT EDIT THIS FILE! 9 * This file is auto-generated from the registers file. 10 * Edits to this file will be lost when it is regenerated. 11 * 12 * Symbol table file for the BCMI_VIPER_XGXS. 13 * This symbol table is used by the Broadcom debug shell. 14 */ 15 16 17 #include <phymod/chip/bcmi_viper_xgxs_defs.h> 18 #include <phymod/phymod_symbols.h> 19 20 /* No symbols will be compiled unless this is defined. */ 21 #if PHYMOD_CONFIG_INCLUDE_CHIP_SYMBOLS == 1 22 /******************************************************************************* 23 * 24 * If PHYMOD_CONFIG_INCLUDE_FIELD_INFO is 1, then symbol information 25 * necessary to encode and decode the individual fields of a register or memory 26 * will be available. 27 * 28 * Without it, only the register and memory names will be symbolically available 29 * and their values will be displayed as raw data only. 30 * 31 * Field information can be compiled out in the interest of saving code space. 32 */ 33 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 34 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 35 36 static uint32_t BCMI_VIPER_XGXS_AERr_fields[] = 37 { 38 /* MMD_PORT:0:10 */ 39 PHYMOD_SYMBOL_FIELD_ENCODE(367, 10, 0), 40 /* MMD_DEVICETYPE:11:15 */ 41 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(364, 15, 11) 42 }; 43 static uint32_t BCMI_VIPER_XGXS_AUTONEGADVr_fields[] = 44 { 45 /* FULL_DUPLEX:5:5 */ 46 PHYMOD_SYMBOL_FIELD_ENCODE(240, 5, 5), 47 /* HALF_DUPLEX:6:6 */ 48 PHYMOD_SYMBOL_FIELD_ENCODE(261, 6, 6), 49 /* PAUSE:7:8 */ 50 PHYMOD_SYMBOL_FIELD_ENCODE(390, 8, 7), 51 /* REMOTE_FAULT:12:13 */ 52 PHYMOD_SYMBOL_FIELD_ENCODE(486, 13, 12), 53 /* NEXT_PAGE:15:15 */ 54 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(379, 15, 15) 55 }; 56 static uint32_t BCMI_VIPER_XGXS_AUTONEGEXPr_fields[] = 57 { 58 /* PAGE_RECEIVED:1:1 */ 59 PHYMOD_SYMBOL_FIELD_ENCODE(385, 1, 1), 60 /* NEXT_PAGE_ABILITY:2:2 */ 61 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(380, 2, 2) 62 }; 63 static uint32_t BCMI_VIPER_XGXS_AUTONEGLPABILr_fields[] = 64 { 65 /* SGMII_MODE:0:0 */ 66 PHYMOD_SYMBOL_FIELD_ENCODE(615, 0, 0), 67 /* FULL_DUPLEX:5:5 */ 68 PHYMOD_SYMBOL_FIELD_ENCODE(240, 5, 5), 69 /* HALF_DUPLEX:6:6 */ 70 PHYMOD_SYMBOL_FIELD_ENCODE(261, 6, 6), 71 /* PAUSE:7:8 */ 72 PHYMOD_SYMBOL_FIELD_ENCODE(390, 8, 7), 73 /* REMOTE_FAULT:12:13 */ 74 PHYMOD_SYMBOL_FIELD_ENCODE(486, 13, 12), 75 /* ACKNOWLEDGE:14:14 */ 76 PHYMOD_SYMBOL_FIELD_ENCODE(3, 14, 14), 77 /* NEXT_PAGE:15:15 */ 78 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(379, 15, 15) 79 }; 80 static uint32_t BCMI_VIPER_XGXS_AUTONEGLPABIL2r_fields[] = 81 { 82 /* MESSAGE:0:10 */ 83 PHYMOD_SYMBOL_FIELD_ENCODE(355, 10, 0), 84 /* TOGGLE:11:11 */ 85 PHYMOD_SYMBOL_FIELD_ENCODE(679, 11, 11), 86 /* ACK2:12:12 */ 87 PHYMOD_SYMBOL_FIELD_ENCODE(2, 12, 12), 88 /* MESSAGE_PAGE:13:13 */ 89 PHYMOD_SYMBOL_FIELD_ENCODE(356, 13, 13), 90 /* ACK:14:14 */ 91 PHYMOD_SYMBOL_FIELD_ENCODE(1, 14, 14), 92 /* NEXT_PAGE:15:15 */ 93 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(379, 15, 15) 94 }; 95 static uint32_t BCMI_VIPER_XGXS_AUTONEGNPr_fields[] = 96 { 97 /* MESSAGE:0:10 */ 98 PHYMOD_SYMBOL_FIELD_ENCODE(355, 10, 0), 99 /* TOGGLE:11:11 */ 100 PHYMOD_SYMBOL_FIELD_ENCODE(679, 11, 11), 101 /* ACK2:12:12 */ 102 PHYMOD_SYMBOL_FIELD_ENCODE(2, 12, 12), 103 /* MESSAGE_PAGE:13:13 */ 104 PHYMOD_SYMBOL_FIELD_ENCODE(356, 13, 13), 105 /* ACK:14:14 */ 106 PHYMOD_SYMBOL_FIELD_ENCODE(1, 14, 14), 107 /* NEXT_PAGE:15:15 */ 108 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(379, 15, 15) 109 }; 110 static uint32_t BCMI_VIPER_XGXS_BLK0_MISCCTL1r_fields[] = 111 { 112 /* IEEE_BLKSEL_VAL:0:0 */ 113 PHYMOD_SYMBOL_FIELD_ENCODE(272, 0, 0), 114 /* IEEE_BLKSEL_AUTODET:1:1 */ 115 PHYMOD_SYMBOL_FIELD_ENCODE(271, 1, 1), 116 /* INVERT_RX_SIGDET:2:2 */ 117 PHYMOD_SYMBOL_FIELD_ENCODE(288, 2, 2), 118 /* PARDET10G_PWRDNLINK_EN:3:3 */ 119 PHYMOD_SYMBOL_FIELD_ENCODE(386, 3, 3), 120 /* FORCE_DIV5_FOR_LXCK25:4:4 */ 121 PHYMOD_SYMBOL_FIELD_ENCODE(216, 4, 4), 122 /* LATCH_LINKDOWN_ENABLE:6:6 */ 123 PHYMOD_SYMBOL_FIELD_ENCODE(305, 6, 6), 124 /* CLEAR_LINKDOWN:7:7 */ 125 PHYMOD_SYMBOL_FIELD_ENCODE(64, 7, 7), 126 /* PMD_DEV_EN_OVERRIDE:9:9 */ 127 PHYMOD_SYMBOL_FIELD_ENCODE(440, 9, 9), 128 /* PCS_DEV_EN_OVERRIDE:10:10 */ 129 PHYMOD_SYMBOL_FIELD_ENCODE(398, 10, 10), 130 /* GLOBAL_PMD_TX_DISABLE:11:11 */ 131 PHYMOD_SYMBOL_FIELD_ENCODE(253, 11, 11), 132 /* PMD_LANE0_TX_DISABLE:12:12 */ 133 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(441, 12, 12) 134 }; 135 static uint32_t BCMI_VIPER_XGXS_BLK2_TESTMODECOMBOr_fields[] = 136 { 137 /* TEST_MONITOR_MODE1:0:5 */ 138 PHYMOD_SYMBOL_FIELD_ENCODE(671, 5, 0), 139 /* TEST_MONITOR_MODE2:6:11 */ 140 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(672, 11, 6) 141 }; 142 static uint32_t BCMI_VIPER_XGXS_BLK2_TESTMODELANEr_fields[] = 143 { 144 /* TXFIFO_BYPASS:7:7 */ 145 PHYMOD_SYMBOL_FIELD_ENCODE(702, 7, 7), 146 /* INDCK_MODE_EN_RX_VAL:9:9 */ 147 PHYMOD_SYMBOL_FIELD_ENCODE(275, 9, 9), 148 /* INDCK_MODE_EN_RX_FORCE:10:10 */ 149 PHYMOD_SYMBOL_FIELD_ENCODE(274, 10, 10), 150 /* EEE_GATEOUTCLK_EN:13:13 */ 151 PHYMOD_SYMBOL_FIELD_ENCODE(163, 13, 13), 152 /* EEE_GATECLK_EN:14:14 */ 153 PHYMOD_SYMBOL_FIELD_ENCODE(162, 14, 14), 154 /* EEE_FAST_TIMER_EN:15:15 */ 155 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(161, 15, 15) 156 }; 157 static uint32_t BCMI_VIPER_XGXS_BLK2_TESTMODEMUXr_fields[] = 158 { 159 /* TMUX_EN:0:0 */ 160 PHYMOD_SYMBOL_FIELD_ENCODE(677, 0, 0), 161 /* TMUX_SEL:1:3 */ 162 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(678, 3, 1) 163 }; 164 static uint32_t BCMI_VIPER_XGXS_BLK4_STS1000X1r_fields[] = 165 { 166 /* SGMII_MODE:0:0 */ 167 PHYMOD_SYMBOL_FIELD_ENCODE(615, 0, 0), 168 /* LINK_STATUS:1:1 */ 169 PHYMOD_SYMBOL_FIELD_ENCODE(315, 1, 1), 170 /* DUPLEX_STATUS:2:2 */ 171 PHYMOD_SYMBOL_FIELD_ENCODE(152, 2, 2), 172 /* SPEED_STATUS:3:4 */ 173 PHYMOD_SYMBOL_FIELD_ENCODE(649, 4, 3), 174 /* PAUSE_RESOLUTION_TXSIDE:5:5 */ 175 PHYMOD_SYMBOL_FIELD_ENCODE(392, 5, 5), 176 /* PAUSE_RESOLUTION_RXSIDE:6:6 */ 177 PHYMOD_SYMBOL_FIELD_ENCODE(391, 6, 6), 178 /* LINK_STATUS_CHANGE:7:7 */ 179 PHYMOD_SYMBOL_FIELD_ENCODE(316, 7, 7), 180 /* EARLY_END_EXTENSION_DETECTED:8:8 */ 181 PHYMOD_SYMBOL_FIELD_ENCODE(154, 8, 8), 182 /* CARRIER_EXTEND_ERR_DETECTED:9:9 */ 183 PHYMOD_SYMBOL_FIELD_ENCODE(47, 9, 9), 184 /* RX_ERR_DETECTED:10:10 */ 185 PHYMOD_SYMBOL_FIELD_ENCODE(566, 10, 10), 186 /* TX_ERR_DETECTED:11:11 */ 187 PHYMOD_SYMBOL_FIELD_ENCODE(718, 11, 11), 188 /* CRC_ERR_DETECTED:12:12 */ 189 PHYMOD_SYMBOL_FIELD_ENCODE(88, 12, 12), 190 /* FALSE_CARRIER_DETECTED:13:13 */ 191 PHYMOD_SYMBOL_FIELD_ENCODE(195, 13, 13), 192 /* RXFIFO_ERR_DETECTED:14:14 */ 193 PHYMOD_SYMBOL_FIELD_ENCODE(556, 14, 14), 194 /* TXFIFO_ERR_DETECTED:15:15 */ 195 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(703, 15, 15) 196 }; 197 static uint32_t BCMI_VIPER_XGXS_BLKADDR0r_fields[] = 198 { 199 /* BLOCKADDRESS:4:14 */ 200 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(24, 14, 4) 201 }; 202 static uint32_t BCMI_VIPER_XGXS_BLKADDR1r_fields[] = 203 { 204 /* BLOCKADDRESS:4:14 */ 205 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(24, 14, 4) 206 }; 207 static uint32_t BCMI_VIPER_XGXS_COMBO_AUTONEGADVr_fields[] = 208 { 209 /* FULL_DUPLEX:5:5 */ 210 PHYMOD_SYMBOL_FIELD_ENCODE(240, 5, 5), 211 /* HALF_DUPLEX:6:6 */ 212 PHYMOD_SYMBOL_FIELD_ENCODE(261, 6, 6), 213 /* PAUSE:7:8 */ 214 PHYMOD_SYMBOL_FIELD_ENCODE(390, 8, 7), 215 /* REMOTE_FAULT:12:13 */ 216 PHYMOD_SYMBOL_FIELD_ENCODE(486, 13, 12), 217 /* NEXT_PAGE:15:15 */ 218 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(379, 15, 15) 219 }; 220 static uint32_t BCMI_VIPER_XGXS_COMBO_AUTONEGEXPr_fields[] = 221 { 222 /* PAGE_RECEIVED:1:1 */ 223 PHYMOD_SYMBOL_FIELD_ENCODE(385, 1, 1), 224 /* NEXT_PAGE_ABILITY:2:2 */ 225 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(380, 2, 2) 226 }; 227 static uint32_t BCMI_VIPER_XGXS_COMBO_AUTONEGLPABILr_fields[] = 228 { 229 /* SGMII_MODE:0:0 */ 230 PHYMOD_SYMBOL_FIELD_ENCODE(615, 0, 0), 231 /* FULL_DUPLEX:5:5 */ 232 PHYMOD_SYMBOL_FIELD_ENCODE(240, 5, 5), 233 /* HALF_DUPLEX:6:6 */ 234 PHYMOD_SYMBOL_FIELD_ENCODE(261, 6, 6), 235 /* PAUSE:7:8 */ 236 PHYMOD_SYMBOL_FIELD_ENCODE(390, 8, 7), 237 /* REMOTE_FAULT:12:13 */ 238 PHYMOD_SYMBOL_FIELD_ENCODE(486, 13, 12), 239 /* ACKNOWLEDGE:14:14 */ 240 PHYMOD_SYMBOL_FIELD_ENCODE(3, 14, 14), 241 /* NEXT_PAGE:15:15 */ 242 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(379, 15, 15) 243 }; 244 static uint32_t BCMI_VIPER_XGXS_COMBO_AUTONEGLPABIL2r_fields[] = 245 { 246 /* MESSAGE:0:10 */ 247 PHYMOD_SYMBOL_FIELD_ENCODE(355, 10, 0), 248 /* TOGGLE:11:11 */ 249 PHYMOD_SYMBOL_FIELD_ENCODE(679, 11, 11), 250 /* ACK2:12:12 */ 251 PHYMOD_SYMBOL_FIELD_ENCODE(2, 12, 12), 252 /* MESSAGE_PAGE:13:13 */ 253 PHYMOD_SYMBOL_FIELD_ENCODE(356, 13, 13), 254 /* ACK:14:14 */ 255 PHYMOD_SYMBOL_FIELD_ENCODE(1, 14, 14), 256 /* NEXT_PAGE:15:15 */ 257 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(379, 15, 15) 258 }; 259 static uint32_t BCMI_VIPER_XGXS_COMBO_AUTONEGNPr_fields[] = 260 { 261 /* MESSAGE:0:10 */ 262 PHYMOD_SYMBOL_FIELD_ENCODE(355, 10, 0), 263 /* TOGGLE:11:11 */ 264 PHYMOD_SYMBOL_FIELD_ENCODE(679, 11, 11), 265 /* ACK2:12:12 */ 266 PHYMOD_SYMBOL_FIELD_ENCODE(2, 12, 12), 267 /* MESSAGE_PAGE:13:13 */ 268 PHYMOD_SYMBOL_FIELD_ENCODE(356, 13, 13), 269 /* ACK:14:14 */ 270 PHYMOD_SYMBOL_FIELD_ENCODE(1, 14, 14), 271 /* NEXT_PAGE:15:15 */ 272 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(379, 15, 15) 273 }; 274 static uint32_t BCMI_VIPER_XGXS_COMBO_ID1r_fields[] = 275 { 276 /* REGID:0:15 */ 277 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(484, 15, 0) 278 }; 279 static uint32_t BCMI_VIPER_XGXS_COMBO_ID2r_fields[] = 280 { 281 /* REGID:0:15 */ 282 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(484, 15, 0) 283 }; 284 static uint32_t BCMI_VIPER_XGXS_COMBO_MIICTLr_fields[] = 285 { 286 /* MANUAL_SPEED1:6:6 */ 287 PHYMOD_SYMBOL_FIELD_ENCODE(349, 6, 6), 288 /* COLLISION_TEST_EN:7:7 */ 289 PHYMOD_SYMBOL_FIELD_ENCODE(72, 7, 7), 290 /* FULL_DUPLEX:8:8 */ 291 PHYMOD_SYMBOL_FIELD_ENCODE(240, 8, 8), 292 /* RESTART_AUTONEG:9:9 */ 293 PHYMOD_SYMBOL_FIELD_ENCODE(520, 9, 9), 294 /* PWRDWN_SW:11:11 */ 295 PHYMOD_SYMBOL_FIELD_ENCODE(470, 11, 11), 296 /* AUTONEG_ENABLE:12:12 */ 297 PHYMOD_SYMBOL_FIELD_ENCODE(14, 12, 12), 298 /* MANUAL_SPEED0:13:13 */ 299 PHYMOD_SYMBOL_FIELD_ENCODE(348, 13, 13), 300 /* GLOOPBACK:14:14 */ 301 PHYMOD_SYMBOL_FIELD_ENCODE(256, 14, 14), 302 /* RST_HW:15:15 */ 303 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(532, 15, 15) 304 }; 305 static uint32_t BCMI_VIPER_XGXS_COMBO_MIIEXTSTATr_fields[] = 306 { 307 /* S1000BASE_T_HALF_DUPLEX_CAPABLE:12:12 */ 308 PHYMOD_SYMBOL_FIELD_ENCODE(595, 12, 12), 309 /* S1000BASE_T_FULL_DUPLEX_CAPABLE:13:13 */ 310 PHYMOD_SYMBOL_FIELD_ENCODE(594, 13, 13), 311 /* S1000BASE_X_HALF_DUPLEX_CAPABLE:14:14 */ 312 PHYMOD_SYMBOL_FIELD_ENCODE(597, 14, 14), 313 /* S1000BASE_X_FULL_DUPLEX_CAPABLE:15:15 */ 314 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(596, 15, 15) 315 }; 316 static uint32_t BCMI_VIPER_XGXS_COMBO_MIISTATr_fields[] = 317 { 318 /* EXTENDED_CAPABILITY:0:0 */ 319 PHYMOD_SYMBOL_FIELD_ENCODE(182, 0, 0), 320 /* JABBER_DETECT:1:1 */ 321 PHYMOD_SYMBOL_FIELD_ENCODE(301, 1, 1), 322 /* LINK_STATUS:2:2 */ 323 PHYMOD_SYMBOL_FIELD_ENCODE(315, 2, 2), 324 /* AUTONEG_ABILITY:3:3 */ 325 PHYMOD_SYMBOL_FIELD_ENCODE(12, 3, 3), 326 /* REMOTE_FAULT:4:4 */ 327 PHYMOD_SYMBOL_FIELD_ENCODE(486, 4, 4), 328 /* AUTONEG_COMPLETE:5:5 */ 329 PHYMOD_SYMBOL_FIELD_ENCODE(13, 5, 5), 330 /* MF_PREAMBLE_SUPRESSION:6:6 */ 331 PHYMOD_SYMBOL_FIELD_ENCODE(357, 6, 6), 332 /* EXTENDED_STATUS:8:8 */ 333 PHYMOD_SYMBOL_FIELD_ENCODE(183, 8, 8), 334 /* S100BASE_T2_HALF_DUPLEX_CAPABLE:9:9 */ 335 PHYMOD_SYMBOL_FIELD_ENCODE(599, 9, 9), 336 /* S100BASE_T2_FULL_DUPLEX_CAPABLE:10:10 */ 337 PHYMOD_SYMBOL_FIELD_ENCODE(598, 10, 10), 338 /* S10BASE_T_HALF_DUPLEX_CAPABLE:11:11 */ 339 PHYMOD_SYMBOL_FIELD_ENCODE(604, 11, 11), 340 /* S10BASE_T_FULL_DUPLEX_CAPABLE:12:12 */ 341 PHYMOD_SYMBOL_FIELD_ENCODE(603, 12, 12), 342 /* S100BASE_X_HALF_DUPLEX_CAPABLE:13:13 */ 343 PHYMOD_SYMBOL_FIELD_ENCODE(602, 13, 13), 344 /* S100BASE_X_FULL_DUPLEX_CAPABLE:14:14 */ 345 PHYMOD_SYMBOL_FIELD_ENCODE(601, 14, 14), 346 /* S100BASE_T4_CAPABLE:15:15 */ 347 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(600, 15, 15) 348 }; 349 static uint32_t BCMI_VIPER_XGXS_CX4SIGDETCNTr_fields[] = 350 { 351 /* CX4SIGDETCNT:0:15 */ 352 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(92, 15, 0) 353 }; 354 static uint32_t BCMI_VIPER_XGXS_DEV3_PCS_CTL1r_fields[] = 355 { 356 /* SPEEDSELECTION2:2:5 */ 357 PHYMOD_SYMBOL_FIELD_ENCODE(648, 5, 2), 358 /* SPEEDSELECTION1:6:6 */ 359 PHYMOD_SYMBOL_FIELD_ENCODE(647, 6, 6), 360 /* CLOCKSTOPPABLE:10:10 */ 361 PHYMOD_SYMBOL_FIELD_ENCODE(70, 10, 10), 362 /* PWRDWN_SW_10G:11:11 */ 363 PHYMOD_SYMBOL_FIELD_ENCODE(471, 11, 11), 364 /* SPEEDSELECTION0:13:13 */ 365 PHYMOD_SYMBOL_FIELD_ENCODE(646, 13, 13), 366 /* GLOOP10G:14:14 */ 367 PHYMOD_SYMBOL_FIELD_ENCODE(254, 14, 14), 368 /* RST_SW:15:15 */ 369 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(533, 15, 15) 370 }; 371 static uint32_t BCMI_VIPER_XGXS_DIG_BADCODEGROUPr_fields[] = 372 { 373 /* BADCODEGROUPS:8:15 */ 374 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(18, 15, 8) 375 }; 376 static uint32_t BCMI_VIPER_XGXS_DIG_CTL1000X1r_fields[] = 377 { 378 /* FIBER_MODE_1000X:0:0 */ 379 PHYMOD_SYMBOL_FIELD_ENCODE(202, 0, 0), 380 /* SIGNAL_DETECT_EN:2:2 */ 381 PHYMOD_SYMBOL_FIELD_ENCODE(628, 2, 2), 382 /* INVERT_SIGNAL_DETECT:3:3 */ 383 PHYMOD_SYMBOL_FIELD_ENCODE(289, 3, 3), 384 /* AUTODET_EN:4:4 */ 385 PHYMOD_SYMBOL_FIELD_ENCODE(11, 4, 4), 386 /* SGMII_MASTER_MODE:5:5 */ 387 PHYMOD_SYMBOL_FIELD_ENCODE(614, 5, 5), 388 /* DISABLE_PLL_PWRDWN:6:6 */ 389 PHYMOD_SYMBOL_FIELD_ENCODE(114, 6, 6), 390 /* CRC_CHECKER_DISABLE:7:7 */ 391 PHYMOD_SYMBOL_FIELD_ENCODE(87, 7, 7), 392 /* COMMA_DET_EN:8:8 */ 393 PHYMOD_SYMBOL_FIELD_ENCODE(78, 8, 8), 394 /* ZERO_COMMA_DETECTOR_PHASE:9:9 */ 395 PHYMOD_SYMBOL_FIELD_ENCODE(746, 9, 9), 396 /* REMOTE_LOOPBACK:10:10 */ 397 PHYMOD_SYMBOL_FIELD_ENCODE(487, 10, 10), 398 /* SEL_RX_PKTS_FOR_CNTR:11:11 */ 399 PHYMOD_SYMBOL_FIELD_ENCODE(612, 11, 11), 400 /* DISABLE_SIGNAL_DETECT_FILTER:14:14 */ 401 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(119, 14, 14) 402 }; 403 static uint32_t BCMI_VIPER_XGXS_DIG_CTL1000X2r_fields[] = 404 { 405 /* ENABLE_PARALLEL_DETECTION:0:0 */ 406 PHYMOD_SYMBOL_FIELD_ENCODE(173, 0, 0), 407 /* DISABLE_FALSE_LINK:1:1 */ 408 PHYMOD_SYMBOL_FIELD_ENCODE(112, 1, 1), 409 /* FILTER_FORCE_LINK:2:2 */ 410 PHYMOD_SYMBOL_FIELD_ENCODE(210, 2, 2), 411 /* ENABLE_AUTONEG_ERR_TIMER:3:3 */ 412 PHYMOD_SYMBOL_FIELD_ENCODE(171, 3, 3), 413 /* DISABLE_REMOTE_FAULT_SENSING:4:4 */ 414 PHYMOD_SYMBOL_FIELD_ENCODE(115, 4, 4), 415 /* FORCE_XMIT_DATA_ON_TXSIDE:5:5 */ 416 PHYMOD_SYMBOL_FIELD_ENCODE(230, 5, 5), 417 /* AUTONEG_FAST_TIMERS:6:6 */ 418 PHYMOD_SYMBOL_FIELD_ENCODE(15, 6, 6), 419 /* DISABLE_CARRIER_EXTEND:7:7 */ 420 PHYMOD_SYMBOL_FIELD_ENCODE(110, 7, 7), 421 /* DISABLE_TRRR_GENERATION:8:8 */ 422 PHYMOD_SYMBOL_FIELD_ENCODE(120, 8, 8), 423 /* BYPASS_PCS_RX:9:9 */ 424 PHYMOD_SYMBOL_FIELD_ENCODE(33, 9, 9), 425 /* BYPASS_PCS_TX:10:10 */ 426 PHYMOD_SYMBOL_FIELD_ENCODE(34, 10, 10), 427 /* TEST_CNTR:11:11 */ 428 PHYMOD_SYMBOL_FIELD_ENCODE(670, 11, 11), 429 /* TRANSMIT_PACKET_SEQ_TEST:12:12 */ 430 PHYMOD_SYMBOL_FIELD_ENCODE(684, 12, 12), 431 /* TRANSMIT_IDLEJAM_SEQ_TEST:13:13 */ 432 PHYMOD_SYMBOL_FIELD_ENCODE(683, 13, 13), 433 /* CLEAR_BER_COUNTER:14:14 */ 434 PHYMOD_SYMBOL_FIELD_ENCODE(63, 14, 14), 435 /* DISABLE_EXTEND_FDX_ONLY:15:15 */ 436 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(111, 15, 15) 437 }; 438 static uint32_t BCMI_VIPER_XGXS_DIG_CTL1000X3r_fields[] = 439 { 440 /* TX_FIFO_RST:0:0 */ 441 PHYMOD_SYMBOL_FIELD_ENCODE(721, 0, 0), 442 /* FIFO_ELASICITY_TX:1:2 */ 443 PHYMOD_SYMBOL_FIELD_ENCODE(205, 2, 1), 444 /* EARLY_PREAMBLE_TX:3:3 */ 445 PHYMOD_SYMBOL_FIELD_ENCODE(156, 3, 3), 446 /* EARLY_PREAMBLE_RX:4:4 */ 447 PHYMOD_SYMBOL_FIELD_ENCODE(155, 4, 4), 448 /* RESERVED_5:5:5 */ 449 PHYMOD_SYMBOL_FIELD_ENCODE(503, 5, 5), 450 /* RESERVED_6:6:6 */ 451 PHYMOD_SYMBOL_FIELD_ENCODE(506, 6, 6), 452 /* BYPASS_TXFIFO1000:7:7 */ 453 PHYMOD_SYMBOL_FIELD_ENCODE(36, 7, 7), 454 /* FORCE_TXFIFO_ON:8:8 */ 455 PHYMOD_SYMBOL_FIELD_ENCODE(228, 8, 8), 456 /* BLOCK_TXEN_MODE:9:9 */ 457 PHYMOD_SYMBOL_FIELD_ENCODE(25, 9, 9), 458 /* JAM_FALSE_CARRIER_MODE:10:10 */ 459 PHYMOD_SYMBOL_FIELD_ENCODE(302, 10, 10), 460 /* EXT_PHY_CRS_MODE:11:11 */ 461 PHYMOD_SYMBOL_FIELD_ENCODE(185, 11, 11), 462 /* INVERT_EXT_PHY_CRS:12:12 */ 463 PHYMOD_SYMBOL_FIELD_ENCODE(287, 12, 12), 464 /* DISABLE_TX_CRS:13:13 */ 465 PHYMOD_SYMBOL_FIELD_ENCODE(121, 13, 13), 466 /* RXFIFO_GMII_RESET:14:14 */ 467 PHYMOD_SYMBOL_FIELD_ENCODE(557, 14, 14), 468 /* DISABLE_PACKET_MISALIGN:15:15 */ 469 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(113, 15, 15) 470 }; 471 static uint32_t BCMI_VIPER_XGXS_DIG_CTL1000X4r_fields[] = 472 { 473 /* MISCRXSTATUS_SEL:0:2 */ 474 PHYMOD_SYMBOL_FIELD_ENCODE(363, 2, 0), 475 /* LINK_FORCE:7:7 */ 476 PHYMOD_SYMBOL_FIELD_ENCODE(314, 7, 7), 477 /* LATCH_LINKDOWN_ENABLE:8:8 */ 478 PHYMOD_SYMBOL_FIELD_ENCODE(305, 8, 8), 479 /* CLEAR_LINKDOWN:9:9 */ 480 PHYMOD_SYMBOL_FIELD_ENCODE(64, 9, 9), 481 /* ZERO_RXDGMII:10:10 */ 482 PHYMOD_SYMBOL_FIELD_ENCODE(747, 10, 10), 483 /* TX_CONFIG_REG_SEL:11:11 */ 484 PHYMOD_SYMBOL_FIELD_ENCODE(711, 11, 11), 485 /* ENABLE_LAST_RESOLUTION_ERR:12:12 */ 486 PHYMOD_SYMBOL_FIELD_ENCODE(172, 12, 12), 487 /* DISABLE_RESOLUTION_ERR_RESTART:13:13 */ 488 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(117, 13, 13) 489 }; 490 static uint32_t BCMI_VIPER_XGXS_DIG_MISC1r_fields[] = 491 { 492 /* FORCE_SPEED:0:4 */ 493 PHYMOD_SYMBOL_FIELD_ENCODE(226, 4, 0), 494 /* FORCE_LN_MODE:5:5 */ 495 PHYMOD_SYMBOL_FIELD_ENCODE(221, 5, 5), 496 /* TX_UNDERRUN_1000_DIS:6:6 */ 497 PHYMOD_SYMBOL_FIELD_ENCODE(733, 6, 6), 498 /* REFCLK_SEL:13:15 */ 499 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(482, 15, 13) 500 }; 501 static uint32_t BCMI_VIPER_XGXS_DIG_MISC2r_fields[] = 502 { 503 /* AN_TXDISABLEPHASE:3:3 */ 504 PHYMOD_SYMBOL_FIELD_ENCODE(10, 3, 3), 505 /* FIFO_ERR_CYA:4:4 */ 506 PHYMOD_SYMBOL_FIELD_ENCODE(207, 4, 4), 507 /* PMA_PMD_FORCED_SPEED_ENC_EN:5:5 */ 508 PHYMOD_SYMBOL_FIELD_ENCODE(439, 5, 5), 509 /* MIIGMIIMUX_EN:7:7 */ 510 PHYMOD_SYMBOL_FIELD_ENCODE(359, 7, 7), 511 /* MIIGMIIDLY_EN:8:8 */ 512 PHYMOD_SYMBOL_FIELD_ENCODE(358, 8, 8), 513 /* CLK41_BYPASS:9:9 */ 514 PHYMOD_SYMBOL_FIELD_ENCODE(66, 9, 9), 515 /* CLKSIGDET_BYPASS:10:10 */ 516 PHYMOD_SYMBOL_FIELD_ENCODE(67, 10, 10), 517 /* RLPBK_RXRST_EN:11:11 */ 518 PHYMOD_SYMBOL_FIELD_ENCODE(528, 11, 11), 519 /* RLPBK_SW_FORCE:12:12 */ 520 PHYMOD_SYMBOL_FIELD_ENCODE(529, 12, 12), 521 /* RESERVED_14_13:13:14 */ 522 PHYMOD_SYMBOL_FIELD_ENCODE(493, 14, 13), 523 /* RXCKPL_SEL_COMBO:15:15 */ 524 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(552, 15, 15) 525 }; 526 static uint32_t BCMI_VIPER_XGXS_DIG_MISC3r_fields[] = 527 { 528 /* LANEDISABLE:6:6 */ 529 PHYMOD_SYMBOL_FIELD_ENCODE(303, 6, 6), 530 /* FIFO_IPG_CYA:9:9 */ 531 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(208, 9, 9) 532 }; 533 static uint32_t BCMI_VIPER_XGXS_DIG_MISC5r_fields[] = 534 { 535 /* LPI_EN_TX:14:14 */ 536 PHYMOD_SYMBOL_FIELD_ENCODE(343, 14, 14), 537 /* LPI_EN_RX:15:15 */ 538 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(342, 15, 15) 539 }; 540 static uint32_t BCMI_VIPER_XGXS_DIG_MISC8r_fields[] = 541 { 542 /* FORCE_OSCDR_MODE:0:3 */ 543 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(223, 3, 0) 544 }; 545 static uint32_t BCMI_VIPER_XGXS_DIG_PATGENCTLr_fields[] = 546 { 547 /* SEL_PATTERN_GEN_DATA:0:0 */ 548 PHYMOD_SYMBOL_FIELD_ENCODE(611, 0, 0), 549 /* RUN_PATTERN_GEN:1:1 */ 550 PHYMOD_SYMBOL_FIELD_ENCODE(539, 1, 1), 551 /* SINGLE_PASS_MODE:2:2 */ 552 PHYMOD_SYMBOL_FIELD_ENCODE(629, 2, 2), 553 /* PKT_SIZE:3:8 */ 554 PHYMOD_SYMBOL_FIELD_ENCODE(432, 8, 3), 555 /* IPG_SELECT:9:11 */ 556 PHYMOD_SYMBOL_FIELD_ENCODE(291, 11, 9), 557 /* EN_CRC_CHECKER_FRAGMENT_ERR_DET:12:12 */ 558 PHYMOD_SYMBOL_FIELD_ENCODE(175, 12, 12), 559 /* SKIP_CRC:13:13 */ 560 PHYMOD_SYMBOL_FIELD_ENCODE(630, 13, 13), 561 /* TX_ERR:14:14 */ 562 PHYMOD_SYMBOL_FIELD_ENCODE(717, 14, 14), 563 /* PATGEN_LPI_EN:15:15 */ 564 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(387, 15, 15) 565 }; 566 static uint32_t BCMI_VIPER_XGXS_DIG_PATGENSTATr_fields[] = 567 { 568 /* PATTERN_GEN_FSM:0:2 */ 569 PHYMOD_SYMBOL_FIELD_ENCODE(389, 2, 0), 570 /* PATTERN_GEN_ACTIVE:3:3 */ 571 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(388, 3, 3) 572 }; 573 static uint32_t BCMI_VIPER_XGXS_DIG_RXPKTCNTr_fields[] = 574 { 575 /* RXPKTCNT:0:15 */ 576 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(558, 15, 0) 577 }; 578 static uint32_t BCMI_VIPER_XGXS_DIG_STS1000X1r_fields[] = 579 { 580 /* SGMII_MODE:0:0 */ 581 PHYMOD_SYMBOL_FIELD_ENCODE(615, 0, 0), 582 /* LINK_STATUS:1:1 */ 583 PHYMOD_SYMBOL_FIELD_ENCODE(315, 1, 1), 584 /* DUPLEX_STATUS:2:2 */ 585 PHYMOD_SYMBOL_FIELD_ENCODE(152, 2, 2), 586 /* SPEED_STATUS:3:4 */ 587 PHYMOD_SYMBOL_FIELD_ENCODE(649, 4, 3), 588 /* PAUSE_RESOLUTION_TXSIDE:5:5 */ 589 PHYMOD_SYMBOL_FIELD_ENCODE(392, 5, 5), 590 /* PAUSE_RESOLUTION_RXSIDE:6:6 */ 591 PHYMOD_SYMBOL_FIELD_ENCODE(391, 6, 6), 592 /* LINK_STATUS_CHANGE:7:7 */ 593 PHYMOD_SYMBOL_FIELD_ENCODE(316, 7, 7), 594 /* EARLY_END_EXTENSION_DETECTED:8:8 */ 595 PHYMOD_SYMBOL_FIELD_ENCODE(154, 8, 8), 596 /* CARRIER_EXTEND_ERR_DETECTED:9:9 */ 597 PHYMOD_SYMBOL_FIELD_ENCODE(47, 9, 9), 598 /* RX_ERR_DETECTED:10:10 */ 599 PHYMOD_SYMBOL_FIELD_ENCODE(566, 10, 10), 600 /* TX_ERR_DETECTED:11:11 */ 601 PHYMOD_SYMBOL_FIELD_ENCODE(718, 11, 11), 602 /* CRC_ERR_DETECTED:12:12 */ 603 PHYMOD_SYMBOL_FIELD_ENCODE(88, 12, 12), 604 /* FALSE_CARRIER_DETECTED:13:13 */ 605 PHYMOD_SYMBOL_FIELD_ENCODE(195, 13, 13), 606 /* RXFIFO_ERR_DETECTED:14:14 */ 607 PHYMOD_SYMBOL_FIELD_ENCODE(556, 14, 14), 608 /* TXFIFO_ERR_DETECTED:15:15 */ 609 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(703, 15, 15) 610 }; 611 static uint32_t BCMI_VIPER_XGXS_DIG_STS1000X2r_fields[] = 612 { 613 /* AN_ENABLE_STATE:0:0 */ 614 PHYMOD_SYMBOL_FIELD_ENCODE(9, 0, 0), 615 /* ABILITY_DETECT_STATE:2:2 */ 616 PHYMOD_SYMBOL_FIELD_ENCODE(0, 2, 2), 617 /* ACKNOWLEDGE_DETECT_STATE:3:3 */ 618 PHYMOD_SYMBOL_FIELD_ENCODE(4, 3, 3), 619 /* COMPLETE_ACKNOWLEDGE_STATE:4:4 */ 620 PHYMOD_SYMBOL_FIELD_ENCODE(81, 4, 4), 621 /* IDLE_DETECT_STATE:5:5 */ 622 PHYMOD_SYMBOL_FIELD_ENCODE(269, 5, 5), 623 /* LINKDOWN_SYNCLOSS:6:6 */ 624 PHYMOD_SYMBOL_FIELD_ENCODE(310, 6, 6), 625 /* RUDI_INVALID:7:7 */ 626 PHYMOD_SYMBOL_FIELD_ENCODE(538, 7, 7), 627 /* RUDI_I:8:8 */ 628 PHYMOD_SYMBOL_FIELD_ENCODE(537, 8, 8), 629 /* RUDI_C:9:9 */ 630 PHYMOD_SYMBOL_FIELD_ENCODE(536, 9, 9), 631 /* SYNC_STATUS_OK:10:10 */ 632 PHYMOD_SYMBOL_FIELD_ENCODE(660, 10, 10), 633 /* SYNC_STATUS_FAIL:11:11 */ 634 PHYMOD_SYMBOL_FIELD_ENCODE(656, 11, 11), 635 /* SGMII_SELECTOR_MISMATCH:12:12 */ 636 PHYMOD_SYMBOL_FIELD_ENCODE(617, 12, 12), 637 /* AUTONEG_RESOLUTION_ERR:13:13 */ 638 PHYMOD_SYMBOL_FIELD_ENCODE(16, 13, 13), 639 /* CONSISTENCY_MISMATCH:14:14 */ 640 PHYMOD_SYMBOL_FIELD_ENCODE(82, 14, 14), 641 /* SGMII_MODE_CHANGE:15:15 */ 642 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(616, 15, 15) 643 }; 644 static uint32_t BCMI_VIPER_XGXS_DIG_STS1000X3r_fields[] = 645 { 646 /* SD_FILTER_CHG:7:7 */ 647 PHYMOD_SYMBOL_FIELD_ENCODE(607, 7, 7), 648 /* SD_MUX:8:8 */ 649 PHYMOD_SYMBOL_FIELD_ENCODE(608, 8, 8), 650 /* SD_FILTER:9:9 */ 651 PHYMOD_SYMBOL_FIELD_ENCODE(606, 9, 9), 652 /* LATCH_LINKDOWN:10:10 */ 653 PHYMOD_SYMBOL_FIELD_ENCODE(304, 10, 10), 654 /* REMOTEPHY_AUTOSEL:11:11 */ 655 PHYMOD_SYMBOL_FIELD_ENCODE(485, 11, 11), 656 /* PD_PARK_AN:12:12 */ 657 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(402, 12, 12) 658 }; 659 static uint32_t BCMI_VIPER_XGXS_DIG_TESTMODEr_fields[] = 660 { 661 /* FIFO_ELASTICITY_RX:1:2 */ 662 PHYMOD_SYMBOL_FIELD_ENCODE(206, 2, 1), 663 /* CLEAR_PACKET_COUNTERS:14:14 */ 664 PHYMOD_SYMBOL_FIELD_ENCODE(65, 14, 14), 665 /* DISABLE_RESET_CNT:15:15 */ 666 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(116, 15, 15) 667 }; 668 static uint32_t BCMI_VIPER_XGXS_DIG_TPOUT1r_fields[] = 669 { 670 /* TPOUT1:0:15 */ 671 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(681, 15, 0) 672 }; 673 static uint32_t BCMI_VIPER_XGXS_DIG_TPOUT2r_fields[] = 674 { 675 /* TPOUT2:0:15 */ 676 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(682, 15, 0) 677 }; 678 static uint32_t BCMI_VIPER_XGXS_DIG_TXPKTCNTr_fields[] = 679 { 680 /* TXPKTCNT:0:15 */ 681 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(707, 15, 0) 682 }; 683 static uint32_t BCMI_VIPER_XGXS_EEECTLr_fields[] = 684 { 685 /* LPI_EN_TX:0:0 */ 686 PHYMOD_SYMBOL_FIELD_ENCODE(343, 0, 0), 687 /* LPI_EN_RX:1:1 */ 688 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(342, 1, 1) 689 }; 690 static uint32_t BCMI_VIPER_XGXS_FX100_CTL1r_fields[] = 691 { 692 /* ENABLE:0:0 */ 693 PHYMOD_SYMBOL_FIELD_ENCODE(170, 0, 0), 694 /* FULL_DUPLEX:1:1 */ 695 PHYMOD_SYMBOL_FIELD_ENCODE(240, 1, 1), 696 /* AUTO_DETECT_FX_MODE:2:2 */ 697 PHYMOD_SYMBOL_FIELD_ENCODE(17, 2, 2), 698 /* FAR_END_FAULT_EN:3:3 */ 699 PHYMOD_SYMBOL_FIELD_ENCODE(196, 3, 3), 700 /* FORCE_RX_QUAL:4:4 */ 701 PHYMOD_SYMBOL_FIELD_ENCODE(225, 4, 4), 702 /* DISABLE_RX_QUAL:5:5 */ 703 PHYMOD_SYMBOL_FIELD_ENCODE(118, 5, 5), 704 /* RXDATA_SEL:6:9 */ 705 PHYMOD_SYMBOL_FIELD_ENCODE(553, 9, 6), 706 /* DATA_SAMPLER_EN:15:15 */ 707 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(95, 15, 15) 708 }; 709 static uint32_t BCMI_VIPER_XGXS_FX100_CTL2r_fields[] = 710 { 711 /* EXTEND_PKT_SIZE:0:0 */ 712 PHYMOD_SYMBOL_FIELD_ENCODE(184, 0, 0), 713 /* BYPASS_RXFIFO:1:1 */ 714 PHYMOD_SYMBOL_FIELD_ENCODE(35, 1, 1), 715 /* RESET_RXFIFO:2:2 */ 716 PHYMOD_SYMBOL_FIELD_ENCODE(518, 2, 2), 717 /* MODE_CHG_NRST:3:3 */ 718 PHYMOD_SYMBOL_FIELD_ENCODE(374, 3, 3), 719 /* MII_RXC_OUT_SM_RST:4:4 */ 720 PHYMOD_SYMBOL_FIELD_ENCODE(360, 4, 4), 721 /* MII_RXC_OUT_SW_EN:5:5 */ 722 PHYMOD_SYMBOL_FIELD_ENCODE(361, 5, 5), 723 /* MII_RXC_OUT_SW_REF:6:6 */ 724 PHYMOD_SYMBOL_FIELD_ENCODE(362, 6, 6), 725 /* CLK_OUT_1000_SW_EN:7:7 */ 726 PHYMOD_SYMBOL_FIELD_ENCODE(69, 7, 7), 727 /* CLK_OUT_1000_SW_DEF:8:8 */ 728 PHYMOD_SYMBOL_FIELD_ENCODE(68, 8, 8), 729 /* PLL_CLK125_SW_EN:9:9 */ 730 PHYMOD_SYMBOL_FIELD_ENCODE(434, 9, 9), 731 /* PLL_CLK125_SW_REF:10:10 */ 732 PHYMOD_SYMBOL_FIELD_ENCODE(435, 10, 10), 733 /* PING_PONG_DISABLE:11:11 */ 734 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(423, 11, 11) 735 }; 736 static uint32_t BCMI_VIPER_XGXS_FX100_CTL3r_fields[] = 737 { 738 /* FAST_TIMERS:0:0 */ 739 PHYMOD_SYMBOL_FIELD_ENCODE(199, 0, 0), 740 /* FAST_UNLOCK_TIMER:1:1 */ 741 PHYMOD_SYMBOL_FIELD_ENCODE(200, 1, 1), 742 /* FORCE_LOCK:2:2 */ 743 PHYMOD_SYMBOL_FIELD_ENCODE(222, 2, 2), 744 /* FORCE_LINK:3:3 */ 745 PHYMOD_SYMBOL_FIELD_ENCODE(220, 3, 3), 746 /* BYPASS_ALIGNMENT:4:4 */ 747 PHYMOD_SYMBOL_FIELD_ENCODE(30, 4, 4), 748 /* BYPASS_ENCODER:5:5 */ 749 PHYMOD_SYMBOL_FIELD_ENCODE(31, 5, 5), 750 /* BYPASS_NRZ:6:6 */ 751 PHYMOD_SYMBOL_FIELD_ENCODE(32, 6, 6), 752 /* CORRELATOR_DISABLE:7:7 */ 753 PHYMOD_SYMBOL_FIELD_ENCODE(85, 7, 7), 754 /* NUMBER_OF_IDLE:8:15 */ 755 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(382, 15, 8) 756 }; 757 static uint32_t BCMI_VIPER_XGXS_FX100_IDLE1r_fields[] = 758 { 759 /* FX100_IDLE1:0:9 */ 760 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(241, 9, 0) 761 }; 762 static uint32_t BCMI_VIPER_XGXS_FX100_IDLE2r_fields[] = 763 { 764 /* FX100_IDLE2:0:9 */ 765 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(242, 9, 0) 766 }; 767 static uint32_t BCMI_VIPER_XGXS_FX100_IDLESTSr_fields[] = 768 { 769 /* FX100_IDLECORR_CNT:0:6 */ 770 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(243, 6, 0) 771 }; 772 static uint32_t BCMI_VIPER_XGXS_FX100_IDLETHRESr_fields[] = 773 { 774 /* FX100_IDLE_MAX_THRES:0:6 */ 775 PHYMOD_SYMBOL_FIELD_ENCODE(244, 6, 0), 776 /* FX100_IDLE_MIN_THRES:7:13 */ 777 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(245, 13, 7) 778 }; 779 static uint32_t BCMI_VIPER_XGXS_FX100_LNKTMRr_fields[] = 780 { 781 /* FX100_LINKDN_COUNT:0:7 */ 782 PHYMOD_SYMBOL_FIELD_ENCODE(246, 7, 0), 783 /* FX100_LINKUP_COUNT:8:15 */ 784 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(247, 15, 8) 785 }; 786 static uint32_t BCMI_VIPER_XGXS_FX100_LOCKTMRr_fields[] = 787 { 788 /* FX100_LOCK_MAXTIME:0:7 */ 789 PHYMOD_SYMBOL_FIELD_ENCODE(248, 7, 0), 790 /* FX100_UNLOCK_THRES:8:11 */ 791 PHYMOD_SYMBOL_FIELD_ENCODE(250, 11, 8), 792 /* FX100_LOCK_THRES:12:15 */ 793 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(249, 15, 12) 794 }; 795 static uint32_t BCMI_VIPER_XGXS_FX100_STS1r_fields[] = 796 { 797 /* LINK:0:0 */ 798 PHYMOD_SYMBOL_FIELD_ENCODE(308, 0, 0), 799 /* LOCKED:1:1 */ 800 PHYMOD_SYMBOL_FIELD_ENCODE(337, 1, 1), 801 /* FAULTING:2:2 */ 802 PHYMOD_SYMBOL_FIELD_ENCODE(201, 2, 2), 803 /* LOST_LOCK:3:3 */ 804 PHYMOD_SYMBOL_FIELD_ENCODE(341, 3, 3), 805 /* LOCK_TIMER_EXPIRED:4:4 */ 806 PHYMOD_SYMBOL_FIELD_ENCODE(340, 4, 4), 807 /* RX_ERR_DETECTED:5:5 */ 808 PHYMOD_SYMBOL_FIELD_ENCODE(566, 5, 5), 809 /* TX_ERR_DETECTED:6:6 */ 810 PHYMOD_SYMBOL_FIELD_ENCODE(718, 6, 6), 811 /* FALSE_CARRIER_DETECTED:7:7 */ 812 PHYMOD_SYMBOL_FIELD_ENCODE(195, 7, 7), 813 /* BAD_ESD_DETECTED:8:8 */ 814 PHYMOD_SYMBOL_FIELD_ENCODE(19, 8, 8), 815 /* LINK_STATUS_CHG:9:9 */ 816 PHYMOD_SYMBOL_FIELD_ENCODE(317, 9, 9), 817 /* FIBER_PWRDWN:10:10 */ 818 PHYMOD_SYMBOL_FIELD_ENCODE(203, 10, 10), 819 /* FIBER_PWRDWN_STATUS_CHG:11:11 */ 820 PHYMOD_SYMBOL_FIELD_ENCODE(204, 11, 11), 821 /* MODE_CHANGE:15:15 */ 822 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(373, 15, 15) 823 }; 824 static uint32_t BCMI_VIPER_XGXS_FX100_STS3r_fields[] = 825 { 826 /* IDLES_DETECTED:0:0 */ 827 PHYMOD_SYMBOL_FIELD_ENCODE(267, 0, 0), 828 /* IJ_DETECTED:1:1 */ 829 PHYMOD_SYMBOL_FIELD_ENCODE(273, 1, 1), 830 /* SSD_DETECTED:2:2 */ 831 PHYMOD_SYMBOL_FIELD_ENCODE(650, 2, 2), 832 /* ESD_DETECTED:3:3 */ 833 PHYMOD_SYMBOL_FIELD_ENCODE(181, 3, 3), 834 /* ERR_DETECTED:4:4 */ 835 PHYMOD_SYMBOL_FIELD_ENCODE(180, 4, 4), 836 /* CRS_IND_DETECTED:5:5 */ 837 PHYMOD_SYMBOL_FIELD_ENCODE(89, 5, 5), 838 /* IDLES_DETECTED_5B:6:6 */ 839 PHYMOD_SYMBOL_FIELD_ENCODE(268, 6, 6), 840 /* LINKMON_CNTR:8:15 */ 841 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(311, 15, 8) 842 }; 843 static uint32_t BCMI_VIPER_XGXS_FX100_STS4r_fields[] = 844 { 845 /* TX_SEJ:0:0 */ 846 PHYMOD_SYMBOL_FIELD_ENCODE(727, 0, 0), 847 /* TX_SSJ:1:1 */ 848 PHYMOD_SYMBOL_FIELD_ENCODE(729, 1, 1), 849 /* TX_SEK:2:2 */ 850 PHYMOD_SYMBOL_FIELD_ENCODE(728, 2, 2), 851 /* TX_SSK:3:3 */ 852 PHYMOD_SYMBOL_FIELD_ENCODE(730, 3, 3), 853 /* TX_TDATA:4:4 */ 854 PHYMOD_SYMBOL_FIELD_ENCODE(731, 4, 4), 855 /* TX_TERROR:5:5 */ 856 PHYMOD_SYMBOL_FIELD_ENCODE(732, 5, 5), 857 /* TX_EST:6:6 */ 858 PHYMOD_SYMBOL_FIELD_ENCODE(720, 6, 6), 859 /* TX_ESR:7:7 */ 860 PHYMOD_SYMBOL_FIELD_ENCODE(719, 7, 7), 861 /* FX_LINKFAIL:8:8 */ 862 PHYMOD_SYMBOL_FIELD_ENCODE(251, 8, 8), 863 /* RX_BADSSD:9:9 */ 864 PHYMOD_SYMBOL_FIELD_ENCODE(563, 9, 9), 865 /* RX_CONFIRMK:10:10 */ 866 PHYMOD_SYMBOL_FIELD_ENCODE(564, 10, 10), 867 /* RX_SSJ:11:11 */ 868 PHYMOD_SYMBOL_FIELD_ENCODE(592, 11, 11), 869 /* RX_SSK:12:12 */ 870 PHYMOD_SYMBOL_FIELD_ENCODE(593, 12, 12), 871 /* RX_DATA:13:13 */ 872 PHYMOD_SYMBOL_FIELD_ENCODE(565, 13, 13), 873 /* RX_BADEND:14:14 */ 874 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(562, 14, 14) 875 }; 876 static uint32_t BCMI_VIPER_XGXS_ID1r_fields[] = 877 { 878 /* REGID:0:15 */ 879 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(484, 15, 0) 880 }; 881 static uint32_t BCMI_VIPER_XGXS_ID2r_fields[] = 882 { 883 /* REGID:0:15 */ 884 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(484, 15, 0) 885 }; 886 static uint32_t BCMI_VIPER_XGXS_LANECTL0r_fields[] = 887 { 888 /* CL36_PCS_EN_TX:0:3 */ 889 PHYMOD_SYMBOL_FIELD_ENCODE(59, 3, 0), 890 /* CL36_PCS_EN_RX:4:7 */ 891 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(58, 7, 4) 892 }; 893 static uint32_t BCMI_VIPER_XGXS_LANECTL1r_fields[] = 894 { 895 /* TX1G_MODE_LN0:0:1 */ 896 PHYMOD_SYMBOL_FIELD_ENCODE(688, 1, 0), 897 /* TX1G_MODE_LN1:2:3 */ 898 PHYMOD_SYMBOL_FIELD_ENCODE(689, 3, 2), 899 /* TX1G_MODE_LN2:4:5 */ 900 PHYMOD_SYMBOL_FIELD_ENCODE(690, 5, 4), 901 /* TX1G_MODE_LN3:6:7 */ 902 PHYMOD_SYMBOL_FIELD_ENCODE(691, 7, 6), 903 /* RX1G_MODE_LN0:8:9 */ 904 PHYMOD_SYMBOL_FIELD_ENCODE(542, 9, 8), 905 /* RX1G_MODE_LN1:10:11 */ 906 PHYMOD_SYMBOL_FIELD_ENCODE(543, 11, 10), 907 /* RX1G_MODE_LN2:12:13 */ 908 PHYMOD_SYMBOL_FIELD_ENCODE(544, 13, 12), 909 /* RX1G_MODE_LN3:14:15 */ 910 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(545, 15, 14) 911 }; 912 static uint32_t BCMI_VIPER_XGXS_LANECTL2r_fields[] = 913 { 914 /* GLOOP1G:0:3 */ 915 PHYMOD_SYMBOL_FIELD_ENCODE(255, 3, 0), 916 /* RLOOP1G:4:7 */ 917 PHYMOD_SYMBOL_FIELD_ENCODE(527, 7, 4), 918 /* EDEN1G:8:11 */ 919 PHYMOD_SYMBOL_FIELD_ENCODE(158, 11, 8), 920 /* CDET_EN1G:12:15 */ 921 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(50, 15, 12) 922 }; 923 static uint32_t BCMI_VIPER_XGXS_LANECTL3r_fields[] = 924 { 925 /* PWRDN_RX:0:3 */ 926 PHYMOD_SYMBOL_FIELD_ENCODE(464, 3, 0), 927 /* PWRDN_TX:4:7 */ 928 PHYMOD_SYMBOL_FIELD_ENCODE(466, 7, 4), 929 /* PWRDWN_PLL:8:8 */ 930 PHYMOD_SYMBOL_FIELD_ENCODE(469, 8, 8), 931 /* RESERVED_9:9:9 */ 932 PHYMOD_SYMBOL_FIELD_ENCODE(512, 9, 9), 933 /* LOCK_REF_EN:10:10 */ 934 PHYMOD_SYMBOL_FIELD_ENCODE(339, 10, 10), 935 /* PWRDWN_FORCE:11:11 */ 936 PHYMOD_SYMBOL_FIELD_ENCODE(468, 11, 11), 937 /* LOCK_REF:12:15 */ 938 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(338, 15, 12) 939 }; 940 static uint32_t BCMI_VIPER_XGXS_LANEPRBSr_fields[] = 941 { 942 /* PRBS_ORDER0:0:1 */ 943 PHYMOD_SYMBOL_FIELD_ENCODE(456, 1, 0), 944 /* PRBS_INV0:2:2 */ 945 PHYMOD_SYMBOL_FIELD_ENCODE(452, 2, 2), 946 /* PRBS_EN0:3:3 */ 947 PHYMOD_SYMBOL_FIELD_ENCODE(448, 3, 3), 948 /* PRBS_ORDER1:4:5 */ 949 PHYMOD_SYMBOL_FIELD_ENCODE(457, 5, 4), 950 /* PRBS_INV1:6:6 */ 951 PHYMOD_SYMBOL_FIELD_ENCODE(453, 6, 6), 952 /* PRBS_EN1:7:7 */ 953 PHYMOD_SYMBOL_FIELD_ENCODE(449, 7, 7), 954 /* PRBS_ORDER2:8:9 */ 955 PHYMOD_SYMBOL_FIELD_ENCODE(458, 9, 8), 956 /* PRBS_INV2:10:10 */ 957 PHYMOD_SYMBOL_FIELD_ENCODE(454, 10, 10), 958 /* PRBS_EN2:11:11 */ 959 PHYMOD_SYMBOL_FIELD_ENCODE(450, 11, 11), 960 /* PRBS_ORDER3:12:13 */ 961 PHYMOD_SYMBOL_FIELD_ENCODE(459, 13, 12), 962 /* PRBS_INV3:14:14 */ 963 PHYMOD_SYMBOL_FIELD_ENCODE(455, 14, 14), 964 /* PRBS_EN3:15:15 */ 965 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(451, 15, 15) 966 }; 967 static uint32_t BCMI_VIPER_XGXS_LANERESETr_fields[] = 968 { 969 /* RESET_RX:0:3 */ 970 PHYMOD_SYMBOL_FIELD_ENCODE(517, 3, 0), 971 /* RESET_TX:4:7 */ 972 PHYMOD_SYMBOL_FIELD_ENCODE(519, 7, 4), 973 /* RESET_PLL:8:8 */ 974 PHYMOD_SYMBOL_FIELD_ENCODE(516, 8, 8), 975 /* RESET_MDIO:15:15 */ 976 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(515, 15, 15) 977 }; 978 static uint32_t BCMI_VIPER_XGXS_LANETESTr_fields[] = 979 { 980 /* LFCK_BYPASS:5:5 */ 981 PHYMOD_SYMBOL_FIELD_ENCODE(307, 5, 5), 982 /* PLL_LOCK_RSTB_R:6:6 */ 983 PHYMOD_SYMBOL_FIELD_ENCODE(436, 6, 6), 984 /* RXSEQSTART_EXT_DIS:7:7 */ 985 PHYMOD_SYMBOL_FIELD_ENCODE(560, 7, 7), 986 /* PWRDWN_CLKS_EN:8:8 */ 987 PHYMOD_SYMBOL_FIELD_ENCODE(467, 8, 8), 988 /* PWRDN_SAFE_DIS:9:9 */ 989 PHYMOD_SYMBOL_FIELD_ENCODE(465, 9, 9), 990 /* PWRDN_EXT_DIS:10:10 */ 991 PHYMOD_SYMBOL_FIELD_ENCODE(463, 10, 10), 992 /* TMUX_SEL:12:15 */ 993 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(678, 15, 12) 994 }; 995 static uint32_t BCMI_VIPER_XGXS_MIICTLr_fields[] = 996 { 997 /* MANUAL_SPEED1:6:6 */ 998 PHYMOD_SYMBOL_FIELD_ENCODE(349, 6, 6), 999 /* COLLISION_TEST_EN:7:7 */ 1000 PHYMOD_SYMBOL_FIELD_ENCODE(72, 7, 7), 1001 /* FULL_DUPLEX:8:8 */ 1002 PHYMOD_SYMBOL_FIELD_ENCODE(240, 8, 8), 1003 /* RESTART_AUTONEG:9:9 */ 1004 PHYMOD_SYMBOL_FIELD_ENCODE(520, 9, 9), 1005 /* PWRDWN_SW:11:11 */ 1006 PHYMOD_SYMBOL_FIELD_ENCODE(470, 11, 11), 1007 /* AUTONEG_ENABLE:12:12 */ 1008 PHYMOD_SYMBOL_FIELD_ENCODE(14, 12, 12), 1009 /* MANUAL_SPEED0:13:13 */ 1010 PHYMOD_SYMBOL_FIELD_ENCODE(348, 13, 13), 1011 /* GLOOPBACK:14:14 */ 1012 PHYMOD_SYMBOL_FIELD_ENCODE(256, 14, 14), 1013 /* RST_HW:15:15 */ 1014 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(532, 15, 15) 1015 }; 1016 static uint32_t BCMI_VIPER_XGXS_MIIEXTSTATr_fields[] = 1017 { 1018 /* S1000BASE_T_HALF_DUPLEX_CAPABLE:12:12 */ 1019 PHYMOD_SYMBOL_FIELD_ENCODE(595, 12, 12), 1020 /* S1000BASE_T_FULL_DUPLEX_CAPABLE:13:13 */ 1021 PHYMOD_SYMBOL_FIELD_ENCODE(594, 13, 13), 1022 /* S1000BASE_X_HALF_DUPLEX_CAPABLE:14:14 */ 1023 PHYMOD_SYMBOL_FIELD_ENCODE(597, 14, 14), 1024 /* S1000BASE_X_FULL_DUPLEX_CAPABLE:15:15 */ 1025 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(596, 15, 15) 1026 }; 1027 static uint32_t BCMI_VIPER_XGXS_MIISTATr_fields[] = 1028 { 1029 /* EXTENDED_CAPABILITY:0:0 */ 1030 PHYMOD_SYMBOL_FIELD_ENCODE(182, 0, 0), 1031 /* JABBER_DETECT:1:1 */ 1032 PHYMOD_SYMBOL_FIELD_ENCODE(301, 1, 1), 1033 /* LINK_STATUS:2:2 */ 1034 PHYMOD_SYMBOL_FIELD_ENCODE(315, 2, 2), 1035 /* AUTONEG_ABILITY:3:3 */ 1036 PHYMOD_SYMBOL_FIELD_ENCODE(12, 3, 3), 1037 /* REMOTE_FAULT:4:4 */ 1038 PHYMOD_SYMBOL_FIELD_ENCODE(486, 4, 4), 1039 /* AUTONEG_COMPLETE:5:5 */ 1040 PHYMOD_SYMBOL_FIELD_ENCODE(13, 5, 5), 1041 /* MF_PREAMBLE_SUPRESSION:6:6 */ 1042 PHYMOD_SYMBOL_FIELD_ENCODE(357, 6, 6), 1043 /* EXTENDED_STATUS:8:8 */ 1044 PHYMOD_SYMBOL_FIELD_ENCODE(183, 8, 8), 1045 /* S100BASE_T2_HALF_DUPLEX_CAPABLE:9:9 */ 1046 PHYMOD_SYMBOL_FIELD_ENCODE(599, 9, 9), 1047 /* S100BASE_T2_FULL_DUPLEX_CAPABLE:10:10 */ 1048 PHYMOD_SYMBOL_FIELD_ENCODE(598, 10, 10), 1049 /* S10BASE_T_HALF_DUPLEX_CAPABLE:11:11 */ 1050 PHYMOD_SYMBOL_FIELD_ENCODE(604, 11, 11), 1051 /* S10BASE_T_FULL_DUPLEX_CAPABLE:12:12 */ 1052 PHYMOD_SYMBOL_FIELD_ENCODE(603, 12, 12), 1053 /* S100BASE_X_HALF_DUPLEX_CAPABLE:13:13 */ 1054 PHYMOD_SYMBOL_FIELD_ENCODE(602, 13, 13), 1055 /* S100BASE_X_FULL_DUPLEX_CAPABLE:14:14 */ 1056 PHYMOD_SYMBOL_FIELD_ENCODE(601, 14, 14), 1057 /* S100BASE_T4_CAPABLE:15:15 */ 1058 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(600, 15, 15) 1059 }; 1060 static uint32_t BCMI_VIPER_XGXS_MMDSELr_fields[] = 1061 { 1062 /* DEVCL22_EN:0:0 */ 1063 PHYMOD_SYMBOL_FIELD_ENCODE(102, 0, 0), 1064 /* DEVDEVAD_EN:1:1 */ 1065 PHYMOD_SYMBOL_FIELD_ENCODE(103, 1, 1), 1066 /* DEVPMD_EN:2:2 */ 1067 PHYMOD_SYMBOL_FIELD_ENCODE(104, 2, 2), 1068 /* DEVAN_EN:3:3 */ 1069 PHYMOD_SYMBOL_FIELD_ENCODE(101, 3, 3), 1070 /* MULTIMMDS_EN:14:14 */ 1071 PHYMOD_SYMBOL_FIELD_ENCODE(376, 14, 14), 1072 /* MULTIPRTS_EN:15:15 */ 1073 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(378, 15, 15) 1074 }; 1075 static uint32_t BCMI_VIPER_XGXS_PLL2_CTL1r_fields[] = 1076 { 1077 /* EXT_RANGE:0:6 */ 1078 PHYMOD_SYMBOL_FIELD_ENCODE(186, 6, 0), 1079 /* CAL_TH:7:10 */ 1080 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(45, 10, 7) 1081 }; 1082 static uint32_t BCMI_VIPER_XGXS_PLL2_CTL2r_fields[] = 1083 { 1084 /* RANGE_OVRD_VAL:0:6 */ 1085 PHYMOD_SYMBOL_FIELD_ENCODE(475, 6, 0), 1086 /* RANGE_OVRD:7:7 */ 1087 PHYMOD_SYMBOL_FIELD_ENCODE(474, 7, 7), 1088 /* RANGE_DFS:8:14 */ 1089 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(473, 14, 8) 1090 }; 1091 static uint32_t BCMI_VIPER_XGXS_PLL2_CTL3r_fields[] = 1092 { 1093 /* CALIB_CAP_CHARGE_TIME:0:15 */ 1094 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(38, 15, 0) 1095 }; 1096 static uint32_t BCMI_VIPER_XGXS_PLL2_CTL4r_fields[] = 1097 { 1098 /* CALIB_DELAY_TIME:0:15 */ 1099 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(39, 15, 0) 1100 }; 1101 static uint32_t BCMI_VIPER_XGXS_PLL2_CTL5r_fields[] = 1102 { 1103 /* CALIB_STEP_TIME:0:15 */ 1104 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(40, 15, 0) 1105 }; 1106 static uint32_t BCMI_VIPER_XGXS_PLL2_CTL6r_fields[] = 1107 { 1108 /* DFE0_VCOCAL_VALID_OVRD_VAL:0:0 */ 1109 PHYMOD_SYMBOL_FIELD_ENCODE(109, 0, 0), 1110 /* DFE0_VCOCAL_VALID_OVRD:1:1 */ 1111 PHYMOD_SYMBOL_FIELD_ENCODE(108, 1, 1), 1112 /* DFE0_CALIB_SEARCH_BIT:2:4 */ 1113 PHYMOD_SYMBOL_FIELD_ENCODE(105, 4, 2), 1114 /* DFE0_HALFSTEP_EN:5:5 */ 1115 PHYMOD_SYMBOL_FIELD_ENCODE(107, 5, 5), 1116 /* DFE0_EN_CALIB_N:6:6 */ 1117 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(106, 6, 6) 1118 }; 1119 static uint32_t BCMI_VIPER_XGXS_PLL2_STAT0r_fields[] = 1120 { 1121 /* CAL_ERROR:0:0 */ 1122 PHYMOD_SYMBOL_FIELD_ENCODE(41, 0, 0), 1123 /* CAL_VALID:1:1 */ 1124 PHYMOD_SYMBOL_FIELD_ENCODE(46, 1, 1), 1125 /* CAL_STATE:2:5 */ 1126 PHYMOD_SYMBOL_FIELD_ENCODE(42, 5, 2), 1127 /* VCO_RANGE:6:12 */ 1128 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(738, 12, 6) 1129 }; 1130 static uint32_t BCMI_VIPER_XGXS_PLL_AFE_CTL0r_fields[] = 1131 { 1132 /* CM_SEL:0:0 */ 1133 PHYMOD_SYMBOL_FIELD_ENCODE(71, 0, 0), 1134 /* HIPASS:1:1 */ 1135 PHYMOD_SYMBOL_FIELD_ENCODE(264, 1, 1), 1136 /* CURR_SEL:2:5 */ 1137 PHYMOD_SYMBOL_FIELD_ENCODE(91, 5, 2), 1138 /* RPAR:6:9 */ 1139 PHYMOD_SYMBOL_FIELD_ENCODE(531, 9, 6), 1140 /* CPAR:10:11 */ 1141 PHYMOD_SYMBOL_FIELD_ENCODE(86, 11, 10), 1142 /* XTAL_BIAS:12:14 */ 1143 PHYMOD_SYMBOL_FIELD_ENCODE(744, 14, 12), 1144 /* EN_TEST_INTEGER_CLK:15:15 */ 1145 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(179, 15, 15) 1146 }; 1147 static uint32_t BCMI_VIPER_XGXS_PLL_AFE_CTL1r_fields[] = 1148 { 1149 /* EN_TEST_FRAC_CLK:0:0 */ 1150 PHYMOD_SYMBOL_FIELD_ENCODE(178, 0, 0), 1151 /* LV_EN:1:1 */ 1152 PHYMOD_SYMBOL_FIELD_ENCODE(344, 1, 1), 1153 /* XTAL_CORE_BIAS:2:5 */ 1154 PHYMOD_SYMBOL_FIELD_ENCODE(745, 5, 2), 1155 /* PLL_PON:6:9 */ 1156 PHYMOD_SYMBOL_FIELD_ENCODE(438, 9, 6), 1157 /* LEAKAGE_TEST:10:11 */ 1158 PHYMOD_SYMBOL_FIELD_ENCODE(306, 11, 10), 1159 /* RESERVED_31_28:12:15 */ 1160 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(497, 15, 12) 1161 }; 1162 static uint32_t BCMI_VIPER_XGXS_PLL_AFE_CTL2r_fields[] = 1163 { 1164 /* RESERVED_33_32:0:1 */ 1165 PHYMOD_SYMBOL_FIELD_ENCODE(499, 1, 0), 1166 /* TEST_VC:2:2 */ 1167 PHYMOD_SYMBOL_FIELD_ENCODE(675, 2, 2), 1168 /* EN10T:3:3 */ 1169 PHYMOD_SYMBOL_FIELD_ENCODE(169, 3, 3), 1170 /* INTN_FB_EN:4:4 */ 1171 PHYMOD_SYMBOL_FIELD_ENCODE(285, 4, 4), 1172 /* TEST_AMP:5:8 */ 1173 PHYMOD_SYMBOL_FIELD_ENCODE(669, 8, 5), 1174 /* RESERVED_41:9:9 */ 1175 PHYMOD_SYMBOL_FIELD_ENCODE(501, 9, 9), 1176 /* TEST_PLL_MODE:10:10 */ 1177 PHYMOD_SYMBOL_FIELD_ENCODE(673, 10, 10), 1178 /* VCO_ICTR:11:13 */ 1179 PHYMOD_SYMBOL_FIELD_ENCODE(737, 13, 11), 1180 /* I_PLL_FRAC_MODE:14:15 */ 1181 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(299, 15, 14) 1182 }; 1183 static uint32_t BCMI_VIPER_XGXS_PLL_AFE_CTL3r_fields[] = 1184 { 1185 /* TCEST_NEG:0:2 */ 1186 PHYMOD_SYMBOL_FIELD_ENCODE(663, 2, 0), 1187 /* TESTCLK_EN:3:3 */ 1188 PHYMOD_SYMBOL_FIELD_ENCODE(666, 3, 3), 1189 /* TEST_SEL:4:6 */ 1190 PHYMOD_SYMBOL_FIELD_ENCODE(674, 6, 4), 1191 /* MMD_EN:7:7 */ 1192 PHYMOD_SYMBOL_FIELD_ENCODE(366, 7, 7), 1193 /* INT_DIV_EN:8:8 */ 1194 PHYMOD_SYMBOL_FIELD_ENCODE(286, 8, 8), 1195 /* REFCLK_IN_BIAS:9:14 */ 1196 PHYMOD_SYMBOL_FIELD_ENCODE(481, 14, 9), 1197 /* PLL_MODE:15:15 */ 1198 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(437, 15, 15) 1199 }; 1200 static uint32_t BCMI_VIPER_XGXS_PLL_AFE_CTL4r_fields[] = 1201 { 1202 /* DIV:0:3 */ 1203 PHYMOD_SYMBOL_FIELD_ENCODE(122, 3, 0), 1204 /* EN_CAP:4:6 */ 1205 PHYMOD_SYMBOL_FIELD_ENCODE(174, 6, 4), 1206 /* RESERVED_74_71:7:10 */ 1207 PHYMOD_SYMBOL_FIELD_ENCODE(510, 10, 7), 1208 /* MMD_RESETB:11:11 */ 1209 PHYMOD_SYMBOL_FIELD_ENCODE(370, 11, 11), 1210 /* ADJ:12:14 */ 1211 PHYMOD_SYMBOL_FIELD_ENCODE(6, 14, 12), 1212 /* MMD_PRSC8OR9PWDB:15:15 */ 1213 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(369, 15, 15) 1214 }; 1215 static uint32_t BCMI_VIPER_XGXS_PLL_AFE_CTL5r_fields[] = 1216 { 1217 /* MMD_PRSC4OR5PWDB:0:0 */ 1218 PHYMOD_SYMBOL_FIELD_ENCODE(368, 0, 0), 1219 /* CALIB_ADJ:1:3 */ 1220 PHYMOD_SYMBOL_FIELD_ENCODE(37, 3, 1), 1221 /* RESERVED_84:4:4 */ 1222 PHYMOD_SYMBOL_FIELD_ENCODE(511, 4, 4), 1223 /* EN_CUR:5:7 */ 1224 PHYMOD_SYMBOL_FIELD_ENCODE(176, 7, 5), 1225 /* I_PFD_OFFSET_ENLARGE:8:8 */ 1226 PHYMOD_SYMBOL_FIELD_ENCODE(298, 8, 8), 1227 /* REF_DOUBLER_EN:9:9 */ 1228 PHYMOD_SYMBOL_FIELD_ENCODE(483, 9, 9), 1229 /* I_PFD_OFFSET:10:11 */ 1230 PHYMOD_SYMBOL_FIELD_ENCODE(297, 11, 10), 1231 /* I_NDIV_FRAC_3_0:12:15 */ 1232 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(294, 15, 12) 1233 }; 1234 static uint32_t BCMI_VIPER_XGXS_PLL_AFE_CTL6r_fields[] = 1235 { 1236 /* I_NDIV_FRAC_17_4:0:13 */ 1237 PHYMOD_SYMBOL_FIELD_ENCODE(293, 13, 0), 1238 /* I_NDIV_INT_1_0:14:15 */ 1239 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(295, 15, 14) 1240 }; 1241 static uint32_t BCMI_VIPER_XGXS_PLL_AFE_CTL7r_fields[] = 1242 { 1243 /* I_NDIV_INT_9_2:0:7 */ 1244 PHYMOD_SYMBOL_FIELD_ENCODE(296, 7, 0), 1245 /* MMD_DIV_RANGE:8:8 */ 1246 PHYMOD_SYMBOL_FIELD_ENCODE(365, 8, 8), 1247 /* I_NDIV_DITHER_EN:9:9 */ 1248 PHYMOD_SYMBOL_FIELD_ENCODE(292, 9, 9), 1249 /* INV_VCO_CAL:10:10 */ 1250 PHYMOD_SYMBOL_FIELD_ENCODE(290, 10, 10), 1251 /* I_PLL_SDM_PWRDNB:11:11 */ 1252 PHYMOD_SYMBOL_FIELD_ENCODE(300, 11, 11), 1253 /* SEL_FP3CAP:12:15 */ 1254 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(610, 15, 12) 1255 }; 1256 static uint32_t BCMI_VIPER_XGXS_PLL_AFE_CTL8r_fields[] = 1257 { 1258 /* VDD1P0_PLL_EN:0:0 */ 1259 PHYMOD_SYMBOL_FIELD_ENCODE(740, 0, 0), 1260 /* RESERVED_143_129:1:15 */ 1261 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(491, 15, 1) 1262 }; 1263 static uint32_t BCMI_VIPER_XGXS_PLL_AFE_TCATMR1r_fields[] = 1264 { 1265 /* TCA_FINE_TIMER:0:13 */ 1266 PHYMOD_SYMBOL_FIELD_ENCODE(662, 13, 0), 1267 /* INTERP_OVERRIDE:14:14 */ 1268 PHYMOD_SYMBOL_FIELD_ENCODE(284, 14, 14), 1269 /* XGXS_SEL:15:15 */ 1270 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(743, 15, 15) 1271 }; 1272 static uint32_t BCMI_VIPER_XGXS_PRBS_DECOUPLEr_fields[] = 1273 { 1274 /* TX_DATAI_PRBS_SEL_0:4:4 */ 1275 PHYMOD_SYMBOL_FIELD_ENCODE(712, 4, 4), 1276 /* TX_DATAI_PRBS_SEL_1:5:5 */ 1277 PHYMOD_SYMBOL_FIELD_ENCODE(713, 5, 5), 1278 /* TX_DATAI_PRBS_SEL_2:6:6 */ 1279 PHYMOD_SYMBOL_FIELD_ENCODE(714, 6, 6), 1280 /* TX_DATAI_PRBS_SEL_3:7:7 */ 1281 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(715, 7, 7) 1282 }; 1283 static uint32_t BCMI_VIPER_XGXS_RX2_CDR0r_fields[] = 1284 { 1285 /* PI_PHASE_INVERT:0:0 */ 1286 PHYMOD_SYMBOL_FIELD_ENCODE(429, 0, 0), 1287 /* MDIO_EM_PWRDN:1:1 */ 1288 PHYMOD_SYMBOL_FIELD_ENCODE(353, 1, 1), 1289 /* MDIO_EM_ERR_CNT_FRZ:2:2 */ 1290 PHYMOD_SYMBOL_FIELD_ENCODE(352, 2, 2), 1291 /* MDIO_EM_ERR_CNT_CLR:3:3 */ 1292 PHYMOD_SYMBOL_FIELD_ENCODE(351, 3, 3), 1293 /* PI_PHASE_ROTATE_OVERRIDE:4:4 */ 1294 PHYMOD_SYMBOL_FIELD_ENCODE(430, 4, 4), 1295 /* PI_CLK90_OFFSET_OVERRIDE:5:5 */ 1296 PHYMOD_SYMBOL_FIELD_ENCODE(425, 5, 5), 1297 /* RX_INTERP_STATUS_SEL:6:8 */ 1298 PHYMOD_SYMBOL_FIELD_ENCODE(568, 8, 6), 1299 /* RX_INTERP_CTRL_CAP:9:9 */ 1300 PHYMOD_SYMBOL_FIELD_ENCODE(567, 9, 9), 1301 /* EM_PHASE_SHIFT_360_OVRD:10:10 */ 1302 PHYMOD_SYMBOL_FIELD_ENCODE(167, 10, 10), 1303 /* EM_PHASE_SHIFT_360_OVRD_VAL:11:11 */ 1304 PHYMOD_SYMBOL_FIELD_ENCODE(168, 11, 11), 1305 /* SIGDETTIME_SM:12:15 */ 1306 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(621, 15, 12) 1307 }; 1308 static uint32_t BCMI_VIPER_XGXS_RX2_CDR1r_fields[] = 1309 { 1310 /* PHASE_SAT_CTRL:0:1 */ 1311 PHYMOD_SYMBOL_FIELD_ENCODE(411, 1, 0), 1312 /* PHS_COUNTER_CLR:2:2 */ 1313 PHYMOD_SYMBOL_FIELD_ENCODE(422, 2, 2), 1314 /* PHASE_DELTA:3:3 */ 1315 PHYMOD_SYMBOL_FIELD_ENCODE(405, 3, 3), 1316 /* FREQ_UPD_EN:4:4 */ 1317 PHYMOD_SYMBOL_FIELD_ENCODE(239, 4, 4), 1318 /* FALLING_EDGE:5:5 */ 1319 PHYMOD_SYMBOL_FIELD_ENCODE(194, 5, 5), 1320 /* RISING_EDGE:6:6 */ 1321 PHYMOD_SYMBOL_FIELD_ENCODE(524, 6, 6), 1322 /* FLIP_PEAK_POLARITY:7:7 */ 1323 PHYMOD_SYMBOL_FIELD_ENCODE(213, 7, 7), 1324 /* FLIP_ZERO_POLARITY:8:8 */ 1325 PHYMOD_SYMBOL_FIELD_ENCODE(214, 8, 8), 1326 /* STEP_ONE:9:10 */ 1327 PHYMOD_SYMBOL_FIELD_ENCODE(654, 10, 9), 1328 /* STEP_TWO:11:12 */ 1329 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(655, 12, 11) 1330 }; 1331 static uint32_t BCMI_VIPER_XGXS_RX2_CDR2r_fields[] = 1332 { 1333 /* PHSACQ_TIMEOUT:0:7 */ 1334 PHYMOD_SYMBOL_FIELD_ENCODE(421, 7, 0), 1335 /* PHSACQ_STEP:8:8 */ 1336 PHYMOD_SYMBOL_FIELD_ENCODE(420, 8, 8), 1337 /* PHSACQ_FREQ_SEL:9:9 */ 1338 PHYMOD_SYMBOL_FIELD_ENCODE(419, 9, 9), 1339 /* PHSACQ_DIR:11:11 */ 1340 PHYMOD_SYMBOL_FIELD_ENCODE(417, 11, 11), 1341 /* RATE_SELECT:12:12 */ 1342 PHYMOD_SYMBOL_FIELD_ENCODE(476, 12, 12), 1343 /* PHSACQ_ENABLE:13:13 */ 1344 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(418, 13, 13) 1345 }; 1346 static uint32_t BCMI_VIPER_XGXS_RX2_CDR3r_fields[] = 1347 { 1348 /* PHASE_DELTA_SM:0:4 */ 1349 PHYMOD_SYMBOL_FIELD_ENCODE(406, 4, 0), 1350 /* PHASE_STROBE_SM:5:5 */ 1351 PHYMOD_SYMBOL_FIELD_ENCODE(414, 5, 5), 1352 /* PHASE_DEC_SM:6:6 */ 1353 PHYMOD_SYMBOL_FIELD_ENCODE(404, 6, 6), 1354 /* PHASE_INC_SM:7:7 */ 1355 PHYMOD_SYMBOL_FIELD_ENCODE(409, 7, 7), 1356 /* PHASE_OVERRIDE_SM:8:8 */ 1357 PHYMOD_SYMBOL_FIELD_ENCODE(410, 8, 8), 1358 /* PHASE_FRZ_1_EN:9:9 */ 1359 PHYMOD_SYMBOL_FIELD_ENCODE(408, 9, 9), 1360 /* PHASE_FRZ_1:10:10 */ 1361 PHYMOD_SYMBOL_FIELD_ENCODE(407, 10, 10), 1362 /* PHASE_STEP:11:12 */ 1363 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(413, 12, 11) 1364 }; 1365 static uint32_t BCMI_VIPER_XGXS_RX2_CDR4r_fields[] = 1366 { 1367 /* FREQ_OVERRIDE_VAL:0:4 */ 1368 PHYMOD_SYMBOL_FIELD_ENCODE(234, 4, 0), 1369 /* FREQ_OVERRIDE_EN:5:5 */ 1370 PHYMOD_SYMBOL_FIELD_ENCODE(233, 5, 5), 1371 /* FREQ_EN:6:6 */ 1372 PHYMOD_SYMBOL_FIELD_ENCODE(232, 6, 6), 1373 /* INTEG_CLR:7:7 */ 1374 PHYMOD_SYMBOL_FIELD_ENCODE(280, 7, 7), 1375 /* BWSEL_PROP:8:11 */ 1376 PHYMOD_SYMBOL_FIELD_ENCODE(29, 11, 8), 1377 /* BWSEL_INTEG:12:15 */ 1378 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(28, 15, 12) 1379 }; 1380 static uint32_t BCMI_VIPER_XGXS_RX2_SEQ0r_fields[] = 1381 { 1382 /* CDRLOCKTIMEACQ_S1_SM:0:7 */ 1383 PHYMOD_SYMBOL_FIELD_ENCODE(51, 7, 0), 1384 /* CDRLOCKTIMETRCKNRML_SM:8:15 */ 1385 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(54, 15, 8) 1386 }; 1387 static uint32_t BCMI_VIPER_XGXS_RX2_SEQ1r_fields[] = 1388 { 1389 /* CDRLOCKTIMEACQ_S3_SM:0:7 */ 1390 PHYMOD_SYMBOL_FIELD_ENCODE(53, 7, 0), 1391 /* CDRLOCKTIMEACQ_S2_SM:8:15 */ 1392 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(52, 15, 8) 1393 }; 1394 static uint32_t BCMI_VIPER_XGXS_RX2_STS0r_fields[] = 1395 { 1396 /* RX_SLOFF2_INVALID:0:0 */ 1397 PHYMOD_SYMBOL_FIELD_ENCODE(589, 0, 0), 1398 /* RX_SLOFF1_INVALID:1:1 */ 1399 PHYMOD_SYMBOL_FIELD_ENCODE(586, 1, 1), 1400 /* RX_SLOFF0_INVALID:2:2 */ 1401 PHYMOD_SYMBOL_FIELD_ENCODE(583, 2, 2), 1402 /* RX_SLICER_CAL_DONE:3:3 */ 1403 PHYMOD_SYMBOL_FIELD_ENCODE(582, 3, 3), 1404 /* RX_LMTOFF:4:9 */ 1405 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(570, 9, 4) 1406 }; 1407 static uint32_t BCMI_VIPER_XGXS_RX2_STS1r_fields[] = 1408 { 1409 /* SLCAL_STATE:0:2 */ 1410 PHYMOD_SYMBOL_FIELD_ENCODE(637, 2, 0), 1411 /* SLOFFX_VAL:3:6 */ 1412 PHYMOD_SYMBOL_FIELD_ENCODE(644, 6, 3), 1413 /* DN_SLOFFX_VAL:7:10 */ 1414 PHYMOD_SYMBOL_FIELD_ENCODE(126, 10, 7), 1415 /* UP_SLOFFX_VAL:11:14 */ 1416 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(736, 14, 11) 1417 }; 1418 static uint32_t BCMI_VIPER_XGXS_RX2_STS2r_fields[] = 1419 { 1420 /* LMTCAL_ACC:0:15 */ 1421 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(318, 15, 0) 1422 }; 1423 static uint32_t BCMI_VIPER_XGXS_RX2_STS3r_fields[] = 1424 { 1425 /* RECAL_IND:0:0 */ 1426 PHYMOD_SYMBOL_FIELD_ENCODE(477, 0, 0), 1427 /* LMTCAL_ADJ_CNT:1:5 */ 1428 PHYMOD_SYMBOL_FIELD_ENCODE(320, 5, 1), 1429 /* LMTCAL_VALID:6:6 */ 1430 PHYMOD_SYMBOL_FIELD_ENCODE(336, 6, 6), 1431 /* RX_LA_CAL_DONE:7:7 */ 1432 PHYMOD_SYMBOL_FIELD_ENCODE(569, 7, 7), 1433 /* LMTCAL_STATE:8:10 */ 1434 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(335, 10, 8) 1435 }; 1436 static uint32_t BCMI_VIPER_XGXS_RX2_STS4r_fields[] = 1437 { 1438 /* EM_ERR_CNT_H:0:15 */ 1439 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(165, 15, 0) 1440 }; 1441 static uint32_t BCMI_VIPER_XGXS_RX2_STS5r_fields[] = 1442 { 1443 /* EM_ERR_CNT_L:0:15 */ 1444 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(166, 15, 0) 1445 }; 1446 static uint32_t BCMI_VIPER_XGXS_RX2_STS6r_fields[] = 1447 { 1448 /* RX_PHS_INTERP_STATUS:0:15 */ 1449 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(574, 15, 0) 1450 }; 1451 static uint32_t BCMI_VIPER_XGXS_RX3_CTL0r_fields[] = 1452 { 1453 /* LMTCAL_INTV_TIME:0:10 */ 1454 PHYMOD_SYMBOL_FIELD_ENCODE(330, 10, 0), 1455 /* LMTCAL_MAX_ADJ:11:15 */ 1456 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(332, 15, 11) 1457 }; 1458 static uint32_t BCMI_VIPER_XGXS_RX3_CTL1r_fields[] = 1459 { 1460 /* LMTCAL_INIT_TIME:0:10 */ 1461 PHYMOD_SYMBOL_FIELD_ENCODE(328, 10, 0), 1462 /* LMTCAL_ADJ_DIR:11:11 */ 1463 PHYMOD_SYMBOL_FIELD_ENCODE(321, 11, 11), 1464 /* LMTCAL_KP:12:13 */ 1465 PHYMOD_SYMBOL_FIELD_ENCODE(331, 13, 12), 1466 /* LMTCAL_RISING_EDGE_EN:14:14 */ 1467 PHYMOD_SYMBOL_FIELD_ENCODE(334, 14, 14), 1468 /* LMTCAL_FALLING_EDGE_EN:15:15 */ 1469 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(327, 15, 15) 1470 }; 1471 static uint32_t BCMI_VIPER_XGXS_RX3_CTL10r_fields[] = 1472 { 1473 /* SLCAL_DN_THRES:0:10 */ 1474 PHYMOD_SYMBOL_FIELD_ENCODE(632, 10, 0), 1475 /* SLICER_INTERVAL_TIME:11:15 */ 1476 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(642, 15, 11) 1477 }; 1478 static uint32_t BCMI_VIPER_XGXS_RX3_CTL11r_fields[] = 1479 { 1480 /* PM_RXLIMITAMPCALBYP:0:0 */ 1481 PHYMOD_SYMBOL_FIELD_ENCODE(442, 0, 0), 1482 /* PM_RXSLICERCALBYP:1:1 */ 1483 PHYMOD_SYMBOL_FIELD_ENCODE(443, 1, 1), 1484 /* SLCAL_INIT_TIME:7:14 */ 1485 PHYMOD_SYMBOL_FIELD_ENCODE(635, 14, 7), 1486 /* RECAL_IND_CLR:15:15 */ 1487 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(478, 15, 15) 1488 }; 1489 static uint32_t BCMI_VIPER_XGXS_RX3_CTL2r_fields[] = 1490 { 1491 /* LMTCAL_DONE_OVRD_VAL:0:0 */ 1492 PHYMOD_SYMBOL_FIELD_ENCODE(324, 0, 0), 1493 /* LMTCAL_DONE_OVRD:1:1 */ 1494 PHYMOD_SYMBOL_FIELD_ENCODE(323, 1, 1), 1495 /* LMTCAL_EN_OVRD_VAL:2:2 */ 1496 PHYMOD_SYMBOL_FIELD_ENCODE(326, 2, 2), 1497 /* LMTCAL_EN_OVRD:3:3 */ 1498 PHYMOD_SYMBOL_FIELD_ENCODE(325, 3, 3), 1499 /* LMTCAL_ACC_TIME:4:14 */ 1500 PHYMOD_SYMBOL_FIELD_ENCODE(319, 14, 4), 1501 /* LMTCAL_PD_POLARITY:15:15 */ 1502 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(333, 15, 15) 1503 }; 1504 static uint32_t BCMI_VIPER_XGXS_RX3_CTL3r_fields[] = 1505 { 1506 /* RECAL_POS_THRES:0:15 */ 1507 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(480, 15, 0) 1508 }; 1509 static uint32_t BCMI_VIPER_XGXS_RX3_CTL4r_fields[] = 1510 { 1511 /* RECAL_NEG_THRES:0:15 */ 1512 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(479, 15, 0) 1513 }; 1514 static uint32_t BCMI_VIPER_XGXS_RX3_CTL5r_fields[] = 1515 { 1516 /* CONT_LMTCAL_EN:0:0 */ 1517 PHYMOD_SYMBOL_FIELD_ENCODE(84, 0, 0), 1518 /* LMTCAL_CONT_ACC_TIME:1:11 */ 1519 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(322, 11, 1) 1520 }; 1521 static uint32_t BCMI_VIPER_XGXS_RX3_CTL6r_fields[] = 1522 { 1523 /* RX_LMTOFF_OVRD_VAL:0:5 */ 1524 PHYMOD_SYMBOL_FIELD_ENCODE(572, 5, 0), 1525 /* RX_LMTOFF_OVRD:6:6 */ 1526 PHYMOD_SYMBOL_FIELD_ENCODE(571, 6, 6), 1527 /* LMTCAL_INTERVAL_TIME:7:11 */ 1528 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(329, 11, 7) 1529 }; 1530 static uint32_t BCMI_VIPER_XGXS_RX3_CTL7r_fields[] = 1531 { 1532 /* SLCAL_VALID_OVRD_VAL:0:0 */ 1533 PHYMOD_SYMBOL_FIELD_ENCODE(640, 0, 0), 1534 /* SLCAL_VALID_OVRD:1:1 */ 1535 PHYMOD_SYMBOL_FIELD_ENCODE(639, 1, 1), 1536 /* SLCAL_POL:10:10 */ 1537 PHYMOD_SYMBOL_FIELD_ENCODE(636, 10, 10), 1538 /* SLCAL_ACC_OPT:11:12 */ 1539 PHYMOD_SYMBOL_FIELD_ENCODE(631, 12, 11), 1540 /* SLCAL_EN_OVRD_VAL:13:13 */ 1541 PHYMOD_SYMBOL_FIELD_ENCODE(634, 13, 13), 1542 /* SLCAL_EN_OVRD:14:14 */ 1543 PHYMOD_SYMBOL_FIELD_ENCODE(633, 14, 14), 1544 /* CAL_STATE_OVRD:15:15 */ 1545 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(43, 15, 15) 1546 }; 1547 static uint32_t BCMI_VIPER_XGXS_RX3_CTL8r_fields[] = 1548 { 1549 /* RX_SLOFF0_OVRD_VAL:0:3 */ 1550 PHYMOD_SYMBOL_FIELD_ENCODE(585, 3, 0), 1551 /* RX_SLOFF0_OVRD:4:4 */ 1552 PHYMOD_SYMBOL_FIELD_ENCODE(584, 4, 4), 1553 /* RX_SLOFF1_OVRD_VAL:5:8 */ 1554 PHYMOD_SYMBOL_FIELD_ENCODE(588, 8, 5), 1555 /* RX_SLOFF1_OVRD:9:9 */ 1556 PHYMOD_SYMBOL_FIELD_ENCODE(587, 9, 9), 1557 /* RX_SLOFF2_OVRD_VAL:10:13 */ 1558 PHYMOD_SYMBOL_FIELD_ENCODE(591, 13, 10), 1559 /* RX_SLOFF2_OVRD:14:14 */ 1560 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(590, 14, 14) 1561 }; 1562 static uint32_t BCMI_VIPER_XGXS_RX3_CTL9r_fields[] = 1563 { 1564 /* SLCAL_UP_THRES:0:10 */ 1565 PHYMOD_SYMBOL_FIELD_ENCODE(638, 10, 0), 1566 /* RX_SLICER_CALVALID_OVRD_VAL:11:11 */ 1567 PHYMOD_SYMBOL_FIELD_ENCODE(581, 11, 11), 1568 /* RX_SLICER_CALVALID_OVRD:12:12 */ 1569 PHYMOD_SYMBOL_FIELD_ENCODE(580, 12, 12), 1570 /* CAL_STATE_OVRD_VAL:13:15 */ 1571 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(44, 15, 13) 1572 }; 1573 static uint32_t BCMI_VIPER_XGXS_RXLNSWP1r_fields[] = 1574 { 1575 /* RX0_LNSWAP_SEL:0:1 */ 1576 PHYMOD_SYMBOL_FIELD_ENCODE(541, 1, 0), 1577 /* RX1_LNSWAP_SEL:2:3 */ 1578 PHYMOD_SYMBOL_FIELD_ENCODE(547, 3, 2), 1579 /* RX2_LNSWAP_SEL:4:5 */ 1580 PHYMOD_SYMBOL_FIELD_ENCODE(549, 5, 4), 1581 /* RX3_LNSWAP_SEL:6:7 */ 1582 PHYMOD_SYMBOL_FIELD_ENCODE(551, 7, 6), 1583 /* RFIFO_20TO20_PTR_SW_RST:8:11 */ 1584 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(523, 11, 8) 1585 }; 1586 static uint32_t BCMI_VIPER_XGXS_RXLNSWP2r_fields[] = 1587 { 1588 /* RX0_DIG_LNSWAP_SEL:0:1 */ 1589 PHYMOD_SYMBOL_FIELD_ENCODE(540, 1, 0), 1590 /* RX1_DIG_LNSWAP_SEL:2:3 */ 1591 PHYMOD_SYMBOL_FIELD_ENCODE(546, 3, 2), 1592 /* RX2_DIG_LNSWAP_SEL:4:5 */ 1593 PHYMOD_SYMBOL_FIELD_ENCODE(548, 5, 4), 1594 /* RX3_DIG_LNSWAP_SEL:6:7 */ 1595 PHYMOD_SYMBOL_FIELD_ENCODE(550, 7, 6), 1596 /* FORCE_RX_DIG_LNSWAP_SEL:8:8 */ 1597 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(224, 8, 8) 1598 }; 1599 static uint32_t BCMI_VIPER_XGXS_RX_AFE_ANARXASTSr_fields[] = 1600 { 1601 /* GENSTAT:0:15 */ 1602 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(252, 15, 0) 1603 }; 1604 static uint32_t BCMI_VIPER_XGXS_RX_AFE_ANARXCTLr_fields[] = 1605 { 1606 /* STATUS_SEL:0:2 */ 1607 PHYMOD_SYMBOL_FIELD_ENCODE(653, 2, 0), 1608 /* FLIP_EYEMON_POLARITY:3:3 */ 1609 PHYMOD_SYMBOL_FIELD_ENCODE(212, 3, 3), 1610 /* FORCERXSEQDONE_SM:4:4 */ 1611 PHYMOD_SYMBOL_FIELD_ENCODE(215, 4, 4), 1612 /* PHFREQ_RST_DIS_NRML_SM:5:5 */ 1613 PHYMOD_SYMBOL_FIELD_ENCODE(416, 5, 5), 1614 /* PHFREQ_RST_DIS_FST_SM:6:6 */ 1615 PHYMOD_SYMBOL_FIELD_ENCODE(415, 6, 6), 1616 /* OVERRIDE_SIGDET_VAL:8:8 */ 1617 PHYMOD_SYMBOL_FIELD_ENCODE(384, 8, 8), 1618 /* OVERRIDE_SIGDET_EN:9:9 */ 1619 PHYMOD_SYMBOL_FIELD_ENCODE(383, 9, 9), 1620 /* SIGDETMONITOR_EN_SM:10:10 */ 1621 PHYMOD_SYMBOL_FIELD_ENCODE(619, 10, 10), 1622 /* SIGDETRESTART_EN_SM:11:11 */ 1623 PHYMOD_SYMBOL_FIELD_ENCODE(620, 11, 11), 1624 /* SIGDETECTED_EN_SM:12:12 */ 1625 PHYMOD_SYMBOL_FIELD_ENCODE(618, 12, 12), 1626 /* FAST_ACQ_EN_FORCE_R:13:13 */ 1627 PHYMOD_SYMBOL_FIELD_ENCODE(197, 13, 13), 1628 /* FAST_ACQ_EN_R:14:14 */ 1629 PHYMOD_SYMBOL_FIELD_ENCODE(198, 14, 14), 1630 /* RXSEQRESTART_SM:15:15 */ 1631 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(559, 15, 15) 1632 }; 1633 static uint32_t BCMI_VIPER_XGXS_RX_AFE_ANARXCTL1Gr_fields[] = 1634 { 1635 /* FREQ_SEL:0:0 */ 1636 PHYMOD_SYMBOL_FIELD_ENCODE(235, 0, 0), 1637 /* FREQ_SEL_FORCE:1:1 */ 1638 PHYMOD_SYMBOL_FIELD_ENCODE(236, 1, 1), 1639 /* SPD_RSTB_DIS_SM:2:2 */ 1640 PHYMOD_SYMBOL_FIELD_ENCODE(645, 2, 2), 1641 /* PHASE_SEL_SM:3:3 */ 1642 PHYMOD_SYMBOL_FIELD_ENCODE(412, 3, 3), 1643 /* RTBI_FLIP:4:4 */ 1644 PHYMOD_SYMBOL_FIELD_ENCODE(535, 4, 4), 1645 /* RTBI_CKFLIP:5:5 */ 1646 PHYMOD_SYMBOL_FIELD_ENCODE(534, 5, 5), 1647 /* CSTRETCH:6:6 */ 1648 PHYMOD_SYMBOL_FIELD_ENCODE(90, 6, 6), 1649 /* CGBAD_EN:7:7 */ 1650 PHYMOD_SYMBOL_FIELD_ENCODE(55, 7, 7), 1651 /* PRBS_EN:8:8 */ 1652 PHYMOD_SYMBOL_FIELD_ENCODE(447, 8, 8), 1653 /* EMON_EN:9:9 */ 1654 PHYMOD_SYMBOL_FIELD_ENCODE(164, 9, 9), 1655 /* CGBAD_TST:10:10 */ 1656 PHYMOD_SYMBOL_FIELD_ENCODE(56, 10, 10), 1657 /* RXD_DEC_SEL:11:11 */ 1658 PHYMOD_SYMBOL_FIELD_ENCODE(555, 11, 11), 1659 /* PRBS_CLR_DIS:12:12 */ 1660 PHYMOD_SYMBOL_FIELD_ENCODE(446, 12, 12), 1661 /* STAMUXREGDIS:13:13 */ 1662 PHYMOD_SYMBOL_FIELD_ENCODE(651, 13, 13), 1663 /* PKT_COUNT_EN:14:14 */ 1664 PHYMOD_SYMBOL_FIELD_ENCODE(431, 14, 14), 1665 /* FPAT_MD:15:15 */ 1666 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(231, 15, 15) 1667 }; 1668 static uint32_t BCMI_VIPER_XGXS_RX_AFE_ANARXCTLPCIr_fields[] = 1669 { 1670 /* INTEG_MODE_SM:0:1 */ 1671 PHYMOD_SYMBOL_FIELD_ENCODE(281, 1, 0), 1672 /* RX_POLARITY_R:2:2 */ 1673 PHYMOD_SYMBOL_FIELD_ENCODE(576, 2, 2), 1674 /* RX_POLARITY_FORCE_SM:3:3 */ 1675 PHYMOD_SYMBOL_FIELD_ENCODE(575, 3, 3), 1676 /* LINK_EN_R:4:4 */ 1677 PHYMOD_SYMBOL_FIELD_ENCODE(313, 4, 4), 1678 /* LINK_EN_FORCE_SM:5:5 */ 1679 PHYMOD_SYMBOL_FIELD_ENCODE(312, 5, 5), 1680 /* COMMA_ADJ_EN_R:6:6 */ 1681 PHYMOD_SYMBOL_FIELD_ENCODE(76, 6, 6), 1682 /* COMMA_ADJ_EN_FORCE_R_SM:7:7 */ 1683 PHYMOD_SYMBOL_FIELD_ENCODE(74, 7, 7), 1684 /* COMMA_ADJ_EN_FORCE_SYNC_SM:8:8 */ 1685 PHYMOD_SYMBOL_FIELD_ENCODE(75, 8, 8), 1686 /* COMMA_ADJ_EN_FORCE_EXT_SM:9:9 */ 1687 PHYMOD_SYMBOL_FIELD_ENCODE(73, 9, 9), 1688 /* SYNC_STATUS_FORCE_R:10:10 */ 1689 PHYMOD_SYMBOL_FIELD_ENCODE(657, 10, 10), 1690 /* SYNC_STATUS_FORCE_R_SM:11:11 */ 1691 PHYMOD_SYMBOL_FIELD_ENCODE(658, 11, 11), 1692 /* SYNC_STATUS_FORCE_SYNC_SM:12:12 */ 1693 PHYMOD_SYMBOL_FIELD_ENCODE(659, 12, 12), 1694 /* COMMA_MASK_R:13:13 */ 1695 PHYMOD_SYMBOL_FIELD_ENCODE(80, 13, 13), 1696 /* COMMA_MASK_FORCE_R:14:14 */ 1697 PHYMOD_SYMBOL_FIELD_ENCODE(79, 14, 14), 1698 /* COMMA_ADJ_SYNC_SEL:15:15 */ 1699 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(77, 15, 15) 1700 }; 1701 static uint32_t BCMI_VIPER_XGXS_RX_AFE_ANARXSIGDETr_fields[] = 1702 { 1703 /* INVERT_RX_SIGDET:2:2 */ 1704 PHYMOD_SYMBOL_FIELD_ENCODE(288, 2, 2), 1705 /* RX_SIGDET_FORCE_R:3:3 */ 1706 PHYMOD_SYMBOL_FIELD_ENCODE(578, 3, 3), 1707 /* RX_SIGDET_R:4:4 */ 1708 PHYMOD_SYMBOL_FIELD_ENCODE(579, 4, 4), 1709 /* CX4_SIGDET_EN_SM:5:5 */ 1710 PHYMOD_SYMBOL_FIELD_ENCODE(94, 5, 5), 1711 /* EXT_SIGDET_EN_SM:6:6 */ 1712 PHYMOD_SYMBOL_FIELD_ENCODE(187, 6, 6), 1713 /* CX4_SIGDET_CNT_LD_SM:7:7 */ 1714 PHYMOD_SYMBOL_FIELD_ENCODE(93, 7, 7), 1715 /* RX_PF_CTRL:12:15 */ 1716 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(573, 15, 12) 1717 }; 1718 static uint32_t BCMI_VIPER_XGXS_RX_AFE_ANARXSTSr_fields[] = 1719 { 1720 /* RX_AFE_ANARXSTS:0:15 */ 1721 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(561, 15, 0) 1722 }; 1723 static uint32_t BCMI_VIPER_XGXS_RX_AFE_ANARXTESTr_fields[] = 1724 { 1725 /* TESTMUXSELECT_SM:0:3 */ 1726 PHYMOD_SYMBOL_FIELD_ENCODE(667, 3, 0), 1727 /* TPCTRL_SM:4:8 */ 1728 PHYMOD_SYMBOL_FIELD_ENCODE(680, 8, 4), 1729 /* SIGDET_MUX_SM:12:15 */ 1730 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(624, 15, 12) 1731 }; 1732 static uint32_t BCMI_VIPER_XGXS_RX_AFE_CTL0r_fields[] = 1733 { 1734 /* RESERVED_0:0:0 */ 1735 PHYMOD_SYMBOL_FIELD_ENCODE(488, 0, 0), 1736 /* PD_EQZ:1:1 */ 1737 PHYMOD_SYMBOL_FIELD_ENCODE(400, 1, 1), 1738 /* PD_LMTNG:2:2 */ 1739 PHYMOD_SYMBOL_FIELD_ENCODE(401, 2, 2), 1740 /* RESERVED_5_3:3:5 */ 1741 PHYMOD_SYMBOL_FIELD_ENCODE(505, 5, 3), 1742 /* FILTER_BAND:6:7 */ 1743 PHYMOD_SYMBOL_FIELD_ENCODE(209, 7, 6), 1744 /* RX_PON:8:11 */ 1745 PHYMOD_SYMBOL_FIELD_ENCODE(577, 11, 8), 1746 /* RESERVED_14_12:12:14 */ 1747 PHYMOD_SYMBOL_FIELD_ENCODE(492, 14, 12), 1748 /* SLICER_PD:15:15 */ 1749 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(643, 15, 15) 1750 }; 1751 static uint32_t BCMI_VIPER_XGXS_RX_AFE_CTL1r_fields[] = 1752 { 1753 /* EYEM_PD:0:0 */ 1754 PHYMOD_SYMBOL_FIELD_ENCODE(190, 0, 0), 1755 /* RESERVED_26_17:1:10 */ 1756 PHYMOD_SYMBOL_FIELD_ENCODE(495, 10, 1), 1757 /* DIV_4_DEMUX_ENABLE:11:11 */ 1758 PHYMOD_SYMBOL_FIELD_ENCODE(125, 11, 11), 1759 /* DEMUX_ZERO_PD:12:12 */ 1760 PHYMOD_SYMBOL_FIELD_ENCODE(100, 12, 12), 1761 /* DEMUX_PEAK_PD:13:13 */ 1762 PHYMOD_SYMBOL_FIELD_ENCODE(99, 13, 13), 1763 /* DEMUX_PD:14:14 */ 1764 PHYMOD_SYMBOL_FIELD_ENCODE(98, 14, 14), 1765 /* DEMUX_EYEM_PD:15:15 */ 1766 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(97, 15, 15) 1767 }; 1768 static uint32_t BCMI_VIPER_XGXS_RX_AFE_CTL2r_fields[] = 1769 { 1770 /* RESERVED_32:0:0 */ 1771 PHYMOD_SYMBOL_FIELD_ENCODE(498, 0, 0), 1772 /* DIV4_PD:1:1 */ 1773 PHYMOD_SYMBOL_FIELD_ENCODE(124, 1, 1), 1774 /* DIV10_PD:2:2 */ 1775 PHYMOD_SYMBOL_FIELD_ENCODE(123, 2, 2), 1776 /* INPUTERM_CM_EN:3:3 */ 1777 PHYMOD_SYMBOL_FIELD_ENCODE(277, 3, 3), 1778 /* INPUTERM_CMULT_EN:4:4 */ 1779 PHYMOD_SYMBOL_FIELD_ENCODE(276, 4, 4), 1780 /* INPUTERM_LOWZGND_EN:5:5 */ 1781 PHYMOD_SYMBOL_FIELD_ENCODE(278, 5, 5), 1782 /* INPUTERM_LOWZVDD_EN:6:6 */ 1783 PHYMOD_SYMBOL_FIELD_ENCODE(279, 6, 6), 1784 /* RESERVED_47_39:7:15 */ 1785 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(502, 15, 7) 1786 }; 1787 static uint32_t BCMI_VIPER_XGXS_RX_AFE_CTL3r_fields[] = 1788 { 1789 /* RESERVED_52_48:0:4 */ 1790 PHYMOD_SYMBOL_FIELD_ENCODE(504, 4, 0), 1791 /* DCC_EN:5:5 */ 1792 PHYMOD_SYMBOL_FIELD_ENCODE(96, 5, 5), 1793 /* DUTY_CYCLE:6:8 */ 1794 PHYMOD_SYMBOL_FIELD_ENCODE(153, 8, 6), 1795 /* PD_BIAS:9:9 */ 1796 PHYMOD_SYMBOL_FIELD_ENCODE(399, 9, 9), 1797 /* RESERVED_63_58:10:15 */ 1798 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(508, 15, 10) 1799 }; 1800 static uint32_t BCMI_VIPER_XGXS_RX_AFE_CTL4r_fields[] = 1801 { 1802 /* BIAS_LA_CTRL:0:2 */ 1803 PHYMOD_SYMBOL_FIELD_ENCODE(21, 2, 0), 1804 /* BIAS_LA_DAC_CTRL:3:5 */ 1805 PHYMOD_SYMBOL_FIELD_ENCODE(22, 5, 3), 1806 /* BIAS_EYEM_CTRL:6:8 */ 1807 PHYMOD_SYMBOL_FIELD_ENCODE(20, 8, 6), 1808 /* BIAS_SIGDET_CTRL:9:11 */ 1809 PHYMOD_SYMBOL_FIELD_ENCODE(23, 11, 9), 1810 /* SIGDET_BYPASS:12:12 */ 1811 PHYMOD_SYMBOL_FIELD_ENCODE(622, 12, 12), 1812 /* SIGDET_PD:13:13 */ 1813 PHYMOD_SYMBOL_FIELD_ENCODE(625, 13, 13), 1814 /* SIGDET_MODESELECT:14:14 */ 1815 PHYMOD_SYMBOL_FIELD_ENCODE(623, 14, 14), 1816 /* EN_TESTMUX:15:15 */ 1817 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(177, 15, 15) 1818 }; 1819 static uint32_t BCMI_VIPER_XGXS_RX_AFE_CTL5r_fields[] = 1820 { 1821 /* SIGDET_THRESHOLD:0:3 */ 1822 PHYMOD_SYMBOL_FIELD_ENCODE(626, 3, 0), 1823 /* SEL_CLK:4:5 */ 1824 PHYMOD_SYMBOL_FIELD_ENCODE(609, 5, 4), 1825 /* EYEM_REFADJUST:6:10 */ 1826 PHYMOD_SYMBOL_FIELD_ENCODE(191, 10, 6), 1827 /* EYEMONITORREF_PD:11:11 */ 1828 PHYMOD_SYMBOL_FIELD_ENCODE(188, 11, 11), 1829 /* EYEMONITOR_REF_ZERO:12:12 */ 1830 PHYMOD_SYMBOL_FIELD_ENCODE(189, 12, 12), 1831 /* PI_MAIN_ENABLE:13:13 */ 1832 PHYMOD_SYMBOL_FIELD_ENCODE(428, 13, 13), 1833 /* PI_EYEM_ENABLE:14:14 */ 1834 PHYMOD_SYMBOL_FIELD_ENCODE(426, 14, 14), 1835 /* SIGDET_USB_EN:15:15 */ 1836 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(627, 15, 15) 1837 }; 1838 static uint32_t BCMI_VIPER_XGXS_RX_AFE_CTL6r_fields[] = 1839 { 1840 /* RESERVED_96:0:0 */ 1841 PHYMOD_SYMBOL_FIELD_ENCODE(513, 0, 0), 1842 /* MAIN_PI_PWD_LVL2PI:1:1 */ 1843 PHYMOD_SYMBOL_FIELD_ENCODE(347, 1, 1), 1844 /* MAIN_PI_BW_SEL:2:2 */ 1845 PHYMOD_SYMBOL_FIELD_ENCODE(346, 2, 2), 1846 /* PI_LOWVDD_ENB:3:3 */ 1847 PHYMOD_SYMBOL_FIELD_ENCODE(427, 3, 3), 1848 /* RESERVED_100:4:4 */ 1849 PHYMOD_SYMBOL_FIELD_ENCODE(489, 4, 4), 1850 /* EYE_MONITOR_PI_PWD_LVL2PI:5:5 */ 1851 PHYMOD_SYMBOL_FIELD_ENCODE(193, 5, 5), 1852 /* EYE_MONITOR_PI_BW_SEL:6:6 */ 1853 PHYMOD_SYMBOL_FIELD_ENCODE(192, 6, 6), 1854 /* RESERVED_105_103:7:9 */ 1855 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(490, 9, 7) 1856 }; 1857 static uint32_t BCMI_VIPER_XGXS_SERDESID0r_fields[] = 1858 { 1859 /* MODEL_NUMBER:0:5 */ 1860 PHYMOD_SYMBOL_FIELD_ENCODE(372, 5, 0), 1861 /* TECH_PROC:6:8 */ 1862 PHYMOD_SYMBOL_FIELD_ENCODE(664, 8, 6), 1863 /* BONDING:9:10 */ 1864 PHYMOD_SYMBOL_FIELD_ENCODE(26, 10, 9), 1865 /* REV_NUMBER:11:13 */ 1866 PHYMOD_SYMBOL_FIELD_ENCODE(522, 13, 11), 1867 /* REV_LETTER:14:15 */ 1868 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(521, 15, 14) 1869 }; 1870 static uint32_t BCMI_VIPER_XGXS_SERDESID1r_fields[] = 1871 { 1872 /* SCRAMBLER:2:2 */ 1873 PHYMOD_SYMBOL_FIELD_ENCODE(605, 2, 2), 1874 /* BRCM_64B66B:3:3 */ 1875 PHYMOD_SYMBOL_FIELD_ENCODE(27, 3, 3), 1876 /* PCIE_II:4:4 */ 1877 PHYMOD_SYMBOL_FIELD_ENCODE(394, 4, 4), 1878 /* PCIE:5:5 */ 1879 PHYMOD_SYMBOL_FIELD_ENCODE(393, 5, 5), 1880 /* HIGIGII:6:6 */ 1881 PHYMOD_SYMBOL_FIELD_ENCODE(263, 6, 6), 1882 /* HIGIG:7:7 */ 1883 PHYMOD_SYMBOL_FIELD_ENCODE(262, 7, 7), 1884 /* CL48:8:8 */ 1885 PHYMOD_SYMBOL_FIELD_ENCODE(61, 8, 8), 1886 /* CL36:9:9 */ 1887 PHYMOD_SYMBOL_FIELD_ENCODE(57, 9, 9), 1888 /* CL73:10:10 */ 1889 PHYMOD_SYMBOL_FIELD_ENCODE(62, 10, 10), 1890 /* CL37:11:11 */ 1891 PHYMOD_SYMBOL_FIELD_ENCODE(60, 11, 11), 1892 /* MULTIPLICITY:12:15 */ 1893 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(377, 15, 12) 1894 }; 1895 static uint32_t BCMI_VIPER_XGXS_SERDESID2r_fields[] = 1896 { 1897 /* DR_10M_SL:0:0 */ 1898 PHYMOD_SYMBOL_FIELD_ENCODE(130, 0, 0), 1899 /* DR_100M_SL:1:1 */ 1900 PHYMOD_SYMBOL_FIELD_ENCODE(128, 1, 1), 1901 /* DR_1G_SL:2:2 */ 1902 PHYMOD_SYMBOL_FIELD_ENCODE(137, 2, 2), 1903 /* DR_2P5G_SL:3:3 */ 1904 PHYMOD_SYMBOL_FIELD_ENCODE(143, 3, 3), 1905 /* DR_5G_4L:4:4 */ 1906 PHYMOD_SYMBOL_FIELD_ENCODE(149, 4, 4), 1907 /* DR_6G_4L:5:5 */ 1908 PHYMOD_SYMBOL_FIELD_ENCODE(151, 5, 5), 1909 /* DR_10G_4L:6:6 */ 1910 PHYMOD_SYMBOL_FIELD_ENCODE(129, 6, 6), 1911 /* DR_12G_4L:7:7 */ 1912 PHYMOD_SYMBOL_FIELD_ENCODE(132, 7, 7), 1913 /* DR_12_5G_4L:8:8 */ 1914 PHYMOD_SYMBOL_FIELD_ENCODE(133, 8, 8), 1915 /* DR_13G_4L:9:9 */ 1916 PHYMOD_SYMBOL_FIELD_ENCODE(134, 9, 9), 1917 /* DR_15G_4L:10:10 */ 1918 PHYMOD_SYMBOL_FIELD_ENCODE(135, 10, 10), 1919 /* DR_16G_4L:11:11 */ 1920 PHYMOD_SYMBOL_FIELD_ENCODE(136, 11, 11), 1921 /* DR_20G_4L:12:12 */ 1922 PHYMOD_SYMBOL_FIELD_ENCODE(139, 12, 12), 1923 /* DR_21G_4L:13:13 */ 1924 PHYMOD_SYMBOL_FIELD_ENCODE(140, 13, 13), 1925 /* DR_25G_4L:14:14 */ 1926 PHYMOD_SYMBOL_FIELD_ENCODE(142, 14, 14), 1927 /* ID3PRESENT:15:15 */ 1928 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(265, 15, 15) 1929 }; 1930 static uint32_t BCMI_VIPER_XGXS_SERDESID3r_fields[] = 1931 { 1932 /* DR_100FX:0:0 */ 1933 PHYMOD_SYMBOL_FIELD_ENCODE(127, 0, 0), 1934 /* DR_2000_SL:1:1 */ 1935 PHYMOD_SYMBOL_FIELD_ENCODE(138, 1, 1), 1936 /* DR_4000_SL:2:2 */ 1937 PHYMOD_SYMBOL_FIELD_ENCODE(147, 2, 2), 1938 /* DR_5000_SL:3:3 */ 1939 PHYMOD_SYMBOL_FIELD_ENCODE(148, 3, 3), 1940 /* DR_6400_SL:4:4 */ 1941 PHYMOD_SYMBOL_FIELD_ENCODE(150, 4, 4), 1942 /* DR_1200_SL:5:5 */ 1943 PHYMOD_SYMBOL_FIELD_ENCODE(131, 5, 5), 1944 /* DR_2400_SL:6:6 */ 1945 PHYMOD_SYMBOL_FIELD_ENCODE(141, 6, 6), 1946 /* DR_31500_4L:7:7 */ 1947 PHYMOD_SYMBOL_FIELD_ENCODE(144, 7, 7), 1948 /* DR_32700_4L:8:8 */ 1949 PHYMOD_SYMBOL_FIELD_ENCODE(145, 8, 8), 1950 /* DR_40000_4L:9:9 */ 1951 PHYMOD_SYMBOL_FIELD_ENCODE(146, 9, 9), 1952 /* ID4PRESENT:15:15 */ 1953 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(266, 15, 15) 1954 }; 1955 static uint32_t BCMI_VIPER_XGXS_TXLNSWP1r_fields[] = 1956 { 1957 /* TX0_LNSWAP_SEL:0:1 */ 1958 PHYMOD_SYMBOL_FIELD_ENCODE(686, 1, 0), 1959 /* TX1_LNSWAP_SEL:2:3 */ 1960 PHYMOD_SYMBOL_FIELD_ENCODE(693, 3, 2), 1961 /* TX2_LNSWAP_SEL:4:5 */ 1962 PHYMOD_SYMBOL_FIELD_ENCODE(695, 5, 4), 1963 /* TX3_LNSWAP_SEL:6:7 */ 1964 PHYMOD_SYMBOL_FIELD_ENCODE(697, 7, 6), 1965 /* FORCE_GB_BYPASS_EN:8:11 */ 1966 PHYMOD_SYMBOL_FIELD_ENCODE(218, 11, 8), 1967 /* FORCE_GB_BYPASS_VAL:12:15 */ 1968 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(219, 15, 12) 1969 }; 1970 static uint32_t BCMI_VIPER_XGXS_TXLNSWP2r_fields[] = 1971 { 1972 /* TX0_ANA_LNSWAP_SEL:0:1 */ 1973 PHYMOD_SYMBOL_FIELD_ENCODE(685, 1, 0), 1974 /* TX1_ANA_LNSWAP_SEL:2:3 */ 1975 PHYMOD_SYMBOL_FIELD_ENCODE(692, 3, 2), 1976 /* TX2_ANA_LNSWAP_SEL:4:5 */ 1977 PHYMOD_SYMBOL_FIELD_ENCODE(694, 5, 4), 1978 /* TX3_ANA_LNSWAP_SEL:6:7 */ 1979 PHYMOD_SYMBOL_FIELD_ENCODE(696, 7, 6), 1980 /* FORCE_TX_ANA_LNSWAP_SEL:8:8 */ 1981 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(229, 8, 8) 1982 }; 1983 static uint32_t BCMI_VIPER_XGXS_TX_AFE_ANATXACTL0r_fields[] = 1984 { 1985 /* TX_MDATA_EN:0:0 */ 1986 PHYMOD_SYMBOL_FIELD_ENCODE(722, 0, 0), 1987 /* TXPAT_EN:1:1 */ 1988 PHYMOD_SYMBOL_FIELD_ENCODE(706, 1, 1), 1989 /* EDEN_FORCE_R:2:2 */ 1990 PHYMOD_SYMBOL_FIELD_ENCODE(159, 2, 2), 1991 /* EDEN_R:3:3 */ 1992 PHYMOD_SYMBOL_FIELD_ENCODE(160, 3, 3), 1993 /* RTBI_FLIP:4:4 */ 1994 PHYMOD_SYMBOL_FIELD_ENCODE(535, 4, 4), 1995 /* TXPOL_FLIP:5:5 */ 1996 PHYMOD_SYMBOL_FIELD_ENCODE(709, 5, 5), 1997 /* PCKT_STRT:6:6 */ 1998 PHYMOD_SYMBOL_FIELD_ENCODE(396, 6, 6), 1999 /* PCKT_EN:7:7 */ 2000 PHYMOD_SYMBOL_FIELD_ENCODE(395, 7, 7), 2001 /* PRBS_EN:8:8 */ 2002 PHYMOD_SYMBOL_FIELD_ENCODE(447, 8, 8), 2003 /* GLOOPOUTDIS:9:9 */ 2004 PHYMOD_SYMBOL_FIELD_ENCODE(257, 9, 9), 2005 /* TXCK_DME_EN_SM:10:10 */ 2006 PHYMOD_SYMBOL_FIELD_ENCODE(699, 10, 10), 2007 /* CATCH_ALL_8B10B_DIS:11:11 */ 2008 PHYMOD_SYMBOL_FIELD_ENCODE(48, 11, 11), 2009 /* FORCE_EXT_FRST_SM:12:12 */ 2010 PHYMOD_SYMBOL_FIELD_ENCODE(217, 12, 12), 2011 /* TX1G_FIFO_RST:13:13 */ 2012 PHYMOD_SYMBOL_FIELD_ENCODE(687, 13, 13), 2013 /* FORCE_TXCLK:14:14 */ 2014 PHYMOD_SYMBOL_FIELD_ENCODE(227, 14, 14), 2015 /* MDIO_FORCE:15:15 */ 2016 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(354, 15, 15) 2017 }; 2018 static uint32_t BCMI_VIPER_XGXS_TX_AFE_ANATXASTS0r_fields[] = 2019 { 2020 /* TXPLL_LOCK:0:0 */ 2021 PHYMOD_SYMBOL_FIELD_ENCODE(708, 0, 0), 2022 /* RLTXFERR_STKY:1:1 */ 2023 PHYMOD_SYMBOL_FIELD_ENCODE(530, 1, 1), 2024 /* TX_PWRDN:2:2 */ 2025 PHYMOD_SYMBOL_FIELD_ENCODE(724, 2, 2), 2026 /* TX_RESET:3:3 */ 2027 PHYMOD_SYMBOL_FIELD_ENCODE(726, 3, 3), 2028 /* TBI_MODE:4:4 */ 2029 PHYMOD_SYMBOL_FIELD_ENCODE(661, 4, 4), 2030 /* TXFERR_STKY:5:5 */ 2031 PHYMOD_SYMBOL_FIELD_ENCODE(701, 5, 5), 2032 /* TXDISABLE_LN:6:6 */ 2033 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(700, 6, 6) 2034 }; 2035 static uint32_t BCMI_VIPER_XGXS_TX_AFE_ANATXMDATA0r_fields[] = 2036 { 2037 /* TXMDIOTSTDATAL:0:9 */ 2038 PHYMOD_SYMBOL_FIELD_ENCODE(705, 9, 0), 2039 /* RLFIFO_TSTSEL:10:12 */ 2040 PHYMOD_SYMBOL_FIELD_ENCODE(525, 12, 10), 2041 /* TXTESTMUXSEL:13:15 */ 2042 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(710, 15, 13) 2043 }; 2044 static uint32_t BCMI_VIPER_XGXS_TX_AFE_ANATXMDATA1r_fields[] = 2045 { 2046 /* TXMDIOTSTDATAH:0:9 */ 2047 PHYMOD_SYMBOL_FIELD_ENCODE(704, 9, 0), 2048 /* PRE_EMPH_STAIR_EN:10:10 */ 2049 PHYMOD_SYMBOL_FIELD_ENCODE(460, 10, 10), 2050 /* PRE_EMPH_STAIR_REV_EN:11:11 */ 2051 PHYMOD_SYMBOL_FIELD_ENCODE(461, 11, 11), 2052 /* GLPBK_CLK_EN:12:12 */ 2053 PHYMOD_SYMBOL_FIELD_ENCODE(258, 12, 12), 2054 /* TX_ELECIDLE:13:13 */ 2055 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(716, 13, 13) 2056 }; 2057 static uint32_t BCMI_VIPER_XGXS_TX_AFE_CTL0r_fields[] = 2058 { 2059 /* TX_PWRDN:0:0 */ 2060 PHYMOD_SYMBOL_FIELD_ENCODE(724, 0, 0), 2061 /* TESTSEL:1:1 */ 2062 PHYMOD_SYMBOL_FIELD_ENCODE(668, 1, 1), 2063 /* RESERVED_3_2:2:3 */ 2064 PHYMOD_SYMBOL_FIELD_ENCODE(500, 3, 2), 2065 /* IDLE_ENA:4:4 */ 2066 PHYMOD_SYMBOL_FIELD_ENCODE(270, 4, 4), 2067 /* RXDETECT_TH:5:6 */ 2068 PHYMOD_SYMBOL_FIELD_ENCODE(554, 6, 5), 2069 /* RESERVED_7:7:7 */ 2070 PHYMOD_SYMBOL_FIELD_ENCODE(509, 7, 7), 2071 /* MAIN_CONTROL:8:13 */ 2072 PHYMOD_SYMBOL_FIELD_ENCODE(345, 13, 8), 2073 /* QUARTER_UNIT_EN:14:14 */ 2074 PHYMOD_SYMBOL_FIELD_ENCODE(472, 14, 14), 2075 /* FIX_10UNITS_EN:15:15 */ 2076 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(211, 15, 15) 2077 }; 2078 static uint32_t BCMI_VIPER_XGXS_TX_AFE_CTL1r_fields[] = 2079 { 2080 /* VDD1P0_ENB:0:0 */ 2081 PHYMOD_SYMBOL_FIELD_ENCODE(739, 0, 0), 2082 /* AMP_MODE:1:1 */ 2083 PHYMOD_SYMBOL_FIELD_ENCODE(8, 1, 1), 2084 /* CONST_IMPEDANCE:2:2 */ 2085 PHYMOD_SYMBOL_FIELD_ENCODE(83, 2, 2), 2086 /* PI_BW_SEL:3:3 */ 2087 PHYMOD_SYMBOL_FIELD_ENCODE(424, 3, 3), 2088 /* PWD_LVL2PI:4:4 */ 2089 PHYMOD_SYMBOL_FIELD_ENCODE(462, 4, 4), 2090 /* RESERVED_21:5:5 */ 2091 PHYMOD_SYMBOL_FIELD_ENCODE(494, 5, 5), 2092 /* POST_CONTROL:6:11 */ 2093 PHYMOD_SYMBOL_FIELD_ENCODE(444, 11, 6), 2094 /* POST_ENABLE:12:12 */ 2095 PHYMOD_SYMBOL_FIELD_ENCODE(445, 12, 12), 2096 /* RESERVED_29:13:13 */ 2097 PHYMOD_SYMBOL_FIELD_ENCODE(496, 13, 13), 2098 /* SLEW_RATE_CONTROL:14:15 */ 2099 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(641, 15, 14) 2100 }; 2101 static uint32_t BCMI_VIPER_XGXS_TX_AFE_CTL2r_fields[] = 2102 { 2103 /* TESTCK_EN:0:0 */ 2104 PHYMOD_SYMBOL_FIELD_ENCODE(665, 0, 0), 2105 /* TICKSEL:1:2 */ 2106 PHYMOD_SYMBOL_FIELD_ENCODE(676, 2, 1), 2107 /* TX_PON:3:6 */ 2108 PHYMOD_SYMBOL_FIELD_ENCODE(723, 6, 3), 2109 /* VDD_NOISE_SHAPE:7:9 */ 2110 PHYMOD_SYMBOL_FIELD_ENCODE(742, 9, 7), 2111 /* NOISE_CNCL_BIAS:10:13 */ 2112 PHYMOD_SYMBOL_FIELD_ENCODE(381, 13, 10), 2113 /* VDD_NOISE_CNCL_EN:14:14 */ 2114 PHYMOD_SYMBOL_FIELD_ENCODE(741, 14, 14), 2115 /* LEAKAGE_TEST:15:15 */ 2116 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(306, 15, 15) 2117 }; 2118 static uint32_t BCMI_VIPER_XGXS_TX_AFE_CTL3r_fields[] = 2119 { 2120 /* RESERVED_63_48:0:15 */ 2121 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(507, 15, 0) 2122 }; 2123 static uint32_t BCMI_VIPER_XGXS_TX_AFE_INTERPr_fields[] = 2124 { 2125 /* INTERP_CTRL_PHS:0:4 */ 2126 PHYMOD_SYMBOL_FIELD_ENCODE(282, 4, 0), 2127 /* INTERP_CTRL_QUADRANT:5:6 */ 2128 PHYMOD_SYMBOL_FIELD_ENCODE(283, 6, 5), 2129 /* TX_RATESELECT:7:7 */ 2130 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(725, 7, 7) 2131 }; 2132 static uint32_t BCMI_VIPER_XGXS_UNICOREMODE10Gr_fields[] = 2133 { 2134 /* UNICOREMODE10GCX4:0:3 */ 2135 PHYMOD_SYMBOL_FIELD_ENCODE(734, 3, 0), 2136 /* UNICOREMODE10GHIG:4:7 */ 2137 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(735, 7, 4) 2138 }; 2139 static uint32_t BCMI_VIPER_XGXS_XGXSCTLr_fields[] = 2140 { 2141 /* TXCKO_DIV:0:0 */ 2142 PHYMOD_SYMBOL_FIELD_ENCODE(698, 0, 0), 2143 /* AFRST_EN:1:1 */ 2144 PHYMOD_SYMBOL_FIELD_ENCODE(7, 1, 1), 2145 /* EDEN:2:2 */ 2146 PHYMOD_SYMBOL_FIELD_ENCODE(157, 2, 2), 2147 /* CDET_EN:3:3 */ 2148 PHYMOD_SYMBOL_FIELD_ENCODE(49, 3, 3), 2149 /* MDIO_CONT_EN:4:4 */ 2150 PHYMOD_SYMBOL_FIELD_ENCODE(350, 4, 4), 2151 /* RESERVED_5:5:5 */ 2152 PHYMOD_SYMBOL_FIELD_ENCODE(503, 5, 5), 2153 /* RLOOP:6:6 */ 2154 PHYMOD_SYMBOL_FIELD_ENCODE(526, 6, 6), 2155 /* PLL_BYPASS:7:7 */ 2156 PHYMOD_SYMBOL_FIELD_ENCODE(433, 7, 7), 2157 /* MODE:8:11 */ 2158 PHYMOD_SYMBOL_FIELD_ENCODE(371, 11, 8), 2159 /* RESET_ANLG:12:12 */ 2160 PHYMOD_SYMBOL_FIELD_ENCODE(514, 12, 12), 2161 /* START_SEQUENCER:13:13 */ 2162 PHYMOD_SYMBOL_FIELD_ENCODE(652, 13, 13), 2163 /* PCMP_EN:14:14 */ 2164 PHYMOD_SYMBOL_FIELD_ENCODE(397, 14, 14), 2165 /* PGEN_EN:15:15 */ 2166 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(403, 15, 15) 2167 }; 2168 static uint32_t BCMI_VIPER_XGXS_XGXSSTS1r_fields[] = 2169 { 2170 /* ACTUAL_SPEED_LN0:0:3 */ 2171 PHYMOD_SYMBOL_FIELD_ENCODE(5, 3, 0), 2172 /* AUTONEG_COMPLETE:7:7 */ 2173 PHYMOD_SYMBOL_FIELD_ENCODE(13, 7, 7), 2174 /* LINK10G:9:9 */ 2175 PHYMOD_SYMBOL_FIELD_ENCODE(309, 9, 9), 2176 /* SGMII_MODE:10:10 */ 2177 PHYMOD_SYMBOL_FIELD_ENCODE(615, 10, 10), 2178 /* SERDESMODE_EN_TX:11:11 */ 2179 PHYMOD_SYMBOL_FIELD_ENCODE(613, 11, 11), 2180 /* MODE_TX:12:15 */ 2181 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(375, 15, 12) 2182 }; 2183 static uint32_t BCMI_VIPER_XGXS_XGXSSTS2r_fields[] = 2184 { 2185 /* FREQ_SEL_TX:0:0 */ 2186 PHYMOD_SYMBOL_FIELD_ENCODE(238, 0, 0), 2187 /* FREQ_SEL_RX:4:4 */ 2188 PHYMOD_SYMBOL_FIELD_ENCODE(237, 4, 4), 2189 /* GPWRDWN_TX:8:8 */ 2190 PHYMOD_SYMBOL_FIELD_ENCODE(260, 8, 8), 2191 /* GPWRDWN_RX:12:12 */ 2192 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(259, 12, 12) 2193 }; 2194 2195 2196 2197 /******************************************************************************* 2198 * 2199 * The following is the field name table. 2200 */ 2201 #if PHYMOD_CONFIG_INCLUDE_FIELD_NAMES == 1 2202 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_NAMES_BCMI_VIPER_XGXS 2203 const char* bcmi_viper_xgxs_fields[] = 2204 { 2205 "ABILITY_DETECT_STATE", 2206 "ACK", 2207 "ACK2", 2208 "ACKNOWLEDGE", 2209 "ACKNOWLEDGE_DETECT_STATE", 2210 "ACTUAL_SPEED_LN0", 2211 "ADJ", 2212 "AFRST_EN", 2213 "AMP_MODE", 2214 "AN_ENABLE_STATE", 2215 "AN_TXDISABLEPHASE", 2216 "AUTODET_EN", 2217 "AUTONEG_ABILITY", 2218 "AUTONEG_COMPLETE", 2219 "AUTONEG_ENABLE", 2220 "AUTONEG_FAST_TIMERS", 2221 "AUTONEG_RESOLUTION_ERR", 2222 "AUTO_DETECT_FX_MODE", 2223 "BADCODEGROUPS", 2224 "BAD_ESD_DETECTED", 2225 "BIAS_EYEM_CTRL", 2226 "BIAS_LA_CTRL", 2227 "BIAS_LA_DAC_CTRL", 2228 "BIAS_SIGDET_CTRL", 2229 "BLOCKADDRESS", 2230 "BLOCK_TXEN_MODE", 2231 "BONDING", 2232 "BRCM_64B66B", 2233 "BWSEL_INTEG", 2234 "BWSEL_PROP", 2235 "BYPASS_ALIGNMENT", 2236 "BYPASS_ENCODER", 2237 "BYPASS_NRZ", 2238 "BYPASS_PCS_RX", 2239 "BYPASS_PCS_TX", 2240 "BYPASS_RXFIFO", 2241 "BYPASS_TXFIFO1000", 2242 "CALIB_ADJ", 2243 "CALIB_CAP_CHARGE_TIME", 2244 "CALIB_DELAY_TIME", 2245 "CALIB_STEP_TIME", 2246 "CAL_ERROR", 2247 "CAL_STATE", 2248 "CAL_STATE_OVRD", 2249 "CAL_STATE_OVRD_VAL", 2250 "CAL_TH", 2251 "CAL_VALID", 2252 "CARRIER_EXTEND_ERR_DETECTED", 2253 "CATCH_ALL_8B10B_DIS", 2254 "CDET_EN", 2255 "CDET_EN1G", 2256 "CDRLOCKTIMEACQ_S1_SM", 2257 "CDRLOCKTIMEACQ_S2_SM", 2258 "CDRLOCKTIMEACQ_S3_SM", 2259 "CDRLOCKTIMETRCKNRML_SM", 2260 "CGBAD_EN", 2261 "CGBAD_TST", 2262 "CL36", 2263 "CL36_PCS_EN_RX", 2264 "CL36_PCS_EN_TX", 2265 "CL37", 2266 "CL48", 2267 "CL73", 2268 "CLEAR_BER_COUNTER", 2269 "CLEAR_LINKDOWN", 2270 "CLEAR_PACKET_COUNTERS", 2271 "CLK41_BYPASS", 2272 "CLKSIGDET_BYPASS", 2273 "CLK_OUT_1000_SW_DEF", 2274 "CLK_OUT_1000_SW_EN", 2275 "CLOCKSTOPPABLE", 2276 "CM_SEL", 2277 "COLLISION_TEST_EN", 2278 "COMMA_ADJ_EN_FORCE_EXT_SM", 2279 "COMMA_ADJ_EN_FORCE_R_SM", 2280 "COMMA_ADJ_EN_FORCE_SYNC_SM", 2281 "COMMA_ADJ_EN_R", 2282 "COMMA_ADJ_SYNC_SEL", 2283 "COMMA_DET_EN", 2284 "COMMA_MASK_FORCE_R", 2285 "COMMA_MASK_R", 2286 "COMPLETE_ACKNOWLEDGE_STATE", 2287 "CONSISTENCY_MISMATCH", 2288 "CONST_IMPEDANCE", 2289 "CONT_LMTCAL_EN", 2290 "CORRELATOR_DISABLE", 2291 "CPAR", 2292 "CRC_CHECKER_DISABLE", 2293 "CRC_ERR_DETECTED", 2294 "CRS_IND_DETECTED", 2295 "CSTRETCH", 2296 "CURR_SEL", 2297 "CX4SIGDETCNT", 2298 "CX4_SIGDET_CNT_LD_SM", 2299 "CX4_SIGDET_EN_SM", 2300 "DATA_SAMPLER_EN", 2301 "DCC_EN", 2302 "DEMUX_EYEM_PD", 2303 "DEMUX_PD", 2304 "DEMUX_PEAK_PD", 2305 "DEMUX_ZERO_PD", 2306 "DEVAN_EN", 2307 "DEVCL22_EN", 2308 "DEVDEVAD_EN", 2309 "DEVPMD_EN", 2310 "DFE0_CALIB_SEARCH_BIT", 2311 "DFE0_EN_CALIB_N", 2312 "DFE0_HALFSTEP_EN", 2313 "DFE0_VCOCAL_VALID_OVRD", 2314 "DFE0_VCOCAL_VALID_OVRD_VAL", 2315 "DISABLE_CARRIER_EXTEND", 2316 "DISABLE_EXTEND_FDX_ONLY", 2317 "DISABLE_FALSE_LINK", 2318 "DISABLE_PACKET_MISALIGN", 2319 "DISABLE_PLL_PWRDWN", 2320 "DISABLE_REMOTE_FAULT_SENSING", 2321 "DISABLE_RESET_CNT", 2322 "DISABLE_RESOLUTION_ERR_RESTART", 2323 "DISABLE_RX_QUAL", 2324 "DISABLE_SIGNAL_DETECT_FILTER", 2325 "DISABLE_TRRR_GENERATION", 2326 "DISABLE_TX_CRS", 2327 "DIV", 2328 "DIV10_PD", 2329 "DIV4_PD", 2330 "DIV_4_DEMUX_ENABLE", 2331 "DN_SLOFFX_VAL", 2332 "DR_100FX", 2333 "DR_100M_SL", 2334 "DR_10G_4L", 2335 "DR_10M_SL", 2336 "DR_1200_SL", 2337 "DR_12G_4L", 2338 "DR_12_5G_4L", 2339 "DR_13G_4L", 2340 "DR_15G_4L", 2341 "DR_16G_4L", 2342 "DR_1G_SL", 2343 "DR_2000_SL", 2344 "DR_20G_4L", 2345 "DR_21G_4L", 2346 "DR_2400_SL", 2347 "DR_25G_4L", 2348 "DR_2P5G_SL", 2349 "DR_31500_4L", 2350 "DR_32700_4L", 2351 "DR_40000_4L", 2352 "DR_4000_SL", 2353 "DR_5000_SL", 2354 "DR_5G_4L", 2355 "DR_6400_SL", 2356 "DR_6G_4L", 2357 "DUPLEX_STATUS", 2358 "DUTY_CYCLE", 2359 "EARLY_END_EXTENSION_DETECTED", 2360 "EARLY_PREAMBLE_RX", 2361 "EARLY_PREAMBLE_TX", 2362 "EDEN", 2363 "EDEN1G", 2364 "EDEN_FORCE_R", 2365 "EDEN_R", 2366 "EEE_FAST_TIMER_EN", 2367 "EEE_GATECLK_EN", 2368 "EEE_GATEOUTCLK_EN", 2369 "EMON_EN", 2370 "EM_ERR_CNT_H", 2371 "EM_ERR_CNT_L", 2372 "EM_PHASE_SHIFT_360_OVRD", 2373 "EM_PHASE_SHIFT_360_OVRD_VAL", 2374 "EN10T", 2375 "ENABLE", 2376 "ENABLE_AUTONEG_ERR_TIMER", 2377 "ENABLE_LAST_RESOLUTION_ERR", 2378 "ENABLE_PARALLEL_DETECTION", 2379 "EN_CAP", 2380 "EN_CRC_CHECKER_FRAGMENT_ERR_DET", 2381 "EN_CUR", 2382 "EN_TESTMUX", 2383 "EN_TEST_FRAC_CLK", 2384 "EN_TEST_INTEGER_CLK", 2385 "ERR_DETECTED", 2386 "ESD_DETECTED", 2387 "EXTENDED_CAPABILITY", 2388 "EXTENDED_STATUS", 2389 "EXTEND_PKT_SIZE", 2390 "EXT_PHY_CRS_MODE", 2391 "EXT_RANGE", 2392 "EXT_SIGDET_EN_SM", 2393 "EYEMONITORREF_PD", 2394 "EYEMONITOR_REF_ZERO", 2395 "EYEM_PD", 2396 "EYEM_REFADJUST", 2397 "EYE_MONITOR_PI_BW_SEL", 2398 "EYE_MONITOR_PI_PWD_LVL2PI", 2399 "FALLING_EDGE", 2400 "FALSE_CARRIER_DETECTED", 2401 "FAR_END_FAULT_EN", 2402 "FAST_ACQ_EN_FORCE_R", 2403 "FAST_ACQ_EN_R", 2404 "FAST_TIMERS", 2405 "FAST_UNLOCK_TIMER", 2406 "FAULTING", 2407 "FIBER_MODE_1000X", 2408 "FIBER_PWRDWN", 2409 "FIBER_PWRDWN_STATUS_CHG", 2410 "FIFO_ELASICITY_TX", 2411 "FIFO_ELASTICITY_RX", 2412 "FIFO_ERR_CYA", 2413 "FIFO_IPG_CYA", 2414 "FILTER_BAND", 2415 "FILTER_FORCE_LINK", 2416 "FIX_10UNITS_EN", 2417 "FLIP_EYEMON_POLARITY", 2418 "FLIP_PEAK_POLARITY", 2419 "FLIP_ZERO_POLARITY", 2420 "FORCERXSEQDONE_SM", 2421 "FORCE_DIV5_FOR_LXCK25", 2422 "FORCE_EXT_FRST_SM", 2423 "FORCE_GB_BYPASS_EN", 2424 "FORCE_GB_BYPASS_VAL", 2425 "FORCE_LINK", 2426 "FORCE_LN_MODE", 2427 "FORCE_LOCK", 2428 "FORCE_OSCDR_MODE", 2429 "FORCE_RX_DIG_LNSWAP_SEL", 2430 "FORCE_RX_QUAL", 2431 "FORCE_SPEED", 2432 "FORCE_TXCLK", 2433 "FORCE_TXFIFO_ON", 2434 "FORCE_TX_ANA_LNSWAP_SEL", 2435 "FORCE_XMIT_DATA_ON_TXSIDE", 2436 "FPAT_MD", 2437 "FREQ_EN", 2438 "FREQ_OVERRIDE_EN", 2439 "FREQ_OVERRIDE_VAL", 2440 "FREQ_SEL", 2441 "FREQ_SEL_FORCE", 2442 "FREQ_SEL_RX", 2443 "FREQ_SEL_TX", 2444 "FREQ_UPD_EN", 2445 "FULL_DUPLEX", 2446 "FX100_IDLE1", 2447 "FX100_IDLE2", 2448 "FX100_IDLECORR_CNT", 2449 "FX100_IDLE_MAX_THRES", 2450 "FX100_IDLE_MIN_THRES", 2451 "FX100_LINKDN_COUNT", 2452 "FX100_LINKUP_COUNT", 2453 "FX100_LOCK_MAXTIME", 2454 "FX100_LOCK_THRES", 2455 "FX100_UNLOCK_THRES", 2456 "FX_LINKFAIL", 2457 "GENSTAT", 2458 "GLOBAL_PMD_TX_DISABLE", 2459 "GLOOP10G", 2460 "GLOOP1G", 2461 "GLOOPBACK", 2462 "GLOOPOUTDIS", 2463 "GLPBK_CLK_EN", 2464 "GPWRDWN_RX", 2465 "GPWRDWN_TX", 2466 "HALF_DUPLEX", 2467 "HIGIG", 2468 "HIGIGII", 2469 "HIPASS", 2470 "ID3PRESENT", 2471 "ID4PRESENT", 2472 "IDLES_DETECTED", 2473 "IDLES_DETECTED_5B", 2474 "IDLE_DETECT_STATE", 2475 "IDLE_ENA", 2476 "IEEE_BLKSEL_AUTODET", 2477 "IEEE_BLKSEL_VAL", 2478 "IJ_DETECTED", 2479 "INDCK_MODE_EN_RX_FORCE", 2480 "INDCK_MODE_EN_RX_VAL", 2481 "INPUTERM_CMULT_EN", 2482 "INPUTERM_CM_EN", 2483 "INPUTERM_LOWZGND_EN", 2484 "INPUTERM_LOWZVDD_EN", 2485 "INTEG_CLR", 2486 "INTEG_MODE_SM", 2487 "INTERP_CTRL_PHS", 2488 "INTERP_CTRL_QUADRANT", 2489 "INTERP_OVERRIDE", 2490 "INTN_FB_EN", 2491 "INT_DIV_EN", 2492 "INVERT_EXT_PHY_CRS", 2493 "INVERT_RX_SIGDET", 2494 "INVERT_SIGNAL_DETECT", 2495 "INV_VCO_CAL", 2496 "IPG_SELECT", 2497 "I_NDIV_DITHER_EN", 2498 "I_NDIV_FRAC_17_4", 2499 "I_NDIV_FRAC_3_0", 2500 "I_NDIV_INT_1_0", 2501 "I_NDIV_INT_9_2", 2502 "I_PFD_OFFSET", 2503 "I_PFD_OFFSET_ENLARGE", 2504 "I_PLL_FRAC_MODE", 2505 "I_PLL_SDM_PWRDNB", 2506 "JABBER_DETECT", 2507 "JAM_FALSE_CARRIER_MODE", 2508 "LANEDISABLE", 2509 "LATCH_LINKDOWN", 2510 "LATCH_LINKDOWN_ENABLE", 2511 "LEAKAGE_TEST", 2512 "LFCK_BYPASS", 2513 "LINK", 2514 "LINK10G", 2515 "LINKDOWN_SYNCLOSS", 2516 "LINKMON_CNTR", 2517 "LINK_EN_FORCE_SM", 2518 "LINK_EN_R", 2519 "LINK_FORCE", 2520 "LINK_STATUS", 2521 "LINK_STATUS_CHANGE", 2522 "LINK_STATUS_CHG", 2523 "LMTCAL_ACC", 2524 "LMTCAL_ACC_TIME", 2525 "LMTCAL_ADJ_CNT", 2526 "LMTCAL_ADJ_DIR", 2527 "LMTCAL_CONT_ACC_TIME", 2528 "LMTCAL_DONE_OVRD", 2529 "LMTCAL_DONE_OVRD_VAL", 2530 "LMTCAL_EN_OVRD", 2531 "LMTCAL_EN_OVRD_VAL", 2532 "LMTCAL_FALLING_EDGE_EN", 2533 "LMTCAL_INIT_TIME", 2534 "LMTCAL_INTERVAL_TIME", 2535 "LMTCAL_INTV_TIME", 2536 "LMTCAL_KP", 2537 "LMTCAL_MAX_ADJ", 2538 "LMTCAL_PD_POLARITY", 2539 "LMTCAL_RISING_EDGE_EN", 2540 "LMTCAL_STATE", 2541 "LMTCAL_VALID", 2542 "LOCKED", 2543 "LOCK_REF", 2544 "LOCK_REF_EN", 2545 "LOCK_TIMER_EXPIRED", 2546 "LOST_LOCK", 2547 "LPI_EN_RX", 2548 "LPI_EN_TX", 2549 "LV_EN", 2550 "MAIN_CONTROL", 2551 "MAIN_PI_BW_SEL", 2552 "MAIN_PI_PWD_LVL2PI", 2553 "MANUAL_SPEED0", 2554 "MANUAL_SPEED1", 2555 "MDIO_CONT_EN", 2556 "MDIO_EM_ERR_CNT_CLR", 2557 "MDIO_EM_ERR_CNT_FRZ", 2558 "MDIO_EM_PWRDN", 2559 "MDIO_FORCE", 2560 "MESSAGE", 2561 "MESSAGE_PAGE", 2562 "MF_PREAMBLE_SUPRESSION", 2563 "MIIGMIIDLY_EN", 2564 "MIIGMIIMUX_EN", 2565 "MII_RXC_OUT_SM_RST", 2566 "MII_RXC_OUT_SW_EN", 2567 "MII_RXC_OUT_SW_REF", 2568 "MISCRXSTATUS_SEL", 2569 "MMD_DEVICETYPE", 2570 "MMD_DIV_RANGE", 2571 "MMD_EN", 2572 "MMD_PORT", 2573 "MMD_PRSC4OR5PWDB", 2574 "MMD_PRSC8OR9PWDB", 2575 "MMD_RESETB", 2576 "MODE", 2577 "MODEL_NUMBER", 2578 "MODE_CHANGE", 2579 "MODE_CHG_NRST", 2580 "MODE_TX", 2581 "MULTIMMDS_EN", 2582 "MULTIPLICITY", 2583 "MULTIPRTS_EN", 2584 "NEXT_PAGE", 2585 "NEXT_PAGE_ABILITY", 2586 "NOISE_CNCL_BIAS", 2587 "NUMBER_OF_IDLE", 2588 "OVERRIDE_SIGDET_EN", 2589 "OVERRIDE_SIGDET_VAL", 2590 "PAGE_RECEIVED", 2591 "PARDET10G_PWRDNLINK_EN", 2592 "PATGEN_LPI_EN", 2593 "PATTERN_GEN_ACTIVE", 2594 "PATTERN_GEN_FSM", 2595 "PAUSE", 2596 "PAUSE_RESOLUTION_RXSIDE", 2597 "PAUSE_RESOLUTION_TXSIDE", 2598 "PCIE", 2599 "PCIE_II", 2600 "PCKT_EN", 2601 "PCKT_STRT", 2602 "PCMP_EN", 2603 "PCS_DEV_EN_OVERRIDE", 2604 "PD_BIAS", 2605 "PD_EQZ", 2606 "PD_LMTNG", 2607 "PD_PARK_AN", 2608 "PGEN_EN", 2609 "PHASE_DEC_SM", 2610 "PHASE_DELTA", 2611 "PHASE_DELTA_SM", 2612 "PHASE_FRZ_1", 2613 "PHASE_FRZ_1_EN", 2614 "PHASE_INC_SM", 2615 "PHASE_OVERRIDE_SM", 2616 "PHASE_SAT_CTRL", 2617 "PHASE_SEL_SM", 2618 "PHASE_STEP", 2619 "PHASE_STROBE_SM", 2620 "PHFREQ_RST_DIS_FST_SM", 2621 "PHFREQ_RST_DIS_NRML_SM", 2622 "PHSACQ_DIR", 2623 "PHSACQ_ENABLE", 2624 "PHSACQ_FREQ_SEL", 2625 "PHSACQ_STEP", 2626 "PHSACQ_TIMEOUT", 2627 "PHS_COUNTER_CLR", 2628 "PING_PONG_DISABLE", 2629 "PI_BW_SEL", 2630 "PI_CLK90_OFFSET_OVERRIDE", 2631 "PI_EYEM_ENABLE", 2632 "PI_LOWVDD_ENB", 2633 "PI_MAIN_ENABLE", 2634 "PI_PHASE_INVERT", 2635 "PI_PHASE_ROTATE_OVERRIDE", 2636 "PKT_COUNT_EN", 2637 "PKT_SIZE", 2638 "PLL_BYPASS", 2639 "PLL_CLK125_SW_EN", 2640 "PLL_CLK125_SW_REF", 2641 "PLL_LOCK_RSTB_R", 2642 "PLL_MODE", 2643 "PLL_PON", 2644 "PMA_PMD_FORCED_SPEED_ENC_EN", 2645 "PMD_DEV_EN_OVERRIDE", 2646 "PMD_LANE0_TX_DISABLE", 2647 "PM_RXLIMITAMPCALBYP", 2648 "PM_RXSLICERCALBYP", 2649 "POST_CONTROL", 2650 "POST_ENABLE", 2651 "PRBS_CLR_DIS", 2652 "PRBS_EN", 2653 "PRBS_EN0", 2654 "PRBS_EN1", 2655 "PRBS_EN2", 2656 "PRBS_EN3", 2657 "PRBS_INV0", 2658 "PRBS_INV1", 2659 "PRBS_INV2", 2660 "PRBS_INV3", 2661 "PRBS_ORDER0", 2662 "PRBS_ORDER1", 2663 "PRBS_ORDER2", 2664 "PRBS_ORDER3", 2665 "PRE_EMPH_STAIR_EN", 2666 "PRE_EMPH_STAIR_REV_EN", 2667 "PWD_LVL2PI", 2668 "PWRDN_EXT_DIS", 2669 "PWRDN_RX", 2670 "PWRDN_SAFE_DIS", 2671 "PWRDN_TX", 2672 "PWRDWN_CLKS_EN", 2673 "PWRDWN_FORCE", 2674 "PWRDWN_PLL", 2675 "PWRDWN_SW", 2676 "PWRDWN_SW_10G", 2677 "QUARTER_UNIT_EN", 2678 "RANGE_DFS", 2679 "RANGE_OVRD", 2680 "RANGE_OVRD_VAL", 2681 "RATE_SELECT", 2682 "RECAL_IND", 2683 "RECAL_IND_CLR", 2684 "RECAL_NEG_THRES", 2685 "RECAL_POS_THRES", 2686 "REFCLK_IN_BIAS", 2687 "REFCLK_SEL", 2688 "REF_DOUBLER_EN", 2689 "REGID", 2690 "REMOTEPHY_AUTOSEL", 2691 "REMOTE_FAULT", 2692 "REMOTE_LOOPBACK", 2693 "RESERVED_0", 2694 "RESERVED_100", 2695 "RESERVED_105_103", 2696 "RESERVED_143_129", 2697 "RESERVED_14_12", 2698 "RESERVED_14_13", 2699 "RESERVED_21", 2700 "RESERVED_26_17", 2701 "RESERVED_29", 2702 "RESERVED_31_28", 2703 "RESERVED_32", 2704 "RESERVED_33_32", 2705 "RESERVED_3_2", 2706 "RESERVED_41", 2707 "RESERVED_47_39", 2708 "RESERVED_5", 2709 "RESERVED_52_48", 2710 "RESERVED_5_3", 2711 "RESERVED_6", 2712 "RESERVED_63_48", 2713 "RESERVED_63_58", 2714 "RESERVED_7", 2715 "RESERVED_74_71", 2716 "RESERVED_84", 2717 "RESERVED_9", 2718 "RESERVED_96", 2719 "RESET_ANLG", 2720 "RESET_MDIO", 2721 "RESET_PLL", 2722 "RESET_RX", 2723 "RESET_RXFIFO", 2724 "RESET_TX", 2725 "RESTART_AUTONEG", 2726 "REV_LETTER", 2727 "REV_NUMBER", 2728 "RFIFO_20TO20_PTR_SW_RST", 2729 "RISING_EDGE", 2730 "RLFIFO_TSTSEL", 2731 "RLOOP", 2732 "RLOOP1G", 2733 "RLPBK_RXRST_EN", 2734 "RLPBK_SW_FORCE", 2735 "RLTXFERR_STKY", 2736 "RPAR", 2737 "RST_HW", 2738 "RST_SW", 2739 "RTBI_CKFLIP", 2740 "RTBI_FLIP", 2741 "RUDI_C", 2742 "RUDI_I", 2743 "RUDI_INVALID", 2744 "RUN_PATTERN_GEN", 2745 "RX0_DIG_LNSWAP_SEL", 2746 "RX0_LNSWAP_SEL", 2747 "RX1G_MODE_LN0", 2748 "RX1G_MODE_LN1", 2749 "RX1G_MODE_LN2", 2750 "RX1G_MODE_LN3", 2751 "RX1_DIG_LNSWAP_SEL", 2752 "RX1_LNSWAP_SEL", 2753 "RX2_DIG_LNSWAP_SEL", 2754 "RX2_LNSWAP_SEL", 2755 "RX3_DIG_LNSWAP_SEL", 2756 "RX3_LNSWAP_SEL", 2757 "RXCKPL_SEL_COMBO", 2758 "RXDATA_SEL", 2759 "RXDETECT_TH", 2760 "RXD_DEC_SEL", 2761 "RXFIFO_ERR_DETECTED", 2762 "RXFIFO_GMII_RESET", 2763 "RXPKTCNT", 2764 "RXSEQRESTART_SM", 2765 "RXSEQSTART_EXT_DIS", 2766 "RX_AFE_ANARXSTS", 2767 "RX_BADEND", 2768 "RX_BADSSD", 2769 "RX_CONFIRMK", 2770 "RX_DATA", 2771 "RX_ERR_DETECTED", 2772 "RX_INTERP_CTRL_CAP", 2773 "RX_INTERP_STATUS_SEL", 2774 "RX_LA_CAL_DONE", 2775 "RX_LMTOFF", 2776 "RX_LMTOFF_OVRD", 2777 "RX_LMTOFF_OVRD_VAL", 2778 "RX_PF_CTRL", 2779 "RX_PHS_INTERP_STATUS", 2780 "RX_POLARITY_FORCE_SM", 2781 "RX_POLARITY_R", 2782 "RX_PON", 2783 "RX_SIGDET_FORCE_R", 2784 "RX_SIGDET_R", 2785 "RX_SLICER_CALVALID_OVRD", 2786 "RX_SLICER_CALVALID_OVRD_VAL", 2787 "RX_SLICER_CAL_DONE", 2788 "RX_SLOFF0_INVALID", 2789 "RX_SLOFF0_OVRD", 2790 "RX_SLOFF0_OVRD_VAL", 2791 "RX_SLOFF1_INVALID", 2792 "RX_SLOFF1_OVRD", 2793 "RX_SLOFF1_OVRD_VAL", 2794 "RX_SLOFF2_INVALID", 2795 "RX_SLOFF2_OVRD", 2796 "RX_SLOFF2_OVRD_VAL", 2797 "RX_SSJ", 2798 "RX_SSK", 2799 "S1000BASE_T_FULL_DUPLEX_CAPABLE", 2800 "S1000BASE_T_HALF_DUPLEX_CAPABLE", 2801 "S1000BASE_X_FULL_DUPLEX_CAPABLE", 2802 "S1000BASE_X_HALF_DUPLEX_CAPABLE", 2803 "S100BASE_T2_FULL_DUPLEX_CAPABLE", 2804 "S100BASE_T2_HALF_DUPLEX_CAPABLE", 2805 "S100BASE_T4_CAPABLE", 2806 "S100BASE_X_FULL_DUPLEX_CAPABLE", 2807 "S100BASE_X_HALF_DUPLEX_CAPABLE", 2808 "S10BASE_T_FULL_DUPLEX_CAPABLE", 2809 "S10BASE_T_HALF_DUPLEX_CAPABLE", 2810 "SCRAMBLER", 2811 "SD_FILTER", 2812 "SD_FILTER_CHG", 2813 "SD_MUX", 2814 "SEL_CLK", 2815 "SEL_FP3CAP", 2816 "SEL_PATTERN_GEN_DATA", 2817 "SEL_RX_PKTS_FOR_CNTR", 2818 "SERDESMODE_EN_TX", 2819 "SGMII_MASTER_MODE", 2820 "SGMII_MODE", 2821 "SGMII_MODE_CHANGE", 2822 "SGMII_SELECTOR_MISMATCH", 2823 "SIGDETECTED_EN_SM", 2824 "SIGDETMONITOR_EN_SM", 2825 "SIGDETRESTART_EN_SM", 2826 "SIGDETTIME_SM", 2827 "SIGDET_BYPASS", 2828 "SIGDET_MODESELECT", 2829 "SIGDET_MUX_SM", 2830 "SIGDET_PD", 2831 "SIGDET_THRESHOLD", 2832 "SIGDET_USB_EN", 2833 "SIGNAL_DETECT_EN", 2834 "SINGLE_PASS_MODE", 2835 "SKIP_CRC", 2836 "SLCAL_ACC_OPT", 2837 "SLCAL_DN_THRES", 2838 "SLCAL_EN_OVRD", 2839 "SLCAL_EN_OVRD_VAL", 2840 "SLCAL_INIT_TIME", 2841 "SLCAL_POL", 2842 "SLCAL_STATE", 2843 "SLCAL_UP_THRES", 2844 "SLCAL_VALID_OVRD", 2845 "SLCAL_VALID_OVRD_VAL", 2846 "SLEW_RATE_CONTROL", 2847 "SLICER_INTERVAL_TIME", 2848 "SLICER_PD", 2849 "SLOFFX_VAL", 2850 "SPD_RSTB_DIS_SM", 2851 "SPEEDSELECTION0", 2852 "SPEEDSELECTION1", 2853 "SPEEDSELECTION2", 2854 "SPEED_STATUS", 2855 "SSD_DETECTED", 2856 "STAMUXREGDIS", 2857 "START_SEQUENCER", 2858 "STATUS_SEL", 2859 "STEP_ONE", 2860 "STEP_TWO", 2861 "SYNC_STATUS_FAIL", 2862 "SYNC_STATUS_FORCE_R", 2863 "SYNC_STATUS_FORCE_R_SM", 2864 "SYNC_STATUS_FORCE_SYNC_SM", 2865 "SYNC_STATUS_OK", 2866 "TBI_MODE", 2867 "TCA_FINE_TIMER", 2868 "TCEST_NEG", 2869 "TECH_PROC", 2870 "TESTCK_EN", 2871 "TESTCLK_EN", 2872 "TESTMUXSELECT_SM", 2873 "TESTSEL", 2874 "TEST_AMP", 2875 "TEST_CNTR", 2876 "TEST_MONITOR_MODE1", 2877 "TEST_MONITOR_MODE2", 2878 "TEST_PLL_MODE", 2879 "TEST_SEL", 2880 "TEST_VC", 2881 "TICKSEL", 2882 "TMUX_EN", 2883 "TMUX_SEL", 2884 "TOGGLE", 2885 "TPCTRL_SM", 2886 "TPOUT1", 2887 "TPOUT2", 2888 "TRANSMIT_IDLEJAM_SEQ_TEST", 2889 "TRANSMIT_PACKET_SEQ_TEST", 2890 "TX0_ANA_LNSWAP_SEL", 2891 "TX0_LNSWAP_SEL", 2892 "TX1G_FIFO_RST", 2893 "TX1G_MODE_LN0", 2894 "TX1G_MODE_LN1", 2895 "TX1G_MODE_LN2", 2896 "TX1G_MODE_LN3", 2897 "TX1_ANA_LNSWAP_SEL", 2898 "TX1_LNSWAP_SEL", 2899 "TX2_ANA_LNSWAP_SEL", 2900 "TX2_LNSWAP_SEL", 2901 "TX3_ANA_LNSWAP_SEL", 2902 "TX3_LNSWAP_SEL", 2903 "TXCKO_DIV", 2904 "TXCK_DME_EN_SM", 2905 "TXDISABLE_LN", 2906 "TXFERR_STKY", 2907 "TXFIFO_BYPASS", 2908 "TXFIFO_ERR_DETECTED", 2909 "TXMDIOTSTDATAH", 2910 "TXMDIOTSTDATAL", 2911 "TXPAT_EN", 2912 "TXPKTCNT", 2913 "TXPLL_LOCK", 2914 "TXPOL_FLIP", 2915 "TXTESTMUXSEL", 2916 "TX_CONFIG_REG_SEL", 2917 "TX_DATAI_PRBS_SEL_0", 2918 "TX_DATAI_PRBS_SEL_1", 2919 "TX_DATAI_PRBS_SEL_2", 2920 "TX_DATAI_PRBS_SEL_3", 2921 "TX_ELECIDLE", 2922 "TX_ERR", 2923 "TX_ERR_DETECTED", 2924 "TX_ESR", 2925 "TX_EST", 2926 "TX_FIFO_RST", 2927 "TX_MDATA_EN", 2928 "TX_PON", 2929 "TX_PWRDN", 2930 "TX_RATESELECT", 2931 "TX_RESET", 2932 "TX_SEJ", 2933 "TX_SEK", 2934 "TX_SSJ", 2935 "TX_SSK", 2936 "TX_TDATA", 2937 "TX_TERROR", 2938 "TX_UNDERRUN_1000_DIS", 2939 "UNICOREMODE10GCX4", 2940 "UNICOREMODE10GHIG", 2941 "UP_SLOFFX_VAL", 2942 "VCO_ICTR", 2943 "VCO_RANGE", 2944 "VDD1P0_ENB", 2945 "VDD1P0_PLL_EN", 2946 "VDD_NOISE_CNCL_EN", 2947 "VDD_NOISE_SHAPE", 2948 "XGXS_SEL", 2949 "XTAL_BIAS", 2950 "XTAL_CORE_BIAS", 2951 "ZERO_COMMA_DETECTOR_PHASE", 2952 "ZERO_RXDGMII", 2953 }; 2954 2955 #endif 2956 #endif 2957 #endif 2958 #endif /* PHYMOD_CONFIG_INCLUDE_FIELD_INFO */ 2959 2960 2961 2962 /******************************************************************************* 2963 * 2964 * The following is the symbol table itself. 2965 * It defines the entries for all registers and memories. 2966 * It also incorporates the field information for each register and memory if 2967 * applicable. 2968 */ 2969 static const phymod_symbol_t bcmi_viper_xgxs_syms[] = { 2970 #ifndef PHYMOD_CONFIG_EXCLUDE_CHIP_SYMBOLS_BCMI_VIPER_XGXS 2971 { 2972 BCMI_VIPER_XGXS_MIICTLr, 2973 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2974 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 2975 BCMI_VIPER_XGXS_MIICTLr_fields, 2976 #else 2977 0, 2978 #endif 2979 #endif 2980 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2981 PHYMOD_SYMBOL_FLAG_REGISTER, 2982 "MIICTLr", 2983 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2984 "CL22_B0_MIICNTL", 2985 NULL, 2986 #endif 2987 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2988 0x140, /* 320 */ 2989 0, 2990 #endif 2991 }, 2992 { 2993 BCMI_VIPER_XGXS_MIISTATr, 2994 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2995 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 2996 BCMI_VIPER_XGXS_MIISTATr_fields, 2997 #else 2998 0, 2999 #endif 3000 #endif 3001 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3002 PHYMOD_SYMBOL_FLAG_REGISTER, 3003 "MIISTATr", 3004 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3005 "CL22_B0_MIISTAT", 3006 NULL, 3007 #endif 3008 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3009 0x109, /* 265 */ 3010 0, 3011 #endif 3012 }, 3013 { 3014 BCMI_VIPER_XGXS_ID1r, 3015 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3016 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3017 BCMI_VIPER_XGXS_ID1r_fields, 3018 #else 3019 0, 3020 #endif 3021 #endif 3022 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3023 PHYMOD_SYMBOL_FLAG_REGISTER, 3024 "ID1r", 3025 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3026 "CL22_B0_ID1", 3027 NULL, 3028 #endif 3029 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3030 0x143, /* 323 */ 3031 0, 3032 #endif 3033 }, 3034 { 3035 BCMI_VIPER_XGXS_ID2r, 3036 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3037 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3038 BCMI_VIPER_XGXS_ID2r_fields, 3039 #else 3040 0, 3041 #endif 3042 #endif 3043 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3044 PHYMOD_SYMBOL_FLAG_REGISTER, 3045 "ID2r", 3046 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3047 "CL22_B0_ID2", 3048 NULL, 3049 #endif 3050 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3051 0xbff0, /* 49136 */ 3052 0, 3053 #endif 3054 }, 3055 { 3056 BCMI_VIPER_XGXS_AUTONEGADVr, 3057 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3058 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3059 BCMI_VIPER_XGXS_AUTONEGADVr_fields, 3060 #else 3061 0, 3062 #endif 3063 #endif 3064 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3065 PHYMOD_SYMBOL_FLAG_REGISTER, 3066 "AUTONEGADVr", 3067 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3068 "CL22_B0_AUTONEGADV", 3069 NULL, 3070 #endif 3071 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3072 0x20, /* 32 */ 3073 0, 3074 #endif 3075 }, 3076 { 3077 BCMI_VIPER_XGXS_AUTONEGLPABILr, 3078 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3079 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3080 BCMI_VIPER_XGXS_AUTONEGLPABILr_fields, 3081 #else 3082 0, 3083 #endif 3084 #endif 3085 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3086 PHYMOD_SYMBOL_FLAG_REGISTER, 3087 "AUTONEGLPABILr", 3088 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3089 "CL22_B0_AUTONEGLPABIL", 3090 NULL, 3091 #endif 3092 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3093 0x0, /* 0 */ 3094 0, 3095 #endif 3096 }, 3097 { 3098 BCMI_VIPER_XGXS_AUTONEGEXPr, 3099 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3100 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3101 BCMI_VIPER_XGXS_AUTONEGEXPr_fields, 3102 #else 3103 0, 3104 #endif 3105 #endif 3106 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3107 PHYMOD_SYMBOL_FLAG_REGISTER, 3108 "AUTONEGEXPr", 3109 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3110 "CL22_B0_AUTONEGEXP", 3111 NULL, 3112 #endif 3113 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3114 0x4, /* 4 */ 3115 0, 3116 #endif 3117 }, 3118 { 3119 BCMI_VIPER_XGXS_AUTONEGNPr, 3120 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3121 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3122 BCMI_VIPER_XGXS_AUTONEGNPr_fields, 3123 #else 3124 0, 3125 #endif 3126 #endif 3127 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3128 PHYMOD_SYMBOL_FLAG_REGISTER, 3129 "AUTONEGNPr", 3130 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3131 "CL22_B0_AUTONEGNP", 3132 NULL, 3133 #endif 3134 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3135 0x2001, /* 8193 */ 3136 0, 3137 #endif 3138 }, 3139 { 3140 BCMI_VIPER_XGXS_AUTONEGLPABIL2r, 3141 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3142 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3143 BCMI_VIPER_XGXS_AUTONEGLPABIL2r_fields, 3144 #else 3145 0, 3146 #endif 3147 #endif 3148 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3149 PHYMOD_SYMBOL_FLAG_REGISTER, 3150 "AUTONEGLPABIL2r", 3151 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3152 "CL22_B0_AUTONEGLPABIL2", 3153 NULL, 3154 #endif 3155 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3156 0x2001, /* 8193 */ 3157 0, 3158 #endif 3159 }, 3160 { 3161 BCMI_VIPER_XGXS_MIIEXTSTATr, 3162 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3163 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3164 BCMI_VIPER_XGXS_MIIEXTSTATr_fields, 3165 #else 3166 0, 3167 #endif 3168 #endif 3169 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3170 PHYMOD_SYMBOL_FLAG_REGISTER, 3171 "MIIEXTSTATr", 3172 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3173 "CL22_B0_MIIEXTSTAT", 3174 NULL, 3175 #endif 3176 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3177 0x0, /* 0 */ 3178 0, 3179 #endif 3180 }, 3181 { 3182 BCMI_VIPER_XGXS_XGXSCTLr, 3183 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3184 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3185 BCMI_VIPER_XGXS_XGXSCTLr_fields, 3186 #else 3187 0, 3188 #endif 3189 #endif 3190 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3191 PHYMOD_SYMBOL_FLAG_REGISTER, 3192 "XGXSCTLr", 3193 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3194 "BLK0_XGXSCONTROL", 3195 NULL, 3196 #endif 3197 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3198 0x2c2f, /* 11311 */ 3199 0, 3200 #endif 3201 }, 3202 { 3203 BCMI_VIPER_XGXS_MMDSELr, 3204 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3205 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3206 BCMI_VIPER_XGXS_MMDSELr_fields, 3207 #else 3208 0, 3209 #endif 3210 #endif 3211 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3212 PHYMOD_SYMBOL_FLAG_REGISTER, 3213 "MMDSELr", 3214 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3215 "BLK0_MMDSELECT", 3216 NULL, 3217 #endif 3218 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3219 0xf, /* 15 */ 3220 0, 3221 #endif 3222 }, 3223 { 3224 BCMI_VIPER_XGXS_BLK0_MISCCTL1r, 3225 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3226 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3227 BCMI_VIPER_XGXS_BLK0_MISCCTL1r_fields, 3228 #else 3229 0, 3230 #endif 3231 #endif 3232 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3233 PHYMOD_SYMBOL_FLAG_REGISTER, 3234 "BLK0_MISCCTL1r", 3235 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3236 "BLK0_MISCCONTROL1", 3237 NULL, 3238 #endif 3239 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3240 0x0, /* 0 */ 3241 0, 3242 #endif 3243 }, 3244 { 3245 BCMI_VIPER_XGXS_BLKADDR0r, 3246 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3247 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3248 BCMI_VIPER_XGXS_BLKADDR0r_fields, 3249 #else 3250 0, 3251 #endif 3252 #endif 3253 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3254 PHYMOD_SYMBOL_FLAG_REGISTER, 3255 "BLKADDR0r", 3256 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3257 "BLK0_BLOCKADDRESS", 3258 NULL, 3259 #endif 3260 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3261 0x0, /* 0 */ 3262 0, 3263 #endif 3264 }, 3265 { 3266 BCMI_VIPER_XGXS_LANECTL0r, 3267 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3268 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3269 BCMI_VIPER_XGXS_LANECTL0r_fields, 3270 #else 3271 0, 3272 #endif 3273 #endif 3274 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3275 PHYMOD_SYMBOL_FLAG_REGISTER, 3276 "LANECTL0r", 3277 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3278 "BLK1_LANECTRL0", 3279 NULL, 3280 #endif 3281 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3282 0x0, /* 0 */ 3283 0, 3284 #endif 3285 }, 3286 { 3287 BCMI_VIPER_XGXS_LANECTL1r, 3288 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3289 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3290 BCMI_VIPER_XGXS_LANECTL1r_fields, 3291 #else 3292 0, 3293 #endif 3294 #endif 3295 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3296 PHYMOD_SYMBOL_FLAG_REGISTER, 3297 "LANECTL1r", 3298 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3299 "BLK1_LANECTRL1", 3300 NULL, 3301 #endif 3302 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3303 0x0, /* 0 */ 3304 0, 3305 #endif 3306 }, 3307 { 3308 BCMI_VIPER_XGXS_LANECTL2r, 3309 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3310 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3311 BCMI_VIPER_XGXS_LANECTL2r_fields, 3312 #else 3313 0, 3314 #endif 3315 #endif 3316 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3317 PHYMOD_SYMBOL_FLAG_REGISTER, 3318 "LANECTL2r", 3319 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3320 "BLK1_LANECTRL2", 3321 NULL, 3322 #endif 3323 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3324 0xff00, /* 65280 */ 3325 0, 3326 #endif 3327 }, 3328 { 3329 BCMI_VIPER_XGXS_LANECTL3r, 3330 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3331 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3332 BCMI_VIPER_XGXS_LANECTL3r_fields, 3333 #else 3334 0, 3335 #endif 3336 #endif 3337 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3338 PHYMOD_SYMBOL_FLAG_REGISTER, 3339 "LANECTL3r", 3340 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3341 "BLK1_LANECTRL3", 3342 NULL, 3343 #endif 3344 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3345 0x200, /* 512 */ 3346 0, 3347 #endif 3348 }, 3349 { 3350 BCMI_VIPER_XGXS_LANEPRBSr, 3351 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3352 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3353 BCMI_VIPER_XGXS_LANEPRBSr_fields, 3354 #else 3355 0, 3356 #endif 3357 #endif 3358 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3359 PHYMOD_SYMBOL_FLAG_REGISTER, 3360 "LANEPRBSr", 3361 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3362 "BLK1_LANEPRBS", 3363 NULL, 3364 #endif 3365 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3366 0x0, /* 0 */ 3367 0, 3368 #endif 3369 }, 3370 { 3371 BCMI_VIPER_XGXS_LANETESTr, 3372 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3373 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3374 BCMI_VIPER_XGXS_LANETESTr_fields, 3375 #else 3376 0, 3377 #endif 3378 #endif 3379 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3380 PHYMOD_SYMBOL_FLAG_REGISTER, 3381 "LANETESTr", 3382 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3383 "BLK1_LANETEST", 3384 NULL, 3385 #endif 3386 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3387 0x100, /* 256 */ 3388 0, 3389 #endif 3390 }, 3391 { 3392 BCMI_VIPER_XGXS_BLKADDR1r, 3393 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3394 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3395 BCMI_VIPER_XGXS_BLKADDR1r_fields, 3396 #else 3397 0, 3398 #endif 3399 #endif 3400 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3401 PHYMOD_SYMBOL_FLAG_REGISTER, 3402 "BLKADDR1r", 3403 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3404 "BLK1_BLOCKADDRESS", 3405 NULL, 3406 #endif 3407 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3408 0x0, /* 0 */ 3409 0, 3410 #endif 3411 }, 3412 { 3413 BCMI_VIPER_XGXS_PLL_AFE_CTL0r, 3414 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3415 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3416 BCMI_VIPER_XGXS_PLL_AFE_CTL0r_fields, 3417 #else 3418 0, 3419 #endif 3420 #endif 3421 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3422 PHYMOD_SYMBOL_FLAG_REGISTER, 3423 "PLL_AFE_CTL0r", 3424 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3425 "PLL_AFE_CTRL0", 3426 NULL, 3427 #endif 3428 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3429 0x5740, /* 22336 */ 3430 0, 3431 #endif 3432 }, 3433 { 3434 BCMI_VIPER_XGXS_PLL_AFE_CTL1r, 3435 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3436 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3437 BCMI_VIPER_XGXS_PLL_AFE_CTL1r_fields, 3438 #else 3439 0, 3440 #endif 3441 #endif 3442 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3443 PHYMOD_SYMBOL_FLAG_REGISTER, 3444 "PLL_AFE_CTL1r", 3445 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3446 "PLL_AFE_CTRL1", 3447 NULL, 3448 #endif 3449 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3450 0x1d0, /* 464 */ 3451 0, 3452 #endif 3453 }, 3454 { 3455 BCMI_VIPER_XGXS_PLL_AFE_CTL2r, 3456 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3457 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3458 BCMI_VIPER_XGXS_PLL_AFE_CTL2r_fields, 3459 #else 3460 0, 3461 #endif 3462 #endif 3463 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3464 PHYMOD_SYMBOL_FLAG_REGISTER, 3465 "PLL_AFE_CTL2r", 3466 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3467 "PLL_AFE_CTRL2", 3468 NULL, 3469 #endif 3470 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3471 0x19f0, /* 6640 */ 3472 0, 3473 #endif 3474 }, 3475 { 3476 BCMI_VIPER_XGXS_PLL_AFE_CTL3r, 3477 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3478 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3479 BCMI_VIPER_XGXS_PLL_AFE_CTL3r_fields, 3480 #else 3481 0, 3482 #endif 3483 #endif 3484 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3485 PHYMOD_SYMBOL_FLAG_REGISTER, 3486 "PLL_AFE_CTL3r", 3487 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3488 "PLL_AFE_CTRL3", 3489 NULL, 3490 #endif 3491 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3492 0x2b00, /* 11008 */ 3493 0, 3494 #endif 3495 }, 3496 { 3497 BCMI_VIPER_XGXS_PLL_AFE_CTL4r, 3498 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3499 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3500 BCMI_VIPER_XGXS_PLL_AFE_CTL4r_fields, 3501 #else 3502 0, 3503 #endif 3504 #endif 3505 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3506 PHYMOD_SYMBOL_FLAG_REGISTER, 3507 "PLL_AFE_CTL4r", 3508 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3509 "PLL_AFE_CTRL4", 3510 NULL, 3511 #endif 3512 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3513 0x26, /* 38 */ 3514 0, 3515 #endif 3516 }, 3517 { 3518 BCMI_VIPER_XGXS_PLL_AFE_CTL5r, 3519 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3520 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3521 BCMI_VIPER_XGXS_PLL_AFE_CTL5r_fields, 3522 #else 3523 0, 3524 #endif 3525 #endif 3526 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3527 PHYMOD_SYMBOL_FLAG_REGISTER, 3528 "PLL_AFE_CTL5r", 3529 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3530 "PLL_AFE_CTRL5", 3531 NULL, 3532 #endif 3533 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3534 0x44, /* 68 */ 3535 0, 3536 #endif 3537 }, 3538 { 3539 BCMI_VIPER_XGXS_PLL_AFE_CTL6r, 3540 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3541 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3542 BCMI_VIPER_XGXS_PLL_AFE_CTL6r_fields, 3543 #else 3544 0, 3545 #endif 3546 #endif 3547 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3548 PHYMOD_SYMBOL_FLAG_REGISTER, 3549 "PLL_AFE_CTL6r", 3550 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3551 "PLL_AFE_CTRL6", 3552 NULL, 3553 #endif 3554 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3555 0x0, /* 0 */ 3556 0, 3557 #endif 3558 }, 3559 { 3560 BCMI_VIPER_XGXS_PLL_AFE_CTL7r, 3561 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3562 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3563 BCMI_VIPER_XGXS_PLL_AFE_CTL7r_fields, 3564 #else 3565 0, 3566 #endif 3567 #endif 3568 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3569 PHYMOD_SYMBOL_FLAG_REGISTER, 3570 "PLL_AFE_CTL7r", 3571 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3572 "PLL_AFE_CTRL7", 3573 NULL, 3574 #endif 3575 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3576 0x0, /* 0 */ 3577 0, 3578 #endif 3579 }, 3580 { 3581 BCMI_VIPER_XGXS_PLL_AFE_CTL8r, 3582 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3583 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3584 BCMI_VIPER_XGXS_PLL_AFE_CTL8r_fields, 3585 #else 3586 0, 3587 #endif 3588 #endif 3589 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3590 PHYMOD_SYMBOL_FLAG_REGISTER, 3591 "PLL_AFE_CTL8r", 3592 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3593 "PLL_AFE_CTRL8", 3594 NULL, 3595 #endif 3596 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3597 0x0, /* 0 */ 3598 0, 3599 #endif 3600 }, 3601 { 3602 BCMI_VIPER_XGXS_PLL_AFE_TCATMR1r, 3603 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3604 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3605 BCMI_VIPER_XGXS_PLL_AFE_TCATMR1r_fields, 3606 #else 3607 0, 3608 #endif 3609 #endif 3610 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3611 PHYMOD_SYMBOL_FLAG_REGISTER, 3612 "PLL_AFE_TCATMR1r", 3613 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3614 "PLL_AFE_TCATIMER1", 3615 NULL, 3616 #endif 3617 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3618 0x400, /* 1024 */ 3619 0, 3620 #endif 3621 }, 3622 { 3623 BCMI_VIPER_XGXS_TX_AFE_ANATXASTS0r, 3624 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3625 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3626 BCMI_VIPER_XGXS_TX_AFE_ANATXASTS0r_fields, 3627 #else 3628 0, 3629 #endif 3630 #endif 3631 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3632 PHYMOD_SYMBOL_FLAG_REGISTER, 3633 "TX_AFE_ANATXASTS0r", 3634 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3635 "TX_AFE_ANATXASTATUS0", 3636 NULL, 3637 #endif 3638 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3639 0x0, /* 0 */ 3640 0, 3641 #endif 3642 }, 3643 { 3644 BCMI_VIPER_XGXS_TX_AFE_ANATXACTL0r, 3645 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3646 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3647 BCMI_VIPER_XGXS_TX_AFE_ANATXACTL0r_fields, 3648 #else 3649 0, 3650 #endif 3651 #endif 3652 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3653 PHYMOD_SYMBOL_FLAG_REGISTER, 3654 "TX_AFE_ANATXACTL0r", 3655 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3656 "TX_AFE_ANATXACONTROL0", 3657 NULL, 3658 #endif 3659 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3660 0x0, /* 0 */ 3661 0, 3662 #endif 3663 }, 3664 { 3665 BCMI_VIPER_XGXS_TX_AFE_ANATXMDATA0r, 3666 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3667 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3668 BCMI_VIPER_XGXS_TX_AFE_ANATXMDATA0r_fields, 3669 #else 3670 0, 3671 #endif 3672 #endif 3673 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3674 PHYMOD_SYMBOL_FLAG_REGISTER, 3675 "TX_AFE_ANATXMDATA0r", 3676 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3677 NULL, 3678 NULL, 3679 #endif 3680 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3681 0x0, /* 0 */ 3682 0, 3683 #endif 3684 }, 3685 { 3686 BCMI_VIPER_XGXS_TX_AFE_ANATXMDATA1r, 3687 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3688 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3689 BCMI_VIPER_XGXS_TX_AFE_ANATXMDATA1r_fields, 3690 #else 3691 0, 3692 #endif 3693 #endif 3694 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3695 PHYMOD_SYMBOL_FLAG_REGISTER, 3696 "TX_AFE_ANATXMDATA1r", 3697 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3698 NULL, 3699 NULL, 3700 #endif 3701 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3702 0x0, /* 0 */ 3703 0, 3704 #endif 3705 }, 3706 { 3707 BCMI_VIPER_XGXS_TX_AFE_CTL0r, 3708 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3709 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3710 BCMI_VIPER_XGXS_TX_AFE_CTL0r_fields, 3711 #else 3712 0, 3713 #endif 3714 #endif 3715 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3716 PHYMOD_SYMBOL_FLAG_REGISTER, 3717 "TX_AFE_CTL0r", 3718 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3719 "TX_AFE_CONTROL0", 3720 NULL, 3721 #endif 3722 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3723 0x3220, /* 12832 */ 3724 0, 3725 #endif 3726 }, 3727 { 3728 BCMI_VIPER_XGXS_TX_AFE_CTL1r, 3729 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3730 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3731 BCMI_VIPER_XGXS_TX_AFE_CTL1r_fields, 3732 #else 3733 0, 3734 #endif 3735 #endif 3736 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3737 PHYMOD_SYMBOL_FLAG_REGISTER, 3738 "TX_AFE_CTL1r", 3739 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3740 "TX_AFE_CONTROL1", 3741 NULL, 3742 #endif 3743 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3744 0x8009, /* 32777 */ 3745 0, 3746 #endif 3747 }, 3748 { 3749 BCMI_VIPER_XGXS_TX_AFE_CTL2r, 3750 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3751 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3752 BCMI_VIPER_XGXS_TX_AFE_CTL2r_fields, 3753 #else 3754 0, 3755 #endif 3756 #endif 3757 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3758 PHYMOD_SYMBOL_FLAG_REGISTER, 3759 "TX_AFE_CTL2r", 3760 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3761 "TX_AFE_CONTROL2", 3762 NULL, 3763 #endif 3764 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3765 0x38, /* 56 */ 3766 0, 3767 #endif 3768 }, 3769 { 3770 BCMI_VIPER_XGXS_TX_AFE_CTL3r, 3771 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3772 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3773 BCMI_VIPER_XGXS_TX_AFE_CTL3r_fields, 3774 #else 3775 0, 3776 #endif 3777 #endif 3778 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3779 PHYMOD_SYMBOL_FLAG_REGISTER, 3780 "TX_AFE_CTL3r", 3781 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3782 "TX_AFE_CONTROL3", 3783 NULL, 3784 #endif 3785 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3786 0x16, /* 22 */ 3787 0, 3788 #endif 3789 }, 3790 { 3791 BCMI_VIPER_XGXS_TX_AFE_INTERPr, 3792 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3793 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3794 BCMI_VIPER_XGXS_TX_AFE_INTERPr_fields, 3795 #else 3796 0, 3797 #endif 3798 #endif 3799 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3800 PHYMOD_SYMBOL_FLAG_REGISTER, 3801 "TX_AFE_INTERPr", 3802 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3803 NULL, 3804 NULL, 3805 #endif 3806 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3807 0x0, /* 0 */ 3808 0, 3809 #endif 3810 }, 3811 { 3812 BCMI_VIPER_XGXS_RX_AFE_ANARXSTSr, 3813 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3814 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3815 BCMI_VIPER_XGXS_RX_AFE_ANARXSTSr_fields, 3816 #else 3817 0, 3818 #endif 3819 #endif 3820 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3821 PHYMOD_SYMBOL_FLAG_REGISTER, 3822 "RX_AFE_ANARXSTSr", 3823 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3824 "RX_AFE_ANARXSTATUS", 3825 NULL, 3826 #endif 3827 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3828 0x0, /* 0 */ 3829 0, 3830 #endif 3831 }, 3832 { 3833 BCMI_VIPER_XGXS_RX_AFE_ANARXCTLr, 3834 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3835 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3836 BCMI_VIPER_XGXS_RX_AFE_ANARXCTLr_fields, 3837 #else 3838 0, 3839 #endif 3840 #endif 3841 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3842 PHYMOD_SYMBOL_FLAG_REGISTER, 3843 "RX_AFE_ANARXCTLr", 3844 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3845 "RX_AFE_ANARXCONTROL", 3846 NULL, 3847 #endif 3848 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3849 0x1c40, /* 7232 */ 3850 0, 3851 #endif 3852 }, 3853 { 3854 BCMI_VIPER_XGXS_RX_AFE_CTL0r, 3855 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3856 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3857 BCMI_VIPER_XGXS_RX_AFE_CTL0r_fields, 3858 #else 3859 0, 3860 #endif 3861 #endif 3862 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3863 PHYMOD_SYMBOL_FLAG_REGISTER, 3864 "RX_AFE_CTL0r", 3865 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3866 "RX_AFE_CTRL0", 3867 NULL, 3868 #endif 3869 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3870 0x780, /* 1920 */ 3871 0, 3872 #endif 3873 }, 3874 { 3875 BCMI_VIPER_XGXS_RX_AFE_CTL1r, 3876 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3877 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3878 BCMI_VIPER_XGXS_RX_AFE_CTL1r_fields, 3879 #else 3880 0, 3881 #endif 3882 #endif 3883 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3884 PHYMOD_SYMBOL_FLAG_REGISTER, 3885 "RX_AFE_CTL1r", 3886 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3887 "RX_AFE_CTRL1", 3888 NULL, 3889 #endif 3890 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3891 0x8001, /* 32769 */ 3892 0, 3893 #endif 3894 }, 3895 { 3896 BCMI_VIPER_XGXS_RX_AFE_ANARXSIGDETr, 3897 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3898 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3899 BCMI_VIPER_XGXS_RX_AFE_ANARXSIGDETr_fields, 3900 #else 3901 0, 3902 #endif 3903 #endif 3904 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3905 PHYMOD_SYMBOL_FLAG_REGISTER, 3906 "RX_AFE_ANARXSIGDETr", 3907 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3908 NULL, 3909 NULL, 3910 #endif 3911 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3912 0x20, /* 32 */ 3913 0, 3914 #endif 3915 }, 3916 { 3917 BCMI_VIPER_XGXS_RX_AFE_CTL2r, 3918 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3919 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3920 BCMI_VIPER_XGXS_RX_AFE_CTL2r_fields, 3921 #else 3922 0, 3923 #endif 3924 #endif 3925 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3926 PHYMOD_SYMBOL_FLAG_REGISTER, 3927 "RX_AFE_CTL2r", 3928 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3929 "RX_AFE_CTRL2", 3930 NULL, 3931 #endif 3932 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3933 0xa, /* 10 */ 3934 0, 3935 #endif 3936 }, 3937 { 3938 BCMI_VIPER_XGXS_RX_AFE_CTL3r, 3939 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3940 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3941 BCMI_VIPER_XGXS_RX_AFE_CTL3r_fields, 3942 #else 3943 0, 3944 #endif 3945 #endif 3946 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3947 PHYMOD_SYMBOL_FLAG_REGISTER, 3948 "RX_AFE_CTL3r", 3949 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3950 "RX_AFE_CTRL3", 3951 NULL, 3952 #endif 3953 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3954 0xc0, /* 192 */ 3955 0, 3956 #endif 3957 }, 3958 { 3959 BCMI_VIPER_XGXS_RX_AFE_CTL4r, 3960 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3961 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3962 BCMI_VIPER_XGXS_RX_AFE_CTL4r_fields, 3963 #else 3964 0, 3965 #endif 3966 #endif 3967 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3968 PHYMOD_SYMBOL_FLAG_REGISTER, 3969 "RX_AFE_CTL4r", 3970 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3971 "RX_AFE_CTRL4", 3972 NULL, 3973 #endif 3974 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3975 0x492, /* 1170 */ 3976 0, 3977 #endif 3978 }, 3979 { 3980 BCMI_VIPER_XGXS_RX_AFE_ANARXTESTr, 3981 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3982 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 3983 BCMI_VIPER_XGXS_RX_AFE_ANARXTESTr_fields, 3984 #else 3985 0, 3986 #endif 3987 #endif 3988 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3989 PHYMOD_SYMBOL_FLAG_REGISTER, 3990 "RX_AFE_ANARXTESTr", 3991 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3992 NULL, 3993 NULL, 3994 #endif 3995 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3996 0x0, /* 0 */ 3997 0, 3998 #endif 3999 }, 4000 { 4001 BCMI_VIPER_XGXS_RX_AFE_ANARXCTL1Gr, 4002 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4003 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4004 BCMI_VIPER_XGXS_RX_AFE_ANARXCTL1Gr_fields, 4005 #else 4006 0, 4007 #endif 4008 #endif 4009 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4010 PHYMOD_SYMBOL_FLAG_REGISTER, 4011 "RX_AFE_ANARXCTL1Gr", 4012 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4013 "RX_AFE_ANARXCONTROL1G", 4014 NULL, 4015 #endif 4016 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4017 0x80, /* 128 */ 4018 0, 4019 #endif 4020 }, 4021 { 4022 BCMI_VIPER_XGXS_RX_AFE_ANARXCTLPCIr, 4023 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4024 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4025 BCMI_VIPER_XGXS_RX_AFE_ANARXCTLPCIr_fields, 4026 #else 4027 0, 4028 #endif 4029 #endif 4030 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4031 PHYMOD_SYMBOL_FLAG_REGISTER, 4032 "RX_AFE_ANARXCTLPCIr", 4033 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4034 "RX_AFE_ANARXCONTROLPCI", 4035 NULL, 4036 #endif 4037 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4038 0x10, /* 16 */ 4039 0, 4040 #endif 4041 }, 4042 { 4043 BCMI_VIPER_XGXS_RX_AFE_ANARXASTSr, 4044 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4045 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4046 BCMI_VIPER_XGXS_RX_AFE_ANARXASTSr_fields, 4047 #else 4048 0, 4049 #endif 4050 #endif 4051 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4052 PHYMOD_SYMBOL_FLAG_REGISTER, 4053 "RX_AFE_ANARXASTSr", 4054 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4055 "RX_AFE_ANARXASTATUS", 4056 NULL, 4057 #endif 4058 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4059 0x0, /* 0 */ 4060 0, 4061 #endif 4062 }, 4063 { 4064 BCMI_VIPER_XGXS_RX_AFE_CTL5r, 4065 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4066 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4067 BCMI_VIPER_XGXS_RX_AFE_CTL5r_fields, 4068 #else 4069 0, 4070 #endif 4071 #endif 4072 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4073 PHYMOD_SYMBOL_FLAG_REGISTER, 4074 "RX_AFE_CTL5r", 4075 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4076 "RX_AFE_CTRL5", 4077 NULL, 4078 #endif 4079 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4080 0x2c0e, /* 11278 */ 4081 0, 4082 #endif 4083 }, 4084 { 4085 BCMI_VIPER_XGXS_RX_AFE_CTL6r, 4086 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4087 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4088 BCMI_VIPER_XGXS_RX_AFE_CTL6r_fields, 4089 #else 4090 0, 4091 #endif 4092 #endif 4093 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4094 PHYMOD_SYMBOL_FLAG_REGISTER, 4095 "RX_AFE_CTL6r", 4096 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4097 "RX_AFE_CTRL6", 4098 NULL, 4099 #endif 4100 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4101 0x44, /* 68 */ 4102 0, 4103 #endif 4104 }, 4105 { 4106 BCMI_VIPER_XGXS_UNICOREMODE10Gr, 4107 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4108 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4109 BCMI_VIPER_XGXS_UNICOREMODE10Gr_fields, 4110 #else 4111 0, 4112 #endif 4113 #endif 4114 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4115 PHYMOD_SYMBOL_FLAG_REGISTER, 4116 "UNICOREMODE10Gr", 4117 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4118 "BLK2_UNICOREMODE10G", 4119 NULL, 4120 #endif 4121 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4122 0x0, /* 0 */ 4123 0, 4124 #endif 4125 }, 4126 { 4127 BCMI_VIPER_XGXS_BLK2_TESTMODELANEr, 4128 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4129 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4130 BCMI_VIPER_XGXS_BLK2_TESTMODELANEr_fields, 4131 #else 4132 0, 4133 #endif 4134 #endif 4135 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4136 PHYMOD_SYMBOL_FLAG_REGISTER, 4137 "BLK2_TESTMODELANEr", 4138 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4139 NULL, 4140 NULL, 4141 #endif 4142 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4143 0x0, /* 0 */ 4144 0, 4145 #endif 4146 }, 4147 { 4148 BCMI_VIPER_XGXS_BLK2_TESTMODECOMBOr, 4149 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4150 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4151 BCMI_VIPER_XGXS_BLK2_TESTMODECOMBOr_fields, 4152 #else 4153 0, 4154 #endif 4155 #endif 4156 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4157 PHYMOD_SYMBOL_FLAG_REGISTER, 4158 "BLK2_TESTMODECOMBOr", 4159 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4160 NULL, 4161 NULL, 4162 #endif 4163 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4164 0x0, /* 0 */ 4165 0, 4166 #endif 4167 }, 4168 { 4169 BCMI_VIPER_XGXS_BLK2_TESTMODEMUXr, 4170 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4171 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4172 BCMI_VIPER_XGXS_BLK2_TESTMODEMUXr_fields, 4173 #else 4174 0, 4175 #endif 4176 #endif 4177 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4178 PHYMOD_SYMBOL_FLAG_REGISTER, 4179 "BLK2_TESTMODEMUXr", 4180 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4181 NULL, 4182 NULL, 4183 #endif 4184 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4185 0x0, /* 0 */ 4186 0, 4187 #endif 4188 }, 4189 { 4190 BCMI_VIPER_XGXS_CX4SIGDETCNTr, 4191 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4192 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4193 BCMI_VIPER_XGXS_CX4SIGDETCNTr_fields, 4194 #else 4195 0, 4196 #endif 4197 #endif 4198 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4199 PHYMOD_SYMBOL_FLAG_REGISTER, 4200 "CX4SIGDETCNTr", 4201 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4202 "BLK2_CX4SIGDETCNT", 4203 NULL, 4204 #endif 4205 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4206 0x1970, /* 6512 */ 4207 0, 4208 #endif 4209 }, 4210 { 4211 BCMI_VIPER_XGXS_LANERESETr, 4212 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4213 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4214 BCMI_VIPER_XGXS_LANERESETr_fields, 4215 #else 4216 0, 4217 #endif 4218 #endif 4219 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4220 PHYMOD_SYMBOL_FLAG_REGISTER, 4221 "LANERESETr", 4222 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4223 "BLK2_LANERESET", 4224 NULL, 4225 #endif 4226 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4227 0x0, /* 0 */ 4228 0, 4229 #endif 4230 }, 4231 { 4232 BCMI_VIPER_XGXS_XGXSSTS1r, 4233 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4234 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4235 BCMI_VIPER_XGXS_XGXSSTS1r_fields, 4236 #else 4237 0, 4238 #endif 4239 #endif 4240 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4241 PHYMOD_SYMBOL_FLAG_REGISTER, 4242 "XGXSSTS1r", 4243 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4244 "BLK4_XGXSSTATUS1", 4245 NULL, 4246 #endif 4247 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4248 0x0, /* 0 */ 4249 0, 4250 #endif 4251 }, 4252 { 4253 BCMI_VIPER_XGXS_XGXSSTS2r, 4254 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4255 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4256 BCMI_VIPER_XGXS_XGXSSTS2r_fields, 4257 #else 4258 0, 4259 #endif 4260 #endif 4261 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4262 PHYMOD_SYMBOL_FLAG_REGISTER, 4263 "XGXSSTS2r", 4264 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4265 "BLK4_XGXSSTATUS2", 4266 NULL, 4267 #endif 4268 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4269 0x0, /* 0 */ 4270 0, 4271 #endif 4272 }, 4273 { 4274 BCMI_VIPER_XGXS_BLK4_STS1000X1r, 4275 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4276 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4277 BCMI_VIPER_XGXS_BLK4_STS1000X1r_fields, 4278 #else 4279 0, 4280 #endif 4281 #endif 4282 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4283 PHYMOD_SYMBOL_FLAG_REGISTER, 4284 "BLK4_STS1000X1r", 4285 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4286 "BLK4_STATUS1000X1", 4287 NULL, 4288 #endif 4289 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4290 0x0, /* 0 */ 4291 0, 4292 #endif 4293 }, 4294 { 4295 BCMI_VIPER_XGXS_EEECTLr, 4296 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4297 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4298 BCMI_VIPER_XGXS_EEECTLr_fields, 4299 #else 4300 0, 4301 #endif 4302 #endif 4303 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4304 PHYMOD_SYMBOL_FLAG_REGISTER, 4305 "EEECTLr", 4306 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4307 "BLK7_EEECONTROL", 4308 NULL, 4309 #endif 4310 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4311 0x3, /* 3 */ 4312 0, 4313 #endif 4314 }, 4315 { 4316 BCMI_VIPER_XGXS_PRBS_DECOUPLEr, 4317 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4318 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4319 BCMI_VIPER_XGXS_PRBS_DECOUPLEr_fields, 4320 #else 4321 0, 4322 #endif 4323 #endif 4324 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4325 PHYMOD_SYMBOL_FLAG_REGISTER, 4326 "PRBS_DECOUPLEr", 4327 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4328 "BLK7_PRBS_DECOUPLE", 4329 NULL, 4330 #endif 4331 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4332 0x0, /* 0 */ 4333 0, 4334 #endif 4335 }, 4336 { 4337 BCMI_VIPER_XGXS_TXLNSWP1r, 4338 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4339 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4340 BCMI_VIPER_XGXS_TXLNSWP1r_fields, 4341 #else 4342 0, 4343 #endif 4344 #endif 4345 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4346 PHYMOD_SYMBOL_FLAG_REGISTER, 4347 "TXLNSWP1r", 4348 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4349 "BLK8_TXLNSWAP1", 4350 NULL, 4351 #endif 4352 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4353 0xe4, /* 228 */ 4354 0, 4355 #endif 4356 }, 4357 { 4358 BCMI_VIPER_XGXS_TXLNSWP2r, 4359 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4360 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4361 BCMI_VIPER_XGXS_TXLNSWP2r_fields, 4362 #else 4363 0, 4364 #endif 4365 #endif 4366 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4367 PHYMOD_SYMBOL_FLAG_REGISTER, 4368 "TXLNSWP2r", 4369 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4370 "BLK8_TXLNSWAP2", 4371 NULL, 4372 #endif 4373 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4374 0xe4, /* 228 */ 4375 0, 4376 #endif 4377 }, 4378 { 4379 BCMI_VIPER_XGXS_RXLNSWP1r, 4380 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4381 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4382 BCMI_VIPER_XGXS_RXLNSWP1r_fields, 4383 #else 4384 0, 4385 #endif 4386 #endif 4387 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4388 PHYMOD_SYMBOL_FLAG_REGISTER, 4389 "RXLNSWP1r", 4390 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4391 "BLK8_RXLNSWAP1", 4392 NULL, 4393 #endif 4394 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4395 0xe4, /* 228 */ 4396 0, 4397 #endif 4398 }, 4399 { 4400 BCMI_VIPER_XGXS_RXLNSWP2r, 4401 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4402 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4403 BCMI_VIPER_XGXS_RXLNSWP2r_fields, 4404 #else 4405 0, 4406 #endif 4407 #endif 4408 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4409 PHYMOD_SYMBOL_FLAG_REGISTER, 4410 "RXLNSWP2r", 4411 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4412 "BLK8_RXLNSWAP2", 4413 NULL, 4414 #endif 4415 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4416 0xe4, /* 228 */ 4417 0, 4418 #endif 4419 }, 4420 { 4421 BCMI_VIPER_XGXS_PLL2_STAT0r, 4422 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4423 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4424 BCMI_VIPER_XGXS_PLL2_STAT0r_fields, 4425 #else 4426 0, 4427 #endif 4428 #endif 4429 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4430 PHYMOD_SYMBOL_FLAG_REGISTER, 4431 "PLL2_STAT0r", 4432 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4433 NULL, 4434 NULL, 4435 #endif 4436 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4437 0x422, /* 1058 */ 4438 0, 4439 #endif 4440 }, 4441 { 4442 BCMI_VIPER_XGXS_PLL2_CTL1r, 4443 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4444 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4445 BCMI_VIPER_XGXS_PLL2_CTL1r_fields, 4446 #else 4447 0, 4448 #endif 4449 #endif 4450 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4451 PHYMOD_SYMBOL_FLAG_REGISTER, 4452 "PLL2_CTL1r", 4453 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4454 "PLL2_CTRL1", 4455 NULL, 4456 #endif 4457 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4458 0x300, /* 768 */ 4459 0, 4460 #endif 4461 }, 4462 { 4463 BCMI_VIPER_XGXS_PLL2_CTL2r, 4464 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4465 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4466 BCMI_VIPER_XGXS_PLL2_CTL2r_fields, 4467 #else 4468 0, 4469 #endif 4470 #endif 4471 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4472 PHYMOD_SYMBOL_FLAG_REGISTER, 4473 "PLL2_CTL2r", 4474 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4475 "PLL2_CTRL2", 4476 NULL, 4477 #endif 4478 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4479 0x2000, /* 8192 */ 4480 0, 4481 #endif 4482 }, 4483 { 4484 BCMI_VIPER_XGXS_PLL2_CTL3r, 4485 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4486 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4487 BCMI_VIPER_XGXS_PLL2_CTL3r_fields, 4488 #else 4489 0, 4490 #endif 4491 #endif 4492 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4493 PHYMOD_SYMBOL_FLAG_REGISTER, 4494 "PLL2_CTL3r", 4495 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4496 "PLL2_CTRL3", 4497 NULL, 4498 #endif 4499 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4500 0x1e84, /* 7812 */ 4501 0, 4502 #endif 4503 }, 4504 { 4505 BCMI_VIPER_XGXS_PLL2_CTL4r, 4506 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4507 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4508 BCMI_VIPER_XGXS_PLL2_CTL4r_fields, 4509 #else 4510 0, 4511 #endif 4512 #endif 4513 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4514 PHYMOD_SYMBOL_FLAG_REGISTER, 4515 "PLL2_CTL4r", 4516 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4517 "PLL2_CTRL4", 4518 NULL, 4519 #endif 4520 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4521 0x61a, /* 1562 */ 4522 0, 4523 #endif 4524 }, 4525 { 4526 BCMI_VIPER_XGXS_PLL2_CTL5r, 4527 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4528 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4529 BCMI_VIPER_XGXS_PLL2_CTL5r_fields, 4530 #else 4531 0, 4532 #endif 4533 #endif 4534 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4535 PHYMOD_SYMBOL_FLAG_REGISTER, 4536 "PLL2_CTL5r", 4537 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4538 "PLL2_CTRL5", 4539 NULL, 4540 #endif 4541 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4542 0x3d09, /* 15625 */ 4543 0, 4544 #endif 4545 }, 4546 { 4547 BCMI_VIPER_XGXS_PLL2_CTL6r, 4548 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4549 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4550 BCMI_VIPER_XGXS_PLL2_CTL6r_fields, 4551 #else 4552 0, 4553 #endif 4554 #endif 4555 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4556 PHYMOD_SYMBOL_FLAG_REGISTER, 4557 "PLL2_CTL6r", 4558 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4559 "PLL2_CTRL6", 4560 NULL, 4561 #endif 4562 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4563 0x38, /* 56 */ 4564 0, 4565 #endif 4566 }, 4567 { 4568 BCMI_VIPER_XGXS_DIG_CTL1000X1r, 4569 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4570 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4571 BCMI_VIPER_XGXS_DIG_CTL1000X1r_fields, 4572 #else 4573 0, 4574 #endif 4575 #endif 4576 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4577 PHYMOD_SYMBOL_FLAG_REGISTER, 4578 "DIG_CTL1000X1r", 4579 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4580 "DIGITAL_CONTROL1000X1", 4581 NULL, 4582 #endif 4583 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4584 0x180, /* 384 */ 4585 0, 4586 #endif 4587 }, 4588 { 4589 BCMI_VIPER_XGXS_DIG_CTL1000X2r, 4590 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4591 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4592 BCMI_VIPER_XGXS_DIG_CTL1000X2r_fields, 4593 #else 4594 0, 4595 #endif 4596 #endif 4597 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4598 PHYMOD_SYMBOL_FLAG_REGISTER, 4599 "DIG_CTL1000X2r", 4600 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4601 "DIGITAL_CONTROL1000X2", 4602 NULL, 4603 #endif 4604 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4605 0x6, /* 6 */ 4606 0, 4607 #endif 4608 }, 4609 { 4610 BCMI_VIPER_XGXS_DIG_CTL1000X3r, 4611 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4612 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4613 BCMI_VIPER_XGXS_DIG_CTL1000X3r_fields, 4614 #else 4615 0, 4616 #endif 4617 #endif 4618 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4619 PHYMOD_SYMBOL_FLAG_REGISTER, 4620 "DIG_CTL1000X3r", 4621 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4622 "DIGITAL_CONTROL1000X3", 4623 NULL, 4624 #endif 4625 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4626 0x2, /* 2 */ 4627 0, 4628 #endif 4629 }, 4630 { 4631 BCMI_VIPER_XGXS_DIG_CTL1000X4r, 4632 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4633 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4634 BCMI_VIPER_XGXS_DIG_CTL1000X4r_fields, 4635 #else 4636 0, 4637 #endif 4638 #endif 4639 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4640 PHYMOD_SYMBOL_FLAG_REGISTER, 4641 "DIG_CTL1000X4r", 4642 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4643 "DIGITAL_CONTROL1000X4", 4644 NULL, 4645 #endif 4646 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4647 0x0, /* 0 */ 4648 0, 4649 #endif 4650 }, 4651 { 4652 BCMI_VIPER_XGXS_DIG_STS1000X1r, 4653 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4654 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4655 BCMI_VIPER_XGXS_DIG_STS1000X1r_fields, 4656 #else 4657 0, 4658 #endif 4659 #endif 4660 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4661 PHYMOD_SYMBOL_FLAG_REGISTER, 4662 "DIG_STS1000X1r", 4663 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4664 "DIGITAL_STATUS1000X1", 4665 NULL, 4666 #endif 4667 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4668 0x0, /* 0 */ 4669 0, 4670 #endif 4671 }, 4672 { 4673 BCMI_VIPER_XGXS_DIG_STS1000X2r, 4674 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4675 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4676 BCMI_VIPER_XGXS_DIG_STS1000X2r_fields, 4677 #else 4678 0, 4679 #endif 4680 #endif 4681 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4682 PHYMOD_SYMBOL_FLAG_REGISTER, 4683 "DIG_STS1000X2r", 4684 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4685 "DIGITAL_STATUS1000X2", 4686 NULL, 4687 #endif 4688 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4689 0x0, /* 0 */ 4690 0, 4691 #endif 4692 }, 4693 { 4694 BCMI_VIPER_XGXS_DIG_STS1000X3r, 4695 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4696 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4697 BCMI_VIPER_XGXS_DIG_STS1000X3r_fields, 4698 #else 4699 0, 4700 #endif 4701 #endif 4702 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4703 PHYMOD_SYMBOL_FLAG_REGISTER, 4704 "DIG_STS1000X3r", 4705 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4706 "DIGITAL_STATUS1000X3", 4707 NULL, 4708 #endif 4709 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4710 0x0, /* 0 */ 4711 0, 4712 #endif 4713 }, 4714 { 4715 BCMI_VIPER_XGXS_DIG_BADCODEGROUPr, 4716 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4717 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4718 BCMI_VIPER_XGXS_DIG_BADCODEGROUPr_fields, 4719 #else 4720 0, 4721 #endif 4722 #endif 4723 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4724 PHYMOD_SYMBOL_FLAG_REGISTER, 4725 "DIG_BADCODEGROUPr", 4726 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4727 "DIGITAL_BADCODEGROUP", 4728 NULL, 4729 #endif 4730 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4731 0x0, /* 0 */ 4732 0, 4733 #endif 4734 }, 4735 { 4736 BCMI_VIPER_XGXS_DIG_MISC1r, 4737 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4738 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4739 BCMI_VIPER_XGXS_DIG_MISC1r_fields, 4740 #else 4741 0, 4742 #endif 4743 #endif 4744 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4745 PHYMOD_SYMBOL_FLAG_REGISTER, 4746 "DIG_MISC1r", 4747 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4748 "DIGITAL_MISC1", 4749 NULL, 4750 #endif 4751 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4752 0xc000, /* 49152 */ 4753 0, 4754 #endif 4755 }, 4756 { 4757 BCMI_VIPER_XGXS_DIG_MISC2r, 4758 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4759 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4760 BCMI_VIPER_XGXS_DIG_MISC2r_fields, 4761 #else 4762 0, 4763 #endif 4764 #endif 4765 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4766 PHYMOD_SYMBOL_FLAG_REGISTER, 4767 "DIG_MISC2r", 4768 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4769 "DIGITAL_MISC2", 4770 NULL, 4771 #endif 4772 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4773 0x2190, /* 8592 */ 4774 0, 4775 #endif 4776 }, 4777 { 4778 BCMI_VIPER_XGXS_DIG_PATGENCTLr, 4779 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4780 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4781 BCMI_VIPER_XGXS_DIG_PATGENCTLr_fields, 4782 #else 4783 0, 4784 #endif 4785 #endif 4786 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4787 PHYMOD_SYMBOL_FLAG_REGISTER, 4788 "DIG_PATGENCTLr", 4789 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4790 "DIGITAL_PATGENCTRL", 4791 NULL, 4792 #endif 4793 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4794 0x820, /* 2080 */ 4795 0, 4796 #endif 4797 }, 4798 { 4799 BCMI_VIPER_XGXS_DIG_PATGENSTATr, 4800 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4801 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4802 BCMI_VIPER_XGXS_DIG_PATGENSTATr_fields, 4803 #else 4804 0, 4805 #endif 4806 #endif 4807 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4808 PHYMOD_SYMBOL_FLAG_REGISTER, 4809 "DIG_PATGENSTATr", 4810 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4811 "DIGITAL_PATGENSTAT", 4812 NULL, 4813 #endif 4814 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4815 0x0, /* 0 */ 4816 0, 4817 #endif 4818 }, 4819 { 4820 BCMI_VIPER_XGXS_DIG_TESTMODEr, 4821 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4822 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4823 BCMI_VIPER_XGXS_DIG_TESTMODEr_fields, 4824 #else 4825 0, 4826 #endif 4827 #endif 4828 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4829 PHYMOD_SYMBOL_FLAG_REGISTER, 4830 "DIG_TESTMODEr", 4831 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4832 "DIGITAL_TESTMODE", 4833 NULL, 4834 #endif 4835 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4836 0x0, /* 0 */ 4837 0, 4838 #endif 4839 }, 4840 { 4841 BCMI_VIPER_XGXS_DIG_TXPKTCNTr, 4842 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4843 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4844 BCMI_VIPER_XGXS_DIG_TXPKTCNTr_fields, 4845 #else 4846 0, 4847 #endif 4848 #endif 4849 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4850 PHYMOD_SYMBOL_FLAG_REGISTER, 4851 "DIG_TXPKTCNTr", 4852 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4853 "DIGITAL_TXPKTCNT", 4854 NULL, 4855 #endif 4856 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4857 0x0, /* 0 */ 4858 0, 4859 #endif 4860 }, 4861 { 4862 BCMI_VIPER_XGXS_DIG_RXPKTCNTr, 4863 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4864 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4865 BCMI_VIPER_XGXS_DIG_RXPKTCNTr_fields, 4866 #else 4867 0, 4868 #endif 4869 #endif 4870 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4871 PHYMOD_SYMBOL_FLAG_REGISTER, 4872 "DIG_RXPKTCNTr", 4873 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4874 "DIGITAL_RXPKTCNT", 4875 NULL, 4876 #endif 4877 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4878 0x0, /* 0 */ 4879 0, 4880 #endif 4881 }, 4882 { 4883 BCMI_VIPER_XGXS_SERDESID0r, 4884 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4885 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4886 BCMI_VIPER_XGXS_SERDESID0r_fields, 4887 #else 4888 0, 4889 #endif 4890 #endif 4891 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4892 PHYMOD_SYMBOL_FLAG_REGISTER, 4893 "SERDESID0r", 4894 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4895 "SERDESID_SERDESID0", 4896 NULL, 4897 #endif 4898 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4899 0x2cf, /* 719 */ 4900 0, 4901 #endif 4902 }, 4903 { 4904 BCMI_VIPER_XGXS_SERDESID1r, 4905 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4906 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4907 BCMI_VIPER_XGXS_SERDESID1r_fields, 4908 #else 4909 0, 4910 #endif 4911 #endif 4912 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4913 PHYMOD_SYMBOL_FLAG_REGISTER, 4914 "SERDESID1r", 4915 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4916 "SERDESID_SERDESID1", 4917 NULL, 4918 #endif 4919 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4920 0x1a00, /* 6656 */ 4921 0, 4922 #endif 4923 }, 4924 { 4925 BCMI_VIPER_XGXS_SERDESID2r, 4926 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4927 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4928 BCMI_VIPER_XGXS_SERDESID2r_fields, 4929 #else 4930 0, 4931 #endif 4932 #endif 4933 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4934 PHYMOD_SYMBOL_FLAG_REGISTER, 4935 "SERDESID2r", 4936 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4937 "SERDESID_SERDESID2", 4938 NULL, 4939 #endif 4940 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4941 0x8007, /* 32775 */ 4942 0, 4943 #endif 4944 }, 4945 { 4946 BCMI_VIPER_XGXS_SERDESID3r, 4947 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4948 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4949 BCMI_VIPER_XGXS_SERDESID3r_fields, 4950 #else 4951 0, 4952 #endif 4953 #endif 4954 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4955 PHYMOD_SYMBOL_FLAG_REGISTER, 4956 "SERDESID3r", 4957 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4958 "SERDESID_SERDESID3", 4959 NULL, 4960 #endif 4961 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4962 0x1, /* 1 */ 4963 0, 4964 #endif 4965 }, 4966 { 4967 BCMI_VIPER_XGXS_DIG_TPOUT1r, 4968 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4969 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4970 BCMI_VIPER_XGXS_DIG_TPOUT1r_fields, 4971 #else 4972 0, 4973 #endif 4974 #endif 4975 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4976 PHYMOD_SYMBOL_FLAG_REGISTER, 4977 "DIG_TPOUT1r", 4978 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4979 "DIGITAL3_TPOUT_1", 4980 NULL, 4981 #endif 4982 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4983 0x0, /* 0 */ 4984 0, 4985 #endif 4986 }, 4987 { 4988 BCMI_VIPER_XGXS_DIG_TPOUT2r, 4989 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4990 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 4991 BCMI_VIPER_XGXS_DIG_TPOUT2r_fields, 4992 #else 4993 0, 4994 #endif 4995 #endif 4996 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4997 PHYMOD_SYMBOL_FLAG_REGISTER, 4998 "DIG_TPOUT2r", 4999 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5000 "DIGITAL3_TPOUT_2", 5001 NULL, 5002 #endif 5003 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5004 0x0, /* 0 */ 5005 0, 5006 #endif 5007 }, 5008 { 5009 BCMI_VIPER_XGXS_DIG_MISC3r, 5010 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5011 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5012 BCMI_VIPER_XGXS_DIG_MISC3r_fields, 5013 #else 5014 0, 5015 #endif 5016 #endif 5017 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5018 PHYMOD_SYMBOL_FLAG_REGISTER, 5019 "DIG_MISC3r", 5020 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5021 "DIGITAL4_MISC3", 5022 NULL, 5023 #endif 5024 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5025 0x0, /* 0 */ 5026 0, 5027 #endif 5028 }, 5029 { 5030 BCMI_VIPER_XGXS_DIG_MISC5r, 5031 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5032 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5033 BCMI_VIPER_XGXS_DIG_MISC5r_fields, 5034 #else 5035 0, 5036 #endif 5037 #endif 5038 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5039 PHYMOD_SYMBOL_FLAG_REGISTER, 5040 "DIG_MISC5r", 5041 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5042 "DIGITAL4_MISC5", 5043 NULL, 5044 #endif 5045 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5046 0xc000, /* 49152 */ 5047 0, 5048 #endif 5049 }, 5050 { 5051 BCMI_VIPER_XGXS_DIG_MISC8r, 5052 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5053 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5054 BCMI_VIPER_XGXS_DIG_MISC8r_fields, 5055 #else 5056 0, 5057 #endif 5058 #endif 5059 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5060 PHYMOD_SYMBOL_FLAG_REGISTER, 5061 "DIG_MISC8r", 5062 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5063 "DIGITAL5_MISC8", 5064 NULL, 5065 #endif 5066 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5067 0x1, /* 1 */ 5068 0, 5069 #endif 5070 }, 5071 { 5072 BCMI_VIPER_XGXS_FX100_CTL1r, 5073 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5074 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5075 BCMI_VIPER_XGXS_FX100_CTL1r_fields, 5076 #else 5077 0, 5078 #endif 5079 #endif 5080 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5081 PHYMOD_SYMBOL_FLAG_REGISTER, 5082 "FX100_CTL1r", 5083 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5084 "FX100_CONTROL1", 5085 NULL, 5086 #endif 5087 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5088 0x14a, /* 330 */ 5089 0, 5090 #endif 5091 }, 5092 { 5093 BCMI_VIPER_XGXS_FX100_CTL2r, 5094 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5095 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5096 BCMI_VIPER_XGXS_FX100_CTL2r_fields, 5097 #else 5098 0, 5099 #endif 5100 #endif 5101 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5102 PHYMOD_SYMBOL_FLAG_REGISTER, 5103 "FX100_CTL2r", 5104 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5105 "FX100_CONTROL2", 5106 NULL, 5107 #endif 5108 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5109 0x0, /* 0 */ 5110 0, 5111 #endif 5112 }, 5113 { 5114 BCMI_VIPER_XGXS_FX100_CTL3r, 5115 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5116 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5117 BCMI_VIPER_XGXS_FX100_CTL3r_fields, 5118 #else 5119 0, 5120 #endif 5121 #endif 5122 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5123 PHYMOD_SYMBOL_FLAG_REGISTER, 5124 "FX100_CTL3r", 5125 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5126 "FX100_CONTROL3", 5127 NULL, 5128 #endif 5129 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5130 0x800, /* 2048 */ 5131 0, 5132 #endif 5133 }, 5134 { 5135 BCMI_VIPER_XGXS_FX100_STS1r, 5136 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5137 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5138 BCMI_VIPER_XGXS_FX100_STS1r_fields, 5139 #else 5140 0, 5141 #endif 5142 #endif 5143 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5144 PHYMOD_SYMBOL_FLAG_REGISTER, 5145 "FX100_STS1r", 5146 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5147 "FX100_STATUS1", 5148 NULL, 5149 #endif 5150 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5151 0x0, /* 0 */ 5152 0, 5153 #endif 5154 }, 5155 { 5156 BCMI_VIPER_XGXS_FX100_STS3r, 5157 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5158 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5159 BCMI_VIPER_XGXS_FX100_STS3r_fields, 5160 #else 5161 0, 5162 #endif 5163 #endif 5164 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5165 PHYMOD_SYMBOL_FLAG_REGISTER, 5166 "FX100_STS3r", 5167 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5168 "FX100_STATUS3", 5169 NULL, 5170 #endif 5171 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5172 0x0, /* 0 */ 5173 0, 5174 #endif 5175 }, 5176 { 5177 BCMI_VIPER_XGXS_FX100_STS4r, 5178 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5179 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5180 BCMI_VIPER_XGXS_FX100_STS4r_fields, 5181 #else 5182 0, 5183 #endif 5184 #endif 5185 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5186 PHYMOD_SYMBOL_FLAG_REGISTER, 5187 "FX100_STS4r", 5188 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5189 "FX100_STATUS4", 5190 NULL, 5191 #endif 5192 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5193 0x0, /* 0 */ 5194 0, 5195 #endif 5196 }, 5197 { 5198 BCMI_VIPER_XGXS_FX100_IDLE1r, 5199 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5200 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5201 BCMI_VIPER_XGXS_FX100_IDLE1r_fields, 5202 #else 5203 0, 5204 #endif 5205 #endif 5206 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5207 PHYMOD_SYMBOL_FLAG_REGISTER, 5208 "FX100_IDLE1r", 5209 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5210 "FX100_FX100IDLE1", 5211 NULL, 5212 #endif 5213 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5214 0x0, /* 0 */ 5215 0, 5216 #endif 5217 }, 5218 { 5219 BCMI_VIPER_XGXS_FX100_IDLE2r, 5220 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5221 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5222 BCMI_VIPER_XGXS_FX100_IDLE2r_fields, 5223 #else 5224 0, 5225 #endif 5226 #endif 5227 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5228 PHYMOD_SYMBOL_FLAG_REGISTER, 5229 "FX100_IDLE2r", 5230 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5231 "FX100_FX100IDLE2", 5232 NULL, 5233 #endif 5234 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5235 0x3ff, /* 1023 */ 5236 0, 5237 #endif 5238 }, 5239 { 5240 BCMI_VIPER_XGXS_FX100_IDLESTSr, 5241 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5242 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5243 BCMI_VIPER_XGXS_FX100_IDLESTSr_fields, 5244 #else 5245 0, 5246 #endif 5247 #endif 5248 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5249 PHYMOD_SYMBOL_FLAG_REGISTER, 5250 "FX100_IDLESTSr", 5251 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5252 "FX100_FX100IDLESTATUS", 5253 NULL, 5254 #endif 5255 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5256 0x3c, /* 60 */ 5257 0, 5258 #endif 5259 }, 5260 { 5261 BCMI_VIPER_XGXS_FX100_IDLETHRESr, 5262 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5263 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5264 BCMI_VIPER_XGXS_FX100_IDLETHRESr_fields, 5265 #else 5266 0, 5267 #endif 5268 #endif 5269 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5270 PHYMOD_SYMBOL_FLAG_REGISTER, 5271 "FX100_IDLETHRESr", 5272 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5273 "FX100_FX100IDLETHRES", 5274 NULL, 5275 #endif 5276 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5277 0xd5e, /* 3422 */ 5278 0, 5279 #endif 5280 }, 5281 { 5282 BCMI_VIPER_XGXS_FX100_LOCKTMRr, 5283 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5284 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5285 BCMI_VIPER_XGXS_FX100_LOCKTMRr_fields, 5286 #else 5287 0, 5288 #endif 5289 #endif 5290 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5291 PHYMOD_SYMBOL_FLAG_REGISTER, 5292 "FX100_LOCKTMRr", 5293 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5294 "FX100_FX100LOCKTMR", 5295 NULL, 5296 #endif 5297 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5298 0x4894, /* 18580 */ 5299 0, 5300 #endif 5301 }, 5302 { 5303 BCMI_VIPER_XGXS_FX100_LNKTMRr, 5304 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5305 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5306 BCMI_VIPER_XGXS_FX100_LNKTMRr_fields, 5307 #else 5308 0, 5309 #endif 5310 #endif 5311 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5312 PHYMOD_SYMBOL_FLAG_REGISTER, 5313 "FX100_LNKTMRr", 5314 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5315 "FX100_FX100LINKTMR", 5316 NULL, 5317 #endif 5318 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5319 0x17f4, /* 6132 */ 5320 0, 5321 #endif 5322 }, 5323 { 5324 BCMI_VIPER_XGXS_RX2_SEQ0r, 5325 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5326 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5327 BCMI_VIPER_XGXS_RX2_SEQ0r_fields, 5328 #else 5329 0, 5330 #endif 5331 #endif 5332 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5333 PHYMOD_SYMBOL_FLAG_REGISTER, 5334 "RX2_SEQ0r", 5335 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5336 "RX2_RXSEQ0", 5337 NULL, 5338 #endif 5339 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5340 0x1080, /* 4224 */ 5341 0, 5342 #endif 5343 }, 5344 { 5345 BCMI_VIPER_XGXS_RX2_SEQ1r, 5346 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5347 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5348 BCMI_VIPER_XGXS_RX2_SEQ1r_fields, 5349 #else 5350 0, 5351 #endif 5352 #endif 5353 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5354 PHYMOD_SYMBOL_FLAG_REGISTER, 5355 "RX2_SEQ1r", 5356 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5357 "RX2_RXSEQ1", 5358 NULL, 5359 #endif 5360 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5361 0x8080, /* 32896 */ 5362 0, 5363 #endif 5364 }, 5365 { 5366 BCMI_VIPER_XGXS_RX2_CDR0r, 5367 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5368 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5369 BCMI_VIPER_XGXS_RX2_CDR0r_fields, 5370 #else 5371 0, 5372 #endif 5373 #endif 5374 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5375 PHYMOD_SYMBOL_FLAG_REGISTER, 5376 "RX2_CDR0r", 5377 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5378 "RX2_RXCDR0", 5379 NULL, 5380 #endif 5381 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5382 0x4006, /* 16390 */ 5383 0, 5384 #endif 5385 }, 5386 { 5387 BCMI_VIPER_XGXS_RX2_CDR1r, 5388 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5389 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5390 BCMI_VIPER_XGXS_RX2_CDR1r_fields, 5391 #else 5392 0, 5393 #endif 5394 #endif 5395 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5396 PHYMOD_SYMBOL_FLAG_REGISTER, 5397 "RX2_CDR1r", 5398 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5399 "RX2_RXCDR1", 5400 NULL, 5401 #endif 5402 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5403 0x1451, /* 5201 */ 5404 0, 5405 #endif 5406 }, 5407 { 5408 BCMI_VIPER_XGXS_RX2_CDR2r, 5409 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5410 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5411 BCMI_VIPER_XGXS_RX2_CDR2r_fields, 5412 #else 5413 0, 5414 #endif 5415 #endif 5416 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5417 PHYMOD_SYMBOL_FLAG_REGISTER, 5418 "RX2_CDR2r", 5419 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5420 "RX2_RXCDR2", 5421 NULL, 5422 #endif 5423 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5424 0x1880, /* 6272 */ 5425 0, 5426 #endif 5427 }, 5428 { 5429 BCMI_VIPER_XGXS_RX2_CDR3r, 5430 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5431 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5432 BCMI_VIPER_XGXS_RX2_CDR3r_fields, 5433 #else 5434 0, 5435 #endif 5436 #endif 5437 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5438 PHYMOD_SYMBOL_FLAG_REGISTER, 5439 "RX2_CDR3r", 5440 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5441 "RX2_RXCDR3", 5442 NULL, 5443 #endif 5444 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5445 0x1004, /* 4100 */ 5446 0, 5447 #endif 5448 }, 5449 { 5450 BCMI_VIPER_XGXS_RX2_CDR4r, 5451 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5452 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5453 BCMI_VIPER_XGXS_RX2_CDR4r_fields, 5454 #else 5455 0, 5456 #endif 5457 #endif 5458 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5459 PHYMOD_SYMBOL_FLAG_REGISTER, 5460 "RX2_CDR4r", 5461 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5462 "RX2_RXCDR4", 5463 NULL, 5464 #endif 5465 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5466 0x4840, /* 18496 */ 5467 0, 5468 #endif 5469 }, 5470 { 5471 BCMI_VIPER_XGXS_RX2_STS0r, 5472 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5473 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5474 BCMI_VIPER_XGXS_RX2_STS0r_fields, 5475 #else 5476 0, 5477 #endif 5478 #endif 5479 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5480 PHYMOD_SYMBOL_FLAG_REGISTER, 5481 "RX2_STS0r", 5482 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5483 "RX2_STATUS0", 5484 NULL, 5485 #endif 5486 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5487 0x0, /* 0 */ 5488 0, 5489 #endif 5490 }, 5491 { 5492 BCMI_VIPER_XGXS_RX2_STS1r, 5493 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5494 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5495 BCMI_VIPER_XGXS_RX2_STS1r_fields, 5496 #else 5497 0, 5498 #endif 5499 #endif 5500 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5501 PHYMOD_SYMBOL_FLAG_REGISTER, 5502 "RX2_STS1r", 5503 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5504 "RX2_STATUS1", 5505 NULL, 5506 #endif 5507 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5508 0x0, /* 0 */ 5509 0, 5510 #endif 5511 }, 5512 { 5513 BCMI_VIPER_XGXS_RX2_STS2r, 5514 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5515 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5516 BCMI_VIPER_XGXS_RX2_STS2r_fields, 5517 #else 5518 0, 5519 #endif 5520 #endif 5521 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5522 PHYMOD_SYMBOL_FLAG_REGISTER, 5523 "RX2_STS2r", 5524 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5525 "RX2_STATUS2", 5526 NULL, 5527 #endif 5528 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5529 0x0, /* 0 */ 5530 0, 5531 #endif 5532 }, 5533 { 5534 BCMI_VIPER_XGXS_RX2_STS3r, 5535 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5536 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5537 BCMI_VIPER_XGXS_RX2_STS3r_fields, 5538 #else 5539 0, 5540 #endif 5541 #endif 5542 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5543 PHYMOD_SYMBOL_FLAG_REGISTER, 5544 "RX2_STS3r", 5545 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5546 "RX2_STATUS3", 5547 NULL, 5548 #endif 5549 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5550 0x0, /* 0 */ 5551 0, 5552 #endif 5553 }, 5554 { 5555 BCMI_VIPER_XGXS_RX2_STS4r, 5556 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5557 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5558 BCMI_VIPER_XGXS_RX2_STS4r_fields, 5559 #else 5560 0, 5561 #endif 5562 #endif 5563 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5564 PHYMOD_SYMBOL_FLAG_REGISTER, 5565 "RX2_STS4r", 5566 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5567 "RX2_STATUS4", 5568 NULL, 5569 #endif 5570 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5571 0x0, /* 0 */ 5572 0, 5573 #endif 5574 }, 5575 { 5576 BCMI_VIPER_XGXS_RX2_STS5r, 5577 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5578 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5579 BCMI_VIPER_XGXS_RX2_STS5r_fields, 5580 #else 5581 0, 5582 #endif 5583 #endif 5584 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5585 PHYMOD_SYMBOL_FLAG_REGISTER, 5586 "RX2_STS5r", 5587 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5588 "RX2_STATUS5", 5589 NULL, 5590 #endif 5591 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5592 0x0, /* 0 */ 5593 0, 5594 #endif 5595 }, 5596 { 5597 BCMI_VIPER_XGXS_RX2_STS6r, 5598 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5599 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5600 BCMI_VIPER_XGXS_RX2_STS6r_fields, 5601 #else 5602 0, 5603 #endif 5604 #endif 5605 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5606 PHYMOD_SYMBOL_FLAG_REGISTER, 5607 "RX2_STS6r", 5608 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5609 "RX2_STATUS6", 5610 NULL, 5611 #endif 5612 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5613 0x0, /* 0 */ 5614 0, 5615 #endif 5616 }, 5617 { 5618 BCMI_VIPER_XGXS_RX3_CTL0r, 5619 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5620 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5621 BCMI_VIPER_XGXS_RX3_CTL0r_fields, 5622 #else 5623 0, 5624 #endif 5625 #endif 5626 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5627 PHYMOD_SYMBOL_FLAG_REGISTER, 5628 "RX3_CTL0r", 5629 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5630 "RX3_CONTROL0", 5631 NULL, 5632 #endif 5633 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5634 0x7801, /* 30721 */ 5635 0, 5636 #endif 5637 }, 5638 { 5639 BCMI_VIPER_XGXS_RX3_CTL1r, 5640 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5641 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5642 BCMI_VIPER_XGXS_RX3_CTL1r_fields, 5643 #else 5644 0, 5645 #endif 5646 #endif 5647 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5648 PHYMOD_SYMBOL_FLAG_REGISTER, 5649 "RX3_CTL1r", 5650 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5651 "RX3_CONTROL1", 5652 NULL, 5653 #endif 5654 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5655 0xc805, /* 51205 */ 5656 0, 5657 #endif 5658 }, 5659 { 5660 BCMI_VIPER_XGXS_RX3_CTL2r, 5661 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5662 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5663 BCMI_VIPER_XGXS_RX3_CTL2r_fields, 5664 #else 5665 0, 5666 #endif 5667 #endif 5668 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5669 PHYMOD_SYMBOL_FLAG_REGISTER, 5670 "RX3_CTL2r", 5671 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5672 "RX3_CONTROL2", 5673 NULL, 5674 #endif 5675 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5676 0x83f0, /* 33776 */ 5677 0, 5678 #endif 5679 }, 5680 { 5681 BCMI_VIPER_XGXS_RX3_CTL3r, 5682 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5683 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5684 BCMI_VIPER_XGXS_RX3_CTL3r_fields, 5685 #else 5686 0, 5687 #endif 5688 #endif 5689 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5690 PHYMOD_SYMBOL_FLAG_REGISTER, 5691 "RX3_CTL3r", 5692 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5693 "RX3_CONTROL3", 5694 NULL, 5695 #endif 5696 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5697 0x0, /* 0 */ 5698 0, 5699 #endif 5700 }, 5701 { 5702 BCMI_VIPER_XGXS_RX3_CTL4r, 5703 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5704 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5705 BCMI_VIPER_XGXS_RX3_CTL4r_fields, 5706 #else 5707 0, 5708 #endif 5709 #endif 5710 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5711 PHYMOD_SYMBOL_FLAG_REGISTER, 5712 "RX3_CTL4r", 5713 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5714 "RX3_CONTROL4", 5715 NULL, 5716 #endif 5717 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5718 0x0, /* 0 */ 5719 0, 5720 #endif 5721 }, 5722 { 5723 BCMI_VIPER_XGXS_RX3_CTL5r, 5724 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5725 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5726 BCMI_VIPER_XGXS_RX3_CTL5r_fields, 5727 #else 5728 0, 5729 #endif 5730 #endif 5731 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5732 PHYMOD_SYMBOL_FLAG_REGISTER, 5733 "RX3_CTL5r", 5734 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5735 "RX3_CONTROL5", 5736 NULL, 5737 #endif 5738 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5739 0x7e, /* 126 */ 5740 0, 5741 #endif 5742 }, 5743 { 5744 BCMI_VIPER_XGXS_RX3_CTL6r, 5745 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5746 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5747 BCMI_VIPER_XGXS_RX3_CTL6r_fields, 5748 #else 5749 0, 5750 #endif 5751 #endif 5752 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5753 PHYMOD_SYMBOL_FLAG_REGISTER, 5754 "RX3_CTL6r", 5755 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5756 "RX3_CONTROL6", 5757 NULL, 5758 #endif 5759 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5760 0x280, /* 640 */ 5761 0, 5762 #endif 5763 }, 5764 { 5765 BCMI_VIPER_XGXS_RX3_CTL7r, 5766 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5767 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5768 BCMI_VIPER_XGXS_RX3_CTL7r_fields, 5769 #else 5770 0, 5771 #endif 5772 #endif 5773 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5774 PHYMOD_SYMBOL_FLAG_REGISTER, 5775 "RX3_CTL7r", 5776 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5777 "RX3_CONTROL7", 5778 NULL, 5779 #endif 5780 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5781 0x1000, /* 4096 */ 5782 0, 5783 #endif 5784 }, 5785 { 5786 BCMI_VIPER_XGXS_RX3_CTL8r, 5787 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5788 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5789 BCMI_VIPER_XGXS_RX3_CTL8r_fields, 5790 #else 5791 0, 5792 #endif 5793 #endif 5794 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5795 PHYMOD_SYMBOL_FLAG_REGISTER, 5796 "RX3_CTL8r", 5797 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5798 "RX3_CONTROL8", 5799 NULL, 5800 #endif 5801 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5802 0x0, /* 0 */ 5803 0, 5804 #endif 5805 }, 5806 { 5807 BCMI_VIPER_XGXS_RX3_CTL9r, 5808 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5809 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5810 BCMI_VIPER_XGXS_RX3_CTL9r_fields, 5811 #else 5812 0, 5813 #endif 5814 #endif 5815 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5816 PHYMOD_SYMBOL_FLAG_REGISTER, 5817 "RX3_CTL9r", 5818 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5819 "RX3_CONTROL9", 5820 NULL, 5821 #endif 5822 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5823 0x280, /* 640 */ 5824 0, 5825 #endif 5826 }, 5827 { 5828 BCMI_VIPER_XGXS_RX3_CTL10r, 5829 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5830 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5831 BCMI_VIPER_XGXS_RX3_CTL10r_fields, 5832 #else 5833 0, 5834 #endif 5835 #endif 5836 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5837 PHYMOD_SYMBOL_FLAG_REGISTER, 5838 "RX3_CTL10r", 5839 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5840 "RX3_CONTROL10", 5841 NULL, 5842 #endif 5843 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5844 0x0, /* 0 */ 5845 0, 5846 #endif 5847 }, 5848 { 5849 BCMI_VIPER_XGXS_RX3_CTL11r, 5850 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5851 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5852 BCMI_VIPER_XGXS_RX3_CTL11r_fields, 5853 #else 5854 0, 5855 #endif 5856 #endif 5857 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5858 PHYMOD_SYMBOL_FLAG_REGISTER, 5859 "RX3_CTL11r", 5860 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5861 "RX3_CONTROL11", 5862 NULL, 5863 #endif 5864 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5865 0x1d80, /* 7552 */ 5866 0, 5867 #endif 5868 }, 5869 { 5870 BCMI_VIPER_XGXS_AERr, 5871 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5872 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5873 BCMI_VIPER_XGXS_AERr_fields, 5874 #else 5875 0, 5876 #endif 5877 #endif 5878 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5879 PHYMOD_SYMBOL_FLAG_REGISTER, 5880 "AERr", 5881 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5882 "AERBLK_AER", 5883 NULL, 5884 #endif 5885 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5886 0x0, /* 0 */ 5887 0, 5888 #endif 5889 }, 5890 { 5891 BCMI_VIPER_XGXS_COMBO_MIICTLr, 5892 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5893 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5894 BCMI_VIPER_XGXS_COMBO_MIICTLr_fields, 5895 #else 5896 0, 5897 #endif 5898 #endif 5899 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5900 PHYMOD_SYMBOL_FLAG_REGISTER, 5901 "COMBO_MIICTLr", 5902 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5903 "COMBO_IEEE0_MIICNTL", 5904 NULL, 5905 #endif 5906 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5907 0x140, /* 320 */ 5908 0, 5909 #endif 5910 }, 5911 { 5912 BCMI_VIPER_XGXS_COMBO_MIISTATr, 5913 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5914 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5915 BCMI_VIPER_XGXS_COMBO_MIISTATr_fields, 5916 #else 5917 0, 5918 #endif 5919 #endif 5920 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5921 PHYMOD_SYMBOL_FLAG_REGISTER, 5922 "COMBO_MIISTATr", 5923 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5924 "COMBO_IEEE0_MIISTAT", 5925 NULL, 5926 #endif 5927 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5928 0x109, /* 265 */ 5929 0, 5930 #endif 5931 }, 5932 { 5933 BCMI_VIPER_XGXS_COMBO_ID1r, 5934 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5935 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5936 BCMI_VIPER_XGXS_COMBO_ID1r_fields, 5937 #else 5938 0, 5939 #endif 5940 #endif 5941 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5942 PHYMOD_SYMBOL_FLAG_REGISTER, 5943 "COMBO_ID1r", 5944 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5945 "COMBO_IEEE0_ID1", 5946 NULL, 5947 #endif 5948 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5949 0x143, /* 323 */ 5950 0, 5951 #endif 5952 }, 5953 { 5954 BCMI_VIPER_XGXS_COMBO_ID2r, 5955 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5956 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5957 BCMI_VIPER_XGXS_COMBO_ID2r_fields, 5958 #else 5959 0, 5960 #endif 5961 #endif 5962 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5963 PHYMOD_SYMBOL_FLAG_REGISTER, 5964 "COMBO_ID2r", 5965 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5966 "COMBO_IEEE0_ID2", 5967 NULL, 5968 #endif 5969 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5970 0xbff0, /* 49136 */ 5971 0, 5972 #endif 5973 }, 5974 { 5975 BCMI_VIPER_XGXS_COMBO_AUTONEGADVr, 5976 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5977 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5978 BCMI_VIPER_XGXS_COMBO_AUTONEGADVr_fields, 5979 #else 5980 0, 5981 #endif 5982 #endif 5983 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 5984 PHYMOD_SYMBOL_FLAG_REGISTER, 5985 "COMBO_AUTONEGADVr", 5986 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 5987 "COMBO_IEEE0_AUTONEGADV", 5988 NULL, 5989 #endif 5990 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 5991 0x20, /* 32 */ 5992 0, 5993 #endif 5994 }, 5995 { 5996 BCMI_VIPER_XGXS_COMBO_AUTONEGLPABILr, 5997 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 5998 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 5999 BCMI_VIPER_XGXS_COMBO_AUTONEGLPABILr_fields, 6000 #else 6001 0, 6002 #endif 6003 #endif 6004 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6005 PHYMOD_SYMBOL_FLAG_REGISTER, 6006 "COMBO_AUTONEGLPABILr", 6007 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6008 "COMBO_IEEE0_AUTONEGLPABIL", 6009 NULL, 6010 #endif 6011 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6012 0x0, /* 0 */ 6013 0, 6014 #endif 6015 }, 6016 { 6017 BCMI_VIPER_XGXS_COMBO_AUTONEGEXPr, 6018 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6019 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 6020 BCMI_VIPER_XGXS_COMBO_AUTONEGEXPr_fields, 6021 #else 6022 0, 6023 #endif 6024 #endif 6025 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6026 PHYMOD_SYMBOL_FLAG_REGISTER, 6027 "COMBO_AUTONEGEXPr", 6028 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6029 "COMBO_IEEE0_AUTONEGEXP", 6030 NULL, 6031 #endif 6032 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6033 0x4, /* 4 */ 6034 0, 6035 #endif 6036 }, 6037 { 6038 BCMI_VIPER_XGXS_COMBO_AUTONEGNPr, 6039 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6040 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 6041 BCMI_VIPER_XGXS_COMBO_AUTONEGNPr_fields, 6042 #else 6043 0, 6044 #endif 6045 #endif 6046 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6047 PHYMOD_SYMBOL_FLAG_REGISTER, 6048 "COMBO_AUTONEGNPr", 6049 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6050 "COMBO_IEEE0_AUTONEGNP", 6051 NULL, 6052 #endif 6053 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6054 0x2001, /* 8193 */ 6055 0, 6056 #endif 6057 }, 6058 { 6059 BCMI_VIPER_XGXS_COMBO_AUTONEGLPABIL2r, 6060 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6061 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 6062 BCMI_VIPER_XGXS_COMBO_AUTONEGLPABIL2r_fields, 6063 #else 6064 0, 6065 #endif 6066 #endif 6067 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6068 PHYMOD_SYMBOL_FLAG_REGISTER, 6069 "COMBO_AUTONEGLPABIL2r", 6070 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6071 "COMBO_IEEE0_AUTONEGLPABIL2", 6072 NULL, 6073 #endif 6074 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6075 0x2001, /* 8193 */ 6076 0, 6077 #endif 6078 }, 6079 { 6080 BCMI_VIPER_XGXS_COMBO_MIIEXTSTATr, 6081 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6082 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 6083 BCMI_VIPER_XGXS_COMBO_MIIEXTSTATr_fields, 6084 #else 6085 0, 6086 #endif 6087 #endif 6088 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6089 PHYMOD_SYMBOL_FLAG_REGISTER, 6090 "COMBO_MIIEXTSTATr", 6091 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6092 "COMBO_IEEE0_MIIEXTSTAT", 6093 NULL, 6094 #endif 6095 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6096 0x0, /* 0 */ 6097 0, 6098 #endif 6099 }, 6100 { 6101 BCMI_VIPER_XGXS_DEV3_PCS_CTL1r, 6102 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6103 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_VIPER_XGXS 6104 BCMI_VIPER_XGXS_DEV3_PCS_CTL1r_fields, 6105 #else 6106 0, 6107 #endif 6108 #endif 6109 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6110 PHYMOD_SYMBOL_FLAG_REGISTER, 6111 "DEV3_PCS_CTL1r", 6112 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6113 "DEV3_IEEE0_PCS_IEEECONTROL1", 6114 NULL, 6115 #endif 6116 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6117 0x2040, /* 8256 */ 6118 0, 6119 #endif 6120 }, 6121 #endif 6122 }; 6123 6124 6125 phymod_symbols_t bcmi_viper_xgxs_symbols = 6126 { 6127 bcmi_viper_xgxs_syms, sizeof(bcmi_viper_xgxs_syms)/sizeof(bcmi_viper_xgxs_syms[0]), 6128 #if PHYMOD_CONFIG_INCLUDE_FIELD_NAMES == 1 6129 bcmi_viper_xgxs_fields 6130 #else 6131 NULL 6132 #endif 6133 /* END OF SYMBOL FILE */ 6134 }; 6135 6136 #endif /* PHYMOD_CONFIG_INCLUDE_CHIP_SYMBOLS */