bcmi_tsce16_xgxs_sym.c (518103B)
1 /******************************************************************************* 2 * 3 * 4 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 5 * 6 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 7 * 8 * DO NOT EDIT THIS FILE! 9 * This file is auto-generated from the registers file. 10 * Edits to this file will be lost when it is regenerated. 11 * 12 * Symbol table file for the BCMI_TSCE16_XGXS. 13 * This symbol table is used by the Broadcom debug shell. 14 */ 15 16 17 #include <phymod/chip/bcmi_tsce16_xgxs_defs.h> 18 #include <phymod/phymod_symbols.h> 19 20 /* No symbols will be compiled unless this is defined. */ 21 #if PHYMOD_CONFIG_INCLUDE_CHIP_SYMBOLS == 1 22 /******************************************************************************* 23 * 24 * If PHYMOD_CONFIG_INCLUDE_FIELD_INFO is 1, then symbol information 25 * necessary to encode and decode the individual fields of a register or memory 26 * will be available. 27 * 28 * Without it, only the register and memory names will be symbolically available 29 * and their values will be displayed as raw data only. 30 * 31 * Field information can be compiled out in the interest of saving code space. 32 */ 33 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 34 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 35 36 static uint32_t BCMI_TSCE16_XGXS_ACC_ADDR_DATAr_fields[] = 37 { 38 /* MDIO_ADDR_DATA:0:15 */ 39 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(844, 15, 0) 40 }; 41 static uint32_t BCMI_TSCE16_XGXS_ACC_CTLr_fields[] = 42 { 43 /* MDIO_DEVAD:0:4 */ 44 PHYMOD_SYMBOL_FIELD_ENCODE(848, 4, 0), 45 /* MDIO_FUNCTION:14:15 */ 46 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(856, 15, 14) 47 }; 48 static uint32_t BCMI_TSCE16_XGXS_AN_X1_BAM_SPD_PRI_11_6r_fields[] = 49 { 50 /* AN_PRIORITY_10GCX4:0:1 */ 51 PHYMOD_SYMBOL_FIELD_ENCODE(67, 1, 0), 52 /* AN_PRIORITY_10GCX1:2:3 */ 53 PHYMOD_SYMBOL_FIELD_ENCODE(65, 3, 2), 54 /* AN_PRIORITY_6GX4:4:5 */ 55 PHYMOD_SYMBOL_FIELD_ENCODE(97, 5, 4), 56 /* AN_PRIORITY_10GX4:6:7 */ 57 PHYMOD_SYMBOL_FIELD_ENCODE(71, 7, 6), 58 /* AN_PRIORITY_10GKX4:8:9 */ 59 PHYMOD_SYMBOL_FIELD_ENCODE(69, 9, 8), 60 /* AN_PRIORITY_10GKR:10:11 */ 61 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(68, 11, 10) 62 }; 63 static uint32_t BCMI_TSCE16_XGXS_AN_X1_BAM_SPD_PRI_17_12r_fields[] = 64 { 65 /* AN_PRIORITY_10P5GX2:0:1 */ 66 PHYMOD_SYMBOL_FIELD_ENCODE(73, 1, 0), 67 /* AN_PRIORITY_10GX2:2:3 */ 68 PHYMOD_SYMBOL_FIELD_ENCODE(70, 3, 2), 69 /* AN_PRIORITY_10GCX2:4:5 */ 70 PHYMOD_SYMBOL_FIELD_ENCODE(66, 5, 4), 71 /* AN_PRIORITY_12P7GX2:6:7 */ 72 PHYMOD_SYMBOL_FIELD_ENCODE(76, 7, 6), 73 /* AN_PRIORITY_12P5GX4:8:9 */ 74 PHYMOD_SYMBOL_FIELD_ENCODE(75, 9, 8), 75 /* AN_PRIORITY_12GX4:10:11 */ 76 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(74, 11, 10) 77 }; 78 static uint32_t BCMI_TSCE16_XGXS_AN_X1_BAM_SPD_PRI_23_18r_fields[] = 79 { 80 /* AN_PRIORITY_15P75GX2:0:1 */ 81 PHYMOD_SYMBOL_FIELD_ENCODE(79, 1, 0), 82 /* AN_PRIORITY_15GX4:2:3 */ 83 PHYMOD_SYMBOL_FIELD_ENCODE(78, 3, 2), 84 /* AN_PRIORITY_13GX4:4:5 */ 85 PHYMOD_SYMBOL_FIELD_ENCODE(77, 5, 4), 86 /* AN_PRIORITY_100GCR10:6:7 */ 87 PHYMOD_SYMBOL_FIELD_ENCODE(63, 7, 6), 88 /* AN_PRIORITY_40GKR4:8:9 */ 89 PHYMOD_SYMBOL_FIELD_ENCODE(94, 9, 8), 90 /* AN_PRIORITY_40GCR4:10:11 */ 91 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(93, 11, 10) 92 }; 93 static uint32_t BCMI_TSCE16_XGXS_AN_X1_BAM_SPD_PRI_29_24r_fields[] = 94 { 95 /* AN_PRIORITY_20GCR2:0:1 */ 96 PHYMOD_SYMBOL_FIELD_ENCODE(82, 1, 0), 97 /* AN_PRIORITY_20GCX2:2:3 */ 98 PHYMOD_SYMBOL_FIELD_ENCODE(83, 3, 2), 99 /* AN_PRIORITY_16GX4:4:5 */ 100 PHYMOD_SYMBOL_FIELD_ENCODE(80, 5, 4), 101 /* AN_PRIORITY_20GX2:6:7 */ 102 PHYMOD_SYMBOL_FIELD_ENCODE(86, 7, 6), 103 /* AN_PRIORITY_20GCX4:8:9 */ 104 PHYMOD_SYMBOL_FIELD_ENCODE(84, 9, 8), 105 /* AN_PRIORITY_20GKR2:10:11 */ 106 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(85, 11, 10) 107 }; 108 static uint32_t BCMI_TSCE16_XGXS_AN_X1_BAM_SPD_PRI_35_30r_fields[] = 109 { 110 /* AN_PRIORITY_25P45GX4:0:1 */ 111 PHYMOD_SYMBOL_FIELD_ENCODE(89, 1, 0), 112 /* AN_PRIORITY_21GX4:2:3 */ 113 PHYMOD_SYMBOL_FIELD_ENCODE(88, 3, 2), 114 /* AN_PRIORITY_20GX4:4:5 */ 115 PHYMOD_SYMBOL_FIELD_ENCODE(87, 5, 4), 116 /* AN_PRIORITY_40GX4:6:7 */ 117 PHYMOD_SYMBOL_FIELD_ENCODE(95, 7, 6), 118 /* AN_PRIORITY_32P7G:8:9 */ 119 PHYMOD_SYMBOL_FIELD_ENCODE(92, 9, 8), 120 /* AN_PRIORITY_31P5G:10:11 */ 121 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(91, 11, 10) 122 }; 123 static uint32_t BCMI_TSCE16_XGXS_AN_X1_BAM_SPD_PRI_5_0r_fields[] = 124 { 125 /* AN_PRIORITY_1000M:0:1 */ 126 PHYMOD_SYMBOL_FIELD_ENCODE(62, 1, 0), 127 /* AN_PRIORITY_100M:2:3 */ 128 PHYMOD_SYMBOL_FIELD_ENCODE(64, 3, 2), 129 /* AN_PRIORITY_10M:4:5 */ 130 PHYMOD_SYMBOL_FIELD_ENCODE(72, 5, 4), 131 /* AN_PRIORITY_5GX4:6:7 */ 132 PHYMOD_SYMBOL_FIELD_ENCODE(96, 7, 6), 133 /* AN_PRIORITY_2P5GX1:8:9 */ 134 PHYMOD_SYMBOL_FIELD_ENCODE(90, 9, 8), 135 /* AN_PRIORITY_1GKX:10:11 */ 136 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(81, 11, 10) 137 }; 138 static uint32_t BCMI_TSCE16_XGXS_AN_X1_CFG_CTLr_fields[] = 139 { 140 /* AN_PD_TO_CL37_RETRY_COUNT:0:7 */ 141 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(61, 7, 0) 142 }; 143 static uint32_t BCMI_TSCE16_XGXS_AN_X1_CL37_ACKr_fields[] = 144 { 145 /* CL37_ACK_TIMER_PERIOD:0:15 */ 146 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(258, 15, 0) 147 }; 148 static uint32_t BCMI_TSCE16_XGXS_AN_X1_CL37_ERRr_fields[] = 149 { 150 /* CL37_ERROR_TIMER_PERIOD:0:15 */ 151 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(265, 15, 0) 152 }; 153 static uint32_t BCMI_TSCE16_XGXS_AN_X1_CL37_RESTARTr_fields[] = 154 { 155 /* CL37_RESTART_TIMER_PERIOD:0:15 */ 156 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(271, 15, 0) 157 }; 158 static uint32_t BCMI_TSCE16_XGXS_AN_X1_CL37_SYNC_STS_FILTER_TMRr_fields[] = 159 { 160 /* CL37_SYNC_STATUS_FILTER_TIMER_PERIOD:0:15 */ 161 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(274, 15, 0) 162 }; 163 static uint32_t BCMI_TSCE16_XGXS_AN_X1_CL73_BRK_LNKr_fields[] = 164 { 165 /* TX_DISABLE_TIMER_PERIOD:0:15 */ 166 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1490, 15, 0) 167 }; 168 static uint32_t BCMI_TSCE16_XGXS_AN_X1_CL73_DME_LOCKr_fields[] = 169 { 170 /* PD_DME_LOCK_TIMER_PERIOD:0:15 */ 171 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1011, 15, 0) 172 }; 173 static uint32_t BCMI_TSCE16_XGXS_AN_X1_CL73_ERRr_fields[] = 174 { 175 /* CL73_ERROR_TIMER_PERIOD:0:15 */ 176 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(382, 15, 0) 177 }; 178 static uint32_t BCMI_TSCE16_XGXS_AN_X1_DME_PAGE_TMRr_fields[] = 179 { 180 /* CL73_PAGE_TEST_MIN_TIMER:0:6 */ 181 PHYMOD_SYMBOL_FIELD_ENCODE(389, 6, 0), 182 /* CL73_PAGE_TEST_MAX_TIMER:7:13 */ 183 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(388, 13, 7) 184 }; 185 static uint32_t BCMI_TSCE16_XGXS_AN_X1_IGNORE_LNK_TMRr_fields[] = 186 { 187 /* IGNORE_LINK_TIMER_PERIOD:0:15 */ 188 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(710, 15, 0) 189 }; 190 static uint32_t BCMI_TSCE16_XGXS_AN_X1_LNK_FAIL_INHBT_TMR_CL72r_fields[] = 191 { 192 /* LINK_FAIL_INHIBIT_TIMER_CL72_PERIOD:0:15 */ 193 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(753, 15, 0) 194 }; 195 static uint32_t BCMI_TSCE16_XGXS_AN_X1_LNK_FAIL_INHBT_TMR_NOT_CL72r_fields[] = 196 { 197 /* LINK_FAIL_INHIBIT_TIMER_NCL72_PERIOD:0:15 */ 198 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(754, 15, 0) 199 }; 200 static uint32_t BCMI_TSCE16_XGXS_AN_X1_LNK_UPr_fields[] = 201 { 202 /* CL73_LINK_UP_TIMER_PERIOD:0:15 */ 203 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(384, 15, 0) 204 }; 205 static uint32_t BCMI_TSCE16_XGXS_AN_X1_OUI_LWRr_fields[] = 206 { 207 /* OUI_LOWER_DATA:0:15 */ 208 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(965, 15, 0) 209 }; 210 static uint32_t BCMI_TSCE16_XGXS_AN_X1_OUI_UPRr_fields[] = 211 { 212 /* OUI_UPPER_DATA:0:7 */ 213 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(966, 7, 0) 214 }; 215 static uint32_t BCMI_TSCE16_XGXS_AN_X1_PD_SD_TMRr_fields[] = 216 { 217 /* PD_SD_TIMER_PERIOD:0:15 */ 218 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1017, 15, 0) 219 }; 220 static uint32_t BCMI_TSCE16_XGXS_AN_X1_PD_TO_CL37_LNK_WAIT_TMRr_fields[] = 221 { 222 /* PD_TO_CL37_LINK_WAIT_TIMER:0:15 */ 223 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1018, 15, 0) 224 }; 225 static uint32_t BCMI_TSCE16_XGXS_AN_X1_SGMII_CL73_TMR_TYPEr_fields[] = 226 { 227 /* SGMII_TIMER:0:15 */ 228 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1298, 15, 0) 229 }; 230 static uint32_t BCMI_TSCE16_XGXS_AN_X4_AN_ABIL_RESOLUTION_STSr_fields[] = 231 { 232 /* AN_HCD_SWITCH_TO_CL37:0:0 */ 233 PHYMOD_SYMBOL_FIELD_ENCODE(58, 0, 0), 234 /* AN_HCD_HIGIG2:1:1 */ 235 PHYMOD_SYMBOL_FIELD_ENCODE(55, 1, 1), 236 /* AN_HCD_CL72:2:2 */ 237 PHYMOD_SYMBOL_FIELD_ENCODE(52, 2, 2), 238 /* AN_HCD_FEC:3:3 */ 239 PHYMOD_SYMBOL_FIELD_ENCODE(54, 3, 3), 240 /* AN_HCD_SPEED:4:11 */ 241 PHYMOD_SYMBOL_FIELD_ENCODE(57, 11, 4), 242 /* AN_HCD_PAUSE:12:13 */ 243 PHYMOD_SYMBOL_FIELD_ENCODE(56, 13, 12), 244 /* AN_HCD_DUPLEX:14:14 */ 245 PHYMOD_SYMBOL_FIELD_ENCODE(53, 14, 14), 246 /* AN_ST_RESOLUTION_ERR:15:15 */ 247 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(127, 15, 15) 248 }; 249 static uint32_t BCMI_TSCE16_XGXS_AN_X4_AN_MISC_STSr_fields[] = 250 { 251 /* PD_HCD_KX4_OR_KX:0:0 */ 252 PHYMOD_SYMBOL_FIELD_ENCODE(1012, 0, 0), 253 /* PD_IN_PROGRESS:1:1 */ 254 PHYMOD_SYMBOL_FIELD_ENCODE(1013, 1, 1), 255 /* AN_FAIL_COUNT:2:5 */ 256 PHYMOD_SYMBOL_FIELD_ENCODE(48, 5, 2), 257 /* AN_ACTIVE:6:6 */ 258 PHYMOD_SYMBOL_FIELD_ENCODE(45, 6, 6), 259 /* PD_COMPLETED:7:7 */ 260 PHYMOD_SYMBOL_FIELD_ENCODE(1010, 7, 7), 261 /* REMOTE_FAULT_IN_BASE_PAGE:8:8 */ 262 PHYMOD_SYMBOL_FIELD_ENCODE(1147, 8, 8), 263 /* AN_RETRY_COUNT:9:14 */ 264 PHYMOD_SYMBOL_FIELD_ENCODE(98, 14, 9), 265 /* AN_COMPLETE:15:15 */ 266 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(46, 15, 15) 267 }; 268 static uint32_t BCMI_TSCE16_XGXS_AN_X4_AN_PAGE_DECR_STSr_fields[] = 269 { 270 /* AN_RX_ST_STATE:0:1 */ 271 PHYMOD_SYMBOL_FIELD_ENCODE(110, 1, 0), 272 /* AN_RX_ST_RUDI_INVALID:2:2 */ 273 PHYMOD_SYMBOL_FIELD_ENCODE(109, 2, 2), 274 /* AN_RX_ST_RUDI_CONFIG:3:3 */ 275 PHYMOD_SYMBOL_FIELD_ENCODE(107, 3, 3), 276 /* AN_RX_ST_RUDI_IDLE:4:4 */ 277 PHYMOD_SYMBOL_FIELD_ENCODE(108, 4, 4), 278 /* AN_RX_ST_PAGE:5:5 */ 279 PHYMOD_SYMBOL_FIELD_ENCODE(101, 5, 5), 280 /* AN_RX_ST_MV_PAIR:6:6 */ 281 PHYMOD_SYMBOL_FIELD_ENCODE(100, 6, 6), 282 /* AN_RX_ST_CLK_TRANS_MISS:7:7 */ 283 PHYMOD_SYMBOL_FIELD_ENCODE(99, 7, 7), 284 /* AN_RX_ST_PAGE_TOO_LONG:8:8 */ 285 PHYMOD_SYMBOL_FIELD_ENCODE(102, 8, 8), 286 /* AN_RX_ST_PAGE_TOO_SHORT:9:9 */ 287 PHYMOD_SYMBOL_FIELD_ENCODE(103, 9, 9), 288 /* AN_RX_ST_PULSE_TOO_LONG:10:10 */ 289 PHYMOD_SYMBOL_FIELD_ENCODE(104, 10, 10), 290 /* AN_RX_ST_PULSE_TOO_SHORT:11:11 */ 291 PHYMOD_SYMBOL_FIELD_ENCODE(106, 11, 11), 292 /* AN_RX_ST_PULSE_TOO_MODERATE:12:12 */ 293 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(105, 12, 12) 294 }; 295 static uint32_t BCMI_TSCE16_XGXS_AN_X4_AN_PAGE_EXCHANGEER_STSr_fields[] = 296 { 297 /* AN_ST_CONFIG_RESTART:0:0 */ 298 PHYMOD_SYMBOL_FIELD_ENCODE(119, 0, 0), 299 /* AN_ST_IDLE_DETECT:1:1 */ 300 PHYMOD_SYMBOL_FIELD_ENCODE(124, 1, 1), 301 /* AN_ST_DISABLE_LINK:2:2 */ 302 PHYMOD_SYMBOL_FIELD_ENCODE(121, 2, 2), 303 /* AN_ST_ERROR_STATE:3:3 */ 304 PHYMOD_SYMBOL_FIELD_ENCODE(122, 3, 3), 305 /* AN_ST_AN_ENABLE:4:4 */ 306 PHYMOD_SYMBOL_FIELD_ENCODE(113, 4, 4), 307 /* AN_ST_ABILITY_DETECT:5:5 */ 308 PHYMOD_SYMBOL_FIELD_ENCODE(111, 5, 5), 309 /* AN_ST_ACK_DETECT:6:6 */ 310 PHYMOD_SYMBOL_FIELD_ENCODE(112, 6, 6), 311 /* AN_ST_COMPLETE_ACK:7:7 */ 312 PHYMOD_SYMBOL_FIELD_ENCODE(117, 7, 7), 313 /* AN_ST_CONSISTENCY_MISMATCH:8:8 */ 314 PHYMOD_SYMBOL_FIELD_ENCODE(120, 8, 8), 315 /* AN_ST_CONFIG_NONZERO:9:9 */ 316 PHYMOD_SYMBOL_FIELD_ENCODE(118, 9, 9), 317 /* AN_ST_RESTART:10:10 */ 318 PHYMOD_SYMBOL_FIELD_ENCODE(128, 10, 10), 319 /* AN_ST_AN_GOOD_CHECK:11:11 */ 320 PHYMOD_SYMBOL_FIELD_ENCODE(114, 11, 11), 321 /* AN_ST_LINK_OK:12:12 */ 322 PHYMOD_SYMBOL_FIELD_ENCODE(125, 12, 12), 323 /* AN_ST_NEXT_PAGE_WAIT:13:13 */ 324 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(126, 13, 13) 325 }; 326 static uint32_t BCMI_TSCE16_XGXS_AN_X4_AN_PAGE_SEQUENCER_STSr_fields[] = 327 { 328 /* AN_ST_CL73_COMPLETE:0:0 */ 329 PHYMOD_SYMBOL_FIELD_ENCODE(116, 0, 0), 330 /* AN_ST_CL37_COMPLETE:1:1 */ 331 PHYMOD_SYMBOL_FIELD_ENCODE(115, 1, 1), 332 /* AN_ST_RX_NP_TOGGLE_ERR:2:2 */ 333 PHYMOD_SYMBOL_FIELD_ENCODE(136, 2, 2), 334 /* AN_ST_RX_INVALID_SEQ:3:3 */ 335 PHYMOD_SYMBOL_FIELD_ENCODE(130, 3, 3), 336 /* AN_ST_RX_UP_OUI_MATCH:4:4 */ 337 PHYMOD_SYMBOL_FIELD_ENCODE(139, 4, 4), 338 /* AN_ST_RX_UP_OUI_MISMATCH:5:5 */ 339 PHYMOD_SYMBOL_FIELD_ENCODE(140, 5, 5), 340 /* AN_ST_RX_UP_3:6:6 */ 341 PHYMOD_SYMBOL_FIELD_ENCODE(138, 6, 6), 342 /* AN_ST_RX_MP_MISMATCH:7:7 */ 343 PHYMOD_SYMBOL_FIELD_ENCODE(131, 7, 7), 344 /* AN_ST_RX_MP_OVER1G:8:8 */ 345 PHYMOD_SYMBOL_FIELD_ENCODE(134, 8, 8), 346 /* AN_ST_RX_MP_OUI:9:9 */ 347 PHYMOD_SYMBOL_FIELD_ENCODE(133, 9, 9), 348 /* AN_ST_RX_MP_NULL:10:10 */ 349 PHYMOD_SYMBOL_FIELD_ENCODE(132, 10, 10), 350 /* AN_ST_RX_NP:11:11 */ 351 PHYMOD_SYMBOL_FIELD_ENCODE(135, 11, 11), 352 /* AN_ST_RX_BP:12:12 */ 353 PHYMOD_SYMBOL_FIELD_ENCODE(129, 12, 12), 354 /* AN_ST_RX_SGMII_MISMATCH:13:13 */ 355 PHYMOD_SYMBOL_FIELD_ENCODE(137, 13, 13), 356 /* AN_ST_HP_MODE:14:14 */ 357 PHYMOD_SYMBOL_FIELD_ENCODE(123, 14, 14), 358 /* AN_ST_SGMII_MODE:15:15 */ 359 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(141, 15, 15) 360 }; 361 static uint32_t BCMI_TSCE16_XGXS_AN_X4_AN_SEQ_UNEXPECTED_PAGEr_fields[] = 362 { 363 /* SEQ_UNEXPECTED_PAGE:0:15 */ 364 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1290, 15, 0) 365 }; 366 static uint32_t BCMI_TSCE16_XGXS_AN_X4_CTLSr_fields[] = 367 { 368 /* PD_KX4_EN:0:0 */ 369 PHYMOD_SYMBOL_FIELD_ENCODE(1014, 0, 0), 370 /* PD_KX_EN:1:1 */ 371 PHYMOD_SYMBOL_FIELD_ENCODE(1015, 1, 1), 372 /* AN_GOOD_TRAP:2:2 */ 373 PHYMOD_SYMBOL_FIELD_ENCODE(51, 2, 2), 374 /* AN_GOOD_CHECK_TRAP:3:3 */ 375 PHYMOD_SYMBOL_FIELD_ENCODE(50, 3, 3), 376 /* LINKFAILTIMER_DIS:4:4 */ 377 PHYMOD_SYMBOL_FIELD_ENCODE(750, 4, 4), 378 /* LINKFAILTIMERQUAL_EN:5:5 */ 379 PHYMOD_SYMBOL_FIELD_ENCODE(749, 5, 5), 380 /* AN_FAIL_COUNT_LIMIT:6:9 */ 381 PHYMOD_SYMBOL_FIELD_ENCODE(49, 9, 6), 382 /* OUI_CONTROL:10:15 */ 383 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(964, 15, 10) 384 }; 385 static uint32_t BCMI_TSCE16_XGXS_AN_X4_ENSr_fields[] = 386 { 387 /* CL73_AN_RESTART:0:0 */ 388 PHYMOD_SYMBOL_FIELD_ENCODE(377, 0, 0), 389 /* CL37_AN_RESTART:1:1 */ 390 PHYMOD_SYMBOL_FIELD_ENCODE(259, 1, 1), 391 /* HPAM_TO_CL73_AUTO_ENABLE:2:2 */ 392 PHYMOD_SYMBOL_FIELD_ENCODE(689, 2, 2), 393 /* CL73_BAM_TO_HPAM_AUTO_ENABLE:3:3 */ 394 PHYMOD_SYMBOL_FIELD_ENCODE(380, 3, 3), 395 /* SGMII_TO_CL37_AUTO_ENABLE:4:4 */ 396 PHYMOD_SYMBOL_FIELD_ENCODE(1299, 4, 4), 397 /* CL37_BAM_TO_SGMII_AUTO_ENABLE:5:5 */ 398 PHYMOD_SYMBOL_FIELD_ENCODE(263, 5, 5), 399 /* CL37_ENABLE:6:6 */ 400 PHYMOD_SYMBOL_FIELD_ENCODE(264, 6, 6), 401 /* CL37_SGMII_ENABLE:7:7 */ 402 PHYMOD_SYMBOL_FIELD_ENCODE(272, 7, 7), 403 /* CL73_ENABLE:8:8 */ 404 PHYMOD_SYMBOL_FIELD_ENCODE(381, 8, 8), 405 /* CL73_HPAM_ENABLE:9:9 */ 406 PHYMOD_SYMBOL_FIELD_ENCODE(383, 9, 9), 407 /* CL73_BAM_ENABLE:10:10 */ 408 PHYMOD_SYMBOL_FIELD_ENCODE(379, 10, 10), 409 /* CL37_BAM_ENABLE:11:11 */ 410 PHYMOD_SYMBOL_FIELD_ENCODE(262, 11, 11), 411 /* NUM_ADVERTISED_LANES:12:13 */ 412 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(950, 13, 12) 413 }; 414 static uint32_t BCMI_TSCE16_XGXS_AN_X4_LD_CTLr_fields[] = 415 { 416 /* SW_HCD:0:0 */ 417 PHYMOD_SYMBOL_FIELD_ENCODE(1351, 0, 0), 418 /* SW_AN:1:1 */ 419 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1350, 1, 1) 420 }; 421 static uint32_t BCMI_TSCE16_XGXS_AN_X4_LD_PAGE0r_fields[] = 422 { 423 /* LD_PAGE_0_PAGE_DATA:0:15 */ 424 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(746, 15, 0) 425 }; 426 static uint32_t BCMI_TSCE16_XGXS_AN_X4_LD_PAGE1r_fields[] = 427 { 428 /* LD_PAGE_1_PAGE_DATA:0:15 */ 429 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(747, 15, 0) 430 }; 431 static uint32_t BCMI_TSCE16_XGXS_AN_X4_LD_PAGE2r_fields[] = 432 { 433 /* LD_PAGE_2_PAGE_DATA:0:15 */ 434 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(748, 15, 0) 435 }; 436 static uint32_t BCMI_TSCE16_XGXS_AN_X4_LOC_DEV_CL37_BAM_ABILr_fields[] = 437 { 438 /* OVER1G_PAGE_COUNT:0:1 */ 439 PHYMOD_SYMBOL_FIELD_ENCODE(968, 1, 0), 440 /* OVER1G_ABILITY:2:2 */ 441 PHYMOD_SYMBOL_FIELD_ENCODE(967, 2, 2), 442 /* CL37_BAM_CODE:3:11 */ 443 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(261, 11, 3) 444 }; 445 static uint32_t BCMI_TSCE16_XGXS_AN_X4_LOC_DEV_CL37_BASE_ABILr_fields[] = 446 { 447 /* SGMII_SPEED:0:1 */ 448 PHYMOD_SYMBOL_FIELD_ENCODE(1297, 1, 0), 449 /* SGMII_FULL_DUPLEX:2:2 */ 450 PHYMOD_SYMBOL_FIELD_ENCODE(1293, 2, 2), 451 /* CL37_FULL_DUPLEX:4:4 */ 452 PHYMOD_SYMBOL_FIELD_ENCODE(266, 4, 4), 453 /* CL37_HALF_DUPLEX:5:5 */ 454 PHYMOD_SYMBOL_FIELD_ENCODE(267, 5, 5), 455 /* CL37_PAUSE:6:7 */ 456 PHYMOD_SYMBOL_FIELD_ENCODE(270, 7, 6), 457 /* CL37_NEXT_PAGE:8:8 */ 458 PHYMOD_SYMBOL_FIELD_ENCODE(269, 8, 8), 459 /* SGMII_MASTER_MODE:9:9 */ 460 PHYMOD_SYMBOL_FIELD_ENCODE(1294, 9, 9), 461 /* AN_PD_TO_CL37_ENABLE:10:10 */ 462 PHYMOD_SYMBOL_FIELD_ENCODE(60, 10, 10), 463 /* CL37_AN_RESTART_RESET_DISABLE:11:11 */ 464 PHYMOD_SYMBOL_FIELD_ENCODE(260, 11, 11), 465 /* CL37_SW_RESTART_RESET_DISABLE:12:12 */ 466 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(273, 12, 12) 467 }; 468 static uint32_t BCMI_TSCE16_XGXS_AN_X4_LOC_DEV_CL73_BAM_ABILr_fields[] = 469 { 470 /* BAM_20GBASE_KR2:0:0 */ 471 PHYMOD_SYMBOL_FIELD_ENCODE(167, 0, 0), 472 /* BAM_20GBASE_CR2:1:1 */ 473 PHYMOD_SYMBOL_FIELD_ENCODE(166, 1, 1), 474 /* CL73_BAM_CODE:2:10 */ 475 PHYMOD_SYMBOL_FIELD_ENCODE(378, 10, 2), 476 /* HPAM_20GKR2:11:11 */ 477 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(688, 11, 11) 478 }; 479 static uint32_t BCMI_TSCE16_XGXS_AN_X4_LOC_DEV_CL73_BASE_ABIL0r_fields[] = 480 { 481 /* BASE_100GBASE_CR10:0:0 */ 482 PHYMOD_SYMBOL_FIELD_ENCODE(184, 0, 0), 483 /* BASE_40GBASE_CR4:1:1 */ 484 PHYMOD_SYMBOL_FIELD_ENCODE(187, 1, 1), 485 /* BASE_40GBASE_KR4:2:2 */ 486 PHYMOD_SYMBOL_FIELD_ENCODE(188, 2, 2), 487 /* BASE_10GBASE_KR:3:3 */ 488 PHYMOD_SYMBOL_FIELD_ENCODE(185, 3, 3), 489 /* BASE_10GBASE_KX4:4:4 */ 490 PHYMOD_SYMBOL_FIELD_ENCODE(186, 4, 4), 491 /* BASE_1000BASE_KX:5:5 */ 492 PHYMOD_SYMBOL_FIELD_ENCODE(183, 5, 5), 493 /* CL73_PAUSE:6:7 */ 494 PHYMOD_SYMBOL_FIELD_ENCODE(390, 7, 6), 495 /* FEC:8:9 */ 496 PHYMOD_SYMBOL_FIELD_ENCODE(661, 9, 8), 497 /* NEXT_PAGE:10:10 */ 498 PHYMOD_SYMBOL_FIELD_ENCODE(948, 10, 10), 499 /* CL73_REMOTE_FAULT:11:11 */ 500 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(391, 11, 11) 501 }; 502 static uint32_t BCMI_TSCE16_XGXS_AN_X4_LOC_DEV_CL73_BASE_ABIL1r_fields[] = 503 { 504 /* BASE_SELECTOR:0:4 */ 505 PHYMOD_SYMBOL_FIELD_ENCODE(189, 4, 0), 506 /* TRANSMIT_NONCE:5:9 */ 507 PHYMOD_SYMBOL_FIELD_ENCODE(1396, 9, 5), 508 /* CL73_NONCE_MATCH_VAL:10:10 */ 509 PHYMOD_SYMBOL_FIELD_ENCODE(387, 10, 10), 510 /* CL73_NONCE_MATCH_OVER:11:11 */ 511 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(386, 11, 11) 512 }; 513 static uint32_t BCMI_TSCE16_XGXS_AN_X4_LOC_DEV_OVER1G_ABIL0r_fields[] = 514 { 515 /* BAM_2P5GBASE_X:0:0 */ 516 PHYMOD_SYMBOL_FIELD_ENCODE(174, 0, 0), 517 /* BAM_5GBASE_X4:1:1 */ 518 PHYMOD_SYMBOL_FIELD_ENCODE(178, 1, 1), 519 /* BAM_6GBASE_X4:2:2 */ 520 PHYMOD_SYMBOL_FIELD_ENCODE(179, 2, 2), 521 /* BAM_10GBASE_X4:3:3 */ 522 PHYMOD_SYMBOL_FIELD_ENCODE(156, 3, 3), 523 /* BAM_10GBASE_X4_CX4:4:4 */ 524 PHYMOD_SYMBOL_FIELD_ENCODE(157, 4, 4), 525 /* BAM_10GBASE_X2:5:5 */ 526 PHYMOD_SYMBOL_FIELD_ENCODE(154, 5, 5), 527 /* BAM_10GBASE_X2_CX4:6:6 */ 528 PHYMOD_SYMBOL_FIELD_ENCODE(155, 6, 6), 529 /* BAM_10P5GBASE_X2:7:7 */ 530 PHYMOD_SYMBOL_FIELD_ENCODE(158, 7, 7), 531 /* BAM_12GBASE_X4:8:8 */ 532 PHYMOD_SYMBOL_FIELD_ENCODE(159, 8, 8), 533 /* BAM_12P5GBASE_X4:9:9 */ 534 PHYMOD_SYMBOL_FIELD_ENCODE(160, 9, 9), 535 /* BAM_12P7GBASE_X2:10:10 */ 536 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(161, 10, 10) 537 }; 538 static uint32_t BCMI_TSCE16_XGXS_AN_X4_LOC_DEV_OVER1G_ABIL1r_fields[] = 539 { 540 /* BAM_13GBASE_X4:0:0 */ 541 PHYMOD_SYMBOL_FIELD_ENCODE(162, 0, 0), 542 /* BAM_15GBASE_X4:1:1 */ 543 PHYMOD_SYMBOL_FIELD_ENCODE(163, 1, 1), 544 /* BAM_15P75GBASE_X2:2:2 */ 545 PHYMOD_SYMBOL_FIELD_ENCODE(164, 2, 2), 546 /* BAM_16GBASE_X4:3:3 */ 547 PHYMOD_SYMBOL_FIELD_ENCODE(165, 3, 3), 548 /* BAM_20GBASE_X4_CX4:4:4 */ 549 PHYMOD_SYMBOL_FIELD_ENCODE(171, 4, 4), 550 /* BAM_20GBASE_X4:5:5 */ 551 PHYMOD_SYMBOL_FIELD_ENCODE(170, 5, 5), 552 /* BAM_20GBASE_X2:6:6 */ 553 PHYMOD_SYMBOL_FIELD_ENCODE(168, 6, 6), 554 /* BAM_20GBASE_X2_CX4:7:7 */ 555 PHYMOD_SYMBOL_FIELD_ENCODE(169, 7, 7), 556 /* BAM_21GBASE_X4:8:8 */ 557 PHYMOD_SYMBOL_FIELD_ENCODE(172, 8, 8), 558 /* BAM_25P455GBASE_X4:9:9 */ 559 PHYMOD_SYMBOL_FIELD_ENCODE(173, 9, 9), 560 /* BAM_31P5GBASE_X4:10:10 */ 561 PHYMOD_SYMBOL_FIELD_ENCODE(175, 10, 10), 562 /* BAM_32P7GBASE_X4:11:11 */ 563 PHYMOD_SYMBOL_FIELD_ENCODE(176, 11, 11), 564 /* BAM_40GBASE_X4:12:12 */ 565 PHYMOD_SYMBOL_FIELD_ENCODE(177, 12, 12), 566 /* CL72:13:13 */ 567 PHYMOD_SYMBOL_FIELD_ENCODE(321, 13, 13), 568 /* FEC:14:14 */ 569 PHYMOD_SYMBOL_FIELD_ENCODE(661, 14, 14), 570 /* HG2:15:15 */ 571 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(678, 15, 15) 572 }; 573 static uint32_t BCMI_TSCE16_XGXS_AN_X4_LP_BASE_PAGE1r_fields[] = 574 { 575 /* LP_BASE_PAGE1_PAGE_DATA:0:15 */ 576 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(816, 15, 0) 577 }; 578 static uint32_t BCMI_TSCE16_XGXS_AN_X4_LP_BASE_PAGE2r_fields[] = 579 { 580 /* LP_BASE_PAGE2_PAGE_DATA:0:15 */ 581 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(817, 15, 0) 582 }; 583 static uint32_t BCMI_TSCE16_XGXS_AN_X4_LP_BASE_PAGE3r_fields[] = 584 { 585 /* LP_BASE_PAGE3_PAGE_DATA:0:15 */ 586 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(818, 15, 0) 587 }; 588 static uint32_t BCMI_TSCE16_XGXS_AN_X4_LP_MP1024_UP1r_fields[] = 589 { 590 /* LP_MP1024_UP1_PAGE_DATA:0:15 */ 591 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(819, 15, 0) 592 }; 593 static uint32_t BCMI_TSCE16_XGXS_AN_X4_LP_MP1024_UP2r_fields[] = 594 { 595 /* LP_MP1024_UP2_PAGE_DATA:0:15 */ 596 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(820, 15, 0) 597 }; 598 static uint32_t BCMI_TSCE16_XGXS_AN_X4_LP_MP1024_UP3r_fields[] = 599 { 600 /* LP_MP1024_UP3_PAGE_DATA:0:15 */ 601 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(821, 15, 0) 602 }; 603 static uint32_t BCMI_TSCE16_XGXS_AN_X4_LP_MP1024_UP4r_fields[] = 604 { 605 /* LP_MP1024_UP4_PAGE_DATA:0:15 */ 606 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(822, 15, 0) 607 }; 608 static uint32_t BCMI_TSCE16_XGXS_AN_X4_LP_MP5_UP1r_fields[] = 609 { 610 /* LP_MP5_UP1_PAGE_DATA:0:15 */ 611 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(823, 15, 0) 612 }; 613 static uint32_t BCMI_TSCE16_XGXS_AN_X4_LP_MP5_UP2r_fields[] = 614 { 615 /* LP_MP5_UP2_PAGE_DATA:0:15 */ 616 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(824, 15, 0) 617 }; 618 static uint32_t BCMI_TSCE16_XGXS_AN_X4_LP_MP5_UP3r_fields[] = 619 { 620 /* LP_MP5_UP3_PAGE_DATA:0:15 */ 621 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(825, 15, 0) 622 }; 623 static uint32_t BCMI_TSCE16_XGXS_AN_X4_LP_MP5_UP4r_fields[] = 624 { 625 /* LP_MP5_UP4_PAGE_DATA:0:15 */ 626 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(826, 15, 0) 627 }; 628 static uint32_t BCMI_TSCE16_XGXS_AN_X4_LP_PAGE0r_fields[] = 629 { 630 /* LP_PAGE_0_PAGE_DATA:0:15 */ 631 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(827, 15, 0) 632 }; 633 static uint32_t BCMI_TSCE16_XGXS_AN_X4_LP_PAGE1r_fields[] = 634 { 635 /* LP_PAGE_1_PAGE_DATA:0:15 */ 636 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(828, 15, 0) 637 }; 638 static uint32_t BCMI_TSCE16_XGXS_AN_X4_LP_PAGE2r_fields[] = 639 { 640 /* LP_PAGE_2_PAGE_DATA:0:15 */ 641 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(829, 15, 0) 642 }; 643 static uint32_t BCMI_TSCE16_XGXS_AN_X4_SW_CTL_STSr_fields[] = 644 { 645 /* TLA_LN_SEQUENCER_FSM_STATUS1:0:7 */ 646 PHYMOD_SYMBOL_FIELD_ENCODE(1395, 7, 0), 647 /* PD_CL37_COMPLETED:8:8 */ 648 PHYMOD_SYMBOL_FIELD_ENCODE(1009, 8, 8), 649 /* LP_STATUS_VALID:13:13 */ 650 PHYMOD_SYMBOL_FIELD_ENCODE(830, 13, 13), 651 /* LD_CONTROL_VALID:14:14 */ 652 PHYMOD_SYMBOL_FIELD_ENCODE(745, 14, 14), 653 /* AN_COMPLETED_SW:15:15 */ 654 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(47, 15, 15) 655 }; 656 static uint32_t BCMI_TSCE16_XGXS_AN_X4_TLA_SEQUENCER_STSr_fields[] = 657 { 658 /* TLA_LN_SEQUENCER_FSM_STATUS:0:15 */ 659 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1394, 15, 0) 660 }; 661 static uint32_t BCMI_TSCE16_XGXS_BARREL_SHIFTER_STTSC_12r_fields[] = 662 { 663 /* SHIFT_AMMOUNT:0:7 */ 664 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1300, 7, 0) 665 }; 666 static uint32_t BCMI_TSCE16_XGXS_BERCNTTSC_12r_fields[] = 667 { 668 /* BIP_ERROR_COUNT_PER_LANE:0:7 */ 669 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(197, 7, 0) 670 }; 671 static uint32_t BCMI_TSCE16_XGXS_BLK_ADDRr_fields[] = 672 { 673 /* MDIO_BLK_ADDR:4:14 */ 674 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(846, 14, 4) 675 }; 676 static uint32_t BCMI_TSCE16_XGXS_CL49_LOCK_FSM_STSTSC_12r_fields[] = 677 { 678 /* LSM_CURR_STATE:0:1 */ 679 PHYMOD_SYMBOL_FIELD_ENCODE(831, 1, 0), 680 /* LSM_HIS_STATE:2:4 */ 681 PHYMOD_SYMBOL_FIELD_ENCODE(832, 4, 2), 682 /* ALIGN_STATUS_CL82:7:7 */ 683 PHYMOD_SYMBOL_FIELD_ENCODE(28, 7, 7), 684 /* RMLD_STATUS:8:15 */ 685 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1189, 15, 8) 686 }; 687 static uint32_t BCMI_TSCE16_XGXS_CL72IR_BASE_R_LP_COEFF_UPDr_fields[] = 688 { 689 /* CL72_IEEE_LP_COEFF_UPDATE:0:15 */ 690 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(337, 15, 0) 691 }; 692 static uint32_t BCMI_TSCE16_XGXS_CL72IR_BASE_R_LP_STS_REPr_fields[] = 693 { 694 /* CL72_IEEE_LP_STATUS_REPORT:0:15 */ 695 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(338, 15, 0) 696 }; 697 static uint32_t BCMI_TSCE16_XGXS_CL72IT_BASE_R_LD_COEFF_UPDr_fields[] = 698 { 699 /* CL72_IEEE_LD_COEFF_UPDATE:0:15 */ 700 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(335, 15, 0) 701 }; 702 static uint32_t BCMI_TSCE16_XGXS_CL72IT_BASE_R_LD_STS_REPr_fields[] = 703 { 704 /* CL72_IEEE_LD_STATUS_REPORT:0:15 */ 705 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(336, 15, 0) 706 }; 707 static uint32_t BCMI_TSCE16_XGXS_CL72IT_BASE_R_PMD_CTLr_fields[] = 708 { 709 /* CL72_IEEE_RESTART_TRAINING:0:0 */ 710 PHYMOD_SYMBOL_FIELD_ENCODE(340, 0, 0), 711 /* CL72_IEEE_TRAINING_ENABLE:1:1 */ 712 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(341, 1, 1) 713 }; 714 static uint32_t BCMI_TSCE16_XGXS_CL72IT_BASE_R_PMD_STSr_fields[] = 715 { 716 /* CL72_IEEE_RECEIVER_STATUS:0:0 */ 717 PHYMOD_SYMBOL_FIELD_ENCODE(339, 0, 0), 718 /* CL72_IEEE_FRAME_LOCK:1:1 */ 719 PHYMOD_SYMBOL_FIELD_ENCODE(334, 1, 1), 720 /* CL72_IEEE_TRAINING_STATUS:2:2 */ 721 PHYMOD_SYMBOL_FIELD_ENCODE(343, 2, 2), 722 /* CL72_IEEE_TRAINING_FAILURE:3:3 */ 723 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(342, 3, 3) 724 }; 725 static uint32_t BCMI_TSCE16_XGXS_CL72UR_CTL0r_fields[] = 726 { 727 /* CL72_RX_TRAINING_EN:0:0 */ 728 PHYMOD_SYMBOL_FIELD_ENCODE(363, 0, 0), 729 /* CL72_TR_COARSE_LOCK:1:1 */ 730 PHYMOD_SYMBOL_FIELD_ENCODE(371, 1, 1), 731 /* CL72_RX_SIGNAL_OK:2:2 */ 732 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(362, 2, 2) 733 }; 734 static uint32_t BCMI_TSCE16_XGXS_CL72UR_CTL1r_fields[] = 735 { 736 /* CL72_GOOD_MARKER_CNT:0:1 */ 737 PHYMOD_SYMBOL_FIELD_ENCODE(333, 1, 0), 738 /* CL72_BAD_MARKER_CNT:4:6 */ 739 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(322, 6, 4) 740 }; 741 static uint32_t BCMI_TSCE16_XGXS_CL72UR_CTL2r_fields[] = 742 { 743 /* CL72_CTRL_FRAME_DLY:0:3 */ 744 PHYMOD_SYMBOL_FIELD_ENCODE(325, 3, 0), 745 /* CL72_DME_CELL_BOUNDARY_CHK:4:4 */ 746 PHYMOD_SYMBOL_FIELD_ENCODE(327, 4, 4), 747 /* CL72_STRICT_DME_CHK:5:5 */ 748 PHYMOD_SYMBOL_FIELD_ENCODE(364, 5, 5), 749 /* CL72_STRICT_MARKER_CHK:6:6 */ 750 PHYMOD_SYMBOL_FIELD_ENCODE(365, 6, 6), 751 /* CL72_PPM_OFFSET_EN:7:7 */ 752 PHYMOD_SYMBOL_FIELD_ENCODE(356, 7, 7), 753 /* CL72_RX_DP_LN_CLK_EN:8:8 */ 754 PHYMOD_SYMBOL_FIELD_ENCODE(361, 8, 8), 755 /* CL72_FRAME_CONSISTENCY_CHK_EN:9:9 */ 756 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(331, 9, 9) 757 }; 758 static uint32_t BCMI_TSCE16_XGXS_CL72UR_STS0r_fields[] = 759 { 760 /* CL72_FRAME_LOCK:0:0 */ 761 PHYMOD_SYMBOL_FIELD_ENCODE(332, 0, 0), 762 /* CL72_REMOTE_RX_READY:1:1 */ 763 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(360, 1, 1) 764 }; 765 static uint32_t BCMI_TSCE16_XGXS_CL72UR_UC_INTR_CTL0r_fields[] = 766 { 767 /* CL72_MICRO_UPDATE_CHG_INT_EN:0:0 */ 768 PHYMOD_SYMBOL_FIELD_ENCODE(352, 0, 0), 769 /* CL72_MICRO_STATUS_CHG_INT_EN:1:1 */ 770 PHYMOD_SYMBOL_FIELD_ENCODE(348, 1, 1), 771 /* CL72_MICRO_FRAME_LOCK_INT_EN:2:2 */ 772 PHYMOD_SYMBOL_FIELD_ENCODE(346, 2, 2), 773 /* CL72_MICRO_UPDATE_REQ_INT_FRC:8:8 */ 774 PHYMOD_SYMBOL_FIELD_ENCODE(354, 8, 8), 775 /* CL72_MICRO_UPDATE_REQ_INT_FRC_VAL:9:9 */ 776 PHYMOD_SYMBOL_FIELD_ENCODE(355, 9, 9), 777 /* CL72_MICRO_STATUS_RESP_INT_FRC:10:10 */ 778 PHYMOD_SYMBOL_FIELD_ENCODE(350, 10, 10), 779 /* CL72_MICRO_STATUS_RESP_INT_FRC_VAL:11:11 */ 780 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(351, 11, 11) 781 }; 782 static uint32_t BCMI_TSCE16_XGXS_CL72UR_UC_STS0r_fields[] = 783 { 784 /* CL72_MICRO_UPDATE_CHG_LSTATUS:0:0 */ 785 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(353, 0, 0) 786 }; 787 static uint32_t BCMI_TSCE16_XGXS_CL72UR_UC_STS1r_fields[] = 788 { 789 /* CL72_MICRO_STATUS_CHG_LSTATUS:0:0 */ 790 PHYMOD_SYMBOL_FIELD_ENCODE(349, 0, 0), 791 /* CL72_MICRO_FRAME_LOCK_LSTATUS:1:1 */ 792 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(347, 1, 1) 793 }; 794 static uint32_t BCMI_TSCE16_XGXS_CL72UT_CTL0r_fields[] = 795 { 796 /* CL72_SW_RX_TRAINED:0:0 */ 797 PHYMOD_SYMBOL_FIELD_ENCODE(368, 0, 0), 798 /* CL72_SW_FRAME_LOCK:1:1 */ 799 PHYMOD_SYMBOL_FIELD_ENCODE(366, 1, 1), 800 /* CL72_SW_REMOTE_RX_READY:2:2 */ 801 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(367, 2, 2) 802 }; 803 static uint32_t BCMI_TSCE16_XGXS_CL72UT_CTL1r_fields[] = 804 { 805 /* CL72_BRK_RING_OSC:0:0 */ 806 PHYMOD_SYMBOL_FIELD_ENCODE(323, 0, 0), 807 /* CL72_DIS_MAX_WAIT_TIMER:1:1 */ 808 PHYMOD_SYMBOL_FIELD_ENCODE(326, 1, 1), 809 /* CL72_TX_DP_LN_CLK_EN:2:2 */ 810 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(375, 2, 2) 811 }; 812 static uint32_t BCMI_TSCE16_XGXS_CL72UT_CTL2r_fields[] = 813 { 814 /* CL72_TXFIR_PRE:0:3 */ 815 PHYMOD_SYMBOL_FIELD_ENCODE(374, 3, 0), 816 /* CL72_TXFIR_POST:8:12 */ 817 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(373, 12, 8) 818 }; 819 static uint32_t BCMI_TSCE16_XGXS_CL72UT_CTL3r_fields[] = 820 { 821 /* CL72_TXFIR_MAIN:0:5 */ 822 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(372, 5, 0) 823 }; 824 static uint32_t BCMI_TSCE16_XGXS_CL72UT_CTL4r_fields[] = 825 { 826 /* CL72_PRBS_SEED_VAL:0:10 */ 827 PHYMOD_SYMBOL_FIELD_ENCODE(359, 10, 0), 828 /* CL72_CL93PRBS_POLY_SEL:11:12 */ 829 PHYMOD_SYMBOL_FIELD_ENCODE(324, 12, 11), 830 /* CL72_PRBS_MODE_SEL:13:13 */ 831 PHYMOD_SYMBOL_FIELD_ENCODE(357, 13, 13), 832 /* CL72_PRBS_SEED_SEL:14:15 */ 833 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(358, 15, 14) 834 }; 835 static uint32_t BCMI_TSCE16_XGXS_CL72UT_LD_XMT_STS_PAGEr_fields[] = 836 { 837 /* CL72_LD_XMT_STATUS_PAGE:0:15 */ 838 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(344, 15, 0) 839 }; 840 static uint32_t BCMI_TSCE16_XGXS_CL72UT_STS0r_fields[] = 841 { 842 /* CL72_LOCAL_RX_READY:0:0 */ 843 PHYMOD_SYMBOL_FIELD_ENCODE(345, 0, 0), 844 /* CL72_TRAINING_FSM_SIGNAL_DETECT:1:1 */ 845 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(370, 1, 1) 846 }; 847 static uint32_t BCMI_TSCE16_XGXS_CL72UT_XMT_UPD_PAGEr_fields[] = 848 { 849 /* CL72_XMT_UPDATE_PAGE:0:15 */ 850 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(376, 15, 0) 851 }; 852 static uint32_t BCMI_TSCE16_XGXS_CL72_EN_MASKr_fields[] = 853 { 854 /* CL72_EN_MASK:0:15 */ 855 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(329, 15, 0) 856 }; 857 static uint32_t BCMI_TSCE16_XGXS_CL82_BER_HO_STSr_fields[] = 858 { 859 /* BER_HO:0:15 */ 860 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(192, 15, 0) 861 }; 862 static uint32_t BCMI_TSCE16_XGXS_CL82_LANES_1_0_AM_BYTE2r_fields[] = 863 { 864 /* LANE_0_AM_2:0:7 */ 865 PHYMOD_SYMBOL_FIELD_ENCODE(728, 7, 0), 866 /* LANE_1_AM_2:8:15 */ 867 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(730, 15, 8) 868 }; 869 static uint32_t BCMI_TSCE16_XGXS_CL82_LN_0_AM_BYTE10r_fields[] = 870 { 871 /* LANE_0_AM_1_0:0:15 */ 872 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(727, 15, 0) 873 }; 874 static uint32_t BCMI_TSCE16_XGXS_CL82_LN_1_AM_BYTE10r_fields[] = 875 { 876 /* LANE_1_AM_1_0:0:15 */ 877 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(729, 15, 0) 878 }; 879 static uint32_t BCMI_TSCE16_XGXS_CL82_PCS_ERRED_BLKS_HOr_fields[] = 880 { 881 /* ERRORED_BLOCKS_HO:0:13 */ 882 PHYMOD_SYMBOL_FIELD_ENCODE(645, 13, 0), 883 /* ERRORED_BLOCKS_HO_PRESENT:15:15 */ 884 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(646, 15, 15) 885 }; 886 static uint32_t BCMI_TSCE16_XGXS_CL82_PCS_LATCH_STSTSC_12r_fields[] = 887 { 888 /* AM_LOCK_HIS_STATE:0:9 */ 889 PHYMOD_SYMBOL_FIELD_ENCODE(39, 9, 0), 890 /* AMRKR_SPACING_ERR_LATCH_MUX:10:10 */ 891 PHYMOD_SYMBOL_FIELD_ENCODE(29, 10, 10), 892 /* SYNC_STATUS_LL:12:12 */ 893 PHYMOD_SYMBOL_FIELD_ENCODE(1368, 12, 12), 894 /* SYNC_STATUS_LH:13:13 */ 895 PHYMOD_SYMBOL_FIELD_ENCODE(1367, 13, 13), 896 /* AM_LOCK_LL:14:14 */ 897 PHYMOD_SYMBOL_FIELD_ENCODE(41, 14, 14), 898 /* AM_LOCK_LH:15:15 */ 899 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(40, 15, 15) 900 }; 901 static uint32_t BCMI_TSCE16_XGXS_CL82_PCS_LIVE_STSTSC_12r_fields[] = 902 { 903 /* AM_LOCK_STATE:0:9 */ 904 PHYMOD_SYMBOL_FIELD_ENCODE(42, 9, 0), 905 /* SYNC_STATUS:14:14 */ 906 PHYMOD_SYMBOL_FIELD_ENCODE(1366, 14, 14), 907 /* AM_LOCK:15:15 */ 908 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(38, 15, 15) 909 }; 910 static uint32_t BCMI_TSCE16_XGXS_CL82_RX_AM_TMRr_fields[] = 911 { 912 /* AM_TIMER_INIT_RX_VAL:0:15 */ 913 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(43, 15, 0) 914 }; 915 static uint32_t BCMI_TSCE16_XGXS_CL82_RX_DECR_STSr_fields[] = 916 { 917 /* RXSM_STATE:0:6 */ 918 PHYMOD_SYMBOL_FIELD_ENCODE(1209, 6, 0), 919 /* R_TYPE_CODED:7:12 */ 920 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1260, 12, 7) 921 }; 922 static uint32_t BCMI_TSCE16_XGXS_CL82_RX_DESKEW_BER_STSr_fields[] = 923 { 924 /* BERMON_STATE:0:4 */ 925 PHYMOD_SYMBOL_FIELD_ENCODE(190, 4, 0), 926 /* LBERMON_STATE:6:10 */ 927 PHYMOD_SYMBOL_FIELD_ENCODE(742, 10, 6), 928 /* DESKEW_HIS_STATE:12:13 */ 929 PHYMOD_SYMBOL_FIELD_ENCODE(497, 13, 12), 930 /* DESKEW_STATE:14:15 */ 931 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(498, 15, 14) 932 }; 933 static uint32_t BCMI_TSCE16_XGXS_CORE_DP_RST_ST_STSr_fields[] = 934 { 935 /* CORE_DP_RESET_STATE:0:2 */ 936 PHYMOD_SYMBOL_FIELD_ENCODE(433, 2, 0), 937 /* TX_LANE_RESET_RELEASED_INDEX:3:7 */ 938 PHYMOD_SYMBOL_FIELD_ENCODE(1508, 7, 3), 939 /* LANE_RESET_RELEASED_INDEX:8:12 */ 940 PHYMOD_SYMBOL_FIELD_ENCODE(740, 12, 8), 941 /* LANE_RESET_RELEASED:14:14 */ 942 PHYMOD_SYMBOL_FIELD_ENCODE(739, 14, 14), 943 /* TX_LANE_RESET_RELEASED:15:15 */ 944 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1507, 15, 15) 945 }; 946 static uint32_t BCMI_TSCE16_XGXS_CORE_RST_OCC_CTLr_fields[] = 947 { 948 /* CORE_REG_RESET_OCCURRED:0:0 */ 949 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(437, 0, 0) 950 }; 951 static uint32_t BCMI_TSCE16_XGXS_DC_LEVEL_AFE_CTL0r_fields[] = 952 { 953 /* TXFIR_DC_LEVEL_0P5X:0:0 */ 954 PHYMOD_SYMBOL_FIELD_ENCODE(1435, 0, 0), 955 /* TXFIR_DC_LEVEL_1X:1:1 */ 956 PHYMOD_SYMBOL_FIELD_ENCODE(1436, 1, 1), 957 /* TXFIR_DC_LEVEL_2X_0:2:2 */ 958 PHYMOD_SYMBOL_FIELD_ENCODE(1437, 2, 2), 959 /* TXFIR_DC_LEVEL_2X_1:3:3 */ 960 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1438, 3, 3) 961 }; 962 static uint32_t BCMI_TSCE16_XGXS_DIGITAL_CTL1000X2r_fields[] = 963 { 964 /* DISABLE_REMOTE_FAULT_REPORTING:4:4 */ 965 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(571, 4, 4) 966 }; 967 static uint32_t BCMI_TSCE16_XGXS_DSC_CDR_CTL0r_fields[] = 968 { 969 /* CDR_PHASE_SAT_CTRL:0:0 */ 970 PHYMOD_SYMBOL_FIELD_ENCODE(244, 0, 0), 971 /* BR_PD_EN:1:1 */ 972 PHYMOD_SYMBOL_FIELD_ENCODE(204, 1, 1), 973 /* CDR_FREQ_EN:2:2 */ 974 PHYMOD_SYMBOL_FIELD_ENCODE(232, 2, 2), 975 /* CDR_INTEG_REG_CLR:4:4 */ 976 PHYMOD_SYMBOL_FIELD_ENCODE(238, 4, 4), 977 /* CDR_PHASE_ERR_FRZ:5:5 */ 978 PHYMOD_SYMBOL_FIELD_ENCODE(243, 5, 5), 979 /* CDR_INTEG_SAT_SEL:6:6 */ 980 PHYMOD_SYMBOL_FIELD_ENCODE(239, 6, 6), 981 /* CDR_FREQ_OVERRIDE_EN:7:7 */ 982 PHYMOD_SYMBOL_FIELD_ENCODE(233, 7, 7), 983 /* CDR_LM_THR_SEL:8:10 */ 984 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(241, 10, 8) 985 }; 986 static uint32_t BCMI_TSCE16_XGXS_DSC_CDR_CTL1r_fields[] = 987 { 988 /* DFE_VGA_UNFREEZE:0:0 */ 989 PHYMOD_SYMBOL_FIELD_ENCODE(561, 0, 0), 990 /* CDR_FREQ_OVERRIDE_VAL:1:15 */ 991 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(234, 15, 1) 992 }; 993 static uint32_t BCMI_TSCE16_XGXS_DSC_CDR_CTL2r_fields[] = 994 { 995 /* CDR_ZERO_POLARITY:0:0 */ 996 PHYMOD_SYMBOL_FIELD_ENCODE(247, 0, 0), 997 /* PHASE_ERR_OFFSET_MULT_2:1:1 */ 998 PHYMOD_SYMBOL_FIELD_ENCODE(1026, 1, 1), 999 /* PATTERN_SEL:4:7 */ 1000 PHYMOD_SYMBOL_FIELD_ENCODE(981, 7, 4), 1001 /* OSX2P_PHERR_GAIN:8:9 */ 1002 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(961, 9, 8) 1003 }; 1004 static uint32_t BCMI_TSCE16_XGXS_DSC_CDR_STS_INTEGr_fields[] = 1005 { 1006 /* CDR_INTEG_REG:0:15 */ 1007 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(237, 15, 0) 1008 }; 1009 static uint32_t BCMI_TSCE16_XGXS_DSC_CDR_STS_PHASE_ERRr_fields[] = 1010 { 1011 /* CDR_PHASE_ERR:0:4 */ 1012 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(242, 4, 0) 1013 }; 1014 static uint32_t BCMI_TSCE16_XGXS_DSC_DC_SLCR_OFFS_CTLr_fields[] = 1015 { 1016 /* DC_OFFSET_EN:0:0 */ 1017 PHYMOD_SYMBOL_FIELD_ENCODE(472, 0, 0), 1018 /* HW_DC_OFFSET_HYS_EN:1:1 */ 1019 PHYMOD_SYMBOL_FIELD_ENCODE(695, 1, 1), 1020 /* HW_DC_OFFSET_ERR_GAIN:2:3 */ 1021 PHYMOD_SYMBOL_FIELD_ENCODE(693, 3, 2), 1022 /* DC_OFFSET_INV:4:4 */ 1023 PHYMOD_SYMBOL_FIELD_ENCODE(473, 4, 4), 1024 /* DC_OFFSET_PATTERN_INV_EN:5:5 */ 1025 PHYMOD_SYMBOL_FIELD_ENCODE(476, 5, 5), 1026 /* HW_DC_OFFSET_GRAD_INV:6:6 */ 1027 PHYMOD_SYMBOL_FIELD_ENCODE(694, 6, 6), 1028 /* DC_OFFSET_PATTERN:8:11 */ 1029 PHYMOD_SYMBOL_FIELD_ENCODE(474, 11, 8), 1030 /* DC_OFFSET_PATTERN_BIT_EN:12:15 */ 1031 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(475, 15, 12) 1032 }; 1033 static uint32_t BCMI_TSCE16_XGXS_DSC_DFE_1_CTLr_fields[] = 1034 { 1035 /* DFE_1_ACC_CLR:0:0 */ 1036 PHYMOD_SYMBOL_FIELD_ENCODE(503, 0, 0), 1037 /* DFE_1_CMN_ONLY:1:1 */ 1038 PHYMOD_SYMBOL_FIELD_ENCODE(505, 1, 1), 1039 /* DFE_1_INV_P1:8:8 */ 1040 PHYMOD_SYMBOL_FIELD_ENCODE(512, 8, 8), 1041 /* DFE_1_INV_M1:9:9 */ 1042 PHYMOD_SYMBOL_FIELD_ENCODE(511, 9, 9), 1043 /* DFE_1_ERR_GAIN:10:11 */ 1044 PHYMOD_SYMBOL_FIELD_ENCODE(508, 11, 10), 1045 /* DFE_1_GRADIENT_INVERT:12:12 */ 1046 PHYMOD_SYMBOL_FIELD_ENCODE(510, 12, 12), 1047 /* DFE_1_ERR_SEL:13:14 */ 1048 PHYMOD_SYMBOL_FIELD_ENCODE(509, 14, 13), 1049 /* DFE_1_EN:15:15 */ 1050 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(507, 15, 15) 1051 }; 1052 static uint32_t BCMI_TSCE16_XGXS_DSC_DFE_1_STSr_fields[] = 1053 { 1054 /* DFE_1_CMN:0:5 */ 1055 PHYMOD_SYMBOL_FIELD_ENCODE(504, 5, 0), 1056 /* DFE_1_O:8:10 */ 1057 PHYMOD_SYMBOL_FIELD_ENCODE(513, 10, 8), 1058 /* DFE_1_E:11:13 */ 1059 PHYMOD_SYMBOL_FIELD_ENCODE(506, 13, 11), 1060 /* DFE_1_WANTS_NEGATIVE:15:15 */ 1061 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(514, 15, 15) 1062 }; 1063 static uint32_t BCMI_TSCE16_XGXS_DSC_DFE_2_CTLr_fields[] = 1064 { 1065 /* DFE_2_ACC_CLR:0:0 */ 1066 PHYMOD_SYMBOL_FIELD_ENCODE(515, 0, 0), 1067 /* DFE_2_CMN_ONLY:1:1 */ 1068 PHYMOD_SYMBOL_FIELD_ENCODE(517, 1, 1), 1069 /* DFE_2_INV_P1:8:8 */ 1070 PHYMOD_SYMBOL_FIELD_ENCODE(524, 8, 8), 1071 /* DFE_2_INV_M1:9:9 */ 1072 PHYMOD_SYMBOL_FIELD_ENCODE(523, 9, 9), 1073 /* DFE_2_ERR_GAIN:10:11 */ 1074 PHYMOD_SYMBOL_FIELD_ENCODE(520, 11, 10), 1075 /* DFE_2_GRADIENT_INVERT:12:12 */ 1076 PHYMOD_SYMBOL_FIELD_ENCODE(522, 12, 12), 1077 /* DFE_2_ERR_SEL:13:14 */ 1078 PHYMOD_SYMBOL_FIELD_ENCODE(521, 14, 13), 1079 /* DFE_2_EN:15:15 */ 1080 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(519, 15, 15) 1081 }; 1082 static uint32_t BCMI_TSCE16_XGXS_DSC_DFE_2_STSr_fields[] = 1083 { 1084 /* DFE_2_CMN:0:4 */ 1085 PHYMOD_SYMBOL_FIELD_ENCODE(516, 4, 0), 1086 /* DFE_2_SO:5:5 */ 1087 PHYMOD_SYMBOL_FIELD_ENCODE(527, 5, 5), 1088 /* DFE_2_SE:6:6 */ 1089 PHYMOD_SYMBOL_FIELD_ENCODE(526, 6, 6), 1090 /* DFE_2_O:8:10 */ 1091 PHYMOD_SYMBOL_FIELD_ENCODE(525, 10, 8), 1092 /* DFE_2_E:11:13 */ 1093 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(518, 13, 11) 1094 }; 1095 static uint32_t BCMI_TSCE16_XGXS_DSC_DFE_3_4_5_STSr_fields[] = 1096 { 1097 /* DFE_3_CMN:0:5 */ 1098 PHYMOD_SYMBOL_FIELD_ENCODE(529, 5, 0), 1099 /* DFE_4_CMN:6:10 */ 1100 PHYMOD_SYMBOL_FIELD_ENCODE(537, 10, 6), 1101 /* DFE_5_CMN:11:15 */ 1102 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(545, 15, 11) 1103 }; 1104 static uint32_t BCMI_TSCE16_XGXS_DSC_DFE_3_CTLr_fields[] = 1105 { 1106 /* DFE_3_ACC_CLR:0:0 */ 1107 PHYMOD_SYMBOL_FIELD_ENCODE(528, 0, 0), 1108 /* DFE_3_INV_P1:8:8 */ 1109 PHYMOD_SYMBOL_FIELD_ENCODE(535, 8, 8), 1110 /* DFE_3_INV_M1:9:9 */ 1111 PHYMOD_SYMBOL_FIELD_ENCODE(534, 9, 9), 1112 /* DFE_3_ERR_GAIN:10:11 */ 1113 PHYMOD_SYMBOL_FIELD_ENCODE(531, 11, 10), 1114 /* DFE_3_GRADIENT_INVERT:12:12 */ 1115 PHYMOD_SYMBOL_FIELD_ENCODE(533, 12, 12), 1116 /* DFE_3_ERR_SEL:13:14 */ 1117 PHYMOD_SYMBOL_FIELD_ENCODE(532, 14, 13), 1118 /* DFE_3_EN:15:15 */ 1119 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(530, 15, 15) 1120 }; 1121 static uint32_t BCMI_TSCE16_XGXS_DSC_DFE_4_CTLr_fields[] = 1122 { 1123 /* DFE_4_ACC_CLR:0:0 */ 1124 PHYMOD_SYMBOL_FIELD_ENCODE(536, 0, 0), 1125 /* DFE_4_INV_P1:8:8 */ 1126 PHYMOD_SYMBOL_FIELD_ENCODE(543, 8, 8), 1127 /* DFE_4_INV_M1:9:9 */ 1128 PHYMOD_SYMBOL_FIELD_ENCODE(542, 9, 9), 1129 /* DFE_4_ERR_GAIN:10:11 */ 1130 PHYMOD_SYMBOL_FIELD_ENCODE(539, 11, 10), 1131 /* DFE_4_GRADIENT_INVERT:12:12 */ 1132 PHYMOD_SYMBOL_FIELD_ENCODE(541, 12, 12), 1133 /* DFE_4_ERR_SEL:13:14 */ 1134 PHYMOD_SYMBOL_FIELD_ENCODE(540, 14, 13), 1135 /* DFE_4_EN:15:15 */ 1136 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(538, 15, 15) 1137 }; 1138 static uint32_t BCMI_TSCE16_XGXS_DSC_DFE_5_CTLr_fields[] = 1139 { 1140 /* DFE_5_ACC_CLR:0:0 */ 1141 PHYMOD_SYMBOL_FIELD_ENCODE(544, 0, 0), 1142 /* DFE_5_INV_P1:8:8 */ 1143 PHYMOD_SYMBOL_FIELD_ENCODE(551, 8, 8), 1144 /* DFE_5_INV_M1:9:9 */ 1145 PHYMOD_SYMBOL_FIELD_ENCODE(550, 9, 9), 1146 /* DFE_5_ERR_GAIN:10:11 */ 1147 PHYMOD_SYMBOL_FIELD_ENCODE(547, 11, 10), 1148 /* DFE_5_GRADIENT_INVERT:12:12 */ 1149 PHYMOD_SYMBOL_FIELD_ENCODE(549, 12, 12), 1150 /* DFE_5_ERR_SEL:13:14 */ 1151 PHYMOD_SYMBOL_FIELD_ENCODE(548, 14, 13), 1152 /* DFE_5_EN:15:15 */ 1153 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(546, 15, 15) 1154 }; 1155 static uint32_t BCMI_TSCE16_XGXS_DSC_DFE_COMMON_CTLr_fields[] = 1156 { 1157 /* DFE_LEAKY_LMS_EN:0:0 */ 1158 PHYMOD_SYMBOL_FIELD_ENCODE(556, 0, 0), 1159 /* DFE_LEAKY_LMS_UPD_DUR:1:4 */ 1160 PHYMOD_SYMBOL_FIELD_ENCODE(557, 4, 1), 1161 /* DFE_HW_EYE_CLOSURE_EN:5:5 */ 1162 PHYMOD_SYMBOL_FIELD_ENCODE(555, 5, 5), 1163 /* DFE_EYE_CLOSURE_ERR_SEL:6:7 */ 1164 PHYMOD_SYMBOL_FIELD_ENCODE(554, 7, 6), 1165 /* DFE_UPDATE_GAIN:13:13 */ 1166 PHYMOD_SYMBOL_FIELD_ENCODE(560, 13, 13), 1167 /* DFE_ALLOW_SIMULT:14:14 */ 1168 PHYMOD_SYMBOL_FIELD_ENCODE(553, 14, 14), 1169 /* DFE_ACC_HYS_EN:15:15 */ 1170 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(552, 15, 15) 1171 }; 1172 static uint32_t BCMI_TSCE16_XGXS_DSC_DFE_PAT_CTLr_fields[] = 1173 { 1174 /* DFE_PATTERN:0:5 */ 1175 PHYMOD_SYMBOL_FIELD_ENCODE(558, 5, 0), 1176 /* DFE_PATTERN_BIT_EN:8:13 */ 1177 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(559, 13, 8) 1178 }; 1179 static uint32_t BCMI_TSCE16_XGXS_DSC_E_CTLr_fields[] = 1180 { 1181 /* PD_CH_P1:0:0 */ 1182 PHYMOD_SYMBOL_FIELD_ENCODE(1008, 0, 0), 1183 /* OFFSET_PD:1:1 */ 1184 PHYMOD_SYMBOL_FIELD_ENCODE(955, 1, 1), 1185 /* EN_HGAIN:2:2 */ 1186 PHYMOD_SYMBOL_FIELD_ENCODE(623, 2, 2), 1187 /* P1_THRESH_SEL:3:3 */ 1188 PHYMOD_SYMBOL_FIELD_ENCODE(978, 3, 3), 1189 /* M1_THRESH_ZERO:4:4 */ 1190 PHYMOD_SYMBOL_FIELD_ENCODE(838, 4, 4), 1191 /* M1_THRESH_SEL:5:6 */ 1192 PHYMOD_SYMBOL_FIELD_ENCODE(837, 6, 5), 1193 /* PF_HIZ:7:7 */ 1194 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1023, 7, 7) 1195 }; 1196 static uint32_t BCMI_TSCE16_XGXS_DSC_E_PF2_LOWP_CTLr_fields[] = 1197 { 1198 /* PF2_LOWP_CTRL:0:2 */ 1199 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1019, 2, 0) 1200 }; 1201 static uint32_t BCMI_TSCE16_XGXS_DSC_E_PF_CTLr_fields[] = 1202 { 1203 /* PF_CTRL:0:3 */ 1204 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1022, 3, 0) 1205 }; 1206 static uint32_t BCMI_TSCE16_XGXS_DSC_F_DATA_EVEN_OFFSr_fields[] = 1207 { 1208 /* DATA_OFFSET_EVN_BIN:0:5 */ 1209 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(458, 5, 0) 1210 }; 1211 static uint32_t BCMI_TSCE16_XGXS_DSC_F_DATA_ODD_OFFSr_fields[] = 1212 { 1213 /* DATA_OFFSET_ODD_BIN:0:5 */ 1214 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(459, 5, 0) 1215 }; 1216 static uint32_t BCMI_TSCE16_XGXS_DSC_F_DC_OFFSr_fields[] = 1217 { 1218 /* DC_OFFSET_BIN:0:6 */ 1219 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(471, 6, 0) 1220 }; 1221 static uint32_t BCMI_TSCE16_XGXS_DSC_F_M1_EVEN_OFFSr_fields[] = 1222 { 1223 /* M1_OFFSET_EVN_BIN:0:5 */ 1224 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(834, 5, 0) 1225 }; 1226 static uint32_t BCMI_TSCE16_XGXS_DSC_F_M1_ODD_OFFSr_fields[] = 1227 { 1228 /* M1_OFFSET_ODD_BIN:0:5 */ 1229 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(835, 5, 0) 1230 }; 1231 static uint32_t BCMI_TSCE16_XGXS_DSC_F_P1_EVEN_OFFSr_fields[] = 1232 { 1233 /* P1_OFFSET_EVN_BIN:0:5 */ 1234 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(975, 5, 0) 1235 }; 1236 static uint32_t BCMI_TSCE16_XGXS_DSC_F_P1_ODD_OFFSr_fields[] = 1237 { 1238 /* P1_OFFSET_ODD_BIN:0:5 */ 1239 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(976, 5, 0) 1240 }; 1241 static uint32_t BCMI_TSCE16_XGXS_DSC_HWTUNE_OVR_OVRRr_fields[] = 1242 { 1243 /* HWTUNE_OVR_WRITE_VAL:0:8 */ 1244 PHYMOD_SYMBOL_FIELD_ENCODE(692, 8, 0), 1245 /* HWTUNE_OVR_WRITE_SEL:9:13 */ 1246 PHYMOD_SYMBOL_FIELD_ENCODE(691, 13, 9), 1247 /* HWTUNE_OVR_WRITE_EN:15:15 */ 1248 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(690, 15, 15) 1249 }; 1250 static uint32_t BCMI_TSCE16_XGXS_DSC_P1_FRAC_OFFS_CTLr_fields[] = 1251 { 1252 /* P1_OFFSET:0:6 */ 1253 PHYMOD_SYMBOL_FIELD_ENCODE(973, 6, 0), 1254 /* P1_OFFSET_EN:7:7 */ 1255 PHYMOD_SYMBOL_FIELD_ENCODE(974, 7, 7), 1256 /* P1_OFF_3LEVELQ_EN:8:8 */ 1257 PHYMOD_SYMBOL_FIELD_ENCODE(977, 8, 8), 1258 /* P1_HWTUNE_MAX:10:15 */ 1259 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(971, 15, 10) 1260 }; 1261 static uint32_t BCMI_TSCE16_XGXS_DSC_RX_PI_CNT_BIN_Dr_fields[] = 1262 { 1263 /* CNT_BIN_D_DREG:0:6 */ 1264 PHYMOD_SYMBOL_FIELD_ENCODE(418, 6, 0), 1265 /* CNT_BIN_P1_DREG:8:14 */ 1266 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(422, 14, 8) 1267 }; 1268 static uint32_t BCMI_TSCE16_XGXS_DSC_RX_PI_CNT_BIN_Mr_fields[] = 1269 { 1270 /* CNT_BIN_M1_MREG:0:6 */ 1271 PHYMOD_SYMBOL_FIELD_ENCODE(420, 6, 0), 1272 /* CNT_BIN_D_MREG:8:14 */ 1273 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(419, 14, 8) 1274 }; 1275 static uint32_t BCMI_TSCE16_XGXS_DSC_RX_PI_CNT_BIN_Pr_fields[] = 1276 { 1277 /* CNT_BIN_P1_PREG:0:6 */ 1278 PHYMOD_SYMBOL_FIELD_ENCODE(423, 6, 0), 1279 /* CNT_BIN_M1_PREG:8:14 */ 1280 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(421, 14, 8) 1281 }; 1282 static uint32_t BCMI_TSCE16_XGXS_DSC_RX_PI_CTLr_fields[] = 1283 { 1284 /* RX_PI_PHASE_STEP_CNT:0:6 */ 1285 PHYMOD_SYMBOL_FIELD_ENCODE(1247, 6, 0), 1286 /* RX_PI_MANUAL_STROBE:9:9 */ 1287 PHYMOD_SYMBOL_FIELD_ENCODE(1246, 9, 9), 1288 /* RX_PI_PHASE_STEP_DIR:10:10 */ 1289 PHYMOD_SYMBOL_FIELD_ENCODE(1248, 10, 10), 1290 /* RX_PI_MANUAL_MODE:11:11 */ 1291 PHYMOD_SYMBOL_FIELD_ENCODE(1244, 11, 11), 1292 /* RX_PI_SLICERS_EN:12:14 */ 1293 PHYMOD_SYMBOL_FIELD_ENCODE(1249, 14, 12), 1294 /* RX_PI_MANUAL_RESET:15:15 */ 1295 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1245, 15, 15) 1296 }; 1297 static uint32_t BCMI_TSCE16_XGXS_DSC_RX_PI_DIFF_BINr_fields[] = 1298 { 1299 /* CNT_D_MINUS_M1:0:7 */ 1300 PHYMOD_SYMBOL_FIELD_ENCODE(424, 7, 0), 1301 /* CNT_D_MINUS_P1:8:15 */ 1302 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(425, 15, 8) 1303 }; 1304 static uint32_t BCMI_TSCE16_XGXS_DSC_SCRATCHr_fields[] = 1305 { 1306 /* UC_DSC_SCRATCH:0:15 */ 1307 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1585, 15, 0) 1308 }; 1309 static uint32_t BCMI_TSCE16_XGXS_DSC_SLCR_OFFS_CTLr_fields[] = 1310 { 1311 /* HW_SLICER_OFFSET_EN:0:0 */ 1312 PHYMOD_SYMBOL_FIELD_ENCODE(696, 0, 0), 1313 /* HW_SLICER_OFFSET_HYS_EN:1:1 */ 1314 PHYMOD_SYMBOL_FIELD_ENCODE(699, 1, 1), 1315 /* HW_SLICER_OFFSET_ERR_GAIN:2:3 */ 1316 PHYMOD_SYMBOL_FIELD_ENCODE(697, 3, 2), 1317 /* HW_SLICER_OFFSET_INV_DATA:4:4 */ 1318 PHYMOD_SYMBOL_FIELD_ENCODE(700, 4, 4), 1319 /* HW_SLICER_OFFSET_INV_M1:5:5 */ 1320 PHYMOD_SYMBOL_FIELD_ENCODE(701, 5, 5), 1321 /* HW_SLICER_OFFSET_INV_P1:6:6 */ 1322 PHYMOD_SYMBOL_FIELD_ENCODE(702, 6, 6), 1323 /* HW_SLICER_OFFSET_GRAD_INV:7:7 */ 1324 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(698, 7, 7) 1325 }; 1326 static uint32_t BCMI_TSCE16_XGXS_DSC_SM_CTL0r_fields[] = 1327 { 1328 /* EEE_MODE_EN:1:1 */ 1329 PHYMOD_SYMBOL_FIELD_ENCODE(593, 1, 1), 1330 /* EEE_QUIET_RX_AFE_PWRDWN_VAL:2:2 */ 1331 PHYMOD_SYMBOL_FIELD_ENCODE(597, 2, 2), 1332 /* IGNORE_RX_MODE:3:3 */ 1333 PHYMOD_SYMBOL_FIELD_ENCODE(712, 3, 3), 1334 /* CL72_TIMER_EN:4:4 */ 1335 PHYMOD_SYMBOL_FIELD_ENCODE(369, 4, 4), 1336 /* UC_TUNE_EN:5:5 */ 1337 PHYMOD_SYMBOL_FIELD_ENCODE(1594, 5, 5), 1338 /* HW_TUNE_EN:6:6 */ 1339 PHYMOD_SYMBOL_FIELD_ENCODE(703, 6, 6), 1340 /* UC_TRNSUM_EN:7:7 */ 1341 PHYMOD_SYMBOL_FIELD_ENCODE(1593, 7, 7), 1342 /* EEE_MEASURE_EN:8:8 */ 1343 PHYMOD_SYMBOL_FIELD_ENCODE(592, 8, 8), 1344 /* SLICER_CAL_DONE_CLEAR:9:9 */ 1345 PHYMOD_SYMBOL_FIELD_ENCODE(1334, 9, 9), 1346 /* SLICER_CAL_BYPASS:10:10 */ 1347 PHYMOD_SYMBOL_FIELD_ENCODE(1332, 10, 10), 1348 /* UC_ACK_DSC_EEE_DONE:11:11 */ 1349 PHYMOD_SYMBOL_FIELD_ENCODE(1575, 11, 11), 1350 /* UC_ACK_DSC_RESTART:13:13 */ 1351 PHYMOD_SYMBOL_FIELD_ENCODE(1576, 13, 13), 1352 /* UC_ACK_DSC_CONFIG:14:14 */ 1353 PHYMOD_SYMBOL_FIELD_ENCODE(1574, 14, 14), 1354 /* SET_MEAS_INCOMPLETE:15:15 */ 1355 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1292, 15, 15) 1356 }; 1357 static uint32_t BCMI_TSCE16_XGXS_DSC_SM_CTL1r_fields[] = 1358 { 1359 /* RX_DSC_LOCK_FRC:0:0 */ 1360 PHYMOD_SYMBOL_FIELD_ENCODE(1220, 0, 0), 1361 /* RX_DSC_LOCK_FRC_VAL:1:1 */ 1362 PHYMOD_SYMBOL_FIELD_ENCODE(1221, 1, 1), 1363 /* DSC_CLR_FRC:2:2 */ 1364 PHYMOD_SYMBOL_FIELD_ENCODE(576, 2, 2), 1365 /* DSC_CLR_FRC_VAL:3:3 */ 1366 PHYMOD_SYMBOL_FIELD_ENCODE(577, 3, 3), 1367 /* TRNSUM_FRZ_FRC:4:4 */ 1368 PHYMOD_SYMBOL_FIELD_ENCODE(1410, 4, 4), 1369 /* TRNSUM_FRZ_FRC_VAL:5:5 */ 1370 PHYMOD_SYMBOL_FIELD_ENCODE(1411, 5, 5), 1371 /* TIMER_DONE_FRC:6:6 */ 1372 PHYMOD_SYMBOL_FIELD_ENCODE(1392, 6, 6), 1373 /* TIMER_DONE_FRC_VAL:7:7 */ 1374 PHYMOD_SYMBOL_FIELD_ENCODE(1393, 7, 7), 1375 /* FREQ_UPD_EN_FRC:8:8 */ 1376 PHYMOD_SYMBOL_FIELD_ENCODE(670, 8, 8), 1377 /* FREQ_UPD_EN_FRC_VAL:9:9 */ 1378 PHYMOD_SYMBOL_FIELD_ENCODE(671, 9, 9), 1379 /* CDR_FRZ_FRC:10:10 */ 1380 PHYMOD_SYMBOL_FIELD_ENCODE(235, 10, 10), 1381 /* CDR_FRZ_FRC_VAL:11:11 */ 1382 PHYMOD_SYMBOL_FIELD_ENCODE(236, 11, 11), 1383 /* TRNSUM_CLR_FRC:12:12 */ 1384 PHYMOD_SYMBOL_FIELD_ENCODE(1397, 12, 12), 1385 /* TRNSUM_CLR_FRC_VAL:13:13 */ 1386 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1398, 13, 13) 1387 }; 1388 static uint32_t BCMI_TSCE16_XGXS_DSC_SM_CTL2r_fields[] = 1389 { 1390 /* EEE_LFSR_CNT:0:12 */ 1391 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(590, 12, 0) 1392 }; 1393 static uint32_t BCMI_TSCE16_XGXS_DSC_SM_CTL3r_fields[] = 1394 { 1395 /* MEASURE_LFSR_CNT:0:12 */ 1396 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(859, 12, 0) 1397 }; 1398 static uint32_t BCMI_TSCE16_XGXS_DSC_SM_CTL4r_fields[] = 1399 { 1400 /* ACQ_CDR_TIMEOUT:0:4 */ 1401 PHYMOD_SYMBOL_FIELD_ENCODE(2, 4, 0), 1402 /* CDR_SETTLE_TIMEOUT:5:9 */ 1403 PHYMOD_SYMBOL_FIELD_ENCODE(246, 9, 5), 1404 /* HW_TUNE_TIMEOUT:10:14 */ 1405 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(704, 14, 10) 1406 }; 1407 static uint32_t BCMI_TSCE16_XGXS_DSC_SM_CTL5r_fields[] = 1408 { 1409 /* MEASURE_TIMEOUT:0:4 */ 1410 PHYMOD_SYMBOL_FIELD_ENCODE(860, 4, 0), 1411 /* EEE_ACQ_CDR_TIMEOUT:5:9 */ 1412 PHYMOD_SYMBOL_FIELD_ENCODE(586, 9, 5), 1413 /* EEE_CDR_SETTLE_TIMEOUT:10:14 */ 1414 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(588, 14, 10) 1415 }; 1416 static uint32_t BCMI_TSCE16_XGXS_DSC_SM_CTL6r_fields[] = 1417 { 1418 /* EEE_HW_TUNE_TIMEOUT:0:4 */ 1419 PHYMOD_SYMBOL_FIELD_ENCODE(589, 4, 0), 1420 /* SLICER_CAL_TIMEOUT:5:9 */ 1421 PHYMOD_SYMBOL_FIELD_ENCODE(1335, 9, 5), 1422 /* EEE_ANA_PWR_TIMEOUT:10:14 */ 1423 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(587, 14, 10) 1424 }; 1425 static uint32_t BCMI_TSCE16_XGXS_DSC_SM_CTL7r_fields[] = 1426 { 1427 /* CDR_BWSEL_INTEG_ACQCDR:0:3 */ 1428 PHYMOD_SYMBOL_FIELD_ENCODE(226, 3, 0), 1429 /* CDR_BWSEL_INTEG_EEE_ACQCDR:4:7 */ 1430 PHYMOD_SYMBOL_FIELD_ENCODE(227, 7, 4), 1431 /* CDR_BWSEL_INTEG_NORM:8:11 */ 1432 PHYMOD_SYMBOL_FIELD_ENCODE(228, 11, 8), 1433 /* CDR_BWSEL_PROP_ACQCDR:12:13 */ 1434 PHYMOD_SYMBOL_FIELD_ENCODE(229, 13, 12), 1435 /* CDR_BWSEL_PROP_NORM:14:15 */ 1436 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(231, 15, 14) 1437 }; 1438 static uint32_t BCMI_TSCE16_XGXS_DSC_SM_CTL8r_fields[] = 1439 { 1440 /* PHASE_ERR_OFFSET:0:3 */ 1441 PHYMOD_SYMBOL_FIELD_ENCODE(1024, 3, 0), 1442 /* EEE_PHASE_ERR_OFFSET:4:7 */ 1443 PHYMOD_SYMBOL_FIELD_ENCODE(594, 7, 4), 1444 /* PHASE_ERR_OFFSET_EN:8:9 */ 1445 PHYMOD_SYMBOL_FIELD_ENCODE(1025, 9, 8), 1446 /* EEE_PHASE_ERR_OFFSET_EN:10:11 */ 1447 PHYMOD_SYMBOL_FIELD_ENCODE(595, 11, 10), 1448 /* CDR_BWSEL_PROP_EEE_ACQCDR:14:15 */ 1449 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(230, 15, 14) 1450 }; 1451 static uint32_t BCMI_TSCE16_XGXS_DSC_SM_CTL9r_fields[] = 1452 { 1453 /* RX_RESTART_PMD:0:0 */ 1454 PHYMOD_SYMBOL_FIELD_ENCODE(1255, 0, 0), 1455 /* RX_RESTART_PMD_HOLD:1:1 */ 1456 PHYMOD_SYMBOL_FIELD_ENCODE(1256, 1, 1), 1457 /* DCOFF_CAL_TIMEOUT:10:14 */ 1458 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(470, 14, 10) 1459 }; 1460 static uint32_t BCMI_TSCE16_XGXS_DSC_SM_STS_DSC_LOCKr_fields[] = 1461 { 1462 /* RX_DSC_LOCK:0:0 */ 1463 PHYMOD_SYMBOL_FIELD_ENCODE(1219, 0, 0), 1464 /* MEAS_INCOMPLETE:1:1 */ 1465 PHYMOD_SYMBOL_FIELD_ENCODE(861, 1, 1), 1466 /* SLICER_CAL_DONE:2:2 */ 1467 PHYMOD_SYMBOL_FIELD_ENCODE(1333, 2, 2), 1468 /* EEE_MEASURE_CNT:7:15 */ 1469 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(591, 15, 7) 1470 }; 1471 static uint32_t BCMI_TSCE16_XGXS_DSC_SM_STS_DSC_STr_fields[] = 1472 { 1473 /* DSC_SM_GP_UC_REQ:0:5 */ 1474 PHYMOD_SYMBOL_FIELD_ENCODE(578, 5, 0), 1475 /* CDR_LM_OUTOFLOCK:6:6 */ 1476 PHYMOD_SYMBOL_FIELD_ENCODE(240, 6, 6), 1477 /* DSC_SM_READY_FOR_CMD:7:7 */ 1478 PHYMOD_SYMBOL_FIELD_ENCODE(579, 7, 7), 1479 /* DSC_SM_SCRATCH:8:10 */ 1480 PHYMOD_SYMBOL_FIELD_ENCODE(580, 10, 8), 1481 /* DSC_STATE:11:15 */ 1482 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(581, 15, 11) 1483 }; 1484 static uint32_t BCMI_TSCE16_XGXS_DSC_SM_STS_DSC_ST_EEE_ONE_HOTr_fields[] = 1485 { 1486 /* DSC_STATE_EEE_ONE_HOT:0:6 */ 1487 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(582, 6, 0) 1488 }; 1489 static uint32_t BCMI_TSCE16_XGXS_DSC_SM_STS_DSC_ST_ONE_HOTr_fields[] = 1490 { 1491 /* DSC_STATE_ONE_HOT:0:11 */ 1492 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(583, 11, 0) 1493 }; 1494 static uint32_t BCMI_TSCE16_XGXS_DSC_SM_STS_RESTARTr_fields[] = 1495 { 1496 /* RESTART_PI_EXT_MODE:0:0 */ 1497 PHYMOD_SYMBOL_FIELD_ENCODE(1159, 0, 0), 1498 /* RESTART_SIGDET:1:1 */ 1499 PHYMOD_SYMBOL_FIELD_ENCODE(1161, 1, 1), 1500 /* RESTART_PMD_RESTART:2:2 */ 1501 PHYMOD_SYMBOL_FIELD_ENCODE(1160, 2, 2), 1502 /* EEE_QUIET_FROM_EEE_STATES:3:3 */ 1503 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(596, 3, 3) 1504 }; 1505 static uint32_t BCMI_TSCE16_XGXS_DSC_TRNSUM_CTL1r_fields[] = 1506 { 1507 /* TRNSUM_TAP_RANGE_SEL:2:3 */ 1508 PHYMOD_SYMBOL_FIELD_ENCODE(1425, 3, 2), 1509 /* CDR_QPHASE_MULT_EN:4:4 */ 1510 PHYMOD_SYMBOL_FIELD_ENCODE(245, 4, 4), 1511 /* TRNSUM_EYE_CLOSURE_EN:5:5 */ 1512 PHYMOD_SYMBOL_FIELD_ENCODE(1406, 5, 5), 1513 /* TRNSUM_GAIN:6:7 */ 1514 PHYMOD_SYMBOL_FIELD_ENCODE(1412, 7, 6), 1515 /* TRNSUM_EDGE_PATTERN_EN:8:8 */ 1516 PHYMOD_SYMBOL_FIELD_ENCODE(1401, 8, 8), 1517 /* TRNSUM_PATTERN_FULL_CHECK_OFF:9:9 */ 1518 PHYMOD_SYMBOL_FIELD_ENCODE(1420, 9, 9), 1519 /* TRNSUM_INV_PATTERN_EN:10:10 */ 1520 PHYMOD_SYMBOL_FIELD_ENCODE(1414, 10, 10), 1521 /* TRNSUM_RANDOM_TAPSEL_DISABLE:11:11 */ 1522 PHYMOD_SYMBOL_FIELD_ENCODE(1423, 11, 11), 1523 /* TRNSUM_ERR_SEL:12:14 */ 1524 PHYMOD_SYMBOL_FIELD_ENCODE(1404, 14, 12), 1525 /* TRNSUM_EN:15:15 */ 1526 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1402, 15, 15) 1527 }; 1528 static uint32_t BCMI_TSCE16_XGXS_DSC_TRNSUM_CTL2r_fields[] = 1529 { 1530 /* TRNSUM_PATTERN_BIT_EN:0:7 */ 1531 PHYMOD_SYMBOL_FIELD_ENCODE(1419, 7, 0), 1532 /* TRNSUM_PATTERN:8:15 */ 1533 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1418, 15, 8) 1534 }; 1535 static uint32_t BCMI_TSCE16_XGXS_DSC_TRNSUM_CTL3r_fields[] = 1536 { 1537 /* TRNSUM_TAP_SIGN:0:7 */ 1538 PHYMOD_SYMBOL_FIELD_ENCODE(1426, 7, 0), 1539 /* TRNSUM_TAP_EN:8:15 */ 1540 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1424, 15, 8) 1541 }; 1542 static uint32_t BCMI_TSCE16_XGXS_DSC_TRNSUM_CTL4r_fields[] = 1543 { 1544 /* TRNSUM_UNSIGNED_CORR:0:0 */ 1545 PHYMOD_SYMBOL_FIELD_ENCODE(1427, 0, 0), 1546 /* TRNSUM_UNSIGNED_FLIP:1:1 */ 1547 PHYMOD_SYMBOL_FIELD_ENCODE(1428, 1, 1), 1548 /* TDR_BIT_SEL:2:6 */ 1549 PHYMOD_SYMBOL_FIELD_ENCODE(1370, 6, 2), 1550 /* TDR_TRNSUM_EN:7:7 */ 1551 PHYMOD_SYMBOL_FIELD_ENCODE(1373, 7, 7), 1552 /* TDR_CYCLE_SEL:8:11 */ 1553 PHYMOD_SYMBOL_FIELD_ENCODE(1372, 11, 8), 1554 /* TDR_CYCLE_BIN:12:15 */ 1555 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1371, 15, 12) 1556 }; 1557 static uint32_t BCMI_TSCE16_XGXS_DSC_TRNSUM_CTL5r_fields[] = 1558 { 1559 /* TRNSUM_CLR_SC:0:0 */ 1560 PHYMOD_SYMBOL_FIELD_ENCODE(1399, 0, 0), 1561 /* TRNSUM_DISABLE_SM_CLEAR:1:1 */ 1562 PHYMOD_SYMBOL_FIELD_ENCODE(1400, 1, 1), 1563 /* TRNSUM_PATTERN_MATCH_SEL:2:3 */ 1564 PHYMOD_SYMBOL_FIELD_ENCODE(1421, 3, 2), 1565 /* TRNSUM_EYE_CLOSE_PREV_EN:4:4 */ 1566 PHYMOD_SYMBOL_FIELD_ENCODE(1405, 4, 4), 1567 /* TRNSUM_PRBS_SEL:5:6 */ 1568 PHYMOD_SYMBOL_FIELD_ENCODE(1422, 6, 5), 1569 /* SWAP_LMS_M1:10:10 */ 1570 PHYMOD_SYMBOL_FIELD_ENCODE(1349, 10, 10), 1571 /* SWAP_LMS_DATA:11:11 */ 1572 PHYMOD_SYMBOL_FIELD_ENCODE(1348, 11, 11), 1573 /* TRNSUM_EYE_CLOSURE_ERR_SEL:12:13 */ 1574 PHYMOD_SYMBOL_FIELD_ENCODE(1407, 13, 12), 1575 /* EDGE_COUNT_REFLESS_EN:15:15 */ 1576 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(585, 15, 15) 1577 }; 1578 static uint32_t BCMI_TSCE16_XGXS_DSC_TRNSUM_STS1r_fields[] = 1579 { 1580 /* TRNSUM_E_HIGH:0:15 */ 1581 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1408, 15, 0) 1582 }; 1583 static uint32_t BCMI_TSCE16_XGXS_DSC_TRNSUM_STS2r_fields[] = 1584 { 1585 /* TRNSUM_E_LOW:0:7 */ 1586 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1409, 7, 0) 1587 }; 1588 static uint32_t BCMI_TSCE16_XGXS_DSC_TRNSUM_STS3r_fields[] = 1589 { 1590 /* TRNSUM_O_HIGH:0:15 */ 1591 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1416, 15, 0) 1592 }; 1593 static uint32_t BCMI_TSCE16_XGXS_DSC_TRNSUM_STS4r_fields[] = 1594 { 1595 /* TRNSUM_O_LOW:0:7 */ 1596 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1417, 7, 0) 1597 }; 1598 static uint32_t BCMI_TSCE16_XGXS_DSC_TRNSUM_STS5r_fields[] = 1599 { 1600 /* TRNSUM_HIGH:0:15 */ 1601 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1413, 15, 0) 1602 }; 1603 static uint32_t BCMI_TSCE16_XGXS_DSC_TRNSUM_STS6r_fields[] = 1604 { 1605 /* TRNSUM_LOW:0:9 */ 1606 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1415, 9, 0) 1607 }; 1608 static uint32_t BCMI_TSCE16_XGXS_DSC_UC_CTLr_fields[] = 1609 { 1610 /* UC_DSC_GP_UC_REQ:0:5 */ 1611 PHYMOD_SYMBOL_FIELD_ENCODE(1583, 5, 0), 1612 /* UC_DSC_ERROR_FOUND:6:6 */ 1613 PHYMOD_SYMBOL_FIELD_ENCODE(1582, 6, 6), 1614 /* UC_DSC_READY_FOR_CMD:7:7 */ 1615 PHYMOD_SYMBOL_FIELD_ENCODE(1584, 7, 7), 1616 /* UC_DSC_SUPP_INFO:8:15 */ 1617 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1586, 15, 8) 1618 }; 1619 static uint32_t BCMI_TSCE16_XGXS_DSC_VGA_CTLr_fields[] = 1620 { 1621 /* VGA_P1_ACC_CLR:0:0 */ 1622 PHYMOD_SYMBOL_FIELD_ENCODE(1634, 0, 0), 1623 /* VGA_ACC_HYS_EN:1:1 */ 1624 PHYMOD_SYMBOL_FIELD_ENCODE(1620, 1, 1), 1625 /* VGA_UPDATE_STYLE:2:3 */ 1626 PHYMOD_SYMBOL_FIELD_ENCODE(1640, 3, 2), 1627 /* VGA_AFFECTED_BY_DFE1:4:4 */ 1628 PHYMOD_SYMBOL_FIELD_ENCODE(1621, 4, 4), 1629 /* VGA_UPDATE_GAIN:6:7 */ 1630 PHYMOD_SYMBOL_FIELD_ENCODE(1639, 7, 6), 1631 /* VGA_INV_P1:8:8 */ 1632 PHYMOD_SYMBOL_FIELD_ENCODE(1630, 8, 8), 1633 /* VGA_INV_M1:9:9 */ 1634 PHYMOD_SYMBOL_FIELD_ENCODE(1629, 9, 9), 1635 /* VGA_ERR_GAIN:10:11 */ 1636 PHYMOD_SYMBOL_FIELD_ENCODE(1626, 11, 10), 1637 /* VGA_P1_GRADIENT_INVERT:12:12 */ 1638 PHYMOD_SYMBOL_FIELD_ENCODE(1635, 12, 12), 1639 /* VGA_ERR_SEL:13:14 */ 1640 PHYMOD_SYMBOL_FIELD_ENCODE(1627, 14, 13), 1641 /* VGA_EN:15:15 */ 1642 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1624, 15, 15) 1643 }; 1644 static uint32_t BCMI_TSCE16_XGXS_DSC_VGA_P1EYEDIAG_STSr_fields[] = 1645 { 1646 /* VGA_BIN:0:5 */ 1647 PHYMOD_SYMBOL_FIELD_ENCODE(1622, 5, 0), 1648 /* VGA_WANTS_TO_GO_LOW:6:6 */ 1649 PHYMOD_SYMBOL_FIELD_ENCODE(1641, 6, 6), 1650 /* P1_EYEDIAG_BIN:8:13 */ 1651 PHYMOD_SYMBOL_FIELD_ENCODE(969, 13, 8), 1652 /* P1_WANTS_TO_GO_LOW:14:14 */ 1653 PHYMOD_SYMBOL_FIELD_ENCODE(980, 14, 14), 1654 /* P1_WANTS_TO_GO_HIGH:15:15 */ 1655 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(979, 15, 15) 1656 }; 1657 static uint32_t BCMI_TSCE16_XGXS_DSC_VGA_P1_MISC_CTLr_fields[] = 1658 { 1659 /* VGA_HWTUNE_MIN:0:5 */ 1660 PHYMOD_SYMBOL_FIELD_ENCODE(1628, 5, 0), 1661 /* VGA_OP_SHORT_OFFCAL:6:6 */ 1662 PHYMOD_SYMBOL_FIELD_ENCODE(1632, 6, 6), 1663 /* VGA_OP_SHORT_NORM:7:7 */ 1664 PHYMOD_SYMBOL_FIELD_ENCODE(1631, 7, 7), 1665 /* P1_HWTUNE_MIN:10:15 */ 1666 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(972, 15, 10) 1667 }; 1668 static uint32_t BCMI_TSCE16_XGXS_DSC_VGA_PAT_EYEDIAG_CTLr_fields[] = 1669 { 1670 /* VGA_PATTERN:0:3 */ 1671 PHYMOD_SYMBOL_FIELD_ENCODE(1636, 3, 0), 1672 /* VGA_PATTERN_BIT_EN:4:7 */ 1673 PHYMOD_SYMBOL_FIELD_ENCODE(1637, 7, 4), 1674 /* P1_EYEDIAG_EN:15:15 */ 1675 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(970, 15, 15) 1676 }; 1677 static uint32_t BCMI_TSCE16_XGXS_DSC_VGA_TAP_BINr_fields[] = 1678 { 1679 /* VGA1_CTRL_BIN:0:3 */ 1680 PHYMOD_SYMBOL_FIELD_ENCODE(1615, 3, 0), 1681 /* VGA2_CTRL_BIN:4:7 */ 1682 PHYMOD_SYMBOL_FIELD_ENCODE(1616, 7, 4), 1683 /* VGA3_CTRL_BIN:8:11 */ 1684 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1617, 11, 8) 1685 }; 1686 static uint32_t BCMI_TSCE16_XGXS_FEC_0TSC_12r_fields[] = 1687 { 1688 /* FAST_LOCK_EN:9:9 */ 1689 PHYMOD_SYMBOL_FIELD_ENCODE(660, 9, 9), 1690 /* DBG_ENABLE:10:10 */ 1691 PHYMOD_SYMBOL_FIELD_ENCODE(460, 10, 10), 1692 /* ERROR_EN_OVR_VAL:11:11 */ 1693 PHYMOD_SYMBOL_FIELD_ENCODE(648, 11, 11), 1694 /* ERROR_EN_OVR:12:12 */ 1695 PHYMOD_SYMBOL_FIELD_ENCODE(647, 12, 12), 1696 /* FEC_ERR_ENABLE:13:13 */ 1697 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(665, 13, 13) 1698 }; 1699 static uint32_t BCMI_TSCE16_XGXS_FEC_1TSC_12r_fields[] = 1700 { 1701 /* DBG_ERR_MODE:0:0 */ 1702 PHYMOD_SYMBOL_FIELD_ENCODE(463, 0, 0), 1703 /* BURST_ERR_STATUS_MODE:1:1 */ 1704 PHYMOD_SYMBOL_FIELD_ENCODE(207, 1, 1), 1705 /* DEC_MAX_PM:2:7 */ 1706 PHYMOD_SYMBOL_FIELD_ENCODE(484, 7, 2), 1707 /* INVALID_PARITY_CNT:8:11 */ 1708 PHYMOD_SYMBOL_FIELD_ENCODE(716, 11, 8), 1709 /* GOOD_PARITY_CNT:12:14 */ 1710 PHYMOD_SYMBOL_FIELD_ENCODE(675, 14, 12), 1711 /* FEC_ERROR_CODE_ALL:15:15 */ 1712 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(664, 15, 15) 1713 }; 1714 static uint32_t BCMI_TSCE16_XGXS_FEC_2TSC_12r_fields[] = 1715 { 1716 /* DEC_GAP_COUNT_MODE:1:1 */ 1717 PHYMOD_SYMBOL_FIELD_ENCODE(483, 1, 1), 1718 /* DEC_17B_BURST_GAP_COUNT:2:4 */ 1719 PHYMOD_SYMBOL_FIELD_ENCODE(480, 4, 2), 1720 /* DEC_18B_BURST_GAP_COUNT:5:7 */ 1721 PHYMOD_SYMBOL_FIELD_ENCODE(481, 7, 5), 1722 /* DEC_19B_BURST_GAP_COUNT:8:10 */ 1723 PHYMOD_SYMBOL_FIELD_ENCODE(482, 10, 8), 1724 /* DEC_PM_MODE:11:15 */ 1725 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(485, 15, 11) 1726 }; 1727 static uint32_t BCMI_TSCE16_XGXS_FEC_BURST_ERR_STSHTSC_12r_fields[] = 1728 { 1729 /* BURST_ERR_STATUSH:0:15 */ 1730 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(205, 15, 0) 1731 }; 1732 static uint32_t BCMI_TSCE16_XGXS_FEC_BURST_ERR_STSLTSC_12r_fields[] = 1733 { 1734 /* BURST_ERR_STATUSL:0:15 */ 1735 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(206, 15, 0) 1736 }; 1737 static uint32_t BCMI_TSCE16_XGXS_FEC_CORRBLKSHTSC_12r_fields[] = 1738 { 1739 /* CORCOUNTH:0:15 */ 1740 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(429, 15, 0) 1741 }; 1742 static uint32_t BCMI_TSCE16_XGXS_FEC_CORRBLKSLTSC_12r_fields[] = 1743 { 1744 /* CORCOUNTL:0:15 */ 1745 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(430, 15, 0) 1746 }; 1747 static uint32_t BCMI_TSCE16_XGXS_FEC_DBG_ERRAHTSC_12r_fields[] = 1748 { 1749 /* DBG_ERRH:0:15 */ 1750 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(461, 15, 0) 1751 }; 1752 static uint32_t BCMI_TSCE16_XGXS_FEC_DBG_ERRLTSC_12r_fields[] = 1753 { 1754 /* DBG_ERRL:0:15 */ 1755 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(462, 15, 0) 1756 }; 1757 static uint32_t BCMI_TSCE16_XGXS_FEC_UNCORRBLKSHTSC_12r_fields[] = 1758 { 1759 /* UNCORCOUNTH:0:15 */ 1760 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1595, 15, 0) 1761 }; 1762 static uint32_t BCMI_TSCE16_XGXS_FEC_UNCORRBLKSLTSC_12r_fields[] = 1763 { 1764 /* UNCORCOUNTL:0:15 */ 1765 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1596, 15, 0) 1766 }; 1767 static uint32_t BCMI_TSCE16_XGXS_ILKN_CTL0r_fields[] = 1768 { 1769 /* WM:0:2 */ 1770 PHYMOD_SYMBOL_FIELD_ENCODE(1645, 2, 0), 1771 /* ILKN_SEL:3:3 */ 1772 PHYMOD_SYMBOL_FIELD_ENCODE(713, 3, 3), 1773 /* INV_TX_ORDER:6:6 */ 1774 PHYMOD_SYMBOL_FIELD_ENCODE(718, 6, 6), 1775 /* INV_RX_ORDER:7:7 */ 1776 PHYMOD_SYMBOL_FIELD_ENCODE(717, 7, 7), 1777 /* SOFT_RST_TX:8:8 */ 1778 PHYMOD_SYMBOL_FIELD_ENCODE(1337, 8, 8), 1779 /* SOFT_RST_RX:9:9 */ 1780 PHYMOD_SYMBOL_FIELD_ENCODE(1336, 9, 9), 1781 /* CREDIT_EN:15:15 */ 1782 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(445, 15, 15) 1783 }; 1784 static uint32_t BCMI_TSCE16_XGXS_ILKN_STS0r_fields[] = 1785 { 1786 /* RXFIFO_EMPTY:0:0 */ 1787 PHYMOD_SYMBOL_FIELD_ENCODE(1201, 0, 0), 1788 /* RXFIFO_FULL:1:1 */ 1789 PHYMOD_SYMBOL_FIELD_ENCODE(1202, 1, 1), 1790 /* RXFIFO_OVERRUN:2:2 */ 1791 PHYMOD_SYMBOL_FIELD_ENCODE(1203, 2, 2), 1792 /* RXFIFO_UNDERRUN:3:3 */ 1793 PHYMOD_SYMBOL_FIELD_ENCODE(1204, 3, 3), 1794 /* TXFIFO_EMPTY:4:4 */ 1795 PHYMOD_SYMBOL_FIELD_ENCODE(1431, 4, 4), 1796 /* TXFIFO_FULL:5:5 */ 1797 PHYMOD_SYMBOL_FIELD_ENCODE(1432, 5, 5), 1798 /* TXFIFO_OVERRUN:6:6 */ 1799 PHYMOD_SYMBOL_FIELD_ENCODE(1433, 6, 6), 1800 /* TXFIFO_UNDERRUN:7:7 */ 1801 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1434, 7, 7) 1802 }; 1803 static uint32_t BCMI_TSCE16_XGXS_LANES_3_2_AM_BYTE2TSC_12r_fields[] = 1804 { 1805 /* LANE_2_AM_2:0:7 */ 1806 PHYMOD_SYMBOL_FIELD_ENCODE(732, 7, 0), 1807 /* LANE_3_AM_2:8:15 */ 1808 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(734, 15, 8) 1809 }; 1810 static uint32_t BCMI_TSCE16_XGXS_LNK_CTLr_fields[] = 1811 { 1812 /* LINK_CONTROL_FORCEVAL:14:14 */ 1813 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(751, 14, 14) 1814 }; 1815 static uint32_t BCMI_TSCE16_XGXS_LN_2_AM_BYTE10TSC_12r_fields[] = 1816 { 1817 /* LANE_2_AM_1_0:0:15 */ 1818 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(731, 15, 0) 1819 }; 1820 static uint32_t BCMI_TSCE16_XGXS_LN_3_AM_BYTE10TSC_12r_fields[] = 1821 { 1822 /* LANE_3_AM_1_0:0:15 */ 1823 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(733, 15, 0) 1824 }; 1825 static uint32_t BCMI_TSCE16_XGXS_LN_ADDR0r_fields[] = 1826 { 1827 /* RX_LANE_ADDR_0:0:4 */ 1828 PHYMOD_SYMBOL_FIELD_ENCODE(1223, 4, 0), 1829 /* TX_LANE_ADDR_0:8:12 */ 1830 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1499, 12, 8) 1831 }; 1832 static uint32_t BCMI_TSCE16_XGXS_LN_ADDR1r_fields[] = 1833 { 1834 /* RX_LANE_ADDR_1:0:4 */ 1835 PHYMOD_SYMBOL_FIELD_ENCODE(1224, 4, 0), 1836 /* TX_LANE_ADDR_1:8:12 */ 1837 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1500, 12, 8) 1838 }; 1839 static uint32_t BCMI_TSCE16_XGXS_LN_ADDR2r_fields[] = 1840 { 1841 /* RX_LANE_ADDR_2:0:4 */ 1842 PHYMOD_SYMBOL_FIELD_ENCODE(1225, 4, 0), 1843 /* TX_LANE_ADDR_2:8:12 */ 1844 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1501, 12, 8) 1845 }; 1846 static uint32_t BCMI_TSCE16_XGXS_LN_ADDR3r_fields[] = 1847 { 1848 /* RX_LANE_ADDR_3:0:4 */ 1849 PHYMOD_SYMBOL_FIELD_ENCODE(1226, 4, 0), 1850 /* TX_LANE_ADDR_3:8:12 */ 1851 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1502, 12, 8) 1852 }; 1853 static uint32_t BCMI_TSCE16_XGXS_MAIN0_DEVINPKG5r_fields[] = 1854 { 1855 /* CLAUSE22:0:0 */ 1856 PHYMOD_SYMBOL_FIELD_ENCODE(408, 0, 0), 1857 /* PMA_PMD:1:1 */ 1858 PHYMOD_SYMBOL_FIELD_ENCODE(1062, 1, 1), 1859 /* WIS:2:2 */ 1860 PHYMOD_SYMBOL_FIELD_ENCODE(1644, 2, 2), 1861 /* PCS_XS:3:3 */ 1862 PHYMOD_SYMBOL_FIELD_ENCODE(1007, 3, 3), 1863 /* PHY_XS:4:4 */ 1864 PHYMOD_SYMBOL_FIELD_ENCODE(1027, 4, 4), 1865 /* DTE_XS:5:5 */ 1866 PHYMOD_SYMBOL_FIELD_ENCODE(584, 5, 5), 1867 /* TC:6:6 */ 1868 PHYMOD_SYMBOL_FIELD_ENCODE(1369, 6, 6), 1869 /* AN:7:7 */ 1870 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(44, 7, 7) 1871 }; 1872 static uint32_t BCMI_TSCE16_XGXS_MAIN0_LN_SWPr_fields[] = 1873 { 1874 /* LOG0_TO_PHY_TX_LNSWAP_SEL:0:1 */ 1875 PHYMOD_SYMBOL_FIELD_ENCODE(798, 1, 0), 1876 /* LOG1_TO_PHY_TX_LNSWAP_SEL:2:3 */ 1877 PHYMOD_SYMBOL_FIELD_ENCODE(800, 3, 2), 1878 /* LOG2_TO_PHY_TX_LNSWAP_SEL:4:5 */ 1879 PHYMOD_SYMBOL_FIELD_ENCODE(802, 5, 4), 1880 /* LOG3_TO_PHY_TX_LNSWAP_SEL:6:7 */ 1881 PHYMOD_SYMBOL_FIELD_ENCODE(804, 7, 6), 1882 /* LOG0_TO_PHY_RX_LNSWAP_SEL:8:9 */ 1883 PHYMOD_SYMBOL_FIELD_ENCODE(797, 9, 8), 1884 /* LOG1_TO_PHY_RX_LNSWAP_SEL:10:11 */ 1885 PHYMOD_SYMBOL_FIELD_ENCODE(799, 11, 10), 1886 /* LOG2_TO_PHY_RX_LNSWAP_SEL:12:13 */ 1887 PHYMOD_SYMBOL_FIELD_ENCODE(801, 13, 12), 1888 /* LOG3_TO_PHY_RX_LNSWAP_SEL:14:15 */ 1889 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(803, 15, 14) 1890 }; 1891 static uint32_t BCMI_TSCE16_XGXS_MAIN0_LPBK_CTLr_fields[] = 1892 { 1893 /* LOCAL_PCS_LOOPBACK_ENABLE:4:7 */ 1894 PHYMOD_SYMBOL_FIELD_ENCODE(796, 7, 4), 1895 /* REMOTE_PMD_LOOPBACK_ENABLE:8:11 */ 1896 PHYMOD_SYMBOL_FIELD_ENCODE(1150, 11, 8), 1897 /* REMOTE_PCS_LOOPBACK_ENABLE:12:15 */ 1898 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1149, 15, 12) 1899 }; 1900 static uint32_t BCMI_TSCE16_XGXS_MAIN0_MDIO_BCSTr_fields[] = 1901 { 1902 /* MULTIPRTS_EN:7:10 */ 1903 PHYMOD_SYMBOL_FIELD_ENCODE(947, 10, 7), 1904 /* PRTAD_BCST:11:15 */ 1905 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1115, 15, 11) 1906 }; 1907 static uint32_t BCMI_TSCE16_XGXS_MAIN0_MISCr_fields[] = 1908 { 1909 /* CL82_MLD_PHYS_MAP:7:8 */ 1910 PHYMOD_SYMBOL_FIELD_ENCODE(398, 8, 7), 1911 /* CL82_MULTI_PIPE_MODE:9:10 */ 1912 PHYMOD_SYMBOL_FIELD_ENCODE(399, 10, 9), 1913 /* CL49_LOW_LATENCY_EN:11:11 */ 1914 PHYMOD_SYMBOL_FIELD_ENCODE(304, 11, 11), 1915 /* TX_PCS_BIT_REPL_EN:15:15 */ 1916 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1524, 15, 15) 1917 }; 1918 static uint32_t BCMI_TSCE16_XGXS_MAIN0_SERDESIDr_fields[] = 1919 { 1920 /* MODEL_NUMBER:0:5 */ 1921 PHYMOD_SYMBOL_FIELD_ENCODE(942, 5, 0), 1922 /* TECH_PROC:6:8 */ 1923 PHYMOD_SYMBOL_FIELD_ENCODE(1374, 8, 6), 1924 /* BONDING:9:10 */ 1925 PHYMOD_SYMBOL_FIELD_ENCODE(200, 10, 9), 1926 /* REV_NUMBER:11:13 */ 1927 PHYMOD_SYMBOL_FIELD_ENCODE(1176, 13, 11), 1928 /* REV_LETTER:14:15 */ 1929 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1175, 15, 14) 1930 }; 1931 static uint32_t BCMI_TSCE16_XGXS_MAIN0_SETUPr_fields[] = 1932 { 1933 /* STAND_ALONE_MODE:2:2 */ 1934 PHYMOD_SYMBOL_FIELD_ENCODE(1341, 2, 2), 1935 /* SINGLE_PORT_MODE:3:3 */ 1936 PHYMOD_SYMBOL_FIELD_ENCODE(1329, 3, 3), 1937 /* PORT_MODE_SEL:4:6 */ 1938 PHYMOD_SYMBOL_FIELD_ENCODE(1087, 6, 4), 1939 /* AN_HIGH_VCO:7:7 */ 1940 PHYMOD_SYMBOL_FIELD_ENCODE(59, 7, 7), 1941 /* MASTER_PORT_NUM:8:9 */ 1942 PHYMOD_SYMBOL_FIELD_ENCODE(843, 9, 8), 1943 /* PLL_RESET_EN:10:10 */ 1944 PHYMOD_SYMBOL_FIELD_ENCODE(1056, 10, 10), 1945 /* CL73_LOW_VCO:11:11 */ 1946 PHYMOD_SYMBOL_FIELD_ENCODE(385, 11, 11), 1947 /* CL37_HIGH_VCO:12:12 */ 1948 PHYMOD_SYMBOL_FIELD_ENCODE(268, 12, 12), 1949 /* REFCLK_SEL:13:15 */ 1950 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1137, 15, 13) 1951 }; 1952 static uint32_t BCMI_TSCE16_XGXS_MAIN0_SYNCE_CTLr_fields[] = 1953 { 1954 /* SYNCE_MODE_PHY_LN0:0:1 */ 1955 PHYMOD_SYMBOL_FIELD_ENCODE(1357, 1, 0), 1956 /* SYNCE_MODE_PHY_LN1:2:3 */ 1957 PHYMOD_SYMBOL_FIELD_ENCODE(1358, 3, 2), 1958 /* SYNCE_MODE_PHY_LN2:4:5 */ 1959 PHYMOD_SYMBOL_FIELD_ENCODE(1359, 5, 4), 1960 /* SYNCE_MODE_PHY_LN3:6:7 */ 1961 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1360, 7, 6) 1962 }; 1963 static uint32_t BCMI_TSCE16_XGXS_MAIN0_SYNCE_CTL_STAGE0r_fields[] = 1964 { 1965 /* SYNCE_STAGE0_MODE_PHY_LN0:0:1 */ 1966 PHYMOD_SYMBOL_FIELD_ENCODE(1361, 1, 0), 1967 /* SYNCE_STAGE0_MODE_PHY_LN1:2:3 */ 1968 PHYMOD_SYMBOL_FIELD_ENCODE(1362, 3, 2), 1969 /* SYNCE_STAGE0_MODE_PHY_LN2:4:5 */ 1970 PHYMOD_SYMBOL_FIELD_ENCODE(1363, 5, 4), 1971 /* SYNCE_STAGE0_MODE_PHY_LN3:6:7 */ 1972 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1364, 7, 6) 1973 }; 1974 static uint32_t BCMI_TSCE16_XGXS_MAIN0_TICK_CTL0r_fields[] = 1975 { 1976 /* TICK_DENOMINATOR:2:11 */ 1977 PHYMOD_SYMBOL_FIELD_ENCODE(1388, 11, 2), 1978 /* TICK_NUMERATOR_LOWER:12:15 */ 1979 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1389, 15, 12) 1980 }; 1981 static uint32_t BCMI_TSCE16_XGXS_MAIN0_TICK_CTL1r_fields[] = 1982 { 1983 /* TICK_NUMERATOR_UPPER:0:14 */ 1984 PHYMOD_SYMBOL_FIELD_ENCODE(1390, 14, 0), 1985 /* TICK_OVERRIDE:15:15 */ 1986 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1391, 15, 15) 1987 }; 1988 static uint32_t BCMI_TSCE16_XGXS_MASKDATAr_fields[] = 1989 { 1990 /* MASKDATA:0:15 */ 1991 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(841, 15, 0) 1992 }; 1993 static uint32_t BCMI_TSCE16_XGXS_MDIO_AERr_fields[] = 1994 { 1995 /* MDIO_AER:0:15 */ 1996 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(845, 15, 0) 1997 }; 1998 static uint32_t BCMI_TSCE16_XGXS_MDIO_BCST_PORT_ADDRr_fields[] = 1999 { 2000 /* MDIO_BRCST_PORT_ADDR:0:4 */ 2001 PHYMOD_SYMBOL_FIELD_ENCODE(847, 4, 0), 2002 /* MDIO_DRV_COMCLK:15:15 */ 2003 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(855, 15, 15) 2004 }; 2005 static uint32_t BCMI_TSCE16_XGXS_MDIO_MMD_SELr_fields[] = 2006 { 2007 /* MDIO_DEV_CL22_EN:0:0 */ 2008 PHYMOD_SYMBOL_FIELD_ENCODE(850, 0, 0), 2009 /* MDIO_DEV_PMD_EN:2:2 */ 2010 PHYMOD_SYMBOL_FIELD_ENCODE(854, 2, 2), 2011 /* MDIO_DEV_AN_EN:3:3 */ 2012 PHYMOD_SYMBOL_FIELD_ENCODE(849, 3, 3), 2013 /* MDIO_DEV_PHY_EN:4:4 */ 2014 PHYMOD_SYMBOL_FIELD_ENCODE(853, 4, 4), 2015 /* MDIO_DEV_DTE_EN:5:5 */ 2016 PHYMOD_SYMBOL_FIELD_ENCODE(851, 5, 5), 2017 /* MDIO_DEV_PCS_EN:6:6 */ 2018 PHYMOD_SYMBOL_FIELD_ENCODE(852, 6, 6), 2019 /* MDIO_MULTI_MMDS_EN:14:14 */ 2020 PHYMOD_SYMBOL_FIELD_ENCODE(857, 14, 14), 2021 /* MDIO_MULTI_PRTS_EN:15:15 */ 2022 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(858, 15, 15) 2023 }; 2024 static uint32_t BCMI_TSCE16_XGXS_MEM_ECC_ECC_CORRUPTr_fields[] = 2025 { 2026 /* DESKEW_ECC_CORRUPT:0:1 */ 2027 PHYMOD_SYMBOL_FIELD_ENCODE(496, 1, 0), 2028 /* RFEC0_ECC_CORRUPT:2:3 */ 2029 PHYMOD_SYMBOL_FIELD_ENCODE(1181, 3, 2), 2030 /* RFEC1_ECC_CORRUPT:4:5 */ 2031 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1187, 5, 4) 2032 }; 2033 static uint32_t BCMI_TSCE16_XGXS_MEM_ECC_ECC_DESKEW_STSr_fields[] = 2034 { 2035 /* DESKEW_ADDRESS:0:6 */ 2036 PHYMOD_SYMBOL_FIELD_ENCODE(494, 6, 0), 2037 /* DESKEW_2BIT_ERROR:14:14 */ 2038 PHYMOD_SYMBOL_FIELD_ENCODE(493, 14, 14), 2039 /* DESKEW_1BIT_ERROR:15:15 */ 2040 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(492, 15, 15) 2041 }; 2042 static uint32_t BCMI_TSCE16_XGXS_MEM_ECC_ECC_DISr_fields[] = 2043 { 2044 /* DESKEW_DISABLE_ECC:0:0 */ 2045 PHYMOD_SYMBOL_FIELD_ENCODE(495, 0, 0), 2046 /* RFEC0_DISABLE_ECC:1:1 */ 2047 PHYMOD_SYMBOL_FIELD_ENCODE(1180, 1, 1), 2048 /* RFEC1_DISABLE_ECC:2:2 */ 2049 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1186, 2, 2) 2050 }; 2051 static uint32_t BCMI_TSCE16_XGXS_MEM_ECC_ECC_INT_1BITr_fields[] = 2052 { 2053 /* INT_1B:0:3 */ 2054 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(714, 3, 0) 2055 }; 2056 static uint32_t BCMI_TSCE16_XGXS_MEM_ECC_ECC_INT_2BITr_fields[] = 2057 { 2058 /* INT_2B:0:3 */ 2059 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(715, 3, 0) 2060 }; 2061 static uint32_t BCMI_TSCE16_XGXS_MEM_ECC_ECC_MSK_1BITr_fields[] = 2062 { 2063 /* MSK_1B:0:3 */ 2064 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(943, 3, 0) 2065 }; 2066 static uint32_t BCMI_TSCE16_XGXS_MEM_ECC_ECC_MSK_2BITr_fields[] = 2067 { 2068 /* MSK_2B:0:3 */ 2069 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(944, 3, 0) 2070 }; 2071 static uint32_t BCMI_TSCE16_XGXS_MEM_ECC_ECC_RFEC0_STSr_fields[] = 2072 { 2073 /* RFEC0_ADDRESS:0:7 */ 2074 PHYMOD_SYMBOL_FIELD_ENCODE(1179, 7, 0), 2075 /* RFEC0_2BIT_ERROR:14:14 */ 2076 PHYMOD_SYMBOL_FIELD_ENCODE(1178, 14, 14), 2077 /* RFEC0_1BIT_ERROR:15:15 */ 2078 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1177, 15, 15) 2079 }; 2080 static uint32_t BCMI_TSCE16_XGXS_MEM_ECC_ECC_RFEC1_STSr_fields[] = 2081 { 2082 /* RFEC1_ADDRESS:0:7 */ 2083 PHYMOD_SYMBOL_FIELD_ENCODE(1185, 7, 0), 2084 /* RFEC1_2BIT_ERROR:14:14 */ 2085 PHYMOD_SYMBOL_FIELD_ENCODE(1184, 14, 14), 2086 /* RFEC1_1BIT_ERROR:15:15 */ 2087 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1183, 15, 15) 2088 }; 2089 static uint32_t BCMI_TSCE16_XGXS_MEM_ECC_EXT_INTr_fields[] = 2090 { 2091 /* MICRO_EXT_INT:0:0 */ 2092 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(873, 0, 0) 2093 }; 2094 static uint32_t BCMI_TSCE16_XGXS_MEM_ECC_EXT_MSKr_fields[] = 2095 { 2096 /* MICRO_EXT_MSK:0:0 */ 2097 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(874, 0, 0) 2098 }; 2099 static uint32_t BCMI_TSCE16_XGXS_MEM_TM_DESKEWr_fields[] = 2100 { 2101 /* DESKEW_TM:0:11 */ 2102 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(502, 11, 0) 2103 }; 2104 static uint32_t BCMI_TSCE16_XGXS_MEM_TM_RFEC0r_fields[] = 2105 { 2106 /* RFEC0_TM:0:11 */ 2107 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1182, 11, 0) 2108 }; 2109 static uint32_t BCMI_TSCE16_XGXS_MEM_TM_RFEC1r_fields[] = 2110 { 2111 /* RFEC1_TM:0:11 */ 2112 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1188, 11, 0) 2113 }; 2114 static uint32_t BCMI_TSCE16_XGXS_MISC_CTL0r_fields[] = 2115 { 2116 /* SDK_TX_DISABLE:0:0 */ 2117 PHYMOD_SYMBOL_FIELD_ENCODE(1278, 0, 0), 2118 /* TX_DISABLE_OUTPUT_SEL:2:3 */ 2119 PHYMOD_SYMBOL_FIELD_ENCODE(1487, 3, 2), 2120 /* CONVERT_TAPS_TO_AFE:4:4 */ 2121 PHYMOD_SYMBOL_FIELD_ENCODE(426, 4, 4), 2122 /* CONVERT_TAPS_TO_AFE_INT_EN:5:5 */ 2123 PHYMOD_SYMBOL_FIELD_ENCODE(428, 5, 5), 2124 /* CONVERT_TAPS_TO_AFE_ERROR:6:6 */ 2125 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(427, 6, 6) 2126 }; 2127 static uint32_t BCMI_TSCE16_XGXS_MISC_STS0r_fields[] = 2128 { 2129 /* TX_DISABLE_STATUS:0:0 */ 2130 PHYMOD_SYMBOL_FIELD_ENCODE(1488, 0, 0), 2131 /* TX_ELEC_IDLE_STATUS:1:1 */ 2132 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1494, 1, 1) 2133 }; 2134 static uint32_t BCMI_TSCE16_XGXS_MLD_VL_INFO_0TSC_12r_fields[] = 2135 { 2136 /* VL_ON_LL_0:0:4 */ 2137 PHYMOD_SYMBOL_FIELD_ENCODE(1642, 4, 0), 2138 /* VL_ON_LL_1:5:9 */ 2139 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1643, 9, 5) 2140 }; 2141 static uint32_t BCMI_TSCE16_XGXS_PATT_GEN_SEQ0r_fields[] = 2142 { 2143 /* PATT_GEN_SEQ_0:0:15 */ 2144 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(983, 15, 0) 2145 }; 2146 static uint32_t BCMI_TSCE16_XGXS_PATT_GEN_SEQ1r_fields[] = 2147 { 2148 /* PATT_GEN_SEQ_1:0:15 */ 2149 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(984, 15, 0) 2150 }; 2151 static uint32_t BCMI_TSCE16_XGXS_PATT_GEN_SEQ2r_fields[] = 2152 { 2153 /* PATT_GEN_SEQ_2:0:15 */ 2154 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(990, 15, 0) 2155 }; 2156 static uint32_t BCMI_TSCE16_XGXS_PATT_GEN_SEQ3r_fields[] = 2157 { 2158 /* PATT_GEN_SEQ_3:0:15 */ 2159 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(991, 15, 0) 2160 }; 2161 static uint32_t BCMI_TSCE16_XGXS_PATT_GEN_SEQ4r_fields[] = 2162 { 2163 /* PATT_GEN_SEQ_4:0:15 */ 2164 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(992, 15, 0) 2165 }; 2166 static uint32_t BCMI_TSCE16_XGXS_PATT_GEN_SEQ5r_fields[] = 2167 { 2168 /* PATT_GEN_SEQ_5:0:15 */ 2169 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(993, 15, 0) 2170 }; 2171 static uint32_t BCMI_TSCE16_XGXS_PATT_GEN_SEQ6r_fields[] = 2172 { 2173 /* PATT_GEN_SEQ_6:0:15 */ 2174 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(994, 15, 0) 2175 }; 2176 static uint32_t BCMI_TSCE16_XGXS_PATT_GEN_SEQ7r_fields[] = 2177 { 2178 /* PATT_GEN_SEQ_7:0:15 */ 2179 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(995, 15, 0) 2180 }; 2181 static uint32_t BCMI_TSCE16_XGXS_PATT_GEN_SEQ8r_fields[] = 2182 { 2183 /* PATT_GEN_SEQ_8:0:15 */ 2184 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(996, 15, 0) 2185 }; 2186 static uint32_t BCMI_TSCE16_XGXS_PATT_GEN_SEQ9r_fields[] = 2187 { 2188 /* PATT_GEN_SEQ_9:0:15 */ 2189 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(997, 15, 0) 2190 }; 2191 static uint32_t BCMI_TSCE16_XGXS_PATT_GEN_SEQ_10r_fields[] = 2192 { 2193 /* PATT_GEN_SEQ_10:0:15 */ 2194 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(985, 15, 0) 2195 }; 2196 static uint32_t BCMI_TSCE16_XGXS_PATT_GEN_SEQ_11r_fields[] = 2197 { 2198 /* PATT_GEN_SEQ_11:0:15 */ 2199 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(986, 15, 0) 2200 }; 2201 static uint32_t BCMI_TSCE16_XGXS_PATT_GEN_SEQ_12r_fields[] = 2202 { 2203 /* PATT_GEN_SEQ_12:0:15 */ 2204 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(987, 15, 0) 2205 }; 2206 static uint32_t BCMI_TSCE16_XGXS_PATT_GEN_SEQ_13r_fields[] = 2207 { 2208 /* PATT_GEN_SEQ_13:0:15 */ 2209 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(988, 15, 0) 2210 }; 2211 static uint32_t BCMI_TSCE16_XGXS_PATT_GEN_SEQ_14r_fields[] = 2212 { 2213 /* PATT_GEN_SEQ_14:0:15 */ 2214 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(989, 15, 0) 2215 }; 2216 static uint32_t BCMI_TSCE16_XGXS_PHYID2r_fields[] = 2217 { 2218 /* REGID1:0:15 */ 2219 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1144, 15, 0) 2220 }; 2221 static uint32_t BCMI_TSCE16_XGXS_PHYID3r_fields[] = 2222 { 2223 /* REGID2:0:15 */ 2224 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1145, 15, 0) 2225 }; 2226 static uint32_t BCMI_TSCE16_XGXS_PKTGEN_CRCERRCNTr_fields[] = 2227 { 2228 /* CRCERRCNT:0:15 */ 2229 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(442, 15, 0) 2230 }; 2231 static uint32_t BCMI_TSCE16_XGXS_PKTGEN_CTL1r_fields[] = 2232 { 2233 /* PKT_OR_PRTP:0:0 */ 2234 PHYMOD_SYMBOL_FIELD_ENCODE(1031, 0, 0), 2235 /* TX_TEST_PORT_SEL:1:2 */ 2236 PHYMOD_SYMBOL_FIELD_ENCODE(1567, 2, 1), 2237 /* LPI_EN:3:3 */ 2238 PHYMOD_SYMBOL_FIELD_ENCODE(812, 3, 3), 2239 /* PRTP_DATA_PATTERN_SEL:5:5 */ 2240 PHYMOD_SYMBOL_FIELD_ENCODE(1116, 5, 5), 2241 /* TX_PRTP_EN:6:6 */ 2242 PHYMOD_SYMBOL_FIELD_ENCODE(1563, 6, 6), 2243 /* RX_PORT_SEL:7:8 */ 2244 PHYMOD_SYMBOL_FIELD_ENCODE(1253, 8, 7), 2245 /* CLR_CRCCNT:9:9 */ 2246 PHYMOD_SYMBOL_FIELD_ENCODE(413, 9, 9), 2247 /* RX_MSBUS_TYPE:10:10 */ 2248 PHYMOD_SYMBOL_FIELD_ENCODE(1236, 10, 10), 2249 /* RX_PKT_CHECK_EN:11:11 */ 2250 PHYMOD_SYMBOL_FIELD_ENCODE(1250, 11, 11), 2251 /* NUMBER_PKT:12:15 */ 2252 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(949, 15, 12) 2253 }; 2254 static uint32_t BCMI_TSCE16_XGXS_PKTGEN_CTL2r_fields[] = 2255 { 2256 /* IPG_SIZE:0:4 */ 2257 PHYMOD_SYMBOL_FIELD_ENCODE(719, 4, 0), 2258 /* PKT_SIZE:5:10 */ 2259 PHYMOD_SYMBOL_FIELD_ENCODE(1032, 10, 5), 2260 /* PAYLOAD_TYPE:11:13 */ 2261 PHYMOD_SYMBOL_FIELD_ENCODE(1000, 13, 11), 2262 /* TX_MSBUS_TYPE:14:14 */ 2263 PHYMOD_SYMBOL_FIELD_ENCODE(1515, 14, 14), 2264 /* PKTGEN_EN:15:15 */ 2265 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1030, 15, 15) 2266 }; 2267 static uint32_t BCMI_TSCE16_XGXS_PKTGEN_ERRMASK0r_fields[] = 2268 { 2269 /* ERROR_MASK_15_0:0:15 */ 2270 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(649, 15, 0) 2271 }; 2272 static uint32_t BCMI_TSCE16_XGXS_PKTGEN_ERRMASK1r_fields[] = 2273 { 2274 /* ERROR_MASK_31_16:0:15 */ 2275 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(650, 15, 0) 2276 }; 2277 static uint32_t BCMI_TSCE16_XGXS_PKTGEN_ERRMASK2r_fields[] = 2278 { 2279 /* ERROR_MASK_47_32:0:15 */ 2280 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(651, 15, 0) 2281 }; 2282 static uint32_t BCMI_TSCE16_XGXS_PKTGEN_ERRMASK3r_fields[] = 2283 { 2284 /* ERROR_MASK_63_48:0:15 */ 2285 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(652, 15, 0) 2286 }; 2287 static uint32_t BCMI_TSCE16_XGXS_PKTGEN_ERRMASK4r_fields[] = 2288 { 2289 /* ERROR_MASK_79_64:0:15 */ 2290 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(653, 15, 0) 2291 }; 2292 static uint32_t BCMI_TSCE16_XGXS_PKTGEN_PAYLOADBYTESr_fields[] = 2293 { 2294 /* BYTE0:0:7 */ 2295 PHYMOD_SYMBOL_FIELD_ENCODE(210, 7, 0), 2296 /* BYTE1:8:15 */ 2297 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(211, 15, 8) 2298 }; 2299 static uint32_t BCMI_TSCE16_XGXS_PKTGEN_PCS_SEEDA0r_fields[] = 2300 { 2301 /* SEEDA0:0:15 */ 2302 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1279, 15, 0) 2303 }; 2304 static uint32_t BCMI_TSCE16_XGXS_PKTGEN_PCS_SEEDA1r_fields[] = 2305 { 2306 /* SEEDA1:0:15 */ 2307 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1280, 15, 0) 2308 }; 2309 static uint32_t BCMI_TSCE16_XGXS_PKTGEN_PCS_SEEDA2r_fields[] = 2310 { 2311 /* SEEDA2:0:15 */ 2312 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1281, 15, 0) 2313 }; 2314 static uint32_t BCMI_TSCE16_XGXS_PKTGEN_PCS_SEEDA3r_fields[] = 2315 { 2316 /* SEEDA3:0:9 */ 2317 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1282, 9, 0) 2318 }; 2319 static uint32_t BCMI_TSCE16_XGXS_PKTGEN_PCS_SEEDB0r_fields[] = 2320 { 2321 /* SEEDB0:0:15 */ 2322 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1283, 15, 0) 2323 }; 2324 static uint32_t BCMI_TSCE16_XGXS_PKTGEN_PCS_SEEDB1r_fields[] = 2325 { 2326 /* SEEDB1:0:15 */ 2327 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1284, 15, 0) 2328 }; 2329 static uint32_t BCMI_TSCE16_XGXS_PKTGEN_PCS_SEEDB2r_fields[] = 2330 { 2331 /* SEEDB2:0:15 */ 2332 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1285, 15, 0) 2333 }; 2334 static uint32_t BCMI_TSCE16_XGXS_PKTGEN_PCS_SEEDB3r_fields[] = 2335 { 2336 /* SEEDB3:0:9 */ 2337 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1286, 9, 0) 2338 }; 2339 static uint32_t BCMI_TSCE16_XGXS_PKTGEN_PRTPCTLr_fields[] = 2340 { 2341 /* RX_PRTP_EN:4:4 */ 2342 PHYMOD_SYMBOL_FIELD_ENCODE(1254, 4, 4), 2343 /* ERRGEN_EN:5:8 */ 2344 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(644, 8, 5) 2345 }; 2346 static uint32_t BCMI_TSCE16_XGXS_PKTGEN_PRTPERRCTRr_fields[] = 2347 { 2348 /* PRTP_ERR_COUNT:0:15 */ 2349 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1117, 15, 0) 2350 }; 2351 static uint32_t BCMI_TSCE16_XGXS_PKTGEN_PRTPLOCKSTSr_fields[] = 2352 { 2353 /* PRTP_LOCK:0:0 */ 2354 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1118, 0, 0) 2355 }; 2356 static uint32_t BCMI_TSCE16_XGXS_PLL_CALCTL0r_fields[] = 2357 { 2358 /* CALIB_STEP_TIME:0:12 */ 2359 PHYMOD_SYMBOL_FIELD_ENCODE(215, 12, 0), 2360 /* CAL_TH:14:15 */ 2361 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(222, 15, 14) 2362 }; 2363 static uint32_t BCMI_TSCE16_XGXS_PLL_CALCTL1r_fields[] = 2364 { 2365 /* FREQDET_TIME:0:15 */ 2366 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(667, 15, 0) 2367 }; 2368 static uint32_t BCMI_TSCE16_XGXS_PLL_CALCTL2r_fields[] = 2369 { 2370 /* CALIB_CAP_CHARGE_TIME:0:11 */ 2371 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(213, 11, 0) 2372 }; 2373 static uint32_t BCMI_TSCE16_XGXS_PLL_CALCTL3r_fields[] = 2374 { 2375 /* FREQDET_WIN:0:7 */ 2376 PHYMOD_SYMBOL_FIELD_ENCODE(669, 7, 0), 2377 /* FREQDET_TIME_MSB:9:9 */ 2378 PHYMOD_SYMBOL_FIELD_ENCODE(668, 9, 9), 2379 /* DEBUG_CLR:10:10 */ 2380 PHYMOD_SYMBOL_FIELD_ENCODE(477, 10, 10), 2381 /* ACCEL_EN:11:11 */ 2382 PHYMOD_SYMBOL_FIELD_ENCODE(0, 11, 11), 2383 /* EXT_STATE:12:15 */ 2384 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(659, 15, 12) 2385 }; 2386 static uint32_t BCMI_TSCE16_XGXS_PLL_CALCTL4r_fields[] = 2387 { 2388 /* EXT_RANGE:0:6 */ 2389 PHYMOD_SYMBOL_FIELD_ENCODE(656, 6, 0), 2390 /* EN_CALIB_N:8:8 */ 2391 PHYMOD_SYMBOL_FIELD_ENCODE(614, 8, 8), 2392 /* CALIB_START:9:9 */ 2393 PHYMOD_SYMBOL_FIELD_ENCODE(214, 9, 9), 2394 /* CAP_DELAY:10:10 */ 2395 PHYMOD_SYMBOL_FIELD_ENCODE(224, 10, 10), 2396 /* CAL_PAUSE_REL:11:11 */ 2397 PHYMOD_SYMBOL_FIELD_ENCODE(220, 11, 11), 2398 /* CAL_PAUSE_EN:12:12 */ 2399 PHYMOD_SYMBOL_FIELD_ENCODE(219, 12, 12), 2400 /* PLL_FORCE_CAP_PASS:13:13 */ 2401 PHYMOD_SYMBOL_FIELD_ENCODE(1040, 13, 13), 2402 /* PLL_FORCE_CAP_PASS_EN:14:14 */ 2403 PHYMOD_SYMBOL_FIELD_ENCODE(1041, 14, 14), 2404 /* HALFSTEP_EN:15:15 */ 2405 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(676, 15, 15) 2406 }; 2407 static uint32_t BCMI_TSCE16_XGXS_PLL_CALCTL5r_fields[] = 2408 { 2409 /* PLLFORCE_FDONE_EN:0:0 */ 2410 PHYMOD_SYMBOL_FIELD_ENCODE(1035, 0, 0), 2411 /* PLLFORCE_FDONE:1:1 */ 2412 PHYMOD_SYMBOL_FIELD_ENCODE(1034, 1, 1), 2413 /* PLL_LOCK_FRC:2:2 */ 2414 PHYMOD_SYMBOL_FIELD_ENCODE(1044, 2, 2), 2415 /* PLL_LOCK_FRC_VAL:3:3 */ 2416 PHYMOD_SYMBOL_FIELD_ENCODE(1045, 3, 3), 2417 /* LKDT_BYP:4:4 */ 2418 PHYMOD_SYMBOL_FIELD_ENCODE(764, 4, 4), 2419 /* AUTOCAL_CNT:5:7 */ 2420 PHYMOD_SYMBOL_FIELD_ENCODE(142, 7, 5), 2421 /* AUTOCAL_EN:8:8 */ 2422 PHYMOD_SYMBOL_FIELD_ENCODE(143, 8, 8), 2423 /* VCO_RST_EN:12:12 */ 2424 PHYMOD_SYMBOL_FIELD_ENCODE(1612, 12, 12), 2425 /* LKDT_PAUSE_REL:13:13 */ 2426 PHYMOD_SYMBOL_FIELD_ENCODE(766, 13, 13), 2427 /* LKDT_PAUSE_EN:14:14 */ 2428 PHYMOD_SYMBOL_FIELD_ENCODE(765, 14, 14), 2429 /* PLL_SEQ_START:15:15 */ 2430 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1057, 15, 15) 2431 }; 2432 static uint32_t BCMI_TSCE16_XGXS_PLL_CALCTL6r_fields[] = 2433 { 2434 /* PLLPON_SEL:1:1 */ 2435 PHYMOD_SYMBOL_FIELD_ENCODE(1037, 1, 1), 2436 /* VCOPON_SEL:3:3 */ 2437 PHYMOD_SYMBOL_FIELD_ENCODE(1604, 3, 3), 2438 /* VCOBUFPON_SEL:5:5 */ 2439 PHYMOD_SYMBOL_FIELD_ENCODE(1598, 5, 5), 2440 /* VCORANGE_SEL:6:6 */ 2441 PHYMOD_SYMBOL_FIELD_ENCODE(1605, 6, 6), 2442 /* BAND_IQBUF_SEL:7:7 */ 2443 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(182, 7, 7) 2444 }; 2445 static uint32_t BCMI_TSCE16_XGXS_PLL_CALSTS0r_fields[] = 2446 { 2447 /* PLL_RANGE:0:6 */ 2448 PHYMOD_SYMBOL_FIELD_ENCODE(1055, 6, 0), 2449 /* PLL_LOCK_BAR_STKY:8:8 */ 2450 PHYMOD_SYMBOL_FIELD_ENCODE(1043, 8, 8), 2451 /* PLL_LOCK:9:9 */ 2452 PHYMOD_SYMBOL_FIELD_ENCODE(1042, 9, 9), 2453 /* CAL_VALID:10:10 */ 2454 PHYMOD_SYMBOL_FIELD_ENCODE(223, 10, 10), 2455 /* CAL_STATE:11:14 */ 2456 PHYMOD_SYMBOL_FIELD_ENCODE(221, 14, 11), 2457 /* PLL_FAIL_STKY:15:15 */ 2458 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1039, 15, 15) 2459 }; 2460 static uint32_t BCMI_TSCE16_XGXS_PLL_CALSTS1r_fields[] = 2461 { 2462 /* CALREF_COUNTER:0:12 */ 2463 PHYMOD_SYMBOL_FIELD_ENCODE(216, 12, 0), 2464 /* LKDTVCO_COUNTER_MSB:14:14 */ 2465 PHYMOD_SYMBOL_FIELD_ENCODE(763, 14, 14), 2466 /* LKDTREF_COUNTER_MSB:15:15 */ 2467 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(761, 15, 15) 2468 }; 2469 static uint32_t BCMI_TSCE16_XGXS_PLL_CALSTS2r_fields[] = 2470 { 2471 /* CALVCO_COUNTER:0:12 */ 2472 PHYMOD_SYMBOL_FIELD_ENCODE(218, 12, 0), 2473 /* BAND_IQBUF_MUX:13:15 */ 2474 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(181, 15, 13) 2475 }; 2476 static uint32_t BCMI_TSCE16_XGXS_PLL_CALSTS3r_fields[] = 2477 { 2478 /* LKDTREF_COUNTER:0:15 */ 2479 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(760, 15, 0) 2480 }; 2481 static uint32_t BCMI_TSCE16_XGXS_PLL_CALSTS4r_fields[] = 2482 { 2483 /* LKDTVCO_COUNTER:0:15 */ 2484 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(762, 15, 0) 2485 }; 2486 static uint32_t BCMI_TSCE16_XGXS_PLL_CALSTS5r_fields[] = 2487 { 2488 /* CALSTATE_ONEHOT:0:9 */ 2489 PHYMOD_SYMBOL_FIELD_ENCODE(217, 9, 0), 2490 /* VCOBUFPON_MUX:10:13 */ 2491 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1597, 13, 10) 2492 }; 2493 static uint32_t BCMI_TSCE16_XGXS_PLL_CALSTS6r_fields[] = 2494 { 2495 /* PLLPON_MUX:0:3 */ 2496 PHYMOD_SYMBOL_FIELD_ENCODE(1036, 3, 0), 2497 /* VCOPON_MUX:4:7 */ 2498 PHYMOD_SYMBOL_FIELD_ENCODE(1603, 7, 4), 2499 /* VCO_RANGE_MUX:8:14 */ 2500 PHYMOD_SYMBOL_FIELD_ENCODE(1611, 14, 8), 2501 /* PLL_PWRDN_OR:15:15 */ 2502 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1054, 15, 15) 2503 }; 2504 static uint32_t BCMI_TSCE16_XGXS_PLL_CTL0r_fields[] = 2505 { 2506 /* PLL_SPARE_0_0:0:6 */ 2507 PHYMOD_SYMBOL_FIELD_ENCODE(1059, 6, 0), 2508 /* LC_REFCLK_ADJ_1_0:7:8 */ 2509 PHYMOD_SYMBOL_FIELD_ENCODE(743, 8, 7), 2510 /* RPAR:9:11 */ 2511 PHYMOD_SYMBOL_FIELD_ENCODE(1195, 11, 9), 2512 /* PLL_SPARE_0_1:12:12 */ 2513 PHYMOD_SYMBOL_FIELD_ENCODE(1060, 12, 12), 2514 /* TERM_CM_EN:13:13 */ 2515 PHYMOD_SYMBOL_FIELD_ENCODE(1376, 13, 13), 2516 /* CPAR:14:15 */ 2517 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(439, 15, 14) 2518 }; 2519 static uint32_t BCMI_TSCE16_XGXS_PLL_CTL1r_fields[] = 2520 { 2521 /* CURR_SEL:0:3 */ 2522 PHYMOD_SYMBOL_FIELD_ENCODE(454, 3, 0), 2523 /* PLL_SPARE_1_0:4:4 */ 2524 PHYMOD_SYMBOL_FIELD_ENCODE(1061, 4, 4), 2525 /* EN_8P5G_VCO:5:5 */ 2526 PHYMOD_SYMBOL_FIELD_ENCODE(613, 5, 5), 2527 /* VCO_RANGE:6:12 */ 2528 PHYMOD_SYMBOL_FIELD_ENCODE(1610, 12, 6), 2529 /* ENB_8T:13:13 */ 2530 PHYMOD_SYMBOL_FIELD_ENCODE(603, 13, 13), 2531 /* ENB_10T:14:14 */ 2532 PHYMOD_SYMBOL_FIELD_ENCODE(601, 14, 14), 2533 /* EN_HCUR_VCO:15:15 */ 2534 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(622, 15, 15) 2535 }; 2536 static uint32_t BCMI_TSCE16_XGXS_PLL_CTL2r_fields[] = 2537 { 2538 /* VCO_PON:0:3 */ 2539 PHYMOD_SYMBOL_FIELD_ENCODE(1609, 3, 0), 2540 /* EN_8P5G:4:4 */ 2541 PHYMOD_SYMBOL_FIELD_ENCODE(612, 4, 4), 2542 /* CALIB_ADJ:5:7 */ 2543 PHYMOD_SYMBOL_FIELD_ENCODE(212, 7, 5), 2544 /* EN_CMOS_REFCLK_CH_HIZ:8:8 */ 2545 PHYMOD_SYMBOL_FIELD_ENCODE(618, 8, 8), 2546 /* PLL_CLKVCO_CAL_INVERT:9:9 */ 2547 PHYMOD_SYMBOL_FIELD_ENCODE(1038, 9, 9), 2548 /* VCOBUF_PON:10:13 */ 2549 PHYMOD_SYMBOL_FIELD_ENCODE(1599, 13, 10), 2550 /* EN_I4IQBUF:14:15 */ 2551 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(626, 15, 14) 2552 }; 2553 static uint32_t BCMI_TSCE16_XGXS_PLL_CTL3r_fields[] = 2554 { 2555 /* BAND_IQBUF_CTR:0:2 */ 2556 PHYMOD_SYMBOL_FIELD_ENCODE(180, 2, 0), 2557 /* ENB_16T:3:3 */ 2558 PHYMOD_SYMBOL_FIELD_ENCODE(602, 3, 3), 2559 /* EN_TEST_FRAC_CLK:4:4 */ 2560 PHYMOD_SYMBOL_FIELD_ENCODE(639, 4, 4), 2561 /* EN_CML_REFOUT_OVERWR:5:5 */ 2562 PHYMOD_SYMBOL_FIELD_ENCODE(617, 5, 5), 2563 /* EN_CMOS_REFOUT_OVERWR:6:6 */ 2564 PHYMOD_SYMBOL_FIELD_ENCODE(619, 6, 6), 2565 /* EN_RCLK_REFOUT:7:7 */ 2566 PHYMOD_SYMBOL_FIELD_ENCODE(631, 7, 7), 2567 /* PLLCLKSEL:8:8 */ 2568 PHYMOD_SYMBOL_FIELD_ENCODE(1033, 8, 8), 2569 /* REF_CML_PD:9:9 */ 2570 PHYMOD_SYMBOL_FIELD_ENCODE(1142, 9, 9), 2571 /* REF_CMOS_HZ:10:10 */ 2572 PHYMOD_SYMBOL_FIELD_ENCODE(1143, 10, 10), 2573 /* REF_CML_CURX2:11:11 */ 2574 PHYMOD_SYMBOL_FIELD_ENCODE(1141, 11, 11), 2575 /* CP_BIAS:12:14 */ 2576 PHYMOD_SYMBOL_FIELD_ENCODE(440, 14, 12), 2577 /* EN_MMD_HALFRATE:15:15 */ 2578 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(627, 15, 15) 2579 }; 2580 static uint32_t BCMI_TSCE16_XGXS_PLL_CTL4r_fields[] = 2581 { 2582 /* LC_REFCLK_ADJ_3_2:0:1 */ 2583 PHYMOD_SYMBOL_FIELD_ENCODE(744, 1, 0), 2584 /* CP_OPAMP_BIAS:2:3 */ 2585 PHYMOD_SYMBOL_FIELD_ENCODE(441, 3, 2), 2586 /* CMOS_TPORT_EN:4:4 */ 2587 PHYMOD_SYMBOL_FIELD_ENCODE(416, 4, 4), 2588 /* BIAS_VDD_SEL:5:6 */ 2589 PHYMOD_SYMBOL_FIELD_ENCODE(196, 6, 5), 2590 /* VCO_HKVCO:7:7 */ 2591 PHYMOD_SYMBOL_FIELD_ENCODE(1607, 7, 7), 2592 /* BIAS_EN:8:8 */ 2593 PHYMOD_SYMBOL_FIELD_ENCODE(194, 8, 8), 2594 /* VCO_TEST_CLK_EN:9:9 */ 2595 PHYMOD_SYMBOL_FIELD_ENCODE(1614, 9, 9), 2596 /* TEST_AMP:10:11 */ 2597 PHYMOD_SYMBOL_FIELD_ENCODE(1383, 11, 10), 2598 /* TEST_SEL:12:14 */ 2599 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1384, 14, 12) 2600 }; 2601 static uint32_t BCMI_TSCE16_XGXS_PLL_CTL5r_fields[] = 2602 { 2603 /* REFOUT_DIV_SEL:0:2 */ 2604 PHYMOD_SYMBOL_FIELD_ENCODE(1140, 2, 0), 2605 /* TEST_VC:3:3 */ 2606 PHYMOD_SYMBOL_FIELD_ENCODE(1386, 3, 3), 2607 /* TEST_SEL_OVERWRITE:4:4 */ 2608 PHYMOD_SYMBOL_FIELD_ENCODE(1385, 4, 4), 2609 /* TERM_SEL:5:6 */ 2610 PHYMOD_SYMBOL_FIELD_ENCODE(1380, 6, 5), 2611 /* PLL_PWRDN:7:7 */ 2612 PHYMOD_SYMBOL_FIELD_ENCODE(1053, 7, 7), 2613 /* EN_REFOUT_DIV:8:8 */ 2614 PHYMOD_SYMBOL_FIELD_ENCODE(633, 8, 8), 2615 /* PWDB_EXTR_D2C:9:9 */ 2616 PHYMOD_SYMBOL_FIELD_ENCODE(1119, 9, 9), 2617 /* REFDIV_TEST_SEL:10:12 */ 2618 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1139, 12, 10) 2619 }; 2620 static uint32_t BCMI_TSCE16_XGXS_PLL_CTL6r_fields[] = 2621 { 2622 /* PLL_PON:0:3 */ 2623 PHYMOD_SYMBOL_FIELD_ENCODE(1052, 3, 0), 2624 /* VCO_GM_BOOST:4:5 */ 2625 PHYMOD_SYMBOL_FIELD_ENCODE(1606, 5, 4), 2626 /* VCO_I_BOOST:6:7 */ 2627 PHYMOD_SYMBOL_FIELD_ENCODE(1608, 7, 6), 2628 /* PFD_OFFSET_ENLARGE:8:8 */ 2629 PHYMOD_SYMBOL_FIELD_ENCODE(1021, 8, 8), 2630 /* PLL_SPARE6_1:9:9 */ 2631 PHYMOD_SYMBOL_FIELD_ENCODE(1058, 9, 9), 2632 /* PFD_OFFSET:10:11 */ 2633 PHYMOD_SYMBOL_FIELD_ENCODE(1020, 11, 10), 2634 /* I_NDIV_FRAC_L:12:15 */ 2635 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(722, 15, 12) 2636 }; 2637 static uint32_t BCMI_TSCE16_XGXS_PLL_CTL7r_fields[] = 2638 { 2639 /* I_NDIV_FRAC_H:0:13 */ 2640 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(721, 13, 0) 2641 }; 2642 static uint32_t BCMI_TSCE16_XGXS_PLL_CTL8r_fields[] = 2643 { 2644 /* I_NDIV_INT:0:9 */ 2645 PHYMOD_SYMBOL_FIELD_ENCODE(723, 9, 0), 2646 /* CML_REFCLK_BIAS:10:11 */ 2647 PHYMOD_SYMBOL_FIELD_ENCODE(415, 11, 10), 2648 /* VCOFB_DIV:12:13 */ 2649 PHYMOD_SYMBOL_FIELD_ENCODE(1602, 13, 12), 2650 /* I_PLL_SDM_PWRDNB:14:14 */ 2651 PHYMOD_SYMBOL_FIELD_ENCODE(725, 14, 14), 2652 /* I_NDIV_DITHER_EN:15:15 */ 2653 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(720, 15, 15) 2654 }; 2655 static uint32_t BCMI_TSCE16_XGXS_PLL_CTL9r_fields[] = 2656 { 2657 /* MMD_RESETB:0:0 */ 2658 PHYMOD_SYMBOL_FIELD_ENCODE(941, 0, 0), 2659 /* I_PLL_FRAC_MODE:1:2 */ 2660 PHYMOD_SYMBOL_FIELD_ENCODE(724, 2, 1), 2661 /* SEL_FP3CAP:3:6 */ 2662 PHYMOD_SYMBOL_FIELD_ENCODE(1288, 6, 3), 2663 /* VCO_SUPPLY_ADJ:7:7 */ 2664 PHYMOD_SYMBOL_FIELD_ENCODE(1613, 7, 7), 2665 /* BIAS_DIV_CTRL:8:10 */ 2666 PHYMOD_SYMBOL_FIELD_ENCODE(193, 10, 8), 2667 /* BIAS_IQ_CTRL:11:13 */ 2668 PHYMOD_SYMBOL_FIELD_ENCODE(195, 13, 11), 2669 /* CML_REFCLK_ADJ:14:15 */ 2670 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(414, 15, 14) 2671 }; 2672 static uint32_t BCMI_TSCE16_XGXS_PLL_CTL_10r_fields[] = 2673 { 2674 /* REFCLK_IN_BIAS:0:5 */ 2675 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1136, 5, 0) 2676 }; 2677 static uint32_t BCMI_TSCE16_XGXS_PLL_INTr_fields[] = 2678 { 2679 /* REFCLK_DIV4_FRC_VAL:0:0 */ 2680 PHYMOD_SYMBOL_FIELD_ENCODE(1134, 0, 0), 2681 /* REFCLK_DIV2_FRC_VAL:1:1 */ 2682 PHYMOD_SYMBOL_FIELD_ENCODE(1133, 1, 1), 2683 /* REFCLK_DIV_FRC:2:2 */ 2684 PHYMOD_SYMBOL_FIELD_ENCODE(1135, 2, 2), 2685 /* REFCLK_TERM_FRC:3:3 */ 2686 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1138, 3, 3) 2687 }; 2688 static uint32_t BCMI_TSCE16_XGXS_PLL_STSr_fields[] = 2689 { 2690 /* AFE_REV_ID:0:3 */ 2691 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(3, 3, 0) 2692 }; 2693 static uint32_t BCMI_TSCE16_XGXS_PMD_CORE_MODE_STSr_fields[] = 2694 { 2695 /* PMD_CORE_MODE:0:15 */ 2696 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1064, 15, 0) 2697 }; 2698 static uint32_t BCMI_TSCE16_XGXS_PMD_X1_CTLr_fields[] = 2699 { 2700 /* CORE_DP_H_RSTB:0:0 */ 2701 PHYMOD_SYMBOL_FIELD_ENCODE(431, 0, 0), 2702 /* POR_H_RSTB:1:1 */ 2703 PHYMOD_SYMBOL_FIELD_ENCODE(1088, 1, 1), 2704 /* PRAM_ABILITY:8:8 */ 2705 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1090, 8, 8) 2706 }; 2707 static uint32_t BCMI_TSCE16_XGXS_PMD_X1_LATCH_STSr_fields[] = 2708 { 2709 /* PLL_LOCK_LL:0:0 */ 2710 PHYMOD_SYMBOL_FIELD_ENCODE(1047, 0, 0), 2711 /* PLL_LOCK_LH:1:1 */ 2712 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1046, 1, 1) 2713 }; 2714 static uint32_t BCMI_TSCE16_XGXS_PMD_X1_MODEr_fields[] = 2715 { 2716 /* CORE_MODE:0:15 */ 2717 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(435, 15, 0) 2718 }; 2719 static uint32_t BCMI_TSCE16_XGXS_PMD_X1_OVRRr_fields[] = 2720 { 2721 /* PLL_LOCK_OVRD:0:0 */ 2722 PHYMOD_SYMBOL_FIELD_ENCODE(1048, 0, 0), 2723 /* CORE_MODE_OEN:1:1 */ 2724 PHYMOD_SYMBOL_FIELD_ENCODE(436, 1, 1), 2725 /* CORE_DP_H_RSTB_OEN:2:2 */ 2726 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(432, 2, 2) 2727 }; 2728 static uint32_t BCMI_TSCE16_XGXS_PMD_X1_STSr_fields[] = 2729 { 2730 /* PLL_LOCK_STS:0:0 */ 2731 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1049, 0, 0) 2732 }; 2733 static uint32_t BCMI_TSCE16_XGXS_PMD_X4_CTLr_fields[] = 2734 { 2735 /* LN_RX_DP_H_RSTB:0:0 */ 2736 PHYMOD_SYMBOL_FIELD_ENCODE(773, 0, 0), 2737 /* LN_RX_H_RSTB:1:1 */ 2738 PHYMOD_SYMBOL_FIELD_ENCODE(777, 1, 1), 2739 /* LN_TX_H_PWRDN:2:2 */ 2740 PHYMOD_SYMBOL_FIELD_ENCODE(787, 2, 2), 2741 /* LN_RX_H_PWRDN:3:3 */ 2742 PHYMOD_SYMBOL_FIELD_ENCODE(776, 3, 3), 2743 /* TX_OSR_MODE:4:7 */ 2744 PHYMOD_SYMBOL_FIELD_ENCODE(1519, 7, 4), 2745 /* TX_DISABLE:8:8 */ 2746 PHYMOD_SYMBOL_FIELD_ENCODE(1485, 8, 8), 2747 /* RX_OSR_MODE:9:12 */ 2748 PHYMOD_SYMBOL_FIELD_ENCODE(1239, 12, 9), 2749 /* RX_DME_EN:13:13 */ 2750 PHYMOD_SYMBOL_FIELD_ENCODE(1217, 13, 13), 2751 /* LN_TX_DP_H_RSTB:14:14 */ 2752 PHYMOD_SYMBOL_FIELD_ENCODE(784, 14, 14), 2753 /* LN_TX_H_RSTB:15:15 */ 2754 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(788, 15, 15) 2755 }; 2756 static uint32_t BCMI_TSCE16_XGXS_PMD_X4_EEE_CTLr_fields[] = 2757 { 2758 /* TX_MODE:0:1 */ 2759 PHYMOD_SYMBOL_FIELD_ENCODE(1514, 1, 0), 2760 /* RX_MODE:2:2 */ 2761 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1235, 2, 2) 2762 }; 2763 static uint32_t BCMI_TSCE16_XGXS_PMD_X4_EEE_STSr_fields[] = 2764 { 2765 /* ENERGY_DETECT:0:0 */ 2766 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(606, 0, 0) 2767 }; 2768 static uint32_t BCMI_TSCE16_XGXS_PMD_X4_LATCH_STSr_fields[] = 2769 { 2770 /* RX_LOCK_LL:0:0 */ 2771 PHYMOD_SYMBOL_FIELD_ENCODE(1232, 0, 0), 2772 /* RX_LOCK_LH:1:1 */ 2773 PHYMOD_SYMBOL_FIELD_ENCODE(1231, 1, 1), 2774 /* SIGNAL_DETECT_LL:2:2 */ 2775 PHYMOD_SYMBOL_FIELD_ENCODE(1323, 2, 2), 2776 /* SIGNAL_DETECT_LH:3:3 */ 2777 PHYMOD_SYMBOL_FIELD_ENCODE(1322, 3, 3), 2778 /* RX_CLK_VLD_LL:4:4 */ 2779 PHYMOD_SYMBOL_FIELD_ENCODE(1212, 4, 4), 2780 /* RX_CLK_VLD_LH:5:5 */ 2781 PHYMOD_SYMBOL_FIELD_ENCODE(1211, 5, 5), 2782 /* TX_CLK_VLD_LL:6:6 */ 2783 PHYMOD_SYMBOL_FIELD_ENCODE(1482, 6, 6), 2784 /* TX_CLK_VLD_LH:7:7 */ 2785 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1481, 7, 7) 2786 }; 2787 static uint32_t BCMI_TSCE16_XGXS_PMD_X4_MODEr_fields[] = 2788 { 2789 /* LANE_MODE:0:15 */ 2790 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(736, 15, 0) 2791 }; 2792 static uint32_t BCMI_TSCE16_XGXS_PMD_X4_OVRRr_fields[] = 2793 { 2794 /* RX_LOCK_OVRD:0:0 */ 2795 PHYMOD_SYMBOL_FIELD_ENCODE(1233, 0, 0), 2796 /* SIGNAL_DETECT_OVRD:1:1 */ 2797 PHYMOD_SYMBOL_FIELD_ENCODE(1324, 1, 1), 2798 /* RX_CLK_VLD_OVRD:2:2 */ 2799 PHYMOD_SYMBOL_FIELD_ENCODE(1213, 2, 2), 2800 /* LANE_MODE_OEN:3:3 */ 2801 PHYMOD_SYMBOL_FIELD_ENCODE(737, 3, 3), 2802 /* RX_OSR_MODE_OEN:4:4 */ 2803 PHYMOD_SYMBOL_FIELD_ENCODE(1242, 4, 4), 2804 /* RX_DME_EN_OEN:5:5 */ 2805 PHYMOD_SYMBOL_FIELD_ENCODE(1218, 5, 5), 2806 /* TX_DISABLE_OEN:6:6 */ 2807 PHYMOD_SYMBOL_FIELD_ENCODE(1486, 6, 6), 2808 /* LN_RX_DP_H_RSTB_OEN:7:7 */ 2809 PHYMOD_SYMBOL_FIELD_ENCODE(774, 7, 7), 2810 /* TX_CLK_VLD_OVRD:8:8 */ 2811 PHYMOD_SYMBOL_FIELD_ENCODE(1483, 8, 8), 2812 /* TX_OSR_MODE_OEN:9:9 */ 2813 PHYMOD_SYMBOL_FIELD_ENCODE(1522, 9, 9), 2814 /* LN_TX_DP_H_RSTB_OEN:10:10 */ 2815 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(785, 10, 10) 2816 }; 2817 static uint32_t BCMI_TSCE16_XGXS_PMD_X4_STSr_fields[] = 2818 { 2819 /* RX_LOCK_STS:0:0 */ 2820 PHYMOD_SYMBOL_FIELD_ENCODE(1234, 0, 0), 2821 /* SIGNAL_DETECT_STS:1:1 */ 2822 PHYMOD_SYMBOL_FIELD_ENCODE(1327, 1, 1), 2823 /* RX_CLK_VLD_STS:2:2 */ 2824 PHYMOD_SYMBOL_FIELD_ENCODE(1214, 2, 2), 2825 /* TX_CLK_VLD_STS:3:3 */ 2826 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1484, 3, 3) 2827 }; 2828 static uint32_t BCMI_TSCE16_XGXS_POST1PRE_AFE_CTL0r_fields[] = 2829 { 2830 /* TXFIR_PRE_POST1PRE_1X_1:0:0 */ 2831 PHYMOD_SYMBOL_FIELD_ENCODE(1471, 0, 0), 2832 /* TXFIR_POST1_POST1PRE_1X_1:1:1 */ 2833 PHYMOD_SYMBOL_FIELD_ENCODE(1455, 1, 1), 2834 /* TXFIR_DC_LEVEL_POST1PRE_1X_1:2:2 */ 2835 PHYMOD_SYMBOL_FIELD_ENCODE(1440, 2, 2), 2836 /* TXFIR_PRE_POST1PRE_2X_0:3:3 */ 2837 PHYMOD_SYMBOL_FIELD_ENCODE(1472, 3, 3), 2838 /* TXFIR_POST1_POST1PRE_2X_0:4:4 */ 2839 PHYMOD_SYMBOL_FIELD_ENCODE(1456, 4, 4), 2840 /* TXFIR_DC_LEVEL_POST1PRE_2X_0:5:5 */ 2841 PHYMOD_SYMBOL_FIELD_ENCODE(1441, 5, 5), 2842 /* TXFIR_PRE_POST1PRE_2X_1:6:6 */ 2843 PHYMOD_SYMBOL_FIELD_ENCODE(1473, 6, 6), 2844 /* TXFIR_POST1_POST1PRE_2X_1:7:7 */ 2845 PHYMOD_SYMBOL_FIELD_ENCODE(1457, 7, 7), 2846 /* TXFIR_DC_LEVEL_POST1PRE_2X_1:8:8 */ 2847 PHYMOD_SYMBOL_FIELD_ENCODE(1442, 8, 8), 2848 /* TXFIR_PRE_POST1PRE_2X_2:9:9 */ 2849 PHYMOD_SYMBOL_FIELD_ENCODE(1474, 9, 9), 2850 /* TXFIR_POST1_POST1PRE_2X_2:10:10 */ 2851 PHYMOD_SYMBOL_FIELD_ENCODE(1458, 10, 10), 2852 /* TXFIR_DC_LEVEL_POST1PRE_2X_2:11:11 */ 2853 PHYMOD_SYMBOL_FIELD_ENCODE(1443, 11, 11), 2854 /* TXFIR_PRE_POST1PRE_2X_3:12:12 */ 2855 PHYMOD_SYMBOL_FIELD_ENCODE(1475, 12, 12), 2856 /* TXFIR_POST1_POST1PRE_2X_3:13:13 */ 2857 PHYMOD_SYMBOL_FIELD_ENCODE(1459, 13, 13), 2858 /* TXFIR_DC_LEVEL_POST1PRE_2X_3:14:14 */ 2859 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1444, 14, 14) 2860 }; 2861 static uint32_t BCMI_TSCE16_XGXS_POST1_AFE_CTL0r_fields[] = 2862 { 2863 /* TXFIR_POST1_POST1_1X_0:0:0 */ 2864 PHYMOD_SYMBOL_FIELD_ENCODE(1460, 0, 0), 2865 /* TXFIR_DC_LEVEL_POST1_1X_0:1:1 */ 2866 PHYMOD_SYMBOL_FIELD_ENCODE(1445, 1, 1), 2867 /* TXFIR_POST1_POST1_1X_1:2:2 */ 2868 PHYMOD_SYMBOL_FIELD_ENCODE(1461, 2, 2), 2869 /* TXFIR_DC_LEVEL_POST1_1X_1:3:3 */ 2870 PHYMOD_SYMBOL_FIELD_ENCODE(1446, 3, 3), 2871 /* TXFIR_POST1_POST1_2X_0:4:4 */ 2872 PHYMOD_SYMBOL_FIELD_ENCODE(1462, 4, 4), 2873 /* TXFIR_DC_LEVEL_POST1_2X_0:5:5 */ 2874 PHYMOD_SYMBOL_FIELD_ENCODE(1447, 5, 5), 2875 /* TXFIR_POST1_POST1_2X_1:6:6 */ 2876 PHYMOD_SYMBOL_FIELD_ENCODE(1463, 6, 6), 2877 /* TXFIR_DC_LEVEL_POST1_2X_1:7:7 */ 2878 PHYMOD_SYMBOL_FIELD_ENCODE(1448, 7, 7), 2879 /* TXFIR_POST1_POST1_2X_2:8:8 */ 2880 PHYMOD_SYMBOL_FIELD_ENCODE(1464, 8, 8), 2881 /* TXFIR_DC_LEVEL_POST1_2X_2:9:9 */ 2882 PHYMOD_SYMBOL_FIELD_ENCODE(1449, 9, 9), 2883 /* TXFIR_PRE_POST1PRE_1X_0:12:12 */ 2884 PHYMOD_SYMBOL_FIELD_ENCODE(1470, 12, 12), 2885 /* TXFIR_POST1_POST1PRE_1X_0:13:13 */ 2886 PHYMOD_SYMBOL_FIELD_ENCODE(1454, 13, 13), 2887 /* TXFIR_DC_LEVEL_POST1PRE_1X_0:14:14 */ 2888 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1439, 14, 14) 2889 }; 2890 static uint32_t BCMI_TSCE16_XGXS_POST2_AFE_CTL0r_fields[] = 2891 { 2892 /* TXFIR_POST2_POST2_1X_0:0:0 */ 2893 PHYMOD_SYMBOL_FIELD_ENCODE(1466, 0, 0), 2894 /* TXFIR_DC_LEVEL_POST2_1X_0:1:1 */ 2895 PHYMOD_SYMBOL_FIELD_ENCODE(1450, 1, 1), 2896 /* TXFIR_POST2_POST2_1X_1:2:2 */ 2897 PHYMOD_SYMBOL_FIELD_ENCODE(1467, 2, 2), 2898 /* TXFIR_DC_LEVEL_POST2_1X_1:3:3 */ 2899 PHYMOD_SYMBOL_FIELD_ENCODE(1451, 3, 3), 2900 /* TXFIR_POST2_POST2_2X_0:4:4 */ 2901 PHYMOD_SYMBOL_FIELD_ENCODE(1468, 4, 4), 2902 /* TXFIR_DC_LEVEL_POST2_2X_0:5:5 */ 2903 PHYMOD_SYMBOL_FIELD_ENCODE(1452, 5, 5), 2904 /* TXFIR_POST2_POST2_2X_1:6:6 */ 2905 PHYMOD_SYMBOL_FIELD_ENCODE(1469, 6, 6), 2906 /* TXFIR_DC_LEVEL_POST2_2X_1:7:7 */ 2907 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1453, 7, 7) 2908 }; 2909 static uint32_t BCMI_TSCE16_XGXS_REVID0r_fields[] = 2910 { 2911 /* REVID_MODEL:0:5 */ 2912 PHYMOD_SYMBOL_FIELD_ENCODE(1169, 5, 0), 2913 /* REVID_PROCESS:6:8 */ 2914 PHYMOD_SYMBOL_FIELD_ENCODE(1172, 8, 6), 2915 /* REVID_BONDING:9:10 */ 2916 PHYMOD_SYMBOL_FIELD_ENCODE(1163, 10, 9), 2917 /* REVID_REV_NUMBER:11:13 */ 2918 PHYMOD_SYMBOL_FIELD_ENCODE(1174, 13, 11), 2919 /* REVID_REV_LETTER:14:15 */ 2920 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1173, 15, 14) 2921 }; 2922 static uint32_t BCMI_TSCE16_XGXS_REVID1r_fields[] = 2923 { 2924 /* REVID_EEE:0:0 */ 2925 PHYMOD_SYMBOL_FIELD_ENCODE(1165, 0, 0), 2926 /* REVID_LLP:1:1 */ 2927 PHYMOD_SYMBOL_FIELD_ENCODE(1166, 1, 1), 2928 /* REVID_PIR:2:2 */ 2929 PHYMOD_SYMBOL_FIELD_ENCODE(1171, 2, 2), 2930 /* REVID_CL72:3:3 */ 2931 PHYMOD_SYMBOL_FIELD_ENCODE(1164, 3, 3), 2932 /* REVID_MICRO:4:4 */ 2933 PHYMOD_SYMBOL_FIELD_ENCODE(1168, 4, 4), 2934 /* REVID_MDIO:5:5 */ 2935 PHYMOD_SYMBOL_FIELD_ENCODE(1167, 5, 5), 2936 /* REVID_MULTIPLICITY:12:15 */ 2937 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1170, 15, 12) 2938 }; 2939 static uint32_t BCMI_TSCE16_XGXS_REVID2r_fields[] = 2940 { 2941 /* REVID2:0:3 */ 2942 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1162, 3, 0) 2943 }; 2944 static uint32_t BCMI_TSCE16_XGXS_RST_CTL_CORE_DPr_fields[] = 2945 { 2946 /* PMD_CORE_DP_H_RSTB_PKILL:1:1 */ 2947 PHYMOD_SYMBOL_FIELD_ENCODE(1063, 1, 1), 2948 /* SUP_RST_SEQ_FRC_VAL:3:3 */ 2949 PHYMOD_SYMBOL_FIELD_ENCODE(1347, 3, 3), 2950 /* SUP_RST_SEQ_FRC:4:4 */ 2951 PHYMOD_SYMBOL_FIELD_ENCODE(1346, 4, 4), 2952 /* PMD_MDIO_TRANS_PKILL:5:5 */ 2953 PHYMOD_SYMBOL_FIELD_ENCODE(1076, 5, 5), 2954 /* VCOCLK16_S_COMCLK_SEL:7:7 */ 2955 PHYMOD_SYMBOL_FIELD_ENCODE(1601, 7, 7), 2956 /* VCOCLK16_S_COMCLK_FRC_ON:8:8 */ 2957 PHYMOD_SYMBOL_FIELD_ENCODE(1600, 8, 8), 2958 /* PMD_VCOCLK16_VLD_FRC:9:9 */ 2959 PHYMOD_SYMBOL_FIELD_ENCODE(1085, 9, 9), 2960 /* PMD_VCOCLK16_VLD_FRC_VAL:10:10 */ 2961 PHYMOD_SYMBOL_FIELD_ENCODE(1086, 10, 10), 2962 /* DISABLE_ACK_TIMEOUT:15:15 */ 2963 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(568, 15, 15) 2964 }; 2965 static uint32_t BCMI_TSCE16_XGXS_RST_CTL_PMDr_fields[] = 2966 { 2967 /* CORE_S_RSTB:0:0 */ 2968 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(438, 0, 0) 2969 }; 2970 static uint32_t BCMI_TSCE16_XGXS_RST_SEQ_TMR_CTLr_fields[] = 2971 { 2972 /* RST_SEQ_TIMER:0:2 */ 2973 PHYMOD_SYMBOL_FIELD_ENCODE(1199, 2, 0), 2974 /* PWRDN_SEQ_TIMER:9:11 */ 2975 PHYMOD_SYMBOL_FIELD_ENCODE(1120, 11, 9), 2976 /* RST_SEQ_DIS_FLT_MODE:14:15 */ 2977 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1198, 15, 14) 2978 }; 2979 static uint32_t BCMI_TSCE16_XGXS_RXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr_fields[] = 2980 { 2981 /* RX_OSR_MODE_PIN:0:3 */ 2982 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1243, 3, 0) 2983 }; 2984 static uint32_t BCMI_TSCE16_XGXS_RXCOM_LN_CLK_RST_N_PWRDWN_CTLr_fields[] = 2985 { 2986 /* RX_LN_DP_S_RSTB:0:0 */ 2987 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1229, 0, 0) 2988 }; 2989 static uint32_t BCMI_TSCE16_XGXS_RXCOM_LN_DP_RST_ST_STSr_fields[] = 2990 { 2991 /* RX_LANE_DP_RESET_STATE:0:2 */ 2992 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1227, 2, 0) 2993 }; 2994 static uint32_t BCMI_TSCE16_XGXS_RXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields[] = 2995 { 2996 /* PMD_LN_RX_H_RSTB_PKILL:0:0 */ 2997 PHYMOD_SYMBOL_FIELD_ENCODE(1070, 0, 0), 2998 /* PMD_LN_RX_DP_H_RSTB_PKILL:1:1 */ 2999 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1068, 1, 1) 3000 }; 3001 static uint32_t BCMI_TSCE16_XGXS_RXCOM_LN_RST_OCC_CTLr_fields[] = 3002 { 3003 /* RX_LANE_REG_RESET_OCCURRED:0:0 */ 3004 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1228, 0, 0) 3005 }; 3006 static uint32_t BCMI_TSCE16_XGXS_RXCOM_LN_S_RSTB_CTLr_fields[] = 3007 { 3008 /* RX_LN_S_RSTB:0:0 */ 3009 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1230, 0, 0) 3010 }; 3011 static uint32_t BCMI_TSCE16_XGXS_RXCOM_MCST_MASK_CTLr_fields[] = 3012 { 3013 /* RX_MULTICAST_MASK_CONTROL:0:0 */ 3014 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1237, 0, 0) 3015 }; 3016 static uint32_t BCMI_TSCE16_XGXS_RXCOM_OSR_MODE_CTLr_fields[] = 3017 { 3018 /* RX_OSR_MODE_FRC_VAL:0:3 */ 3019 PHYMOD_SYMBOL_FIELD_ENCODE(1241, 3, 0), 3020 /* RX_OSR_MODE_FRC:15:15 */ 3021 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1240, 15, 15) 3022 }; 3023 static uint32_t BCMI_TSCE16_XGXS_RXCOM_OSR_MODE_STS_MC_MASKr_fields[] = 3024 { 3025 /* RX_OSR_MODE:0:3 */ 3026 PHYMOD_SYMBOL_FIELD_ENCODE(1239, 3, 0), 3027 /* RX_MULTICAST_MASK_CONTROL_STATUS:4:4 */ 3028 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1238, 4, 4) 3029 }; 3030 static uint32_t BCMI_TSCE16_XGXS_RXCOM_UC_ACK_LN_CTLr_fields[] = 3031 { 3032 /* RX_UC_ACK_LANE_CFG_DONE:0:0 */ 3033 PHYMOD_SYMBOL_FIELD_ENCODE(1257, 0, 0), 3034 /* RX_UC_ACK_LANE_DP_RESET:1:1 */ 3035 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1258, 1, 1) 3036 }; 3037 static uint32_t BCMI_TSCE16_XGXS_RXPKTCNT_Lr_fields[] = 3038 { 3039 /* RXPKTCNT_L:0:15 */ 3040 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1205, 15, 0) 3041 }; 3042 static uint32_t BCMI_TSCE16_XGXS_RXPKTCNT_Ur_fields[] = 3043 { 3044 /* RXPKTCNT_U:0:15 */ 3045 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1206, 15, 0) 3046 }; 3047 static uint32_t BCMI_TSCE16_XGXS_RXTXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr_fields[] = 3048 { 3049 /* OSR_MODE_PIN:0:3 */ 3050 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(960, 3, 0) 3051 }; 3052 static uint32_t BCMI_TSCE16_XGXS_RXTXCOM_LN_CLK_RST_N_PWRDWN_CTLr_fields[] = 3053 { 3054 /* LN_DP_S_RSTB:0:0 */ 3055 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(772, 0, 0) 3056 }; 3057 static uint32_t BCMI_TSCE16_XGXS_RXTXCOM_LN_DP_RST_ST_STSr_fields[] = 3058 { 3059 /* LANE_DP_RESET_STATE:0:2 */ 3060 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(735, 2, 0) 3061 }; 3062 static uint32_t BCMI_TSCE16_XGXS_RXTXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields[] = 3063 { 3064 /* PMD_LN_H_RSTB_PKILL:0:0 */ 3065 PHYMOD_SYMBOL_FIELD_ENCODE(1067, 0, 0), 3066 /* PMD_LN_DP_H_RSTB_PKILL:1:1 */ 3067 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1066, 1, 1) 3068 }; 3069 static uint32_t BCMI_TSCE16_XGXS_RXTXCOM_LN_RST_OCC_CTLr_fields[] = 3070 { 3071 /* LANE_REG_RESET_OCCURRED:0:0 */ 3072 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(738, 0, 0) 3073 }; 3074 static uint32_t BCMI_TSCE16_XGXS_RXTXCOM_LN_S_RSTB_CTLr_fields[] = 3075 { 3076 /* LN_S_RSTB:0:0 */ 3077 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(783, 0, 0) 3078 }; 3079 static uint32_t BCMI_TSCE16_XGXS_RXTXCOM_MCST_MASK_CTLr_fields[] = 3080 { 3081 /* MULTICAST_MASK_CONTROL:0:0 */ 3082 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(945, 0, 0) 3083 }; 3084 static uint32_t BCMI_TSCE16_XGXS_RXTXCOM_OSR_MODE_CTLr_fields[] = 3085 { 3086 /* OSR_MODE_FRC_VAL:0:3 */ 3087 PHYMOD_SYMBOL_FIELD_ENCODE(959, 3, 0), 3088 /* OSR_MODE_FRC:15:15 */ 3089 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(958, 15, 15) 3090 }; 3091 static uint32_t BCMI_TSCE16_XGXS_RXTXCOM_OSR_MODE_STS_MC_MASKr_fields[] = 3092 { 3093 /* OSR_MODE:0:3 */ 3094 PHYMOD_SYMBOL_FIELD_ENCODE(957, 3, 0), 3095 /* MULTICAST_MASK_CONTROL_STATUS:4:4 */ 3096 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(946, 4, 4) 3097 }; 3098 static uint32_t BCMI_TSCE16_XGXS_RXTXCOM_UC_ACK_LN_CTLr_fields[] = 3099 { 3100 /* UC_ACK_LANE_CFG_DONE:0:0 */ 3101 PHYMOD_SYMBOL_FIELD_ENCODE(1577, 0, 0), 3102 /* UC_ACK_LANE_DP_RESET:1:1 */ 3103 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1578, 1, 1) 3104 }; 3105 static uint32_t BCMI_TSCE16_XGXS_RX_AFE_RST_PWRDN_OSR_MODE_PIN_STSr_fields[] = 3106 { 3107 /* AFE_RX_PWRDN:0:0 */ 3108 PHYMOD_SYMBOL_FIELD_ENCODE(4, 0, 0), 3109 /* AFE_RX_RESET:1:1 */ 3110 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(7, 1, 1) 3111 }; 3112 static uint32_t BCMI_TSCE16_XGXS_RX_CLK_N_RST_DBG_CTLr_fields[] = 3113 { 3114 /* LN_RX_S_CLKGATE_FRC_ON:0:0 */ 3115 PHYMOD_SYMBOL_FIELD_ENCODE(778, 0, 0), 3116 /* LN_RX_S_COMCLK_SEL:1:1 */ 3117 PHYMOD_SYMBOL_FIELD_ENCODE(780, 1, 1), 3118 /* LN_RX_S_COMCLK_FRC_ON:2:2 */ 3119 PHYMOD_SYMBOL_FIELD_ENCODE(779, 2, 2), 3120 /* PMD_RX_CLK_VLD_FRC:3:3 */ 3121 PHYMOD_SYMBOL_FIELD_ENCODE(1077, 3, 3), 3122 /* PMD_RX_CLK_VLD_FRC_VAL:4:4 */ 3123 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1078, 4, 4) 3124 }; 3125 static uint32_t BCMI_TSCE16_XGXS_RX_CTL0r_fields[] = 3126 { 3127 /* SUM_PSEUDO_DIFF:0:0 */ 3128 PHYMOD_SYMBOL_FIELD_ENCODE(1345, 0, 0), 3129 /* RX_CM_SEL:1:1 */ 3130 PHYMOD_SYMBOL_FIELD_ENCODE(1215, 1, 1), 3131 /* SIGDET_PWRDN:2:2 */ 3132 PHYMOD_SYMBOL_FIELD_ENCODE(1314, 2, 2), 3133 /* SIGDET_BYPASS:3:3 */ 3134 PHYMOD_SYMBOL_FIELD_ENCODE(1309, 3, 3), 3135 /* RCM_SUM:4:4 */ 3136 PHYMOD_SYMBOL_FIELD_ENCODE(1126, 4, 4), 3137 /* VGA_CM_SEL:5:5 */ 3138 PHYMOD_SYMBOL_FIELD_ENCODE(1623, 5, 5), 3139 /* AMS_SPARE_0_2:6:8 */ 3140 PHYMOD_SYMBOL_FIELD_ENCODE(30, 8, 6), 3141 /* EN_RXCK_TESTPORT:9:9 */ 3142 PHYMOD_SYMBOL_FIELD_ENCODE(635, 9, 9), 3143 /* EN_RXCK_TEST:10:11 */ 3144 PHYMOD_SYMBOL_FIELD_ENCODE(634, 11, 10), 3145 /* TERM_CM_ENA:12:12 */ 3146 PHYMOD_SYMBOL_FIELD_ENCODE(1377, 12, 12), 3147 /* TERM_CMULT_ENA:13:13 */ 3148 PHYMOD_SYMBOL_FIELD_ENCODE(1375, 13, 13), 3149 /* TERM_LOWZGND:14:14 */ 3150 PHYMOD_SYMBOL_FIELD_ENCODE(1378, 14, 14), 3151 /* TERM_LOWZVDD:15:15 */ 3152 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1379, 15, 15) 3153 }; 3154 static uint32_t BCMI_TSCE16_XGXS_RX_CTL1r_fields[] = 3155 { 3156 /* VGA_OUT_IDLE:0:0 */ 3157 PHYMOD_SYMBOL_FIELD_ENCODE(1633, 0, 0), 3158 /* VGA_EN_HGAIN:1:1 */ 3159 PHYMOD_SYMBOL_FIELD_ENCODE(1625, 1, 1), 3160 /* CURR_CTLE:2:4 */ 3161 PHYMOD_SYMBOL_FIELD_ENCODE(448, 4, 2), 3162 /* CURR_PI:5:7 */ 3163 PHYMOD_SYMBOL_FIELD_ENCODE(453, 7, 5), 3164 /* AMS_SPARE_1_0:8:10 */ 3165 PHYMOD_SYMBOL_FIELD_ENCODE(31, 10, 8), 3166 /* CURR_DFE_2:11:13 */ 3167 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(450, 13, 11) 3168 }; 3169 static uint32_t BCMI_TSCE16_XGXS_RX_CTL2r_fields[] = 3170 { 3171 /* CURR_DFE_1:0:2 */ 3172 PHYMOD_SYMBOL_FIELD_ENCODE(449, 2, 0), 3173 /* CURR_DFE_SUMMER:3:5 */ 3174 PHYMOD_SYMBOL_FIELD_ENCODE(451, 5, 3), 3175 /* CURR_VGA:6:8 */ 3176 PHYMOD_SYMBOL_FIELD_ENCODE(457, 8, 6), 3177 /* EN_DFE_TAP_FB:9:13 */ 3178 PHYMOD_SYMBOL_FIELD_ENCODE(621, 13, 9), 3179 /* AMS_SPARE_2_0:14:15 */ 3180 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(32, 15, 14) 3181 }; 3182 static uint32_t BCMI_TSCE16_XGXS_RX_CTL3r_fields[] = 3183 { 3184 /* EN_VCCTRL:0:0 */ 3185 PHYMOD_SYMBOL_FIELD_ENCODE(640, 0, 0), 3186 /* EN_CLK33:1:1 */ 3187 PHYMOD_SYMBOL_FIELD_ENCODE(616, 1, 1), 3188 /* EN_CLK16:2:2 */ 3189 PHYMOD_SYMBOL_FIELD_ENCODE(615, 2, 2), 3190 /* EN_20B_DEMUX:3:3 */ 3191 PHYMOD_SYMBOL_FIELD_ENCODE(611, 3, 3), 3192 /* RX_DFE_OS2X_MODE:4:4 */ 3193 PHYMOD_SYMBOL_FIELD_ENCODE(1216, 4, 4), 3194 /* OS2X_MODE_EVEN_ODD:5:5 */ 3195 PHYMOD_SYMBOL_FIELD_ENCODE(956, 5, 5), 3196 /* CURR_VDDR_AFE:6:8 */ 3197 PHYMOD_SYMBOL_FIELD_ENCODE(456, 8, 6), 3198 /* CURR_SIGDET:9:11 */ 3199 PHYMOD_SYMBOL_FIELD_ENCODE(455, 11, 9), 3200 /* I4DEADZONE:12:12 */ 3201 PHYMOD_SYMBOL_FIELD_ENCODE(706, 12, 12), 3202 /* SELI1P25DFE:13:13 */ 3203 PHYMOD_SYMBOL_FIELD_ENCODE(1287, 13, 13), 3204 /* LL_EN:14:14 */ 3205 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(767, 14, 14) 3206 }; 3207 static uint32_t BCMI_TSCE16_XGXS_RX_CTL4r_fields[] = 3208 { 3209 /* RECCLKDIV:0:4 */ 3210 PHYMOD_SYMBOL_FIELD_ENCODE(1127, 4, 0), 3211 /* DIV3O4O5:5:6 */ 3212 PHYMOD_SYMBOL_FIELD_ENCODE(574, 6, 5), 3213 /* EN_RECCLKDIV:7:7 */ 3214 PHYMOD_SYMBOL_FIELD_ENCODE(632, 7, 7), 3215 /* AMS_SPARE_4_0:8:10 */ 3216 PHYMOD_SYMBOL_FIELD_ENCODE(34, 10, 8), 3217 /* OC_2X:11:11 */ 3218 PHYMOD_SYMBOL_FIELD_ENCODE(954, 11, 11), 3219 /* VGA_PON:12:15 */ 3220 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1638, 15, 12) 3221 }; 3222 static uint32_t BCMI_TSCE16_XGXS_RX_CTL5r_fields[] = 3223 { 3224 /* RX_PON:0:3 */ 3225 PHYMOD_SYMBOL_FIELD_ENCODE(1252, 3, 0), 3226 /* CURR_IN_OFFSET:4:6 */ 3227 PHYMOD_SYMBOL_FIELD_ENCODE(452, 6, 4), 3228 /* CTLE_GAIN_CTRL:7:10 */ 3229 PHYMOD_SYMBOL_FIELD_ENCODE(447, 10, 7), 3230 /* EN_DFECLK:11:11 */ 3231 PHYMOD_SYMBOL_FIELD_ENCODE(620, 11, 11), 3232 /* DCC1_PHASE_FLIP:12:12 */ 3233 PHYMOD_SYMBOL_FIELD_ENCODE(467, 12, 12), 3234 /* PI_PD:13:13 */ 3235 PHYMOD_SYMBOL_FIELD_ENCODE(1029, 13, 13), 3236 /* SLCR_CALIB_RANGE_SEL:14:14 */ 3237 PHYMOD_SYMBOL_FIELD_ENCODE(1331, 14, 14), 3238 /* DCC2_PHASE_FLIP:15:15 */ 3239 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(468, 15, 15) 3240 }; 3241 static uint32_t BCMI_TSCE16_XGXS_RX_CTL6r_fields[] = 3242 { 3243 /* M1_SIGN:0:0 */ 3244 PHYMOD_SYMBOL_FIELD_ENCODE(836, 0, 0), 3245 /* HIZ_1:1:1 */ 3246 PHYMOD_SYMBOL_FIELD_ENCODE(682, 1, 1), 3247 /* EN_SIGDET_CALIB:2:2 */ 3248 PHYMOD_SYMBOL_FIELD_ENCODE(637, 2, 2), 3249 /* SUM_GAIN_CTRL:3:6 */ 3250 PHYMOD_SYMBOL_FIELD_ENCODE(1344, 6, 3), 3251 /* SIGDET_CALIBRATION_SELECT:7:7 */ 3252 PHYMOD_SYMBOL_FIELD_ENCODE(1310, 7, 7), 3253 /* SIGDET_OFFSET_CORRECTION_POS:8:12 */ 3254 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1313, 12, 8) 3255 }; 3256 static uint32_t BCMI_TSCE16_XGXS_RX_CTL7r_fields[] = 3257 { 3258 /* SIGDET_OFFSET_CORRECTION_NEG:0:4 */ 3259 PHYMOD_SYMBOL_FIELD_ENCODE(1312, 4, 0), 3260 /* SIGDET_THRESHOLD:5:9 */ 3261 PHYMOD_SYMBOL_FIELD_ENCODE(1315, 9, 5), 3262 /* AMS_SPARE_7_0:10:13 */ 3263 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(36, 13, 10) 3264 }; 3265 static uint32_t BCMI_TSCE16_XGXS_RX_INTr_fields[] = 3266 { 3267 /* VGAPON_SEL:0:0 */ 3268 PHYMOD_SYMBOL_FIELD_ENCODE(1619, 0, 0), 3269 /* RXPON_SEL:1:1 */ 3270 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1208, 1, 1) 3271 }; 3272 static uint32_t BCMI_TSCE16_XGXS_RX_LN_AFE_RST_PWRDWN_CTL_CTLr_fields[] = 3273 { 3274 /* AFE_RX_PWRDN_FRC:0:0 */ 3275 PHYMOD_SYMBOL_FIELD_ENCODE(5, 0, 0), 3276 /* AFE_RX_PWRDN_FRC_VAL:1:1 */ 3277 PHYMOD_SYMBOL_FIELD_ENCODE(6, 1, 1), 3278 /* AFE_RX_RESET_FRC:2:2 */ 3279 PHYMOD_SYMBOL_FIELD_ENCODE(8, 2, 2), 3280 /* AFE_RX_RESET_FRC_VAL:3:3 */ 3281 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(9, 3, 3) 3282 }; 3283 static uint32_t BCMI_TSCE16_XGXS_RX_LN_CLK_RST_N_PWRDWN_CTLr_fields[] = 3284 { 3285 /* LN_RX_S_PWRDN:0:0 */ 3286 PHYMOD_SYMBOL_FIELD_ENCODE(781, 0, 0), 3287 /* AFE_SIGDET_PWRDN:1:1 */ 3288 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(12, 1, 1) 3289 }; 3290 static uint32_t BCMI_TSCE16_XGXS_RX_LN_DBG_RST_CTLr_fields[] = 3291 { 3292 /* LN_RX_S_RSTB:0:0 */ 3293 PHYMOD_SYMBOL_FIELD_ENCODE(782, 0, 0), 3294 /* LN_RX_DP_S_RSTB:1:1 */ 3295 PHYMOD_SYMBOL_FIELD_ENCODE(775, 1, 1), 3296 /* SIGDET_DP_RSTB_EN:2:2 */ 3297 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1311, 2, 2) 3298 }; 3299 static uint32_t BCMI_TSCE16_XGXS_RX_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields[] = 3300 { 3301 /* PMD_LN_RX_H_PWRDN_PKILL:0:0 */ 3302 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1069, 0, 0) 3303 }; 3304 static uint32_t BCMI_TSCE16_XGXS_RX_PMD_LN_MODE_STSr_fields[] = 3305 { 3306 /* PMD_LANE_MODE:0:15 */ 3307 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1065, 15, 0) 3308 }; 3309 static uint32_t BCMI_TSCE16_XGXS_RX_STSr_fields[] = 3310 { 3311 /* RXPON_MUX:0:3 */ 3312 PHYMOD_SYMBOL_FIELD_ENCODE(1207, 3, 0), 3313 /* VGAPON_MUX:4:7 */ 3314 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1618, 7, 4) 3315 }; 3316 static uint32_t BCMI_TSCE16_XGXS_RX_X1_DEC_CTL0r_fields[] = 3317 { 3318 /* HYSTCOUNT:0:3 */ 3319 PHYMOD_SYMBOL_FIELD_ENCODE(705, 3, 0), 3320 /* GCWCOUNT:4:7 */ 3321 PHYMOD_SYMBOL_FIELD_ENCODE(674, 7, 4), 3322 /* SCWCOUNT:8:11 */ 3323 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1274, 11, 8) 3324 }; 3325 static uint32_t BCMI_TSCE16_XGXS_RX_X1_DEC_CTL1r_fields[] = 3326 { 3327 /* CL49_BER_LIMIT:2:7 */ 3328 PHYMOD_SYMBOL_FIELD_ENCODE(301, 7, 2), 3329 /* CL82_BER_LIMIT:8:14 */ 3330 PHYMOD_SYMBOL_FIELD_ENCODE(392, 14, 8), 3331 /* SET_BER_WINDOW_512:15:15 */ 3332 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1291, 15, 15) 3333 }; 3334 static uint32_t BCMI_TSCE16_XGXS_RX_X1_DESKEW_WINSr_fields[] = 3335 { 3336 /* CL48_DSWIN8B10B:0:3 */ 3337 PHYMOD_SYMBOL_FIELD_ENCODE(277, 3, 0), 3338 /* CL48_DSWIN64B66B:4:6 */ 3339 PHYMOD_SYMBOL_FIELD_ENCODE(276, 6, 4), 3340 /* CL82_DSWIN:7:11 */ 3341 PHYMOD_SYMBOL_FIELD_ENCODE(394, 11, 7), 3342 /* CL82_DSWIN_100G:12:15 */ 3343 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(395, 15, 12) 3344 }; 3345 static uint32_t BCMI_TSCE16_XGXS_RX_X1_INVALID_SHCNT_CL82r_fields[] = 3346 { 3347 /* CL82_INVALID_SH_CNT:0:11 */ 3348 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(397, 11, 0) 3349 }; 3350 static uint32_t BCMI_TSCE16_XGXS_RX_X1_SCW0r_fields[] = 3351 { 3352 /* SCW0:0:15 */ 3353 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1264, 15, 0) 3354 }; 3355 static uint32_t BCMI_TSCE16_XGXS_RX_X1_SCW0_MASKr_fields[] = 3356 { 3357 /* SCW0_MASK:0:15 */ 3358 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1265, 15, 0) 3359 }; 3360 static uint32_t BCMI_TSCE16_XGXS_RX_X1_SCW1r_fields[] = 3361 { 3362 /* SCW1:0:15 */ 3363 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1266, 15, 0) 3364 }; 3365 static uint32_t BCMI_TSCE16_XGXS_RX_X1_SCW1_MASKr_fields[] = 3366 { 3367 /* SCW1_MASK:0:15 */ 3368 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1267, 15, 0) 3369 }; 3370 static uint32_t BCMI_TSCE16_XGXS_RX_X1_SCW2r_fields[] = 3371 { 3372 /* SCW2:0:15 */ 3373 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1268, 15, 0) 3374 }; 3375 static uint32_t BCMI_TSCE16_XGXS_RX_X1_SCW2_MASKr_fields[] = 3376 { 3377 /* SCW2_MASK:0:15 */ 3378 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1269, 15, 0) 3379 }; 3380 static uint32_t BCMI_TSCE16_XGXS_RX_X1_SCW3r_fields[] = 3381 { 3382 /* SCW3:0:15 */ 3383 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1270, 15, 0) 3384 }; 3385 static uint32_t BCMI_TSCE16_XGXS_RX_X1_SCW3_MASKr_fields[] = 3386 { 3387 /* SCW3_MASK:0:15 */ 3388 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1271, 15, 0) 3389 }; 3390 static uint32_t BCMI_TSCE16_XGXS_RX_X1_SCW4r_fields[] = 3391 { 3392 /* SCW4:0:1 */ 3393 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1272, 1, 0) 3394 }; 3395 static uint32_t BCMI_TSCE16_XGXS_RX_X1_SCW4_MASKr_fields[] = 3396 { 3397 /* SCW4_MASK:0:1 */ 3398 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1273, 1, 0) 3399 }; 3400 static uint32_t BCMI_TSCE16_XGXS_RX_X1_SHCNT_CL49r_fields[] = 3401 { 3402 /* CL49_INVALID_SH_CNT:0:7 */ 3403 PHYMOD_SYMBOL_FIELD_ENCODE(303, 7, 0), 3404 /* CL49_VALID_SH_CNT:8:15 */ 3405 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(320, 15, 8) 3406 }; 3407 static uint32_t BCMI_TSCE16_XGXS_RX_X1_VALID_SHCNT_CL82r_fields[] = 3408 { 3409 /* CL82_VALID_SH_CNT:0:11 */ 3410 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(407, 11, 0) 3411 }; 3412 static uint32_t BCMI_TSCE16_XGXS_RX_X2_CL82_RX_SCR_IDLE_ERR_CNTr_fields[] = 3413 { 3414 /* CL82_RX_SCR_IDLE_ERROR_CNT:0:15 */ 3415 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(403, 15, 0) 3416 }; 3417 static uint32_t BCMI_TSCE16_XGXS_RX_X2_MISC0r_fields[] = 3418 { 3419 /* BYPASS_CL82RXSM:0:0 */ 3420 PHYMOD_SYMBOL_FIELD_ENCODE(209, 0, 0), 3421 /* DIS_CL82_BERMON:1:1 */ 3422 PHYMOD_SYMBOL_FIELD_ENCODE(573, 1, 1), 3423 /* BRCM_MODE_USE_K20PT5:8:8 */ 3424 PHYMOD_SYMBOL_FIELD_ENCODE(203, 8, 8), 3425 /* CHK_END_EN:10:10 */ 3426 PHYMOD_SYMBOL_FIELD_ENCODE(248, 10, 10), 3427 /* LINK_EN:12:12 */ 3428 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(752, 12, 12) 3429 }; 3430 static uint32_t BCMI_TSCE16_XGXS_RX_X2_MISC1r_fields[] = 3431 { 3432 /* CL82_RX_RF_ENABLE:0:0 */ 3433 PHYMOD_SYMBOL_FIELD_ENCODE(402, 0, 0), 3434 /* CL82_RX_LF_ENABLE:1:1 */ 3435 PHYMOD_SYMBOL_FIELD_ENCODE(400, 1, 1), 3436 /* CL48_RX_RF_ENABLE:2:2 */ 3437 PHYMOD_SYMBOL_FIELD_ENCODE(281, 2, 2), 3438 /* CL48_RX_LF_ENABLE:3:3 */ 3439 PHYMOD_SYMBOL_FIELD_ENCODE(278, 3, 3), 3440 /* CL48_RX_LI_ENABLE:8:8 */ 3441 PHYMOD_SYMBOL_FIELD_ENCODE(279, 8, 8), 3442 /* CL82_RX_LI_ENABLE:9:9 */ 3443 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(401, 9, 9) 3444 }; 3445 static uint32_t BCMI_TSCE16_XGXS_RX_X2_QRSVD0r_fields[] = 3446 { 3447 /* CL48_RX_QRSVDCTRL:1:4 */ 3448 PHYMOD_SYMBOL_FIELD_ENCODE(280, 4, 1), 3449 /* QRSVDSWAP:5:14 */ 3450 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1125, 14, 5) 3451 }; 3452 static uint32_t BCMI_TSCE16_XGXS_RX_X2_QRSVD1r_fields[] = 3453 { 3454 /* QRSVD2_8_2:0:6 */ 3455 PHYMOD_SYMBOL_FIELD_ENCODE(1123, 6, 0), 3456 /* QRSVD1:7:15 */ 3457 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1121, 15, 7) 3458 }; 3459 static uint32_t BCMI_TSCE16_XGXS_RX_X2_QRSVD2r_fields[] = 3460 { 3461 /* QRSVD3:5:13 */ 3462 PHYMOD_SYMBOL_FIELD_ENCODE(1124, 13, 5), 3463 /* QRSVD2_1_0:14:15 */ 3464 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1122, 15, 14) 3465 }; 3466 static uint32_t BCMI_TSCE16_XGXS_RX_X2_SKEW_STS0r_fields[] = 3467 { 3468 /* CL48_SKEWACQ_STATE_D_3:3:5 */ 3469 PHYMOD_SYMBOL_FIELD_ENCODE(285, 5, 3), 3470 /* CL48_SKEWACQ_STATE_D_2:6:8 */ 3471 PHYMOD_SYMBOL_FIELD_ENCODE(284, 8, 6), 3472 /* CL48_SKEWACQ_STATE_D_1:9:11 */ 3473 PHYMOD_SYMBOL_FIELD_ENCODE(283, 11, 9), 3474 /* CL48_SKEWACQ_STATE_D_0:12:14 */ 3475 PHYMOD_SYMBOL_FIELD_ENCODE(282, 14, 12), 3476 /* CL48_SKEW_STATUS:15:15 */ 3477 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(287, 15, 15) 3478 }; 3479 static uint32_t BCMI_TSCE16_XGXS_RX_X2_SKEW_STS1r_fields[] = 3480 { 3481 /* CL48_SKEWACQ_STATE_L:0:7 */ 3482 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(286, 7, 0) 3483 }; 3484 static uint32_t BCMI_TSCE16_XGXS_RX_X4_BARREL_SHIFTER_STr_fields[] = 3485 { 3486 /* SHIFT_AMMOUNT:0:7 */ 3487 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1300, 7, 0) 3488 }; 3489 static uint32_t BCMI_TSCE16_XGXS_RX_X4_BERCNTr_fields[] = 3490 { 3491 /* BER_COUNT_PER_LN:0:7 */ 3492 PHYMOD_SYMBOL_FIELD_ENCODE(191, 7, 0), 3493 /* BIP_ERROR_COUNT_PER_LANE:8:15 */ 3494 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(197, 15, 8) 3495 }; 3496 static uint32_t BCMI_TSCE16_XGXS_RX_X4_CL36_RX0r_fields[] = 3497 { 3498 /* CL36_EN:0:0 */ 3499 PHYMOD_SYMBOL_FIELD_ENCODE(253, 0, 0), 3500 /* REORDER_EN:1:1 */ 3501 PHYMOD_SYMBOL_FIELD_ENCODE(1151, 1, 1), 3502 /* DISABLE_CARRIER_EXTEND:2:2 */ 3503 PHYMOD_SYMBOL_FIELD_ENCODE(569, 2, 2), 3504 /* CL36_FORCE_COMMA_ALIGN_ENABLE:3:3 */ 3505 PHYMOD_SYMBOL_FIELD_ENCODE(255, 3, 3), 3506 /* CL36_BER_EN:5:5 */ 3507 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(252, 5, 5) 3508 }; 3509 static uint32_t BCMI_TSCE16_XGXS_RX_X4_CL49_LOCK_FSM_STSr_fields[] = 3510 { 3511 /* LSM_CURR_STATE:0:1 */ 3512 PHYMOD_SYMBOL_FIELD_ENCODE(831, 1, 0), 3513 /* LSM_HIS_STATE:2:4 */ 3514 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(832, 4, 2) 3515 }; 3516 static uint32_t BCMI_TSCE16_XGXS_RX_X4_CL49_RX_SCR_IDLE_ERR_CNTr_fields[] = 3517 { 3518 /* CL49_RX_SCR_IDLE_ERROR_CNT:0:15 */ 3519 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(311, 15, 0) 3520 }; 3521 static uint32_t BCMI_TSCE16_XGXS_RX_X4_CL82_AM_LATCH_STSr_fields[] = 3522 { 3523 /* AM_LOCK_HIS_STATE:0:9 */ 3524 PHYMOD_SYMBOL_FIELD_ENCODE(39, 9, 0), 3525 /* AMRKR_SPACING_ERR_LATCH_MUX:10:10 */ 3526 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(29, 10, 10) 3527 }; 3528 static uint32_t BCMI_TSCE16_XGXS_RX_X4_CL82_AM_LIVE_STSr_fields[] = 3529 { 3530 /* AM_LOCK_STATE:0:9 */ 3531 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(42, 9, 0) 3532 }; 3533 static uint32_t BCMI_TSCE16_XGXS_RX_X4_DEC_CTL0r_fields[] = 3534 { 3535 /* BLOCK_SYNC_MODE:0:2 */ 3536 PHYMOD_SYMBOL_FIELD_ENCODE(198, 2, 0), 3537 /* CL49_RX_RF_ENABLE:4:4 */ 3538 PHYMOD_SYMBOL_FIELD_ENCODE(310, 4, 4), 3539 /* CL49_RX_LF_ENABLE:5:5 */ 3540 PHYMOD_SYMBOL_FIELD_ENCODE(308, 5, 5), 3541 /* CL49_RX_LI_ENABLE:6:6 */ 3542 PHYMOD_SYMBOL_FIELD_ENCODE(309, 6, 6), 3543 /* DISABLE_CL49_BERMON:8:8 */ 3544 PHYMOD_SYMBOL_FIELD_ENCODE(570, 8, 8), 3545 /* HG2_CODEC:9:9 */ 3546 PHYMOD_SYMBOL_FIELD_ENCODE(679, 9, 9), 3547 /* CL48_CGBAD_EN:10:10 */ 3548 PHYMOD_SYMBOL_FIELD_ENCODE(275, 10, 10), 3549 /* CL48_SYNCACQ_EN:11:11 */ 3550 PHYMOD_SYMBOL_FIELD_ENCODE(288, 11, 11), 3551 /* HG2_ENABLE:12:12 */ 3552 PHYMOD_SYMBOL_FIELD_ENCODE(680, 12, 12), 3553 /* HG2_MESSAGE_INVALID_CODE_ENABLE:13:13 */ 3554 PHYMOD_SYMBOL_FIELD_ENCODE(681, 13, 13), 3555 /* R_TEST_MODE_CFG:14:14 */ 3556 PHYMOD_SYMBOL_FIELD_ENCODE(1259, 14, 14), 3557 /* BYPASS_CL49RXSM:15:15 */ 3558 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(208, 15, 15) 3559 }; 3560 static uint32_t BCMI_TSCE16_XGXS_RX_X4_DEC_CTL1r_fields[] = 3561 { 3562 /* B66DEC_CGBAD_EN:0:0 */ 3563 PHYMOD_SYMBOL_FIELD_ENCODE(145, 0, 0), 3564 /* B66DEC_SYNCERRCOUNT_EN:1:1 */ 3565 PHYMOD_SYMBOL_FIELD_ENCODE(153, 1, 1), 3566 /* B66DEC_KCODE66ERRCOUNT_EN:2:2 */ 3567 PHYMOD_SYMBOL_FIELD_ENCODE(149, 2, 2), 3568 /* B66DEC_FAULT_DET_EN:3:3 */ 3569 PHYMOD_SYMBOL_FIELD_ENCODE(148, 3, 3), 3570 /* B66DEC_PROG_TL_CHAR:4:11 */ 3571 PHYMOD_SYMBOL_FIELD_ENCODE(151, 11, 4), 3572 /* B66DEC_PROG_TL_EN:12:12 */ 3573 PHYMOD_SYMBOL_FIELD_ENCODE(152, 12, 12), 3574 /* B66DEC_NOBLOCKLOCK_DOUT_SEL:13:14 */ 3575 PHYMOD_SYMBOL_FIELD_ENCODE(150, 14, 13), 3576 /* B66DEC_DOUT_ERRORS_IF_BAD_SYNC:15:15 */ 3577 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(146, 15, 15) 3578 }; 3579 static uint32_t BCMI_TSCE16_XGXS_RX_X4_DEC_STS0r_fields[] = 3580 { 3581 /* CL49_RXSM_CURRENT_STATE:0:2 */ 3582 PHYMOD_SYMBOL_FIELD_ENCODE(306, 2, 0), 3583 /* CL49_RXSM_HISTORY_STATE:3:10 */ 3584 PHYMOD_SYMBOL_FIELD_ENCODE(307, 10, 3), 3585 /* CL49_R_TYPE_CODED:12:15 */ 3586 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(312, 15, 12) 3587 }; 3588 static uint32_t BCMI_TSCE16_XGXS_RX_X4_DEC_STS1r_fields[] = 3589 { 3590 /* CL49_BERMON_CURRENT_STATE:0:4 */ 3591 PHYMOD_SYMBOL_FIELD_ENCODE(299, 4, 0), 3592 /* CL49_BERMON_HISTORY_STATE:5:9 */ 3593 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(300, 9, 5) 3594 }; 3595 static uint32_t BCMI_TSCE16_XGXS_RX_X4_DEC_STS2r_fields[] = 3596 { 3597 /* KCODE66ERRCOUNT:0:7 */ 3598 PHYMOD_SYMBOL_FIELD_ENCODE(726, 7, 0), 3599 /* SYNC66ERRCOUNT:8:15 */ 3600 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1356, 15, 8) 3601 }; 3602 static uint32_t BCMI_TSCE16_XGXS_RX_X4_DEC_STS3r_fields[] = 3603 { 3604 /* CL49IEEE_ERRORED_BLOCKS:2:9 */ 3605 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(298, 9, 2) 3606 }; 3607 static uint32_t BCMI_TSCE16_XGXS_RX_X4_DEC_STS4r_fields[] = 3608 { 3609 /* CL48_SYNCACQ_STATE_L:4:14 */ 3610 PHYMOD_SYMBOL_FIELD_ENCODE(293, 14, 4), 3611 /* B66DEC_FAULT_DET:15:15 */ 3612 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(147, 15, 15) 3613 }; 3614 static uint32_t BCMI_TSCE16_XGXS_RX_X4_DEC_STS5r_fields[] = 3615 { 3616 /* CL48_SYNCACQ_STATE_D_3:0:3 */ 3617 PHYMOD_SYMBOL_FIELD_ENCODE(292, 3, 0), 3618 /* CL48_SYNCACQ_STATE_D_2:4:7 */ 3619 PHYMOD_SYMBOL_FIELD_ENCODE(291, 7, 4), 3620 /* CL48_SYNCACQ_STATE_D_1:8:11 */ 3621 PHYMOD_SYMBOL_FIELD_ENCODE(290, 11, 8), 3622 /* CL48_SYNCACQ_STATE_D_0:12:15 */ 3623 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(289, 15, 12) 3624 }; 3625 static uint32_t BCMI_TSCE16_XGXS_RX_X4_FEC0r_fields[] = 3626 { 3627 /* FAST_LOCK_EN:9:9 */ 3628 PHYMOD_SYMBOL_FIELD_ENCODE(660, 9, 9), 3629 /* DBG_ENABLE:10:10 */ 3630 PHYMOD_SYMBOL_FIELD_ENCODE(460, 10, 10), 3631 /* ERROR_EN_OVR_VAL:11:11 */ 3632 PHYMOD_SYMBOL_FIELD_ENCODE(648, 11, 11), 3633 /* ERROR_EN_OVR:12:12 */ 3634 PHYMOD_SYMBOL_FIELD_ENCODE(647, 12, 12), 3635 /* FEC_ERR_ENABLE:13:13 */ 3636 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(665, 13, 13) 3637 }; 3638 static uint32_t BCMI_TSCE16_XGXS_RX_X4_FEC1r_fields[] = 3639 { 3640 /* DBG_ERR_MODE:0:0 */ 3641 PHYMOD_SYMBOL_FIELD_ENCODE(463, 0, 0), 3642 /* BURST_ERR_STATUS_MODE:1:1 */ 3643 PHYMOD_SYMBOL_FIELD_ENCODE(207, 1, 1), 3644 /* DEC_MAX_PM:2:7 */ 3645 PHYMOD_SYMBOL_FIELD_ENCODE(484, 7, 2), 3646 /* INVALID_PARITY_CNT:8:11 */ 3647 PHYMOD_SYMBOL_FIELD_ENCODE(716, 11, 8), 3648 /* GOOD_PARITY_CNT:12:14 */ 3649 PHYMOD_SYMBOL_FIELD_ENCODE(675, 14, 12), 3650 /* FEC_ERROR_CODE_ALL:15:15 */ 3651 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(664, 15, 15) 3652 }; 3653 static uint32_t BCMI_TSCE16_XGXS_RX_X4_FEC2r_fields[] = 3654 { 3655 /* DEC_GAP_COUNT_MODE:1:1 */ 3656 PHYMOD_SYMBOL_FIELD_ENCODE(483, 1, 1), 3657 /* DEC_17B_BURST_GAP_COUNT:2:4 */ 3658 PHYMOD_SYMBOL_FIELD_ENCODE(480, 4, 2), 3659 /* DEC_18B_BURST_GAP_COUNT:5:7 */ 3660 PHYMOD_SYMBOL_FIELD_ENCODE(481, 7, 5), 3661 /* DEC_19B_BURST_GAP_COUNT:8:10 */ 3662 PHYMOD_SYMBOL_FIELD_ENCODE(482, 10, 8), 3663 /* DEC_PM_MODE:11:15 */ 3664 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(485, 15, 11) 3665 }; 3666 static uint32_t BCMI_TSCE16_XGXS_RX_X4_FEC_BURST_ERR_STSHr_fields[] = 3667 { 3668 /* BURST_ERR_STATUSH:0:15 */ 3669 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(205, 15, 0) 3670 }; 3671 static uint32_t BCMI_TSCE16_XGXS_RX_X4_FEC_BURST_ERR_STSLr_fields[] = 3672 { 3673 /* BURST_ERR_STATUSL:0:15 */ 3674 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(206, 15, 0) 3675 }; 3676 static uint32_t BCMI_TSCE16_XGXS_RX_X4_FEC_CORRBLKSHr_fields[] = 3677 { 3678 /* CORCOUNTH:0:15 */ 3679 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(429, 15, 0) 3680 }; 3681 static uint32_t BCMI_TSCE16_XGXS_RX_X4_FEC_CORRBLKSLr_fields[] = 3682 { 3683 /* CORCOUNTL:0:15 */ 3684 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(430, 15, 0) 3685 }; 3686 static uint32_t BCMI_TSCE16_XGXS_RX_X4_FEC_DBG_ERRAHr_fields[] = 3687 { 3688 /* DBG_ERRH:0:15 */ 3689 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(461, 15, 0) 3690 }; 3691 static uint32_t BCMI_TSCE16_XGXS_RX_X4_FEC_DBG_ERRLr_fields[] = 3692 { 3693 /* DBG_ERRL:0:15 */ 3694 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(462, 15, 0) 3695 }; 3696 static uint32_t BCMI_TSCE16_XGXS_RX_X4_FEC_UNCORRBLKSHr_fields[] = 3697 { 3698 /* UNCORCOUNTH:0:15 */ 3699 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1595, 15, 0) 3700 }; 3701 static uint32_t BCMI_TSCE16_XGXS_RX_X4_FEC_UNCORRBLKSLr_fields[] = 3702 { 3703 /* UNCORCOUNTL:0:15 */ 3704 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1596, 15, 0) 3705 }; 3706 static uint32_t BCMI_TSCE16_XGXS_RX_X4_GBOX_STSr_fields[] = 3707 { 3708 /* GBOX_UNDERFLOW_ERR:0:0 */ 3709 PHYMOD_SYMBOL_FIELD_ENCODE(673, 0, 0), 3710 /* GBOX_OVERFLOW_ERR:1:1 */ 3711 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(672, 1, 1) 3712 }; 3713 static uint32_t BCMI_TSCE16_XGXS_RX_X4_LNK_CTLr_fields[] = 3714 { 3715 /* LATCH_LINKDOWN_ENABLE:0:0 */ 3716 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(741, 0, 0) 3717 }; 3718 static uint32_t BCMI_TSCE16_XGXS_RX_X4_PCS_CTL0r_fields[] = 3719 { 3720 /* BRCM64B66_DESCRAMBLER_ENABLE:1:1 */ 3721 PHYMOD_SYMBOL_FIELD_ENCODE(201, 1, 1), 3722 /* LPI_ENABLE:2:2 */ 3723 PHYMOD_SYMBOL_FIELD_ENCODE(813, 2, 2), 3724 /* CL36BYTEDELETEMODE:3:4 */ 3725 PHYMOD_SYMBOL_FIELD_ENCODE(250, 4, 3), 3726 /* DESC2_MODE:5:7 */ 3727 PHYMOD_SYMBOL_FIELD_ENCODE(486, 7, 5), 3728 /* DESKEWMODE:8:10 */ 3729 PHYMOD_SYMBOL_FIELD_ENCODE(490, 10, 8), 3730 /* DECODERMODE:11:13 */ 3731 PHYMOD_SYMBOL_FIELD_ENCODE(478, 13, 11), 3732 /* DESCRAMBLERMODE:14:15 */ 3733 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(488, 15, 14) 3734 }; 3735 static uint32_t BCMI_TSCE16_XGXS_RX_X4_PCS_LATCH_STS0r_fields[] = 3736 { 3737 /* SYNC_STATUS_LL:6:6 */ 3738 PHYMOD_SYMBOL_FIELD_ENCODE(1368, 6, 6), 3739 /* SYNC_STATUS_LH:7:7 */ 3740 PHYMOD_SYMBOL_FIELD_ENCODE(1367, 7, 7), 3741 /* LINK_STATUS_LL:8:8 */ 3742 PHYMOD_SYMBOL_FIELD_ENCODE(759, 8, 8), 3743 /* LINK_STATUS_LH:9:9 */ 3744 PHYMOD_SYMBOL_FIELD_ENCODE(758, 9, 9), 3745 /* HI_BER_LL:10:10 */ 3746 PHYMOD_SYMBOL_FIELD_ENCODE(685, 10, 10), 3747 /* HI_BER_LH:11:11 */ 3748 PHYMOD_SYMBOL_FIELD_ENCODE(684, 11, 11), 3749 /* DESKEW_STATUS_LL:12:12 */ 3750 PHYMOD_SYMBOL_FIELD_ENCODE(501, 12, 12), 3751 /* DESKEW_STATUS_LH:13:13 */ 3752 PHYMOD_SYMBOL_FIELD_ENCODE(500, 13, 13), 3753 /* AM_LOCK_LL:14:14 */ 3754 PHYMOD_SYMBOL_FIELD_ENCODE(41, 14, 14), 3755 /* AM_LOCK_LH:15:15 */ 3756 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(40, 15, 15) 3757 }; 3758 static uint32_t BCMI_TSCE16_XGXS_RX_X4_PCS_LATCH_STS1r_fields[] = 3759 { 3760 /* LPI_RECEIVED_LH:3:3 */ 3761 PHYMOD_SYMBOL_FIELD_ENCODE(815, 3, 3), 3762 /* RESERVED_ORDERED_BYTE_3:4:11 */ 3763 PHYMOD_SYMBOL_FIELD_ENCODE(1156, 11, 4), 3764 /* RESERVED_ORDERED_SET_LH:12:12 */ 3765 PHYMOD_SYMBOL_FIELD_ENCODE(1157, 12, 12), 3766 /* LINK_INTERRUPT_LH:13:13 */ 3767 PHYMOD_SYMBOL_FIELD_ENCODE(756, 13, 13), 3768 /* REMOTE_FAULT_LH:14:14 */ 3769 PHYMOD_SYMBOL_FIELD_ENCODE(1148, 14, 14), 3770 /* LOCAL_FAULT_LH:15:15 */ 3771 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(795, 15, 15) 3772 }; 3773 static uint32_t BCMI_TSCE16_XGXS_RX_X4_PCS_LIVE_STSr_fields[] = 3774 { 3775 /* SYNC_STATUS:0:0 */ 3776 PHYMOD_SYMBOL_FIELD_ENCODE(1366, 0, 0), 3777 /* LINK_STATUS:1:1 */ 3778 PHYMOD_SYMBOL_FIELD_ENCODE(757, 1, 1), 3779 /* HI_BER:2:2 */ 3780 PHYMOD_SYMBOL_FIELD_ENCODE(683, 2, 2), 3781 /* DESKEW_STATUS:3:3 */ 3782 PHYMOD_SYMBOL_FIELD_ENCODE(499, 3, 3), 3783 /* AM_LOCK:4:4 */ 3784 PHYMOD_SYMBOL_FIELD_ENCODE(38, 4, 4), 3785 /* LPI_RECEIVED:5:5 */ 3786 PHYMOD_SYMBOL_FIELD_ENCODE(814, 5, 5), 3787 /* LINK_INTERRUPT:6:6 */ 3788 PHYMOD_SYMBOL_FIELD_ENCODE(755, 6, 6), 3789 /* REMOTE_FAULT:7:7 */ 3790 PHYMOD_SYMBOL_FIELD_ENCODE(1146, 7, 7), 3791 /* LOCAL_FAULT:8:8 */ 3792 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(794, 8, 8) 3793 }; 3794 static uint32_t BCMI_TSCE16_XGXS_RX_X4_PMA_CTL0r_fields[] = 3795 { 3796 /* RSTB_LANE:0:0 */ 3797 PHYMOD_SYMBOL_FIELD_ENCODE(1196, 0, 0), 3798 /* RX_GBOX_AFRST_EN:1:1 */ 3799 PHYMOD_SYMBOL_FIELD_ENCODE(1222, 1, 1), 3800 /* OS_MODE:3:6 */ 3801 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(962, 6, 3) 3802 }; 3803 static uint32_t BCMI_TSCE16_XGXS_RX_X4_SYNCACQ_STS0r_fields[] = 3804 { 3805 /* CL36_SYNCACQ_STATE_CODED_PER_LN:0:3 */ 3806 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(257, 3, 0) 3807 }; 3808 static uint32_t BCMI_TSCE16_XGXS_RX_X4_SYNCACQ_STS1r_fields[] = 3809 { 3810 /* CL36_SYNCACQ_HIS_STATE_PER_LN:0:12 */ 3811 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(256, 12, 0) 3812 }; 3813 static uint32_t BCMI_TSCE16_XGXS_RX_X4_SYNCE_CTLr_fields[] = 3814 { 3815 /* SYNCE_STAGE0_SDM_DIV_PHY_LN:0:15 */ 3816 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1365, 15, 0) 3817 }; 3818 static uint32_t BCMI_TSCE16_XGXS_SCRMBLR_CTLr_fields[] = 3819 { 3820 /* SCRAMBLER_EN_MASK:0:4 */ 3821 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1261, 4, 0) 3822 }; 3823 static uint32_t BCMI_TSCE16_XGXS_SC_X1_PIPE_RST_CNTr_fields[] = 3824 { 3825 /* PIPELINE_RESET_COUNT:0:15 */ 3826 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1028, 15, 0) 3827 }; 3828 static uint32_t BCMI_TSCE16_XGXS_SC_X1_PLL_LOCK_TMRr_fields[] = 3829 { 3830 /* PLL_LOCK_TIMER_PERIOD:0:15 */ 3831 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1051, 15, 0) 3832 }; 3833 static uint32_t BCMI_TSCE16_XGXS_SC_X1_PMD_LOCK_TMRr_fields[] = 3834 { 3835 /* PMD_LOCK_TIMER_PERIOD:0:15 */ 3836 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1075, 15, 0) 3837 }; 3838 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR0_0r_fields[] = 3839 { 3840 /* ENCODEMODE:0:2 */ 3841 PHYMOD_SYMBOL_FIELD_ENCODE(604, 2, 0), 3842 /* FEC_ENABLE:8:8 */ 3843 PHYMOD_SYMBOL_FIELD_ENCODE(662, 8, 8), 3844 /* CL72_ENABLE:9:9 */ 3845 PHYMOD_SYMBOL_FIELD_ENCODE(328, 9, 9), 3846 /* SCR_MODE:10:11 */ 3847 PHYMOD_SYMBOL_FIELD_ENCODE(1262, 11, 10), 3848 /* OS_MODE:12:15 */ 3849 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(962, 15, 12) 3850 }; 3851 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR0_1r_fields[] = 3852 { 3853 /* BRCM64B66_DESCRAMBLER_ENABLE:1:1 */ 3854 PHYMOD_SYMBOL_FIELD_ENCODE(201, 1, 1), 3855 /* CL36BYTEDELETEMODE:3:4 */ 3856 PHYMOD_SYMBOL_FIELD_ENCODE(250, 4, 3), 3857 /* DESC2_MODE:5:7 */ 3858 PHYMOD_SYMBOL_FIELD_ENCODE(486, 7, 5), 3859 /* DESKEWMODE:8:10 */ 3860 PHYMOD_SYMBOL_FIELD_ENCODE(490, 10, 8), 3861 /* DECODERMODE:11:13 */ 3862 PHYMOD_SYMBOL_FIELD_ENCODE(478, 13, 11), 3863 /* DESCRAMBLERMODE:14:15 */ 3864 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(488, 15, 14) 3865 }; 3866 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR0_2r_fields[] = 3867 { 3868 /* CL36_EN:0:0 */ 3869 PHYMOD_SYMBOL_FIELD_ENCODE(253, 0, 0), 3870 /* REORDER_EN:1:1 */ 3871 PHYMOD_SYMBOL_FIELD_ENCODE(1151, 1, 1), 3872 /* BLOCK_SYNC_MODE:4:6 */ 3873 PHYMOD_SYMBOL_FIELD_ENCODE(198, 6, 4), 3874 /* CHK_END_EN:10:10 */ 3875 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(248, 10, 10) 3876 }; 3877 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR0_3r_fields[] = 3878 { 3879 /* CLOCKCNT0:0:13 */ 3880 PHYMOD_SYMBOL_FIELD_ENCODE(409, 13, 0), 3881 /* SGMII_SPD_SWITCH:15:15 */ 3882 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1295, 15, 15) 3883 }; 3884 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR0_4r_fields[] = 3885 { 3886 /* CLOCKCNT1:0:7 */ 3887 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(411, 7, 0) 3888 }; 3889 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR0_5r_fields[] = 3890 { 3891 /* LOOPCNT1:0:5 */ 3892 PHYMOD_SYMBOL_FIELD_ENCODE(807, 5, 0), 3893 /* LOOPCNT0:6:13 */ 3894 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(805, 13, 6) 3895 }; 3896 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR0_6r_fields[] = 3897 { 3898 /* MAC_CREDITGENCNT:0:12 */ 3899 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(839, 12, 0) 3900 }; 3901 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR0_7r_fields[] = 3902 { 3903 /* PCS_CLOCKCNT0:0:13 */ 3904 PHYMOD_SYMBOL_FIELD_ENCODE(1001, 13, 0), 3905 /* PCS_CREDITENABLE:14:14 */ 3906 PHYMOD_SYMBOL_FIELD_ENCODE(1003, 14, 14), 3907 /* REPLICATION_CNT:15:15 */ 3908 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1153, 15, 15) 3909 }; 3910 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR0_8r_fields[] = 3911 { 3912 /* PCS_CREDITGENCNT:0:12 */ 3913 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1005, 12, 0) 3914 }; 3915 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR0_SPDr_fields[] = 3916 { 3917 /* NUM_LANES:0:2 */ 3918 PHYMOD_SYMBOL_FIELD_ENCODE(951, 2, 0), 3919 /* SPEED:8:15 */ 3920 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1340, 15, 8) 3921 }; 3922 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR1_0r_fields[] = 3923 { 3924 /* ENCODEMODE:0:2 */ 3925 PHYMOD_SYMBOL_FIELD_ENCODE(604, 2, 0), 3926 /* FEC_ENABLE:8:8 */ 3927 PHYMOD_SYMBOL_FIELD_ENCODE(662, 8, 8), 3928 /* CL72_ENABLE:9:9 */ 3929 PHYMOD_SYMBOL_FIELD_ENCODE(328, 9, 9), 3930 /* SCR_MODE:10:11 */ 3931 PHYMOD_SYMBOL_FIELD_ENCODE(1262, 11, 10), 3932 /* OS_MODE:12:15 */ 3933 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(962, 15, 12) 3934 }; 3935 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR1_1r_fields[] = 3936 { 3937 /* BRCM64B66_DESCRAMBLER_ENABLE:1:1 */ 3938 PHYMOD_SYMBOL_FIELD_ENCODE(201, 1, 1), 3939 /* CL36BYTEDELETEMODE:3:4 */ 3940 PHYMOD_SYMBOL_FIELD_ENCODE(250, 4, 3), 3941 /* DESC2_MODE:5:7 */ 3942 PHYMOD_SYMBOL_FIELD_ENCODE(486, 7, 5), 3943 /* DESKEWMODE:8:10 */ 3944 PHYMOD_SYMBOL_FIELD_ENCODE(490, 10, 8), 3945 /* DECODERMODE:11:13 */ 3946 PHYMOD_SYMBOL_FIELD_ENCODE(478, 13, 11), 3947 /* DESCRAMBLERMODE:14:15 */ 3948 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(488, 15, 14) 3949 }; 3950 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR1_2r_fields[] = 3951 { 3952 /* CL36_EN:0:0 */ 3953 PHYMOD_SYMBOL_FIELD_ENCODE(253, 0, 0), 3954 /* REORDER_EN:1:1 */ 3955 PHYMOD_SYMBOL_FIELD_ENCODE(1151, 1, 1), 3956 /* BLOCK_SYNC_MODE:4:6 */ 3957 PHYMOD_SYMBOL_FIELD_ENCODE(198, 6, 4), 3958 /* CHK_END_EN:10:10 */ 3959 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(248, 10, 10) 3960 }; 3961 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR1_3r_fields[] = 3962 { 3963 /* CLOCKCNT0:0:13 */ 3964 PHYMOD_SYMBOL_FIELD_ENCODE(409, 13, 0), 3965 /* SGMII_SPD_SWITCH:15:15 */ 3966 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1295, 15, 15) 3967 }; 3968 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR1_4r_fields[] = 3969 { 3970 /* CLOCKCNT1:0:7 */ 3971 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(411, 7, 0) 3972 }; 3973 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR1_5r_fields[] = 3974 { 3975 /* LOOPCNT1:0:5 */ 3976 PHYMOD_SYMBOL_FIELD_ENCODE(807, 5, 0), 3977 /* LOOPCNT0:6:13 */ 3978 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(805, 13, 6) 3979 }; 3980 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR1_6r_fields[] = 3981 { 3982 /* MAC_CREDITGENCNT:0:12 */ 3983 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(839, 12, 0) 3984 }; 3985 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR1_7r_fields[] = 3986 { 3987 /* PCS_CLOCKCNT0:0:13 */ 3988 PHYMOD_SYMBOL_FIELD_ENCODE(1001, 13, 0), 3989 /* PCS_CREDITENABLE:14:14 */ 3990 PHYMOD_SYMBOL_FIELD_ENCODE(1003, 14, 14), 3991 /* REPLICATION_CNT:15:15 */ 3992 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1153, 15, 15) 3993 }; 3994 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR1_8r_fields[] = 3995 { 3996 /* PCS_CREDITGENCNT:0:12 */ 3997 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1005, 12, 0) 3998 }; 3999 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR1_SPDr_fields[] = 4000 { 4001 /* NUM_LANES:0:2 */ 4002 PHYMOD_SYMBOL_FIELD_ENCODE(951, 2, 0), 4003 /* SPEED:8:15 */ 4004 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1340, 15, 8) 4005 }; 4006 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR2_0r_fields[] = 4007 { 4008 /* ENCODEMODE:0:2 */ 4009 PHYMOD_SYMBOL_FIELD_ENCODE(604, 2, 0), 4010 /* FEC_ENABLE:8:8 */ 4011 PHYMOD_SYMBOL_FIELD_ENCODE(662, 8, 8), 4012 /* CL72_ENABLE:9:9 */ 4013 PHYMOD_SYMBOL_FIELD_ENCODE(328, 9, 9), 4014 /* SCR_MODE:10:11 */ 4015 PHYMOD_SYMBOL_FIELD_ENCODE(1262, 11, 10), 4016 /* OS_MODE:12:15 */ 4017 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(962, 15, 12) 4018 }; 4019 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR2_1r_fields[] = 4020 { 4021 /* BRCM64B66_DESCRAMBLER_ENABLE:1:1 */ 4022 PHYMOD_SYMBOL_FIELD_ENCODE(201, 1, 1), 4023 /* CL36BYTEDELETEMODE:3:4 */ 4024 PHYMOD_SYMBOL_FIELD_ENCODE(250, 4, 3), 4025 /* DESC2_MODE:5:7 */ 4026 PHYMOD_SYMBOL_FIELD_ENCODE(486, 7, 5), 4027 /* DESKEWMODE:8:10 */ 4028 PHYMOD_SYMBOL_FIELD_ENCODE(490, 10, 8), 4029 /* DECODERMODE:11:13 */ 4030 PHYMOD_SYMBOL_FIELD_ENCODE(478, 13, 11), 4031 /* DESCRAMBLERMODE:14:15 */ 4032 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(488, 15, 14) 4033 }; 4034 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR2_2r_fields[] = 4035 { 4036 /* CL36_EN:0:0 */ 4037 PHYMOD_SYMBOL_FIELD_ENCODE(253, 0, 0), 4038 /* REORDER_EN:1:1 */ 4039 PHYMOD_SYMBOL_FIELD_ENCODE(1151, 1, 1), 4040 /* BLOCK_SYNC_MODE:4:6 */ 4041 PHYMOD_SYMBOL_FIELD_ENCODE(198, 6, 4), 4042 /* CHK_END_EN:10:10 */ 4043 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(248, 10, 10) 4044 }; 4045 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR2_3r_fields[] = 4046 { 4047 /* CLOCKCNT0:0:13 */ 4048 PHYMOD_SYMBOL_FIELD_ENCODE(409, 13, 0), 4049 /* SGMII_SPD_SWITCH:15:15 */ 4050 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1295, 15, 15) 4051 }; 4052 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR2_4r_fields[] = 4053 { 4054 /* CLOCKCNT1:0:7 */ 4055 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(411, 7, 0) 4056 }; 4057 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR2_5r_fields[] = 4058 { 4059 /* LOOPCNT1:0:5 */ 4060 PHYMOD_SYMBOL_FIELD_ENCODE(807, 5, 0), 4061 /* LOOPCNT0:6:13 */ 4062 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(805, 13, 6) 4063 }; 4064 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR2_6r_fields[] = 4065 { 4066 /* MAC_CREDITGENCNT:0:12 */ 4067 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(839, 12, 0) 4068 }; 4069 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR2_7r_fields[] = 4070 { 4071 /* PCS_CLOCKCNT0:0:13 */ 4072 PHYMOD_SYMBOL_FIELD_ENCODE(1001, 13, 0), 4073 /* PCS_CREDITENABLE:14:14 */ 4074 PHYMOD_SYMBOL_FIELD_ENCODE(1003, 14, 14), 4075 /* REPLICATION_CNT:15:15 */ 4076 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1153, 15, 15) 4077 }; 4078 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR2_8r_fields[] = 4079 { 4080 /* PCS_CREDITGENCNT:0:12 */ 4081 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1005, 12, 0) 4082 }; 4083 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR2_SPDr_fields[] = 4084 { 4085 /* NUM_LANES:0:2 */ 4086 PHYMOD_SYMBOL_FIELD_ENCODE(951, 2, 0), 4087 /* SPEED:8:15 */ 4088 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1340, 15, 8) 4089 }; 4090 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR3_0r_fields[] = 4091 { 4092 /* ENCODEMODE:0:2 */ 4093 PHYMOD_SYMBOL_FIELD_ENCODE(604, 2, 0), 4094 /* FEC_ENABLE:8:8 */ 4095 PHYMOD_SYMBOL_FIELD_ENCODE(662, 8, 8), 4096 /* CL72_ENABLE:9:9 */ 4097 PHYMOD_SYMBOL_FIELD_ENCODE(328, 9, 9), 4098 /* SCR_MODE:10:11 */ 4099 PHYMOD_SYMBOL_FIELD_ENCODE(1262, 11, 10), 4100 /* OS_MODE:12:15 */ 4101 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(962, 15, 12) 4102 }; 4103 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR3_1r_fields[] = 4104 { 4105 /* BRCM64B66_DESCRAMBLER_ENABLE:1:1 */ 4106 PHYMOD_SYMBOL_FIELD_ENCODE(201, 1, 1), 4107 /* CL36BYTEDELETEMODE:3:4 */ 4108 PHYMOD_SYMBOL_FIELD_ENCODE(250, 4, 3), 4109 /* DESC2_MODE:5:7 */ 4110 PHYMOD_SYMBOL_FIELD_ENCODE(486, 7, 5), 4111 /* DESKEWMODE:8:10 */ 4112 PHYMOD_SYMBOL_FIELD_ENCODE(490, 10, 8), 4113 /* DECODERMODE:11:13 */ 4114 PHYMOD_SYMBOL_FIELD_ENCODE(478, 13, 11), 4115 /* DESCRAMBLERMODE:14:15 */ 4116 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(488, 15, 14) 4117 }; 4118 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR3_2r_fields[] = 4119 { 4120 /* CL36_EN:0:0 */ 4121 PHYMOD_SYMBOL_FIELD_ENCODE(253, 0, 0), 4122 /* REORDER_EN:1:1 */ 4123 PHYMOD_SYMBOL_FIELD_ENCODE(1151, 1, 1), 4124 /* BLOCK_SYNC_MODE:4:6 */ 4125 PHYMOD_SYMBOL_FIELD_ENCODE(198, 6, 4), 4126 /* CHK_END_EN:10:10 */ 4127 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(248, 10, 10) 4128 }; 4129 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR3_3r_fields[] = 4130 { 4131 /* CLOCKCNT0:0:13 */ 4132 PHYMOD_SYMBOL_FIELD_ENCODE(409, 13, 0), 4133 /* SGMII_SPD_SWITCH:15:15 */ 4134 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1295, 15, 15) 4135 }; 4136 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR3_4r_fields[] = 4137 { 4138 /* CLOCKCNT1:0:7 */ 4139 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(411, 7, 0) 4140 }; 4141 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR3_5r_fields[] = 4142 { 4143 /* LOOPCNT1:0:5 */ 4144 PHYMOD_SYMBOL_FIELD_ENCODE(807, 5, 0), 4145 /* LOOPCNT0:6:13 */ 4146 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(805, 13, 6) 4147 }; 4148 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR3_6r_fields[] = 4149 { 4150 /* MAC_CREDITGENCNT:0:12 */ 4151 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(839, 12, 0) 4152 }; 4153 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR3_7r_fields[] = 4154 { 4155 /* PCS_CLOCKCNT0:0:13 */ 4156 PHYMOD_SYMBOL_FIELD_ENCODE(1001, 13, 0), 4157 /* PCS_CREDITENABLE:14:14 */ 4158 PHYMOD_SYMBOL_FIELD_ENCODE(1003, 14, 14), 4159 /* REPLICATION_CNT:15:15 */ 4160 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1153, 15, 15) 4161 }; 4162 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR3_8r_fields[] = 4163 { 4164 /* PCS_CREDITGENCNT:0:12 */ 4165 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1005, 12, 0) 4166 }; 4167 static uint32_t BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR3_SPDr_fields[] = 4168 { 4169 /* NUM_LANES:0:2 */ 4170 PHYMOD_SYMBOL_FIELD_ENCODE(951, 2, 0), 4171 /* SPEED:8:15 */ 4172 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1340, 15, 8) 4173 }; 4174 static uint32_t BCMI_TSCE16_XGXS_SC_X1_STSr_fields[] = 4175 { 4176 /* RESOLVED_PORT_MODE:0:2 */ 4177 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1158, 2, 0) 4178 }; 4179 static uint32_t BCMI_TSCE16_XGXS_SC_X1_TX_RST_CNTr_fields[] = 4180 { 4181 /* TX_RESET_COUNT:0:15 */ 4182 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1566, 15, 0) 4183 }; 4184 static uint32_t BCMI_TSCE16_XGXS_SC_X4_BYPASSr_fields[] = 4185 { 4186 /* SC_BYPASS:0:0 */ 4187 PHYMOD_SYMBOL_FIELD_ENCODE(1275, 0, 0), 4188 /* SC_IGNORE_TX_DATA_VLD:1:1 */ 4189 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1277, 1, 1) 4190 }; 4191 static uint32_t BCMI_TSCE16_XGXS_SC_X4_CTLr_fields[] = 4192 { 4193 /* SW_SPEED:0:7 */ 4194 PHYMOD_SYMBOL_FIELD_ENCODE(1352, 7, 0), 4195 /* SW_SPEED_CHANGE:8:8 */ 4196 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1353, 8, 8) 4197 }; 4198 static uint32_t BCMI_TSCE16_XGXS_SC_X4_DBGr_fields[] = 4199 { 4200 /* SC_FSM_STATUS:0:15 */ 4201 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1276, 15, 0) 4202 }; 4203 static uint32_t BCMI_TSCE16_XGXS_SC_X4_ERRr_fields[] = 4204 { 4205 /* PLL_LOCK_TIMED_OUT:0:0 */ 4206 PHYMOD_SYMBOL_FIELD_ENCODE(1050, 0, 0), 4207 /* PMD_LOCK_TIMED_OUT:1:1 */ 4208 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1074, 1, 1) 4209 }; 4210 static uint32_t BCMI_TSCE16_XGXS_SC_X4_FLD_OVRR_EN0_TYPEr_fields[] = 4211 { 4212 /* BLOCK_SYNC_MODE_OEN:0:0 */ 4213 PHYMOD_SYMBOL_FIELD_ENCODE(199, 0, 0), 4214 /* CHK_END_EN_OEN:2:2 */ 4215 PHYMOD_SYMBOL_FIELD_ENCODE(249, 2, 2), 4216 /* BRCM64B66_DESCRAMBLER_ENABLE_OEN:3:3 */ 4217 PHYMOD_SYMBOL_FIELD_ENCODE(202, 3, 3), 4218 /* CL36BYTEDELETEMODE_OEN:4:4 */ 4219 PHYMOD_SYMBOL_FIELD_ENCODE(251, 4, 4), 4220 /* DESC2_MODE_OEN:5:5 */ 4221 PHYMOD_SYMBOL_FIELD_ENCODE(487, 5, 5), 4222 /* DESKEWMODE_OEN:6:6 */ 4223 PHYMOD_SYMBOL_FIELD_ENCODE(491, 6, 6), 4224 /* DECODERMODE_OEN:7:7 */ 4225 PHYMOD_SYMBOL_FIELD_ENCODE(479, 7, 7), 4226 /* DESCRAMBLERMODE_OEN:8:8 */ 4227 PHYMOD_SYMBOL_FIELD_ENCODE(489, 8, 8), 4228 /* ENCODEMODE_OEN:9:9 */ 4229 PHYMOD_SYMBOL_FIELD_ENCODE(605, 9, 9), 4230 /* FEC_ENABLE_OEN:10:10 */ 4231 PHYMOD_SYMBOL_FIELD_ENCODE(663, 10, 10), 4232 /* SCR_MODE_OEN:11:11 */ 4233 PHYMOD_SYMBOL_FIELD_ENCODE(1263, 11, 11), 4234 /* OS_MODE_OEN:12:12 */ 4235 PHYMOD_SYMBOL_FIELD_ENCODE(963, 12, 12), 4236 /* NUM_LANES_OEN:14:14 */ 4237 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(952, 14, 14) 4238 }; 4239 static uint32_t BCMI_TSCE16_XGXS_SC_X4_FLD_OVRR_EN1_TYPEr_fields[] = 4240 { 4241 /* PCS_CREDITGENCNT_OEN:0:0 */ 4242 PHYMOD_SYMBOL_FIELD_ENCODE(1006, 0, 0), 4243 /* PCS_CLOCKCNT0_OEN:1:1 */ 4244 PHYMOD_SYMBOL_FIELD_ENCODE(1002, 1, 1), 4245 /* PCS_CREDITENABLE_OEN:2:2 */ 4246 PHYMOD_SYMBOL_FIELD_ENCODE(1004, 2, 2), 4247 /* REPLICATION_CNT_OEN:3:3 */ 4248 PHYMOD_SYMBOL_FIELD_ENCODE(1154, 3, 3), 4249 /* MAC_CREDITGENCNT_OEN:4:4 */ 4250 PHYMOD_SYMBOL_FIELD_ENCODE(840, 4, 4), 4251 /* LOOPCNT1_OEN:5:5 */ 4252 PHYMOD_SYMBOL_FIELD_ENCODE(808, 5, 5), 4253 /* LOOPCNT0_OEN:6:6 */ 4254 PHYMOD_SYMBOL_FIELD_ENCODE(806, 6, 6), 4255 /* CLOCKCNT1_OEN:7:7 */ 4256 PHYMOD_SYMBOL_FIELD_ENCODE(412, 7, 7), 4257 /* CLOCKCNT0_OEN:8:8 */ 4258 PHYMOD_SYMBOL_FIELD_ENCODE(410, 8, 8), 4259 /* CREDITENABLE_OEN:9:9 */ 4260 PHYMOD_SYMBOL_FIELD_ENCODE(444, 9, 9), 4261 /* SGMII_SPD_SWITCH_OEN:10:10 */ 4262 PHYMOD_SYMBOL_FIELD_ENCODE(1296, 10, 10), 4263 /* CL36_EN_OEN:11:11 */ 4264 PHYMOD_SYMBOL_FIELD_ENCODE(254, 11, 11), 4265 /* REORDER_EN_OEN:12:12 */ 4266 PHYMOD_SYMBOL_FIELD_ENCODE(1152, 12, 12), 4267 /* CL72_EN_OEN:13:13 */ 4268 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(330, 13, 13) 4269 }; 4270 static uint32_t BCMI_TSCE16_XGXS_SC_X4_LN_NUM_OVRRr_fields[] = 4271 { 4272 /* NUM_LANES_OVERRIDE_VALUE:0:2 */ 4273 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(953, 2, 0) 4274 }; 4275 static uint32_t BCMI_TSCE16_XGXS_SC_X4_RSLVD0r_fields[] = 4276 { 4277 /* ENCODEMODE:0:2 */ 4278 PHYMOD_SYMBOL_FIELD_ENCODE(604, 2, 0), 4279 /* FEC_ENABLE:8:8 */ 4280 PHYMOD_SYMBOL_FIELD_ENCODE(662, 8, 8), 4281 /* CL72_ENABLE:9:9 */ 4282 PHYMOD_SYMBOL_FIELD_ENCODE(328, 9, 9), 4283 /* SCR_MODE:10:11 */ 4284 PHYMOD_SYMBOL_FIELD_ENCODE(1262, 11, 10), 4285 /* OS_MODE:12:15 */ 4286 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(962, 15, 12) 4287 }; 4288 static uint32_t BCMI_TSCE16_XGXS_SC_X4_RSLVD1r_fields[] = 4289 { 4290 /* BRCM64B66_DESCRAMBLER_ENABLE:1:1 */ 4291 PHYMOD_SYMBOL_FIELD_ENCODE(201, 1, 1), 4292 /* CL36BYTEDELETEMODE:3:4 */ 4293 PHYMOD_SYMBOL_FIELD_ENCODE(250, 4, 3), 4294 /* DESC2_MODE:5:7 */ 4295 PHYMOD_SYMBOL_FIELD_ENCODE(486, 7, 5), 4296 /* DESKEWMODE:8:10 */ 4297 PHYMOD_SYMBOL_FIELD_ENCODE(490, 10, 8), 4298 /* DECODERMODE:11:13 */ 4299 PHYMOD_SYMBOL_FIELD_ENCODE(478, 13, 11), 4300 /* DESCRAMBLERMODE:14:15 */ 4301 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(488, 15, 14) 4302 }; 4303 static uint32_t BCMI_TSCE16_XGXS_SC_X4_RSLVD2r_fields[] = 4304 { 4305 /* CL36_EN:0:0 */ 4306 PHYMOD_SYMBOL_FIELD_ENCODE(253, 0, 0), 4307 /* REORDER_EN:1:1 */ 4308 PHYMOD_SYMBOL_FIELD_ENCODE(1151, 1, 1), 4309 /* BLOCK_SYNC_MODE:4:6 */ 4310 PHYMOD_SYMBOL_FIELD_ENCODE(198, 6, 4), 4311 /* CHK_END_EN:10:10 */ 4312 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(248, 10, 10) 4313 }; 4314 static uint32_t BCMI_TSCE16_XGXS_SC_X4_RSLVD3r_fields[] = 4315 { 4316 /* CLOCKCNT0:0:13 */ 4317 PHYMOD_SYMBOL_FIELD_ENCODE(409, 13, 0), 4318 /* SGMII_SPD_SWITCH:15:15 */ 4319 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1295, 15, 15) 4320 }; 4321 static uint32_t BCMI_TSCE16_XGXS_SC_X4_RSLVD4r_fields[] = 4322 { 4323 /* CLOCKCNT1:0:7 */ 4324 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(411, 7, 0) 4325 }; 4326 static uint32_t BCMI_TSCE16_XGXS_SC_X4_RSLVD5r_fields[] = 4327 { 4328 /* LOOPCNT1:0:5 */ 4329 PHYMOD_SYMBOL_FIELD_ENCODE(807, 5, 0), 4330 /* LOOPCNT0:6:13 */ 4331 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(805, 13, 6) 4332 }; 4333 static uint32_t BCMI_TSCE16_XGXS_SC_X4_RSLVD6r_fields[] = 4334 { 4335 /* MAC_CREDITGENCNT:0:12 */ 4336 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(839, 12, 0) 4337 }; 4338 static uint32_t BCMI_TSCE16_XGXS_SC_X4_RSLVD7r_fields[] = 4339 { 4340 /* PCS_CLOCKCNT0:0:13 */ 4341 PHYMOD_SYMBOL_FIELD_ENCODE(1001, 13, 0), 4342 /* PCS_CREDITENABLE:14:14 */ 4343 PHYMOD_SYMBOL_FIELD_ENCODE(1003, 14, 14), 4344 /* REPLICATION_CNT:15:15 */ 4345 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1153, 15, 15) 4346 }; 4347 static uint32_t BCMI_TSCE16_XGXS_SC_X4_RSLVD8r_fields[] = 4348 { 4349 /* PCS_CREDITGENCNT:0:12 */ 4350 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1005, 12, 0) 4351 }; 4352 static uint32_t BCMI_TSCE16_XGXS_SC_X4_RSLVD_SPDr_fields[] = 4353 { 4354 /* NUM_LANES:0:2 */ 4355 PHYMOD_SYMBOL_FIELD_ENCODE(951, 2, 0), 4356 /* SPEED:8:15 */ 4357 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1340, 15, 8) 4358 }; 4359 static uint32_t BCMI_TSCE16_XGXS_SC_X4_STSr_fields[] = 4360 { 4361 /* SW_SPEED_CHANGE_DONE:0:0 */ 4362 PHYMOD_SYMBOL_FIELD_ENCODE(1354, 0, 0), 4363 /* SW_SPEED_CONFIG_VLD:1:1 */ 4364 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1355, 1, 1) 4365 }; 4366 static uint32_t BCMI_TSCE16_XGXS_SIGDET_CTL0r_fields[] = 4367 { 4368 /* SIGNAL_DETECT_FILTER_COUNT:0:4 */ 4369 PHYMOD_SYMBOL_FIELD_ENCODE(1319, 4, 0), 4370 /* LOS_FILTER_COUNT:5:9 */ 4371 PHYMOD_SYMBOL_FIELD_ENCODE(809, 9, 5), 4372 /* ENERGY_DETECT_MASK_COUNT:10:14 */ 4373 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(610, 14, 10) 4374 }; 4375 static uint32_t BCMI_TSCE16_XGXS_SIGDET_CTL1r_fields[] = 4376 { 4377 /* AFE_SIGNAL_DETECT_DIS:0:0 */ 4378 PHYMOD_SYMBOL_FIELD_ENCODE(14, 0, 0), 4379 /* EXT_LOS_EN:1:1 */ 4380 PHYMOD_SYMBOL_FIELD_ENCODE(654, 1, 1), 4381 /* EXT_LOS_INV:2:2 */ 4382 PHYMOD_SYMBOL_FIELD_ENCODE(655, 2, 2), 4383 /* IGNORE_LP_MODE:3:3 */ 4384 PHYMOD_SYMBOL_FIELD_ENCODE(711, 3, 3), 4385 /* SIGNAL_DETECT_FILTER_1US:4:4 */ 4386 PHYMOD_SYMBOL_FIELD_ENCODE(1318, 4, 4), 4387 /* ENERGY_DETECT_FRC:5:5 */ 4388 PHYMOD_SYMBOL_FIELD_ENCODE(608, 5, 5), 4389 /* ENERGY_DETECT_FRC_VAL:6:6 */ 4390 PHYMOD_SYMBOL_FIELD_ENCODE(609, 6, 6), 4391 /* SIGNAL_DETECT_FRC:7:7 */ 4392 PHYMOD_SYMBOL_FIELD_ENCODE(1320, 7, 7), 4393 /* SIGNAL_DETECT_FRC_VAL:8:8 */ 4394 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1321, 8, 8) 4395 }; 4396 static uint32_t BCMI_TSCE16_XGXS_SIGDET_CTL2r_fields[] = 4397 { 4398 /* LOS_THRESH:0:4 */ 4399 PHYMOD_SYMBOL_FIELD_ENCODE(810, 4, 0), 4400 /* SIGNAL_DETECT_THRESH:5:9 */ 4401 PHYMOD_SYMBOL_FIELD_ENCODE(1328, 9, 5), 4402 /* HOLD_LOS_COUNT:10:12 */ 4403 PHYMOD_SYMBOL_FIELD_ENCODE(686, 12, 10), 4404 /* HOLD_SD_COUNT:13:15 */ 4405 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(687, 15, 13) 4406 }; 4407 static uint32_t BCMI_TSCE16_XGXS_SIGDET_STS0r_fields[] = 4408 { 4409 /* SIGNAL_DETECT:0:0 */ 4410 PHYMOD_SYMBOL_FIELD_ENCODE(1316, 0, 0), 4411 /* SIGNAL_DETECT_CHANGE:1:1 */ 4412 PHYMOD_SYMBOL_FIELD_ENCODE(1317, 1, 1), 4413 /* SIGNAL_DETECT_RAW:4:4 */ 4414 PHYMOD_SYMBOL_FIELD_ENCODE(1325, 4, 4), 4415 /* SIGNAL_DETECT_RAW_CHANGE:5:5 */ 4416 PHYMOD_SYMBOL_FIELD_ENCODE(1326, 5, 5), 4417 /* EXT_SIGDET:6:6 */ 4418 PHYMOD_SYMBOL_FIELD_ENCODE(657, 6, 6), 4419 /* EXT_SIGDET_CHANGE:7:7 */ 4420 PHYMOD_SYMBOL_FIELD_ENCODE(658, 7, 7), 4421 /* AFE_SIGDET:8:8 */ 4422 PHYMOD_SYMBOL_FIELD_ENCODE(10, 8, 8), 4423 /* AFE_SIGDET_CHANGE:9:9 */ 4424 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(11, 9, 9) 4425 }; 4426 static uint32_t BCMI_TSCE16_XGXS_SIGDET_STS1r_fields[] = 4427 { 4428 /* UC_SIGNAL_DETECT:0:0 */ 4429 PHYMOD_SYMBOL_FIELD_ENCODE(1591, 0, 0), 4430 /* UC_SIGNAL_DETECT_CHANGE:1:1 */ 4431 PHYMOD_SYMBOL_FIELD_ENCODE(1592, 1, 1), 4432 /* UC_EXT_SIGDET:6:6 */ 4433 PHYMOD_SYMBOL_FIELD_ENCODE(1587, 6, 6), 4434 /* UC_EXT_SIGDET_CHANGE:7:7 */ 4435 PHYMOD_SYMBOL_FIELD_ENCODE(1588, 7, 7), 4436 /* UC_AFE_SIGDET:8:8 */ 4437 PHYMOD_SYMBOL_FIELD_ENCODE(1580, 8, 8), 4438 /* UC_AFE_SIGDET_CHANGE:9:9 */ 4439 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1581, 9, 9) 4440 }; 4441 static uint32_t BCMI_TSCE16_XGXS_SIGDET_STS2r_fields[] = 4442 { 4443 /* ENERGY_DETECT:0:0 */ 4444 PHYMOD_SYMBOL_FIELD_ENCODE(606, 0, 0), 4445 /* ENERGY_DETECT_CHANGE:1:1 */ 4446 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(607, 1, 1) 4447 }; 4448 static uint32_t BCMI_TSCE16_XGXS_SIGDET_STS3r_fields[] = 4449 { 4450 /* PMD_SIGNAL_DETECT:0:0 */ 4451 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1081, 0, 0) 4452 }; 4453 static uint32_t BCMI_TSCE16_XGXS_SIGDET_STS4r_fields[] = 4454 { 4455 /* AFE_SIGDET_THRESH:0:4 */ 4456 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(13, 4, 0) 4457 }; 4458 static uint32_t BCMI_TSCE16_XGXS_SPARE0r_fields[] = 4459 { 4460 /* SPARE0:0:7 */ 4461 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1338, 7, 0) 4462 }; 4463 static uint32_t BCMI_TSCE16_XGXS_SPARE1r_fields[] = 4464 { 4465 /* SPARE1:0:7 */ 4466 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1339, 7, 0) 4467 }; 4468 static uint32_t BCMI_TSCE16_XGXS_TLB_RX_DBG_PMD_RX_LOCK_STSr_fields[] = 4469 { 4470 /* DBG_PMD_RX_LOCK:0:0 */ 4471 PHYMOD_SYMBOL_FIELD_ENCODE(465, 0, 0), 4472 /* DBG_PMD_RX_LOCK_CHANGE:1:1 */ 4473 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(466, 1, 1) 4474 }; 4475 static uint32_t BCMI_TSCE16_XGXS_TLB_RX_DIG_LPBK_CFGr_fields[] = 4476 { 4477 /* DIG_LPBK_EN:0:0 */ 4478 PHYMOD_SYMBOL_FIELD_ENCODE(562, 0, 0), 4479 /* DIG_LPBK_PD_MODE:1:1 */ 4480 PHYMOD_SYMBOL_FIELD_ENCODE(567, 1, 1), 4481 /* DIG_LPBK_PD_FLT_BYPASS:2:2 */ 4482 PHYMOD_SYMBOL_FIELD_ENCODE(565, 2, 2), 4483 /* DIG_LPBK_PD_BIAS_EN:3:3 */ 4484 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(563, 3, 3) 4485 }; 4486 static uint32_t BCMI_TSCE16_XGXS_TLB_RX_DIG_LPBK_PD_STSr_fields[] = 4487 { 4488 /* DIG_LPBK_PD_LATE_IND:0:0 */ 4489 PHYMOD_SYMBOL_FIELD_ENCODE(566, 0, 0), 4490 /* DIG_LPBK_PD_EARLY_IND:1:1 */ 4491 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(564, 1, 1) 4492 }; 4493 static uint32_t BCMI_TSCE16_XGXS_TLB_RX_PMD_RX_LOCK_STSr_fields[] = 4494 { 4495 /* PMD_RX_LOCK:0:0 */ 4496 PHYMOD_SYMBOL_FIELD_ENCODE(1079, 0, 0), 4497 /* PMD_RX_LOCK_CHANGE:1:1 */ 4498 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1080, 1, 1) 4499 }; 4500 static uint32_t BCMI_TSCE16_XGXS_TLB_RX_PRBS_CHK_BURST_ERR_CNT_STSr_fields[] = 4501 { 4502 /* PRBS_CHK_BURST_ERR_CNT:0:9 */ 4503 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1091, 9, 0) 4504 }; 4505 static uint32_t BCMI_TSCE16_XGXS_TLB_RX_PRBS_CHK_CFGr_fields[] = 4506 { 4507 /* PRBS_CHK_EN:0:0 */ 4508 PHYMOD_SYMBOL_FIELD_ENCODE(1094, 0, 0), 4509 /* PRBS_CHK_MODE_SEL:1:3 */ 4510 PHYMOD_SYMBOL_FIELD_ENCODE(1107, 3, 1), 4511 /* PRBS_CHK_INV:4:4 */ 4512 PHYMOD_SYMBOL_FIELD_ENCODE(1102, 4, 4), 4513 /* PRBS_CHK_MODE:5:6 */ 4514 PHYMOD_SYMBOL_FIELD_ENCODE(1106, 6, 5), 4515 /* PRBS_CHK_EN_AUTO_MODE:7:7 */ 4516 PHYMOD_SYMBOL_FIELD_ENCODE(1095, 7, 7), 4517 /* PRBS_CHK_ERR_CNT_BURST_MODE:9:9 */ 4518 PHYMOD_SYMBOL_FIELD_ENCODE(1098, 9, 9), 4519 /* TRNSUM_ERROR_COUNT_EN:10:10 */ 4520 PHYMOD_SYMBOL_FIELD_ENCODE(1403, 10, 10), 4521 /* PRBS_CHK_CLK_EN_FRC_ON:11:11 */ 4522 PHYMOD_SYMBOL_FIELD_ENCODE(1093, 11, 11), 4523 /* PRBS_CHK_BURST_ERR_CNT_EN:15:15 */ 4524 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1092, 15, 15) 4525 }; 4526 static uint32_t BCMI_TSCE16_XGXS_TLB_RX_PRBS_CHK_CNT_CFGr_fields[] = 4527 { 4528 /* PRBS_CHK_LOCK_CNT:0:4 */ 4529 PHYMOD_SYMBOL_FIELD_ENCODE(1104, 4, 0), 4530 /* PRBS_CHK_OOL_CNT:8:12 */ 4531 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1108, 12, 8) 4532 }; 4533 static uint32_t BCMI_TSCE16_XGXS_TLB_RX_PRBS_CHK_EN_TMR_CTLr_fields[] = 4534 { 4535 /* PRBS_CHK_EN_TIMER_MODE:0:1 */ 4536 PHYMOD_SYMBOL_FIELD_ENCODE(1097, 1, 0), 4537 /* PRBS_CHK_EN_TIMEOUT:8:12 */ 4538 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1096, 12, 8) 4539 }; 4540 static uint32_t BCMI_TSCE16_XGXS_TLB_RX_PRBS_CHK_ERR_CNT_LSB_STSr_fields[] = 4541 { 4542 /* PRBS_CHK_ERR_CNT_LSB:0:15 */ 4543 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1099, 15, 0) 4544 }; 4545 static uint32_t BCMI_TSCE16_XGXS_TLB_RX_PRBS_CHK_ERR_CNT_MSB_STSr_fields[] = 4546 { 4547 /* PRBS_CHK_ERR_CNT_MSB:0:14 */ 4548 PHYMOD_SYMBOL_FIELD_ENCODE(1100, 14, 0), 4549 /* PRBS_CHK_LOCK_LOST_LH:15:15 */ 4550 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1105, 15, 15) 4551 }; 4552 static uint32_t BCMI_TSCE16_XGXS_TLB_RX_PRBS_CHK_LOCK_STSr_fields[] = 4553 { 4554 /* PRBS_CHK_LOCK:0:0 */ 4555 PHYMOD_SYMBOL_FIELD_ENCODE(1103, 0, 0), 4556 /* PRBS_CHK_ERR_CNT_NO_CLR:1:15 */ 4557 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1101, 15, 1) 4558 }; 4559 static uint32_t BCMI_TSCE16_XGXS_TLB_RX_TLB_RX_MISC_CFGr_fields[] = 4560 { 4561 /* RX_PMD_DP_INVERT:0:0 */ 4562 PHYMOD_SYMBOL_FIELD_ENCODE(1251, 0, 0), 4563 /* RX_AGGREGATOR_BYPASS_EN:1:1 */ 4564 PHYMOD_SYMBOL_FIELD_ENCODE(1210, 1, 1), 4565 /* DBG_MASK_DIG_LPBK_EN:2:2 */ 4566 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(464, 2, 2) 4567 }; 4568 static uint32_t BCMI_TSCE16_XGXS_TLB_RX_UC_PMD_RX_LOCK_STSr_fields[] = 4569 { 4570 /* UC_PMD_RX_LOCK:0:0 */ 4571 PHYMOD_SYMBOL_FIELD_ENCODE(1589, 0, 0), 4572 /* UC_PMD_RX_LOCK_CHANGE:1:1 */ 4573 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1590, 1, 1) 4574 }; 4575 static uint32_t BCMI_TSCE16_XGXS_TLB_TX_PATT_GEN_CFGr_fields[] = 4576 { 4577 /* PATT_GEN_EN:0:0 */ 4578 PHYMOD_SYMBOL_FIELD_ENCODE(982, 0, 0), 4579 /* PATT_GEN_STOP_POS:8:11 */ 4580 PHYMOD_SYMBOL_FIELD_ENCODE(999, 11, 8), 4581 /* PATT_GEN_START_POS:12:15 */ 4582 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(998, 15, 12) 4583 }; 4584 static uint32_t BCMI_TSCE16_XGXS_TLB_TX_PRBS_GEN_CFGr_fields[] = 4585 { 4586 /* PRBS_GEN_EN:0:0 */ 4587 PHYMOD_SYMBOL_FIELD_ENCODE(1109, 0, 0), 4588 /* PRBS_GEN_MODE_SEL:1:3 */ 4589 PHYMOD_SYMBOL_FIELD_ENCODE(1112, 3, 1), 4590 /* PRBS_GEN_INV:4:4 */ 4591 PHYMOD_SYMBOL_FIELD_ENCODE(1111, 4, 4), 4592 /* PRBS_GEN_ERR_INS:5:5 */ 4593 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1110, 5, 5) 4594 }; 4595 static uint32_t BCMI_TSCE16_XGXS_TLB_TX_RMT_LPBK_CFGr_fields[] = 4596 { 4597 /* RMT_LPBK_EN:0:0 */ 4598 PHYMOD_SYMBOL_FIELD_ENCODE(1190, 0, 0), 4599 /* RMT_LPBK_PD_MODE:1:1 */ 4600 PHYMOD_SYMBOL_FIELD_ENCODE(1194, 1, 1), 4601 /* RMT_LPBK_PD_FRC_ON:2:2 */ 4602 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1192, 2, 2) 4603 }; 4604 static uint32_t BCMI_TSCE16_XGXS_TLB_TX_RMT_LPBK_PD_STSr_fields[] = 4605 { 4606 /* RMT_LPBK_PD_LATE_IND:0:0 */ 4607 PHYMOD_SYMBOL_FIELD_ENCODE(1193, 0, 0), 4608 /* RMT_LPBK_PD_EARLY_IND:1:1 */ 4609 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1191, 1, 1) 4610 }; 4611 static uint32_t BCMI_TSCE16_XGXS_TLB_TX_TLB_TX_MISC_CFGr_fields[] = 4612 { 4613 /* TX_PMD_DP_INVERT:0:0 */ 4614 PHYMOD_SYMBOL_FIELD_ENCODE(1561, 0, 0), 4615 /* TX_PCS_NATIVE_ANA_FRMT_EN:1:1 */ 4616 PHYMOD_SYMBOL_FIELD_ENCODE(1525, 1, 1), 4617 /* TX_MUX_SEL_ORDER:2:2 */ 4618 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1518, 2, 2) 4619 }; 4620 static uint32_t BCMI_TSCE16_XGXS_TOP_USER_CTL0r_fields[] = 4621 { 4622 /* HEARTBEAT_COUNT_1US:0:9 */ 4623 PHYMOD_SYMBOL_FIELD_ENCODE(677, 9, 0), 4624 /* MASKDATA_BUS_ASSIGN:10:11 */ 4625 PHYMOD_SYMBOL_FIELD_ENCODE(842, 11, 10), 4626 /* CORE_DP_S_RSTB:13:13 */ 4627 PHYMOD_SYMBOL_FIELD_ENCODE(434, 13, 13), 4628 /* AFE_S_PLL_PWRDN:14:14 */ 4629 PHYMOD_SYMBOL_FIELD_ENCODE(15, 14, 14), 4630 /* UC_ACTIVE:15:15 */ 4631 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1579, 15, 15) 4632 }; 4633 static uint32_t BCMI_TSCE16_XGXS_TXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr_fields[] = 4634 { 4635 /* TX_OSR_MODE_PIN:0:3 */ 4636 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1523, 3, 0) 4637 }; 4638 static uint32_t BCMI_TSCE16_XGXS_TXCOM_CTL0r_fields[] = 4639 { 4640 /* TXCOM_CL72_MAX_WAIT_TIMER_PERIOD:0:15 */ 4641 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1429, 15, 0) 4642 }; 4643 static uint32_t BCMI_TSCE16_XGXS_TXCOM_CTL1r_fields[] = 4644 { 4645 /* TXCOM_CL72_WAIT_CNTR_LIMIT:0:8 */ 4646 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1430, 8, 0) 4647 }; 4648 static uint32_t BCMI_TSCE16_XGXS_TXCOM_LN_CLK_RST_N_PWRDWN_CTLr_fields[] = 4649 { 4650 /* TX_LN_DP_S_RSTB:0:0 */ 4651 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1510, 0, 0) 4652 }; 4653 static uint32_t BCMI_TSCE16_XGXS_TXCOM_LN_DP_RST_ST_STSr_fields[] = 4654 { 4655 /* TX_LANE_DP_RESET_STATE:0:2 */ 4656 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1503, 2, 0) 4657 }; 4658 static uint32_t BCMI_TSCE16_XGXS_TXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields[] = 4659 { 4660 /* PMD_LN_TX_H_RSTB_PKILL:0:0 */ 4661 PHYMOD_SYMBOL_FIELD_ENCODE(1073, 0, 0), 4662 /* PMD_LN_TX_DP_H_RSTB_PKILL:1:1 */ 4663 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1071, 1, 1) 4664 }; 4665 static uint32_t BCMI_TSCE16_XGXS_TXCOM_LN_RST_OCC_CTLr_fields[] = 4666 { 4667 /* TX_LANE_REG_RESET_OCCURRED:0:0 */ 4668 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1506, 0, 0) 4669 }; 4670 static uint32_t BCMI_TSCE16_XGXS_TXCOM_LN_S_RSTB_CTLr_fields[] = 4671 { 4672 /* TX_LN_S_RSTB:0:0 */ 4673 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1511, 0, 0) 4674 }; 4675 static uint32_t BCMI_TSCE16_XGXS_TXCOM_MCST_MASK_CTLr_fields[] = 4676 { 4677 /* TX_MULTICAST_MASK_CONTROL:0:0 */ 4678 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1516, 0, 0) 4679 }; 4680 static uint32_t BCMI_TSCE16_XGXS_TXCOM_OSR_MODE_CTLr_fields[] = 4681 { 4682 /* TX_OSR_MODE_FRC_VAL:0:3 */ 4683 PHYMOD_SYMBOL_FIELD_ENCODE(1521, 3, 0), 4684 /* TX_OSR_MODE_FRC:15:15 */ 4685 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1520, 15, 15) 4686 }; 4687 static uint32_t BCMI_TSCE16_XGXS_TXCOM_OSR_MODE_STS_MC_MASKr_fields[] = 4688 { 4689 /* TX_OSR_MODE:0:3 */ 4690 PHYMOD_SYMBOL_FIELD_ENCODE(1519, 3, 0), 4691 /* TX_MULTICAST_MASK_CONTROL_STATUS:4:4 */ 4692 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1517, 4, 4) 4693 }; 4694 static uint32_t BCMI_TSCE16_XGXS_TXCOM_UC_ACK_LN_CTLr_fields[] = 4695 { 4696 /* TX_UC_ACK_LANE_CFG_DONE:0:0 */ 4697 PHYMOD_SYMBOL_FIELD_ENCODE(1568, 0, 0), 4698 /* TX_UC_ACK_LANE_DP_RESET:1:1 */ 4699 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1569, 1, 1) 4700 }; 4701 static uint32_t BCMI_TSCE16_XGXS_TXFIR_TAP_CTL0r_fields[] = 4702 { 4703 /* TXFIR_POST2:0:3 */ 4704 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1465, 3, 0) 4705 }; 4706 static uint32_t BCMI_TSCE16_XGXS_TXPKTCNT_Lr_fields[] = 4707 { 4708 /* TXPKTCNT_L:0:15 */ 4709 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1476, 15, 0) 4710 }; 4711 static uint32_t BCMI_TSCE16_XGXS_TXPKTCNT_Ur_fields[] = 4712 { 4713 /* TXPKTCNT_U:0:15 */ 4714 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1477, 15, 0) 4715 }; 4716 static uint32_t BCMI_TSCE16_XGXS_TX_AFE_RST_PWRDN_OSR_MODE_PIN_STSr_fields[] = 4717 { 4718 /* AFE_TX_PWRDN:0:0 */ 4719 PHYMOD_SYMBOL_FIELD_ENCODE(21, 0, 0), 4720 /* AFE_TX_RESET:1:1 */ 4721 PHYMOD_SYMBOL_FIELD_ENCODE(24, 1, 1), 4722 /* AFE_TXCLK_RESET:2:2 */ 4723 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(16, 2, 2) 4724 }; 4725 static uint32_t BCMI_TSCE16_XGXS_TX_CLK_N_RST_DBG_CTLr_fields[] = 4726 { 4727 /* LN_TX_S_CLKGATE_FRC_ON:0:0 */ 4728 PHYMOD_SYMBOL_FIELD_ENCODE(789, 0, 0), 4729 /* LN_TX_S_COMCLK_SEL:1:1 */ 4730 PHYMOD_SYMBOL_FIELD_ENCODE(791, 1, 1), 4731 /* LN_TX_S_COMCLK_FRC_ON:2:2 */ 4732 PHYMOD_SYMBOL_FIELD_ENCODE(790, 2, 2), 4733 /* PMD_TX_CLK_VLD_FRC:3:3 */ 4734 PHYMOD_SYMBOL_FIELD_ENCODE(1082, 3, 3), 4735 /* PMD_TX_CLK_VLD_FRC_VAL:4:4 */ 4736 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1083, 4, 4) 4737 }; 4738 static uint32_t BCMI_TSCE16_XGXS_TX_CLK_N_RST_MISC_CTLr_fields[] = 4739 { 4740 /* TX_PI_LOOP_FILTER_STABLE:0:0 */ 4741 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1545, 0, 0) 4742 }; 4743 static uint32_t BCMI_TSCE16_XGXS_TX_CTL0r_fields[] = 4744 { 4745 /* TX_PWRDN:0:0 */ 4746 PHYMOD_SYMBOL_FIELD_ENCODE(1564, 0, 0), 4747 /* TICKSEL:1:2 */ 4748 PHYMOD_SYMBOL_FIELD_ENCODE(1387, 2, 1), 4749 /* TX_PON:3:6 */ 4750 PHYMOD_SYMBOL_FIELD_ENCODE(1562, 6, 3), 4751 /* ENABLE_OS_2:7:7 */ 4752 PHYMOD_SYMBOL_FIELD_ENCODE(598, 7, 7), 4753 /* LL_SELPATH_TX:8:8 */ 4754 PHYMOD_SYMBOL_FIELD_ENCODE(771, 8, 8), 4755 /* LL_POLARITY_FLIP:9:9 */ 4756 PHYMOD_SYMBOL_FIELD_ENCODE(770, 9, 9), 4757 /* LL_FIFO_ZERO_OUT:10:10 */ 4758 PHYMOD_SYMBOL_FIELD_ENCODE(769, 10, 10), 4759 /* LL_FIFO_CTRL:11:13 */ 4760 PHYMOD_SYMBOL_FIELD_ENCODE(768, 13, 11), 4761 /* TX_FIFO_RESETB:14:14 */ 4762 PHYMOD_SYMBOL_FIELD_ENCODE(1497, 14, 14), 4763 /* LOWLATENCY_EN:15:15 */ 4764 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(811, 15, 15) 4765 }; 4766 static uint32_t BCMI_TSCE16_XGXS_TX_CTL1r_fields[] = 4767 { 4768 /* ENABLE_OS_4:0:0 */ 4769 PHYMOD_SYMBOL_FIELD_ENCODE(599, 0, 0), 4770 /* EN_HIGH_CURRENT:1:1 */ 4771 PHYMOD_SYMBOL_FIELD_ENCODE(624, 1, 1), 4772 /* RXDTCT_TH_SEL:2:3 */ 4773 PHYMOD_SYMBOL_FIELD_ENCODE(1200, 3, 2), 4774 /* CNTRL_RXDETECT_EN:4:4 */ 4775 PHYMOD_SYMBOL_FIELD_ENCODE(417, 4, 4), 4776 /* TESTSEL:5:6 */ 4777 PHYMOD_SYMBOL_FIELD_ENCODE(1382, 6, 5), 4778 /* TESTCLK_ENA:7:7 */ 4779 PHYMOD_SYMBOL_FIELD_ENCODE(1381, 7, 7), 4780 /* EN_WCLK16:8:8 */ 4781 PHYMOD_SYMBOL_FIELD_ENCODE(641, 8, 8), 4782 /* EN_WCLK20:9:9 */ 4783 PHYMOD_SYMBOL_FIELD_ENCODE(642, 9, 9), 4784 /* EN_WCLK33:10:10 */ 4785 PHYMOD_SYMBOL_FIELD_ENCODE(643, 10, 10), 4786 /* EN_SLOW:11:14 */ 4787 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(638, 14, 11) 4788 }; 4789 static uint32_t BCMI_TSCE16_XGXS_TX_CTL2r_fields[] = 4790 { 4791 /* EN_HPF:0:3 */ 4792 PHYMOD_SYMBOL_FIELD_ENCODE(625, 3, 0), 4793 /* DCC_EN:4:4 */ 4794 PHYMOD_SYMBOL_FIELD_ENCODE(469, 4, 4), 4795 /* IBIAS_OPAMP_CNTL:5:7 */ 4796 PHYMOD_SYMBOL_FIELD_ENCODE(707, 7, 5), 4797 /* IBIAS_PI_CNTL:8:10 */ 4798 PHYMOD_SYMBOL_FIELD_ENCODE(709, 10, 8), 4799 /* IBIAS_PIBUF_CNTL:11:13 */ 4800 PHYMOD_SYMBOL_FIELD_ENCODE(708, 13, 11), 4801 /* FIFO_PHSDETECT_MODE:14:14 */ 4802 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(666, 14, 14) 4803 }; 4804 static uint32_t BCMI_TSCE16_XGXS_TX_CTL3r_fields[] = 4805 { 4806 /* AMS_SPARE_3_0:0:1 */ 4807 PHYMOD_SYMBOL_FIELD_ENCODE(33, 1, 0), 4808 /* REFCALSHUNT:2:5 */ 4809 PHYMOD_SYMBOL_FIELD_ENCODE(1132, 5, 2), 4810 /* REFCALP:6:9 */ 4811 PHYMOD_SYMBOL_FIELD_ENCODE(1130, 9, 6), 4812 /* REFCALM:10:13 */ 4813 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1128, 13, 10) 4814 }; 4815 static uint32_t BCMI_TSCE16_XGXS_TX_CTL4r_fields[] = 4816 { 4817 /* SHNTPRE_POST1PRE:0:5 */ 4818 PHYMOD_SYMBOL_FIELD_ENCODE(1308, 5, 0), 4819 /* SHNTPOST1_POST1PRE:6:11 */ 4820 PHYMOD_SYMBOL_FIELD_ENCODE(1306, 11, 6), 4821 /* SHNTPOST2_POST2:12:15 */ 4822 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1307, 15, 12) 4823 }; 4824 static uint32_t BCMI_TSCE16_XGXS_TX_CTL5r_fields[] = 4825 { 4826 /* SHNTMAIN_POST1PRE:0:5 */ 4827 PHYMOD_SYMBOL_FIELD_ENCODE(1303, 5, 0), 4828 /* SHNTMAIN_POST2:6:9 */ 4829 PHYMOD_SYMBOL_FIELD_ENCODE(1304, 9, 6), 4830 /* EN_POST2:10:10 */ 4831 PHYMOD_SYMBOL_FIELD_ENCODE(629, 10, 10), 4832 /* EN_POST1:11:11 */ 4833 PHYMOD_SYMBOL_FIELD_ENCODE(628, 11, 11), 4834 /* EN_PRE:12:12 */ 4835 PHYMOD_SYMBOL_FIELD_ENCODE(630, 12, 12), 4836 /* POST2TO1:13:13 */ 4837 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1089, 13, 13) 4838 }; 4839 static uint32_t BCMI_TSCE16_XGXS_TX_CTL6r_fields[] = 4840 { 4841 /* EN_SHUNTMODE:0:0 */ 4842 PHYMOD_SYMBOL_FIELD_ENCODE(636, 0, 0), 4843 /* PD_PHASEDET:1:1 */ 4844 PHYMOD_SYMBOL_FIELD_ENCODE(1016, 1, 1), 4845 /* AMS_SPARE_6_0:2:5 */ 4846 PHYMOD_SYMBOL_FIELD_ENCODE(35, 5, 2), 4847 /* DIS_CAL:6:10 */ 4848 PHYMOD_SYMBOL_FIELD_ENCODE(572, 10, 6), 4849 /* SHNTPOST1_POST1:11:15 */ 4850 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1305, 15, 11) 4851 }; 4852 static uint32_t BCMI_TSCE16_XGXS_TX_CTL7r_fields[] = 4853 { 4854 /* SHNTMAIN_POST1:0:4 */ 4855 PHYMOD_SYMBOL_FIELD_ENCODE(1302, 4, 0), 4856 /* REFCALMCS:5:8 */ 4857 PHYMOD_SYMBOL_FIELD_ENCODE(1129, 8, 5), 4858 /* REFCALPCS:9:12 */ 4859 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1131, 12, 9) 4860 }; 4861 static uint32_t BCMI_TSCE16_XGXS_TX_CTL8r_fields[] = 4862 { 4863 /* SHNTEN_MAIN:0:0 */ 4864 PHYMOD_SYMBOL_FIELD_ENCODE(1301, 0, 0), 4865 /* AMS_SPARE_8_0:1:8 */ 4866 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(37, 8, 1) 4867 }; 4868 static uint32_t BCMI_TSCE16_XGXS_TX_INTr_fields[] = 4869 { 4870 /* TXPON_SEL:1:1 */ 4871 PHYMOD_SYMBOL_FIELD_ENCODE(1479, 1, 1), 4872 /* AUTO_LL_SELPATH_TX_DIS:2:2 */ 4873 PHYMOD_SYMBOL_FIELD_ENCODE(144, 2, 2), 4874 /* SEL_TXMASTER:3:3 */ 4875 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1289, 3, 3) 4876 }; 4877 static uint32_t BCMI_TSCE16_XGXS_TX_LN_AFE_RST_PWRDWN_CTL_CTLr_fields[] = 4878 { 4879 /* AFE_TX_PWRDN_FRC:0:0 */ 4880 PHYMOD_SYMBOL_FIELD_ENCODE(22, 0, 0), 4881 /* AFE_TX_PWRDN_FRC_VAL:1:1 */ 4882 PHYMOD_SYMBOL_FIELD_ENCODE(23, 1, 1), 4883 /* AFE_TX_RESET_FRC:2:2 */ 4884 PHYMOD_SYMBOL_FIELD_ENCODE(26, 2, 2), 4885 /* AFE_TX_RESET_FRC_VAL:3:3 */ 4886 PHYMOD_SYMBOL_FIELD_ENCODE(27, 3, 3), 4887 /* AFE_TXCLK_RESET_FRC:4:4 */ 4888 PHYMOD_SYMBOL_FIELD_ENCODE(17, 4, 4), 4889 /* AFE_TXCLK_RESET_FRC_VAL:5:5 */ 4890 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(18, 5, 5) 4891 }; 4892 static uint32_t BCMI_TSCE16_XGXS_TX_LN_CLK_RST_N_PWRDWN_CTLr_fields[] = 4893 { 4894 /* LN_TX_S_PWRDN:0:0 */ 4895 PHYMOD_SYMBOL_FIELD_ENCODE(792, 0, 0), 4896 /* AFE_TX_RESET_DEASSERT:15:15 */ 4897 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(25, 15, 15) 4898 }; 4899 static uint32_t BCMI_TSCE16_XGXS_TX_LN_DBG_RST_CTLr_fields[] = 4900 { 4901 /* LN_TX_S_RSTB:0:0 */ 4902 PHYMOD_SYMBOL_FIELD_ENCODE(793, 0, 0), 4903 /* LN_TX_DP_S_RSTB:1:1 */ 4904 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(786, 1, 1) 4905 }; 4906 static uint32_t BCMI_TSCE16_XGXS_TX_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields[] = 4907 { 4908 /* PMD_LN_TX_H_PWRDN_PKILL:0:0 */ 4909 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1072, 0, 0) 4910 }; 4911 static uint32_t BCMI_TSCE16_XGXS_TX_PI_CTL0r_fields[] = 4912 { 4913 /* TX_PI_EN:0:0 */ 4914 PHYMOD_SYMBOL_FIELD_ENCODE(1526, 0, 0), 4915 /* TX_PI_JITTER_FILTER_EN:1:1 */ 4916 PHYMOD_SYMBOL_FIELD_ENCODE(1541, 1, 1), 4917 /* TX_PI_EXT_CTRL_EN:2:2 */ 4918 PHYMOD_SYMBOL_FIELD_ENCODE(1527, 2, 2), 4919 /* TX_PI_FREQ_OVERRIDE_EN:3:3 */ 4920 PHYMOD_SYMBOL_FIELD_ENCODE(1532, 3, 3), 4921 /* TX_PI_SJ_GEN_EN:4:4 */ 4922 PHYMOD_SYMBOL_FIELD_ENCODE(1559, 4, 4), 4923 /* TX_PI_SSC_GEN_EN:5:5 */ 4924 PHYMOD_SYMBOL_FIELD_ENCODE(1560, 5, 5), 4925 /* TX_PI_JIT_SSC_FREQ_MODE:6:6 */ 4926 PHYMOD_SYMBOL_FIELD_ENCODE(1544, 6, 6), 4927 /* TX_PI_RESET_CODE_DBG:7:7 */ 4928 PHYMOD_SYMBOL_FIELD_ENCODE(1556, 7, 7), 4929 /* TX_PI_SECOND_ORDER_LOOP_EN:8:8 */ 4930 PHYMOD_SYMBOL_FIELD_ENCODE(1558, 8, 8), 4931 /* TX_PI_FIRST_ORDER_BWSEL_INTEG:10:11 */ 4932 PHYMOD_SYMBOL_FIELD_ENCODE(1530, 11, 10), 4933 /* TX_PI_SECOND_ORDER_BWSEL_INTEG:12:13 */ 4934 PHYMOD_SYMBOL_FIELD_ENCODE(1557, 13, 12), 4935 /* TX_PI_FRC_PHASE_STEP_MUX_SEL:15:15 */ 4936 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1531, 15, 15) 4937 }; 4938 static uint32_t BCMI_TSCE16_XGXS_TX_PI_CTL1r_fields[] = 4939 { 4940 /* TX_PI_FREQ_OVERRIDE_VAL:0:14 */ 4941 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1533, 14, 0) 4942 }; 4943 static uint32_t BCMI_TSCE16_XGXS_TX_PI_CTL2r_fields[] = 4944 { 4945 /* TX_PI_JIT_FREQ_IDX:0:5 */ 4946 PHYMOD_SYMBOL_FIELD_ENCODE(1543, 5, 0), 4947 /* TX_PI_JIT_AMP:8:13 */ 4948 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1542, 13, 8) 4949 }; 4950 static uint32_t BCMI_TSCE16_XGXS_TX_PI_CTL3r_fields[] = 4951 { 4952 /* TX_PI_PHASE_OVERRIDE:0:0 */ 4953 PHYMOD_SYMBOL_FIELD_ENCODE(1551, 0, 0), 4954 /* TX_PI_PHASE_STROBE:1:1 */ 4955 PHYMOD_SYMBOL_FIELD_ENCODE(1554, 1, 1), 4956 /* TX_PI_PHASE_STEP_DIR:2:2 */ 4957 PHYMOD_SYMBOL_FIELD_ENCODE(1552, 2, 2), 4958 /* TX_PI_PHASE_INVERT:4:4 */ 4959 PHYMOD_SYMBOL_FIELD_ENCODE(1550, 4, 4), 4960 /* TX_PI_PHASE_STEP_NUM:8:11 */ 4961 PHYMOD_SYMBOL_FIELD_ENCODE(1553, 11, 8), 4962 /* TX_PI_EXT_PHASE_BWSEL_INTEG:12:14 */ 4963 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1529, 14, 12) 4964 }; 4965 static uint32_t BCMI_TSCE16_XGXS_TX_PI_CTL4r_fields[] = 4966 { 4967 /* TX_PI_FRZ_FRC:0:0 */ 4968 PHYMOD_SYMBOL_FIELD_ENCODE(1534, 0, 0), 4969 /* TX_PI_FRZ_FRC_VAL:1:1 */ 4970 PHYMOD_SYMBOL_FIELD_ENCODE(1535, 1, 1), 4971 /* TX_PI_FRZ_MODE:2:2 */ 4972 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1536, 2, 2) 4973 }; 4974 static uint32_t BCMI_TSCE16_XGXS_TX_PI_CTL5r_fields[] = 4975 { 4976 /* TX_PI_HS_FIFO_PHSERR_INVERT:1:1 */ 4977 PHYMOD_SYMBOL_FIELD_ENCODE(1538, 1, 1), 4978 /* TX_PI_REPEATER_MODE_EN:2:2 */ 4979 PHYMOD_SYMBOL_FIELD_ENCODE(1555, 2, 2), 4980 /* TX_PI_EXT_PD_SEL:3:3 */ 4981 PHYMOD_SYMBOL_FIELD_ENCODE(1528, 3, 3), 4982 /* AFE_TX_FIFO_RESETB:8:8 */ 4983 PHYMOD_SYMBOL_FIELD_ENCODE(19, 8, 8), 4984 /* AFE_TX_FIFO_RESETB_FRC_ON:9:9 */ 4985 PHYMOD_SYMBOL_FIELD_ENCODE(20, 9, 9), 4986 /* TX_PI_PD_BYPASS_FLT:10:10 */ 4987 PHYMOD_SYMBOL_FIELD_ENCODE(1546, 10, 10), 4988 /* TX_PI_PD_BYPASS_VCO:11:11 */ 4989 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1547, 11, 11) 4990 }; 4991 static uint32_t BCMI_TSCE16_XGXS_TX_PI_STS0r_fields[] = 4992 { 4993 /* TX_PI_PHASE_CNTR:0:6 */ 4994 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1548, 6, 0) 4995 }; 4996 static uint32_t BCMI_TSCE16_XGXS_TX_PI_STS1r_fields[] = 4997 { 4998 /* TX_PI_INTEG1_REG:0:13 */ 4999 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1539, 13, 0) 5000 }; 5001 static uint32_t BCMI_TSCE16_XGXS_TX_PI_STS2r_fields[] = 5002 { 5003 /* TX_PI_INTEG2_REG:0:14 */ 5004 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1540, 14, 0) 5005 }; 5006 static uint32_t BCMI_TSCE16_XGXS_TX_PI_STS3r_fields[] = 5007 { 5008 /* TX_PI_PHASE_ERR:0:5 */ 5009 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1549, 5, 0) 5010 }; 5011 static uint32_t BCMI_TSCE16_XGXS_TX_PI_STS4r_fields[] = 5012 { 5013 /* TX_PI_HS_FIFO_PHSERR:0:0 */ 5014 PHYMOD_SYMBOL_FIELD_ENCODE(1537, 0, 0), 5015 /* ST_AFE_TX_FIFO_RESETB:1:1 */ 5016 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1343, 1, 1) 5017 }; 5018 static uint32_t BCMI_TSCE16_XGXS_TX_PI_TX_FIFO_OVFB_STSr_fields[] = 5019 { 5020 /* TX_FIFO_OVFB:0:0 */ 5021 PHYMOD_SYMBOL_FIELD_ENCODE(1495, 0, 0), 5022 /* TX_FIFO_OVFB_FALL_EDGE_LH:1:1 */ 5023 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1496, 1, 1) 5024 }; 5025 static uint32_t BCMI_TSCE16_XGXS_TX_RATE_MISMATCHr_fields[] = 5026 { 5027 /* TX_LANE_RATE_MISMATCH:0:3 */ 5028 PHYMOD_SYMBOL_FIELD_ENCODE(1504, 3, 0), 5029 /* TX_LANE_RATE_MISMATCH_VL1:4:7 */ 5030 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1505, 7, 4) 5031 }; 5032 static uint32_t BCMI_TSCE16_XGXS_TX_STSr_fields[] = 5033 { 5034 /* TXPON_MUX:0:3 */ 5035 PHYMOD_SYMBOL_FIELD_ENCODE(1478, 3, 0), 5036 /* RESCAL:4:7 */ 5037 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1155, 7, 4) 5038 }; 5039 static uint32_t BCMI_TSCE16_XGXS_TX_X2_BRCM_MODEr_fields[] = 5040 { 5041 /* ACOL_SWAP_COUNT64B66B:0:7 */ 5042 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1, 7, 0) 5043 }; 5044 static uint32_t BCMI_TSCE16_XGXS_TX_X2_CL48_0r_fields[] = 5045 { 5046 /* CL48_TX_QRSVDCTRL:0:3 */ 5047 PHYMOD_SYMBOL_FIELD_ENCODE(296, 3, 0), 5048 /* CL48_TX_RF_ENABLE:4:4 */ 5049 PHYMOD_SYMBOL_FIELD_ENCODE(297, 4, 4), 5050 /* CL48_TX_LF_ENABLE:5:5 */ 5051 PHYMOD_SYMBOL_FIELD_ENCODE(294, 5, 5), 5052 /* CL48_TX_LI_ENABLE:6:6 */ 5053 PHYMOD_SYMBOL_FIELD_ENCODE(295, 6, 6), 5054 /* BRCM_MODE_USE_K20PT5:15:15 */ 5055 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(203, 15, 15) 5056 }; 5057 static uint32_t BCMI_TSCE16_XGXS_TX_X2_CL82_0r_fields[] = 5058 { 5059 /* CL82_TX_RF_ENABLE:4:4 */ 5060 PHYMOD_SYMBOL_FIELD_ENCODE(406, 4, 4), 5061 /* CL82_TX_LF_ENABLE:5:5 */ 5062 PHYMOD_SYMBOL_FIELD_ENCODE(404, 5, 5), 5063 /* CL82_TX_LI_ENABLE:6:6 */ 5064 PHYMOD_SYMBOL_FIELD_ENCODE(405, 6, 6), 5065 /* CL82_BYPASS_TXSM:10:10 */ 5066 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(393, 10, 10) 5067 }; 5068 static uint32_t BCMI_TSCE16_XGXS_TX_X2_CL82_TX_STS0r_fields[] = 5069 { 5070 /* TXSM_STATE:0:2 */ 5071 PHYMOD_SYMBOL_FIELD_ENCODE(1480, 2, 0), 5072 /* LTXSM_STATE:3:9 */ 5073 PHYMOD_SYMBOL_FIELD_ENCODE(833, 9, 3), 5074 /* T_TYPE_CODED:10:12 */ 5075 PHYMOD_SYMBOL_FIELD_ENCODE(1571, 12, 10), 5076 /* CL82_IDLE_DELETION_UNDERFLOW:13:13 */ 5077 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(396, 13, 13) 5078 }; 5079 static uint32_t BCMI_TSCE16_XGXS_TX_X2_MLD_SWP_CNTr_fields[] = 5080 { 5081 /* MLD_SWAP_COUNT:0:15 */ 5082 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(940, 15, 0) 5083 }; 5084 static uint32_t BCMI_TSCE16_XGXS_TX_X4_CRED0r_fields[] = 5085 { 5086 /* CLOCKCNT0:0:13 */ 5087 PHYMOD_SYMBOL_FIELD_ENCODE(409, 13, 0), 5088 /* CREDITENABLE:14:14 */ 5089 PHYMOD_SYMBOL_FIELD_ENCODE(443, 14, 14), 5090 /* SGMII_SPD_SWITCH:15:15 */ 5091 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1295, 15, 15) 5092 }; 5093 static uint32_t BCMI_TSCE16_XGXS_TX_X4_CRED1r_fields[] = 5094 { 5095 /* CLOCKCNT1:0:7 */ 5096 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(411, 7, 0) 5097 }; 5098 static uint32_t BCMI_TSCE16_XGXS_TX_X4_ENC0r_fields[] = 5099 { 5100 /* ENCODEMODE:2:4 */ 5101 PHYMOD_SYMBOL_FIELD_ENCODE(604, 4, 2), 5102 /* CL49_TX_TL_MODE:5:6 */ 5103 PHYMOD_SYMBOL_FIELD_ENCODE(318, 6, 5), 5104 /* T_TEST_MODE_CFG:7:7 */ 5105 PHYMOD_SYMBOL_FIELD_ENCODE(1570, 7, 7), 5106 /* CL49_BYPASS_TXSM:9:9 */ 5107 PHYMOD_SYMBOL_FIELD_ENCODE(302, 9, 9), 5108 /* HG2_ENABLE:10:10 */ 5109 PHYMOD_SYMBOL_FIELD_ENCODE(680, 10, 10), 5110 /* HG2_MESSAGE_INVALID_CODE_ENABLE:11:11 */ 5111 PHYMOD_SYMBOL_FIELD_ENCODE(681, 11, 11), 5112 /* HG2_CODEC:12:12 */ 5113 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(679, 12, 12) 5114 }; 5115 static uint32_t BCMI_TSCE16_XGXS_TX_X4_ENC1r_fields[] = 5116 { 5117 /* PROG_TL_CHAR:0:7 */ 5118 PHYMOD_SYMBOL_FIELD_ENCODE(1113, 7, 0), 5119 /* PROG_TL_EN:8:8 */ 5120 PHYMOD_SYMBOL_FIELD_ENCODE(1114, 8, 8), 5121 /* CATCH_ALL_8B10B_DIS:9:9 */ 5122 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(225, 9, 9) 5123 }; 5124 static uint32_t BCMI_TSCE16_XGXS_TX_X4_ENC_STS0r_fields[] = 5125 { 5126 /* CL49_TXSM_STATE:0:2 */ 5127 PHYMOD_SYMBOL_FIELD_ENCODE(313, 2, 0), 5128 /* CL49_LTXSM_STATE:3:10 */ 5129 PHYMOD_SYMBOL_FIELD_ENCODE(305, 10, 3), 5130 /* CL49_TX_FAULT_DET:11:11 */ 5131 PHYMOD_SYMBOL_FIELD_ENCODE(314, 11, 11), 5132 /* CL49_T_TYPE_CODED:12:15 */ 5133 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(319, 15, 12) 5134 }; 5135 static uint32_t BCMI_TSCE16_XGXS_TX_X4_LOOPCNTr_fields[] = 5136 { 5137 /* LOOPCNT1:0:5 */ 5138 PHYMOD_SYMBOL_FIELD_ENCODE(807, 5, 0), 5139 /* LOOPCNT0:6:13 */ 5140 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(805, 13, 6) 5141 }; 5142 static uint32_t BCMI_TSCE16_XGXS_TX_X4_MAC_CREDGENCNTr_fields[] = 5143 { 5144 /* MAC_CREDITGENCNT:0:12 */ 5145 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(839, 12, 0) 5146 }; 5147 static uint32_t BCMI_TSCE16_XGXS_TX_X4_MISCr_fields[] = 5148 { 5149 /* ENABLE_TX_LANE:0:0 */ 5150 PHYMOD_SYMBOL_FIELD_ENCODE(600, 0, 0), 5151 /* RSTB_TX_LANE:1:1 */ 5152 PHYMOD_SYMBOL_FIELD_ENCODE(1197, 1, 1), 5153 /* TX_FIFO_WATERMARK:2:3 */ 5154 PHYMOD_SYMBOL_FIELD_ENCODE(1498, 3, 2), 5155 /* CL49_TX_RF_ENABLE:6:6 */ 5156 PHYMOD_SYMBOL_FIELD_ENCODE(317, 6, 6), 5157 /* CL49_TX_LF_ENABLE:7:7 */ 5158 PHYMOD_SYMBOL_FIELD_ENCODE(315, 7, 7), 5159 /* CL49_TX_LI_ENABLE:8:8 */ 5160 PHYMOD_SYMBOL_FIELD_ENCODE(316, 8, 8), 5161 /* FEC_ENABLE:10:10 */ 5162 PHYMOD_SYMBOL_FIELD_ENCODE(662, 10, 10), 5163 /* SCR_MODE:14:15 */ 5164 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1262, 15, 14) 5165 }; 5166 static uint32_t BCMI_TSCE16_XGXS_TX_X4_PCS_CLKCNT0r_fields[] = 5167 { 5168 /* PCS_CLOCKCNT0:0:13 */ 5169 PHYMOD_SYMBOL_FIELD_ENCODE(1001, 13, 0), 5170 /* PCS_CREDITENABLE:14:14 */ 5171 PHYMOD_SYMBOL_FIELD_ENCODE(1003, 14, 14), 5172 /* REPLICATION_CNT:15:15 */ 5173 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1153, 15, 15) 5174 }; 5175 static uint32_t BCMI_TSCE16_XGXS_TX_X4_PCS_CREDGENCNTr_fields[] = 5176 { 5177 /* PCS_CREDITGENCNT:0:12 */ 5178 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1005, 12, 0) 5179 }; 5180 static uint32_t BCMI_TSCE16_XGXS_TX_X4_PCS_STSr_fields[] = 5181 { 5182 /* LPI_RECEIVED_LH:0:0 */ 5183 PHYMOD_SYMBOL_FIELD_ENCODE(815, 0, 0), 5184 /* RESERVED_ORDERED_SET_LH:1:1 */ 5185 PHYMOD_SYMBOL_FIELD_ENCODE(1157, 1, 1), 5186 /* REMOTE_FAULT_LH:2:2 */ 5187 PHYMOD_SYMBOL_FIELD_ENCODE(1148, 2, 2), 5188 /* LOCAL_FAULT_LH:3:3 */ 5189 PHYMOD_SYMBOL_FIELD_ENCODE(795, 3, 3), 5190 /* LINK_INTERRUPT_LH:4:4 */ 5191 PHYMOD_SYMBOL_FIELD_ENCODE(756, 4, 4), 5192 /* TX_LPI_RECEIVED:5:5 */ 5193 PHYMOD_SYMBOL_FIELD_ENCODE(1513, 5, 5), 5194 /* TX_LINK_INTERRUPT:6:6 */ 5195 PHYMOD_SYMBOL_FIELD_ENCODE(1509, 6, 6), 5196 /* TX_REMOTE_FAULT:7:7 */ 5197 PHYMOD_SYMBOL_FIELD_ENCODE(1565, 7, 7), 5198 /* TX_LOCAL_FAULT:8:8 */ 5199 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1512, 8, 8) 5200 }; 5201 static uint32_t BCMI_TSCE16_XGXS_TX_X4_PER_PHY_LN_CRED_CTLr_fields[] = 5202 { 5203 /* CREDIT_FROM_PER_PHY_LN_EN:0:0 */ 5204 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(446, 0, 0) 5205 }; 5206 static uint32_t BCMI_TSCE16_XGXS_UC_ACK_CORE_CTLr_fields[] = 5207 { 5208 /* UC_ACK_CORE_CFG_DONE:0:0 */ 5209 PHYMOD_SYMBOL_FIELD_ENCODE(1572, 0, 0), 5210 /* UC_ACK_CORE_DP_RESET:1:1 */ 5211 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1573, 1, 1) 5212 }; 5213 static uint32_t BCMI_TSCE16_XGXS_UC_AHB_CTL0r_fields[] = 5214 { 5215 /* MICRO_RA_WRDATASIZE:0:1 */ 5216 PHYMOD_SYMBOL_FIELD_ENCODE(914, 1, 0), 5217 /* MICRO_RA_RDDATASIZE:4:5 */ 5218 PHYMOD_SYMBOL_FIELD_ENCODE(909, 5, 4), 5219 /* MICRO_RA_INIT:8:9 */ 5220 PHYMOD_SYMBOL_FIELD_ENCODE(905, 9, 8), 5221 /* MICRO_AUTOINC_WRADDR_EN:12:12 */ 5222 PHYMOD_SYMBOL_FIELD_ENCODE(863, 12, 12), 5223 /* MICRO_AUTOINC_RDADDR_EN:13:13 */ 5224 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(862, 13, 13) 5225 }; 5226 static uint32_t BCMI_TSCE16_XGXS_UC_AHB_RDADDR_LSWr_fields[] = 5227 { 5228 /* MICRO_RA_RDADDR_LSW:0:15 */ 5229 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(907, 15, 0) 5230 }; 5231 static uint32_t BCMI_TSCE16_XGXS_UC_AHB_RDADDR_MSWr_fields[] = 5232 { 5233 /* MICRO_RA_RDADDR_MSW:0:15 */ 5234 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(908, 15, 0) 5235 }; 5236 static uint32_t BCMI_TSCE16_XGXS_UC_AHB_RDDATA_LSWr_fields[] = 5237 { 5238 /* MICRO_RA_RDDATA_LSW:0:15 */ 5239 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(910, 15, 0) 5240 }; 5241 static uint32_t BCMI_TSCE16_XGXS_UC_AHB_RDDATA_MSWr_fields[] = 5242 { 5243 /* MICRO_RA_RDDATA_MSW:0:15 */ 5244 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(911, 15, 0) 5245 }; 5246 static uint32_t BCMI_TSCE16_XGXS_UC_AHB_STS0r_fields[] = 5247 { 5248 /* MICRO_RA_INITDONE:0:0 */ 5249 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(906, 0, 0) 5250 }; 5251 static uint32_t BCMI_TSCE16_XGXS_UC_AHB_WRADDR_LSWr_fields[] = 5252 { 5253 /* MICRO_RA_WRADDR_LSW:0:15 */ 5254 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(912, 15, 0) 5255 }; 5256 static uint32_t BCMI_TSCE16_XGXS_UC_AHB_WRADDR_MSWr_fields[] = 5257 { 5258 /* MICRO_RA_WRADDR_MSW:0:15 */ 5259 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(913, 15, 0) 5260 }; 5261 static uint32_t BCMI_TSCE16_XGXS_UC_AHB_WRDATA_LSWr_fields[] = 5262 { 5263 /* MICRO_RA_WRDATA_LSW:0:15 */ 5264 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(915, 15, 0) 5265 }; 5266 static uint32_t BCMI_TSCE16_XGXS_UC_AHB_WRDATA_MSWr_fields[] = 5267 { 5268 /* MICRO_RA_WRDATA_MSW:0:15 */ 5269 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(916, 15, 0) 5270 }; 5271 static uint32_t BCMI_TSCE16_XGXS_UC_CLK_CTL0r_fields[] = 5272 { 5273 /* MICRO_MASTER_CLK_EN:0:0 */ 5274 PHYMOD_SYMBOL_FIELD_ENCODE(880, 0, 0), 5275 /* MICRO_CORE_CLK_EN:1:1 */ 5276 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(866, 1, 1) 5277 }; 5278 static uint32_t BCMI_TSCE16_XGXS_UC_CODE_RAM_ECCCONTRO1r_fields[] = 5279 { 5280 /* MICRO_RA_ECC_WRDATA:0:6 */ 5281 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(904, 6, 0) 5282 }; 5283 static uint32_t BCMI_TSCE16_XGXS_UC_CODE_RAM_ECCCTL0r_fields[] = 5284 { 5285 /* MICRO_ECCG_MODE:0:0 */ 5286 PHYMOD_SYMBOL_FIELD_ENCODE(870, 0, 0), 5287 /* MICRO_ECC_FRC_DISABLE:1:1 */ 5288 PHYMOD_SYMBOL_FIELD_ENCODE(872, 1, 1), 5289 /* MICRO_ECC_CORRUPT:4:5 */ 5290 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(871, 5, 4) 5291 }; 5292 static uint32_t BCMI_TSCE16_XGXS_UC_CODE_RAM_ECCSTS0r_fields[] = 5293 { 5294 /* MICRO_CODE_RAM_ECC_ADDRESS:0:14 */ 5295 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(864, 14, 0) 5296 }; 5297 static uint32_t BCMI_TSCE16_XGXS_UC_CODE_RAM_ECCSTS1r_fields[] = 5298 { 5299 /* MICRO_RA_ECC_RDDATA:0:6 */ 5300 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(903, 6, 0) 5301 }; 5302 static uint32_t BCMI_TSCE16_XGXS_UC_CODE_RAM_TESTIFCTL0r_fields[] = 5303 { 5304 /* MICRO_CODE_RAM_TM:0:6 */ 5305 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(865, 6, 0) 5306 }; 5307 static uint32_t BCMI_TSCE16_XGXS_UC_CTL0r_fields[] = 5308 { 5309 /* MICRO_TX_DISABLE:0:0 */ 5310 PHYMOD_SYMBOL_FIELD_ENCODE(939, 0, 0), 5311 /* TX_DISABLE_TRIGGER:1:1 */ 5312 PHYMOD_SYMBOL_FIELD_ENCODE(1491, 1, 1), 5313 /* DP_RESET_TX_DISABLE_DIS:2:2 */ 5314 PHYMOD_SYMBOL_FIELD_ENCODE(575, 2, 2), 5315 /* PMD_TX_DISABLE_PKILL:3:3 */ 5316 PHYMOD_SYMBOL_FIELD_ENCODE(1084, 3, 3), 5317 /* TX_DISABLE_TIMER_CTRL:4:9 */ 5318 PHYMOD_SYMBOL_FIELD_ENCODE(1489, 9, 4), 5319 /* TX_EEE_QUIET_EN:14:14 */ 5320 PHYMOD_SYMBOL_FIELD_ENCODE(1493, 14, 14), 5321 /* TX_EEE_ALERT_EN:15:15 */ 5322 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1492, 15, 15) 5323 }; 5324 static uint32_t BCMI_TSCE16_XGXS_UC_PRAMIF_AHB_WRADDR_LSWr_fields[] = 5325 { 5326 /* MICRO_PRAMIF_AHB_WRADDR_LSW:2:15 */ 5327 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(890, 15, 2) 5328 }; 5329 static uint32_t BCMI_TSCE16_XGXS_UC_PRAMIF_AHB_WRADDR_MSWr_fields[] = 5330 { 5331 /* MICRO_PRAMIF_AHB_WRADDR_MSW:0:15 */ 5332 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(891, 15, 0) 5333 }; 5334 static uint32_t BCMI_TSCE16_XGXS_UC_PRAMIF_CTL0r_fields[] = 5335 { 5336 /* MICRO_PRAMIF_EN:0:0 */ 5337 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(892, 0, 0) 5338 }; 5339 static uint32_t BCMI_TSCE16_XGXS_UC_PVT_STS0r_fields[] = 5340 { 5341 /* MICRO_PVT_TEMPDATA_RMI:0:9 */ 5342 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(899, 9, 0) 5343 }; 5344 static uint32_t BCMI_TSCE16_XGXS_UC_RAM_CTL0r_fields[] = 5345 { 5346 /* MICRO_DR_LOOKTAB_EN:0:0 */ 5347 PHYMOD_SYMBOL_FIELD_ENCODE(868, 0, 0), 5348 /* MICRO_PROTECT_FWCODE:1:1 */ 5349 PHYMOD_SYMBOL_FIELD_ENCODE(894, 1, 1), 5350 /* MICRO_DR_SIZE:8:13 */ 5351 PHYMOD_SYMBOL_FIELD_ENCODE(869, 13, 8), 5352 /* MICRO_RAMCLK_NONINV:14:14 */ 5353 PHYMOD_SYMBOL_FIELD_ENCODE(900, 14, 14), 5354 /* MICRO_IGNORE_M0_CODE_WRITES:15:15 */ 5355 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(877, 15, 15) 5356 }; 5357 static uint32_t BCMI_TSCE16_XGXS_UC_RMI_AHB_CTL1r_fields[] = 5358 { 5359 /* MICRO_M0_HRESP_EN:0:0 */ 5360 PHYMOD_SYMBOL_FIELD_ENCODE(879, 0, 0), 5361 /* MICRO_SW_PMI_HP_RSTB:1:1 */ 5362 PHYMOD_SYMBOL_FIELD_ENCODE(936, 1, 1), 5363 /* MICRO_SW_PMI_HP_EXT_RSTB:2:2 */ 5364 PHYMOD_SYMBOL_FIELD_ENCODE(935, 2, 2), 5365 /* MICRO_PMI_HP_ACK_TIMEOUT_DIS:3:3 */ 5366 PHYMOD_SYMBOL_FIELD_ENCODE(882, 3, 3), 5367 /* MICRO_PMI_HP_EXT_ACK_TIMEOUT_DIS:4:4 */ 5368 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(883, 4, 4) 5369 }; 5370 static uint32_t BCMI_TSCE16_XGXS_UC_RMI_AHB_STS1r_fields[] = 5371 { 5372 /* MICRO_M0_DEFAULT_SLAVE_ERROR:0:0 */ 5373 PHYMOD_SYMBOL_FIELD_ENCODE(878, 0, 0), 5374 /* MICRO_RMI_DEFAULT_SLAVE_ERROR:1:1 */ 5375 PHYMOD_SYMBOL_FIELD_ENCODE(917, 1, 1), 5376 /* MICRO_PR_DEFAULT_SLAVE_ERROR:2:2 */ 5377 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(896, 2, 2) 5378 }; 5379 static uint32_t BCMI_TSCE16_XGXS_UC_RMI_EXT_INTR_CTL0r_fields[] = 5380 { 5381 /* MICRO_RMI_MBOX_MSGOUT_INTR_EN:0:0 */ 5382 PHYMOD_SYMBOL_FIELD_ENCODE(928, 0, 0), 5383 /* MICRO_RMI_ECC_CORR_ERR_INTR_EN:4:4 */ 5384 PHYMOD_SYMBOL_FIELD_ENCODE(918, 4, 4), 5385 /* MICRO_RMI_ECC_UNCORR_ERR_INTR_EN:5:5 */ 5386 PHYMOD_SYMBOL_FIELD_ENCODE(922, 5, 5), 5387 /* MICRO_RMI_ECC_MULTIROW_ERR_INTR_EN:6:6 */ 5388 PHYMOD_SYMBOL_FIELD_ENCODE(920, 6, 6), 5389 /* MICRO_RMI_M0_LOCKUP_INTR_EN:8:8 */ 5390 PHYMOD_SYMBOL_FIELD_ENCODE(924, 8, 8), 5391 /* MICRO_RMI_M0_SYSTEMRESETREQ_INTR_EN:9:9 */ 5392 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(926, 9, 9) 5393 }; 5394 static uint32_t BCMI_TSCE16_XGXS_UC_RMI_EXT_INTR_STS0r_fields[] = 5395 { 5396 /* MICRO_RMI_MBOX_MSGOUT_STATUS:0:0 */ 5397 PHYMOD_SYMBOL_FIELD_ENCODE(929, 0, 0), 5398 /* MICRO_RMI_ECC_CORR_ERR_STATUS:4:4 */ 5399 PHYMOD_SYMBOL_FIELD_ENCODE(919, 4, 4), 5400 /* MICRO_RMI_ECC_UNCORR_ERR_STATUS:5:5 */ 5401 PHYMOD_SYMBOL_FIELD_ENCODE(923, 5, 5), 5402 /* MICRO_RMI_ECC_MULTIROW_ERR_STATUS:6:6 */ 5403 PHYMOD_SYMBOL_FIELD_ENCODE(921, 6, 6), 5404 /* MICRO_RMI_M0_LOCKUP_STATUS:8:8 */ 5405 PHYMOD_SYMBOL_FIELD_ENCODE(925, 8, 8), 5406 /* MICRO_RMI_M0_SYSTEMRESETREQ_STATUS:9:9 */ 5407 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(927, 9, 9) 5408 }; 5409 static uint32_t BCMI_TSCE16_XGXS_UC_RMI_MBOX_CTL0r_fields[] = 5410 { 5411 /* MICRO_RMI_MBOX_SEND_MSGIN:0:0 */ 5412 PHYMOD_SYMBOL_FIELD_ENCODE(930, 0, 0), 5413 /* MICRO_GEN_INTR_RMI_MBOX0WR:1:1 */ 5414 PHYMOD_SYMBOL_FIELD_ENCODE(875, 1, 1), 5415 /* MICRO_GEN_INTR_RMI_MBOX1WR:2:2 */ 5416 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(876, 2, 2) 5417 }; 5418 static uint32_t BCMI_TSCE16_XGXS_UC_RMI_PMI_IF_CTL0r_fields[] = 5419 { 5420 /* MICRO_PMI_HP_FAST_READ_EN:0:0 */ 5421 PHYMOD_SYMBOL_FIELD_ENCODE(889, 0, 0), 5422 /* MICRO_PMI_HP_FAST_DUAL_META_FF_EN:1:1 */ 5423 PHYMOD_SYMBOL_FIELD_ENCODE(888, 1, 1), 5424 /* MICRO_PMI_HP_FAST_BKTOBK_EN:2:2 */ 5425 PHYMOD_SYMBOL_FIELD_ENCODE(887, 2, 2), 5426 /* MICRO_PMI_HP_EXT_FAST_READ_EN:8:8 */ 5427 PHYMOD_SYMBOL_FIELD_ENCODE(886, 8, 8), 5428 /* MICRO_PMI_HP_EXT_FAST_DUAL_META_FF_EN:9:9 */ 5429 PHYMOD_SYMBOL_FIELD_ENCODE(885, 9, 9), 5430 /* MICRO_PMI_HP_EXT_FAST_BKTOBK_EN:10:10 */ 5431 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(884, 10, 10) 5432 }; 5433 static uint32_t BCMI_TSCE16_XGXS_UC_RMI_PR_AINC_NXT_WRADDR_LSWr_fields[] = 5434 { 5435 /* MICRO_PR_AUTOINC_NXT_WRADDR_LSW:0:15 */ 5436 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(895, 15, 0) 5437 }; 5438 static uint32_t BCMI_TSCE16_XGXS_UC_RMI_PVT_CTL0r_fields[] = 5439 { 5440 /* MICRO_PVT_TEMPDATA_FRCVAL:0:9 */ 5441 PHYMOD_SYMBOL_FIELD_ENCODE(898, 9, 0), 5442 /* MICRO_PVT_TEMPDATA_FRC:12:12 */ 5443 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(897, 12, 12) 5444 }; 5445 static uint32_t BCMI_TSCE16_XGXS_UC_RMI_RA_AINC_NXT_RDADDR_LSWr_fields[] = 5446 { 5447 /* MICRO_RA_AUTOINC_NXT_RDADDR_LSW:0:15 */ 5448 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(901, 15, 0) 5449 }; 5450 static uint32_t BCMI_TSCE16_XGXS_UC_RMI_RA_AINC_NXT_WRADDR_LSWr_fields[] = 5451 { 5452 /* MICRO_RA_AUTOINC_NXT_WRADDR_LSW:0:15 */ 5453 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(902, 15, 0) 5454 }; 5455 static uint32_t BCMI_TSCE16_XGXS_UC_RMI_SILICON_DBG_CTL0r_fields[] = 5456 { 5457 /* MICRO_SILICON_DEBUG_STATUS_MUX_SEL:0:1 */ 5458 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(934, 1, 0) 5459 }; 5460 static uint32_t BCMI_TSCE16_XGXS_UC_RMI_SILICON_DBG_STS0r_fields[] = 5461 { 5462 /* MICRO_SILICON_DEBUG_STATUS_MUXED_DATA:0:15 */ 5463 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(933, 15, 0) 5464 }; 5465 static uint32_t BCMI_TSCE16_XGXS_UC_RMI_TO_UC_MBOX0r_fields[] = 5466 { 5467 /* MICRO_RMI_TO_MICRO_MBOX0:0:15 */ 5468 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(931, 15, 0) 5469 }; 5470 static uint32_t BCMI_TSCE16_XGXS_UC_RMI_TO_UC_MBOX1r_fields[] = 5471 { 5472 /* MICRO_RMI_TO_MICRO_MBOX1:0:15 */ 5473 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(932, 15, 0) 5474 }; 5475 static uint32_t BCMI_TSCE16_XGXS_UC_RST_CTL0r_fields[] = 5476 { 5477 /* MICRO_MASTER_RSTB:0:0 */ 5478 PHYMOD_SYMBOL_FIELD_ENCODE(881, 0, 0), 5479 /* MICRO_CORE_RSTB:1:1 */ 5480 PHYMOD_SYMBOL_FIELD_ENCODE(867, 1, 1), 5481 /* MICRO_PRAM_IF_RSTB:3:3 */ 5482 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(893, 3, 3) 5483 }; 5484 static uint32_t BCMI_TSCE16_XGXS_UC_UC_TO_RMI_MBOX0r_fields[] = 5485 { 5486 /* MICRO_TO_RMI_MBOX0:0:15 */ 5487 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(937, 15, 0) 5488 }; 5489 static uint32_t BCMI_TSCE16_XGXS_UC_UC_TO_RMI_MBOX1r_fields[] = 5490 { 5491 /* MICRO_TO_RMI_MBOX1:0:15 */ 5492 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(938, 15, 0) 5493 }; 5494 static uint32_t BCMI_TSCE16_XGXS_XGXSSTS0r_fields[] = 5495 { 5496 /* SKEW_STATUS:0:0 */ 5497 PHYMOD_SYMBOL_FIELD_ENCODE(1330, 0, 0), 5498 /* STATUS_EN:15:15 */ 5499 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1342, 15, 15) 5500 }; 5501 5502 5503 5504 /******************************************************************************* 5505 * 5506 * The following is the field name table. 5507 */ 5508 #if PHYMOD_CONFIG_INCLUDE_FIELD_NAMES == 1 5509 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_NAMES_BCMI_TSCE16_XGXS 5510 const char* bcmi_tsce16_xgxs_fields[] = 5511 { 5512 "ACCEL_EN", 5513 "ACOL_SWAP_COUNT64B66B", 5514 "ACQ_CDR_TIMEOUT", 5515 "AFE_REV_ID", 5516 "AFE_RX_PWRDN", 5517 "AFE_RX_PWRDN_FRC", 5518 "AFE_RX_PWRDN_FRC_VAL", 5519 "AFE_RX_RESET", 5520 "AFE_RX_RESET_FRC", 5521 "AFE_RX_RESET_FRC_VAL", 5522 "AFE_SIGDET", 5523 "AFE_SIGDET_CHANGE", 5524 "AFE_SIGDET_PWRDN", 5525 "AFE_SIGDET_THRESH", 5526 "AFE_SIGNAL_DETECT_DIS", 5527 "AFE_S_PLL_PWRDN", 5528 "AFE_TXCLK_RESET", 5529 "AFE_TXCLK_RESET_FRC", 5530 "AFE_TXCLK_RESET_FRC_VAL", 5531 "AFE_TX_FIFO_RESETB", 5532 "AFE_TX_FIFO_RESETB_FRC_ON", 5533 "AFE_TX_PWRDN", 5534 "AFE_TX_PWRDN_FRC", 5535 "AFE_TX_PWRDN_FRC_VAL", 5536 "AFE_TX_RESET", 5537 "AFE_TX_RESET_DEASSERT", 5538 "AFE_TX_RESET_FRC", 5539 "AFE_TX_RESET_FRC_VAL", 5540 "ALIGN_STATUS_CL82", 5541 "AMRKR_SPACING_ERR_LATCH_MUX", 5542 "AMS_SPARE_0_2", 5543 "AMS_SPARE_1_0", 5544 "AMS_SPARE_2_0", 5545 "AMS_SPARE_3_0", 5546 "AMS_SPARE_4_0", 5547 "AMS_SPARE_6_0", 5548 "AMS_SPARE_7_0", 5549 "AMS_SPARE_8_0", 5550 "AM_LOCK", 5551 "AM_LOCK_HIS_STATE", 5552 "AM_LOCK_LH", 5553 "AM_LOCK_LL", 5554 "AM_LOCK_STATE", 5555 "AM_TIMER_INIT_RX_VAL", 5556 "AN", 5557 "AN_ACTIVE", 5558 "AN_COMPLETE", 5559 "AN_COMPLETED_SW", 5560 "AN_FAIL_COUNT", 5561 "AN_FAIL_COUNT_LIMIT", 5562 "AN_GOOD_CHECK_TRAP", 5563 "AN_GOOD_TRAP", 5564 "AN_HCD_CL72", 5565 "AN_HCD_DUPLEX", 5566 "AN_HCD_FEC", 5567 "AN_HCD_HIGIG2", 5568 "AN_HCD_PAUSE", 5569 "AN_HCD_SPEED", 5570 "AN_HCD_SWITCH_TO_CL37", 5571 "AN_HIGH_VCO", 5572 "AN_PD_TO_CL37_ENABLE", 5573 "AN_PD_TO_CL37_RETRY_COUNT", 5574 "AN_PRIORITY_1000M", 5575 "AN_PRIORITY_100GCR10", 5576 "AN_PRIORITY_100M", 5577 "AN_PRIORITY_10GCX1", 5578 "AN_PRIORITY_10GCX2", 5579 "AN_PRIORITY_10GCX4", 5580 "AN_PRIORITY_10GKR", 5581 "AN_PRIORITY_10GKX4", 5582 "AN_PRIORITY_10GX2", 5583 "AN_PRIORITY_10GX4", 5584 "AN_PRIORITY_10M", 5585 "AN_PRIORITY_10P5GX2", 5586 "AN_PRIORITY_12GX4", 5587 "AN_PRIORITY_12P5GX4", 5588 "AN_PRIORITY_12P7GX2", 5589 "AN_PRIORITY_13GX4", 5590 "AN_PRIORITY_15GX4", 5591 "AN_PRIORITY_15P75GX2", 5592 "AN_PRIORITY_16GX4", 5593 "AN_PRIORITY_1GKX", 5594 "AN_PRIORITY_20GCR2", 5595 "AN_PRIORITY_20GCX2", 5596 "AN_PRIORITY_20GCX4", 5597 "AN_PRIORITY_20GKR2", 5598 "AN_PRIORITY_20GX2", 5599 "AN_PRIORITY_20GX4", 5600 "AN_PRIORITY_21GX4", 5601 "AN_PRIORITY_25P45GX4", 5602 "AN_PRIORITY_2P5GX1", 5603 "AN_PRIORITY_31P5G", 5604 "AN_PRIORITY_32P7G", 5605 "AN_PRIORITY_40GCR4", 5606 "AN_PRIORITY_40GKR4", 5607 "AN_PRIORITY_40GX4", 5608 "AN_PRIORITY_5GX4", 5609 "AN_PRIORITY_6GX4", 5610 "AN_RETRY_COUNT", 5611 "AN_RX_ST_CLK_TRANS_MISS", 5612 "AN_RX_ST_MV_PAIR", 5613 "AN_RX_ST_PAGE", 5614 "AN_RX_ST_PAGE_TOO_LONG", 5615 "AN_RX_ST_PAGE_TOO_SHORT", 5616 "AN_RX_ST_PULSE_TOO_LONG", 5617 "AN_RX_ST_PULSE_TOO_MODERATE", 5618 "AN_RX_ST_PULSE_TOO_SHORT", 5619 "AN_RX_ST_RUDI_CONFIG", 5620 "AN_RX_ST_RUDI_IDLE", 5621 "AN_RX_ST_RUDI_INVALID", 5622 "AN_RX_ST_STATE", 5623 "AN_ST_ABILITY_DETECT", 5624 "AN_ST_ACK_DETECT", 5625 "AN_ST_AN_ENABLE", 5626 "AN_ST_AN_GOOD_CHECK", 5627 "AN_ST_CL37_COMPLETE", 5628 "AN_ST_CL73_COMPLETE", 5629 "AN_ST_COMPLETE_ACK", 5630 "AN_ST_CONFIG_NONZERO", 5631 "AN_ST_CONFIG_RESTART", 5632 "AN_ST_CONSISTENCY_MISMATCH", 5633 "AN_ST_DISABLE_LINK", 5634 "AN_ST_ERROR_STATE", 5635 "AN_ST_HP_MODE", 5636 "AN_ST_IDLE_DETECT", 5637 "AN_ST_LINK_OK", 5638 "AN_ST_NEXT_PAGE_WAIT", 5639 "AN_ST_RESOLUTION_ERR", 5640 "AN_ST_RESTART", 5641 "AN_ST_RX_BP", 5642 "AN_ST_RX_INVALID_SEQ", 5643 "AN_ST_RX_MP_MISMATCH", 5644 "AN_ST_RX_MP_NULL", 5645 "AN_ST_RX_MP_OUI", 5646 "AN_ST_RX_MP_OVER1G", 5647 "AN_ST_RX_NP", 5648 "AN_ST_RX_NP_TOGGLE_ERR", 5649 "AN_ST_RX_SGMII_MISMATCH", 5650 "AN_ST_RX_UP_3", 5651 "AN_ST_RX_UP_OUI_MATCH", 5652 "AN_ST_RX_UP_OUI_MISMATCH", 5653 "AN_ST_SGMII_MODE", 5654 "AUTOCAL_CNT", 5655 "AUTOCAL_EN", 5656 "AUTO_LL_SELPATH_TX_DIS", 5657 "B66DEC_CGBAD_EN", 5658 "B66DEC_DOUT_ERRORS_IF_BAD_SYNC", 5659 "B66DEC_FAULT_DET", 5660 "B66DEC_FAULT_DET_EN", 5661 "B66DEC_KCODE66ERRCOUNT_EN", 5662 "B66DEC_NOBLOCKLOCK_DOUT_SEL", 5663 "B66DEC_PROG_TL_CHAR", 5664 "B66DEC_PROG_TL_EN", 5665 "B66DEC_SYNCERRCOUNT_EN", 5666 "BAM_10GBASE_X2", 5667 "BAM_10GBASE_X2_CX4", 5668 "BAM_10GBASE_X4", 5669 "BAM_10GBASE_X4_CX4", 5670 "BAM_10P5GBASE_X2", 5671 "BAM_12GBASE_X4", 5672 "BAM_12P5GBASE_X4", 5673 "BAM_12P7GBASE_X2", 5674 "BAM_13GBASE_X4", 5675 "BAM_15GBASE_X4", 5676 "BAM_15P75GBASE_X2", 5677 "BAM_16GBASE_X4", 5678 "BAM_20GBASE_CR2", 5679 "BAM_20GBASE_KR2", 5680 "BAM_20GBASE_X2", 5681 "BAM_20GBASE_X2_CX4", 5682 "BAM_20GBASE_X4", 5683 "BAM_20GBASE_X4_CX4", 5684 "BAM_21GBASE_X4", 5685 "BAM_25P455GBASE_X4", 5686 "BAM_2P5GBASE_X", 5687 "BAM_31P5GBASE_X4", 5688 "BAM_32P7GBASE_X4", 5689 "BAM_40GBASE_X4", 5690 "BAM_5GBASE_X4", 5691 "BAM_6GBASE_X4", 5692 "BAND_IQBUF_CTR", 5693 "BAND_IQBUF_MUX", 5694 "BAND_IQBUF_SEL", 5695 "BASE_1000BASE_KX", 5696 "BASE_100GBASE_CR10", 5697 "BASE_10GBASE_KR", 5698 "BASE_10GBASE_KX4", 5699 "BASE_40GBASE_CR4", 5700 "BASE_40GBASE_KR4", 5701 "BASE_SELECTOR", 5702 "BERMON_STATE", 5703 "BER_COUNT_PER_LN", 5704 "BER_HO", 5705 "BIAS_DIV_CTRL", 5706 "BIAS_EN", 5707 "BIAS_IQ_CTRL", 5708 "BIAS_VDD_SEL", 5709 "BIP_ERROR_COUNT_PER_LANE", 5710 "BLOCK_SYNC_MODE", 5711 "BLOCK_SYNC_MODE_OEN", 5712 "BONDING", 5713 "BRCM64B66_DESCRAMBLER_ENABLE", 5714 "BRCM64B66_DESCRAMBLER_ENABLE_OEN", 5715 "BRCM_MODE_USE_K20PT5", 5716 "BR_PD_EN", 5717 "BURST_ERR_STATUSH", 5718 "BURST_ERR_STATUSL", 5719 "BURST_ERR_STATUS_MODE", 5720 "BYPASS_CL49RXSM", 5721 "BYPASS_CL82RXSM", 5722 "BYTE0", 5723 "BYTE1", 5724 "CALIB_ADJ", 5725 "CALIB_CAP_CHARGE_TIME", 5726 "CALIB_START", 5727 "CALIB_STEP_TIME", 5728 "CALREF_COUNTER", 5729 "CALSTATE_ONEHOT", 5730 "CALVCO_COUNTER", 5731 "CAL_PAUSE_EN", 5732 "CAL_PAUSE_REL", 5733 "CAL_STATE", 5734 "CAL_TH", 5735 "CAL_VALID", 5736 "CAP_DELAY", 5737 "CATCH_ALL_8B10B_DIS", 5738 "CDR_BWSEL_INTEG_ACQCDR", 5739 "CDR_BWSEL_INTEG_EEE_ACQCDR", 5740 "CDR_BWSEL_INTEG_NORM", 5741 "CDR_BWSEL_PROP_ACQCDR", 5742 "CDR_BWSEL_PROP_EEE_ACQCDR", 5743 "CDR_BWSEL_PROP_NORM", 5744 "CDR_FREQ_EN", 5745 "CDR_FREQ_OVERRIDE_EN", 5746 "CDR_FREQ_OVERRIDE_VAL", 5747 "CDR_FRZ_FRC", 5748 "CDR_FRZ_FRC_VAL", 5749 "CDR_INTEG_REG", 5750 "CDR_INTEG_REG_CLR", 5751 "CDR_INTEG_SAT_SEL", 5752 "CDR_LM_OUTOFLOCK", 5753 "CDR_LM_THR_SEL", 5754 "CDR_PHASE_ERR", 5755 "CDR_PHASE_ERR_FRZ", 5756 "CDR_PHASE_SAT_CTRL", 5757 "CDR_QPHASE_MULT_EN", 5758 "CDR_SETTLE_TIMEOUT", 5759 "CDR_ZERO_POLARITY", 5760 "CHK_END_EN", 5761 "CHK_END_EN_OEN", 5762 "CL36BYTEDELETEMODE", 5763 "CL36BYTEDELETEMODE_OEN", 5764 "CL36_BER_EN", 5765 "CL36_EN", 5766 "CL36_EN_OEN", 5767 "CL36_FORCE_COMMA_ALIGN_ENABLE", 5768 "CL36_SYNCACQ_HIS_STATE_PER_LN", 5769 "CL36_SYNCACQ_STATE_CODED_PER_LN", 5770 "CL37_ACK_TIMER_PERIOD", 5771 "CL37_AN_RESTART", 5772 "CL37_AN_RESTART_RESET_DISABLE", 5773 "CL37_BAM_CODE", 5774 "CL37_BAM_ENABLE", 5775 "CL37_BAM_TO_SGMII_AUTO_ENABLE", 5776 "CL37_ENABLE", 5777 "CL37_ERROR_TIMER_PERIOD", 5778 "CL37_FULL_DUPLEX", 5779 "CL37_HALF_DUPLEX", 5780 "CL37_HIGH_VCO", 5781 "CL37_NEXT_PAGE", 5782 "CL37_PAUSE", 5783 "CL37_RESTART_TIMER_PERIOD", 5784 "CL37_SGMII_ENABLE", 5785 "CL37_SW_RESTART_RESET_DISABLE", 5786 "CL37_SYNC_STATUS_FILTER_TIMER_PERIOD", 5787 "CL48_CGBAD_EN", 5788 "CL48_DSWIN64B66B", 5789 "CL48_DSWIN8B10B", 5790 "CL48_RX_LF_ENABLE", 5791 "CL48_RX_LI_ENABLE", 5792 "CL48_RX_QRSVDCTRL", 5793 "CL48_RX_RF_ENABLE", 5794 "CL48_SKEWACQ_STATE_D_0", 5795 "CL48_SKEWACQ_STATE_D_1", 5796 "CL48_SKEWACQ_STATE_D_2", 5797 "CL48_SKEWACQ_STATE_D_3", 5798 "CL48_SKEWACQ_STATE_L", 5799 "CL48_SKEW_STATUS", 5800 "CL48_SYNCACQ_EN", 5801 "CL48_SYNCACQ_STATE_D_0", 5802 "CL48_SYNCACQ_STATE_D_1", 5803 "CL48_SYNCACQ_STATE_D_2", 5804 "CL48_SYNCACQ_STATE_D_3", 5805 "CL48_SYNCACQ_STATE_L", 5806 "CL48_TX_LF_ENABLE", 5807 "CL48_TX_LI_ENABLE", 5808 "CL48_TX_QRSVDCTRL", 5809 "CL48_TX_RF_ENABLE", 5810 "CL49IEEE_ERRORED_BLOCKS", 5811 "CL49_BERMON_CURRENT_STATE", 5812 "CL49_BERMON_HISTORY_STATE", 5813 "CL49_BER_LIMIT", 5814 "CL49_BYPASS_TXSM", 5815 "CL49_INVALID_SH_CNT", 5816 "CL49_LOW_LATENCY_EN", 5817 "CL49_LTXSM_STATE", 5818 "CL49_RXSM_CURRENT_STATE", 5819 "CL49_RXSM_HISTORY_STATE", 5820 "CL49_RX_LF_ENABLE", 5821 "CL49_RX_LI_ENABLE", 5822 "CL49_RX_RF_ENABLE", 5823 "CL49_RX_SCR_IDLE_ERROR_CNT", 5824 "CL49_R_TYPE_CODED", 5825 "CL49_TXSM_STATE", 5826 "CL49_TX_FAULT_DET", 5827 "CL49_TX_LF_ENABLE", 5828 "CL49_TX_LI_ENABLE", 5829 "CL49_TX_RF_ENABLE", 5830 "CL49_TX_TL_MODE", 5831 "CL49_T_TYPE_CODED", 5832 "CL49_VALID_SH_CNT", 5833 "CL72", 5834 "CL72_BAD_MARKER_CNT", 5835 "CL72_BRK_RING_OSC", 5836 "CL72_CL93PRBS_POLY_SEL", 5837 "CL72_CTRL_FRAME_DLY", 5838 "CL72_DIS_MAX_WAIT_TIMER", 5839 "CL72_DME_CELL_BOUNDARY_CHK", 5840 "CL72_ENABLE", 5841 "CL72_EN_MASK", 5842 "CL72_EN_OEN", 5843 "CL72_FRAME_CONSISTENCY_CHK_EN", 5844 "CL72_FRAME_LOCK", 5845 "CL72_GOOD_MARKER_CNT", 5846 "CL72_IEEE_FRAME_LOCK", 5847 "CL72_IEEE_LD_COEFF_UPDATE", 5848 "CL72_IEEE_LD_STATUS_REPORT", 5849 "CL72_IEEE_LP_COEFF_UPDATE", 5850 "CL72_IEEE_LP_STATUS_REPORT", 5851 "CL72_IEEE_RECEIVER_STATUS", 5852 "CL72_IEEE_RESTART_TRAINING", 5853 "CL72_IEEE_TRAINING_ENABLE", 5854 "CL72_IEEE_TRAINING_FAILURE", 5855 "CL72_IEEE_TRAINING_STATUS", 5856 "CL72_LD_XMT_STATUS_PAGE", 5857 "CL72_LOCAL_RX_READY", 5858 "CL72_MICRO_FRAME_LOCK_INT_EN", 5859 "CL72_MICRO_FRAME_LOCK_LSTATUS", 5860 "CL72_MICRO_STATUS_CHG_INT_EN", 5861 "CL72_MICRO_STATUS_CHG_LSTATUS", 5862 "CL72_MICRO_STATUS_RESP_INT_FRC", 5863 "CL72_MICRO_STATUS_RESP_INT_FRC_VAL", 5864 "CL72_MICRO_UPDATE_CHG_INT_EN", 5865 "CL72_MICRO_UPDATE_CHG_LSTATUS", 5866 "CL72_MICRO_UPDATE_REQ_INT_FRC", 5867 "CL72_MICRO_UPDATE_REQ_INT_FRC_VAL", 5868 "CL72_PPM_OFFSET_EN", 5869 "CL72_PRBS_MODE_SEL", 5870 "CL72_PRBS_SEED_SEL", 5871 "CL72_PRBS_SEED_VAL", 5872 "CL72_REMOTE_RX_READY", 5873 "CL72_RX_DP_LN_CLK_EN", 5874 "CL72_RX_SIGNAL_OK", 5875 "CL72_RX_TRAINING_EN", 5876 "CL72_STRICT_DME_CHK", 5877 "CL72_STRICT_MARKER_CHK", 5878 "CL72_SW_FRAME_LOCK", 5879 "CL72_SW_REMOTE_RX_READY", 5880 "CL72_SW_RX_TRAINED", 5881 "CL72_TIMER_EN", 5882 "CL72_TRAINING_FSM_SIGNAL_DETECT", 5883 "CL72_TR_COARSE_LOCK", 5884 "CL72_TXFIR_MAIN", 5885 "CL72_TXFIR_POST", 5886 "CL72_TXFIR_PRE", 5887 "CL72_TX_DP_LN_CLK_EN", 5888 "CL72_XMT_UPDATE_PAGE", 5889 "CL73_AN_RESTART", 5890 "CL73_BAM_CODE", 5891 "CL73_BAM_ENABLE", 5892 "CL73_BAM_TO_HPAM_AUTO_ENABLE", 5893 "CL73_ENABLE", 5894 "CL73_ERROR_TIMER_PERIOD", 5895 "CL73_HPAM_ENABLE", 5896 "CL73_LINK_UP_TIMER_PERIOD", 5897 "CL73_LOW_VCO", 5898 "CL73_NONCE_MATCH_OVER", 5899 "CL73_NONCE_MATCH_VAL", 5900 "CL73_PAGE_TEST_MAX_TIMER", 5901 "CL73_PAGE_TEST_MIN_TIMER", 5902 "CL73_PAUSE", 5903 "CL73_REMOTE_FAULT", 5904 "CL82_BER_LIMIT", 5905 "CL82_BYPASS_TXSM", 5906 "CL82_DSWIN", 5907 "CL82_DSWIN_100G", 5908 "CL82_IDLE_DELETION_UNDERFLOW", 5909 "CL82_INVALID_SH_CNT", 5910 "CL82_MLD_PHYS_MAP", 5911 "CL82_MULTI_PIPE_MODE", 5912 "CL82_RX_LF_ENABLE", 5913 "CL82_RX_LI_ENABLE", 5914 "CL82_RX_RF_ENABLE", 5915 "CL82_RX_SCR_IDLE_ERROR_CNT", 5916 "CL82_TX_LF_ENABLE", 5917 "CL82_TX_LI_ENABLE", 5918 "CL82_TX_RF_ENABLE", 5919 "CL82_VALID_SH_CNT", 5920 "CLAUSE22", 5921 "CLOCKCNT0", 5922 "CLOCKCNT0_OEN", 5923 "CLOCKCNT1", 5924 "CLOCKCNT1_OEN", 5925 "CLR_CRCCNT", 5926 "CML_REFCLK_ADJ", 5927 "CML_REFCLK_BIAS", 5928 "CMOS_TPORT_EN", 5929 "CNTRL_RXDETECT_EN", 5930 "CNT_BIN_D_DREG", 5931 "CNT_BIN_D_MREG", 5932 "CNT_BIN_M1_MREG", 5933 "CNT_BIN_M1_PREG", 5934 "CNT_BIN_P1_DREG", 5935 "CNT_BIN_P1_PREG", 5936 "CNT_D_MINUS_M1", 5937 "CNT_D_MINUS_P1", 5938 "CONVERT_TAPS_TO_AFE", 5939 "CONVERT_TAPS_TO_AFE_ERROR", 5940 "CONVERT_TAPS_TO_AFE_INT_EN", 5941 "CORCOUNTH", 5942 "CORCOUNTL", 5943 "CORE_DP_H_RSTB", 5944 "CORE_DP_H_RSTB_OEN", 5945 "CORE_DP_RESET_STATE", 5946 "CORE_DP_S_RSTB", 5947 "CORE_MODE", 5948 "CORE_MODE_OEN", 5949 "CORE_REG_RESET_OCCURRED", 5950 "CORE_S_RSTB", 5951 "CPAR", 5952 "CP_BIAS", 5953 "CP_OPAMP_BIAS", 5954 "CRCERRCNT", 5955 "CREDITENABLE", 5956 "CREDITENABLE_OEN", 5957 "CREDIT_EN", 5958 "CREDIT_FROM_PER_PHY_LN_EN", 5959 "CTLE_GAIN_CTRL", 5960 "CURR_CTLE", 5961 "CURR_DFE_1", 5962 "CURR_DFE_2", 5963 "CURR_DFE_SUMMER", 5964 "CURR_IN_OFFSET", 5965 "CURR_PI", 5966 "CURR_SEL", 5967 "CURR_SIGDET", 5968 "CURR_VDDR_AFE", 5969 "CURR_VGA", 5970 "DATA_OFFSET_EVN_BIN", 5971 "DATA_OFFSET_ODD_BIN", 5972 "DBG_ENABLE", 5973 "DBG_ERRH", 5974 "DBG_ERRL", 5975 "DBG_ERR_MODE", 5976 "DBG_MASK_DIG_LPBK_EN", 5977 "DBG_PMD_RX_LOCK", 5978 "DBG_PMD_RX_LOCK_CHANGE", 5979 "DCC1_PHASE_FLIP", 5980 "DCC2_PHASE_FLIP", 5981 "DCC_EN", 5982 "DCOFF_CAL_TIMEOUT", 5983 "DC_OFFSET_BIN", 5984 "DC_OFFSET_EN", 5985 "DC_OFFSET_INV", 5986 "DC_OFFSET_PATTERN", 5987 "DC_OFFSET_PATTERN_BIT_EN", 5988 "DC_OFFSET_PATTERN_INV_EN", 5989 "DEBUG_CLR", 5990 "DECODERMODE", 5991 "DECODERMODE_OEN", 5992 "DEC_17B_BURST_GAP_COUNT", 5993 "DEC_18B_BURST_GAP_COUNT", 5994 "DEC_19B_BURST_GAP_COUNT", 5995 "DEC_GAP_COUNT_MODE", 5996 "DEC_MAX_PM", 5997 "DEC_PM_MODE", 5998 "DESC2_MODE", 5999 "DESC2_MODE_OEN", 6000 "DESCRAMBLERMODE", 6001 "DESCRAMBLERMODE_OEN", 6002 "DESKEWMODE", 6003 "DESKEWMODE_OEN", 6004 "DESKEW_1BIT_ERROR", 6005 "DESKEW_2BIT_ERROR", 6006 "DESKEW_ADDRESS", 6007 "DESKEW_DISABLE_ECC", 6008 "DESKEW_ECC_CORRUPT", 6009 "DESKEW_HIS_STATE", 6010 "DESKEW_STATE", 6011 "DESKEW_STATUS", 6012 "DESKEW_STATUS_LH", 6013 "DESKEW_STATUS_LL", 6014 "DESKEW_TM", 6015 "DFE_1_ACC_CLR", 6016 "DFE_1_CMN", 6017 "DFE_1_CMN_ONLY", 6018 "DFE_1_E", 6019 "DFE_1_EN", 6020 "DFE_1_ERR_GAIN", 6021 "DFE_1_ERR_SEL", 6022 "DFE_1_GRADIENT_INVERT", 6023 "DFE_1_INV_M1", 6024 "DFE_1_INV_P1", 6025 "DFE_1_O", 6026 "DFE_1_WANTS_NEGATIVE", 6027 "DFE_2_ACC_CLR", 6028 "DFE_2_CMN", 6029 "DFE_2_CMN_ONLY", 6030 "DFE_2_E", 6031 "DFE_2_EN", 6032 "DFE_2_ERR_GAIN", 6033 "DFE_2_ERR_SEL", 6034 "DFE_2_GRADIENT_INVERT", 6035 "DFE_2_INV_M1", 6036 "DFE_2_INV_P1", 6037 "DFE_2_O", 6038 "DFE_2_SE", 6039 "DFE_2_SO", 6040 "DFE_3_ACC_CLR", 6041 "DFE_3_CMN", 6042 "DFE_3_EN", 6043 "DFE_3_ERR_GAIN", 6044 "DFE_3_ERR_SEL", 6045 "DFE_3_GRADIENT_INVERT", 6046 "DFE_3_INV_M1", 6047 "DFE_3_INV_P1", 6048 "DFE_4_ACC_CLR", 6049 "DFE_4_CMN", 6050 "DFE_4_EN", 6051 "DFE_4_ERR_GAIN", 6052 "DFE_4_ERR_SEL", 6053 "DFE_4_GRADIENT_INVERT", 6054 "DFE_4_INV_M1", 6055 "DFE_4_INV_P1", 6056 "DFE_5_ACC_CLR", 6057 "DFE_5_CMN", 6058 "DFE_5_EN", 6059 "DFE_5_ERR_GAIN", 6060 "DFE_5_ERR_SEL", 6061 "DFE_5_GRADIENT_INVERT", 6062 "DFE_5_INV_M1", 6063 "DFE_5_INV_P1", 6064 "DFE_ACC_HYS_EN", 6065 "DFE_ALLOW_SIMULT", 6066 "DFE_EYE_CLOSURE_ERR_SEL", 6067 "DFE_HW_EYE_CLOSURE_EN", 6068 "DFE_LEAKY_LMS_EN", 6069 "DFE_LEAKY_LMS_UPD_DUR", 6070 "DFE_PATTERN", 6071 "DFE_PATTERN_BIT_EN", 6072 "DFE_UPDATE_GAIN", 6073 "DFE_VGA_UNFREEZE", 6074 "DIG_LPBK_EN", 6075 "DIG_LPBK_PD_BIAS_EN", 6076 "DIG_LPBK_PD_EARLY_IND", 6077 "DIG_LPBK_PD_FLT_BYPASS", 6078 "DIG_LPBK_PD_LATE_IND", 6079 "DIG_LPBK_PD_MODE", 6080 "DISABLE_ACK_TIMEOUT", 6081 "DISABLE_CARRIER_EXTEND", 6082 "DISABLE_CL49_BERMON", 6083 "DISABLE_REMOTE_FAULT_REPORTING", 6084 "DIS_CAL", 6085 "DIS_CL82_BERMON", 6086 "DIV3O4O5", 6087 "DP_RESET_TX_DISABLE_DIS", 6088 "DSC_CLR_FRC", 6089 "DSC_CLR_FRC_VAL", 6090 "DSC_SM_GP_UC_REQ", 6091 "DSC_SM_READY_FOR_CMD", 6092 "DSC_SM_SCRATCH", 6093 "DSC_STATE", 6094 "DSC_STATE_EEE_ONE_HOT", 6095 "DSC_STATE_ONE_HOT", 6096 "DTE_XS", 6097 "EDGE_COUNT_REFLESS_EN", 6098 "EEE_ACQ_CDR_TIMEOUT", 6099 "EEE_ANA_PWR_TIMEOUT", 6100 "EEE_CDR_SETTLE_TIMEOUT", 6101 "EEE_HW_TUNE_TIMEOUT", 6102 "EEE_LFSR_CNT", 6103 "EEE_MEASURE_CNT", 6104 "EEE_MEASURE_EN", 6105 "EEE_MODE_EN", 6106 "EEE_PHASE_ERR_OFFSET", 6107 "EEE_PHASE_ERR_OFFSET_EN", 6108 "EEE_QUIET_FROM_EEE_STATES", 6109 "EEE_QUIET_RX_AFE_PWRDWN_VAL", 6110 "ENABLE_OS_2", 6111 "ENABLE_OS_4", 6112 "ENABLE_TX_LANE", 6113 "ENB_10T", 6114 "ENB_16T", 6115 "ENB_8T", 6116 "ENCODEMODE", 6117 "ENCODEMODE_OEN", 6118 "ENERGY_DETECT", 6119 "ENERGY_DETECT_CHANGE", 6120 "ENERGY_DETECT_FRC", 6121 "ENERGY_DETECT_FRC_VAL", 6122 "ENERGY_DETECT_MASK_COUNT", 6123 "EN_20B_DEMUX", 6124 "EN_8P5G", 6125 "EN_8P5G_VCO", 6126 "EN_CALIB_N", 6127 "EN_CLK16", 6128 "EN_CLK33", 6129 "EN_CML_REFOUT_OVERWR", 6130 "EN_CMOS_REFCLK_CH_HIZ", 6131 "EN_CMOS_REFOUT_OVERWR", 6132 "EN_DFECLK", 6133 "EN_DFE_TAP_FB", 6134 "EN_HCUR_VCO", 6135 "EN_HGAIN", 6136 "EN_HIGH_CURRENT", 6137 "EN_HPF", 6138 "EN_I4IQBUF", 6139 "EN_MMD_HALFRATE", 6140 "EN_POST1", 6141 "EN_POST2", 6142 "EN_PRE", 6143 "EN_RCLK_REFOUT", 6144 "EN_RECCLKDIV", 6145 "EN_REFOUT_DIV", 6146 "EN_RXCK_TEST", 6147 "EN_RXCK_TESTPORT", 6148 "EN_SHUNTMODE", 6149 "EN_SIGDET_CALIB", 6150 "EN_SLOW", 6151 "EN_TEST_FRAC_CLK", 6152 "EN_VCCTRL", 6153 "EN_WCLK16", 6154 "EN_WCLK20", 6155 "EN_WCLK33", 6156 "ERRGEN_EN", 6157 "ERRORED_BLOCKS_HO", 6158 "ERRORED_BLOCKS_HO_PRESENT", 6159 "ERROR_EN_OVR", 6160 "ERROR_EN_OVR_VAL", 6161 "ERROR_MASK_15_0", 6162 "ERROR_MASK_31_16", 6163 "ERROR_MASK_47_32", 6164 "ERROR_MASK_63_48", 6165 "ERROR_MASK_79_64", 6166 "EXT_LOS_EN", 6167 "EXT_LOS_INV", 6168 "EXT_RANGE", 6169 "EXT_SIGDET", 6170 "EXT_SIGDET_CHANGE", 6171 "EXT_STATE", 6172 "FAST_LOCK_EN", 6173 "FEC", 6174 "FEC_ENABLE", 6175 "FEC_ENABLE_OEN", 6176 "FEC_ERROR_CODE_ALL", 6177 "FEC_ERR_ENABLE", 6178 "FIFO_PHSDETECT_MODE", 6179 "FREQDET_TIME", 6180 "FREQDET_TIME_MSB", 6181 "FREQDET_WIN", 6182 "FREQ_UPD_EN_FRC", 6183 "FREQ_UPD_EN_FRC_VAL", 6184 "GBOX_OVERFLOW_ERR", 6185 "GBOX_UNDERFLOW_ERR", 6186 "GCWCOUNT", 6187 "GOOD_PARITY_CNT", 6188 "HALFSTEP_EN", 6189 "HEARTBEAT_COUNT_1US", 6190 "HG2", 6191 "HG2_CODEC", 6192 "HG2_ENABLE", 6193 "HG2_MESSAGE_INVALID_CODE_ENABLE", 6194 "HIZ_1", 6195 "HI_BER", 6196 "HI_BER_LH", 6197 "HI_BER_LL", 6198 "HOLD_LOS_COUNT", 6199 "HOLD_SD_COUNT", 6200 "HPAM_20GKR2", 6201 "HPAM_TO_CL73_AUTO_ENABLE", 6202 "HWTUNE_OVR_WRITE_EN", 6203 "HWTUNE_OVR_WRITE_SEL", 6204 "HWTUNE_OVR_WRITE_VAL", 6205 "HW_DC_OFFSET_ERR_GAIN", 6206 "HW_DC_OFFSET_GRAD_INV", 6207 "HW_DC_OFFSET_HYS_EN", 6208 "HW_SLICER_OFFSET_EN", 6209 "HW_SLICER_OFFSET_ERR_GAIN", 6210 "HW_SLICER_OFFSET_GRAD_INV", 6211 "HW_SLICER_OFFSET_HYS_EN", 6212 "HW_SLICER_OFFSET_INV_DATA", 6213 "HW_SLICER_OFFSET_INV_M1", 6214 "HW_SLICER_OFFSET_INV_P1", 6215 "HW_TUNE_EN", 6216 "HW_TUNE_TIMEOUT", 6217 "HYSTCOUNT", 6218 "I4DEADZONE", 6219 "IBIAS_OPAMP_CNTL", 6220 "IBIAS_PIBUF_CNTL", 6221 "IBIAS_PI_CNTL", 6222 "IGNORE_LINK_TIMER_PERIOD", 6223 "IGNORE_LP_MODE", 6224 "IGNORE_RX_MODE", 6225 "ILKN_SEL", 6226 "INT_1B", 6227 "INT_2B", 6228 "INVALID_PARITY_CNT", 6229 "INV_RX_ORDER", 6230 "INV_TX_ORDER", 6231 "IPG_SIZE", 6232 "I_NDIV_DITHER_EN", 6233 "I_NDIV_FRAC_H", 6234 "I_NDIV_FRAC_L", 6235 "I_NDIV_INT", 6236 "I_PLL_FRAC_MODE", 6237 "I_PLL_SDM_PWRDNB", 6238 "KCODE66ERRCOUNT", 6239 "LANE_0_AM_1_0", 6240 "LANE_0_AM_2", 6241 "LANE_1_AM_1_0", 6242 "LANE_1_AM_2", 6243 "LANE_2_AM_1_0", 6244 "LANE_2_AM_2", 6245 "LANE_3_AM_1_0", 6246 "LANE_3_AM_2", 6247 "LANE_DP_RESET_STATE", 6248 "LANE_MODE", 6249 "LANE_MODE_OEN", 6250 "LANE_REG_RESET_OCCURRED", 6251 "LANE_RESET_RELEASED", 6252 "LANE_RESET_RELEASED_INDEX", 6253 "LATCH_LINKDOWN_ENABLE", 6254 "LBERMON_STATE", 6255 "LC_REFCLK_ADJ_1_0", 6256 "LC_REFCLK_ADJ_3_2", 6257 "LD_CONTROL_VALID", 6258 "LD_PAGE_0_PAGE_DATA", 6259 "LD_PAGE_1_PAGE_DATA", 6260 "LD_PAGE_2_PAGE_DATA", 6261 "LINKFAILTIMERQUAL_EN", 6262 "LINKFAILTIMER_DIS", 6263 "LINK_CONTROL_FORCEVAL", 6264 "LINK_EN", 6265 "LINK_FAIL_INHIBIT_TIMER_CL72_PERIOD", 6266 "LINK_FAIL_INHIBIT_TIMER_NCL72_PERIOD", 6267 "LINK_INTERRUPT", 6268 "LINK_INTERRUPT_LH", 6269 "LINK_STATUS", 6270 "LINK_STATUS_LH", 6271 "LINK_STATUS_LL", 6272 "LKDTREF_COUNTER", 6273 "LKDTREF_COUNTER_MSB", 6274 "LKDTVCO_COUNTER", 6275 "LKDTVCO_COUNTER_MSB", 6276 "LKDT_BYP", 6277 "LKDT_PAUSE_EN", 6278 "LKDT_PAUSE_REL", 6279 "LL_EN", 6280 "LL_FIFO_CTRL", 6281 "LL_FIFO_ZERO_OUT", 6282 "LL_POLARITY_FLIP", 6283 "LL_SELPATH_TX", 6284 "LN_DP_S_RSTB", 6285 "LN_RX_DP_H_RSTB", 6286 "LN_RX_DP_H_RSTB_OEN", 6287 "LN_RX_DP_S_RSTB", 6288 "LN_RX_H_PWRDN", 6289 "LN_RX_H_RSTB", 6290 "LN_RX_S_CLKGATE_FRC_ON", 6291 "LN_RX_S_COMCLK_FRC_ON", 6292 "LN_RX_S_COMCLK_SEL", 6293 "LN_RX_S_PWRDN", 6294 "LN_RX_S_RSTB", 6295 "LN_S_RSTB", 6296 "LN_TX_DP_H_RSTB", 6297 "LN_TX_DP_H_RSTB_OEN", 6298 "LN_TX_DP_S_RSTB", 6299 "LN_TX_H_PWRDN", 6300 "LN_TX_H_RSTB", 6301 "LN_TX_S_CLKGATE_FRC_ON", 6302 "LN_TX_S_COMCLK_FRC_ON", 6303 "LN_TX_S_COMCLK_SEL", 6304 "LN_TX_S_PWRDN", 6305 "LN_TX_S_RSTB", 6306 "LOCAL_FAULT", 6307 "LOCAL_FAULT_LH", 6308 "LOCAL_PCS_LOOPBACK_ENABLE", 6309 "LOG0_TO_PHY_RX_LNSWAP_SEL", 6310 "LOG0_TO_PHY_TX_LNSWAP_SEL", 6311 "LOG1_TO_PHY_RX_LNSWAP_SEL", 6312 "LOG1_TO_PHY_TX_LNSWAP_SEL", 6313 "LOG2_TO_PHY_RX_LNSWAP_SEL", 6314 "LOG2_TO_PHY_TX_LNSWAP_SEL", 6315 "LOG3_TO_PHY_RX_LNSWAP_SEL", 6316 "LOG3_TO_PHY_TX_LNSWAP_SEL", 6317 "LOOPCNT0", 6318 "LOOPCNT0_OEN", 6319 "LOOPCNT1", 6320 "LOOPCNT1_OEN", 6321 "LOS_FILTER_COUNT", 6322 "LOS_THRESH", 6323 "LOWLATENCY_EN", 6324 "LPI_EN", 6325 "LPI_ENABLE", 6326 "LPI_RECEIVED", 6327 "LPI_RECEIVED_LH", 6328 "LP_BASE_PAGE1_PAGE_DATA", 6329 "LP_BASE_PAGE2_PAGE_DATA", 6330 "LP_BASE_PAGE3_PAGE_DATA", 6331 "LP_MP1024_UP1_PAGE_DATA", 6332 "LP_MP1024_UP2_PAGE_DATA", 6333 "LP_MP1024_UP3_PAGE_DATA", 6334 "LP_MP1024_UP4_PAGE_DATA", 6335 "LP_MP5_UP1_PAGE_DATA", 6336 "LP_MP5_UP2_PAGE_DATA", 6337 "LP_MP5_UP3_PAGE_DATA", 6338 "LP_MP5_UP4_PAGE_DATA", 6339 "LP_PAGE_0_PAGE_DATA", 6340 "LP_PAGE_1_PAGE_DATA", 6341 "LP_PAGE_2_PAGE_DATA", 6342 "LP_STATUS_VALID", 6343 "LSM_CURR_STATE", 6344 "LSM_HIS_STATE", 6345 "LTXSM_STATE", 6346 "M1_OFFSET_EVN_BIN", 6347 "M1_OFFSET_ODD_BIN", 6348 "M1_SIGN", 6349 "M1_THRESH_SEL", 6350 "M1_THRESH_ZERO", 6351 "MAC_CREDITGENCNT", 6352 "MAC_CREDITGENCNT_OEN", 6353 "MASKDATA", 6354 "MASKDATA_BUS_ASSIGN", 6355 "MASTER_PORT_NUM", 6356 "MDIO_ADDR_DATA", 6357 "MDIO_AER", 6358 "MDIO_BLK_ADDR", 6359 "MDIO_BRCST_PORT_ADDR", 6360 "MDIO_DEVAD", 6361 "MDIO_DEV_AN_EN", 6362 "MDIO_DEV_CL22_EN", 6363 "MDIO_DEV_DTE_EN", 6364 "MDIO_DEV_PCS_EN", 6365 "MDIO_DEV_PHY_EN", 6366 "MDIO_DEV_PMD_EN", 6367 "MDIO_DRV_COMCLK", 6368 "MDIO_FUNCTION", 6369 "MDIO_MULTI_MMDS_EN", 6370 "MDIO_MULTI_PRTS_EN", 6371 "MEASURE_LFSR_CNT", 6372 "MEASURE_TIMEOUT", 6373 "MEAS_INCOMPLETE", 6374 "MICRO_AUTOINC_RDADDR_EN", 6375 "MICRO_AUTOINC_WRADDR_EN", 6376 "MICRO_CODE_RAM_ECC_ADDRESS", 6377 "MICRO_CODE_RAM_TM", 6378 "MICRO_CORE_CLK_EN", 6379 "MICRO_CORE_RSTB", 6380 "MICRO_DR_LOOKTAB_EN", 6381 "MICRO_DR_SIZE", 6382 "MICRO_ECCG_MODE", 6383 "MICRO_ECC_CORRUPT", 6384 "MICRO_ECC_FRC_DISABLE", 6385 "MICRO_EXT_INT", 6386 "MICRO_EXT_MSK", 6387 "MICRO_GEN_INTR_RMI_MBOX0WR", 6388 "MICRO_GEN_INTR_RMI_MBOX1WR", 6389 "MICRO_IGNORE_M0_CODE_WRITES", 6390 "MICRO_M0_DEFAULT_SLAVE_ERROR", 6391 "MICRO_M0_HRESP_EN", 6392 "MICRO_MASTER_CLK_EN", 6393 "MICRO_MASTER_RSTB", 6394 "MICRO_PMI_HP_ACK_TIMEOUT_DIS", 6395 "MICRO_PMI_HP_EXT_ACK_TIMEOUT_DIS", 6396 "MICRO_PMI_HP_EXT_FAST_BKTOBK_EN", 6397 "MICRO_PMI_HP_EXT_FAST_DUAL_META_FF_EN", 6398 "MICRO_PMI_HP_EXT_FAST_READ_EN", 6399 "MICRO_PMI_HP_FAST_BKTOBK_EN", 6400 "MICRO_PMI_HP_FAST_DUAL_META_FF_EN", 6401 "MICRO_PMI_HP_FAST_READ_EN", 6402 "MICRO_PRAMIF_AHB_WRADDR_LSW", 6403 "MICRO_PRAMIF_AHB_WRADDR_MSW", 6404 "MICRO_PRAMIF_EN", 6405 "MICRO_PRAM_IF_RSTB", 6406 "MICRO_PROTECT_FWCODE", 6407 "MICRO_PR_AUTOINC_NXT_WRADDR_LSW", 6408 "MICRO_PR_DEFAULT_SLAVE_ERROR", 6409 "MICRO_PVT_TEMPDATA_FRC", 6410 "MICRO_PVT_TEMPDATA_FRCVAL", 6411 "MICRO_PVT_TEMPDATA_RMI", 6412 "MICRO_RAMCLK_NONINV", 6413 "MICRO_RA_AUTOINC_NXT_RDADDR_LSW", 6414 "MICRO_RA_AUTOINC_NXT_WRADDR_LSW", 6415 "MICRO_RA_ECC_RDDATA", 6416 "MICRO_RA_ECC_WRDATA", 6417 "MICRO_RA_INIT", 6418 "MICRO_RA_INITDONE", 6419 "MICRO_RA_RDADDR_LSW", 6420 "MICRO_RA_RDADDR_MSW", 6421 "MICRO_RA_RDDATASIZE", 6422 "MICRO_RA_RDDATA_LSW", 6423 "MICRO_RA_RDDATA_MSW", 6424 "MICRO_RA_WRADDR_LSW", 6425 "MICRO_RA_WRADDR_MSW", 6426 "MICRO_RA_WRDATASIZE", 6427 "MICRO_RA_WRDATA_LSW", 6428 "MICRO_RA_WRDATA_MSW", 6429 "MICRO_RMI_DEFAULT_SLAVE_ERROR", 6430 "MICRO_RMI_ECC_CORR_ERR_INTR_EN", 6431 "MICRO_RMI_ECC_CORR_ERR_STATUS", 6432 "MICRO_RMI_ECC_MULTIROW_ERR_INTR_EN", 6433 "MICRO_RMI_ECC_MULTIROW_ERR_STATUS", 6434 "MICRO_RMI_ECC_UNCORR_ERR_INTR_EN", 6435 "MICRO_RMI_ECC_UNCORR_ERR_STATUS", 6436 "MICRO_RMI_M0_LOCKUP_INTR_EN", 6437 "MICRO_RMI_M0_LOCKUP_STATUS", 6438 "MICRO_RMI_M0_SYSTEMRESETREQ_INTR_EN", 6439 "MICRO_RMI_M0_SYSTEMRESETREQ_STATUS", 6440 "MICRO_RMI_MBOX_MSGOUT_INTR_EN", 6441 "MICRO_RMI_MBOX_MSGOUT_STATUS", 6442 "MICRO_RMI_MBOX_SEND_MSGIN", 6443 "MICRO_RMI_TO_MICRO_MBOX0", 6444 "MICRO_RMI_TO_MICRO_MBOX1", 6445 "MICRO_SILICON_DEBUG_STATUS_MUXED_DATA", 6446 "MICRO_SILICON_DEBUG_STATUS_MUX_SEL", 6447 "MICRO_SW_PMI_HP_EXT_RSTB", 6448 "MICRO_SW_PMI_HP_RSTB", 6449 "MICRO_TO_RMI_MBOX0", 6450 "MICRO_TO_RMI_MBOX1", 6451 "MICRO_TX_DISABLE", 6452 "MLD_SWAP_COUNT", 6453 "MMD_RESETB", 6454 "MODEL_NUMBER", 6455 "MSK_1B", 6456 "MSK_2B", 6457 "MULTICAST_MASK_CONTROL", 6458 "MULTICAST_MASK_CONTROL_STATUS", 6459 "MULTIPRTS_EN", 6460 "NEXT_PAGE", 6461 "NUMBER_PKT", 6462 "NUM_ADVERTISED_LANES", 6463 "NUM_LANES", 6464 "NUM_LANES_OEN", 6465 "NUM_LANES_OVERRIDE_VALUE", 6466 "OC_2X", 6467 "OFFSET_PD", 6468 "OS2X_MODE_EVEN_ODD", 6469 "OSR_MODE", 6470 "OSR_MODE_FRC", 6471 "OSR_MODE_FRC_VAL", 6472 "OSR_MODE_PIN", 6473 "OSX2P_PHERR_GAIN", 6474 "OS_MODE", 6475 "OS_MODE_OEN", 6476 "OUI_CONTROL", 6477 "OUI_LOWER_DATA", 6478 "OUI_UPPER_DATA", 6479 "OVER1G_ABILITY", 6480 "OVER1G_PAGE_COUNT", 6481 "P1_EYEDIAG_BIN", 6482 "P1_EYEDIAG_EN", 6483 "P1_HWTUNE_MAX", 6484 "P1_HWTUNE_MIN", 6485 "P1_OFFSET", 6486 "P1_OFFSET_EN", 6487 "P1_OFFSET_EVN_BIN", 6488 "P1_OFFSET_ODD_BIN", 6489 "P1_OFF_3LEVELQ_EN", 6490 "P1_THRESH_SEL", 6491 "P1_WANTS_TO_GO_HIGH", 6492 "P1_WANTS_TO_GO_LOW", 6493 "PATTERN_SEL", 6494 "PATT_GEN_EN", 6495 "PATT_GEN_SEQ_0", 6496 "PATT_GEN_SEQ_1", 6497 "PATT_GEN_SEQ_10", 6498 "PATT_GEN_SEQ_11", 6499 "PATT_GEN_SEQ_12", 6500 "PATT_GEN_SEQ_13", 6501 "PATT_GEN_SEQ_14", 6502 "PATT_GEN_SEQ_2", 6503 "PATT_GEN_SEQ_3", 6504 "PATT_GEN_SEQ_4", 6505 "PATT_GEN_SEQ_5", 6506 "PATT_GEN_SEQ_6", 6507 "PATT_GEN_SEQ_7", 6508 "PATT_GEN_SEQ_8", 6509 "PATT_GEN_SEQ_9", 6510 "PATT_GEN_START_POS", 6511 "PATT_GEN_STOP_POS", 6512 "PAYLOAD_TYPE", 6513 "PCS_CLOCKCNT0", 6514 "PCS_CLOCKCNT0_OEN", 6515 "PCS_CREDITENABLE", 6516 "PCS_CREDITENABLE_OEN", 6517 "PCS_CREDITGENCNT", 6518 "PCS_CREDITGENCNT_OEN", 6519 "PCS_XS", 6520 "PD_CH_P1", 6521 "PD_CL37_COMPLETED", 6522 "PD_COMPLETED", 6523 "PD_DME_LOCK_TIMER_PERIOD", 6524 "PD_HCD_KX4_OR_KX", 6525 "PD_IN_PROGRESS", 6526 "PD_KX4_EN", 6527 "PD_KX_EN", 6528 "PD_PHASEDET", 6529 "PD_SD_TIMER_PERIOD", 6530 "PD_TO_CL37_LINK_WAIT_TIMER", 6531 "PF2_LOWP_CTRL", 6532 "PFD_OFFSET", 6533 "PFD_OFFSET_ENLARGE", 6534 "PF_CTRL", 6535 "PF_HIZ", 6536 "PHASE_ERR_OFFSET", 6537 "PHASE_ERR_OFFSET_EN", 6538 "PHASE_ERR_OFFSET_MULT_2", 6539 "PHY_XS", 6540 "PIPELINE_RESET_COUNT", 6541 "PI_PD", 6542 "PKTGEN_EN", 6543 "PKT_OR_PRTP", 6544 "PKT_SIZE", 6545 "PLLCLKSEL", 6546 "PLLFORCE_FDONE", 6547 "PLLFORCE_FDONE_EN", 6548 "PLLPON_MUX", 6549 "PLLPON_SEL", 6550 "PLL_CLKVCO_CAL_INVERT", 6551 "PLL_FAIL_STKY", 6552 "PLL_FORCE_CAP_PASS", 6553 "PLL_FORCE_CAP_PASS_EN", 6554 "PLL_LOCK", 6555 "PLL_LOCK_BAR_STKY", 6556 "PLL_LOCK_FRC", 6557 "PLL_LOCK_FRC_VAL", 6558 "PLL_LOCK_LH", 6559 "PLL_LOCK_LL", 6560 "PLL_LOCK_OVRD", 6561 "PLL_LOCK_STS", 6562 "PLL_LOCK_TIMED_OUT", 6563 "PLL_LOCK_TIMER_PERIOD", 6564 "PLL_PON", 6565 "PLL_PWRDN", 6566 "PLL_PWRDN_OR", 6567 "PLL_RANGE", 6568 "PLL_RESET_EN", 6569 "PLL_SEQ_START", 6570 "PLL_SPARE6_1", 6571 "PLL_SPARE_0_0", 6572 "PLL_SPARE_0_1", 6573 "PLL_SPARE_1_0", 6574 "PMA_PMD", 6575 "PMD_CORE_DP_H_RSTB_PKILL", 6576 "PMD_CORE_MODE", 6577 "PMD_LANE_MODE", 6578 "PMD_LN_DP_H_RSTB_PKILL", 6579 "PMD_LN_H_RSTB_PKILL", 6580 "PMD_LN_RX_DP_H_RSTB_PKILL", 6581 "PMD_LN_RX_H_PWRDN_PKILL", 6582 "PMD_LN_RX_H_RSTB_PKILL", 6583 "PMD_LN_TX_DP_H_RSTB_PKILL", 6584 "PMD_LN_TX_H_PWRDN_PKILL", 6585 "PMD_LN_TX_H_RSTB_PKILL", 6586 "PMD_LOCK_TIMED_OUT", 6587 "PMD_LOCK_TIMER_PERIOD", 6588 "PMD_MDIO_TRANS_PKILL", 6589 "PMD_RX_CLK_VLD_FRC", 6590 "PMD_RX_CLK_VLD_FRC_VAL", 6591 "PMD_RX_LOCK", 6592 "PMD_RX_LOCK_CHANGE", 6593 "PMD_SIGNAL_DETECT", 6594 "PMD_TX_CLK_VLD_FRC", 6595 "PMD_TX_CLK_VLD_FRC_VAL", 6596 "PMD_TX_DISABLE_PKILL", 6597 "PMD_VCOCLK16_VLD_FRC", 6598 "PMD_VCOCLK16_VLD_FRC_VAL", 6599 "PORT_MODE_SEL", 6600 "POR_H_RSTB", 6601 "POST2TO1", 6602 "PRAM_ABILITY", 6603 "PRBS_CHK_BURST_ERR_CNT", 6604 "PRBS_CHK_BURST_ERR_CNT_EN", 6605 "PRBS_CHK_CLK_EN_FRC_ON", 6606 "PRBS_CHK_EN", 6607 "PRBS_CHK_EN_AUTO_MODE", 6608 "PRBS_CHK_EN_TIMEOUT", 6609 "PRBS_CHK_EN_TIMER_MODE", 6610 "PRBS_CHK_ERR_CNT_BURST_MODE", 6611 "PRBS_CHK_ERR_CNT_LSB", 6612 "PRBS_CHK_ERR_CNT_MSB", 6613 "PRBS_CHK_ERR_CNT_NO_CLR", 6614 "PRBS_CHK_INV", 6615 "PRBS_CHK_LOCK", 6616 "PRBS_CHK_LOCK_CNT", 6617 "PRBS_CHK_LOCK_LOST_LH", 6618 "PRBS_CHK_MODE", 6619 "PRBS_CHK_MODE_SEL", 6620 "PRBS_CHK_OOL_CNT", 6621 "PRBS_GEN_EN", 6622 "PRBS_GEN_ERR_INS", 6623 "PRBS_GEN_INV", 6624 "PRBS_GEN_MODE_SEL", 6625 "PROG_TL_CHAR", 6626 "PROG_TL_EN", 6627 "PRTAD_BCST", 6628 "PRTP_DATA_PATTERN_SEL", 6629 "PRTP_ERR_COUNT", 6630 "PRTP_LOCK", 6631 "PWDB_EXTR_D2C", 6632 "PWRDN_SEQ_TIMER", 6633 "QRSVD1", 6634 "QRSVD2_1_0", 6635 "QRSVD2_8_2", 6636 "QRSVD3", 6637 "QRSVDSWAP", 6638 "RCM_SUM", 6639 "RECCLKDIV", 6640 "REFCALM", 6641 "REFCALMCS", 6642 "REFCALP", 6643 "REFCALPCS", 6644 "REFCALSHUNT", 6645 "REFCLK_DIV2_FRC_VAL", 6646 "REFCLK_DIV4_FRC_VAL", 6647 "REFCLK_DIV_FRC", 6648 "REFCLK_IN_BIAS", 6649 "REFCLK_SEL", 6650 "REFCLK_TERM_FRC", 6651 "REFDIV_TEST_SEL", 6652 "REFOUT_DIV_SEL", 6653 "REF_CML_CURX2", 6654 "REF_CML_PD", 6655 "REF_CMOS_HZ", 6656 "REGID1", 6657 "REGID2", 6658 "REMOTE_FAULT", 6659 "REMOTE_FAULT_IN_BASE_PAGE", 6660 "REMOTE_FAULT_LH", 6661 "REMOTE_PCS_LOOPBACK_ENABLE", 6662 "REMOTE_PMD_LOOPBACK_ENABLE", 6663 "REORDER_EN", 6664 "REORDER_EN_OEN", 6665 "REPLICATION_CNT", 6666 "REPLICATION_CNT_OEN", 6667 "RESCAL", 6668 "RESERVED_ORDERED_BYTE_3", 6669 "RESERVED_ORDERED_SET_LH", 6670 "RESOLVED_PORT_MODE", 6671 "RESTART_PI_EXT_MODE", 6672 "RESTART_PMD_RESTART", 6673 "RESTART_SIGDET", 6674 "REVID2", 6675 "REVID_BONDING", 6676 "REVID_CL72", 6677 "REVID_EEE", 6678 "REVID_LLP", 6679 "REVID_MDIO", 6680 "REVID_MICRO", 6681 "REVID_MODEL", 6682 "REVID_MULTIPLICITY", 6683 "REVID_PIR", 6684 "REVID_PROCESS", 6685 "REVID_REV_LETTER", 6686 "REVID_REV_NUMBER", 6687 "REV_LETTER", 6688 "REV_NUMBER", 6689 "RFEC0_1BIT_ERROR", 6690 "RFEC0_2BIT_ERROR", 6691 "RFEC0_ADDRESS", 6692 "RFEC0_DISABLE_ECC", 6693 "RFEC0_ECC_CORRUPT", 6694 "RFEC0_TM", 6695 "RFEC1_1BIT_ERROR", 6696 "RFEC1_2BIT_ERROR", 6697 "RFEC1_ADDRESS", 6698 "RFEC1_DISABLE_ECC", 6699 "RFEC1_ECC_CORRUPT", 6700 "RFEC1_TM", 6701 "RMLD_STATUS", 6702 "RMT_LPBK_EN", 6703 "RMT_LPBK_PD_EARLY_IND", 6704 "RMT_LPBK_PD_FRC_ON", 6705 "RMT_LPBK_PD_LATE_IND", 6706 "RMT_LPBK_PD_MODE", 6707 "RPAR", 6708 "RSTB_LANE", 6709 "RSTB_TX_LANE", 6710 "RST_SEQ_DIS_FLT_MODE", 6711 "RST_SEQ_TIMER", 6712 "RXDTCT_TH_SEL", 6713 "RXFIFO_EMPTY", 6714 "RXFIFO_FULL", 6715 "RXFIFO_OVERRUN", 6716 "RXFIFO_UNDERRUN", 6717 "RXPKTCNT_L", 6718 "RXPKTCNT_U", 6719 "RXPON_MUX", 6720 "RXPON_SEL", 6721 "RXSM_STATE", 6722 "RX_AGGREGATOR_BYPASS_EN", 6723 "RX_CLK_VLD_LH", 6724 "RX_CLK_VLD_LL", 6725 "RX_CLK_VLD_OVRD", 6726 "RX_CLK_VLD_STS", 6727 "RX_CM_SEL", 6728 "RX_DFE_OS2X_MODE", 6729 "RX_DME_EN", 6730 "RX_DME_EN_OEN", 6731 "RX_DSC_LOCK", 6732 "RX_DSC_LOCK_FRC", 6733 "RX_DSC_LOCK_FRC_VAL", 6734 "RX_GBOX_AFRST_EN", 6735 "RX_LANE_ADDR_0", 6736 "RX_LANE_ADDR_1", 6737 "RX_LANE_ADDR_2", 6738 "RX_LANE_ADDR_3", 6739 "RX_LANE_DP_RESET_STATE", 6740 "RX_LANE_REG_RESET_OCCURRED", 6741 "RX_LN_DP_S_RSTB", 6742 "RX_LN_S_RSTB", 6743 "RX_LOCK_LH", 6744 "RX_LOCK_LL", 6745 "RX_LOCK_OVRD", 6746 "RX_LOCK_STS", 6747 "RX_MODE", 6748 "RX_MSBUS_TYPE", 6749 "RX_MULTICAST_MASK_CONTROL", 6750 "RX_MULTICAST_MASK_CONTROL_STATUS", 6751 "RX_OSR_MODE", 6752 "RX_OSR_MODE_FRC", 6753 "RX_OSR_MODE_FRC_VAL", 6754 "RX_OSR_MODE_OEN", 6755 "RX_OSR_MODE_PIN", 6756 "RX_PI_MANUAL_MODE", 6757 "RX_PI_MANUAL_RESET", 6758 "RX_PI_MANUAL_STROBE", 6759 "RX_PI_PHASE_STEP_CNT", 6760 "RX_PI_PHASE_STEP_DIR", 6761 "RX_PI_SLICERS_EN", 6762 "RX_PKT_CHECK_EN", 6763 "RX_PMD_DP_INVERT", 6764 "RX_PON", 6765 "RX_PORT_SEL", 6766 "RX_PRTP_EN", 6767 "RX_RESTART_PMD", 6768 "RX_RESTART_PMD_HOLD", 6769 "RX_UC_ACK_LANE_CFG_DONE", 6770 "RX_UC_ACK_LANE_DP_RESET", 6771 "R_TEST_MODE_CFG", 6772 "R_TYPE_CODED", 6773 "SCRAMBLER_EN_MASK", 6774 "SCR_MODE", 6775 "SCR_MODE_OEN", 6776 "SCW0", 6777 "SCW0_MASK", 6778 "SCW1", 6779 "SCW1_MASK", 6780 "SCW2", 6781 "SCW2_MASK", 6782 "SCW3", 6783 "SCW3_MASK", 6784 "SCW4", 6785 "SCW4_MASK", 6786 "SCWCOUNT", 6787 "SC_BYPASS", 6788 "SC_FSM_STATUS", 6789 "SC_IGNORE_TX_DATA_VLD", 6790 "SDK_TX_DISABLE", 6791 "SEEDA0", 6792 "SEEDA1", 6793 "SEEDA2", 6794 "SEEDA3", 6795 "SEEDB0", 6796 "SEEDB1", 6797 "SEEDB2", 6798 "SEEDB3", 6799 "SELI1P25DFE", 6800 "SEL_FP3CAP", 6801 "SEL_TXMASTER", 6802 "SEQ_UNEXPECTED_PAGE", 6803 "SET_BER_WINDOW_512", 6804 "SET_MEAS_INCOMPLETE", 6805 "SGMII_FULL_DUPLEX", 6806 "SGMII_MASTER_MODE", 6807 "SGMII_SPD_SWITCH", 6808 "SGMII_SPD_SWITCH_OEN", 6809 "SGMII_SPEED", 6810 "SGMII_TIMER", 6811 "SGMII_TO_CL37_AUTO_ENABLE", 6812 "SHIFT_AMMOUNT", 6813 "SHNTEN_MAIN", 6814 "SHNTMAIN_POST1", 6815 "SHNTMAIN_POST1PRE", 6816 "SHNTMAIN_POST2", 6817 "SHNTPOST1_POST1", 6818 "SHNTPOST1_POST1PRE", 6819 "SHNTPOST2_POST2", 6820 "SHNTPRE_POST1PRE", 6821 "SIGDET_BYPASS", 6822 "SIGDET_CALIBRATION_SELECT", 6823 "SIGDET_DP_RSTB_EN", 6824 "SIGDET_OFFSET_CORRECTION_NEG", 6825 "SIGDET_OFFSET_CORRECTION_POS", 6826 "SIGDET_PWRDN", 6827 "SIGDET_THRESHOLD", 6828 "SIGNAL_DETECT", 6829 "SIGNAL_DETECT_CHANGE", 6830 "SIGNAL_DETECT_FILTER_1US", 6831 "SIGNAL_DETECT_FILTER_COUNT", 6832 "SIGNAL_DETECT_FRC", 6833 "SIGNAL_DETECT_FRC_VAL", 6834 "SIGNAL_DETECT_LH", 6835 "SIGNAL_DETECT_LL", 6836 "SIGNAL_DETECT_OVRD", 6837 "SIGNAL_DETECT_RAW", 6838 "SIGNAL_DETECT_RAW_CHANGE", 6839 "SIGNAL_DETECT_STS", 6840 "SIGNAL_DETECT_THRESH", 6841 "SINGLE_PORT_MODE", 6842 "SKEW_STATUS", 6843 "SLCR_CALIB_RANGE_SEL", 6844 "SLICER_CAL_BYPASS", 6845 "SLICER_CAL_DONE", 6846 "SLICER_CAL_DONE_CLEAR", 6847 "SLICER_CAL_TIMEOUT", 6848 "SOFT_RST_RX", 6849 "SOFT_RST_TX", 6850 "SPARE0", 6851 "SPARE1", 6852 "SPEED", 6853 "STAND_ALONE_MODE", 6854 "STATUS_EN", 6855 "ST_AFE_TX_FIFO_RESETB", 6856 "SUM_GAIN_CTRL", 6857 "SUM_PSEUDO_DIFF", 6858 "SUP_RST_SEQ_FRC", 6859 "SUP_RST_SEQ_FRC_VAL", 6860 "SWAP_LMS_DATA", 6861 "SWAP_LMS_M1", 6862 "SW_AN", 6863 "SW_HCD", 6864 "SW_SPEED", 6865 "SW_SPEED_CHANGE", 6866 "SW_SPEED_CHANGE_DONE", 6867 "SW_SPEED_CONFIG_VLD", 6868 "SYNC66ERRCOUNT", 6869 "SYNCE_MODE_PHY_LN0", 6870 "SYNCE_MODE_PHY_LN1", 6871 "SYNCE_MODE_PHY_LN2", 6872 "SYNCE_MODE_PHY_LN3", 6873 "SYNCE_STAGE0_MODE_PHY_LN0", 6874 "SYNCE_STAGE0_MODE_PHY_LN1", 6875 "SYNCE_STAGE0_MODE_PHY_LN2", 6876 "SYNCE_STAGE0_MODE_PHY_LN3", 6877 "SYNCE_STAGE0_SDM_DIV_PHY_LN", 6878 "SYNC_STATUS", 6879 "SYNC_STATUS_LH", 6880 "SYNC_STATUS_LL", 6881 "TC", 6882 "TDR_BIT_SEL", 6883 "TDR_CYCLE_BIN", 6884 "TDR_CYCLE_SEL", 6885 "TDR_TRNSUM_EN", 6886 "TECH_PROC", 6887 "TERM_CMULT_ENA", 6888 "TERM_CM_EN", 6889 "TERM_CM_ENA", 6890 "TERM_LOWZGND", 6891 "TERM_LOWZVDD", 6892 "TERM_SEL", 6893 "TESTCLK_ENA", 6894 "TESTSEL", 6895 "TEST_AMP", 6896 "TEST_SEL", 6897 "TEST_SEL_OVERWRITE", 6898 "TEST_VC", 6899 "TICKSEL", 6900 "TICK_DENOMINATOR", 6901 "TICK_NUMERATOR_LOWER", 6902 "TICK_NUMERATOR_UPPER", 6903 "TICK_OVERRIDE", 6904 "TIMER_DONE_FRC", 6905 "TIMER_DONE_FRC_VAL", 6906 "TLA_LN_SEQUENCER_FSM_STATUS", 6907 "TLA_LN_SEQUENCER_FSM_STATUS1", 6908 "TRANSMIT_NONCE", 6909 "TRNSUM_CLR_FRC", 6910 "TRNSUM_CLR_FRC_VAL", 6911 "TRNSUM_CLR_SC", 6912 "TRNSUM_DISABLE_SM_CLEAR", 6913 "TRNSUM_EDGE_PATTERN_EN", 6914 "TRNSUM_EN", 6915 "TRNSUM_ERROR_COUNT_EN", 6916 "TRNSUM_ERR_SEL", 6917 "TRNSUM_EYE_CLOSE_PREV_EN", 6918 "TRNSUM_EYE_CLOSURE_EN", 6919 "TRNSUM_EYE_CLOSURE_ERR_SEL", 6920 "TRNSUM_E_HIGH", 6921 "TRNSUM_E_LOW", 6922 "TRNSUM_FRZ_FRC", 6923 "TRNSUM_FRZ_FRC_VAL", 6924 "TRNSUM_GAIN", 6925 "TRNSUM_HIGH", 6926 "TRNSUM_INV_PATTERN_EN", 6927 "TRNSUM_LOW", 6928 "TRNSUM_O_HIGH", 6929 "TRNSUM_O_LOW", 6930 "TRNSUM_PATTERN", 6931 "TRNSUM_PATTERN_BIT_EN", 6932 "TRNSUM_PATTERN_FULL_CHECK_OFF", 6933 "TRNSUM_PATTERN_MATCH_SEL", 6934 "TRNSUM_PRBS_SEL", 6935 "TRNSUM_RANDOM_TAPSEL_DISABLE", 6936 "TRNSUM_TAP_EN", 6937 "TRNSUM_TAP_RANGE_SEL", 6938 "TRNSUM_TAP_SIGN", 6939 "TRNSUM_UNSIGNED_CORR", 6940 "TRNSUM_UNSIGNED_FLIP", 6941 "TXCOM_CL72_MAX_WAIT_TIMER_PERIOD", 6942 "TXCOM_CL72_WAIT_CNTR_LIMIT", 6943 "TXFIFO_EMPTY", 6944 "TXFIFO_FULL", 6945 "TXFIFO_OVERRUN", 6946 "TXFIFO_UNDERRUN", 6947 "TXFIR_DC_LEVEL_0P5X", 6948 "TXFIR_DC_LEVEL_1X", 6949 "TXFIR_DC_LEVEL_2X_0", 6950 "TXFIR_DC_LEVEL_2X_1", 6951 "TXFIR_DC_LEVEL_POST1PRE_1X_0", 6952 "TXFIR_DC_LEVEL_POST1PRE_1X_1", 6953 "TXFIR_DC_LEVEL_POST1PRE_2X_0", 6954 "TXFIR_DC_LEVEL_POST1PRE_2X_1", 6955 "TXFIR_DC_LEVEL_POST1PRE_2X_2", 6956 "TXFIR_DC_LEVEL_POST1PRE_2X_3", 6957 "TXFIR_DC_LEVEL_POST1_1X_0", 6958 "TXFIR_DC_LEVEL_POST1_1X_1", 6959 "TXFIR_DC_LEVEL_POST1_2X_0", 6960 "TXFIR_DC_LEVEL_POST1_2X_1", 6961 "TXFIR_DC_LEVEL_POST1_2X_2", 6962 "TXFIR_DC_LEVEL_POST2_1X_0", 6963 "TXFIR_DC_LEVEL_POST2_1X_1", 6964 "TXFIR_DC_LEVEL_POST2_2X_0", 6965 "TXFIR_DC_LEVEL_POST2_2X_1", 6966 "TXFIR_POST1_POST1PRE_1X_0", 6967 "TXFIR_POST1_POST1PRE_1X_1", 6968 "TXFIR_POST1_POST1PRE_2X_0", 6969 "TXFIR_POST1_POST1PRE_2X_1", 6970 "TXFIR_POST1_POST1PRE_2X_2", 6971 "TXFIR_POST1_POST1PRE_2X_3", 6972 "TXFIR_POST1_POST1_1X_0", 6973 "TXFIR_POST1_POST1_1X_1", 6974 "TXFIR_POST1_POST1_2X_0", 6975 "TXFIR_POST1_POST1_2X_1", 6976 "TXFIR_POST1_POST1_2X_2", 6977 "TXFIR_POST2", 6978 "TXFIR_POST2_POST2_1X_0", 6979 "TXFIR_POST2_POST2_1X_1", 6980 "TXFIR_POST2_POST2_2X_0", 6981 "TXFIR_POST2_POST2_2X_1", 6982 "TXFIR_PRE_POST1PRE_1X_0", 6983 "TXFIR_PRE_POST1PRE_1X_1", 6984 "TXFIR_PRE_POST1PRE_2X_0", 6985 "TXFIR_PRE_POST1PRE_2X_1", 6986 "TXFIR_PRE_POST1PRE_2X_2", 6987 "TXFIR_PRE_POST1PRE_2X_3", 6988 "TXPKTCNT_L", 6989 "TXPKTCNT_U", 6990 "TXPON_MUX", 6991 "TXPON_SEL", 6992 "TXSM_STATE", 6993 "TX_CLK_VLD_LH", 6994 "TX_CLK_VLD_LL", 6995 "TX_CLK_VLD_OVRD", 6996 "TX_CLK_VLD_STS", 6997 "TX_DISABLE", 6998 "TX_DISABLE_OEN", 6999 "TX_DISABLE_OUTPUT_SEL", 7000 "TX_DISABLE_STATUS", 7001 "TX_DISABLE_TIMER_CTRL", 7002 "TX_DISABLE_TIMER_PERIOD", 7003 "TX_DISABLE_TRIGGER", 7004 "TX_EEE_ALERT_EN", 7005 "TX_EEE_QUIET_EN", 7006 "TX_ELEC_IDLE_STATUS", 7007 "TX_FIFO_OVFB", 7008 "TX_FIFO_OVFB_FALL_EDGE_LH", 7009 "TX_FIFO_RESETB", 7010 "TX_FIFO_WATERMARK", 7011 "TX_LANE_ADDR_0", 7012 "TX_LANE_ADDR_1", 7013 "TX_LANE_ADDR_2", 7014 "TX_LANE_ADDR_3", 7015 "TX_LANE_DP_RESET_STATE", 7016 "TX_LANE_RATE_MISMATCH", 7017 "TX_LANE_RATE_MISMATCH_VL1", 7018 "TX_LANE_REG_RESET_OCCURRED", 7019 "TX_LANE_RESET_RELEASED", 7020 "TX_LANE_RESET_RELEASED_INDEX", 7021 "TX_LINK_INTERRUPT", 7022 "TX_LN_DP_S_RSTB", 7023 "TX_LN_S_RSTB", 7024 "TX_LOCAL_FAULT", 7025 "TX_LPI_RECEIVED", 7026 "TX_MODE", 7027 "TX_MSBUS_TYPE", 7028 "TX_MULTICAST_MASK_CONTROL", 7029 "TX_MULTICAST_MASK_CONTROL_STATUS", 7030 "TX_MUX_SEL_ORDER", 7031 "TX_OSR_MODE", 7032 "TX_OSR_MODE_FRC", 7033 "TX_OSR_MODE_FRC_VAL", 7034 "TX_OSR_MODE_OEN", 7035 "TX_OSR_MODE_PIN", 7036 "TX_PCS_BIT_REPL_EN", 7037 "TX_PCS_NATIVE_ANA_FRMT_EN", 7038 "TX_PI_EN", 7039 "TX_PI_EXT_CTRL_EN", 7040 "TX_PI_EXT_PD_SEL", 7041 "TX_PI_EXT_PHASE_BWSEL_INTEG", 7042 "TX_PI_FIRST_ORDER_BWSEL_INTEG", 7043 "TX_PI_FRC_PHASE_STEP_MUX_SEL", 7044 "TX_PI_FREQ_OVERRIDE_EN", 7045 "TX_PI_FREQ_OVERRIDE_VAL", 7046 "TX_PI_FRZ_FRC", 7047 "TX_PI_FRZ_FRC_VAL", 7048 "TX_PI_FRZ_MODE", 7049 "TX_PI_HS_FIFO_PHSERR", 7050 "TX_PI_HS_FIFO_PHSERR_INVERT", 7051 "TX_PI_INTEG1_REG", 7052 "TX_PI_INTEG2_REG", 7053 "TX_PI_JITTER_FILTER_EN", 7054 "TX_PI_JIT_AMP", 7055 "TX_PI_JIT_FREQ_IDX", 7056 "TX_PI_JIT_SSC_FREQ_MODE", 7057 "TX_PI_LOOP_FILTER_STABLE", 7058 "TX_PI_PD_BYPASS_FLT", 7059 "TX_PI_PD_BYPASS_VCO", 7060 "TX_PI_PHASE_CNTR", 7061 "TX_PI_PHASE_ERR", 7062 "TX_PI_PHASE_INVERT", 7063 "TX_PI_PHASE_OVERRIDE", 7064 "TX_PI_PHASE_STEP_DIR", 7065 "TX_PI_PHASE_STEP_NUM", 7066 "TX_PI_PHASE_STROBE", 7067 "TX_PI_REPEATER_MODE_EN", 7068 "TX_PI_RESET_CODE_DBG", 7069 "TX_PI_SECOND_ORDER_BWSEL_INTEG", 7070 "TX_PI_SECOND_ORDER_LOOP_EN", 7071 "TX_PI_SJ_GEN_EN", 7072 "TX_PI_SSC_GEN_EN", 7073 "TX_PMD_DP_INVERT", 7074 "TX_PON", 7075 "TX_PRTP_EN", 7076 "TX_PWRDN", 7077 "TX_REMOTE_FAULT", 7078 "TX_RESET_COUNT", 7079 "TX_TEST_PORT_SEL", 7080 "TX_UC_ACK_LANE_CFG_DONE", 7081 "TX_UC_ACK_LANE_DP_RESET", 7082 "T_TEST_MODE_CFG", 7083 "T_TYPE_CODED", 7084 "UC_ACK_CORE_CFG_DONE", 7085 "UC_ACK_CORE_DP_RESET", 7086 "UC_ACK_DSC_CONFIG", 7087 "UC_ACK_DSC_EEE_DONE", 7088 "UC_ACK_DSC_RESTART", 7089 "UC_ACK_LANE_CFG_DONE", 7090 "UC_ACK_LANE_DP_RESET", 7091 "UC_ACTIVE", 7092 "UC_AFE_SIGDET", 7093 "UC_AFE_SIGDET_CHANGE", 7094 "UC_DSC_ERROR_FOUND", 7095 "UC_DSC_GP_UC_REQ", 7096 "UC_DSC_READY_FOR_CMD", 7097 "UC_DSC_SCRATCH", 7098 "UC_DSC_SUPP_INFO", 7099 "UC_EXT_SIGDET", 7100 "UC_EXT_SIGDET_CHANGE", 7101 "UC_PMD_RX_LOCK", 7102 "UC_PMD_RX_LOCK_CHANGE", 7103 "UC_SIGNAL_DETECT", 7104 "UC_SIGNAL_DETECT_CHANGE", 7105 "UC_TRNSUM_EN", 7106 "UC_TUNE_EN", 7107 "UNCORCOUNTH", 7108 "UNCORCOUNTL", 7109 "VCOBUFPON_MUX", 7110 "VCOBUFPON_SEL", 7111 "VCOBUF_PON", 7112 "VCOCLK16_S_COMCLK_FRC_ON", 7113 "VCOCLK16_S_COMCLK_SEL", 7114 "VCOFB_DIV", 7115 "VCOPON_MUX", 7116 "VCOPON_SEL", 7117 "VCORANGE_SEL", 7118 "VCO_GM_BOOST", 7119 "VCO_HKVCO", 7120 "VCO_I_BOOST", 7121 "VCO_PON", 7122 "VCO_RANGE", 7123 "VCO_RANGE_MUX", 7124 "VCO_RST_EN", 7125 "VCO_SUPPLY_ADJ", 7126 "VCO_TEST_CLK_EN", 7127 "VGA1_CTRL_BIN", 7128 "VGA2_CTRL_BIN", 7129 "VGA3_CTRL_BIN", 7130 "VGAPON_MUX", 7131 "VGAPON_SEL", 7132 "VGA_ACC_HYS_EN", 7133 "VGA_AFFECTED_BY_DFE1", 7134 "VGA_BIN", 7135 "VGA_CM_SEL", 7136 "VGA_EN", 7137 "VGA_EN_HGAIN", 7138 "VGA_ERR_GAIN", 7139 "VGA_ERR_SEL", 7140 "VGA_HWTUNE_MIN", 7141 "VGA_INV_M1", 7142 "VGA_INV_P1", 7143 "VGA_OP_SHORT_NORM", 7144 "VGA_OP_SHORT_OFFCAL", 7145 "VGA_OUT_IDLE", 7146 "VGA_P1_ACC_CLR", 7147 "VGA_P1_GRADIENT_INVERT", 7148 "VGA_PATTERN", 7149 "VGA_PATTERN_BIT_EN", 7150 "VGA_PON", 7151 "VGA_UPDATE_GAIN", 7152 "VGA_UPDATE_STYLE", 7153 "VGA_WANTS_TO_GO_LOW", 7154 "VL_ON_LL_0", 7155 "VL_ON_LL_1", 7156 "WIS", 7157 "WM", 7158 }; 7159 7160 #endif 7161 #endif 7162 #endif 7163 #endif /* PHYMOD_CONFIG_INCLUDE_FIELD_INFO */ 7164 7165 7166 7167 /******************************************************************************* 7168 * 7169 * The following is the symbol table itself. 7170 * It defines the entries for all registers and memories. 7171 * It also incorporates the field information for each register and memory if 7172 * applicable. 7173 */ 7174 static const phymod_symbol_t bcmi_tsce16_xgxs_syms[] = { 7175 #ifndef PHYMOD_CONFIG_EXCLUDE_CHIP_SYMBOLS_BCMI_TSCE16_XGXS 7176 { 7177 BCMI_TSCE16_XGXS_PHYID2r, 7178 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7179 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7180 BCMI_TSCE16_XGXS_PHYID2r_fields, 7181 #else 7182 0, 7183 #endif 7184 #endif 7185 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7186 PHYMOD_SYMBOL_FLAG_REGISTER, 7187 "PHYID2r", 7188 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7189 "CL22_B0_PHYID2", 7190 NULL, 7191 #endif 7192 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7193 0x600d, /* 24589 */ 7194 0, 7195 #endif 7196 }, 7197 { 7198 BCMI_TSCE16_XGXS_PHYID3r, 7199 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7200 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7201 BCMI_TSCE16_XGXS_PHYID3r_fields, 7202 #else 7203 0, 7204 #endif 7205 #endif 7206 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7207 PHYMOD_SYMBOL_FLAG_REGISTER, 7208 "PHYID3r", 7209 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7210 "CL22_B0_PHYID3", 7211 NULL, 7212 #endif 7213 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7214 0x8770, /* 34672 */ 7215 0, 7216 #endif 7217 }, 7218 { 7219 BCMI_TSCE16_XGXS_ACC_CTLr, 7220 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7221 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7222 BCMI_TSCE16_XGXS_ACC_CTLr_fields, 7223 #else 7224 0, 7225 #endif 7226 #endif 7227 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7228 PHYMOD_SYMBOL_FLAG_REGISTER, 7229 "ACC_CTLr", 7230 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7231 "MDIO_CL22_IEEE_ACC_CTRL", 7232 NULL, 7233 #endif 7234 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7235 0x0, /* 0 */ 7236 0, 7237 #endif 7238 }, 7239 { 7240 BCMI_TSCE16_XGXS_ACC_ADDR_DATAr, 7241 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7242 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7243 BCMI_TSCE16_XGXS_ACC_ADDR_DATAr_fields, 7244 #else 7245 0, 7246 #endif 7247 #endif 7248 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7249 PHYMOD_SYMBOL_FLAG_REGISTER, 7250 "ACC_ADDR_DATAr", 7251 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7252 "MDIO_CL22_IEEE_ACC_ADDR_DATA", 7253 NULL, 7254 #endif 7255 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7256 0x0, /* 0 */ 7257 0, 7258 #endif 7259 }, 7260 { 7261 BCMI_TSCE16_XGXS_CL72IT_BASE_R_PMD_CTLr, 7262 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7263 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7264 BCMI_TSCE16_XGXS_CL72IT_BASE_R_PMD_CTLr_fields, 7265 #else 7266 0, 7267 #endif 7268 #endif 7269 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7270 PHYMOD_SYMBOL_FLAG_REGISTER, 7271 "CL72IT_BASE_R_PMD_CTLr", 7272 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7273 "CL72_IEEE_TX_CL72IT_BASE_R_PMD_CONTROL_REGISTER_150", 7274 NULL, 7275 #endif 7276 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7277 0x0, /* 0 */ 7278 0, 7279 #endif 7280 }, 7281 { 7282 BCMI_TSCE16_XGXS_CL72IT_BASE_R_PMD_STSr, 7283 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7284 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7285 BCMI_TSCE16_XGXS_CL72IT_BASE_R_PMD_STSr_fields, 7286 #else 7287 0, 7288 #endif 7289 #endif 7290 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7291 PHYMOD_SYMBOL_FLAG_REGISTER, 7292 "CL72IT_BASE_R_PMD_STSr", 7293 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7294 "CL72_IEEE_TX_CL72IT_BASE_R_PMD_STATUS_REGISTER_151", 7295 NULL, 7296 #endif 7297 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7298 0x0, /* 0 */ 7299 0, 7300 #endif 7301 }, 7302 { 7303 BCMI_TSCE16_XGXS_CL72IR_BASE_R_LP_COEFF_UPDr, 7304 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7305 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7306 BCMI_TSCE16_XGXS_CL72IR_BASE_R_LP_COEFF_UPDr_fields, 7307 #else 7308 0, 7309 #endif 7310 #endif 7311 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7312 PHYMOD_SYMBOL_FLAG_REGISTER, 7313 "CL72IR_BASE_R_LP_COEFF_UPDr", 7314 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7315 "CL72_IEEE_RX_CL72IR_BASE_R_LP_COEFF_UPDATE_REGISTER_152", 7316 NULL, 7317 #endif 7318 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7319 0x0, /* 0 */ 7320 0, 7321 #endif 7322 }, 7323 { 7324 BCMI_TSCE16_XGXS_CL72IR_BASE_R_LP_STS_REPr, 7325 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7326 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7327 BCMI_TSCE16_XGXS_CL72IR_BASE_R_LP_STS_REPr_fields, 7328 #else 7329 0, 7330 #endif 7331 #endif 7332 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7333 PHYMOD_SYMBOL_FLAG_REGISTER, 7334 "CL72IR_BASE_R_LP_STS_REPr", 7335 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7336 "CL72_IEEE_RX_CL72IR_BASE_R_LP_STATUS_REPORT_REGISTER_153", 7337 NULL, 7338 #endif 7339 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7340 0x0, /* 0 */ 7341 0, 7342 #endif 7343 }, 7344 { 7345 BCMI_TSCE16_XGXS_CL72IT_BASE_R_LD_COEFF_UPDr, 7346 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7347 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7348 BCMI_TSCE16_XGXS_CL72IT_BASE_R_LD_COEFF_UPDr_fields, 7349 #else 7350 0, 7351 #endif 7352 #endif 7353 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7354 PHYMOD_SYMBOL_FLAG_REGISTER, 7355 "CL72IT_BASE_R_LD_COEFF_UPDr", 7356 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7357 "CL72_IEEE_TX_CL72IT_BASE_R_LD_COEFF_UPDATE_REGISTER_154", 7358 NULL, 7359 #endif 7360 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7361 0x0, /* 0 */ 7362 0, 7363 #endif 7364 }, 7365 { 7366 BCMI_TSCE16_XGXS_CL72IT_BASE_R_LD_STS_REPr, 7367 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7368 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7369 BCMI_TSCE16_XGXS_CL72IT_BASE_R_LD_STS_REPr_fields, 7370 #else 7371 0, 7372 #endif 7373 #endif 7374 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7375 PHYMOD_SYMBOL_FLAG_REGISTER, 7376 "CL72IT_BASE_R_LD_STS_REPr", 7377 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7378 "CL72_IEEE_TX_CL72IT_BASE_R_LD_STATUS_REPORT_REGISTER_155", 7379 NULL, 7380 #endif 7381 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7382 0x0, /* 0 */ 7383 0, 7384 #endif 7385 }, 7386 { 7387 BCMI_TSCE16_XGXS_MAIN0_SETUPr, 7388 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7389 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7390 BCMI_TSCE16_XGXS_MAIN0_SETUPr_fields, 7391 #else 7392 0, 7393 #endif 7394 #endif 7395 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7396 PHYMOD_SYMBOL_FLAG_REGISTER, 7397 "MAIN0_SETUPr", 7398 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7399 NULL, 7400 NULL, 7401 #endif 7402 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7403 0x0, /* 0 */ 7404 0, 7405 #endif 7406 }, 7407 { 7408 BCMI_TSCE16_XGXS_MAIN0_SYNCE_CTLr, 7409 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7410 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7411 BCMI_TSCE16_XGXS_MAIN0_SYNCE_CTLr_fields, 7412 #else 7413 0, 7414 #endif 7415 #endif 7416 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7417 PHYMOD_SYMBOL_FLAG_REGISTER, 7418 "MAIN0_SYNCE_CTLr", 7419 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7420 "MAIN0_SYNCE_CONTROL", 7421 NULL, 7422 #endif 7423 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7424 0xaa, /* 170 */ 7425 0, 7426 #endif 7427 }, 7428 { 7429 BCMI_TSCE16_XGXS_MAIN0_SYNCE_CTL_STAGE0r, 7430 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7431 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7432 BCMI_TSCE16_XGXS_MAIN0_SYNCE_CTL_STAGE0r_fields, 7433 #else 7434 0, 7435 #endif 7436 #endif 7437 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7438 PHYMOD_SYMBOL_FLAG_REGISTER, 7439 "MAIN0_SYNCE_CTL_STAGE0r", 7440 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7441 "MAIN0_SYNCE_CONTROL_STAGE0", 7442 NULL, 7443 #endif 7444 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7445 0x0, /* 0 */ 7446 0, 7447 #endif 7448 }, 7449 { 7450 BCMI_TSCE16_XGXS_MAIN0_LN_SWPr, 7451 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7452 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7453 BCMI_TSCE16_XGXS_MAIN0_LN_SWPr_fields, 7454 #else 7455 0, 7456 #endif 7457 #endif 7458 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7459 PHYMOD_SYMBOL_FLAG_REGISTER, 7460 "MAIN0_LN_SWPr", 7461 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7462 "MAIN0_LANE_SWAP", 7463 NULL, 7464 #endif 7465 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7466 0xe4e4, /* 58596 */ 7467 0, 7468 #endif 7469 }, 7470 { 7471 BCMI_TSCE16_XGXS_MAIN0_DEVINPKG5r, 7472 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7473 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7474 BCMI_TSCE16_XGXS_MAIN0_DEVINPKG5r_fields, 7475 #else 7476 0, 7477 #endif 7478 #endif 7479 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7480 PHYMOD_SYMBOL_FLAG_REGISTER, 7481 "MAIN0_DEVINPKG5r", 7482 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7483 "MAIN0_DEVICEINPKG5", 7484 NULL, 7485 #endif 7486 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7487 0x83, /* 131 */ 7488 0, 7489 #endif 7490 }, 7491 { 7492 BCMI_TSCE16_XGXS_MAIN0_MISCr, 7493 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7494 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7495 BCMI_TSCE16_XGXS_MAIN0_MISCr_fields, 7496 #else 7497 0, 7498 #endif 7499 #endif 7500 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7501 PHYMOD_SYMBOL_FLAG_REGISTER, 7502 "MAIN0_MISCr", 7503 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7504 NULL, 7505 NULL, 7506 #endif 7507 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7508 0x0, /* 0 */ 7509 0, 7510 #endif 7511 }, 7512 { 7513 BCMI_TSCE16_XGXS_MAIN0_TICK_CTL1r, 7514 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7515 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7516 BCMI_TSCE16_XGXS_MAIN0_TICK_CTL1r_fields, 7517 #else 7518 0, 7519 #endif 7520 #endif 7521 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7522 PHYMOD_SYMBOL_FLAG_REGISTER, 7523 "MAIN0_TICK_CTL1r", 7524 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7525 "MAIN0_TICK_CONTROL_1", 7526 NULL, 7527 #endif 7528 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7529 0x0, /* 0 */ 7530 0, 7531 #endif 7532 }, 7533 { 7534 BCMI_TSCE16_XGXS_MAIN0_TICK_CTL0r, 7535 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7536 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7537 BCMI_TSCE16_XGXS_MAIN0_TICK_CTL0r_fields, 7538 #else 7539 0, 7540 #endif 7541 #endif 7542 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7543 PHYMOD_SYMBOL_FLAG_REGISTER, 7544 "MAIN0_TICK_CTL0r", 7545 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7546 "MAIN0_TICK_CONTROL_0", 7547 NULL, 7548 #endif 7549 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7550 0x0, /* 0 */ 7551 0, 7552 #endif 7553 }, 7554 { 7555 BCMI_TSCE16_XGXS_MAIN0_LPBK_CTLr, 7556 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7557 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7558 BCMI_TSCE16_XGXS_MAIN0_LPBK_CTLr_fields, 7559 #else 7560 0, 7561 #endif 7562 #endif 7563 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7564 PHYMOD_SYMBOL_FLAG_REGISTER, 7565 "MAIN0_LPBK_CTLr", 7566 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7567 "MAIN0_LOOPBACK_CONTROL", 7568 NULL, 7569 #endif 7570 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7571 0x0, /* 0 */ 7572 0, 7573 #endif 7574 }, 7575 { 7576 BCMI_TSCE16_XGXS_MAIN0_MDIO_BCSTr, 7577 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7578 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7579 BCMI_TSCE16_XGXS_MAIN0_MDIO_BCSTr_fields, 7580 #else 7581 0, 7582 #endif 7583 #endif 7584 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7585 PHYMOD_SYMBOL_FLAG_REGISTER, 7586 "MAIN0_MDIO_BCSTr", 7587 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7588 "MAIN0_MDIO_BROADCAST", 7589 NULL, 7590 #endif 7591 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7592 0xf800, /* 63488 */ 7593 0, 7594 #endif 7595 }, 7596 { 7597 BCMI_TSCE16_XGXS_MAIN0_SERDESIDr, 7598 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7599 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7600 BCMI_TSCE16_XGXS_MAIN0_SERDESIDr_fields, 7601 #else 7602 0, 7603 #endif 7604 #endif 7605 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7606 PHYMOD_SYMBOL_FLAG_REGISTER, 7607 "MAIN0_SERDESIDr", 7608 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7609 NULL, 7610 NULL, 7611 #endif 7612 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7613 0x2d2, /* 722 */ 7614 0, 7615 #endif 7616 }, 7617 { 7618 BCMI_TSCE16_XGXS_PMD_X1_CTLr, 7619 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7620 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7621 BCMI_TSCE16_XGXS_PMD_X1_CTLr_fields, 7622 #else 7623 0, 7624 #endif 7625 #endif 7626 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7627 PHYMOD_SYMBOL_FLAG_REGISTER, 7628 "PMD_X1_CTLr", 7629 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7630 "PMD_X1_CONTROL", 7631 NULL, 7632 #endif 7633 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7634 0x0, /* 0 */ 7635 0, 7636 #endif 7637 }, 7638 { 7639 BCMI_TSCE16_XGXS_PMD_X1_MODEr, 7640 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7641 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7642 BCMI_TSCE16_XGXS_PMD_X1_MODEr_fields, 7643 #else 7644 0, 7645 #endif 7646 #endif 7647 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7648 PHYMOD_SYMBOL_FLAG_REGISTER, 7649 "PMD_X1_MODEr", 7650 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7651 NULL, 7652 NULL, 7653 #endif 7654 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7655 0x0, /* 0 */ 7656 0, 7657 #endif 7658 }, 7659 { 7660 BCMI_TSCE16_XGXS_PMD_X1_STSr, 7661 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7662 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7663 BCMI_TSCE16_XGXS_PMD_X1_STSr_fields, 7664 #else 7665 0, 7666 #endif 7667 #endif 7668 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7669 PHYMOD_SYMBOL_FLAG_REGISTER, 7670 "PMD_X1_STSr", 7671 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7672 "PMD_X1_STATUS", 7673 NULL, 7674 #endif 7675 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7676 0x0, /* 0 */ 7677 0, 7678 #endif 7679 }, 7680 { 7681 BCMI_TSCE16_XGXS_PMD_X1_LATCH_STSr, 7682 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7683 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7684 BCMI_TSCE16_XGXS_PMD_X1_LATCH_STSr_fields, 7685 #else 7686 0, 7687 #endif 7688 #endif 7689 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7690 PHYMOD_SYMBOL_FLAG_REGISTER, 7691 "PMD_X1_LATCH_STSr", 7692 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7693 "PMD_X1_LATCH_STATUS", 7694 NULL, 7695 #endif 7696 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7697 0x0, /* 0 */ 7698 0, 7699 #endif 7700 }, 7701 { 7702 BCMI_TSCE16_XGXS_PMD_X1_OVRRr, 7703 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7704 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7705 BCMI_TSCE16_XGXS_PMD_X1_OVRRr_fields, 7706 #else 7707 0, 7708 #endif 7709 #endif 7710 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7711 PHYMOD_SYMBOL_FLAG_REGISTER, 7712 "PMD_X1_OVRRr", 7713 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7714 "PMD_X1_OVERRIDE", 7715 NULL, 7716 #endif 7717 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7718 0x0, /* 0 */ 7719 0, 7720 #endif 7721 }, 7722 { 7723 BCMI_TSCE16_XGXS_PKTGEN_CTL1r, 7724 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7725 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7726 BCMI_TSCE16_XGXS_PKTGEN_CTL1r_fields, 7727 #else 7728 0, 7729 #endif 7730 #endif 7731 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7732 PHYMOD_SYMBOL_FLAG_REGISTER, 7733 "PKTGEN_CTL1r", 7734 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7735 "PKTGEN0_PKTGENCTRL1", 7736 NULL, 7737 #endif 7738 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7739 0x0, /* 0 */ 7740 0, 7741 #endif 7742 }, 7743 { 7744 BCMI_TSCE16_XGXS_PKTGEN_CTL2r, 7745 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7746 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7747 BCMI_TSCE16_XGXS_PKTGEN_CTL2r_fields, 7748 #else 7749 0, 7750 #endif 7751 #endif 7752 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7753 PHYMOD_SYMBOL_FLAG_REGISTER, 7754 "PKTGEN_CTL2r", 7755 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7756 "PKTGEN0_PKTGENCTRL2", 7757 NULL, 7758 #endif 7759 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7760 0x28, /* 40 */ 7761 0, 7762 #endif 7763 }, 7764 { 7765 BCMI_TSCE16_XGXS_PKTGEN_PRTPCTLr, 7766 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7767 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7768 BCMI_TSCE16_XGXS_PKTGEN_PRTPCTLr_fields, 7769 #else 7770 0, 7771 #endif 7772 #endif 7773 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7774 PHYMOD_SYMBOL_FLAG_REGISTER, 7775 "PKTGEN_PRTPCTLr", 7776 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7777 "PKTGEN0_PRTPCONTROL", 7778 NULL, 7779 #endif 7780 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7781 0x0, /* 0 */ 7782 0, 7783 #endif 7784 }, 7785 { 7786 BCMI_TSCE16_XGXS_PKTGEN_CRCERRCNTr, 7787 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7788 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7789 BCMI_TSCE16_XGXS_PKTGEN_CRCERRCNTr_fields, 7790 #else 7791 0, 7792 #endif 7793 #endif 7794 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7795 PHYMOD_SYMBOL_FLAG_REGISTER, 7796 "PKTGEN_CRCERRCNTr", 7797 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7798 "PKTGEN0_CRCERRORCOUNT", 7799 NULL, 7800 #endif 7801 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7802 0x0, /* 0 */ 7803 0, 7804 #endif 7805 }, 7806 { 7807 BCMI_TSCE16_XGXS_PKTGEN_PRTPERRCTRr, 7808 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7809 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7810 BCMI_TSCE16_XGXS_PKTGEN_PRTPERRCTRr_fields, 7811 #else 7812 0, 7813 #endif 7814 #endif 7815 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7816 PHYMOD_SYMBOL_FLAG_REGISTER, 7817 "PKTGEN_PRTPERRCTRr", 7818 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7819 "PKTGEN0_PRTPERRORCOUNTER", 7820 NULL, 7821 #endif 7822 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7823 0x0, /* 0 */ 7824 0, 7825 #endif 7826 }, 7827 { 7828 BCMI_TSCE16_XGXS_PKTGEN_PRTPLOCKSTSr, 7829 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7830 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7831 BCMI_TSCE16_XGXS_PKTGEN_PRTPLOCKSTSr_fields, 7832 #else 7833 0, 7834 #endif 7835 #endif 7836 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7837 PHYMOD_SYMBOL_FLAG_REGISTER, 7838 "PKTGEN_PRTPLOCKSTSr", 7839 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7840 "PKTGEN0_PRTPLOCKSTATUS", 7841 NULL, 7842 #endif 7843 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7844 0x0, /* 0 */ 7845 0, 7846 #endif 7847 }, 7848 { 7849 BCMI_TSCE16_XGXS_PKTGEN_PCS_SEEDA0r, 7850 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7851 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7852 BCMI_TSCE16_XGXS_PKTGEN_PCS_SEEDA0r_fields, 7853 #else 7854 0, 7855 #endif 7856 #endif 7857 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7858 PHYMOD_SYMBOL_FLAG_REGISTER, 7859 "PKTGEN_PCS_SEEDA0r", 7860 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7861 "PKTGEN0_PCS_SEEDA0", 7862 NULL, 7863 #endif 7864 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7865 0x0, /* 0 */ 7866 0, 7867 #endif 7868 }, 7869 { 7870 BCMI_TSCE16_XGXS_PKTGEN_PCS_SEEDA1r, 7871 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7872 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7873 BCMI_TSCE16_XGXS_PKTGEN_PCS_SEEDA1r_fields, 7874 #else 7875 0, 7876 #endif 7877 #endif 7878 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7879 PHYMOD_SYMBOL_FLAG_REGISTER, 7880 "PKTGEN_PCS_SEEDA1r", 7881 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7882 "PKTGEN0_PCS_SEEDA1", 7883 NULL, 7884 #endif 7885 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7886 0x0, /* 0 */ 7887 0, 7888 #endif 7889 }, 7890 { 7891 BCMI_TSCE16_XGXS_PKTGEN_PCS_SEEDA2r, 7892 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7893 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7894 BCMI_TSCE16_XGXS_PKTGEN_PCS_SEEDA2r_fields, 7895 #else 7896 0, 7897 #endif 7898 #endif 7899 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7900 PHYMOD_SYMBOL_FLAG_REGISTER, 7901 "PKTGEN_PCS_SEEDA2r", 7902 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7903 "PKTGEN0_PCS_SEEDA2", 7904 NULL, 7905 #endif 7906 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7907 0x0, /* 0 */ 7908 0, 7909 #endif 7910 }, 7911 { 7912 BCMI_TSCE16_XGXS_PKTGEN_PCS_SEEDA3r, 7913 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7914 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7915 BCMI_TSCE16_XGXS_PKTGEN_PCS_SEEDA3r_fields, 7916 #else 7917 0, 7918 #endif 7919 #endif 7920 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7921 PHYMOD_SYMBOL_FLAG_REGISTER, 7922 "PKTGEN_PCS_SEEDA3r", 7923 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7924 "PKTGEN0_PCS_SEEDA3", 7925 NULL, 7926 #endif 7927 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7928 0x0, /* 0 */ 7929 0, 7930 #endif 7931 }, 7932 { 7933 BCMI_TSCE16_XGXS_PKTGEN_PCS_SEEDB0r, 7934 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7935 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7936 BCMI_TSCE16_XGXS_PKTGEN_PCS_SEEDB0r_fields, 7937 #else 7938 0, 7939 #endif 7940 #endif 7941 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7942 PHYMOD_SYMBOL_FLAG_REGISTER, 7943 "PKTGEN_PCS_SEEDB0r", 7944 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7945 "PKTGEN0_PCS_SEEDB0", 7946 NULL, 7947 #endif 7948 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7949 0x0, /* 0 */ 7950 0, 7951 #endif 7952 }, 7953 { 7954 BCMI_TSCE16_XGXS_PKTGEN_PCS_SEEDB1r, 7955 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7956 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7957 BCMI_TSCE16_XGXS_PKTGEN_PCS_SEEDB1r_fields, 7958 #else 7959 0, 7960 #endif 7961 #endif 7962 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7963 PHYMOD_SYMBOL_FLAG_REGISTER, 7964 "PKTGEN_PCS_SEEDB1r", 7965 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7966 "PKTGEN0_PCS_SEEDB1", 7967 NULL, 7968 #endif 7969 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7970 0x0, /* 0 */ 7971 0, 7972 #endif 7973 }, 7974 { 7975 BCMI_TSCE16_XGXS_PKTGEN_PCS_SEEDB2r, 7976 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7977 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7978 BCMI_TSCE16_XGXS_PKTGEN_PCS_SEEDB2r_fields, 7979 #else 7980 0, 7981 #endif 7982 #endif 7983 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7984 PHYMOD_SYMBOL_FLAG_REGISTER, 7985 "PKTGEN_PCS_SEEDB2r", 7986 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7987 "PKTGEN0_PCS_SEEDB2", 7988 NULL, 7989 #endif 7990 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7991 0x0, /* 0 */ 7992 0, 7993 #endif 7994 }, 7995 { 7996 BCMI_TSCE16_XGXS_PKTGEN_PCS_SEEDB3r, 7997 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7998 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 7999 BCMI_TSCE16_XGXS_PKTGEN_PCS_SEEDB3r_fields, 8000 #else 8001 0, 8002 #endif 8003 #endif 8004 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8005 PHYMOD_SYMBOL_FLAG_REGISTER, 8006 "PKTGEN_PCS_SEEDB3r", 8007 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8008 "PKTGEN0_PCS_SEEDB3", 8009 NULL, 8010 #endif 8011 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8012 0x0, /* 0 */ 8013 0, 8014 #endif 8015 }, 8016 { 8017 BCMI_TSCE16_XGXS_PKTGEN_PAYLOADBYTESr, 8018 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8019 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8020 BCMI_TSCE16_XGXS_PKTGEN_PAYLOADBYTESr_fields, 8021 #else 8022 0, 8023 #endif 8024 #endif 8025 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8026 PHYMOD_SYMBOL_FLAG_REGISTER, 8027 "PKTGEN_PAYLOADBYTESr", 8028 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8029 "PKTGEN1_PAYLOADBYTES", 8030 NULL, 8031 #endif 8032 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8033 0x0, /* 0 */ 8034 0, 8035 #endif 8036 }, 8037 { 8038 BCMI_TSCE16_XGXS_PKTGEN_ERRMASK4r, 8039 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8040 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8041 BCMI_TSCE16_XGXS_PKTGEN_ERRMASK4r_fields, 8042 #else 8043 0, 8044 #endif 8045 #endif 8046 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8047 PHYMOD_SYMBOL_FLAG_REGISTER, 8048 "PKTGEN_ERRMASK4r", 8049 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8050 "PKTGEN1_ERRORMASK4", 8051 NULL, 8052 #endif 8053 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8054 0x0, /* 0 */ 8055 0, 8056 #endif 8057 }, 8058 { 8059 BCMI_TSCE16_XGXS_PKTGEN_ERRMASK3r, 8060 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8061 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8062 BCMI_TSCE16_XGXS_PKTGEN_ERRMASK3r_fields, 8063 #else 8064 0, 8065 #endif 8066 #endif 8067 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8068 PHYMOD_SYMBOL_FLAG_REGISTER, 8069 "PKTGEN_ERRMASK3r", 8070 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8071 "PKTGEN1_ERRORMASK3", 8072 NULL, 8073 #endif 8074 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8075 0x0, /* 0 */ 8076 0, 8077 #endif 8078 }, 8079 { 8080 BCMI_TSCE16_XGXS_PKTGEN_ERRMASK2r, 8081 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8082 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8083 BCMI_TSCE16_XGXS_PKTGEN_ERRMASK2r_fields, 8084 #else 8085 0, 8086 #endif 8087 #endif 8088 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8089 PHYMOD_SYMBOL_FLAG_REGISTER, 8090 "PKTGEN_ERRMASK2r", 8091 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8092 "PKTGEN1_ERRORMASK2", 8093 NULL, 8094 #endif 8095 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8096 0x0, /* 0 */ 8097 0, 8098 #endif 8099 }, 8100 { 8101 BCMI_TSCE16_XGXS_PKTGEN_ERRMASK1r, 8102 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8103 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8104 BCMI_TSCE16_XGXS_PKTGEN_ERRMASK1r_fields, 8105 #else 8106 0, 8107 #endif 8108 #endif 8109 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8110 PHYMOD_SYMBOL_FLAG_REGISTER, 8111 "PKTGEN_ERRMASK1r", 8112 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8113 "PKTGEN1_ERRORMASK1", 8114 NULL, 8115 #endif 8116 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8117 0x0, /* 0 */ 8118 0, 8119 #endif 8120 }, 8121 { 8122 BCMI_TSCE16_XGXS_PKTGEN_ERRMASK0r, 8123 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8124 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8125 BCMI_TSCE16_XGXS_PKTGEN_ERRMASK0r_fields, 8126 #else 8127 0, 8128 #endif 8129 #endif 8130 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8131 PHYMOD_SYMBOL_FLAG_REGISTER, 8132 "PKTGEN_ERRMASK0r", 8133 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8134 "PKTGEN1_ERRORMASK0", 8135 NULL, 8136 #endif 8137 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8138 0x0, /* 0 */ 8139 0, 8140 #endif 8141 }, 8142 { 8143 BCMI_TSCE16_XGXS_MEM_ECC_ECC_INT_1BITr, 8144 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8145 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8146 BCMI_TSCE16_XGXS_MEM_ECC_ECC_INT_1BITr_fields, 8147 #else 8148 0, 8149 #endif 8150 #endif 8151 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8152 PHYMOD_SYMBOL_FLAG_REGISTER, 8153 "MEM_ECC_ECC_INT_1BITr", 8154 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8155 NULL, 8156 NULL, 8157 #endif 8158 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8159 0x0, /* 0 */ 8160 0, 8161 #endif 8162 }, 8163 { 8164 BCMI_TSCE16_XGXS_MEM_ECC_ECC_INT_2BITr, 8165 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8166 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8167 BCMI_TSCE16_XGXS_MEM_ECC_ECC_INT_2BITr_fields, 8168 #else 8169 0, 8170 #endif 8171 #endif 8172 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8173 PHYMOD_SYMBOL_FLAG_REGISTER, 8174 "MEM_ECC_ECC_INT_2BITr", 8175 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8176 NULL, 8177 NULL, 8178 #endif 8179 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8180 0x0, /* 0 */ 8181 0, 8182 #endif 8183 }, 8184 { 8185 BCMI_TSCE16_XGXS_MEM_ECC_ECC_MSK_1BITr, 8186 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8187 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8188 BCMI_TSCE16_XGXS_MEM_ECC_ECC_MSK_1BITr_fields, 8189 #else 8190 0, 8191 #endif 8192 #endif 8193 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8194 PHYMOD_SYMBOL_FLAG_REGISTER, 8195 "MEM_ECC_ECC_MSK_1BITr", 8196 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8197 NULL, 8198 NULL, 8199 #endif 8200 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8201 0x0, /* 0 */ 8202 0, 8203 #endif 8204 }, 8205 { 8206 BCMI_TSCE16_XGXS_MEM_ECC_ECC_MSK_2BITr, 8207 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8208 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8209 BCMI_TSCE16_XGXS_MEM_ECC_ECC_MSK_2BITr_fields, 8210 #else 8211 0, 8212 #endif 8213 #endif 8214 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8215 PHYMOD_SYMBOL_FLAG_REGISTER, 8216 "MEM_ECC_ECC_MSK_2BITr", 8217 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8218 NULL, 8219 NULL, 8220 #endif 8221 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8222 0x0, /* 0 */ 8223 0, 8224 #endif 8225 }, 8226 { 8227 BCMI_TSCE16_XGXS_MEM_ECC_ECC_DISr, 8228 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8229 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8230 BCMI_TSCE16_XGXS_MEM_ECC_ECC_DISr_fields, 8231 #else 8232 0, 8233 #endif 8234 #endif 8235 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8236 PHYMOD_SYMBOL_FLAG_REGISTER, 8237 "MEM_ECC_ECC_DISr", 8238 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8239 "MEM_ECC_ECC_DISABLE", 8240 NULL, 8241 #endif 8242 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8243 0x0, /* 0 */ 8244 0, 8245 #endif 8246 }, 8247 { 8248 BCMI_TSCE16_XGXS_MEM_ECC_ECC_CORRUPTr, 8249 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8250 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8251 BCMI_TSCE16_XGXS_MEM_ECC_ECC_CORRUPTr_fields, 8252 #else 8253 0, 8254 #endif 8255 #endif 8256 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8257 PHYMOD_SYMBOL_FLAG_REGISTER, 8258 "MEM_ECC_ECC_CORRUPTr", 8259 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8260 NULL, 8261 NULL, 8262 #endif 8263 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8264 0x0, /* 0 */ 8265 0, 8266 #endif 8267 }, 8268 { 8269 BCMI_TSCE16_XGXS_MEM_ECC_ECC_DESKEW_STSr, 8270 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8271 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8272 BCMI_TSCE16_XGXS_MEM_ECC_ECC_DESKEW_STSr_fields, 8273 #else 8274 0, 8275 #endif 8276 #endif 8277 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8278 PHYMOD_SYMBOL_FLAG_REGISTER, 8279 "MEM_ECC_ECC_DESKEW_STSr", 8280 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8281 "MEM_ECC_ECC_DESKEW_STATUS", 8282 NULL, 8283 #endif 8284 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8285 0x0, /* 0 */ 8286 0, 8287 #endif 8288 }, 8289 { 8290 BCMI_TSCE16_XGXS_MEM_ECC_ECC_RFEC0_STSr, 8291 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8292 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8293 BCMI_TSCE16_XGXS_MEM_ECC_ECC_RFEC0_STSr_fields, 8294 #else 8295 0, 8296 #endif 8297 #endif 8298 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8299 PHYMOD_SYMBOL_FLAG_REGISTER, 8300 "MEM_ECC_ECC_RFEC0_STSr", 8301 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8302 "MEM_ECC_ECC_RFEC0_STATUS", 8303 NULL, 8304 #endif 8305 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8306 0x0, /* 0 */ 8307 0, 8308 #endif 8309 }, 8310 { 8311 BCMI_TSCE16_XGXS_MEM_ECC_ECC_RFEC1_STSr, 8312 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8313 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8314 BCMI_TSCE16_XGXS_MEM_ECC_ECC_RFEC1_STSr_fields, 8315 #else 8316 0, 8317 #endif 8318 #endif 8319 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8320 PHYMOD_SYMBOL_FLAG_REGISTER, 8321 "MEM_ECC_ECC_RFEC1_STSr", 8322 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8323 "MEM_ECC_ECC_RFEC1_STATUS", 8324 NULL, 8325 #endif 8326 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8327 0x0, /* 0 */ 8328 0, 8329 #endif 8330 }, 8331 { 8332 BCMI_TSCE16_XGXS_MEM_ECC_EXT_INTr, 8333 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8334 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8335 BCMI_TSCE16_XGXS_MEM_ECC_EXT_INTr_fields, 8336 #else 8337 0, 8338 #endif 8339 #endif 8340 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8341 PHYMOD_SYMBOL_FLAG_REGISTER, 8342 "MEM_ECC_EXT_INTr", 8343 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8344 NULL, 8345 NULL, 8346 #endif 8347 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8348 0x0, /* 0 */ 8349 0, 8350 #endif 8351 }, 8352 { 8353 BCMI_TSCE16_XGXS_MEM_ECC_EXT_MSKr, 8354 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8355 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8356 BCMI_TSCE16_XGXS_MEM_ECC_EXT_MSKr_fields, 8357 #else 8358 0, 8359 #endif 8360 #endif 8361 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8362 PHYMOD_SYMBOL_FLAG_REGISTER, 8363 "MEM_ECC_EXT_MSKr", 8364 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8365 NULL, 8366 NULL, 8367 #endif 8368 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8369 0x0, /* 0 */ 8370 0, 8371 #endif 8372 }, 8373 { 8374 BCMI_TSCE16_XGXS_MEM_TM_DESKEWr, 8375 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8376 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8377 BCMI_TSCE16_XGXS_MEM_TM_DESKEWr_fields, 8378 #else 8379 0, 8380 #endif 8381 #endif 8382 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8383 PHYMOD_SYMBOL_FLAG_REGISTER, 8384 "MEM_TM_DESKEWr", 8385 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8386 "MEM_DBG_MEM_TM_DESKEW", 8387 NULL, 8388 #endif 8389 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8390 0x0, /* 0 */ 8391 0, 8392 #endif 8393 }, 8394 { 8395 BCMI_TSCE16_XGXS_MEM_TM_RFEC0r, 8396 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8397 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8398 BCMI_TSCE16_XGXS_MEM_TM_RFEC0r_fields, 8399 #else 8400 0, 8401 #endif 8402 #endif 8403 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8404 PHYMOD_SYMBOL_FLAG_REGISTER, 8405 "MEM_TM_RFEC0r", 8406 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8407 "MEM_DBG_MEM_TM_RFEC0", 8408 NULL, 8409 #endif 8410 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8411 0x0, /* 0 */ 8412 0, 8413 #endif 8414 }, 8415 { 8416 BCMI_TSCE16_XGXS_MEM_TM_RFEC1r, 8417 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8418 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8419 BCMI_TSCE16_XGXS_MEM_TM_RFEC1r_fields, 8420 #else 8421 0, 8422 #endif 8423 #endif 8424 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8425 PHYMOD_SYMBOL_FLAG_REGISTER, 8426 "MEM_TM_RFEC1r", 8427 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8428 "MEM_DBG_MEM_TM_RFEC1", 8429 NULL, 8430 #endif 8431 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8432 0x0, /* 0 */ 8433 0, 8434 #endif 8435 }, 8436 { 8437 BCMI_TSCE16_XGXS_XGXSSTS0r, 8438 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8439 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8440 BCMI_TSCE16_XGXS_XGXSSTS0r_fields, 8441 #else 8442 0, 8443 #endif 8444 #endif 8445 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8446 PHYMOD_SYMBOL_FLAG_REGISTER, 8447 "XGXSSTS0r", 8448 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8449 "MISC_XGXSSTATUS0", 8450 NULL, 8451 #endif 8452 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8453 0x8000, /* 32768 */ 8454 0, 8455 #endif 8456 }, 8457 { 8458 BCMI_TSCE16_XGXS_TX_RATE_MISMATCHr, 8459 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8460 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8461 BCMI_TSCE16_XGXS_TX_RATE_MISMATCHr_fields, 8462 #else 8463 0, 8464 #endif 8465 #endif 8466 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8467 PHYMOD_SYMBOL_FLAG_REGISTER, 8468 "TX_RATE_MISMATCHr", 8469 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8470 "MISC_TX_RATE_MISMATCH", 8471 NULL, 8472 #endif 8473 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8474 0x0, /* 0 */ 8475 0, 8476 #endif 8477 }, 8478 { 8479 BCMI_TSCE16_XGXS_SCRMBLR_CTLr, 8480 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8481 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8482 BCMI_TSCE16_XGXS_SCRMBLR_CTLr_fields, 8483 #else 8484 0, 8485 #endif 8486 #endif 8487 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8488 PHYMOD_SYMBOL_FLAG_REGISTER, 8489 "SCRMBLR_CTLr", 8490 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8491 "MISC_SCRAMBLER_CONTROL", 8492 NULL, 8493 #endif 8494 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8495 0x1d, /* 29 */ 8496 0, 8497 #endif 8498 }, 8499 { 8500 BCMI_TSCE16_XGXS_CL72_EN_MASKr, 8501 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8502 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8503 BCMI_TSCE16_XGXS_CL72_EN_MASKr_fields, 8504 #else 8505 0, 8506 #endif 8507 #endif 8508 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8509 PHYMOD_SYMBOL_FLAG_REGISTER, 8510 "CL72_EN_MASKr", 8511 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8512 "MISC_CL72_ENABLE_MASK", 8513 NULL, 8514 #endif 8515 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8516 0xffff, /* 65535 */ 8517 0, 8518 #endif 8519 }, 8520 { 8521 BCMI_TSCE16_XGXS_CL82_RX_AM_TMRr, 8522 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8523 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8524 BCMI_TSCE16_XGXS_CL82_RX_AM_TMRr_fields, 8525 #else 8526 0, 8527 #endif 8528 #endif 8529 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8530 PHYMOD_SYMBOL_FLAG_REGISTER, 8531 "CL82_RX_AM_TMRr", 8532 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8533 "CL82_SHARED_CL82_RX_AM_TIMER", 8534 NULL, 8535 #endif 8536 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8537 0x3fff, /* 16383 */ 8538 0, 8539 #endif 8540 }, 8541 { 8542 BCMI_TSCE16_XGXS_CL82_LN_0_AM_BYTE10r, 8543 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8544 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8545 BCMI_TSCE16_XGXS_CL82_LN_0_AM_BYTE10r_fields, 8546 #else 8547 0, 8548 #endif 8549 #endif 8550 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8551 PHYMOD_SYMBOL_FLAG_REGISTER, 8552 "CL82_LN_0_AM_BYTE10r", 8553 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8554 "CL82_AM_REGS_LANE_0_AM_BYTE10", 8555 NULL, 8556 #endif 8557 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8558 0x7690, /* 30352 */ 8559 0, 8560 #endif 8561 }, 8562 { 8563 BCMI_TSCE16_XGXS_CL82_LN_1_AM_BYTE10r, 8564 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8565 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8566 BCMI_TSCE16_XGXS_CL82_LN_1_AM_BYTE10r_fields, 8567 #else 8568 0, 8569 #endif 8570 #endif 8571 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8572 PHYMOD_SYMBOL_FLAG_REGISTER, 8573 "CL82_LN_1_AM_BYTE10r", 8574 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8575 "CL82_AM_REGS_LANE_1_AM_BYTE10", 8576 NULL, 8577 #endif 8578 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8579 0xc4f0, /* 50416 */ 8580 0, 8581 #endif 8582 }, 8583 { 8584 BCMI_TSCE16_XGXS_CL82_LANES_1_0_AM_BYTE2r, 8585 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8586 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8587 BCMI_TSCE16_XGXS_CL82_LANES_1_0_AM_BYTE2r_fields, 8588 #else 8589 0, 8590 #endif 8591 #endif 8592 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8593 PHYMOD_SYMBOL_FLAG_REGISTER, 8594 "CL82_LANES_1_0_AM_BYTE2r", 8595 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8596 "CL82_AM_REGS_LANES_1_0_AM_BYTE2", 8597 NULL, 8598 #endif 8599 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8600 0xe647, /* 58951 */ 8601 0, 8602 #endif 8603 }, 8604 { 8605 BCMI_TSCE16_XGXS_LN_2_AM_BYTE10TSC_12r, 8606 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8607 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8608 BCMI_TSCE16_XGXS_LN_2_AM_BYTE10TSC_12r_fields, 8609 #else 8610 0, 8611 #endif 8612 #endif 8613 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8614 PHYMOD_SYMBOL_FLAG_REGISTER, 8615 "LN_2_AM_BYTE10TSC_12r", 8616 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8617 "CL82_AM_REGS_TSC_12_LANE_2_AM_BYTE10", 8618 NULL, 8619 #endif 8620 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8621 0x65c5, /* 26053 */ 8622 0, 8623 #endif 8624 }, 8625 { 8626 BCMI_TSCE16_XGXS_LN_3_AM_BYTE10TSC_12r, 8627 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8628 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8629 BCMI_TSCE16_XGXS_LN_3_AM_BYTE10TSC_12r_fields, 8630 #else 8631 0, 8632 #endif 8633 #endif 8634 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8635 PHYMOD_SYMBOL_FLAG_REGISTER, 8636 "LN_3_AM_BYTE10TSC_12r", 8637 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8638 "CL82_AM_REGS_TSC_12_LANE_3_AM_BYTE10", 8639 NULL, 8640 #endif 8641 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8642 0x79a2, /* 31138 */ 8643 0, 8644 #endif 8645 }, 8646 { 8647 BCMI_TSCE16_XGXS_LANES_3_2_AM_BYTE2TSC_12r, 8648 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8649 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8650 BCMI_TSCE16_XGXS_LANES_3_2_AM_BYTE2TSC_12r_fields, 8651 #else 8652 0, 8653 #endif 8654 #endif 8655 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8656 PHYMOD_SYMBOL_FLAG_REGISTER, 8657 "LANES_3_2_AM_BYTE2TSC_12r", 8658 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8659 "CL82_AM_REGS_TSC_12_LANES_3_2_AM_BYTE2", 8660 NULL, 8661 #endif 8662 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8663 0x3d9b, /* 15771 */ 8664 0, 8665 #endif 8666 }, 8667 { 8668 BCMI_TSCE16_XGXS_RX_X1_DEC_CTL0r, 8669 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8670 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8671 BCMI_TSCE16_XGXS_RX_X1_DEC_CTL0r_fields, 8672 #else 8673 0, 8674 #endif 8675 #endif 8676 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8677 PHYMOD_SYMBOL_FLAG_REGISTER, 8678 "RX_X1_DEC_CTL0r", 8679 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8680 "RX_X1_CONTROL0_DECODE_CONTROL_0", 8681 NULL, 8682 #endif 8683 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8684 0x101, /* 257 */ 8685 0, 8686 #endif 8687 }, 8688 { 8689 BCMI_TSCE16_XGXS_RX_X1_DEC_CTL1r, 8690 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8691 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8692 BCMI_TSCE16_XGXS_RX_X1_DEC_CTL1r_fields, 8693 #else 8694 0, 8695 #endif 8696 #endif 8697 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8698 PHYMOD_SYMBOL_FLAG_REGISTER, 8699 "RX_X1_DEC_CTL1r", 8700 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8701 "RX_X1_CONTROL0_DECODE_CONTROL_1", 8702 NULL, 8703 #endif 8704 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8705 0x6140, /* 24896 */ 8706 0, 8707 #endif 8708 }, 8709 { 8710 BCMI_TSCE16_XGXS_RX_X1_DESKEW_WINSr, 8711 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8712 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8713 BCMI_TSCE16_XGXS_RX_X1_DESKEW_WINSr_fields, 8714 #else 8715 0, 8716 #endif 8717 #endif 8718 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8719 PHYMOD_SYMBOL_FLAG_REGISTER, 8720 "RX_X1_DESKEW_WINSr", 8721 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8722 "RX_X1_CONTROL0_DESKEW_WINDOWS", 8723 NULL, 8724 #endif 8725 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8726 0xeea7, /* 61095 */ 8727 0, 8728 #endif 8729 }, 8730 { 8731 BCMI_TSCE16_XGXS_RX_X1_SHCNT_CL49r, 8732 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8733 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8734 BCMI_TSCE16_XGXS_RX_X1_SHCNT_CL49r_fields, 8735 #else 8736 0, 8737 #endif 8738 #endif 8739 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8740 PHYMOD_SYMBOL_FLAG_REGISTER, 8741 "RX_X1_SHCNT_CL49r", 8742 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8743 "RX_X1_CONTROL1_SHCNT_CL49", 8744 NULL, 8745 #endif 8746 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8747 0x4010, /* 16400 */ 8748 0, 8749 #endif 8750 }, 8751 { 8752 BCMI_TSCE16_XGXS_RX_X1_VALID_SHCNT_CL82r, 8753 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8754 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8755 BCMI_TSCE16_XGXS_RX_X1_VALID_SHCNT_CL82r_fields, 8756 #else 8757 0, 8758 #endif 8759 #endif 8760 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8761 PHYMOD_SYMBOL_FLAG_REGISTER, 8762 "RX_X1_VALID_SHCNT_CL82r", 8763 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8764 "RX_X1_CONTROL1_VALID_SHCNT_CL82", 8765 NULL, 8766 #endif 8767 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8768 0x400, /* 1024 */ 8769 0, 8770 #endif 8771 }, 8772 { 8773 BCMI_TSCE16_XGXS_RX_X1_INVALID_SHCNT_CL82r, 8774 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8775 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8776 BCMI_TSCE16_XGXS_RX_X1_INVALID_SHCNT_CL82r_fields, 8777 #else 8778 0, 8779 #endif 8780 #endif 8781 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8782 PHYMOD_SYMBOL_FLAG_REGISTER, 8783 "RX_X1_INVALID_SHCNT_CL82r", 8784 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8785 "RX_X1_CONTROL1_INVALID_SHCNT_CL82", 8786 NULL, 8787 #endif 8788 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8789 0x41, /* 65 */ 8790 0, 8791 #endif 8792 }, 8793 { 8794 BCMI_TSCE16_XGXS_RX_X1_SCW0r, 8795 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8796 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8797 BCMI_TSCE16_XGXS_RX_X1_SCW0r_fields, 8798 #else 8799 0, 8800 #endif 8801 #endif 8802 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8803 PHYMOD_SYMBOL_FLAG_REGISTER, 8804 "RX_X1_SCW0r", 8805 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8806 "RX_X1_CONTROL1_SCW0", 8807 NULL, 8808 #endif 8809 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8810 0x8090, /* 32912 */ 8811 0, 8812 #endif 8813 }, 8814 { 8815 BCMI_TSCE16_XGXS_RX_X1_SCW1r, 8816 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8817 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8818 BCMI_TSCE16_XGXS_RX_X1_SCW1r_fields, 8819 #else 8820 0, 8821 #endif 8822 #endif 8823 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8824 PHYMOD_SYMBOL_FLAG_REGISTER, 8825 "RX_X1_SCW1r", 8826 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8827 "RX_X1_CONTROL1_SCW1", 8828 NULL, 8829 #endif 8830 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8831 0xa0b0, /* 41136 */ 8832 0, 8833 #endif 8834 }, 8835 { 8836 BCMI_TSCE16_XGXS_RX_X1_SCW2r, 8837 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8838 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8839 BCMI_TSCE16_XGXS_RX_X1_SCW2r_fields, 8840 #else 8841 0, 8842 #endif 8843 #endif 8844 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8845 PHYMOD_SYMBOL_FLAG_REGISTER, 8846 "RX_X1_SCW2r", 8847 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8848 "RX_X1_CONTROL1_SCW2", 8849 NULL, 8850 #endif 8851 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8852 0xc0d0, /* 49360 */ 8853 0, 8854 #endif 8855 }, 8856 { 8857 BCMI_TSCE16_XGXS_RX_X1_SCW3r, 8858 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8859 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8860 BCMI_TSCE16_XGXS_RX_X1_SCW3r_fields, 8861 #else 8862 0, 8863 #endif 8864 #endif 8865 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8866 PHYMOD_SYMBOL_FLAG_REGISTER, 8867 "RX_X1_SCW3r", 8868 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8869 "RX_X1_CONTROL1_SCW3", 8870 NULL, 8871 #endif 8872 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8873 0xe070, /* 57456 */ 8874 0, 8875 #endif 8876 }, 8877 { 8878 BCMI_TSCE16_XGXS_RX_X1_SCW4r, 8879 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8880 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8881 BCMI_TSCE16_XGXS_RX_X1_SCW4r_fields, 8882 #else 8883 0, 8884 #endif 8885 #endif 8886 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8887 PHYMOD_SYMBOL_FLAG_REGISTER, 8888 "RX_X1_SCW4r", 8889 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8890 "RX_X1_CONTROL1_SCW4", 8891 NULL, 8892 #endif 8893 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8894 0x1, /* 1 */ 8895 0, 8896 #endif 8897 }, 8898 { 8899 BCMI_TSCE16_XGXS_RX_X1_SCW0_MASKr, 8900 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8901 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8902 BCMI_TSCE16_XGXS_RX_X1_SCW0_MASKr_fields, 8903 #else 8904 0, 8905 #endif 8906 #endif 8907 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8908 PHYMOD_SYMBOL_FLAG_REGISTER, 8909 "RX_X1_SCW0_MASKr", 8910 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8911 "RX_X1_CONTROL1_SCW0_MASK", 8912 NULL, 8913 #endif 8914 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8915 0xf0f0, /* 61680 */ 8916 0, 8917 #endif 8918 }, 8919 { 8920 BCMI_TSCE16_XGXS_RX_X1_SCW1_MASKr, 8921 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8922 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8923 BCMI_TSCE16_XGXS_RX_X1_SCW1_MASKr_fields, 8924 #else 8925 0, 8926 #endif 8927 #endif 8928 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8929 PHYMOD_SYMBOL_FLAG_REGISTER, 8930 "RX_X1_SCW1_MASKr", 8931 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8932 "RX_X1_CONTROL1_SCW1_MASK", 8933 NULL, 8934 #endif 8935 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8936 0xf0f0, /* 61680 */ 8937 0, 8938 #endif 8939 }, 8940 { 8941 BCMI_TSCE16_XGXS_RX_X1_SCW2_MASKr, 8942 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8943 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8944 BCMI_TSCE16_XGXS_RX_X1_SCW2_MASKr_fields, 8945 #else 8946 0, 8947 #endif 8948 #endif 8949 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8950 PHYMOD_SYMBOL_FLAG_REGISTER, 8951 "RX_X1_SCW2_MASKr", 8952 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8953 "RX_X1_CONTROL1_SCW2_MASK", 8954 NULL, 8955 #endif 8956 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8957 0xf0f0, /* 61680 */ 8958 0, 8959 #endif 8960 }, 8961 { 8962 BCMI_TSCE16_XGXS_RX_X1_SCW3_MASKr, 8963 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8964 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8965 BCMI_TSCE16_XGXS_RX_X1_SCW3_MASKr_fields, 8966 #else 8967 0, 8968 #endif 8969 #endif 8970 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8971 PHYMOD_SYMBOL_FLAG_REGISTER, 8972 "RX_X1_SCW3_MASKr", 8973 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8974 "RX_X1_CONTROL1_SCW3_MASK", 8975 NULL, 8976 #endif 8977 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8978 0xf0f0, /* 61680 */ 8979 0, 8980 #endif 8981 }, 8982 { 8983 BCMI_TSCE16_XGXS_RX_X1_SCW4_MASKr, 8984 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8985 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 8986 BCMI_TSCE16_XGXS_RX_X1_SCW4_MASKr_fields, 8987 #else 8988 0, 8989 #endif 8990 #endif 8991 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8992 PHYMOD_SYMBOL_FLAG_REGISTER, 8993 "RX_X1_SCW4_MASKr", 8994 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8995 "RX_X1_CONTROL1_SCW4_MASK", 8996 NULL, 8997 #endif 8998 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8999 0x3, /* 3 */ 9000 0, 9001 #endif 9002 }, 9003 { 9004 BCMI_TSCE16_XGXS_AN_X1_OUI_UPRr, 9005 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9006 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9007 BCMI_TSCE16_XGXS_AN_X1_OUI_UPRr_fields, 9008 #else 9009 0, 9010 #endif 9011 #endif 9012 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9013 PHYMOD_SYMBOL_FLAG_REGISTER, 9014 "AN_X1_OUI_UPRr", 9015 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9016 "AN_X1_CONTROL_OUI_UPPER", 9017 NULL, 9018 #endif 9019 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9020 0x0, /* 0 */ 9021 0, 9022 #endif 9023 }, 9024 { 9025 BCMI_TSCE16_XGXS_AN_X1_OUI_LWRr, 9026 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9027 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9028 BCMI_TSCE16_XGXS_AN_X1_OUI_LWRr_fields, 9029 #else 9030 0, 9031 #endif 9032 #endif 9033 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9034 PHYMOD_SYMBOL_FLAG_REGISTER, 9035 "AN_X1_OUI_LWRr", 9036 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9037 "AN_X1_CONTROL_OUI_LOWER", 9038 NULL, 9039 #endif 9040 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9041 0x0, /* 0 */ 9042 0, 9043 #endif 9044 }, 9045 { 9046 BCMI_TSCE16_XGXS_AN_X1_BAM_SPD_PRI_5_0r, 9047 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9048 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9049 BCMI_TSCE16_XGXS_AN_X1_BAM_SPD_PRI_5_0r_fields, 9050 #else 9051 0, 9052 #endif 9053 #endif 9054 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9055 PHYMOD_SYMBOL_FLAG_REGISTER, 9056 "AN_X1_BAM_SPD_PRI_5_0r", 9057 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9058 "AN_X1_CONTROL_BAM_SPEED_PRI_5_0", 9059 NULL, 9060 #endif 9061 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9062 0x0, /* 0 */ 9063 0, 9064 #endif 9065 }, 9066 { 9067 BCMI_TSCE16_XGXS_AN_X1_BAM_SPD_PRI_11_6r, 9068 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9069 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9070 BCMI_TSCE16_XGXS_AN_X1_BAM_SPD_PRI_11_6r_fields, 9071 #else 9072 0, 9073 #endif 9074 #endif 9075 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9076 PHYMOD_SYMBOL_FLAG_REGISTER, 9077 "AN_X1_BAM_SPD_PRI_11_6r", 9078 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9079 "AN_X1_CONTROL_BAM_SPEED_PRI_11_6", 9080 NULL, 9081 #endif 9082 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9083 0x0, /* 0 */ 9084 0, 9085 #endif 9086 }, 9087 { 9088 BCMI_TSCE16_XGXS_AN_X1_BAM_SPD_PRI_17_12r, 9089 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9090 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9091 BCMI_TSCE16_XGXS_AN_X1_BAM_SPD_PRI_17_12r_fields, 9092 #else 9093 0, 9094 #endif 9095 #endif 9096 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9097 PHYMOD_SYMBOL_FLAG_REGISTER, 9098 "AN_X1_BAM_SPD_PRI_17_12r", 9099 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9100 "AN_X1_CONTROL_BAM_SPEED_PRI_17_12", 9101 NULL, 9102 #endif 9103 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9104 0x0, /* 0 */ 9105 0, 9106 #endif 9107 }, 9108 { 9109 BCMI_TSCE16_XGXS_AN_X1_BAM_SPD_PRI_23_18r, 9110 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9111 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9112 BCMI_TSCE16_XGXS_AN_X1_BAM_SPD_PRI_23_18r_fields, 9113 #else 9114 0, 9115 #endif 9116 #endif 9117 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9118 PHYMOD_SYMBOL_FLAG_REGISTER, 9119 "AN_X1_BAM_SPD_PRI_23_18r", 9120 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9121 "AN_X1_CONTROL_BAM_SPEED_PRI_23_18", 9122 NULL, 9123 #endif 9124 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9125 0x0, /* 0 */ 9126 0, 9127 #endif 9128 }, 9129 { 9130 BCMI_TSCE16_XGXS_AN_X1_BAM_SPD_PRI_29_24r, 9131 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9132 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9133 BCMI_TSCE16_XGXS_AN_X1_BAM_SPD_PRI_29_24r_fields, 9134 #else 9135 0, 9136 #endif 9137 #endif 9138 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9139 PHYMOD_SYMBOL_FLAG_REGISTER, 9140 "AN_X1_BAM_SPD_PRI_29_24r", 9141 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9142 "AN_X1_CONTROL_BAM_SPEED_PRI_29_24", 9143 NULL, 9144 #endif 9145 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9146 0x0, /* 0 */ 9147 0, 9148 #endif 9149 }, 9150 { 9151 BCMI_TSCE16_XGXS_AN_X1_BAM_SPD_PRI_35_30r, 9152 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9153 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9154 BCMI_TSCE16_XGXS_AN_X1_BAM_SPD_PRI_35_30r_fields, 9155 #else 9156 0, 9157 #endif 9158 #endif 9159 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9160 PHYMOD_SYMBOL_FLAG_REGISTER, 9161 "AN_X1_BAM_SPD_PRI_35_30r", 9162 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9163 "AN_X1_CONTROL_BAM_SPEED_PRI_35_30", 9164 NULL, 9165 #endif 9166 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9167 0x0, /* 0 */ 9168 0, 9169 #endif 9170 }, 9171 { 9172 BCMI_TSCE16_XGXS_AN_X1_CFG_CTLr, 9173 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9174 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9175 BCMI_TSCE16_XGXS_AN_X1_CFG_CTLr_fields, 9176 #else 9177 0, 9178 #endif 9179 #endif 9180 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9181 PHYMOD_SYMBOL_FLAG_REGISTER, 9182 "AN_X1_CFG_CTLr", 9183 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9184 "AN_X1_CONTROL_CONFIG_CONTROL", 9185 NULL, 9186 #endif 9187 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9188 0x0, /* 0 */ 9189 0, 9190 #endif 9191 }, 9192 { 9193 BCMI_TSCE16_XGXS_AN_X1_CL37_RESTARTr, 9194 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9195 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9196 BCMI_TSCE16_XGXS_AN_X1_CL37_RESTARTr_fields, 9197 #else 9198 0, 9199 #endif 9200 #endif 9201 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9202 PHYMOD_SYMBOL_FLAG_REGISTER, 9203 "AN_X1_CL37_RESTARTr", 9204 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9205 "AN_X1_TIMERS_CL37_RESTART", 9206 NULL, 9207 #endif 9208 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9209 0x0, /* 0 */ 9210 0, 9211 #endif 9212 }, 9213 { 9214 BCMI_TSCE16_XGXS_AN_X1_CL37_ACKr, 9215 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9216 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9217 BCMI_TSCE16_XGXS_AN_X1_CL37_ACKr_fields, 9218 #else 9219 0, 9220 #endif 9221 #endif 9222 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9223 PHYMOD_SYMBOL_FLAG_REGISTER, 9224 "AN_X1_CL37_ACKr", 9225 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9226 "AN_X1_TIMERS_CL37_ACK", 9227 NULL, 9228 #endif 9229 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9230 0x0, /* 0 */ 9231 0, 9232 #endif 9233 }, 9234 { 9235 BCMI_TSCE16_XGXS_AN_X1_CL37_ERRr, 9236 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9237 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9238 BCMI_TSCE16_XGXS_AN_X1_CL37_ERRr_fields, 9239 #else 9240 0, 9241 #endif 9242 #endif 9243 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9244 PHYMOD_SYMBOL_FLAG_REGISTER, 9245 "AN_X1_CL37_ERRr", 9246 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9247 "AN_X1_TIMERS_CL37_ERROR", 9248 NULL, 9249 #endif 9250 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9251 0x0, /* 0 */ 9252 0, 9253 #endif 9254 }, 9255 { 9256 BCMI_TSCE16_XGXS_AN_X1_CL73_BRK_LNKr, 9257 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9258 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9259 BCMI_TSCE16_XGXS_AN_X1_CL73_BRK_LNKr_fields, 9260 #else 9261 0, 9262 #endif 9263 #endif 9264 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9265 PHYMOD_SYMBOL_FLAG_REGISTER, 9266 "AN_X1_CL73_BRK_LNKr", 9267 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9268 "AN_X1_TIMERS_CL73_BREAK_LINK", 9269 NULL, 9270 #endif 9271 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9272 0x0, /* 0 */ 9273 0, 9274 #endif 9275 }, 9276 { 9277 BCMI_TSCE16_XGXS_AN_X1_CL73_ERRr, 9278 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9279 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9280 BCMI_TSCE16_XGXS_AN_X1_CL73_ERRr_fields, 9281 #else 9282 0, 9283 #endif 9284 #endif 9285 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9286 PHYMOD_SYMBOL_FLAG_REGISTER, 9287 "AN_X1_CL73_ERRr", 9288 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9289 "AN_X1_TIMERS_CL73_ERROR", 9290 NULL, 9291 #endif 9292 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9293 0x0, /* 0 */ 9294 0, 9295 #endif 9296 }, 9297 { 9298 BCMI_TSCE16_XGXS_AN_X1_CL73_DME_LOCKr, 9299 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9300 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9301 BCMI_TSCE16_XGXS_AN_X1_CL73_DME_LOCKr_fields, 9302 #else 9303 0, 9304 #endif 9305 #endif 9306 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9307 PHYMOD_SYMBOL_FLAG_REGISTER, 9308 "AN_X1_CL73_DME_LOCKr", 9309 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9310 "AN_X1_TIMERS_CL73_DME_LOCK", 9311 NULL, 9312 #endif 9313 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9314 0x0, /* 0 */ 9315 0, 9316 #endif 9317 }, 9318 { 9319 BCMI_TSCE16_XGXS_AN_X1_LNK_UPr, 9320 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9321 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9322 BCMI_TSCE16_XGXS_AN_X1_LNK_UPr_fields, 9323 #else 9324 0, 9325 #endif 9326 #endif 9327 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9328 PHYMOD_SYMBOL_FLAG_REGISTER, 9329 "AN_X1_LNK_UPr", 9330 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9331 "AN_X1_TIMERS_LINK_UP", 9332 NULL, 9333 #endif 9334 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9335 0x0, /* 0 */ 9336 0, 9337 #endif 9338 }, 9339 { 9340 BCMI_TSCE16_XGXS_AN_X1_LNK_FAIL_INHBT_TMR_CL72r, 9341 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9342 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9343 BCMI_TSCE16_XGXS_AN_X1_LNK_FAIL_INHBT_TMR_CL72r_fields, 9344 #else 9345 0, 9346 #endif 9347 #endif 9348 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9349 PHYMOD_SYMBOL_FLAG_REGISTER, 9350 "AN_X1_LNK_FAIL_INHBT_TMR_CL72r", 9351 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9352 "AN_X1_TIMERS_LINK_FAIL_INHIBIT_TIMER_CL72", 9353 NULL, 9354 #endif 9355 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9356 0x0, /* 0 */ 9357 0, 9358 #endif 9359 }, 9360 { 9361 BCMI_TSCE16_XGXS_AN_X1_LNK_FAIL_INHBT_TMR_NOT_CL72r, 9362 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9363 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9364 BCMI_TSCE16_XGXS_AN_X1_LNK_FAIL_INHBT_TMR_NOT_CL72r_fields, 9365 #else 9366 0, 9367 #endif 9368 #endif 9369 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9370 PHYMOD_SYMBOL_FLAG_REGISTER, 9371 "AN_X1_LNK_FAIL_INHBT_TMR_NOT_CL72r", 9372 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9373 "AN_X1_TIMERS_LINK_FAIL_INHIBIT_TIMER_NOT_CL72", 9374 NULL, 9375 #endif 9376 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9377 0x0, /* 0 */ 9378 0, 9379 #endif 9380 }, 9381 { 9382 BCMI_TSCE16_XGXS_AN_X1_PD_SD_TMRr, 9383 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9384 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9385 BCMI_TSCE16_XGXS_AN_X1_PD_SD_TMRr_fields, 9386 #else 9387 0, 9388 #endif 9389 #endif 9390 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9391 PHYMOD_SYMBOL_FLAG_REGISTER, 9392 "AN_X1_PD_SD_TMRr", 9393 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9394 "AN_X1_TIMERS_PD_SD_TIMER", 9395 NULL, 9396 #endif 9397 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9398 0x0, /* 0 */ 9399 0, 9400 #endif 9401 }, 9402 { 9403 BCMI_TSCE16_XGXS_AN_X1_CL37_SYNC_STS_FILTER_TMRr, 9404 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9405 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9406 BCMI_TSCE16_XGXS_AN_X1_CL37_SYNC_STS_FILTER_TMRr_fields, 9407 #else 9408 0, 9409 #endif 9410 #endif 9411 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9412 PHYMOD_SYMBOL_FLAG_REGISTER, 9413 "AN_X1_CL37_SYNC_STS_FILTER_TMRr", 9414 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9415 "AN_X1_TIMERS_CL37_SYNC_STATUS_FILTER_TIMER", 9416 NULL, 9417 #endif 9418 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9419 0x2, /* 2 */ 9420 0, 9421 #endif 9422 }, 9423 { 9424 BCMI_TSCE16_XGXS_AN_X1_PD_TO_CL37_LNK_WAIT_TMRr, 9425 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9426 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9427 BCMI_TSCE16_XGXS_AN_X1_PD_TO_CL37_LNK_WAIT_TMRr_fields, 9428 #else 9429 0, 9430 #endif 9431 #endif 9432 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9433 PHYMOD_SYMBOL_FLAG_REGISTER, 9434 "AN_X1_PD_TO_CL37_LNK_WAIT_TMRr", 9435 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9436 "AN_X1_TIMERS_PD_TO_CL37_LINK_WAIT_TIMER", 9437 NULL, 9438 #endif 9439 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9440 0x6b, /* 107 */ 9441 0, 9442 #endif 9443 }, 9444 { 9445 BCMI_TSCE16_XGXS_AN_X1_IGNORE_LNK_TMRr, 9446 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9447 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9448 BCMI_TSCE16_XGXS_AN_X1_IGNORE_LNK_TMRr_fields, 9449 #else 9450 0, 9451 #endif 9452 #endif 9453 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9454 PHYMOD_SYMBOL_FLAG_REGISTER, 9455 "AN_X1_IGNORE_LNK_TMRr", 9456 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9457 "AN_X1_TIMERS_IGNORE_LINK_TIMER", 9458 NULL, 9459 #endif 9460 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9461 0x0, /* 0 */ 9462 0, 9463 #endif 9464 }, 9465 { 9466 BCMI_TSCE16_XGXS_AN_X1_DME_PAGE_TMRr, 9467 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9468 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9469 BCMI_TSCE16_XGXS_AN_X1_DME_PAGE_TMRr_fields, 9470 #else 9471 0, 9472 #endif 9473 #endif 9474 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9475 PHYMOD_SYMBOL_FLAG_REGISTER, 9476 "AN_X1_DME_PAGE_TMRr", 9477 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9478 "AN_X1_TIMERS_DME_PAGE_TIMER", 9479 NULL, 9480 #endif 9481 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9482 0x3b5f, /* 15199 */ 9483 0, 9484 #endif 9485 }, 9486 { 9487 BCMI_TSCE16_XGXS_AN_X1_SGMII_CL73_TMR_TYPEr, 9488 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9489 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9490 BCMI_TSCE16_XGXS_AN_X1_SGMII_CL73_TMR_TYPEr_fields, 9491 #else 9492 0, 9493 #endif 9494 #endif 9495 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9496 PHYMOD_SYMBOL_FLAG_REGISTER, 9497 "AN_X1_SGMII_CL73_TMR_TYPEr", 9498 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9499 "AN_X1_TIMERS_SGMII_CL73_TIMER_TYPE", 9500 NULL, 9501 #endif 9502 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9503 0x6b, /* 107 */ 9504 0, 9505 #endif 9506 }, 9507 { 9508 BCMI_TSCE16_XGXS_SC_X1_PLL_LOCK_TMRr, 9509 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9510 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9511 BCMI_TSCE16_XGXS_SC_X1_PLL_LOCK_TMRr_fields, 9512 #else 9513 0, 9514 #endif 9515 #endif 9516 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9517 PHYMOD_SYMBOL_FLAG_REGISTER, 9518 "SC_X1_PLL_LOCK_TMRr", 9519 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9520 "SC_X1_CONTROL_PLL_LOCK_TIMER", 9521 NULL, 9522 #endif 9523 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9524 0x0, /* 0 */ 9525 0, 9526 #endif 9527 }, 9528 { 9529 BCMI_TSCE16_XGXS_SC_X1_PMD_LOCK_TMRr, 9530 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9531 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9532 BCMI_TSCE16_XGXS_SC_X1_PMD_LOCK_TMRr_fields, 9533 #else 9534 0, 9535 #endif 9536 #endif 9537 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9538 PHYMOD_SYMBOL_FLAG_REGISTER, 9539 "SC_X1_PMD_LOCK_TMRr", 9540 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9541 "SC_X1_CONTROL_PMD_LOCK_TIMER", 9542 NULL, 9543 #endif 9544 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9545 0x0, /* 0 */ 9546 0, 9547 #endif 9548 }, 9549 { 9550 BCMI_TSCE16_XGXS_SC_X1_PIPE_RST_CNTr, 9551 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9552 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9553 BCMI_TSCE16_XGXS_SC_X1_PIPE_RST_CNTr_fields, 9554 #else 9555 0, 9556 #endif 9557 #endif 9558 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9559 PHYMOD_SYMBOL_FLAG_REGISTER, 9560 "SC_X1_PIPE_RST_CNTr", 9561 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9562 "SC_X1_CONTROL_PIPELINE_RESET_COUNT", 9563 NULL, 9564 #endif 9565 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9566 0xff, /* 255 */ 9567 0, 9568 #endif 9569 }, 9570 { 9571 BCMI_TSCE16_XGXS_SC_X1_TX_RST_CNTr, 9572 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9573 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9574 BCMI_TSCE16_XGXS_SC_X1_TX_RST_CNTr_fields, 9575 #else 9576 0, 9577 #endif 9578 #endif 9579 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9580 PHYMOD_SYMBOL_FLAG_REGISTER, 9581 "SC_X1_TX_RST_CNTr", 9582 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9583 "SC_X1_CONTROL_TX_RESET_COUNT", 9584 NULL, 9585 #endif 9586 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9587 0x2, /* 2 */ 9588 0, 9589 #endif 9590 }, 9591 { 9592 BCMI_TSCE16_XGXS_SC_X1_STSr, 9593 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9594 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9595 BCMI_TSCE16_XGXS_SC_X1_STSr_fields, 9596 #else 9597 0, 9598 #endif 9599 #endif 9600 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9601 PHYMOD_SYMBOL_FLAG_REGISTER, 9602 "SC_X1_STSr", 9603 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9604 "SC_X1_CONTROL_STATUS", 9605 NULL, 9606 #endif 9607 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9608 0x0, /* 0 */ 9609 0, 9610 #endif 9611 }, 9612 { 9613 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR0_SPDr, 9614 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9615 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9616 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR0_SPDr_fields, 9617 #else 9618 0, 9619 #endif 9620 #endif 9621 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9622 PHYMOD_SYMBOL_FLAG_REGISTER, 9623 "SC_X1_SPD_OVRR0_SPDr", 9624 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9625 "SC_X1_SPEED_OVERRIDE0_OVERRIDE_SPEED", 9626 NULL, 9627 #endif 9628 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9629 0xff00, /* 65280 */ 9630 0, 9631 #endif 9632 }, 9633 { 9634 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR0_0r, 9635 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9636 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9637 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR0_0r_fields, 9638 #else 9639 0, 9640 #endif 9641 #endif 9642 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9643 PHYMOD_SYMBOL_FLAG_REGISTER, 9644 "SC_X1_SPD_OVRR0_0r", 9645 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9646 "SC_X1_SPEED_OVERRIDE0_OVERRIDE_0", 9647 NULL, 9648 #endif 9649 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9650 0x0, /* 0 */ 9651 0, 9652 #endif 9653 }, 9654 { 9655 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR0_1r, 9656 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9657 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9658 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR0_1r_fields, 9659 #else 9660 0, 9661 #endif 9662 #endif 9663 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9664 PHYMOD_SYMBOL_FLAG_REGISTER, 9665 "SC_X1_SPD_OVRR0_1r", 9666 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9667 "SC_X1_SPEED_OVERRIDE0_OVERRIDE_1", 9668 NULL, 9669 #endif 9670 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9671 0x0, /* 0 */ 9672 0, 9673 #endif 9674 }, 9675 { 9676 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR0_2r, 9677 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9678 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9679 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR0_2r_fields, 9680 #else 9681 0, 9682 #endif 9683 #endif 9684 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9685 PHYMOD_SYMBOL_FLAG_REGISTER, 9686 "SC_X1_SPD_OVRR0_2r", 9687 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9688 "SC_X1_SPEED_OVERRIDE0_OVERRIDE_2", 9689 NULL, 9690 #endif 9691 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9692 0x400, /* 1024 */ 9693 0, 9694 #endif 9695 }, 9696 { 9697 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR0_3r, 9698 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9699 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9700 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR0_3r_fields, 9701 #else 9702 0, 9703 #endif 9704 #endif 9705 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9706 PHYMOD_SYMBOL_FLAG_REGISTER, 9707 "SC_X1_SPD_OVRR0_3r", 9708 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9709 "SC_X1_SPEED_OVERRIDE0_OVERRIDE_3", 9710 NULL, 9711 #endif 9712 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9713 0x0, /* 0 */ 9714 0, 9715 #endif 9716 }, 9717 { 9718 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR0_4r, 9719 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9720 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9721 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR0_4r_fields, 9722 #else 9723 0, 9724 #endif 9725 #endif 9726 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9727 PHYMOD_SYMBOL_FLAG_REGISTER, 9728 "SC_X1_SPD_OVRR0_4r", 9729 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9730 "SC_X1_SPEED_OVERRIDE0_OVERRIDE_4", 9731 NULL, 9732 #endif 9733 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9734 0x0, /* 0 */ 9735 0, 9736 #endif 9737 }, 9738 { 9739 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR0_5r, 9740 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9741 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9742 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR0_5r_fields, 9743 #else 9744 0, 9745 #endif 9746 #endif 9747 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9748 PHYMOD_SYMBOL_FLAG_REGISTER, 9749 "SC_X1_SPD_OVRR0_5r", 9750 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9751 "SC_X1_SPEED_OVERRIDE0_OVERRIDE_5", 9752 NULL, 9753 #endif 9754 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9755 0x0, /* 0 */ 9756 0, 9757 #endif 9758 }, 9759 { 9760 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR0_6r, 9761 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9762 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9763 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR0_6r_fields, 9764 #else 9765 0, 9766 #endif 9767 #endif 9768 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9769 PHYMOD_SYMBOL_FLAG_REGISTER, 9770 "SC_X1_SPD_OVRR0_6r", 9771 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9772 "SC_X1_SPEED_OVERRIDE0_OVERRIDE_6", 9773 NULL, 9774 #endif 9775 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9776 0x0, /* 0 */ 9777 0, 9778 #endif 9779 }, 9780 { 9781 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR0_7r, 9782 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9783 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9784 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR0_7r_fields, 9785 #else 9786 0, 9787 #endif 9788 #endif 9789 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9790 PHYMOD_SYMBOL_FLAG_REGISTER, 9791 "SC_X1_SPD_OVRR0_7r", 9792 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9793 "SC_X1_SPEED_OVERRIDE0_OVERRIDE_7", 9794 NULL, 9795 #endif 9796 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9797 0x0, /* 0 */ 9798 0, 9799 #endif 9800 }, 9801 { 9802 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR0_8r, 9803 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9804 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9805 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR0_8r_fields, 9806 #else 9807 0, 9808 #endif 9809 #endif 9810 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9811 PHYMOD_SYMBOL_FLAG_REGISTER, 9812 "SC_X1_SPD_OVRR0_8r", 9813 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9814 "SC_X1_SPEED_OVERRIDE0_OVERRIDE_8", 9815 NULL, 9816 #endif 9817 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9818 0x0, /* 0 */ 9819 0, 9820 #endif 9821 }, 9822 { 9823 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR1_SPDr, 9824 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9825 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9826 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR1_SPDr_fields, 9827 #else 9828 0, 9829 #endif 9830 #endif 9831 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9832 PHYMOD_SYMBOL_FLAG_REGISTER, 9833 "SC_X1_SPD_OVRR1_SPDr", 9834 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9835 "SC_X1_SPEED_OVERRIDE1_OVERRIDE_SPEED", 9836 NULL, 9837 #endif 9838 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9839 0xff00, /* 65280 */ 9840 0, 9841 #endif 9842 }, 9843 { 9844 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR1_0r, 9845 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9846 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9847 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR1_0r_fields, 9848 #else 9849 0, 9850 #endif 9851 #endif 9852 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9853 PHYMOD_SYMBOL_FLAG_REGISTER, 9854 "SC_X1_SPD_OVRR1_0r", 9855 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9856 "SC_X1_SPEED_OVERRIDE1_OVERRIDE_0", 9857 NULL, 9858 #endif 9859 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9860 0x0, /* 0 */ 9861 0, 9862 #endif 9863 }, 9864 { 9865 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR1_1r, 9866 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9867 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9868 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR1_1r_fields, 9869 #else 9870 0, 9871 #endif 9872 #endif 9873 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9874 PHYMOD_SYMBOL_FLAG_REGISTER, 9875 "SC_X1_SPD_OVRR1_1r", 9876 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9877 "SC_X1_SPEED_OVERRIDE1_OVERRIDE_1", 9878 NULL, 9879 #endif 9880 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9881 0x0, /* 0 */ 9882 0, 9883 #endif 9884 }, 9885 { 9886 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR1_2r, 9887 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9888 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9889 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR1_2r_fields, 9890 #else 9891 0, 9892 #endif 9893 #endif 9894 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9895 PHYMOD_SYMBOL_FLAG_REGISTER, 9896 "SC_X1_SPD_OVRR1_2r", 9897 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9898 "SC_X1_SPEED_OVERRIDE1_OVERRIDE_2", 9899 NULL, 9900 #endif 9901 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9902 0x400, /* 1024 */ 9903 0, 9904 #endif 9905 }, 9906 { 9907 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR1_3r, 9908 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9909 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9910 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR1_3r_fields, 9911 #else 9912 0, 9913 #endif 9914 #endif 9915 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9916 PHYMOD_SYMBOL_FLAG_REGISTER, 9917 "SC_X1_SPD_OVRR1_3r", 9918 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9919 "SC_X1_SPEED_OVERRIDE1_OVERRIDE_3", 9920 NULL, 9921 #endif 9922 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9923 0x0, /* 0 */ 9924 0, 9925 #endif 9926 }, 9927 { 9928 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR1_4r, 9929 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9930 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9931 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR1_4r_fields, 9932 #else 9933 0, 9934 #endif 9935 #endif 9936 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9937 PHYMOD_SYMBOL_FLAG_REGISTER, 9938 "SC_X1_SPD_OVRR1_4r", 9939 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9940 "SC_X1_SPEED_OVERRIDE1_OVERRIDE_4", 9941 NULL, 9942 #endif 9943 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9944 0x0, /* 0 */ 9945 0, 9946 #endif 9947 }, 9948 { 9949 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR1_5r, 9950 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9951 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9952 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR1_5r_fields, 9953 #else 9954 0, 9955 #endif 9956 #endif 9957 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9958 PHYMOD_SYMBOL_FLAG_REGISTER, 9959 "SC_X1_SPD_OVRR1_5r", 9960 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9961 "SC_X1_SPEED_OVERRIDE1_OVERRIDE_5", 9962 NULL, 9963 #endif 9964 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9965 0x0, /* 0 */ 9966 0, 9967 #endif 9968 }, 9969 { 9970 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR1_6r, 9971 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9972 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9973 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR1_6r_fields, 9974 #else 9975 0, 9976 #endif 9977 #endif 9978 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9979 PHYMOD_SYMBOL_FLAG_REGISTER, 9980 "SC_X1_SPD_OVRR1_6r", 9981 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9982 "SC_X1_SPEED_OVERRIDE1_OVERRIDE_6", 9983 NULL, 9984 #endif 9985 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9986 0x0, /* 0 */ 9987 0, 9988 #endif 9989 }, 9990 { 9991 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR1_7r, 9992 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9993 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 9994 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR1_7r_fields, 9995 #else 9996 0, 9997 #endif 9998 #endif 9999 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10000 PHYMOD_SYMBOL_FLAG_REGISTER, 10001 "SC_X1_SPD_OVRR1_7r", 10002 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10003 "SC_X1_SPEED_OVERRIDE1_OVERRIDE_7", 10004 NULL, 10005 #endif 10006 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10007 0x0, /* 0 */ 10008 0, 10009 #endif 10010 }, 10011 { 10012 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR1_8r, 10013 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10014 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10015 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR1_8r_fields, 10016 #else 10017 0, 10018 #endif 10019 #endif 10020 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10021 PHYMOD_SYMBOL_FLAG_REGISTER, 10022 "SC_X1_SPD_OVRR1_8r", 10023 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10024 "SC_X1_SPEED_OVERRIDE1_OVERRIDE_8", 10025 NULL, 10026 #endif 10027 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10028 0x0, /* 0 */ 10029 0, 10030 #endif 10031 }, 10032 { 10033 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR2_SPDr, 10034 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10035 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10036 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR2_SPDr_fields, 10037 #else 10038 0, 10039 #endif 10040 #endif 10041 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10042 PHYMOD_SYMBOL_FLAG_REGISTER, 10043 "SC_X1_SPD_OVRR2_SPDr", 10044 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10045 "SC_X1_SPEED_OVERRIDE2_OVERRIDE_SPEED", 10046 NULL, 10047 #endif 10048 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10049 0xff00, /* 65280 */ 10050 0, 10051 #endif 10052 }, 10053 { 10054 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR2_0r, 10055 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10056 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10057 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR2_0r_fields, 10058 #else 10059 0, 10060 #endif 10061 #endif 10062 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10063 PHYMOD_SYMBOL_FLAG_REGISTER, 10064 "SC_X1_SPD_OVRR2_0r", 10065 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10066 "SC_X1_SPEED_OVERRIDE2_OVERRIDE_0", 10067 NULL, 10068 #endif 10069 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10070 0x0, /* 0 */ 10071 0, 10072 #endif 10073 }, 10074 { 10075 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR2_1r, 10076 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10077 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10078 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR2_1r_fields, 10079 #else 10080 0, 10081 #endif 10082 #endif 10083 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10084 PHYMOD_SYMBOL_FLAG_REGISTER, 10085 "SC_X1_SPD_OVRR2_1r", 10086 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10087 "SC_X1_SPEED_OVERRIDE2_OVERRIDE_1", 10088 NULL, 10089 #endif 10090 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10091 0x0, /* 0 */ 10092 0, 10093 #endif 10094 }, 10095 { 10096 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR2_2r, 10097 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10098 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10099 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR2_2r_fields, 10100 #else 10101 0, 10102 #endif 10103 #endif 10104 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10105 PHYMOD_SYMBOL_FLAG_REGISTER, 10106 "SC_X1_SPD_OVRR2_2r", 10107 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10108 "SC_X1_SPEED_OVERRIDE2_OVERRIDE_2", 10109 NULL, 10110 #endif 10111 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10112 0x400, /* 1024 */ 10113 0, 10114 #endif 10115 }, 10116 { 10117 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR2_3r, 10118 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10119 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10120 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR2_3r_fields, 10121 #else 10122 0, 10123 #endif 10124 #endif 10125 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10126 PHYMOD_SYMBOL_FLAG_REGISTER, 10127 "SC_X1_SPD_OVRR2_3r", 10128 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10129 "SC_X1_SPEED_OVERRIDE2_OVERRIDE_3", 10130 NULL, 10131 #endif 10132 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10133 0x0, /* 0 */ 10134 0, 10135 #endif 10136 }, 10137 { 10138 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR2_4r, 10139 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10140 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10141 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR2_4r_fields, 10142 #else 10143 0, 10144 #endif 10145 #endif 10146 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10147 PHYMOD_SYMBOL_FLAG_REGISTER, 10148 "SC_X1_SPD_OVRR2_4r", 10149 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10150 "SC_X1_SPEED_OVERRIDE2_OVERRIDE_4", 10151 NULL, 10152 #endif 10153 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10154 0x0, /* 0 */ 10155 0, 10156 #endif 10157 }, 10158 { 10159 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR2_5r, 10160 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10161 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10162 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR2_5r_fields, 10163 #else 10164 0, 10165 #endif 10166 #endif 10167 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10168 PHYMOD_SYMBOL_FLAG_REGISTER, 10169 "SC_X1_SPD_OVRR2_5r", 10170 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10171 "SC_X1_SPEED_OVERRIDE2_OVERRIDE_5", 10172 NULL, 10173 #endif 10174 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10175 0x0, /* 0 */ 10176 0, 10177 #endif 10178 }, 10179 { 10180 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR2_6r, 10181 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10182 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10183 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR2_6r_fields, 10184 #else 10185 0, 10186 #endif 10187 #endif 10188 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10189 PHYMOD_SYMBOL_FLAG_REGISTER, 10190 "SC_X1_SPD_OVRR2_6r", 10191 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10192 "SC_X1_SPEED_OVERRIDE2_OVERRIDE_6", 10193 NULL, 10194 #endif 10195 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10196 0x0, /* 0 */ 10197 0, 10198 #endif 10199 }, 10200 { 10201 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR2_7r, 10202 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10203 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10204 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR2_7r_fields, 10205 #else 10206 0, 10207 #endif 10208 #endif 10209 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10210 PHYMOD_SYMBOL_FLAG_REGISTER, 10211 "SC_X1_SPD_OVRR2_7r", 10212 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10213 "SC_X1_SPEED_OVERRIDE2_OVERRIDE_7", 10214 NULL, 10215 #endif 10216 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10217 0x0, /* 0 */ 10218 0, 10219 #endif 10220 }, 10221 { 10222 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR2_8r, 10223 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10224 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10225 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR2_8r_fields, 10226 #else 10227 0, 10228 #endif 10229 #endif 10230 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10231 PHYMOD_SYMBOL_FLAG_REGISTER, 10232 "SC_X1_SPD_OVRR2_8r", 10233 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10234 "SC_X1_SPEED_OVERRIDE2_OVERRIDE_8", 10235 NULL, 10236 #endif 10237 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10238 0x0, /* 0 */ 10239 0, 10240 #endif 10241 }, 10242 { 10243 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR3_SPDr, 10244 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10245 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10246 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR3_SPDr_fields, 10247 #else 10248 0, 10249 #endif 10250 #endif 10251 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10252 PHYMOD_SYMBOL_FLAG_REGISTER, 10253 "SC_X1_SPD_OVRR3_SPDr", 10254 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10255 "SC_X1_SPEED_OVERRIDE3_OVERRIDE_SPEED", 10256 NULL, 10257 #endif 10258 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10259 0xff00, /* 65280 */ 10260 0, 10261 #endif 10262 }, 10263 { 10264 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR3_0r, 10265 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10266 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10267 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR3_0r_fields, 10268 #else 10269 0, 10270 #endif 10271 #endif 10272 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10273 PHYMOD_SYMBOL_FLAG_REGISTER, 10274 "SC_X1_SPD_OVRR3_0r", 10275 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10276 "SC_X1_SPEED_OVERRIDE3_OVERRIDE_0", 10277 NULL, 10278 #endif 10279 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10280 0x0, /* 0 */ 10281 0, 10282 #endif 10283 }, 10284 { 10285 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR3_1r, 10286 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10287 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10288 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR3_1r_fields, 10289 #else 10290 0, 10291 #endif 10292 #endif 10293 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10294 PHYMOD_SYMBOL_FLAG_REGISTER, 10295 "SC_X1_SPD_OVRR3_1r", 10296 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10297 "SC_X1_SPEED_OVERRIDE3_OVERRIDE_1", 10298 NULL, 10299 #endif 10300 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10301 0x0, /* 0 */ 10302 0, 10303 #endif 10304 }, 10305 { 10306 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR3_2r, 10307 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10308 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10309 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR3_2r_fields, 10310 #else 10311 0, 10312 #endif 10313 #endif 10314 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10315 PHYMOD_SYMBOL_FLAG_REGISTER, 10316 "SC_X1_SPD_OVRR3_2r", 10317 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10318 "SC_X1_SPEED_OVERRIDE3_OVERRIDE_2", 10319 NULL, 10320 #endif 10321 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10322 0x400, /* 1024 */ 10323 0, 10324 #endif 10325 }, 10326 { 10327 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR3_3r, 10328 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10329 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10330 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR3_3r_fields, 10331 #else 10332 0, 10333 #endif 10334 #endif 10335 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10336 PHYMOD_SYMBOL_FLAG_REGISTER, 10337 "SC_X1_SPD_OVRR3_3r", 10338 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10339 "SC_X1_SPEED_OVERRIDE3_OVERRIDE_3", 10340 NULL, 10341 #endif 10342 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10343 0x0, /* 0 */ 10344 0, 10345 #endif 10346 }, 10347 { 10348 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR3_4r, 10349 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10350 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10351 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR3_4r_fields, 10352 #else 10353 0, 10354 #endif 10355 #endif 10356 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10357 PHYMOD_SYMBOL_FLAG_REGISTER, 10358 "SC_X1_SPD_OVRR3_4r", 10359 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10360 "SC_X1_SPEED_OVERRIDE3_OVERRIDE_4", 10361 NULL, 10362 #endif 10363 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10364 0x0, /* 0 */ 10365 0, 10366 #endif 10367 }, 10368 { 10369 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR3_5r, 10370 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10371 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10372 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR3_5r_fields, 10373 #else 10374 0, 10375 #endif 10376 #endif 10377 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10378 PHYMOD_SYMBOL_FLAG_REGISTER, 10379 "SC_X1_SPD_OVRR3_5r", 10380 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10381 "SC_X1_SPEED_OVERRIDE3_OVERRIDE_5", 10382 NULL, 10383 #endif 10384 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10385 0x0, /* 0 */ 10386 0, 10387 #endif 10388 }, 10389 { 10390 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR3_6r, 10391 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10392 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10393 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR3_6r_fields, 10394 #else 10395 0, 10396 #endif 10397 #endif 10398 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10399 PHYMOD_SYMBOL_FLAG_REGISTER, 10400 "SC_X1_SPD_OVRR3_6r", 10401 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10402 "SC_X1_SPEED_OVERRIDE3_OVERRIDE_6", 10403 NULL, 10404 #endif 10405 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10406 0x0, /* 0 */ 10407 0, 10408 #endif 10409 }, 10410 { 10411 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR3_7r, 10412 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10413 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10414 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR3_7r_fields, 10415 #else 10416 0, 10417 #endif 10418 #endif 10419 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10420 PHYMOD_SYMBOL_FLAG_REGISTER, 10421 "SC_X1_SPD_OVRR3_7r", 10422 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10423 "SC_X1_SPEED_OVERRIDE3_OVERRIDE_7", 10424 NULL, 10425 #endif 10426 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10427 0x0, /* 0 */ 10428 0, 10429 #endif 10430 }, 10431 { 10432 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR3_8r, 10433 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10434 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10435 BCMI_TSCE16_XGXS_SC_X1_SPD_OVRR3_8r_fields, 10436 #else 10437 0, 10438 #endif 10439 #endif 10440 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10441 PHYMOD_SYMBOL_FLAG_REGISTER, 10442 "SC_X1_SPD_OVRR3_8r", 10443 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10444 "SC_X1_SPEED_OVERRIDE3_OVERRIDE_8", 10445 NULL, 10446 #endif 10447 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10448 0x0, /* 0 */ 10449 0, 10450 #endif 10451 }, 10452 { 10453 BCMI_TSCE16_XGXS_TX_X2_MLD_SWP_CNTr, 10454 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10455 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10456 BCMI_TSCE16_XGXS_TX_X2_MLD_SWP_CNTr_fields, 10457 #else 10458 0, 10459 #endif 10460 #endif 10461 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10462 PHYMOD_SYMBOL_FLAG_REGISTER, 10463 "TX_X2_MLD_SWP_CNTr", 10464 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10465 "TX_X2_CONTROL0_MLD_SWAP_COUNT", 10466 NULL, 10467 #endif 10468 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10469 0xfffc, /* 65532 */ 10470 0, 10471 #endif 10472 }, 10473 { 10474 BCMI_TSCE16_XGXS_TX_X2_CL48_0r, 10475 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10476 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10477 BCMI_TSCE16_XGXS_TX_X2_CL48_0r_fields, 10478 #else 10479 0, 10480 #endif 10481 #endif 10482 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10483 PHYMOD_SYMBOL_FLAG_REGISTER, 10484 "TX_X2_CL48_0r", 10485 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10486 "TX_X2_CONTROL0_CL48_0", 10487 NULL, 10488 #endif 10489 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10490 0x8030, /* 32816 */ 10491 0, 10492 #endif 10493 }, 10494 { 10495 BCMI_TSCE16_XGXS_TX_X2_CL82_0r, 10496 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10497 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10498 BCMI_TSCE16_XGXS_TX_X2_CL82_0r_fields, 10499 #else 10500 0, 10501 #endif 10502 #endif 10503 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10504 PHYMOD_SYMBOL_FLAG_REGISTER, 10505 "TX_X2_CL82_0r", 10506 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10507 "TX_X2_CONTROL0_CL82_0", 10508 NULL, 10509 #endif 10510 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10511 0x70, /* 112 */ 10512 0, 10513 #endif 10514 }, 10515 { 10516 BCMI_TSCE16_XGXS_TX_X2_BRCM_MODEr, 10517 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10518 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10519 BCMI_TSCE16_XGXS_TX_X2_BRCM_MODEr_fields, 10520 #else 10521 0, 10522 #endif 10523 #endif 10524 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10525 PHYMOD_SYMBOL_FLAG_REGISTER, 10526 "TX_X2_BRCM_MODEr", 10527 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10528 "TX_X2_CONTROL0_BRCM_MODE", 10529 NULL, 10530 #endif 10531 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10532 0x64, /* 100 */ 10533 0, 10534 #endif 10535 }, 10536 { 10537 BCMI_TSCE16_XGXS_TX_X2_CL82_TX_STS0r, 10538 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10539 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10540 BCMI_TSCE16_XGXS_TX_X2_CL82_TX_STS0r_fields, 10541 #else 10542 0, 10543 #endif 10544 #endif 10545 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10546 PHYMOD_SYMBOL_FLAG_REGISTER, 10547 "TX_X2_CL82_TX_STS0r", 10548 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10549 "TX_X2_STATUS0_CL82_TX_STATUS_0", 10550 NULL, 10551 #endif 10552 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10553 0x0, /* 0 */ 10554 0, 10555 #endif 10556 }, 10557 { 10558 BCMI_TSCE16_XGXS_RX_X2_QRSVD0r, 10559 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10560 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10561 BCMI_TSCE16_XGXS_RX_X2_QRSVD0r_fields, 10562 #else 10563 0, 10564 #endif 10565 #endif 10566 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10567 PHYMOD_SYMBOL_FLAG_REGISTER, 10568 "RX_X2_QRSVD0r", 10569 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10570 "RX_X2_CONTROL0_QRSVD_0", 10571 NULL, 10572 #endif 10573 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10574 0x0, /* 0 */ 10575 0, 10576 #endif 10577 }, 10578 { 10579 BCMI_TSCE16_XGXS_RX_X2_QRSVD1r, 10580 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10581 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10582 BCMI_TSCE16_XGXS_RX_X2_QRSVD1r_fields, 10583 #else 10584 0, 10585 #endif 10586 #endif 10587 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10588 PHYMOD_SYMBOL_FLAG_REGISTER, 10589 "RX_X2_QRSVD1r", 10590 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10591 "RX_X2_CONTROL0_QRSVD_1", 10592 NULL, 10593 #endif 10594 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10595 0x0, /* 0 */ 10596 0, 10597 #endif 10598 }, 10599 { 10600 BCMI_TSCE16_XGXS_RX_X2_QRSVD2r, 10601 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10602 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10603 BCMI_TSCE16_XGXS_RX_X2_QRSVD2r_fields, 10604 #else 10605 0, 10606 #endif 10607 #endif 10608 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10609 PHYMOD_SYMBOL_FLAG_REGISTER, 10610 "RX_X2_QRSVD2r", 10611 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10612 "RX_X2_CONTROL0_QRSVD_2", 10613 NULL, 10614 #endif 10615 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10616 0x0, /* 0 */ 10617 0, 10618 #endif 10619 }, 10620 { 10621 BCMI_TSCE16_XGXS_RX_X2_MISC0r, 10622 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10623 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10624 BCMI_TSCE16_XGXS_RX_X2_MISC0r_fields, 10625 #else 10626 0, 10627 #endif 10628 #endif 10629 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10630 PHYMOD_SYMBOL_FLAG_REGISTER, 10631 "RX_X2_MISC0r", 10632 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10633 "RX_X2_CONTROL0_MISC_0", 10634 NULL, 10635 #endif 10636 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10637 0x1400, /* 5120 */ 10638 0, 10639 #endif 10640 }, 10641 { 10642 BCMI_TSCE16_XGXS_RX_X2_MISC1r, 10643 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10644 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10645 BCMI_TSCE16_XGXS_RX_X2_MISC1r_fields, 10646 #else 10647 0, 10648 #endif 10649 #endif 10650 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10651 PHYMOD_SYMBOL_FLAG_REGISTER, 10652 "RX_X2_MISC1r", 10653 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10654 "RX_X2_CONTROL0_MISC_1", 10655 NULL, 10656 #endif 10657 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10658 0x30f, /* 783 */ 10659 0, 10660 #endif 10661 }, 10662 { 10663 BCMI_TSCE16_XGXS_RX_X2_SKEW_STS0r, 10664 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10665 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10666 BCMI_TSCE16_XGXS_RX_X2_SKEW_STS0r_fields, 10667 #else 10668 0, 10669 #endif 10670 #endif 10671 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10672 PHYMOD_SYMBOL_FLAG_REGISTER, 10673 "RX_X2_SKEW_STS0r", 10674 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10675 "RX_X2_STATUS0_SKEW_STATUS_0", 10676 NULL, 10677 #endif 10678 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10679 0x0, /* 0 */ 10680 0, 10681 #endif 10682 }, 10683 { 10684 BCMI_TSCE16_XGXS_RX_X2_SKEW_STS1r, 10685 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10686 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10687 BCMI_TSCE16_XGXS_RX_X2_SKEW_STS1r_fields, 10688 #else 10689 0, 10690 #endif 10691 #endif 10692 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10693 PHYMOD_SYMBOL_FLAG_REGISTER, 10694 "RX_X2_SKEW_STS1r", 10695 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10696 "RX_X2_STATUS0_SKEW_STATUS_1", 10697 NULL, 10698 #endif 10699 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10700 0x0, /* 0 */ 10701 0, 10702 #endif 10703 }, 10704 { 10705 BCMI_TSCE16_XGXS_RX_X2_CL82_RX_SCR_IDLE_ERR_CNTr, 10706 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10707 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10708 BCMI_TSCE16_XGXS_RX_X2_CL82_RX_SCR_IDLE_ERR_CNTr_fields, 10709 #else 10710 0, 10711 #endif 10712 #endif 10713 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10714 PHYMOD_SYMBOL_FLAG_REGISTER, 10715 "RX_X2_CL82_RX_SCR_IDLE_ERR_CNTr", 10716 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10717 "RX_X2_STATUS0_CL82_RX_SCR_IDLE_ERR_CNT", 10718 NULL, 10719 #endif 10720 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10721 0x0, /* 0 */ 10722 0, 10723 #endif 10724 }, 10725 { 10726 BCMI_TSCE16_XGXS_CL82_RX_DECR_STSr, 10727 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10728 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10729 BCMI_TSCE16_XGXS_CL82_RX_DECR_STSr_fields, 10730 #else 10731 0, 10732 #endif 10733 #endif 10734 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10735 PHYMOD_SYMBOL_FLAG_REGISTER, 10736 "CL82_RX_DECR_STSr", 10737 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10738 "CL82_RX_DECODER_STATUS", 10739 NULL, 10740 #endif 10741 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10742 0x0, /* 0 */ 10743 0, 10744 #endif 10745 }, 10746 { 10747 BCMI_TSCE16_XGXS_CL82_RX_DESKEW_BER_STSr, 10748 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10749 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10750 BCMI_TSCE16_XGXS_CL82_RX_DESKEW_BER_STSr_fields, 10751 #else 10752 0, 10753 #endif 10754 #endif 10755 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10756 PHYMOD_SYMBOL_FLAG_REGISTER, 10757 "CL82_RX_DESKEW_BER_STSr", 10758 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10759 "CL82_RX_DESKEW_BER_STATUS", 10760 NULL, 10761 #endif 10762 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10763 0x0, /* 0 */ 10764 0, 10765 #endif 10766 }, 10767 { 10768 BCMI_TSCE16_XGXS_CL82_BER_HO_STSr, 10769 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10770 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10771 BCMI_TSCE16_XGXS_CL82_BER_HO_STSr_fields, 10772 #else 10773 0, 10774 #endif 10775 #endif 10776 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10777 PHYMOD_SYMBOL_FLAG_REGISTER, 10778 "CL82_BER_HO_STSr", 10779 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10780 "CL82_BER_HO_STATUS", 10781 NULL, 10782 #endif 10783 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10784 0x0, /* 0 */ 10785 0, 10786 #endif 10787 }, 10788 { 10789 BCMI_TSCE16_XGXS_CL82_PCS_ERRED_BLKS_HOr, 10790 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10791 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10792 BCMI_TSCE16_XGXS_CL82_PCS_ERRED_BLKS_HOr_fields, 10793 #else 10794 0, 10795 #endif 10796 #endif 10797 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10798 PHYMOD_SYMBOL_FLAG_REGISTER, 10799 "CL82_PCS_ERRED_BLKS_HOr", 10800 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10801 "CL82_PCS_ERRORED_BLOCKS_HO", 10802 NULL, 10803 #endif 10804 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10805 0x8000, /* 32768 */ 10806 0, 10807 #endif 10808 }, 10809 { 10810 BCMI_TSCE16_XGXS_PMD_X4_CTLr, 10811 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10812 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10813 BCMI_TSCE16_XGXS_PMD_X4_CTLr_fields, 10814 #else 10815 0, 10816 #endif 10817 #endif 10818 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10819 PHYMOD_SYMBOL_FLAG_REGISTER, 10820 "PMD_X4_CTLr", 10821 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10822 "PMD_X4_CONTROL", 10823 NULL, 10824 #endif 10825 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10826 0x0, /* 0 */ 10827 0, 10828 #endif 10829 }, 10830 { 10831 BCMI_TSCE16_XGXS_PMD_X4_MODEr, 10832 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10833 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10834 BCMI_TSCE16_XGXS_PMD_X4_MODEr_fields, 10835 #else 10836 0, 10837 #endif 10838 #endif 10839 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10840 PHYMOD_SYMBOL_FLAG_REGISTER, 10841 "PMD_X4_MODEr", 10842 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10843 NULL, 10844 NULL, 10845 #endif 10846 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10847 0x0, /* 0 */ 10848 0, 10849 #endif 10850 }, 10851 { 10852 BCMI_TSCE16_XGXS_PMD_X4_STSr, 10853 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10854 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10855 BCMI_TSCE16_XGXS_PMD_X4_STSr_fields, 10856 #else 10857 0, 10858 #endif 10859 #endif 10860 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10861 PHYMOD_SYMBOL_FLAG_REGISTER, 10862 "PMD_X4_STSr", 10863 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10864 "PMD_X4_STATUS", 10865 NULL, 10866 #endif 10867 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10868 0x0, /* 0 */ 10869 0, 10870 #endif 10871 }, 10872 { 10873 BCMI_TSCE16_XGXS_PMD_X4_LATCH_STSr, 10874 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10875 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10876 BCMI_TSCE16_XGXS_PMD_X4_LATCH_STSr_fields, 10877 #else 10878 0, 10879 #endif 10880 #endif 10881 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10882 PHYMOD_SYMBOL_FLAG_REGISTER, 10883 "PMD_X4_LATCH_STSr", 10884 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10885 "PMD_X4_LATCH_STATUS", 10886 NULL, 10887 #endif 10888 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10889 0x0, /* 0 */ 10890 0, 10891 #endif 10892 }, 10893 { 10894 BCMI_TSCE16_XGXS_PMD_X4_OVRRr, 10895 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10896 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10897 BCMI_TSCE16_XGXS_PMD_X4_OVRRr_fields, 10898 #else 10899 0, 10900 #endif 10901 #endif 10902 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10903 PHYMOD_SYMBOL_FLAG_REGISTER, 10904 "PMD_X4_OVRRr", 10905 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10906 "PMD_X4_OVERRIDE", 10907 NULL, 10908 #endif 10909 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10910 0x0, /* 0 */ 10911 0, 10912 #endif 10913 }, 10914 { 10915 BCMI_TSCE16_XGXS_PMD_X4_EEE_CTLr, 10916 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10917 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10918 BCMI_TSCE16_XGXS_PMD_X4_EEE_CTLr_fields, 10919 #else 10920 0, 10921 #endif 10922 #endif 10923 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10924 PHYMOD_SYMBOL_FLAG_REGISTER, 10925 "PMD_X4_EEE_CTLr", 10926 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10927 "PMD_X4_EEE_CONTROL", 10928 NULL, 10929 #endif 10930 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10931 0x0, /* 0 */ 10932 0, 10933 #endif 10934 }, 10935 { 10936 BCMI_TSCE16_XGXS_PMD_X4_EEE_STSr, 10937 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10938 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10939 BCMI_TSCE16_XGXS_PMD_X4_EEE_STSr_fields, 10940 #else 10941 0, 10942 #endif 10943 #endif 10944 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10945 PHYMOD_SYMBOL_FLAG_REGISTER, 10946 "PMD_X4_EEE_STSr", 10947 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10948 "PMD_X4_EEE_STATUS", 10949 NULL, 10950 #endif 10951 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10952 0x0, /* 0 */ 10953 0, 10954 #endif 10955 }, 10956 { 10957 BCMI_TSCE16_XGXS_TXPKTCNT_Ur, 10958 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10959 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10960 BCMI_TSCE16_XGXS_TXPKTCNT_Ur_fields, 10961 #else 10962 0, 10963 #endif 10964 #endif 10965 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10966 PHYMOD_SYMBOL_FLAG_REGISTER, 10967 "TXPKTCNT_Ur", 10968 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10969 "PATGEN1_TXPKTCNT_U", 10970 NULL, 10971 #endif 10972 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10973 0x0, /* 0 */ 10974 0, 10975 #endif 10976 }, 10977 { 10978 BCMI_TSCE16_XGXS_TXPKTCNT_Lr, 10979 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10980 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 10981 BCMI_TSCE16_XGXS_TXPKTCNT_Lr_fields, 10982 #else 10983 0, 10984 #endif 10985 #endif 10986 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10987 PHYMOD_SYMBOL_FLAG_REGISTER, 10988 "TXPKTCNT_Lr", 10989 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10990 "PATGEN1_TXPKTCNT_L", 10991 NULL, 10992 #endif 10993 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10994 0x0, /* 0 */ 10995 0, 10996 #endif 10997 }, 10998 { 10999 BCMI_TSCE16_XGXS_RXPKTCNT_Ur, 11000 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11001 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11002 BCMI_TSCE16_XGXS_RXPKTCNT_Ur_fields, 11003 #else 11004 0, 11005 #endif 11006 #endif 11007 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11008 PHYMOD_SYMBOL_FLAG_REGISTER, 11009 "RXPKTCNT_Ur", 11010 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11011 "PATGEN1_RXPKTCNT_U", 11012 NULL, 11013 #endif 11014 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11015 0x0, /* 0 */ 11016 0, 11017 #endif 11018 }, 11019 { 11020 BCMI_TSCE16_XGXS_RXPKTCNT_Lr, 11021 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11022 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11023 BCMI_TSCE16_XGXS_RXPKTCNT_Lr_fields, 11024 #else 11025 0, 11026 #endif 11027 #endif 11028 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11029 PHYMOD_SYMBOL_FLAG_REGISTER, 11030 "RXPKTCNT_Lr", 11031 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11032 "PATGEN1_RXPKTCNT_L", 11033 NULL, 11034 #endif 11035 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11036 0x0, /* 0 */ 11037 0, 11038 #endif 11039 }, 11040 { 11041 BCMI_TSCE16_XGXS_SC_X4_CTLr, 11042 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11043 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11044 BCMI_TSCE16_XGXS_SC_X4_CTLr_fields, 11045 #else 11046 0, 11047 #endif 11048 #endif 11049 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11050 PHYMOD_SYMBOL_FLAG_REGISTER, 11051 "SC_X4_CTLr", 11052 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11053 "SC_X4_CONTROL_CONTROL", 11054 NULL, 11055 #endif 11056 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11057 0xff, /* 255 */ 11058 0, 11059 #endif 11060 }, 11061 { 11062 BCMI_TSCE16_XGXS_SC_X4_STSr, 11063 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11064 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11065 BCMI_TSCE16_XGXS_SC_X4_STSr_fields, 11066 #else 11067 0, 11068 #endif 11069 #endif 11070 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11071 PHYMOD_SYMBOL_FLAG_REGISTER, 11072 "SC_X4_STSr", 11073 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11074 "SC_X4_CONTROL_STATUS", 11075 NULL, 11076 #endif 11077 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11078 0x0, /* 0 */ 11079 0, 11080 #endif 11081 }, 11082 { 11083 BCMI_TSCE16_XGXS_SC_X4_ERRr, 11084 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11085 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11086 BCMI_TSCE16_XGXS_SC_X4_ERRr_fields, 11087 #else 11088 0, 11089 #endif 11090 #endif 11091 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11092 PHYMOD_SYMBOL_FLAG_REGISTER, 11093 "SC_X4_ERRr", 11094 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11095 "SC_X4_CONTROL_ERROR", 11096 NULL, 11097 #endif 11098 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11099 0x0, /* 0 */ 11100 0, 11101 #endif 11102 }, 11103 { 11104 BCMI_TSCE16_XGXS_SC_X4_DBGr, 11105 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11106 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11107 BCMI_TSCE16_XGXS_SC_X4_DBGr_fields, 11108 #else 11109 0, 11110 #endif 11111 #endif 11112 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11113 PHYMOD_SYMBOL_FLAG_REGISTER, 11114 "SC_X4_DBGr", 11115 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11116 "SC_X4_CONTROL_DEBUG", 11117 NULL, 11118 #endif 11119 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11120 0x8000, /* 32768 */ 11121 0, 11122 #endif 11123 }, 11124 { 11125 BCMI_TSCE16_XGXS_SC_X4_LN_NUM_OVRRr, 11126 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11127 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11128 BCMI_TSCE16_XGXS_SC_X4_LN_NUM_OVRRr_fields, 11129 #else 11130 0, 11131 #endif 11132 #endif 11133 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11134 PHYMOD_SYMBOL_FLAG_REGISTER, 11135 "SC_X4_LN_NUM_OVRRr", 11136 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11137 "SC_X4_CONTROL_LANE_NUM_OVERRIDE", 11138 NULL, 11139 #endif 11140 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11141 0x0, /* 0 */ 11142 0, 11143 #endif 11144 }, 11145 { 11146 BCMI_TSCE16_XGXS_SC_X4_BYPASSr, 11147 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11148 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11149 BCMI_TSCE16_XGXS_SC_X4_BYPASSr_fields, 11150 #else 11151 0, 11152 #endif 11153 #endif 11154 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11155 PHYMOD_SYMBOL_FLAG_REGISTER, 11156 "SC_X4_BYPASSr", 11157 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11158 "SC_X4_CONTROL_BYPASS", 11159 NULL, 11160 #endif 11161 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11162 0x0, /* 0 */ 11163 0, 11164 #endif 11165 }, 11166 { 11167 BCMI_TSCE16_XGXS_SC_X4_FLD_OVRR_EN0_TYPEr, 11168 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11169 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11170 BCMI_TSCE16_XGXS_SC_X4_FLD_OVRR_EN0_TYPEr_fields, 11171 #else 11172 0, 11173 #endif 11174 #endif 11175 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11176 PHYMOD_SYMBOL_FLAG_REGISTER, 11177 "SC_X4_FLD_OVRR_EN0_TYPEr", 11178 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11179 "SC_X4_FIELD_OVERRIDE_ENABLE_FIELD_OVERRIDE_ENABLE0_TYPE", 11180 NULL, 11181 #endif 11182 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11183 0x0, /* 0 */ 11184 0, 11185 #endif 11186 }, 11187 { 11188 BCMI_TSCE16_XGXS_SC_X4_FLD_OVRR_EN1_TYPEr, 11189 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11190 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11191 BCMI_TSCE16_XGXS_SC_X4_FLD_OVRR_EN1_TYPEr_fields, 11192 #else 11193 0, 11194 #endif 11195 #endif 11196 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11197 PHYMOD_SYMBOL_FLAG_REGISTER, 11198 "SC_X4_FLD_OVRR_EN1_TYPEr", 11199 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11200 "SC_X4_FIELD_OVERRIDE_ENABLE_FIELD_OVERRIDE_ENABLE1_TYPE", 11201 NULL, 11202 #endif 11203 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11204 0x0, /* 0 */ 11205 0, 11206 #endif 11207 }, 11208 { 11209 BCMI_TSCE16_XGXS_SC_X4_RSLVD_SPDr, 11210 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11211 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11212 BCMI_TSCE16_XGXS_SC_X4_RSLVD_SPDr_fields, 11213 #else 11214 0, 11215 #endif 11216 #endif 11217 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11218 PHYMOD_SYMBOL_FLAG_REGISTER, 11219 "SC_X4_RSLVD_SPDr", 11220 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11221 "SC_X4_FINAL_CONFIG_STATUS_RESOLVED_SPEED", 11222 NULL, 11223 #endif 11224 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11225 0xff00, /* 65280 */ 11226 0, 11227 #endif 11228 }, 11229 { 11230 BCMI_TSCE16_XGXS_SC_X4_RSLVD0r, 11231 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11232 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11233 BCMI_TSCE16_XGXS_SC_X4_RSLVD0r_fields, 11234 #else 11235 0, 11236 #endif 11237 #endif 11238 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11239 PHYMOD_SYMBOL_FLAG_REGISTER, 11240 "SC_X4_RSLVD0r", 11241 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11242 "SC_X4_FINAL_CONFIG_STATUS_RESOLVED_0", 11243 NULL, 11244 #endif 11245 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11246 0x0, /* 0 */ 11247 0, 11248 #endif 11249 }, 11250 { 11251 BCMI_TSCE16_XGXS_SC_X4_RSLVD1r, 11252 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11253 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11254 BCMI_TSCE16_XGXS_SC_X4_RSLVD1r_fields, 11255 #else 11256 0, 11257 #endif 11258 #endif 11259 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11260 PHYMOD_SYMBOL_FLAG_REGISTER, 11261 "SC_X4_RSLVD1r", 11262 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11263 "SC_X4_FINAL_CONFIG_STATUS_RESOLVED_1", 11264 NULL, 11265 #endif 11266 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11267 0x0, /* 0 */ 11268 0, 11269 #endif 11270 }, 11271 { 11272 BCMI_TSCE16_XGXS_SC_X4_RSLVD2r, 11273 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11274 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11275 BCMI_TSCE16_XGXS_SC_X4_RSLVD2r_fields, 11276 #else 11277 0, 11278 #endif 11279 #endif 11280 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11281 PHYMOD_SYMBOL_FLAG_REGISTER, 11282 "SC_X4_RSLVD2r", 11283 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11284 "SC_X4_FINAL_CONFIG_STATUS_RESOLVED_2", 11285 NULL, 11286 #endif 11287 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11288 0x400, /* 1024 */ 11289 0, 11290 #endif 11291 }, 11292 { 11293 BCMI_TSCE16_XGXS_SC_X4_RSLVD3r, 11294 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11295 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11296 BCMI_TSCE16_XGXS_SC_X4_RSLVD3r_fields, 11297 #else 11298 0, 11299 #endif 11300 #endif 11301 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11302 PHYMOD_SYMBOL_FLAG_REGISTER, 11303 "SC_X4_RSLVD3r", 11304 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11305 "SC_X4_FINAL_CONFIG_STATUS_RESOLVED_3", 11306 NULL, 11307 #endif 11308 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11309 0x0, /* 0 */ 11310 0, 11311 #endif 11312 }, 11313 { 11314 BCMI_TSCE16_XGXS_SC_X4_RSLVD4r, 11315 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11316 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11317 BCMI_TSCE16_XGXS_SC_X4_RSLVD4r_fields, 11318 #else 11319 0, 11320 #endif 11321 #endif 11322 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11323 PHYMOD_SYMBOL_FLAG_REGISTER, 11324 "SC_X4_RSLVD4r", 11325 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11326 "SC_X4_FINAL_CONFIG_STATUS_RESOLVED_4", 11327 NULL, 11328 #endif 11329 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11330 0x0, /* 0 */ 11331 0, 11332 #endif 11333 }, 11334 { 11335 BCMI_TSCE16_XGXS_SC_X4_RSLVD5r, 11336 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11337 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11338 BCMI_TSCE16_XGXS_SC_X4_RSLVD5r_fields, 11339 #else 11340 0, 11341 #endif 11342 #endif 11343 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11344 PHYMOD_SYMBOL_FLAG_REGISTER, 11345 "SC_X4_RSLVD5r", 11346 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11347 "SC_X4_FINAL_CONFIG_STATUS_RESOLVED_5", 11348 NULL, 11349 #endif 11350 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11351 0x0, /* 0 */ 11352 0, 11353 #endif 11354 }, 11355 { 11356 BCMI_TSCE16_XGXS_SC_X4_RSLVD6r, 11357 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11358 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11359 BCMI_TSCE16_XGXS_SC_X4_RSLVD6r_fields, 11360 #else 11361 0, 11362 #endif 11363 #endif 11364 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11365 PHYMOD_SYMBOL_FLAG_REGISTER, 11366 "SC_X4_RSLVD6r", 11367 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11368 "SC_X4_FINAL_CONFIG_STATUS_RESOLVED_6", 11369 NULL, 11370 #endif 11371 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11372 0x0, /* 0 */ 11373 0, 11374 #endif 11375 }, 11376 { 11377 BCMI_TSCE16_XGXS_SC_X4_RSLVD7r, 11378 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11379 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11380 BCMI_TSCE16_XGXS_SC_X4_RSLVD7r_fields, 11381 #else 11382 0, 11383 #endif 11384 #endif 11385 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11386 PHYMOD_SYMBOL_FLAG_REGISTER, 11387 "SC_X4_RSLVD7r", 11388 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11389 "SC_X4_FINAL_CONFIG_STATUS_RESOLVED_7", 11390 NULL, 11391 #endif 11392 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11393 0x0, /* 0 */ 11394 0, 11395 #endif 11396 }, 11397 { 11398 BCMI_TSCE16_XGXS_SC_X4_RSLVD8r, 11399 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11400 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11401 BCMI_TSCE16_XGXS_SC_X4_RSLVD8r_fields, 11402 #else 11403 0, 11404 #endif 11405 #endif 11406 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11407 PHYMOD_SYMBOL_FLAG_REGISTER, 11408 "SC_X4_RSLVD8r", 11409 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11410 "SC_X4_FINAL_CONFIG_STATUS_RESOLVED_8", 11411 NULL, 11412 #endif 11413 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11414 0x0, /* 0 */ 11415 0, 11416 #endif 11417 }, 11418 { 11419 BCMI_TSCE16_XGXS_TX_X4_CRED0r, 11420 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11421 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11422 BCMI_TSCE16_XGXS_TX_X4_CRED0r_fields, 11423 #else 11424 0, 11425 #endif 11426 #endif 11427 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11428 PHYMOD_SYMBOL_FLAG_REGISTER, 11429 "TX_X4_CRED0r", 11430 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11431 "TX_X4_CREDIT0_CREDIT0", 11432 NULL, 11433 #endif 11434 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11435 0x0, /* 0 */ 11436 0, 11437 #endif 11438 }, 11439 { 11440 BCMI_TSCE16_XGXS_TX_X4_CRED1r, 11441 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11442 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11443 BCMI_TSCE16_XGXS_TX_X4_CRED1r_fields, 11444 #else 11445 0, 11446 #endif 11447 #endif 11448 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11449 PHYMOD_SYMBOL_FLAG_REGISTER, 11450 "TX_X4_CRED1r", 11451 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11452 "TX_X4_CREDIT0_CREDIT1", 11453 NULL, 11454 #endif 11455 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11456 0x0, /* 0 */ 11457 0, 11458 #endif 11459 }, 11460 { 11461 BCMI_TSCE16_XGXS_TX_X4_LOOPCNTr, 11462 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11463 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11464 BCMI_TSCE16_XGXS_TX_X4_LOOPCNTr_fields, 11465 #else 11466 0, 11467 #endif 11468 #endif 11469 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11470 PHYMOD_SYMBOL_FLAG_REGISTER, 11471 "TX_X4_LOOPCNTr", 11472 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11473 "TX_X4_CREDIT0_LOOPCNT", 11474 NULL, 11475 #endif 11476 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11477 0x0, /* 0 */ 11478 0, 11479 #endif 11480 }, 11481 { 11482 BCMI_TSCE16_XGXS_TX_X4_MAC_CREDGENCNTr, 11483 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11484 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11485 BCMI_TSCE16_XGXS_TX_X4_MAC_CREDGENCNTr_fields, 11486 #else 11487 0, 11488 #endif 11489 #endif 11490 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11491 PHYMOD_SYMBOL_FLAG_REGISTER, 11492 "TX_X4_MAC_CREDGENCNTr", 11493 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11494 "TX_X4_CREDIT0_MAC_CREDITGENCNT", 11495 NULL, 11496 #endif 11497 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11498 0x0, /* 0 */ 11499 0, 11500 #endif 11501 }, 11502 { 11503 BCMI_TSCE16_XGXS_TX_X4_PCS_CLKCNT0r, 11504 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11505 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11506 BCMI_TSCE16_XGXS_TX_X4_PCS_CLKCNT0r_fields, 11507 #else 11508 0, 11509 #endif 11510 #endif 11511 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11512 PHYMOD_SYMBOL_FLAG_REGISTER, 11513 "TX_X4_PCS_CLKCNT0r", 11514 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11515 "TX_X4_CREDIT0_PCS_CLOCKCNT0", 11516 NULL, 11517 #endif 11518 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11519 0x0, /* 0 */ 11520 0, 11521 #endif 11522 }, 11523 { 11524 BCMI_TSCE16_XGXS_TX_X4_PCS_CREDGENCNTr, 11525 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11526 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11527 BCMI_TSCE16_XGXS_TX_X4_PCS_CREDGENCNTr_fields, 11528 #else 11529 0, 11530 #endif 11531 #endif 11532 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11533 PHYMOD_SYMBOL_FLAG_REGISTER, 11534 "TX_X4_PCS_CREDGENCNTr", 11535 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11536 "TX_X4_CREDIT0_PCS_CREDITGENCNT", 11537 NULL, 11538 #endif 11539 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11540 0x0, /* 0 */ 11541 0, 11542 #endif 11543 }, 11544 { 11545 BCMI_TSCE16_XGXS_TX_X4_ENC0r, 11546 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11547 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11548 BCMI_TSCE16_XGXS_TX_X4_ENC0r_fields, 11549 #else 11550 0, 11551 #endif 11552 #endif 11553 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11554 PHYMOD_SYMBOL_FLAG_REGISTER, 11555 "TX_X4_ENC0r", 11556 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11557 "TX_X4_CONTROL0_ENCODE_0", 11558 NULL, 11559 #endif 11560 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11561 0x800, /* 2048 */ 11562 0, 11563 #endif 11564 }, 11565 { 11566 BCMI_TSCE16_XGXS_TX_X4_ENC1r, 11567 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11568 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11569 BCMI_TSCE16_XGXS_TX_X4_ENC1r_fields, 11570 #else 11571 0, 11572 #endif 11573 #endif 11574 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11575 PHYMOD_SYMBOL_FLAG_REGISTER, 11576 "TX_X4_ENC1r", 11577 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11578 "TX_X4_CONTROL0_ENCODE_1", 11579 NULL, 11580 #endif 11581 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11582 0x1b4, /* 436 */ 11583 0, 11584 #endif 11585 }, 11586 { 11587 BCMI_TSCE16_XGXS_TX_X4_MISCr, 11588 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11589 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11590 BCMI_TSCE16_XGXS_TX_X4_MISCr_fields, 11591 #else 11592 0, 11593 #endif 11594 #endif 11595 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11596 PHYMOD_SYMBOL_FLAG_REGISTER, 11597 "TX_X4_MISCr", 11598 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11599 "TX_X4_CONTROL0_MISC", 11600 NULL, 11601 #endif 11602 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11603 0x1c8, /* 456 */ 11604 0, 11605 #endif 11606 }, 11607 { 11608 BCMI_TSCE16_XGXS_TX_X4_PER_PHY_LN_CRED_CTLr, 11609 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11610 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11611 BCMI_TSCE16_XGXS_TX_X4_PER_PHY_LN_CRED_CTLr_fields, 11612 #else 11613 0, 11614 #endif 11615 #endif 11616 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11617 PHYMOD_SYMBOL_FLAG_REGISTER, 11618 "TX_X4_PER_PHY_LN_CRED_CTLr", 11619 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11620 "TX_X4_CONTROL0_PER_PHY_LN_CREDIT_CTRL", 11621 NULL, 11622 #endif 11623 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11624 0x0, /* 0 */ 11625 0, 11626 #endif 11627 }, 11628 { 11629 BCMI_TSCE16_XGXS_TX_X4_ENC_STS0r, 11630 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11631 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11632 BCMI_TSCE16_XGXS_TX_X4_ENC_STS0r_fields, 11633 #else 11634 0, 11635 #endif 11636 #endif 11637 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11638 PHYMOD_SYMBOL_FLAG_REGISTER, 11639 "TX_X4_ENC_STS0r", 11640 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11641 "TX_X4_STATUS0_ENCODE_STATUS_0", 11642 NULL, 11643 #endif 11644 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11645 0x0, /* 0 */ 11646 0, 11647 #endif 11648 }, 11649 { 11650 BCMI_TSCE16_XGXS_TX_X4_PCS_STSr, 11651 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11652 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11653 BCMI_TSCE16_XGXS_TX_X4_PCS_STSr_fields, 11654 #else 11655 0, 11656 #endif 11657 #endif 11658 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11659 PHYMOD_SYMBOL_FLAG_REGISTER, 11660 "TX_X4_PCS_STSr", 11661 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11662 "TX_X4_STATUS0_PCS_STATUS", 11663 NULL, 11664 #endif 11665 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11666 0x0, /* 0 */ 11667 0, 11668 #endif 11669 }, 11670 { 11671 BCMI_TSCE16_XGXS_RX_X4_PCS_CTL0r, 11672 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11673 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11674 BCMI_TSCE16_XGXS_RX_X4_PCS_CTL0r_fields, 11675 #else 11676 0, 11677 #endif 11678 #endif 11679 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11680 PHYMOD_SYMBOL_FLAG_REGISTER, 11681 "RX_X4_PCS_CTL0r", 11682 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11683 "RX_X4_CONTROL0_PCS_CONTROL_0", 11684 NULL, 11685 #endif 11686 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11687 0x0, /* 0 */ 11688 0, 11689 #endif 11690 }, 11691 { 11692 BCMI_TSCE16_XGXS_RX_X4_FEC0r, 11693 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11694 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11695 BCMI_TSCE16_XGXS_RX_X4_FEC0r_fields, 11696 #else 11697 0, 11698 #endif 11699 #endif 11700 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11701 PHYMOD_SYMBOL_FLAG_REGISTER, 11702 "RX_X4_FEC0r", 11703 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11704 "RX_X4_CONTROL0_FEC_0", 11705 NULL, 11706 #endif 11707 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11708 0x2000, /* 8192 */ 11709 0, 11710 #endif 11711 }, 11712 { 11713 BCMI_TSCE16_XGXS_RX_X4_FEC1r, 11714 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11715 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11716 BCMI_TSCE16_XGXS_RX_X4_FEC1r_fields, 11717 #else 11718 0, 11719 #endif 11720 #endif 11721 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11722 PHYMOD_SYMBOL_FLAG_REGISTER, 11723 "RX_X4_FEC1r", 11724 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11725 "RX_X4_CONTROL0_FEC_1", 11726 NULL, 11727 #endif 11728 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11729 0x442c, /* 17452 */ 11730 0, 11731 #endif 11732 }, 11733 { 11734 BCMI_TSCE16_XGXS_RX_X4_FEC2r, 11735 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11736 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11737 BCMI_TSCE16_XGXS_RX_X4_FEC2r_fields, 11738 #else 11739 0, 11740 #endif 11741 #endif 11742 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11743 PHYMOD_SYMBOL_FLAG_REGISTER, 11744 "RX_X4_FEC2r", 11745 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11746 "RX_X4_CONTROL0_FEC_2", 11747 NULL, 11748 #endif 11749 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11750 0x28, /* 40 */ 11751 0, 11752 #endif 11753 }, 11754 { 11755 BCMI_TSCE16_XGXS_RX_X4_DEC_CTL0r, 11756 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11757 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11758 BCMI_TSCE16_XGXS_RX_X4_DEC_CTL0r_fields, 11759 #else 11760 0, 11761 #endif 11762 #endif 11763 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11764 PHYMOD_SYMBOL_FLAG_REGISTER, 11765 "RX_X4_DEC_CTL0r", 11766 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11767 "RX_X4_CONTROL0_DECODE_CONTROL_0", 11768 NULL, 11769 #endif 11770 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11771 0x2870, /* 10352 */ 11772 0, 11773 #endif 11774 }, 11775 { 11776 BCMI_TSCE16_XGXS_RX_X4_DEC_CTL1r, 11777 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11778 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11779 BCMI_TSCE16_XGXS_RX_X4_DEC_CTL1r_fields, 11780 #else 11781 0, 11782 #endif 11783 #endif 11784 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11785 PHYMOD_SYMBOL_FLAG_REGISTER, 11786 "RX_X4_DEC_CTL1r", 11787 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11788 "RX_X4_CONTROL0_DECODE_CONTROL_1", 11789 NULL, 11790 #endif 11791 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11792 0x0, /* 0 */ 11793 0, 11794 #endif 11795 }, 11796 { 11797 BCMI_TSCE16_XGXS_RX_X4_CL36_RX0r, 11798 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11799 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11800 BCMI_TSCE16_XGXS_RX_X4_CL36_RX0r_fields, 11801 #else 11802 0, 11803 #endif 11804 #endif 11805 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11806 PHYMOD_SYMBOL_FLAG_REGISTER, 11807 "RX_X4_CL36_RX0r", 11808 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11809 "RX_X4_CONTROL0_CL36_RX_0", 11810 NULL, 11811 #endif 11812 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11813 0x0, /* 0 */ 11814 0, 11815 #endif 11816 }, 11817 { 11818 BCMI_TSCE16_XGXS_RX_X4_PMA_CTL0r, 11819 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11820 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11821 BCMI_TSCE16_XGXS_RX_X4_PMA_CTL0r_fields, 11822 #else 11823 0, 11824 #endif 11825 #endif 11826 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11827 PHYMOD_SYMBOL_FLAG_REGISTER, 11828 "RX_X4_PMA_CTL0r", 11829 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11830 "RX_X4_CONTROL0_PMA_CONTROL_0", 11831 NULL, 11832 #endif 11833 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11834 0x0, /* 0 */ 11835 0, 11836 #endif 11837 }, 11838 { 11839 BCMI_TSCE16_XGXS_RX_X4_LNK_CTLr, 11840 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11841 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11842 BCMI_TSCE16_XGXS_RX_X4_LNK_CTLr_fields, 11843 #else 11844 0, 11845 #endif 11846 #endif 11847 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11848 PHYMOD_SYMBOL_FLAG_REGISTER, 11849 "RX_X4_LNK_CTLr", 11850 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11851 "RX_X4_CONTROL0_LINK_CONTROL", 11852 NULL, 11853 #endif 11854 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11855 0x0, /* 0 */ 11856 0, 11857 #endif 11858 }, 11859 { 11860 BCMI_TSCE16_XGXS_RX_X4_SYNCE_CTLr, 11861 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11862 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11863 BCMI_TSCE16_XGXS_RX_X4_SYNCE_CTLr_fields, 11864 #else 11865 0, 11866 #endif 11867 #endif 11868 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11869 PHYMOD_SYMBOL_FLAG_REGISTER, 11870 "RX_X4_SYNCE_CTLr", 11871 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11872 "RX_X4_CONTROL0_SYNCE_CONTROL", 11873 NULL, 11874 #endif 11875 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11876 0x14a0, /* 5280 */ 11877 0, 11878 #endif 11879 }, 11880 { 11881 BCMI_TSCE16_XGXS_RX_X4_FEC_DBG_ERRLr, 11882 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11883 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11884 BCMI_TSCE16_XGXS_RX_X4_FEC_DBG_ERRLr_fields, 11885 #else 11886 0, 11887 #endif 11888 #endif 11889 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11890 PHYMOD_SYMBOL_FLAG_REGISTER, 11891 "RX_X4_FEC_DBG_ERRLr", 11892 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11893 "RX_X4_STATUS0_FEC_DBG_ERRL", 11894 NULL, 11895 #endif 11896 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11897 0x0, /* 0 */ 11898 0, 11899 #endif 11900 }, 11901 { 11902 BCMI_TSCE16_XGXS_RX_X4_FEC_DBG_ERRAHr, 11903 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11904 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11905 BCMI_TSCE16_XGXS_RX_X4_FEC_DBG_ERRAHr_fields, 11906 #else 11907 0, 11908 #endif 11909 #endif 11910 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11911 PHYMOD_SYMBOL_FLAG_REGISTER, 11912 "RX_X4_FEC_DBG_ERRAHr", 11913 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11914 "RX_X4_STATUS0_FEC_DBG_ERRAH", 11915 NULL, 11916 #endif 11917 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11918 0x0, /* 0 */ 11919 0, 11920 #endif 11921 }, 11922 { 11923 BCMI_TSCE16_XGXS_RX_X4_FEC_BURST_ERR_STSLr, 11924 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11925 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11926 BCMI_TSCE16_XGXS_RX_X4_FEC_BURST_ERR_STSLr_fields, 11927 #else 11928 0, 11929 #endif 11930 #endif 11931 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11932 PHYMOD_SYMBOL_FLAG_REGISTER, 11933 "RX_X4_FEC_BURST_ERR_STSLr", 11934 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11935 "RX_X4_STATUS0_FEC_BURST_ERR_STATUSL", 11936 NULL, 11937 #endif 11938 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11939 0x0, /* 0 */ 11940 0, 11941 #endif 11942 }, 11943 { 11944 BCMI_TSCE16_XGXS_RX_X4_FEC_BURST_ERR_STSHr, 11945 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11946 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11947 BCMI_TSCE16_XGXS_RX_X4_FEC_BURST_ERR_STSHr_fields, 11948 #else 11949 0, 11950 #endif 11951 #endif 11952 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11953 PHYMOD_SYMBOL_FLAG_REGISTER, 11954 "RX_X4_FEC_BURST_ERR_STSHr", 11955 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11956 "RX_X4_STATUS0_FEC_BURST_ERR_STATUSH", 11957 NULL, 11958 #endif 11959 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11960 0x0, /* 0 */ 11961 0, 11962 #endif 11963 }, 11964 { 11965 BCMI_TSCE16_XGXS_RX_X4_BARREL_SHIFTER_STr, 11966 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11967 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11968 BCMI_TSCE16_XGXS_RX_X4_BARREL_SHIFTER_STr_fields, 11969 #else 11970 0, 11971 #endif 11972 #endif 11973 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11974 PHYMOD_SYMBOL_FLAG_REGISTER, 11975 "RX_X4_BARREL_SHIFTER_STr", 11976 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11977 "RX_X4_STATUS0_BARREL_SHIFTER_STATE", 11978 NULL, 11979 #endif 11980 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11981 0x0, /* 0 */ 11982 0, 11983 #endif 11984 }, 11985 { 11986 BCMI_TSCE16_XGXS_RX_X4_CL49_LOCK_FSM_STSr, 11987 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11988 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 11989 BCMI_TSCE16_XGXS_RX_X4_CL49_LOCK_FSM_STSr_fields, 11990 #else 11991 0, 11992 #endif 11993 #endif 11994 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11995 PHYMOD_SYMBOL_FLAG_REGISTER, 11996 "RX_X4_CL49_LOCK_FSM_STSr", 11997 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11998 "RX_X4_STATUS0_CL49_LOCK_FSM_STATUS", 11999 NULL, 12000 #endif 12001 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12002 0x0, /* 0 */ 12003 0, 12004 #endif 12005 }, 12006 { 12007 BCMI_TSCE16_XGXS_RX_X4_DEC_STS0r, 12008 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12009 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12010 BCMI_TSCE16_XGXS_RX_X4_DEC_STS0r_fields, 12011 #else 12012 0, 12013 #endif 12014 #endif 12015 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12016 PHYMOD_SYMBOL_FLAG_REGISTER, 12017 "RX_X4_DEC_STS0r", 12018 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12019 "RX_X4_STATUS0_DECODE_STATUS_0", 12020 NULL, 12021 #endif 12022 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12023 0x0, /* 0 */ 12024 0, 12025 #endif 12026 }, 12027 { 12028 BCMI_TSCE16_XGXS_RX_X4_DEC_STS1r, 12029 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12030 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12031 BCMI_TSCE16_XGXS_RX_X4_DEC_STS1r_fields, 12032 #else 12033 0, 12034 #endif 12035 #endif 12036 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12037 PHYMOD_SYMBOL_FLAG_REGISTER, 12038 "RX_X4_DEC_STS1r", 12039 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12040 "RX_X4_STATUS0_DECODE_STATUS_1", 12041 NULL, 12042 #endif 12043 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12044 0x0, /* 0 */ 12045 0, 12046 #endif 12047 }, 12048 { 12049 BCMI_TSCE16_XGXS_RX_X4_DEC_STS2r, 12050 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12051 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12052 BCMI_TSCE16_XGXS_RX_X4_DEC_STS2r_fields, 12053 #else 12054 0, 12055 #endif 12056 #endif 12057 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12058 PHYMOD_SYMBOL_FLAG_REGISTER, 12059 "RX_X4_DEC_STS2r", 12060 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12061 "RX_X4_STATUS0_DECODE_STATUS_2", 12062 NULL, 12063 #endif 12064 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12065 0x0, /* 0 */ 12066 0, 12067 #endif 12068 }, 12069 { 12070 BCMI_TSCE16_XGXS_RX_X4_DEC_STS3r, 12071 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12072 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12073 BCMI_TSCE16_XGXS_RX_X4_DEC_STS3r_fields, 12074 #else 12075 0, 12076 #endif 12077 #endif 12078 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12079 PHYMOD_SYMBOL_FLAG_REGISTER, 12080 "RX_X4_DEC_STS3r", 12081 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12082 "RX_X4_STATUS0_DECODE_STATUS_3", 12083 NULL, 12084 #endif 12085 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12086 0x0, /* 0 */ 12087 0, 12088 #endif 12089 }, 12090 { 12091 BCMI_TSCE16_XGXS_RX_X4_DEC_STS4r, 12092 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12093 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12094 BCMI_TSCE16_XGXS_RX_X4_DEC_STS4r_fields, 12095 #else 12096 0, 12097 #endif 12098 #endif 12099 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12100 PHYMOD_SYMBOL_FLAG_REGISTER, 12101 "RX_X4_DEC_STS4r", 12102 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12103 "RX_X4_STATUS0_DECODE_STATUS_4", 12104 NULL, 12105 #endif 12106 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12107 0x0, /* 0 */ 12108 0, 12109 #endif 12110 }, 12111 { 12112 BCMI_TSCE16_XGXS_RX_X4_DEC_STS5r, 12113 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12114 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12115 BCMI_TSCE16_XGXS_RX_X4_DEC_STS5r_fields, 12116 #else 12117 0, 12118 #endif 12119 #endif 12120 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12121 PHYMOD_SYMBOL_FLAG_REGISTER, 12122 "RX_X4_DEC_STS5r", 12123 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12124 "RX_X4_STATUS0_DECODE_STATUS_5", 12125 NULL, 12126 #endif 12127 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12128 0x0, /* 0 */ 12129 0, 12130 #endif 12131 }, 12132 { 12133 BCMI_TSCE16_XGXS_RX_X4_SYNCACQ_STS0r, 12134 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12135 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12136 BCMI_TSCE16_XGXS_RX_X4_SYNCACQ_STS0r_fields, 12137 #else 12138 0, 12139 #endif 12140 #endif 12141 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12142 PHYMOD_SYMBOL_FLAG_REGISTER, 12143 "RX_X4_SYNCACQ_STS0r", 12144 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12145 "RX_X4_STATUS0_SYNCACQ_STATUS_0", 12146 NULL, 12147 #endif 12148 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12149 0x0, /* 0 */ 12150 0, 12151 #endif 12152 }, 12153 { 12154 BCMI_TSCE16_XGXS_RX_X4_SYNCACQ_STS1r, 12155 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12156 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12157 BCMI_TSCE16_XGXS_RX_X4_SYNCACQ_STS1r_fields, 12158 #else 12159 0, 12160 #endif 12161 #endif 12162 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12163 PHYMOD_SYMBOL_FLAG_REGISTER, 12164 "RX_X4_SYNCACQ_STS1r", 12165 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12166 "RX_X4_STATUS0_SYNCACQ_STATUS_1", 12167 NULL, 12168 #endif 12169 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12170 0x0, /* 0 */ 12171 0, 12172 #endif 12173 }, 12174 { 12175 BCMI_TSCE16_XGXS_RX_X4_BERCNTr, 12176 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12177 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12178 BCMI_TSCE16_XGXS_RX_X4_BERCNTr_fields, 12179 #else 12180 0, 12181 #endif 12182 #endif 12183 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12184 PHYMOD_SYMBOL_FLAG_REGISTER, 12185 "RX_X4_BERCNTr", 12186 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12187 "RX_X4_STATUS0_BERCOUNT", 12188 NULL, 12189 #endif 12190 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12191 0x0, /* 0 */ 12192 0, 12193 #endif 12194 }, 12195 { 12196 BCMI_TSCE16_XGXS_RX_X4_PCS_LATCH_STS1r, 12197 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12198 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12199 BCMI_TSCE16_XGXS_RX_X4_PCS_LATCH_STS1r_fields, 12200 #else 12201 0, 12202 #endif 12203 #endif 12204 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12205 PHYMOD_SYMBOL_FLAG_REGISTER, 12206 "RX_X4_PCS_LATCH_STS1r", 12207 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12208 "RX_X4_STATUS1_PCS_LATCHED_STATUS_1", 12209 NULL, 12210 #endif 12211 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12212 0x0, /* 0 */ 12213 0, 12214 #endif 12215 }, 12216 { 12217 BCMI_TSCE16_XGXS_RX_X4_PCS_LATCH_STS0r, 12218 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12219 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12220 BCMI_TSCE16_XGXS_RX_X4_PCS_LATCH_STS0r_fields, 12221 #else 12222 0, 12223 #endif 12224 #endif 12225 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12226 PHYMOD_SYMBOL_FLAG_REGISTER, 12227 "RX_X4_PCS_LATCH_STS0r", 12228 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12229 "RX_X4_STATUS1_PCS_LATCHED_STATUS_0", 12230 NULL, 12231 #endif 12232 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12233 0x0, /* 0 */ 12234 0, 12235 #endif 12236 }, 12237 { 12238 BCMI_TSCE16_XGXS_RX_X4_PCS_LIVE_STSr, 12239 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12240 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12241 BCMI_TSCE16_XGXS_RX_X4_PCS_LIVE_STSr_fields, 12242 #else 12243 0, 12244 #endif 12245 #endif 12246 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12247 PHYMOD_SYMBOL_FLAG_REGISTER, 12248 "RX_X4_PCS_LIVE_STSr", 12249 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12250 "RX_X4_STATUS1_PCS_LIVE_STATUS", 12251 NULL, 12252 #endif 12253 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12254 0x0, /* 0 */ 12255 0, 12256 #endif 12257 }, 12258 { 12259 BCMI_TSCE16_XGXS_RX_X4_CL82_AM_LATCH_STSr, 12260 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12261 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12262 BCMI_TSCE16_XGXS_RX_X4_CL82_AM_LATCH_STSr_fields, 12263 #else 12264 0, 12265 #endif 12266 #endif 12267 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12268 PHYMOD_SYMBOL_FLAG_REGISTER, 12269 "RX_X4_CL82_AM_LATCH_STSr", 12270 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12271 "RX_X4_STATUS1_CL82_RX_AM_LATCHED_STATUS", 12272 NULL, 12273 #endif 12274 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12275 0x0, /* 0 */ 12276 0, 12277 #endif 12278 }, 12279 { 12280 BCMI_TSCE16_XGXS_RX_X4_CL82_AM_LIVE_STSr, 12281 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12282 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12283 BCMI_TSCE16_XGXS_RX_X4_CL82_AM_LIVE_STSr_fields, 12284 #else 12285 0, 12286 #endif 12287 #endif 12288 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12289 PHYMOD_SYMBOL_FLAG_REGISTER, 12290 "RX_X4_CL82_AM_LIVE_STSr", 12291 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12292 "RX_X4_STATUS1_CL82_RX_AM_LIVE_STATUS", 12293 NULL, 12294 #endif 12295 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12296 0x0, /* 0 */ 12297 0, 12298 #endif 12299 }, 12300 { 12301 BCMI_TSCE16_XGXS_RX_X4_FEC_CORRBLKSLr, 12302 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12303 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12304 BCMI_TSCE16_XGXS_RX_X4_FEC_CORRBLKSLr_fields, 12305 #else 12306 0, 12307 #endif 12308 #endif 12309 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12310 PHYMOD_SYMBOL_FLAG_REGISTER, 12311 "RX_X4_FEC_CORRBLKSLr", 12312 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12313 "RX_X4_STATUS1_FEC_CORRECTEDBLKSL", 12314 NULL, 12315 #endif 12316 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12317 0x0, /* 0 */ 12318 0, 12319 #endif 12320 }, 12321 { 12322 BCMI_TSCE16_XGXS_RX_X4_FEC_CORRBLKSHr, 12323 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12324 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12325 BCMI_TSCE16_XGXS_RX_X4_FEC_CORRBLKSHr_fields, 12326 #else 12327 0, 12328 #endif 12329 #endif 12330 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12331 PHYMOD_SYMBOL_FLAG_REGISTER, 12332 "RX_X4_FEC_CORRBLKSHr", 12333 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12334 "RX_X4_STATUS1_FEC_CORRECTEDBLKSH", 12335 NULL, 12336 #endif 12337 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12338 0x0, /* 0 */ 12339 0, 12340 #endif 12341 }, 12342 { 12343 BCMI_TSCE16_XGXS_RX_X4_FEC_UNCORRBLKSLr, 12344 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12345 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12346 BCMI_TSCE16_XGXS_RX_X4_FEC_UNCORRBLKSLr_fields, 12347 #else 12348 0, 12349 #endif 12350 #endif 12351 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12352 PHYMOD_SYMBOL_FLAG_REGISTER, 12353 "RX_X4_FEC_UNCORRBLKSLr", 12354 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12355 "RX_X4_STATUS1_FEC_UNCORRECTEDBLKSL", 12356 NULL, 12357 #endif 12358 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12359 0x0, /* 0 */ 12360 0, 12361 #endif 12362 }, 12363 { 12364 BCMI_TSCE16_XGXS_RX_X4_FEC_UNCORRBLKSHr, 12365 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12366 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12367 BCMI_TSCE16_XGXS_RX_X4_FEC_UNCORRBLKSHr_fields, 12368 #else 12369 0, 12370 #endif 12371 #endif 12372 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12373 PHYMOD_SYMBOL_FLAG_REGISTER, 12374 "RX_X4_FEC_UNCORRBLKSHr", 12375 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12376 "RX_X4_STATUS1_FEC_UNCORRECTEDBLKSH", 12377 NULL, 12378 #endif 12379 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12380 0x0, /* 0 */ 12381 0, 12382 #endif 12383 }, 12384 { 12385 BCMI_TSCE16_XGXS_RX_X4_GBOX_STSr, 12386 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12387 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12388 BCMI_TSCE16_XGXS_RX_X4_GBOX_STSr_fields, 12389 #else 12390 0, 12391 #endif 12392 #endif 12393 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12394 PHYMOD_SYMBOL_FLAG_REGISTER, 12395 "RX_X4_GBOX_STSr", 12396 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12397 "RX_X4_STATUS1_GBOX_STATUS", 12398 NULL, 12399 #endif 12400 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12401 0x0, /* 0 */ 12402 0, 12403 #endif 12404 }, 12405 { 12406 BCMI_TSCE16_XGXS_RX_X4_CL49_RX_SCR_IDLE_ERR_CNTr, 12407 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12408 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12409 BCMI_TSCE16_XGXS_RX_X4_CL49_RX_SCR_IDLE_ERR_CNTr_fields, 12410 #else 12411 0, 12412 #endif 12413 #endif 12414 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12415 PHYMOD_SYMBOL_FLAG_REGISTER, 12416 "RX_X4_CL49_RX_SCR_IDLE_ERR_CNTr", 12417 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12418 "RX_X4_STATUS1_CL49_RX_SCR_IDLE_ERR_CNT", 12419 NULL, 12420 #endif 12421 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12422 0x0, /* 0 */ 12423 0, 12424 #endif 12425 }, 12426 { 12427 BCMI_TSCE16_XGXS_FEC_0TSC_12r, 12428 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12429 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12430 BCMI_TSCE16_XGXS_FEC_0TSC_12r_fields, 12431 #else 12432 0, 12433 #endif 12434 #endif 12435 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12436 PHYMOD_SYMBOL_FLAG_REGISTER, 12437 "FEC_0TSC_12r", 12438 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12439 "RX_X4_CONTROL0_TSC_12_FEC_0", 12440 NULL, 12441 #endif 12442 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12443 0x0, /* 0 */ 12444 0, 12445 #endif 12446 }, 12447 { 12448 BCMI_TSCE16_XGXS_FEC_1TSC_12r, 12449 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12450 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12451 BCMI_TSCE16_XGXS_FEC_1TSC_12r_fields, 12452 #else 12453 0, 12454 #endif 12455 #endif 12456 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12457 PHYMOD_SYMBOL_FLAG_REGISTER, 12458 "FEC_1TSC_12r", 12459 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12460 "RX_X4_CONTROL0_TSC_12_FEC_1", 12461 NULL, 12462 #endif 12463 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12464 0x4478, /* 17528 */ 12465 0, 12466 #endif 12467 }, 12468 { 12469 BCMI_TSCE16_XGXS_FEC_2TSC_12r, 12470 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12471 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12472 BCMI_TSCE16_XGXS_FEC_2TSC_12r_fields, 12473 #else 12474 0, 12475 #endif 12476 #endif 12477 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12478 PHYMOD_SYMBOL_FLAG_REGISTER, 12479 "FEC_2TSC_12r", 12480 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12481 "RX_X4_CONTROL0_TSC_12_FEC_2", 12482 NULL, 12483 #endif 12484 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12485 0x7828, /* 30760 */ 12486 0, 12487 #endif 12488 }, 12489 { 12490 BCMI_TSCE16_XGXS_FEC_DBG_ERRLTSC_12r, 12491 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12492 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12493 BCMI_TSCE16_XGXS_FEC_DBG_ERRLTSC_12r_fields, 12494 #else 12495 0, 12496 #endif 12497 #endif 12498 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12499 PHYMOD_SYMBOL_FLAG_REGISTER, 12500 "FEC_DBG_ERRLTSC_12r", 12501 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12502 "RX_X4_STATUS0_TSC_12_FEC_DBG_ERRL", 12503 NULL, 12504 #endif 12505 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12506 0x0, /* 0 */ 12507 0, 12508 #endif 12509 }, 12510 { 12511 BCMI_TSCE16_XGXS_FEC_DBG_ERRAHTSC_12r, 12512 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12513 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12514 BCMI_TSCE16_XGXS_FEC_DBG_ERRAHTSC_12r_fields, 12515 #else 12516 0, 12517 #endif 12518 #endif 12519 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12520 PHYMOD_SYMBOL_FLAG_REGISTER, 12521 "FEC_DBG_ERRAHTSC_12r", 12522 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12523 "RX_X4_STATUS0_TSC_12_FEC_DBG_ERRAH", 12524 NULL, 12525 #endif 12526 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12527 0x0, /* 0 */ 12528 0, 12529 #endif 12530 }, 12531 { 12532 BCMI_TSCE16_XGXS_FEC_BURST_ERR_STSLTSC_12r, 12533 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12534 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12535 BCMI_TSCE16_XGXS_FEC_BURST_ERR_STSLTSC_12r_fields, 12536 #else 12537 0, 12538 #endif 12539 #endif 12540 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12541 PHYMOD_SYMBOL_FLAG_REGISTER, 12542 "FEC_BURST_ERR_STSLTSC_12r", 12543 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12544 "RX_X4_STATUS0_TSC_12_FEC_BURST_ERR_STATUSL", 12545 NULL, 12546 #endif 12547 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12548 0x0, /* 0 */ 12549 0, 12550 #endif 12551 }, 12552 { 12553 BCMI_TSCE16_XGXS_FEC_BURST_ERR_STSHTSC_12r, 12554 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12555 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12556 BCMI_TSCE16_XGXS_FEC_BURST_ERR_STSHTSC_12r_fields, 12557 #else 12558 0, 12559 #endif 12560 #endif 12561 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12562 PHYMOD_SYMBOL_FLAG_REGISTER, 12563 "FEC_BURST_ERR_STSHTSC_12r", 12564 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12565 "RX_X4_STATUS0_TSC_12_FEC_BURST_ERR_STATUSH", 12566 NULL, 12567 #endif 12568 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12569 0x0, /* 0 */ 12570 0, 12571 #endif 12572 }, 12573 { 12574 BCMI_TSCE16_XGXS_BERCNTTSC_12r, 12575 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12576 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12577 BCMI_TSCE16_XGXS_BERCNTTSC_12r_fields, 12578 #else 12579 0, 12580 #endif 12581 #endif 12582 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12583 PHYMOD_SYMBOL_FLAG_REGISTER, 12584 "BERCNTTSC_12r", 12585 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12586 "RX_X4_STATUS0_TSC_12_BERCOUNT", 12587 NULL, 12588 #endif 12589 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12590 0x0, /* 0 */ 12591 0, 12592 #endif 12593 }, 12594 { 12595 BCMI_TSCE16_XGXS_CL49_LOCK_FSM_STSTSC_12r, 12596 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12597 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12598 BCMI_TSCE16_XGXS_CL49_LOCK_FSM_STSTSC_12r_fields, 12599 #else 12600 0, 12601 #endif 12602 #endif 12603 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12604 PHYMOD_SYMBOL_FLAG_REGISTER, 12605 "CL49_LOCK_FSM_STSTSC_12r", 12606 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12607 "RX_X4_STATUS0_TSC_12_CL49_LOCK_FSM_STATUS", 12608 NULL, 12609 #endif 12610 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12611 0x0, /* 0 */ 12612 0, 12613 #endif 12614 }, 12615 { 12616 BCMI_TSCE16_XGXS_MLD_VL_INFO_0TSC_12r, 12617 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12618 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12619 BCMI_TSCE16_XGXS_MLD_VL_INFO_0TSC_12r_fields, 12620 #else 12621 0, 12622 #endif 12623 #endif 12624 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12625 PHYMOD_SYMBOL_FLAG_REGISTER, 12626 "MLD_VL_INFO_0TSC_12r", 12627 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12628 "RX_X4_STATUS0_TSC_12_MLD_VL_INFO_0", 12629 NULL, 12630 #endif 12631 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12632 0x0, /* 0 */ 12633 0, 12634 #endif 12635 }, 12636 { 12637 BCMI_TSCE16_XGXS_BARREL_SHIFTER_STTSC_12r, 12638 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12639 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12640 BCMI_TSCE16_XGXS_BARREL_SHIFTER_STTSC_12r_fields, 12641 #else 12642 0, 12643 #endif 12644 #endif 12645 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12646 PHYMOD_SYMBOL_FLAG_REGISTER, 12647 "BARREL_SHIFTER_STTSC_12r", 12648 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12649 "RX_X4_STATUS0_TSC_12_BARREL_SHIFTER_STATE", 12650 NULL, 12651 #endif 12652 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12653 0x0, /* 0 */ 12654 0, 12655 #endif 12656 }, 12657 { 12658 BCMI_TSCE16_XGXS_FEC_CORRBLKSLTSC_12r, 12659 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12660 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12661 BCMI_TSCE16_XGXS_FEC_CORRBLKSLTSC_12r_fields, 12662 #else 12663 0, 12664 #endif 12665 #endif 12666 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12667 PHYMOD_SYMBOL_FLAG_REGISTER, 12668 "FEC_CORRBLKSLTSC_12r", 12669 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12670 "RX_X4_STATUS0_TSC_12_FEC_CORRECTEDBLKSL", 12671 NULL, 12672 #endif 12673 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12674 0x0, /* 0 */ 12675 0, 12676 #endif 12677 }, 12678 { 12679 BCMI_TSCE16_XGXS_FEC_CORRBLKSHTSC_12r, 12680 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12681 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12682 BCMI_TSCE16_XGXS_FEC_CORRBLKSHTSC_12r_fields, 12683 #else 12684 0, 12685 #endif 12686 #endif 12687 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12688 PHYMOD_SYMBOL_FLAG_REGISTER, 12689 "FEC_CORRBLKSHTSC_12r", 12690 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12691 "RX_X4_STATUS0_TSC_12_FEC_CORRECTEDBLKSH", 12692 NULL, 12693 #endif 12694 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12695 0x0, /* 0 */ 12696 0, 12697 #endif 12698 }, 12699 { 12700 BCMI_TSCE16_XGXS_FEC_UNCORRBLKSLTSC_12r, 12701 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12702 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12703 BCMI_TSCE16_XGXS_FEC_UNCORRBLKSLTSC_12r_fields, 12704 #else 12705 0, 12706 #endif 12707 #endif 12708 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12709 PHYMOD_SYMBOL_FLAG_REGISTER, 12710 "FEC_UNCORRBLKSLTSC_12r", 12711 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12712 "RX_X4_STATUS0_TSC_12_FEC_UNCORRECTEDBLKSL", 12713 NULL, 12714 #endif 12715 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12716 0x0, /* 0 */ 12717 0, 12718 #endif 12719 }, 12720 { 12721 BCMI_TSCE16_XGXS_FEC_UNCORRBLKSHTSC_12r, 12722 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12723 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12724 BCMI_TSCE16_XGXS_FEC_UNCORRBLKSHTSC_12r_fields, 12725 #else 12726 0, 12727 #endif 12728 #endif 12729 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12730 PHYMOD_SYMBOL_FLAG_REGISTER, 12731 "FEC_UNCORRBLKSHTSC_12r", 12732 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12733 "RX_X4_STATUS0_TSC_12_FEC_UNCORRECTEDBLKSH", 12734 NULL, 12735 #endif 12736 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12737 0x0, /* 0 */ 12738 0, 12739 #endif 12740 }, 12741 { 12742 BCMI_TSCE16_XGXS_CL82_PCS_LATCH_STSTSC_12r, 12743 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12744 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12745 BCMI_TSCE16_XGXS_CL82_PCS_LATCH_STSTSC_12r_fields, 12746 #else 12747 0, 12748 #endif 12749 #endif 12750 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12751 PHYMOD_SYMBOL_FLAG_REGISTER, 12752 "CL82_PCS_LATCH_STSTSC_12r", 12753 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12754 "RX_X4_STATUS0_TSC_12_CL82_PCS_LATCHED_STATUS", 12755 NULL, 12756 #endif 12757 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12758 0x0, /* 0 */ 12759 0, 12760 #endif 12761 }, 12762 { 12763 BCMI_TSCE16_XGXS_CL82_PCS_LIVE_STSTSC_12r, 12764 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12765 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12766 BCMI_TSCE16_XGXS_CL82_PCS_LIVE_STSTSC_12r_fields, 12767 #else 12768 0, 12769 #endif 12770 #endif 12771 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12772 PHYMOD_SYMBOL_FLAG_REGISTER, 12773 "CL82_PCS_LIVE_STSTSC_12r", 12774 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12775 "RX_X4_STATUS0_TSC_12_CL82_PCS_LIVE_STATUS", 12776 NULL, 12777 #endif 12778 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12779 0x0, /* 0 */ 12780 0, 12781 #endif 12782 }, 12783 { 12784 BCMI_TSCE16_XGXS_AN_X4_ENSr, 12785 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12786 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12787 BCMI_TSCE16_XGXS_AN_X4_ENSr_fields, 12788 #else 12789 0, 12790 #endif 12791 #endif 12792 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12793 PHYMOD_SYMBOL_FLAG_REGISTER, 12794 "AN_X4_ENSr", 12795 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12796 "AN_X4_ABILITIES_ENABLES", 12797 NULL, 12798 #endif 12799 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12800 0x0, /* 0 */ 12801 0, 12802 #endif 12803 }, 12804 { 12805 BCMI_TSCE16_XGXS_AN_X4_LOC_DEV_CL37_BASE_ABILr, 12806 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12807 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12808 BCMI_TSCE16_XGXS_AN_X4_LOC_DEV_CL37_BASE_ABILr_fields, 12809 #else 12810 0, 12811 #endif 12812 #endif 12813 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12814 PHYMOD_SYMBOL_FLAG_REGISTER, 12815 "AN_X4_LOC_DEV_CL37_BASE_ABILr", 12816 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12817 "AN_X4_ABILITIES_LOCAL_DEVICE_CL37_BASE_ABILITIES", 12818 NULL, 12819 #endif 12820 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12821 0x0, /* 0 */ 12822 0, 12823 #endif 12824 }, 12825 { 12826 BCMI_TSCE16_XGXS_AN_X4_LOC_DEV_CL37_BAM_ABILr, 12827 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12828 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12829 BCMI_TSCE16_XGXS_AN_X4_LOC_DEV_CL37_BAM_ABILr_fields, 12830 #else 12831 0, 12832 #endif 12833 #endif 12834 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12835 PHYMOD_SYMBOL_FLAG_REGISTER, 12836 "AN_X4_LOC_DEV_CL37_BAM_ABILr", 12837 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12838 "AN_X4_ABILITIES_LOCAL_DEVICE_CL37_BAM_ABILITIES", 12839 NULL, 12840 #endif 12841 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12842 0x0, /* 0 */ 12843 0, 12844 #endif 12845 }, 12846 { 12847 BCMI_TSCE16_XGXS_AN_X4_LOC_DEV_OVER1G_ABIL1r, 12848 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12849 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12850 BCMI_TSCE16_XGXS_AN_X4_LOC_DEV_OVER1G_ABIL1r_fields, 12851 #else 12852 0, 12853 #endif 12854 #endif 12855 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12856 PHYMOD_SYMBOL_FLAG_REGISTER, 12857 "AN_X4_LOC_DEV_OVER1G_ABIL1r", 12858 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12859 "AN_X4_ABILITIES_LOCAL_DEVICE_OVER1G_ABILITIES_1", 12860 NULL, 12861 #endif 12862 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12863 0x0, /* 0 */ 12864 0, 12865 #endif 12866 }, 12867 { 12868 BCMI_TSCE16_XGXS_AN_X4_LOC_DEV_OVER1G_ABIL0r, 12869 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12870 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12871 BCMI_TSCE16_XGXS_AN_X4_LOC_DEV_OVER1G_ABIL0r_fields, 12872 #else 12873 0, 12874 #endif 12875 #endif 12876 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12877 PHYMOD_SYMBOL_FLAG_REGISTER, 12878 "AN_X4_LOC_DEV_OVER1G_ABIL0r", 12879 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12880 "AN_X4_ABILITIES_LOCAL_DEVICE_OVER1G_ABILITIES_0", 12881 NULL, 12882 #endif 12883 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12884 0x0, /* 0 */ 12885 0, 12886 #endif 12887 }, 12888 { 12889 BCMI_TSCE16_XGXS_AN_X4_LOC_DEV_CL73_BASE_ABIL1r, 12890 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12891 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12892 BCMI_TSCE16_XGXS_AN_X4_LOC_DEV_CL73_BASE_ABIL1r_fields, 12893 #else 12894 0, 12895 #endif 12896 #endif 12897 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12898 PHYMOD_SYMBOL_FLAG_REGISTER, 12899 "AN_X4_LOC_DEV_CL73_BASE_ABIL1r", 12900 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12901 "AN_X4_ABILITIES_LOCAL_DEVICE_CL73_BASE_ABILITIES_1", 12902 NULL, 12903 #endif 12904 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12905 0x2a0, /* 672 */ 12906 0, 12907 #endif 12908 }, 12909 { 12910 BCMI_TSCE16_XGXS_AN_X4_LOC_DEV_CL73_BASE_ABIL0r, 12911 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12912 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12913 BCMI_TSCE16_XGXS_AN_X4_LOC_DEV_CL73_BASE_ABIL0r_fields, 12914 #else 12915 0, 12916 #endif 12917 #endif 12918 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12919 PHYMOD_SYMBOL_FLAG_REGISTER, 12920 "AN_X4_LOC_DEV_CL73_BASE_ABIL0r", 12921 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12922 "AN_X4_ABILITIES_LOCAL_DEVICE_CL73_BASE_ABILITIES_0", 12923 NULL, 12924 #endif 12925 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12926 0x0, /* 0 */ 12927 0, 12928 #endif 12929 }, 12930 { 12931 BCMI_TSCE16_XGXS_AN_X4_LOC_DEV_CL73_BAM_ABILr, 12932 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12933 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12934 BCMI_TSCE16_XGXS_AN_X4_LOC_DEV_CL73_BAM_ABILr_fields, 12935 #else 12936 0, 12937 #endif 12938 #endif 12939 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12940 PHYMOD_SYMBOL_FLAG_REGISTER, 12941 "AN_X4_LOC_DEV_CL73_BAM_ABILr", 12942 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12943 "AN_X4_ABILITIES_LOCAL_DEVICE_CL73_BAM_ABILITIES", 12944 NULL, 12945 #endif 12946 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12947 0x0, /* 0 */ 12948 0, 12949 #endif 12950 }, 12951 { 12952 BCMI_TSCE16_XGXS_AN_X4_CTLSr, 12953 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12954 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12955 BCMI_TSCE16_XGXS_AN_X4_CTLSr_fields, 12956 #else 12957 0, 12958 #endif 12959 #endif 12960 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12961 PHYMOD_SYMBOL_FLAG_REGISTER, 12962 "AN_X4_CTLSr", 12963 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12964 "AN_X4_ABILITIES_CONTROLS", 12965 NULL, 12966 #endif 12967 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12968 0x0, /* 0 */ 12969 0, 12970 #endif 12971 }, 12972 { 12973 BCMI_TSCE16_XGXS_AN_X4_LP_MP5_UP1r, 12974 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12975 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12976 BCMI_TSCE16_XGXS_AN_X4_LP_MP5_UP1r_fields, 12977 #else 12978 0, 12979 #endif 12980 #endif 12981 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12982 PHYMOD_SYMBOL_FLAG_REGISTER, 12983 "AN_X4_LP_MP5_UP1r", 12984 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12985 "AN_X4_HW_LP_PAGES_LP_MP5_UP1", 12986 NULL, 12987 #endif 12988 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12989 0x0, /* 0 */ 12990 0, 12991 #endif 12992 }, 12993 { 12994 BCMI_TSCE16_XGXS_AN_X4_LP_MP5_UP2r, 12995 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12996 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 12997 BCMI_TSCE16_XGXS_AN_X4_LP_MP5_UP2r_fields, 12998 #else 12999 0, 13000 #endif 13001 #endif 13002 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13003 PHYMOD_SYMBOL_FLAG_REGISTER, 13004 "AN_X4_LP_MP5_UP2r", 13005 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13006 "AN_X4_HW_LP_PAGES_LP_MP5_UP2", 13007 NULL, 13008 #endif 13009 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13010 0x0, /* 0 */ 13011 0, 13012 #endif 13013 }, 13014 { 13015 BCMI_TSCE16_XGXS_AN_X4_LP_MP5_UP3r, 13016 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13017 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13018 BCMI_TSCE16_XGXS_AN_X4_LP_MP5_UP3r_fields, 13019 #else 13020 0, 13021 #endif 13022 #endif 13023 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13024 PHYMOD_SYMBOL_FLAG_REGISTER, 13025 "AN_X4_LP_MP5_UP3r", 13026 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13027 "AN_X4_HW_LP_PAGES_LP_MP5_UP3", 13028 NULL, 13029 #endif 13030 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13031 0x0, /* 0 */ 13032 0, 13033 #endif 13034 }, 13035 { 13036 BCMI_TSCE16_XGXS_AN_X4_LP_MP5_UP4r, 13037 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13038 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13039 BCMI_TSCE16_XGXS_AN_X4_LP_MP5_UP4r_fields, 13040 #else 13041 0, 13042 #endif 13043 #endif 13044 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13045 PHYMOD_SYMBOL_FLAG_REGISTER, 13046 "AN_X4_LP_MP5_UP4r", 13047 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13048 "AN_X4_HW_LP_PAGES_LP_MP5_UP4", 13049 NULL, 13050 #endif 13051 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13052 0x0, /* 0 */ 13053 0, 13054 #endif 13055 }, 13056 { 13057 BCMI_TSCE16_XGXS_AN_X4_LP_MP1024_UP1r, 13058 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13059 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13060 BCMI_TSCE16_XGXS_AN_X4_LP_MP1024_UP1r_fields, 13061 #else 13062 0, 13063 #endif 13064 #endif 13065 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13066 PHYMOD_SYMBOL_FLAG_REGISTER, 13067 "AN_X4_LP_MP1024_UP1r", 13068 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13069 "AN_X4_HW_LP_PAGES_LP_MP1024_UP1", 13070 NULL, 13071 #endif 13072 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13073 0x0, /* 0 */ 13074 0, 13075 #endif 13076 }, 13077 { 13078 BCMI_TSCE16_XGXS_AN_X4_LP_MP1024_UP2r, 13079 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13080 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13081 BCMI_TSCE16_XGXS_AN_X4_LP_MP1024_UP2r_fields, 13082 #else 13083 0, 13084 #endif 13085 #endif 13086 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13087 PHYMOD_SYMBOL_FLAG_REGISTER, 13088 "AN_X4_LP_MP1024_UP2r", 13089 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13090 "AN_X4_HW_LP_PAGES_LP_MP1024_UP2", 13091 NULL, 13092 #endif 13093 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13094 0x0, /* 0 */ 13095 0, 13096 #endif 13097 }, 13098 { 13099 BCMI_TSCE16_XGXS_AN_X4_LP_MP1024_UP3r, 13100 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13101 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13102 BCMI_TSCE16_XGXS_AN_X4_LP_MP1024_UP3r_fields, 13103 #else 13104 0, 13105 #endif 13106 #endif 13107 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13108 PHYMOD_SYMBOL_FLAG_REGISTER, 13109 "AN_X4_LP_MP1024_UP3r", 13110 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13111 "AN_X4_HW_LP_PAGES_LP_MP1024_UP3", 13112 NULL, 13113 #endif 13114 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13115 0x0, /* 0 */ 13116 0, 13117 #endif 13118 }, 13119 { 13120 BCMI_TSCE16_XGXS_AN_X4_LP_MP1024_UP4r, 13121 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13122 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13123 BCMI_TSCE16_XGXS_AN_X4_LP_MP1024_UP4r_fields, 13124 #else 13125 0, 13126 #endif 13127 #endif 13128 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13129 PHYMOD_SYMBOL_FLAG_REGISTER, 13130 "AN_X4_LP_MP1024_UP4r", 13131 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13132 "AN_X4_HW_LP_PAGES_LP_MP1024_UP4", 13133 NULL, 13134 #endif 13135 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13136 0x0, /* 0 */ 13137 0, 13138 #endif 13139 }, 13140 { 13141 BCMI_TSCE16_XGXS_AN_X4_LP_BASE_PAGE1r, 13142 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13143 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13144 BCMI_TSCE16_XGXS_AN_X4_LP_BASE_PAGE1r_fields, 13145 #else 13146 0, 13147 #endif 13148 #endif 13149 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13150 PHYMOD_SYMBOL_FLAG_REGISTER, 13151 "AN_X4_LP_BASE_PAGE1r", 13152 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13153 "AN_X4_HW_LP_PAGES_LP_BASE_PAGE1", 13154 NULL, 13155 #endif 13156 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13157 0x0, /* 0 */ 13158 0, 13159 #endif 13160 }, 13161 { 13162 BCMI_TSCE16_XGXS_AN_X4_LP_BASE_PAGE2r, 13163 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13164 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13165 BCMI_TSCE16_XGXS_AN_X4_LP_BASE_PAGE2r_fields, 13166 #else 13167 0, 13168 #endif 13169 #endif 13170 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13171 PHYMOD_SYMBOL_FLAG_REGISTER, 13172 "AN_X4_LP_BASE_PAGE2r", 13173 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13174 "AN_X4_HW_LP_PAGES_LP_BASE_PAGE2", 13175 NULL, 13176 #endif 13177 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13178 0x0, /* 0 */ 13179 0, 13180 #endif 13181 }, 13182 { 13183 BCMI_TSCE16_XGXS_AN_X4_LP_BASE_PAGE3r, 13184 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13185 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13186 BCMI_TSCE16_XGXS_AN_X4_LP_BASE_PAGE3r_fields, 13187 #else 13188 0, 13189 #endif 13190 #endif 13191 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13192 PHYMOD_SYMBOL_FLAG_REGISTER, 13193 "AN_X4_LP_BASE_PAGE3r", 13194 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13195 "AN_X4_HW_LP_PAGES_LP_BASE_PAGE3", 13196 NULL, 13197 #endif 13198 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13199 0x0, /* 0 */ 13200 0, 13201 #endif 13202 }, 13203 { 13204 BCMI_TSCE16_XGXS_AN_X4_LD_PAGE2r, 13205 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13206 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13207 BCMI_TSCE16_XGXS_AN_X4_LD_PAGE2r_fields, 13208 #else 13209 0, 13210 #endif 13211 #endif 13212 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13213 PHYMOD_SYMBOL_FLAG_REGISTER, 13214 "AN_X4_LD_PAGE2r", 13215 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13216 "AN_X4_SW_MANAGEMENT_LD_PAGE_2", 13217 NULL, 13218 #endif 13219 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13220 0x0, /* 0 */ 13221 0, 13222 #endif 13223 }, 13224 { 13225 BCMI_TSCE16_XGXS_AN_X4_LD_PAGE1r, 13226 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13227 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13228 BCMI_TSCE16_XGXS_AN_X4_LD_PAGE1r_fields, 13229 #else 13230 0, 13231 #endif 13232 #endif 13233 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13234 PHYMOD_SYMBOL_FLAG_REGISTER, 13235 "AN_X4_LD_PAGE1r", 13236 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13237 "AN_X4_SW_MANAGEMENT_LD_PAGE_1", 13238 NULL, 13239 #endif 13240 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13241 0x0, /* 0 */ 13242 0, 13243 #endif 13244 }, 13245 { 13246 BCMI_TSCE16_XGXS_AN_X4_LD_PAGE0r, 13247 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13248 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13249 BCMI_TSCE16_XGXS_AN_X4_LD_PAGE0r_fields, 13250 #else 13251 0, 13252 #endif 13253 #endif 13254 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13255 PHYMOD_SYMBOL_FLAG_REGISTER, 13256 "AN_X4_LD_PAGE0r", 13257 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13258 "AN_X4_SW_MANAGEMENT_LD_PAGE_0", 13259 NULL, 13260 #endif 13261 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13262 0x0, /* 0 */ 13263 0, 13264 #endif 13265 }, 13266 { 13267 BCMI_TSCE16_XGXS_AN_X4_LP_PAGE2r, 13268 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13269 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13270 BCMI_TSCE16_XGXS_AN_X4_LP_PAGE2r_fields, 13271 #else 13272 0, 13273 #endif 13274 #endif 13275 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13276 PHYMOD_SYMBOL_FLAG_REGISTER, 13277 "AN_X4_LP_PAGE2r", 13278 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13279 "AN_X4_SW_MANAGEMENT_LP_PAGE_2", 13280 NULL, 13281 #endif 13282 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13283 0x0, /* 0 */ 13284 0, 13285 #endif 13286 }, 13287 { 13288 BCMI_TSCE16_XGXS_AN_X4_LP_PAGE1r, 13289 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13290 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13291 BCMI_TSCE16_XGXS_AN_X4_LP_PAGE1r_fields, 13292 #else 13293 0, 13294 #endif 13295 #endif 13296 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13297 PHYMOD_SYMBOL_FLAG_REGISTER, 13298 "AN_X4_LP_PAGE1r", 13299 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13300 "AN_X4_SW_MANAGEMENT_LP_PAGE_1", 13301 NULL, 13302 #endif 13303 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13304 0x0, /* 0 */ 13305 0, 13306 #endif 13307 }, 13308 { 13309 BCMI_TSCE16_XGXS_AN_X4_LP_PAGE0r, 13310 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13311 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13312 BCMI_TSCE16_XGXS_AN_X4_LP_PAGE0r_fields, 13313 #else 13314 0, 13315 #endif 13316 #endif 13317 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13318 PHYMOD_SYMBOL_FLAG_REGISTER, 13319 "AN_X4_LP_PAGE0r", 13320 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13321 "AN_X4_SW_MANAGEMENT_LP_PAGE_0", 13322 NULL, 13323 #endif 13324 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13325 0x0, /* 0 */ 13326 0, 13327 #endif 13328 }, 13329 { 13330 BCMI_TSCE16_XGXS_AN_X4_SW_CTL_STSr, 13331 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13332 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13333 BCMI_TSCE16_XGXS_AN_X4_SW_CTL_STSr_fields, 13334 #else 13335 0, 13336 #endif 13337 #endif 13338 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13339 PHYMOD_SYMBOL_FLAG_REGISTER, 13340 "AN_X4_SW_CTL_STSr", 13341 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13342 "AN_X4_SW_MANAGEMENT_SW_CONTROL_STATUS", 13343 NULL, 13344 #endif 13345 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13346 0x0, /* 0 */ 13347 0, 13348 #endif 13349 }, 13350 { 13351 BCMI_TSCE16_XGXS_AN_X4_LD_CTLr, 13352 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13353 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13354 BCMI_TSCE16_XGXS_AN_X4_LD_CTLr_fields, 13355 #else 13356 0, 13357 #endif 13358 #endif 13359 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13360 PHYMOD_SYMBOL_FLAG_REGISTER, 13361 "AN_X4_LD_CTLr", 13362 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13363 "AN_X4_SW_MANAGEMENT_LD_CONTROL", 13364 NULL, 13365 #endif 13366 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13367 0x0, /* 0 */ 13368 0, 13369 #endif 13370 }, 13371 { 13372 BCMI_TSCE16_XGXS_AN_X4_AN_PAGE_SEQUENCER_STSr, 13373 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13374 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13375 BCMI_TSCE16_XGXS_AN_X4_AN_PAGE_SEQUENCER_STSr_fields, 13376 #else 13377 0, 13378 #endif 13379 #endif 13380 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13381 PHYMOD_SYMBOL_FLAG_REGISTER, 13382 "AN_X4_AN_PAGE_SEQUENCER_STSr", 13383 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13384 "AN_X4_SW_MANAGEMENT_AN_PAGE_SEQUENCER_STATUS", 13385 NULL, 13386 #endif 13387 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13388 0x0, /* 0 */ 13389 0, 13390 #endif 13391 }, 13392 { 13393 BCMI_TSCE16_XGXS_AN_X4_AN_PAGE_EXCHANGEER_STSr, 13394 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13395 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13396 BCMI_TSCE16_XGXS_AN_X4_AN_PAGE_EXCHANGEER_STSr_fields, 13397 #else 13398 0, 13399 #endif 13400 #endif 13401 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13402 PHYMOD_SYMBOL_FLAG_REGISTER, 13403 "AN_X4_AN_PAGE_EXCHANGEER_STSr", 13404 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13405 "AN_X4_SW_MANAGEMENT_AN_PAGE_EXCHANGEER_STATUS", 13406 NULL, 13407 #endif 13408 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13409 0x0, /* 0 */ 13410 0, 13411 #endif 13412 }, 13413 { 13414 BCMI_TSCE16_XGXS_AN_X4_AN_PAGE_DECR_STSr, 13415 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13416 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13417 BCMI_TSCE16_XGXS_AN_X4_AN_PAGE_DECR_STSr_fields, 13418 #else 13419 0, 13420 #endif 13421 #endif 13422 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13423 PHYMOD_SYMBOL_FLAG_REGISTER, 13424 "AN_X4_AN_PAGE_DECR_STSr", 13425 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13426 "AN_X4_SW_MANAGEMENT_AN_PAGE_DECODER_STATUS", 13427 NULL, 13428 #endif 13429 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13430 0x0, /* 0 */ 13431 0, 13432 #endif 13433 }, 13434 { 13435 BCMI_TSCE16_XGXS_AN_X4_AN_ABIL_RESOLUTION_STSr, 13436 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13437 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13438 BCMI_TSCE16_XGXS_AN_X4_AN_ABIL_RESOLUTION_STSr_fields, 13439 #else 13440 0, 13441 #endif 13442 #endif 13443 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13444 PHYMOD_SYMBOL_FLAG_REGISTER, 13445 "AN_X4_AN_ABIL_RESOLUTION_STSr", 13446 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13447 "AN_X4_SW_MANAGEMENT_AN_ABILITY_RESOLUTION_STATUS", 13448 NULL, 13449 #endif 13450 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13451 0x0, /* 0 */ 13452 0, 13453 #endif 13454 }, 13455 { 13456 BCMI_TSCE16_XGXS_AN_X4_AN_MISC_STSr, 13457 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13458 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13459 BCMI_TSCE16_XGXS_AN_X4_AN_MISC_STSr_fields, 13460 #else 13461 0, 13462 #endif 13463 #endif 13464 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13465 PHYMOD_SYMBOL_FLAG_REGISTER, 13466 "AN_X4_AN_MISC_STSr", 13467 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13468 "AN_X4_SW_MANAGEMENT_AN_MISC_STATUS", 13469 NULL, 13470 #endif 13471 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13472 0x0, /* 0 */ 13473 0, 13474 #endif 13475 }, 13476 { 13477 BCMI_TSCE16_XGXS_AN_X4_TLA_SEQUENCER_STSr, 13478 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13479 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13480 BCMI_TSCE16_XGXS_AN_X4_TLA_SEQUENCER_STSr_fields, 13481 #else 13482 0, 13483 #endif 13484 #endif 13485 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13486 PHYMOD_SYMBOL_FLAG_REGISTER, 13487 "AN_X4_TLA_SEQUENCER_STSr", 13488 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13489 "AN_X4_SW_MANAGEMENT_TLA_SEQUENCER_STATUS", 13490 NULL, 13491 #endif 13492 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13493 0x1, /* 1 */ 13494 0, 13495 #endif 13496 }, 13497 { 13498 BCMI_TSCE16_XGXS_AN_X4_AN_SEQ_UNEXPECTED_PAGEr, 13499 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13500 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13501 BCMI_TSCE16_XGXS_AN_X4_AN_SEQ_UNEXPECTED_PAGEr_fields, 13502 #else 13503 0, 13504 #endif 13505 #endif 13506 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13507 PHYMOD_SYMBOL_FLAG_REGISTER, 13508 "AN_X4_AN_SEQ_UNEXPECTED_PAGEr", 13509 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13510 "AN_X4_SW_MANAGEMENT_AN_SEQ_UNEXPECTED_PAGE", 13511 NULL, 13512 #endif 13513 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13514 0x0, /* 0 */ 13515 0, 13516 #endif 13517 }, 13518 { 13519 BCMI_TSCE16_XGXS_LNK_CTLr, 13520 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13521 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13522 BCMI_TSCE16_XGXS_LNK_CTLr_fields, 13523 #else 13524 0, 13525 #endif 13526 #endif 13527 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13528 PHYMOD_SYMBOL_FLAG_REGISTER, 13529 "LNK_CTLr", 13530 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13531 "CL72_LINK_CONTROL", 13532 NULL, 13533 #endif 13534 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13535 0x0, /* 0 */ 13536 0, 13537 #endif 13538 }, 13539 { 13540 BCMI_TSCE16_XGXS_DIGITAL_CTL1000X2r, 13541 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13542 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13543 BCMI_TSCE16_XGXS_DIGITAL_CTL1000X2r_fields, 13544 #else 13545 0, 13546 #endif 13547 #endif 13548 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13549 PHYMOD_SYMBOL_FLAG_REGISTER, 13550 "DIGITAL_CTL1000X2r", 13551 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13552 "DIGITAL_CONTROL1000X2", 13553 NULL, 13554 #endif 13555 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13556 0x0, /* 0 */ 13557 0, 13558 #endif 13559 }, 13560 { 13561 BCMI_TSCE16_XGXS_SPARE0r, 13562 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13563 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13564 BCMI_TSCE16_XGXS_SPARE0r_fields, 13565 #else 13566 0, 13567 #endif 13568 #endif 13569 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13570 PHYMOD_SYMBOL_FLAG_REGISTER, 13571 "SPARE0r", 13572 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13573 "DIGITAL_SPARE0", 13574 NULL, 13575 #endif 13576 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13577 0x0, /* 0 */ 13578 0, 13579 #endif 13580 }, 13581 { 13582 BCMI_TSCE16_XGXS_SPARE1r, 13583 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13584 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13585 BCMI_TSCE16_XGXS_SPARE1r_fields, 13586 #else 13587 0, 13588 #endif 13589 #endif 13590 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13591 PHYMOD_SYMBOL_FLAG_REGISTER, 13592 "SPARE1r", 13593 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13594 "DIGITAL_SPARE1", 13595 NULL, 13596 #endif 13597 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13598 0x0, /* 0 */ 13599 0, 13600 #endif 13601 }, 13602 { 13603 BCMI_TSCE16_XGXS_ILKN_CTL0r, 13604 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13605 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13606 BCMI_TSCE16_XGXS_ILKN_CTL0r_fields, 13607 #else 13608 0, 13609 #endif 13610 #endif 13611 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13612 PHYMOD_SYMBOL_FLAG_REGISTER, 13613 "ILKN_CTL0r", 13614 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13615 "ILKN_CONTROL0_ILKN_CONTROL0", 13616 NULL, 13617 #endif 13618 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13619 0x2, /* 2 */ 13620 0, 13621 #endif 13622 }, 13623 { 13624 BCMI_TSCE16_XGXS_ILKN_STS0r, 13625 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13626 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13627 BCMI_TSCE16_XGXS_ILKN_STS0r_fields, 13628 #else 13629 0, 13630 #endif 13631 #endif 13632 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13633 PHYMOD_SYMBOL_FLAG_REGISTER, 13634 "ILKN_STS0r", 13635 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13636 "ILKN_STATUS0_ILKN_STATUS0", 13637 NULL, 13638 #endif 13639 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13640 0x11, /* 17 */ 13641 0, 13642 #endif 13643 }, 13644 { 13645 BCMI_TSCE16_XGXS_DSC_CDR_CTL0r, 13646 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13647 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13648 BCMI_TSCE16_XGXS_DSC_CDR_CTL0r_fields, 13649 #else 13650 0, 13651 #endif 13652 #endif 13653 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13654 PHYMOD_SYMBOL_FLAG_REGISTER, 13655 "DSC_CDR_CTL0r", 13656 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13657 "DSC_A_CDR_CONTROL_0", 13658 NULL, 13659 #endif 13660 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13661 0x4, /* 4 */ 13662 0, 13663 #endif 13664 }, 13665 { 13666 BCMI_TSCE16_XGXS_DSC_CDR_CTL1r, 13667 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13668 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13669 BCMI_TSCE16_XGXS_DSC_CDR_CTL1r_fields, 13670 #else 13671 0, 13672 #endif 13673 #endif 13674 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13675 PHYMOD_SYMBOL_FLAG_REGISTER, 13676 "DSC_CDR_CTL1r", 13677 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13678 "DSC_A_CDR_CONTROL_1", 13679 NULL, 13680 #endif 13681 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13682 0x690, /* 1680 */ 13683 0, 13684 #endif 13685 }, 13686 { 13687 BCMI_TSCE16_XGXS_DSC_CDR_CTL2r, 13688 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13689 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13690 BCMI_TSCE16_XGXS_DSC_CDR_CTL2r_fields, 13691 #else 13692 0, 13693 #endif 13694 #endif 13695 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13696 PHYMOD_SYMBOL_FLAG_REGISTER, 13697 "DSC_CDR_CTL2r", 13698 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13699 "DSC_A_CDR_CONTROL_2", 13700 NULL, 13701 #endif 13702 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13703 0xf0, /* 240 */ 13704 0, 13705 #endif 13706 }, 13707 { 13708 BCMI_TSCE16_XGXS_DSC_RX_PI_CTLr, 13709 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13710 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13711 BCMI_TSCE16_XGXS_DSC_RX_PI_CTLr_fields, 13712 #else 13713 0, 13714 #endif 13715 #endif 13716 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13717 PHYMOD_SYMBOL_FLAG_REGISTER, 13718 "DSC_RX_PI_CTLr", 13719 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13720 "DSC_A_RX_PI_CONTROL", 13721 NULL, 13722 #endif 13723 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13724 0x0, /* 0 */ 13725 0, 13726 #endif 13727 }, 13728 { 13729 BCMI_TSCE16_XGXS_DSC_CDR_STS_INTEGr, 13730 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13731 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13732 BCMI_TSCE16_XGXS_DSC_CDR_STS_INTEGr_fields, 13733 #else 13734 0, 13735 #endif 13736 #endif 13737 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13738 PHYMOD_SYMBOL_FLAG_REGISTER, 13739 "DSC_CDR_STS_INTEGr", 13740 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13741 "DSC_A_CDR_STATUS_INTEG_REG", 13742 NULL, 13743 #endif 13744 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13745 0x0, /* 0 */ 13746 0, 13747 #endif 13748 }, 13749 { 13750 BCMI_TSCE16_XGXS_DSC_CDR_STS_PHASE_ERRr, 13751 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13752 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13753 BCMI_TSCE16_XGXS_DSC_CDR_STS_PHASE_ERRr_fields, 13754 #else 13755 0, 13756 #endif 13757 #endif 13758 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13759 PHYMOD_SYMBOL_FLAG_REGISTER, 13760 "DSC_CDR_STS_PHASE_ERRr", 13761 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13762 "DSC_A_CDR_STATUS_PHASE_ERROR", 13763 NULL, 13764 #endif 13765 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13766 0x0, /* 0 */ 13767 0, 13768 #endif 13769 }, 13770 { 13771 BCMI_TSCE16_XGXS_DSC_RX_PI_CNT_BIN_Dr, 13772 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13773 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13774 BCMI_TSCE16_XGXS_DSC_RX_PI_CNT_BIN_Dr_fields, 13775 #else 13776 0, 13777 #endif 13778 #endif 13779 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13780 PHYMOD_SYMBOL_FLAG_REGISTER, 13781 "DSC_RX_PI_CNT_BIN_Dr", 13782 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13783 "DSC_A_RX_PI_CNT_BIN_D", 13784 NULL, 13785 #endif 13786 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13787 0x0, /* 0 */ 13788 0, 13789 #endif 13790 }, 13791 { 13792 BCMI_TSCE16_XGXS_DSC_RX_PI_CNT_BIN_Pr, 13793 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13794 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13795 BCMI_TSCE16_XGXS_DSC_RX_PI_CNT_BIN_Pr_fields, 13796 #else 13797 0, 13798 #endif 13799 #endif 13800 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13801 PHYMOD_SYMBOL_FLAG_REGISTER, 13802 "DSC_RX_PI_CNT_BIN_Pr", 13803 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13804 "DSC_A_RX_PI_CNT_BIN_P", 13805 NULL, 13806 #endif 13807 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13808 0x2000, /* 8192 */ 13809 0, 13810 #endif 13811 }, 13812 { 13813 BCMI_TSCE16_XGXS_DSC_RX_PI_CNT_BIN_Mr, 13814 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13815 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13816 BCMI_TSCE16_XGXS_DSC_RX_PI_CNT_BIN_Mr_fields, 13817 #else 13818 0, 13819 #endif 13820 #endif 13821 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13822 PHYMOD_SYMBOL_FLAG_REGISTER, 13823 "DSC_RX_PI_CNT_BIN_Mr", 13824 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13825 "DSC_A_RX_PI_CNT_BIN_M", 13826 NULL, 13827 #endif 13828 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13829 0x20, /* 32 */ 13830 0, 13831 #endif 13832 }, 13833 { 13834 BCMI_TSCE16_XGXS_DSC_RX_PI_DIFF_BINr, 13835 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13836 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13837 BCMI_TSCE16_XGXS_DSC_RX_PI_DIFF_BINr_fields, 13838 #else 13839 0, 13840 #endif 13841 #endif 13842 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13843 PHYMOD_SYMBOL_FLAG_REGISTER, 13844 "DSC_RX_PI_DIFF_BINr", 13845 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13846 "DSC_A_RX_PI_DIFF_BIN", 13847 NULL, 13848 #endif 13849 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13850 0x0, /* 0 */ 13851 0, 13852 #endif 13853 }, 13854 { 13855 BCMI_TSCE16_XGXS_DSC_TRNSUM_CTL5r, 13856 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13857 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13858 BCMI_TSCE16_XGXS_DSC_TRNSUM_CTL5r_fields, 13859 #else 13860 0, 13861 #endif 13862 #endif 13863 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13864 PHYMOD_SYMBOL_FLAG_REGISTER, 13865 "DSC_TRNSUM_CTL5r", 13866 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13867 "DSC_A_TRNSUM_CNTL_5", 13868 NULL, 13869 #endif 13870 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13871 0x60, /* 96 */ 13872 0, 13873 #endif 13874 }, 13875 { 13876 BCMI_TSCE16_XGXS_DSC_UC_CTLr, 13877 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13878 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13879 BCMI_TSCE16_XGXS_DSC_UC_CTLr_fields, 13880 #else 13881 0, 13882 #endif 13883 #endif 13884 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13885 PHYMOD_SYMBOL_FLAG_REGISTER, 13886 "DSC_UC_CTLr", 13887 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13888 "DSC_A_DSC_UC_CTRL", 13889 NULL, 13890 #endif 13891 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13892 0x0, /* 0 */ 13893 0, 13894 #endif 13895 }, 13896 { 13897 BCMI_TSCE16_XGXS_DSC_SCRATCHr, 13898 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13899 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13900 BCMI_TSCE16_XGXS_DSC_SCRATCHr_fields, 13901 #else 13902 0, 13903 #endif 13904 #endif 13905 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13906 PHYMOD_SYMBOL_FLAG_REGISTER, 13907 "DSC_SCRATCHr", 13908 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13909 "DSC_A_DSC_SCRATCH", 13910 NULL, 13911 #endif 13912 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13913 0x0, /* 0 */ 13914 0, 13915 #endif 13916 }, 13917 { 13918 BCMI_TSCE16_XGXS_DSC_SM_CTL0r, 13919 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13920 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13921 BCMI_TSCE16_XGXS_DSC_SM_CTL0r_fields, 13922 #else 13923 0, 13924 #endif 13925 #endif 13926 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13927 PHYMOD_SYMBOL_FLAG_REGISTER, 13928 "DSC_SM_CTL0r", 13929 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13930 "DSC_B_DSC_SM_CTRL_0", 13931 NULL, 13932 #endif 13933 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13934 0x8, /* 8 */ 13935 0, 13936 #endif 13937 }, 13938 { 13939 BCMI_TSCE16_XGXS_DSC_SM_CTL1r, 13940 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13941 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13942 BCMI_TSCE16_XGXS_DSC_SM_CTL1r_fields, 13943 #else 13944 0, 13945 #endif 13946 #endif 13947 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13948 PHYMOD_SYMBOL_FLAG_REGISTER, 13949 "DSC_SM_CTL1r", 13950 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13951 "DSC_B_DSC_SM_CTRL_1", 13952 NULL, 13953 #endif 13954 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13955 0x200, /* 512 */ 13956 0, 13957 #endif 13958 }, 13959 { 13960 BCMI_TSCE16_XGXS_DSC_SM_CTL2r, 13961 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13962 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13963 BCMI_TSCE16_XGXS_DSC_SM_CTL2r_fields, 13964 #else 13965 0, 13966 #endif 13967 #endif 13968 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13969 PHYMOD_SYMBOL_FLAG_REGISTER, 13970 "DSC_SM_CTL2r", 13971 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13972 "DSC_B_DSC_SM_CTRL_2", 13973 NULL, 13974 #endif 13975 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13976 0x87, /* 135 */ 13977 0, 13978 #endif 13979 }, 13980 { 13981 BCMI_TSCE16_XGXS_DSC_SM_CTL3r, 13982 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13983 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 13984 BCMI_TSCE16_XGXS_DSC_SM_CTL3r_fields, 13985 #else 13986 0, 13987 #endif 13988 #endif 13989 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13990 PHYMOD_SYMBOL_FLAG_REGISTER, 13991 "DSC_SM_CTL3r", 13992 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13993 "DSC_B_DSC_SM_CTRL_3", 13994 NULL, 13995 #endif 13996 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13997 0x1c1e, /* 7198 */ 13998 0, 13999 #endif 14000 }, 14001 { 14002 BCMI_TSCE16_XGXS_DSC_SM_CTL4r, 14003 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14004 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14005 BCMI_TSCE16_XGXS_DSC_SM_CTL4r_fields, 14006 #else 14007 0, 14008 #endif 14009 #endif 14010 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14011 PHYMOD_SYMBOL_FLAG_REGISTER, 14012 "DSC_SM_CTL4r", 14013 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14014 "DSC_B_DSC_SM_CTRL_4", 14015 NULL, 14016 #endif 14017 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14018 0x35ad, /* 13741 */ 14019 0, 14020 #endif 14021 }, 14022 { 14023 BCMI_TSCE16_XGXS_DSC_SM_CTL5r, 14024 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14025 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14026 BCMI_TSCE16_XGXS_DSC_SM_CTL5r_fields, 14027 #else 14028 0, 14029 #endif 14030 #endif 14031 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14032 PHYMOD_SYMBOL_FLAG_REGISTER, 14033 "DSC_SM_CTL5r", 14034 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14035 "DSC_B_DSC_SM_CTRL_5", 14036 NULL, 14037 #endif 14038 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14039 0x35ad, /* 13741 */ 14040 0, 14041 #endif 14042 }, 14043 { 14044 BCMI_TSCE16_XGXS_DSC_SM_CTL6r, 14045 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14046 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14047 BCMI_TSCE16_XGXS_DSC_SM_CTL6r_fields, 14048 #else 14049 0, 14050 #endif 14051 #endif 14052 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14053 PHYMOD_SYMBOL_FLAG_REGISTER, 14054 "DSC_SM_CTL6r", 14055 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14056 "DSC_B_DSC_SM_CTRL_6", 14057 NULL, 14058 #endif 14059 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14060 0x340d, /* 13325 */ 14061 0, 14062 #endif 14063 }, 14064 { 14065 BCMI_TSCE16_XGXS_DSC_SM_CTL7r, 14066 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14067 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14068 BCMI_TSCE16_XGXS_DSC_SM_CTL7r_fields, 14069 #else 14070 0, 14071 #endif 14072 #endif 14073 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14074 PHYMOD_SYMBOL_FLAG_REGISTER, 14075 "DSC_SM_CTL7r", 14076 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14077 "DSC_B_DSC_SM_CTRL_7", 14078 NULL, 14079 #endif 14080 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14081 0x0, /* 0 */ 14082 0, 14083 #endif 14084 }, 14085 { 14086 BCMI_TSCE16_XGXS_DSC_SM_CTL8r, 14087 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14088 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14089 BCMI_TSCE16_XGXS_DSC_SM_CTL8r_fields, 14090 #else 14091 0, 14092 #endif 14093 #endif 14094 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14095 PHYMOD_SYMBOL_FLAG_REGISTER, 14096 "DSC_SM_CTL8r", 14097 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14098 "DSC_B_DSC_SM_CTRL_8", 14099 NULL, 14100 #endif 14101 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14102 0x11, /* 17 */ 14103 0, 14104 #endif 14105 }, 14106 { 14107 BCMI_TSCE16_XGXS_DSC_SM_CTL9r, 14108 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14109 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14110 BCMI_TSCE16_XGXS_DSC_SM_CTL9r_fields, 14111 #else 14112 0, 14113 #endif 14114 #endif 14115 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14116 PHYMOD_SYMBOL_FLAG_REGISTER, 14117 "DSC_SM_CTL9r", 14118 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14119 "DSC_B_DSC_SM_CTRL_9", 14120 NULL, 14121 #endif 14122 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14123 0x0, /* 0 */ 14124 0, 14125 #endif 14126 }, 14127 { 14128 BCMI_TSCE16_XGXS_DSC_SM_STS_DSC_LOCKr, 14129 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14130 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14131 BCMI_TSCE16_XGXS_DSC_SM_STS_DSC_LOCKr_fields, 14132 #else 14133 0, 14134 #endif 14135 #endif 14136 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14137 PHYMOD_SYMBOL_FLAG_REGISTER, 14138 "DSC_SM_STS_DSC_LOCKr", 14139 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14140 "DSC_B_DSC_SM_STATUS_DSC_LOCK", 14141 NULL, 14142 #endif 14143 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14144 0x0, /* 0 */ 14145 0, 14146 #endif 14147 }, 14148 { 14149 BCMI_TSCE16_XGXS_DSC_SM_STS_DSC_ST_ONE_HOTr, 14150 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14151 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14152 BCMI_TSCE16_XGXS_DSC_SM_STS_DSC_ST_ONE_HOTr_fields, 14153 #else 14154 0, 14155 #endif 14156 #endif 14157 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14158 PHYMOD_SYMBOL_FLAG_REGISTER, 14159 "DSC_SM_STS_DSC_ST_ONE_HOTr", 14160 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14161 "DSC_B_DSC_SM_STATUS_DSC_STATE_ONE_HOT", 14162 NULL, 14163 #endif 14164 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14165 0x0, /* 0 */ 14166 0, 14167 #endif 14168 }, 14169 { 14170 BCMI_TSCE16_XGXS_DSC_SM_STS_DSC_ST_EEE_ONE_HOTr, 14171 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14172 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14173 BCMI_TSCE16_XGXS_DSC_SM_STS_DSC_ST_EEE_ONE_HOTr_fields, 14174 #else 14175 0, 14176 #endif 14177 #endif 14178 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14179 PHYMOD_SYMBOL_FLAG_REGISTER, 14180 "DSC_SM_STS_DSC_ST_EEE_ONE_HOTr", 14181 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14182 "DSC_B_DSC_SM_STATUS_DSC_STATE_EEE_ONE_HOT", 14183 NULL, 14184 #endif 14185 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14186 0x0, /* 0 */ 14187 0, 14188 #endif 14189 }, 14190 { 14191 BCMI_TSCE16_XGXS_DSC_SM_STS_RESTARTr, 14192 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14193 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14194 BCMI_TSCE16_XGXS_DSC_SM_STS_RESTARTr_fields, 14195 #else 14196 0, 14197 #endif 14198 #endif 14199 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14200 PHYMOD_SYMBOL_FLAG_REGISTER, 14201 "DSC_SM_STS_RESTARTr", 14202 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14203 "DSC_B_DSC_SM_STATUS_RESTART", 14204 NULL, 14205 #endif 14206 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14207 0x0, /* 0 */ 14208 0, 14209 #endif 14210 }, 14211 { 14212 BCMI_TSCE16_XGXS_DSC_SM_STS_DSC_STr, 14213 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14214 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14215 BCMI_TSCE16_XGXS_DSC_SM_STS_DSC_STr_fields, 14216 #else 14217 0, 14218 #endif 14219 #endif 14220 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14221 PHYMOD_SYMBOL_FLAG_REGISTER, 14222 "DSC_SM_STS_DSC_STr", 14223 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14224 "DSC_B_DSC_SM_STATUS_DSC_STATE", 14225 NULL, 14226 #endif 14227 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14228 0x40, /* 64 */ 14229 0, 14230 #endif 14231 }, 14232 { 14233 BCMI_TSCE16_XGXS_DSC_DFE_COMMON_CTLr, 14234 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14235 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14236 BCMI_TSCE16_XGXS_DSC_DFE_COMMON_CTLr_fields, 14237 #else 14238 0, 14239 #endif 14240 #endif 14241 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14242 PHYMOD_SYMBOL_FLAG_REGISTER, 14243 "DSC_DFE_COMMON_CTLr", 14244 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14245 "DSC_C_DFE_COMMON_CTL", 14246 NULL, 14247 #endif 14248 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14249 0x0, /* 0 */ 14250 0, 14251 #endif 14252 }, 14253 { 14254 BCMI_TSCE16_XGXS_DSC_DFE_1_CTLr, 14255 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14256 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14257 BCMI_TSCE16_XGXS_DSC_DFE_1_CTLr_fields, 14258 #else 14259 0, 14260 #endif 14261 #endif 14262 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14263 PHYMOD_SYMBOL_FLAG_REGISTER, 14264 "DSC_DFE_1_CTLr", 14265 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14266 "DSC_C_DFE_1_CTL", 14267 NULL, 14268 #endif 14269 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14270 0x0, /* 0 */ 14271 0, 14272 #endif 14273 }, 14274 { 14275 BCMI_TSCE16_XGXS_DSC_DFE_2_CTLr, 14276 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14277 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14278 BCMI_TSCE16_XGXS_DSC_DFE_2_CTLr_fields, 14279 #else 14280 0, 14281 #endif 14282 #endif 14283 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14284 PHYMOD_SYMBOL_FLAG_REGISTER, 14285 "DSC_DFE_2_CTLr", 14286 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14287 "DSC_C_DFE_2_CTL", 14288 NULL, 14289 #endif 14290 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14291 0x0, /* 0 */ 14292 0, 14293 #endif 14294 }, 14295 { 14296 BCMI_TSCE16_XGXS_DSC_DFE_3_CTLr, 14297 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14298 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14299 BCMI_TSCE16_XGXS_DSC_DFE_3_CTLr_fields, 14300 #else 14301 0, 14302 #endif 14303 #endif 14304 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14305 PHYMOD_SYMBOL_FLAG_REGISTER, 14306 "DSC_DFE_3_CTLr", 14307 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14308 "DSC_C_DFE_3_CTL", 14309 NULL, 14310 #endif 14311 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14312 0x0, /* 0 */ 14313 0, 14314 #endif 14315 }, 14316 { 14317 BCMI_TSCE16_XGXS_DSC_DFE_4_CTLr, 14318 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14319 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14320 BCMI_TSCE16_XGXS_DSC_DFE_4_CTLr_fields, 14321 #else 14322 0, 14323 #endif 14324 #endif 14325 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14326 PHYMOD_SYMBOL_FLAG_REGISTER, 14327 "DSC_DFE_4_CTLr", 14328 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14329 "DSC_C_DFE_4_CTL", 14330 NULL, 14331 #endif 14332 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14333 0x0, /* 0 */ 14334 0, 14335 #endif 14336 }, 14337 { 14338 BCMI_TSCE16_XGXS_DSC_DFE_5_CTLr, 14339 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14340 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14341 BCMI_TSCE16_XGXS_DSC_DFE_5_CTLr_fields, 14342 #else 14343 0, 14344 #endif 14345 #endif 14346 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14347 PHYMOD_SYMBOL_FLAG_REGISTER, 14348 "DSC_DFE_5_CTLr", 14349 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14350 "DSC_C_DFE_5_CTL", 14351 NULL, 14352 #endif 14353 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14354 0x0, /* 0 */ 14355 0, 14356 #endif 14357 }, 14358 { 14359 BCMI_TSCE16_XGXS_DSC_DFE_PAT_CTLr, 14360 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14361 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14362 BCMI_TSCE16_XGXS_DSC_DFE_PAT_CTLr_fields, 14363 #else 14364 0, 14365 #endif 14366 #endif 14367 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14368 PHYMOD_SYMBOL_FLAG_REGISTER, 14369 "DSC_DFE_PAT_CTLr", 14370 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14371 "DSC_C_DFE_PAT_CTL", 14372 NULL, 14373 #endif 14374 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14375 0x0, /* 0 */ 14376 0, 14377 #endif 14378 }, 14379 { 14380 BCMI_TSCE16_XGXS_DSC_VGA_P1_MISC_CTLr, 14381 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14382 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14383 BCMI_TSCE16_XGXS_DSC_VGA_P1_MISC_CTLr_fields, 14384 #else 14385 0, 14386 #endif 14387 #endif 14388 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14389 PHYMOD_SYMBOL_FLAG_REGISTER, 14390 "DSC_VGA_P1_MISC_CTLr", 14391 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14392 "DSC_C_VGA_P1_MISC_CONTROL", 14393 NULL, 14394 #endif 14395 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14396 0x8440, /* 33856 */ 14397 0, 14398 #endif 14399 }, 14400 { 14401 BCMI_TSCE16_XGXS_DSC_DC_SLCR_OFFS_CTLr, 14402 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14403 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14404 BCMI_TSCE16_XGXS_DSC_DC_SLCR_OFFS_CTLr_fields, 14405 #else 14406 0, 14407 #endif 14408 #endif 14409 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14410 PHYMOD_SYMBOL_FLAG_REGISTER, 14411 "DSC_DC_SLCR_OFFS_CTLr", 14412 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14413 "DSC_C_DC_SLICER_OFFSET_CTL", 14414 NULL, 14415 #endif 14416 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14417 0x0, /* 0 */ 14418 0, 14419 #endif 14420 }, 14421 { 14422 BCMI_TSCE16_XGXS_DSC_SLCR_OFFS_CTLr, 14423 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14424 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14425 BCMI_TSCE16_XGXS_DSC_SLCR_OFFS_CTLr_fields, 14426 #else 14427 0, 14428 #endif 14429 #endif 14430 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14431 PHYMOD_SYMBOL_FLAG_REGISTER, 14432 "DSC_SLCR_OFFS_CTLr", 14433 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14434 "DSC_C_SLICER_OFFSET_CONTROL", 14435 NULL, 14436 #endif 14437 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14438 0x0, /* 0 */ 14439 0, 14440 #endif 14441 }, 14442 { 14443 BCMI_TSCE16_XGXS_DSC_HWTUNE_OVR_OVRRr, 14444 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14445 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14446 BCMI_TSCE16_XGXS_DSC_HWTUNE_OVR_OVRRr_fields, 14447 #else 14448 0, 14449 #endif 14450 #endif 14451 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14452 PHYMOD_SYMBOL_FLAG_REGISTER, 14453 "DSC_HWTUNE_OVR_OVRRr", 14454 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14455 "DSC_C_HWTUNE_OVR_OVERRIDE", 14456 NULL, 14457 #endif 14458 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14459 0x0, /* 0 */ 14460 0, 14461 #endif 14462 }, 14463 { 14464 BCMI_TSCE16_XGXS_DSC_VGA_CTLr, 14465 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14466 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14467 BCMI_TSCE16_XGXS_DSC_VGA_CTLr_fields, 14468 #else 14469 0, 14470 #endif 14471 #endif 14472 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14473 PHYMOD_SYMBOL_FLAG_REGISTER, 14474 "DSC_VGA_CTLr", 14475 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14476 "DSC_C_VGA_CTL", 14477 NULL, 14478 #endif 14479 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14480 0x0, /* 0 */ 14481 0, 14482 #endif 14483 }, 14484 { 14485 BCMI_TSCE16_XGXS_DSC_VGA_PAT_EYEDIAG_CTLr, 14486 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14487 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14488 BCMI_TSCE16_XGXS_DSC_VGA_PAT_EYEDIAG_CTLr_fields, 14489 #else 14490 0, 14491 #endif 14492 #endif 14493 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14494 PHYMOD_SYMBOL_FLAG_REGISTER, 14495 "DSC_VGA_PAT_EYEDIAG_CTLr", 14496 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14497 "DSC_C_VGA_PAT_EYEDIAG_CTL", 14498 NULL, 14499 #endif 14500 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14501 0x0, /* 0 */ 14502 0, 14503 #endif 14504 }, 14505 { 14506 BCMI_TSCE16_XGXS_DSC_P1_FRAC_OFFS_CTLr, 14507 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14508 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14509 BCMI_TSCE16_XGXS_DSC_P1_FRAC_OFFS_CTLr_fields, 14510 #else 14511 0, 14512 #endif 14513 #endif 14514 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14515 PHYMOD_SYMBOL_FLAG_REGISTER, 14516 "DSC_P1_FRAC_OFFS_CTLr", 14517 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14518 "DSC_C_P1_FRAC_OFFS_CTL", 14519 NULL, 14520 #endif 14521 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14522 0xc400, /* 50176 */ 14523 0, 14524 #endif 14525 }, 14526 { 14527 BCMI_TSCE16_XGXS_DSC_TRNSUM_CTL1r, 14528 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14529 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14530 BCMI_TSCE16_XGXS_DSC_TRNSUM_CTL1r_fields, 14531 #else 14532 0, 14533 #endif 14534 #endif 14535 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14536 PHYMOD_SYMBOL_FLAG_REGISTER, 14537 "DSC_TRNSUM_CTL1r", 14538 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14539 "DSC_D_TRNSUM_CTL_1", 14540 NULL, 14541 #endif 14542 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14543 0x0, /* 0 */ 14544 0, 14545 #endif 14546 }, 14547 { 14548 BCMI_TSCE16_XGXS_DSC_TRNSUM_CTL2r, 14549 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14550 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14551 BCMI_TSCE16_XGXS_DSC_TRNSUM_CTL2r_fields, 14552 #else 14553 0, 14554 #endif 14555 #endif 14556 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14557 PHYMOD_SYMBOL_FLAG_REGISTER, 14558 "DSC_TRNSUM_CTL2r", 14559 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14560 "DSC_D_TRNSUM_CTL_2", 14561 NULL, 14562 #endif 14563 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14564 0x0, /* 0 */ 14565 0, 14566 #endif 14567 }, 14568 { 14569 BCMI_TSCE16_XGXS_DSC_TRNSUM_CTL3r, 14570 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14571 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14572 BCMI_TSCE16_XGXS_DSC_TRNSUM_CTL3r_fields, 14573 #else 14574 0, 14575 #endif 14576 #endif 14577 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14578 PHYMOD_SYMBOL_FLAG_REGISTER, 14579 "DSC_TRNSUM_CTL3r", 14580 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14581 "DSC_D_TRNSUM_CTL_3", 14582 NULL, 14583 #endif 14584 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14585 0x0, /* 0 */ 14586 0, 14587 #endif 14588 }, 14589 { 14590 BCMI_TSCE16_XGXS_DSC_TRNSUM_CTL4r, 14591 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14592 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14593 BCMI_TSCE16_XGXS_DSC_TRNSUM_CTL4r_fields, 14594 #else 14595 0, 14596 #endif 14597 #endif 14598 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14599 PHYMOD_SYMBOL_FLAG_REGISTER, 14600 "DSC_TRNSUM_CTL4r", 14601 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14602 "DSC_D_TRNSUM_CTL_4", 14603 NULL, 14604 #endif 14605 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14606 0x0, /* 0 */ 14607 0, 14608 #endif 14609 }, 14610 { 14611 BCMI_TSCE16_XGXS_DSC_TRNSUM_STS1r, 14612 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14613 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14614 BCMI_TSCE16_XGXS_DSC_TRNSUM_STS1r_fields, 14615 #else 14616 0, 14617 #endif 14618 #endif 14619 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14620 PHYMOD_SYMBOL_FLAG_REGISTER, 14621 "DSC_TRNSUM_STS1r", 14622 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14623 "DSC_D_TRNSUM_STS_1", 14624 NULL, 14625 #endif 14626 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14627 0x0, /* 0 */ 14628 0, 14629 #endif 14630 }, 14631 { 14632 BCMI_TSCE16_XGXS_DSC_TRNSUM_STS2r, 14633 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14634 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14635 BCMI_TSCE16_XGXS_DSC_TRNSUM_STS2r_fields, 14636 #else 14637 0, 14638 #endif 14639 #endif 14640 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14641 PHYMOD_SYMBOL_FLAG_REGISTER, 14642 "DSC_TRNSUM_STS2r", 14643 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14644 "DSC_D_TRNSUM_STS_2", 14645 NULL, 14646 #endif 14647 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14648 0x0, /* 0 */ 14649 0, 14650 #endif 14651 }, 14652 { 14653 BCMI_TSCE16_XGXS_DSC_TRNSUM_STS3r, 14654 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14655 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14656 BCMI_TSCE16_XGXS_DSC_TRNSUM_STS3r_fields, 14657 #else 14658 0, 14659 #endif 14660 #endif 14661 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14662 PHYMOD_SYMBOL_FLAG_REGISTER, 14663 "DSC_TRNSUM_STS3r", 14664 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14665 "DSC_D_TRNSUM_STS_3", 14666 NULL, 14667 #endif 14668 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14669 0x0, /* 0 */ 14670 0, 14671 #endif 14672 }, 14673 { 14674 BCMI_TSCE16_XGXS_DSC_TRNSUM_STS4r, 14675 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14676 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14677 BCMI_TSCE16_XGXS_DSC_TRNSUM_STS4r_fields, 14678 #else 14679 0, 14680 #endif 14681 #endif 14682 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14683 PHYMOD_SYMBOL_FLAG_REGISTER, 14684 "DSC_TRNSUM_STS4r", 14685 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14686 "DSC_D_TRNSUM_STS_4", 14687 NULL, 14688 #endif 14689 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14690 0x0, /* 0 */ 14691 0, 14692 #endif 14693 }, 14694 { 14695 BCMI_TSCE16_XGXS_DSC_TRNSUM_STS5r, 14696 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14697 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14698 BCMI_TSCE16_XGXS_DSC_TRNSUM_STS5r_fields, 14699 #else 14700 0, 14701 #endif 14702 #endif 14703 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14704 PHYMOD_SYMBOL_FLAG_REGISTER, 14705 "DSC_TRNSUM_STS5r", 14706 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14707 "DSC_D_TRNSUM_STS_5", 14708 NULL, 14709 #endif 14710 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14711 0x0, /* 0 */ 14712 0, 14713 #endif 14714 }, 14715 { 14716 BCMI_TSCE16_XGXS_DSC_TRNSUM_STS6r, 14717 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14718 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14719 BCMI_TSCE16_XGXS_DSC_TRNSUM_STS6r_fields, 14720 #else 14721 0, 14722 #endif 14723 #endif 14724 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14725 PHYMOD_SYMBOL_FLAG_REGISTER, 14726 "DSC_TRNSUM_STS6r", 14727 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14728 "DSC_D_TRNSUM_STS_6", 14729 NULL, 14730 #endif 14731 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14732 0x0, /* 0 */ 14733 0, 14734 #endif 14735 }, 14736 { 14737 BCMI_TSCE16_XGXS_DSC_VGA_P1EYEDIAG_STSr, 14738 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14739 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14740 BCMI_TSCE16_XGXS_DSC_VGA_P1EYEDIAG_STSr_fields, 14741 #else 14742 0, 14743 #endif 14744 #endif 14745 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14746 PHYMOD_SYMBOL_FLAG_REGISTER, 14747 "DSC_VGA_P1EYEDIAG_STSr", 14748 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14749 "DSC_D_VGA_P1EYEDIAG_STS", 14750 NULL, 14751 #endif 14752 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14753 0x0, /* 0 */ 14754 0, 14755 #endif 14756 }, 14757 { 14758 BCMI_TSCE16_XGXS_DSC_DFE_1_STSr, 14759 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14760 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14761 BCMI_TSCE16_XGXS_DSC_DFE_1_STSr_fields, 14762 #else 14763 0, 14764 #endif 14765 #endif 14766 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14767 PHYMOD_SYMBOL_FLAG_REGISTER, 14768 "DSC_DFE_1_STSr", 14769 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14770 "DSC_D_DFE_1_STS", 14771 NULL, 14772 #endif 14773 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14774 0x0, /* 0 */ 14775 0, 14776 #endif 14777 }, 14778 { 14779 BCMI_TSCE16_XGXS_DSC_DFE_2_STSr, 14780 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14781 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14782 BCMI_TSCE16_XGXS_DSC_DFE_2_STSr_fields, 14783 #else 14784 0, 14785 #endif 14786 #endif 14787 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14788 PHYMOD_SYMBOL_FLAG_REGISTER, 14789 "DSC_DFE_2_STSr", 14790 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14791 "DSC_D_DFE_2_STS", 14792 NULL, 14793 #endif 14794 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14795 0x0, /* 0 */ 14796 0, 14797 #endif 14798 }, 14799 { 14800 BCMI_TSCE16_XGXS_DSC_DFE_3_4_5_STSr, 14801 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14802 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14803 BCMI_TSCE16_XGXS_DSC_DFE_3_4_5_STSr_fields, 14804 #else 14805 0, 14806 #endif 14807 #endif 14808 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14809 PHYMOD_SYMBOL_FLAG_REGISTER, 14810 "DSC_DFE_3_4_5_STSr", 14811 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14812 "DSC_D_DFE_3_4_5_STS", 14813 NULL, 14814 #endif 14815 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14816 0x0, /* 0 */ 14817 0, 14818 #endif 14819 }, 14820 { 14821 BCMI_TSCE16_XGXS_DSC_VGA_TAP_BINr, 14822 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14823 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14824 BCMI_TSCE16_XGXS_DSC_VGA_TAP_BINr_fields, 14825 #else 14826 0, 14827 #endif 14828 #endif 14829 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14830 PHYMOD_SYMBOL_FLAG_REGISTER, 14831 "DSC_VGA_TAP_BINr", 14832 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14833 "DSC_D_VGA_TAP_BIN", 14834 NULL, 14835 #endif 14836 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14837 0x0, /* 0 */ 14838 0, 14839 #endif 14840 }, 14841 { 14842 BCMI_TSCE16_XGXS_DSC_E_CTLr, 14843 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14844 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14845 BCMI_TSCE16_XGXS_DSC_E_CTLr_fields, 14846 #else 14847 0, 14848 #endif 14849 #endif 14850 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14851 PHYMOD_SYMBOL_FLAG_REGISTER, 14852 "DSC_E_CTLr", 14853 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14854 "DSC_E_DSC_E_CTRL", 14855 NULL, 14856 #endif 14857 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14858 0x30, /* 48 */ 14859 0, 14860 #endif 14861 }, 14862 { 14863 BCMI_TSCE16_XGXS_DSC_E_PF_CTLr, 14864 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14865 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14866 BCMI_TSCE16_XGXS_DSC_E_PF_CTLr_fields, 14867 #else 14868 0, 14869 #endif 14870 #endif 14871 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14872 PHYMOD_SYMBOL_FLAG_REGISTER, 14873 "DSC_E_PF_CTLr", 14874 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14875 "DSC_E_DSC_E_PF_CTRL", 14876 NULL, 14877 #endif 14878 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14879 0x0, /* 0 */ 14880 0, 14881 #endif 14882 }, 14883 { 14884 BCMI_TSCE16_XGXS_DSC_E_PF2_LOWP_CTLr, 14885 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14886 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14887 BCMI_TSCE16_XGXS_DSC_E_PF2_LOWP_CTLr_fields, 14888 #else 14889 0, 14890 #endif 14891 #endif 14892 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14893 PHYMOD_SYMBOL_FLAG_REGISTER, 14894 "DSC_E_PF2_LOWP_CTLr", 14895 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14896 "DSC_E_DSC_E_PF2_LOWP_CTRL", 14897 NULL, 14898 #endif 14899 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14900 0x0, /* 0 */ 14901 0, 14902 #endif 14903 }, 14904 { 14905 BCMI_TSCE16_XGXS_CL72UR_CTL0r, 14906 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14907 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14908 BCMI_TSCE16_XGXS_CL72UR_CTL0r_fields, 14909 #else 14910 0, 14911 #endif 14912 #endif 14913 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14914 PHYMOD_SYMBOL_FLAG_REGISTER, 14915 "CL72UR_CTL0r", 14916 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14917 "CL72_USER_RX_CL72UR_CONTROL0_REGISTER", 14918 NULL, 14919 #endif 14920 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14921 0x4, /* 4 */ 14922 0, 14923 #endif 14924 }, 14925 { 14926 BCMI_TSCE16_XGXS_CL72UR_CTL1r, 14927 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14928 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14929 BCMI_TSCE16_XGXS_CL72UR_CTL1r_fields, 14930 #else 14931 0, 14932 #endif 14933 #endif 14934 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14935 PHYMOD_SYMBOL_FLAG_REGISTER, 14936 "CL72UR_CTL1r", 14937 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14938 "CL72_USER_RX_CL72UR_CONTROL1_REGISTER", 14939 NULL, 14940 #endif 14941 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14942 0x52, /* 82 */ 14943 0, 14944 #endif 14945 }, 14946 { 14947 BCMI_TSCE16_XGXS_CL72UR_CTL2r, 14948 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14949 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14950 BCMI_TSCE16_XGXS_CL72UR_CTL2r_fields, 14951 #else 14952 0, 14953 #endif 14954 #endif 14955 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14956 PHYMOD_SYMBOL_FLAG_REGISTER, 14957 "CL72UR_CTL2r", 14958 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14959 "CL72_USER_RX_CL72UR_CONTROL2_REGISTER", 14960 NULL, 14961 #endif 14962 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14963 0x310, /* 784 */ 14964 0, 14965 #endif 14966 }, 14967 { 14968 BCMI_TSCE16_XGXS_CL72UR_STS0r, 14969 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14970 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14971 BCMI_TSCE16_XGXS_CL72UR_STS0r_fields, 14972 #else 14973 0, 14974 #endif 14975 #endif 14976 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14977 PHYMOD_SYMBOL_FLAG_REGISTER, 14978 "CL72UR_STS0r", 14979 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14980 "CL72_USER_RX_CL72UR_STATUS0_REGISTER", 14981 NULL, 14982 #endif 14983 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14984 0x0, /* 0 */ 14985 0, 14986 #endif 14987 }, 14988 { 14989 BCMI_TSCE16_XGXS_CL72UR_UC_INTR_CTL0r, 14990 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14991 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 14992 BCMI_TSCE16_XGXS_CL72UR_UC_INTR_CTL0r_fields, 14993 #else 14994 0, 14995 #endif 14996 #endif 14997 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14998 PHYMOD_SYMBOL_FLAG_REGISTER, 14999 "CL72UR_UC_INTR_CTL0r", 15000 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15001 "CL72_USER_RX_CL72UR_MICRO_INTERRUPT_CONTROL0_REGISTER", 15002 NULL, 15003 #endif 15004 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15005 0x0, /* 0 */ 15006 0, 15007 #endif 15008 }, 15009 { 15010 BCMI_TSCE16_XGXS_CL72UR_UC_STS0r, 15011 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15012 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15013 BCMI_TSCE16_XGXS_CL72UR_UC_STS0r_fields, 15014 #else 15015 0, 15016 #endif 15017 #endif 15018 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15019 PHYMOD_SYMBOL_FLAG_REGISTER, 15020 "CL72UR_UC_STS0r", 15021 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15022 "CL72_USER_RX_CL72UR_MICRO_STATUS0_REGISTER", 15023 NULL, 15024 #endif 15025 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15026 0x0, /* 0 */ 15027 0, 15028 #endif 15029 }, 15030 { 15031 BCMI_TSCE16_XGXS_CL72UR_UC_STS1r, 15032 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15033 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15034 BCMI_TSCE16_XGXS_CL72UR_UC_STS1r_fields, 15035 #else 15036 0, 15037 #endif 15038 #endif 15039 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15040 PHYMOD_SYMBOL_FLAG_REGISTER, 15041 "CL72UR_UC_STS1r", 15042 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15043 "CL72_USER_RX_CL72UR_MICRO_STATUS1_REGISTER", 15044 NULL, 15045 #endif 15046 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15047 0x0, /* 0 */ 15048 0, 15049 #endif 15050 }, 15051 { 15052 BCMI_TSCE16_XGXS_CL72UT_XMT_UPD_PAGEr, 15053 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15054 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15055 BCMI_TSCE16_XGXS_CL72UT_XMT_UPD_PAGEr_fields, 15056 #else 15057 0, 15058 #endif 15059 #endif 15060 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15061 PHYMOD_SYMBOL_FLAG_REGISTER, 15062 "CL72UT_XMT_UPD_PAGEr", 15063 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15064 "CL72_USER_TX_CL72UT_XMT_UPDATE_PAGE_REGISTER", 15065 NULL, 15066 #endif 15067 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15068 0x0, /* 0 */ 15069 0, 15070 #endif 15071 }, 15072 { 15073 BCMI_TSCE16_XGXS_CL72UT_LD_XMT_STS_PAGEr, 15074 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15075 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15076 BCMI_TSCE16_XGXS_CL72UT_LD_XMT_STS_PAGEr_fields, 15077 #else 15078 0, 15079 #endif 15080 #endif 15081 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15082 PHYMOD_SYMBOL_FLAG_REGISTER, 15083 "CL72UT_LD_XMT_STS_PAGEr", 15084 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15085 "CL72_USER_TX_CL72UT_LD_XMT_STATUS_PAGE", 15086 NULL, 15087 #endif 15088 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15089 0x0, /* 0 */ 15090 0, 15091 #endif 15092 }, 15093 { 15094 BCMI_TSCE16_XGXS_CL72UT_CTL0r, 15095 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15096 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15097 BCMI_TSCE16_XGXS_CL72UT_CTL0r_fields, 15098 #else 15099 0, 15100 #endif 15101 #endif 15102 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15103 PHYMOD_SYMBOL_FLAG_REGISTER, 15104 "CL72UT_CTL0r", 15105 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15106 "CL72_USER_TX_CL72UT_CONTROL0_REGISTER", 15107 NULL, 15108 #endif 15109 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15110 0x0, /* 0 */ 15111 0, 15112 #endif 15113 }, 15114 { 15115 BCMI_TSCE16_XGXS_CL72UT_CTL1r, 15116 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15117 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15118 BCMI_TSCE16_XGXS_CL72UT_CTL1r_fields, 15119 #else 15120 0, 15121 #endif 15122 #endif 15123 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15124 PHYMOD_SYMBOL_FLAG_REGISTER, 15125 "CL72UT_CTL1r", 15126 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15127 "CL72_USER_TX_CL72UT_CONTROL1_REGISTER", 15128 NULL, 15129 #endif 15130 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15131 0x4, /* 4 */ 15132 0, 15133 #endif 15134 }, 15135 { 15136 BCMI_TSCE16_XGXS_CL72UT_CTL2r, 15137 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15138 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15139 BCMI_TSCE16_XGXS_CL72UT_CTL2r_fields, 15140 #else 15141 0, 15142 #endif 15143 #endif 15144 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15145 PHYMOD_SYMBOL_FLAG_REGISTER, 15146 "CL72UT_CTL2r", 15147 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15148 "CL72_USER_TX_CL72UT_CONTROL2_REGISTER", 15149 NULL, 15150 #endif 15151 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15152 0x0, /* 0 */ 15153 0, 15154 #endif 15155 }, 15156 { 15157 BCMI_TSCE16_XGXS_CL72UT_CTL3r, 15158 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15159 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15160 BCMI_TSCE16_XGXS_CL72UT_CTL3r_fields, 15161 #else 15162 0, 15163 #endif 15164 #endif 15165 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15166 PHYMOD_SYMBOL_FLAG_REGISTER, 15167 "CL72UT_CTL3r", 15168 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15169 "CL72_USER_TX_CL72UT_CONTROL3_REGISTER", 15170 NULL, 15171 #endif 15172 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15173 0x24, /* 36 */ 15174 0, 15175 #endif 15176 }, 15177 { 15178 BCMI_TSCE16_XGXS_CL72UT_STS0r, 15179 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15180 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15181 BCMI_TSCE16_XGXS_CL72UT_STS0r_fields, 15182 #else 15183 0, 15184 #endif 15185 #endif 15186 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15187 PHYMOD_SYMBOL_FLAG_REGISTER, 15188 "CL72UT_STS0r", 15189 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15190 "CL72_USER_TX_CL72UT_STATUS0_REGISTER", 15191 NULL, 15192 #endif 15193 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15194 0x2, /* 2 */ 15195 0, 15196 #endif 15197 }, 15198 { 15199 BCMI_TSCE16_XGXS_CL72UT_CTL4r, 15200 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15201 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15202 BCMI_TSCE16_XGXS_CL72UT_CTL4r_fields, 15203 #else 15204 0, 15205 #endif 15206 #endif 15207 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15208 PHYMOD_SYMBOL_FLAG_REGISTER, 15209 "CL72UT_CTL4r", 15210 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15211 "CL72_USER_TX_CL72UT_CONTROL4_REGISTER", 15212 NULL, 15213 #endif 15214 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15215 0x3f5, /* 1013 */ 15216 0, 15217 #endif 15218 }, 15219 { 15220 BCMI_TSCE16_XGXS_TX_PI_CTL0r, 15221 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15222 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15223 BCMI_TSCE16_XGXS_TX_PI_CTL0r_fields, 15224 #else 15225 0, 15226 #endif 15227 #endif 15228 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15229 PHYMOD_SYMBOL_FLAG_REGISTER, 15230 "TX_PI_CTL0r", 15231 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15232 "TX_PI_TX_PI_CONTROL_0", 15233 NULL, 15234 #endif 15235 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15236 0x0, /* 0 */ 15237 0, 15238 #endif 15239 }, 15240 { 15241 BCMI_TSCE16_XGXS_TX_PI_CTL1r, 15242 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15243 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15244 BCMI_TSCE16_XGXS_TX_PI_CTL1r_fields, 15245 #else 15246 0, 15247 #endif 15248 #endif 15249 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15250 PHYMOD_SYMBOL_FLAG_REGISTER, 15251 "TX_PI_CTL1r", 15252 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15253 "TX_PI_TX_PI_CONTROL_1", 15254 NULL, 15255 #endif 15256 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15257 0x0, /* 0 */ 15258 0, 15259 #endif 15260 }, 15261 { 15262 BCMI_TSCE16_XGXS_TX_PI_CTL2r, 15263 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15264 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15265 BCMI_TSCE16_XGXS_TX_PI_CTL2r_fields, 15266 #else 15267 0, 15268 #endif 15269 #endif 15270 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15271 PHYMOD_SYMBOL_FLAG_REGISTER, 15272 "TX_PI_CTL2r", 15273 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15274 "TX_PI_TX_PI_CONTROL_2", 15275 NULL, 15276 #endif 15277 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15278 0x0, /* 0 */ 15279 0, 15280 #endif 15281 }, 15282 { 15283 BCMI_TSCE16_XGXS_TX_PI_CTL3r, 15284 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15285 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15286 BCMI_TSCE16_XGXS_TX_PI_CTL3r_fields, 15287 #else 15288 0, 15289 #endif 15290 #endif 15291 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15292 PHYMOD_SYMBOL_FLAG_REGISTER, 15293 "TX_PI_CTL3r", 15294 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15295 "TX_PI_TX_PI_CONTROL_3", 15296 NULL, 15297 #endif 15298 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15299 0x3100, /* 12544 */ 15300 0, 15301 #endif 15302 }, 15303 { 15304 BCMI_TSCE16_XGXS_TX_PI_CTL4r, 15305 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15306 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15307 BCMI_TSCE16_XGXS_TX_PI_CTL4r_fields, 15308 #else 15309 0, 15310 #endif 15311 #endif 15312 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15313 PHYMOD_SYMBOL_FLAG_REGISTER, 15314 "TX_PI_CTL4r", 15315 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15316 "TX_PI_TX_PI_CONTROL_4", 15317 NULL, 15318 #endif 15319 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15320 0x4, /* 4 */ 15321 0, 15322 #endif 15323 }, 15324 { 15325 BCMI_TSCE16_XGXS_TX_PI_CTL5r, 15326 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15327 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15328 BCMI_TSCE16_XGXS_TX_PI_CTL5r_fields, 15329 #else 15330 0, 15331 #endif 15332 #endif 15333 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15334 PHYMOD_SYMBOL_FLAG_REGISTER, 15335 "TX_PI_CTL5r", 15336 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15337 "TX_PI_TX_PI_CONTROL_5", 15338 NULL, 15339 #endif 15340 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15341 0x4, /* 4 */ 15342 0, 15343 #endif 15344 }, 15345 { 15346 BCMI_TSCE16_XGXS_TX_PI_STS0r, 15347 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15348 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15349 BCMI_TSCE16_XGXS_TX_PI_STS0r_fields, 15350 #else 15351 0, 15352 #endif 15353 #endif 15354 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15355 PHYMOD_SYMBOL_FLAG_REGISTER, 15356 "TX_PI_STS0r", 15357 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15358 "TX_PI_TX_PI_STATUS_0", 15359 NULL, 15360 #endif 15361 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15362 0x0, /* 0 */ 15363 0, 15364 #endif 15365 }, 15366 { 15367 BCMI_TSCE16_XGXS_TX_PI_STS1r, 15368 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15369 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15370 BCMI_TSCE16_XGXS_TX_PI_STS1r_fields, 15371 #else 15372 0, 15373 #endif 15374 #endif 15375 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15376 PHYMOD_SYMBOL_FLAG_REGISTER, 15377 "TX_PI_STS1r", 15378 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15379 "TX_PI_TX_PI_STATUS_1", 15380 NULL, 15381 #endif 15382 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15383 0x0, /* 0 */ 15384 0, 15385 #endif 15386 }, 15387 { 15388 BCMI_TSCE16_XGXS_TX_PI_STS2r, 15389 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15390 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15391 BCMI_TSCE16_XGXS_TX_PI_STS2r_fields, 15392 #else 15393 0, 15394 #endif 15395 #endif 15396 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15397 PHYMOD_SYMBOL_FLAG_REGISTER, 15398 "TX_PI_STS2r", 15399 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15400 "TX_PI_TX_PI_STATUS_2", 15401 NULL, 15402 #endif 15403 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15404 0x0, /* 0 */ 15405 0, 15406 #endif 15407 }, 15408 { 15409 BCMI_TSCE16_XGXS_TX_PI_STS3r, 15410 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15411 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15412 BCMI_TSCE16_XGXS_TX_PI_STS3r_fields, 15413 #else 15414 0, 15415 #endif 15416 #endif 15417 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15418 PHYMOD_SYMBOL_FLAG_REGISTER, 15419 "TX_PI_STS3r", 15420 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15421 "TX_PI_TX_PI_STATUS_3", 15422 NULL, 15423 #endif 15424 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15425 0x0, /* 0 */ 15426 0, 15427 #endif 15428 }, 15429 { 15430 BCMI_TSCE16_XGXS_TX_PI_STS4r, 15431 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15432 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15433 BCMI_TSCE16_XGXS_TX_PI_STS4r_fields, 15434 #else 15435 0, 15436 #endif 15437 #endif 15438 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15439 PHYMOD_SYMBOL_FLAG_REGISTER, 15440 "TX_PI_STS4r", 15441 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15442 "TX_PI_TX_PI_STATUS_4", 15443 NULL, 15444 #endif 15445 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15446 0x0, /* 0 */ 15447 0, 15448 #endif 15449 }, 15450 { 15451 BCMI_TSCE16_XGXS_TX_PI_TX_FIFO_OVFB_STSr, 15452 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15453 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15454 BCMI_TSCE16_XGXS_TX_PI_TX_FIFO_OVFB_STSr_fields, 15455 #else 15456 0, 15457 #endif 15458 #endif 15459 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15460 PHYMOD_SYMBOL_FLAG_REGISTER, 15461 "TX_PI_TX_FIFO_OVFB_STSr", 15462 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15463 "TX_PI_TX_PI_TX_FIFO_OVFB_STATUS", 15464 NULL, 15465 #endif 15466 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15467 0x0, /* 0 */ 15468 0, 15469 #endif 15470 }, 15471 { 15472 BCMI_TSCE16_XGXS_RXTXCOM_OSR_MODE_CTLr, 15473 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15474 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15475 BCMI_TSCE16_XGXS_RXTXCOM_OSR_MODE_CTLr_fields, 15476 #else 15477 0, 15478 #endif 15479 #endif 15480 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15481 PHYMOD_SYMBOL_FLAG_REGISTER, 15482 "RXTXCOM_OSR_MODE_CTLr", 15483 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15484 "RXTXCOM_CKRST_CTRL_OSR_MODE_CONTROL", 15485 NULL, 15486 #endif 15487 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15488 0x0, /* 0 */ 15489 0, 15490 #endif 15491 }, 15492 { 15493 BCMI_TSCE16_XGXS_RXTXCOM_LN_CLK_RST_N_PWRDWN_CTLr, 15494 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15495 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15496 BCMI_TSCE16_XGXS_RXTXCOM_LN_CLK_RST_N_PWRDWN_CTLr_fields, 15497 #else 15498 0, 15499 #endif 15500 #endif 15501 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15502 PHYMOD_SYMBOL_FLAG_REGISTER, 15503 "RXTXCOM_LN_CLK_RST_N_PWRDWN_CTLr", 15504 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15505 "RXTXCOM_CKRST_CTRL_LANE_CLK_RESET_N_POWERDOWN_CONTROL", 15506 NULL, 15507 #endif 15508 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15509 0x0, /* 0 */ 15510 0, 15511 #endif 15512 }, 15513 { 15514 BCMI_TSCE16_XGXS_RXTXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr, 15515 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15516 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15517 BCMI_TSCE16_XGXS_RXTXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields, 15518 #else 15519 0, 15520 #endif 15521 #endif 15522 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15523 PHYMOD_SYMBOL_FLAG_REGISTER, 15524 "RXTXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr", 15525 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15526 "RXTXCOM_CKRST_CTRL_LANE_RESET_N_PWRDN_PIN_KILL_CONTROL", 15527 NULL, 15528 #endif 15529 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15530 0x0, /* 0 */ 15531 0, 15532 #endif 15533 }, 15534 { 15535 BCMI_TSCE16_XGXS_RXTXCOM_UC_ACK_LN_CTLr, 15536 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15537 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15538 BCMI_TSCE16_XGXS_RXTXCOM_UC_ACK_LN_CTLr_fields, 15539 #else 15540 0, 15541 #endif 15542 #endif 15543 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15544 PHYMOD_SYMBOL_FLAG_REGISTER, 15545 "RXTXCOM_UC_ACK_LN_CTLr", 15546 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15547 "RXTXCOM_CKRST_CTRL_UC_ACK_LANE_CONTROL", 15548 NULL, 15549 #endif 15550 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15551 0x0, /* 0 */ 15552 0, 15553 #endif 15554 }, 15555 { 15556 BCMI_TSCE16_XGXS_RXTXCOM_LN_RST_OCC_CTLr, 15557 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15558 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15559 BCMI_TSCE16_XGXS_RXTXCOM_LN_RST_OCC_CTLr_fields, 15560 #else 15561 0, 15562 #endif 15563 #endif 15564 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15565 PHYMOD_SYMBOL_FLAG_REGISTER, 15566 "RXTXCOM_LN_RST_OCC_CTLr", 15567 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15568 "RXTXCOM_CKRST_CTRL_LANE_REG_RESET_OCCURRED_CONTROL", 15569 NULL, 15570 #endif 15571 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15572 0x1, /* 1 */ 15573 0, 15574 #endif 15575 }, 15576 { 15577 BCMI_TSCE16_XGXS_RXTXCOM_LN_DP_RST_ST_STSr, 15578 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15579 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15580 BCMI_TSCE16_XGXS_RXTXCOM_LN_DP_RST_ST_STSr_fields, 15581 #else 15582 0, 15583 #endif 15584 #endif 15585 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15586 PHYMOD_SYMBOL_FLAG_REGISTER, 15587 "RXTXCOM_LN_DP_RST_ST_STSr", 15588 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15589 "RXTXCOM_CKRST_CTRL_LANE_DP_RESET_STATE_STATUS", 15590 NULL, 15591 #endif 15592 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15593 0x7, /* 7 */ 15594 0, 15595 #endif 15596 }, 15597 { 15598 BCMI_TSCE16_XGXS_RXTXCOM_MCST_MASK_CTLr, 15599 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15600 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15601 BCMI_TSCE16_XGXS_RXTXCOM_MCST_MASK_CTLr_fields, 15602 #else 15603 0, 15604 #endif 15605 #endif 15606 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15607 PHYMOD_SYMBOL_FLAG_REGISTER, 15608 "RXTXCOM_MCST_MASK_CTLr", 15609 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15610 "RXTXCOM_CKRST_CTRL_MULTICAST_MASK_CONTROL", 15611 NULL, 15612 #endif 15613 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15614 0x0, /* 0 */ 15615 0, 15616 #endif 15617 }, 15618 { 15619 BCMI_TSCE16_XGXS_RXTXCOM_OSR_MODE_STS_MC_MASKr, 15620 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15621 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15622 BCMI_TSCE16_XGXS_RXTXCOM_OSR_MODE_STS_MC_MASKr_fields, 15623 #else 15624 0, 15625 #endif 15626 #endif 15627 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15628 PHYMOD_SYMBOL_FLAG_REGISTER, 15629 "RXTXCOM_OSR_MODE_STS_MC_MASKr", 15630 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15631 "RXTXCOM_CKRST_CTRL_OSR_MODE_STATUS_MC_MASK", 15632 NULL, 15633 #endif 15634 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15635 0x0, /* 0 */ 15636 0, 15637 #endif 15638 }, 15639 { 15640 BCMI_TSCE16_XGXS_RXTXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr, 15641 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15642 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15643 BCMI_TSCE16_XGXS_RXTXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr_fields, 15644 #else 15645 0, 15646 #endif 15647 #endif 15648 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15649 PHYMOD_SYMBOL_FLAG_REGISTER, 15650 "RXTXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr", 15651 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15652 "RXTXCOM_CKRST_CTRL_AFE_RESET_PWRDN_OSR_MODE_PIN_STATUS", 15653 NULL, 15654 #endif 15655 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15656 0x0, /* 0 */ 15657 0, 15658 #endif 15659 }, 15660 { 15661 BCMI_TSCE16_XGXS_RXTXCOM_LN_S_RSTB_CTLr, 15662 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15663 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15664 BCMI_TSCE16_XGXS_RXTXCOM_LN_S_RSTB_CTLr_fields, 15665 #else 15666 0, 15667 #endif 15668 #endif 15669 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15670 PHYMOD_SYMBOL_FLAG_REGISTER, 15671 "RXTXCOM_LN_S_RSTB_CTLr", 15672 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15673 "RXTXCOM_CKRST_CTRL_LN_S_RSTB_CONTROL", 15674 NULL, 15675 #endif 15676 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15677 0x1, /* 1 */ 15678 0, 15679 #endif 15680 }, 15681 { 15682 BCMI_TSCE16_XGXS_RX_CTL0r, 15683 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15684 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15685 BCMI_TSCE16_XGXS_RX_CTL0r_fields, 15686 #else 15687 0, 15688 #endif 15689 #endif 15690 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15691 PHYMOD_SYMBOL_FLAG_REGISTER, 15692 "RX_CTL0r", 15693 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15694 "AMS_RX_RX_CTRL_0", 15695 NULL, 15696 #endif 15697 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15698 0x1c00, /* 7168 */ 15699 0, 15700 #endif 15701 }, 15702 { 15703 BCMI_TSCE16_XGXS_RX_CTL1r, 15704 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15705 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15706 BCMI_TSCE16_XGXS_RX_CTL1r_fields, 15707 #else 15708 0, 15709 #endif 15710 #endif 15711 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15712 PHYMOD_SYMBOL_FLAG_REGISTER, 15713 "RX_CTL1r", 15714 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15715 "AMS_RX_RX_CTRL_1", 15716 NULL, 15717 #endif 15718 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15719 0x1048, /* 4168 */ 15720 0, 15721 #endif 15722 }, 15723 { 15724 BCMI_TSCE16_XGXS_RX_CTL2r, 15725 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15726 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15727 BCMI_TSCE16_XGXS_RX_CTL2r_fields, 15728 #else 15729 0, 15730 #endif 15731 #endif 15732 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15733 PHYMOD_SYMBOL_FLAG_REGISTER, 15734 "RX_CTL2r", 15735 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15736 "AMS_RX_RX_CTRL_2", 15737 NULL, 15738 #endif 15739 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15740 0x7e92, /* 32402 */ 15741 0, 15742 #endif 15743 }, 15744 { 15745 BCMI_TSCE16_XGXS_RX_CTL3r, 15746 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15747 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15748 BCMI_TSCE16_XGXS_RX_CTL3r_fields, 15749 #else 15750 0, 15751 #endif 15752 #endif 15753 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15754 PHYMOD_SYMBOL_FLAG_REGISTER, 15755 "RX_CTL3r", 15756 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15757 "AMS_RX_RX_CTRL_3", 15758 NULL, 15759 #endif 15760 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15761 0x288f, /* 10383 */ 15762 0, 15763 #endif 15764 }, 15765 { 15766 BCMI_TSCE16_XGXS_RX_CTL4r, 15767 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15768 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15769 BCMI_TSCE16_XGXS_RX_CTL4r_fields, 15770 #else 15771 0, 15772 #endif 15773 #endif 15774 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15775 PHYMOD_SYMBOL_FLAG_REGISTER, 15776 "RX_CTL4r", 15777 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15778 "AMS_RX_RX_CTRL_4", 15779 NULL, 15780 #endif 15781 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15782 0x20, /* 32 */ 15783 0, 15784 #endif 15785 }, 15786 { 15787 BCMI_TSCE16_XGXS_RX_CTL5r, 15788 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15789 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15790 BCMI_TSCE16_XGXS_RX_CTL5r_fields, 15791 #else 15792 0, 15793 #endif 15794 #endif 15795 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15796 PHYMOD_SYMBOL_FLAG_REGISTER, 15797 "RX_CTL5r", 15798 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15799 "AMS_RX_RX_CTRL_5", 15800 NULL, 15801 #endif 15802 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15803 0xfa0, /* 4000 */ 15804 0, 15805 #endif 15806 }, 15807 { 15808 BCMI_TSCE16_XGXS_RX_CTL6r, 15809 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15810 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15811 BCMI_TSCE16_XGXS_RX_CTL6r_fields, 15812 #else 15813 0, 15814 #endif 15815 #endif 15816 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15817 PHYMOD_SYMBOL_FLAG_REGISTER, 15818 "RX_CTL6r", 15819 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15820 "AMS_RX_RX_CTRL_6", 15821 NULL, 15822 #endif 15823 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15824 0x1078, /* 4216 */ 15825 0, 15826 #endif 15827 }, 15828 { 15829 BCMI_TSCE16_XGXS_RX_CTL7r, 15830 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15831 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15832 BCMI_TSCE16_XGXS_RX_CTL7r_fields, 15833 #else 15834 0, 15835 #endif 15836 #endif 15837 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15838 PHYMOD_SYMBOL_FLAG_REGISTER, 15839 "RX_CTL7r", 15840 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15841 "AMS_RX_RX_CTRL_7", 15842 NULL, 15843 #endif 15844 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15845 0x130, /* 304 */ 15846 0, 15847 #endif 15848 }, 15849 { 15850 BCMI_TSCE16_XGXS_RX_INTr, 15851 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15852 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15853 BCMI_TSCE16_XGXS_RX_INTr_fields, 15854 #else 15855 0, 15856 #endif 15857 #endif 15858 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15859 PHYMOD_SYMBOL_FLAG_REGISTER, 15860 "RX_INTr", 15861 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15862 "AMS_RX_RX_INT", 15863 NULL, 15864 #endif 15865 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15866 0x0, /* 0 */ 15867 0, 15868 #endif 15869 }, 15870 { 15871 BCMI_TSCE16_XGXS_RX_STSr, 15872 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15873 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15874 BCMI_TSCE16_XGXS_RX_STSr_fields, 15875 #else 15876 0, 15877 #endif 15878 #endif 15879 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15880 PHYMOD_SYMBOL_FLAG_REGISTER, 15881 "RX_STSr", 15882 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15883 "AMS_RX_RX_STS", 15884 NULL, 15885 #endif 15886 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15887 0x0, /* 0 */ 15888 0, 15889 #endif 15890 }, 15891 { 15892 BCMI_TSCE16_XGXS_TX_CTL0r, 15893 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15894 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15895 BCMI_TSCE16_XGXS_TX_CTL0r_fields, 15896 #else 15897 0, 15898 #endif 15899 #endif 15900 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15901 PHYMOD_SYMBOL_FLAG_REGISTER, 15902 "TX_CTL0r", 15903 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15904 "AMS_TX_TX_CTRL_0", 15905 NULL, 15906 #endif 15907 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15908 0x2800, /* 10240 */ 15909 0, 15910 #endif 15911 }, 15912 { 15913 BCMI_TSCE16_XGXS_TX_CTL1r, 15914 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15915 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15916 BCMI_TSCE16_XGXS_TX_CTL1r_fields, 15917 #else 15918 0, 15919 #endif 15920 #endif 15921 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15922 PHYMOD_SYMBOL_FLAG_REGISTER, 15923 "TX_CTL1r", 15924 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15925 "AMS_TX_TX_CTRL_1", 15926 NULL, 15927 #endif 15928 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15929 0x744, /* 1860 */ 15930 0, 15931 #endif 15932 }, 15933 { 15934 BCMI_TSCE16_XGXS_TX_CTL2r, 15935 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15936 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15937 BCMI_TSCE16_XGXS_TX_CTL2r_fields, 15938 #else 15939 0, 15940 #endif 15941 #endif 15942 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15943 PHYMOD_SYMBOL_FLAG_REGISTER, 15944 "TX_CTL2r", 15945 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15946 "AMS_TX_TX_CTRL_2", 15947 NULL, 15948 #endif 15949 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15950 0x5250, /* 21072 */ 15951 0, 15952 #endif 15953 }, 15954 { 15955 BCMI_TSCE16_XGXS_TX_CTL3r, 15956 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15957 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15958 BCMI_TSCE16_XGXS_TX_CTL3r_fields, 15959 #else 15960 0, 15961 #endif 15962 #endif 15963 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15964 PHYMOD_SYMBOL_FLAG_REGISTER, 15965 "TX_CTL3r", 15966 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15967 "AMS_TX_TX_CTRL_3", 15968 NULL, 15969 #endif 15970 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15971 0x1556, /* 5462 */ 15972 0, 15973 #endif 15974 }, 15975 { 15976 BCMI_TSCE16_XGXS_TX_CTL4r, 15977 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15978 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 15979 BCMI_TSCE16_XGXS_TX_CTL4r_fields, 15980 #else 15981 0, 15982 #endif 15983 #endif 15984 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15985 PHYMOD_SYMBOL_FLAG_REGISTER, 15986 "TX_CTL4r", 15987 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15988 "AMS_TX_TX_CTRL_4", 15989 NULL, 15990 #endif 15991 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15992 0x0, /* 0 */ 15993 0, 15994 #endif 15995 }, 15996 { 15997 BCMI_TSCE16_XGXS_TX_CTL5r, 15998 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15999 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16000 BCMI_TSCE16_XGXS_TX_CTL5r_fields, 16001 #else 16002 0, 16003 #endif 16004 #endif 16005 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16006 PHYMOD_SYMBOL_FLAG_REGISTER, 16007 "TX_CTL5r", 16008 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16009 "AMS_TX_TX_CTRL_5", 16010 NULL, 16011 #endif 16012 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16013 0x0, /* 0 */ 16014 0, 16015 #endif 16016 }, 16017 { 16018 BCMI_TSCE16_XGXS_TX_CTL6r, 16019 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16020 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16021 BCMI_TSCE16_XGXS_TX_CTL6r_fields, 16022 #else 16023 0, 16024 #endif 16025 #endif 16026 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16027 PHYMOD_SYMBOL_FLAG_REGISTER, 16028 "TX_CTL6r", 16029 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16030 "AMS_TX_TX_CTRL_6", 16031 NULL, 16032 #endif 16033 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16034 0x1, /* 1 */ 16035 0, 16036 #endif 16037 }, 16038 { 16039 BCMI_TSCE16_XGXS_TX_CTL7r, 16040 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16041 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16042 BCMI_TSCE16_XGXS_TX_CTL7r_fields, 16043 #else 16044 0, 16045 #endif 16046 #endif 16047 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16048 PHYMOD_SYMBOL_FLAG_REGISTER, 16049 "TX_CTL7r", 16050 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16051 "AMS_TX_TX_CTRL_7", 16052 NULL, 16053 #endif 16054 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16055 0xaa0, /* 2720 */ 16056 0, 16057 #endif 16058 }, 16059 { 16060 BCMI_TSCE16_XGXS_TX_CTL8r, 16061 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16062 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16063 BCMI_TSCE16_XGXS_TX_CTL8r_fields, 16064 #else 16065 0, 16066 #endif 16067 #endif 16068 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16069 PHYMOD_SYMBOL_FLAG_REGISTER, 16070 "TX_CTL8r", 16071 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16072 "AMS_TX_TX_CTRL_8", 16073 NULL, 16074 #endif 16075 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16076 0x0, /* 0 */ 16077 0, 16078 #endif 16079 }, 16080 { 16081 BCMI_TSCE16_XGXS_TX_INTr, 16082 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16083 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16084 BCMI_TSCE16_XGXS_TX_INTr_fields, 16085 #else 16086 0, 16087 #endif 16088 #endif 16089 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16090 PHYMOD_SYMBOL_FLAG_REGISTER, 16091 "TX_INTr", 16092 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16093 "AMS_TX_TX_INT", 16094 NULL, 16095 #endif 16096 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16097 0x0, /* 0 */ 16098 0, 16099 #endif 16100 }, 16101 { 16102 BCMI_TSCE16_XGXS_TX_STSr, 16103 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16104 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16105 BCMI_TSCE16_XGXS_TX_STSr_fields, 16106 #else 16107 0, 16108 #endif 16109 #endif 16110 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16111 PHYMOD_SYMBOL_FLAG_REGISTER, 16112 "TX_STSr", 16113 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16114 "AMS_TX_TX_STS", 16115 NULL, 16116 #endif 16117 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16118 0x0, /* 0 */ 16119 0, 16120 #endif 16121 }, 16122 { 16123 BCMI_TSCE16_XGXS_PLL_CTL0r, 16124 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16125 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16126 BCMI_TSCE16_XGXS_PLL_CTL0r_fields, 16127 #else 16128 0, 16129 #endif 16130 #endif 16131 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16132 PHYMOD_SYMBOL_FLAG_REGISTER, 16133 "PLL_CTL0r", 16134 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16135 "AMSCOM_PLL_CTRL_0", 16136 NULL, 16137 #endif 16138 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16139 0x2480, /* 9344 */ 16140 0, 16141 #endif 16142 }, 16143 { 16144 BCMI_TSCE16_XGXS_PLL_CTL1r, 16145 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16146 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16147 BCMI_TSCE16_XGXS_PLL_CTL1r_fields, 16148 #else 16149 0, 16150 #endif 16151 #endif 16152 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16153 PHYMOD_SYMBOL_FLAG_REGISTER, 16154 "PLL_CTL1r", 16155 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16156 "AMSCOM_PLL_CTRL_1", 16157 NULL, 16158 #endif 16159 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16160 0x7, /* 7 */ 16161 0, 16162 #endif 16163 }, 16164 { 16165 BCMI_TSCE16_XGXS_PLL_CTL2r, 16166 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16167 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16168 BCMI_TSCE16_XGXS_PLL_CTL2r_fields, 16169 #else 16170 0, 16171 #endif 16172 #endif 16173 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16174 PHYMOD_SYMBOL_FLAG_REGISTER, 16175 "PLL_CTL2r", 16176 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16177 "AMSCOM_PLL_CTRL_2", 16178 NULL, 16179 #endif 16180 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16181 0x80, /* 128 */ 16182 0, 16183 #endif 16184 }, 16185 { 16186 BCMI_TSCE16_XGXS_PLL_CTL3r, 16187 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16188 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16189 BCMI_TSCE16_XGXS_PLL_CTL3r_fields, 16190 #else 16191 0, 16192 #endif 16193 #endif 16194 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16195 PHYMOD_SYMBOL_FLAG_REGISTER, 16196 "PLL_CTL3r", 16197 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16198 "AMSCOM_PLL_CTRL_3", 16199 NULL, 16200 #endif 16201 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16202 0x460e, /* 17934 */ 16203 0, 16204 #endif 16205 }, 16206 { 16207 BCMI_TSCE16_XGXS_PLL_CTL4r, 16208 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16209 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16210 BCMI_TSCE16_XGXS_PLL_CTL4r_fields, 16211 #else 16212 0, 16213 #endif 16214 #endif 16215 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16216 PHYMOD_SYMBOL_FLAG_REGISTER, 16217 "PLL_CTL4r", 16218 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16219 "AMSCOM_PLL_CTRL_4", 16220 NULL, 16221 #endif 16222 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16223 0x501, /* 1281 */ 16224 0, 16225 #endif 16226 }, 16227 { 16228 BCMI_TSCE16_XGXS_PLL_CTL5r, 16229 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16230 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16231 BCMI_TSCE16_XGXS_PLL_CTL5r_fields, 16232 #else 16233 0, 16234 #endif 16235 #endif 16236 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16237 PHYMOD_SYMBOL_FLAG_REGISTER, 16238 "PLL_CTL5r", 16239 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16240 "AMSCOM_PLL_CTRL_5", 16241 NULL, 16242 #endif 16243 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16244 0x1405, /* 5125 */ 16245 0, 16246 #endif 16247 }, 16248 { 16249 BCMI_TSCE16_XGXS_PLL_CTL6r, 16250 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16251 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16252 BCMI_TSCE16_XGXS_PLL_CTL6r_fields, 16253 #else 16254 0, 16255 #endif 16256 #endif 16257 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16258 PHYMOD_SYMBOL_FLAG_REGISTER, 16259 "PLL_CTL6r", 16260 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16261 "AMSCOM_PLL_CTRL_6", 16262 NULL, 16263 #endif 16264 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16265 0x0, /* 0 */ 16266 0, 16267 #endif 16268 }, 16269 { 16270 BCMI_TSCE16_XGXS_PLL_CTL7r, 16271 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16272 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16273 BCMI_TSCE16_XGXS_PLL_CTL7r_fields, 16274 #else 16275 0, 16276 #endif 16277 #endif 16278 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16279 PHYMOD_SYMBOL_FLAG_REGISTER, 16280 "PLL_CTL7r", 16281 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16282 "AMSCOM_PLL_CTRL_7", 16283 NULL, 16284 #endif 16285 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16286 0x0, /* 0 */ 16287 0, 16288 #endif 16289 }, 16290 { 16291 BCMI_TSCE16_XGXS_PLL_CTL8r, 16292 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16293 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16294 BCMI_TSCE16_XGXS_PLL_CTL8r_fields, 16295 #else 16296 0, 16297 #endif 16298 #endif 16299 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16300 PHYMOD_SYMBOL_FLAG_REGISTER, 16301 "PLL_CTL8r", 16302 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16303 "AMSCOM_PLL_CTRL_8", 16304 NULL, 16305 #endif 16306 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16307 0x4442, /* 17474 */ 16308 0, 16309 #endif 16310 }, 16311 { 16312 BCMI_TSCE16_XGXS_PLL_CTL9r, 16313 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16314 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16315 BCMI_TSCE16_XGXS_PLL_CTL9r_fields, 16316 #else 16317 0, 16318 #endif 16319 #endif 16320 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16321 PHYMOD_SYMBOL_FLAG_REGISTER, 16322 "PLL_CTL9r", 16323 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16324 "AMSCOM_PLL_CTRL_9", 16325 NULL, 16326 #endif 16327 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16328 0x5285, /* 21125 */ 16329 0, 16330 #endif 16331 }, 16332 { 16333 BCMI_TSCE16_XGXS_PLL_CTL_10r, 16334 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16335 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16336 BCMI_TSCE16_XGXS_PLL_CTL_10r_fields, 16337 #else 16338 0, 16339 #endif 16340 #endif 16341 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16342 PHYMOD_SYMBOL_FLAG_REGISTER, 16343 "PLL_CTL_10r", 16344 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16345 "AMSCOM_PLL_CTRL_10", 16346 NULL, 16347 #endif 16348 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16349 0x15, /* 21 */ 16350 0, 16351 #endif 16352 }, 16353 { 16354 BCMI_TSCE16_XGXS_PLL_INTr, 16355 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16356 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16357 BCMI_TSCE16_XGXS_PLL_INTr_fields, 16358 #else 16359 0, 16360 #endif 16361 #endif 16362 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16363 PHYMOD_SYMBOL_FLAG_REGISTER, 16364 "PLL_INTr", 16365 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16366 "AMSCOM_PLL_INT", 16367 NULL, 16368 #endif 16369 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16370 0x0, /* 0 */ 16371 0, 16372 #endif 16373 }, 16374 { 16375 BCMI_TSCE16_XGXS_PLL_STSr, 16376 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16377 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16378 BCMI_TSCE16_XGXS_PLL_STSr_fields, 16379 #else 16380 0, 16381 #endif 16382 #endif 16383 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16384 PHYMOD_SYMBOL_FLAG_REGISTER, 16385 "PLL_STSr", 16386 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16387 "AMSCOM_PLL_STS", 16388 NULL, 16389 #endif 16390 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16391 0x0, /* 0 */ 16392 0, 16393 #endif 16394 }, 16395 { 16396 BCMI_TSCE16_XGXS_SIGDET_CTL0r, 16397 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16398 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16399 BCMI_TSCE16_XGXS_SIGDET_CTL0r_fields, 16400 #else 16401 0, 16402 #endif 16403 #endif 16404 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16405 PHYMOD_SYMBOL_FLAG_REGISTER, 16406 "SIGDET_CTL0r", 16407 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16408 "SIGDET_SIGDET_CTRL_0", 16409 NULL, 16410 #endif 16411 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16412 0x5229, /* 21033 */ 16413 0, 16414 #endif 16415 }, 16416 { 16417 BCMI_TSCE16_XGXS_SIGDET_CTL1r, 16418 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16419 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16420 BCMI_TSCE16_XGXS_SIGDET_CTL1r_fields, 16421 #else 16422 0, 16423 #endif 16424 #endif 16425 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16426 PHYMOD_SYMBOL_FLAG_REGISTER, 16427 "SIGDET_CTL1r", 16428 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16429 "SIGDET_SIGDET_CTRL_1", 16430 NULL, 16431 #endif 16432 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16433 0x8, /* 8 */ 16434 0, 16435 #endif 16436 }, 16437 { 16438 BCMI_TSCE16_XGXS_SIGDET_CTL2r, 16439 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16440 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16441 BCMI_TSCE16_XGXS_SIGDET_CTL2r_fields, 16442 #else 16443 0, 16444 #endif 16445 #endif 16446 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16447 PHYMOD_SYMBOL_FLAG_REGISTER, 16448 "SIGDET_CTL2r", 16449 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16450 "SIGDET_SIGDET_CTRL_2", 16451 NULL, 16452 #endif 16453 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16454 0xfd29, /* 64809 */ 16455 0, 16456 #endif 16457 }, 16458 { 16459 BCMI_TSCE16_XGXS_SIGDET_STS0r, 16460 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16461 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16462 BCMI_TSCE16_XGXS_SIGDET_STS0r_fields, 16463 #else 16464 0, 16465 #endif 16466 #endif 16467 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16468 PHYMOD_SYMBOL_FLAG_REGISTER, 16469 "SIGDET_STS0r", 16470 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16471 "SIGDET_SIGDET_STATUS_0", 16472 NULL, 16473 #endif 16474 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16475 0x0, /* 0 */ 16476 0, 16477 #endif 16478 }, 16479 { 16480 BCMI_TSCE16_XGXS_SIGDET_STS1r, 16481 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16482 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16483 BCMI_TSCE16_XGXS_SIGDET_STS1r_fields, 16484 #else 16485 0, 16486 #endif 16487 #endif 16488 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16489 PHYMOD_SYMBOL_FLAG_REGISTER, 16490 "SIGDET_STS1r", 16491 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16492 "SIGDET_SIGDET_STATUS_1", 16493 NULL, 16494 #endif 16495 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16496 0x0, /* 0 */ 16497 0, 16498 #endif 16499 }, 16500 { 16501 BCMI_TSCE16_XGXS_SIGDET_STS2r, 16502 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16503 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16504 BCMI_TSCE16_XGXS_SIGDET_STS2r_fields, 16505 #else 16506 0, 16507 #endif 16508 #endif 16509 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16510 PHYMOD_SYMBOL_FLAG_REGISTER, 16511 "SIGDET_STS2r", 16512 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16513 "SIGDET_SIGDET_STATUS_2", 16514 NULL, 16515 #endif 16516 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16517 0x0, /* 0 */ 16518 0, 16519 #endif 16520 }, 16521 { 16522 BCMI_TSCE16_XGXS_SIGDET_STS3r, 16523 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16524 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16525 BCMI_TSCE16_XGXS_SIGDET_STS3r_fields, 16526 #else 16527 0, 16528 #endif 16529 #endif 16530 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16531 PHYMOD_SYMBOL_FLAG_REGISTER, 16532 "SIGDET_STS3r", 16533 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16534 "SIGDET_SIGDET_STATUS_3", 16535 NULL, 16536 #endif 16537 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16538 0x0, /* 0 */ 16539 0, 16540 #endif 16541 }, 16542 { 16543 BCMI_TSCE16_XGXS_SIGDET_STS4r, 16544 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16545 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16546 BCMI_TSCE16_XGXS_SIGDET_STS4r_fields, 16547 #else 16548 0, 16549 #endif 16550 #endif 16551 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16552 PHYMOD_SYMBOL_FLAG_REGISTER, 16553 "SIGDET_STS4r", 16554 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16555 "SIGDET_SIGDET_STATUS_4", 16556 NULL, 16557 #endif 16558 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16559 0x9, /* 9 */ 16560 0, 16561 #endif 16562 }, 16563 { 16564 BCMI_TSCE16_XGXS_TLB_RX_PRBS_CHK_CNT_CFGr, 16565 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16566 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16567 BCMI_TSCE16_XGXS_TLB_RX_PRBS_CHK_CNT_CFGr_fields, 16568 #else 16569 0, 16570 #endif 16571 #endif 16572 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16573 PHYMOD_SYMBOL_FLAG_REGISTER, 16574 "TLB_RX_PRBS_CHK_CNT_CFGr", 16575 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16576 "TLB_RX_PRBS_CHK_CNT_CONFIG", 16577 NULL, 16578 #endif 16579 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16580 0x602, /* 1538 */ 16581 0, 16582 #endif 16583 }, 16584 { 16585 BCMI_TSCE16_XGXS_TLB_RX_PRBS_CHK_CFGr, 16586 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16587 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16588 BCMI_TSCE16_XGXS_TLB_RX_PRBS_CHK_CFGr_fields, 16589 #else 16590 0, 16591 #endif 16592 #endif 16593 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16594 PHYMOD_SYMBOL_FLAG_REGISTER, 16595 "TLB_RX_PRBS_CHK_CFGr", 16596 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16597 "TLB_RX_PRBS_CHK_CONFIG", 16598 NULL, 16599 #endif 16600 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16601 0x2a, /* 42 */ 16602 0, 16603 #endif 16604 }, 16605 { 16606 BCMI_TSCE16_XGXS_TLB_RX_DIG_LPBK_CFGr, 16607 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16608 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16609 BCMI_TSCE16_XGXS_TLB_RX_DIG_LPBK_CFGr_fields, 16610 #else 16611 0, 16612 #endif 16613 #endif 16614 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16615 PHYMOD_SYMBOL_FLAG_REGISTER, 16616 "TLB_RX_DIG_LPBK_CFGr", 16617 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16618 "TLB_RX_DIG_LPBK_CONFIG", 16619 NULL, 16620 #endif 16621 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16622 0xe, /* 14 */ 16623 0, 16624 #endif 16625 }, 16626 { 16627 BCMI_TSCE16_XGXS_TLB_RX_TLB_RX_MISC_CFGr, 16628 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16629 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16630 BCMI_TSCE16_XGXS_TLB_RX_TLB_RX_MISC_CFGr_fields, 16631 #else 16632 0, 16633 #endif 16634 #endif 16635 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16636 PHYMOD_SYMBOL_FLAG_REGISTER, 16637 "TLB_RX_TLB_RX_MISC_CFGr", 16638 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16639 "TLB_RX_TLB_RX_MISC_CONFIG", 16640 NULL, 16641 #endif 16642 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16643 0x0, /* 0 */ 16644 0, 16645 #endif 16646 }, 16647 { 16648 BCMI_TSCE16_XGXS_TLB_RX_PRBS_CHK_EN_TMR_CTLr, 16649 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16650 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16651 BCMI_TSCE16_XGXS_TLB_RX_PRBS_CHK_EN_TMR_CTLr_fields, 16652 #else 16653 0, 16654 #endif 16655 #endif 16656 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16657 PHYMOD_SYMBOL_FLAG_REGISTER, 16658 "TLB_RX_PRBS_CHK_EN_TMR_CTLr", 16659 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16660 "TLB_RX_PRBS_CHK_EN_TIMER_CONTROL", 16661 NULL, 16662 #endif 16663 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16664 0x0, /* 0 */ 16665 0, 16666 #endif 16667 }, 16668 { 16669 BCMI_TSCE16_XGXS_TLB_RX_PRBS_CHK_BURST_ERR_CNT_STSr, 16670 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16671 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16672 BCMI_TSCE16_XGXS_TLB_RX_PRBS_CHK_BURST_ERR_CNT_STSr_fields, 16673 #else 16674 0, 16675 #endif 16676 #endif 16677 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16678 PHYMOD_SYMBOL_FLAG_REGISTER, 16679 "TLB_RX_PRBS_CHK_BURST_ERR_CNT_STSr", 16680 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16681 "TLB_RX_PRBS_CHK_BURST_ERR_CNT_STATUS", 16682 NULL, 16683 #endif 16684 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16685 0x0, /* 0 */ 16686 0, 16687 #endif 16688 }, 16689 { 16690 BCMI_TSCE16_XGXS_TLB_RX_DBG_PMD_RX_LOCK_STSr, 16691 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16692 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16693 BCMI_TSCE16_XGXS_TLB_RX_DBG_PMD_RX_LOCK_STSr_fields, 16694 #else 16695 0, 16696 #endif 16697 #endif 16698 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16699 PHYMOD_SYMBOL_FLAG_REGISTER, 16700 "TLB_RX_DBG_PMD_RX_LOCK_STSr", 16701 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16702 "TLB_RX_DBG_PMD_RX_LOCK_STATUS", 16703 NULL, 16704 #endif 16705 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16706 0x0, /* 0 */ 16707 0, 16708 #endif 16709 }, 16710 { 16711 BCMI_TSCE16_XGXS_TLB_RX_UC_PMD_RX_LOCK_STSr, 16712 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16713 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16714 BCMI_TSCE16_XGXS_TLB_RX_UC_PMD_RX_LOCK_STSr_fields, 16715 #else 16716 0, 16717 #endif 16718 #endif 16719 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16720 PHYMOD_SYMBOL_FLAG_REGISTER, 16721 "TLB_RX_UC_PMD_RX_LOCK_STSr", 16722 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16723 "TLB_RX_UC_PMD_RX_LOCK_STATUS", 16724 NULL, 16725 #endif 16726 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16727 0x0, /* 0 */ 16728 0, 16729 #endif 16730 }, 16731 { 16732 BCMI_TSCE16_XGXS_TLB_RX_DIG_LPBK_PD_STSr, 16733 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16734 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16735 BCMI_TSCE16_XGXS_TLB_RX_DIG_LPBK_PD_STSr_fields, 16736 #else 16737 0, 16738 #endif 16739 #endif 16740 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16741 PHYMOD_SYMBOL_FLAG_REGISTER, 16742 "TLB_RX_DIG_LPBK_PD_STSr", 16743 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16744 "TLB_RX_DIG_LPBK_PD_STATUS", 16745 NULL, 16746 #endif 16747 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16748 0x2, /* 2 */ 16749 0, 16750 #endif 16751 }, 16752 { 16753 BCMI_TSCE16_XGXS_TLB_RX_PRBS_CHK_LOCK_STSr, 16754 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16755 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16756 BCMI_TSCE16_XGXS_TLB_RX_PRBS_CHK_LOCK_STSr_fields, 16757 #else 16758 0, 16759 #endif 16760 #endif 16761 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16762 PHYMOD_SYMBOL_FLAG_REGISTER, 16763 "TLB_RX_PRBS_CHK_LOCK_STSr", 16764 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16765 "TLB_RX_PRBS_CHK_LOCK_STATUS", 16766 NULL, 16767 #endif 16768 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16769 0x0, /* 0 */ 16770 0, 16771 #endif 16772 }, 16773 { 16774 BCMI_TSCE16_XGXS_TLB_RX_PRBS_CHK_ERR_CNT_MSB_STSr, 16775 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16776 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16777 BCMI_TSCE16_XGXS_TLB_RX_PRBS_CHK_ERR_CNT_MSB_STSr_fields, 16778 #else 16779 0, 16780 #endif 16781 #endif 16782 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16783 PHYMOD_SYMBOL_FLAG_REGISTER, 16784 "TLB_RX_PRBS_CHK_ERR_CNT_MSB_STSr", 16785 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16786 "TLB_RX_PRBS_CHK_ERR_CNT_MSB_STATUS", 16787 NULL, 16788 #endif 16789 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16790 0x8000, /* 32768 */ 16791 0, 16792 #endif 16793 }, 16794 { 16795 BCMI_TSCE16_XGXS_TLB_RX_PRBS_CHK_ERR_CNT_LSB_STSr, 16796 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16797 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16798 BCMI_TSCE16_XGXS_TLB_RX_PRBS_CHK_ERR_CNT_LSB_STSr_fields, 16799 #else 16800 0, 16801 #endif 16802 #endif 16803 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16804 PHYMOD_SYMBOL_FLAG_REGISTER, 16805 "TLB_RX_PRBS_CHK_ERR_CNT_LSB_STSr", 16806 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16807 "TLB_RX_PRBS_CHK_ERR_CNT_LSB_STATUS", 16808 NULL, 16809 #endif 16810 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16811 0x0, /* 0 */ 16812 0, 16813 #endif 16814 }, 16815 { 16816 BCMI_TSCE16_XGXS_TLB_RX_PMD_RX_LOCK_STSr, 16817 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16818 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16819 BCMI_TSCE16_XGXS_TLB_RX_PMD_RX_LOCK_STSr_fields, 16820 #else 16821 0, 16822 #endif 16823 #endif 16824 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16825 PHYMOD_SYMBOL_FLAG_REGISTER, 16826 "TLB_RX_PMD_RX_LOCK_STSr", 16827 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16828 "TLB_RX_PMD_RX_LOCK_STATUS", 16829 NULL, 16830 #endif 16831 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16832 0x0, /* 0 */ 16833 0, 16834 #endif 16835 }, 16836 { 16837 BCMI_TSCE16_XGXS_TLB_TX_PATT_GEN_CFGr, 16838 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16839 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16840 BCMI_TSCE16_XGXS_TLB_TX_PATT_GEN_CFGr_fields, 16841 #else 16842 0, 16843 #endif 16844 #endif 16845 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16846 PHYMOD_SYMBOL_FLAG_REGISTER, 16847 "TLB_TX_PATT_GEN_CFGr", 16848 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16849 "TLB_TX_PATT_GEN_CONFIG", 16850 NULL, 16851 #endif 16852 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16853 0xb000, /* 45056 */ 16854 0, 16855 #endif 16856 }, 16857 { 16858 BCMI_TSCE16_XGXS_TLB_TX_PRBS_GEN_CFGr, 16859 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16860 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16861 BCMI_TSCE16_XGXS_TLB_TX_PRBS_GEN_CFGr_fields, 16862 #else 16863 0, 16864 #endif 16865 #endif 16866 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16867 PHYMOD_SYMBOL_FLAG_REGISTER, 16868 "TLB_TX_PRBS_GEN_CFGr", 16869 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16870 "TLB_TX_PRBS_GEN_CONFIG", 16871 NULL, 16872 #endif 16873 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16874 0xa, /* 10 */ 16875 0, 16876 #endif 16877 }, 16878 { 16879 BCMI_TSCE16_XGXS_TLB_TX_RMT_LPBK_CFGr, 16880 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16881 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16882 BCMI_TSCE16_XGXS_TLB_TX_RMT_LPBK_CFGr_fields, 16883 #else 16884 0, 16885 #endif 16886 #endif 16887 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16888 PHYMOD_SYMBOL_FLAG_REGISTER, 16889 "TLB_TX_RMT_LPBK_CFGr", 16890 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16891 "TLB_TX_RMT_LPBK_CONFIG", 16892 NULL, 16893 #endif 16894 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16895 0x2, /* 2 */ 16896 0, 16897 #endif 16898 }, 16899 { 16900 BCMI_TSCE16_XGXS_TLB_TX_TLB_TX_MISC_CFGr, 16901 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16902 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16903 BCMI_TSCE16_XGXS_TLB_TX_TLB_TX_MISC_CFGr_fields, 16904 #else 16905 0, 16906 #endif 16907 #endif 16908 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16909 PHYMOD_SYMBOL_FLAG_REGISTER, 16910 "TLB_TX_TLB_TX_MISC_CFGr", 16911 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16912 "TLB_TX_TLB_TX_MISC_CONFIG", 16913 NULL, 16914 #endif 16915 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16916 0x0, /* 0 */ 16917 0, 16918 #endif 16919 }, 16920 { 16921 BCMI_TSCE16_XGXS_TLB_TX_RMT_LPBK_PD_STSr, 16922 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16923 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16924 BCMI_TSCE16_XGXS_TLB_TX_RMT_LPBK_PD_STSr_fields, 16925 #else 16926 0, 16927 #endif 16928 #endif 16929 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16930 PHYMOD_SYMBOL_FLAG_REGISTER, 16931 "TLB_TX_RMT_LPBK_PD_STSr", 16932 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16933 "TLB_TX_RMT_LPBK_PD_STATUS", 16934 NULL, 16935 #endif 16936 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16937 0x2, /* 2 */ 16938 0, 16939 #endif 16940 }, 16941 { 16942 BCMI_TSCE16_XGXS_REVID0r, 16943 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16944 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16945 BCMI_TSCE16_XGXS_REVID0r_fields, 16946 #else 16947 0, 16948 #endif 16949 #endif 16950 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16951 PHYMOD_SYMBOL_FLAG_REGISTER, 16952 "REVID0r", 16953 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16954 "DIGCOM_REVID0", 16955 NULL, 16956 #endif 16957 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16958 0x363, /* 867 */ 16959 0, 16960 #endif 16961 }, 16962 { 16963 BCMI_TSCE16_XGXS_RST_CTL_PMDr, 16964 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16965 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16966 BCMI_TSCE16_XGXS_RST_CTL_PMDr_fields, 16967 #else 16968 0, 16969 #endif 16970 #endif 16971 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16972 PHYMOD_SYMBOL_FLAG_REGISTER, 16973 "RST_CTL_PMDr", 16974 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16975 "DIGCOM_RESET_CONTROL_PMD", 16976 NULL, 16977 #endif 16978 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16979 0x1, /* 1 */ 16980 0, 16981 #endif 16982 }, 16983 { 16984 BCMI_TSCE16_XGXS_RST_CTL_CORE_DPr, 16985 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16986 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 16987 BCMI_TSCE16_XGXS_RST_CTL_CORE_DPr_fields, 16988 #else 16989 0, 16990 #endif 16991 #endif 16992 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16993 PHYMOD_SYMBOL_FLAG_REGISTER, 16994 "RST_CTL_CORE_DPr", 16995 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16996 "DIGCOM_RESET_CONTROL_CORE_DP", 16997 NULL, 16998 #endif 16999 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17000 0x0, /* 0 */ 17001 0, 17002 #endif 17003 }, 17004 { 17005 BCMI_TSCE16_XGXS_MASKDATAr, 17006 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17007 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17008 BCMI_TSCE16_XGXS_MASKDATAr_fields, 17009 #else 17010 0, 17011 #endif 17012 #endif 17013 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17014 PHYMOD_SYMBOL_FLAG_REGISTER, 17015 "MASKDATAr", 17016 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17017 "DIGCOM_MASKDATA_REG", 17018 NULL, 17019 #endif 17020 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17021 0x0, /* 0 */ 17022 0, 17023 #endif 17024 }, 17025 { 17026 BCMI_TSCE16_XGXS_TOP_USER_CTL0r, 17027 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17028 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17029 BCMI_TSCE16_XGXS_TOP_USER_CTL0r_fields, 17030 #else 17031 0, 17032 #endif 17033 #endif 17034 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17035 PHYMOD_SYMBOL_FLAG_REGISTER, 17036 "TOP_USER_CTL0r", 17037 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17038 "DIGCOM_TOP_USER_CONTROL_0", 17039 NULL, 17040 #endif 17041 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17042 0x271, /* 625 */ 17043 0, 17044 #endif 17045 }, 17046 { 17047 BCMI_TSCE16_XGXS_UC_ACK_CORE_CTLr, 17048 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17049 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17050 BCMI_TSCE16_XGXS_UC_ACK_CORE_CTLr_fields, 17051 #else 17052 0, 17053 #endif 17054 #endif 17055 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17056 PHYMOD_SYMBOL_FLAG_REGISTER, 17057 "UC_ACK_CORE_CTLr", 17058 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17059 "DIGCOM_UC_ACK_CORE_CONTROL", 17060 NULL, 17061 #endif 17062 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17063 0x0, /* 0 */ 17064 0, 17065 #endif 17066 }, 17067 { 17068 BCMI_TSCE16_XGXS_CORE_RST_OCC_CTLr, 17069 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17070 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17071 BCMI_TSCE16_XGXS_CORE_RST_OCC_CTLr_fields, 17072 #else 17073 0, 17074 #endif 17075 #endif 17076 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17077 PHYMOD_SYMBOL_FLAG_REGISTER, 17078 "CORE_RST_OCC_CTLr", 17079 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17080 "DIGCOM_CORE_REG_RESET_OCCURRED_CONTROL", 17081 NULL, 17082 #endif 17083 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17084 0x1, /* 1 */ 17085 0, 17086 #endif 17087 }, 17088 { 17089 BCMI_TSCE16_XGXS_RST_SEQ_TMR_CTLr, 17090 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17091 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17092 BCMI_TSCE16_XGXS_RST_SEQ_TMR_CTLr_fields, 17093 #else 17094 0, 17095 #endif 17096 #endif 17097 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17098 PHYMOD_SYMBOL_FLAG_REGISTER, 17099 "RST_SEQ_TMR_CTLr", 17100 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17101 "DIGCOM_RST_SEQ_TIMER_CONTROL", 17102 NULL, 17103 #endif 17104 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17105 0x8604, /* 34308 */ 17106 0, 17107 #endif 17108 }, 17109 { 17110 BCMI_TSCE16_XGXS_CORE_DP_RST_ST_STSr, 17111 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17112 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17113 BCMI_TSCE16_XGXS_CORE_DP_RST_ST_STSr_fields, 17114 #else 17115 0, 17116 #endif 17117 #endif 17118 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17119 PHYMOD_SYMBOL_FLAG_REGISTER, 17120 "CORE_DP_RST_ST_STSr", 17121 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17122 "DIGCOM_CORE_DP_RESET_STATE_STATUS", 17123 NULL, 17124 #endif 17125 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17126 0x7, /* 7 */ 17127 0, 17128 #endif 17129 }, 17130 { 17131 BCMI_TSCE16_XGXS_PMD_CORE_MODE_STSr, 17132 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17133 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17134 BCMI_TSCE16_XGXS_PMD_CORE_MODE_STSr_fields, 17135 #else 17136 0, 17137 #endif 17138 #endif 17139 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17140 PHYMOD_SYMBOL_FLAG_REGISTER, 17141 "PMD_CORE_MODE_STSr", 17142 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17143 "DIGCOM_PMD_CORE_MODE_STATUS", 17144 NULL, 17145 #endif 17146 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17147 0x0, /* 0 */ 17148 0, 17149 #endif 17150 }, 17151 { 17152 BCMI_TSCE16_XGXS_REVID1r, 17153 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17154 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17155 BCMI_TSCE16_XGXS_REVID1r_fields, 17156 #else 17157 0, 17158 #endif 17159 #endif 17160 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17161 PHYMOD_SYMBOL_FLAG_REGISTER, 17162 "REVID1r", 17163 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17164 "DIGCOM_REVID1", 17165 NULL, 17166 #endif 17167 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17168 0x403c, /* 16444 */ 17169 0, 17170 #endif 17171 }, 17172 { 17173 BCMI_TSCE16_XGXS_REVID2r, 17174 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17175 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17176 BCMI_TSCE16_XGXS_REVID2r_fields, 17177 #else 17178 0, 17179 #endif 17180 #endif 17181 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17182 PHYMOD_SYMBOL_FLAG_REGISTER, 17183 "REVID2r", 17184 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17185 "DIGCOM_REVID2", 17186 NULL, 17187 #endif 17188 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17189 0x0, /* 0 */ 17190 0, 17191 #endif 17192 }, 17193 { 17194 BCMI_TSCE16_XGXS_PATT_GEN_SEQ0r, 17195 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17196 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17197 BCMI_TSCE16_XGXS_PATT_GEN_SEQ0r_fields, 17198 #else 17199 0, 17200 #endif 17201 #endif 17202 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17203 PHYMOD_SYMBOL_FLAG_REGISTER, 17204 "PATT_GEN_SEQ0r", 17205 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17206 "PATT_GEN_PATT_GEN_SEQ_0", 17207 NULL, 17208 #endif 17209 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17210 0xff00, /* 65280 */ 17211 0, 17212 #endif 17213 }, 17214 { 17215 BCMI_TSCE16_XGXS_PATT_GEN_SEQ1r, 17216 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17217 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17218 BCMI_TSCE16_XGXS_PATT_GEN_SEQ1r_fields, 17219 #else 17220 0, 17221 #endif 17222 #endif 17223 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17224 PHYMOD_SYMBOL_FLAG_REGISTER, 17225 "PATT_GEN_SEQ1r", 17226 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17227 "PATT_GEN_PATT_GEN_SEQ_1", 17228 NULL, 17229 #endif 17230 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17231 0xff00, /* 65280 */ 17232 0, 17233 #endif 17234 }, 17235 { 17236 BCMI_TSCE16_XGXS_PATT_GEN_SEQ2r, 17237 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17238 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17239 BCMI_TSCE16_XGXS_PATT_GEN_SEQ2r_fields, 17240 #else 17241 0, 17242 #endif 17243 #endif 17244 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17245 PHYMOD_SYMBOL_FLAG_REGISTER, 17246 "PATT_GEN_SEQ2r", 17247 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17248 "PATT_GEN_PATT_GEN_SEQ_2", 17249 NULL, 17250 #endif 17251 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17252 0xff00, /* 65280 */ 17253 0, 17254 #endif 17255 }, 17256 { 17257 BCMI_TSCE16_XGXS_PATT_GEN_SEQ3r, 17258 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17259 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17260 BCMI_TSCE16_XGXS_PATT_GEN_SEQ3r_fields, 17261 #else 17262 0, 17263 #endif 17264 #endif 17265 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17266 PHYMOD_SYMBOL_FLAG_REGISTER, 17267 "PATT_GEN_SEQ3r", 17268 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17269 "PATT_GEN_PATT_GEN_SEQ_3", 17270 NULL, 17271 #endif 17272 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17273 0xff00, /* 65280 */ 17274 0, 17275 #endif 17276 }, 17277 { 17278 BCMI_TSCE16_XGXS_PATT_GEN_SEQ4r, 17279 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17280 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17281 BCMI_TSCE16_XGXS_PATT_GEN_SEQ4r_fields, 17282 #else 17283 0, 17284 #endif 17285 #endif 17286 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17287 PHYMOD_SYMBOL_FLAG_REGISTER, 17288 "PATT_GEN_SEQ4r", 17289 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17290 "PATT_GEN_PATT_GEN_SEQ_4", 17291 NULL, 17292 #endif 17293 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17294 0xff00, /* 65280 */ 17295 0, 17296 #endif 17297 }, 17298 { 17299 BCMI_TSCE16_XGXS_PATT_GEN_SEQ5r, 17300 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17301 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17302 BCMI_TSCE16_XGXS_PATT_GEN_SEQ5r_fields, 17303 #else 17304 0, 17305 #endif 17306 #endif 17307 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17308 PHYMOD_SYMBOL_FLAG_REGISTER, 17309 "PATT_GEN_SEQ5r", 17310 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17311 "PATT_GEN_PATT_GEN_SEQ_5", 17312 NULL, 17313 #endif 17314 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17315 0xff00, /* 65280 */ 17316 0, 17317 #endif 17318 }, 17319 { 17320 BCMI_TSCE16_XGXS_PATT_GEN_SEQ6r, 17321 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17322 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17323 BCMI_TSCE16_XGXS_PATT_GEN_SEQ6r_fields, 17324 #else 17325 0, 17326 #endif 17327 #endif 17328 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17329 PHYMOD_SYMBOL_FLAG_REGISTER, 17330 "PATT_GEN_SEQ6r", 17331 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17332 "PATT_GEN_PATT_GEN_SEQ_6", 17333 NULL, 17334 #endif 17335 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17336 0xff00, /* 65280 */ 17337 0, 17338 #endif 17339 }, 17340 { 17341 BCMI_TSCE16_XGXS_PATT_GEN_SEQ7r, 17342 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17343 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17344 BCMI_TSCE16_XGXS_PATT_GEN_SEQ7r_fields, 17345 #else 17346 0, 17347 #endif 17348 #endif 17349 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17350 PHYMOD_SYMBOL_FLAG_REGISTER, 17351 "PATT_GEN_SEQ7r", 17352 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17353 "PATT_GEN_PATT_GEN_SEQ_7", 17354 NULL, 17355 #endif 17356 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17357 0xff00, /* 65280 */ 17358 0, 17359 #endif 17360 }, 17361 { 17362 BCMI_TSCE16_XGXS_PATT_GEN_SEQ8r, 17363 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17364 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17365 BCMI_TSCE16_XGXS_PATT_GEN_SEQ8r_fields, 17366 #else 17367 0, 17368 #endif 17369 #endif 17370 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17371 PHYMOD_SYMBOL_FLAG_REGISTER, 17372 "PATT_GEN_SEQ8r", 17373 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17374 "PATT_GEN_PATT_GEN_SEQ_8", 17375 NULL, 17376 #endif 17377 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17378 0xff00, /* 65280 */ 17379 0, 17380 #endif 17381 }, 17382 { 17383 BCMI_TSCE16_XGXS_PATT_GEN_SEQ9r, 17384 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17385 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17386 BCMI_TSCE16_XGXS_PATT_GEN_SEQ9r_fields, 17387 #else 17388 0, 17389 #endif 17390 #endif 17391 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17392 PHYMOD_SYMBOL_FLAG_REGISTER, 17393 "PATT_GEN_SEQ9r", 17394 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17395 "PATT_GEN_PATT_GEN_SEQ_9", 17396 NULL, 17397 #endif 17398 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17399 0xff00, /* 65280 */ 17400 0, 17401 #endif 17402 }, 17403 { 17404 BCMI_TSCE16_XGXS_PATT_GEN_SEQ_10r, 17405 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17406 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17407 BCMI_TSCE16_XGXS_PATT_GEN_SEQ_10r_fields, 17408 #else 17409 0, 17410 #endif 17411 #endif 17412 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17413 PHYMOD_SYMBOL_FLAG_REGISTER, 17414 "PATT_GEN_SEQ_10r", 17415 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17416 "PATT_GEN_PATT_GEN_SEQ_10", 17417 NULL, 17418 #endif 17419 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17420 0xff00, /* 65280 */ 17421 0, 17422 #endif 17423 }, 17424 { 17425 BCMI_TSCE16_XGXS_PATT_GEN_SEQ_11r, 17426 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17427 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17428 BCMI_TSCE16_XGXS_PATT_GEN_SEQ_11r_fields, 17429 #else 17430 0, 17431 #endif 17432 #endif 17433 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17434 PHYMOD_SYMBOL_FLAG_REGISTER, 17435 "PATT_GEN_SEQ_11r", 17436 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17437 "PATT_GEN_PATT_GEN_SEQ_11", 17438 NULL, 17439 #endif 17440 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17441 0xff00, /* 65280 */ 17442 0, 17443 #endif 17444 }, 17445 { 17446 BCMI_TSCE16_XGXS_PATT_GEN_SEQ_12r, 17447 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17448 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17449 BCMI_TSCE16_XGXS_PATT_GEN_SEQ_12r_fields, 17450 #else 17451 0, 17452 #endif 17453 #endif 17454 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17455 PHYMOD_SYMBOL_FLAG_REGISTER, 17456 "PATT_GEN_SEQ_12r", 17457 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17458 "PATT_GEN_PATT_GEN_SEQ_12", 17459 NULL, 17460 #endif 17461 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17462 0xff00, /* 65280 */ 17463 0, 17464 #endif 17465 }, 17466 { 17467 BCMI_TSCE16_XGXS_PATT_GEN_SEQ_13r, 17468 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17469 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17470 BCMI_TSCE16_XGXS_PATT_GEN_SEQ_13r_fields, 17471 #else 17472 0, 17473 #endif 17474 #endif 17475 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17476 PHYMOD_SYMBOL_FLAG_REGISTER, 17477 "PATT_GEN_SEQ_13r", 17478 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17479 "PATT_GEN_PATT_GEN_SEQ_13", 17480 NULL, 17481 #endif 17482 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17483 0xff00, /* 65280 */ 17484 0, 17485 #endif 17486 }, 17487 { 17488 BCMI_TSCE16_XGXS_PATT_GEN_SEQ_14r, 17489 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17490 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17491 BCMI_TSCE16_XGXS_PATT_GEN_SEQ_14r_fields, 17492 #else 17493 0, 17494 #endif 17495 #endif 17496 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17497 PHYMOD_SYMBOL_FLAG_REGISTER, 17498 "PATT_GEN_SEQ_14r", 17499 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17500 "PATT_GEN_PATT_GEN_SEQ_14", 17501 NULL, 17502 #endif 17503 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17504 0xff00, /* 65280 */ 17505 0, 17506 #endif 17507 }, 17508 { 17509 BCMI_TSCE16_XGXS_TXFIR_TAP_CTL0r, 17510 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17511 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17512 BCMI_TSCE16_XGXS_TXFIR_TAP_CTL0r_fields, 17513 #else 17514 0, 17515 #endif 17516 #endif 17517 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17518 PHYMOD_SYMBOL_FLAG_REGISTER, 17519 "TXFIR_TAP_CTL0r", 17520 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17521 "TX_FED_TXFIR_TAP_CONTROL0", 17522 NULL, 17523 #endif 17524 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17525 0x0, /* 0 */ 17526 0, 17527 #endif 17528 }, 17529 { 17530 BCMI_TSCE16_XGXS_MISC_CTL0r, 17531 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17532 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17533 BCMI_TSCE16_XGXS_MISC_CTL0r_fields, 17534 #else 17535 0, 17536 #endif 17537 #endif 17538 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17539 PHYMOD_SYMBOL_FLAG_REGISTER, 17540 "MISC_CTL0r", 17541 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17542 "TX_FED_MISC_CONTROL0", 17543 NULL, 17544 #endif 17545 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17546 0x20, /* 32 */ 17547 0, 17548 #endif 17549 }, 17550 { 17551 BCMI_TSCE16_XGXS_MISC_STS0r, 17552 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17553 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17554 BCMI_TSCE16_XGXS_MISC_STS0r_fields, 17555 #else 17556 0, 17557 #endif 17558 #endif 17559 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17560 PHYMOD_SYMBOL_FLAG_REGISTER, 17561 "MISC_STS0r", 17562 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17563 "TX_FED_MISC_STATUS0", 17564 NULL, 17565 #endif 17566 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17567 0x3, /* 3 */ 17568 0, 17569 #endif 17570 }, 17571 { 17572 BCMI_TSCE16_XGXS_UC_CTL0r, 17573 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17574 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17575 BCMI_TSCE16_XGXS_UC_CTL0r_fields, 17576 #else 17577 0, 17578 #endif 17579 #endif 17580 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17581 PHYMOD_SYMBOL_FLAG_REGISTER, 17582 "UC_CTL0r", 17583 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17584 "TX_FED_MICRO_CONTROL0", 17585 NULL, 17586 #endif 17587 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17588 0xc160, /* 49504 */ 17589 0, 17590 #endif 17591 }, 17592 { 17593 BCMI_TSCE16_XGXS_POST2_AFE_CTL0r, 17594 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17595 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17596 BCMI_TSCE16_XGXS_POST2_AFE_CTL0r_fields, 17597 #else 17598 0, 17599 #endif 17600 #endif 17601 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17602 PHYMOD_SYMBOL_FLAG_REGISTER, 17603 "POST2_AFE_CTL0r", 17604 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17605 "TX_FED_POST2_AFE_CONTROL0", 17606 NULL, 17607 #endif 17608 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17609 0xa0, /* 160 */ 17610 0, 17611 #endif 17612 }, 17613 { 17614 BCMI_TSCE16_XGXS_POST1_AFE_CTL0r, 17615 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17616 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17617 BCMI_TSCE16_XGXS_POST1_AFE_CTL0r_fields, 17618 #else 17619 0, 17620 #endif 17621 #endif 17622 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17623 PHYMOD_SYMBOL_FLAG_REGISTER, 17624 "POST1_AFE_CTL0r", 17625 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17626 "TX_FED_POST1_AFE_CONTROL0", 17627 NULL, 17628 #endif 17629 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17630 0x2a0, /* 672 */ 17631 0, 17632 #endif 17633 }, 17634 { 17635 BCMI_TSCE16_XGXS_POST1PRE_AFE_CTL0r, 17636 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17637 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17638 BCMI_TSCE16_XGXS_POST1PRE_AFE_CTL0r_fields, 17639 #else 17640 0, 17641 #endif 17642 #endif 17643 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17644 PHYMOD_SYMBOL_FLAG_REGISTER, 17645 "POST1PRE_AFE_CTL0r", 17646 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17647 "TX_FED_POST1PRE_AFE_CONTROL0", 17648 NULL, 17649 #endif 17650 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17651 0x4000, /* 16384 */ 17652 0, 17653 #endif 17654 }, 17655 { 17656 BCMI_TSCE16_XGXS_DC_LEVEL_AFE_CTL0r, 17657 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17658 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17659 BCMI_TSCE16_XGXS_DC_LEVEL_AFE_CTL0r_fields, 17660 #else 17661 0, 17662 #endif 17663 #endif 17664 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17665 PHYMOD_SYMBOL_FLAG_REGISTER, 17666 "DC_LEVEL_AFE_CTL0r", 17667 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17668 "TX_FED_DC_LEVEL_AFE_CONTROL0", 17669 NULL, 17670 #endif 17671 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17672 0xf, /* 15 */ 17673 0, 17674 #endif 17675 }, 17676 { 17677 BCMI_TSCE16_XGXS_PLL_CALCTL0r, 17678 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17679 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17680 BCMI_TSCE16_XGXS_PLL_CALCTL0r_fields, 17681 #else 17682 0, 17683 #endif 17684 #endif 17685 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17686 PHYMOD_SYMBOL_FLAG_REGISTER, 17687 "PLL_CALCTL0r", 17688 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17689 "PLL_CAL_PLL_CALCTL_0", 17690 NULL, 17691 #endif 17692 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17693 0x1ffa, /* 8186 */ 17694 0, 17695 #endif 17696 }, 17697 { 17698 BCMI_TSCE16_XGXS_PLL_CALCTL1r, 17699 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17700 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17701 BCMI_TSCE16_XGXS_PLL_CALCTL1r_fields, 17702 #else 17703 0, 17704 #endif 17705 #endif 17706 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17707 PHYMOD_SYMBOL_FLAG_REGISTER, 17708 "PLL_CALCTL1r", 17709 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17710 "PLL_CAL_PLL_CALCTL_1", 17711 NULL, 17712 #endif 17713 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17714 0xfff0, /* 65520 */ 17715 0, 17716 #endif 17717 }, 17718 { 17719 BCMI_TSCE16_XGXS_PLL_CALCTL2r, 17720 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17721 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17722 BCMI_TSCE16_XGXS_PLL_CALCTL2r_fields, 17723 #else 17724 0, 17725 #endif 17726 #endif 17727 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17728 PHYMOD_SYMBOL_FLAG_REGISTER, 17729 "PLL_CALCTL2r", 17730 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17731 "PLL_CAL_PLL_CALCTL_2", 17732 NULL, 17733 #endif 17734 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17735 0xfff, /* 4095 */ 17736 0, 17737 #endif 17738 }, 17739 { 17740 BCMI_TSCE16_XGXS_PLL_CALCTL3r, 17741 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17742 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17743 BCMI_TSCE16_XGXS_PLL_CALCTL3r_fields, 17744 #else 17745 0, 17746 #endif 17747 #endif 17748 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17749 PHYMOD_SYMBOL_FLAG_REGISTER, 17750 "PLL_CALCTL3r", 17751 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17752 "PLL_CAL_PLL_CALCTL_3", 17753 NULL, 17754 #endif 17755 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17756 0x1007, /* 4103 */ 17757 0, 17758 #endif 17759 }, 17760 { 17761 BCMI_TSCE16_XGXS_PLL_CALCTL4r, 17762 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17763 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17764 BCMI_TSCE16_XGXS_PLL_CALCTL4r_fields, 17765 #else 17766 0, 17767 #endif 17768 #endif 17769 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17770 PHYMOD_SYMBOL_FLAG_REGISTER, 17771 "PLL_CALCTL4r", 17772 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17773 "PLL_CAL_PLL_CALCTL_4", 17774 NULL, 17775 #endif 17776 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17777 0x8240, /* 33344 */ 17778 0, 17779 #endif 17780 }, 17781 { 17782 BCMI_TSCE16_XGXS_PLL_CALCTL5r, 17783 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17784 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17785 BCMI_TSCE16_XGXS_PLL_CALCTL5r_fields, 17786 #else 17787 0, 17788 #endif 17789 #endif 17790 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17791 PHYMOD_SYMBOL_FLAG_REGISTER, 17792 "PLL_CALCTL5r", 17793 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17794 "PLL_CAL_PLL_CALCTL_5", 17795 NULL, 17796 #endif 17797 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17798 0x8160, /* 33120 */ 17799 0, 17800 #endif 17801 }, 17802 { 17803 BCMI_TSCE16_XGXS_PLL_CALCTL6r, 17804 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17805 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17806 BCMI_TSCE16_XGXS_PLL_CALCTL6r_fields, 17807 #else 17808 0, 17809 #endif 17810 #endif 17811 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17812 PHYMOD_SYMBOL_FLAG_REGISTER, 17813 "PLL_CALCTL6r", 17814 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17815 "PLL_CAL_PLL_CALCTL_6", 17816 NULL, 17817 #endif 17818 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17819 0x0, /* 0 */ 17820 0, 17821 #endif 17822 }, 17823 { 17824 BCMI_TSCE16_XGXS_PLL_CALSTS0r, 17825 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17826 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17827 BCMI_TSCE16_XGXS_PLL_CALSTS0r_fields, 17828 #else 17829 0, 17830 #endif 17831 #endif 17832 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17833 PHYMOD_SYMBOL_FLAG_REGISTER, 17834 "PLL_CALSTS0r", 17835 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17836 "PLL_CAL_PLL_CALSTS_0", 17837 NULL, 17838 #endif 17839 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17840 0x13f, /* 319 */ 17841 0, 17842 #endif 17843 }, 17844 { 17845 BCMI_TSCE16_XGXS_PLL_CALSTS1r, 17846 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17847 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17848 BCMI_TSCE16_XGXS_PLL_CALSTS1r_fields, 17849 #else 17850 0, 17851 #endif 17852 #endif 17853 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17854 PHYMOD_SYMBOL_FLAG_REGISTER, 17855 "PLL_CALSTS1r", 17856 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17857 "PLL_CAL_PLL_CALSTS_1", 17858 NULL, 17859 #endif 17860 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17861 0x0, /* 0 */ 17862 0, 17863 #endif 17864 }, 17865 { 17866 BCMI_TSCE16_XGXS_PLL_CALSTS2r, 17867 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17868 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17869 BCMI_TSCE16_XGXS_PLL_CALSTS2r_fields, 17870 #else 17871 0, 17872 #endif 17873 #endif 17874 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17875 PHYMOD_SYMBOL_FLAG_REGISTER, 17876 "PLL_CALSTS2r", 17877 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17878 "PLL_CAL_PLL_CALSTS_2", 17879 NULL, 17880 #endif 17881 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17882 0x6000, /* 24576 */ 17883 0, 17884 #endif 17885 }, 17886 { 17887 BCMI_TSCE16_XGXS_PLL_CALSTS3r, 17888 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17889 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17890 BCMI_TSCE16_XGXS_PLL_CALSTS3r_fields, 17891 #else 17892 0, 17893 #endif 17894 #endif 17895 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17896 PHYMOD_SYMBOL_FLAG_REGISTER, 17897 "PLL_CALSTS3r", 17898 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17899 "PLL_CAL_PLL_CALSTS_3", 17900 NULL, 17901 #endif 17902 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17903 0x0, /* 0 */ 17904 0, 17905 #endif 17906 }, 17907 { 17908 BCMI_TSCE16_XGXS_PLL_CALSTS4r, 17909 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17910 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17911 BCMI_TSCE16_XGXS_PLL_CALSTS4r_fields, 17912 #else 17913 0, 17914 #endif 17915 #endif 17916 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17917 PHYMOD_SYMBOL_FLAG_REGISTER, 17918 "PLL_CALSTS4r", 17919 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17920 "PLL_CAL_PLL_CALSTS_4", 17921 NULL, 17922 #endif 17923 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17924 0x0, /* 0 */ 17925 0, 17926 #endif 17927 }, 17928 { 17929 BCMI_TSCE16_XGXS_PLL_CALSTS5r, 17930 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17931 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17932 BCMI_TSCE16_XGXS_PLL_CALSTS5r_fields, 17933 #else 17934 0, 17935 #endif 17936 #endif 17937 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17938 PHYMOD_SYMBOL_FLAG_REGISTER, 17939 "PLL_CALSTS5r", 17940 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17941 "PLL_CAL_PLL_CALSTS_5", 17942 NULL, 17943 #endif 17944 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17945 0x0, /* 0 */ 17946 0, 17947 #endif 17948 }, 17949 { 17950 BCMI_TSCE16_XGXS_PLL_CALSTS6r, 17951 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17952 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17953 BCMI_TSCE16_XGXS_PLL_CALSTS6r_fields, 17954 #else 17955 0, 17956 #endif 17957 #endif 17958 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17959 PHYMOD_SYMBOL_FLAG_REGISTER, 17960 "PLL_CALSTS6r", 17961 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17962 "PLL_CAL_PLL_CALSTS_6", 17963 NULL, 17964 #endif 17965 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17966 0x3f00, /* 16128 */ 17967 0, 17968 #endif 17969 }, 17970 { 17971 BCMI_TSCE16_XGXS_TXCOM_CTL0r, 17972 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17973 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17974 BCMI_TSCE16_XGXS_TXCOM_CTL0r_fields, 17975 #else 17976 0, 17977 #endif 17978 #endif 17979 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17980 PHYMOD_SYMBOL_FLAG_REGISTER, 17981 "TXCOM_CTL0r", 17982 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17983 "TXCOM_TXCOM_CONTROL0_REGISTER", 17984 NULL, 17985 #endif 17986 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17987 0x1f4, /* 500 */ 17988 0, 17989 #endif 17990 }, 17991 { 17992 BCMI_TSCE16_XGXS_TXCOM_CTL1r, 17993 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17994 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 17995 BCMI_TSCE16_XGXS_TXCOM_CTL1r_fields, 17996 #else 17997 0, 17998 #endif 17999 #endif 18000 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18001 PHYMOD_SYMBOL_FLAG_REGISTER, 18002 "TXCOM_CTL1r", 18003 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18004 "TXCOM_TXCOM_CONTROL1_REGISTER", 18005 NULL, 18006 #endif 18007 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18008 0xc8, /* 200 */ 18009 0, 18010 #endif 18011 }, 18012 { 18013 BCMI_TSCE16_XGXS_DSC_F_DATA_ODD_OFFSr, 18014 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18015 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18016 BCMI_TSCE16_XGXS_DSC_F_DATA_ODD_OFFSr_fields, 18017 #else 18018 0, 18019 #endif 18020 #endif 18021 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18022 PHYMOD_SYMBOL_FLAG_REGISTER, 18023 "DSC_F_DATA_ODD_OFFSr", 18024 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18025 "DSC_F_DSC_F_DATA_ODD_OFFSET", 18026 NULL, 18027 #endif 18028 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18029 0x0, /* 0 */ 18030 0, 18031 #endif 18032 }, 18033 { 18034 BCMI_TSCE16_XGXS_DSC_F_DATA_EVEN_OFFSr, 18035 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18036 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18037 BCMI_TSCE16_XGXS_DSC_F_DATA_EVEN_OFFSr_fields, 18038 #else 18039 0, 18040 #endif 18041 #endif 18042 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18043 PHYMOD_SYMBOL_FLAG_REGISTER, 18044 "DSC_F_DATA_EVEN_OFFSr", 18045 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18046 "DSC_F_DSC_F_DATA_EVEN_OFFSET", 18047 NULL, 18048 #endif 18049 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18050 0x0, /* 0 */ 18051 0, 18052 #endif 18053 }, 18054 { 18055 BCMI_TSCE16_XGXS_DSC_F_P1_ODD_OFFSr, 18056 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18057 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18058 BCMI_TSCE16_XGXS_DSC_F_P1_ODD_OFFSr_fields, 18059 #else 18060 0, 18061 #endif 18062 #endif 18063 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18064 PHYMOD_SYMBOL_FLAG_REGISTER, 18065 "DSC_F_P1_ODD_OFFSr", 18066 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18067 "DSC_F_DSC_F_P1_ODD_OFFSET", 18068 NULL, 18069 #endif 18070 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18071 0x0, /* 0 */ 18072 0, 18073 #endif 18074 }, 18075 { 18076 BCMI_TSCE16_XGXS_DSC_F_P1_EVEN_OFFSr, 18077 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18078 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18079 BCMI_TSCE16_XGXS_DSC_F_P1_EVEN_OFFSr_fields, 18080 #else 18081 0, 18082 #endif 18083 #endif 18084 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18085 PHYMOD_SYMBOL_FLAG_REGISTER, 18086 "DSC_F_P1_EVEN_OFFSr", 18087 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18088 "DSC_F_DSC_F_P1_EVEN_OFFSET", 18089 NULL, 18090 #endif 18091 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18092 0x0, /* 0 */ 18093 0, 18094 #endif 18095 }, 18096 { 18097 BCMI_TSCE16_XGXS_DSC_F_M1_ODD_OFFSr, 18098 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18099 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18100 BCMI_TSCE16_XGXS_DSC_F_M1_ODD_OFFSr_fields, 18101 #else 18102 0, 18103 #endif 18104 #endif 18105 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18106 PHYMOD_SYMBOL_FLAG_REGISTER, 18107 "DSC_F_M1_ODD_OFFSr", 18108 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18109 "DSC_F_DSC_F_M1_ODD_OFFSET", 18110 NULL, 18111 #endif 18112 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18113 0x0, /* 0 */ 18114 0, 18115 #endif 18116 }, 18117 { 18118 BCMI_TSCE16_XGXS_DSC_F_M1_EVEN_OFFSr, 18119 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18120 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18121 BCMI_TSCE16_XGXS_DSC_F_M1_EVEN_OFFSr_fields, 18122 #else 18123 0, 18124 #endif 18125 #endif 18126 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18127 PHYMOD_SYMBOL_FLAG_REGISTER, 18128 "DSC_F_M1_EVEN_OFFSr", 18129 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18130 "DSC_F_DSC_F_M1_EVEN_OFFSET", 18131 NULL, 18132 #endif 18133 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18134 0x0, /* 0 */ 18135 0, 18136 #endif 18137 }, 18138 { 18139 BCMI_TSCE16_XGXS_DSC_F_DC_OFFSr, 18140 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18141 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18142 BCMI_TSCE16_XGXS_DSC_F_DC_OFFSr_fields, 18143 #else 18144 0, 18145 #endif 18146 #endif 18147 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18148 PHYMOD_SYMBOL_FLAG_REGISTER, 18149 "DSC_F_DC_OFFSr", 18150 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18151 "DSC_F_DSC_F_DC_OFFSET", 18152 NULL, 18153 #endif 18154 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18155 0x0, /* 0 */ 18156 0, 18157 #endif 18158 }, 18159 { 18160 BCMI_TSCE16_XGXS_LN_ADDR0r, 18161 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18162 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18163 BCMI_TSCE16_XGXS_LN_ADDR0r_fields, 18164 #else 18165 0, 18166 #endif 18167 #endif 18168 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18169 PHYMOD_SYMBOL_FLAG_REGISTER, 18170 "LN_ADDR0r", 18171 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18172 "DIGCOM_B_LANE_ADDR_0", 18173 NULL, 18174 #endif 18175 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18176 0x0, /* 0 */ 18177 0, 18178 #endif 18179 }, 18180 { 18181 BCMI_TSCE16_XGXS_LN_ADDR1r, 18182 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18183 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18184 BCMI_TSCE16_XGXS_LN_ADDR1r_fields, 18185 #else 18186 0, 18187 #endif 18188 #endif 18189 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18190 PHYMOD_SYMBOL_FLAG_REGISTER, 18191 "LN_ADDR1r", 18192 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18193 "DIGCOM_B_LANE_ADDR_1", 18194 NULL, 18195 #endif 18196 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18197 0x101, /* 257 */ 18198 0, 18199 #endif 18200 }, 18201 { 18202 BCMI_TSCE16_XGXS_LN_ADDR2r, 18203 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18204 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18205 BCMI_TSCE16_XGXS_LN_ADDR2r_fields, 18206 #else 18207 0, 18208 #endif 18209 #endif 18210 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18211 PHYMOD_SYMBOL_FLAG_REGISTER, 18212 "LN_ADDR2r", 18213 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18214 "DIGCOM_B_LANE_ADDR_2", 18215 NULL, 18216 #endif 18217 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18218 0x202, /* 514 */ 18219 0, 18220 #endif 18221 }, 18222 { 18223 BCMI_TSCE16_XGXS_LN_ADDR3r, 18224 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18225 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18226 BCMI_TSCE16_XGXS_LN_ADDR3r_fields, 18227 #else 18228 0, 18229 #endif 18230 #endif 18231 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18232 PHYMOD_SYMBOL_FLAG_REGISTER, 18233 "LN_ADDR3r", 18234 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18235 "DIGCOM_B_LANE_ADDR_3", 18236 NULL, 18237 #endif 18238 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18239 0x303, /* 771 */ 18240 0, 18241 #endif 18242 }, 18243 { 18244 BCMI_TSCE16_XGXS_RX_LN_CLK_RST_N_PWRDWN_CTLr, 18245 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18246 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18247 BCMI_TSCE16_XGXS_RX_LN_CLK_RST_N_PWRDWN_CTLr_fields, 18248 #else 18249 0, 18250 #endif 18251 #endif 18252 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18253 PHYMOD_SYMBOL_FLAG_REGISTER, 18254 "RX_LN_CLK_RST_N_PWRDWN_CTLr", 18255 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18256 "RX_CKRST_CTRL_LANE_CLK_RESET_N_POWERDOWN_CONTROL", 18257 NULL, 18258 #endif 18259 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18260 0x0, /* 0 */ 18261 0, 18262 #endif 18263 }, 18264 { 18265 BCMI_TSCE16_XGXS_RX_LN_AFE_RST_PWRDWN_CTL_CTLr, 18266 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18267 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18268 BCMI_TSCE16_XGXS_RX_LN_AFE_RST_PWRDWN_CTL_CTLr_fields, 18269 #else 18270 0, 18271 #endif 18272 #endif 18273 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18274 PHYMOD_SYMBOL_FLAG_REGISTER, 18275 "RX_LN_AFE_RST_PWRDWN_CTL_CTLr", 18276 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18277 "RX_CKRST_CTRL_LANE_AFE_RESET_PWRDWN_CONTROL_CONTROL", 18278 NULL, 18279 #endif 18280 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18281 0x0, /* 0 */ 18282 0, 18283 #endif 18284 }, 18285 { 18286 BCMI_TSCE16_XGXS_RX_LN_RST_N_PWRDN_PIN_KILL_CTLr, 18287 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18288 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18289 BCMI_TSCE16_XGXS_RX_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields, 18290 #else 18291 0, 18292 #endif 18293 #endif 18294 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18295 PHYMOD_SYMBOL_FLAG_REGISTER, 18296 "RX_LN_RST_N_PWRDN_PIN_KILL_CTLr", 18297 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18298 "RX_CKRST_CTRL_LANE_RESET_N_PWRDN_PIN_KILL_CONTROL", 18299 NULL, 18300 #endif 18301 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18302 0x0, /* 0 */ 18303 0, 18304 #endif 18305 }, 18306 { 18307 BCMI_TSCE16_XGXS_RX_LN_DBG_RST_CTLr, 18308 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18309 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18310 BCMI_TSCE16_XGXS_RX_LN_DBG_RST_CTLr_fields, 18311 #else 18312 0, 18313 #endif 18314 #endif 18315 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18316 PHYMOD_SYMBOL_FLAG_REGISTER, 18317 "RX_LN_DBG_RST_CTLr", 18318 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18319 "RX_CKRST_CTRL_LANE_DEBUG_RESET_CONTROL", 18320 NULL, 18321 #endif 18322 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18323 0x3, /* 3 */ 18324 0, 18325 #endif 18326 }, 18327 { 18328 BCMI_TSCE16_XGXS_RX_CLK_N_RST_DBG_CTLr, 18329 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18330 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18331 BCMI_TSCE16_XGXS_RX_CLK_N_RST_DBG_CTLr_fields, 18332 #else 18333 0, 18334 #endif 18335 #endif 18336 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18337 PHYMOD_SYMBOL_FLAG_REGISTER, 18338 "RX_CLK_N_RST_DBG_CTLr", 18339 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18340 "RX_CKRST_CTRL_CLOCK_N_RESET_DEBUG_CONTROL", 18341 NULL, 18342 #endif 18343 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18344 0x0, /* 0 */ 18345 0, 18346 #endif 18347 }, 18348 { 18349 BCMI_TSCE16_XGXS_RX_PMD_LN_MODE_STSr, 18350 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18351 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18352 BCMI_TSCE16_XGXS_RX_PMD_LN_MODE_STSr_fields, 18353 #else 18354 0, 18355 #endif 18356 #endif 18357 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18358 PHYMOD_SYMBOL_FLAG_REGISTER, 18359 "RX_PMD_LN_MODE_STSr", 18360 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18361 "RX_CKRST_CTRL_PMD_LANE_MODE_STATUS", 18362 NULL, 18363 #endif 18364 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18365 0x0, /* 0 */ 18366 0, 18367 #endif 18368 }, 18369 { 18370 BCMI_TSCE16_XGXS_RX_AFE_RST_PWRDN_OSR_MODE_PIN_STSr, 18371 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18372 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18373 BCMI_TSCE16_XGXS_RX_AFE_RST_PWRDN_OSR_MODE_PIN_STSr_fields, 18374 #else 18375 0, 18376 #endif 18377 #endif 18378 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18379 PHYMOD_SYMBOL_FLAG_REGISTER, 18380 "RX_AFE_RST_PWRDN_OSR_MODE_PIN_STSr", 18381 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18382 "RX_CKRST_CTRL_AFE_RESET_PWRDN_OSR_MODE_PIN_STATUS", 18383 NULL, 18384 #endif 18385 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18386 0x2, /* 2 */ 18387 0, 18388 #endif 18389 }, 18390 { 18391 BCMI_TSCE16_XGXS_TX_LN_CLK_RST_N_PWRDWN_CTLr, 18392 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18393 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18394 BCMI_TSCE16_XGXS_TX_LN_CLK_RST_N_PWRDWN_CTLr_fields, 18395 #else 18396 0, 18397 #endif 18398 #endif 18399 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18400 PHYMOD_SYMBOL_FLAG_REGISTER, 18401 "TX_LN_CLK_RST_N_PWRDWN_CTLr", 18402 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18403 "TX_CKRST_CTRL_LANE_CLK_RESET_N_POWERDOWN_CONTROL", 18404 NULL, 18405 #endif 18406 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18407 0x0, /* 0 */ 18408 0, 18409 #endif 18410 }, 18411 { 18412 BCMI_TSCE16_XGXS_TX_LN_AFE_RST_PWRDWN_CTL_CTLr, 18413 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18414 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18415 BCMI_TSCE16_XGXS_TX_LN_AFE_RST_PWRDWN_CTL_CTLr_fields, 18416 #else 18417 0, 18418 #endif 18419 #endif 18420 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18421 PHYMOD_SYMBOL_FLAG_REGISTER, 18422 "TX_LN_AFE_RST_PWRDWN_CTL_CTLr", 18423 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18424 "TX_CKRST_CTRL_LANE_AFE_RESET_PWRDWN_CONTROL_CONTROL", 18425 NULL, 18426 #endif 18427 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18428 0x0, /* 0 */ 18429 0, 18430 #endif 18431 }, 18432 { 18433 BCMI_TSCE16_XGXS_TX_LN_RST_N_PWRDN_PIN_KILL_CTLr, 18434 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18435 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18436 BCMI_TSCE16_XGXS_TX_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields, 18437 #else 18438 0, 18439 #endif 18440 #endif 18441 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18442 PHYMOD_SYMBOL_FLAG_REGISTER, 18443 "TX_LN_RST_N_PWRDN_PIN_KILL_CTLr", 18444 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18445 "TX_CKRST_CTRL_LANE_RESET_N_PWRDN_PIN_KILL_CONTROL", 18446 NULL, 18447 #endif 18448 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18449 0x0, /* 0 */ 18450 0, 18451 #endif 18452 }, 18453 { 18454 BCMI_TSCE16_XGXS_TX_LN_DBG_RST_CTLr, 18455 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18456 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18457 BCMI_TSCE16_XGXS_TX_LN_DBG_RST_CTLr_fields, 18458 #else 18459 0, 18460 #endif 18461 #endif 18462 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18463 PHYMOD_SYMBOL_FLAG_REGISTER, 18464 "TX_LN_DBG_RST_CTLr", 18465 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18466 "TX_CKRST_CTRL_LANE_DEBUG_RESET_CONTROL", 18467 NULL, 18468 #endif 18469 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18470 0x3, /* 3 */ 18471 0, 18472 #endif 18473 }, 18474 { 18475 BCMI_TSCE16_XGXS_TX_CLK_N_RST_DBG_CTLr, 18476 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18477 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18478 BCMI_TSCE16_XGXS_TX_CLK_N_RST_DBG_CTLr_fields, 18479 #else 18480 0, 18481 #endif 18482 #endif 18483 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18484 PHYMOD_SYMBOL_FLAG_REGISTER, 18485 "TX_CLK_N_RST_DBG_CTLr", 18486 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18487 "TX_CKRST_CTRL_CLOCK_N_RESET_DEBUG_CONTROL", 18488 NULL, 18489 #endif 18490 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18491 0x0, /* 0 */ 18492 0, 18493 #endif 18494 }, 18495 { 18496 BCMI_TSCE16_XGXS_TX_AFE_RST_PWRDN_OSR_MODE_PIN_STSr, 18497 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18498 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18499 BCMI_TSCE16_XGXS_TX_AFE_RST_PWRDN_OSR_MODE_PIN_STSr_fields, 18500 #else 18501 0, 18502 #endif 18503 #endif 18504 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18505 PHYMOD_SYMBOL_FLAG_REGISTER, 18506 "TX_AFE_RST_PWRDN_OSR_MODE_PIN_STSr", 18507 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18508 "TX_CKRST_CTRL_AFE_RESET_PWRDN_OSR_MODE_PIN_STATUS", 18509 NULL, 18510 #endif 18511 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18512 0x6, /* 6 */ 18513 0, 18514 #endif 18515 }, 18516 { 18517 BCMI_TSCE16_XGXS_TX_CLK_N_RST_MISC_CTLr, 18518 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18519 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18520 BCMI_TSCE16_XGXS_TX_CLK_N_RST_MISC_CTLr_fields, 18521 #else 18522 0, 18523 #endif 18524 #endif 18525 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18526 PHYMOD_SYMBOL_FLAG_REGISTER, 18527 "TX_CLK_N_RST_MISC_CTLr", 18528 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18529 "TX_CKRST_CTRL_CLOCK_N_RESET_MISC_CONTROL", 18530 NULL, 18531 #endif 18532 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18533 0x1, /* 1 */ 18534 0, 18535 #endif 18536 }, 18537 { 18538 BCMI_TSCE16_XGXS_RXCOM_OSR_MODE_CTLr, 18539 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18540 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18541 BCMI_TSCE16_XGXS_RXCOM_OSR_MODE_CTLr_fields, 18542 #else 18543 0, 18544 #endif 18545 #endif 18546 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18547 PHYMOD_SYMBOL_FLAG_REGISTER, 18548 "RXCOM_OSR_MODE_CTLr", 18549 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18550 "RXCOM_CKRST_CTRL_OSR_MODE_CONTROL", 18551 NULL, 18552 #endif 18553 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18554 0x0, /* 0 */ 18555 0, 18556 #endif 18557 }, 18558 { 18559 BCMI_TSCE16_XGXS_RXCOM_LN_CLK_RST_N_PWRDWN_CTLr, 18560 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18561 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18562 BCMI_TSCE16_XGXS_RXCOM_LN_CLK_RST_N_PWRDWN_CTLr_fields, 18563 #else 18564 0, 18565 #endif 18566 #endif 18567 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18568 PHYMOD_SYMBOL_FLAG_REGISTER, 18569 "RXCOM_LN_CLK_RST_N_PWRDWN_CTLr", 18570 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18571 "RXCOM_CKRST_CTRL_LANE_CLK_RESET_N_POWERDOWN_CONTROL", 18572 NULL, 18573 #endif 18574 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18575 0x0, /* 0 */ 18576 0, 18577 #endif 18578 }, 18579 { 18580 BCMI_TSCE16_XGXS_RXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr, 18581 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18582 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18583 BCMI_TSCE16_XGXS_RXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields, 18584 #else 18585 0, 18586 #endif 18587 #endif 18588 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18589 PHYMOD_SYMBOL_FLAG_REGISTER, 18590 "RXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr", 18591 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18592 "RXCOM_CKRST_CTRL_LANE_RESET_N_PWRDN_PIN_KILL_CONTROL", 18593 NULL, 18594 #endif 18595 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18596 0x0, /* 0 */ 18597 0, 18598 #endif 18599 }, 18600 { 18601 BCMI_TSCE16_XGXS_RXCOM_UC_ACK_LN_CTLr, 18602 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18603 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18604 BCMI_TSCE16_XGXS_RXCOM_UC_ACK_LN_CTLr_fields, 18605 #else 18606 0, 18607 #endif 18608 #endif 18609 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18610 PHYMOD_SYMBOL_FLAG_REGISTER, 18611 "RXCOM_UC_ACK_LN_CTLr", 18612 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18613 "RXCOM_CKRST_CTRL_UC_ACK_LANE_CONTROL", 18614 NULL, 18615 #endif 18616 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18617 0x0, /* 0 */ 18618 0, 18619 #endif 18620 }, 18621 { 18622 BCMI_TSCE16_XGXS_RXCOM_LN_RST_OCC_CTLr, 18623 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18624 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18625 BCMI_TSCE16_XGXS_RXCOM_LN_RST_OCC_CTLr_fields, 18626 #else 18627 0, 18628 #endif 18629 #endif 18630 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18631 PHYMOD_SYMBOL_FLAG_REGISTER, 18632 "RXCOM_LN_RST_OCC_CTLr", 18633 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18634 "RXCOM_CKRST_CTRL_LANE_REG_RESET_OCCURRED_CONTROL", 18635 NULL, 18636 #endif 18637 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18638 0x1, /* 1 */ 18639 0, 18640 #endif 18641 }, 18642 { 18643 BCMI_TSCE16_XGXS_RXCOM_LN_DP_RST_ST_STSr, 18644 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18645 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18646 BCMI_TSCE16_XGXS_RXCOM_LN_DP_RST_ST_STSr_fields, 18647 #else 18648 0, 18649 #endif 18650 #endif 18651 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18652 PHYMOD_SYMBOL_FLAG_REGISTER, 18653 "RXCOM_LN_DP_RST_ST_STSr", 18654 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18655 "RXCOM_CKRST_CTRL_LANE_DP_RESET_STATE_STATUS", 18656 NULL, 18657 #endif 18658 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18659 0x7, /* 7 */ 18660 0, 18661 #endif 18662 }, 18663 { 18664 BCMI_TSCE16_XGXS_RXCOM_MCST_MASK_CTLr, 18665 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18666 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18667 BCMI_TSCE16_XGXS_RXCOM_MCST_MASK_CTLr_fields, 18668 #else 18669 0, 18670 #endif 18671 #endif 18672 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18673 PHYMOD_SYMBOL_FLAG_REGISTER, 18674 "RXCOM_MCST_MASK_CTLr", 18675 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18676 "RXCOM_CKRST_CTRL_MULTICAST_MASK_CONTROL", 18677 NULL, 18678 #endif 18679 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18680 0x0, /* 0 */ 18681 0, 18682 #endif 18683 }, 18684 { 18685 BCMI_TSCE16_XGXS_RXCOM_OSR_MODE_STS_MC_MASKr, 18686 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18687 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18688 BCMI_TSCE16_XGXS_RXCOM_OSR_MODE_STS_MC_MASKr_fields, 18689 #else 18690 0, 18691 #endif 18692 #endif 18693 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18694 PHYMOD_SYMBOL_FLAG_REGISTER, 18695 "RXCOM_OSR_MODE_STS_MC_MASKr", 18696 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18697 "RXCOM_CKRST_CTRL_OSR_MODE_STATUS_MC_MASK", 18698 NULL, 18699 #endif 18700 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18701 0x0, /* 0 */ 18702 0, 18703 #endif 18704 }, 18705 { 18706 BCMI_TSCE16_XGXS_RXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr, 18707 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18708 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18709 BCMI_TSCE16_XGXS_RXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr_fields, 18710 #else 18711 0, 18712 #endif 18713 #endif 18714 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18715 PHYMOD_SYMBOL_FLAG_REGISTER, 18716 "RXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr", 18717 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18718 "RXCOM_CKRST_CTRL_AFE_RESET_PWRDN_OSR_MODE_PIN_STATUS", 18719 NULL, 18720 #endif 18721 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18722 0x0, /* 0 */ 18723 0, 18724 #endif 18725 }, 18726 { 18727 BCMI_TSCE16_XGXS_RXCOM_LN_S_RSTB_CTLr, 18728 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18729 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18730 BCMI_TSCE16_XGXS_RXCOM_LN_S_RSTB_CTLr_fields, 18731 #else 18732 0, 18733 #endif 18734 #endif 18735 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18736 PHYMOD_SYMBOL_FLAG_REGISTER, 18737 "RXCOM_LN_S_RSTB_CTLr", 18738 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18739 "RXCOM_CKRST_CTRL_LN_S_RSTB_CONTROL", 18740 NULL, 18741 #endif 18742 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18743 0x1, /* 1 */ 18744 0, 18745 #endif 18746 }, 18747 { 18748 BCMI_TSCE16_XGXS_TXCOM_OSR_MODE_CTLr, 18749 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18750 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18751 BCMI_TSCE16_XGXS_TXCOM_OSR_MODE_CTLr_fields, 18752 #else 18753 0, 18754 #endif 18755 #endif 18756 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18757 PHYMOD_SYMBOL_FLAG_REGISTER, 18758 "TXCOM_OSR_MODE_CTLr", 18759 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18760 "TXCOM_CKRST_CTRL_OSR_MODE_CONTROL", 18761 NULL, 18762 #endif 18763 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18764 0x0, /* 0 */ 18765 0, 18766 #endif 18767 }, 18768 { 18769 BCMI_TSCE16_XGXS_TXCOM_LN_CLK_RST_N_PWRDWN_CTLr, 18770 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18771 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18772 BCMI_TSCE16_XGXS_TXCOM_LN_CLK_RST_N_PWRDWN_CTLr_fields, 18773 #else 18774 0, 18775 #endif 18776 #endif 18777 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18778 PHYMOD_SYMBOL_FLAG_REGISTER, 18779 "TXCOM_LN_CLK_RST_N_PWRDWN_CTLr", 18780 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18781 "TXCOM_CKRST_CTRL_LANE_CLK_RESET_N_POWERDOWN_CONTROL", 18782 NULL, 18783 #endif 18784 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18785 0x0, /* 0 */ 18786 0, 18787 #endif 18788 }, 18789 { 18790 BCMI_TSCE16_XGXS_TXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr, 18791 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18792 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18793 BCMI_TSCE16_XGXS_TXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields, 18794 #else 18795 0, 18796 #endif 18797 #endif 18798 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18799 PHYMOD_SYMBOL_FLAG_REGISTER, 18800 "TXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr", 18801 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18802 "TXCOM_CKRST_CTRL_LANE_RESET_N_PWRDN_PIN_KILL_CONTROL", 18803 NULL, 18804 #endif 18805 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18806 0x0, /* 0 */ 18807 0, 18808 #endif 18809 }, 18810 { 18811 BCMI_TSCE16_XGXS_TXCOM_UC_ACK_LN_CTLr, 18812 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18813 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18814 BCMI_TSCE16_XGXS_TXCOM_UC_ACK_LN_CTLr_fields, 18815 #else 18816 0, 18817 #endif 18818 #endif 18819 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18820 PHYMOD_SYMBOL_FLAG_REGISTER, 18821 "TXCOM_UC_ACK_LN_CTLr", 18822 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18823 "TXCOM_CKRST_CTRL_UC_ACK_LANE_CONTROL", 18824 NULL, 18825 #endif 18826 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18827 0x0, /* 0 */ 18828 0, 18829 #endif 18830 }, 18831 { 18832 BCMI_TSCE16_XGXS_TXCOM_LN_RST_OCC_CTLr, 18833 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18834 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18835 BCMI_TSCE16_XGXS_TXCOM_LN_RST_OCC_CTLr_fields, 18836 #else 18837 0, 18838 #endif 18839 #endif 18840 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18841 PHYMOD_SYMBOL_FLAG_REGISTER, 18842 "TXCOM_LN_RST_OCC_CTLr", 18843 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18844 "TXCOM_CKRST_CTRL_LANE_REG_RESET_OCCURRED_CONTROL", 18845 NULL, 18846 #endif 18847 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18848 0x1, /* 1 */ 18849 0, 18850 #endif 18851 }, 18852 { 18853 BCMI_TSCE16_XGXS_TXCOM_LN_DP_RST_ST_STSr, 18854 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18855 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18856 BCMI_TSCE16_XGXS_TXCOM_LN_DP_RST_ST_STSr_fields, 18857 #else 18858 0, 18859 #endif 18860 #endif 18861 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18862 PHYMOD_SYMBOL_FLAG_REGISTER, 18863 "TXCOM_LN_DP_RST_ST_STSr", 18864 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18865 "TXCOM_CKRST_CTRL_LANE_DP_RESET_STATE_STATUS", 18866 NULL, 18867 #endif 18868 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18869 0x7, /* 7 */ 18870 0, 18871 #endif 18872 }, 18873 { 18874 BCMI_TSCE16_XGXS_TXCOM_MCST_MASK_CTLr, 18875 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18876 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18877 BCMI_TSCE16_XGXS_TXCOM_MCST_MASK_CTLr_fields, 18878 #else 18879 0, 18880 #endif 18881 #endif 18882 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18883 PHYMOD_SYMBOL_FLAG_REGISTER, 18884 "TXCOM_MCST_MASK_CTLr", 18885 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18886 "TXCOM_CKRST_CTRL_MULTICAST_MASK_CONTROL", 18887 NULL, 18888 #endif 18889 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18890 0x0, /* 0 */ 18891 0, 18892 #endif 18893 }, 18894 { 18895 BCMI_TSCE16_XGXS_TXCOM_OSR_MODE_STS_MC_MASKr, 18896 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18897 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18898 BCMI_TSCE16_XGXS_TXCOM_OSR_MODE_STS_MC_MASKr_fields, 18899 #else 18900 0, 18901 #endif 18902 #endif 18903 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18904 PHYMOD_SYMBOL_FLAG_REGISTER, 18905 "TXCOM_OSR_MODE_STS_MC_MASKr", 18906 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18907 "TXCOM_CKRST_CTRL_OSR_MODE_STATUS_MC_MASK", 18908 NULL, 18909 #endif 18910 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18911 0x0, /* 0 */ 18912 0, 18913 #endif 18914 }, 18915 { 18916 BCMI_TSCE16_XGXS_TXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr, 18917 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18918 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18919 BCMI_TSCE16_XGXS_TXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr_fields, 18920 #else 18921 0, 18922 #endif 18923 #endif 18924 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18925 PHYMOD_SYMBOL_FLAG_REGISTER, 18926 "TXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr", 18927 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18928 "TXCOM_CKRST_CTRL_AFE_RESET_PWRDN_OSR_MODE_PIN_STATUS", 18929 NULL, 18930 #endif 18931 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18932 0x0, /* 0 */ 18933 0, 18934 #endif 18935 }, 18936 { 18937 BCMI_TSCE16_XGXS_TXCOM_LN_S_RSTB_CTLr, 18938 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18939 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18940 BCMI_TSCE16_XGXS_TXCOM_LN_S_RSTB_CTLr_fields, 18941 #else 18942 0, 18943 #endif 18944 #endif 18945 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18946 PHYMOD_SYMBOL_FLAG_REGISTER, 18947 "TXCOM_LN_S_RSTB_CTLr", 18948 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18949 "TXCOM_CKRST_CTRL_LN_S_RSTB_CONTROL", 18950 NULL, 18951 #endif 18952 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18953 0x1, /* 1 */ 18954 0, 18955 #endif 18956 }, 18957 { 18958 BCMI_TSCE16_XGXS_UC_CLK_CTL0r, 18959 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18960 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18961 BCMI_TSCE16_XGXS_UC_CLK_CTL0r_fields, 18962 #else 18963 0, 18964 #endif 18965 #endif 18966 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18967 PHYMOD_SYMBOL_FLAG_REGISTER, 18968 "UC_CLK_CTL0r", 18969 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18970 "MICRO_A_CLOCK_CONTROL0", 18971 NULL, 18972 #endif 18973 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18974 0x0, /* 0 */ 18975 0, 18976 #endif 18977 }, 18978 { 18979 BCMI_TSCE16_XGXS_UC_RST_CTL0r, 18980 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18981 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 18982 BCMI_TSCE16_XGXS_UC_RST_CTL0r_fields, 18983 #else 18984 0, 18985 #endif 18986 #endif 18987 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18988 PHYMOD_SYMBOL_FLAG_REGISTER, 18989 "UC_RST_CTL0r", 18990 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18991 "MICRO_A_RESET_CONTROL0", 18992 NULL, 18993 #endif 18994 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18995 0x0, /* 0 */ 18996 0, 18997 #endif 18998 }, 18999 { 19000 BCMI_TSCE16_XGXS_UC_AHB_CTL0r, 19001 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19002 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19003 BCMI_TSCE16_XGXS_UC_AHB_CTL0r_fields, 19004 #else 19005 0, 19006 #endif 19007 #endif 19008 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19009 PHYMOD_SYMBOL_FLAG_REGISTER, 19010 "UC_AHB_CTL0r", 19011 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19012 "MICRO_A_AHB_CONTROL0", 19013 NULL, 19014 #endif 19015 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19016 0x0, /* 0 */ 19017 0, 19018 #endif 19019 }, 19020 { 19021 BCMI_TSCE16_XGXS_UC_AHB_STS0r, 19022 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19023 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19024 BCMI_TSCE16_XGXS_UC_AHB_STS0r_fields, 19025 #else 19026 0, 19027 #endif 19028 #endif 19029 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19030 PHYMOD_SYMBOL_FLAG_REGISTER, 19031 "UC_AHB_STS0r", 19032 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19033 "MICRO_A_AHB_STATUS0", 19034 NULL, 19035 #endif 19036 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19037 0x0, /* 0 */ 19038 0, 19039 #endif 19040 }, 19041 { 19042 BCMI_TSCE16_XGXS_UC_AHB_WRADDR_LSWr, 19043 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19044 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19045 BCMI_TSCE16_XGXS_UC_AHB_WRADDR_LSWr_fields, 19046 #else 19047 0, 19048 #endif 19049 #endif 19050 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19051 PHYMOD_SYMBOL_FLAG_REGISTER, 19052 "UC_AHB_WRADDR_LSWr", 19053 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19054 "MICRO_A_AHB_WRADDR_LSW", 19055 NULL, 19056 #endif 19057 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19058 0x0, /* 0 */ 19059 0, 19060 #endif 19061 }, 19062 { 19063 BCMI_TSCE16_XGXS_UC_AHB_WRADDR_MSWr, 19064 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19065 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19066 BCMI_TSCE16_XGXS_UC_AHB_WRADDR_MSWr_fields, 19067 #else 19068 0, 19069 #endif 19070 #endif 19071 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19072 PHYMOD_SYMBOL_FLAG_REGISTER, 19073 "UC_AHB_WRADDR_MSWr", 19074 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19075 "MICRO_A_AHB_WRADDR_MSW", 19076 NULL, 19077 #endif 19078 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19079 0x0, /* 0 */ 19080 0, 19081 #endif 19082 }, 19083 { 19084 BCMI_TSCE16_XGXS_UC_AHB_WRDATA_LSWr, 19085 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19086 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19087 BCMI_TSCE16_XGXS_UC_AHB_WRDATA_LSWr_fields, 19088 #else 19089 0, 19090 #endif 19091 #endif 19092 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19093 PHYMOD_SYMBOL_FLAG_REGISTER, 19094 "UC_AHB_WRDATA_LSWr", 19095 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19096 "MICRO_A_AHB_WRDATA_LSW", 19097 NULL, 19098 #endif 19099 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19100 0x0, /* 0 */ 19101 0, 19102 #endif 19103 }, 19104 { 19105 BCMI_TSCE16_XGXS_UC_AHB_WRDATA_MSWr, 19106 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19107 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19108 BCMI_TSCE16_XGXS_UC_AHB_WRDATA_MSWr_fields, 19109 #else 19110 0, 19111 #endif 19112 #endif 19113 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19114 PHYMOD_SYMBOL_FLAG_REGISTER, 19115 "UC_AHB_WRDATA_MSWr", 19116 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19117 "MICRO_A_AHB_WRDATA_MSW", 19118 NULL, 19119 #endif 19120 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19121 0x0, /* 0 */ 19122 0, 19123 #endif 19124 }, 19125 { 19126 BCMI_TSCE16_XGXS_UC_AHB_RDADDR_LSWr, 19127 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19128 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19129 BCMI_TSCE16_XGXS_UC_AHB_RDADDR_LSWr_fields, 19130 #else 19131 0, 19132 #endif 19133 #endif 19134 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19135 PHYMOD_SYMBOL_FLAG_REGISTER, 19136 "UC_AHB_RDADDR_LSWr", 19137 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19138 "MICRO_A_AHB_RDADDR_LSW", 19139 NULL, 19140 #endif 19141 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19142 0x0, /* 0 */ 19143 0, 19144 #endif 19145 }, 19146 { 19147 BCMI_TSCE16_XGXS_UC_AHB_RDADDR_MSWr, 19148 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19149 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19150 BCMI_TSCE16_XGXS_UC_AHB_RDADDR_MSWr_fields, 19151 #else 19152 0, 19153 #endif 19154 #endif 19155 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19156 PHYMOD_SYMBOL_FLAG_REGISTER, 19157 "UC_AHB_RDADDR_MSWr", 19158 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19159 "MICRO_A_AHB_RDADDR_MSW", 19160 NULL, 19161 #endif 19162 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19163 0x0, /* 0 */ 19164 0, 19165 #endif 19166 }, 19167 { 19168 BCMI_TSCE16_XGXS_UC_AHB_RDDATA_LSWr, 19169 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19170 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19171 BCMI_TSCE16_XGXS_UC_AHB_RDDATA_LSWr_fields, 19172 #else 19173 0, 19174 #endif 19175 #endif 19176 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19177 PHYMOD_SYMBOL_FLAG_REGISTER, 19178 "UC_AHB_RDDATA_LSWr", 19179 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19180 "MICRO_A_AHB_RDDATA_LSW", 19181 NULL, 19182 #endif 19183 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19184 0x0, /* 0 */ 19185 0, 19186 #endif 19187 }, 19188 { 19189 BCMI_TSCE16_XGXS_UC_AHB_RDDATA_MSWr, 19190 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19191 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19192 BCMI_TSCE16_XGXS_UC_AHB_RDDATA_MSWr_fields, 19193 #else 19194 0, 19195 #endif 19196 #endif 19197 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19198 PHYMOD_SYMBOL_FLAG_REGISTER, 19199 "UC_AHB_RDDATA_MSWr", 19200 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19201 "MICRO_A_AHB_RDDATA_MSW", 19202 NULL, 19203 #endif 19204 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19205 0x0, /* 0 */ 19206 0, 19207 #endif 19208 }, 19209 { 19210 BCMI_TSCE16_XGXS_UC_PRAMIF_CTL0r, 19211 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19212 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19213 BCMI_TSCE16_XGXS_UC_PRAMIF_CTL0r_fields, 19214 #else 19215 0, 19216 #endif 19217 #endif 19218 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19219 PHYMOD_SYMBOL_FLAG_REGISTER, 19220 "UC_PRAMIF_CTL0r", 19221 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19222 "MICRO_A_PRAMIF_CONTROL0", 19223 NULL, 19224 #endif 19225 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19226 0x0, /* 0 */ 19227 0, 19228 #endif 19229 }, 19230 { 19231 BCMI_TSCE16_XGXS_UC_PRAMIF_AHB_WRADDR_LSWr, 19232 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19233 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19234 BCMI_TSCE16_XGXS_UC_PRAMIF_AHB_WRADDR_LSWr_fields, 19235 #else 19236 0, 19237 #endif 19238 #endif 19239 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19240 PHYMOD_SYMBOL_FLAG_REGISTER, 19241 "UC_PRAMIF_AHB_WRADDR_LSWr", 19242 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19243 "MICRO_A_PRAMIF_AHB_WRADDR_LSW", 19244 NULL, 19245 #endif 19246 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19247 0x0, /* 0 */ 19248 0, 19249 #endif 19250 }, 19251 { 19252 BCMI_TSCE16_XGXS_UC_PRAMIF_AHB_WRADDR_MSWr, 19253 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19254 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19255 BCMI_TSCE16_XGXS_UC_PRAMIF_AHB_WRADDR_MSWr_fields, 19256 #else 19257 0, 19258 #endif 19259 #endif 19260 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19261 PHYMOD_SYMBOL_FLAG_REGISTER, 19262 "UC_PRAMIF_AHB_WRADDR_MSWr", 19263 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19264 "MICRO_A_PRAMIF_AHB_WRADDR_MSW", 19265 NULL, 19266 #endif 19267 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19268 0x0, /* 0 */ 19269 0, 19270 #endif 19271 }, 19272 { 19273 BCMI_TSCE16_XGXS_UC_PVT_STS0r, 19274 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19275 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19276 BCMI_TSCE16_XGXS_UC_PVT_STS0r_fields, 19277 #else 19278 0, 19279 #endif 19280 #endif 19281 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19282 PHYMOD_SYMBOL_FLAG_REGISTER, 19283 "UC_PVT_STS0r", 19284 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19285 "MICRO_B_PVT_STATUS0", 19286 NULL, 19287 #endif 19288 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19289 0x0, /* 0 */ 19290 0, 19291 #endif 19292 }, 19293 { 19294 BCMI_TSCE16_XGXS_UC_RMI_TO_UC_MBOX0r, 19295 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19296 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19297 BCMI_TSCE16_XGXS_UC_RMI_TO_UC_MBOX0r_fields, 19298 #else 19299 0, 19300 #endif 19301 #endif 19302 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19303 PHYMOD_SYMBOL_FLAG_REGISTER, 19304 "UC_RMI_TO_UC_MBOX0r", 19305 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19306 "MICRO_B_RMI_TO_MICRO_MBOX0", 19307 NULL, 19308 #endif 19309 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19310 0x0, /* 0 */ 19311 0, 19312 #endif 19313 }, 19314 { 19315 BCMI_TSCE16_XGXS_UC_RMI_TO_UC_MBOX1r, 19316 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19317 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19318 BCMI_TSCE16_XGXS_UC_RMI_TO_UC_MBOX1r_fields, 19319 #else 19320 0, 19321 #endif 19322 #endif 19323 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19324 PHYMOD_SYMBOL_FLAG_REGISTER, 19325 "UC_RMI_TO_UC_MBOX1r", 19326 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19327 "MICRO_B_RMI_TO_MICRO_MBOX1", 19328 NULL, 19329 #endif 19330 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19331 0x0, /* 0 */ 19332 0, 19333 #endif 19334 }, 19335 { 19336 BCMI_TSCE16_XGXS_UC_UC_TO_RMI_MBOX0r, 19337 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19338 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19339 BCMI_TSCE16_XGXS_UC_UC_TO_RMI_MBOX0r_fields, 19340 #else 19341 0, 19342 #endif 19343 #endif 19344 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19345 PHYMOD_SYMBOL_FLAG_REGISTER, 19346 "UC_UC_TO_RMI_MBOX0r", 19347 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19348 "MICRO_B_MICRO_TO_RMI_MBOX0", 19349 NULL, 19350 #endif 19351 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19352 0x0, /* 0 */ 19353 0, 19354 #endif 19355 }, 19356 { 19357 BCMI_TSCE16_XGXS_UC_UC_TO_RMI_MBOX1r, 19358 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19359 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19360 BCMI_TSCE16_XGXS_UC_UC_TO_RMI_MBOX1r_fields, 19361 #else 19362 0, 19363 #endif 19364 #endif 19365 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19366 PHYMOD_SYMBOL_FLAG_REGISTER, 19367 "UC_UC_TO_RMI_MBOX1r", 19368 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19369 "MICRO_B_MICRO_TO_RMI_MBOX1", 19370 NULL, 19371 #endif 19372 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19373 0x0, /* 0 */ 19374 0, 19375 #endif 19376 }, 19377 { 19378 BCMI_TSCE16_XGXS_UC_RMI_MBOX_CTL0r, 19379 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19380 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19381 BCMI_TSCE16_XGXS_UC_RMI_MBOX_CTL0r_fields, 19382 #else 19383 0, 19384 #endif 19385 #endif 19386 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19387 PHYMOD_SYMBOL_FLAG_REGISTER, 19388 "UC_RMI_MBOX_CTL0r", 19389 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19390 "MICRO_B_RMI_MBOX_CONTROL0", 19391 NULL, 19392 #endif 19393 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19394 0x0, /* 0 */ 19395 0, 19396 #endif 19397 }, 19398 { 19399 BCMI_TSCE16_XGXS_UC_RMI_AHB_CTL1r, 19400 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19401 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19402 BCMI_TSCE16_XGXS_UC_RMI_AHB_CTL1r_fields, 19403 #else 19404 0, 19405 #endif 19406 #endif 19407 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19408 PHYMOD_SYMBOL_FLAG_REGISTER, 19409 "UC_RMI_AHB_CTL1r", 19410 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19411 "MICRO_B_RMI_AHB_CONTROL1", 19412 NULL, 19413 #endif 19414 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19415 0x7, /* 7 */ 19416 0, 19417 #endif 19418 }, 19419 { 19420 BCMI_TSCE16_XGXS_UC_RMI_AHB_STS1r, 19421 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19422 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19423 BCMI_TSCE16_XGXS_UC_RMI_AHB_STS1r_fields, 19424 #else 19425 0, 19426 #endif 19427 #endif 19428 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19429 PHYMOD_SYMBOL_FLAG_REGISTER, 19430 "UC_RMI_AHB_STS1r", 19431 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19432 "MICRO_B_RMI_AHB_STATUS1", 19433 NULL, 19434 #endif 19435 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19436 0x0, /* 0 */ 19437 0, 19438 #endif 19439 }, 19440 { 19441 BCMI_TSCE16_XGXS_UC_RMI_RA_AINC_NXT_WRADDR_LSWr, 19442 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19443 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19444 BCMI_TSCE16_XGXS_UC_RMI_RA_AINC_NXT_WRADDR_LSWr_fields, 19445 #else 19446 0, 19447 #endif 19448 #endif 19449 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19450 PHYMOD_SYMBOL_FLAG_REGISTER, 19451 "UC_RMI_RA_AINC_NXT_WRADDR_LSWr", 19452 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19453 "MICRO_B_RMI_RA_AUTOINC_NXT_WRADDR_LSW", 19454 NULL, 19455 #endif 19456 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19457 0x0, /* 0 */ 19458 0, 19459 #endif 19460 }, 19461 { 19462 BCMI_TSCE16_XGXS_UC_RMI_RA_AINC_NXT_RDADDR_LSWr, 19463 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19464 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19465 BCMI_TSCE16_XGXS_UC_RMI_RA_AINC_NXT_RDADDR_LSWr_fields, 19466 #else 19467 0, 19468 #endif 19469 #endif 19470 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19471 PHYMOD_SYMBOL_FLAG_REGISTER, 19472 "UC_RMI_RA_AINC_NXT_RDADDR_LSWr", 19473 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19474 "MICRO_B_RMI_RA_AUTOINC_NXT_RDADDR_LSW", 19475 NULL, 19476 #endif 19477 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19478 0x0, /* 0 */ 19479 0, 19480 #endif 19481 }, 19482 { 19483 BCMI_TSCE16_XGXS_UC_RMI_PR_AINC_NXT_WRADDR_LSWr, 19484 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19485 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19486 BCMI_TSCE16_XGXS_UC_RMI_PR_AINC_NXT_WRADDR_LSWr_fields, 19487 #else 19488 0, 19489 #endif 19490 #endif 19491 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19492 PHYMOD_SYMBOL_FLAG_REGISTER, 19493 "UC_RMI_PR_AINC_NXT_WRADDR_LSWr", 19494 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19495 "MICRO_B_RMI_PR_AUTOINC_NXT_WRADDR_LSW", 19496 NULL, 19497 #endif 19498 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19499 0x0, /* 0 */ 19500 0, 19501 #endif 19502 }, 19503 { 19504 BCMI_TSCE16_XGXS_UC_RMI_PVT_CTL0r, 19505 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19506 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19507 BCMI_TSCE16_XGXS_UC_RMI_PVT_CTL0r_fields, 19508 #else 19509 0, 19510 #endif 19511 #endif 19512 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19513 PHYMOD_SYMBOL_FLAG_REGISTER, 19514 "UC_RMI_PVT_CTL0r", 19515 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19516 "MICRO_B_RMI_PVT_CONTROL0", 19517 NULL, 19518 #endif 19519 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19520 0x0, /* 0 */ 19521 0, 19522 #endif 19523 }, 19524 { 19525 BCMI_TSCE16_XGXS_UC_CODE_RAM_ECCCTL0r, 19526 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19527 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19528 BCMI_TSCE16_XGXS_UC_CODE_RAM_ECCCTL0r_fields, 19529 #else 19530 0, 19531 #endif 19532 #endif 19533 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19534 PHYMOD_SYMBOL_FLAG_REGISTER, 19535 "UC_CODE_RAM_ECCCTL0r", 19536 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19537 "MICRO_C_CODE_RAM_ECCCONTROL0", 19538 NULL, 19539 #endif 19540 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19541 0x0, /* 0 */ 19542 0, 19543 #endif 19544 }, 19545 { 19546 BCMI_TSCE16_XGXS_UC_CODE_RAM_ECCCONTRO1r, 19547 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19548 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19549 BCMI_TSCE16_XGXS_UC_CODE_RAM_ECCCONTRO1r_fields, 19550 #else 19551 0, 19552 #endif 19553 #endif 19554 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19555 PHYMOD_SYMBOL_FLAG_REGISTER, 19556 "UC_CODE_RAM_ECCCONTRO1r", 19557 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19558 "MICRO_C_CODE_RAM_ECCCONTRO1", 19559 NULL, 19560 #endif 19561 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19562 0x0, /* 0 */ 19563 0, 19564 #endif 19565 }, 19566 { 19567 BCMI_TSCE16_XGXS_UC_CODE_RAM_ECCSTS0r, 19568 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19569 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19570 BCMI_TSCE16_XGXS_UC_CODE_RAM_ECCSTS0r_fields, 19571 #else 19572 0, 19573 #endif 19574 #endif 19575 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19576 PHYMOD_SYMBOL_FLAG_REGISTER, 19577 "UC_CODE_RAM_ECCSTS0r", 19578 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19579 "MICRO_C_CODE_RAM_ECCSTATUS0", 19580 NULL, 19581 #endif 19582 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19583 0x0, /* 0 */ 19584 0, 19585 #endif 19586 }, 19587 { 19588 BCMI_TSCE16_XGXS_UC_CODE_RAM_ECCSTS1r, 19589 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19590 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19591 BCMI_TSCE16_XGXS_UC_CODE_RAM_ECCSTS1r_fields, 19592 #else 19593 0, 19594 #endif 19595 #endif 19596 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19597 PHYMOD_SYMBOL_FLAG_REGISTER, 19598 "UC_CODE_RAM_ECCSTS1r", 19599 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19600 "MICRO_C_CODE_RAM_ECCSTATUS1", 19601 NULL, 19602 #endif 19603 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19604 0x0, /* 0 */ 19605 0, 19606 #endif 19607 }, 19608 { 19609 BCMI_TSCE16_XGXS_UC_CODE_RAM_TESTIFCTL0r, 19610 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19611 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19612 BCMI_TSCE16_XGXS_UC_CODE_RAM_TESTIFCTL0r_fields, 19613 #else 19614 0, 19615 #endif 19616 #endif 19617 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19618 PHYMOD_SYMBOL_FLAG_REGISTER, 19619 "UC_CODE_RAM_TESTIFCTL0r", 19620 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19621 "MICRO_C_CODE_RAM_TESTIFCONTROL0", 19622 NULL, 19623 #endif 19624 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19625 0x0, /* 0 */ 19626 0, 19627 #endif 19628 }, 19629 { 19630 BCMI_TSCE16_XGXS_UC_RAM_CTL0r, 19631 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19632 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19633 BCMI_TSCE16_XGXS_UC_RAM_CTL0r_fields, 19634 #else 19635 0, 19636 #endif 19637 #endif 19638 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19639 PHYMOD_SYMBOL_FLAG_REGISTER, 19640 "UC_RAM_CTL0r", 19641 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19642 "MICRO_C_RAM_CONTROL0", 19643 NULL, 19644 #endif 19645 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19646 0x8401, /* 33793 */ 19647 0, 19648 #endif 19649 }, 19650 { 19651 BCMI_TSCE16_XGXS_UC_RMI_EXT_INTR_CTL0r, 19652 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19653 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19654 BCMI_TSCE16_XGXS_UC_RMI_EXT_INTR_CTL0r_fields, 19655 #else 19656 0, 19657 #endif 19658 #endif 19659 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19660 PHYMOD_SYMBOL_FLAG_REGISTER, 19661 "UC_RMI_EXT_INTR_CTL0r", 19662 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19663 "MICRO_C_RMI_EXT_INTR_CONTROL0", 19664 NULL, 19665 #endif 19666 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19667 0x0, /* 0 */ 19668 0, 19669 #endif 19670 }, 19671 { 19672 BCMI_TSCE16_XGXS_UC_RMI_EXT_INTR_STS0r, 19673 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19674 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19675 BCMI_TSCE16_XGXS_UC_RMI_EXT_INTR_STS0r_fields, 19676 #else 19677 0, 19678 #endif 19679 #endif 19680 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19681 PHYMOD_SYMBOL_FLAG_REGISTER, 19682 "UC_RMI_EXT_INTR_STS0r", 19683 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19684 "MICRO_C_RMI_EXT_INTR_STATUS0", 19685 NULL, 19686 #endif 19687 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19688 0x0, /* 0 */ 19689 0, 19690 #endif 19691 }, 19692 { 19693 BCMI_TSCE16_XGXS_UC_RMI_PMI_IF_CTL0r, 19694 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19695 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19696 BCMI_TSCE16_XGXS_UC_RMI_PMI_IF_CTL0r_fields, 19697 #else 19698 0, 19699 #endif 19700 #endif 19701 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19702 PHYMOD_SYMBOL_FLAG_REGISTER, 19703 "UC_RMI_PMI_IF_CTL0r", 19704 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19705 "MICRO_C_RMI_PMI_IF_CONTROL0", 19706 NULL, 19707 #endif 19708 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19709 0x101, /* 257 */ 19710 0, 19711 #endif 19712 }, 19713 { 19714 BCMI_TSCE16_XGXS_UC_RMI_SILICON_DBG_CTL0r, 19715 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19716 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19717 BCMI_TSCE16_XGXS_UC_RMI_SILICON_DBG_CTL0r_fields, 19718 #else 19719 0, 19720 #endif 19721 #endif 19722 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19723 PHYMOD_SYMBOL_FLAG_REGISTER, 19724 "UC_RMI_SILICON_DBG_CTL0r", 19725 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19726 "MICRO_C_RMI_SILICON_DEBUG_CONTROL0", 19727 NULL, 19728 #endif 19729 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19730 0x0, /* 0 */ 19731 0, 19732 #endif 19733 }, 19734 { 19735 BCMI_TSCE16_XGXS_UC_RMI_SILICON_DBG_STS0r, 19736 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19737 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19738 BCMI_TSCE16_XGXS_UC_RMI_SILICON_DBG_STS0r_fields, 19739 #else 19740 0, 19741 #endif 19742 #endif 19743 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19744 PHYMOD_SYMBOL_FLAG_REGISTER, 19745 "UC_RMI_SILICON_DBG_STS0r", 19746 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19747 "MICRO_C_RMI_SILICON_DEBUG_STATUS0", 19748 NULL, 19749 #endif 19750 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19751 0x0, /* 0 */ 19752 0, 19753 #endif 19754 }, 19755 { 19756 BCMI_TSCE16_XGXS_MDIO_BCST_PORT_ADDRr, 19757 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19758 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19759 BCMI_TSCE16_XGXS_MDIO_BCST_PORT_ADDRr_fields, 19760 #else 19761 0, 19762 #endif 19763 #endif 19764 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19765 PHYMOD_SYMBOL_FLAG_REGISTER, 19766 "MDIO_BCST_PORT_ADDRr", 19767 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19768 "MDIO_MMDSEL_AER_MDIO_BRCST_PORT_ADDR", 19769 NULL, 19770 #endif 19771 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19772 0x1f, /* 31 */ 19773 0, 19774 #endif 19775 }, 19776 { 19777 BCMI_TSCE16_XGXS_MDIO_MMD_SELr, 19778 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19779 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19780 BCMI_TSCE16_XGXS_MDIO_MMD_SELr_fields, 19781 #else 19782 0, 19783 #endif 19784 #endif 19785 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19786 PHYMOD_SYMBOL_FLAG_REGISTER, 19787 "MDIO_MMD_SELr", 19788 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19789 "MDIO_MMDSEL_AER_MDIO_MMD_SELECT", 19790 NULL, 19791 #endif 19792 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19793 0x404d, /* 16461 */ 19794 0, 19795 #endif 19796 }, 19797 { 19798 BCMI_TSCE16_XGXS_MDIO_AERr, 19799 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19800 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19801 BCMI_TSCE16_XGXS_MDIO_AERr_fields, 19802 #else 19803 0, 19804 #endif 19805 #endif 19806 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19807 PHYMOD_SYMBOL_FLAG_REGISTER, 19808 "MDIO_AERr", 19809 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19810 "MDIO_MMDSEL_AER_MDIO_AER", 19811 NULL, 19812 #endif 19813 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19814 0x0, /* 0 */ 19815 0, 19816 #endif 19817 }, 19818 { 19819 BCMI_TSCE16_XGXS_BLK_ADDRr, 19820 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 19821 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCE16_XGXS 19822 BCMI_TSCE16_XGXS_BLK_ADDRr_fields, 19823 #else 19824 0, 19825 #endif 19826 #endif 19827 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 19828 PHYMOD_SYMBOL_FLAG_REGISTER, 19829 "BLK_ADDRr", 19830 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 19831 "MDIO_BLK_ADDR_BLK_ADDR", 19832 NULL, 19833 #endif 19834 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 19835 0x0, /* 0 */ 19836 0, 19837 #endif 19838 }, 19839 #endif 19840 }; 19841 19842 19843 phymod_symbols_t bcmi_tsce16_xgxs_symbols = 19844 { 19845 bcmi_tsce16_xgxs_syms, sizeof(bcmi_tsce16_xgxs_syms)/sizeof(bcmi_tsce16_xgxs_syms[0]), 19846 #if PHYMOD_CONFIG_INCLUDE_FIELD_NAMES == 1 19847 bcmi_tsce16_xgxs_fields 19848 #else 19849 NULL 19850 #endif 19851 /* END OF SYMBOL FILE */ 19852 }; 19853 19854 #endif /* PHYMOD_CONFIG_INCLUDE_CHIP_SYMBOLS */