bcmi_tscbh_xgxs_sym.c - openbcm - Git mirror of https://github.com/Broadcom-Network-Switching-Software/OpenBCM

bcmi_tscbh_xgxs_sym.c (638639B)
      1 /*******************************************************************************
      2  *
      3  * 
      4  * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file.
      5  * 
      6  * Copyright 2007-2019 Broadcom Inc. All rights reserved.
      7  *
      8  * DO NOT EDIT THIS FILE!
      9  * This file is auto-generated from the registers file.
     10  * Edits to this file will be lost when it is regenerated.
     11  *
     12  * Symbol table file for the BCMI_TSCBH_XGXS.
     13  * This symbol table is used by the Broadcom debug shell.
     14  */
     15 
     16 
     17 #include <phymod/chip/bcmi_tscbh_xgxs_defs.h>
     18 #include <phymod/phymod_symbols.h>
     19 
     20 /* No symbols will be compiled unless this is defined. */
     21 #if PHYMOD_CONFIG_INCLUDE_CHIP_SYMBOLS == 1
     22 /*******************************************************************************
     23  *
     24  * If PHYMOD_CONFIG_INCLUDE_FIELD_INFO is 1, then symbol information
     25  * necessary to encode and decode the individual fields of a register or memory
     26  * will be available.
     27  *
     28  * Without it, only the register and memory names will be symbolically available
     29  * and their values will be displayed as raw data only. 
     30  *
     31  * Field information can be compiled out in the interest of saving code space.
     32  */
     33 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
     34 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
     35 
     36 static uint32_t BCMI_TSCBH_XGXS_AMS_PLL_PLL_CTL0r_fields[] =
     37 {
     38     /* AMS_PLL_SET_CLK4PCS:0:1 */
     39     PHYMOD_SYMBOL_FIELD_ENCODE(114, 1, 0),
     40     /* AMS_PLL_CP_CMFDBK_IADJ:2:3 */
     41     PHYMOD_SYMBOL_FIELD_ENCODE(42, 3, 2),
     42     /* AMS_PLL_FP3_CTRL:4:7 */
     43     PHYMOD_SYMBOL_FIELD_ENCODE(53, 7, 4),
     44     /* AMS_PLL_FP3_RH:8:8 */
     45     PHYMOD_SYMBOL_FIELD_ENCODE(54, 8, 8),
     46     /* AMS_PLL_LPF_RZ:9:10 */
     47     PHYMOD_SYMBOL_FIELD_ENCODE(87, 10, 9),
     48     /* AMS_PLL_SPARE_11_11:11:11 */
     49     PHYMOD_SYMBOL_FIELD_ENCODE(116, 11, 11),
     50     /* AMS_PLL_RESCAL_AUX:12:15 */
     51     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(104, 15, 12)
     52 };
     53 static uint32_t BCMI_TSCBH_XGXS_AMS_PLL_PLL_CTL1r_fields[] =
     54 {
     55     /* AMS_PLL_COMP_THRESH:0:2 */
     56     PHYMOD_SYMBOL_FIELD_ENCODE(41, 2, 0),
     57     /* AMS_PLL_DRV_HV_DISABLE:3:3 */
     58     PHYMOD_SYMBOL_FIELD_ENCODE(49, 3, 3),
     59     /* AMS_PLL_SPARE_20_20:4:4 */
     60     PHYMOD_SYMBOL_FIELD_ENCODE(119, 4, 4),
     61     /* AMS_PLL_VCO_RES_CS:5:5 */
     62     PHYMOD_SYMBOL_FIELD_ENCODE(136, 5, 5),
     63     /* AMS_PLL_VCO_AUTOGM:6:6 */
     64     PHYMOD_SYMBOL_FIELD_ENCODE(135, 6, 6),
     65     /* AMS_PLL_VCO2_15G:7:7 */
     66     PHYMOD_SYMBOL_FIELD_ENCODE(132, 7, 7),
     67     /* AMS_PLL_VCOICTRL:8:9 */
     68     PHYMOD_SYMBOL_FIELD_ENCODE(134, 9, 8),
     69     /* AMS_PLL_TEST_VCO2_CSSW:10:10 */
     70     PHYMOD_SYMBOL_FIELD_ENCODE(125, 10, 10),
     71     /* AMS_PLL_IVCO:11:13 */
     72     PHYMOD_SYMBOL_FIELD_ENCODE(83, 13, 11),
     73     /* AMS_PLL_RESET:14:14 */
     74     PHYMOD_SYMBOL_FIELD_ENCODE(105, 14, 14),
     75     /* AMS_PLL_ENABLE_FTUNE:15:15 */
     76     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(50, 15, 15)
     77 };
     78 static uint32_t BCMI_TSCBH_XGXS_AMS_PLL_PLL_CTL2r_fields[] =
     79 {
     80     /* AMS_PLL_IQP:0:3 */
     81     PHYMOD_SYMBOL_FIELD_ENCODE(82, 3, 0),
     82     /* AMS_PLL_VDD88_EN:4:4 */
     83     PHYMOD_SYMBOL_FIELD_ENCODE(137, 4, 4),
     84     /* AMS_PLL_REFL_PLL:5:5 */
     85     PHYMOD_SYMBOL_FIELD_ENCODE(103, 5, 5),
     86     /* AMS_PLL_REFH_PLL:6:6 */
     87     PHYMOD_SYMBOL_FIELD_ENCODE(102, 6, 6),
     88     /* AMS_PLL_IMIN_IBIAS:7:7 */
     89     PHYMOD_SYMBOL_FIELD_ENCODE(68, 7, 7),
     90     /* AMS_PLL_IMODE_IBIAS:8:8 */
     91     PHYMOD_SYMBOL_FIELD_ENCODE(75, 8, 8),
     92     /* AMS_PLL_IMAX_IBIAS:9:9 */
     93     PHYMOD_SYMBOL_FIELD_ENCODE(61, 9, 9),
     94     /* AMS_PLL_IMIN_ICP:10:10 */
     95     PHYMOD_SYMBOL_FIELD_ENCODE(72, 10, 10),
     96     /* AMS_PLL_IMODE_ICP:11:11 */
     97     PHYMOD_SYMBOL_FIELD_ENCODE(79, 11, 11),
     98     /* AMS_PLL_IMAX_ICP:12:12 */
     99     PHYMOD_SYMBOL_FIELD_ENCODE(65, 12, 12),
    100     /* AMS_PLL_IMIN_ICK:13:13 */
    101     PHYMOD_SYMBOL_FIELD_ENCODE(69, 13, 13),
    102     /* AMS_PLL_IMODE_ICK:14:14 */
    103     PHYMOD_SYMBOL_FIELD_ENCODE(76, 14, 14),
    104     /* AMS_PLL_IMAX_ICK:15:15 */
    105     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(62, 15, 15)
    106 };
    107 static uint32_t BCMI_TSCBH_XGXS_AMS_PLL_PLL_CTL3r_fields[] =
    108 {
    109     /* AMS_PLL_IMIN_IRXCLKBUF:0:0 */
    110     PHYMOD_SYMBOL_FIELD_ENCODE(74, 0, 0),
    111     /* AMS_PLL_IMODE_IRXCLKBUF:1:1 */
    112     PHYMOD_SYMBOL_FIELD_ENCODE(81, 1, 1),
    113     /* AMS_PLL_IMAX_IRXCLKBUF:2:2 */
    114     PHYMOD_SYMBOL_FIELD_ENCODE(67, 2, 2),
    115     /* AMS_PLL_IMIN_ICMLDIV:3:3 */
    116     PHYMOD_SYMBOL_FIELD_ENCODE(70, 3, 3),
    117     /* AMS_PLL_IMODE_ICMLDIV:4:4 */
    118     PHYMOD_SYMBOL_FIELD_ENCODE(77, 4, 4),
    119     /* AMS_PLL_IMAX_ICMLDIV:5:5 */
    120     PHYMOD_SYMBOL_FIELD_ENCODE(63, 5, 5),
    121     /* AMS_PLL_IMIN_ICOMP:6:6 */
    122     PHYMOD_SYMBOL_FIELD_ENCODE(71, 6, 6),
    123     /* AMS_PLL_IMODE_ICOMP:7:7 */
    124     PHYMOD_SYMBOL_FIELD_ENCODE(78, 7, 7),
    125     /* AMS_PLL_IMAX_ICOMP:8:8 */
    126     PHYMOD_SYMBOL_FIELD_ENCODE(64, 8, 8),
    127     /* AMS_PLL_IMIN_IOP:9:9 */
    128     PHYMOD_SYMBOL_FIELD_ENCODE(73, 9, 9),
    129     /* AMS_PLL_IMODE_IOP:10:10 */
    130     PHYMOD_SYMBOL_FIELD_ENCODE(80, 10, 10),
    131     /* AMS_PLL_IMAX_IOP:11:11 */
    132     PHYMOD_SYMBOL_FIELD_ENCODE(66, 11, 11),
    133     /* AMS_PLL_TEST_VREF:12:12 */
    134     PHYMOD_SYMBOL_FIELD_ENCODE(127, 12, 12),
    135     /* AMS_PLL_TEST_VC:13:13 */
    136     PHYMOD_SYMBOL_FIELD_ENCODE(124, 13, 13),
    137     /* AMS_PLL_TEST_PLL:14:14 */
    138     PHYMOD_SYMBOL_FIELD_ENCODE(121, 14, 14),
    139     /* AMS_PLL_TEST_RX:15:15 */
    140     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(123, 15, 15)
    141 };
    142 static uint32_t BCMI_TSCBH_XGXS_AMS_PLL_PLL_CTL4r_fields[] =
    143 {
    144     /* AMS_PLL_BGR_PTATADJ:0:3 */
    145     PHYMOD_SYMBOL_FIELD_ENCODE(38, 3, 0),
    146     /* AMS_PLL_BGR_CTATADJ:4:7 */
    147     PHYMOD_SYMBOL_FIELD_ENCODE(37, 7, 4),
    148     /* AMS_PLL_PLL2RX_CLKBW:8:9 */
    149     PHYMOD_SYMBOL_FIELD_ENCODE(98, 9, 8),
    150     /* AMS_PLL_TEST_VDDR4BG:10:10 */
    151     PHYMOD_SYMBOL_FIELD_ENCODE(126, 10, 10),
    152     /* AMS_PLL_VDDR_BGB:11:11 */
    153     PHYMOD_SYMBOL_FIELD_ENCODE(138, 11, 11),
    154     /* AMS_PLL_KVH_FORCE:12:13 */
    155     PHYMOD_SYMBOL_FIELD_ENCODE(85, 13, 12),
    156     /* AMS_PLL_FORCE_KVH_BW:14:14 */
    157     PHYMOD_SYMBOL_FIELD_ENCODE(51, 14, 14),
    158     /* AMS_PLL_FORCE_RESCAL:15:15 */
    159     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(52, 15, 15)
    160 };
    161 static uint32_t BCMI_TSCBH_XGXS_AMS_PLL_PLL_CTL5r_fields[] =
    162 {
    163     /* AMS_PLL_MAX_TEST_PORT_AMPLITUDE:0:0 */
    164     PHYMOD_SYMBOL_FIELD_ENCODE(88, 0, 0),
    165     /* AMS_PLL_BGIP:1:1 */
    166     PHYMOD_SYMBOL_FIELD_ENCODE(36, 1, 1),
    167     /* AMS_PLL_BGINT:2:2 */
    168     PHYMOD_SYMBOL_FIELD_ENCODE(35, 2, 2),
    169     /* AMS_PLL_VBYPASS:3:3 */
    170     PHYMOD_SYMBOL_FIELD_ENCODE(131, 3, 3),
    171     /* AMS_PLL_TEST_PNP:4:5 */
    172     PHYMOD_SYMBOL_FIELD_ENCODE(122, 5, 4),
    173     /* AMS_PLL_MIX3P1C_CALR_CTATADJ:6:10 */
    174     PHYMOD_SYMBOL_FIELD_ENCODE(91, 10, 6),
    175     /* AMS_PLL_MIX3P1C_CALR_PTATADJ:11:15 */
    176     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(92, 15, 11)
    177 };
    178 static uint32_t BCMI_TSCBH_XGXS_AMS_PLL_PLL_CTL6r_fields[] =
    179 {
    180     /* AMS_PLL_RTERM200:0:0 */
    181     PHYMOD_SYMBOL_FIELD_ENCODE(106, 0, 0),
    182     /* AMS_PLL_DIV2:1:1 */
    183     PHYMOD_SYMBOL_FIELD_ENCODE(44, 1, 1),
    184     /* AMS_PLL_DIV4:2:2 */
    185     PHYMOD_SYMBOL_FIELD_ENCODE(45, 2, 2),
    186     /* AMS_PLL_RTERM400:3:3 */
    187     PHYMOD_SYMBOL_FIELD_ENCODE(108, 3, 3),
    188     /* AMS_PLL_RTERMHIZ:4:4 */
    189     PHYMOD_SYMBOL_FIELD_ENCODE(109, 4, 4),
    190     /* AMS_PLL_RTERM300:5:5 */
    191     PHYMOD_SYMBOL_FIELD_ENCODE(107, 5, 5),
    192     /* AMS_PLL_CLK4SYNC_DIV:6:6 */
    193     PHYMOD_SYMBOL_FIELD_ENCODE(39, 6, 6),
    194     /* AMS_PLL_CLK4SYNC_EN:7:7 */
    195     PHYMOD_SYMBOL_FIELD_ENCODE(40, 7, 7),
    196     /* AMS_PLL_DOUBLER_CAP:8:10 */
    197     PHYMOD_SYMBOL_FIELD_ENCODE(47, 10, 8),
    198     /* AMS_PLL_SET_CLK4PCS_MSB:11:11 */
    199     PHYMOD_SYMBOL_FIELD_ENCODE(115, 11, 11),
    200     /* AMS_PLL_DOUBLER_RES:12:14 */
    201     PHYMOD_SYMBOL_FIELD_ENCODE(48, 14, 12),
    202     /* AMS_PLL_REFCLK_DOUBLER:15:15 */
    203     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(101, 15, 15)
    204 };
    205 static uint32_t BCMI_TSCBH_XGXS_AMS_PLL_PLL_CTL7r_fields[] =
    206 {
    207     /* AMS_PLL_TEST_FRACN_EN:0:0 */
    208     PHYMOD_SYMBOL_FIELD_ENCODE(120, 0, 0),
    209     /* AMS_PLL_PFD_SKEW_ENLARGE:1:1 */
    210     PHYMOD_SYMBOL_FIELD_ENCODE(97, 1, 1),
    211     /* AMS_PLL_PFD_FB_SKEW:2:2 */
    212     PHYMOD_SYMBOL_FIELD_ENCODE(95, 2, 2),
    213     /* AMS_PLL_PFD_REF_SKEW:3:3 */
    214     PHYMOD_SYMBOL_FIELD_ENCODE(96, 3, 3),
    215     /* AMS_PLL_NDIV_FRAC_VALID:4:4 */
    216     PHYMOD_SYMBOL_FIELD_ENCODE(94, 4, 4),
    217     /* AMS_PLL_VCODIV_REFOUT:5:5 */
    218     PHYMOD_SYMBOL_FIELD_ENCODE(133, 5, 5),
    219     /* AMS_PLL_MIX3P1CR_CTATADJ:6:10 */
    220     PHYMOD_SYMBOL_FIELD_ENCODE(89, 10, 6),
    221     /* AMS_PLL_MIX3P1CR_PTATADJ:11:15 */
    222     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(90, 15, 11)
    223 };
    224 static uint32_t BCMI_TSCBH_XGXS_AMS_PLL_PLL_CTL8r_fields[] =
    225 {
    226     /* AMS_PLL_FRACN_DIV:0:15 */
    227     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(56, 15, 0)
    228 };
    229 static uint32_t BCMI_TSCBH_XGXS_AMS_PLL_PLL_CTL9r_fields[] =
    230 {
    231     /* AMS_PLL_FRACN_DIV_17_16:0:1 */
    232     PHYMOD_SYMBOL_FIELD_ENCODE(58, 1, 0),
    233     /* AMS_PLL_FRACN_DIVRANGE:2:2 */
    234     PHYMOD_SYMBOL_FIELD_ENCODE(57, 2, 2),
    235     /* AMS_PLL_FRACN_BYPASS:3:3 */
    236     PHYMOD_SYMBOL_FIELD_ENCODE(55, 3, 3),
    237     /* AMS_PLL_FRACN_NDIV_INT:4:13 */
    238     PHYMOD_SYMBOL_FIELD_ENCODE(59, 13, 4),
    239     /* AMS_PLL_DITHEREN:14:14 */
    240     PHYMOD_SYMBOL_FIELD_ENCODE(43, 14, 14),
    241     /* AMS_PLL_FRACN_SEL:15:15 */
    242     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(60, 15, 15)
    243 };
    244 static uint32_t BCMI_TSCBH_XGXS_AMS_PLL_PLL_CTL_10r_fields[] =
    245 {
    246     /* AMS_PLL_RX_CLK_RPTR_PD:0:0 */
    247     PHYMOD_SYMBOL_FIELD_ENCODE(113, 0, 0),
    248     /* AMS_PLL_RX_CLKRPTR_BIAS:1:3 */
    249     PHYMOD_SYMBOL_FIELD_ENCODE(111, 3, 1),
    250     /* AMS_PLL_RX_CLKRPTR_BW:4:5 */
    251     PHYMOD_SYMBOL_FIELD_ENCODE(112, 5, 4),
    252     /* AMS_PLL_SPARE_167_166:6:7 */
    253     PHYMOD_SYMBOL_FIELD_ENCODE(117, 7, 6),
    254     /* AMS_PLL_TX_CLK_RPTR_PD:8:8 */
    255     PHYMOD_SYMBOL_FIELD_ENCODE(130, 8, 8),
    256     /* AMS_PLL_TX_CLKRPTR_BIAS:9:11 */
    257     PHYMOD_SYMBOL_FIELD_ENCODE(128, 11, 9),
    258     /* AMS_PLL_TX_CLKRPTR_BW:12:13 */
    259     PHYMOD_SYMBOL_FIELD_ENCODE(129, 13, 12),
    260     /* AMS_PLL_SPARE_175_174:14:15 */
    261     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(118, 15, 14)
    262 };
    263 static uint32_t BCMI_TSCBH_XGXS_AMS_PLL_PLL_INTCTLr_fields[] =
    264 {
    265     /* AMS_PLL_RTERM_SEL:0:0 */
    266     PHYMOD_SYMBOL_FIELD_ENCODE(110, 0, 0),
    267     /* AMS_PLL_DIV4_2_SEL:1:1 */
    268     PHYMOD_SYMBOL_FIELD_ENCODE(46, 1, 1),
    269     /* AMS_PLL_PWRDN:2:2 */
    270     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(99, 2, 2)
    271 };
    272 static uint32_t BCMI_TSCBH_XGXS_AMS_PLL_PLL_STSr_fields[] =
    273 {
    274     /* AMS_PLL_MODE:0:4 */
    275     PHYMOD_SYMBOL_FIELD_ENCODE(93, 4, 0),
    276     /* AMS_PLL_LOW:5:5 */
    277     PHYMOD_SYMBOL_FIELD_ENCODE(86, 5, 5),
    278     /* AMS_PLL_RANGE:6:13 */
    279     PHYMOD_SYMBOL_FIELD_ENCODE(100, 13, 6),
    280     /* AMS_PLL_KVH:14:15 */
    281     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(84, 15, 14)
    282 };
    283 static uint32_t BCMI_TSCBH_XGXS_AMS_RX_RX_CTL0r_fields[] =
    284 {
    285     /* AMS_RX_MASTER_DIODES_IBIAS:0:2 */
    286     PHYMOD_SYMBOL_FIELD_ENCODE(171, 2, 0),
    287     /* AMS_RX_SIGDET_THRESHOLD:3:5 */
    288     PHYMOD_SYMBOL_FIELD_ENCODE(202, 5, 3),
    289     /* AMS_RX_SIGDET_PWRDN:6:6 */
    290     PHYMOD_SYMBOL_FIELD_ENCODE(201, 6, 6),
    291     /* AMS_RX_RXCLK66_EN:7:7 */
    292     PHYMOD_SYMBOL_FIELD_ENCODE(190, 7, 7),
    293     /* AMS_RX_TPORT_EN:8:8 */
    294     PHYMOD_SYMBOL_FIELD_ENCODE(206, 8, 8),
    295     /* AMS_RX_VGA_10G_BW:9:9 */
    296     PHYMOD_SYMBOL_FIELD_ENCODE(215, 9, 9),
    297     /* AMS_RX_EQ_LZ_EN:10:10 */
    298     PHYMOD_SYMBOL_FIELD_ENCODE(165, 10, 10),
    299     /* AMS_RX_DFE_HGAIN_EN:11:11 */
    300     PHYMOD_SYMBOL_FIELD_ENCODE(157, 11, 11),
    301     /* AMS_RX_DC_COUPLE:12:12 */
    302     PHYMOD_SYMBOL_FIELD_ENCODE(152, 12, 12),
    303     /* AMS_RX_PEAKING_FILTER_IBIAS:13:15 */
    304     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(177, 15, 13)
    305 };
    306 static uint32_t BCMI_TSCBH_XGXS_AMS_RX_RX_CTL1r_fields[] =
    307 {
    308     /* AMS_RX_BYPASS_AC_CAP:0:0 */
    309     PHYMOD_SYMBOL_FIELD_ENCODE(139, 0, 0),
    310     /* AMS_RX_VGA0_IBIAS:1:3 */
    311     PHYMOD_SYMBOL_FIELD_ENCODE(208, 3, 1),
    312     /* AMS_RX_VGA1_IBIAS:4:6 */
    313     PHYMOD_SYMBOL_FIELD_ENCODE(210, 6, 4),
    314     /* AMS_RX_VGA2_IBIAS:7:9 */
    315     PHYMOD_SYMBOL_FIELD_ENCODE(212, 9, 7),
    316     /* AMS_RX_PF3_IBIAS:10:12 */
    317     PHYMOD_SYMBOL_FIELD_ENCODE(181, 12, 10),
    318     /* AMS_RX_CM_VOLTAGE_IBIAS:13:15 */
    319     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(143, 15, 13)
    320 };
    321 static uint32_t BCMI_TSCBH_XGXS_AMS_RX_RX_CTL2r_fields[] =
    322 {
    323     /* AMS_RX_SIGDET_IBIAS:0:2 */
    324     PHYMOD_SYMBOL_FIELD_ENCODE(200, 2, 0),
    325     /* AMS_RX_PHASE_INTERPOLATORS_IBIAS:3:5 */
    326     PHYMOD_SYMBOL_FIELD_ENCODE(187, 5, 3),
    327     /* AMS_RX_DFE_TAP_WEIGHT_IBIAS:6:8 */
    328     PHYMOD_SYMBOL_FIELD_ENCODE(161, 8, 6),
    329     /* AMS_RX_DFESUM_BW:9:10 */
    330     PHYMOD_SYMBOL_FIELD_ENCODE(155, 10, 9),
    331     /* AMS_RX_SEL_TH4DFE:11:12 */
    332     PHYMOD_SYMBOL_FIELD_ENCODE(197, 12, 11),
    333     /* AMS_RX_PD_CH_P1:13:13 */
    334     PHYMOD_SYMBOL_FIELD_ENCODE(175, 13, 13),
    335     /* AMS_RX_VGA3_IND:14:14 */
    336     PHYMOD_SYMBOL_FIELD_ENCODE(214, 14, 14),
    337     /* AMS_RX_PWRDN_FTAP:15:15 */
    338     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(188, 15, 15)
    339 };
    340 static uint32_t BCMI_TSCBH_XGXS_AMS_RX_RX_CTL3r_fields[] =
    341 {
    342     /* AMS_RX_MET_R_IBIAS:0:2 */
    343     PHYMOD_SYMBOL_FIELD_ENCODE(172, 2, 0),
    344     /* AMS_RX_DLL_IBIAS:3:5 */
    345     PHYMOD_SYMBOL_FIELD_ENCODE(162, 5, 3),
    346     /* AMS_RX_OFFSET_CORRECTION_IBIAS:6:8 */
    347     PHYMOD_SYMBOL_FIELD_ENCODE(173, 8, 6),
    348     /* AMS_RX_DFE_SUM_BUF_IBIAS:9:11 */
    349     PHYMOD_SYMBOL_FIELD_ENCODE(160, 11, 9),
    350     /* AMS_RX_DFE_SLICER_IBIAS:12:14 */
    351     PHYMOD_SYMBOL_FIELD_ENCODE(158, 14, 12),
    352     /* AMS_RX_FFE_ENABLE:15:15 */
    353     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(167, 15, 15)
    354 };
    355 static uint32_t BCMI_TSCBH_XGXS_AMS_RX_RX_CTL4r_fields[] =
    356 {
    357     /* AMS_RX_FFE_SUMMER_TAP_IBIAS:0:2 */
    358     PHYMOD_SYMBOL_FIELD_ENCODE(169, 2, 0),
    359     /* AMS_RX_FFE_SHA_IBIAS:3:5 */
    360     PHYMOD_SYMBOL_FIELD_ENCODE(168, 5, 3),
    361     /* AMS_RX_VGA0_RESCAL_MUX:6:10 */
    362     PHYMOD_SYMBOL_FIELD_ENCODE(209, 10, 6),
    363     /* AMS_RX_VGA1_RESCAL_MUX:11:15 */
    364     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(211, 15, 11)
    365 };
    366 static uint32_t BCMI_TSCBH_XGXS_AMS_RX_RX_CTL5r_fields[] =
    367 {
    368     /* AMS_RX_VGA2_RESCAL_MUX:0:4 */
    369     PHYMOD_SYMBOL_FIELD_ENCODE(213, 4, 0),
    370     /* AMS_RX_SD_CAL_NEG:5:7 */
    371     PHYMOD_SYMBOL_FIELD_ENCODE(193, 7, 5),
    372     /* AMS_RX_SD_CAL_POS:8:10 */
    373     PHYMOD_SYMBOL_FIELD_ENCODE(195, 10, 8),
    374     /* AMS_RX_SD_CAL_POLARITY:11:11 */
    375     PHYMOD_SYMBOL_FIELD_ENCODE(194, 11, 11),
    376     /* AMS_RX_TESTCLK_DIV:12:13 */
    377     PHYMOD_SYMBOL_FIELD_ENCODE(204, 13, 12),
    378     /* AMS_RX_TESTCLK_MUX:14:14 */
    379     PHYMOD_SYMBOL_FIELD_ENCODE(205, 14, 14),
    380     /* AMS_RX_SD_CAL_EN:15:15 */
    381     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(192, 15, 15)
    382 };
    383 static uint32_t BCMI_TSCBH_XGXS_AMS_RX_RX_CTL6r_fields[] =
    384 {
    385     /* AMS_RX_PEAKING_FILTER_RESCAL_MUX:0:3 */
    386     PHYMOD_SYMBOL_FIELD_ENCODE(178, 3, 0),
    387     /* AMS_RX_OFFSET_CORRECTION_RESCAL_MUX:4:7 */
    388     PHYMOD_SYMBOL_FIELD_ENCODE(174, 7, 4),
    389     /* AMS_RX_RXCLK32_EN:8:8 */
    390     PHYMOD_SYMBOL_FIELD_ENCODE(189, 8, 8),
    391     /* AMS_RX_PD_PHS_SLR:9:9 */
    392     PHYMOD_SYMBOL_FIELD_ENCODE(176, 9, 9),
    393     /* AMS_RX_DFESUM_LP:10:10 */
    394     PHYMOD_SYMBOL_FIELD_ENCODE(156, 10, 10),
    395     /* AMS_RX_CML_LP:11:11 */
    396     PHYMOD_SYMBOL_FIELD_ENCODE(142, 11, 11),
    397     /* AMS_RX_EN_TAP9DELAY:12:13 */
    398     PHYMOD_SYMBOL_FIELD_ENCODE(163, 13, 12),
    399     /* AMS_RX_DFE_SUMMER_VCM:14:15 */
    400     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(159, 15, 14)
    401 };
    402 static uint32_t BCMI_TSCBH_XGXS_AMS_RX_RX_CTL7r_fields[] =
    403 {
    404     /* AMS_RX_DC_OFFSET:0:7 */
    405     PHYMOD_SYMBOL_FIELD_ENCODE(153, 7, 0),
    406     /* AMS_RX_FORCE_DC_OFFSET:8:8 */
    407     PHYMOD_SYMBOL_FIELD_ENCODE(170, 8, 8),
    408     /* AMS_RX_RX_OFFSET_PD:9:9 */
    409     PHYMOD_SYMBOL_FIELD_ENCODE(191, 9, 9),
    410     /* AMS_RX_SHORT_VGA_OUTPUT:10:10 */
    411     PHYMOD_SYMBOL_FIELD_ENCODE(198, 10, 10),
    412     /* AMS_RX_DC_OFFSET_HALF_RANGE:11:11 */
    413     PHYMOD_SYMBOL_FIELD_ENCODE(154, 11, 11),
    414     /* AMS_RX_EQ_IND_DIS:12:12 */
    415     PHYMOD_SYMBOL_FIELD_ENCODE(164, 12, 12),
    416     /* AMS_RX_EQ_PKCOMP_DIS:13:13 */
    417     PHYMOD_SYMBOL_FIELD_ENCODE(166, 13, 13),
    418     /* AMS_RX_VGA_STEP_MODE:14:15 */
    419     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(218, 15, 14)
    420 };
    421 static uint32_t BCMI_TSCBH_XGXS_AMS_RX_RX_CTL8r_fields[] =
    422 {
    423     /* AMS_RX_DAC4CK_LMS_I:0:3 */
    424     PHYMOD_SYMBOL_FIELD_ENCODE(147, 3, 0),
    425     /* AMS_RX_DAC4CK_LMS_Q:4:7 */
    426     PHYMOD_SYMBOL_FIELD_ENCODE(148, 7, 4),
    427     /* AMS_RX_DAC4CK_PHS_I:8:11 */
    428     PHYMOD_SYMBOL_FIELD_ENCODE(149, 11, 8),
    429     /* AMS_RX_DAC4CK_PHS_Q:12:15 */
    430     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(150, 15, 12)
    431 };
    432 static uint32_t BCMI_TSCBH_XGXS_AMS_RX_RX_CTL9r_fields[] =
    433 {
    434     /* AMS_RX_DAC4CK_DAT_I:0:3 */
    435     PHYMOD_SYMBOL_FIELD_ENCODE(145, 3, 0),
    436     /* AMS_RX_DAC4CK_DAT_Q:4:7 */
    437     PHYMOD_SYMBOL_FIELD_ENCODE(146, 7, 4),
    438     /* AMS_RX_CLK_BW_CTRL:8:9 */
    439     PHYMOD_SYMBOL_FIELD_ENCODE(140, 9, 8),
    440     /* AMS_RX_SPARE_154:10:10 */
    441     PHYMOD_SYMBOL_FIELD_ENCODE(203, 10, 10),
    442     /* AMS_RX_SEL_D2CLP:11:11 */
    443     PHYMOD_SYMBOL_FIELD_ENCODE(196, 11, 11),
    444     /* AMS_RX_D2C_CLKBUF_IBIAS:12:14 */
    445     PHYMOD_SYMBOL_FIELD_ENCODE(144, 14, 12),
    446     /* AMS_RX_CLOCK_CAL_EN:15:15 */
    447     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(141, 15, 15)
    448 };
    449 static uint32_t BCMI_TSCBH_XGXS_AMS_RX_RX_CTL_10r_fields[] =
    450 {
    451     /* AMS_RX_PF3_CTRL:0:3 */
    452     PHYMOD_SYMBOL_FIELD_ENCODE(180, 3, 0),
    453     /* AMS_RX_PF3_RESCAL_MUX:4:7 */
    454     PHYMOD_SYMBOL_FIELD_ENCODE(186, 7, 4),
    455     /* AMS_RX_PF3_MAX_BW:8:8 */
    456     PHYMOD_SYMBOL_FIELD_ENCODE(184, 8, 8),
    457     /* AMS_RX_PF3_LZ_EN:9:9 */
    458     PHYMOD_SYMBOL_FIELD_ENCODE(183, 9, 9),
    459     /* AMS_RX_PF3_IND_DIS:10:10 */
    460     PHYMOD_SYMBOL_FIELD_ENCODE(182, 10, 10),
    461     /* AMS_RX_PF3_PKCOMP_DIS:11:11 */
    462     PHYMOD_SYMBOL_FIELD_ENCODE(185, 11, 11),
    463     /* AMS_RX_VGA_BW_CTRL_CAP:12:13 */
    464     PHYMOD_SYMBOL_FIELD_ENCODE(216, 13, 12),
    465     /* AMS_RX_VGA_BW_CTRL_IND:14:15 */
    466     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(217, 15, 14)
    467 };
    468 static uint32_t BCMI_TSCBH_XGXS_AMS_RX_RX_STSr_fields[] =
    469 {
    470     /* AMS_RX_VGA:0:4 */
    471     PHYMOD_SYMBOL_FIELD_ENCODE(207, 4, 0),
    472     /* AMS_RX_DATA_THRESH_SEL:5:10 */
    473     PHYMOD_SYMBOL_FIELD_ENCODE(151, 10, 5),
    474     /* AMS_RX_PF:11:14 */
    475     PHYMOD_SYMBOL_FIELD_ENCODE(179, 14, 11),
    476     /* AMS_RX_SIGDET:15:15 */
    477     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(199, 15, 15)
    478 };
    479 static uint32_t BCMI_TSCBH_XGXS_AMS_TX_TX_CTL0r_fields[] =
    480 {
    481     /* AMS_TX_SKEW_PN:0:2 */
    482     PHYMOD_SYMBOL_FIELD_ENCODE(235, 2, 0),
    483     /* AMS_TX_SKEW_POLARITY:3:3 */
    484     PHYMOD_SYMBOL_FIELD_ENCODE(236, 3, 3),
    485     /* AMS_TX_SKEW_ENABLE:4:4 */
    486     PHYMOD_SYMBOL_FIELD_ENCODE(234, 4, 4),
    487     /* AMS_TX_SPARE_5:5:5 */
    488     PHYMOD_SYMBOL_FIELD_ENCODE(242, 5, 5),
    489     /* AMS_TX_TICKSEL:6:7 */
    490     PHYMOD_SYMBOL_FIELD_ENCODE(248, 7, 6),
    491     /* AMS_TX_VDDR_BGB:8:8 */
    492     PHYMOD_SYMBOL_FIELD_ENCODE(251, 8, 8),
    493     /* AMS_TX_SPARE_9:9:9 */
    494     PHYMOD_SYMBOL_FIELD_ENCODE(246, 9, 9),
    495     /* AMS_TX_DCC_DIS:10:10 */
    496     PHYMOD_SYMBOL_FIELD_ENCODE(222, 10, 10),
    497     /* AMS_TX_CAL_OFF:11:11 */
    498     PHYMOD_SYMBOL_FIELD_ENCODE(221, 11, 11),
    499     /* AMS_TX_CAL_AUX:12:15 */
    500     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(220, 15, 12)
    501 };
    502 static uint32_t BCMI_TSCBH_XGXS_AMS_TX_TX_CTL1r_fields[] =
    503 {
    504     /* AMS_TX_IBIAS:0:2 */
    505     PHYMOD_SYMBOL_FIELD_ENCODE(227, 2, 0),
    506     /* AMS_TX_IPHINT:3:5 */
    507     PHYMOD_SYMBOL_FIELD_ENCODE(229, 5, 3),
    508     /* AMS_TX_SPARE_24_22:6:8 */
    509     PHYMOD_SYMBOL_FIELD_ENCODE(239, 8, 6),
    510     /* AMS_TX_ILDO:9:11 */
    511     PHYMOD_SYMBOL_FIELD_ENCODE(228, 11, 9),
    512     /* AMS_TX_LDO_VREF:12:13 */
    513     PHYMOD_SYMBOL_FIELD_ENCODE(231, 13, 12),
    514     /* AMS_TX_TXCLK66_EN:14:14 */
    515     PHYMOD_SYMBOL_FIELD_ENCODE(250, 14, 14),
    516     /* AMS_TX_TXCLK32_EN:15:15 */
    517     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(249, 15, 15)
    518 };
    519 static uint32_t BCMI_TSCBH_XGXS_AMS_TX_TX_CTL2r_fields[] =
    520 {
    521     /* AMS_TX_HPF_CTRL:0:1 */
    522     PHYMOD_SYMBOL_FIELD_ENCODE(226, 1, 0),
    523     /* AMS_TX_SPARE_34:2:2 */
    524     PHYMOD_SYMBOL_FIELD_ENCODE(240, 2, 2),
    525     /* AMS_TX_SLEW_RATE:3:3 */
    526     PHYMOD_SYMBOL_FIELD_ENCODE(237, 3, 3),
    527     /* AMS_TX_TEST_DATA:4:5 */
    528     PHYMOD_SYMBOL_FIELD_ENCODE(247, 5, 4),
    529     /* AMS_TX_DRIVER_RES_CAL:6:7 */
    530     PHYMOD_SYMBOL_FIELD_ENCODE(223, 7, 6),
    531     /* AMS_TX_SPARE_46_40:8:14 */
    532     PHYMOD_SYMBOL_FIELD_ENCODE(241, 14, 8),
    533     /* AMS_TX_ELEC_IDLE_AUX:15:15 */
    534     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(225, 15, 15)
    535 };
    536 static uint32_t BCMI_TSCBH_XGXS_AMS_TX_TX_CTL3r_fields[] =
    537 {
    538     /* AMS_TX_SPARE_52_48:0:4 */
    539     PHYMOD_SYMBOL_FIELD_ENCODE(243, 4, 0),
    540     /* AMS_TX_PDET_MODE:5:5 */
    541     PHYMOD_SYMBOL_FIELD_ENCODE(232, 5, 5),
    542     /* AMS_TX_SPARE_54:6:6 */
    543     PHYMOD_SYMBOL_FIELD_ENCODE(244, 6, 6),
    544     /* AMS_TX_SEL_TXMASTER:7:7 */
    545     PHYMOD_SYMBOL_FIELD_ENCODE(233, 7, 7),
    546     /* AMS_TX_SPARE_63_56:8:15 */
    547     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(245, 15, 8)
    548 };
    549 static uint32_t BCMI_TSCBH_XGXS_AMS_TX_TX_STSr_fields[] =
    550 {
    551     /* AMS_TX_VERSION_ID:0:7 */
    552     PHYMOD_SYMBOL_FIELD_ENCODE(252, 7, 0),
    553     /* AMS_TX_ANA_RESCAL:8:11 */
    554     PHYMOD_SYMBOL_FIELD_ENCODE(219, 11, 8),
    555     /* AMS_TX_DRV_HV_DISABLE:12:12 */
    556     PHYMOD_SYMBOL_FIELD_ENCODE(224, 12, 12),
    557     /* AMS_TX_SPARE_13:13:13 */
    558     PHYMOD_SYMBOL_FIELD_ENCODE(238, 13, 13),
    559     /* AMS_TX_LANE_ID:14:15 */
    560     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(230, 15, 14)
    561 };
    562 static uint32_t BCMI_TSCBH_XGXS_AN_X1_CL73_BRK_LNKr_fields[] =
    563 {
    564     /* CL73_BREAK_TIMER_PERIOD:0:15 */
    565     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(495, 15, 0)
    566 };
    567 static uint32_t BCMI_TSCBH_XGXS_AN_X1_CL73_ERRr_fields[] =
    568 {
    569     /* CL73_ERROR_TIMER_PERIOD:0:15 */
    570     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(497, 15, 0)
    571 };
    572 static uint32_t BCMI_TSCBH_XGXS_AN_X1_DME_PAGE_TMR_TYPEr_fields[] =
    573 {
    574     /* CL73_PAGE_TEST_MIN_TIMER:0:6 */
    575     PHYMOD_SYMBOL_FIELD_ENCODE(502, 6, 0),
    576     /* CL73_PAGE_TEST_MAX_TIMER:7:13 */
    577     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(501, 13, 7)
    578 };
    579 static uint32_t BCMI_TSCBH_XGXS_AN_X1_GLB_INTr_fields[] =
    580 {
    581     /* INT_PORT0:0:0 */
    582     PHYMOD_SYMBOL_FIELD_ENCODE(786, 0, 0),
    583     /* INT_PORT1:1:1 */
    584     PHYMOD_SYMBOL_FIELD_ENCODE(788, 1, 1),
    585     /* INT_PORT2:2:2 */
    586     PHYMOD_SYMBOL_FIELD_ENCODE(790, 2, 2),
    587     /* INT_PORT3:3:3 */
    588     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(792, 3, 3)
    589 };
    590 static uint32_t BCMI_TSCBH_XGXS_AN_X1_GLB_MASKr_fields[] =
    591 {
    592     /* INT_PORT0_MASK:0:0 */
    593     PHYMOD_SYMBOL_FIELD_ENCODE(787, 0, 0),
    594     /* INT_PORT1_MASK:1:1 */
    595     PHYMOD_SYMBOL_FIELD_ENCODE(789, 1, 1),
    596     /* INT_PORT2_MASK:2:2 */
    597     PHYMOD_SYMBOL_FIELD_ENCODE(791, 2, 2),
    598     /* INT_PORT3_MASK:3:3 */
    599     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(793, 3, 3)
    600 };
    601 static uint32_t BCMI_TSCBH_XGXS_AN_X1_IGNORE_LNK_TMRr_fields[] =
    602 {
    603     /* IGNORE_LINK_TIMER_PERIOD:0:15 */
    604     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(781, 15, 0)
    605 };
    606 static uint32_t BCMI_TSCBH_XGXS_AN_X1_IGNORE_LNK_TMR_PAM4r_fields[] =
    607 {
    608     /* IGNORE_LINK_TIMER_PERIOD_PAM4:0:15 */
    609     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(782, 15, 0)
    610 };
    611 static uint32_t BCMI_TSCBH_XGXS_AN_X1_LNK_FAIL_INHBT_TMR_CL72r_fields[] =
    612 {
    613     /* LINK_FAIL_INHIBIT_TIMER_CL72_PERIOD:0:15 */
    614     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(900, 15, 0)
    615 };
    616 static uint32_t BCMI_TSCBH_XGXS_AN_X1_LNK_FAIL_INHBT_TMR_CL72_PAM4r_fields[] =
    617 {
    618     /* LINK_FAIL_INHIBIT_TIMER_CL72_PERIOD_PAM4:0:15 */
    619     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(901, 15, 0)
    620 };
    621 static uint32_t BCMI_TSCBH_XGXS_AN_X1_LNK_FAIL_INHBT_TMR_NOT_CL72r_fields[] =
    622 {
    623     /* LINK_FAIL_INHIBIT_TIMER_NCL72_PERIOD:0:15 */
    624     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(902, 15, 0)
    625 };
    626 static uint32_t BCMI_TSCBH_XGXS_AN_X1_LNK_FAIL_INHBT_TMR_NOT_CL72_PAM4r_fields[] =
    627 {
    628     /* LINK_FAIL_INHIBIT_TIMER_NCL72_PERIOD_PAM4:0:15 */
    629     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(903, 15, 0)
    630 };
    631 static uint32_t BCMI_TSCBH_XGXS_AN_X1_OUI_LWRr_fields[] =
    632 {
    633     /* OUI_LOWER_DATA:0:15 */
    634     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1162, 15, 0)
    635 };
    636 static uint32_t BCMI_TSCBH_XGXS_AN_X1_OUI_UPRr_fields[] =
    637 {
    638     /* OUI_UPPER_DATA:0:7 */
    639     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1163, 7, 0)
    640 };
    641 static uint32_t BCMI_TSCBH_XGXS_AN_X4_AN_ABIL_RESOLUTION_STSr_fields[] =
    642 {
    643     /* AN_HCD_CL72:0:0 */
    644     PHYMOD_SYMBOL_FIELD_ENCODE(293, 0, 0),
    645     /* AN_HCD_FEC_ARCH:1:3 */
    646     PHYMOD_SYMBOL_FIELD_ENCODE(295, 3, 1),
    647     /* AN_HCD_SPEED:4:11 */
    648     PHYMOD_SYMBOL_FIELD_ENCODE(298, 11, 4),
    649     /* AN_HCD_PAUSE:12:13 */
    650     PHYMOD_SYMBOL_FIELD_ENCODE(296, 13, 12),
    651     /* AN_HCD_DUPLEX:14:14 */
    652     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(294, 14, 14)
    653 };
    654 static uint32_t BCMI_TSCBH_XGXS_AN_X4_AN_MISC_STSr_fields[] =
    655 {
    656     /* AN_FAIL_COUNT:2:5 */
    657     PHYMOD_SYMBOL_FIELD_ENCODE(286, 5, 2),
    658     /* AN_ACTIVE:6:6 */
    659     PHYMOD_SYMBOL_FIELD_ENCODE(280, 6, 6),
    660     /* AN_RETRY_COUNT:9:14 */
    661     PHYMOD_SYMBOL_FIELD_ENCODE(299, 14, 9),
    662     /* AN_COMPLETE:15:15 */
    663     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(281, 15, 15)
    664 };
    665 static uint32_t BCMI_TSCBH_XGXS_AN_X4_CL73_CFGr_fields[] =
    666 {
    667     /* CL73_AN_RESTART:0:0 */
    668     PHYMOD_SYMBOL_FIELD_ENCODE(491, 0, 0),
    669     /* CL73_NONCE_MATCH_VAL:5:5 */
    670     PHYMOD_SYMBOL_FIELD_ENCODE(500, 5, 5),
    671     /* CL73_NONCE_MATCH_OVER:6:6 */
    672     PHYMOD_SYMBOL_FIELD_ENCODE(499, 6, 6),
    673     /* CL73_ENABLE:8:8 */
    674     PHYMOD_SYMBOL_FIELD_ENCODE(496, 8, 8),
    675     /* MSA_FEC_MAPPING:9:9 */
    676     PHYMOD_SYMBOL_FIELD_ENCODE(1136, 9, 9),
    677     /* CL73_BAM_ENABLE:10:10 */
    678     PHYMOD_SYMBOL_FIELD_ENCODE(493, 10, 10),
    679     /* NUM_ADVERTISED_LANES:11:12 */
    680     PHYMOD_SYMBOL_FIELD_ENCODE(1142, 12, 11),
    681     /* DISABLE_REMOTE_FAULT:13:13 */
    682     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(609, 13, 13)
    683 };
    684 static uint32_t BCMI_TSCBH_XGXS_AN_X4_CL73_CTLSr_fields[] =
    685 {
    686     /* AN_GOOD_TRAP:2:2 */
    687     PHYMOD_SYMBOL_FIELD_ENCODE(292, 2, 2),
    688     /* AN_GOOD_CHECK_TRAP:3:3 */
    689     PHYMOD_SYMBOL_FIELD_ENCODE(289, 3, 3),
    690     /* LINKFAILTIMER_DIS:4:4 */
    691     PHYMOD_SYMBOL_FIELD_ENCODE(814, 4, 4),
    692     /* LINKFAILTIMERQUAL_EN:5:5 */
    693     PHYMOD_SYMBOL_FIELD_ENCODE(813, 5, 5),
    694     /* AN_FAIL_COUNT_LIMIT:6:9 */
    695     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(287, 9, 6)
    696 };
    697 static uint32_t BCMI_TSCBH_XGXS_AN_X4_INTr_fields[] =
    698 {
    699     /* LP_PAGE_RDY_INT:0:0 */
    700     PHYMOD_SYMBOL_FIELD_ENCODE(964, 0, 0),
    701     /* AN_COMPLETED_SW_INT:1:1 */
    702     PHYMOD_SYMBOL_FIELD_ENCODE(284, 1, 1),
    703     /* AN_GOOD_CHK_INT:2:2 */
    704     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(291, 2, 2)
    705 };
    706 static uint32_t BCMI_TSCBH_XGXS_AN_X4_INT_ENr_fields[] =
    707 {
    708     /* LP_PAGE_RDY_EN:0:0 */
    709     PHYMOD_SYMBOL_FIELD_ENCODE(963, 0, 0),
    710     /* AN_COMPLETED_SW_EN:1:1 */
    711     PHYMOD_SYMBOL_FIELD_ENCODE(283, 1, 1),
    712     /* AN_GOOD_CHK_EN:2:2 */
    713     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(290, 2, 2)
    714 };
    715 static uint32_t BCMI_TSCBH_XGXS_AN_X4_LD_BAM_ABILr_fields[] =
    716 {
    717     /* CL73_BAM_CODE:0:8 */
    718     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(492, 8, 0)
    719 };
    720 static uint32_t BCMI_TSCBH_XGXS_AN_X4_LD_BASE_ABIL0r_fields[] =
    721 {
    722     /* CL73_BASE_SELECTOR:0:4 */
    723     PHYMOD_SYMBOL_FIELD_ENCODE(494, 4, 0),
    724     /* TX_NONCE:5:9 */
    725     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1971, 9, 5)
    726 };
    727 static uint32_t BCMI_TSCBH_XGXS_AN_X4_LD_BASE_ABIL1r_fields[] =
    728 {
    729     /* BASE_10G_KR1:0:0 */
    730     PHYMOD_SYMBOL_FIELD_ENCODE(329, 0, 0),
    731     /* BASE_40G_KR4:1:1 */
    732     PHYMOD_SYMBOL_FIELD_ENCODE(337, 1, 1),
    733     /* BASE_40G_CR4:2:2 */
    734     PHYMOD_SYMBOL_FIELD_ENCODE(336, 2, 2),
    735     /* BASE_100G_KR4:3:3 */
    736     PHYMOD_SYMBOL_FIELD_ENCODE(328, 3, 3),
    737     /* BASE_100G_CR4:4:4 */
    738     PHYMOD_SYMBOL_FIELD_ENCODE(325, 4, 4),
    739     /* CL73_PAUSE:6:7 */
    740     PHYMOD_SYMBOL_FIELD_ENCODE(503, 7, 6),
    741     /* FEC_REQ:8:9 */
    742     PHYMOD_SYMBOL_FIELD_ENCODE(713, 9, 8),
    743     /* NEXT_PAGE:10:10 */
    744     PHYMOD_SYMBOL_FIELD_ENCODE(1139, 10, 10),
    745     /* CL73_REMOTE_FAULT:11:11 */
    746     PHYMOD_SYMBOL_FIELD_ENCODE(504, 11, 11),
    747     /* BASE_25G_BASE_R_FEC_REQ:12:12 */
    748     PHYMOD_SYMBOL_FIELD_ENCODE(332, 12, 12),
    749     /* BASE_25G_RS_FEC_REQ:13:13 */
    750     PHYMOD_SYMBOL_FIELD_ENCODE(335, 13, 13),
    751     /* BASE_25G_CR_KR:14:14 */
    752     PHYMOD_SYMBOL_FIELD_ENCODE(334, 14, 14),
    753     /* BASE_25G_CRS_KRS:15:15 */
    754     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(333, 15, 15)
    755 };
    756 static uint32_t BCMI_TSCBH_XGXS_AN_X4_LD_BASE_ABIL2r_fields[] =
    757 {
    758     /* BASE_100G_KR2_CR2_EN:0:0 */
    759     PHYMOD_SYMBOL_FIELD_ENCODE(326, 0, 0),
    760     /* BASE_100G_KR2_CR2_SEL:1:5 */
    761     PHYMOD_SYMBOL_FIELD_ENCODE(327, 5, 1),
    762     /* BASE_50G_KR_CR_EN:6:6 */
    763     PHYMOD_SYMBOL_FIELD_ENCODE(338, 6, 6),
    764     /* BASE_50G_KR_CR_SEL:7:11 */
    765     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(339, 11, 7)
    766 };
    767 static uint32_t BCMI_TSCBH_XGXS_AN_X4_LD_BASE_ABIL3r_fields[] =
    768 {
    769     /* BASE_200G_KR4_CR4_EN:0:0 */
    770     PHYMOD_SYMBOL_FIELD_ENCODE(330, 0, 0),
    771     /* BASE_200G_KR4_CR4_SEL:1:5 */
    772     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(331, 5, 1)
    773 };
    774 static uint32_t BCMI_TSCBH_XGXS_AN_X4_LD_CTLr_fields[] =
    775 {
    776     /* AN_HCD_RES_DISABLE:0:0 */
    777     PHYMOD_SYMBOL_FIELD_ENCODE(297, 0, 0),
    778     /* AN_TYPE_SW:1:1 */
    779     PHYMOD_SYMBOL_FIELD_ENCODE(300, 1, 1),
    780     /* SW_AN_SPEED_ID:2:7 */
    781     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1762, 7, 2)
    782 };
    783 static uint32_t BCMI_TSCBH_XGXS_AN_X4_LD_PAGE0r_fields[] =
    784 {
    785     /* LD_PAGE_0:0:15 */
    786     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(809, 15, 0)
    787 };
    788 static uint32_t BCMI_TSCBH_XGXS_AN_X4_LD_PAGE1r_fields[] =
    789 {
    790     /* LD_PAGE_1:0:15 */
    791     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(810, 15, 0)
    792 };
    793 static uint32_t BCMI_TSCBH_XGXS_AN_X4_LD_PAGE2r_fields[] =
    794 {
    795     /* LD_PAGE_2:0:15 */
    796     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(811, 15, 0)
    797 };
    798 static uint32_t BCMI_TSCBH_XGXS_AN_X4_LD_UP1_ABIL0r_fields[] =
    799 {
    800     /* BAM_20G_KR2:0:0 */
    801     PHYMOD_SYMBOL_FIELD_ENCODE(310, 0, 0),
    802     /* BAM_20G_CR2:1:1 */
    803     PHYMOD_SYMBOL_FIELD_ENCODE(308, 1, 1),
    804     /* BAM_40G_KR2:2:2 */
    805     PHYMOD_SYMBOL_FIELD_ENCODE(316, 2, 2),
    806     /* BAM_40G_CR2:3:3 */
    807     PHYMOD_SYMBOL_FIELD_ENCODE(315, 3, 3),
    808     /* BAM_400G_BRCM_FEC_KR8_CR8:4:4 */
    809     PHYMOD_SYMBOL_FIELD_ENCODE(313, 4, 4),
    810     /* BAM_400G_BRCM_NO_FEC_KR8_CR8:5:5 */
    811     PHYMOD_SYMBOL_FIELD_ENCODE(314, 5, 5),
    812     /* BAM_50G_KR2:6:6 */
    813     PHYMOD_SYMBOL_FIELD_ENCODE(323, 6, 6),
    814     /* BAM_50G_CR2:7:7 */
    815     PHYMOD_SYMBOL_FIELD_ENCODE(321, 7, 7),
    816     /* BAM_50G_KR4:8:8 */
    817     PHYMOD_SYMBOL_FIELD_ENCODE(324, 8, 8),
    818     /* BAM_50G_CR4:9:9 */
    819     PHYMOD_SYMBOL_FIELD_ENCODE(322, 9, 9),
    820     /* BAM_50G_BRCM_FEC_528_CR1_KR1:10:10 */
    821     PHYMOD_SYMBOL_FIELD_ENCODE(317, 10, 10),
    822     /* BAM_50G_BRCM_NO_FEC_CR1_KR1:11:11 */
    823     PHYMOD_SYMBOL_FIELD_ENCODE(320, 11, 11),
    824     /* BAM_50G_BRCM_FEC_544_CR1_KR1:12:12 */
    825     PHYMOD_SYMBOL_FIELD_ENCODE(318, 12, 12),
    826     /* SPEED_SPARE_22:13:13 */
    827     PHYMOD_SYMBOL_FIELD_ENCODE(1753, 13, 13),
    828     /* SPEED_SPARE_19:14:14 */
    829     PHYMOD_SYMBOL_FIELD_ENCODE(1752, 14, 14),
    830     /* BAM_50G_BRCM_FEC_544_CR2_KR2:15:15 */
    831     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(319, 15, 15)
    832 };
    833 static uint32_t BCMI_TSCBH_XGXS_AN_X4_LD_UP1_ABIL1r_fields[] =
    834 {
    835     /* BAM_20G_KR1:1:1 */
    836     PHYMOD_SYMBOL_FIELD_ENCODE(309, 1, 1),
    837     /* BAM_20G_CR1:2:2 */
    838     PHYMOD_SYMBOL_FIELD_ENCODE(307, 2, 2),
    839     /* BAM_25G_KR1:3:3 */
    840     PHYMOD_SYMBOL_FIELD_ENCODE(312, 3, 3),
    841     /* BAM_25G_CR1:4:4 */
    842     PHYMOD_SYMBOL_FIELD_ENCODE(311, 4, 4),
    843     /* BAM_100G_BRCM_NO_FEC_X4:5:5 */
    844     PHYMOD_SYMBOL_FIELD_ENCODE(304, 5, 5),
    845     /* BAM_100G_BRCM_NO_FEC_KR2_CR2:6:6 */
    846     PHYMOD_SYMBOL_FIELD_ENCODE(303, 6, 6),
    847     /* BAM_100G_BRCM_FEC_528_KR2_CR2:7:7 */
    848     PHYMOD_SYMBOL_FIELD_ENCODE(301, 7, 7),
    849     /* BAM_100G_BRCM_KR4_CR4:8:8 */
    850     PHYMOD_SYMBOL_FIELD_ENCODE(302, 8, 8),
    851     /* BAM_200G_BRCM_KR4_CR4:9:9 */
    852     PHYMOD_SYMBOL_FIELD_ENCODE(305, 9, 9),
    853     /* BAM_200G_BRCM_NO_FEC_KR4_CR4:10:10 */
    854     PHYMOD_SYMBOL_FIELD_ENCODE(306, 10, 10),
    855     /* RS_FEC_REQ:12:13 */
    856     PHYMOD_SYMBOL_FIELD_ENCODE(1387, 13, 12),
    857     /* CL74_REQ:14:15 */
    858     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(505, 15, 14)
    859 };
    860 static uint32_t BCMI_TSCBH_XGXS_AN_X4_LP_BASE1r_fields[] =
    861 {
    862     /* LP_BASE1:0:15 */
    863     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(956, 15, 0)
    864 };
    865 static uint32_t BCMI_TSCBH_XGXS_AN_X4_LP_BASE2r_fields[] =
    866 {
    867     /* LP_BASE2:0:15 */
    868     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(957, 15, 0)
    869 };
    870 static uint32_t BCMI_TSCBH_XGXS_AN_X4_LP_BASE3r_fields[] =
    871 {
    872     /* LP_BASE3:0:15 */
    873     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(958, 15, 0)
    874 };
    875 static uint32_t BCMI_TSCBH_XGXS_AN_X4_LP_MP5_LWRr_fields[] =
    876 {
    877     /* MP5_15_0:0:15 */
    878     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1133, 15, 0)
    879 };
    880 static uint32_t BCMI_TSCBH_XGXS_AN_X4_LP_MP5_MIDDLEr_fields[] =
    881 {
    882     /* MP5_31_16:0:15 */
    883     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1134, 15, 0)
    884 };
    885 static uint32_t BCMI_TSCBH_XGXS_AN_X4_LP_MP5_UPRr_fields[] =
    886 {
    887     /* MP5_47_16:0:15 */
    888     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1135, 15, 0)
    889 };
    890 static uint32_t BCMI_TSCBH_XGXS_AN_X4_LP_PAGE0r_fields[] =
    891 {
    892     /* LP_PAGE_0:0:15 */
    893     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(959, 15, 0)
    894 };
    895 static uint32_t BCMI_TSCBH_XGXS_AN_X4_LP_PAGE1r_fields[] =
    896 {
    897     /* LP_PAGE_1:0:15 */
    898     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(960, 15, 0)
    899 };
    900 static uint32_t BCMI_TSCBH_XGXS_AN_X4_LP_PAGE2r_fields[] =
    901 {
    902     /* LP_PAGE_2:0:15 */
    903     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(961, 15, 0)
    904 };
    905 static uint32_t BCMI_TSCBH_XGXS_AN_X4_LP_UP_LWRr_fields[] =
    906 {
    907     /* UP_15_0:0:15 */
    908     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2069, 15, 0)
    909 };
    910 static uint32_t BCMI_TSCBH_XGXS_AN_X4_LP_UP_MIDDLEr_fields[] =
    911 {
    912     /* UP_31_16:0:15 */
    913     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2070, 15, 0)
    914 };
    915 static uint32_t BCMI_TSCBH_XGXS_AN_X4_LP_UP_UPRr_fields[] =
    916 {
    917     /* UP_47_32:0:15 */
    918     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2071, 15, 0)
    919 };
    920 static uint32_t BCMI_TSCBH_XGXS_AN_X4_PSEQ_STSr_fields[] =
    921 {
    922     /* HP_MODE:0:0 */
    923     PHYMOD_SYMBOL_FIELD_ENCODE(775, 0, 0),
    924     /* RX_BP:1:1 */
    925     PHYMOD_SYMBOL_FIELD_ENCODE(1582, 1, 1),
    926     /* RX_NP:2:2 */
    927     PHYMOD_SYMBOL_FIELD_ENCODE(1638, 2, 2),
    928     /* RX_MP_NULL:3:3 */
    929     PHYMOD_SYMBOL_FIELD_ENCODE(1634, 3, 3),
    930     /* RX_MP_OUI:4:4 */
    931     PHYMOD_SYMBOL_FIELD_ENCODE(1635, 4, 4),
    932     /* RX_MP_MISMATCH:5:5 */
    933     PHYMOD_SYMBOL_FIELD_ENCODE(1633, 5, 5),
    934     /* RX_UP_OUI_MISMATCH:6:6 */
    935     PHYMOD_SYMBOL_FIELD_ENCODE(1710, 6, 6),
    936     /* RX_UP_OUI_MATCH:7:7 */
    937     PHYMOD_SYMBOL_FIELD_ENCODE(1709, 7, 7),
    938     /* RX_INVALID_SEQ:8:8 */
    939     PHYMOD_SYMBOL_FIELD_ENCODE(1613, 8, 8),
    940     /* RX_NP_TOGGLE_ERR:9:9 */
    941     PHYMOD_SYMBOL_FIELD_ENCODE(1639, 9, 9),
    942     /* CL73_AN_COMPLETE:10:10 */
    943     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(490, 10, 10)
    944 };
    945 static uint32_t BCMI_TSCBH_XGXS_AN_X4_PXNG_STSr_fields[] =
    946 {
    947     /* CONSISTENCY_MISMATCH:0:0 */
    948     PHYMOD_SYMBOL_FIELD_ENCODE(530, 0, 0),
    949     /* COMPLETE_ACK:1:1 */
    950     PHYMOD_SYMBOL_FIELD_ENCODE(529, 1, 1),
    951     /* ACK_DETECT:2:2 */
    952     PHYMOD_SYMBOL_FIELD_ENCODE(1, 2, 2),
    953     /* ABILITY_DETECT:3:3 */
    954     PHYMOD_SYMBOL_FIELD_ENCODE(0, 3, 3),
    955     /* AN_ENABLE:4:4 */
    956     PHYMOD_SYMBOL_FIELD_ENCODE(285, 4, 4),
    957     /* ERROR_STATE:5:5 */
    958     PHYMOD_SYMBOL_FIELD_ENCODE(694, 5, 5),
    959     /* TRANSMIT_DISABLE:6:6 */
    960     PHYMOD_SYMBOL_FIELD_ENCODE(1834, 6, 6),
    961     /* NEXT_PAGE_WAIT:7:7 */
    962     PHYMOD_SYMBOL_FIELD_ENCODE(1140, 7, 7),
    963     /* AN_GOOD_CHECK:8:8 */
    964     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(288, 8, 8)
    965 };
    966 static uint32_t BCMI_TSCBH_XGXS_AN_X4_RES_ERRr_fields[] =
    967 {
    968     /* RESOLUTION_ERROR:0:0 */
    969     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1331, 0, 0)
    970 };
    971 static uint32_t BCMI_TSCBH_XGXS_AN_X4_R_CL73_STSr_fields[] =
    972 {
    973     /* DME_STATE:0:1 */
    974     PHYMOD_SYMBOL_FIELD_ENCODE(613, 1, 0),
    975     /* DME_PAGE:2:2 */
    976     PHYMOD_SYMBOL_FIELD_ENCODE(612, 2, 2),
    977     /* DME_MV_PAIR:3:3 */
    978     PHYMOD_SYMBOL_FIELD_ENCODE(611, 3, 3),
    979     /* CLK_TRANS_MISS:4:4 */
    980     PHYMOD_SYMBOL_FIELD_ENCODE(515, 4, 4),
    981     /* PAGE_TOO_LONG:5:5 */
    982     PHYMOD_SYMBOL_FIELD_ENCODE(1164, 5, 5),
    983     /* PAGE_TOO_SHORT:6:6 */
    984     PHYMOD_SYMBOL_FIELD_ENCODE(1165, 6, 6),
    985     /* PULSE_TOO_LONG:7:7 */
    986     PHYMOD_SYMBOL_FIELD_ENCODE(1313, 7, 7),
    987     /* PULSE_TOO_MODERATE:8:8 */
    988     PHYMOD_SYMBOL_FIELD_ENCODE(1314, 8, 8),
    989     /* PULSE_TOO_SHORT:9:9 */
    990     PHYMOD_SYMBOL_FIELD_ENCODE(1315, 9, 9),
    991     /* DME_LOCKED:10:10 */
    992     PHYMOD_SYMBOL_FIELD_ENCODE(610, 10, 10),
    993     /* CL73_FIFO_FULL:11:11 */
    994     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(498, 11, 11)
    995 };
    996 static uint32_t BCMI_TSCBH_XGXS_AN_X4_SW_AN_BASE_PAGE0r_fields[] =
    997 {
    998     /* SW_AN_BP_0:0:15 */
    999     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1759, 15, 0)
   1000 };
   1001 static uint32_t BCMI_TSCBH_XGXS_AN_X4_SW_AN_BASE_PAGE1r_fields[] =
   1002 {
   1003     /* SW_AN_BP_1:0:15 */
   1004     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1760, 15, 0)
   1005 };
   1006 static uint32_t BCMI_TSCBH_XGXS_AN_X4_SW_AN_BASE_PAGE2r_fields[] =
   1007 {
   1008     /* SW_AN_BP_2:0:15 */
   1009     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1761, 15, 0)
   1010 };
   1011 static uint32_t BCMI_TSCBH_XGXS_AN_X4_SW_CTL_STSr_fields[] =
   1012 {
   1013     /* TLA_LN_SEQUENCER_FSM_STATUS1:0:7 */
   1014     PHYMOD_SYMBOL_FIELD_ENCODE(1787, 7, 0),
   1015     /* LD_SEQ_RESTART:11:11 */
   1016     PHYMOD_SYMBOL_FIELD_ENCODE(812, 11, 11),
   1017     /* LP_PAGE_RDY:12:12 */
   1018     PHYMOD_SYMBOL_FIELD_ENCODE(962, 12, 12),
   1019     /* LD_CONTROL_VALID:14:14 */
   1020     PHYMOD_SYMBOL_FIELD_ENCODE(808, 14, 14),
   1021     /* AN_COMPLETED:15:15 */
   1022     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(282, 15, 15)
   1023 };
   1024 static uint32_t BCMI_TSCBH_XGXS_AN_X4_TLA_SEQUENCER_STSr_fields[] =
   1025 {
   1026     /* TLA_SEQ_FSM_STATUS:0:15 */
   1027     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1788, 15, 0)
   1028 };
   1029 static uint32_t BCMI_TSCBH_XGXS_AN_X4_WAIT_ACK_COMPLETEr_fields[] =
   1030 {
   1031     /* WAIT_FOR_ACK_EN:0:0 */
   1032     PHYMOD_SYMBOL_FIELD_ENCODE(2080, 0, 0),
   1033     /* SEND_ACK:1:1 */
   1034     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1727, 1, 1)
   1035 };
   1036 static uint32_t BCMI_TSCBH_XGXS_CORE_PLL_CORE_PLL_COM_STS2r_fields[] =
   1037 {
   1038     /* PLL_PWRDN_OR:0:0 */
   1039     PHYMOD_SYMBOL_FIELD_ENCODE(1224, 0, 0),
   1040     /* REFCLK_LOC:1:1 */
   1041     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1320, 1, 1)
   1042 };
   1043 static uint32_t BCMI_TSCBH_XGXS_CORE_PLL_PLL_CFG_FWAPI_DATA0r_fields[] =
   1044 {
   1045     /* PLL_CFG_FWAPI_DATA0:0:15 */
   1046     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1210, 15, 0)
   1047 };
   1048 static uint32_t BCMI_TSCBH_XGXS_CORE_PLL_PLL_CFG_FWAPI_DATA1r_fields[] =
   1049 {
   1050     /* PLL_CFG_FWAPI_DATA1:0:15 */
   1051     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1211, 15, 0)
   1052 };
   1053 static uint32_t BCMI_TSCBH_XGXS_CORE_PLL_PLL_DP_RST_ST_STSr_fields[] =
   1054 {
   1055     /* CORE_DP_RESET_STATE:0:2 */
   1056     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(535, 2, 0)
   1057 };
   1058 static uint32_t BCMI_TSCBH_XGXS_CORE_PLL_PMD_CORE_MODE_STSr_fields[] =
   1059 {
   1060     /* PMD_CORE_MODE:0:15 */
   1061     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1233, 15, 0)
   1062 };
   1063 static uint32_t BCMI_TSCBH_XGXS_CORE_PLL_RST_CTL_PLL_DPr_fields[] =
   1064 {
   1065     /* PMD_CORE_DP_H_RSTB_PKILL:1:1 */
   1066     PHYMOD_SYMBOL_FIELD_ENCODE(1232, 1, 1),
   1067     /* REFCLK_LOC_MON_EN:2:2 */
   1068     PHYMOD_SYMBOL_FIELD_ENCODE(1321, 2, 2),
   1069     /* REFCLK_S_COMCLK_SEL:3:3 */
   1070     PHYMOD_SYMBOL_FIELD_ENCODE(1324, 3, 3),
   1071     /* REFCLK_S_COMCLK_FRC_ON:4:4 */
   1072     PHYMOD_SYMBOL_FIELD_ENCODE(1323, 4, 4),
   1073     /* VCOCLK4PCS_S_COMCLK_SEL:7:7 */
   1074     PHYMOD_SYMBOL_FIELD_ENCODE(2073, 7, 7),
   1075     /* VCOCLK4PCS_S_COMCLK_FRC_ON:8:8 */
   1076     PHYMOD_SYMBOL_FIELD_ENCODE(2072, 8, 8),
   1077     /* PMD_VCOCLK4PCS_VLD_FRC:9:9 */
   1078     PHYMOD_SYMBOL_FIELD_ENCODE(1253, 9, 9),
   1079     /* PMD_VCOCLK4PCS_VLD_FRC_VAL:10:10 */
   1080     PHYMOD_SYMBOL_FIELD_ENCODE(1254, 10, 10),
   1081     /* AFE_S_PLL_RESET_FRC_VAL:12:12 */
   1082     PHYMOD_SYMBOL_FIELD_ENCODE(20, 12, 12),
   1083     /* AFE_S_PLL_RESET_FRC:13:13 */
   1084     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(19, 13, 13)
   1085 };
   1086 static uint32_t BCMI_TSCBH_XGXS_CORE_PLL_TOP_USER_CTLr_fields[] =
   1087 {
   1088     /* CORE_DP_S_RSTB:13:13 */
   1089     PHYMOD_SYMBOL_FIELD_ENCODE(536, 13, 13),
   1090     /* AFE_S_PLL_PWRDN:14:14 */
   1091     PHYMOD_SYMBOL_FIELD_ENCODE(18, 14, 14),
   1092     /* CORE_HW_FW_HANDSHAKE_DISABLE:15:15 */
   1093     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(537, 15, 15)
   1094 };
   1095 static uint32_t BCMI_TSCBH_XGXS_CORE_PLL_UC_ACK_CORE_CTLr_fields[] =
   1096 {
   1097     /* UC_ACK_CORE_CFG_DONE:0:0 */
   1098     PHYMOD_SYMBOL_FIELD_ENCODE(2042, 0, 0),
   1099     /* UC_ACK_CORE_DP_RESET:1:1 */
   1100     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2043, 1, 1)
   1101 };
   1102 static uint32_t BCMI_TSCBH_XGXS_DAC_TEST_COM_DAC_TEST_CTLr_fields[] =
   1103 {
   1104     /* DAC_TEST_LANE_SEL_EN:0:7 */
   1105     PHYMOD_SYMBOL_FIELD_ENCODE(545, 7, 0),
   1106     /* DAC_TEST_TEST_EN:8:8 */
   1107     PHYMOD_SYMBOL_FIELD_ENCODE(560, 8, 8),
   1108     /* DAC_TEST_READ_EN:9:9 */
   1109     PHYMOD_SYMBOL_FIELD_ENCODE(559, 9, 9),
   1110     /* DAC_TEST_READBACK_EN:10:10 */
   1111     PHYMOD_SYMBOL_FIELD_ENCODE(558, 10, 10),
   1112     /* DAC_TEST_MEM_WRITE_PULSE:11:11 */
   1113     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(547, 11, 11)
   1114 };
   1115 static uint32_t BCMI_TSCBH_XGXS_DAC_TEST_COM_DAC_TEST_MEM_TESTr_fields[] =
   1116 {
   1117     /* DAC_TEST_MEM_TM:0:4 */
   1118     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(546, 4, 0)
   1119 };
   1120 static uint32_t BCMI_TSCBH_XGXS_DAC_TEST_COM_READBACK_ADDRr_fields[] =
   1121 {
   1122     /* DAC_TEST_READBACK_ADDRESS:0:5 */
   1123     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(548, 5, 0)
   1124 };
   1125 static uint32_t BCMI_TSCBH_XGXS_DAC_TEST_COM_READBACK_DATA0r_fields[] =
   1126 {
   1127     /* DAC_TEST_READBACK_DATA_0:0:15 */
   1128     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(549, 15, 0)
   1129 };
   1130 static uint32_t BCMI_TSCBH_XGXS_DAC_TEST_COM_READBACK_DATA1r_fields[] =
   1131 {
   1132     /* DAC_TEST_READBACK_DATA_1:0:15 */
   1133     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(550, 15, 0)
   1134 };
   1135 static uint32_t BCMI_TSCBH_XGXS_DAC_TEST_COM_READBACK_DATA2r_fields[] =
   1136 {
   1137     /* DAC_TEST_READBACK_DATA_2:0:15 */
   1138     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(551, 15, 0)
   1139 };
   1140 static uint32_t BCMI_TSCBH_XGXS_DAC_TEST_COM_READBACK_DATA3r_fields[] =
   1141 {
   1142     /* DAC_TEST_READBACK_DATA_3:0:15 */
   1143     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(552, 15, 0)
   1144 };
   1145 static uint32_t BCMI_TSCBH_XGXS_DAC_TEST_COM_READBACK_DATA4r_fields[] =
   1146 {
   1147     /* DAC_TEST_READBACK_DATA_4:0:15 */
   1148     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(553, 15, 0)
   1149 };
   1150 static uint32_t BCMI_TSCBH_XGXS_DAC_TEST_COM_READBACK_DATA5r_fields[] =
   1151 {
   1152     /* DAC_TEST_READBACK_DATA_5:0:15 */
   1153     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(554, 15, 0)
   1154 };
   1155 static uint32_t BCMI_TSCBH_XGXS_DAC_TEST_COM_READBACK_DATA6r_fields[] =
   1156 {
   1157     /* DAC_TEST_READBACK_DATA_6:0:15 */
   1158     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(555, 15, 0)
   1159 };
   1160 static uint32_t BCMI_TSCBH_XGXS_DAC_TEST_COM_READBACK_DATA7r_fields[] =
   1161 {
   1162     /* DAC_TEST_READBACK_DATA_7:0:15 */
   1163     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(556, 15, 0)
   1164 };
   1165 static uint32_t BCMI_TSCBH_XGXS_DAC_TEST_COM_READBACK_DATA8r_fields[] =
   1166 {
   1167     /* DAC_TEST_READBACK_DATA_8:0:11 */
   1168     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(557, 11, 0)
   1169 };
   1170 static uint32_t BCMI_TSCBH_XGXS_DIG_COM_B_CTL_CLK4SYNC_DIV2_0r_fields[] =
   1171 {
   1172     /* CLK4SYNC_DIV2_EN:0:0 */
   1173     PHYMOD_SYMBOL_FIELD_ENCODE(509, 0, 0),
   1174     /* CLK4SYNC_DIV2_VCO_SELECT:4:4 */
   1175     PHYMOD_SYMBOL_FIELD_ENCODE(514, 4, 4),
   1176     /* CLK4SYNC_DIV2_LOC_MON_EN:5:5 */
   1177     PHYMOD_SYMBOL_FIELD_ENCODE(511, 5, 5),
   1178     /* CLK4SYNC_DIV2_S_COMCLK_SEL:6:6 */
   1179     PHYMOD_SYMBOL_FIELD_ENCODE(513, 6, 6),
   1180     /* CLK4SYNC_DIV2_S_COMCLK_FRC_ON:7:7 */
   1181     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(512, 7, 7)
   1182 };
   1183 static uint32_t BCMI_TSCBH_XGXS_DIG_COM_B_CTL_UC_CLK0r_fields[] =
   1184 {
   1185     /* MICRO_CLK_VCO_DIV:0:2 */
   1186     PHYMOD_SYMBOL_FIELD_ENCODE(992, 2, 0),
   1187     /* MICRO_CLK_VCO_SELECT:4:4 */
   1188     PHYMOD_SYMBOL_FIELD_ENCODE(993, 4, 4),
   1189     /* MICRO_CLK_LOC_MON_EN:5:5 */
   1190     PHYMOD_SYMBOL_FIELD_ENCODE(989, 5, 5),
   1191     /* MICRO_CLK_S_COMCLK_SEL:6:6 */
   1192     PHYMOD_SYMBOL_FIELD_ENCODE(991, 6, 6),
   1193     /* MICRO_CLK_S_COMCLK_FRC_ON:7:7 */
   1194     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(990, 7, 7)
   1195 };
   1196 static uint32_t BCMI_TSCBH_XGXS_DIG_COM_B_STS_CLK4SYNC_DIV2_0r_fields[] =
   1197 {
   1198     /* CLK4SYNC_DIV2_COMCLK_SEL:0:0 */
   1199     PHYMOD_SYMBOL_FIELD_ENCODE(508, 0, 0),
   1200     /* CLK4SYNC_DIV2_LOC:1:1 */
   1201     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(510, 1, 1)
   1202 };
   1203 static uint32_t BCMI_TSCBH_XGXS_DIG_COM_B_STS_UC_CLK0r_fields[] =
   1204 {
   1205     /* MICRO_CLK_COMCLK_SEL:0:0 */
   1206     PHYMOD_SYMBOL_FIELD_ENCODE(987, 0, 0),
   1207     /* MICRO_CLK_LOC:1:1 */
   1208     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(988, 1, 1)
   1209 };
   1210 static uint32_t BCMI_TSCBH_XGXS_DIG_CORE_DP_RST_ST_STSr_fields[] =
   1211 {
   1212     /* TX_LANE_RESET_RELEASED_INDEX:3:7 */
   1213     PHYMOD_SYMBOL_FIELD_ENCODE(1963, 7, 3),
   1214     /* LANE_RESET_RELEASED_INDEX:8:12 */
   1215     PHYMOD_SYMBOL_FIELD_ENCODE(807, 12, 8),
   1216     /* LANE_RESET_RELEASED:14:14 */
   1217     PHYMOD_SYMBOL_FIELD_ENCODE(806, 14, 14),
   1218     /* TX_LANE_RESET_RELEASED:15:15 */
   1219     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1962, 15, 15)
   1220 };
   1221 static uint32_t BCMI_TSCBH_XGXS_DIG_CORE_RST_OCC_CTLr_fields[] =
   1222 {
   1223     /* CORE_REG_RESET_OCCURRED:0:0 */
   1224     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(540, 0, 0)
   1225 };
   1226 static uint32_t BCMI_TSCBH_XGXS_DIG_MASKDATAr_fields[] =
   1227 {
   1228     /* MASKDATA:0:15 */
   1229     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(966, 15, 0)
   1230 };
   1231 static uint32_t BCMI_TSCBH_XGXS_DIG_REVID0r_fields[] =
   1232 {
   1233     /* REVID_MODEL:0:5 */
   1234     PHYMOD_SYMBOL_FIELD_ENCODE(1349, 5, 0),
   1235     /* REVID_PROCESS:6:8 */
   1236     PHYMOD_SYMBOL_FIELD_ENCODE(1352, 8, 6),
   1237     /* REVID_BONDING:9:10 */
   1238     PHYMOD_SYMBOL_FIELD_ENCODE(1343, 10, 9),
   1239     /* REVID_REV_NUMBER:11:13 */
   1240     PHYMOD_SYMBOL_FIELD_ENCODE(1354, 13, 11),
   1241     /* REVID_REV_LETTER:14:15 */
   1242     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1353, 15, 14)
   1243 };
   1244 static uint32_t BCMI_TSCBH_XGXS_DIG_REVID1r_fields[] =
   1245 {
   1246     /* REVID_EEE:0:0 */
   1247     PHYMOD_SYMBOL_FIELD_ENCODE(1345, 0, 0),
   1248     /* REVID_LLP:1:1 */
   1249     PHYMOD_SYMBOL_FIELD_ENCODE(1346, 1, 1),
   1250     /* REVID_PIR:2:2 */
   1251     PHYMOD_SYMBOL_FIELD_ENCODE(1351, 2, 2),
   1252     /* REVID_CL72:3:3 */
   1253     PHYMOD_SYMBOL_FIELD_ENCODE(1344, 3, 3),
   1254     /* REVID_MICRO:4:4 */
   1255     PHYMOD_SYMBOL_FIELD_ENCODE(1348, 4, 4),
   1256     /* REVID_MDIO:5:5 */
   1257     PHYMOD_SYMBOL_FIELD_ENCODE(1347, 5, 5),
   1258     /* REVID_MULTIPLICITY:12:15 */
   1259     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1350, 15, 12)
   1260 };
   1261 static uint32_t BCMI_TSCBH_XGXS_DIG_REVID2r_fields[] =
   1262 {
   1263     /* REVID2:0:3 */
   1264     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1342, 3, 0)
   1265 };
   1266 static uint32_t BCMI_TSCBH_XGXS_DIG_RST_CTL_CORE_DPr_fields[] =
   1267 {
   1268     /* SUP_RST_SEQ_FRC_VAL:3:3 */
   1269     PHYMOD_SYMBOL_FIELD_ENCODE(1758, 3, 3),
   1270     /* SUP_RST_SEQ_FRC:4:4 */
   1271     PHYMOD_SYMBOL_FIELD_ENCODE(1757, 4, 4),
   1272     /* PMD_MDIO_TRANS_PKILL:5:5 */
   1273     PHYMOD_SYMBOL_FIELD_ENCODE(1242, 5, 5),
   1274     /* DISABLE_ACK_TIMEOUT:15:15 */
   1275     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(608, 15, 15)
   1276 };
   1277 static uint32_t BCMI_TSCBH_XGXS_DIG_RST_CTL_PMDr_fields[] =
   1278 {
   1279     /* CORE_S_RSTB:0:0 */
   1280     PHYMOD_SYMBOL_FIELD_ENCODE(541, 0, 0),
   1281     /* UC_ACTIVE:1:1 */
   1282     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2049, 1, 1)
   1283 };
   1284 static uint32_t BCMI_TSCBH_XGXS_DIG_RST_SEQ_TMR_CTLr_fields[] =
   1285 {
   1286     /* RST_SEQ_TIMER:0:2 */
   1287     PHYMOD_SYMBOL_FIELD_ENCODE(1365, 2, 0),
   1288     /* PWRDN_SEQ_TIMER:8:10 */
   1289     PHYMOD_SYMBOL_FIELD_ENCODE(1316, 10, 8),
   1290     /* RST_SEQ_DIS_FLT_MODE:14:15 */
   1291     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1364, 15, 14)
   1292 };
   1293 static uint32_t BCMI_TSCBH_XGXS_DIG_TOP_USER_CTL0r_fields[] =
   1294 {
   1295     /* HEARTBEAT_COUNT_1US:0:9 */
   1296     PHYMOD_SYMBOL_FIELD_ENCODE(763, 9, 0),
   1297     /* MASKDATA_BUS_ASSIGN:10:10 */
   1298     PHYMOD_SYMBOL_FIELD_ENCODE(967, 10, 10),
   1299     /* MDIO_FAST_MODE_FRC_VAL:11:11 */
   1300     PHYMOD_SYMBOL_FIELD_ENCODE(979, 11, 11),
   1301     /* MDIO_FAST_MODE_FRC:12:12 */
   1302     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(978, 12, 12)
   1303 };
   1304 static uint32_t BCMI_TSCBH_XGXS_DSC_AUTO_DATA05_UPD_CTLr_fields[] =
   1305 {
   1306     /* RX_DATA05_NUMERATOR:0:5 */
   1307     PHYMOD_SYMBOL_FIELD_ENCODE(1590, 5, 0),
   1308     /* RX_DATA05_THRESH_STEP_SIZE:6:10 */
   1309     PHYMOD_SYMBOL_FIELD_ENCODE(1593, 10, 6),
   1310     /* RX_DATA05_INIT_PHASE:11:15 */
   1311     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1588, 15, 11)
   1312 };
   1313 static uint32_t BCMI_TSCBH_XGXS_DSC_AUTO_DATA14_UPD_CTLr_fields[] =
   1314 {
   1315     /* RX_DATA14_NUMERATOR:0:5 */
   1316     PHYMOD_SYMBOL_FIELD_ENCODE(1596, 5, 0),
   1317     /* RX_DATA14_THRESH_STEP_SIZE:6:10 */
   1318     PHYMOD_SYMBOL_FIELD_ENCODE(1599, 10, 6),
   1319     /* RX_DATA14_INIT_PHASE:11:15 */
   1320     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1594, 15, 11)
   1321 };
   1322 static uint32_t BCMI_TSCBH_XGXS_DSC_AUTO_DATA23_UPD_CTLr_fields[] =
   1323 {
   1324     /* RX_DATA23_NUMERATOR:0:5 */
   1325     PHYMOD_SYMBOL_FIELD_ENCODE(1602, 5, 0),
   1326     /* RX_DATA23_THRESH_STEP_SIZE:6:10 */
   1327     PHYMOD_SYMBOL_FIELD_ENCODE(1605, 10, 6),
   1328     /* RX_DATA23_INIT_PHASE:11:15 */
   1329     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1600, 15, 11)
   1330 };
   1331 static uint32_t BCMI_TSCBH_XGXS_DSC_AUTO_PHASE02_UPD_CTLr_fields[] =
   1332 {
   1333     /* RX_PHASE02_NUMERATOR:0:5 */
   1334     PHYMOD_SYMBOL_FIELD_ENCODE(1655, 5, 0),
   1335     /* RX_PHASE02_THRESH_STEP_SIZE:6:10 */
   1336     PHYMOD_SYMBOL_FIELD_ENCODE(1658, 10, 6),
   1337     /* RX_PHASE02_INIT_PHASE:11:15 */
   1338     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1653, 15, 11)
   1339 };
   1340 static uint32_t BCMI_TSCBH_XGXS_DSC_AUTO_PHASE1_UPD_CTLr_fields[] =
   1341 {
   1342     /* RX_PHASE1_NUMERATOR:0:5 */
   1343     PHYMOD_SYMBOL_FIELD_ENCODE(1661, 5, 0),
   1344     /* RX_PHASE1_THRESH_STEP_SIZE:6:10 */
   1345     PHYMOD_SYMBOL_FIELD_ENCODE(1664, 10, 6),
   1346     /* RX_PHASE1_INIT_PHASE:11:15 */
   1347     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1659, 15, 11)
   1348 };
   1349 static uint32_t BCMI_TSCBH_XGXS_DSC_AUTO_RXA_DFE_TAP2_UPD_CTLr_fields[] =
   1350 {
   1351     /* RXA_DFE_TAP2_NUMERATOR:0:5 */
   1352     PHYMOD_SYMBOL_FIELD_ENCODE(1400, 5, 0),
   1353     /* RXA_DFE_TAP2_THRESH_STEP_SIZE:6:10 */
   1354     PHYMOD_SYMBOL_FIELD_ENCODE(1403, 10, 6),
   1355     /* RXA_DFE_TAP2_INIT_PHASE:11:15 */
   1356     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1398, 15, 11)
   1357 };
   1358 static uint32_t BCMI_TSCBH_XGXS_DSC_AUTO_RXA_DFE_TAP3_UPD_CTLr_fields[] =
   1359 {
   1360     /* RXA_DFE_TAP3_NUMERATOR:0:5 */
   1361     PHYMOD_SYMBOL_FIELD_ENCODE(1408, 5, 0),
   1362     /* RXA_DFE_TAP3_THRESH_STEP_SIZE:6:10 */
   1363     PHYMOD_SYMBOL_FIELD_ENCODE(1411, 10, 6),
   1364     /* RXA_DFE_TAP3_INIT_PHASE:11:15 */
   1365     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1406, 15, 11)
   1366 };
   1367 static uint32_t BCMI_TSCBH_XGXS_DSC_AUTO_RXB_DFE_TAP2_UPD_CTLr_fields[] =
   1368 {
   1369     /* RXB_DFE_TAP2_NUMERATOR:0:5 */
   1370     PHYMOD_SYMBOL_FIELD_ENCODE(1447, 5, 0),
   1371     /* RXB_DFE_TAP2_THRESH_STEP_SIZE:6:10 */
   1372     PHYMOD_SYMBOL_FIELD_ENCODE(1450, 10, 6),
   1373     /* RXB_DFE_TAP2_INIT_PHASE:11:15 */
   1374     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1445, 15, 11)
   1375 };
   1376 static uint32_t BCMI_TSCBH_XGXS_DSC_AUTO_RXB_DFE_TAP3_UPD_CTLr_fields[] =
   1377 {
   1378     /* RXB_DFE_TAP3_NUMERATOR:0:5 */
   1379     PHYMOD_SYMBOL_FIELD_ENCODE(1455, 5, 0),
   1380     /* RXB_DFE_TAP3_THRESH_STEP_SIZE:6:10 */
   1381     PHYMOD_SYMBOL_FIELD_ENCODE(1458, 10, 6),
   1382     /* RXB_DFE_TAP3_INIT_PHASE:11:15 */
   1383     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1453, 15, 11)
   1384 };
   1385 static uint32_t BCMI_TSCBH_XGXS_DSC_AUTO_RXC_DFE_TAP2_UPD_CTLr_fields[] =
   1386 {
   1387     /* RXC_DFE_TAP2_NUMERATOR:0:5 */
   1388     PHYMOD_SYMBOL_FIELD_ENCODE(1494, 5, 0),
   1389     /* RXC_DFE_TAP2_THRESH_STEP_SIZE:6:10 */
   1390     PHYMOD_SYMBOL_FIELD_ENCODE(1497, 10, 6),
   1391     /* RXC_DFE_TAP2_INIT_PHASE:11:15 */
   1392     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1492, 15, 11)
   1393 };
   1394 static uint32_t BCMI_TSCBH_XGXS_DSC_AUTO_RXC_DFE_TAP3_UPD_CTLr_fields[] =
   1395 {
   1396     /* RXC_DFE_TAP3_NUMERATOR:0:5 */
   1397     PHYMOD_SYMBOL_FIELD_ENCODE(1502, 5, 0),
   1398     /* RXC_DFE_TAP3_THRESH_STEP_SIZE:6:10 */
   1399     PHYMOD_SYMBOL_FIELD_ENCODE(1505, 10, 6),
   1400     /* RXC_DFE_TAP3_INIT_PHASE:11:15 */
   1401     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1500, 15, 11)
   1402 };
   1403 static uint32_t BCMI_TSCBH_XGXS_DSC_AUTO_RXD_DFE_TAP2_UPD_CTLr_fields[] =
   1404 {
   1405     /* RXD_DFE_TAP2_NUMERATOR:0:5 */
   1406     PHYMOD_SYMBOL_FIELD_ENCODE(1541, 5, 0),
   1407     /* RXD_DFE_TAP2_THRESH_STEP_SIZE:6:10 */
   1408     PHYMOD_SYMBOL_FIELD_ENCODE(1544, 10, 6),
   1409     /* RXD_DFE_TAP2_INIT_PHASE:11:15 */
   1410     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1539, 15, 11)
   1411 };
   1412 static uint32_t BCMI_TSCBH_XGXS_DSC_AUTO_RXD_DFE_TAP3_UPD_CTLr_fields[] =
   1413 {
   1414     /* RXD_DFE_TAP3_NUMERATOR:0:5 */
   1415     PHYMOD_SYMBOL_FIELD_ENCODE(1549, 5, 0),
   1416     /* RXD_DFE_TAP3_THRESH_STEP_SIZE:6:10 */
   1417     PHYMOD_SYMBOL_FIELD_ENCODE(1552, 10, 6),
   1418     /* RXD_DFE_TAP3_INIT_PHASE:11:15 */
   1419     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1547, 15, 11)
   1420 };
   1421 static uint32_t BCMI_TSCBH_XGXS_DSC_BLW_CTL1r_fields[] =
   1422 {
   1423     /* BLW_LPF_COEF_MANT:0:5 */
   1424     PHYMOD_SYMBOL_FIELD_ENCODE(421, 5, 0),
   1425     /* BLW_SPARE_CNTL_0:6:7 */
   1426     PHYMOD_SYMBOL_FIELD_ENCODE(430, 7, 6),
   1427     /* BLW_LPF_COEF_EXP:8:9 */
   1428     PHYMOD_SYMBOL_FIELD_ENCODE(420, 9, 8),
   1429     /* BLW_MAX_AMP_SEL:10:10 */
   1430     PHYMOD_SYMBOL_FIELD_ENCODE(424, 10, 10),
   1431     /* BLW_RESET:11:11 */
   1432     PHYMOD_SYMBOL_FIELD_ENCODE(429, 11, 11),
   1433     /* BLW_OUTPUT_INVERT:12:12 */
   1434     PHYMOD_SYMBOL_FIELD_ENCODE(426, 12, 12),
   1435     /* BLW_PHASE_SLICER_INVERT:13:13 */
   1436     PHYMOD_SYMBOL_FIELD_ENCODE(428, 13, 13),
   1437     /* BLW_GAIN_FRZ:14:14 */
   1438     PHYMOD_SYMBOL_FIELD_ENCODE(415, 14, 14),
   1439     /* BLW_EN:15:15 */
   1440     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(411, 15, 15)
   1441 };
   1442 static uint32_t BCMI_TSCBH_XGXS_DSC_BLW_CTL2r_fields[] =
   1443 {
   1444     /* BLW_OUTPUT_SCALE:0:2 */
   1445     PHYMOD_SYMBOL_FIELD_ENCODE(427, 2, 0),
   1446     /* DC_OFFS_INT_READ_EN:3:3 */
   1447     PHYMOD_SYMBOL_FIELD_ENCODE(583, 3, 3),
   1448     /* BLW_TRNSUM_SEL:4:5 */
   1449     PHYMOD_SYMBOL_FIELD_ENCODE(431, 5, 4),
   1450     /* BLW_MAX_AMP_CLR:6:6 */
   1451     PHYMOD_SYMBOL_FIELD_ENCODE(423, 6, 6),
   1452     /* BLW_2X_MODE:7:7 */
   1453     PHYMOD_SYMBOL_FIELD_ENCODE(410, 7, 7),
   1454     /* BLW_MU_DLY_MODE:8:9 */
   1455     PHYMOD_SYMBOL_FIELD_ENCODE(425, 9, 8),
   1456     /* BLW_LMS_MU:10:11 */
   1457     PHYMOD_SYMBOL_FIELD_ENCODE(419, 11, 10),
   1458     /* BLW_GAIN_SCALE:12:13 */
   1459     PHYMOD_SYMBOL_FIELD_ENCODE(418, 13, 12),
   1460     /* DC_OFFS_DAC_INTEG_EN:14:14 */
   1461     PHYMOD_SYMBOL_FIELD_ENCODE(577, 14, 14),
   1462     /* DC_OFFS_DAC_8B_EN:15:15 */
   1463     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(576, 15, 15)
   1464 };
   1465 static uint32_t BCMI_TSCBH_XGXS_DSC_BLW_CTL3r_fields[] =
   1466 {
   1467     /* BLW_GAIN_FRC_VAL:0:14 */
   1468     PHYMOD_SYMBOL_FIELD_ENCODE(414, 14, 0),
   1469     /* BLW_GAIN_FRC:15:15 */
   1470     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(413, 15, 15)
   1471 };
   1472 static uint32_t BCMI_TSCBH_XGXS_DSC_BLW_CTL4r_fields[] =
   1473 {
   1474     /* BLW_GAIN_SAT_HIGH:0:15 */
   1475     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(416, 15, 0)
   1476 };
   1477 static uint32_t BCMI_TSCBH_XGXS_DSC_BLW_CTL5r_fields[] =
   1478 {
   1479     /* BLW_GAIN_SAT_LOW:0:15 */
   1480     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(417, 15, 0)
   1481 };
   1482 static uint32_t BCMI_TSCBH_XGXS_DSC_BLW_STS_1_TYPEr_fields[] =
   1483 {
   1484     /* BLW_GAIN:0:14 */
   1485     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(412, 14, 0)
   1486 };
   1487 static uint32_t BCMI_TSCBH_XGXS_DSC_BLW_STS_2_TYPEr_fields[] =
   1488 {
   1489     /* BLW_MAX_AMP:0:7 */
   1490     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(422, 7, 0)
   1491 };
   1492 static uint32_t BCMI_TSCBH_XGXS_DSC_CDR_1G_STSr_fields[] =
   1493 {
   1494     /* CDR_1G_PHASE_POINTER:0:7 */
   1495     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(455, 7, 0)
   1496 };
   1497 static uint32_t BCMI_TSCBH_XGXS_DSC_CDR_CTL0r_fields[] =
   1498 {
   1499     /* OS_ALL_EDGES:0:0 */
   1500     PHYMOD_SYMBOL_FIELD_ENCODE(1160, 0, 0),
   1501     /* OS_PATTERN_ENHANCED:1:1 */
   1502     PHYMOD_SYMBOL_FIELD_ENCODE(1161, 1, 1),
   1503     /* BR_PD_EN:2:2 */
   1504     PHYMOD_SYMBOL_FIELD_ENCODE(433, 2, 2),
   1505     /* CDR_FREQ_EN:3:3 */
   1506     PHYMOD_SYMBOL_FIELD_ENCODE(463, 3, 3),
   1507     /* CDR_HS_FREEZE:4:4 */
   1508     PHYMOD_SYMBOL_FIELD_ENCODE(468, 4, 4),
   1509     /* CDR_INTEG_REG_CLR:5:5 */
   1510     PHYMOD_SYMBOL_FIELD_ENCODE(470, 5, 5),
   1511     /* CDR_PHASE_ERR_FRZ:6:6 */
   1512     PHYMOD_SYMBOL_FIELD_ENCODE(475, 6, 6),
   1513     /* CDR_INTEG_SAT_SEL:7:7 */
   1514     PHYMOD_SYMBOL_FIELD_ENCODE(471, 7, 7),
   1515     /* CDR_FREQ_OVERRIDE_EN:8:8 */
   1516     PHYMOD_SYMBOL_FIELD_ENCODE(464, 8, 8),
   1517     /* CDR_ZERO_POLARITY:9:9 */
   1518     PHYMOD_SYMBOL_FIELD_ENCODE(483, 9, 9),
   1519     /* PAM4_CDR_PROP_BW_EXT:10:10 */
   1520     PHYMOD_SYMBOL_FIELD_ENCODE(1166, 10, 10),
   1521     /* PHASE_ERR_OFFSET_MULT2:11:11 */
   1522     PHYMOD_SYMBOL_FIELD_ENCODE(1202, 11, 11),
   1523     /* RX_PAM4ES_PREC_DISABLED:12:12 */
   1524     PHYMOD_SYMBOL_FIELD_ENCODE(1645, 12, 12),
   1525     /* RX_NRZ_VSR_MODE:14:14 */
   1526     PHYMOD_SYMBOL_FIELD_ENCODE(1640, 14, 14),
   1527     /* RX_PAM4_ES_MODE:15:15 */
   1528     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1646, 15, 15)
   1529 };
   1530 static uint32_t BCMI_TSCBH_XGXS_DSC_CDR_CTL1r_fields[] =
   1531 {
   1532     /* CDR_PHASE_SEL:0:2 */
   1533     PHYMOD_SYMBOL_FIELD_ENCODE(478, 2, 0),
   1534     /* CDR_POWER_OPT_CLOCK_GATE_EN:4:4 */
   1535     PHYMOD_SYMBOL_FIELD_ENCODE(479, 4, 4),
   1536     /* CDR_FREQ_OVERRIDE_VAL:5:15 */
   1537     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(465, 15, 5)
   1538 };
   1539 static uint32_t BCMI_TSCBH_XGXS_DSC_CDR_CTL2r_fields[] =
   1540 {
   1541     /* CDR_LM_THR_SEL:0:2 */
   1542     PHYMOD_SYMBOL_FIELD_ENCODE(473, 2, 0),
   1543     /* CDR_1G_SWAP_PZ:4:4 */
   1544     PHYMOD_SYMBOL_FIELD_ENCODE(456, 4, 4),
   1545     /* CDR_1G_FORCE_EN:5:5 */
   1546     PHYMOD_SYMBOL_FIELD_ENCODE(452, 5, 5),
   1547     /* TX_PI_LOOP_TIMING_SRC_SEL:6:6 */
   1548     PHYMOD_SYMBOL_FIELD_ENCODE(2009, 6, 6),
   1549     /* PHS_SUM_IGNORE_DSC_LOCK:7:7 */
   1550     PHYMOD_SYMBOL_FIELD_ENCODE(1203, 7, 7),
   1551     /* CDR_1G_MANUAL_MODE:8:8 */
   1552     PHYMOD_SYMBOL_FIELD_ENCODE(453, 8, 8),
   1553     /* CDR_1G_MANUAL_STROBE:9:9 */
   1554     PHYMOD_SYMBOL_FIELD_ENCODE(454, 9, 9),
   1555     /* CDR_PROP_BW_EXTEND:10:10 */
   1556     PHYMOD_SYMBOL_FIELD_ENCODE(480, 10, 10),
   1557     /* RX_PHASE_SUM_ACC_MODE:11:13 */
   1558     PHYMOD_SYMBOL_FIELD_ENCODE(1665, 13, 11),
   1559     /* CDR_PHASE_SAT_CTRL:14:14 */
   1560     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(477, 14, 14)
   1561 };
   1562 static uint32_t BCMI_TSCBH_XGXS_DSC_CDR_STS_INTEGr_fields[] =
   1563 {
   1564     /* CDR_INTEG_REG:0:15 */
   1565     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(469, 15, 0)
   1566 };
   1567 static uint32_t BCMI_TSCBH_XGXS_DSC_CDR_STS_PHASE_ERRr_fields[] =
   1568 {
   1569     /* CDR_PHASE_ERROR:0:5 */
   1570     PHYMOD_SYMBOL_FIELD_ENCODE(474, 5, 0),
   1571     /* CDR_LM_OUTOFLOCK:8:8 */
   1572     PHYMOD_SYMBOL_FIELD_ENCODE(472, 8, 8),
   1573     /* CDR_VCO_REG:12:15 */
   1574     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(482, 15, 12)
   1575 };
   1576 static uint32_t BCMI_TSCBH_XGXS_DSC_DC_OFFS_CTLr_fields[] =
   1577 {
   1578     /* DC_OFFS_EN:0:0 */
   1579     PHYMOD_SYMBOL_FIELD_ENCODE(578, 0, 0),
   1580     /* DC_OFFS_WRITE_FRC_EN:1:1 */
   1581     PHYMOD_SYMBOL_FIELD_ENCODE(585, 1, 1),
   1582     /* DC_OFFS_HYS_EN:2:2 */
   1583     PHYMOD_SYMBOL_FIELD_ENCODE(581, 2, 2),
   1584     /* DC_OFFS_HYS_MAG:3:3 */
   1585     PHYMOD_SYMBOL_FIELD_ENCODE(582, 3, 3),
   1586     /* DC_OFFS_GRADIENT_INVERT:4:4 */
   1587     PHYMOD_SYMBOL_FIELD_ENCODE(580, 4, 4),
   1588     /* DC_OFFS_GAIN:5:6 */
   1589     PHYMOD_SYMBOL_FIELD_ENCODE(579, 6, 5),
   1590     /* DC_OFFS_ACC_CLR:7:7 */
   1591     PHYMOD_SYMBOL_FIELD_ENCODE(574, 7, 7),
   1592     /* DC_OFFS_WRITE_VAL:8:15 */
   1593     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(586, 15, 8)
   1594 };
   1595 static uint32_t BCMI_TSCBH_XGXS_DSC_DC_OFFS_STSr_fields[] =
   1596 {
   1597     /* DC_OFFSET_BIN:0:7 */
   1598     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(573, 7, 0)
   1599 };
   1600 static uint32_t BCMI_TSCBH_XGXS_DSC_LMS_THR_CTLr_fields[] =
   1601 {
   1602     /* LMS_THRESH_EN:0:0 */
   1603     PHYMOD_SYMBOL_FIELD_ENCODE(921, 0, 0),
   1604     /* LMS_THRESH_HYS_EN:2:2 */
   1605     PHYMOD_SYMBOL_FIELD_ENCODE(924, 2, 2),
   1606     /* LMS_THRESH_HYS_MAG:3:3 */
   1607     PHYMOD_SYMBOL_FIELD_ENCODE(925, 3, 3),
   1608     /* LMS_THRESH_GRADIENT_INVERT:4:4 */
   1609     PHYMOD_SYMBOL_FIELD_ENCODE(923, 4, 4),
   1610     /* LMS_THRESH_GAIN:5:6 */
   1611     PHYMOD_SYMBOL_FIELD_ENCODE(922, 6, 5),
   1612     /* LMS_THRESH_ACC_CLR:7:7 */
   1613     PHYMOD_SYMBOL_FIELD_ENCODE(919, 7, 7),
   1614     /* DC_OFFS_BLW_PHASE_SEL:15:15 */
   1615     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(575, 15, 15)
   1616 };
   1617 static uint32_t BCMI_TSCBH_XGXS_DSC_LMS_THR_OFFSr_fields[] =
   1618 {
   1619     /* LMS_THRESH_OFFS:0:13 */
   1620     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(926, 13, 0)
   1621 };
   1622 static uint32_t BCMI_TSCBH_XGXS_DSC_LMS_THR_RANDOM1r_fields[] =
   1623 {
   1624     /* LMS_RND_THRESH1:0:7 */
   1625     PHYMOD_SYMBOL_FIELD_ENCODE(907, 7, 0),
   1626     /* LMS_RND_THRESH2:8:15 */
   1627     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(911, 15, 8)
   1628 };
   1629 static uint32_t BCMI_TSCBH_XGXS_DSC_LMS_THR_RANDOM2r_fields[] =
   1630 {
   1631     /* LMS_RND_THRESH3:0:7 */
   1632     PHYMOD_SYMBOL_FIELD_ENCODE(912, 7, 0),
   1633     /* LMS_RND_THRESH4:8:15 */
   1634     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(913, 15, 8)
   1635 };
   1636 static uint32_t BCMI_TSCBH_XGXS_DSC_LMS_THR_RANDOM3r_fields[] =
   1637 {
   1638     /* LMS_RND_THRESH5:0:7 */
   1639     PHYMOD_SYMBOL_FIELD_ENCODE(914, 7, 0),
   1640     /* LMS_RND_THRESH6:8:15 */
   1641     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(915, 15, 8)
   1642 };
   1643 static uint32_t BCMI_TSCBH_XGXS_DSC_LMS_THR_RANDOM4r_fields[] =
   1644 {
   1645     /* LMS_RND_THRESH7:0:7 */
   1646     PHYMOD_SYMBOL_FIELD_ENCODE(916, 7, 0),
   1647     /* LMS_RND_THRESH8:8:15 */
   1648     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(917, 15, 8)
   1649 };
   1650 static uint32_t BCMI_TSCBH_XGXS_DSC_LMS_THR_RANDOM5r_fields[] =
   1651 {
   1652     /* LMS_RND_THRESH9:0:7 */
   1653     PHYMOD_SYMBOL_FIELD_ENCODE(918, 7, 0),
   1654     /* LMS_RND_THRESH10:8:15 */
   1655     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(908, 15, 8)
   1656 };
   1657 static uint32_t BCMI_TSCBH_XGXS_DSC_LMS_THR_RANDOM6r_fields[] =
   1658 {
   1659     /* LMS_RND_THRESH11:0:7 */
   1660     PHYMOD_SYMBOL_FIELD_ENCODE(909, 7, 0),
   1661     /* LMS_RND_THRESH12:8:15 */
   1662     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(910, 15, 8)
   1663 };
   1664 static uint32_t BCMI_TSCBH_XGXS_DSC_LMS_THR_STSr_fields[] =
   1665 {
   1666     /* LMS_THRESH_BIN:0:9 */
   1667     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(920, 9, 0)
   1668 };
   1669 static uint32_t BCMI_TSCBH_XGXS_DSC_LMS_THR_STS2r_fields[] =
   1670 {
   1671     /* AFE_LMS_THRESH_BIN:0:7 */
   1672     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(3, 7, 0)
   1673 };
   1674 static uint32_t BCMI_TSCBH_XGXS_DSC_LOAD_PRESETSr_fields[] =
   1675 {
   1676     /* PRESET_AFE:0:0 */
   1677     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1295, 0, 0)
   1678 };
   1679 static uint32_t BCMI_TSCBH_XGXS_DSC_PRESETr_fields[] =
   1680 {
   1681     /* PRESET_C:0:0 */
   1682     PHYMOD_SYMBOL_FIELD_ENCODE(1296, 0, 0),
   1683     /* PRESET_D:1:1 */
   1684     PHYMOD_SYMBOL_FIELD_ENCODE(1297, 1, 1),
   1685     /* PRESET_A:2:2 */
   1686     PHYMOD_SYMBOL_FIELD_ENCODE(1294, 2, 2),
   1687     /* PRESET_F:3:3 */
   1688     PHYMOD_SYMBOL_FIELD_ENCODE(1299, 3, 3),
   1689     /* PRESET_G:4:4 */
   1690     PHYMOD_SYMBOL_FIELD_ENCODE(1300, 4, 4),
   1691     /* PRESET_H:5:5 */
   1692     PHYMOD_SYMBOL_FIELD_ENCODE(1301, 5, 5),
   1693     /* PRESET_I:6:6 */
   1694     PHYMOD_SYMBOL_FIELD_ENCODE(1302, 6, 6),
   1695     /* PRESET_SLICERS:7:7 */
   1696     PHYMOD_SYMBOL_FIELD_ENCODE(1303, 7, 7),
   1697     /* PRESET_DFE_TAPS_2_3:8:8 */
   1698     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1298, 8, 8)
   1699 };
   1700 static uint32_t BCMI_TSCBH_XGXS_DSC_RXA_FFE_TAPr_fields[] =
   1701 {
   1702     /* RXA_FFE_TAP2_VAL:0:6 */
   1703     PHYMOD_SYMBOL_FIELD_ENCODE(1424, 6, 0),
   1704     /* RXA_FFE_TAP1_VAL:7:13 */
   1705     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1423, 13, 7)
   1706 };
   1707 static uint32_t BCMI_TSCBH_XGXS_DSC_RXA_SLCR_OFFS_ADJ1r_fields[] =
   1708 {
   1709     /* RXA_SLICER_OFFSET_ADJ_CAL_D4:0:5 */
   1710     PHYMOD_SYMBOL_FIELD_ENCODE(1429, 5, 0),
   1711     /* RXA_SLICER_OFFSET_ADJ_CAL_D5:8:13 */
   1712     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1430, 13, 8)
   1713 };
   1714 static uint32_t BCMI_TSCBH_XGXS_DSC_RXA_SLCR_OFFS_ADJ2r_fields[] =
   1715 {
   1716     /* RXA_SLICER_OFFSET_ADJ_CAL_D2:0:5 */
   1717     PHYMOD_SYMBOL_FIELD_ENCODE(1427, 5, 0),
   1718     /* RXA_SLICER_OFFSET_ADJ_CAL_D3:8:13 */
   1719     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1428, 13, 8)
   1720 };
   1721 static uint32_t BCMI_TSCBH_XGXS_DSC_RXA_SLCR_OFFS_ADJ3r_fields[] =
   1722 {
   1723     /* RXA_SLICER_OFFSET_ADJ_CAL_D0:0:5 */
   1724     PHYMOD_SYMBOL_FIELD_ENCODE(1425, 5, 0),
   1725     /* RXA_SLICER_OFFSET_ADJ_CAL_D1:8:13 */
   1726     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1426, 13, 8)
   1727 };
   1728 static uint32_t BCMI_TSCBH_XGXS_DSC_RXA_SLCR_OFFS_ADJ4r_fields[] =
   1729 {
   1730     /* RXA_SLICER_OFFSET_ADJ_CAL_P1:0:5 */
   1731     PHYMOD_SYMBOL_FIELD_ENCODE(1433, 5, 0),
   1732     /* RXA_SLICER_OFFSET_ADJ_CAL_P2:8:13 */
   1733     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1434, 13, 8)
   1734 };
   1735 static uint32_t BCMI_TSCBH_XGXS_DSC_RXA_SLCR_OFFS_ADJ5r_fields[] =
   1736 {
   1737     /* RXA_SLICER_OFFSET_ADJ_CAL_LMS:0:5 */
   1738     PHYMOD_SYMBOL_FIELD_ENCODE(1431, 5, 0),
   1739     /* RXA_SLICER_OFFSET_ADJ_CAL_P0:8:13 */
   1740     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1432, 13, 8)
   1741 };
   1742 static uint32_t BCMI_TSCBH_XGXS_DSC_RXB_FFE_TAPr_fields[] =
   1743 {
   1744     /* RXB_FFE_TAP2_VAL:0:6 */
   1745     PHYMOD_SYMBOL_FIELD_ENCODE(1471, 6, 0),
   1746     /* RXB_FFE_TAP1_VAL:7:13 */
   1747     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1470, 13, 7)
   1748 };
   1749 static uint32_t BCMI_TSCBH_XGXS_DSC_RXB_SLCR_OFFS_ADJ1r_fields[] =
   1750 {
   1751     /* RXB_SLICER_OFFSET_ADJ_CAL_D4:0:5 */
   1752     PHYMOD_SYMBOL_FIELD_ENCODE(1476, 5, 0),
   1753     /* RXB_SLICER_OFFSET_ADJ_CAL_D5:8:13 */
   1754     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1477, 13, 8)
   1755 };
   1756 static uint32_t BCMI_TSCBH_XGXS_DSC_RXB_SLCR_OFFS_ADJ2r_fields[] =
   1757 {
   1758     /* RXB_SLICER_OFFSET_ADJ_CAL_D2:0:5 */
   1759     PHYMOD_SYMBOL_FIELD_ENCODE(1474, 5, 0),
   1760     /* RXB_SLICER_OFFSET_ADJ_CAL_D3:8:13 */
   1761     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1475, 13, 8)
   1762 };
   1763 static uint32_t BCMI_TSCBH_XGXS_DSC_RXB_SLCR_OFFS_ADJ3r_fields[] =
   1764 {
   1765     /* RXB_SLICER_OFFSET_ADJ_CAL_D0:0:5 */
   1766     PHYMOD_SYMBOL_FIELD_ENCODE(1472, 5, 0),
   1767     /* RXB_SLICER_OFFSET_ADJ_CAL_D1:8:13 */
   1768     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1473, 13, 8)
   1769 };
   1770 static uint32_t BCMI_TSCBH_XGXS_DSC_RXB_SLCR_OFFS_ADJ4r_fields[] =
   1771 {
   1772     /* RXB_SLICER_OFFSET_ADJ_CAL_P1:0:5 */
   1773     PHYMOD_SYMBOL_FIELD_ENCODE(1480, 5, 0),
   1774     /* RXB_SLICER_OFFSET_ADJ_CAL_P2:8:13 */
   1775     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1481, 13, 8)
   1776 };
   1777 static uint32_t BCMI_TSCBH_XGXS_DSC_RXB_SLCR_OFFS_ADJ5r_fields[] =
   1778 {
   1779     /* RXB_SLICER_OFFSET_ADJ_CAL_LMS:0:5 */
   1780     PHYMOD_SYMBOL_FIELD_ENCODE(1478, 5, 0),
   1781     /* RXB_SLICER_OFFSET_ADJ_CAL_P0:8:13 */
   1782     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1479, 13, 8)
   1783 };
   1784 static uint32_t BCMI_TSCBH_XGXS_DSC_RXC_FFE_TAPr_fields[] =
   1785 {
   1786     /* RXC_FFE_TAP2_VAL:0:6 */
   1787     PHYMOD_SYMBOL_FIELD_ENCODE(1518, 6, 0),
   1788     /* RXC_FFE_TAP1_VAL:7:13 */
   1789     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1517, 13, 7)
   1790 };
   1791 static uint32_t BCMI_TSCBH_XGXS_DSC_RXC_SLCR_OFFS_ADJ1r_fields[] =
   1792 {
   1793     /* RXC_SLICER_OFFSET_ADJ_CAL_D4:0:5 */
   1794     PHYMOD_SYMBOL_FIELD_ENCODE(1523, 5, 0),
   1795     /* RXC_SLICER_OFFSET_ADJ_CAL_D5:8:13 */
   1796     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1524, 13, 8)
   1797 };
   1798 static uint32_t BCMI_TSCBH_XGXS_DSC_RXC_SLCR_OFFS_ADJ2r_fields[] =
   1799 {
   1800     /* RXC_SLICER_OFFSET_ADJ_CAL_D2:0:5 */
   1801     PHYMOD_SYMBOL_FIELD_ENCODE(1521, 5, 0),
   1802     /* RXC_SLICER_OFFSET_ADJ_CAL_D3:8:13 */
   1803     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1522, 13, 8)
   1804 };
   1805 static uint32_t BCMI_TSCBH_XGXS_DSC_RXC_SLCR_OFFS_ADJ3r_fields[] =
   1806 {
   1807     /* RXC_SLICER_OFFSET_ADJ_CAL_D0:0:5 */
   1808     PHYMOD_SYMBOL_FIELD_ENCODE(1519, 5, 0),
   1809     /* RXC_SLICER_OFFSET_ADJ_CAL_D1:8:13 */
   1810     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1520, 13, 8)
   1811 };
   1812 static uint32_t BCMI_TSCBH_XGXS_DSC_RXC_SLCR_OFFS_ADJ4r_fields[] =
   1813 {
   1814     /* RXC_SLICER_OFFSET_ADJ_CAL_P1:0:5 */
   1815     PHYMOD_SYMBOL_FIELD_ENCODE(1527, 5, 0),
   1816     /* RXC_SLICER_OFFSET_ADJ_CAL_P2:8:13 */
   1817     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1528, 13, 8)
   1818 };
   1819 static uint32_t BCMI_TSCBH_XGXS_DSC_RXC_SLCR_OFFS_ADJ5r_fields[] =
   1820 {
   1821     /* RXC_SLICER_OFFSET_ADJ_CAL_LMS:0:5 */
   1822     PHYMOD_SYMBOL_FIELD_ENCODE(1525, 5, 0),
   1823     /* RXC_SLICER_OFFSET_ADJ_CAL_P0:8:13 */
   1824     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1526, 13, 8)
   1825 };
   1826 static uint32_t BCMI_TSCBH_XGXS_DSC_RXD_FFE_TAPr_fields[] =
   1827 {
   1828     /* RXD_FFE_TAP2_VAL:0:6 */
   1829     PHYMOD_SYMBOL_FIELD_ENCODE(1565, 6, 0),
   1830     /* RXD_FFE_TAP1_VAL:7:13 */
   1831     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1564, 13, 7)
   1832 };
   1833 static uint32_t BCMI_TSCBH_XGXS_DSC_RXD_SLCR_OFFS_ADJ1r_fields[] =
   1834 {
   1835     /* RXD_SLICER_OFFSET_ADJ_CAL_D4:0:5 */
   1836     PHYMOD_SYMBOL_FIELD_ENCODE(1570, 5, 0),
   1837     /* RXD_SLICER_OFFSET_ADJ_CAL_D5:8:13 */
   1838     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1571, 13, 8)
   1839 };
   1840 static uint32_t BCMI_TSCBH_XGXS_DSC_RXD_SLCR_OFFS_ADJ2r_fields[] =
   1841 {
   1842     /* RXD_SLICER_OFFSET_ADJ_CAL_D2:0:5 */
   1843     PHYMOD_SYMBOL_FIELD_ENCODE(1568, 5, 0),
   1844     /* RXD_SLICER_OFFSET_ADJ_CAL_D3:8:13 */
   1845     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1569, 13, 8)
   1846 };
   1847 static uint32_t BCMI_TSCBH_XGXS_DSC_RXD_SLCR_OFFS_ADJ3r_fields[] =
   1848 {
   1849     /* RXD_SLICER_OFFSET_ADJ_CAL_D0:0:5 */
   1850     PHYMOD_SYMBOL_FIELD_ENCODE(1566, 5, 0),
   1851     /* RXD_SLICER_OFFSET_ADJ_CAL_D1:8:13 */
   1852     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1567, 13, 8)
   1853 };
   1854 static uint32_t BCMI_TSCBH_XGXS_DSC_RXD_SLCR_OFFS_ADJ4r_fields[] =
   1855 {
   1856     /* RXD_SLICER_OFFSET_ADJ_CAL_P1:0:5 */
   1857     PHYMOD_SYMBOL_FIELD_ENCODE(1574, 5, 0),
   1858     /* RXD_SLICER_OFFSET_ADJ_CAL_P2:8:13 */
   1859     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1575, 13, 8)
   1860 };
   1861 static uint32_t BCMI_TSCBH_XGXS_DSC_RXD_SLCR_OFFS_ADJ5r_fields[] =
   1862 {
   1863     /* RXD_SLICER_OFFSET_ADJ_CAL_LMS:0:5 */
   1864     PHYMOD_SYMBOL_FIELD_ENCODE(1572, 5, 0),
   1865     /* RXD_SLICER_OFFSET_ADJ_CAL_P0:8:13 */
   1866     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1573, 13, 8)
   1867 };
   1868 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_AUTO_RATE_MOD_DATA05r_fields[] =
   1869 {
   1870     /* RX_DATA05_NUMERATOR2:0:5 */
   1871     PHYMOD_SYMBOL_FIELD_ENCODE(1591, 5, 0),
   1872     /* RX_DATA05_LEFT_NUM_CHANGE:6:6 */
   1873     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1589, 6, 6)
   1874 };
   1875 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_AUTO_RATE_MOD_DATA23_14r_fields[] =
   1876 {
   1877     /* RX_DATA14_NUMERATOR2:0:5 */
   1878     PHYMOD_SYMBOL_FIELD_ENCODE(1597, 5, 0),
   1879     /* RX_DATA14_LEFT_NUM_CHANGE:6:6 */
   1880     PHYMOD_SYMBOL_FIELD_ENCODE(1595, 6, 6),
   1881     /* RX_DATA23_NUMERATOR2:7:12 */
   1882     PHYMOD_SYMBOL_FIELD_ENCODE(1603, 12, 7),
   1883     /* RX_DATA23_LEFT_NUM_CHANGE:13:13 */
   1884     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1601, 13, 13)
   1885 };
   1886 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_AUTO_RATE_MOD_DFE_TAP2_ABr_fields[] =
   1887 {
   1888     /* RXB_DFE_TAP2_NUMERATOR2:0:5 */
   1889     PHYMOD_SYMBOL_FIELD_ENCODE(1448, 5, 0),
   1890     /* RXB_DFE_TAP2_LEFT_NUM_CHANGE:6:6 */
   1891     PHYMOD_SYMBOL_FIELD_ENCODE(1446, 6, 6),
   1892     /* RXA_DFE_TAP2_NUMERATOR2:7:12 */
   1893     PHYMOD_SYMBOL_FIELD_ENCODE(1401, 12, 7),
   1894     /* RXA_DFE_TAP2_LEFT_NUM_CHANGE:13:13 */
   1895     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1399, 13, 13)
   1896 };
   1897 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_AUTO_RATE_MOD_DFE_TAP2_CDr_fields[] =
   1898 {
   1899     /* RXD_DFE_TAP2_NUMERATOR2:0:5 */
   1900     PHYMOD_SYMBOL_FIELD_ENCODE(1542, 5, 0),
   1901     /* RXD_DFE_TAP2_LEFT_NUM_CHANGE:6:6 */
   1902     PHYMOD_SYMBOL_FIELD_ENCODE(1540, 6, 6),
   1903     /* RXC_DFE_TAP2_NUMERATOR2:7:12 */
   1904     PHYMOD_SYMBOL_FIELD_ENCODE(1495, 12, 7),
   1905     /* RXC_DFE_TAP2_LEFT_NUM_CHANGE:13:13 */
   1906     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1493, 13, 13)
   1907 };
   1908 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_AUTO_RATE_MOD_DFE_TAP3_ABr_fields[] =
   1909 {
   1910     /* RXB_DFE_TAP3_NUMERATOR2:0:5 */
   1911     PHYMOD_SYMBOL_FIELD_ENCODE(1456, 5, 0),
   1912     /* RXB_DFE_TAP3_LEFT_NUM_CHANGE:6:6 */
   1913     PHYMOD_SYMBOL_FIELD_ENCODE(1454, 6, 6),
   1914     /* RXA_DFE_TAP3_NUMERATOR2:7:12 */
   1915     PHYMOD_SYMBOL_FIELD_ENCODE(1409, 12, 7),
   1916     /* RXA_DFE_TAP3_LEFT_NUM_CHANGE:13:13 */
   1917     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1407, 13, 13)
   1918 };
   1919 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_AUTO_RATE_MOD_DFE_TAP3_CDr_fields[] =
   1920 {
   1921     /* RXD_DFE_TAP3_NUMERATOR2:0:5 */
   1922     PHYMOD_SYMBOL_FIELD_ENCODE(1550, 5, 0),
   1923     /* RXD_DFE_TAP3_LEFT_NUM_CHANGE:6:6 */
   1924     PHYMOD_SYMBOL_FIELD_ENCODE(1548, 6, 6),
   1925     /* RXC_DFE_TAP3_NUMERATOR2:7:12 */
   1926     PHYMOD_SYMBOL_FIELD_ENCODE(1503, 12, 7),
   1927     /* RXC_DFE_TAP3_LEFT_NUM_CHANGE:13:13 */
   1928     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1501, 13, 13)
   1929 };
   1930 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_AUTO_RATE_MOD_PHASE02_1r_fields[] =
   1931 {
   1932     /* RX_PHASE02_NUMERATOR2:0:5 */
   1933     PHYMOD_SYMBOL_FIELD_ENCODE(1656, 5, 0),
   1934     /* RX_PHASE02_LEFT_NUM_CHANGE:6:6 */
   1935     PHYMOD_SYMBOL_FIELD_ENCODE(1654, 6, 6),
   1936     /* RX_PHASE1_NUMERATOR2:7:12 */
   1937     PHYMOD_SYMBOL_FIELD_ENCODE(1662, 12, 7),
   1938     /* RX_PHASE1_LEFT_NUM_CHANGE:13:13 */
   1939     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1660, 13, 13)
   1940 };
   1941 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_DATA_15_TO0r_fields[] =
   1942 {
   1943     /* RX_DATA_15_TO_0:0:15 */
   1944     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1606, 15, 0)
   1945 };
   1946 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_DATA_35_TO_20r_fields[] =
   1947 {
   1948     /* RX_DATA_35_TO_20:0:15 */
   1949     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1607, 15, 0)
   1950 };
   1951 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP10_ABCDr_fields[] =
   1952 {
   1953     /* RXD_DFE_TAP10:0:3 */
   1954     PHYMOD_SYMBOL_FIELD_ENCODE(1529, 3, 0),
   1955     /* RXC_DFE_TAP10:4:7 */
   1956     PHYMOD_SYMBOL_FIELD_ENCODE(1482, 7, 4),
   1957     /* RXB_DFE_TAP10:8:11 */
   1958     PHYMOD_SYMBOL_FIELD_ENCODE(1435, 11, 8),
   1959     /* RXA_DFE_TAP10:12:15 */
   1960     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1388, 15, 12)
   1961 };
   1962 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP11_12_MUX_ABCDr_fields[] =
   1963 {
   1964     /* RXD_DFE_TAP12_MUX:0:1 */
   1965     PHYMOD_SYMBOL_FIELD_ENCODE(1534, 1, 0),
   1966     /* RXD_DFE_TAP11_MUX:2:3 */
   1967     PHYMOD_SYMBOL_FIELD_ENCODE(1532, 3, 2),
   1968     /* RXC_DFE_TAP12_MUX:4:5 */
   1969     PHYMOD_SYMBOL_FIELD_ENCODE(1487, 5, 4),
   1970     /* RXC_DFE_TAP11_MUX:6:7 */
   1971     PHYMOD_SYMBOL_FIELD_ENCODE(1485, 7, 6),
   1972     /* RXB_DFE_TAP12_MUX:8:9 */
   1973     PHYMOD_SYMBOL_FIELD_ENCODE(1440, 9, 8),
   1974     /* RXB_DFE_TAP11_MUX:10:11 */
   1975     PHYMOD_SYMBOL_FIELD_ENCODE(1438, 11, 10),
   1976     /* RXA_DFE_TAP12_MUX:12:13 */
   1977     PHYMOD_SYMBOL_FIELD_ENCODE(1393, 13, 12),
   1978     /* RXA_DFE_TAP11_MUX:14:15 */
   1979     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1391, 15, 14)
   1980 };
   1981 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP11_ABCDr_fields[] =
   1982 {
   1983     /* RXD_DFE_TAP11:0:3 */
   1984     PHYMOD_SYMBOL_FIELD_ENCODE(1531, 3, 0),
   1985     /* RXC_DFE_TAP11:4:7 */
   1986     PHYMOD_SYMBOL_FIELD_ENCODE(1484, 7, 4),
   1987     /* RXB_DFE_TAP11:8:11 */
   1988     PHYMOD_SYMBOL_FIELD_ENCODE(1437, 11, 8),
   1989     /* RXA_DFE_TAP11:12:15 */
   1990     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1390, 15, 12)
   1991 };
   1992 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP12_ABCDr_fields[] =
   1993 {
   1994     /* RXD_DFE_TAP12:0:3 */
   1995     PHYMOD_SYMBOL_FIELD_ENCODE(1533, 3, 0),
   1996     /* RXC_DFE_TAP12:4:7 */
   1997     PHYMOD_SYMBOL_FIELD_ENCODE(1486, 7, 4),
   1998     /* RXB_DFE_TAP12:8:11 */
   1999     PHYMOD_SYMBOL_FIELD_ENCODE(1439, 11, 8),
   2000     /* RXA_DFE_TAP12:12:15 */
   2001     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1392, 15, 12)
   2002 };
   2003 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP13_14_MUX_ABCDr_fields[] =
   2004 {
   2005     /* RXD_DFE_TAP14_MUX:0:1 */
   2006     PHYMOD_SYMBOL_FIELD_ENCODE(1538, 1, 0),
   2007     /* RXD_DFE_TAP13_MUX:2:3 */
   2008     PHYMOD_SYMBOL_FIELD_ENCODE(1536, 3, 2),
   2009     /* RXC_DFE_TAP14_MUX:4:5 */
   2010     PHYMOD_SYMBOL_FIELD_ENCODE(1491, 5, 4),
   2011     /* RXC_DFE_TAP13_MUX:6:7 */
   2012     PHYMOD_SYMBOL_FIELD_ENCODE(1489, 7, 6),
   2013     /* RXB_DFE_TAP14_MUX:8:9 */
   2014     PHYMOD_SYMBOL_FIELD_ENCODE(1444, 9, 8),
   2015     /* RXB_DFE_TAP13_MUX:10:11 */
   2016     PHYMOD_SYMBOL_FIELD_ENCODE(1442, 11, 10),
   2017     /* RXA_DFE_TAP14_MUX:12:13 */
   2018     PHYMOD_SYMBOL_FIELD_ENCODE(1397, 13, 12),
   2019     /* RXA_DFE_TAP13_MUX:14:15 */
   2020     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1395, 15, 14)
   2021 };
   2022 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP13_ABCDr_fields[] =
   2023 {
   2024     /* RXD_DFE_TAP13:0:3 */
   2025     PHYMOD_SYMBOL_FIELD_ENCODE(1535, 3, 0),
   2026     /* RXC_DFE_TAP13:4:7 */
   2027     PHYMOD_SYMBOL_FIELD_ENCODE(1488, 7, 4),
   2028     /* RXB_DFE_TAP13:8:11 */
   2029     PHYMOD_SYMBOL_FIELD_ENCODE(1441, 11, 8),
   2030     /* RXA_DFE_TAP13:12:15 */
   2031     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1394, 15, 12)
   2032 };
   2033 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP14_ABCDr_fields[] =
   2034 {
   2035     /* RXD_DFE_TAP14:0:3 */
   2036     PHYMOD_SYMBOL_FIELD_ENCODE(1537, 3, 0),
   2037     /* RXC_DFE_TAP14:4:7 */
   2038     PHYMOD_SYMBOL_FIELD_ENCODE(1490, 7, 4),
   2039     /* RXB_DFE_TAP14:8:11 */
   2040     PHYMOD_SYMBOL_FIELD_ENCODE(1443, 11, 8),
   2041     /* RXA_DFE_TAP14:12:15 */
   2042     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1396, 15, 12)
   2043 };
   2044 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP2_3_CTLr_fields[] =
   2045 {
   2046     /* RXB_DFE_TAP3_VAL:0:4 */
   2047     PHYMOD_SYMBOL_FIELD_ENCODE(1459, 4, 0),
   2048     /* RXA_DFE_TAP3_VAL:5:9 */
   2049     PHYMOD_SYMBOL_FIELD_ENCODE(1412, 9, 5),
   2050     /* RXD_DFE_TAP2_VAL:10:14 */
   2051     PHYMOD_SYMBOL_FIELD_ENCODE(1545, 14, 10),
   2052     /* RXD_DFE_TAP2_WRITE:15:15 */
   2053     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1546, 15, 15)
   2054 };
   2055 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP2_3_STSr_fields[] =
   2056 {
   2057     /* RXB_DFE_TAP3_STATUS:0:4 */
   2058     PHYMOD_SYMBOL_FIELD_ENCODE(1457, 4, 0),
   2059     /* RXA_DFE_TAP3_STATUS:5:9 */
   2060     PHYMOD_SYMBOL_FIELD_ENCODE(1410, 9, 5),
   2061     /* RXD_DFE_TAP2_STATUS:10:14 */
   2062     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1543, 14, 10)
   2063 };
   2064 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP2_CTLr_fields[] =
   2065 {
   2066     /* RXC_DFE_TAP2_VAL:0:4 */
   2067     PHYMOD_SYMBOL_FIELD_ENCODE(1498, 4, 0),
   2068     /* RXB_DFE_TAP2_VAL:5:9 */
   2069     PHYMOD_SYMBOL_FIELD_ENCODE(1451, 9, 5),
   2070     /* RXA_DFE_TAP2_VAL:10:14 */
   2071     PHYMOD_SYMBOL_FIELD_ENCODE(1404, 14, 10),
   2072     /* RXA_DFE_TAP2_WRITE:15:15 */
   2073     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1405, 15, 15)
   2074 };
   2075 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP2_STSr_fields[] =
   2076 {
   2077     /* RXC_DFE_TAP2_STATUS:0:4 */
   2078     PHYMOD_SYMBOL_FIELD_ENCODE(1496, 4, 0),
   2079     /* RXB_DFE_TAP2_STATUS:5:9 */
   2080     PHYMOD_SYMBOL_FIELD_ENCODE(1449, 9, 5),
   2081     /* RXA_DFE_TAP2_STATUS:10:14 */
   2082     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1402, 14, 10)
   2083 };
   2084 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP3_CTLr_fields[] =
   2085 {
   2086     /* RXD_DFE_TAP3_VAL:0:4 */
   2087     PHYMOD_SYMBOL_FIELD_ENCODE(1553, 4, 0),
   2088     /* RXC_DFE_TAP3_VAL:5:9 */
   2089     PHYMOD_SYMBOL_FIELD_ENCODE(1506, 9, 5),
   2090     /* RXD_DFE_TAP3_WRITE:10:10 */
   2091     PHYMOD_SYMBOL_FIELD_ENCODE(1554, 10, 10),
   2092     /* RXC_DFE_TAP3_WRITE:11:11 */
   2093     PHYMOD_SYMBOL_FIELD_ENCODE(1507, 11, 11),
   2094     /* RXB_DFE_TAP3_WRITE:12:12 */
   2095     PHYMOD_SYMBOL_FIELD_ENCODE(1460, 12, 12),
   2096     /* RXA_DFE_TAP3_WRITE:13:13 */
   2097     PHYMOD_SYMBOL_FIELD_ENCODE(1413, 13, 13),
   2098     /* RXC_DFE_TAP2_WRITE:14:14 */
   2099     PHYMOD_SYMBOL_FIELD_ENCODE(1499, 14, 14),
   2100     /* RXB_DFE_TAP2_WRITE:15:15 */
   2101     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1452, 15, 15)
   2102 };
   2103 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP3_STSr_fields[] =
   2104 {
   2105     /* RXD_DFE_TAP3_STATUS:0:4 */
   2106     PHYMOD_SYMBOL_FIELD_ENCODE(1551, 4, 0),
   2107     /* RXC_DFE_TAP3_STATUS:5:9 */
   2108     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1504, 9, 5)
   2109 };
   2110 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP4_ABr_fields[] =
   2111 {
   2112     /* RXB_DFE_TAP4:0:4 */
   2113     PHYMOD_SYMBOL_FIELD_ENCODE(1461, 4, 0),
   2114     /* RXA_DFE_TAP4:5:9 */
   2115     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1414, 9, 5)
   2116 };
   2117 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP4_CDr_fields[] =
   2118 {
   2119     /* RXD_DFE_TAP4:0:4 */
   2120     PHYMOD_SYMBOL_FIELD_ENCODE(1555, 4, 0),
   2121     /* RXC_DFE_TAP4:5:9 */
   2122     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1508, 9, 5)
   2123 };
   2124 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP5_ABCDr_fields[] =
   2125 {
   2126     /* RXD_DFE_TAP5:0:3 */
   2127     PHYMOD_SYMBOL_FIELD_ENCODE(1556, 3, 0),
   2128     /* RXC_DFE_TAP5:4:7 */
   2129     PHYMOD_SYMBOL_FIELD_ENCODE(1509, 7, 4),
   2130     /* RXB_DFE_TAP5:8:11 */
   2131     PHYMOD_SYMBOL_FIELD_ENCODE(1462, 11, 8),
   2132     /* RXA_DFE_TAP5:12:15 */
   2133     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1415, 15, 12)
   2134 };
   2135 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP6_ABCDr_fields[] =
   2136 {
   2137     /* RXD_DFE_TAP6:0:3 */
   2138     PHYMOD_SYMBOL_FIELD_ENCODE(1557, 3, 0),
   2139     /* RXC_DFE_TAP6:4:7 */
   2140     PHYMOD_SYMBOL_FIELD_ENCODE(1510, 7, 4),
   2141     /* RXB_DFE_TAP6:8:11 */
   2142     PHYMOD_SYMBOL_FIELD_ENCODE(1463, 11, 8),
   2143     /* RXA_DFE_TAP6:12:15 */
   2144     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1416, 15, 12)
   2145 };
   2146 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP7_8_MUX_ABCDr_fields[] =
   2147 {
   2148     /* RXD_DFE_TAP8_MUX:0:1 */
   2149     PHYMOD_SYMBOL_FIELD_ENCODE(1561, 1, 0),
   2150     /* RXD_DFE_TAP7_MUX:2:3 */
   2151     PHYMOD_SYMBOL_FIELD_ENCODE(1559, 3, 2),
   2152     /* RXC_DFE_TAP8_MUX:4:5 */
   2153     PHYMOD_SYMBOL_FIELD_ENCODE(1514, 5, 4),
   2154     /* RXC_DFE_TAP7_MUX:6:7 */
   2155     PHYMOD_SYMBOL_FIELD_ENCODE(1512, 7, 6),
   2156     /* RXB_DFE_TAP8_MUX:8:9 */
   2157     PHYMOD_SYMBOL_FIELD_ENCODE(1467, 9, 8),
   2158     /* RXB_DFE_TAP7_MUX:10:11 */
   2159     PHYMOD_SYMBOL_FIELD_ENCODE(1465, 11, 10),
   2160     /* RXA_DFE_TAP8_MUX:12:13 */
   2161     PHYMOD_SYMBOL_FIELD_ENCODE(1420, 13, 12),
   2162     /* RXA_DFE_TAP7_MUX:14:15 */
   2163     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1418, 15, 14)
   2164 };
   2165 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP7_ABCDr_fields[] =
   2166 {
   2167     /* RXD_DFE_TAP7:0:3 */
   2168     PHYMOD_SYMBOL_FIELD_ENCODE(1558, 3, 0),
   2169     /* RXC_DFE_TAP7:4:7 */
   2170     PHYMOD_SYMBOL_FIELD_ENCODE(1511, 7, 4),
   2171     /* RXB_DFE_TAP7:8:11 */
   2172     PHYMOD_SYMBOL_FIELD_ENCODE(1464, 11, 8),
   2173     /* RXA_DFE_TAP7:12:15 */
   2174     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1417, 15, 12)
   2175 };
   2176 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP8_ABCDr_fields[] =
   2177 {
   2178     /* RXD_DFE_TAP8:0:3 */
   2179     PHYMOD_SYMBOL_FIELD_ENCODE(1560, 3, 0),
   2180     /* RXC_DFE_TAP8:4:7 */
   2181     PHYMOD_SYMBOL_FIELD_ENCODE(1513, 7, 4),
   2182     /* RXB_DFE_TAP8:8:11 */
   2183     PHYMOD_SYMBOL_FIELD_ENCODE(1466, 11, 8),
   2184     /* RXA_DFE_TAP8:12:15 */
   2185     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1419, 15, 12)
   2186 };
   2187 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP9_10_MUX_ABCDr_fields[] =
   2188 {
   2189     /* RXD_DFE_TAP10_MUX:0:1 */
   2190     PHYMOD_SYMBOL_FIELD_ENCODE(1530, 1, 0),
   2191     /* RXD_DFE_TAP9_MUX:2:3 */
   2192     PHYMOD_SYMBOL_FIELD_ENCODE(1563, 3, 2),
   2193     /* RXC_DFE_TAP10_MUX:4:5 */
   2194     PHYMOD_SYMBOL_FIELD_ENCODE(1483, 5, 4),
   2195     /* RXC_DFE_TAP9_MUX:6:7 */
   2196     PHYMOD_SYMBOL_FIELD_ENCODE(1516, 7, 6),
   2197     /* RXB_DFE_TAP10_MUX:8:9 */
   2198     PHYMOD_SYMBOL_FIELD_ENCODE(1436, 9, 8),
   2199     /* RXB_DFE_TAP9_MUX:10:11 */
   2200     PHYMOD_SYMBOL_FIELD_ENCODE(1469, 11, 10),
   2201     /* RXA_DFE_TAP10_MUX:12:13 */
   2202     PHYMOD_SYMBOL_FIELD_ENCODE(1389, 13, 12),
   2203     /* RXA_DFE_TAP9_MUX:14:15 */
   2204     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1422, 15, 14)
   2205 };
   2206 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP9_ABCDr_fields[] =
   2207 {
   2208     /* RXD_DFE_TAP9:0:3 */
   2209     PHYMOD_SYMBOL_FIELD_ENCODE(1562, 3, 0),
   2210     /* RXC_DFE_TAP9:4:7 */
   2211     PHYMOD_SYMBOL_FIELD_ENCODE(1515, 7, 4),
   2212     /* RXB_DFE_TAP9:8:11 */
   2213     PHYMOD_SYMBOL_FIELD_ENCODE(1468, 11, 8),
   2214     /* RXA_DFE_TAP9:12:15 */
   2215     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1421, 15, 12)
   2216 };
   2217 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_HOFFS_JITGENr_fields[] =
   2218 {
   2219     /* HOFFS_JGEN_JIT_FREQ_IDX:0:5 */
   2220     PHYMOD_SYMBOL_FIELD_ENCODE(772, 5, 0),
   2221     /* HOFFS_JGEN_EN:7:7 */
   2222     PHYMOD_SYMBOL_FIELD_ENCODE(770, 7, 7),
   2223     /* HOFFS_JGEN_JIT_AMP:8:13 */
   2224     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(771, 13, 8)
   2225 };
   2226 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_PF_CTL_DC_OFFS_AND_VGAr_fields[] =
   2227 {
   2228     /* RX_VGA_THRESH_SEL:0:6 */
   2229     PHYMOD_SYMBOL_FIELD_ENCODE(1712, 6, 0),
   2230     /* RX_PF2_CTRL_VAL:7:9 */
   2231     PHYMOD_SYMBOL_FIELD_ENCODE(1651, 9, 7),
   2232     /* RX_PF_CTRL_VAL:10:14 */
   2233     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1652, 14, 10)
   2234 };
   2235 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_PI_B_CTL0r_fields[] =
   2236 {
   2237     /* RX_PI_INLC_LUT_0:0:4 */
   2238     PHYMOD_SYMBOL_FIELD_ENCODE(1669, 4, 0),
   2239     /* RX_PI_INLC_LUT_1:8:12 */
   2240     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1670, 12, 8)
   2241 };
   2242 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_PI_B_CTL1r_fields[] =
   2243 {
   2244     /* RX_PI_INLC_LUT_2:0:4 */
   2245     PHYMOD_SYMBOL_FIELD_ENCODE(1677, 4, 0),
   2246     /* RX_PI_INLC_LUT_3:8:12 */
   2247     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1678, 12, 8)
   2248 };
   2249 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_PI_B_CTL2r_fields[] =
   2250 {
   2251     /* RX_PI_INLC_LUT_4:0:4 */
   2252     PHYMOD_SYMBOL_FIELD_ENCODE(1679, 4, 0),
   2253     /* RX_PI_INLC_LUT_5:8:12 */
   2254     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1680, 12, 8)
   2255 };
   2256 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_PI_B_CTL3r_fields[] =
   2257 {
   2258     /* RX_PI_INLC_LUT_6:0:4 */
   2259     PHYMOD_SYMBOL_FIELD_ENCODE(1681, 4, 0),
   2260     /* RX_PI_INLC_LUT_7:8:12 */
   2261     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1682, 12, 8)
   2262 };
   2263 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_PI_B_CTL4r_fields[] =
   2264 {
   2265     /* RX_PI_INLC_LUT_8:0:4 */
   2266     PHYMOD_SYMBOL_FIELD_ENCODE(1683, 4, 0),
   2267     /* RX_PI_INLC_LUT_9:8:12 */
   2268     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1684, 12, 8)
   2269 };
   2270 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_PI_B_CTL5r_fields[] =
   2271 {
   2272     /* RX_PI_INLC_LUT_10:0:4 */
   2273     PHYMOD_SYMBOL_FIELD_ENCODE(1671, 4, 0),
   2274     /* RX_PI_INLC_LUT_11:8:12 */
   2275     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1672, 12, 8)
   2276 };
   2277 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_PI_B_CTL6r_fields[] =
   2278 {
   2279     /* RX_PI_INLC_LUT_12:0:4 */
   2280     PHYMOD_SYMBOL_FIELD_ENCODE(1673, 4, 0),
   2281     /* RX_PI_INLC_LUT_13:8:12 */
   2282     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1674, 12, 8)
   2283 };
   2284 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_PI_B_CTL7r_fields[] =
   2285 {
   2286     /* RX_PI_INLC_LUT_14:0:4 */
   2287     PHYMOD_SYMBOL_FIELD_ENCODE(1675, 4, 0),
   2288     /* RX_PI_INLC_LUT_15:8:12 */
   2289     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1676, 12, 8)
   2290 };
   2291 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_PI_B_CTL9r_fields[] =
   2292 {
   2293     /* RX_PI_INLC_OFFSET:8:14 */
   2294     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1685, 14, 8)
   2295 };
   2296 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_PI_B_CTL_10r_fields[] =
   2297 {
   2298     /* RX_PI_INLC_EN:0:0 */
   2299     PHYMOD_SYMBOL_FIELD_ENCODE(1667, 0, 0),
   2300     /* RX_PI_INLC_K:6:7 */
   2301     PHYMOD_SYMBOL_FIELD_ENCODE(1668, 7, 6),
   2302     /* RX_PI_INLC_PHASE_DLY:8:9 */
   2303     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1687, 9, 8)
   2304 };
   2305 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_PI_B_STS0r_fields[] =
   2306 {
   2307     /* RX_PI_INLC_OUT:0:3 */
   2308     PHYMOD_SYMBOL_FIELD_ENCODE(1686, 3, 0),
   2309     /* RX_PI_INLC_RX_PHASE_POINTER:7:15 */
   2310     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1688, 15, 7)
   2311 };
   2312 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_PI_CNT_BIN_Dr_fields[] =
   2313 {
   2314     /* CNT_BIN_D:0:7 */
   2315     PHYMOD_SYMBOL_FIELD_ENCODE(516, 7, 0),
   2316     /* CNT_BIN_DQ:8:15 */
   2317     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(517, 15, 8)
   2318 };
   2319 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_PI_CNT_BIN_Lr_fields[] =
   2320 {
   2321     /* CNT_BIN_L:0:7 */
   2322     PHYMOD_SYMBOL_FIELD_ENCODE(521, 7, 0),
   2323     /* CNT_BIN_LQ:8:15 */
   2324     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(522, 15, 8)
   2325 };
   2326 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_PI_CNT_BIN_LDr_fields[] =
   2327 {
   2328     /* CNT_BIN_L_LD:0:7 */
   2329     PHYMOD_SYMBOL_FIELD_ENCODE(523, 7, 0),
   2330     /* CNT_BIN_D_LD:8:15 */
   2331     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(518, 15, 8)
   2332 };
   2333 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_PI_CNT_BIN_Pr_fields[] =
   2334 {
   2335     /* CNT_BIN_P:0:7 */
   2336     PHYMOD_SYMBOL_FIELD_ENCODE(524, 7, 0),
   2337     /* CNT_BIN_PQ:8:15 */
   2338     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(525, 15, 8)
   2339 };
   2340 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_PI_CNT_BIN_PDr_fields[] =
   2341 {
   2342     /* CNT_BIN_P_PD:0:7 */
   2343     PHYMOD_SYMBOL_FIELD_ENCODE(526, 7, 0),
   2344     /* CNT_BIN_D_PD:8:15 */
   2345     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(519, 15, 8)
   2346 };
   2347 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_PI_CTLr_fields[] =
   2348 {
   2349     /* RX_PI_SLICERS_EN:0:5 */
   2350     PHYMOD_SYMBOL_FIELD_ENCODE(1693, 5, 0),
   2351     /* RX_PI_PHASE_STEP_CNT:6:9 */
   2352     PHYMOD_SYMBOL_FIELD_ENCODE(1691, 9, 6),
   2353     /* RX_PI_MANUAL_MODE:10:10 */
   2354     PHYMOD_SYMBOL_FIELD_ENCODE(1689, 10, 10),
   2355     /* RX_PI_MANUAL_STROBE:11:11 */
   2356     PHYMOD_SYMBOL_FIELD_ENCODE(1690, 11, 11),
   2357     /* RX_PI_STEP_SIZE:12:12 */
   2358     PHYMOD_SYMBOL_FIELD_ENCODE(1694, 12, 12),
   2359     /* RX_PI_DISP_MSB_STATUS:13:13 */
   2360     PHYMOD_SYMBOL_FIELD_ENCODE(1666, 13, 13),
   2361     /* RX_PI_PHASE_STEP_DIR:14:14 */
   2362     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1692, 14, 14)
   2363 };
   2364 static uint32_t BCMI_TSCBH_XGXS_DSC_RX_PI_CTR_PHASE_ERRr_fields[] =
   2365 {
   2366     /* CDR_PHASE_ERR_PICNT:0:5 */
   2367     PHYMOD_SYMBOL_FIELD_ENCODE(476, 5, 0),
   2368     /* CNT_BIN_D_PERR:7:15 */
   2369     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(520, 15, 7)
   2370 };
   2371 static uint32_t BCMI_TSCBH_XGXS_DSC_SCRATCHr_fields[] =
   2372 {
   2373     /* UC_DSC_SCRATCH:0:15 */
   2374     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2055, 15, 0)
   2375 };
   2376 static uint32_t BCMI_TSCBH_XGXS_DSC_SLCRS_WRITE_CTLr_fields[] =
   2377 {
   2378     /* RX_AFE_OVERRIDE_SEL:0:3 */
   2379     PHYMOD_SYMBOL_FIELD_ENCODE(1579, 3, 0),
   2380     /* RX_AFE_OVERRIDE_VAL:7:14 */
   2381     PHYMOD_SYMBOL_FIELD_ENCODE(1580, 14, 7),
   2382     /* RX_AFE_OVERRIDE_WRITE:15:15 */
   2383     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1581, 15, 15)
   2384 };
   2385 static uint32_t BCMI_TSCBH_XGXS_DSC_SLCR_DFE_TAPS_CTLr_fields[] =
   2386 {
   2387     /* ANA_TIMER_T2:0:5 */
   2388     PHYMOD_SYMBOL_FIELD_ENCODE(279, 5, 0),
   2389     /* RX_SLICER_DENOMINATOR:6:11 */
   2390     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1705, 11, 6)
   2391 };
   2392 static uint32_t BCMI_TSCBH_XGXS_DSC_SM_CTL0r_fields[] =
   2393 {
   2394     /* EEE_MODE_EN:1:1 */
   2395     PHYMOD_SYMBOL_FIELD_ENCODE(676, 1, 1),
   2396     /* EEE_QUIET_RX_AFE_PWRDWN_VAL:2:2 */
   2397     PHYMOD_SYMBOL_FIELD_ENCODE(680, 2, 2),
   2398     /* IGNORE_RX_MODE:3:3 */
   2399     PHYMOD_SYMBOL_FIELD_ENCODE(784, 3, 3),
   2400     /* CL72_TIMER_EN:4:4 */
   2401     PHYMOD_SYMBOL_FIELD_ENCODE(489, 4, 4),
   2402     /* UC_TUNE_EN:5:5 */
   2403     PHYMOD_SYMBOL_FIELD_ENCODE(2064, 5, 5),
   2404     /* HW_TUNE_EN:6:6 */
   2405     PHYMOD_SYMBOL_FIELD_ENCODE(778, 6, 6),
   2406     /* EEE_MEASURE_EN:8:8 */
   2407     PHYMOD_SYMBOL_FIELD_ENCODE(675, 8, 8),
   2408     /* UC_ACK_DSC_EEE_DONE:11:11 */
   2409     PHYMOD_SYMBOL_FIELD_ENCODE(2045, 11, 11),
   2410     /* UC_ACK_DSC_RESTART:13:13 */
   2411     PHYMOD_SYMBOL_FIELD_ENCODE(2046, 13, 13),
   2412     /* UC_ACK_DSC_CONFIG:14:14 */
   2413     PHYMOD_SYMBOL_FIELD_ENCODE(2044, 14, 14),
   2414     /* SET_MEAS_INCOMPLETE:15:15 */
   2415     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1728, 15, 15)
   2416 };
   2417 static uint32_t BCMI_TSCBH_XGXS_DSC_SM_CTL1r_fields[] =
   2418 {
   2419     /* RX_DSC_LOCK_FRC:0:0 */
   2420     PHYMOD_SYMBOL_FIELD_ENCODE(1610, 0, 0),
   2421     /* RX_DSC_LOCK_FRC_VAL:1:1 */
   2422     PHYMOD_SYMBOL_FIELD_ENCODE(1611, 1, 1),
   2423     /* DSC_CLR_FRC:2:2 */
   2424     PHYMOD_SYMBOL_FIELD_ENCODE(615, 2, 2),
   2425     /* DSC_CLR_FRC_VAL:3:3 */
   2426     PHYMOD_SYMBOL_FIELD_ENCODE(616, 3, 3),
   2427     /* TRNSUM_FRZ_FRC:4:4 */
   2428     PHYMOD_SYMBOL_FIELD_ENCODE(1859, 4, 4),
   2429     /* TRNSUM_FRZ_FRC_VAL:5:5 */
   2430     PHYMOD_SYMBOL_FIELD_ENCODE(1860, 5, 5),
   2431     /* TIMER_DONE_FRC:6:6 */
   2432     PHYMOD_SYMBOL_FIELD_ENCODE(1785, 6, 6),
   2433     /* TIMER_DONE_FRC_VAL:7:7 */
   2434     PHYMOD_SYMBOL_FIELD_ENCODE(1786, 7, 7),
   2435     /* FREQ_UPD_EN_FRC:8:8 */
   2436     PHYMOD_SYMBOL_FIELD_ENCODE(729, 8, 8),
   2437     /* FREQ_UPD_EN_FRC_VAL:9:9 */
   2438     PHYMOD_SYMBOL_FIELD_ENCODE(730, 9, 9),
   2439     /* CDR_FRZ_FRC:10:10 */
   2440     PHYMOD_SYMBOL_FIELD_ENCODE(466, 10, 10),
   2441     /* CDR_FRZ_FRC_VAL:11:11 */
   2442     PHYMOD_SYMBOL_FIELD_ENCODE(467, 11, 11),
   2443     /* TRNSUM_CLR_FRC:12:12 */
   2444     PHYMOD_SYMBOL_FIELD_ENCODE(1842, 12, 12),
   2445     /* TRNSUM_CLR_FRC_VAL:13:13 */
   2446     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1843, 13, 13)
   2447 };
   2448 static uint32_t BCMI_TSCBH_XGXS_DSC_SM_CTL2r_fields[] =
   2449 {
   2450     /* EEE_LFSR_CNT:0:12 */
   2451     PHYMOD_SYMBOL_FIELD_ENCODE(673, 12, 0),
   2452     /* DSC_TIMEOUT_MULT:13:15 */
   2453     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(623, 15, 13)
   2454 };
   2455 static uint32_t BCMI_TSCBH_XGXS_DSC_SM_CTL3r_fields[] =
   2456 {
   2457     /* MEASURE_LFSR_CNT:0:12 */
   2458     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(982, 12, 0)
   2459 };
   2460 static uint32_t BCMI_TSCBH_XGXS_DSC_SM_CTL4r_fields[] =
   2461 {
   2462     /* ACQ_CDR_TIMEOUT:0:4 */
   2463     PHYMOD_SYMBOL_FIELD_ENCODE(2, 4, 0),
   2464     /* CDR_SETTLE_TIMEOUT:5:9 */
   2465     PHYMOD_SYMBOL_FIELD_ENCODE(481, 9, 5),
   2466     /* HW_TUNE_TIMEOUT:10:14 */
   2467     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(779, 14, 10)
   2468 };
   2469 static uint32_t BCMI_TSCBH_XGXS_DSC_SM_CTL5r_fields[] =
   2470 {
   2471     /* MEASURE_TIMEOUT:0:4 */
   2472     PHYMOD_SYMBOL_FIELD_ENCODE(983, 4, 0),
   2473     /* EEE_ACQ_CDR_TIMEOUT:5:9 */
   2474     PHYMOD_SYMBOL_FIELD_ENCODE(669, 9, 5),
   2475     /* EEE_CDR_SETTLE_TIMEOUT:10:14 */
   2476     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(671, 14, 10)
   2477 };
   2478 static uint32_t BCMI_TSCBH_XGXS_DSC_SM_CTL6r_fields[] =
   2479 {
   2480     /* EEE_HW_TUNE_TIMEOUT:0:4 */
   2481     PHYMOD_SYMBOL_FIELD_ENCODE(672, 4, 0),
   2482     /* EEE_ANA_PWR_TIMEOUT:10:14 */
   2483     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(670, 14, 10)
   2484 };
   2485 static uint32_t BCMI_TSCBH_XGXS_DSC_SM_CTL7r_fields[] =
   2486 {
   2487     /* CDR_BWSEL_INTEG_ACQCDR:0:3 */
   2488     PHYMOD_SYMBOL_FIELD_ENCODE(457, 3, 0),
   2489     /* CDR_BWSEL_INTEG_EEE_ACQCDR:4:7 */
   2490     PHYMOD_SYMBOL_FIELD_ENCODE(458, 7, 4),
   2491     /* CDR_BWSEL_INTEG_NORM:8:11 */
   2492     PHYMOD_SYMBOL_FIELD_ENCODE(459, 11, 8),
   2493     /* CDR_BWSEL_PROP_ACQCDR:12:12 */
   2494     PHYMOD_SYMBOL_FIELD_ENCODE(460, 12, 12),
   2495     /* CDR_BWSEL_PROP_NORM:14:14 */
   2496     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(462, 14, 14)
   2497 };
   2498 static uint32_t BCMI_TSCBH_XGXS_DSC_SM_CTL8r_fields[] =
   2499 {
   2500     /* PHASE_ERR_OFFSET:0:3 */
   2501     PHYMOD_SYMBOL_FIELD_ENCODE(1200, 3, 0),
   2502     /* EEE_PHASE_ERR_OFFSET:4:7 */
   2503     PHYMOD_SYMBOL_FIELD_ENCODE(677, 7, 4),
   2504     /* PHASE_ERR_OFFSET_EN:8:9 */
   2505     PHYMOD_SYMBOL_FIELD_ENCODE(1201, 9, 8),
   2506     /* EEE_PHASE_ERR_OFFSET_EN:10:11 */
   2507     PHYMOD_SYMBOL_FIELD_ENCODE(678, 11, 10),
   2508     /* CDR_BWSEL_PROP_EEE_ACQCDR:14:14 */
   2509     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(461, 14, 14)
   2510 };
   2511 static uint32_t BCMI_TSCBH_XGXS_DSC_SM_CTL9r_fields[] =
   2512 {
   2513     /* RX_RESTART_PMD:0:0 */
   2514     PHYMOD_SYMBOL_FIELD_ENCODE(1701, 0, 0),
   2515     /* RX_RESTART_PMD_HOLD:1:1 */
   2516     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1702, 1, 1)
   2517 };
   2518 static uint32_t BCMI_TSCBH_XGXS_DSC_SM_STS_DSC_LOCKr_fields[] =
   2519 {
   2520     /* RX_DSC_LOCK:0:0 */
   2521     PHYMOD_SYMBOL_FIELD_ENCODE(1609, 0, 0),
   2522     /* MEAS_INCOMPLETE:1:1 */
   2523     PHYMOD_SYMBOL_FIELD_ENCODE(984, 1, 1),
   2524     /* EEE_MEASURE_CNT:7:15 */
   2525     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(674, 15, 7)
   2526 };
   2527 static uint32_t BCMI_TSCBH_XGXS_DSC_SM_STS_DSC_STr_fields[] =
   2528 {
   2529     /* DSC_SM_READY_FOR_CMD:0:0 */
   2530     PHYMOD_SYMBOL_FIELD_ENCODE(618, 0, 0),
   2531     /* DSC_SM_GP_UC_REQ:1:6 */
   2532     PHYMOD_SYMBOL_FIELD_ENCODE(617, 6, 1),
   2533     /* DSC_SM_SCRATCH:8:10 */
   2534     PHYMOD_SYMBOL_FIELD_ENCODE(619, 10, 8),
   2535     /* DSC_STATE:11:15 */
   2536     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(620, 15, 11)
   2537 };
   2538 static uint32_t BCMI_TSCBH_XGXS_DSC_SM_STS_DSC_ST_EEE_ONE_HOTr_fields[] =
   2539 {
   2540     /* DSC_STATE_EEE_ONE_HOT:0:6 */
   2541     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(621, 6, 0)
   2542 };
   2543 static uint32_t BCMI_TSCBH_XGXS_DSC_SM_STS_DSC_ST_ONE_HOTr_fields[] =
   2544 {
   2545     /* DSC_STATE_ONE_HOT:0:9 */
   2546     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(622, 9, 0)
   2547 };
   2548 static uint32_t BCMI_TSCBH_XGXS_DSC_SM_STS_RESTARTr_fields[] =
   2549 {
   2550     /* RESTART_PI_EXT_MODE:0:0 */
   2551     PHYMOD_SYMBOL_FIELD_ENCODE(1337, 0, 0),
   2552     /* RESTART_SIGDET:1:1 */
   2553     PHYMOD_SYMBOL_FIELD_ENCODE(1339, 1, 1),
   2554     /* RESTART_PMD_RESTART:2:2 */
   2555     PHYMOD_SYMBOL_FIELD_ENCODE(1338, 2, 2),
   2556     /* EEE_QUIET_FROM_EEE_STATES:3:3 */
   2557     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(679, 3, 3)
   2558 };
   2559 static uint32_t BCMI_TSCBH_XGXS_DSC_SPARE_DSC_Ir_fields[] =
   2560 {
   2561     /* SPARE_DSC_I:0:0 */
   2562     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1750, 0, 0)
   2563 };
   2564 static uint32_t BCMI_TSCBH_XGXS_DSC_TRNSUMr_fields[] =
   2565 {
   2566     /* TRNSUM:0:15 */
   2567     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1835, 15, 0)
   2568 };
   2569 static uint32_t BCMI_TSCBH_XGXS_DSC_TRNSUM_Ar_fields[] =
   2570 {
   2571     /* TRNSUM_A:0:15 */
   2572     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1836, 15, 0)
   2573 };
   2574 static uint32_t BCMI_TSCBH_XGXS_DSC_TRNSUM_A_LOr_fields[] =
   2575 {
   2576     /* TRNSUM_A_LOW:8:15 */
   2577     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1838, 15, 8)
   2578 };
   2579 static uint32_t BCMI_TSCBH_XGXS_DSC_TRNSUM_Br_fields[] =
   2580 {
   2581     /* TRNSUM_B:0:15 */
   2582     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1839, 15, 0)
   2583 };
   2584 static uint32_t BCMI_TSCBH_XGXS_DSC_TRNSUM_B_LOr_fields[] =
   2585 {
   2586     /* TRNSUM_B_LOW:8:15 */
   2587     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1840, 15, 8)
   2588 };
   2589 static uint32_t BCMI_TSCBH_XGXS_DSC_TRNSUM_Cr_fields[] =
   2590 {
   2591     /* TRNSUM_C:0:15 */
   2592     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1841, 15, 0)
   2593 };
   2594 static uint32_t BCMI_TSCBH_XGXS_DSC_TRNSUM_CTLr_fields[] =
   2595 {
   2596     /* TRNSUM_GAIN:0:1 */
   2597     PHYMOD_SYMBOL_FIELD_ENCODE(1861, 1, 0),
   2598     /* TRNSUM_TAP_RANGE_SEL:4:6 */
   2599     PHYMOD_SYMBOL_FIELD_ENCODE(1885, 6, 4),
   2600     /* TRNSUM_COR_SEL:8:9 */
   2601     PHYMOD_SYMBOL_FIELD_ENCODE(1845, 9, 8),
   2602     /* TRNSUM_QPHASE_MULT_EN:12:12 */
   2603     PHYMOD_SYMBOL_FIELD_ENCODE(1881, 12, 12),
   2604     /* TRNSUM_RANDOM_TAPSEL_DISABLE:13:13 */
   2605     PHYMOD_SYMBOL_FIELD_ENCODE(1882, 13, 13),
   2606     /* TRNSUM_EYE_CLOSURE_EN:14:14 */
   2607     PHYMOD_SYMBOL_FIELD_ENCODE(1857, 14, 14),
   2608     /* TRNSUM_EN:15:15 */
   2609     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1852, 15, 15)
   2610 };
   2611 static uint32_t BCMI_TSCBH_XGXS_DSC_TRNSUM_CTL2r_fields[] =
   2612 {
   2613     /* TRNSUM_CLR_SC:0:0 */
   2614     PHYMOD_SYMBOL_FIELD_ENCODE(1844, 0, 0),
   2615     /* TRNSUM_DISABLE_SM_CLEAR:1:1 */
   2616     PHYMOD_SYMBOL_FIELD_ENCODE(1849, 1, 1),
   2617     /* TRNSUM_PATTERN_MATCH_SEL:2:4 */
   2618     PHYMOD_SYMBOL_FIELD_ENCODE(1876, 4, 2),
   2619     /* TRNSUM_EYE_CLOSE_PREV_EN:5:5 */
   2620     PHYMOD_SYMBOL_FIELD_ENCODE(1856, 5, 5),
   2621     /* TRNSUM_EYE_CLOSURE_ERR_SEL:6:6 */
   2622     PHYMOD_SYMBOL_FIELD_ENCODE(1858, 6, 6),
   2623     /* TRNSUM_PATTERN_7LVL_EN:7:7 */
   2624     PHYMOD_SYMBOL_FIELD_ENCODE(1874, 7, 7),
   2625     /* TRNSUM_ALT_PATH_EN:8:9 */
   2626     PHYMOD_SYMBOL_FIELD_ENCODE(1837, 9, 8),
   2627     /* TRNSUM_MODE_SEL:10:11 */
   2628     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1866, 11, 10)
   2629 };
   2630 static uint32_t BCMI_TSCBH_XGXS_DSC_TRNSUM_C_LOr_fields[] =
   2631 {
   2632     /* TRNSUM_C_LOW:8:15 */
   2633     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1846, 15, 8)
   2634 };
   2635 static uint32_t BCMI_TSCBH_XGXS_DSC_TRNSUM_Dr_fields[] =
   2636 {
   2637     /* TRNSUM_D:0:15 */
   2638     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1847, 15, 0)
   2639 };
   2640 static uint32_t BCMI_TSCBH_XGXS_DSC_TRNSUM_D_LOr_fields[] =
   2641 {
   2642     /* TRNSUM_D_LOW:8:15 */
   2643     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1850, 15, 8)
   2644 };
   2645 static uint32_t BCMI_TSCBH_XGXS_DSC_TRNSUM_INL_MEASr_fields[] =
   2646 {
   2647     /* TRNSUM_INL_MEAS_EN:0:0 */
   2648     PHYMOD_SYMBOL_FIELD_ENCODE(1862, 0, 0),
   2649     /* TRNSUM_INL_PHS_PTR:1:7 */
   2650     PHYMOD_SYMBOL_FIELD_ENCODE(1863, 7, 1),
   2651     /* TRNSUM_PRBS_DP_INVERT:12:12 */
   2652     PHYMOD_SYMBOL_FIELD_ENCODE(1877, 12, 12),
   2653     /* TRNSUM_PRBS_PRECODER_LOAD_ZERO:13:13 */
   2654     PHYMOD_SYMBOL_FIELD_ENCODE(1880, 13, 13),
   2655     /* TRNSUM_PRBS_PRECODER_AUTOSEED:14:14 */
   2656     PHYMOD_SYMBOL_FIELD_ENCODE(1878, 14, 14),
   2657     /* TRNSUM_PRBS_PRECODER_LOAD_SEED:15:15 */
   2658     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1879, 15, 15)
   2659 };
   2660 static uint32_t BCMI_TSCBH_XGXS_DSC_TRNSUM_LOr_fields[] =
   2661 {
   2662     /* TRNSUM_LOW:6:15 */
   2663     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1865, 15, 6)
   2664 };
   2665 static uint32_t BCMI_TSCBH_XGXS_DSC_TRNSUM_MISCr_fields[] =
   2666 {
   2667     /* TDT_PRBS_SLIP:0:0 */
   2668     PHYMOD_SYMBOL_FIELD_ENCODE(1778, 0, 0),
   2669     /* UC_TRNSUM_EN:1:1 */
   2670     PHYMOD_SYMBOL_FIELD_ENCODE(2063, 1, 1),
   2671     /* TRNSUM_DATA_SEL:2:5 */
   2672     PHYMOD_SYMBOL_FIELD_ENCODE(1848, 5, 2),
   2673     /* TRNSUM_RND_FREE_RUNNING:6:6 */
   2674     PHYMOD_SYMBOL_FIELD_ENCODE(1883, 6, 6),
   2675     /* DC_OFFS_WRITE_EN:7:7 */
   2676     PHYMOD_SYMBOL_FIELD_ENCODE(584, 7, 7),
   2677     /* TRNSUM_ERR_SEL:8:10 */
   2678     PHYMOD_SYMBOL_FIELD_ENCODE(1854, 10, 8),
   2679     /* TRNSUM_MULTI_LEVEL_ISI:11:11 */
   2680     PHYMOD_SYMBOL_FIELD_ENCODE(1867, 11, 11),
   2681     /* TRNSUM_EYEC_SEL:12:15 */
   2682     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1855, 15, 12)
   2683 };
   2684 static uint32_t BCMI_TSCBH_XGXS_DSC_TRNSUM_PAT_CTL_0Ar_fields[] =
   2685 {
   2686     /* TRNSUM_PATTERN_0:0:9 */
   2687     PHYMOD_SYMBOL_FIELD_ENCODE(1868, 9, 0),
   2688     /* TRNSUM_PATTERN_FULL_CHECK_OFF:12:12 */
   2689     PHYMOD_SYMBOL_FIELD_ENCODE(1875, 12, 12),
   2690     /* TRNSUM_EDGE_PATTERN_EN:14:14 */
   2691     PHYMOD_SYMBOL_FIELD_ENCODE(1851, 14, 14),
   2692     /* TRNSUM_INV_PATTERN_EN:15:15 */
   2693     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1864, 15, 15)
   2694 };
   2695 static uint32_t BCMI_TSCBH_XGXS_DSC_TRNSUM_PAT_CTL_0Br_fields[] =
   2696 {
   2697     /* TRNSUM_PATTERN_0_BIT_EN:0:9 */
   2698     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1869, 9, 0)
   2699 };
   2700 static uint32_t BCMI_TSCBH_XGXS_DSC_TRNSUM_PAT_CTL_1Ar_fields[] =
   2701 {
   2702     /* TRNSUM_PATTERN_1:0:9 */
   2703     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1870, 9, 0)
   2704 };
   2705 static uint32_t BCMI_TSCBH_XGXS_DSC_TRNSUM_PAT_CTL_1Br_fields[] =
   2706 {
   2707     /* TRNSUM_PATTERN_1_BIT_EN:0:9 */
   2708     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1871, 9, 0)
   2709 };
   2710 static uint32_t BCMI_TSCBH_XGXS_DSC_TRNSUM_PAT_CTL_2Ar_fields[] =
   2711 {
   2712     /* TRNSUM_PATTERN_2:0:9 */
   2713     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1872, 9, 0)
   2714 };
   2715 static uint32_t BCMI_TSCBH_XGXS_DSC_TRNSUM_PAT_CTL_2Br_fields[] =
   2716 {
   2717     /* TRNSUM_PATTERN_2_BIT_EN:0:9 */
   2718     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1873, 9, 0)
   2719 };
   2720 static uint32_t BCMI_TSCBH_XGXS_DSC_TRNSUM_TAP_CTLr_fields[] =
   2721 {
   2722     /* TRNSUM_TAP_EN:0:7 */
   2723     PHYMOD_SYMBOL_FIELD_ENCODE(1884, 7, 0),
   2724     /* TRNSUM_TAP_SIGN:8:15 */
   2725     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1886, 15, 8)
   2726 };
   2727 static uint32_t BCMI_TSCBH_XGXS_DSC_TRNSUM_TDT_CTLr_fields[] =
   2728 {
   2729     /* TDT_TRNSUM_EN:0:0 */
   2730     PHYMOD_SYMBOL_FIELD_ENCODE(1779, 0, 0),
   2731     /* TRNSUM_TDT_COUNT:1:14 */
   2732     PHYMOD_SYMBOL_FIELD_ENCODE(1887, 14, 1),
   2733     /* TRNSUM_TDT_SLIP:15:15 */
   2734     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1888, 15, 15)
   2735 };
   2736 static uint32_t BCMI_TSCBH_XGXS_DSC_UC_CTLr_fields[] =
   2737 {
   2738     /* UC_DSC_GP_UC_REQ:0:5 */
   2739     PHYMOD_SYMBOL_FIELD_ENCODE(2053, 5, 0),
   2740     /* UC_DSC_ERROR_FOUND:6:6 */
   2741     PHYMOD_SYMBOL_FIELD_ENCODE(2052, 6, 6),
   2742     /* UC_DSC_READY_FOR_CMD:7:7 */
   2743     PHYMOD_SYMBOL_FIELD_ENCODE(2054, 7, 7),
   2744     /* UC_DSC_SUPP_INFO:8:15 */
   2745     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2056, 15, 8)
   2746 };
   2747 static uint32_t BCMI_TSCBH_XGXS_DSC_VGA_DATA_THR_STSr_fields[] =
   2748 {
   2749     /* RX_DATA05_STATUS:0:7 */
   2750     PHYMOD_SYMBOL_FIELD_ENCODE(1592, 7, 0),
   2751     /* RX_DATA14_STATUS:8:15 */
   2752     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1598, 15, 8)
   2753 };
   2754 static uint32_t BCMI_TSCBH_XGXS_DSC_VGA_D_THR_STSr_fields[] =
   2755 {
   2756     /* RX_DATA23_STATUS:0:7 */
   2757     PHYMOD_SYMBOL_FIELD_ENCODE(1604, 7, 0),
   2758     /* RX_VGA_STATUS:8:14 */
   2759     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1711, 14, 8)
   2760 };
   2761 static uint32_t BCMI_TSCBH_XGXS_DSC_VGA_PHASE_THR_STSr_fields[] =
   2762 {
   2763     /* RX_PHASE02_STATUS:0:7 */
   2764     PHYMOD_SYMBOL_FIELD_ENCODE(1657, 7, 0),
   2765     /* RX_PHASE1_STATUS:8:15 */
   2766     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1663, 15, 8)
   2767 };
   2768 static uint32_t BCMI_TSCBH_XGXS_FRACTIONAL_DIVr_fields[] =
   2769 {
   2770     /* SYNCE_FRACTIONAL_DIVSOR_CFG:0:15 */
   2771     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1774, 15, 0)
   2772 };
   2773 static uint32_t BCMI_TSCBH_XGXS_ILKN_CTL0r_fields[] =
   2774 {
   2775     /* WM:0:3 */
   2776     PHYMOD_SYMBOL_FIELD_ENCODE(2083, 3, 0),
   2777     /* ILKN_SEL:4:4 */
   2778     PHYMOD_SYMBOL_FIELD_ENCODE(785, 4, 4),
   2779     /* SOFT_RST_TX:8:8 */
   2780     PHYMOD_SYMBOL_FIELD_ENCODE(1747, 8, 8),
   2781     /* SOFT_RST_RX:9:9 */
   2782     PHYMOD_SYMBOL_FIELD_ENCODE(1746, 9, 9),
   2783     /* CREDIT_EN:15:15 */
   2784     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(543, 15, 15)
   2785 };
   2786 static uint32_t BCMI_TSCBH_XGXS_ILKN_STS0r_fields[] =
   2787 {
   2788     /* RXFIFO_EMPTY:0:0 */
   2789     PHYMOD_SYMBOL_FIELD_ENCODE(1576, 0, 0),
   2790     /* RXFIFO_FULL:1:1 */
   2791     PHYMOD_SYMBOL_FIELD_ENCODE(1577, 1, 1),
   2792     /* RXFIFO_NOT_EMPTY:2:2 */
   2793     PHYMOD_SYMBOL_FIELD_ENCODE(1578, 2, 2),
   2794     /* TXFIFO_EMPTY:3:3 */
   2795     PHYMOD_SYMBOL_FIELD_ENCODE(1913, 3, 3),
   2796     /* TXFIFO_FULL:4:4 */
   2797     PHYMOD_SYMBOL_FIELD_ENCODE(1914, 4, 4),
   2798     /* TXFIFO_OVERRUN:5:5 */
   2799     PHYMOD_SYMBOL_FIELD_ENCODE(1915, 5, 5),
   2800     /* TXFIFO_UNDERRUN:6:6 */
   2801     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1916, 6, 6)
   2802 };
   2803 static uint32_t BCMI_TSCBH_XGXS_INTEGER_DIVr_fields[] =
   2804 {
   2805     /* SYNCE_MODE_STAGE0:0:1 */
   2806     PHYMOD_SYMBOL_FIELD_ENCODE(1775, 1, 0),
   2807     /* SYNCE_MODE_STAGE1:2:3 */
   2808     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1776, 3, 2)
   2809 };
   2810 static uint32_t BCMI_TSCBH_XGXS_LNKTRNIR_BASE_R_LP_COEFF_UPDr_fields[] =
   2811 {
   2812     /* LINKTRN_IEEE_LP_COEFF_UPDATE:0:15 */
   2813     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(832, 15, 0)
   2814 };
   2815 static uint32_t BCMI_TSCBH_XGXS_LNKTRNIR_BASE_R_LP_STS_REPr_fields[] =
   2816 {
   2817     /* LINKTRN_IEEE_LP_STATUS_REPORT:0:15 */
   2818     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(833, 15, 0)
   2819 };
   2820 static uint32_t BCMI_TSCBH_XGXS_LNKTRNIT_BASE_R_LD_COEFF_UPDr_fields[] =
   2821 {
   2822     /* LINKTRN_IEEE_LD_COEFF_UPDATE:0:15 */
   2823     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(830, 15, 0)
   2824 };
   2825 static uint32_t BCMI_TSCBH_XGXS_LNKTRNIT_BASE_R_LD_STS_REPr_fields[] =
   2826 {
   2827     /* LINKTRN_IEEE_LD_STATUS_REPORT:0:15 */
   2828     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(831, 15, 0)
   2829 };
   2830 static uint32_t BCMI_TSCBH_XGXS_LNKTRNIT_BASE_R_PMD_CTLr_fields[] =
   2831 {
   2832     /* LINKTRN_IEEE_RESTART_TRAINING:0:0 */
   2833     PHYMOD_SYMBOL_FIELD_ENCODE(835, 0, 0),
   2834     /* LINKTRN_IEEE_TRAINING_ENABLE:1:1 */
   2835     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(836, 1, 1)
   2836 };
   2837 static uint32_t BCMI_TSCBH_XGXS_LNKTRNIT_BASE_R_PMD_STSr_fields[] =
   2838 {
   2839     /* LINKTRN_IEEE_RECEIVER_STATUS:0:0 */
   2840     PHYMOD_SYMBOL_FIELD_ENCODE(834, 0, 0),
   2841     /* LINKTRN_IEEE_FRAME_LOCK:1:1 */
   2842     PHYMOD_SYMBOL_FIELD_ENCODE(829, 1, 1),
   2843     /* LINKTRN_IEEE_TRAINING_STATUS:2:2 */
   2844     PHYMOD_SYMBOL_FIELD_ENCODE(838, 2, 2),
   2845     /* LINKTRN_IEEE_TRAINING_FAILURE:3:3 */
   2846     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(837, 3, 3)
   2847 };
   2848 static uint32_t BCMI_TSCBH_XGXS_LNKTRNUR_CTL0r_fields[] =
   2849 {
   2850     /* LINKTRN_RX_TRAINING_EN:0:0 */
   2851     PHYMOD_SYMBOL_FIELD_ENCODE(882, 0, 0),
   2852     /* LINKTRN_TR_COARSE_LOCK:1:1 */
   2853     PHYMOD_SYMBOL_FIELD_ENCODE(892, 1, 1),
   2854     /* LINKTRN_RX_SIGNAL_OK:2:2 */
   2855     PHYMOD_SYMBOL_FIELD_ENCODE(880, 2, 2),
   2856     /* LINKTRN_RX_TRN_MODE:3:3 */
   2857     PHYMOD_SYMBOL_FIELD_ENCODE(883, 3, 3),
   2858     /* LINKTRN_RX_ACTIVE:4:4 */
   2859     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(871, 4, 4)
   2860 };
   2861 static uint32_t BCMI_TSCBH_XGXS_LNKTRNUR_CTL1r_fields[] =
   2862 {
   2863     /* LINKTRN_GOOD_MARKER_CNT:0:1 */
   2864     PHYMOD_SYMBOL_FIELD_ENCODE(828, 1, 0),
   2865     /* LINKTRN_BAD_MARKER_CNT:4:6 */
   2866     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(816, 6, 4)
   2867 };
   2868 static uint32_t BCMI_TSCBH_XGXS_LNKTRNUR_CTL2r_fields[] =
   2869 {
   2870     /* LINKTRN_DME_CELL_BOUNDARY_CHK:4:4 */
   2871     PHYMOD_SYMBOL_FIELD_ENCODE(821, 4, 4),
   2872     /* LINKTRN_STRICT_DME_CHK:5:5 */
   2873     PHYMOD_SYMBOL_FIELD_ENCODE(885, 5, 5),
   2874     /* LINKTRN_STRICT_MARKER_CHK:6:6 */
   2875     PHYMOD_SYMBOL_FIELD_ENCODE(886, 6, 6),
   2876     /* LINKTRN_PPM_OFFSET_EN:7:7 */
   2877     PHYMOD_SYMBOL_FIELD_ENCODE(862, 7, 7),
   2878     /* LINKTRN_RX_DP_LN_CLK_EN:8:8 */
   2879     PHYMOD_SYMBOL_FIELD_ENCODE(872, 8, 8),
   2880     /* LINKTRN_FRAME_CONSISTENCY_CHK_EN:9:9 */
   2881     PHYMOD_SYMBOL_FIELD_ENCODE(824, 9, 9),
   2882     /* LINKTRN_BLOCK_LP_IEEE_UPDATES:10:10 */
   2883     PHYMOD_SYMBOL_FIELD_ENCODE(817, 10, 10),
   2884     /* LINKTRN_USEDME_MARKER_CHK:11:11 */
   2885     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(896, 11, 11)
   2886 };
   2887 static uint32_t BCMI_TSCBH_XGXS_LNKTRNUR_CTL3r_fields[] =
   2888 {
   2889     /* LINKTRN_RX_SIGNDATA_SEL:0:0 */
   2890     PHYMOD_SYMBOL_FIELD_ENCODE(881, 0, 0),
   2891     /* LINKTRN_ASYNC_PPM_ADJUST:2:2 */
   2892     PHYMOD_SYMBOL_FIELD_ENCODE(815, 2, 2),
   2893     /* LINKTRN_RX_PAM4_TRN_FRAME_SIZE:3:3 */
   2894     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(873, 3, 3)
   2895 };
   2896 static uint32_t BCMI_TSCBH_XGXS_LNKTRNUR_CTL4r_fields[] =
   2897 {
   2898     /* LINKTRN_RX_PRBS_CHK_EN:0:0 */
   2899     PHYMOD_SYMBOL_FIELD_ENCODE(877, 0, 0),
   2900     /* LINKTRN_RX_PRBS_CHK_AUTO_DETECT_EN:1:1 */
   2901     PHYMOD_SYMBOL_FIELD_ENCODE(874, 1, 1),
   2902     /* LINKTRN_RX_PRBS_CHK_AUTO_DETECT_RELOCK_EN:2:2 */
   2903     PHYMOD_SYMBOL_FIELD_ENCODE(876, 2, 2),
   2904     /* LINKTRN_RX_PRBS_CHK_MODE_SEL:4:5 */
   2905     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(878, 5, 4)
   2906 };
   2907 static uint32_t BCMI_TSCBH_XGXS_LNKTRNUR_CTL5r_fields[] =
   2908 {
   2909     /* LINKTRN_FFLOCK_DERR_CONSEC_FCNT:0:4 */
   2910     PHYMOD_SYMBOL_FIELD_ENCODE(822, 4, 0),
   2911     /* LINKTRN_FFLOCK_DERR_PER_FCNT:8:10 */
   2912     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(823, 10, 8)
   2913 };
   2914 static uint32_t BCMI_TSCBH_XGXS_LNKTRNUR_STS0r_fields[] =
   2915 {
   2916     /* LINKTRN_FRAME_LOCK:0:0 */
   2917     PHYMOD_SYMBOL_FIELD_ENCODE(825, 0, 0),
   2918     /* LINKTRN_REMOTE_RX_READY:1:1 */
   2919     PHYMOD_SYMBOL_FIELD_ENCODE(870, 1, 1),
   2920     /* LINKTRN_FRAME_LOCK_LL:2:2 */
   2921     PHYMOD_SYMBOL_FIELD_ENCODE(827, 2, 2),
   2922     /* LINKTRN_FRAME_LOCK_LH:3:3 */
   2923     PHYMOD_SYMBOL_FIELD_ENCODE(826, 3, 3),
   2924     /* LINKTRN_RCV_COEFF_UPDATE_PARITY:4:4 */
   2925     PHYMOD_SYMBOL_FIELD_ENCODE(868, 4, 4),
   2926     /* LINKTRN_RCV_STATUS_REPORT_PARITY:5:5 */
   2927     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(869, 5, 5)
   2928 };
   2929 static uint32_t BCMI_TSCBH_XGXS_LNKTRNUR_STS1r_fields[] =
   2930 {
   2931     /* LINKTRN_RX_PRBS_CHK_AUTO_DETECT_LOCK:0:0 */
   2932     PHYMOD_SYMBOL_FIELD_ENCODE(875, 0, 0),
   2933     /* LINKTRN_RX_PRBS_CHK_MODE_SEL_AUTO_DETECT:4:5 */
   2934     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(879, 5, 4)
   2935 };
   2936 static uint32_t BCMI_TSCBH_XGXS_LNKTRNUR_UC_INTR_CTL0r_fields[] =
   2937 {
   2938     /* LINKTRN_MICRO_UPDATE_CHG_INT_EN:0:0 */
   2939     PHYMOD_SYMBOL_FIELD_ENCODE(852, 0, 0),
   2940     /* LINKTRN_MICRO_STATUS_CHG_INT_EN:1:1 */
   2941     PHYMOD_SYMBOL_FIELD_ENCODE(848, 1, 1),
   2942     /* LINKTRN_MICRO_FRAME_LOCK_INT_EN:2:2 */
   2943     PHYMOD_SYMBOL_FIELD_ENCODE(844, 2, 2),
   2944     /* LINKTRN_MICRO_FFLOCK_INT_EN:3:3 */
   2945     PHYMOD_SYMBOL_FIELD_ENCODE(842, 3, 3),
   2946     /* LINKTRN_MICRO_UPDATE_REQ_INT_FRC:8:8 */
   2947     PHYMOD_SYMBOL_FIELD_ENCODE(854, 8, 8),
   2948     /* LINKTRN_MICRO_UPDATE_REQ_INT_FRC_VAL:9:9 */
   2949     PHYMOD_SYMBOL_FIELD_ENCODE(855, 9, 9),
   2950     /* LINKTRN_MICRO_STATUS_RESP_INT_FRC:10:10 */
   2951     PHYMOD_SYMBOL_FIELD_ENCODE(850, 10, 10),
   2952     /* LINKTRN_MICRO_STATUS_RESP_INT_FRC_VAL:11:11 */
   2953     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(851, 11, 11)
   2954 };
   2955 static uint32_t BCMI_TSCBH_XGXS_LNKTRNUR_UC_INTR_CTL1r_fields[] =
   2956 {
   2957     /* LINKTRN_MICRO_INTERRUPT_MASK_CONTROL_PAGE:0:15 */
   2958     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(846, 15, 0)
   2959 };
   2960 static uint32_t BCMI_TSCBH_XGXS_LNKTRNUR_UC_INTR_CTL2r_fields[] =
   2961 {
   2962     /* LINKTRN_MICRO_INTERRUPT_MASK_STATUS_PAGE:0:15 */
   2963     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(847, 15, 0)
   2964 };
   2965 static uint32_t BCMI_TSCBH_XGXS_LNKTRNUR_UC_STS0r_fields[] =
   2966 {
   2967     /* LINKTRN_MICRO_UPDATE_CHG_LSTATUS:0:0 */
   2968     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(853, 0, 0)
   2969 };
   2970 static uint32_t BCMI_TSCBH_XGXS_LNKTRNUR_UC_STS1r_fields[] =
   2971 {
   2972     /* LINKTRN_MICRO_STATUS_CHG_LSTATUS:0:0 */
   2973     PHYMOD_SYMBOL_FIELD_ENCODE(849, 0, 0),
   2974     /* LINKTRN_MICRO_FRAME_LOCK_LSTATUS:1:1 */
   2975     PHYMOD_SYMBOL_FIELD_ENCODE(845, 1, 1),
   2976     /* LINKTRN_MICRO_FFLOCK_LSTATUS:2:2 */
   2977     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(843, 2, 2)
   2978 };
   2979 static uint32_t BCMI_TSCBH_XGXS_LNKTRNUT_CTL0r_fields[] =
   2980 {
   2981     /* LINKTRN_SW_RX_TRAINED:0:0 */
   2982     PHYMOD_SYMBOL_FIELD_ENCODE(889, 0, 0),
   2983     /* LINKTRN_SW_FRAME_LOCK:1:1 */
   2984     PHYMOD_SYMBOL_FIELD_ENCODE(887, 1, 1),
   2985     /* LINKTRN_SW_REMOTE_RX_READY:2:2 */
   2986     PHYMOD_SYMBOL_FIELD_ENCODE(888, 2, 2),
   2987     /* LINKTRN_IGNORE_XMT_REG_VALUE:3:3 */
   2988     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(839, 3, 3)
   2989 };
   2990 static uint32_t BCMI_TSCBH_XGXS_LNKTRNUT_CTL1r_fields[] =
   2991 {
   2992     /* LINKTRN_BRK_RING_OSC:0:0 */
   2993     PHYMOD_SYMBOL_FIELD_ENCODE(818, 0, 0),
   2994     /* LINKTRN_DIS_MAX_WAIT_TIMER:1:1 */
   2995     PHYMOD_SYMBOL_FIELD_ENCODE(820, 1, 1),
   2996     /* LINKTRN_TX_DP_LN_CLK_EN:2:2 */
   2997     PHYMOD_SYMBOL_FIELD_ENCODE(893, 2, 2),
   2998     /* LINKTRN_TIMER_VALUE_SEL:15:15 */
   2999     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(890, 15, 15)
   3000 };
   3001 static uint32_t BCMI_TSCBH_XGXS_LNKTRNUT_CTL2r_fields[] =
   3002 {
   3003     /* LINKTRN_PRBS_MODE_SEL:0:1 */
   3004     PHYMOD_SYMBOL_FIELD_ENCODE(865, 1, 0),
   3005     /* LINKTRN_TX_TRN_MODE:4:4 */
   3006     PHYMOD_SYMBOL_FIELD_ENCODE(895, 4, 4),
   3007     /* LINKTRN_TX_PAM4_TRN_FRAME_SIZE:5:5 */
   3008     PHYMOD_SYMBOL_FIELD_ENCODE(894, 5, 5),
   3009     /* LINKTRN_PAM4M_SYM_SEL:6:6 */
   3010     PHYMOD_SYMBOL_FIELD_ENCODE(860, 6, 6),
   3011     /* LINKTRN_PAM4M_PRECODER_EN:8:8 */
   3012     PHYMOD_SYMBOL_FIELD_ENCODE(859, 8, 8),
   3013     /* LINKTRN_PAM4_SYMBOL_BIT_SWAP:9:9 */
   3014     PHYMOD_SYMBOL_FIELD_ENCODE(861, 9, 9),
   3015     /* LINKTRN_PAM4M_GRAYCODER_EN_FRC_VAL:10:10 */
   3016     PHYMOD_SYMBOL_FIELD_ENCODE(857, 10, 10),
   3017     /* LINKTRN_PAM4M_GRAYCODER_EN_FRC:11:11 */
   3018     PHYMOD_SYMBOL_FIELD_ENCODE(856, 11, 11),
   3019     /* LINKTRN_PAM4M_PRBS_REPL_MODE:12:13 */
   3020     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(858, 13, 12)
   3021 };
   3022 static uint32_t BCMI_TSCBH_XGXS_LNKTRNUT_CTL3r_fields[] =
   3023 {
   3024     /* LINKTRN_PRBS13_SEED_VAL:0:12 */
   3025     PHYMOD_SYMBOL_FIELD_ENCODE(864, 12, 0),
   3026     /* LINKTRN_PRBS13_POLY_SEL:14:15 */
   3027     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(863, 15, 14)
   3028 };
   3029 static uint32_t BCMI_TSCBH_XGXS_LNKTRNUT_CTL4r_fields[] =
   3030 {
   3031     /* LINKTRN_PRBS_SEED_VAL:0:10 */
   3032     PHYMOD_SYMBOL_FIELD_ENCODE(867, 10, 0),
   3033     /* LINKTRN_CL93PRBS_POLY_SEL:11:12 */
   3034     PHYMOD_SYMBOL_FIELD_ENCODE(819, 12, 11),
   3035     /* LINKTRN_PRBS_SEED_SEL:14:15 */
   3036     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(866, 15, 14)
   3037 };
   3038 static uint32_t BCMI_TSCBH_XGXS_LNKTRNUT_LD_XMT_STS_PAGEr_fields[] =
   3039 {
   3040     /* LINKTRN_LD_XMT_STATUS_PAGE:0:15 */
   3041     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(840, 15, 0)
   3042 };
   3043 static uint32_t BCMI_TSCBH_XGXS_LNKTRNUT_STS0r_fields[] =
   3044 {
   3045     /* LINKTRN_LOCAL_RX_READY:0:0 */
   3046     PHYMOD_SYMBOL_FIELD_ENCODE(841, 0, 0),
   3047     /* LINKTRN_TRAINING_FSM_SIGNAL_DETECT:1:1 */
   3048     PHYMOD_SYMBOL_FIELD_ENCODE(891, 1, 1),
   3049     /* LINKTRN_XMT_COEFF_UPDATE_PARITY:4:4 */
   3050     PHYMOD_SYMBOL_FIELD_ENCODE(897, 4, 4),
   3051     /* LINKTRN_XMT_STATUS_REPORT_PARITY:5:5 */
   3052     PHYMOD_SYMBOL_FIELD_ENCODE(898, 5, 5),
   3053     /* LINKTRN_SM_CURRENT_STATE:12:14 */
   3054     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(884, 14, 12)
   3055 };
   3056 static uint32_t BCMI_TSCBH_XGXS_LNKTRNUT_XMT_UPD_PAGEr_fields[] =
   3057 {
   3058     /* LINKTRN_XMT_UPDATE_PAGE:0:15 */
   3059     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(899, 15, 0)
   3060 };
   3061 static uint32_t BCMI_TSCBH_XGXS_LN_ADDR0r_fields[] =
   3062 {
   3063     /* RX_LANE_ADDR_0:0:4 */
   3064     PHYMOD_SYMBOL_FIELD_ENCODE(1614, 4, 0),
   3065     /* TX_LANE_ADDR_0:8:12 */
   3066     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1952, 12, 8)
   3067 };
   3068 static uint32_t BCMI_TSCBH_XGXS_LN_ADDR1r_fields[] =
   3069 {
   3070     /* RX_LANE_ADDR_1:0:4 */
   3071     PHYMOD_SYMBOL_FIELD_ENCODE(1615, 4, 0),
   3072     /* TX_LANE_ADDR_1:8:12 */
   3073     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1953, 12, 8)
   3074 };
   3075 static uint32_t BCMI_TSCBH_XGXS_LN_ADDR2r_fields[] =
   3076 {
   3077     /* RX_LANE_ADDR_2:0:4 */
   3078     PHYMOD_SYMBOL_FIELD_ENCODE(1616, 4, 0),
   3079     /* TX_LANE_ADDR_2:8:12 */
   3080     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1954, 12, 8)
   3081 };
   3082 static uint32_t BCMI_TSCBH_XGXS_LN_ADDR3r_fields[] =
   3083 {
   3084     /* RX_LANE_ADDR_3:0:4 */
   3085     PHYMOD_SYMBOL_FIELD_ENCODE(1617, 4, 0),
   3086     /* TX_LANE_ADDR_3:8:12 */
   3087     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1955, 12, 8)
   3088 };
   3089 static uint32_t BCMI_TSCBH_XGXS_LN_ADDR4r_fields[] =
   3090 {
   3091     /* RX_LANE_ADDR_4:0:4 */
   3092     PHYMOD_SYMBOL_FIELD_ENCODE(1618, 4, 0),
   3093     /* TX_LANE_ADDR_4:8:12 */
   3094     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1956, 12, 8)
   3095 };
   3096 static uint32_t BCMI_TSCBH_XGXS_LN_ADDR5r_fields[] =
   3097 {
   3098     /* RX_LANE_ADDR_5:0:4 */
   3099     PHYMOD_SYMBOL_FIELD_ENCODE(1619, 4, 0),
   3100     /* TX_LANE_ADDR_5:8:12 */
   3101     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1957, 12, 8)
   3102 };
   3103 static uint32_t BCMI_TSCBH_XGXS_LN_ADDR6r_fields[] =
   3104 {
   3105     /* RX_LANE_ADDR_6:0:4 */
   3106     PHYMOD_SYMBOL_FIELD_ENCODE(1620, 4, 0),
   3107     /* TX_LANE_ADDR_6:8:12 */
   3108     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1958, 12, 8)
   3109 };
   3110 static uint32_t BCMI_TSCBH_XGXS_LN_ADDR7r_fields[] =
   3111 {
   3112     /* RX_LANE_ADDR_7:0:4 */
   3113     PHYMOD_SYMBOL_FIELD_ENCODE(1621, 4, 0),
   3114     /* TX_LANE_ADDR_7:8:12 */
   3115     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1959, 12, 8)
   3116 };
   3117 static uint32_t BCMI_TSCBH_XGXS_LN_CFG_FWAPI_DATA0r_fields[] =
   3118 {
   3119     /* LANE_CFG_FWAPI_DATA0:0:15 */
   3120     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(800, 15, 0)
   3121 };
   3122 static uint32_t BCMI_TSCBH_XGXS_LN_CFG_FWAPI_DATA1r_fields[] =
   3123 {
   3124     /* LANE_CFG_FWAPI_DATA1:0:15 */
   3125     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(801, 15, 0)
   3126 };
   3127 static uint32_t BCMI_TSCBH_XGXS_MAIN0_DEVINPKG5r_fields[] =
   3128 {
   3129     /* CLAUSE22:0:0 */
   3130     PHYMOD_SYMBOL_FIELD_ENCODE(507, 0, 0),
   3131     /* PMA_PMD:1:1 */
   3132     PHYMOD_SYMBOL_FIELD_ENCODE(1231, 1, 1),
   3133     /* WIS:2:2 */
   3134     PHYMOD_SYMBOL_FIELD_ENCODE(2082, 2, 2),
   3135     /* PCS_XS:3:3 */
   3136     PHYMOD_SYMBOL_FIELD_ENCODE(1199, 3, 3),
   3137     /* PHY_XS:4:4 */
   3138     PHYMOD_SYMBOL_FIELD_ENCODE(1208, 4, 4),
   3139     /* DTE_XS:5:5 */
   3140     PHYMOD_SYMBOL_FIELD_ENCODE(624, 5, 5),
   3141     /* TC:6:6 */
   3142     PHYMOD_SYMBOL_FIELD_ENCODE(1777, 6, 6),
   3143     /* AN:7:7 */
   3144     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(278, 7, 7)
   3145 };
   3146 static uint32_t BCMI_TSCBH_XGXS_MAIN0_ECC_1B_ERR_INTR_ENr_fields[] =
   3147 {
   3148     /* ECC_1B_ERR_INTR_EN_BASE_R_FEC:0:0 */
   3149     PHYMOD_SYMBOL_FIELD_ENCODE(626, 0, 0),
   3150     /* ECC_1B_ERR_INTR_EN_RSFEC_RBUF_MPP:1:1 */
   3151     PHYMOD_SYMBOL_FIELD_ENCODE(628, 1, 1),
   3152     /* ECC_1B_ERR_INTR_EN_RSFEC_RS400G_MPP:3:3 */
   3153     PHYMOD_SYMBOL_FIELD_ENCODE(629, 3, 3),
   3154     /* ECC_1B_ERR_INTR_EN_DESKEW:5:5 */
   3155     PHYMOD_SYMBOL_FIELD_ENCODE(627, 5, 5),
   3156     /* ECC_1B_ERR_INTR_EN_SPD_TBL:6:6 */
   3157     PHYMOD_SYMBOL_FIELD_ENCODE(632, 6, 6),
   3158     /* ECC_1B_ERR_INTR_EN_AM_TBL:7:7 */
   3159     PHYMOD_SYMBOL_FIELD_ENCODE(625, 7, 7),
   3160     /* ECC_1B_ERR_INTR_EN_UM_TBL:8:8 */
   3161     PHYMOD_SYMBOL_FIELD_ENCODE(635, 8, 8),
   3162     /* ECC_1B_ERR_INTR_EN_TX_1588_MPP:9:9 */
   3163     PHYMOD_SYMBOL_FIELD_ENCODE(634, 9, 9),
   3164     /* ECC_1B_ERR_INTR_EN_TX_1588_400G:11:11 */
   3165     PHYMOD_SYMBOL_FIELD_ENCODE(633, 11, 11),
   3166     /* ECC_1B_ERR_INTR_EN_RX_1588_MPP:12:12 */
   3167     PHYMOD_SYMBOL_FIELD_ENCODE(631, 12, 12),
   3168     /* ECC_1B_ERR_INTR_EN_RX_1588_400G:14:14 */
   3169     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(630, 14, 14)
   3170 };
   3171 static uint32_t BCMI_TSCBH_XGXS_MAIN0_ECC_2B_ERR_INTR_ENr_fields[] =
   3172 {
   3173     /* ECC_2B_ERR_INTR_EN_BASE_R_FEC:0:0 */
   3174     PHYMOD_SYMBOL_FIELD_ENCODE(637, 0, 0),
   3175     /* ECC_2B_ERR_INTR_EN_RSFEC_RBUF_MPP:1:1 */
   3176     PHYMOD_SYMBOL_FIELD_ENCODE(639, 1, 1),
   3177     /* ECC_2B_ERR_INTR_EN_RSFEC_RS400G_MPP:3:3 */
   3178     PHYMOD_SYMBOL_FIELD_ENCODE(640, 3, 3),
   3179     /* ECC_2B_ERR_INTR_EN_DESKEW:5:5 */
   3180     PHYMOD_SYMBOL_FIELD_ENCODE(638, 5, 5),
   3181     /* ECC_2B_ERR_INTR_EN_SPD_TBL:6:6 */
   3182     PHYMOD_SYMBOL_FIELD_ENCODE(643, 6, 6),
   3183     /* ECC_2B_ERR_INTR_EN_AM_TBL:7:7 */
   3184     PHYMOD_SYMBOL_FIELD_ENCODE(636, 7, 7),
   3185     /* ECC_2B_ERR_INTR_EN_UM_TBL:8:8 */
   3186     PHYMOD_SYMBOL_FIELD_ENCODE(646, 8, 8),
   3187     /* ECC_2B_ERR_INTR_EN_TX_1588_MPP:9:9 */
   3188     PHYMOD_SYMBOL_FIELD_ENCODE(645, 9, 9),
   3189     /* ECC_2B_ERR_INTR_EN_TX_1588_400G:11:11 */
   3190     PHYMOD_SYMBOL_FIELD_ENCODE(644, 11, 11),
   3191     /* ECC_2B_ERR_INTR_EN_RX_1588_MPP:12:12 */
   3192     PHYMOD_SYMBOL_FIELD_ENCODE(642, 12, 12),
   3193     /* ECC_2B_ERR_INTR_EN_RX_1588_400G:14:14 */
   3194     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(641, 14, 14)
   3195 };
   3196 static uint32_t BCMI_TSCBH_XGXS_MAIN0_ECC_CORRUPT_CTL0r_fields[] =
   3197 {
   3198     /* ECC_CORRUPT_BASE_R_FEC:0:1 */
   3199     PHYMOD_SYMBOL_FIELD_ENCODE(648, 1, 0),
   3200     /* ECC_CORRUPT_RSFEC_RBUF_MPP:2:3 */
   3201     PHYMOD_SYMBOL_FIELD_ENCODE(650, 3, 2),
   3202     /* ECC_CORRUPT_RSFEC_RS400G_MPP:6:7 */
   3203     PHYMOD_SYMBOL_FIELD_ENCODE(651, 7, 6),
   3204     /* ECC_CORRUPT_DESKEW:10:11 */
   3205     PHYMOD_SYMBOL_FIELD_ENCODE(649, 11, 10),
   3206     /* ECC_CORRUPT_SPD_TBL:12:13 */
   3207     PHYMOD_SYMBOL_FIELD_ENCODE(654, 13, 12),
   3208     /* ECC_CORRUPT_AM_TBL:14:15 */
   3209     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(647, 15, 14)
   3210 };
   3211 static uint32_t BCMI_TSCBH_XGXS_MAIN0_ECC_CORRUPT_CTL1r_fields[] =
   3212 {
   3213     /* ECC_CORRUPT_UM_TBL:0:1 */
   3214     PHYMOD_SYMBOL_FIELD_ENCODE(657, 1, 0),
   3215     /* ECC_CORRUPT_TX_1588_MPP:2:3 */
   3216     PHYMOD_SYMBOL_FIELD_ENCODE(656, 3, 2),
   3217     /* ECC_CORRUPT_TX_1588_400G:6:7 */
   3218     PHYMOD_SYMBOL_FIELD_ENCODE(655, 7, 6),
   3219     /* ECC_CORRUPT_RX_1588_MPP:8:9 */
   3220     PHYMOD_SYMBOL_FIELD_ENCODE(653, 9, 8),
   3221     /* ECC_CORRUPT_RX_1588_400G:12:13 */
   3222     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(652, 13, 12)
   3223 };
   3224 static uint32_t BCMI_TSCBH_XGXS_MAIN0_ECC_DIS_CTLr_fields[] =
   3225 {
   3226     /* ECC_DISABLE_BASE_R_FEC:0:0 */
   3227     PHYMOD_SYMBOL_FIELD_ENCODE(659, 0, 0),
   3228     /* ECC_DISABLE_RSFEC_RBUF_MPP:1:1 */
   3229     PHYMOD_SYMBOL_FIELD_ENCODE(661, 1, 1),
   3230     /* ECC_DISABLE_RSFEC_RS400G_MPP:3:3 */
   3231     PHYMOD_SYMBOL_FIELD_ENCODE(662, 3, 3),
   3232     /* ECC_DISABLE_DESKEW:5:5 */
   3233     PHYMOD_SYMBOL_FIELD_ENCODE(660, 5, 5),
   3234     /* ECC_DISABLE_SPD_TBL:6:6 */
   3235     PHYMOD_SYMBOL_FIELD_ENCODE(665, 6, 6),
   3236     /* ECC_DISABLE_AM_TBL:7:7 */
   3237     PHYMOD_SYMBOL_FIELD_ENCODE(658, 7, 7),
   3238     /* ECC_DISABLE_UM_TBL:8:8 */
   3239     PHYMOD_SYMBOL_FIELD_ENCODE(668, 8, 8),
   3240     /* ECC_DISABLE_TX_1588_MPP:9:9 */
   3241     PHYMOD_SYMBOL_FIELD_ENCODE(667, 9, 9),
   3242     /* ECC_DISABLE_TX_1588_400G:11:11 */
   3243     PHYMOD_SYMBOL_FIELD_ENCODE(666, 11, 11),
   3244     /* ECC_DISABLE_RX_1588_MPP:12:12 */
   3245     PHYMOD_SYMBOL_FIELD_ENCODE(664, 12, 12),
   3246     /* ECC_DISABLE_RX_1588_400G:14:14 */
   3247     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(663, 14, 14)
   3248 };
   3249 static uint32_t BCMI_TSCBH_XGXS_MAIN0_SERDESIDr_fields[] =
   3250 {
   3251     /* MODEL_NUMBER:0:5 */
   3252     PHYMOD_SYMBOL_FIELD_ENCODE(1132, 5, 0),
   3253     /* TECH_PROC:6:8 */
   3254     PHYMOD_SYMBOL_FIELD_ENCODE(1780, 8, 6),
   3255     /* BONDING:9:10 */
   3256     PHYMOD_SYMBOL_FIELD_ENCODE(432, 10, 9),
   3257     /* REV_NUMBER:11:13 */
   3258     PHYMOD_SYMBOL_FIELD_ENCODE(1356, 13, 11),
   3259     /* REV_LETTER:14:15 */
   3260     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1355, 15, 14)
   3261 };
   3262 static uint32_t BCMI_TSCBH_XGXS_MAIN0_SETUPr_fields[] =
   3263 {
   3264     /* RESOLVED_PORT_MODE_CONTROL:3:3 */
   3265     PHYMOD_SYMBOL_FIELD_ENCODE(1333, 3, 3),
   3266     /* PORT_MODE_SEL:4:6 */
   3267     PHYMOD_SYMBOL_FIELD_ENCODE(1257, 6, 4),
   3268     /* REFCLK_SEL:7:9 */
   3269     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1322, 9, 7)
   3270 };
   3271 static uint32_t BCMI_TSCBH_XGXS_MAIN0_TICK_CTL0r_fields[] =
   3272 {
   3273     /* TICK_DENOMINATOR:2:11 */
   3274     PHYMOD_SYMBOL_FIELD_ENCODE(1781, 11, 2),
   3275     /* TICK_NUMERATOR_LOWER:12:15 */
   3276     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1782, 15, 12)
   3277 };
   3278 static uint32_t BCMI_TSCBH_XGXS_MAIN0_TICK_CTL1r_fields[] =
   3279 {
   3280     /* TICK_NUMERATOR_UPPER:0:14 */
   3281     PHYMOD_SYMBOL_FIELD_ENCODE(1783, 14, 0),
   3282     /* TICK_OVERRIDE:15:15 */
   3283     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1784, 15, 15)
   3284 };
   3285 static uint32_t BCMI_TSCBH_XGXS_MAIN0_TM_CTLr_fields[] =
   3286 {
   3287     /* SRF_MEM_TM:0:7 */
   3288     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1754, 7, 0)
   3289 };
   3290 static uint32_t BCMI_TSCBH_XGXS_MDIO_AERr_fields[] =
   3291 {
   3292     /* MDIO_AER:0:10 */
   3293     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(969, 10, 0)
   3294 };
   3295 static uint32_t BCMI_TSCBH_XGXS_MDIO_BCST_PORT_ADDRr_fields[] =
   3296 {
   3297     /* MDIO_BRCST_PORT_ADDR:0:4 */
   3298     PHYMOD_SYMBOL_FIELD_ENCODE(970, 4, 0),
   3299     /* MDIO_DRV_COMCLK:15:15 */
   3300     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(977, 15, 15)
   3301 };
   3302 static uint32_t BCMI_TSCBH_XGXS_MDIO_MMD_SELr_fields[] =
   3303 {
   3304     /* MDIO_DEV_ID0_EN:0:0 */
   3305     PHYMOD_SYMBOL_FIELD_ENCODE(973, 0, 0),
   3306     /* MDIO_DEV_PMD_EN:2:2 */
   3307     PHYMOD_SYMBOL_FIELD_ENCODE(976, 2, 2),
   3308     /* MDIO_DEV_AN_EN:3:3 */
   3309     PHYMOD_SYMBOL_FIELD_ENCODE(971, 3, 3),
   3310     /* MDIO_DEV_PHY_EN:4:4 */
   3311     PHYMOD_SYMBOL_FIELD_ENCODE(975, 4, 4),
   3312     /* MDIO_DEV_DTE_EN:5:5 */
   3313     PHYMOD_SYMBOL_FIELD_ENCODE(972, 5, 5),
   3314     /* MDIO_DEV_PCS_EN:6:6 */
   3315     PHYMOD_SYMBOL_FIELD_ENCODE(974, 6, 6),
   3316     /* MDIO_MULTI_MMDS_EN:14:14 */
   3317     PHYMOD_SYMBOL_FIELD_ENCODE(980, 14, 14),
   3318     /* MDIO_MULTI_PRTS_EN:15:15 */
   3319     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(981, 15, 15)
   3320 };
   3321 static uint32_t BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ0r_fields[] =
   3322 {
   3323     /* PATT_GEN_SEQ_0:0:15 */
   3324     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1180, 15, 0)
   3325 };
   3326 static uint32_t BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ1r_fields[] =
   3327 {
   3328     /* PATT_GEN_SEQ_1:0:15 */
   3329     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1181, 15, 0)
   3330 };
   3331 static uint32_t BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ2r_fields[] =
   3332 {
   3333     /* PATT_GEN_SEQ_2:0:15 */
   3334     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1187, 15, 0)
   3335 };
   3336 static uint32_t BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ3r_fields[] =
   3337 {
   3338     /* PATT_GEN_SEQ_3:0:15 */
   3339     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1188, 15, 0)
   3340 };
   3341 static uint32_t BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ4r_fields[] =
   3342 {
   3343     /* PATT_GEN_SEQ_4:0:15 */
   3344     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1189, 15, 0)
   3345 };
   3346 static uint32_t BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ5r_fields[] =
   3347 {
   3348     /* PATT_GEN_SEQ_5:0:15 */
   3349     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1190, 15, 0)
   3350 };
   3351 static uint32_t BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ6r_fields[] =
   3352 {
   3353     /* PATT_GEN_SEQ_6:0:15 */
   3354     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1191, 15, 0)
   3355 };
   3356 static uint32_t BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ7r_fields[] =
   3357 {
   3358     /* PATT_GEN_SEQ_7:0:15 */
   3359     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1192, 15, 0)
   3360 };
   3361 static uint32_t BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ8r_fields[] =
   3362 {
   3363     /* PATT_GEN_SEQ_8:0:15 */
   3364     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1193, 15, 0)
   3365 };
   3366 static uint32_t BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ9r_fields[] =
   3367 {
   3368     /* PATT_GEN_SEQ_9:0:15 */
   3369     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1194, 15, 0)
   3370 };
   3371 static uint32_t BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ_10r_fields[] =
   3372 {
   3373     /* PATT_GEN_SEQ_10:0:15 */
   3374     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1182, 15, 0)
   3375 };
   3376 static uint32_t BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ_11r_fields[] =
   3377 {
   3378     /* PATT_GEN_SEQ_11:0:15 */
   3379     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1183, 15, 0)
   3380 };
   3381 static uint32_t BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ_12r_fields[] =
   3382 {
   3383     /* PATT_GEN_SEQ_12:0:15 */
   3384     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1184, 15, 0)
   3385 };
   3386 static uint32_t BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ_13r_fields[] =
   3387 {
   3388     /* PATT_GEN_SEQ_13:0:15 */
   3389     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1185, 15, 0)
   3390 };
   3391 static uint32_t BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ_14r_fields[] =
   3392 {
   3393     /* PATT_GEN_SEQ_14:0:15 */
   3394     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1186, 15, 0)
   3395 };
   3396 static uint32_t BCMI_TSCBH_XGXS_PHYID2r_fields[] =
   3397 {
   3398     /* REGID1:0:15 */
   3399     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1325, 15, 0)
   3400 };
   3401 static uint32_t BCMI_TSCBH_XGXS_PHYID3r_fields[] =
   3402 {
   3403     /* REGID2:0:15 */
   3404     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1326, 15, 0)
   3405 };
   3406 static uint32_t BCMI_TSCBH_XGXS_PKTGEN_CTL1r_fields[] =
   3407 {
   3408     /* TX_TEST_PORT_SEL:0:1 */
   3409     PHYMOD_SYMBOL_FIELD_ENCODE(2036, 1, 0),
   3410     /* PRTP_DATA_PATTERN_SEL:3:6 */
   3411     PHYMOD_SYMBOL_FIELD_ENCODE(1305, 6, 3),
   3412     /* RX_PORT_SEL:7:8 */
   3413     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1699, 8, 7)
   3414 };
   3415 static uint32_t BCMI_TSCBH_XGXS_PKTGEN_ERRMASK0r_fields[] =
   3416 {
   3417     /* ERROR_MASK_15_0:0:15 */
   3418     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(689, 15, 0)
   3419 };
   3420 static uint32_t BCMI_TSCBH_XGXS_PKTGEN_ERRMASK1r_fields[] =
   3421 {
   3422     /* ERROR_MASK_31_16:0:15 */
   3423     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(690, 15, 0)
   3424 };
   3425 static uint32_t BCMI_TSCBH_XGXS_PKTGEN_ERRMASK2r_fields[] =
   3426 {
   3427     /* ERROR_MASK_47_32:0:15 */
   3428     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(691, 15, 0)
   3429 };
   3430 static uint32_t BCMI_TSCBH_XGXS_PKTGEN_ERRMASK3r_fields[] =
   3431 {
   3432     /* ERROR_MASK_63_48:0:15 */
   3433     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(692, 15, 0)
   3434 };
   3435 static uint32_t BCMI_TSCBH_XGXS_PKTGEN_ERRMASK4r_fields[] =
   3436 {
   3437     /* ERROR_MASK_79_64:0:15 */
   3438     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(693, 15, 0)
   3439 };
   3440 static uint32_t BCMI_TSCBH_XGXS_PKTGEN_GLASTEST_ACTADJr_fields[] =
   3441 {
   3442     /* GLASTEST_ADJ:0:7 */
   3443     PHYMOD_SYMBOL_FIELD_ENCODE(731, 7, 0),
   3444     /* GLASTEST_EXP_51_48:8:11 */
   3445     PHYMOD_SYMBOL_FIELD_ENCODE(740, 11, 8),
   3446     /* GLASTEST_DAT_51_48:12:15 */
   3447     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(735, 15, 12)
   3448 };
   3449 static uint32_t BCMI_TSCBH_XGXS_PKTGEN_GLASTEST_ACTDATA0r_fields[] =
   3450 {
   3451     /* GLASTEST_DAT_15_0:0:15 */
   3452     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(732, 15, 0)
   3453 };
   3454 static uint32_t BCMI_TSCBH_XGXS_PKTGEN_GLASTEST_ACTDATA1r_fields[] =
   3455 {
   3456     /* GLASTEST_DAT_31_16:0:15 */
   3457     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(733, 15, 0)
   3458 };
   3459 static uint32_t BCMI_TSCBH_XGXS_PKTGEN_GLASTEST_ACTDATA2r_fields[] =
   3460 {
   3461     /* GLASTEST_DAT_47_32:0:15 */
   3462     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(734, 15, 0)
   3463 };
   3464 static uint32_t BCMI_TSCBH_XGXS_PKTGEN_GLASTEST_CTLr_fields[] =
   3465 {
   3466     /* GLASTEST_EN:0:0 */
   3467     PHYMOD_SYMBOL_FIELD_ENCODE(736, 0, 0),
   3468     /* GLASTEST_ONESHOT:1:1 */
   3469     PHYMOD_SYMBOL_FIELD_ENCODE(742, 1, 1),
   3470     /* GLASTEST_ID:2:6 */
   3471     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(741, 6, 2)
   3472 };
   3473 static uint32_t BCMI_TSCBH_XGXS_PKTGEN_GLASTEST_EXP0r_fields[] =
   3474 {
   3475     /* GLASTEST_EXP_15_0:0:15 */
   3476     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(737, 15, 0)
   3477 };
   3478 static uint32_t BCMI_TSCBH_XGXS_PKTGEN_GLASTEST_EXP1r_fields[] =
   3479 {
   3480     /* GLASTEST_EXP_31_16:0:15 */
   3481     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(738, 15, 0)
   3482 };
   3483 static uint32_t BCMI_TSCBH_XGXS_PKTGEN_GLASTEST_EXP2r_fields[] =
   3484 {
   3485     /* GLASTEST_EXP_47_32:0:15 */
   3486     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(739, 15, 0)
   3487 };
   3488 static uint32_t BCMI_TSCBH_XGXS_PKTGEN_PCS_SEEDA0r_fields[] =
   3489 {
   3490     /* SEEDA0:0:15 */
   3491     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1719, 15, 0)
   3492 };
   3493 static uint32_t BCMI_TSCBH_XGXS_PKTGEN_PCS_SEEDA1r_fields[] =
   3494 {
   3495     /* SEEDA1:0:15 */
   3496     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1720, 15, 0)
   3497 };
   3498 static uint32_t BCMI_TSCBH_XGXS_PKTGEN_PCS_SEEDA2r_fields[] =
   3499 {
   3500     /* SEEDA2:0:15 */
   3501     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1721, 15, 0)
   3502 };
   3503 static uint32_t BCMI_TSCBH_XGXS_PKTGEN_PCS_SEEDA3r_fields[] =
   3504 {
   3505     /* SEEDA3:0:9 */
   3506     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1722, 9, 0)
   3507 };
   3508 static uint32_t BCMI_TSCBH_XGXS_PKTGEN_PCS_SEEDB0r_fields[] =
   3509 {
   3510     /* SEEDB0:0:15 */
   3511     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1723, 15, 0)
   3512 };
   3513 static uint32_t BCMI_TSCBH_XGXS_PKTGEN_PCS_SEEDB1r_fields[] =
   3514 {
   3515     /* SEEDB1:0:15 */
   3516     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1724, 15, 0)
   3517 };
   3518 static uint32_t BCMI_TSCBH_XGXS_PKTGEN_PCS_SEEDB2r_fields[] =
   3519 {
   3520     /* SEEDB2:0:15 */
   3521     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1725, 15, 0)
   3522 };
   3523 static uint32_t BCMI_TSCBH_XGXS_PKTGEN_PCS_SEEDB3r_fields[] =
   3524 {
   3525     /* SEEDB3:0:9 */
   3526     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1726, 9, 0)
   3527 };
   3528 static uint32_t BCMI_TSCBH_XGXS_PKTGEN_PRTPCTLr_fields[] =
   3529 {
   3530     /* RX_PRTP_EN:8:11 */
   3531     PHYMOD_SYMBOL_FIELD_ENCODE(1700, 11, 8),
   3532     /* TX_PRTP_EN:12:15 */
   3533     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2032, 15, 12)
   3534 };
   3535 static uint32_t BCMI_TSCBH_XGXS_PLL_CAL_CTL0r_fields[] =
   3536 {
   3537     /* VCO_STEP_TIME:0:7 */
   3538     PHYMOD_SYMBOL_FIELD_ENCODE(2079, 7, 0),
   3539     /* VCO_START_TIME:8:15 */
   3540     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2078, 15, 8)
   3541 };
   3542 static uint32_t BCMI_TSCBH_XGXS_PLL_CAL_CTL1r_fields[] =
   3543 {
   3544     /* RETRY_TIME:0:7 */
   3545     PHYMOD_SYMBOL_FIELD_ENCODE(1341, 7, 0),
   3546     /* PRE_FREQ_DET_TIME:8:15 */
   3547     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1304, 15, 8)
   3548 };
   3549 static uint32_t BCMI_TSCBH_XGXS_PLL_CAL_CTL2r_fields[] =
   3550 {
   3551     /* WIN_CAL_CNTR:0:7 */
   3552     PHYMOD_SYMBOL_FIELD_ENCODE(2081, 7, 0),
   3553     /* RES_CAL_CNTR:8:15 */
   3554     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1340, 15, 8)
   3555 };
   3556 static uint32_t BCMI_TSCBH_XGXS_PLL_CAL_CTL3r_fields[] =
   3557 {
   3558     /* FAST_SEARCH_MODE:0:0 */
   3559     PHYMOD_SYMBOL_FIELD_ENCODE(706, 0, 0),
   3560     /* CAP_CNT_MASK_EN:1:1 */
   3561     PHYMOD_SYMBOL_FIELD_ENCODE(439, 1, 1),
   3562     /* CAP_SEQ_CYA:2:2 */
   3563     PHYMOD_SYMBOL_FIELD_ENCODE(451, 2, 2),
   3564     /* CAP_RESTART:3:3 */
   3565     PHYMOD_SYMBOL_FIELD_ENCODE(446, 3, 3),
   3566     /* CAP_RETRY_EN:4:4 */
   3567     PHYMOD_SYMBOL_FIELD_ENCODE(447, 4, 4),
   3568     /* CAP_FORCE_SLOWDOWN:5:5 */
   3569     PHYMOD_SYMBOL_FIELD_ENCODE(442, 5, 5),
   3570     /* CAP_FORCE_SLOWDOWN_EN:6:6 */
   3571     PHYMOD_SYMBOL_FIELD_ENCODE(443, 6, 6),
   3572     /* CAP_SELECT_M_EN:7:7 */
   3573     PHYMOD_SYMBOL_FIELD_ENCODE(450, 7, 7),
   3574     /* CAP_SELECT_M:8:15 */
   3575     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(449, 15, 8)
   3576 };
   3577 static uint32_t BCMI_TSCBH_XGXS_PLL_CAL_CTL4r_fields[] =
   3578 {
   3579     /* PLL_LOCK_FRC_VAL:0:0 */
   3580     PHYMOD_SYMBOL_FIELD_ENCODE(1221, 0, 0),
   3581     /* PLL_LOCK_FRC:1:1 */
   3582     PHYMOD_SYMBOL_FIELD_ENCODE(1220, 1, 1),
   3583     /* PLL_FORCE_CAP_PASS:2:2 */
   3584     PHYMOD_SYMBOL_FIELD_ENCODE(1214, 2, 2),
   3585     /* PLL_FORCE_CAP_PASS_EN:3:3 */
   3586     PHYMOD_SYMBOL_FIELD_ENCODE(1215, 3, 3),
   3587     /* PLL_FORCE_CAP_DONE:4:4 */
   3588     PHYMOD_SYMBOL_FIELD_ENCODE(1212, 4, 4),
   3589     /* PLL_FORCE_CAP_DONE_EN:5:5 */
   3590     PHYMOD_SYMBOL_FIELD_ENCODE(1213, 5, 5),
   3591     /* PLL_FORCE_FPASS:6:6 */
   3592     PHYMOD_SYMBOL_FIELD_ENCODE(1218, 6, 6),
   3593     /* PLL_FORCE_FDONE:7:7 */
   3594     PHYMOD_SYMBOL_FIELD_ENCODE(1216, 7, 7),
   3595     /* PLL_FORCE_FDONE_EN:8:8 */
   3596     PHYMOD_SYMBOL_FIELD_ENCODE(1217, 8, 8),
   3597     /* VCO_RST_EN:9:9 */
   3598     PHYMOD_SYMBOL_FIELD_ENCODE(2077, 9, 9),
   3599     /* SLOWDN_XOR:10:10 */
   3600     PHYMOD_SYMBOL_FIELD_ENCODE(1745, 10, 10),
   3601     /* FREQ_MONITOR_EN:11:11 */
   3602     PHYMOD_SYMBOL_FIELD_ENCODE(726, 11, 11),
   3603     /* FREQ_DET_RESTART_EN:12:12 */
   3604     PHYMOD_SYMBOL_FIELD_ENCODE(722, 12, 12),
   3605     /* FREQ_DET_RETRY_EN:13:13 */
   3606     PHYMOD_SYMBOL_FIELD_ENCODE(723, 13, 13),
   3607     /* VCO_DONE_EN:14:14 */
   3608     PHYMOD_SYMBOL_FIELD_ENCODE(2074, 14, 14),
   3609     /* PLL_SEQ_START:15:15 */
   3610     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1230, 15, 15)
   3611 };
   3612 static uint32_t BCMI_TSCBH_XGXS_PLL_CAL_CTL5r_fields[] =
   3613 {
   3614     /* REFCLK_DIVCNT:0:13 */
   3615     PHYMOD_SYMBOL_FIELD_ENCODE(1318, 13, 0),
   3616     /* DEC_SEARCH_EN:15:15 */
   3617     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(593, 15, 15)
   3618 };
   3619 static uint32_t BCMI_TSCBH_XGXS_PLL_CAL_CTL6r_fields[] =
   3620 {
   3621     /* REFCLK_DIVCNT_SEL:0:2 */
   3622     PHYMOD_SYMBOL_FIELD_ENCODE(1319, 2, 0),
   3623     /* VCO_RANGE_ADJUST:8:13 */
   3624     PHYMOD_SYMBOL_FIELD_ENCODE(2075, 13, 8),
   3625     /* VCO_RANGE_ADJUST_EN:15:15 */
   3626     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2076, 15, 15)
   3627 };
   3628 static uint32_t BCMI_TSCBH_XGXS_PLL_CAL_CTL7r_fields[] =
   3629 {
   3630     /* PLL_MODE:0:4 */
   3631     PHYMOD_SYMBOL_FIELD_ENCODE(1223, 4, 0),
   3632     /* RESCAL_FRC_VAL:6:9 */
   3633     PHYMOD_SYMBOL_FIELD_ENCODE(1329, 9, 6),
   3634     /* RESCAL_FRC:10:10 */
   3635     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1328, 10, 10)
   3636 };
   3637 static uint32_t BCMI_TSCBH_XGXS_PLL_CAL_CTL_STS0r_fields[] =
   3638 {
   3639     /* PLL_LOCK_LH_LL:0:0 */
   3640     PHYMOD_SYMBOL_FIELD_ENCODE(1222, 0, 0),
   3641     /* PLL_SEQ_PASS_LH_LL:1:1 */
   3642     PHYMOD_SYMBOL_FIELD_ENCODE(1229, 1, 1),
   3643     /* PLL_SEQ_DONE_LH_LL:2:2 */
   3644     PHYMOD_SYMBOL_FIELD_ENCODE(1227, 2, 2),
   3645     /* FREQ_PASS_SM_LH_LL:3:3 */
   3646     PHYMOD_SYMBOL_FIELD_ENCODE(728, 3, 3),
   3647     /* FREQ_DONE_SM_LH_LL:4:4 */
   3648     PHYMOD_SYMBOL_FIELD_ENCODE(725, 4, 4),
   3649     /* CAP_PASS_LH_LL:5:5 */
   3650     PHYMOD_SYMBOL_FIELD_ENCODE(445, 5, 5),
   3651     /* CAP_DONE_LH_LL:6:6 */
   3652     PHYMOD_SYMBOL_FIELD_ENCODE(441, 6, 6),
   3653     /* PLL_LOCK:8:8 */
   3654     PHYMOD_SYMBOL_FIELD_ENCODE(1219, 8, 8),
   3655     /* PLL_SEQ_PASS:9:9 */
   3656     PHYMOD_SYMBOL_FIELD_ENCODE(1228, 9, 9),
   3657     /* PLL_SEQ_DONE:10:10 */
   3658     PHYMOD_SYMBOL_FIELD_ENCODE(1226, 10, 10),
   3659     /* FREQ_PASS_SM:11:11 */
   3660     PHYMOD_SYMBOL_FIELD_ENCODE(727, 11, 11),
   3661     /* FREQ_DONE_SM:12:12 */
   3662     PHYMOD_SYMBOL_FIELD_ENCODE(724, 12, 12),
   3663     /* CAP_PASS:13:13 */
   3664     PHYMOD_SYMBOL_FIELD_ENCODE(444, 13, 13),
   3665     /* CAP_DONE:14:14 */
   3666     PHYMOD_SYMBOL_FIELD_ENCODE(440, 14, 14),
   3667     /* LOST_PLL_LOCK_SM:15:15 */
   3668     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(951, 15, 15)
   3669 };
   3670 static uint32_t BCMI_TSCBH_XGXS_PLL_CAL_CTL_STS1r_fields[] =
   3671 {
   3672     /* CAP_SELECT:0:7 */
   3673     PHYMOD_SYMBOL_FIELD_ENCODE(448, 7, 0),
   3674     /* RESCAL_IN:8:11 */
   3675     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1330, 11, 8)
   3676 };
   3677 static uint32_t BCMI_TSCBH_XGXS_PLL_CAL_CTL_STS_DBGr_fields[] =
   3678 {
   3679     /* DBG_SLOWDN:0:0 */
   3680     PHYMOD_SYMBOL_FIELD_ENCODE(571, 0, 0),
   3681     /* DBG_SLOWDN_CHANGE:1:1 */
   3682     PHYMOD_SYMBOL_FIELD_ENCODE(572, 1, 1),
   3683     /* DBG_FDBCK:2:2 */
   3684     PHYMOD_SYMBOL_FIELD_ENCODE(566, 2, 2),
   3685     /* DBG_CAP_STATE_ONE_HOT:3:7 */
   3686     PHYMOD_SYMBOL_FIELD_ENCODE(561, 7, 3),
   3687     /* DBG_PLL_STATE_ONE_HOT:8:15 */
   3688     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(568, 15, 8)
   3689 };
   3690 static uint32_t BCMI_TSCBH_XGXS_PMD_X1_CTLr_fields[] =
   3691 {
   3692     /* CORE_DP_H_RSTB_OEN:0:0 */
   3693     PHYMOD_SYMBOL_FIELD_ENCODE(534, 0, 0),
   3694     /* CORE_DP_H_RSTB:1:1 */
   3695     PHYMOD_SYMBOL_FIELD_ENCODE(533, 1, 1),
   3696     /* POR_H_RSTB:2:2 */
   3697     PHYMOD_SYMBOL_FIELD_ENCODE(1258, 2, 2),
   3698     /* CORE_MODE_SPEED_ID:3:8 */
   3699     PHYMOD_SYMBOL_FIELD_ENCODE(539, 8, 3),
   3700     /* CORE_MODE_SPARE:9:14 */
   3701     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(538, 14, 9)
   3702 };
   3703 static uint32_t BCMI_TSCBH_XGXS_PMD_X1_FCLK_PERIODr_fields[] =
   3704 {
   3705     /* FCLK_FRAC_NS:0:15 */
   3706     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(707, 15, 0)
   3707 };
   3708 static uint32_t BCMI_TSCBH_XGXS_PMD_X1_PM_TMR_OFFSr_fields[] =
   3709 {
   3710     /* PM_OFFSET_SUB_NS:0:7 */
   3711     PHYMOD_SYMBOL_FIELD_ENCODE(1256, 7, 0),
   3712     /* PM_OFFSET_IN_NS:8:15 */
   3713     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1255, 15, 8)
   3714 };
   3715 static uint32_t BCMI_TSCBH_XGXS_PMD_X4_CTLr_fields[] =
   3716 {
   3717     /* LN_DP_H_RSTB:0:0 */
   3718     PHYMOD_SYMBOL_FIELD_ENCODE(927, 0, 0),
   3719     /* LN_H_RSTB:1:1 */
   3720     PHYMOD_SYMBOL_FIELD_ENCODE(930, 1, 1),
   3721     /* LN_TX_H_PWRDN:2:2 */
   3722     PHYMOD_SYMBOL_FIELD_ENCODE(940, 2, 2),
   3723     /* LN_RX_H_PWRDN:3:3 */
   3724     PHYMOD_SYMBOL_FIELD_ENCODE(932, 3, 3),
   3725     /* TX_DISABLE:8:8 */
   3726     PHYMOD_SYMBOL_FIELD_ENCODE(1937, 8, 8),
   3727     /* OSR_MODE:9:12 */
   3728     PHYMOD_SYMBOL_FIELD_ENCODE(1154, 12, 9),
   3729     /* PAM4_MODE:13:15 */
   3730     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1170, 15, 13)
   3731 };
   3732 static uint32_t BCMI_TSCBH_XGXS_PMD_X4_LATCH_STSr_fields[] =
   3733 {
   3734     /* RX_LOCK_LL:0:0 */
   3735     PHYMOD_SYMBOL_FIELD_ENCODE(1630, 0, 0),
   3736     /* RX_LOCK_LH:1:1 */
   3737     PHYMOD_SYMBOL_FIELD_ENCODE(1628, 1, 1),
   3738     /* SIGNAL_DETECT_LL:2:2 */
   3739     PHYMOD_SYMBOL_FIELD_ENCODE(1738, 2, 2),
   3740     /* SIGNAL_DETECT_LH:3:3 */
   3741     PHYMOD_SYMBOL_FIELD_ENCODE(1736, 3, 3),
   3742     /* RX_CLK_VLD_LL:4:4 */
   3743     PHYMOD_SYMBOL_FIELD_ENCODE(1585, 4, 4),
   3744     /* RX_CLK_VLD_LH:5:5 */
   3745     PHYMOD_SYMBOL_FIELD_ENCODE(1583, 5, 5),
   3746     /* RX_LOCK_LIVE:8:8 */
   3747     PHYMOD_SYMBOL_FIELD_ENCODE(1629, 8, 8),
   3748     /* SIGNAL_DETECT_LIVE:9:9 */
   3749     PHYMOD_SYMBOL_FIELD_ENCODE(1737, 9, 9),
   3750     /* RX_CLK_VLD_LIVE:10:10 */
   3751     PHYMOD_SYMBOL_FIELD_ENCODE(1584, 10, 10),
   3752     /* TX_DISABLE_LL:11:11 */
   3753     PHYMOD_SYMBOL_FIELD_ENCODE(1940, 11, 11),
   3754     /* TX_DISABLE_LH:12:12 */
   3755     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1938, 12, 12)
   3756 };
   3757 static uint32_t BCMI_TSCBH_XGXS_PMD_X4_MODEr_fields[] =
   3758 {
   3759     /* LANE_MODE:0:15 */
   3760     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(803, 15, 0)
   3761 };
   3762 static uint32_t BCMI_TSCBH_XGXS_PMD_X4_OVRRr_fields[] =
   3763 {
   3764     /* RX_LOCK_OVRD:0:0 */
   3765     PHYMOD_SYMBOL_FIELD_ENCODE(1631, 0, 0),
   3766     /* SIGNAL_DETECT_OVRD:1:1 */
   3767     PHYMOD_SYMBOL_FIELD_ENCODE(1739, 1, 1),
   3768     /* RX_CLK_VLD_OVRD:2:2 */
   3769     PHYMOD_SYMBOL_FIELD_ENCODE(1586, 2, 2),
   3770     /* LANE_MODE_OEN:3:3 */
   3771     PHYMOD_SYMBOL_FIELD_ENCODE(804, 3, 3),
   3772     /* OSR_MODE_OEN:4:4 */
   3773     PHYMOD_SYMBOL_FIELD_ENCODE(1157, 4, 4),
   3774     /* TX_DISABLE_OEN:5:5 */
   3775     PHYMOD_SYMBOL_FIELD_ENCODE(1941, 5, 5),
   3776     /* LN_DP_H_RSTB_OEN:6:6 */
   3777     PHYMOD_SYMBOL_FIELD_ENCODE(928, 6, 6),
   3778     /* TX_CLK_VLD_OVRD:7:7 */
   3779     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1935, 7, 7)
   3780 };
   3781 static uint32_t BCMI_TSCBH_XGXS_PMD_X4_RX_FIXED_LATENCYr_fields[] =
   3782 {
   3783     /* RX_PMD_LATENCY_IN_FRAC_NS:0:9 */
   3784     PHYMOD_SYMBOL_FIELD_ENCODE(1697, 9, 0),
   3785     /* RX_PMD_LATENCY_IN_NS:10:15 */
   3786     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1698, 15, 10)
   3787 };
   3788 static uint32_t BCMI_TSCBH_XGXS_PMD_X4_STSr_fields[] =
   3789 {
   3790     /* RX_LOCK_STS:0:0 */
   3791     PHYMOD_SYMBOL_FIELD_ENCODE(1632, 0, 0),
   3792     /* SIGNAL_DETECT_STS:1:1 */
   3793     PHYMOD_SYMBOL_FIELD_ENCODE(1742, 1, 1),
   3794     /* RX_CLK_VLD_STS:2:2 */
   3795     PHYMOD_SYMBOL_FIELD_ENCODE(1587, 2, 2),
   3796     /* TX_CLK_VLD_STS:3:3 */
   3797     PHYMOD_SYMBOL_FIELD_ENCODE(1936, 3, 3),
   3798     /* TX_DISABLE_LIVE:4:4 */
   3799     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1939, 4, 4)
   3800 };
   3801 static uint32_t BCMI_TSCBH_XGXS_PMD_X4_TX_FIXED_LATENCYr_fields[] =
   3802 {
   3803     /* TX_PMD_LATENCY_IN_FRAC_NS:0:9 */
   3804     PHYMOD_SYMBOL_FIELD_ENCODE(2030, 9, 0),
   3805     /* TX_PMD_LATENCY_IN_NS:10:15 */
   3806     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2031, 15, 10)
   3807 };
   3808 static uint32_t BCMI_TSCBH_XGXS_PMD_X4_UI_VALUE_HIr_fields[] =
   3809 {
   3810     /* UI_FRAC_M1_TO_M16:0:15 */
   3811     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2066, 15, 0)
   3812 };
   3813 static uint32_t BCMI_TSCBH_XGXS_PMD_X4_UI_VALUE_LOr_fields[] =
   3814 {
   3815     /* UI_FRAC_M17_TO_M23:9:15 */
   3816     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2065, 15, 9)
   3817 };
   3818 static uint32_t BCMI_TSCBH_XGXS_RXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr_fields[] =
   3819 {
   3820     /* RX_OSR_MODE_PIN:0:3 */
   3821     PHYMOD_SYMBOL_FIELD_ENCODE(1644, 3, 0),
   3822     /* RX_PAM4_MODE_PIN:4:6 */
   3823     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1650, 6, 4)
   3824 };
   3825 static uint32_t BCMI_TSCBH_XGXS_RXCOM_LN_CLK_RST_N_PWRDWN_CTLr_fields[] =
   3826 {
   3827     /* RX_LN_DP_S_RSTB:0:0 */
   3828     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1626, 0, 0)
   3829 };
   3830 static uint32_t BCMI_TSCBH_XGXS_RXCOM_LN_DP_RST_ST_STSr_fields[] =
   3831 {
   3832     /* RX_LANE_DP_RESET_STATE:0:2 */
   3833     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1622, 2, 0)
   3834 };
   3835 static uint32_t BCMI_TSCBH_XGXS_RXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields[] =
   3836 {
   3837     /* PMD_LN_RX_H_RSTB_PKILL:0:0 */
   3838     PHYMOD_SYMBOL_FIELD_ENCODE(1238, 0, 0),
   3839     /* PMD_LN_RX_DP_H_RSTB_PKILL:1:1 */
   3840     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1236, 1, 1)
   3841 };
   3842 static uint32_t BCMI_TSCBH_XGXS_RXCOM_LN_RST_OCC_CTLr_fields[] =
   3843 {
   3844     /* RX_LANE_REG_RESET_OCCURRED:0:0 */
   3845     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1623, 0, 0)
   3846 };
   3847 static uint32_t BCMI_TSCBH_XGXS_RXCOM_LN_S_RSTB_CTLr_fields[] =
   3848 {
   3849     /* RX_LN_S_RSTB:0:0 */
   3850     PHYMOD_SYMBOL_FIELD_ENCODE(1627, 0, 0),
   3851     /* RX_HW_FW_HANDSHAKE_DISABLE:1:1 */
   3852     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1612, 1, 1)
   3853 };
   3854 static uint32_t BCMI_TSCBH_XGXS_RXCOM_MCST_MASK_CTLr_fields[] =
   3855 {
   3856     /* RX_MULTICAST_MASK_CONTROL:0:0 */
   3857     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1636, 0, 0)
   3858 };
   3859 static uint32_t BCMI_TSCBH_XGXS_RXCOM_OSR_MODE_CTLr_fields[] =
   3860 {
   3861     /* RX_OSR_MODE_FRC_VAL:0:3 */
   3862     PHYMOD_SYMBOL_FIELD_ENCODE(1643, 3, 0),
   3863     /* RX_PAM4_MODE_FRC_VAL:4:6 */
   3864     PHYMOD_SYMBOL_FIELD_ENCODE(1649, 6, 4),
   3865     /* RX_PAM4_MODE_FRC:14:14 */
   3866     PHYMOD_SYMBOL_FIELD_ENCODE(1648, 14, 14),
   3867     /* RX_OSR_MODE_FRC:15:15 */
   3868     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1642, 15, 15)
   3869 };
   3870 static uint32_t BCMI_TSCBH_XGXS_RXCOM_OSR_MODE_STS_MC_MASKr_fields[] =
   3871 {
   3872     /* RX_OSR_MODE:0:3 */
   3873     PHYMOD_SYMBOL_FIELD_ENCODE(1641, 3, 0),
   3874     /* RX_PAM4_MODE:4:6 */
   3875     PHYMOD_SYMBOL_FIELD_ENCODE(1647, 6, 4),
   3876     /* RX_MULTICAST_MASK_CONTROL_STATUS:15:15 */
   3877     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1637, 15, 15)
   3878 };
   3879 static uint32_t BCMI_TSCBH_XGXS_RXCOM_PLL_SEL_CTLr_fields[] =
   3880 {
   3881     /* RX_PLL_SELECT:0:0 */
   3882     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1695, 0, 0)
   3883 };
   3884 static uint32_t BCMI_TSCBH_XGXS_RXCOM_UC_ACK_LN_CTLr_fields[] =
   3885 {
   3886     /* RX_UC_ACK_LANE_CFG_DONE:0:0 */
   3887     PHYMOD_SYMBOL_FIELD_ENCODE(1707, 0, 0),
   3888     /* RX_UC_ACK_LANE_DP_RESET:1:1 */
   3889     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1708, 1, 1)
   3890 };
   3891 static uint32_t BCMI_TSCBH_XGXS_RXTXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr_fields[] =
   3892 {
   3893     /* OSR_MODE_PIN:0:3 */
   3894     PHYMOD_SYMBOL_FIELD_ENCODE(1158, 3, 0),
   3895     /* PAM4_MODE_PIN:4:6 */
   3896     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1173, 6, 4)
   3897 };
   3898 static uint32_t BCMI_TSCBH_XGXS_RXTXCOM_LN_CLK_RST_N_PWRDWN_CTLr_fields[] =
   3899 {
   3900     /* LN_DP_S_RSTB:0:0 */
   3901     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(929, 0, 0)
   3902 };
   3903 static uint32_t BCMI_TSCBH_XGXS_RXTXCOM_LN_DP_RST_ST_STSr_fields[] =
   3904 {
   3905     /* LANE_DP_RESET_STATE:0:2 */
   3906     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(802, 2, 0)
   3907 };
   3908 static uint32_t BCMI_TSCBH_XGXS_RXTXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields[] =
   3909 {
   3910     /* PMD_LN_H_RSTB_PKILL:0:0 */
   3911     PHYMOD_SYMBOL_FIELD_ENCODE(1235, 0, 0),
   3912     /* PMD_LN_DP_H_RSTB_PKILL:1:1 */
   3913     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1234, 1, 1)
   3914 };
   3915 static uint32_t BCMI_TSCBH_XGXS_RXTXCOM_LN_RST_OCC_CTLr_fields[] =
   3916 {
   3917     /* LANE_REG_RESET_OCCURRED:0:0 */
   3918     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(805, 0, 0)
   3919 };
   3920 static uint32_t BCMI_TSCBH_XGXS_RXTXCOM_LN_S_RSTB_CTLr_fields[] =
   3921 {
   3922     /* LN_S_RSTB:0:0 */
   3923     PHYMOD_SYMBOL_FIELD_ENCODE(938, 0, 0),
   3924     /* HW_FW_HANDSHAKE_DISABLE:1:1 */
   3925     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(776, 1, 1)
   3926 };
   3927 static uint32_t BCMI_TSCBH_XGXS_RXTXCOM_MCST_MASK_CTLr_fields[] =
   3928 {
   3929     /* MULTICAST_MASK_CONTROL:0:0 */
   3930     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1137, 0, 0)
   3931 };
   3932 static uint32_t BCMI_TSCBH_XGXS_RXTXCOM_OSR_MODE_CTLr_fields[] =
   3933 {
   3934     /* OSR_MODE_FRC_VAL:0:3 */
   3935     PHYMOD_SYMBOL_FIELD_ENCODE(1156, 3, 0),
   3936     /* PAM4_MODE_FRC_VAL:4:6 */
   3937     PHYMOD_SYMBOL_FIELD_ENCODE(1172, 6, 4),
   3938     /* PAM4_MODE_FRC:14:14 */
   3939     PHYMOD_SYMBOL_FIELD_ENCODE(1171, 14, 14),
   3940     /* OSR_MODE_FRC:15:15 */
   3941     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1155, 15, 15)
   3942 };
   3943 static uint32_t BCMI_TSCBH_XGXS_RXTXCOM_OSR_MODE_STS_MC_MASKr_fields[] =
   3944 {
   3945     /* OSR_MODE:0:3 */
   3946     PHYMOD_SYMBOL_FIELD_ENCODE(1154, 3, 0),
   3947     /* PAM4_MODE:4:6 */
   3948     PHYMOD_SYMBOL_FIELD_ENCODE(1170, 6, 4),
   3949     /* MULTICAST_MASK_CONTROL_STATUS:15:15 */
   3950     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1138, 15, 15)
   3951 };
   3952 static uint32_t BCMI_TSCBH_XGXS_RXTXCOM_PLL_SEL_CTLr_fields[] =
   3953 {
   3954     /* PLL_SELECT:0:0 */
   3955     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1225, 0, 0)
   3956 };
   3957 static uint32_t BCMI_TSCBH_XGXS_RXTXCOM_UC_ACK_LN_CTLr_fields[] =
   3958 {
   3959     /* UC_ACK_LANE_CFG_DONE:0:0 */
   3960     PHYMOD_SYMBOL_FIELD_ENCODE(2047, 0, 0),
   3961     /* UC_ACK_LANE_DP_RESET:1:1 */
   3962     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2048, 1, 1)
   3963 };
   3964 static uint32_t BCMI_TSCBH_XGXS_RX_AFE_RST_PWRDN_OSR_MODE_PIN_STSr_fields[] =
   3965 {
   3966     /* AFE_RX_PWRDN:0:0 */
   3967     PHYMOD_SYMBOL_FIELD_ENCODE(4, 0, 0),
   3968     /* AFE_RX_RESET:1:1 */
   3969     PHYMOD_SYMBOL_FIELD_ENCODE(10, 1, 1),
   3970     /* AFE_RX_RCLK20_PWRDN:2:2 */
   3971     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(7, 2, 2)
   3972 };
   3973 static uint32_t BCMI_TSCBH_XGXS_RX_CLK_N_RST_DBG_CTLr_fields[] =
   3974 {
   3975     /* LN_RX_S_CLKGATE_FRC_ON:0:0 */
   3976     PHYMOD_SYMBOL_FIELD_ENCODE(933, 0, 0),
   3977     /* LN_RX_S_COMCLK_SEL:1:1 */
   3978     PHYMOD_SYMBOL_FIELD_ENCODE(935, 1, 1),
   3979     /* LN_RX_S_COMCLK_FRC_ON:2:2 */
   3980     PHYMOD_SYMBOL_FIELD_ENCODE(934, 2, 2),
   3981     /* PMD_RX_CLK_VLD_FRC:3:3 */
   3982     PHYMOD_SYMBOL_FIELD_ENCODE(1243, 3, 3),
   3983     /* PMD_RX_CLK_VLD_FRC_VAL:4:4 */
   3984     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1244, 4, 4)
   3985 };
   3986 static uint32_t BCMI_TSCBH_XGXS_RX_LN_AFE_RST_PWRDWN_CTL_CTLr_fields[] =
   3987 {
   3988     /* AFE_RX_PWRDN_FRC:0:0 */
   3989     PHYMOD_SYMBOL_FIELD_ENCODE(5, 0, 0),
   3990     /* AFE_RX_PWRDN_FRC_VAL:1:1 */
   3991     PHYMOD_SYMBOL_FIELD_ENCODE(6, 1, 1),
   3992     /* AFE_RX_RESET_FRC:2:2 */
   3993     PHYMOD_SYMBOL_FIELD_ENCODE(11, 2, 2),
   3994     /* AFE_RX_RESET_FRC_VAL:3:3 */
   3995     PHYMOD_SYMBOL_FIELD_ENCODE(12, 3, 3),
   3996     /* AFE_RX_RCLK20_PWRDN_FRC:4:4 */
   3997     PHYMOD_SYMBOL_FIELD_ENCODE(8, 4, 4),
   3998     /* AFE_RX_RCLK20_PWRDN_FRC_VAL:5:5 */
   3999     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(9, 5, 5)
   4000 };
   4001 static uint32_t BCMI_TSCBH_XGXS_RX_LN_CLK_RST_N_PWRDWN_CTLr_fields[] =
   4002 {
   4003     /* LN_RX_S_PWRDN:0:0 */
   4004     PHYMOD_SYMBOL_FIELD_ENCODE(936, 0, 0),
   4005     /* AFE_SIGDET_PWRDN:1:1 */
   4006     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(15, 1, 1)
   4007 };
   4008 static uint32_t BCMI_TSCBH_XGXS_RX_LN_DBG_RST_CTLr_fields[] =
   4009 {
   4010     /* LN_RX_S_RSTB:0:0 */
   4011     PHYMOD_SYMBOL_FIELD_ENCODE(937, 0, 0),
   4012     /* LN_RX_DP_S_RSTB:1:1 */
   4013     PHYMOD_SYMBOL_FIELD_ENCODE(931, 1, 1),
   4014     /* SIGDET_DP_RSTB_EN:2:2 */
   4015     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1729, 2, 2)
   4016 };
   4017 static uint32_t BCMI_TSCBH_XGXS_RX_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields[] =
   4018 {
   4019     /* PMD_LN_RX_H_PWRDN_PKILL:0:0 */
   4020     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1237, 0, 0)
   4021 };
   4022 static uint32_t BCMI_TSCBH_XGXS_RX_PMD_LN_MODE_STSr_fields[] =
   4023 {
   4024     /* PMD_RX_LANE_MODE:0:15 */
   4025     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1245, 15, 0)
   4026 };
   4027 static uint32_t BCMI_TSCBH_XGXS_RX_X1_ECC_STS_AM_TBLr_fields[] =
   4028 {
   4029     /* ERR_EVENT_ADDRESS_AM_TBL:0:13 */
   4030     PHYMOD_SYMBOL_FIELD_ENCODE(695, 13, 0),
   4031     /* ONE_BIT_ERR_EVENT_AM_TBL:14:14 */
   4032     PHYMOD_SYMBOL_FIELD_ENCODE(1143, 14, 14),
   4033     /* TWO_BIT_ERR_EVENT_AM_TBL:15:15 */
   4034     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1898, 15, 15)
   4035 };
   4036 static uint32_t BCMI_TSCBH_XGXS_RX_X1_ECC_STS_BASE_R_FECr_fields[] =
   4037 {
   4038     /* ONE_BIT_ERR_EVENT_BASE_R_FEC:14:14 */
   4039     PHYMOD_SYMBOL_FIELD_ENCODE(1144, 14, 14),
   4040     /* TWO_BIT_ERR_EVENT_BASE_R_FEC:15:15 */
   4041     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1899, 15, 15)
   4042 };
   4043 static uint32_t BCMI_TSCBH_XGXS_RX_X1_ECC_STS_DESKEWr_fields[] =
   4044 {
   4045     /* ONE_BIT_ERR_EVENT_DESKEW:14:14 */
   4046     PHYMOD_SYMBOL_FIELD_ENCODE(1145, 14, 14),
   4047     /* TWO_BIT_ERR_EVENT_DESKEW:15:15 */
   4048     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1900, 15, 15)
   4049 };
   4050 static uint32_t BCMI_TSCBH_XGXS_RX_X1_ECC_STS_RSFEC_RBUF_MPPr_fields[] =
   4051 {
   4052     /* ONE_BIT_ERR_EVENT_RSFEC_RBUF_MPP:14:14 */
   4053     PHYMOD_SYMBOL_FIELD_ENCODE(1146, 14, 14),
   4054     /* TWO_BIT_ERR_EVENT_RSFEC_RBUF_MPP:15:15 */
   4055     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1901, 15, 15)
   4056 };
   4057 static uint32_t BCMI_TSCBH_XGXS_RX_X1_ECC_STS_RSFEC_RS400G_MPPr_fields[] =
   4058 {
   4059     /* ONE_BIT_ERR_EVENT_RSFEC_RS400G_MPP:14:14 */
   4060     PHYMOD_SYMBOL_FIELD_ENCODE(1147, 14, 14),
   4061     /* TWO_BIT_ERR_EVENT_RSFEC_RS400G_MPP:15:15 */
   4062     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1902, 15, 15)
   4063 };
   4064 static uint32_t BCMI_TSCBH_XGXS_RX_X1_ECC_STS_RX_1588_400Gr_fields[] =
   4065 {
   4066     /* ERR_EVENT_ADDRESS_RX_1588_400G:0:13 */
   4067     PHYMOD_SYMBOL_FIELD_ENCODE(696, 13, 0),
   4068     /* ONE_BIT_ERR_EVENT_RX_1588_400G:14:14 */
   4069     PHYMOD_SYMBOL_FIELD_ENCODE(1148, 14, 14),
   4070     /* TWO_BIT_ERR_EVENT_RX_1588_400G:15:15 */
   4071     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1903, 15, 15)
   4072 };
   4073 static uint32_t BCMI_TSCBH_XGXS_RX_X1_ECC_STS_RX_1588_MPPr_fields[] =
   4074 {
   4075     /* ERR_EVENT_ADDRESS_RX_1588_MPP:0:13 */
   4076     PHYMOD_SYMBOL_FIELD_ENCODE(697, 13, 0),
   4077     /* ONE_BIT_ERR_EVENT_RX_1588_MPP:14:14 */
   4078     PHYMOD_SYMBOL_FIELD_ENCODE(1149, 14, 14),
   4079     /* TWO_BIT_ERR_EVENT_RX_1588_MPP:15:15 */
   4080     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1904, 15, 15)
   4081 };
   4082 static uint32_t BCMI_TSCBH_XGXS_RX_X1_ECC_STS_SPD_TBLr_fields[] =
   4083 {
   4084     /* ERR_EVENT_ADDRESS_SPD_TBL:0:13 */
   4085     PHYMOD_SYMBOL_FIELD_ENCODE(698, 13, 0),
   4086     /* ONE_BIT_ERR_EVENT_SPD_TBL:14:14 */
   4087     PHYMOD_SYMBOL_FIELD_ENCODE(1150, 14, 14),
   4088     /* TWO_BIT_ERR_EVENT_SPD_TBL:15:15 */
   4089     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1905, 15, 15)
   4090 };
   4091 static uint32_t BCMI_TSCBH_XGXS_RX_X1_ECC_STS_TX_1588_400Gr_fields[] =
   4092 {
   4093     /* ERR_EVENT_ADDRESS_TX_1588_400G:0:13 */
   4094     PHYMOD_SYMBOL_FIELD_ENCODE(699, 13, 0),
   4095     /* ONE_BIT_ERR_EVENT_TX_1588_400G:14:14 */
   4096     PHYMOD_SYMBOL_FIELD_ENCODE(1151, 14, 14),
   4097     /* TWO_BIT_ERR_EVENT_TX_1588_400G:15:15 */
   4098     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1906, 15, 15)
   4099 };
   4100 static uint32_t BCMI_TSCBH_XGXS_RX_X1_ECC_STS_TX_1588_MPPr_fields[] =
   4101 {
   4102     /* ERR_EVENT_ADDRESS_TX_1588_MPP:0:13 */
   4103     PHYMOD_SYMBOL_FIELD_ENCODE(700, 13, 0),
   4104     /* ONE_BIT_ERR_EVENT_TX_1588_MPP:14:14 */
   4105     PHYMOD_SYMBOL_FIELD_ENCODE(1152, 14, 14),
   4106     /* TWO_BIT_ERR_EVENT_TX_1588_MPP:15:15 */
   4107     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1907, 15, 15)
   4108 };
   4109 static uint32_t BCMI_TSCBH_XGXS_RX_X1_ECC_STS_UM_TBLr_fields[] =
   4110 {
   4111     /* ERR_EVENT_ADDRESS_UM_TBL:0:13 */
   4112     PHYMOD_SYMBOL_FIELD_ENCODE(701, 13, 0),
   4113     /* ONE_BIT_ERR_EVENT_UM_TBL:14:14 */
   4114     PHYMOD_SYMBOL_FIELD_ENCODE(1153, 14, 14),
   4115     /* TWO_BIT_ERR_EVENT_UM_TBL:15:15 */
   4116     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1908, 15, 15)
   4117 };
   4118 static uint32_t BCMI_TSCBH_XGXS_RX_X1_RS_FEC_CFGr_fields[] =
   4119 {
   4120     /* RS_FEC_CW_TYPE:0:0 */
   4121     PHYMOD_SYMBOL_FIELD_ENCODE(1373, 0, 0),
   4122     /* RS_FEC_CORRECTION_ENABLE:1:1 */
   4123     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1372, 1, 1)
   4124 };
   4125 static uint32_t BCMI_TSCBH_XGXS_RX_X1_RX_LN_SWPr_fields[] =
   4126 {
   4127     /* PHYSICAL0_TO_LOGICAL_SEL:0:2 */
   4128     PHYMOD_SYMBOL_FIELD_ENCODE(1204, 2, 0),
   4129     /* PHYSICAL1_TO_LOGICAL_SEL:3:5 */
   4130     PHYMOD_SYMBOL_FIELD_ENCODE(1205, 5, 3),
   4131     /* PHYSICAL2_TO_LOGICAL_SEL:6:8 */
   4132     PHYMOD_SYMBOL_FIELD_ENCODE(1206, 8, 6),
   4133     /* PHYSICAL3_TO_LOGICAL_SEL:9:11 */
   4134     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1207, 11, 9)
   4135 };
   4136 static uint32_t BCMI_TSCBH_XGXS_RX_X4_AM_LOCK_LATCH_STSr_fields[] =
   4137 {
   4138     /* AM_LOCK_LL_0:0:0 */
   4139     PHYMOD_SYMBOL_FIELD_ENCODE(263, 0, 0),
   4140     /* AM_LOCK_LH_0:1:1 */
   4141     PHYMOD_SYMBOL_FIELD_ENCODE(258, 1, 1),
   4142     /* AM_LOCK_LL_1:2:2 */
   4143     PHYMOD_SYMBOL_FIELD_ENCODE(264, 2, 2),
   4144     /* AM_LOCK_LH_1:3:3 */
   4145     PHYMOD_SYMBOL_FIELD_ENCODE(259, 3, 3),
   4146     /* AM_LOCK_LL_2:4:4 */
   4147     PHYMOD_SYMBOL_FIELD_ENCODE(265, 4, 4),
   4148     /* AM_LOCK_LH_2:5:5 */
   4149     PHYMOD_SYMBOL_FIELD_ENCODE(260, 5, 5),
   4150     /* AM_LOCK_LL_3:6:6 */
   4151     PHYMOD_SYMBOL_FIELD_ENCODE(266, 6, 6),
   4152     /* AM_LOCK_LH_3:7:7 */
   4153     PHYMOD_SYMBOL_FIELD_ENCODE(261, 7, 7),
   4154     /* AM_LOCK_LL_4:8:8 */
   4155     PHYMOD_SYMBOL_FIELD_ENCODE(267, 8, 8),
   4156     /* AM_LOCK_LH_4:9:9 */
   4157     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(262, 9, 9)
   4158 };
   4159 static uint32_t BCMI_TSCBH_XGXS_RX_X4_AM_TS_INFO0r_fields[] =
   4160 {
   4161     /* BASE_TS_SUB_NS_0:0:3 */
   4162     PHYMOD_SYMBOL_FIELD_ENCODE(345, 3, 0),
   4163     /* BASE_TS_NS_0:4:15 */
   4164     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(340, 15, 4)
   4165 };
   4166 static uint32_t BCMI_TSCBH_XGXS_RX_X4_AM_TS_INFO1r_fields[] =
   4167 {
   4168     /* BASE_TS_SUB_NS_1:0:3 */
   4169     PHYMOD_SYMBOL_FIELD_ENCODE(346, 3, 0),
   4170     /* BASE_TS_NS_1:4:15 */
   4171     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(341, 15, 4)
   4172 };
   4173 static uint32_t BCMI_TSCBH_XGXS_RX_X4_AM_TS_INFO2r_fields[] =
   4174 {
   4175     /* BASE_TS_SUB_NS_2:0:3 */
   4176     PHYMOD_SYMBOL_FIELD_ENCODE(347, 3, 0),
   4177     /* BASE_TS_NS_2:4:15 */
   4178     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(342, 15, 4)
   4179 };
   4180 static uint32_t BCMI_TSCBH_XGXS_RX_X4_AM_TS_INFO3r_fields[] =
   4181 {
   4182     /* BASE_TS_SUB_NS_3:0:3 */
   4183     PHYMOD_SYMBOL_FIELD_ENCODE(348, 3, 0),
   4184     /* BASE_TS_NS_3:4:15 */
   4185     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(343, 15, 4)
   4186 };
   4187 static uint32_t BCMI_TSCBH_XGXS_RX_X4_AM_TS_INFO4r_fields[] =
   4188 {
   4189     /* BASE_TS_SUB_NS_4:0:3 */
   4190     PHYMOD_SYMBOL_FIELD_ENCODE(349, 3, 0),
   4191     /* BASE_TS_NS_4:4:15 */
   4192     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(344, 15, 4)
   4193 };
   4194 static uint32_t BCMI_TSCBH_XGXS_RX_X4_BER_HOr_fields[] =
   4195 {
   4196     /* BER_HO:0:13 */
   4197     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(393, 13, 0)
   4198 };
   4199 static uint32_t BCMI_TSCBH_XGXS_RX_X4_BER_LOr_fields[] =
   4200 {
   4201     /* BER_LO:0:7 */
   4202     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(394, 7, 0)
   4203 };
   4204 static uint32_t BCMI_TSCBH_XGXS_RX_X4_BIPCNT0r_fields[] =
   4205 {
   4206     /* BIP_ERROR_COUNT_0:0:7 */
   4207     PHYMOD_SYMBOL_FIELD_ENCODE(395, 7, 0),
   4208     /* BIP_ERROR_COUNT_1:8:15 */
   4209     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(396, 15, 8)
   4210 };
   4211 static uint32_t BCMI_TSCBH_XGXS_RX_X4_BIPCNT1r_fields[] =
   4212 {
   4213     /* BIP_ERROR_COUNT_2:0:7 */
   4214     PHYMOD_SYMBOL_FIELD_ENCODE(397, 7, 0),
   4215     /* BIP_ERROR_COUNT_3:8:15 */
   4216     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(398, 15, 8)
   4217 };
   4218 static uint32_t BCMI_TSCBH_XGXS_RX_X4_BIPCNT2r_fields[] =
   4219 {
   4220     /* BIP_ERROR_COUNT_4:0:7 */
   4221     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(399, 7, 0)
   4222 };
   4223 static uint32_t BCMI_TSCBH_XGXS_RX_X4_BLKSYNC_DBG0r_fields[] =
   4224 {
   4225     /* LANE0_DEBUG_INFO:0:7 */
   4226     PHYMOD_SYMBOL_FIELD_ENCODE(795, 7, 0),
   4227     /* LANE1_DEBUG_INFO:8:15 */
   4228     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(796, 15, 8)
   4229 };
   4230 static uint32_t BCMI_TSCBH_XGXS_RX_X4_BLKSYNC_DBG1r_fields[] =
   4231 {
   4232     /* LANE2_DEBUG_INFO:0:7 */
   4233     PHYMOD_SYMBOL_FIELD_ENCODE(797, 7, 0),
   4234     /* LANE3_DEBUG_INFO:8:15 */
   4235     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(798, 15, 8)
   4236 };
   4237 static uint32_t BCMI_TSCBH_XGXS_RX_X4_BLKSYNC_DBG2r_fields[] =
   4238 {
   4239     /* LANE4_DEBUG_INFO:0:7 */
   4240     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(799, 7, 0)
   4241 };
   4242 static uint32_t BCMI_TSCBH_XGXS_RX_X4_BLKSYNC_STSr_fields[] =
   4243 {
   4244     /* BS_STATUS:0:4 */
   4245     PHYMOD_SYMBOL_FIELD_ENCODE(435, 4, 0),
   4246     /* BS_PMD_LOCK:5:5 */
   4247     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(434, 5, 5)
   4248 };
   4249 static uint32_t BCMI_TSCBH_XGXS_RX_X4_BLK_LOCK_LATCH_STSr_fields[] =
   4250 {
   4251     /* BLOCK_LOCK_LL_0:0:0 */
   4252     PHYMOD_SYMBOL_FIELD_ENCODE(405, 0, 0),
   4253     /* BLOCK_LOCK_LH_0:1:1 */
   4254     PHYMOD_SYMBOL_FIELD_ENCODE(400, 1, 1),
   4255     /* BLOCK_LOCK_LL_1:2:2 */
   4256     PHYMOD_SYMBOL_FIELD_ENCODE(406, 2, 2),
   4257     /* BLOCK_LOCK_LH_1:3:3 */
   4258     PHYMOD_SYMBOL_FIELD_ENCODE(401, 3, 3),
   4259     /* BLOCK_LOCK_LL_2:4:4 */
   4260     PHYMOD_SYMBOL_FIELD_ENCODE(407, 4, 4),
   4261     /* BLOCK_LOCK_LH_2:5:5 */
   4262     PHYMOD_SYMBOL_FIELD_ENCODE(402, 5, 5),
   4263     /* BLOCK_LOCK_LL_3:6:6 */
   4264     PHYMOD_SYMBOL_FIELD_ENCODE(408, 6, 6),
   4265     /* BLOCK_LOCK_LH_3:7:7 */
   4266     PHYMOD_SYMBOL_FIELD_ENCODE(403, 7, 7),
   4267     /* BLOCK_LOCK_LL_4:8:8 */
   4268     PHYMOD_SYMBOL_FIELD_ENCODE(409, 8, 8),
   4269     /* BLOCK_LOCK_LH_4:9:9 */
   4270     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(404, 9, 9)
   4271 };
   4272 static uint32_t BCMI_TSCBH_XGXS_RX_X4_CL49_SCRIDLE_TEST_ERRr_fields[] =
   4273 {
   4274     /* CL49_SCRIDLE_TEST_ERR:0:15 */
   4275     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(487, 15, 0)
   4276 };
   4277 static uint32_t BCMI_TSCBH_XGXS_RX_X4_CL82_AM_LATCH_STS_PSLL0r_fields[] =
   4278 {
   4279     /* AM_LOCK_HIS_STATE_PSLL_0:0:9 */
   4280     PHYMOD_SYMBOL_FIELD_ENCODE(253, 9, 0),
   4281     /* AMRKR_SPACING_ERR_LATCH_MUX_PSLL_0:10:10 */
   4282     PHYMOD_SYMBOL_FIELD_ENCODE(30, 10, 10),
   4283     /* COMMON_MRKR_SPACING_ERR_LATCH_FECL_0:11:11 */
   4284     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(527, 11, 11)
   4285 };
   4286 static uint32_t BCMI_TSCBH_XGXS_RX_X4_CL82_AM_LATCH_STS_PSLL1r_fields[] =
   4287 {
   4288     /* AM_LOCK_HIS_STATE_PSLL_1:0:9 */
   4289     PHYMOD_SYMBOL_FIELD_ENCODE(254, 9, 0),
   4290     /* AMRKR_SPACING_ERR_LATCH_MUX_PSLL_1:10:10 */
   4291     PHYMOD_SYMBOL_FIELD_ENCODE(31, 10, 10),
   4292     /* COMMON_MRKR_SPACING_ERR_LATCH_FECL_1:11:11 */
   4293     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(528, 11, 11)
   4294 };
   4295 static uint32_t BCMI_TSCBH_XGXS_RX_X4_CL82_AM_LATCH_STS_PSLL2r_fields[] =
   4296 {
   4297     /* AM_LOCK_HIS_STATE_PSLL_2:0:9 */
   4298     PHYMOD_SYMBOL_FIELD_ENCODE(255, 9, 0),
   4299     /* AMRKR_SPACING_ERR_LATCH_MUX_PSLL_2:10:10 */
   4300     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(32, 10, 10)
   4301 };
   4302 static uint32_t BCMI_TSCBH_XGXS_RX_X4_CL82_AM_LATCH_STS_PSLL3r_fields[] =
   4303 {
   4304     /* AM_LOCK_HIS_STATE_PSLL_3:0:9 */
   4305     PHYMOD_SYMBOL_FIELD_ENCODE(256, 9, 0),
   4306     /* AMRKR_SPACING_ERR_LATCH_MUX_PSLL_3:10:10 */
   4307     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(33, 10, 10)
   4308 };
   4309 static uint32_t BCMI_TSCBH_XGXS_RX_X4_CL82_AM_LATCH_STS_PSLL4r_fields[] =
   4310 {
   4311     /* AM_LOCK_HIS_STATE_PSLL_4:0:9 */
   4312     PHYMOD_SYMBOL_FIELD_ENCODE(257, 9, 0),
   4313     /* AMRKR_SPACING_ERR_LATCH_MUX_PSLL_4:10:10 */
   4314     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(34, 10, 10)
   4315 };
   4316 static uint32_t BCMI_TSCBH_XGXS_RX_X4_DEC_CTL0r_fields[] =
   4317 {
   4318     /* LPI_ENABLE:0:0 */
   4319     PHYMOD_SYMBOL_FIELD_ENCODE(954, 0, 0),
   4320     /* RX_RF_ENABLE:1:1 */
   4321     PHYMOD_SYMBOL_FIELD_ENCODE(1703, 1, 1),
   4322     /* RX_LF_ENABLE:2:2 */
   4323     PHYMOD_SYMBOL_FIELD_ENCODE(1624, 2, 2),
   4324     /* RX_LI_ENABLE:3:3 */
   4325     PHYMOD_SYMBOL_FIELD_ENCODE(1625, 3, 3),
   4326     /* R_TEST_MODE_CFG:4:4 */
   4327     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1715, 4, 4)
   4328 };
   4329 static uint32_t BCMI_TSCBH_XGXS_RX_X4_DEC_STS1r_fields[] =
   4330 {
   4331     /* BERMON_HISTORY_STATE:0:4 */
   4332     PHYMOD_SYMBOL_FIELD_ENCODE(392, 4, 0),
   4333     /* CL49_RXSM_HISTORY_STATE:5:10 */
   4334     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(486, 10, 5)
   4335 };
   4336 static uint32_t BCMI_TSCBH_XGXS_RX_X4_DEC_STS3r_fields[] =
   4337 {
   4338     /* IEEE_ERRORED_BLOCKS:0:7 */
   4339     PHYMOD_SYMBOL_FIELD_ENCODE(780, 7, 0),
   4340     /* CL49_BER_COUNT:8:13 */
   4341     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(484, 13, 8)
   4342 };
   4343 static uint32_t BCMI_TSCBH_XGXS_RX_X4_ERRED_BLKS_HOr_fields[] =
   4344 {
   4345     /* ERRORED_BLOCKS_HO:0:13 */
   4346     PHYMOD_SYMBOL_FIELD_ENCODE(687, 13, 0),
   4347     /* ERRORED_BLOCKS_HO_PRESENT:15:15 */
   4348     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(688, 15, 15)
   4349 };
   4350 static uint32_t BCMI_TSCBH_XGXS_RX_X4_FEC0r_fields[] =
   4351 {
   4352     /* DBG_ERR_MODE:0:0 */
   4353     PHYMOD_SYMBOL_FIELD_ENCODE(565, 0, 0),
   4354     /* BURST_ERR_STATUS_MODE:1:1 */
   4355     PHYMOD_SYMBOL_FIELD_ENCODE(438, 1, 1),
   4356     /* DEC_MAX_PM:2:7 */
   4357     PHYMOD_SYMBOL_FIELD_ENCODE(591, 7, 2),
   4358     /* INVALID_PARITY_CNT:8:11 */
   4359     PHYMOD_SYMBOL_FIELD_ENCODE(794, 11, 8),
   4360     /* GOOD_PARITY_CNT:12:14 */
   4361     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(762, 14, 12)
   4362 };
   4363 static uint32_t BCMI_TSCBH_XGXS_RX_X4_FEC1r_fields[] =
   4364 {
   4365     /* DEC_GAP_COUNT_MODE:1:1 */
   4366     PHYMOD_SYMBOL_FIELD_ENCODE(590, 1, 1),
   4367     /* DEC_17B_BURST_GAP_COUNT:2:4 */
   4368     PHYMOD_SYMBOL_FIELD_ENCODE(587, 4, 2),
   4369     /* DEC_18B_BURST_GAP_COUNT:5:7 */
   4370     PHYMOD_SYMBOL_FIELD_ENCODE(588, 7, 5),
   4371     /* DEC_19B_BURST_GAP_COUNT:8:10 */
   4372     PHYMOD_SYMBOL_FIELD_ENCODE(589, 10, 8),
   4373     /* DEC_PM_MODE:11:15 */
   4374     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(592, 15, 11)
   4375 };
   4376 static uint32_t BCMI_TSCBH_XGXS_RX_X4_FEC2r_fields[] =
   4377 {
   4378     /* FEC_ERROR_CODE_ALL:0:0 */
   4379     PHYMOD_SYMBOL_FIELD_ENCODE(711, 0, 0),
   4380     /* DBG_ENABLE:1:1 */
   4381     PHYMOD_SYMBOL_FIELD_ENCODE(562, 1, 1),
   4382     /* FEC_ERR_ENABLE:2:2 */
   4383     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(712, 2, 2)
   4384 };
   4385 static uint32_t BCMI_TSCBH_XGXS_RX_X4_FEC_BIT_ERR_CTR0r_fields[] =
   4386 {
   4387     /* RS_FEC_FEC_CORR_BIT_CNTR_LOWER:0:15 */
   4388     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1374, 15, 0)
   4389 };
   4390 static uint32_t BCMI_TSCBH_XGXS_RX_X4_FEC_BIT_ERR_CTR1r_fields[] =
   4391 {
   4392     /* RS_FEC_FEC_CORR_BIT_CNTR_UPPER:0:15 */
   4393     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1375, 15, 0)
   4394 };
   4395 static uint32_t BCMI_TSCBH_XGXS_RX_X4_FEC_BURST_ERR_STSH0r_fields[] =
   4396 {
   4397     /* BURST_ERR_STATUSH_STREAM0:0:15 */
   4398     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(436, 15, 0)
   4399 };
   4400 static uint32_t BCMI_TSCBH_XGXS_RX_X4_FEC_BURST_ERR_STSL0r_fields[] =
   4401 {
   4402     /* BURST_ERR_STATUSL_STREAM0:0:15 */
   4403     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(437, 15, 0)
   4404 };
   4405 static uint32_t BCMI_TSCBH_XGXS_RX_X4_FEC_CORRBLKSH0r_fields[] =
   4406 {
   4407     /* CORCOUNTH_STREAM0:0:15 */
   4408     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(531, 15, 0)
   4409 };
   4410 static uint32_t BCMI_TSCBH_XGXS_RX_X4_FEC_CORRBLKSL0r_fields[] =
   4411 {
   4412     /* CORCOUNTL_STREAM0:0:15 */
   4413     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(532, 15, 0)
   4414 };
   4415 static uint32_t BCMI_TSCBH_XGXS_RX_X4_FEC_CORR_CTR0r_fields[] =
   4416 {
   4417     /* RS_FEC_FEC_CORR_CW_CNTR_LOWER:0:15 */
   4418     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1376, 15, 0)
   4419 };
   4420 static uint32_t BCMI_TSCBH_XGXS_RX_X4_FEC_CORR_CTR1r_fields[] =
   4421 {
   4422     /* RS_FEC_FEC_CORR_CW_CNTR_UPPER:0:15 */
   4423     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1377, 15, 0)
   4424 };
   4425 static uint32_t BCMI_TSCBH_XGXS_RX_X4_FEC_DBG_ERRAH0r_fields[] =
   4426 {
   4427     /* DBG_ERRH_STREAM0:0:15 */
   4428     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(563, 15, 0)
   4429 };
   4430 static uint32_t BCMI_TSCBH_XGXS_RX_X4_FEC_DBG_ERRL0r_fields[] =
   4431 {
   4432     /* DBG_ERRL_STREAM0:0:15 */
   4433     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(564, 15, 0)
   4434 };
   4435 static uint32_t BCMI_TSCBH_XGXS_RX_X4_FEC_SYNC_FSM_STr_fields[] =
   4436 {
   4437     /* RS_FEC_FEC_SYNC_FSM_LATCHED_STATE_LO:1:7 */
   4438     PHYMOD_SYMBOL_FIELD_ENCODE(1383, 7, 1),
   4439     /* RS_FEC_FEC_SYNC_FSM_LATCHED_STATE_HI:9:15 */
   4440     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1382, 15, 9)
   4441 };
   4442 static uint32_t BCMI_TSCBH_XGXS_RX_X4_FEC_UNCORRBLKSH0r_fields[] =
   4443 {
   4444     /* UNCORCOUNTH_STREAM0:0:15 */
   4445     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2067, 15, 0)
   4446 };
   4447 static uint32_t BCMI_TSCBH_XGXS_RX_X4_FEC_UNCORRBLKSL0r_fields[] =
   4448 {
   4449     /* UNCORCOUNTL_STREAM0:0:15 */
   4450     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2068, 15, 0)
   4451 };
   4452 static uint32_t BCMI_TSCBH_XGXS_RX_X4_FEC_UNCORR_CTR0r_fields[] =
   4453 {
   4454     /* RS_FEC_FEC_UNCORR_CW_CNTR_LOWER:0:15 */
   4455     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1384, 15, 0)
   4456 };
   4457 static uint32_t BCMI_TSCBH_XGXS_RX_X4_FEC_UNCORR_CTR1r_fields[] =
   4458 {
   4459     /* RS_FEC_FEC_UNCORR_CW_CNTR_UPPER:0:15 */
   4460     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1385, 15, 0)
   4461 };
   4462 static uint32_t BCMI_TSCBH_XGXS_RX_X4_PCS_LATCH_STS1r_fields[] =
   4463 {
   4464     /* DESKEW_STATUS_LL:0:0 */
   4465     PHYMOD_SYMBOL_FIELD_ENCODE(596, 0, 0),
   4466     /* DESKEW_STATUS_LH:1:1 */
   4467     PHYMOD_SYMBOL_FIELD_ENCODE(595, 1, 1),
   4468     /* LINK_STATUS_LL:2:2 */
   4469     PHYMOD_SYMBOL_FIELD_ENCODE(906, 2, 2),
   4470     /* LINK_STATUS_LH:3:3 */
   4471     PHYMOD_SYMBOL_FIELD_ENCODE(905, 3, 3),
   4472     /* HI_BER_LL:4:4 */
   4473     PHYMOD_SYMBOL_FIELD_ENCODE(766, 4, 4),
   4474     /* HI_BER_LH:5:5 */
   4475     PHYMOD_SYMBOL_FIELD_ENCODE(765, 5, 5),
   4476     /* LPI_RECEIVED_LH:6:6 */
   4477     PHYMOD_SYMBOL_FIELD_ENCODE(955, 6, 6),
   4478     /* LINK_INTERRUPT_LH:7:7 */
   4479     PHYMOD_SYMBOL_FIELD_ENCODE(904, 7, 7),
   4480     /* REMOTE_FAULT_LH:8:8 */
   4481     PHYMOD_SYMBOL_FIELD_ENCODE(1327, 8, 8),
   4482     /* LOCAL_FAULT_LH:9:9 */
   4483     PHYMOD_SYMBOL_FIELD_ENCODE(946, 9, 9),
   4484     /* PCS_LINK_STATUS_LIVE:10:10 */
   4485     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1198, 10, 10)
   4486 };
   4487 static uint32_t BCMI_TSCBH_XGXS_RX_X4_PMA_CTL0r_fields[] =
   4488 {
   4489     /* RSTB_LANE:0:0 */
   4490     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1362, 0, 0)
   4491 };
   4492 static uint32_t BCMI_TSCBH_XGXS_RX_X4_PRTPERRCTRr_fields[] =
   4493 {
   4494     /* PRTP_ERR_COUNT:0:15 */
   4495     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1306, 15, 0)
   4496 };
   4497 static uint32_t BCMI_TSCBH_XGXS_RX_X4_PRTPSTSr_fields[] =
   4498 {
   4499     /* PRTP_LOCK:0:0 */
   4500     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1307, 0, 0)
   4501 };
   4502 static uint32_t BCMI_TSCBH_XGXS_RX_X4_PSLL_TO_VL_MAP0r_fields[] =
   4503 {
   4504     /* PSLL0_TO_VL_MAPPING:0:4 */
   4505     PHYMOD_SYMBOL_FIELD_ENCODE(1308, 4, 0),
   4506     /* PSLL1_TO_VL_MAPPING:5:9 */
   4507     PHYMOD_SYMBOL_FIELD_ENCODE(1309, 9, 5),
   4508     /* PSLL2_TO_VL_MAPPING:10:14 */
   4509     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1310, 14, 10)
   4510 };
   4511 static uint32_t BCMI_TSCBH_XGXS_RX_X4_PSLL_TO_VL_MAP1r_fields[] =
   4512 {
   4513     /* PSLL3_TO_VL_MAPPING:0:4 */
   4514     PHYMOD_SYMBOL_FIELD_ENCODE(1311, 4, 0),
   4515     /* PSLL4_TO_VL_MAPPING:5:9 */
   4516     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1312, 9, 5)
   4517 };
   4518 static uint32_t BCMI_TSCBH_XGXS_RX_X4_RL_MODE_HW_STSr_fields[] =
   4519 {
   4520     /* HW_LI_IN_RL_MODE:0:0 */
   4521     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(777, 0, 0)
   4522 };
   4523 static uint32_t BCMI_TSCBH_XGXS_RX_X4_RL_MODE_SW_CTLr_fields[] =
   4524 {
   4525     /* SW_LI_IN_RL_MODE:0:0 */
   4526     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1763, 0, 0)
   4527 };
   4528 static uint32_t BCMI_TSCBH_XGXS_RX_X4_RS_FEC_FEC_SYM_ERR_CTR_LOW0r_fields[] =
   4529 {
   4530     /* FEC_SYMBOL_ERROR_COUNTER_LOWER_0:0:15 */
   4531     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(714, 15, 0)
   4532 };
   4533 static uint32_t BCMI_TSCBH_XGXS_RX_X4_RS_FEC_FEC_SYM_ERR_CTR_LOW1r_fields[] =
   4534 {
   4535     /* FEC_SYMBOL_ERROR_COUNTER_LOWER_1:0:15 */
   4536     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(715, 15, 0)
   4537 };
   4538 static uint32_t BCMI_TSCBH_XGXS_RX_X4_RS_FEC_FEC_SYM_ERR_CTR_LOW2r_fields[] =
   4539 {
   4540     /* FEC_SYMBOL_ERROR_COUNTER_LOWER_2:0:15 */
   4541     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(716, 15, 0)
   4542 };
   4543 static uint32_t BCMI_TSCBH_XGXS_RX_X4_RS_FEC_FEC_SYM_ERR_CTR_LOW3r_fields[] =
   4544 {
   4545     /* FEC_SYMBOL_ERROR_COUNTER_LOWER_3:0:15 */
   4546     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(717, 15, 0)
   4547 };
   4548 static uint32_t BCMI_TSCBH_XGXS_RX_X4_RS_FEC_FEC_SYM_ERR_CTR_UP0r_fields[] =
   4549 {
   4550     /* FEC_SYMBOL_ERROR_COUNTER_UPPER_0:0:15 */
   4551     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(718, 15, 0)
   4552 };
   4553 static uint32_t BCMI_TSCBH_XGXS_RX_X4_RS_FEC_FEC_SYM_ERR_CTR_UP1r_fields[] =
   4554 {
   4555     /* FEC_SYMBOL_ERROR_COUNTER_UPPER_1:0:15 */
   4556     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(719, 15, 0)
   4557 };
   4558 static uint32_t BCMI_TSCBH_XGXS_RX_X4_RS_FEC_FEC_SYM_ERR_CTR_UP2r_fields[] =
   4559 {
   4560     /* FEC_SYMBOL_ERROR_COUNTER_UPPER_2:0:15 */
   4561     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(720, 15, 0)
   4562 };
   4563 static uint32_t BCMI_TSCBH_XGXS_RX_X4_RS_FEC_FEC_SYM_ERR_CTR_UP3r_fields[] =
   4564 {
   4565     /* FEC_SYMBOL_ERROR_COUNTER_UPPER_3:0:15 */
   4566     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(721, 15, 0)
   4567 };
   4568 static uint32_t BCMI_TSCBH_XGXS_RX_X4_RS_FEC_RXP_STSr_fields[] =
   4569 {
   4570     /* RESTART_LOCK_LIVE:0:0 */
   4571     PHYMOD_SYMBOL_FIELD_ENCODE(1335, 0, 0),
   4572     /* RESTART_LOCK_LL:1:1 */
   4573     PHYMOD_SYMBOL_FIELD_ENCODE(1336, 1, 1),
   4574     /* RESTART_LOCK_LH:2:2 */
   4575     PHYMOD_SYMBOL_FIELD_ENCODE(1334, 2, 2),
   4576     /* FEC_ALIGN_STATUS_LIVE:3:3 */
   4577     PHYMOD_SYMBOL_FIELD_ENCODE(709, 3, 3),
   4578     /* FEC_ALIGN_STATUS_LL:4:4 */
   4579     PHYMOD_SYMBOL_FIELD_ENCODE(710, 4, 4),
   4580     /* FEC_ALIGN_STATUS_LH:5:5 */
   4581     PHYMOD_SYMBOL_FIELD_ENCODE(708, 5, 5),
   4582     /* HI_SER_LIVE:6:6 */
   4583     PHYMOD_SYMBOL_FIELD_ENCODE(768, 6, 6),
   4584     /* HI_SER_LL:7:7 */
   4585     PHYMOD_SYMBOL_FIELD_ENCODE(769, 7, 7),
   4586     /* HI_SER_LH:8:8 */
   4587     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(767, 8, 8)
   4588 };
   4589 static uint32_t BCMI_TSCBH_XGXS_RX_X4_RS_FEC_RX_CTL0r_fields[] =
   4590 {
   4591     /* CW_BAD_ENABLE:15:15 */
   4592     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(544, 15, 15)
   4593 };
   4594 static uint32_t BCMI_TSCBH_XGXS_RX_X4_RS_FEC_SYNC_STSr_fields[] =
   4595 {
   4596     /* RS_FEC_AMPS_LOCK_LIVE_0:0:0 */
   4597     PHYMOD_SYMBOL_FIELD_ENCODE(1368, 0, 0),
   4598     /* RS_FEC_AMPS_LOCK_LL_0:1:1 */
   4599     PHYMOD_SYMBOL_FIELD_ENCODE(1370, 1, 1),
   4600     /* RS_FEC_AMPS_LOCK_LH_0:2:2 */
   4601     PHYMOD_SYMBOL_FIELD_ENCODE(1366, 2, 2),
   4602     /* RS_FEC_FEC_LANE_MAP_0:3:6 */
   4603     PHYMOD_SYMBOL_FIELD_ENCODE(1378, 6, 3),
   4604     /* RS_FEC_FEC_LANE_MAP_VALID_0:7:7 */
   4605     PHYMOD_SYMBOL_FIELD_ENCODE(1380, 7, 7),
   4606     /* RS_FEC_AMPS_LOCK_LIVE_1:8:8 */
   4607     PHYMOD_SYMBOL_FIELD_ENCODE(1369, 8, 8),
   4608     /* RS_FEC_AMPS_LOCK_LL_1:9:9 */
   4609     PHYMOD_SYMBOL_FIELD_ENCODE(1371, 9, 9),
   4610     /* RS_FEC_AMPS_LOCK_LH_1:10:10 */
   4611     PHYMOD_SYMBOL_FIELD_ENCODE(1367, 10, 10),
   4612     /* RS_FEC_FEC_LANE_MAP_1:11:14 */
   4613     PHYMOD_SYMBOL_FIELD_ENCODE(1379, 14, 11),
   4614     /* RS_FEC_FEC_LANE_MAP_VALID_1:15:15 */
   4615     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1381, 15, 15)
   4616 };
   4617 static uint32_t BCMI_TSCBH_XGXS_RX_X4_RS_FEC_TMRr_fields[] =
   4618 {
   4619     /* CORRUPTION_PERIOD:0:12 */
   4620     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(542, 12, 0)
   4621 };
   4622 static uint32_t BCMI_TSCBH_XGXS_RX_X4_RS_SYMr_fields[] =
   4623 {
   4624     /* SYMBOL_VALUE:0:9 */
   4625     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1768, 9, 0)
   4626 };
   4627 static uint32_t BCMI_TSCBH_XGXS_RX_X4_RX_LATCH_STSr_fields[] =
   4628 {
   4629     /* DESKEW_HIS_STATE:0:5 */
   4630     PHYMOD_SYMBOL_FIELD_ENCODE(594, 5, 0),
   4631     /* HISTORY_RXSM_STATE:6:10 */
   4632     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(764, 10, 6)
   4633 };
   4634 static uint32_t BCMI_TSCBH_XGXS_RX_X4_RX_TS_CTLr_fields[] =
   4635 {
   4636     /* RX_SFD_TS_EN:0:0 */
   4637     PHYMOD_SYMBOL_FIELD_ENCODE(1704, 0, 0),
   4638     /* TS_UPDATE_ENABLE:1:1 */
   4639     PHYMOD_SYMBOL_FIELD_ENCODE(1897, 1, 1),
   4640     /* RECORD_DESKEW_TS_INFO:2:2 */
   4641     PHYMOD_SYMBOL_FIELD_ENCODE(1317, 2, 2),
   4642     /* SUB_NS_XGMII_MODE_ADDER:3:6 */
   4643     PHYMOD_SYMBOL_FIELD_ENCODE(1756, 6, 3),
   4644     /* NS_XGMII_MODE_ADDER:7:9 */
   4645     PHYMOD_SYMBOL_FIELD_ENCODE(1141, 9, 7),
   4646     /* SIGN_XGMII_MODE_ADDER:10:10 */
   4647     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1744, 10, 10)
   4648 };
   4649 static uint32_t BCMI_TSCBH_XGXS_RX_X4_SKEW_OFFSS0r_fields[] =
   4650 {
   4651     /* AM_SLIP_COUNT_0:0:6 */
   4652     PHYMOD_SYMBOL_FIELD_ENCODE(268, 6, 0),
   4653     /* AM_TS_FCLK_ADJUST_VALUE_0:7:13 */
   4654     PHYMOD_SYMBOL_FIELD_ENCODE(273, 13, 7),
   4655     /* DESKEW_TS_INFO_VALID_0:14:14 */
   4656     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(597, 14, 14)
   4657 };
   4658 static uint32_t BCMI_TSCBH_XGXS_RX_X4_SKEW_OFFSS1r_fields[] =
   4659 {
   4660     /* AM_SLIP_COUNT_1:0:6 */
   4661     PHYMOD_SYMBOL_FIELD_ENCODE(269, 6, 0),
   4662     /* AM_TS_FCLK_ADJUST_VALUE_1:7:13 */
   4663     PHYMOD_SYMBOL_FIELD_ENCODE(274, 13, 7),
   4664     /* DESKEW_TS_INFO_VALID_1:14:14 */
   4665     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(598, 14, 14)
   4666 };
   4667 static uint32_t BCMI_TSCBH_XGXS_RX_X4_SKEW_OFFSS2r_fields[] =
   4668 {
   4669     /* AM_SLIP_COUNT_2:0:6 */
   4670     PHYMOD_SYMBOL_FIELD_ENCODE(270, 6, 0),
   4671     /* AM_TS_FCLK_ADJUST_VALUE_2:7:13 */
   4672     PHYMOD_SYMBOL_FIELD_ENCODE(275, 13, 7),
   4673     /* DESKEW_TS_INFO_VALID_2:14:14 */
   4674     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(599, 14, 14)
   4675 };
   4676 static uint32_t BCMI_TSCBH_XGXS_RX_X4_SKEW_OFFSS3r_fields[] =
   4677 {
   4678     /* AM_SLIP_COUNT_3:0:6 */
   4679     PHYMOD_SYMBOL_FIELD_ENCODE(271, 6, 0),
   4680     /* AM_TS_FCLK_ADJUST_VALUE_3:7:13 */
   4681     PHYMOD_SYMBOL_FIELD_ENCODE(276, 13, 7),
   4682     /* DESKEW_TS_INFO_VALID_3:14:14 */
   4683     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(600, 14, 14)
   4684 };
   4685 static uint32_t BCMI_TSCBH_XGXS_RX_X4_SKEW_OFFSS4r_fields[] =
   4686 {
   4687     /* AM_SLIP_COUNT_4:0:6 */
   4688     PHYMOD_SYMBOL_FIELD_ENCODE(272, 6, 0),
   4689     /* AM_TS_FCLK_ADJUST_VALUE_4:7:13 */
   4690     PHYMOD_SYMBOL_FIELD_ENCODE(277, 13, 7),
   4691     /* DESKEW_TS_INFO_VALID_4:14:14 */
   4692     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(601, 14, 14)
   4693 };
   4694 static uint32_t BCMI_TSCBH_XGXS_RX_X4_TEST_STS0_CL82_SCRIDLE_TEST_ERRr_fields[] =
   4695 {
   4696     /* CL82_SCRIDLE_TEST_ERR:0:15 */
   4697     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(506, 15, 0)
   4698 };
   4699 static uint32_t BCMI_TSCBH_XGXS_SC_X1_PIPE_RST_CNTr_fields[] =
   4700 {
   4701     /* PIPELINE_RESET_COUNT:0:15 */
   4702     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1209, 15, 0)
   4703 };
   4704 static uint32_t BCMI_TSCBH_XGXS_SC_X1_STSr_fields[] =
   4705 {
   4706     /* RESOLVED_PORT_MODE:0:2 */
   4707     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1332, 2, 0)
   4708 };
   4709 static uint32_t BCMI_TSCBH_XGXS_SC_X1_TX_RST_CNTr_fields[] =
   4710 {
   4711     /* TX_RESET_COUNT:0:15 */
   4712     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2033, 15, 0)
   4713 };
   4714 static uint32_t BCMI_TSCBH_XGXS_SC_X4_CTLr_fields[] =
   4715 {
   4716     /* SW_SPEED_ID:0:5 */
   4717     PHYMOD_SYMBOL_FIELD_ENCODE(1767, 5, 0),
   4718     /* SW_SPEED_CHANGE:8:8 */
   4719     PHYMOD_SYMBOL_FIELD_ENCODE(1764, 8, 8),
   4720     /* SC_IGNORE_TX_DATA_VLD:9:9 */
   4721     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1717, 9, 9)
   4722 };
   4723 static uint32_t BCMI_TSCBH_XGXS_SC_X4_DBGr_fields[] =
   4724 {
   4725     /* SC_FSM_STATUS:0:15 */
   4726     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1716, 15, 0)
   4727 };
   4728 static uint32_t BCMI_TSCBH_XGXS_SC_X4_FEC_STSr_fields[] =
   4729 {
   4730     /* R_FEC_ENABLE:0:0 */
   4731     PHYMOD_SYMBOL_FIELD_ENCODE(1713, 0, 0),
   4732     /* T_FEC_ENABLE:1:1 */
   4733     PHYMOD_SYMBOL_FIELD_ENCODE(2040, 1, 1),
   4734     /* R_RS_FEC_FEC_MODE:2:4 */
   4735     PHYMOD_SYMBOL_FIELD_ENCODE(1714, 4, 2),
   4736     /* T_RS_FEC_FEC_MODE:5:7 */
   4737     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2041, 7, 5)
   4738 };
   4739 static uint32_t BCMI_TSCBH_XGXS_SC_X4_RSLVD_SPDr_fields[] =
   4740 {
   4741     /* SPEED:10:15 */
   4742     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1751, 15, 10)
   4743 };
   4744 static uint32_t BCMI_TSCBH_XGXS_SC_X4_SPARE0r_fields[] =
   4745 {
   4746     /* SPARE0:0:15 */
   4747     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1748, 15, 0)
   4748 };
   4749 static uint32_t BCMI_TSCBH_XGXS_SC_X4_STSr_fields[] =
   4750 {
   4751     /* SW_SPEED_CHANGE_DONE:0:0 */
   4752     PHYMOD_SYMBOL_FIELD_ENCODE(1765, 0, 0),
   4753     /* SW_SPEED_CONFIG_VLD:1:1 */
   4754     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1766, 1, 1)
   4755 };
   4756 static uint32_t BCMI_TSCBH_XGXS_SC_X4_SW_SPARE1r_fields[] =
   4757 {
   4758     /* SPARE1:0:15 */
   4759     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1749, 15, 0)
   4760 };
   4761 static uint32_t BCMI_TSCBH_XGXS_SIGDET_CTL0r_fields[] =
   4762 {
   4763     /* SIGNAL_DETECT_FILTER_COUNT:0:4 */
   4764     PHYMOD_SYMBOL_FIELD_ENCODE(1733, 4, 0),
   4765     /* LOS_FILTER_COUNT:8:12 */
   4766     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(952, 12, 8)
   4767 };
   4768 static uint32_t BCMI_TSCBH_XGXS_SIGDET_CTL1r_fields[] =
   4769 {
   4770     /* AFE_SIGNAL_DETECT_DIS:0:0 */
   4771     PHYMOD_SYMBOL_FIELD_ENCODE(17, 0, 0),
   4772     /* EXT_LOS_EN:1:1 */
   4773     PHYMOD_SYMBOL_FIELD_ENCODE(702, 1, 1),
   4774     /* EXT_LOS_INV:2:2 */
   4775     PHYMOD_SYMBOL_FIELD_ENCODE(703, 2, 2),
   4776     /* IGNORE_LP_MODE:3:3 */
   4777     PHYMOD_SYMBOL_FIELD_ENCODE(783, 3, 3),
   4778     /* SIGNAL_DETECT_FILTER_1US:4:4 */
   4779     PHYMOD_SYMBOL_FIELD_ENCODE(1732, 4, 4),
   4780     /* ENERGY_DETECT_FRC:5:5 */
   4781     PHYMOD_SYMBOL_FIELD_ENCODE(684, 5, 5),
   4782     /* ENERGY_DETECT_FRC_VAL:6:6 */
   4783     PHYMOD_SYMBOL_FIELD_ENCODE(685, 6, 6),
   4784     /* SIGNAL_DETECT_FRC:7:7 */
   4785     PHYMOD_SYMBOL_FIELD_ENCODE(1734, 7, 7),
   4786     /* SIGNAL_DETECT_FRC_VAL:8:8 */
   4787     PHYMOD_SYMBOL_FIELD_ENCODE(1735, 8, 8),
   4788     /* ENERGY_DETECT_MASK_COUNT:11:15 */
   4789     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(686, 15, 11)
   4790 };
   4791 static uint32_t BCMI_TSCBH_XGXS_SIGDET_CTL2r_fields[] =
   4792 {
   4793     /* LOS_THRESH:0:2 */
   4794     PHYMOD_SYMBOL_FIELD_ENCODE(953, 2, 0),
   4795     /* SIGNAL_DETECT_THRESH:4:6 */
   4796     PHYMOD_SYMBOL_FIELD_ENCODE(1743, 6, 4),
   4797     /* HOLD_LOS_COUNT:8:10 */
   4798     PHYMOD_SYMBOL_FIELD_ENCODE(773, 10, 8),
   4799     /* HOLD_SD_COUNT:11:13 */
   4800     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(774, 13, 11)
   4801 };
   4802 static uint32_t BCMI_TSCBH_XGXS_SIGDET_STS0r_fields[] =
   4803 {
   4804     /* SIGNAL_DETECT:0:0 */
   4805     PHYMOD_SYMBOL_FIELD_ENCODE(1730, 0, 0),
   4806     /* SIGNAL_DETECT_CHANGE:1:1 */
   4807     PHYMOD_SYMBOL_FIELD_ENCODE(1731, 1, 1),
   4808     /* SIGNAL_DETECT_RAW:4:4 */
   4809     PHYMOD_SYMBOL_FIELD_ENCODE(1740, 4, 4),
   4810     /* SIGNAL_DETECT_RAW_CHANGE:5:5 */
   4811     PHYMOD_SYMBOL_FIELD_ENCODE(1741, 5, 5),
   4812     /* EXT_SIGDET:6:6 */
   4813     PHYMOD_SYMBOL_FIELD_ENCODE(704, 6, 6),
   4814     /* EXT_SIGDET_CHANGE:7:7 */
   4815     PHYMOD_SYMBOL_FIELD_ENCODE(705, 7, 7),
   4816     /* AFE_SIGDET:8:8 */
   4817     PHYMOD_SYMBOL_FIELD_ENCODE(13, 8, 8),
   4818     /* AFE_SIGDET_CHANGE:9:9 */
   4819     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(14, 9, 9)
   4820 };
   4821 static uint32_t BCMI_TSCBH_XGXS_SIGDET_STS1r_fields[] =
   4822 {
   4823     /* UC_SIGNAL_DETECT:0:0 */
   4824     PHYMOD_SYMBOL_FIELD_ENCODE(2061, 0, 0),
   4825     /* UC_SIGNAL_DETECT_CHANGE:1:1 */
   4826     PHYMOD_SYMBOL_FIELD_ENCODE(2062, 1, 1),
   4827     /* UC_EXT_SIGDET:6:6 */
   4828     PHYMOD_SYMBOL_FIELD_ENCODE(2057, 6, 6),
   4829     /* UC_EXT_SIGDET_CHANGE:7:7 */
   4830     PHYMOD_SYMBOL_FIELD_ENCODE(2058, 7, 7),
   4831     /* UC_AFE_SIGDET:8:8 */
   4832     PHYMOD_SYMBOL_FIELD_ENCODE(2050, 8, 8),
   4833     /* UC_AFE_SIGDET_CHANGE:9:9 */
   4834     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2051, 9, 9)
   4835 };
   4836 static uint32_t BCMI_TSCBH_XGXS_SIGDET_STS2r_fields[] =
   4837 {
   4838     /* ENERGY_DETECT:0:0 */
   4839     PHYMOD_SYMBOL_FIELD_ENCODE(682, 0, 0),
   4840     /* ENERGY_DETECT_CHANGE:1:1 */
   4841     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(683, 1, 1)
   4842 };
   4843 static uint32_t BCMI_TSCBH_XGXS_SIGDET_STS3r_fields[] =
   4844 {
   4845     /* PMD_SIGNAL_DETECT:0:0 */
   4846     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1248, 0, 0)
   4847 };
   4848 static uint32_t BCMI_TSCBH_XGXS_SIGDET_STS4r_fields[] =
   4849 {
   4850     /* AFE_SIGDET_THRESH:0:2 */
   4851     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(16, 2, 0)
   4852 };
   4853 static uint32_t BCMI_TSCBH_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS0r_fields[] =
   4854 {
   4855     /* TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_0:0:15 */
   4856     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1797, 15, 0)
   4857 };
   4858 static uint32_t BCMI_TSCBH_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS1r_fields[] =
   4859 {
   4860     /* TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_1:0:15 */
   4861     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1798, 15, 0)
   4862 };
   4863 static uint32_t BCMI_TSCBH_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS2r_fields[] =
   4864 {
   4865     /* TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_2:0:15 */
   4866     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1799, 15, 0)
   4867 };
   4868 static uint32_t BCMI_TSCBH_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS3r_fields[] =
   4869 {
   4870     /* TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_3:0:15 */
   4871     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1800, 15, 0)
   4872 };
   4873 static uint32_t BCMI_TSCBH_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS4r_fields[] =
   4874 {
   4875     /* TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_4:0:15 */
   4876     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1801, 15, 0)
   4877 };
   4878 static uint32_t BCMI_TSCBH_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS5r_fields[] =
   4879 {
   4880     /* TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_5:0:15 */
   4881     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1802, 15, 0)
   4882 };
   4883 static uint32_t BCMI_TSCBH_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS6r_fields[] =
   4884 {
   4885     /* TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_6:0:15 */
   4886     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1803, 15, 0)
   4887 };
   4888 static uint32_t BCMI_TSCBH_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS7r_fields[] =
   4889 {
   4890     /* TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_7:0:15 */
   4891     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1804, 15, 0)
   4892 };
   4893 static uint32_t BCMI_TSCBH_XGXS_TLB_ERR_AGGR_NUM_ERRS_IN_FEC_FRAMES_STS_HIr_fields[] =
   4894 {
   4895     /* TLB_ERR_AGGR_COUNT_ERROR_HI:0:3 */
   4896     PHYMOD_SYMBOL_FIELD_ENCODE(1795, 3, 0),
   4897     /* TLB_ERR_AGGR_ACTIVE_STATUS:4:4 */
   4898     PHYMOD_SYMBOL_FIELD_ENCODE(1790, 4, 4),
   4899     /* TLB_ERR_AGGR_CLKS_OUT_OF_SYNC_STATUS:5:5 */
   4900     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1793, 5, 5)
   4901 };
   4902 static uint32_t BCMI_TSCBH_XGXS_TLB_ERR_AGGR_NUM_ERRS_IN_FEC_FRAMES_STS_LOr_fields[] =
   4903 {
   4904     /* TLB_ERR_AGGR_COUNT_ERROR_LO:0:15 */
   4905     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1796, 15, 0)
   4906 };
   4907 static uint32_t BCMI_TSCBH_XGXS_TLB_ERR_AGGR_TLB_ERR_AGGR_CFG0r_fields[] =
   4908 {
   4909     /* TLB_ERR_AGGR_EN:0:0 */
   4910     PHYMOD_SYMBOL_FIELD_ENCODE(1806, 0, 0),
   4911     /* TLB_ERR_AGGR_CLEAR_ERROR_ANALYZER_STATUS:1:1 */
   4912     PHYMOD_SYMBOL_FIELD_ENCODE(1791, 1, 1),
   4913     /* TLB_ERR_AGGR_ERROR_COUNT_THRESH:2:5 */
   4914     PHYMOD_SYMBOL_FIELD_ENCODE(1808, 5, 2),
   4915     /* TLB_ERR_AGGR_LANES_ACTIVE:6:13 */
   4916     PHYMOD_SYMBOL_FIELD_ENCODE(1811, 13, 6),
   4917     /* TLB_ERR_AGGR_MODE:14:15 */
   4918     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1812, 15, 14)
   4919 };
   4920 static uint32_t BCMI_TSCBH_XGXS_TLB_ERR_AGGR_TLB_ERR_AGGR_CFG1r_fields[] =
   4921 {
   4922     /* TLB_ERR_AGGR_HISTOGRAM_ERROR_THRESH:0:3 */
   4923     PHYMOD_SYMBOL_FIELD_ENCODE(1810, 3, 0),
   4924     /* TLB_ERR_AGGR_CLEAR_STATUS_ON_READ:4:4 */
   4925     PHYMOD_SYMBOL_FIELD_ENCODE(1792, 4, 4),
   4926     /* TLB_ERR_AGGR_GCLK_DIV2_EN_IGNORE:5:5 */
   4927     PHYMOD_SYMBOL_FIELD_ENCODE(1809, 5, 5),
   4928     /* TLB_ERR_AGGR_ACTIVE_PATTERN_DEPTH:6:8 */
   4929     PHYMOD_SYMBOL_FIELD_ENCODE(1789, 8, 6),
   4930     /* TLB_ERR_AGGR_CLK_OUT_OF_SYNC_PATTERN_DEPTH:9:11 */
   4931     PHYMOD_SYMBOL_FIELD_ENCODE(1794, 11, 9),
   4932     /* TLB_ERR_AGGR_DELAY_DATA_CAPTURE:12:13 */
   4933     PHYMOD_SYMBOL_FIELD_ENCODE(1805, 13, 12),
   4934     /* TLB_ERR_AGGR_EN_FORCE:14:14 */
   4935     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1807, 14, 14)
   4936 };
   4937 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_CFG0r_fields[] =
   4938 {
   4939     /* BC_DEC_EN:0:0 */
   4940     PHYMOD_SYMBOL_FIELD_ENCODE(354, 0, 0),
   4941     /* BC_DEC_REFRAME_EN:3:3 */
   4942     PHYMOD_SYMBOL_FIELD_ENCODE(382, 3, 3),
   4943     /* BC_DEC_LOCK_CNT:4:7 */
   4944     PHYMOD_SYMBOL_FIELD_ENCODE(371, 7, 4),
   4945     /* BC_DEC_ALIGN_TIMER_CNT:8:12 */
   4946     PHYMOD_SYMBOL_FIELD_ENCODE(352, 12, 8),
   4947     /* BC_DEC_ALIGN_CHECK_SEC_EN:13:13 */
   4948     PHYMOD_SYMBOL_FIELD_ENCODE(350, 13, 13),
   4949     /* BC_DEC_ALIGN_TIMER_MODE:14:15 */
   4950     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(353, 15, 14)
   4951 };
   4952 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_CFG1r_fields[] =
   4953 {
   4954     /* BC_DEC_FRM_PAT:0:15 */
   4955     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(356, 15, 0)
   4956 };
   4957 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_CFG2r_fields[] =
   4958 {
   4959     /* BC_DEC_MSG_TYPE_MODE:1:2 */
   4960     PHYMOD_SYMBOL_FIELD_ENCODE(379, 2, 1),
   4961     /* BC_DEC_MSG_CONS_CNT:4:6 */
   4962     PHYMOD_SYMBOL_FIELD_ENCODE(372, 6, 4),
   4963     /* BC_DEC_OOL_CNT:7:11 */
   4964     PHYMOD_SYMBOL_FIELD_ENCODE(381, 11, 7),
   4965     /* BC_DEC_FRM_LEN_SEL:12:14 */
   4966     PHYMOD_SYMBOL_FIELD_ENCODE(355, 14, 12),
   4967     /* BC_DEC_ALIGN_SEARCH_MANUAL_TIMER_DONE:15:15 */
   4968     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(351, 15, 15)
   4969 };
   4970 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_CFG3r_fields[] =
   4971 {
   4972     /* SYM_ROTATE_DLY_FRC_VAL:0:4 */
   4973     PHYMOD_SYMBOL_FIELD_ENCODE(1772, 4, 0),
   4974     /* SYM_ROTATE_DLY_FRC:5:5 */
   4975     PHYMOD_SYMBOL_FIELD_ENCODE(1771, 5, 5),
   4976     /* SYM_ROTATE_PRBS_AUTO_DETECT_EN:6:6 */
   4977     PHYMOD_SYMBOL_FIELD_ENCODE(1773, 6, 6),
   4978     /* SYM_ROTATE_BC_DEC_EN:7:7 */
   4979     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1769, 7, 7)
   4980 };
   4981 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_CFG4r_fields[] =
   4982 {
   4983     /* BC_DEC_INTR_MASK_LOCK:0:0 */
   4984     PHYMOD_SYMBOL_FIELD_ENCODE(363, 0, 0),
   4985     /* BC_DEC_INTR_MASK_OOL:1:1 */
   4986     PHYMOD_SYMBOL_FIELD_ENCODE(366, 1, 1),
   4987     /* BC_DEC_INTR_MASK_MSG_MSB_READY:2:2 */
   4988     PHYMOD_SYMBOL_FIELD_ENCODE(365, 2, 2),
   4989     /* BC_DEC_INTR_MASK_MSG_LSB_READY:3:3 */
   4990     PHYMOD_SYMBOL_FIELD_ENCODE(364, 3, 3),
   4991     /* BC_DEC_INTR_FRC_LOCK:8:8 */
   4992     PHYMOD_SYMBOL_FIELD_ENCODE(358, 8, 8),
   4993     /* BC_DEC_INTR_FRC_OOL:9:9 */
   4994     PHYMOD_SYMBOL_FIELD_ENCODE(361, 9, 9),
   4995     /* BC_DEC_INTR_FRC_MSG_MSB_READY:10:10 */
   4996     PHYMOD_SYMBOL_FIELD_ENCODE(360, 10, 10),
   4997     /* BC_DEC_INTR_FRC_MSG_LSB_READY:11:11 */
   4998     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(359, 11, 11)
   4999 };
   5000 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_STS0r_fields[] =
   5001 {
   5002     /* BC_DEC_LOCK:0:0 */
   5003     PHYMOD_SYMBOL_FIELD_ENCODE(370, 0, 0),
   5004     /* BC_DEC_OOL:1:1 */
   5005     PHYMOD_SYMBOL_FIELD_ENCODE(380, 1, 1),
   5006     /* BC_DEC_SM_STATE:4:5 */
   5007     PHYMOD_SYMBOL_FIELD_ENCODE(383, 5, 4),
   5008     /* SYM_ROTATE_DLY:8:12 */
   5009     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1770, 12, 8)
   5010 };
   5011 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_STS1r_fields[] =
   5012 {
   5013     /* BC_DEC_SM_STATE_ONE_HOT:0:3 */
   5014     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(384, 3, 0)
   5015 };
   5016 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_STS2r_fields[] =
   5017 {
   5018     /* BC_DEC_MSG_MSB:0:15 */
   5019     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(375, 15, 0)
   5020 };
   5021 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_STS3r_fields[] =
   5022 {
   5023     /* BC_DEC_MSG_LSB:0:15 */
   5024     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(373, 15, 0)
   5025 };
   5026 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_STS4r_fields[] =
   5027 {
   5028     /* BC_DEC_MSG_LSB_READY:0:0 */
   5029     PHYMOD_SYMBOL_FIELD_ENCODE(374, 0, 0),
   5030     /* BC_DEC_MSG_MSB_READY:1:1 */
   5031     PHYMOD_SYMBOL_FIELD_ENCODE(376, 1, 1),
   5032     /* BC_DEC_MSG_TYPE_CNT_READY:2:2 */
   5033     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(378, 2, 2)
   5034 };
   5035 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_STS5r_fields[] =
   5036 {
   5037     /* BC_DEC_MSG_TYPE_CNT:0:3 */
   5038     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(377, 3, 0)
   5039 };
   5040 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_STS6r_fields[] =
   5041 {
   5042     /* BC_DEC_INTR:0:0 */
   5043     PHYMOD_SYMBOL_FIELD_ENCODE(357, 0, 0),
   5044     /* BC_DEC_INTR_LOCK:1:1 */
   5045     PHYMOD_SYMBOL_FIELD_ENCODE(362, 1, 1),
   5046     /* BC_DEC_INTR_OOL:2:2 */
   5047     PHYMOD_SYMBOL_FIELD_ENCODE(369, 2, 2),
   5048     /* BC_DEC_INTR_MSG_MSB_READY:3:3 */
   5049     PHYMOD_SYMBOL_FIELD_ENCODE(368, 3, 3),
   5050     /* BC_DEC_INTR_MSG_LSB_READY:4:4 */
   5051     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(367, 4, 4)
   5052 };
   5053 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_STS7r_fields[] =
   5054 {
   5055     /* PRBS_CHK_AUTO_DETECT_STATE:8:9 */
   5056     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1265, 9, 8)
   5057 };
   5058 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS0r_fields[] =
   5059 {
   5060     /* TLB_ERR_COUNT_HISTOGRAM_ERROR_OFFSET_0:0:15 */
   5061     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1817, 15, 0)
   5062 };
   5063 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS1r_fields[] =
   5064 {
   5065     /* TLB_ERR_COUNT_HISTOGRAM_ERROR_OFFSET_1:0:15 */
   5066     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1818, 15, 0)
   5067 };
   5068 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS2r_fields[] =
   5069 {
   5070     /* TLB_ERR_COUNT_HISTOGRAM_ERROR_OFFSET_2:0:15 */
   5071     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1819, 15, 0)
   5072 };
   5073 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS3r_fields[] =
   5074 {
   5075     /* TLB_ERR_COUNT_HISTOGRAM_ERROR_OFFSET_3:0:15 */
   5076     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1820, 15, 0)
   5077 };
   5078 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS4r_fields[] =
   5079 {
   5080     /* TLB_ERR_COUNT_HISTOGRAM_ERROR_OFFSET_4:0:15 */
   5081     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1821, 15, 0)
   5082 };
   5083 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS5r_fields[] =
   5084 {
   5085     /* TLB_ERR_COUNT_HISTOGRAM_ERROR_OFFSET_5:0:15 */
   5086     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1822, 15, 0)
   5087 };
   5088 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS6r_fields[] =
   5089 {
   5090     /* TLB_ERR_COUNT_HISTOGRAM_ERROR_OFFSET_6:0:15 */
   5091     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1823, 15, 0)
   5092 };
   5093 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS7r_fields[] =
   5094 {
   5095     /* TLB_ERR_COUNT_HISTOGRAM_ERROR_OFFSET_7:0:15 */
   5096     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1824, 15, 0)
   5097 };
   5098 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_C_NUM_ERRS_IN_FEC_FRAMES_STS_HIr_fields[] =
   5099 {
   5100     /* TLB_ERR_COUNT_ERROR_HI:0:3 */
   5101     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1815, 3, 0)
   5102 };
   5103 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_C_NUM_ERRS_IN_FEC_FRAMES_STS_LOr_fields[] =
   5104 {
   5105     /* TLB_ERR_COUNT_ERROR_LO:0:15 */
   5106     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1816, 15, 0)
   5107 };
   5108 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_C_TLB_RX_C_CFG0r_fields[] =
   5109 {
   5110     /* TLB_ERR_CLEAR_ERROR_ANALYZER_STATUS:1:1 */
   5111     PHYMOD_SYMBOL_FIELD_ENCODE(1813, 1, 1),
   5112     /* TLB_ERR_ERROR_COUNT_THRESH:2:5 */
   5113     PHYMOD_SYMBOL_FIELD_ENCODE(1825, 5, 2),
   5114     /* TLB_ERR_IGNORE_BACK_CHANNEL:6:6 */
   5115     PHYMOD_SYMBOL_FIELD_ENCODE(1830, 6, 6),
   5116     /* TLB_ERR_FEC_L_EN:8:8 */
   5117     PHYMOD_SYMBOL_FIELD_ENCODE(1826, 8, 8),
   5118     /* TLB_ERR_FEC_L_R_EN:9:9 */
   5119     PHYMOD_SYMBOL_FIELD_ENCODE(1827, 9, 9),
   5120     /* TLB_ERR_FEC_SIZE:10:15 */
   5121     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1828, 15, 10)
   5122 };
   5123 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_C_TLB_RX_C_CFG1r_fields[] =
   5124 {
   5125     /* TLB_ERR_HISTOGRAM_ERROR_THRESH:0:3 */
   5126     PHYMOD_SYMBOL_FIELD_ENCODE(1829, 3, 0),
   5127     /* TLB_ERR_CLEAR_STATUS_ON_READ:4:4 */
   5128     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1814, 4, 4)
   5129 };
   5130 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_DBG_PMD_RX_LOCK_STSr_fields[] =
   5131 {
   5132     /* DBG_PMD_RX_LOCK:0:0 */
   5133     PHYMOD_SYMBOL_FIELD_ENCODE(569, 0, 0),
   5134     /* DBG_PMD_RX_LOCK_CHANGE:1:1 */
   5135     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(570, 1, 1)
   5136 };
   5137 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_DIG_LPBK_CFGr_fields[] =
   5138 {
   5139     /* DIG_LPBK_EN:0:0 */
   5140     PHYMOD_SYMBOL_FIELD_ENCODE(602, 0, 0),
   5141     /* DIG_LPBK_PD_MODE:1:1 */
   5142     PHYMOD_SYMBOL_FIELD_ENCODE(607, 1, 1),
   5143     /* DIG_LPBK_PD_FLT_BYPASS:2:2 */
   5144     PHYMOD_SYMBOL_FIELD_ENCODE(605, 2, 2),
   5145     /* DIG_LPBK_PD_BIAS_EN:3:3 */
   5146     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(603, 3, 3)
   5147 };
   5148 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_DIG_LPBK_PD_STSr_fields[] =
   5149 {
   5150     /* DIG_LPBK_PD_LATE_IND:0:0 */
   5151     PHYMOD_SYMBOL_FIELD_ENCODE(606, 0, 0),
   5152     /* DIG_LPBK_PD_EARLY_IND:1:1 */
   5153     PHYMOD_SYMBOL_FIELD_ENCODE(604, 1, 1),
   5154     /* PRBS_CHK_AUTO_DETECT_LOCK:8:8 */
   5155     PHYMOD_SYMBOL_FIELD_ENCODE(1263, 8, 8),
   5156     /* PRBS_CHK_INV_AUTO_DETECT:9:9 */
   5157     PHYMOD_SYMBOL_FIELD_ENCODE(1278, 9, 9),
   5158     /* PRBS_CHK_MODE_SEL_AUTO_DETECT:10:12 */
   5159     PHYMOD_SYMBOL_FIELD_ENCODE(1284, 12, 10),
   5160     /* PRBS_CHK_MODE_SEL_MSB_AUTO_DETECT:13:13 */
   5161     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1286, 13, 13)
   5162 };
   5163 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_MAX_PRBS_BURST_ERR_LEN_STSr_fields[] =
   5164 {
   5165     /* MAX_PRBS_BURST_ERR_LENGTH_STATUS:0:5 */
   5166     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(968, 5, 0)
   5167 };
   5168 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_PMD_RX_LOCK_STSr_fields[] =
   5169 {
   5170     /* PMD_RX_LOCK:0:0 */
   5171     PHYMOD_SYMBOL_FIELD_ENCODE(1246, 0, 0),
   5172     /* PMD_RX_LOCK_CHANGE:1:1 */
   5173     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1247, 1, 1)
   5174 };
   5175 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_PRBS_BURST_ERR_LEN_STSr_fields[] =
   5176 {
   5177     /* PRBS_BURST_ERR_LENGTH_STATUS:0:5 */
   5178     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1259, 5, 0)
   5179 };
   5180 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_PRBS_CHK_BURST_ERR_CNT_STSr_fields[] =
   5181 {
   5182     /* PRBS_CHK_BURST_ERR_CNT:0:9 */
   5183     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1266, 9, 0)
   5184 };
   5185 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_PRBS_CHK_CFGr_fields[] =
   5186 {
   5187     /* PRBS_CHK_EN:0:0 */
   5188     PHYMOD_SYMBOL_FIELD_ENCODE(1269, 0, 0),
   5189     /* PRBS_CHK_MODE_SEL:1:3 */
   5190     PHYMOD_SYMBOL_FIELD_ENCODE(1283, 3, 1),
   5191     /* PRBS_CHK_INV:4:4 */
   5192     PHYMOD_SYMBOL_FIELD_ENCODE(1277, 4, 4),
   5193     /* PRBS_CHK_MODE:5:6 */
   5194     PHYMOD_SYMBOL_FIELD_ENCODE(1282, 6, 5),
   5195     /* PRBS_CHK_EN_AUTO_MODE:7:7 */
   5196     PHYMOD_SYMBOL_FIELD_ENCODE(1270, 7, 7),
   5197     /* PRBS_BURST_LEN_CHK_EN:8:8 */
   5198     PHYMOD_SYMBOL_FIELD_ENCODE(1260, 8, 8),
   5199     /* PRBS_CHK_ERR_CNT_BURST_MODE:9:9 */
   5200     PHYMOD_SYMBOL_FIELD_ENCODE(1273, 9, 9),
   5201     /* TRNSUM_ERROR_COUNT_EN:10:10 */
   5202     PHYMOD_SYMBOL_FIELD_ENCODE(1853, 10, 10),
   5203     /* PRBS_CHK_CLK_EN_FRC_ON:11:11 */
   5204     PHYMOD_SYMBOL_FIELD_ENCODE(1268, 11, 11),
   5205     /* PRBS_CHK_MODE_SEL_MSB:12:12 */
   5206     PHYMOD_SYMBOL_FIELD_ENCODE(1285, 12, 12),
   5207     /* PRBS_CHK_BURST_ERR_CNT_EN:15:15 */
   5208     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1267, 15, 15)
   5209 };
   5210 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_PRBS_CHK_CNT_CFGr_fields[] =
   5211 {
   5212     /* PRBS_CHK_LOCK_CNT:0:4 */
   5213     PHYMOD_SYMBOL_FIELD_ENCODE(1280, 4, 0),
   5214     /* PRBS_CHK_OOL_CNT:8:12 */
   5215     PHYMOD_SYMBOL_FIELD_ENCODE(1287, 12, 8),
   5216     /* RX_TRN_ACTIVE_AUTO_MODE_EN:15:15 */
   5217     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1706, 15, 15)
   5218 };
   5219 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_PRBS_CHK_EN_TMR_CTLr_fields[] =
   5220 {
   5221     /* PRBS_CHK_EN_TIMER_MODE:0:1 */
   5222     PHYMOD_SYMBOL_FIELD_ENCODE(1272, 1, 0),
   5223     /* PRBS_CHK_EN_TIMEOUT:8:12 */
   5224     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1271, 12, 8)
   5225 };
   5226 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_PRBS_CHK_ERR_CNT_LSB_STSr_fields[] =
   5227 {
   5228     /* PRBS_CHK_ERR_CNT_LSB:0:15 */
   5229     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1274, 15, 0)
   5230 };
   5231 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_PRBS_CHK_ERR_CNT_MSB_STSr_fields[] =
   5232 {
   5233     /* PRBS_CHK_ERR_CNT_MSB:0:14 */
   5234     PHYMOD_SYMBOL_FIELD_ENCODE(1275, 14, 0),
   5235     /* PRBS_CHK_LOCK_LOST_LH:15:15 */
   5236     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1281, 15, 15)
   5237 };
   5238 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_PRBS_CHK_LOCK_STSr_fields[] =
   5239 {
   5240     /* PRBS_CHK_LOCK:0:0 */
   5241     PHYMOD_SYMBOL_FIELD_ENCODE(1279, 0, 0),
   5242     /* PRBS_CHK_ERR_CNT_NO_CLR:1:15 */
   5243     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1276, 15, 1)
   5244 };
   5245 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_TLB_RX_MISC_CFGr_fields[] =
   5246 {
   5247     /* RX_PMD_DP_INVERT:0:0 */
   5248     PHYMOD_SYMBOL_FIELD_ENCODE(1696, 0, 0),
   5249     /* RX_DESCRAMBLER_EN:1:1 */
   5250     PHYMOD_SYMBOL_FIELD_ENCODE(1608, 1, 1),
   5251     /* DBG_MASK_DIG_LPBK_EN:2:2 */
   5252     PHYMOD_SYMBOL_FIELD_ENCODE(567, 2, 2),
   5253     /* TLB_RX_DIFF_DEC_EN:3:3 */
   5254     PHYMOD_SYMBOL_FIELD_ENCODE(1831, 3, 3),
   5255     /* TLB_RX_NRZ_LL_MODE_EN:4:4 */
   5256     PHYMOD_SYMBOL_FIELD_ENCODE(1832, 4, 4),
   5257     /* PAM4_GRAY_DEC_EN:5:5 */
   5258     PHYMOD_SYMBOL_FIELD_ENCODE(1168, 5, 5),
   5259     /* PAM4_DECODER_EN:6:6 */
   5260     PHYMOD_SYMBOL_FIELD_ENCODE(1167, 6, 6),
   5261     /* PAM4_RX_SYMBOL_BIT_SWAP:7:7 */
   5262     PHYMOD_SYMBOL_FIELD_ENCODE(1175, 7, 7),
   5263     /* PRBS_CHK_AUTO_DETECT_CNT:8:12 */
   5264     PHYMOD_SYMBOL_FIELD_ENCODE(1261, 12, 8),
   5265     /* PRBS_CHK_AUTO_DETECT_EN:14:14 */
   5266     PHYMOD_SYMBOL_FIELD_ENCODE(1262, 14, 14),
   5267     /* PRBS_CHK_AUTO_DETECT_RELOCK_EN:15:15 */
   5268     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1264, 15, 15)
   5269 };
   5270 static uint32_t BCMI_TSCBH_XGXS_TLB_RX_UC_PMD_RX_LOCK_STSr_fields[] =
   5271 {
   5272     /* UC_PMD_RX_LOCK:0:0 */
   5273     PHYMOD_SYMBOL_FIELD_ENCODE(2059, 0, 0),
   5274     /* UC_PMD_RX_LOCK_CHANGE:1:1 */
   5275     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2060, 1, 1)
   5276 };
   5277 static uint32_t BCMI_TSCBH_XGXS_TLB_TX_PATGEN_CFGr_fields[] =
   5278 {
   5279     /* PATT_GEN_EN:0:0 */
   5280     PHYMOD_SYMBOL_FIELD_ENCODE(1179, 0, 0),
   5281     /* PAM4_TX_LINEARITY_PATT_EN:6:6 */
   5282     PHYMOD_SYMBOL_FIELD_ENCODE(1177, 6, 6),
   5283     /* PAM4_TX_JP03B_PATT_EN:7:7 */
   5284     PHYMOD_SYMBOL_FIELD_ENCODE(1176, 7, 7),
   5285     /* PATT_GEN_STOP_POS:8:11 */
   5286     PHYMOD_SYMBOL_FIELD_ENCODE(1196, 11, 8),
   5287     /* PATT_GEN_START_POS:12:15 */
   5288     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1195, 15, 12)
   5289 };
   5290 static uint32_t BCMI_TSCBH_XGXS_TLB_TX_PRBS_GEN_CFGr_fields[] =
   5291 {
   5292     /* PRBS_GEN_EN:0:0 */
   5293     PHYMOD_SYMBOL_FIELD_ENCODE(1288, 0, 0),
   5294     /* PRBS_GEN_MODE_SEL:1:3 */
   5295     PHYMOD_SYMBOL_FIELD_ENCODE(1291, 3, 1),
   5296     /* PRBS_GEN_INV:4:4 */
   5297     PHYMOD_SYMBOL_FIELD_ENCODE(1290, 4, 4),
   5298     /* PRBS_GEN_ERR_INS:5:5 */
   5299     PHYMOD_SYMBOL_FIELD_ENCODE(1289, 5, 5),
   5300     /* PRBS_GEN_MODE_SEL_MSB:12:12 */
   5301     PHYMOD_SYMBOL_FIELD_ENCODE(1292, 12, 12),
   5302     /* PRBS_GEN_PAUSE_STROBE:15:15 */
   5303     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1293, 15, 15)
   5304 };
   5305 static uint32_t BCMI_TSCBH_XGXS_TLB_TX_RMT_LPBK_CFGr_fields[] =
   5306 {
   5307     /* RMT_LPBK_EN:0:0 */
   5308     PHYMOD_SYMBOL_FIELD_ENCODE(1357, 0, 0),
   5309     /* RMT_LPBK_PD_MODE:1:1 */
   5310     PHYMOD_SYMBOL_FIELD_ENCODE(1361, 1, 1),
   5311     /* RMT_LPBK_PD_FRC_ON:2:2 */
   5312     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1359, 2, 2)
   5313 };
   5314 static uint32_t BCMI_TSCBH_XGXS_TLB_TX_RMT_LPBK_PD_STSr_fields[] =
   5315 {
   5316     /* RMT_LPBK_PD_LATE_IND:0:0 */
   5317     PHYMOD_SYMBOL_FIELD_ENCODE(1360, 0, 0),
   5318     /* RMT_LPBK_PD_EARLY_IND:1:1 */
   5319     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1358, 1, 1)
   5320 };
   5321 static uint32_t BCMI_TSCBH_XGXS_TLB_TX_TLB_TX_BC_ENC_CFG0r_fields[] =
   5322 {
   5323     /* BC_ENC_EN:0:0 */
   5324     PHYMOD_SYMBOL_FIELD_ENCODE(388, 0, 0),
   5325     /* BC_ENC_UPDATE:1:1 */
   5326     PHYMOD_SYMBOL_FIELD_ENCODE(391, 1, 1),
   5327     /* BC_ENC_ERR_INS_EN:2:2 */
   5328     PHYMOD_SYMBOL_FIELD_ENCODE(389, 2, 2),
   5329     /* BC_ENC_FRM_LEN_SEL:8:10 */
   5330     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(390, 10, 8)
   5331 };
   5332 static uint32_t BCMI_TSCBH_XGXS_TLB_TX_TLB_TX_BC_ENC_CFG1r_fields[] =
   5333 {
   5334     /* BC_ENC_DATA_LSB:0:15 */
   5335     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(385, 15, 0)
   5336 };
   5337 static uint32_t BCMI_TSCBH_XGXS_TLB_TX_TLB_TX_BC_ENC_CFG2r_fields[] =
   5338 {
   5339     /* BC_ENC_DATA_MSB:0:15 */
   5340     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(386, 15, 0)
   5341 };
   5342 static uint32_t BCMI_TSCBH_XGXS_TLB_TX_TLB_TX_BC_ENC_STS0r_fields[] =
   5343 {
   5344     /* BC_ENC_DATA_SENT:0:0 */
   5345     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(387, 0, 0)
   5346 };
   5347 static uint32_t BCMI_TSCBH_XGXS_TLB_TX_TLB_TX_MISC_CFGr_fields[] =
   5348 {
   5349     /* TX_PMD_DP_INVERT:0:0 */
   5350     PHYMOD_SYMBOL_FIELD_ENCODE(2029, 0, 0),
   5351     /* TX_PCS_NATIVE_ANA_FRMT_EN:1:1 */
   5352     PHYMOD_SYMBOL_FIELD_ENCODE(1980, 1, 1),
   5353     /* TX_MUX_SEL_ORDER:2:2 */
   5354     PHYMOD_SYMBOL_FIELD_ENCODE(1970, 2, 2),
   5355     /* TLB_TX_DIFF_ENC_EN:3:3 */
   5356     PHYMOD_SYMBOL_FIELD_ENCODE(1833, 3, 3),
   5357     /* TX_TRN_ACTIVE_AUTO_MODE_EN:4:4 */
   5358     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2037, 4, 4)
   5359 };
   5360 static uint32_t BCMI_TSCBH_XGXS_TLB_TX_TLB_TX_PAM4_CFG0r_fields[] =
   5361 {
   5362     /* PAM4_GRAY_ENC_EN:0:0 */
   5363     PHYMOD_SYMBOL_FIELD_ENCODE(1169, 0, 0),
   5364     /* PAM4_PRECODER_EN:1:1 */
   5365     PHYMOD_SYMBOL_FIELD_ENCODE(1174, 1, 1),
   5366     /* TX_SCRAMBLER_EN:2:2 */
   5367     PHYMOD_SYMBOL_FIELD_ENCODE(2035, 2, 2),
   5368     /* PAM4_TX_SYMBOL_BIT_SWAP:3:3 */
   5369     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1178, 3, 3)
   5370 };
   5371 static uint32_t BCMI_TSCBH_XGXS_TXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr_fields[] =
   5372 {
   5373     /* TX_OSR_MODE_PIN:0:3 */
   5374     PHYMOD_SYMBOL_FIELD_ENCODE(1975, 3, 0),
   5375     /* TX_PAM4_MODE_PIN:4:6 */
   5376     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1979, 6, 4)
   5377 };
   5378 static uint32_t BCMI_TSCBH_XGXS_TXCOM_CTL2r_fields[] =
   5379 {
   5380     /* TXCOM_LINKTRN_MAX_WAIT_TIMER_PERIOD:0:15 */
   5381     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1909, 15, 0)
   5382 };
   5383 static uint32_t BCMI_TSCBH_XGXS_TXCOM_CTL3r_fields[] =
   5384 {
   5385     /* TXCOM_LINKTRN_WAIT_CNTR_LIMIT:0:9 */
   5386     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1911, 9, 0)
   5387 };
   5388 static uint32_t BCMI_TSCBH_XGXS_TXCOM_CTL4r_fields[] =
   5389 {
   5390     /* TXCOM_LINKTRN_MAX_WAIT_TIMER_PERIOD_2NDSET:0:15 */
   5391     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1910, 15, 0)
   5392 };
   5393 static uint32_t BCMI_TSCBH_XGXS_TXCOM_CTL5r_fields[] =
   5394 {
   5395     /* TXCOM_LINKTRN_WAIT_CNTR_LIMIT_2NDSET:0:9 */
   5396     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1912, 9, 0)
   5397 };
   5398 static uint32_t BCMI_TSCBH_XGXS_TXCOM_LN_CLK_RST_N_PWRDWN_CTLr_fields[] =
   5399 {
   5400     /* TX_LN_DP_S_RSTB:0:0 */
   5401     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1966, 0, 0)
   5402 };
   5403 static uint32_t BCMI_TSCBH_XGXS_TXCOM_LN_DP_RST_ST_STSr_fields[] =
   5404 {
   5405     /* TX_LANE_DP_RESET_STATE:0:2 */
   5406     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1960, 2, 0)
   5407 };
   5408 static uint32_t BCMI_TSCBH_XGXS_TXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields[] =
   5409 {
   5410     /* PMD_LN_TX_H_RSTB_PKILL:0:0 */
   5411     PHYMOD_SYMBOL_FIELD_ENCODE(1241, 0, 0),
   5412     /* PMD_LN_TX_DP_H_RSTB_PKILL:1:1 */
   5413     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1239, 1, 1)
   5414 };
   5415 static uint32_t BCMI_TSCBH_XGXS_TXCOM_LN_RST_OCC_CTLr_fields[] =
   5416 {
   5417     /* TX_LANE_REG_RESET_OCCURRED:0:0 */
   5418     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1961, 0, 0)
   5419 };
   5420 static uint32_t BCMI_TSCBH_XGXS_TXCOM_LN_S_RSTB_CTLr_fields[] =
   5421 {
   5422     /* TX_LN_S_RSTB:0:0 */
   5423     PHYMOD_SYMBOL_FIELD_ENCODE(1967, 0, 0),
   5424     /* TX_HW_FW_HANDSHAKE_DISABLE:1:1 */
   5425     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1951, 1, 1)
   5426 };
   5427 static uint32_t BCMI_TSCBH_XGXS_TXCOM_MCST_MASK_CTLr_fields[] =
   5428 {
   5429     /* TX_MULTICAST_MASK_CONTROL:0:0 */
   5430     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1968, 0, 0)
   5431 };
   5432 static uint32_t BCMI_TSCBH_XGXS_TXCOM_OSR_MODE_CTLr_fields[] =
   5433 {
   5434     /* TX_OSR_MODE_FRC_VAL:0:3 */
   5435     PHYMOD_SYMBOL_FIELD_ENCODE(1974, 3, 0),
   5436     /* TX_PAM4_MODE_FRC_VAL:4:6 */
   5437     PHYMOD_SYMBOL_FIELD_ENCODE(1978, 6, 4),
   5438     /* TX_PAM4_MODE_FRC:14:14 */
   5439     PHYMOD_SYMBOL_FIELD_ENCODE(1977, 14, 14),
   5440     /* TX_OSR_MODE_FRC:15:15 */
   5441     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1973, 15, 15)
   5442 };
   5443 static uint32_t BCMI_TSCBH_XGXS_TXCOM_OSR_MODE_STS_MC_MASKr_fields[] =
   5444 {
   5445     /* TX_OSR_MODE:0:3 */
   5446     PHYMOD_SYMBOL_FIELD_ENCODE(1972, 3, 0),
   5447     /* TX_PAM4_MODE:4:6 */
   5448     PHYMOD_SYMBOL_FIELD_ENCODE(1976, 6, 4),
   5449     /* TX_MULTICAST_MASK_CONTROL_STATUS:15:15 */
   5450     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1969, 15, 15)
   5451 };
   5452 static uint32_t BCMI_TSCBH_XGXS_TXCOM_PLL_SEL_CTLr_fields[] =
   5453 {
   5454     /* TX_PLL_SELECT:0:0 */
   5455     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2028, 0, 0)
   5456 };
   5457 static uint32_t BCMI_TSCBH_XGXS_TXCOM_UC_ACK_LN_CTLr_fields[] =
   5458 {
   5459     /* TX_UC_ACK_LANE_CFG_DONE:0:0 */
   5460     PHYMOD_SYMBOL_FIELD_ENCODE(2038, 0, 0),
   5461     /* TX_UC_ACK_LANE_DP_RESET:1:1 */
   5462     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2039, 1, 1)
   5463 };
   5464 static uint32_t BCMI_TSCBH_XGXS_TXFIR_MISC_CTL0r_fields[] =
   5465 {
   5466     /* SDK_TX_DISABLE:0:0 */
   5467     PHYMOD_SYMBOL_FIELD_ENCODE(1718, 0, 0),
   5468     /* TX_DISABLE_OUTPUT_SEL:2:3 */
   5469     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1942, 3, 2)
   5470 };
   5471 static uint32_t BCMI_TSCBH_XGXS_TXFIR_MISC_STS0r_fields[] =
   5472 {
   5473     /* TX_DISABLE_STATUS:0:0 */
   5474     PHYMOD_SYMBOL_FIELD_ENCODE(1943, 0, 0),
   5475     /* TX_ELEC_IDLE_STATUS:1:1 */
   5476     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1948, 1, 1)
   5477 };
   5478 static uint32_t BCMI_TSCBH_XGXS_TXFIR_TAP_CTL0r_fields[] =
   5479 {
   5480     /* TXFIR_TAP0_COEFF:0:8 */
   5481     PHYMOD_SYMBOL_FIELD_ENCODE(1920, 8, 0),
   5482     /* TXFIR_NRZ_TAP_RANGE_SEL:10:10 */
   5483     PHYMOD_SYMBOL_FIELD_ENCODE(1919, 10, 10),
   5484     /* TXFIR_TAP_LOAD:11:11 */
   5485     PHYMOD_SYMBOL_FIELD_ENCODE(1933, 11, 11),
   5486     /* TXFIR_TAP_EN:12:13 */
   5487     PHYMOD_SYMBOL_FIELD_ENCODE(1932, 13, 12),
   5488     /* TXFIR_TEST_DATA_EN:15:15 */
   5489     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1934, 15, 15)
   5490 };
   5491 static uint32_t BCMI_TSCBH_XGXS_TXFIR_TAP_CTL1r_fields[] =
   5492 {
   5493     /* TXFIR_TAP1_COEFF:0:8 */
   5494     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1923, 8, 0)
   5495 };
   5496 static uint32_t BCMI_TSCBH_XGXS_TXFIR_TAP_CTL10r_fields[] =
   5497 {
   5498     /* TXFIR_TAP10_COEFF:0:6 */
   5499     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1921, 6, 0)
   5500 };
   5501 static uint32_t BCMI_TSCBH_XGXS_TXFIR_TAP_CTL11r_fields[] =
   5502 {
   5503     /* TXFIR_TAP11_COEFF:0:6 */
   5504     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1922, 6, 0)
   5505 };
   5506 static uint32_t BCMI_TSCBH_XGXS_TXFIR_TAP_CTL2r_fields[] =
   5507 {
   5508     /* TXFIR_TAP2_COEFF:0:8 */
   5509     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1924, 8, 0)
   5510 };
   5511 static uint32_t BCMI_TSCBH_XGXS_TXFIR_TAP_CTL3r_fields[] =
   5512 {
   5513     /* TXFIR_TAP3_COEFF:0:8 */
   5514     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1925, 8, 0)
   5515 };
   5516 static uint32_t BCMI_TSCBH_XGXS_TXFIR_TAP_CTL4r_fields[] =
   5517 {
   5518     /* TXFIR_TAP4_COEFF:0:8 */
   5519     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1926, 8, 0)
   5520 };
   5521 static uint32_t BCMI_TSCBH_XGXS_TXFIR_TAP_CTL5r_fields[] =
   5522 {
   5523     /* TXFIR_TAP5_COEFF:0:8 */
   5524     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1927, 8, 0)
   5525 };
   5526 static uint32_t BCMI_TSCBH_XGXS_TXFIR_TAP_CTL6r_fields[] =
   5527 {
   5528     /* TXFIR_TAP6_COEFF:0:6 */
   5529     PHYMOD_SYMBOL_FIELD_ENCODE(1928, 6, 0),
   5530     /* TXFIR_DC_ADJUST:8:14 */
   5531     PHYMOD_SYMBOL_FIELD_ENCODE(1917, 14, 8),
   5532     /* TXFIR_LEVEL_SHIFT_MODE_EN:15:15 */
   5533     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1918, 15, 15)
   5534 };
   5535 static uint32_t BCMI_TSCBH_XGXS_TXFIR_TAP_CTL7r_fields[] =
   5536 {
   5537     /* TXFIR_TAP7_COEFF:0:6 */
   5538     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1929, 6, 0)
   5539 };
   5540 static uint32_t BCMI_TSCBH_XGXS_TXFIR_TAP_CTL8r_fields[] =
   5541 {
   5542     /* TXFIR_TAP8_COEFF:0:6 */
   5543     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1930, 6, 0)
   5544 };
   5545 static uint32_t BCMI_TSCBH_XGXS_TXFIR_TAP_CTL9r_fields[] =
   5546 {
   5547     /* TXFIR_TAP9_COEFF:0:6 */
   5548     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1931, 6, 0)
   5549 };
   5550 static uint32_t BCMI_TSCBH_XGXS_TXFIR_UC_CTL0r_fields[] =
   5551 {
   5552     /* MICRO_TX_DISABLE:0:0 */
   5553     PHYMOD_SYMBOL_FIELD_ENCODE(1125, 0, 0),
   5554     /* TX_DISABLE_TRIGGER:1:1 */
   5555     PHYMOD_SYMBOL_FIELD_ENCODE(1945, 1, 1),
   5556     /* DP_RESET_TX_DISABLE_DIS:2:2 */
   5557     PHYMOD_SYMBOL_FIELD_ENCODE(614, 2, 2),
   5558     /* PMD_TX_DISABLE_PKILL:3:3 */
   5559     PHYMOD_SYMBOL_FIELD_ENCODE(1251, 3, 3),
   5560     /* TX_DISABLE_TIMER_CTRL:4:9 */
   5561     PHYMOD_SYMBOL_FIELD_ENCODE(1944, 9, 4),
   5562     /* TX_EEE_QUIET_EN:14:14 */
   5563     PHYMOD_SYMBOL_FIELD_ENCODE(1947, 14, 14),
   5564     /* TX_EEE_ALERT_EN:15:15 */
   5565     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1946, 15, 15)
   5566 };
   5567 static uint32_t BCMI_TSCBH_XGXS_TX_AFE_RST_PWRDN_OSR_MODE_PIN_STSr_fields[] =
   5568 {
   5569     /* AFE_TX_PWRDN:0:0 */
   5570     PHYMOD_SYMBOL_FIELD_ENCODE(23, 0, 0),
   5571     /* AFE_TX_RESET:1:1 */
   5572     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(26, 1, 1)
   5573 };
   5574 static uint32_t BCMI_TSCBH_XGXS_TX_CLK_N_RST_DBG_CTLr_fields[] =
   5575 {
   5576     /* LN_TX_S_CLKGATE_FRC_ON:0:0 */
   5577     PHYMOD_SYMBOL_FIELD_ENCODE(941, 0, 0),
   5578     /* LN_TX_S_COMCLK_SEL:1:1 */
   5579     PHYMOD_SYMBOL_FIELD_ENCODE(943, 1, 1),
   5580     /* LN_TX_S_COMCLK_FRC_ON:2:2 */
   5581     PHYMOD_SYMBOL_FIELD_ENCODE(942, 2, 2),
   5582     /* PMD_TX_CLK_VLD_FRC:3:3 */
   5583     PHYMOD_SYMBOL_FIELD_ENCODE(1249, 3, 3),
   5584     /* PMD_TX_CLK_VLD_FRC_VAL:4:4 */
   5585     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1250, 4, 4)
   5586 };
   5587 static uint32_t BCMI_TSCBH_XGXS_TX_CLK_N_RST_MISC_CTLr_fields[] =
   5588 {
   5589     /* TX_PI_LOOP_FILTER_STABLE:0:0 */
   5590     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2008, 0, 0)
   5591 };
   5592 static uint32_t BCMI_TSCBH_XGXS_TX_LN_AFE_RST_PWRDWN_CTL_CTLr_fields[] =
   5593 {
   5594     /* AFE_TX_PWRDN_FRC:0:0 */
   5595     PHYMOD_SYMBOL_FIELD_ENCODE(24, 0, 0),
   5596     /* AFE_TX_PWRDN_FRC_VAL:1:1 */
   5597     PHYMOD_SYMBOL_FIELD_ENCODE(25, 1, 1),
   5598     /* AFE_TX_RESET_FRC:2:2 */
   5599     PHYMOD_SYMBOL_FIELD_ENCODE(28, 2, 2),
   5600     /* AFE_TX_RESET_FRC_VAL:3:3 */
   5601     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(29, 3, 3)
   5602 };
   5603 static uint32_t BCMI_TSCBH_XGXS_TX_LN_CLK_RST_N_PWRDWN_CTLr_fields[] =
   5604 {
   5605     /* LN_TX_S_PWRDN:0:0 */
   5606     PHYMOD_SYMBOL_FIELD_ENCODE(944, 0, 0),
   5607     /* AFE_TX_RESET_DEASSERT:15:15 */
   5608     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(27, 15, 15)
   5609 };
   5610 static uint32_t BCMI_TSCBH_XGXS_TX_LN_DBG_RST_CTLr_fields[] =
   5611 {
   5612     /* LN_TX_S_RSTB:0:0 */
   5613     PHYMOD_SYMBOL_FIELD_ENCODE(945, 0, 0),
   5614     /* LN_TX_DP_S_RSTB:1:1 */
   5615     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(939, 1, 1)
   5616 };
   5617 static uint32_t BCMI_TSCBH_XGXS_TX_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields[] =
   5618 {
   5619     /* PMD_LN_TX_H_PWRDN_PKILL:0:0 */
   5620     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1240, 0, 0)
   5621 };
   5622 static uint32_t BCMI_TSCBH_XGXS_TX_PI_B_CTL_12r_fields[] =
   5623 {
   5624     /* TX_PI_JITTER_FILTER_EN_S1:0:0 */
   5625     PHYMOD_SYMBOL_FIELD_ENCODE(2004, 0, 0),
   5626     /* TX_PI_FREQ_OVERRIDE_EN_S1:1:1 */
   5627     PHYMOD_SYMBOL_FIELD_ENCODE(1991, 1, 1),
   5628     /* TX_PI_FIRST_ORDER_BWSEL_INTEG_S1:8:10 */
   5629     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1989, 10, 8)
   5630 };
   5631 static uint32_t BCMI_TSCBH_XGXS_TX_PI_CTL0r_fields[] =
   5632 {
   5633     /* TX_PI_EN:0:0 */
   5634     PHYMOD_SYMBOL_FIELD_ENCODE(1981, 0, 0),
   5635     /* TX_PI_JITTER_FILTER_EN:1:1 */
   5636     PHYMOD_SYMBOL_FIELD_ENCODE(2003, 1, 1),
   5637     /* TX_PI_EXT_CTRL_EN:2:2 */
   5638     PHYMOD_SYMBOL_FIELD_ENCODE(1982, 2, 2),
   5639     /* TX_PI_FREQ_OVERRIDE_EN:3:3 */
   5640     PHYMOD_SYMBOL_FIELD_ENCODE(1990, 3, 3),
   5641     /* TX_PI_SJ_GEN_EN:4:4 */
   5642     PHYMOD_SYMBOL_FIELD_ENCODE(2026, 4, 4),
   5643     /* TX_PI_SSC_GEN_EN:5:5 */
   5644     PHYMOD_SYMBOL_FIELD_ENCODE(2027, 5, 5),
   5645     /* TX_PI_JIT_SSC_FREQ_MODE:6:6 */
   5646     PHYMOD_SYMBOL_FIELD_ENCODE(2007, 6, 6),
   5647     /* TX_PI_FIRST_ORDER_BWSEL_INTEG:7:9 */
   5648     PHYMOD_SYMBOL_FIELD_ENCODE(1988, 9, 7),
   5649     /* TX_PI_SECOND_ORDER_BWSEL_INTEG:10:11 */
   5650     PHYMOD_SYMBOL_FIELD_ENCODE(2024, 11, 10),
   5651     /* TX_PI_EXT_PHASE_BWSEL_INTEG:12:14 */
   5652     PHYMOD_SYMBOL_FIELD_ENCODE(1984, 14, 12),
   5653     /* TX_PI_SECOND_ORDER_LOOP_EN:15:15 */
   5654     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2025, 15, 15)
   5655 };
   5656 static uint32_t BCMI_TSCBH_XGXS_TX_PI_CTL1r_fields[] =
   5657 {
   5658     /* TX_PI_FREQ_OVERRIDE_VAL:0:14 */
   5659     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1992, 14, 0)
   5660 };
   5661 static uint32_t BCMI_TSCBH_XGXS_TX_PI_CTL2r_fields[] =
   5662 {
   5663     /* TX_PI_JIT_FREQ_IDX:0:5 */
   5664     PHYMOD_SYMBOL_FIELD_ENCODE(2006, 5, 0),
   5665     /* TX_PI_JIT_AMP:8:13 */
   5666     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2005, 13, 8)
   5667 };
   5668 static uint32_t BCMI_TSCBH_XGXS_TX_PI_CTL3r_fields[] =
   5669 {
   5670     /* TX_PI_PHASE_OVERRIDE:0:0 */
   5671     PHYMOD_SYMBOL_FIELD_ENCODE(2016, 0, 0),
   5672     /* TX_PI_PHASE_STROBE:1:1 */
   5673     PHYMOD_SYMBOL_FIELD_ENCODE(2019, 1, 1),
   5674     /* TX_PI_PHASE_STEP_DIR:2:2 */
   5675     PHYMOD_SYMBOL_FIELD_ENCODE(2017, 2, 2),
   5676     /* TX_PI_PHASE_INVERT:4:4 */
   5677     PHYMOD_SYMBOL_FIELD_ENCODE(2015, 4, 4),
   5678     /* TX_PI_PHASE_STEP_NUM:8:11 */
   5679     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2018, 11, 8)
   5680 };
   5681 static uint32_t BCMI_TSCBH_XGXS_TX_PI_CTL4r_fields[] =
   5682 {
   5683     /* TX_PI_FRZ_FRC:0:0 */
   5684     PHYMOD_SYMBOL_FIELD_ENCODE(1993, 0, 0),
   5685     /* TX_PI_FRZ_FRC_VAL:1:1 */
   5686     PHYMOD_SYMBOL_FIELD_ENCODE(1994, 1, 1),
   5687     /* TX_PI_FRZ_MODE:2:2 */
   5688     PHYMOD_SYMBOL_FIELD_ENCODE(1995, 2, 2),
   5689     /* TX_PI_RESET_CODE_DBG:3:3 */
   5690     PHYMOD_SYMBOL_FIELD_ENCODE(2022, 3, 3),
   5691     /* TX_PI_FRZ_MODE_S1:4:4 */
   5692     PHYMOD_SYMBOL_FIELD_ENCODE(1996, 4, 4),
   5693     /* TX_PI_SAMPLER_MAX_CNT:8:11 */
   5694     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2023, 11, 8)
   5695 };
   5696 static uint32_t BCMI_TSCBH_XGXS_TX_PI_CTL5r_fields[] =
   5697 {
   5698     /* TX_PI_HS_FIFO_PHSERR_INVERT:1:1 */
   5699     PHYMOD_SYMBOL_FIELD_ENCODE(1998, 1, 1),
   5700     /* TX_PI_REPEATER_MODE_EN:2:2 */
   5701     PHYMOD_SYMBOL_FIELD_ENCODE(2021, 2, 2),
   5702     /* TX_PI_EXT_PD_SEL:3:3 */
   5703     PHYMOD_SYMBOL_FIELD_ENCODE(1983, 3, 3),
   5704     /* TX_PI_HS_FIFO_PHSERR_SEL:4:4 */
   5705     PHYMOD_SYMBOL_FIELD_ENCODE(1999, 4, 4),
   5706     /* TX_PI_EXT_PHASE_STEP_CNT_INVERT:5:5 */
   5707     PHYMOD_SYMBOL_FIELD_ENCODE(1986, 5, 5),
   5708     /* TX_PI_EXT_PHASE_STEP_CNT_SEL:6:6 */
   5709     PHYMOD_SYMBOL_FIELD_ENCODE(1987, 6, 6),
   5710     /* TX_PI_EXT_PHASE_STEP_CNT_FULL_BYPASS:7:7 */
   5711     PHYMOD_SYMBOL_FIELD_ENCODE(1985, 7, 7),
   5712     /* AFE_TX_FIFO_RESETB:8:8 */
   5713     PHYMOD_SYMBOL_FIELD_ENCODE(21, 8, 8),
   5714     /* AFE_TX_FIFO_RESETB_FRC:9:9 */
   5715     PHYMOD_SYMBOL_FIELD_ENCODE(22, 9, 9),
   5716     /* TX_PI_PD_BYPASS_FLT:10:10 */
   5717     PHYMOD_SYMBOL_FIELD_ENCODE(2010, 10, 10),
   5718     /* TX_PI_PD_BYPASS_VCO:11:11 */
   5719     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2011, 11, 11)
   5720 };
   5721 static uint32_t BCMI_TSCBH_XGXS_TX_PI_STS0r_fields[] =
   5722 {
   5723     /* TX_PI_PHASE_CNTR:0:7 */
   5724     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2012, 7, 0)
   5725 };
   5726 static uint32_t BCMI_TSCBH_XGXS_TX_PI_STS1r_fields[] =
   5727 {
   5728     /* TX_PI_INTEG1_REG:0:13 */
   5729     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2000, 13, 0)
   5730 };
   5731 static uint32_t BCMI_TSCBH_XGXS_TX_PI_STS2r_fields[] =
   5732 {
   5733     /* TX_PI_INTEG2_REG:0:14 */
   5734     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2001, 14, 0)
   5735 };
   5736 static uint32_t BCMI_TSCBH_XGXS_TX_PI_STS3r_fields[] =
   5737 {
   5738     /* TX_PI_PHASE_ERR:0:5 */
   5739     PHYMOD_SYMBOL_FIELD_ENCODE(2013, 5, 0),
   5740     /* TX_PI_PHASE_ERR_S1:8:13 */
   5741     PHYMOD_SYMBOL_FIELD_ENCODE(2014, 13, 8),
   5742     /* TX_PI_PHASE_SUM_CAPTURE_RESYNC_LH:15:15 */
   5743     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2020, 15, 15)
   5744 };
   5745 static uint32_t BCMI_TSCBH_XGXS_TX_PI_STS4r_fields[] =
   5746 {
   5747     /* TX_PI_HS_FIFO_PHSERR:0:0 */
   5748     PHYMOD_SYMBOL_FIELD_ENCODE(1997, 0, 0),
   5749     /* ST_AFE_TX_FIFO_RESETB:1:1 */
   5750     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1755, 1, 1)
   5751 };
   5752 static uint32_t BCMI_TSCBH_XGXS_TX_PI_STS5r_fields[] =
   5753 {
   5754     /* TX_PI_INTEG2_REG_S1:0:14 */
   5755     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2002, 14, 0)
   5756 };
   5757 static uint32_t BCMI_TSCBH_XGXS_TX_PI_TX_FIFO_OVFB_STSr_fields[] =
   5758 {
   5759     /* TX_FIFO_OVFB:0:0 */
   5760     PHYMOD_SYMBOL_FIELD_ENCODE(1949, 0, 0),
   5761     /* TX_FIFO_OVFB_FALL_EDGE_LH:1:1 */
   5762     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1950, 1, 1)
   5763 };
   5764 static uint32_t BCMI_TSCBH_XGXS_TX_PMD_LN_MODE_STSr_fields[] =
   5765 {
   5766     /* PMD_TX_LANE_MODE:0:15 */
   5767     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1252, 15, 0)
   5768 };
   5769 static uint32_t BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_ADJ_0_1r_fields[] =
   5770 {
   5771     /* GLAS_TPMA_CAPTURE_ADJ_0:0:7 */
   5772     PHYMOD_SYMBOL_FIELD_ENCODE(743, 7, 0),
   5773     /* GLAS_TPMA_CAPTURE_ADJ_1:8:15 */
   5774     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(744, 15, 8)
   5775 };
   5776 static uint32_t BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_ADJ_2_3r_fields[] =
   5777 {
   5778     /* GLAS_TPMA_CAPTURE_ADJ_2:0:7 */
   5779     PHYMOD_SYMBOL_FIELD_ENCODE(745, 7, 0),
   5780     /* GLAS_TPMA_CAPTURE_ADJ_3:8:15 */
   5781     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(746, 15, 8)
   5782 };
   5783 static uint32_t BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_ADJ_4_5r_fields[] =
   5784 {
   5785     /* GLAS_TPMA_CAPTURE_ADJ_4:0:7 */
   5786     PHYMOD_SYMBOL_FIELD_ENCODE(747, 7, 0),
   5787     /* GLAS_TPMA_CAPTURE_ADJ_5:8:15 */
   5788     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(748, 15, 8)
   5789 };
   5790 static uint32_t BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_ADJ_6_7r_fields[] =
   5791 {
   5792     /* GLAS_TPMA_CAPTURE_ADJ_6:0:7 */
   5793     PHYMOD_SYMBOL_FIELD_ENCODE(749, 7, 0),
   5794     /* GLAS_TPMA_CAPTURE_ADJ_7:8:15 */
   5795     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(750, 15, 8)
   5796 };
   5797 static uint32_t BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_CTLr_fields[] =
   5798 {
   5799     /* GLAS_TPMA_CAPTURE_EN:0:0 */
   5800     PHYMOD_SYMBOL_FIELD_ENCODE(759, 0, 0),
   5801     /* GLAS_TPMA_CAPTURE_MASK:1:8 */
   5802     PHYMOD_SYMBOL_FIELD_ENCODE(761, 8, 1),
   5803     /* GLAS_TPMA_CAPTURE_LOGICAL:9:9 */
   5804     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(760, 9, 9)
   5805 };
   5806 static uint32_t BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_DATA0r_fields[] =
   5807 {
   5808     /* GLAS_TPMA_CAPTURE_DATA_0:0:15 */
   5809     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(751, 15, 0)
   5810 };
   5811 static uint32_t BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_DATA1r_fields[] =
   5812 {
   5813     /* GLAS_TPMA_CAPTURE_DATA_1:0:15 */
   5814     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(752, 15, 0)
   5815 };
   5816 static uint32_t BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_DATA2r_fields[] =
   5817 {
   5818     /* GLAS_TPMA_CAPTURE_DATA_2:0:15 */
   5819     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(753, 15, 0)
   5820 };
   5821 static uint32_t BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_DATA3r_fields[] =
   5822 {
   5823     /* GLAS_TPMA_CAPTURE_DATA_3:0:15 */
   5824     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(754, 15, 0)
   5825 };
   5826 static uint32_t BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_DATA4r_fields[] =
   5827 {
   5828     /* GLAS_TPMA_CAPTURE_DATA_4:0:15 */
   5829     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(755, 15, 0)
   5830 };
   5831 static uint32_t BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_DATA5r_fields[] =
   5832 {
   5833     /* GLAS_TPMA_CAPTURE_DATA_5:0:15 */
   5834     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(756, 15, 0)
   5835 };
   5836 static uint32_t BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_DATA6r_fields[] =
   5837 {
   5838     /* GLAS_TPMA_CAPTURE_DATA_6:0:15 */
   5839     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(757, 15, 0)
   5840 };
   5841 static uint32_t BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_DATA7r_fields[] =
   5842 {
   5843     /* GLAS_TPMA_CAPTURE_DATA_7:0:15 */
   5844     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(758, 15, 0)
   5845 };
   5846 static uint32_t BCMI_TSCBH_XGXS_TX_X1_TX_LN_SWPr_fields[] =
   5847 {
   5848     /* LOGICAL_TO_PHYSICAL0_SEL:0:2 */
   5849     PHYMOD_SYMBOL_FIELD_ENCODE(947, 2, 0),
   5850     /* LOGICAL_TO_PHYSICAL1_SEL:3:5 */
   5851     PHYMOD_SYMBOL_FIELD_ENCODE(948, 5, 3),
   5852     /* LOGICAL_TO_PHYSICAL2_SEL:6:8 */
   5853     PHYMOD_SYMBOL_FIELD_ENCODE(949, 8, 6),
   5854     /* LOGICAL_TO_PHYSICAL3_SEL:9:11 */
   5855     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(950, 11, 9)
   5856 };
   5857 static uint32_t BCMI_TSCBH_XGXS_TX_X4_ENC_STS1r_fields[] =
   5858 {
   5859     /* CL49_LTXSM_STATE:0:5 */
   5860     PHYMOD_SYMBOL_FIELD_ENCODE(485, 5, 0),
   5861     /* CL49_TX_FAULT_DET:6:6 */
   5862     PHYMOD_SYMBOL_FIELD_ENCODE(488, 6, 6),
   5863     /* LTXSM_STATE:7:11 */
   5864     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(965, 11, 7)
   5865 };
   5866 static uint32_t BCMI_TSCBH_XGXS_TX_X4_ERR_CTLr_fields[] =
   5867 {
   5868     /* PCS_LANE_ERROR_INJECT:0:3 */
   5869     PHYMOD_SYMBOL_FIELD_ENCODE(1197, 3, 0),
   5870     /* RS_FEC_LANE_ERROR_INJECT:4:11 */
   5871     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1386, 11, 4)
   5872 };
   5873 static uint32_t BCMI_TSCBH_XGXS_TX_X4_MISCr_fields[] =
   5874 {
   5875     /* ENABLE_TX_LANE:0:0 */
   5876     PHYMOD_SYMBOL_FIELD_ENCODE(681, 0, 0),
   5877     /* RSTB_TX_LANE:1:1 */
   5878     PHYMOD_SYMBOL_FIELD_ENCODE(1363, 1, 1),
   5879     /* TX_RF_ENABLE:2:2 */
   5880     PHYMOD_SYMBOL_FIELD_ENCODE(2034, 2, 2),
   5881     /* TX_LF_ENABLE:3:3 */
   5882     PHYMOD_SYMBOL_FIELD_ENCODE(1964, 3, 3),
   5883     /* TX_LI_ENABLE:4:4 */
   5884     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1965, 4, 4)
   5885 };
   5886 static uint32_t BCMI_TSCBH_XGXS_TX_X4_PCS_STS_LATCHr_fields[] =
   5887 {
   5888     /* LPI_RECEIVED_LH:0:0 */
   5889     PHYMOD_SYMBOL_FIELD_ENCODE(955, 0, 0),
   5890     /* REMOTE_FAULT_LH:1:1 */
   5891     PHYMOD_SYMBOL_FIELD_ENCODE(1327, 1, 1),
   5892     /* LOCAL_FAULT_LH:2:2 */
   5893     PHYMOD_SYMBOL_FIELD_ENCODE(946, 2, 2),
   5894     /* LINK_INTERRUPT_LH:3:3 */
   5895     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(904, 3, 3)
   5896 };
   5897 static uint32_t BCMI_TSCBH_XGXS_TX_X4_RS_SYMr_fields[] =
   5898 {
   5899     /* SYMBOL_VALUE:0:9 */
   5900     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1768, 9, 0)
   5901 };
   5902 static uint32_t BCMI_TSCBH_XGXS_TX_X4_TX_1588_TIMESTAMP_HIr_fields[] =
   5903 {
   5904     /* TS_IN_NS_HI:0:15 */
   5905     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1892, 15, 0)
   5906 };
   5907 static uint32_t BCMI_TSCBH_XGXS_TX_X4_TX_1588_TIMESTAMP_LOr_fields[] =
   5908 {
   5909     /* TS_IN_NS_LO:0:15 */
   5910     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1893, 15, 0)
   5911 };
   5912 static uint32_t BCMI_TSCBH_XGXS_TX_X4_TX_1588_TIMESTAMP_MIDr_fields[] =
   5913 {
   5914     /* TS_IN_NS_MID:0:15 */
   5915     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1894, 15, 0)
   5916 };
   5917 static uint32_t BCMI_TSCBH_XGXS_TX_X4_TX_1588_TIMESTAMP_STSr_fields[] =
   5918 {
   5919     /* TS_SUB_NS:0:3 */
   5920     PHYMOD_SYMBOL_FIELD_ENCODE(1896, 3, 0),
   5921     /* TSTS_INTERRUPT_STATUS:4:4 */
   5922     PHYMOD_SYMBOL_FIELD_ENCODE(1890, 4, 4),
   5923     /* TS_ENTRY_VALID:15:15 */
   5924     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1891, 15, 15)
   5925 };
   5926 static uint32_t BCMI_TSCBH_XGXS_TX_X4_TX_TS_CTLr_fields[] =
   5927 {
   5928     /* OSTS_PIPELINE_ENABLE:0:0 */
   5929     PHYMOD_SYMBOL_FIELD_ENCODE(1159, 0, 0),
   5930     /* XGMII_SFD_TIME_STAMP_ENABLE:1:1 */
   5931     PHYMOD_SYMBOL_FIELD_ENCODE(2084, 1, 1),
   5932     /* TSTS_INTERRUPT_EN:2:2 */
   5933     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1889, 2, 2)
   5934 };
   5935 static uint32_t BCMI_TSCBH_XGXS_TX_X4_TX_TS_SEQ_IDr_fields[] =
   5936 {
   5937     /* TS_SEQID:0:15 */
   5938     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1895, 15, 0)
   5939 };
   5940 static uint32_t BCMI_TSCBH_XGXS_UC_AHB_CTL0r_fields[] =
   5941 {
   5942     /* MICRO_RA_WRDATASIZE:0:1 */
   5943     PHYMOD_SYMBOL_FIELD_ENCODE(1088, 1, 0),
   5944     /* MICRO_RA_RDDATASIZE:4:5 */
   5945     PHYMOD_SYMBOL_FIELD_ENCODE(1083, 5, 4),
   5946     /* MICRO_RA_INIT:8:9 */
   5947     PHYMOD_SYMBOL_FIELD_ENCODE(1079, 9, 8),
   5948     /* MICRO_AUTOINC_WRADDR_EN:12:12 */
   5949     PHYMOD_SYMBOL_FIELD_ENCODE(986, 12, 12),
   5950     /* MICRO_AUTOINC_RDADDR_EN:13:13 */
   5951     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(985, 13, 13)
   5952 };
   5953 static uint32_t BCMI_TSCBH_XGXS_UC_AHB_RDADDR_LSWr_fields[] =
   5954 {
   5955     /* MICRO_RA_RDADDR_LSW:0:15 */
   5956     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1081, 15, 0)
   5957 };
   5958 static uint32_t BCMI_TSCBH_XGXS_UC_AHB_RDADDR_MSWr_fields[] =
   5959 {
   5960     /* MICRO_RA_RDADDR_MSW:0:15 */
   5961     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1082, 15, 0)
   5962 };
   5963 static uint32_t BCMI_TSCBH_XGXS_UC_AHB_RDDATA_LSWr_fields[] =
   5964 {
   5965     /* MICRO_RA_RDDATA_LSW:0:15 */
   5966     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1084, 15, 0)
   5967 };
   5968 static uint32_t BCMI_TSCBH_XGXS_UC_AHB_RDDATA_MSWr_fields[] =
   5969 {
   5970     /* MICRO_RA_RDDATA_MSW:0:15 */
   5971     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1085, 15, 0)
   5972 };
   5973 static uint32_t BCMI_TSCBH_XGXS_UC_AHB_STS0r_fields[] =
   5974 {
   5975     /* MICRO_RA_INITDONE:0:0 */
   5976     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1080, 0, 0)
   5977 };
   5978 static uint32_t BCMI_TSCBH_XGXS_UC_AHB_WRADDR_LSWr_fields[] =
   5979 {
   5980     /* MICRO_RA_WRADDR_LSW:0:15 */
   5981     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1086, 15, 0)
   5982 };
   5983 static uint32_t BCMI_TSCBH_XGXS_UC_AHB_WRADDR_MSWr_fields[] =
   5984 {
   5985     /* MICRO_RA_WRADDR_MSW:0:15 */
   5986     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1087, 15, 0)
   5987 };
   5988 static uint32_t BCMI_TSCBH_XGXS_UC_AHB_WRDATA_LSWr_fields[] =
   5989 {
   5990     /* MICRO_RA_WRDATA_LSW:0:15 */
   5991     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1089, 15, 0)
   5992 };
   5993 static uint32_t BCMI_TSCBH_XGXS_UC_AHB_WRDATA_MSWr_fields[] =
   5994 {
   5995     /* MICRO_RA_WRDATA_MSW:0:15 */
   5996     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1090, 15, 0)
   5997 };
   5998 static uint32_t BCMI_TSCBH_XGXS_UC_CLK_CTL0r_fields[] =
   5999 {
   6000     /* MICRO_MASTER_CLK_EN:0:0 */
   6001     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1040, 0, 0)
   6002 };
   6003 static uint32_t BCMI_TSCBH_XGXS_UC_PRAMIF_AHB_WRADDR_LSWr_fields[] =
   6004 {
   6005     /* MICRO_PRAMIF_AHB_WRADDR_LSW:2:15 */
   6006     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1062, 15, 2)
   6007 };
   6008 static uint32_t BCMI_TSCBH_XGXS_UC_PRAMIF_AHB_WRADDR_MSWr_fields[] =
   6009 {
   6010     /* MICRO_PRAMIF_AHB_WRADDR_MSW:0:15 */
   6011     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1063, 15, 0)
   6012 };
   6013 static uint32_t BCMI_TSCBH_XGXS_UC_PRAMIF_CTL0r_fields[] =
   6014 {
   6015     /* MICRO_PRAMIF_EN:0:0 */
   6016     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1064, 0, 0)
   6017 };
   6018 static uint32_t BCMI_TSCBH_XGXS_UC_PVT_STS0r_fields[] =
   6019 {
   6020     /* MICRO_PVT_TEMPDATA_RMI:0:9 */
   6021     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1071, 9, 0)
   6022 };
   6023 static uint32_t BCMI_TSCBH_XGXS_UC_RAM_CTL0r_fields[] =
   6024 {
   6025     /* MICRO_CR_ACCESS_EN:0:0 */
   6026     PHYMOD_SYMBOL_FIELD_ENCODE(1001, 0, 0),
   6027     /* MICRO_CR_IGNORE_MICRO_CODE_WRITES:1:1 */
   6028     PHYMOD_SYMBOL_FIELD_ENCODE(1011, 1, 1),
   6029     /* MICRO_CR_RAIF_PRTSEL:2:2 */
   6030     PHYMOD_SYMBOL_FIELD_ENCODE(1014, 2, 2),
   6031     /* MICRO_CR_PRIF_PRTSEL:3:3 */
   6032     PHYMOD_SYMBOL_FIELD_ENCODE(1013, 3, 3),
   6033     /* MICRO_CR_LOWPOWER_EN:7:7 */
   6034     PHYMOD_SYMBOL_FIELD_ENCODE(1012, 7, 7),
   6035     /* MICRO_DR_ACCESS_EN:8:8 */
   6036     PHYMOD_SYMBOL_FIELD_ENCODE(1023, 8, 8),
   6037     /* MICRO_DR_IGNORE_MICRO_CODE_WRITES:9:9 */
   6038     PHYMOD_SYMBOL_FIELD_ENCODE(1029, 9, 9),
   6039     /* MICRO_DR_RAIF_PRTSEL:10:10 */
   6040     PHYMOD_SYMBOL_FIELD_ENCODE(1032, 10, 10),
   6041     /* MICRO_DR_PRIF_PRTSEL:11:11 */
   6042     PHYMOD_SYMBOL_FIELD_ENCODE(1031, 11, 11),
   6043     /* MICRO_DR_LOWPOWER_EN:15:15 */
   6044     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1030, 15, 15)
   6045 };
   6046 static uint32_t BCMI_TSCBH_XGXS_UC_RAM_CTL1r_fields[] =
   6047 {
   6048     /* MICRO_CR_DATA_SIZE:0:6 */
   6049     PHYMOD_SYMBOL_FIELD_ENCODE(1006, 6, 0),
   6050     /* MICRO_DR_CODE_SIZE:8:14 */
   6051     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1024, 14, 8)
   6052 };
   6053 static uint32_t BCMI_TSCBH_XGXS_UC_RAM_CTL2r_fields[] =
   6054 {
   6055     /* MICRO_CORE_STACK_SIZE:2:13 */
   6056     PHYMOD_SYMBOL_FIELD_ENCODE(1000, 13, 2),
   6057     /* MICRO_CORE_STACK_EN:15:15 */
   6058     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(999, 15, 15)
   6059 };
   6060 static uint32_t BCMI_TSCBH_XGXS_UC_RAM_ECCCTL0r_fields[] =
   6061 {
   6062     /* MICRO_CR_ECCG_MODE:0:0 */
   6063     PHYMOD_SYMBOL_FIELD_ENCODE(1007, 0, 0),
   6064     /* MICRO_CR_ECC_FRC_DISABLE:1:1 */
   6065     PHYMOD_SYMBOL_FIELD_ENCODE(1010, 1, 1),
   6066     /* MICRO_CR_ECC_CORRUPT:2:3 */
   6067     PHYMOD_SYMBOL_FIELD_ENCODE(1008, 3, 2),
   6068     /* MICRO_CR_ECC_DEBUG_PRTSEL:4:4 */
   6069     PHYMOD_SYMBOL_FIELD_ENCODE(1009, 4, 4),
   6070     /* MICRO_DR_ECCG_MODE:8:8 */
   6071     PHYMOD_SYMBOL_FIELD_ENCODE(1025, 8, 8),
   6072     /* MICRO_DR_ECC_FRC_DISABLE:9:9 */
   6073     PHYMOD_SYMBOL_FIELD_ENCODE(1028, 9, 9),
   6074     /* MICRO_DR_ECC_CORRUPT:10:11 */
   6075     PHYMOD_SYMBOL_FIELD_ENCODE(1026, 11, 10),
   6076     /* MICRO_DR_ECC_DEBUG_PRTSEL:12:12 */
   6077     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1027, 12, 12)
   6078 };
   6079 static uint32_t BCMI_TSCBH_XGXS_UC_RAM_ECCCTL1r_fields[] =
   6080 {
   6081     /* MICRO_RA_ECC_WRDATA:0:6 */
   6082     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1078, 6, 0)
   6083 };
   6084 static uint32_t BCMI_TSCBH_XGXS_UC_RAM_ECCSTS0r_fields[] =
   6085 {
   6086     /* MICRO_RMI_CR_ECC_ADDRESS_STATUS:2:15 */
   6087     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1091, 15, 2)
   6088 };
   6089 static uint32_t BCMI_TSCBH_XGXS_UC_RAM_ECCSTS1r_fields[] =
   6090 {
   6091     /* MICRO_RA_ECC_RDDATA:0:6 */
   6092     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1077, 6, 0)
   6093 };
   6094 static uint32_t BCMI_TSCBH_XGXS_UC_RAM_ECCSTS2r_fields[] =
   6095 {
   6096     /* MICRO_RMI_DR_ECC_ADDRESS_STATUS:2:14 */
   6097     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1099, 14, 2)
   6098 };
   6099 static uint32_t BCMI_TSCBH_XGXS_UC_RAM_TESTIFCTL0r_fields[] =
   6100 {
   6101     /* MICRO_CR_TM:0:8 */
   6102     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1015, 8, 0)
   6103 };
   6104 static uint32_t BCMI_TSCBH_XGXS_UC_RAM_TESTIFCTL1r_fields[] =
   6105 {
   6106     /* MICRO_DR_TM:0:8 */
   6107     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1033, 8, 0)
   6108 };
   6109 static uint32_t BCMI_TSCBH_XGXS_UC_RMI_AHB_CTL1r_fields[] =
   6110 {
   6111     /* MICRO_PMI_HP_ACK_TIMEOUT_DIS:0:0 */
   6112     PHYMOD_SYMBOL_FIELD_ENCODE(1050, 0, 0),
   6113     /* MICRO_RA_ARG_MICROBLK_SEL:4:6 */
   6114     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1072, 6, 4)
   6115 };
   6116 static uint32_t BCMI_TSCBH_XGXS_UC_RMI_AHB_STS1r_fields[] =
   6117 {
   6118     /* MICRO_RMI_DEFAULT_SLAVE_ERROR:0:0 */
   6119     PHYMOD_SYMBOL_FIELD_ENCODE(1098, 0, 0),
   6120     /* MICRO_PR_DEFAULT_SLAVE_ERROR:1:1 */
   6121     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1068, 1, 1)
   6122 };
   6123 static uint32_t BCMI_TSCBH_XGXS_UC_RMI_EXT_INTR_CTL0r_fields[] =
   6124 {
   6125     /* MICRO_RMI_CR_ECC_CORR_ERR_INTR_EN:0:0 */
   6126     PHYMOD_SYMBOL_FIELD_ENCODE(1092, 0, 0),
   6127     /* MICRO_RMI_CR_ECC_UNCORR_ERR_INTR_EN:1:1 */
   6128     PHYMOD_SYMBOL_FIELD_ENCODE(1096, 1, 1),
   6129     /* MICRO_RMI_CR_ECC_MULTIROW_ERR_INTR_EN:2:2 */
   6130     PHYMOD_SYMBOL_FIELD_ENCODE(1094, 2, 2),
   6131     /* MICRO_RMI_DR_ECC_CORR_ERR_INTR_EN:4:4 */
   6132     PHYMOD_SYMBOL_FIELD_ENCODE(1100, 4, 4),
   6133     /* MICRO_RMI_DR_ECC_UNCORR_ERR_INTR_EN:5:5 */
   6134     PHYMOD_SYMBOL_FIELD_ENCODE(1104, 5, 5),
   6135     /* MICRO_RMI_DR_ECC_MULTIROW_ERR_INTR_EN:6:6 */
   6136     PHYMOD_SYMBOL_FIELD_ENCODE(1102, 6, 6),
   6137     /* MICRO_RMI_M0P_LOCKUP_INTR_EN:8:8 */
   6138     PHYMOD_SYMBOL_FIELD_ENCODE(1106, 8, 8),
   6139     /* MICRO_RMI_M0P_SYSTEMRESETREQ_INTR_EN:9:9 */
   6140     PHYMOD_SYMBOL_FIELD_ENCODE(1109, 9, 9),
   6141     /* MICRO_RMI_MBOX_MSGOUT_INTR_EN:10:10 */
   6142     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1112, 10, 10)
   6143 };
   6144 static uint32_t BCMI_TSCBH_XGXS_UC_RMI_EXT_INTR_STS0r_fields[] =
   6145 {
   6146     /* MICRO_RMI_CR_ECC_CORR_ERR_STATUS:0:0 */
   6147     PHYMOD_SYMBOL_FIELD_ENCODE(1093, 0, 0),
   6148     /* MICRO_RMI_CR_ECC_UNCORR_ERR_STATUS:1:1 */
   6149     PHYMOD_SYMBOL_FIELD_ENCODE(1097, 1, 1),
   6150     /* MICRO_RMI_CR_ECC_MULTIROW_ERR_STATUS:2:2 */
   6151     PHYMOD_SYMBOL_FIELD_ENCODE(1095, 2, 2),
   6152     /* MICRO_RMI_DR_ECC_CORR_ERR_STATUS:4:4 */
   6153     PHYMOD_SYMBOL_FIELD_ENCODE(1101, 4, 4),
   6154     /* MICRO_RMI_DR_ECC_UNCORR_ERR_STATUS:5:5 */
   6155     PHYMOD_SYMBOL_FIELD_ENCODE(1105, 5, 5),
   6156     /* MICRO_RMI_DR_ECC_MULTIROW_ERR_STATUS:6:6 */
   6157     PHYMOD_SYMBOL_FIELD_ENCODE(1103, 6, 6),
   6158     /* MICRO_RMI_M0P_LOCKUP_STATUS_OR:8:8 */
   6159     PHYMOD_SYMBOL_FIELD_ENCODE(1108, 8, 8),
   6160     /* MICRO_RMI_M0P_SYSTEMRESETREQ_STATUS_OR:9:9 */
   6161     PHYMOD_SYMBOL_FIELD_ENCODE(1111, 9, 9),
   6162     /* MICRO_RMI_MBOX_MSGOUT_STATUS_OR:10:10 */
   6163     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1114, 10, 10)
   6164 };
   6165 static uint32_t BCMI_TSCBH_XGXS_UC_RMI_PMI_IF_CTL0r_fields[] =
   6166 {
   6167     /* MICRO_PMI_HP_FAST_READ_EN:0:0 */
   6168     PHYMOD_SYMBOL_FIELD_ENCODE(1058, 0, 0),
   6169     /* MICRO_PMI_HP_FAST_BKTOBK_EN:2:2 */
   6170     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1057, 2, 2)
   6171 };
   6172 static uint32_t BCMI_TSCBH_XGXS_UC_RMI_PR_AINC_NXT_WRADDR_LSWr_fields[] =
   6173 {
   6174     /* MICRO_PR_AUTOINC_NXT_WRADDR_LSW:0:15 */
   6175     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1066, 15, 0)
   6176 };
   6177 static uint32_t BCMI_TSCBH_XGXS_UC_RMI_PVT_CTL0r_fields[] =
   6178 {
   6179     /* MICRO_PVT_TEMPDATA_FRCVAL:0:9 */
   6180     PHYMOD_SYMBOL_FIELD_ENCODE(1070, 9, 0),
   6181     /* MICRO_PVT_TEMPDATA_FRC:12:12 */
   6182     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1069, 12, 12)
   6183 };
   6184 static uint32_t BCMI_TSCBH_XGXS_UC_RMI_RAM_CR_CRCCTL0r_fields[] =
   6185 {
   6186     /* MICRO_CR_CRC_CALC_EN:0:0 */
   6187     PHYMOD_SYMBOL_FIELD_ENCODE(1002, 0, 0),
   6188     /* MICRO_CR_CRC_INIT:1:1 */
   6189     PHYMOD_SYMBOL_FIELD_ENCODE(1004, 1, 1),
   6190     /* MICRO_CR_CRC_PRTSEL:2:2 */
   6191     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1005, 2, 2)
   6192 };
   6193 static uint32_t BCMI_TSCBH_XGXS_UC_RMI_RAM_CR_CRCSTS0r_fields[] =
   6194 {
   6195     /* MICRO_CR_CRC_CHECKSUM:0:15 */
   6196     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1003, 15, 0)
   6197 };
   6198 static uint32_t BCMI_TSCBH_XGXS_UC_RMI_RA_AINC_NXT_RDADDR_LSWr_fields[] =
   6199 {
   6200     /* MICRO_RA_AUTOINC_NXT_RDADDR_LSW:0:15 */
   6201     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1073, 15, 0)
   6202 };
   6203 static uint32_t BCMI_TSCBH_XGXS_UC_RMI_RA_AINC_NXT_WRADDR_LSWr_fields[] =
   6204 {
   6205     /* MICRO_RA_AUTOINC_NXT_WRADDR_LSW:0:15 */
   6206     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1075, 15, 0)
   6207 };
   6208 static uint32_t BCMI_TSCBH_XGXS_UC_RMI_SILICON_DBG_CTL0r_fields[] =
   6209 {
   6210     /* MICRO_SILICON_DEBUG_STATUS_MUX_SEL:0:2 */
   6211     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1116, 2, 0)
   6212 };
   6213 static uint32_t BCMI_TSCBH_XGXS_UC_RMI_SILICON_DBG_STS0r_fields[] =
   6214 {
   6215     /* MICRO_SILICON_DEBUG_STATUS_MUXED_DATA:0:15 */
   6216     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1115, 15, 0)
   6217 };
   6218 static uint32_t BCMI_TSCBH_XGXS_UC_RMI_UC_DBGGER_CTL0r_fields[] =
   6219 {
   6220     /* MICRO_DEBUGGER_ID_FRCVAL:0:7 */
   6221     PHYMOD_SYMBOL_FIELD_ENCODE(1018, 7, 0),
   6222     /* MICRO_DEBUGGER_ID_FRC:15:15 */
   6223     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1017, 15, 15)
   6224 };
   6225 static uint32_t BCMI_TSCBH_XGXS_UC_RMI_UC_DBGGER_ID_LSWr_fields[] =
   6226 {
   6227     /* MICRO_DEBUGGER_ID_LSW:0:15 */
   6228     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1019, 15, 0)
   6229 };
   6230 static uint32_t BCMI_TSCBH_XGXS_UC_RMI_UC_DBGGER_ID_MSWr_fields[] =
   6231 {
   6232     /* MICRO_DEBUGGER_ID_MSW:0:11 */
   6233     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1020, 11, 0)
   6234 };
   6235 static uint32_t BCMI_TSCBH_XGXS_UC_RMI_UC_HARDFAULT_CTL0r_fields[] =
   6236 {
   6237     /* MICRO_PMI_HP_ERROR_INTR_EN:0:0 */
   6238     PHYMOD_SYMBOL_FIELD_ENCODE(1055, 0, 0),
   6239     /* MICRO_PMI_HP_WORD_ACCESS_ERR_INTR_EN:1:1 */
   6240     PHYMOD_SYMBOL_FIELD_ENCODE(1060, 1, 1),
   6241     /* MICRO_PMI_HP_ACK_TIMEOUT_INTR_EN:2:2 */
   6242     PHYMOD_SYMBOL_FIELD_ENCODE(1052, 2, 2),
   6243     /* MICRO_M0P_DEFAULT_SLAVE_ERROR_INTR_EN:3:3 */
   6244     PHYMOD_SYMBOL_FIELD_ENCODE(1035, 3, 3),
   6245     /* MICRO_PMI_HP_ERROR_HRESP_EN:8:8 */
   6246     PHYMOD_SYMBOL_FIELD_ENCODE(1054, 8, 8),
   6247     /* MICRO_PMI_HP_WORD_ACCESS_ERR_HRESP_EN:9:9 */
   6248     PHYMOD_SYMBOL_FIELD_ENCODE(1059, 9, 9),
   6249     /* MICRO_PMI_HP_ACK_TIMEOUT_HRESP_EN:10:10 */
   6250     PHYMOD_SYMBOL_FIELD_ENCODE(1051, 10, 10),
   6251     /* MICRO_M0P_DEFAULT_SLAVE_ERROR_HRESP_EN:11:11 */
   6252     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1034, 11, 11)
   6253 };
   6254 static uint32_t BCMI_TSCBH_XGXS_UC_RMI_UC_MISC_STS0r_fields[] =
   6255 {
   6256     /* MICRO_RA_AUTOINC_NXT_WRADDR_MSB:0:0 */
   6257     PHYMOD_SYMBOL_FIELD_ENCODE(1076, 0, 0),
   6258     /* MICRO_RA_AUTOINC_NXT_RDADDR_MSB:2:2 */
   6259     PHYMOD_SYMBOL_FIELD_ENCODE(1074, 2, 2),
   6260     /* MICRO_PR_AUTOINC_NXT_WRADDR_MSB:4:4 */
   6261     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1067, 4, 4)
   6262 };
   6263 static uint32_t BCMI_TSCBH_XGXS_UC_RMI_UC_MSG_CTL0r_fields[] =
   6264 {
   6265     /* MICRO_MSG0:0:15 */
   6266     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1043, 15, 0)
   6267 };
   6268 static uint32_t BCMI_TSCBH_XGXS_UC_RMI_UC_MSG_CTL1r_fields[] =
   6269 {
   6270     /* MICRO_MSG1:0:15 */
   6271     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1044, 15, 0)
   6272 };
   6273 static uint32_t BCMI_TSCBH_XGXS_UC_RMI_UC_MSG_CTL2r_fields[] =
   6274 {
   6275     /* MICRO_MSG2:0:15 */
   6276     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1045, 15, 0)
   6277 };
   6278 static uint32_t BCMI_TSCBH_XGXS_UC_RMI_UC_MSG_CTL3r_fields[] =
   6279 {
   6280     /* MICRO_MSG3:0:15 */
   6281     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1046, 15, 0)
   6282 };
   6283 static uint32_t BCMI_TSCBH_XGXS_UC_RMI_UC_SDK_STS0r_fields[] =
   6284 {
   6285     /* MICRO_UC_ACTIVE_0:0:0 */
   6286     PHYMOD_SYMBOL_FIELD_ENCODE(1126, 0, 0),
   6287     /* MICRO_UC_ACTIVE_1:1:1 */
   6288     PHYMOD_SYMBOL_FIELD_ENCODE(1127, 1, 1),
   6289     /* MICRO_UC_ACTIVE_2:2:2 */
   6290     PHYMOD_SYMBOL_FIELD_ENCODE(1128, 2, 2),
   6291     /* MICRO_UC_ACTIVE_3:3:3 */
   6292     PHYMOD_SYMBOL_FIELD_ENCODE(1129, 3, 3),
   6293     /* MICRO_NUM_UC_CORES:12:15 */
   6294     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1047, 15, 12)
   6295 };
   6296 static uint32_t BCMI_TSCBH_XGXS_UC_RST_CTL0r_fields[] =
   6297 {
   6298     /* MICRO_MASTER_RSTB:0:0 */
   6299     PHYMOD_SYMBOL_FIELD_ENCODE(1041, 0, 0),
   6300     /* MICRO_SW_TIMESTAMP_TIMER_RSTB:14:14 */
   6301     PHYMOD_SYMBOL_FIELD_ENCODE(1124, 14, 14),
   6302     /* MICRO_PRAM_IF_RSTB:15:15 */
   6303     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1065, 15, 15)
   6304 };
   6305 static uint32_t BCMI_TSCBH_XGXS_UC_UC_CORE_CFG_FWAPI_DATA0r_fields[] =
   6306 {
   6307     /* MICRO_CORE_CFG_FWAPI_DATA0:0:15 */
   6308     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(994, 15, 0)
   6309 };
   6310 static uint32_t BCMI_TSCBH_XGXS_UC_UC_CORE_CFG_FW_API_DATA1r_fields[] =
   6311 {
   6312     /* MICRO_CORE_CFG_FWAPI_DATA1:0:15 */
   6313     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(995, 15, 0)
   6314 };
   6315 static uint32_t BCMI_TSCBH_XGXS_UC_UC_CORE_CLK_CTL0r_fields[] =
   6316 {
   6317     /* MICRO_CORE_CLK_EN:0:0 */
   6318     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(996, 0, 0)
   6319 };
   6320 static uint32_t BCMI_TSCBH_XGXS_UC_UC_CORE_CTL0r_fields[] =
   6321 {
   6322     /* MICRO_CORE_LN_SEL:0:7 */
   6323     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(997, 7, 0)
   6324 };
   6325 static uint32_t BCMI_TSCBH_XGXS_UC_UC_CORE_LOW_PWR_CTL0r_fields[] =
   6326 {
   6327     /* MICRO_WICENREQ:0:0 */
   6328     PHYMOD_SYMBOL_FIELD_ENCODE(1131, 0, 0),
   6329     /* MICRO_SLEEPHOLDREQ_N:1:1 */
   6330     PHYMOD_SYMBOL_FIELD_ENCODE(1120, 1, 1),
   6331     /* MICRO_M0P_GCLK_FRCVAL:2:2 */
   6332     PHYMOD_SYMBOL_FIELD_ENCODE(1038, 2, 2),
   6333     /* MICRO_M0P_GCLK_FRC:3:3 */
   6334     PHYMOD_SYMBOL_FIELD_ENCODE(1037, 3, 3),
   6335     /* MICRO_M0P_WAKEUP:4:4 */
   6336     PHYMOD_SYMBOL_FIELD_ENCODE(1039, 4, 4),
   6337     /* MICRO_DP_RCLK20_RST_WAKEUP_EN:5:5 */
   6338     PHYMOD_SYMBOL_FIELD_ENCODE(1022, 5, 5),
   6339     /* MICRO_PMD_SIGNAL_DETECT_WAKEUP_EN:6:6 */
   6340     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1049, 6, 6)
   6341 };
   6342 static uint32_t BCMI_TSCBH_XGXS_UC_UC_CORE_LOW_PWR_STS0r_fields[] =
   6343 {
   6344     /* MICRO_WICENACK:0:0 */
   6345     PHYMOD_SYMBOL_FIELD_ENCODE(1130, 0, 0),
   6346     /* MICRO_SLEEPHOLDACK_N:1:1 */
   6347     PHYMOD_SYMBOL_FIELD_ENCODE(1119, 1, 1),
   6348     /* MICRO_SLEEPING:2:2 */
   6349     PHYMOD_SYMBOL_FIELD_ENCODE(1121, 2, 2),
   6350     /* MICRO_SLEEPDEEP:3:3 */
   6351     PHYMOD_SYMBOL_FIELD_ENCODE(1117, 3, 3),
   6352     /* MICRO_SLEEPING_LH:4:4 */
   6353     PHYMOD_SYMBOL_FIELD_ENCODE(1122, 4, 4),
   6354     /* MICRO_SLEEPDEEP_LH:5:5 */
   6355     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1118, 5, 5)
   6356 };
   6357 static uint32_t BCMI_TSCBH_XGXS_UC_UC_CORE_MBOX_CTL0r_fields[] =
   6358 {
   6359     /* MICRO_MBOX_MSGIN_INTR:0:0 */
   6360     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1042, 0, 0)
   6361 };
   6362 static uint32_t BCMI_TSCBH_XGXS_UC_UC_CORE_RST_CTL0r_fields[] =
   6363 {
   6364     /* MICRO_CORE_RSTB:0:0 */
   6365     PHYMOD_SYMBOL_FIELD_ENCODE(998, 0, 0),
   6366     /* MICRO_DAP_PORESET_S_RSTB:14:14 */
   6367     PHYMOD_SYMBOL_FIELD_ENCODE(1016, 14, 14),
   6368     /* MICRO_SW_PMI_HP_RSTB:15:15 */
   6369     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1123, 15, 15)
   6370 };
   6371 static uint32_t BCMI_TSCBH_XGXS_UC_UC_CORE_STS0r_fields[] =
   6372 {
   6373     /* MICRO_PMI_HP_ERROR_STATUS:0:0 */
   6374     PHYMOD_SYMBOL_FIELD_ENCODE(1056, 0, 0),
   6375     /* MICRO_PMI_HP_WORD_ACCESS_ERR_STATUS:1:1 */
   6376     PHYMOD_SYMBOL_FIELD_ENCODE(1061, 1, 1),
   6377     /* MICRO_PMI_HP_ACK_TIMEOUT_STATUS:2:2 */
   6378     PHYMOD_SYMBOL_FIELD_ENCODE(1053, 2, 2),
   6379     /* MICRO_M0P_DEFAULT_SLAVE_ERROR_STATUS:3:3 */
   6380     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1036, 3, 3)
   6381 };
   6382 static uint32_t BCMI_TSCBH_XGXS_UC_UC_CORE_STS1r_fields[] =
   6383 {
   6384     /* MICRO_RMI_M0P_LOCKUP_STATUS:0:0 */
   6385     PHYMOD_SYMBOL_FIELD_ENCODE(1107, 0, 0),
   6386     /* MICRO_RMI_M0P_SYSTEMRESETREQ_STATUS:1:1 */
   6387     PHYMOD_SYMBOL_FIELD_ENCODE(1110, 1, 1),
   6388     /* MICRO_RMI_MBOX_MSGOUT_STATUS:2:2 */
   6389     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1113, 2, 2)
   6390 };
   6391 static uint32_t BCMI_TSCBH_XGXS_UC_UC_CORE_STS2r_fields[] =
   6392 {
   6393     /* MICRO_DP_RCLK20_RST_STATUS_LH:0:7 */
   6394     PHYMOD_SYMBOL_FIELD_ENCODE(1021, 7, 0),
   6395     /* MICRO_PMD_SIGNAL_DETECT_STATUS_LH:8:15 */
   6396     PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1048, 15, 8)
   6397 };
   6398 
   6399 
   6400 
   6401 /*******************************************************************************
   6402  *
   6403  * The following is the field name table.
   6404  */
   6405 #if PHYMOD_CONFIG_INCLUDE_FIELD_NAMES == 1
   6406 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_NAMES_BCMI_TSCBH_XGXS
   6407 const char* bcmi_tscbh_xgxs_fields[] = 
   6408 {
   6409     "ABILITY_DETECT",
   6410     "ACK_DETECT",
   6411     "ACQ_CDR_TIMEOUT",
   6412     "AFE_LMS_THRESH_BIN",
   6413     "AFE_RX_PWRDN",
   6414     "AFE_RX_PWRDN_FRC",
   6415     "AFE_RX_PWRDN_FRC_VAL",
   6416     "AFE_RX_RCLK20_PWRDN",
   6417     "AFE_RX_RCLK20_PWRDN_FRC",
   6418     "AFE_RX_RCLK20_PWRDN_FRC_VAL",
   6419     "AFE_RX_RESET",
   6420     "AFE_RX_RESET_FRC",
   6421     "AFE_RX_RESET_FRC_VAL",
   6422     "AFE_SIGDET",
   6423     "AFE_SIGDET_CHANGE",
   6424     "AFE_SIGDET_PWRDN",
   6425     "AFE_SIGDET_THRESH",
   6426     "AFE_SIGNAL_DETECT_DIS",
   6427     "AFE_S_PLL_PWRDN",
   6428     "AFE_S_PLL_RESET_FRC",
   6429     "AFE_S_PLL_RESET_FRC_VAL",
   6430     "AFE_TX_FIFO_RESETB",
   6431     "AFE_TX_FIFO_RESETB_FRC",
   6432     "AFE_TX_PWRDN",
   6433     "AFE_TX_PWRDN_FRC",
   6434     "AFE_TX_PWRDN_FRC_VAL",
   6435     "AFE_TX_RESET",
   6436     "AFE_TX_RESET_DEASSERT",
   6437     "AFE_TX_RESET_FRC",
   6438     "AFE_TX_RESET_FRC_VAL",
   6439     "AMRKR_SPACING_ERR_LATCH_MUX_PSLL_0",
   6440     "AMRKR_SPACING_ERR_LATCH_MUX_PSLL_1",
   6441     "AMRKR_SPACING_ERR_LATCH_MUX_PSLL_2",
   6442     "AMRKR_SPACING_ERR_LATCH_MUX_PSLL_3",
   6443     "AMRKR_SPACING_ERR_LATCH_MUX_PSLL_4",
   6444     "AMS_PLL_BGINT",
   6445     "AMS_PLL_BGIP",
   6446     "AMS_PLL_BGR_CTATADJ",
   6447     "AMS_PLL_BGR_PTATADJ",
   6448     "AMS_PLL_CLK4SYNC_DIV",
   6449     "AMS_PLL_CLK4SYNC_EN",
   6450     "AMS_PLL_COMP_THRESH",
   6451     "AMS_PLL_CP_CMFDBK_IADJ",
   6452     "AMS_PLL_DITHEREN",
   6453     "AMS_PLL_DIV2",
   6454     "AMS_PLL_DIV4",
   6455     "AMS_PLL_DIV4_2_SEL",
   6456     "AMS_PLL_DOUBLER_CAP",
   6457     "AMS_PLL_DOUBLER_RES",
   6458     "AMS_PLL_DRV_HV_DISABLE",
   6459     "AMS_PLL_ENABLE_FTUNE",
   6460     "AMS_PLL_FORCE_KVH_BW",
   6461     "AMS_PLL_FORCE_RESCAL",
   6462     "AMS_PLL_FP3_CTRL",
   6463     "AMS_PLL_FP3_RH",
   6464     "AMS_PLL_FRACN_BYPASS",
   6465     "AMS_PLL_FRACN_DIV",
   6466     "AMS_PLL_FRACN_DIVRANGE",
   6467     "AMS_PLL_FRACN_DIV_17_16",
   6468     "AMS_PLL_FRACN_NDIV_INT",
   6469     "AMS_PLL_FRACN_SEL",
   6470     "AMS_PLL_IMAX_IBIAS",
   6471     "AMS_PLL_IMAX_ICK",
   6472     "AMS_PLL_IMAX_ICMLDIV",
   6473     "AMS_PLL_IMAX_ICOMP",
   6474     "AMS_PLL_IMAX_ICP",
   6475     "AMS_PLL_IMAX_IOP",
   6476     "AMS_PLL_IMAX_IRXCLKBUF",
   6477     "AMS_PLL_IMIN_IBIAS",
   6478     "AMS_PLL_IMIN_ICK",
   6479     "AMS_PLL_IMIN_ICMLDIV",
   6480     "AMS_PLL_IMIN_ICOMP",
   6481     "AMS_PLL_IMIN_ICP",
   6482     "AMS_PLL_IMIN_IOP",
   6483     "AMS_PLL_IMIN_IRXCLKBUF",
   6484     "AMS_PLL_IMODE_IBIAS",
   6485     "AMS_PLL_IMODE_ICK",
   6486     "AMS_PLL_IMODE_ICMLDIV",
   6487     "AMS_PLL_IMODE_ICOMP",
   6488     "AMS_PLL_IMODE_ICP",
   6489     "AMS_PLL_IMODE_IOP",
   6490     "AMS_PLL_IMODE_IRXCLKBUF",
   6491     "AMS_PLL_IQP",
   6492     "AMS_PLL_IVCO",
   6493     "AMS_PLL_KVH",
   6494     "AMS_PLL_KVH_FORCE",
   6495     "AMS_PLL_LOW",
   6496     "AMS_PLL_LPF_RZ",
   6497     "AMS_PLL_MAX_TEST_PORT_AMPLITUDE",
   6498     "AMS_PLL_MIX3P1CR_CTATADJ",
   6499     "AMS_PLL_MIX3P1CR_PTATADJ",
   6500     "AMS_PLL_MIX3P1C_CALR_CTATADJ",
   6501     "AMS_PLL_MIX3P1C_CALR_PTATADJ",
   6502     "AMS_PLL_MODE",
   6503     "AMS_PLL_NDIV_FRAC_VALID",
   6504     "AMS_PLL_PFD_FB_SKEW",
   6505     "AMS_PLL_PFD_REF_SKEW",
   6506     "AMS_PLL_PFD_SKEW_ENLARGE",
   6507     "AMS_PLL_PLL2RX_CLKBW",
   6508     "AMS_PLL_PWRDN",
   6509     "AMS_PLL_RANGE",
   6510     "AMS_PLL_REFCLK_DOUBLER",
   6511     "AMS_PLL_REFH_PLL",
   6512     "AMS_PLL_REFL_PLL",
   6513     "AMS_PLL_RESCAL_AUX",
   6514     "AMS_PLL_RESET",
   6515     "AMS_PLL_RTERM200",
   6516     "AMS_PLL_RTERM300",
   6517     "AMS_PLL_RTERM400",
   6518     "AMS_PLL_RTERMHIZ",
   6519     "AMS_PLL_RTERM_SEL",
   6520     "AMS_PLL_RX_CLKRPTR_BIAS",
   6521     "AMS_PLL_RX_CLKRPTR_BW",
   6522     "AMS_PLL_RX_CLK_RPTR_PD",
   6523     "AMS_PLL_SET_CLK4PCS",
   6524     "AMS_PLL_SET_CLK4PCS_MSB",
   6525     "AMS_PLL_SPARE_11_11",
   6526     "AMS_PLL_SPARE_167_166",
   6527     "AMS_PLL_SPARE_175_174",
   6528     "AMS_PLL_SPARE_20_20",
   6529     "AMS_PLL_TEST_FRACN_EN",
   6530     "AMS_PLL_TEST_PLL",
   6531     "AMS_PLL_TEST_PNP",
   6532     "AMS_PLL_TEST_RX",
   6533     "AMS_PLL_TEST_VC",
   6534     "AMS_PLL_TEST_VCO2_CSSW",
   6535     "AMS_PLL_TEST_VDDR4BG",
   6536     "AMS_PLL_TEST_VREF",
   6537     "AMS_PLL_TX_CLKRPTR_BIAS",
   6538     "AMS_PLL_TX_CLKRPTR_BW",
   6539     "AMS_PLL_TX_CLK_RPTR_PD",
   6540     "AMS_PLL_VBYPASS",
   6541     "AMS_PLL_VCO2_15G",
   6542     "AMS_PLL_VCODIV_REFOUT",
   6543     "AMS_PLL_VCOICTRL",
   6544     "AMS_PLL_VCO_AUTOGM",
   6545     "AMS_PLL_VCO_RES_CS",
   6546     "AMS_PLL_VDD88_EN",
   6547     "AMS_PLL_VDDR_BGB",
   6548     "AMS_RX_BYPASS_AC_CAP",
   6549     "AMS_RX_CLK_BW_CTRL",
   6550     "AMS_RX_CLOCK_CAL_EN",
   6551     "AMS_RX_CML_LP",
   6552     "AMS_RX_CM_VOLTAGE_IBIAS",
   6553     "AMS_RX_D2C_CLKBUF_IBIAS",
   6554     "AMS_RX_DAC4CK_DAT_I",
   6555     "AMS_RX_DAC4CK_DAT_Q",
   6556     "AMS_RX_DAC4CK_LMS_I",
   6557     "AMS_RX_DAC4CK_LMS_Q",
   6558     "AMS_RX_DAC4CK_PHS_I",
   6559     "AMS_RX_DAC4CK_PHS_Q",
   6560     "AMS_RX_DATA_THRESH_SEL",
   6561     "AMS_RX_DC_COUPLE",
   6562     "AMS_RX_DC_OFFSET",
   6563     "AMS_RX_DC_OFFSET_HALF_RANGE",
   6564     "AMS_RX_DFESUM_BW",
   6565     "AMS_RX_DFESUM_LP",
   6566     "AMS_RX_DFE_HGAIN_EN",
   6567     "AMS_RX_DFE_SLICER_IBIAS",
   6568     "AMS_RX_DFE_SUMMER_VCM",
   6569     "AMS_RX_DFE_SUM_BUF_IBIAS",
   6570     "AMS_RX_DFE_TAP_WEIGHT_IBIAS",
   6571     "AMS_RX_DLL_IBIAS",
   6572     "AMS_RX_EN_TAP9DELAY",
   6573     "AMS_RX_EQ_IND_DIS",
   6574     "AMS_RX_EQ_LZ_EN",
   6575     "AMS_RX_EQ_PKCOMP_DIS",
   6576     "AMS_RX_FFE_ENABLE",
   6577     "AMS_RX_FFE_SHA_IBIAS",
   6578     "AMS_RX_FFE_SUMMER_TAP_IBIAS",
   6579     "AMS_RX_FORCE_DC_OFFSET",
   6580     "AMS_RX_MASTER_DIODES_IBIAS",
   6581     "AMS_RX_MET_R_IBIAS",
   6582     "AMS_RX_OFFSET_CORRECTION_IBIAS",
   6583     "AMS_RX_OFFSET_CORRECTION_RESCAL_MUX",
   6584     "AMS_RX_PD_CH_P1",
   6585     "AMS_RX_PD_PHS_SLR",
   6586     "AMS_RX_PEAKING_FILTER_IBIAS",
   6587     "AMS_RX_PEAKING_FILTER_RESCAL_MUX",
   6588     "AMS_RX_PF",
   6589     "AMS_RX_PF3_CTRL",
   6590     "AMS_RX_PF3_IBIAS",
   6591     "AMS_RX_PF3_IND_DIS",
   6592     "AMS_RX_PF3_LZ_EN",
   6593     "AMS_RX_PF3_MAX_BW",
   6594     "AMS_RX_PF3_PKCOMP_DIS",
   6595     "AMS_RX_PF3_RESCAL_MUX",
   6596     "AMS_RX_PHASE_INTERPOLATORS_IBIAS",
   6597     "AMS_RX_PWRDN_FTAP",
   6598     "AMS_RX_RXCLK32_EN",
   6599     "AMS_RX_RXCLK66_EN",
   6600     "AMS_RX_RX_OFFSET_PD",
   6601     "AMS_RX_SD_CAL_EN",
   6602     "AMS_RX_SD_CAL_NEG",
   6603     "AMS_RX_SD_CAL_POLARITY",
   6604     "AMS_RX_SD_CAL_POS",
   6605     "AMS_RX_SEL_D2CLP",
   6606     "AMS_RX_SEL_TH4DFE",
   6607     "AMS_RX_SHORT_VGA_OUTPUT",
   6608     "AMS_RX_SIGDET",
   6609     "AMS_RX_SIGDET_IBIAS",
   6610     "AMS_RX_SIGDET_PWRDN",
   6611     "AMS_RX_SIGDET_THRESHOLD",
   6612     "AMS_RX_SPARE_154",
   6613     "AMS_RX_TESTCLK_DIV",
   6614     "AMS_RX_TESTCLK_MUX",
   6615     "AMS_RX_TPORT_EN",
   6616     "AMS_RX_VGA",
   6617     "AMS_RX_VGA0_IBIAS",
   6618     "AMS_RX_VGA0_RESCAL_MUX",
   6619     "AMS_RX_VGA1_IBIAS",
   6620     "AMS_RX_VGA1_RESCAL_MUX",
   6621     "AMS_RX_VGA2_IBIAS",
   6622     "AMS_RX_VGA2_RESCAL_MUX",
   6623     "AMS_RX_VGA3_IND",
   6624     "AMS_RX_VGA_10G_BW",
   6625     "AMS_RX_VGA_BW_CTRL_CAP",
   6626     "AMS_RX_VGA_BW_CTRL_IND",
   6627     "AMS_RX_VGA_STEP_MODE",
   6628     "AMS_TX_ANA_RESCAL",
   6629     "AMS_TX_CAL_AUX",
   6630     "AMS_TX_CAL_OFF",
   6631     "AMS_TX_DCC_DIS",
   6632     "AMS_TX_DRIVER_RES_CAL",
   6633     "AMS_TX_DRV_HV_DISABLE",
   6634     "AMS_TX_ELEC_IDLE_AUX",
   6635     "AMS_TX_HPF_CTRL",
   6636     "AMS_TX_IBIAS",
   6637     "AMS_TX_ILDO",
   6638     "AMS_TX_IPHINT",
   6639     "AMS_TX_LANE_ID",
   6640     "AMS_TX_LDO_VREF",
   6641     "AMS_TX_PDET_MODE",
   6642     "AMS_TX_SEL_TXMASTER",
   6643     "AMS_TX_SKEW_ENABLE",
   6644     "AMS_TX_SKEW_PN",
   6645     "AMS_TX_SKEW_POLARITY",
   6646     "AMS_TX_SLEW_RATE",
   6647     "AMS_TX_SPARE_13",
   6648     "AMS_TX_SPARE_24_22",
   6649     "AMS_TX_SPARE_34",
   6650     "AMS_TX_SPARE_46_40",
   6651     "AMS_TX_SPARE_5",
   6652     "AMS_TX_SPARE_52_48",
   6653     "AMS_TX_SPARE_54",
   6654     "AMS_TX_SPARE_63_56",
   6655     "AMS_TX_SPARE_9",
   6656     "AMS_TX_TEST_DATA",
   6657     "AMS_TX_TICKSEL",
   6658     "AMS_TX_TXCLK32_EN",
   6659     "AMS_TX_TXCLK66_EN",
   6660     "AMS_TX_VDDR_BGB",
   6661     "AMS_TX_VERSION_ID",
   6662     "AM_LOCK_HIS_STATE_PSLL_0",
   6663     "AM_LOCK_HIS_STATE_PSLL_1",
   6664     "AM_LOCK_HIS_STATE_PSLL_2",
   6665     "AM_LOCK_HIS_STATE_PSLL_3",
   6666     "AM_LOCK_HIS_STATE_PSLL_4",
   6667     "AM_LOCK_LH_0",
   6668     "AM_LOCK_LH_1",
   6669     "AM_LOCK_LH_2",
   6670     "AM_LOCK_LH_3",
   6671     "AM_LOCK_LH_4",
   6672     "AM_LOCK_LL_0",
   6673     "AM_LOCK_LL_1",
   6674     "AM_LOCK_LL_2",
   6675     "AM_LOCK_LL_3",
   6676     "AM_LOCK_LL_4",
   6677     "AM_SLIP_COUNT_0",
   6678     "AM_SLIP_COUNT_1",
   6679     "AM_SLIP_COUNT_2",
   6680     "AM_SLIP_COUNT_3",
   6681     "AM_SLIP_COUNT_4",
   6682     "AM_TS_FCLK_ADJUST_VALUE_0",
   6683     "AM_TS_FCLK_ADJUST_VALUE_1",
   6684     "AM_TS_FCLK_ADJUST_VALUE_2",
   6685     "AM_TS_FCLK_ADJUST_VALUE_3",
   6686     "AM_TS_FCLK_ADJUST_VALUE_4",
   6687     "AN",
   6688     "ANA_TIMER_T2",
   6689     "AN_ACTIVE",
   6690     "AN_COMPLETE",
   6691     "AN_COMPLETED",
   6692     "AN_COMPLETED_SW_EN",
   6693     "AN_COMPLETED_SW_INT",
   6694     "AN_ENABLE",
   6695     "AN_FAIL_COUNT",
   6696     "AN_FAIL_COUNT_LIMIT",
   6697     "AN_GOOD_CHECK",
   6698     "AN_GOOD_CHECK_TRAP",
   6699     "AN_GOOD_CHK_EN",
   6700     "AN_GOOD_CHK_INT",
   6701     "AN_GOOD_TRAP",
   6702     "AN_HCD_CL72",
   6703     "AN_HCD_DUPLEX",
   6704     "AN_HCD_FEC_ARCH",
   6705     "AN_HCD_PAUSE",
   6706     "AN_HCD_RES_DISABLE",
   6707     "AN_HCD_SPEED",
   6708     "AN_RETRY_COUNT",
   6709     "AN_TYPE_SW",
   6710     "BAM_100G_BRCM_FEC_528_KR2_CR2",
   6711     "BAM_100G_BRCM_KR4_CR4",
   6712     "BAM_100G_BRCM_NO_FEC_KR2_CR2",
   6713     "BAM_100G_BRCM_NO_FEC_X4",
   6714     "BAM_200G_BRCM_KR4_CR4",
   6715     "BAM_200G_BRCM_NO_FEC_KR4_CR4",
   6716     "BAM_20G_CR1",
   6717     "BAM_20G_CR2",
   6718     "BAM_20G_KR1",
   6719     "BAM_20G_KR2",
   6720     "BAM_25G_CR1",
   6721     "BAM_25G_KR1",
   6722     "BAM_400G_BRCM_FEC_KR8_CR8",
   6723     "BAM_400G_BRCM_NO_FEC_KR8_CR8",
   6724     "BAM_40G_CR2",
   6725     "BAM_40G_KR2",
   6726     "BAM_50G_BRCM_FEC_528_CR1_KR1",
   6727     "BAM_50G_BRCM_FEC_544_CR1_KR1",
   6728     "BAM_50G_BRCM_FEC_544_CR2_KR2",
   6729     "BAM_50G_BRCM_NO_FEC_CR1_KR1",
   6730     "BAM_50G_CR2",
   6731     "BAM_50G_CR4",
   6732     "BAM_50G_KR2",
   6733     "BAM_50G_KR4",
   6734     "BASE_100G_CR4",
   6735     "BASE_100G_KR2_CR2_EN",
   6736     "BASE_100G_KR2_CR2_SEL",
   6737     "BASE_100G_KR4",
   6738     "BASE_10G_KR1",
   6739     "BASE_200G_KR4_CR4_EN",
   6740     "BASE_200G_KR4_CR4_SEL",
   6741     "BASE_25G_BASE_R_FEC_REQ",
   6742     "BASE_25G_CRS_KRS",
   6743     "BASE_25G_CR_KR",
   6744     "BASE_25G_RS_FEC_REQ",
   6745     "BASE_40G_CR4",
   6746     "BASE_40G_KR4",
   6747     "BASE_50G_KR_CR_EN",
   6748     "BASE_50G_KR_CR_SEL",
   6749     "BASE_TS_NS_0",
   6750     "BASE_TS_NS_1",
   6751     "BASE_TS_NS_2",
   6752     "BASE_TS_NS_3",
   6753     "BASE_TS_NS_4",
   6754     "BASE_TS_SUB_NS_0",
   6755     "BASE_TS_SUB_NS_1",
   6756     "BASE_TS_SUB_NS_2",
   6757     "BASE_TS_SUB_NS_3",
   6758     "BASE_TS_SUB_NS_4",
   6759     "BC_DEC_ALIGN_CHECK_SEC_EN",
   6760     "BC_DEC_ALIGN_SEARCH_MANUAL_TIMER_DONE",
   6761     "BC_DEC_ALIGN_TIMER_CNT",
   6762     "BC_DEC_ALIGN_TIMER_MODE",
   6763     "BC_DEC_EN",
   6764     "BC_DEC_FRM_LEN_SEL",
   6765     "BC_DEC_FRM_PAT",
   6766     "BC_DEC_INTR",
   6767     "BC_DEC_INTR_FRC_LOCK",
   6768     "BC_DEC_INTR_FRC_MSG_LSB_READY",
   6769     "BC_DEC_INTR_FRC_MSG_MSB_READY",
   6770     "BC_DEC_INTR_FRC_OOL",
   6771     "BC_DEC_INTR_LOCK",
   6772     "BC_DEC_INTR_MASK_LOCK",
   6773     "BC_DEC_INTR_MASK_MSG_LSB_READY",
   6774     "BC_DEC_INTR_MASK_MSG_MSB_READY",
   6775     "BC_DEC_INTR_MASK_OOL",
   6776     "BC_DEC_INTR_MSG_LSB_READY",
   6777     "BC_DEC_INTR_MSG_MSB_READY",
   6778     "BC_DEC_INTR_OOL",
   6779     "BC_DEC_LOCK",
   6780     "BC_DEC_LOCK_CNT",
   6781     "BC_DEC_MSG_CONS_CNT",
   6782     "BC_DEC_MSG_LSB",
   6783     "BC_DEC_MSG_LSB_READY",
   6784     "BC_DEC_MSG_MSB",
   6785     "BC_DEC_MSG_MSB_READY",
   6786     "BC_DEC_MSG_TYPE_CNT",
   6787     "BC_DEC_MSG_TYPE_CNT_READY",
   6788     "BC_DEC_MSG_TYPE_MODE",
   6789     "BC_DEC_OOL",
   6790     "BC_DEC_OOL_CNT",
   6791     "BC_DEC_REFRAME_EN",
   6792     "BC_DEC_SM_STATE",
   6793     "BC_DEC_SM_STATE_ONE_HOT",
   6794     "BC_ENC_DATA_LSB",
   6795     "BC_ENC_DATA_MSB",
   6796     "BC_ENC_DATA_SENT",
   6797     "BC_ENC_EN",
   6798     "BC_ENC_ERR_INS_EN",
   6799     "BC_ENC_FRM_LEN_SEL",
   6800     "BC_ENC_UPDATE",
   6801     "BERMON_HISTORY_STATE",
   6802     "BER_HO",
   6803     "BER_LO",
   6804     "BIP_ERROR_COUNT_0",
   6805     "BIP_ERROR_COUNT_1",
   6806     "BIP_ERROR_COUNT_2",
   6807     "BIP_ERROR_COUNT_3",
   6808     "BIP_ERROR_COUNT_4",
   6809     "BLOCK_LOCK_LH_0",
   6810     "BLOCK_LOCK_LH_1",
   6811     "BLOCK_LOCK_LH_2",
   6812     "BLOCK_LOCK_LH_3",
   6813     "BLOCK_LOCK_LH_4",
   6814     "BLOCK_LOCK_LL_0",
   6815     "BLOCK_LOCK_LL_1",
   6816     "BLOCK_LOCK_LL_2",
   6817     "BLOCK_LOCK_LL_3",
   6818     "BLOCK_LOCK_LL_4",
   6819     "BLW_2X_MODE",
   6820     "BLW_EN",
   6821     "BLW_GAIN",
   6822     "BLW_GAIN_FRC",
   6823     "BLW_GAIN_FRC_VAL",
   6824     "BLW_GAIN_FRZ",
   6825     "BLW_GAIN_SAT_HIGH",
   6826     "BLW_GAIN_SAT_LOW",
   6827     "BLW_GAIN_SCALE",
   6828     "BLW_LMS_MU",
   6829     "BLW_LPF_COEF_EXP",
   6830     "BLW_LPF_COEF_MANT",
   6831     "BLW_MAX_AMP",
   6832     "BLW_MAX_AMP_CLR",
   6833     "BLW_MAX_AMP_SEL",
   6834     "BLW_MU_DLY_MODE",
   6835     "BLW_OUTPUT_INVERT",
   6836     "BLW_OUTPUT_SCALE",
   6837     "BLW_PHASE_SLICER_INVERT",
   6838     "BLW_RESET",
   6839     "BLW_SPARE_CNTL_0",
   6840     "BLW_TRNSUM_SEL",
   6841     "BONDING",
   6842     "BR_PD_EN",
   6843     "BS_PMD_LOCK",
   6844     "BS_STATUS",
   6845     "BURST_ERR_STATUSH_STREAM0",
   6846     "BURST_ERR_STATUSL_STREAM0",
   6847     "BURST_ERR_STATUS_MODE",
   6848     "CAP_CNT_MASK_EN",
   6849     "CAP_DONE",
   6850     "CAP_DONE_LH_LL",
   6851     "CAP_FORCE_SLOWDOWN",
   6852     "CAP_FORCE_SLOWDOWN_EN",
   6853     "CAP_PASS",
   6854     "CAP_PASS_LH_LL",
   6855     "CAP_RESTART",
   6856     "CAP_RETRY_EN",
   6857     "CAP_SELECT",
   6858     "CAP_SELECT_M",
   6859     "CAP_SELECT_M_EN",
   6860     "CAP_SEQ_CYA",
   6861     "CDR_1G_FORCE_EN",
   6862     "CDR_1G_MANUAL_MODE",
   6863     "CDR_1G_MANUAL_STROBE",
   6864     "CDR_1G_PHASE_POINTER",
   6865     "CDR_1G_SWAP_PZ",
   6866     "CDR_BWSEL_INTEG_ACQCDR",
   6867     "CDR_BWSEL_INTEG_EEE_ACQCDR",
   6868     "CDR_BWSEL_INTEG_NORM",
   6869     "CDR_BWSEL_PROP_ACQCDR",
   6870     "CDR_BWSEL_PROP_EEE_ACQCDR",
   6871     "CDR_BWSEL_PROP_NORM",
   6872     "CDR_FREQ_EN",
   6873     "CDR_FREQ_OVERRIDE_EN",
   6874     "CDR_FREQ_OVERRIDE_VAL",
   6875     "CDR_FRZ_FRC",
   6876     "CDR_FRZ_FRC_VAL",
   6877     "CDR_HS_FREEZE",
   6878     "CDR_INTEG_REG",
   6879     "CDR_INTEG_REG_CLR",
   6880     "CDR_INTEG_SAT_SEL",
   6881     "CDR_LM_OUTOFLOCK",
   6882     "CDR_LM_THR_SEL",
   6883     "CDR_PHASE_ERROR",
   6884     "CDR_PHASE_ERR_FRZ",
   6885     "CDR_PHASE_ERR_PICNT",
   6886     "CDR_PHASE_SAT_CTRL",
   6887     "CDR_PHASE_SEL",
   6888     "CDR_POWER_OPT_CLOCK_GATE_EN",
   6889     "CDR_PROP_BW_EXTEND",
   6890     "CDR_SETTLE_TIMEOUT",
   6891     "CDR_VCO_REG",
   6892     "CDR_ZERO_POLARITY",
   6893     "CL49_BER_COUNT",
   6894     "CL49_LTXSM_STATE",
   6895     "CL49_RXSM_HISTORY_STATE",
   6896     "CL49_SCRIDLE_TEST_ERR",
   6897     "CL49_TX_FAULT_DET",
   6898     "CL72_TIMER_EN",
   6899     "CL73_AN_COMPLETE",
   6900     "CL73_AN_RESTART",
   6901     "CL73_BAM_CODE",
   6902     "CL73_BAM_ENABLE",
   6903     "CL73_BASE_SELECTOR",
   6904     "CL73_BREAK_TIMER_PERIOD",
   6905     "CL73_ENABLE",
   6906     "CL73_ERROR_TIMER_PERIOD",
   6907     "CL73_FIFO_FULL",
   6908     "CL73_NONCE_MATCH_OVER",
   6909     "CL73_NONCE_MATCH_VAL",
   6910     "CL73_PAGE_TEST_MAX_TIMER",
   6911     "CL73_PAGE_TEST_MIN_TIMER",
   6912     "CL73_PAUSE",
   6913     "CL73_REMOTE_FAULT",
   6914     "CL74_REQ",
   6915     "CL82_SCRIDLE_TEST_ERR",
   6916     "CLAUSE22",
   6917     "CLK4SYNC_DIV2_COMCLK_SEL",
   6918     "CLK4SYNC_DIV2_EN",
   6919     "CLK4SYNC_DIV2_LOC",
   6920     "CLK4SYNC_DIV2_LOC_MON_EN",
   6921     "CLK4SYNC_DIV2_S_COMCLK_FRC_ON",
   6922     "CLK4SYNC_DIV2_S_COMCLK_SEL",
   6923     "CLK4SYNC_DIV2_VCO_SELECT",
   6924     "CLK_TRANS_MISS",
   6925     "CNT_BIN_D",
   6926     "CNT_BIN_DQ",
   6927     "CNT_BIN_D_LD",
   6928     "CNT_BIN_D_PD",
   6929     "CNT_BIN_D_PERR",
   6930     "CNT_BIN_L",
   6931     "CNT_BIN_LQ",
   6932     "CNT_BIN_L_LD",
   6933     "CNT_BIN_P",
   6934     "CNT_BIN_PQ",
   6935     "CNT_BIN_P_PD",
   6936     "COMMON_MRKR_SPACING_ERR_LATCH_FECL_0",
   6937     "COMMON_MRKR_SPACING_ERR_LATCH_FECL_1",
   6938     "COMPLETE_ACK",
   6939     "CONSISTENCY_MISMATCH",
   6940     "CORCOUNTH_STREAM0",
   6941     "CORCOUNTL_STREAM0",
   6942     "CORE_DP_H_RSTB",
   6943     "CORE_DP_H_RSTB_OEN",
   6944     "CORE_DP_RESET_STATE",
   6945     "CORE_DP_S_RSTB",
   6946     "CORE_HW_FW_HANDSHAKE_DISABLE",
   6947     "CORE_MODE_SPARE",
   6948     "CORE_MODE_SPEED_ID",
   6949     "CORE_REG_RESET_OCCURRED",
   6950     "CORE_S_RSTB",
   6951     "CORRUPTION_PERIOD",
   6952     "CREDIT_EN",
   6953     "CW_BAD_ENABLE",
   6954     "DAC_TEST_LANE_SEL_EN",
   6955     "DAC_TEST_MEM_TM",
   6956     "DAC_TEST_MEM_WRITE_PULSE",
   6957     "DAC_TEST_READBACK_ADDRESS",
   6958     "DAC_TEST_READBACK_DATA_0",
   6959     "DAC_TEST_READBACK_DATA_1",
   6960     "DAC_TEST_READBACK_DATA_2",
   6961     "DAC_TEST_READBACK_DATA_3",
   6962     "DAC_TEST_READBACK_DATA_4",
   6963     "DAC_TEST_READBACK_DATA_5",
   6964     "DAC_TEST_READBACK_DATA_6",
   6965     "DAC_TEST_READBACK_DATA_7",
   6966     "DAC_TEST_READBACK_DATA_8",
   6967     "DAC_TEST_READBACK_EN",
   6968     "DAC_TEST_READ_EN",
   6969     "DAC_TEST_TEST_EN",
   6970     "DBG_CAP_STATE_ONE_HOT",
   6971     "DBG_ENABLE",
   6972     "DBG_ERRH_STREAM0",
   6973     "DBG_ERRL_STREAM0",
   6974     "DBG_ERR_MODE",
   6975     "DBG_FDBCK",
   6976     "DBG_MASK_DIG_LPBK_EN",
   6977     "DBG_PLL_STATE_ONE_HOT",
   6978     "DBG_PMD_RX_LOCK",
   6979     "DBG_PMD_RX_LOCK_CHANGE",
   6980     "DBG_SLOWDN",
   6981     "DBG_SLOWDN_CHANGE",
   6982     "DC_OFFSET_BIN",
   6983     "DC_OFFS_ACC_CLR",
   6984     "DC_OFFS_BLW_PHASE_SEL",
   6985     "DC_OFFS_DAC_8B_EN",
   6986     "DC_OFFS_DAC_INTEG_EN",
   6987     "DC_OFFS_EN",
   6988     "DC_OFFS_GAIN",
   6989     "DC_OFFS_GRADIENT_INVERT",
   6990     "DC_OFFS_HYS_EN",
   6991     "DC_OFFS_HYS_MAG",
   6992     "DC_OFFS_INT_READ_EN",
   6993     "DC_OFFS_WRITE_EN",
   6994     "DC_OFFS_WRITE_FRC_EN",
   6995     "DC_OFFS_WRITE_VAL",
   6996     "DEC_17B_BURST_GAP_COUNT",
   6997     "DEC_18B_BURST_GAP_COUNT",
   6998     "DEC_19B_BURST_GAP_COUNT",
   6999     "DEC_GAP_COUNT_MODE",
   7000     "DEC_MAX_PM",
   7001     "DEC_PM_MODE",
   7002     "DEC_SEARCH_EN",
   7003     "DESKEW_HIS_STATE",
   7004     "DESKEW_STATUS_LH",
   7005     "DESKEW_STATUS_LL",
   7006     "DESKEW_TS_INFO_VALID_0",
   7007     "DESKEW_TS_INFO_VALID_1",
   7008     "DESKEW_TS_INFO_VALID_2",
   7009     "DESKEW_TS_INFO_VALID_3",
   7010     "DESKEW_TS_INFO_VALID_4",
   7011     "DIG_LPBK_EN",
   7012     "DIG_LPBK_PD_BIAS_EN",
   7013     "DIG_LPBK_PD_EARLY_IND",
   7014     "DIG_LPBK_PD_FLT_BYPASS",
   7015     "DIG_LPBK_PD_LATE_IND",
   7016     "DIG_LPBK_PD_MODE",
   7017     "DISABLE_ACK_TIMEOUT",
   7018     "DISABLE_REMOTE_FAULT",
   7019     "DME_LOCKED",
   7020     "DME_MV_PAIR",
   7021     "DME_PAGE",
   7022     "DME_STATE",
   7023     "DP_RESET_TX_DISABLE_DIS",
   7024     "DSC_CLR_FRC",
   7025     "DSC_CLR_FRC_VAL",
   7026     "DSC_SM_GP_UC_REQ",
   7027     "DSC_SM_READY_FOR_CMD",
   7028     "DSC_SM_SCRATCH",
   7029     "DSC_STATE",
   7030     "DSC_STATE_EEE_ONE_HOT",
   7031     "DSC_STATE_ONE_HOT",
   7032     "DSC_TIMEOUT_MULT",
   7033     "DTE_XS",
   7034     "ECC_1B_ERR_INTR_EN_AM_TBL",
   7035     "ECC_1B_ERR_INTR_EN_BASE_R_FEC",
   7036     "ECC_1B_ERR_INTR_EN_DESKEW",
   7037     "ECC_1B_ERR_INTR_EN_RSFEC_RBUF_MPP",
   7038     "ECC_1B_ERR_INTR_EN_RSFEC_RS400G_MPP",
   7039     "ECC_1B_ERR_INTR_EN_RX_1588_400G",
   7040     "ECC_1B_ERR_INTR_EN_RX_1588_MPP",
   7041     "ECC_1B_ERR_INTR_EN_SPD_TBL",
   7042     "ECC_1B_ERR_INTR_EN_TX_1588_400G",
   7043     "ECC_1B_ERR_INTR_EN_TX_1588_MPP",
   7044     "ECC_1B_ERR_INTR_EN_UM_TBL",
   7045     "ECC_2B_ERR_INTR_EN_AM_TBL",
   7046     "ECC_2B_ERR_INTR_EN_BASE_R_FEC",
   7047     "ECC_2B_ERR_INTR_EN_DESKEW",
   7048     "ECC_2B_ERR_INTR_EN_RSFEC_RBUF_MPP",
   7049     "ECC_2B_ERR_INTR_EN_RSFEC_RS400G_MPP",
   7050     "ECC_2B_ERR_INTR_EN_RX_1588_400G",
   7051     "ECC_2B_ERR_INTR_EN_RX_1588_MPP",
   7052     "ECC_2B_ERR_INTR_EN_SPD_TBL",
   7053     "ECC_2B_ERR_INTR_EN_TX_1588_400G",
   7054     "ECC_2B_ERR_INTR_EN_TX_1588_MPP",
   7055     "ECC_2B_ERR_INTR_EN_UM_TBL",
   7056     "ECC_CORRUPT_AM_TBL",
   7057     "ECC_CORRUPT_BASE_R_FEC",
   7058     "ECC_CORRUPT_DESKEW",
   7059     "ECC_CORRUPT_RSFEC_RBUF_MPP",
   7060     "ECC_CORRUPT_RSFEC_RS400G_MPP",
   7061     "ECC_CORRUPT_RX_1588_400G",
   7062     "ECC_CORRUPT_RX_1588_MPP",
   7063     "ECC_CORRUPT_SPD_TBL",
   7064     "ECC_CORRUPT_TX_1588_400G",
   7065     "ECC_CORRUPT_TX_1588_MPP",
   7066     "ECC_CORRUPT_UM_TBL",
   7067     "ECC_DISABLE_AM_TBL",
   7068     "ECC_DISABLE_BASE_R_FEC",
   7069     "ECC_DISABLE_DESKEW",
   7070     "ECC_DISABLE_RSFEC_RBUF_MPP",
   7071     "ECC_DISABLE_RSFEC_RS400G_MPP",
   7072     "ECC_DISABLE_RX_1588_400G",
   7073     "ECC_DISABLE_RX_1588_MPP",
   7074     "ECC_DISABLE_SPD_TBL",
   7075     "ECC_DISABLE_TX_1588_400G",
   7076     "ECC_DISABLE_TX_1588_MPP",
   7077     "ECC_DISABLE_UM_TBL",
   7078     "EEE_ACQ_CDR_TIMEOUT",
   7079     "EEE_ANA_PWR_TIMEOUT",
   7080     "EEE_CDR_SETTLE_TIMEOUT",
   7081     "EEE_HW_TUNE_TIMEOUT",
   7082     "EEE_LFSR_CNT",
   7083     "EEE_MEASURE_CNT",
   7084     "EEE_MEASURE_EN",
   7085     "EEE_MODE_EN",
   7086     "EEE_PHASE_ERR_OFFSET",
   7087     "EEE_PHASE_ERR_OFFSET_EN",
   7088     "EEE_QUIET_FROM_EEE_STATES",
   7089     "EEE_QUIET_RX_AFE_PWRDWN_VAL",
   7090     "ENABLE_TX_LANE",
   7091     "ENERGY_DETECT",
   7092     "ENERGY_DETECT_CHANGE",
   7093     "ENERGY_DETECT_FRC",
   7094     "ENERGY_DETECT_FRC_VAL",
   7095     "ENERGY_DETECT_MASK_COUNT",
   7096     "ERRORED_BLOCKS_HO",
   7097     "ERRORED_BLOCKS_HO_PRESENT",
   7098     "ERROR_MASK_15_0",
   7099     "ERROR_MASK_31_16",
   7100     "ERROR_MASK_47_32",
   7101     "ERROR_MASK_63_48",
   7102     "ERROR_MASK_79_64",
   7103     "ERROR_STATE",
   7104     "ERR_EVENT_ADDRESS_AM_TBL",
   7105     "ERR_EVENT_ADDRESS_RX_1588_400G",
   7106     "ERR_EVENT_ADDRESS_RX_1588_MPP",
   7107     "ERR_EVENT_ADDRESS_SPD_TBL",
   7108     "ERR_EVENT_ADDRESS_TX_1588_400G",
   7109     "ERR_EVENT_ADDRESS_TX_1588_MPP",
   7110     "ERR_EVENT_ADDRESS_UM_TBL",
   7111     "EXT_LOS_EN",
   7112     "EXT_LOS_INV",
   7113     "EXT_SIGDET",
   7114     "EXT_SIGDET_CHANGE",
   7115     "FAST_SEARCH_MODE",
   7116     "FCLK_FRAC_NS",
   7117     "FEC_ALIGN_STATUS_LH",
   7118     "FEC_ALIGN_STATUS_LIVE",
   7119     "FEC_ALIGN_STATUS_LL",
   7120     "FEC_ERROR_CODE_ALL",
   7121     "FEC_ERR_ENABLE",
   7122     "FEC_REQ",
   7123     "FEC_SYMBOL_ERROR_COUNTER_LOWER_0",
   7124     "FEC_SYMBOL_ERROR_COUNTER_LOWER_1",
   7125     "FEC_SYMBOL_ERROR_COUNTER_LOWER_2",
   7126     "FEC_SYMBOL_ERROR_COUNTER_LOWER_3",
   7127     "FEC_SYMBOL_ERROR_COUNTER_UPPER_0",
   7128     "FEC_SYMBOL_ERROR_COUNTER_UPPER_1",
   7129     "FEC_SYMBOL_ERROR_COUNTER_UPPER_2",
   7130     "FEC_SYMBOL_ERROR_COUNTER_UPPER_3",
   7131     "FREQ_DET_RESTART_EN",
   7132     "FREQ_DET_RETRY_EN",
   7133     "FREQ_DONE_SM",
   7134     "FREQ_DONE_SM_LH_LL",
   7135     "FREQ_MONITOR_EN",
   7136     "FREQ_PASS_SM",
   7137     "FREQ_PASS_SM_LH_LL",
   7138     "FREQ_UPD_EN_FRC",
   7139     "FREQ_UPD_EN_FRC_VAL",
   7140     "GLASTEST_ADJ",
   7141     "GLASTEST_DAT_15_0",
   7142     "GLASTEST_DAT_31_16",
   7143     "GLASTEST_DAT_47_32",
   7144     "GLASTEST_DAT_51_48",
   7145     "GLASTEST_EN",
   7146     "GLASTEST_EXP_15_0",
   7147     "GLASTEST_EXP_31_16",
   7148     "GLASTEST_EXP_47_32",
   7149     "GLASTEST_EXP_51_48",
   7150     "GLASTEST_ID",
   7151     "GLASTEST_ONESHOT",
   7152     "GLAS_TPMA_CAPTURE_ADJ_0",
   7153     "GLAS_TPMA_CAPTURE_ADJ_1",
   7154     "GLAS_TPMA_CAPTURE_ADJ_2",
   7155     "GLAS_TPMA_CAPTURE_ADJ_3",
   7156     "GLAS_TPMA_CAPTURE_ADJ_4",
   7157     "GLAS_TPMA_CAPTURE_ADJ_5",
   7158     "GLAS_TPMA_CAPTURE_ADJ_6",
   7159     "GLAS_TPMA_CAPTURE_ADJ_7",
   7160     "GLAS_TPMA_CAPTURE_DATA_0",
   7161     "GLAS_TPMA_CAPTURE_DATA_1",
   7162     "GLAS_TPMA_CAPTURE_DATA_2",
   7163     "GLAS_TPMA_CAPTURE_DATA_3",
   7164     "GLAS_TPMA_CAPTURE_DATA_4",
   7165     "GLAS_TPMA_CAPTURE_DATA_5",
   7166     "GLAS_TPMA_CAPTURE_DATA_6",
   7167     "GLAS_TPMA_CAPTURE_DATA_7",
   7168     "GLAS_TPMA_CAPTURE_EN",
   7169     "GLAS_TPMA_CAPTURE_LOGICAL",
   7170     "GLAS_TPMA_CAPTURE_MASK",
   7171     "GOOD_PARITY_CNT",
   7172     "HEARTBEAT_COUNT_1US",
   7173     "HISTORY_RXSM_STATE",
   7174     "HI_BER_LH",
   7175     "HI_BER_LL",
   7176     "HI_SER_LH",
   7177     "HI_SER_LIVE",
   7178     "HI_SER_LL",
   7179     "HOFFS_JGEN_EN",
   7180     "HOFFS_JGEN_JIT_AMP",
   7181     "HOFFS_JGEN_JIT_FREQ_IDX",
   7182     "HOLD_LOS_COUNT",
   7183     "HOLD_SD_COUNT",
   7184     "HP_MODE",
   7185     "HW_FW_HANDSHAKE_DISABLE",
   7186     "HW_LI_IN_RL_MODE",
   7187     "HW_TUNE_EN",
   7188     "HW_TUNE_TIMEOUT",
   7189     "IEEE_ERRORED_BLOCKS",
   7190     "IGNORE_LINK_TIMER_PERIOD",
   7191     "IGNORE_LINK_TIMER_PERIOD_PAM4",
   7192     "IGNORE_LP_MODE",
   7193     "IGNORE_RX_MODE",
   7194     "ILKN_SEL",
   7195     "INT_PORT0",
   7196     "INT_PORT0_MASK",
   7197     "INT_PORT1",
   7198     "INT_PORT1_MASK",
   7199     "INT_PORT2",
   7200     "INT_PORT2_MASK",
   7201     "INT_PORT3",
   7202     "INT_PORT3_MASK",
   7203     "INVALID_PARITY_CNT",
   7204     "LANE0_DEBUG_INFO",
   7205     "LANE1_DEBUG_INFO",
   7206     "LANE2_DEBUG_INFO",
   7207     "LANE3_DEBUG_INFO",
   7208     "LANE4_DEBUG_INFO",
   7209     "LANE_CFG_FWAPI_DATA0",
   7210     "LANE_CFG_FWAPI_DATA1",
   7211     "LANE_DP_RESET_STATE",
   7212     "LANE_MODE",
   7213     "LANE_MODE_OEN",
   7214     "LANE_REG_RESET_OCCURRED",
   7215     "LANE_RESET_RELEASED",
   7216     "LANE_RESET_RELEASED_INDEX",
   7217     "LD_CONTROL_VALID",
   7218     "LD_PAGE_0",
   7219     "LD_PAGE_1",
   7220     "LD_PAGE_2",
   7221     "LD_SEQ_RESTART",
   7222     "LINKFAILTIMERQUAL_EN",
   7223     "LINKFAILTIMER_DIS",
   7224     "LINKTRN_ASYNC_PPM_ADJUST",
   7225     "LINKTRN_BAD_MARKER_CNT",
   7226     "LINKTRN_BLOCK_LP_IEEE_UPDATES",
   7227     "LINKTRN_BRK_RING_OSC",
   7228     "LINKTRN_CL93PRBS_POLY_SEL",
   7229     "LINKTRN_DIS_MAX_WAIT_TIMER",
   7230     "LINKTRN_DME_CELL_BOUNDARY_CHK",
   7231     "LINKTRN_FFLOCK_DERR_CONSEC_FCNT",
   7232     "LINKTRN_FFLOCK_DERR_PER_FCNT",
   7233     "LINKTRN_FRAME_CONSISTENCY_CHK_EN",
   7234     "LINKTRN_FRAME_LOCK",
   7235     "LINKTRN_FRAME_LOCK_LH",
   7236     "LINKTRN_FRAME_LOCK_LL",
   7237     "LINKTRN_GOOD_MARKER_CNT",
   7238     "LINKTRN_IEEE_FRAME_LOCK",
   7239     "LINKTRN_IEEE_LD_COEFF_UPDATE",
   7240     "LINKTRN_IEEE_LD_STATUS_REPORT",
   7241     "LINKTRN_IEEE_LP_COEFF_UPDATE",
   7242     "LINKTRN_IEEE_LP_STATUS_REPORT",
   7243     "LINKTRN_IEEE_RECEIVER_STATUS",
   7244     "LINKTRN_IEEE_RESTART_TRAINING",
   7245     "LINKTRN_IEEE_TRAINING_ENABLE",
   7246     "LINKTRN_IEEE_TRAINING_FAILURE",
   7247     "LINKTRN_IEEE_TRAINING_STATUS",
   7248     "LINKTRN_IGNORE_XMT_REG_VALUE",
   7249     "LINKTRN_LD_XMT_STATUS_PAGE",
   7250     "LINKTRN_LOCAL_RX_READY",
   7251     "LINKTRN_MICRO_FFLOCK_INT_EN",
   7252     "LINKTRN_MICRO_FFLOCK_LSTATUS",
   7253     "LINKTRN_MICRO_FRAME_LOCK_INT_EN",
   7254     "LINKTRN_MICRO_FRAME_LOCK_LSTATUS",
   7255     "LINKTRN_MICRO_INTERRUPT_MASK_CONTROL_PAGE",
   7256     "LINKTRN_MICRO_INTERRUPT_MASK_STATUS_PAGE",
   7257     "LINKTRN_MICRO_STATUS_CHG_INT_EN",
   7258     "LINKTRN_MICRO_STATUS_CHG_LSTATUS",
   7259     "LINKTRN_MICRO_STATUS_RESP_INT_FRC",
   7260     "LINKTRN_MICRO_STATUS_RESP_INT_FRC_VAL",
   7261     "LINKTRN_MICRO_UPDATE_CHG_INT_EN",
   7262     "LINKTRN_MICRO_UPDATE_CHG_LSTATUS",
   7263     "LINKTRN_MICRO_UPDATE_REQ_INT_FRC",
   7264     "LINKTRN_MICRO_UPDATE_REQ_INT_FRC_VAL",
   7265     "LINKTRN_PAM4M_GRAYCODER_EN_FRC",
   7266     "LINKTRN_PAM4M_GRAYCODER_EN_FRC_VAL",
   7267     "LINKTRN_PAM4M_PRBS_REPL_MODE",
   7268     "LINKTRN_PAM4M_PRECODER_EN",
   7269     "LINKTRN_PAM4M_SYM_SEL",
   7270     "LINKTRN_PAM4_SYMBOL_BIT_SWAP",
   7271     "LINKTRN_PPM_OFFSET_EN",
   7272     "LINKTRN_PRBS13_POLY_SEL",
   7273     "LINKTRN_PRBS13_SEED_VAL",
   7274     "LINKTRN_PRBS_MODE_SEL",
   7275     "LINKTRN_PRBS_SEED_SEL",
   7276     "LINKTRN_PRBS_SEED_VAL",
   7277     "LINKTRN_RCV_COEFF_UPDATE_PARITY",
   7278     "LINKTRN_RCV_STATUS_REPORT_PARITY",
   7279     "LINKTRN_REMOTE_RX_READY",
   7280     "LINKTRN_RX_ACTIVE",
   7281     "LINKTRN_RX_DP_LN_CLK_EN",
   7282     "LINKTRN_RX_PAM4_TRN_FRAME_SIZE",
   7283     "LINKTRN_RX_PRBS_CHK_AUTO_DETECT_EN",
   7284     "LINKTRN_RX_PRBS_CHK_AUTO_DETECT_LOCK",
   7285     "LINKTRN_RX_PRBS_CHK_AUTO_DETECT_RELOCK_EN",
   7286     "LINKTRN_RX_PRBS_CHK_EN",
   7287     "LINKTRN_RX_PRBS_CHK_MODE_SEL",
   7288     "LINKTRN_RX_PRBS_CHK_MODE_SEL_AUTO_DETECT",
   7289     "LINKTRN_RX_SIGNAL_OK",
   7290     "LINKTRN_RX_SIGNDATA_SEL",
   7291     "LINKTRN_RX_TRAINING_EN",
   7292     "LINKTRN_RX_TRN_MODE",
   7293     "LINKTRN_SM_CURRENT_STATE",
   7294     "LINKTRN_STRICT_DME_CHK",
   7295     "LINKTRN_STRICT_MARKER_CHK",
   7296     "LINKTRN_SW_FRAME_LOCK",
   7297     "LINKTRN_SW_REMOTE_RX_READY",
   7298     "LINKTRN_SW_RX_TRAINED",
   7299     "LINKTRN_TIMER_VALUE_SEL",
   7300     "LINKTRN_TRAINING_FSM_SIGNAL_DETECT",
   7301     "LINKTRN_TR_COARSE_LOCK",
   7302     "LINKTRN_TX_DP_LN_CLK_EN",
   7303     "LINKTRN_TX_PAM4_TRN_FRAME_SIZE",
   7304     "LINKTRN_TX_TRN_MODE",
   7305     "LINKTRN_USEDME_MARKER_CHK",
   7306     "LINKTRN_XMT_COEFF_UPDATE_PARITY",
   7307     "LINKTRN_XMT_STATUS_REPORT_PARITY",
   7308     "LINKTRN_XMT_UPDATE_PAGE",
   7309     "LINK_FAIL_INHIBIT_TIMER_CL72_PERIOD",
   7310     "LINK_FAIL_INHIBIT_TIMER_CL72_PERIOD_PAM4",
   7311     "LINK_FAIL_INHIBIT_TIMER_NCL72_PERIOD",
   7312     "LINK_FAIL_INHIBIT_TIMER_NCL72_PERIOD_PAM4",
   7313     "LINK_INTERRUPT_LH",
   7314     "LINK_STATUS_LH",
   7315     "LINK_STATUS_LL",
   7316     "LMS_RND_THRESH1",
   7317     "LMS_RND_THRESH10",
   7318     "LMS_RND_THRESH11",
   7319     "LMS_RND_THRESH12",
   7320     "LMS_RND_THRESH2",
   7321     "LMS_RND_THRESH3",
   7322     "LMS_RND_THRESH4",
   7323     "LMS_RND_THRESH5",
   7324     "LMS_RND_THRESH6",
   7325     "LMS_RND_THRESH7",
   7326     "LMS_RND_THRESH8",
   7327     "LMS_RND_THRESH9",
   7328     "LMS_THRESH_ACC_CLR",
   7329     "LMS_THRESH_BIN",
   7330     "LMS_THRESH_EN",
   7331     "LMS_THRESH_GAIN",
   7332     "LMS_THRESH_GRADIENT_INVERT",
   7333     "LMS_THRESH_HYS_EN",
   7334     "LMS_THRESH_HYS_MAG",
   7335     "LMS_THRESH_OFFS",
   7336     "LN_DP_H_RSTB",
   7337     "LN_DP_H_RSTB_OEN",
   7338     "LN_DP_S_RSTB",
   7339     "LN_H_RSTB",
   7340     "LN_RX_DP_S_RSTB",
   7341     "LN_RX_H_PWRDN",
   7342     "LN_RX_S_CLKGATE_FRC_ON",
   7343     "LN_RX_S_COMCLK_FRC_ON",
   7344     "LN_RX_S_COMCLK_SEL",
   7345     "LN_RX_S_PWRDN",
   7346     "LN_RX_S_RSTB",
   7347     "LN_S_RSTB",
   7348     "LN_TX_DP_S_RSTB",
   7349     "LN_TX_H_PWRDN",
   7350     "LN_TX_S_CLKGATE_FRC_ON",
   7351     "LN_TX_S_COMCLK_FRC_ON",
   7352     "LN_TX_S_COMCLK_SEL",
   7353     "LN_TX_S_PWRDN",
   7354     "LN_TX_S_RSTB",
   7355     "LOCAL_FAULT_LH",
   7356     "LOGICAL_TO_PHYSICAL0_SEL",
   7357     "LOGICAL_TO_PHYSICAL1_SEL",
   7358     "LOGICAL_TO_PHYSICAL2_SEL",
   7359     "LOGICAL_TO_PHYSICAL3_SEL",
   7360     "LOST_PLL_LOCK_SM",
   7361     "LOS_FILTER_COUNT",
   7362     "LOS_THRESH",
   7363     "LPI_ENABLE",
   7364     "LPI_RECEIVED_LH",
   7365     "LP_BASE1",
   7366     "LP_BASE2",
   7367     "LP_BASE3",
   7368     "LP_PAGE_0",
   7369     "LP_PAGE_1",
   7370     "LP_PAGE_2",
   7371     "LP_PAGE_RDY",
   7372     "LP_PAGE_RDY_EN",
   7373     "LP_PAGE_RDY_INT",
   7374     "LTXSM_STATE",
   7375     "MASKDATA",
   7376     "MASKDATA_BUS_ASSIGN",
   7377     "MAX_PRBS_BURST_ERR_LENGTH_STATUS",
   7378     "MDIO_AER",
   7379     "MDIO_BRCST_PORT_ADDR",
   7380     "MDIO_DEV_AN_EN",
   7381     "MDIO_DEV_DTE_EN",
   7382     "MDIO_DEV_ID0_EN",
   7383     "MDIO_DEV_PCS_EN",
   7384     "MDIO_DEV_PHY_EN",
   7385     "MDIO_DEV_PMD_EN",
   7386     "MDIO_DRV_COMCLK",
   7387     "MDIO_FAST_MODE_FRC",
   7388     "MDIO_FAST_MODE_FRC_VAL",
   7389     "MDIO_MULTI_MMDS_EN",
   7390     "MDIO_MULTI_PRTS_EN",
   7391     "MEASURE_LFSR_CNT",
   7392     "MEASURE_TIMEOUT",
   7393     "MEAS_INCOMPLETE",
   7394     "MICRO_AUTOINC_RDADDR_EN",
   7395     "MICRO_AUTOINC_WRADDR_EN",
   7396     "MICRO_CLK_COMCLK_SEL",
   7397     "MICRO_CLK_LOC",
   7398     "MICRO_CLK_LOC_MON_EN",
   7399     "MICRO_CLK_S_COMCLK_FRC_ON",
   7400     "MICRO_CLK_S_COMCLK_SEL",
   7401     "MICRO_CLK_VCO_DIV",
   7402     "MICRO_CLK_VCO_SELECT",
   7403     "MICRO_CORE_CFG_FWAPI_DATA0",
   7404     "MICRO_CORE_CFG_FWAPI_DATA1",
   7405     "MICRO_CORE_CLK_EN",
   7406     "MICRO_CORE_LN_SEL",
   7407     "MICRO_CORE_RSTB",
   7408     "MICRO_CORE_STACK_EN",
   7409     "MICRO_CORE_STACK_SIZE",
   7410     "MICRO_CR_ACCESS_EN",
   7411     "MICRO_CR_CRC_CALC_EN",
   7412     "MICRO_CR_CRC_CHECKSUM",
   7413     "MICRO_CR_CRC_INIT",
   7414     "MICRO_CR_CRC_PRTSEL",
   7415     "MICRO_CR_DATA_SIZE",
   7416     "MICRO_CR_ECCG_MODE",
   7417     "MICRO_CR_ECC_CORRUPT",
   7418     "MICRO_CR_ECC_DEBUG_PRTSEL",
   7419     "MICRO_CR_ECC_FRC_DISABLE",
   7420     "MICRO_CR_IGNORE_MICRO_CODE_WRITES",
   7421     "MICRO_CR_LOWPOWER_EN",
   7422     "MICRO_CR_PRIF_PRTSEL",
   7423     "MICRO_CR_RAIF_PRTSEL",
   7424     "MICRO_CR_TM",
   7425     "MICRO_DAP_PORESET_S_RSTB",
   7426     "MICRO_DEBUGGER_ID_FRC",
   7427     "MICRO_DEBUGGER_ID_FRCVAL",
   7428     "MICRO_DEBUGGER_ID_LSW",
   7429     "MICRO_DEBUGGER_ID_MSW",
   7430     "MICRO_DP_RCLK20_RST_STATUS_LH",
   7431     "MICRO_DP_RCLK20_RST_WAKEUP_EN",
   7432     "MICRO_DR_ACCESS_EN",
   7433     "MICRO_DR_CODE_SIZE",
   7434     "MICRO_DR_ECCG_MODE",
   7435     "MICRO_DR_ECC_CORRUPT",
   7436     "MICRO_DR_ECC_DEBUG_PRTSEL",
   7437     "MICRO_DR_ECC_FRC_DISABLE",
   7438     "MICRO_DR_IGNORE_MICRO_CODE_WRITES",
   7439     "MICRO_DR_LOWPOWER_EN",
   7440     "MICRO_DR_PRIF_PRTSEL",
   7441     "MICRO_DR_RAIF_PRTSEL",
   7442     "MICRO_DR_TM",
   7443     "MICRO_M0P_DEFAULT_SLAVE_ERROR_HRESP_EN",
   7444     "MICRO_M0P_DEFAULT_SLAVE_ERROR_INTR_EN",
   7445     "MICRO_M0P_DEFAULT_SLAVE_ERROR_STATUS",
   7446     "MICRO_M0P_GCLK_FRC",
   7447     "MICRO_M0P_GCLK_FRCVAL",
   7448     "MICRO_M0P_WAKEUP",
   7449     "MICRO_MASTER_CLK_EN",
   7450     "MICRO_MASTER_RSTB",
   7451     "MICRO_MBOX_MSGIN_INTR",
   7452     "MICRO_MSG0",
   7453     "MICRO_MSG1",
   7454     "MICRO_MSG2",
   7455     "MICRO_MSG3",
   7456     "MICRO_NUM_UC_CORES",
   7457     "MICRO_PMD_SIGNAL_DETECT_STATUS_LH",
   7458     "MICRO_PMD_SIGNAL_DETECT_WAKEUP_EN",
   7459     "MICRO_PMI_HP_ACK_TIMEOUT_DIS",
   7460     "MICRO_PMI_HP_ACK_TIMEOUT_HRESP_EN",
   7461     "MICRO_PMI_HP_ACK_TIMEOUT_INTR_EN",
   7462     "MICRO_PMI_HP_ACK_TIMEOUT_STATUS",
   7463     "MICRO_PMI_HP_ERROR_HRESP_EN",
   7464     "MICRO_PMI_HP_ERROR_INTR_EN",
   7465     "MICRO_PMI_HP_ERROR_STATUS",
   7466     "MICRO_PMI_HP_FAST_BKTOBK_EN",
   7467     "MICRO_PMI_HP_FAST_READ_EN",
   7468     "MICRO_PMI_HP_WORD_ACCESS_ERR_HRESP_EN",
   7469     "MICRO_PMI_HP_WORD_ACCESS_ERR_INTR_EN",
   7470     "MICRO_PMI_HP_WORD_ACCESS_ERR_STATUS",
   7471     "MICRO_PRAMIF_AHB_WRADDR_LSW",
   7472     "MICRO_PRAMIF_AHB_WRADDR_MSW",
   7473     "MICRO_PRAMIF_EN",
   7474     "MICRO_PRAM_IF_RSTB",
   7475     "MICRO_PR_AUTOINC_NXT_WRADDR_LSW",
   7476     "MICRO_PR_AUTOINC_NXT_WRADDR_MSB",
   7477     "MICRO_PR_DEFAULT_SLAVE_ERROR",
   7478     "MICRO_PVT_TEMPDATA_FRC",
   7479     "MICRO_PVT_TEMPDATA_FRCVAL",
   7480     "MICRO_PVT_TEMPDATA_RMI",
   7481     "MICRO_RA_ARG_MICROBLK_SEL",
   7482     "MICRO_RA_AUTOINC_NXT_RDADDR_LSW",
   7483     "MICRO_RA_AUTOINC_NXT_RDADDR_MSB",
   7484     "MICRO_RA_AUTOINC_NXT_WRADDR_LSW",
   7485     "MICRO_RA_AUTOINC_NXT_WRADDR_MSB",
   7486     "MICRO_RA_ECC_RDDATA",
   7487     "MICRO_RA_ECC_WRDATA",
   7488     "MICRO_RA_INIT",
   7489     "MICRO_RA_INITDONE",
   7490     "MICRO_RA_RDADDR_LSW",
   7491     "MICRO_RA_RDADDR_MSW",
   7492     "MICRO_RA_RDDATASIZE",
   7493     "MICRO_RA_RDDATA_LSW",
   7494     "MICRO_RA_RDDATA_MSW",
   7495     "MICRO_RA_WRADDR_LSW",
   7496     "MICRO_RA_WRADDR_MSW",
   7497     "MICRO_RA_WRDATASIZE",
   7498     "MICRO_RA_WRDATA_LSW",
   7499     "MICRO_RA_WRDATA_MSW",
   7500     "MICRO_RMI_CR_ECC_ADDRESS_STATUS",
   7501     "MICRO_RMI_CR_ECC_CORR_ERR_INTR_EN",
   7502     "MICRO_RMI_CR_ECC_CORR_ERR_STATUS",
   7503     "MICRO_RMI_CR_ECC_MULTIROW_ERR_INTR_EN",
   7504     "MICRO_RMI_CR_ECC_MULTIROW_ERR_STATUS",
   7505     "MICRO_RMI_CR_ECC_UNCORR_ERR_INTR_EN",
   7506     "MICRO_RMI_CR_ECC_UNCORR_ERR_STATUS",
   7507     "MICRO_RMI_DEFAULT_SLAVE_ERROR",
   7508     "MICRO_RMI_DR_ECC_ADDRESS_STATUS",
   7509     "MICRO_RMI_DR_ECC_CORR_ERR_INTR_EN",
   7510     "MICRO_RMI_DR_ECC_CORR_ERR_STATUS",
   7511     "MICRO_RMI_DR_ECC_MULTIROW_ERR_INTR_EN",
   7512     "MICRO_RMI_DR_ECC_MULTIROW_ERR_STATUS",
   7513     "MICRO_RMI_DR_ECC_UNCORR_ERR_INTR_EN",
   7514     "MICRO_RMI_DR_ECC_UNCORR_ERR_STATUS",
   7515     "MICRO_RMI_M0P_LOCKUP_INTR_EN",
   7516     "MICRO_RMI_M0P_LOCKUP_STATUS",
   7517     "MICRO_RMI_M0P_LOCKUP_STATUS_OR",
   7518     "MICRO_RMI_M0P_SYSTEMRESETREQ_INTR_EN",
   7519     "MICRO_RMI_M0P_SYSTEMRESETREQ_STATUS",
   7520     "MICRO_RMI_M0P_SYSTEMRESETREQ_STATUS_OR",
   7521     "MICRO_RMI_MBOX_MSGOUT_INTR_EN",
   7522     "MICRO_RMI_MBOX_MSGOUT_STATUS",
   7523     "MICRO_RMI_MBOX_MSGOUT_STATUS_OR",
   7524     "MICRO_SILICON_DEBUG_STATUS_MUXED_DATA",
   7525     "MICRO_SILICON_DEBUG_STATUS_MUX_SEL",
   7526     "MICRO_SLEEPDEEP",
   7527     "MICRO_SLEEPDEEP_LH",
   7528     "MICRO_SLEEPHOLDACK_N",
   7529     "MICRO_SLEEPHOLDREQ_N",
   7530     "MICRO_SLEEPING",
   7531     "MICRO_SLEEPING_LH",
   7532     "MICRO_SW_PMI_HP_RSTB",
   7533     "MICRO_SW_TIMESTAMP_TIMER_RSTB",
   7534     "MICRO_TX_DISABLE",
   7535     "MICRO_UC_ACTIVE_0",
   7536     "MICRO_UC_ACTIVE_1",
   7537     "MICRO_UC_ACTIVE_2",
   7538     "MICRO_UC_ACTIVE_3",
   7539     "MICRO_WICENACK",
   7540     "MICRO_WICENREQ",
   7541     "MODEL_NUMBER",
   7542     "MP5_15_0",
   7543     "MP5_31_16",
   7544     "MP5_47_16",
   7545     "MSA_FEC_MAPPING",
   7546     "MULTICAST_MASK_CONTROL",
   7547     "MULTICAST_MASK_CONTROL_STATUS",
   7548     "NEXT_PAGE",
   7549     "NEXT_PAGE_WAIT",
   7550     "NS_XGMII_MODE_ADDER",
   7551     "NUM_ADVERTISED_LANES",
   7552     "ONE_BIT_ERR_EVENT_AM_TBL",
   7553     "ONE_BIT_ERR_EVENT_BASE_R_FEC",
   7554     "ONE_BIT_ERR_EVENT_DESKEW",
   7555     "ONE_BIT_ERR_EVENT_RSFEC_RBUF_MPP",
   7556     "ONE_BIT_ERR_EVENT_RSFEC_RS400G_MPP",
   7557     "ONE_BIT_ERR_EVENT_RX_1588_400G",
   7558     "ONE_BIT_ERR_EVENT_RX_1588_MPP",
   7559     "ONE_BIT_ERR_EVENT_SPD_TBL",
   7560     "ONE_BIT_ERR_EVENT_TX_1588_400G",
   7561     "ONE_BIT_ERR_EVENT_TX_1588_MPP",
   7562     "ONE_BIT_ERR_EVENT_UM_TBL",
   7563     "OSR_MODE",
   7564     "OSR_MODE_FRC",
   7565     "OSR_MODE_FRC_VAL",
   7566     "OSR_MODE_OEN",
   7567     "OSR_MODE_PIN",
   7568     "OSTS_PIPELINE_ENABLE",
   7569     "OS_ALL_EDGES",
   7570     "OS_PATTERN_ENHANCED",
   7571     "OUI_LOWER_DATA",
   7572     "OUI_UPPER_DATA",
   7573     "PAGE_TOO_LONG",
   7574     "PAGE_TOO_SHORT",
   7575     "PAM4_CDR_PROP_BW_EXT",
   7576     "PAM4_DECODER_EN",
   7577     "PAM4_GRAY_DEC_EN",
   7578     "PAM4_GRAY_ENC_EN",
   7579     "PAM4_MODE",
   7580     "PAM4_MODE_FRC",
   7581     "PAM4_MODE_FRC_VAL",
   7582     "PAM4_MODE_PIN",
   7583     "PAM4_PRECODER_EN",
   7584     "PAM4_RX_SYMBOL_BIT_SWAP",
   7585     "PAM4_TX_JP03B_PATT_EN",
   7586     "PAM4_TX_LINEARITY_PATT_EN",
   7587     "PAM4_TX_SYMBOL_BIT_SWAP",
   7588     "PATT_GEN_EN",
   7589     "PATT_GEN_SEQ_0",
   7590     "PATT_GEN_SEQ_1",
   7591     "PATT_GEN_SEQ_10",
   7592     "PATT_GEN_SEQ_11",
   7593     "PATT_GEN_SEQ_12",
   7594     "PATT_GEN_SEQ_13",
   7595     "PATT_GEN_SEQ_14",
   7596     "PATT_GEN_SEQ_2",
   7597     "PATT_GEN_SEQ_3",
   7598     "PATT_GEN_SEQ_4",
   7599     "PATT_GEN_SEQ_5",
   7600     "PATT_GEN_SEQ_6",
   7601     "PATT_GEN_SEQ_7",
   7602     "PATT_GEN_SEQ_8",
   7603     "PATT_GEN_SEQ_9",
   7604     "PATT_GEN_START_POS",
   7605     "PATT_GEN_STOP_POS",
   7606     "PCS_LANE_ERROR_INJECT",
   7607     "PCS_LINK_STATUS_LIVE",
   7608     "PCS_XS",
   7609     "PHASE_ERR_OFFSET",
   7610     "PHASE_ERR_OFFSET_EN",
   7611     "PHASE_ERR_OFFSET_MULT2",
   7612     "PHS_SUM_IGNORE_DSC_LOCK",
   7613     "PHYSICAL0_TO_LOGICAL_SEL",
   7614     "PHYSICAL1_TO_LOGICAL_SEL",
   7615     "PHYSICAL2_TO_LOGICAL_SEL",
   7616     "PHYSICAL3_TO_LOGICAL_SEL",
   7617     "PHY_XS",
   7618     "PIPELINE_RESET_COUNT",
   7619     "PLL_CFG_FWAPI_DATA0",
   7620     "PLL_CFG_FWAPI_DATA1",
   7621     "PLL_FORCE_CAP_DONE",
   7622     "PLL_FORCE_CAP_DONE_EN",
   7623     "PLL_FORCE_CAP_PASS",
   7624     "PLL_FORCE_CAP_PASS_EN",
   7625     "PLL_FORCE_FDONE",
   7626     "PLL_FORCE_FDONE_EN",
   7627     "PLL_FORCE_FPASS",
   7628     "PLL_LOCK",
   7629     "PLL_LOCK_FRC",
   7630     "PLL_LOCK_FRC_VAL",
   7631     "PLL_LOCK_LH_LL",
   7632     "PLL_MODE",
   7633     "PLL_PWRDN_OR",
   7634     "PLL_SELECT",
   7635     "PLL_SEQ_DONE",
   7636     "PLL_SEQ_DONE_LH_LL",
   7637     "PLL_SEQ_PASS",
   7638     "PLL_SEQ_PASS_LH_LL",
   7639     "PLL_SEQ_START",
   7640     "PMA_PMD",
   7641     "PMD_CORE_DP_H_RSTB_PKILL",
   7642     "PMD_CORE_MODE",
   7643     "PMD_LN_DP_H_RSTB_PKILL",
   7644     "PMD_LN_H_RSTB_PKILL",
   7645     "PMD_LN_RX_DP_H_RSTB_PKILL",
   7646     "PMD_LN_RX_H_PWRDN_PKILL",
   7647     "PMD_LN_RX_H_RSTB_PKILL",
   7648     "PMD_LN_TX_DP_H_RSTB_PKILL",
   7649     "PMD_LN_TX_H_PWRDN_PKILL",
   7650     "PMD_LN_TX_H_RSTB_PKILL",
   7651     "PMD_MDIO_TRANS_PKILL",
   7652     "PMD_RX_CLK_VLD_FRC",
   7653     "PMD_RX_CLK_VLD_FRC_VAL",
   7654     "PMD_RX_LANE_MODE",
   7655     "PMD_RX_LOCK",
   7656     "PMD_RX_LOCK_CHANGE",
   7657     "PMD_SIGNAL_DETECT",
   7658     "PMD_TX_CLK_VLD_FRC",
   7659     "PMD_TX_CLK_VLD_FRC_VAL",
   7660     "PMD_TX_DISABLE_PKILL",
   7661     "PMD_TX_LANE_MODE",
   7662     "PMD_VCOCLK4PCS_VLD_FRC",
   7663     "PMD_VCOCLK4PCS_VLD_FRC_VAL",
   7664     "PM_OFFSET_IN_NS",
   7665     "PM_OFFSET_SUB_NS",
   7666     "PORT_MODE_SEL",
   7667     "POR_H_RSTB",
   7668     "PRBS_BURST_ERR_LENGTH_STATUS",
   7669     "PRBS_BURST_LEN_CHK_EN",
   7670     "PRBS_CHK_AUTO_DETECT_CNT",
   7671     "PRBS_CHK_AUTO_DETECT_EN",
   7672     "PRBS_CHK_AUTO_DETECT_LOCK",
   7673     "PRBS_CHK_AUTO_DETECT_RELOCK_EN",
   7674     "PRBS_CHK_AUTO_DETECT_STATE",
   7675     "PRBS_CHK_BURST_ERR_CNT",
   7676     "PRBS_CHK_BURST_ERR_CNT_EN",
   7677     "PRBS_CHK_CLK_EN_FRC_ON",
   7678     "PRBS_CHK_EN",
   7679     "PRBS_CHK_EN_AUTO_MODE",
   7680     "PRBS_CHK_EN_TIMEOUT",
   7681     "PRBS_CHK_EN_TIMER_MODE",
   7682     "PRBS_CHK_ERR_CNT_BURST_MODE",
   7683     "PRBS_CHK_ERR_CNT_LSB",
   7684     "PRBS_CHK_ERR_CNT_MSB",
   7685     "PRBS_CHK_ERR_CNT_NO_CLR",
   7686     "PRBS_CHK_INV",
   7687     "PRBS_CHK_INV_AUTO_DETECT",
   7688     "PRBS_CHK_LOCK",
   7689     "PRBS_CHK_LOCK_CNT",
   7690     "PRBS_CHK_LOCK_LOST_LH",
   7691     "PRBS_CHK_MODE",
   7692     "PRBS_CHK_MODE_SEL",
   7693     "PRBS_CHK_MODE_SEL_AUTO_DETECT",
   7694     "PRBS_CHK_MODE_SEL_MSB",
   7695     "PRBS_CHK_MODE_SEL_MSB_AUTO_DETECT",
   7696     "PRBS_CHK_OOL_CNT",
   7697     "PRBS_GEN_EN",
   7698     "PRBS_GEN_ERR_INS",
   7699     "PRBS_GEN_INV",
   7700     "PRBS_GEN_MODE_SEL",
   7701     "PRBS_GEN_MODE_SEL_MSB",
   7702     "PRBS_GEN_PAUSE_STROBE",
   7703     "PRESET_A",
   7704     "PRESET_AFE",
   7705     "PRESET_C",
   7706     "PRESET_D",
   7707     "PRESET_DFE_TAPS_2_3",
   7708     "PRESET_F",
   7709     "PRESET_G",
   7710     "PRESET_H",
   7711     "PRESET_I",
   7712     "PRESET_SLICERS",
   7713     "PRE_FREQ_DET_TIME",
   7714     "PRTP_DATA_PATTERN_SEL",
   7715     "PRTP_ERR_COUNT",
   7716     "PRTP_LOCK",
   7717     "PSLL0_TO_VL_MAPPING",
   7718     "PSLL1_TO_VL_MAPPING",
   7719     "PSLL2_TO_VL_MAPPING",
   7720     "PSLL3_TO_VL_MAPPING",
   7721     "PSLL4_TO_VL_MAPPING",
   7722     "PULSE_TOO_LONG",
   7723     "PULSE_TOO_MODERATE",
   7724     "PULSE_TOO_SHORT",
   7725     "PWRDN_SEQ_TIMER",
   7726     "RECORD_DESKEW_TS_INFO",
   7727     "REFCLK_DIVCNT",
   7728     "REFCLK_DIVCNT_SEL",
   7729     "REFCLK_LOC",
   7730     "REFCLK_LOC_MON_EN",
   7731     "REFCLK_SEL",
   7732     "REFCLK_S_COMCLK_FRC_ON",
   7733     "REFCLK_S_COMCLK_SEL",
   7734     "REGID1",
   7735     "REGID2",
   7736     "REMOTE_FAULT_LH",
   7737     "RESCAL_FRC",
   7738     "RESCAL_FRC_VAL",
   7739     "RESCAL_IN",
   7740     "RESOLUTION_ERROR",
   7741     "RESOLVED_PORT_MODE",
   7742     "RESOLVED_PORT_MODE_CONTROL",
   7743     "RESTART_LOCK_LH",
   7744     "RESTART_LOCK_LIVE",
   7745     "RESTART_LOCK_LL",
   7746     "RESTART_PI_EXT_MODE",
   7747     "RESTART_PMD_RESTART",
   7748     "RESTART_SIGDET",
   7749     "RES_CAL_CNTR",
   7750     "RETRY_TIME",
   7751     "REVID2",
   7752     "REVID_BONDING",
   7753     "REVID_CL72",
   7754     "REVID_EEE",
   7755     "REVID_LLP",
   7756     "REVID_MDIO",
   7757     "REVID_MICRO",
   7758     "REVID_MODEL",
   7759     "REVID_MULTIPLICITY",
   7760     "REVID_PIR",
   7761     "REVID_PROCESS",
   7762     "REVID_REV_LETTER",
   7763     "REVID_REV_NUMBER",
   7764     "REV_LETTER",
   7765     "REV_NUMBER",
   7766     "RMT_LPBK_EN",
   7767     "RMT_LPBK_PD_EARLY_IND",
   7768     "RMT_LPBK_PD_FRC_ON",
   7769     "RMT_LPBK_PD_LATE_IND",
   7770     "RMT_LPBK_PD_MODE",
   7771     "RSTB_LANE",
   7772     "RSTB_TX_LANE",
   7773     "RST_SEQ_DIS_FLT_MODE",
   7774     "RST_SEQ_TIMER",
   7775     "RS_FEC_AMPS_LOCK_LH_0",
   7776     "RS_FEC_AMPS_LOCK_LH_1",
   7777     "RS_FEC_AMPS_LOCK_LIVE_0",
   7778     "RS_FEC_AMPS_LOCK_LIVE_1",
   7779     "RS_FEC_AMPS_LOCK_LL_0",
   7780     "RS_FEC_AMPS_LOCK_LL_1",
   7781     "RS_FEC_CORRECTION_ENABLE",
   7782     "RS_FEC_CW_TYPE",
   7783     "RS_FEC_FEC_CORR_BIT_CNTR_LOWER",
   7784     "RS_FEC_FEC_CORR_BIT_CNTR_UPPER",
   7785     "RS_FEC_FEC_CORR_CW_CNTR_LOWER",
   7786     "RS_FEC_FEC_CORR_CW_CNTR_UPPER",
   7787     "RS_FEC_FEC_LANE_MAP_0",
   7788     "RS_FEC_FEC_LANE_MAP_1",
   7789     "RS_FEC_FEC_LANE_MAP_VALID_0",
   7790     "RS_FEC_FEC_LANE_MAP_VALID_1",
   7791     "RS_FEC_FEC_SYNC_FSM_LATCHED_STATE_HI",
   7792     "RS_FEC_FEC_SYNC_FSM_LATCHED_STATE_LO",
   7793     "RS_FEC_FEC_UNCORR_CW_CNTR_LOWER",
   7794     "RS_FEC_FEC_UNCORR_CW_CNTR_UPPER",
   7795     "RS_FEC_LANE_ERROR_INJECT",
   7796     "RS_FEC_REQ",
   7797     "RXA_DFE_TAP10",
   7798     "RXA_DFE_TAP10_MUX",
   7799     "RXA_DFE_TAP11",
   7800     "RXA_DFE_TAP11_MUX",
   7801     "RXA_DFE_TAP12",
   7802     "RXA_DFE_TAP12_MUX",
   7803     "RXA_DFE_TAP13",
   7804     "RXA_DFE_TAP13_MUX",
   7805     "RXA_DFE_TAP14",
   7806     "RXA_DFE_TAP14_MUX",
   7807     "RXA_DFE_TAP2_INIT_PHASE",
   7808     "RXA_DFE_TAP2_LEFT_NUM_CHANGE",
   7809     "RXA_DFE_TAP2_NUMERATOR",
   7810     "RXA_DFE_TAP2_NUMERATOR2",
   7811     "RXA_DFE_TAP2_STATUS",
   7812     "RXA_DFE_TAP2_THRESH_STEP_SIZE",
   7813     "RXA_DFE_TAP2_VAL",
   7814     "RXA_DFE_TAP2_WRITE",
   7815     "RXA_DFE_TAP3_INIT_PHASE",
   7816     "RXA_DFE_TAP3_LEFT_NUM_CHANGE",
   7817     "RXA_DFE_TAP3_NUMERATOR",
   7818     "RXA_DFE_TAP3_NUMERATOR2",
   7819     "RXA_DFE_TAP3_STATUS",
   7820     "RXA_DFE_TAP3_THRESH_STEP_SIZE",
   7821     "RXA_DFE_TAP3_VAL",
   7822     "RXA_DFE_TAP3_WRITE",
   7823     "RXA_DFE_TAP4",
   7824     "RXA_DFE_TAP5",
   7825     "RXA_DFE_TAP6",
   7826     "RXA_DFE_TAP7",
   7827     "RXA_DFE_TAP7_MUX",
   7828     "RXA_DFE_TAP8",
   7829     "RXA_DFE_TAP8_MUX",
   7830     "RXA_DFE_TAP9",
   7831     "RXA_DFE_TAP9_MUX",
   7832     "RXA_FFE_TAP1_VAL",
   7833     "RXA_FFE_TAP2_VAL",
   7834     "RXA_SLICER_OFFSET_ADJ_CAL_D0",
   7835     "RXA_SLICER_OFFSET_ADJ_CAL_D1",
   7836     "RXA_SLICER_OFFSET_ADJ_CAL_D2",
   7837     "RXA_SLICER_OFFSET_ADJ_CAL_D3",
   7838     "RXA_SLICER_OFFSET_ADJ_CAL_D4",
   7839     "RXA_SLICER_OFFSET_ADJ_CAL_D5",
   7840     "RXA_SLICER_OFFSET_ADJ_CAL_LMS",
   7841     "RXA_SLICER_OFFSET_ADJ_CAL_P0",
   7842     "RXA_SLICER_OFFSET_ADJ_CAL_P1",
   7843     "RXA_SLICER_OFFSET_ADJ_CAL_P2",
   7844     "RXB_DFE_TAP10",
   7845     "RXB_DFE_TAP10_MUX",
   7846     "RXB_DFE_TAP11",
   7847     "RXB_DFE_TAP11_MUX",
   7848     "RXB_DFE_TAP12",
   7849     "RXB_DFE_TAP12_MUX",
   7850     "RXB_DFE_TAP13",
   7851     "RXB_DFE_TAP13_MUX",
   7852     "RXB_DFE_TAP14",
   7853     "RXB_DFE_TAP14_MUX",
   7854     "RXB_DFE_TAP2_INIT_PHASE",
   7855     "RXB_DFE_TAP2_LEFT_NUM_CHANGE",
   7856     "RXB_DFE_TAP2_NUMERATOR",
   7857     "RXB_DFE_TAP2_NUMERATOR2",
   7858     "RXB_DFE_TAP2_STATUS",
   7859     "RXB_DFE_TAP2_THRESH_STEP_SIZE",
   7860     "RXB_DFE_TAP2_VAL",
   7861     "RXB_DFE_TAP2_WRITE",
   7862     "RXB_DFE_TAP3_INIT_PHASE",
   7863     "RXB_DFE_TAP3_LEFT_NUM_CHANGE",
   7864     "RXB_DFE_TAP3_NUMERATOR",
   7865     "RXB_DFE_TAP3_NUMERATOR2",
   7866     "RXB_DFE_TAP3_STATUS",
   7867     "RXB_DFE_TAP3_THRESH_STEP_SIZE",
   7868     "RXB_DFE_TAP3_VAL",
   7869     "RXB_DFE_TAP3_WRITE",
   7870     "RXB_DFE_TAP4",
   7871     "RXB_DFE_TAP5",
   7872     "RXB_DFE_TAP6",
   7873     "RXB_DFE_TAP7",
   7874     "RXB_DFE_TAP7_MUX",
   7875     "RXB_DFE_TAP8",
   7876     "RXB_DFE_TAP8_MUX",
   7877     "RXB_DFE_TAP9",
   7878     "RXB_DFE_TAP9_MUX",
   7879     "RXB_FFE_TAP1_VAL",
   7880     "RXB_FFE_TAP2_VAL",
   7881     "RXB_SLICER_OFFSET_ADJ_CAL_D0",
   7882     "RXB_SLICER_OFFSET_ADJ_CAL_D1",
   7883     "RXB_SLICER_OFFSET_ADJ_CAL_D2",
   7884     "RXB_SLICER_OFFSET_ADJ_CAL_D3",
   7885     "RXB_SLICER_OFFSET_ADJ_CAL_D4",
   7886     "RXB_SLICER_OFFSET_ADJ_CAL_D5",
   7887     "RXB_SLICER_OFFSET_ADJ_CAL_LMS",
   7888     "RXB_SLICER_OFFSET_ADJ_CAL_P0",
   7889     "RXB_SLICER_OFFSET_ADJ_CAL_P1",
   7890     "RXB_SLICER_OFFSET_ADJ_CAL_P2",
   7891     "RXC_DFE_TAP10",
   7892     "RXC_DFE_TAP10_MUX",
   7893     "RXC_DFE_TAP11",
   7894     "RXC_DFE_TAP11_MUX",
   7895     "RXC_DFE_TAP12",
   7896     "RXC_DFE_TAP12_MUX",
   7897     "RXC_DFE_TAP13",
   7898     "RXC_DFE_TAP13_MUX",
   7899     "RXC_DFE_TAP14",
   7900     "RXC_DFE_TAP14_MUX",
   7901     "RXC_DFE_TAP2_INIT_PHASE",
   7902     "RXC_DFE_TAP2_LEFT_NUM_CHANGE",
   7903     "RXC_DFE_TAP2_NUMERATOR",
   7904     "RXC_DFE_TAP2_NUMERATOR2",
   7905     "RXC_DFE_TAP2_STATUS",
   7906     "RXC_DFE_TAP2_THRESH_STEP_SIZE",
   7907     "RXC_DFE_TAP2_VAL",
   7908     "RXC_DFE_TAP2_WRITE",
   7909     "RXC_DFE_TAP3_INIT_PHASE",
   7910     "RXC_DFE_TAP3_LEFT_NUM_CHANGE",
   7911     "RXC_DFE_TAP3_NUMERATOR",
   7912     "RXC_DFE_TAP3_NUMERATOR2",
   7913     "RXC_DFE_TAP3_STATUS",
   7914     "RXC_DFE_TAP3_THRESH_STEP_SIZE",
   7915     "RXC_DFE_TAP3_VAL",
   7916     "RXC_DFE_TAP3_WRITE",
   7917     "RXC_DFE_TAP4",
   7918     "RXC_DFE_TAP5",
   7919     "RXC_DFE_TAP6",
   7920     "RXC_DFE_TAP7",
   7921     "RXC_DFE_TAP7_MUX",
   7922     "RXC_DFE_TAP8",
   7923     "RXC_DFE_TAP8_MUX",
   7924     "RXC_DFE_TAP9",
   7925     "RXC_DFE_TAP9_MUX",
   7926     "RXC_FFE_TAP1_VAL",
   7927     "RXC_FFE_TAP2_VAL",
   7928     "RXC_SLICER_OFFSET_ADJ_CAL_D0",
   7929     "RXC_SLICER_OFFSET_ADJ_CAL_D1",
   7930     "RXC_SLICER_OFFSET_ADJ_CAL_D2",
   7931     "RXC_SLICER_OFFSET_ADJ_CAL_D3",
   7932     "RXC_SLICER_OFFSET_ADJ_CAL_D4",
   7933     "RXC_SLICER_OFFSET_ADJ_CAL_D5",
   7934     "RXC_SLICER_OFFSET_ADJ_CAL_LMS",
   7935     "RXC_SLICER_OFFSET_ADJ_CAL_P0",
   7936     "RXC_SLICER_OFFSET_ADJ_CAL_P1",
   7937     "RXC_SLICER_OFFSET_ADJ_CAL_P2",
   7938     "RXD_DFE_TAP10",
   7939     "RXD_DFE_TAP10_MUX",
   7940     "RXD_DFE_TAP11",
   7941     "RXD_DFE_TAP11_MUX",
   7942     "RXD_DFE_TAP12",
   7943     "RXD_DFE_TAP12_MUX",
   7944     "RXD_DFE_TAP13",
   7945     "RXD_DFE_TAP13_MUX",
   7946     "RXD_DFE_TAP14",
   7947     "RXD_DFE_TAP14_MUX",
   7948     "RXD_DFE_TAP2_INIT_PHASE",
   7949     "RXD_DFE_TAP2_LEFT_NUM_CHANGE",
   7950     "RXD_DFE_TAP2_NUMERATOR",
   7951     "RXD_DFE_TAP2_NUMERATOR2",
   7952     "RXD_DFE_TAP2_STATUS",
   7953     "RXD_DFE_TAP2_THRESH_STEP_SIZE",
   7954     "RXD_DFE_TAP2_VAL",
   7955     "RXD_DFE_TAP2_WRITE",
   7956     "RXD_DFE_TAP3_INIT_PHASE",
   7957     "RXD_DFE_TAP3_LEFT_NUM_CHANGE",
   7958     "RXD_DFE_TAP3_NUMERATOR",
   7959     "RXD_DFE_TAP3_NUMERATOR2",
   7960     "RXD_DFE_TAP3_STATUS",
   7961     "RXD_DFE_TAP3_THRESH_STEP_SIZE",
   7962     "RXD_DFE_TAP3_VAL",
   7963     "RXD_DFE_TAP3_WRITE",
   7964     "RXD_DFE_TAP4",
   7965     "RXD_DFE_TAP5",
   7966     "RXD_DFE_TAP6",
   7967     "RXD_DFE_TAP7",
   7968     "RXD_DFE_TAP7_MUX",
   7969     "RXD_DFE_TAP8",
   7970     "RXD_DFE_TAP8_MUX",
   7971     "RXD_DFE_TAP9",
   7972     "RXD_DFE_TAP9_MUX",
   7973     "RXD_FFE_TAP1_VAL",
   7974     "RXD_FFE_TAP2_VAL",
   7975     "RXD_SLICER_OFFSET_ADJ_CAL_D0",
   7976     "RXD_SLICER_OFFSET_ADJ_CAL_D1",
   7977     "RXD_SLICER_OFFSET_ADJ_CAL_D2",
   7978     "RXD_SLICER_OFFSET_ADJ_CAL_D3",
   7979     "RXD_SLICER_OFFSET_ADJ_CAL_D4",
   7980     "RXD_SLICER_OFFSET_ADJ_CAL_D5",
   7981     "RXD_SLICER_OFFSET_ADJ_CAL_LMS",
   7982     "RXD_SLICER_OFFSET_ADJ_CAL_P0",
   7983     "RXD_SLICER_OFFSET_ADJ_CAL_P1",
   7984     "RXD_SLICER_OFFSET_ADJ_CAL_P2",
   7985     "RXFIFO_EMPTY",
   7986     "RXFIFO_FULL",
   7987     "RXFIFO_NOT_EMPTY",
   7988     "RX_AFE_OVERRIDE_SEL",
   7989     "RX_AFE_OVERRIDE_VAL",
   7990     "RX_AFE_OVERRIDE_WRITE",
   7991     "RX_BP",
   7992     "RX_CLK_VLD_LH",
   7993     "RX_CLK_VLD_LIVE",
   7994     "RX_CLK_VLD_LL",
   7995     "RX_CLK_VLD_OVRD",
   7996     "RX_CLK_VLD_STS",
   7997     "RX_DATA05_INIT_PHASE",
   7998     "RX_DATA05_LEFT_NUM_CHANGE",
   7999     "RX_DATA05_NUMERATOR",
   8000     "RX_DATA05_NUMERATOR2",
   8001     "RX_DATA05_STATUS",
   8002     "RX_DATA05_THRESH_STEP_SIZE",
   8003     "RX_DATA14_INIT_PHASE",
   8004     "RX_DATA14_LEFT_NUM_CHANGE",
   8005     "RX_DATA14_NUMERATOR",
   8006     "RX_DATA14_NUMERATOR2",
   8007     "RX_DATA14_STATUS",
   8008     "RX_DATA14_THRESH_STEP_SIZE",
   8009     "RX_DATA23_INIT_PHASE",
   8010     "RX_DATA23_LEFT_NUM_CHANGE",
   8011     "RX_DATA23_NUMERATOR",
   8012     "RX_DATA23_NUMERATOR2",
   8013     "RX_DATA23_STATUS",
   8014     "RX_DATA23_THRESH_STEP_SIZE",
   8015     "RX_DATA_15_TO_0",
   8016     "RX_DATA_35_TO_20",
   8017     "RX_DESCRAMBLER_EN",
   8018     "RX_DSC_LOCK",
   8019     "RX_DSC_LOCK_FRC",
   8020     "RX_DSC_LOCK_FRC_VAL",
   8021     "RX_HW_FW_HANDSHAKE_DISABLE",
   8022     "RX_INVALID_SEQ",
   8023     "RX_LANE_ADDR_0",
   8024     "RX_LANE_ADDR_1",
   8025     "RX_LANE_ADDR_2",
   8026     "RX_LANE_ADDR_3",
   8027     "RX_LANE_ADDR_4",
   8028     "RX_LANE_ADDR_5",
   8029     "RX_LANE_ADDR_6",
   8030     "RX_LANE_ADDR_7",
   8031     "RX_LANE_DP_RESET_STATE",
   8032     "RX_LANE_REG_RESET_OCCURRED",
   8033     "RX_LF_ENABLE",
   8034     "RX_LI_ENABLE",
   8035     "RX_LN_DP_S_RSTB",
   8036     "RX_LN_S_RSTB",
   8037     "RX_LOCK_LH",
   8038     "RX_LOCK_LIVE",
   8039     "RX_LOCK_LL",
   8040     "RX_LOCK_OVRD",
   8041     "RX_LOCK_STS",
   8042     "RX_MP_MISMATCH",
   8043     "RX_MP_NULL",
   8044     "RX_MP_OUI",
   8045     "RX_MULTICAST_MASK_CONTROL",
   8046     "RX_MULTICAST_MASK_CONTROL_STATUS",
   8047     "RX_NP",
   8048     "RX_NP_TOGGLE_ERR",
   8049     "RX_NRZ_VSR_MODE",
   8050     "RX_OSR_MODE",
   8051     "RX_OSR_MODE_FRC",
   8052     "RX_OSR_MODE_FRC_VAL",
   8053     "RX_OSR_MODE_PIN",
   8054     "RX_PAM4ES_PREC_DISABLED",
   8055     "RX_PAM4_ES_MODE",
   8056     "RX_PAM4_MODE",
   8057     "RX_PAM4_MODE_FRC",
   8058     "RX_PAM4_MODE_FRC_VAL",
   8059     "RX_PAM4_MODE_PIN",
   8060     "RX_PF2_CTRL_VAL",
   8061     "RX_PF_CTRL_VAL",
   8062     "RX_PHASE02_INIT_PHASE",
   8063     "RX_PHASE02_LEFT_NUM_CHANGE",
   8064     "RX_PHASE02_NUMERATOR",
   8065     "RX_PHASE02_NUMERATOR2",
   8066     "RX_PHASE02_STATUS",
   8067     "RX_PHASE02_THRESH_STEP_SIZE",
   8068     "RX_PHASE1_INIT_PHASE",
   8069     "RX_PHASE1_LEFT_NUM_CHANGE",
   8070     "RX_PHASE1_NUMERATOR",
   8071     "RX_PHASE1_NUMERATOR2",
   8072     "RX_PHASE1_STATUS",
   8073     "RX_PHASE1_THRESH_STEP_SIZE",
   8074     "RX_PHASE_SUM_ACC_MODE",
   8075     "RX_PI_DISP_MSB_STATUS",
   8076     "RX_PI_INLC_EN",
   8077     "RX_PI_INLC_K",
   8078     "RX_PI_INLC_LUT_0",
   8079     "RX_PI_INLC_LUT_1",
   8080     "RX_PI_INLC_LUT_10",
   8081     "RX_PI_INLC_LUT_11",
   8082     "RX_PI_INLC_LUT_12",
   8083     "RX_PI_INLC_LUT_13",
   8084     "RX_PI_INLC_LUT_14",
   8085     "RX_PI_INLC_LUT_15",
   8086     "RX_PI_INLC_LUT_2",
   8087     "RX_PI_INLC_LUT_3",
   8088     "RX_PI_INLC_LUT_4",
   8089     "RX_PI_INLC_LUT_5",
   8090     "RX_PI_INLC_LUT_6",
   8091     "RX_PI_INLC_LUT_7",
   8092     "RX_PI_INLC_LUT_8",
   8093     "RX_PI_INLC_LUT_9",
   8094     "RX_PI_INLC_OFFSET",
   8095     "RX_PI_INLC_OUT",
   8096     "RX_PI_INLC_PHASE_DLY",
   8097     "RX_PI_INLC_RX_PHASE_POINTER",
   8098     "RX_PI_MANUAL_MODE",
   8099     "RX_PI_MANUAL_STROBE",
   8100     "RX_PI_PHASE_STEP_CNT",
   8101     "RX_PI_PHASE_STEP_DIR",
   8102     "RX_PI_SLICERS_EN",
   8103     "RX_PI_STEP_SIZE",
   8104     "RX_PLL_SELECT",
   8105     "RX_PMD_DP_INVERT",
   8106     "RX_PMD_LATENCY_IN_FRAC_NS",
   8107     "RX_PMD_LATENCY_IN_NS",
   8108     "RX_PORT_SEL",
   8109     "RX_PRTP_EN",
   8110     "RX_RESTART_PMD",
   8111     "RX_RESTART_PMD_HOLD",
   8112     "RX_RF_ENABLE",
   8113     "RX_SFD_TS_EN",
   8114     "RX_SLICER_DENOMINATOR",
   8115     "RX_TRN_ACTIVE_AUTO_MODE_EN",
   8116     "RX_UC_ACK_LANE_CFG_DONE",
   8117     "RX_UC_ACK_LANE_DP_RESET",
   8118     "RX_UP_OUI_MATCH",
   8119     "RX_UP_OUI_MISMATCH",
   8120     "RX_VGA_STATUS",
   8121     "RX_VGA_THRESH_SEL",
   8122     "R_FEC_ENABLE",
   8123     "R_RS_FEC_FEC_MODE",
   8124     "R_TEST_MODE_CFG",
   8125     "SC_FSM_STATUS",
   8126     "SC_IGNORE_TX_DATA_VLD",
   8127     "SDK_TX_DISABLE",
   8128     "SEEDA0",
   8129     "SEEDA1",
   8130     "SEEDA2",
   8131     "SEEDA3",
   8132     "SEEDB0",
   8133     "SEEDB1",
   8134     "SEEDB2",
   8135     "SEEDB3",
   8136     "SEND_ACK",
   8137     "SET_MEAS_INCOMPLETE",
   8138     "SIGDET_DP_RSTB_EN",
   8139     "SIGNAL_DETECT",
   8140     "SIGNAL_DETECT_CHANGE",
   8141     "SIGNAL_DETECT_FILTER_1US",
   8142     "SIGNAL_DETECT_FILTER_COUNT",
   8143     "SIGNAL_DETECT_FRC",
   8144     "SIGNAL_DETECT_FRC_VAL",
   8145     "SIGNAL_DETECT_LH",
   8146     "SIGNAL_DETECT_LIVE",
   8147     "SIGNAL_DETECT_LL",
   8148     "SIGNAL_DETECT_OVRD",
   8149     "SIGNAL_DETECT_RAW",
   8150     "SIGNAL_DETECT_RAW_CHANGE",
   8151     "SIGNAL_DETECT_STS",
   8152     "SIGNAL_DETECT_THRESH",
   8153     "SIGN_XGMII_MODE_ADDER",
   8154     "SLOWDN_XOR",
   8155     "SOFT_RST_RX",
   8156     "SOFT_RST_TX",
   8157     "SPARE0",
   8158     "SPARE1",
   8159     "SPARE_DSC_I",
   8160     "SPEED",
   8161     "SPEED_SPARE_19",
   8162     "SPEED_SPARE_22",
   8163     "SRF_MEM_TM",
   8164     "ST_AFE_TX_FIFO_RESETB",
   8165     "SUB_NS_XGMII_MODE_ADDER",
   8166     "SUP_RST_SEQ_FRC",
   8167     "SUP_RST_SEQ_FRC_VAL",
   8168     "SW_AN_BP_0",
   8169     "SW_AN_BP_1",
   8170     "SW_AN_BP_2",
   8171     "SW_AN_SPEED_ID",
   8172     "SW_LI_IN_RL_MODE",
   8173     "SW_SPEED_CHANGE",
   8174     "SW_SPEED_CHANGE_DONE",
   8175     "SW_SPEED_CONFIG_VLD",
   8176     "SW_SPEED_ID",
   8177     "SYMBOL_VALUE",
   8178     "SYM_ROTATE_BC_DEC_EN",
   8179     "SYM_ROTATE_DLY",
   8180     "SYM_ROTATE_DLY_FRC",
   8181     "SYM_ROTATE_DLY_FRC_VAL",
   8182     "SYM_ROTATE_PRBS_AUTO_DETECT_EN",
   8183     "SYNCE_FRACTIONAL_DIVSOR_CFG",
   8184     "SYNCE_MODE_STAGE0",
   8185     "SYNCE_MODE_STAGE1",
   8186     "TC",
   8187     "TDT_PRBS_SLIP",
   8188     "TDT_TRNSUM_EN",
   8189     "TECH_PROC",
   8190     "TICK_DENOMINATOR",
   8191     "TICK_NUMERATOR_LOWER",
   8192     "TICK_NUMERATOR_UPPER",
   8193     "TICK_OVERRIDE",
   8194     "TIMER_DONE_FRC",
   8195     "TIMER_DONE_FRC_VAL",
   8196     "TLA_LN_SEQUENCER_FSM_STATUS1",
   8197     "TLA_SEQ_FSM_STATUS",
   8198     "TLB_ERR_AGGR_ACTIVE_PATTERN_DEPTH",
   8199     "TLB_ERR_AGGR_ACTIVE_STATUS",
   8200     "TLB_ERR_AGGR_CLEAR_ERROR_ANALYZER_STATUS",
   8201     "TLB_ERR_AGGR_CLEAR_STATUS_ON_READ",
   8202     "TLB_ERR_AGGR_CLKS_OUT_OF_SYNC_STATUS",
   8203     "TLB_ERR_AGGR_CLK_OUT_OF_SYNC_PATTERN_DEPTH",
   8204     "TLB_ERR_AGGR_COUNT_ERROR_HI",
   8205     "TLB_ERR_AGGR_COUNT_ERROR_LO",
   8206     "TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_0",
   8207     "TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_1",
   8208     "TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_2",
   8209     "TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_3",
   8210     "TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_4",
   8211     "TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_5",
   8212     "TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_6",
   8213     "TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_7",
   8214     "TLB_ERR_AGGR_DELAY_DATA_CAPTURE",
   8215     "TLB_ERR_AGGR_EN",
   8216     "TLB_ERR_AGGR_EN_FORCE",
   8217     "TLB_ERR_AGGR_ERROR_COUNT_THRESH",
   8218     "TLB_ERR_AGGR_GCLK_DIV2_EN_IGNORE",
   8219     "TLB_ERR_AGGR_HISTOGRAM_ERROR_THRESH",
   8220     "TLB_ERR_AGGR_LANES_ACTIVE",
   8221     "TLB_ERR_AGGR_MODE",
   8222     "TLB_ERR_CLEAR_ERROR_ANALYZER_STATUS",
   8223     "TLB_ERR_CLEAR_STATUS_ON_READ",
   8224     "TLB_ERR_COUNT_ERROR_HI",
   8225     "TLB_ERR_COUNT_ERROR_LO",
   8226     "TLB_ERR_COUNT_HISTOGRAM_ERROR_OFFSET_0",
   8227     "TLB_ERR_COUNT_HISTOGRAM_ERROR_OFFSET_1",
   8228     "TLB_ERR_COUNT_HISTOGRAM_ERROR_OFFSET_2",
   8229     "TLB_ERR_COUNT_HISTOGRAM_ERROR_OFFSET_3",
   8230     "TLB_ERR_COUNT_HISTOGRAM_ERROR_OFFSET_4",
   8231     "TLB_ERR_COUNT_HISTOGRAM_ERROR_OFFSET_5",
   8232     "TLB_ERR_COUNT_HISTOGRAM_ERROR_OFFSET_6",
   8233     "TLB_ERR_COUNT_HISTOGRAM_ERROR_OFFSET_7",
   8234     "TLB_ERR_ERROR_COUNT_THRESH",
   8235     "TLB_ERR_FEC_L_EN",
   8236     "TLB_ERR_FEC_L_R_EN",
   8237     "TLB_ERR_FEC_SIZE",
   8238     "TLB_ERR_HISTOGRAM_ERROR_THRESH",
   8239     "TLB_ERR_IGNORE_BACK_CHANNEL",
   8240     "TLB_RX_DIFF_DEC_EN",
   8241     "TLB_RX_NRZ_LL_MODE_EN",
   8242     "TLB_TX_DIFF_ENC_EN",
   8243     "TRANSMIT_DISABLE",
   8244     "TRNSUM",
   8245     "TRNSUM_A",
   8246     "TRNSUM_ALT_PATH_EN",
   8247     "TRNSUM_A_LOW",
   8248     "TRNSUM_B",
   8249     "TRNSUM_B_LOW",
   8250     "TRNSUM_C",
   8251     "TRNSUM_CLR_FRC",
   8252     "TRNSUM_CLR_FRC_VAL",
   8253     "TRNSUM_CLR_SC",
   8254     "TRNSUM_COR_SEL",
   8255     "TRNSUM_C_LOW",
   8256     "TRNSUM_D",
   8257     "TRNSUM_DATA_SEL",
   8258     "TRNSUM_DISABLE_SM_CLEAR",
   8259     "TRNSUM_D_LOW",
   8260     "TRNSUM_EDGE_PATTERN_EN",
   8261     "TRNSUM_EN",
   8262     "TRNSUM_ERROR_COUNT_EN",
   8263     "TRNSUM_ERR_SEL",
   8264     "TRNSUM_EYEC_SEL",
   8265     "TRNSUM_EYE_CLOSE_PREV_EN",
   8266     "TRNSUM_EYE_CLOSURE_EN",
   8267     "TRNSUM_EYE_CLOSURE_ERR_SEL",
   8268     "TRNSUM_FRZ_FRC",
   8269     "TRNSUM_FRZ_FRC_VAL",
   8270     "TRNSUM_GAIN",
   8271     "TRNSUM_INL_MEAS_EN",
   8272     "TRNSUM_INL_PHS_PTR",
   8273     "TRNSUM_INV_PATTERN_EN",
   8274     "TRNSUM_LOW",
   8275     "TRNSUM_MODE_SEL",
   8276     "TRNSUM_MULTI_LEVEL_ISI",
   8277     "TRNSUM_PATTERN_0",
   8278     "TRNSUM_PATTERN_0_BIT_EN",
   8279     "TRNSUM_PATTERN_1",
   8280     "TRNSUM_PATTERN_1_BIT_EN",
   8281     "TRNSUM_PATTERN_2",
   8282     "TRNSUM_PATTERN_2_BIT_EN",
   8283     "TRNSUM_PATTERN_7LVL_EN",
   8284     "TRNSUM_PATTERN_FULL_CHECK_OFF",
   8285     "TRNSUM_PATTERN_MATCH_SEL",
   8286     "TRNSUM_PRBS_DP_INVERT",
   8287     "TRNSUM_PRBS_PRECODER_AUTOSEED",
   8288     "TRNSUM_PRBS_PRECODER_LOAD_SEED",
   8289     "TRNSUM_PRBS_PRECODER_LOAD_ZERO",
   8290     "TRNSUM_QPHASE_MULT_EN",
   8291     "TRNSUM_RANDOM_TAPSEL_DISABLE",
   8292     "TRNSUM_RND_FREE_RUNNING",
   8293     "TRNSUM_TAP_EN",
   8294     "TRNSUM_TAP_RANGE_SEL",
   8295     "TRNSUM_TAP_SIGN",
   8296     "TRNSUM_TDT_COUNT",
   8297     "TRNSUM_TDT_SLIP",
   8298     "TSTS_INTERRUPT_EN",
   8299     "TSTS_INTERRUPT_STATUS",
   8300     "TS_ENTRY_VALID",
   8301     "TS_IN_NS_HI",
   8302     "TS_IN_NS_LO",
   8303     "TS_IN_NS_MID",
   8304     "TS_SEQID",
   8305     "TS_SUB_NS",
   8306     "TS_UPDATE_ENABLE",
   8307     "TWO_BIT_ERR_EVENT_AM_TBL",
   8308     "TWO_BIT_ERR_EVENT_BASE_R_FEC",
   8309     "TWO_BIT_ERR_EVENT_DESKEW",
   8310     "TWO_BIT_ERR_EVENT_RSFEC_RBUF_MPP",
   8311     "TWO_BIT_ERR_EVENT_RSFEC_RS400G_MPP",
   8312     "TWO_BIT_ERR_EVENT_RX_1588_400G",
   8313     "TWO_BIT_ERR_EVENT_RX_1588_MPP",
   8314     "TWO_BIT_ERR_EVENT_SPD_TBL",
   8315     "TWO_BIT_ERR_EVENT_TX_1588_400G",
   8316     "TWO_BIT_ERR_EVENT_TX_1588_MPP",
   8317     "TWO_BIT_ERR_EVENT_UM_TBL",
   8318     "TXCOM_LINKTRN_MAX_WAIT_TIMER_PERIOD",
   8319     "TXCOM_LINKTRN_MAX_WAIT_TIMER_PERIOD_2NDSET",
   8320     "TXCOM_LINKTRN_WAIT_CNTR_LIMIT",
   8321     "TXCOM_LINKTRN_WAIT_CNTR_LIMIT_2NDSET",
   8322     "TXFIFO_EMPTY",
   8323     "TXFIFO_FULL",
   8324     "TXFIFO_OVERRUN",
   8325     "TXFIFO_UNDERRUN",
   8326     "TXFIR_DC_ADJUST",
   8327     "TXFIR_LEVEL_SHIFT_MODE_EN",
   8328     "TXFIR_NRZ_TAP_RANGE_SEL",
   8329     "TXFIR_TAP0_COEFF",
   8330     "TXFIR_TAP10_COEFF",
   8331     "TXFIR_TAP11_COEFF",
   8332     "TXFIR_TAP1_COEFF",
   8333     "TXFIR_TAP2_COEFF",
   8334     "TXFIR_TAP3_COEFF",
   8335     "TXFIR_TAP4_COEFF",
   8336     "TXFIR_TAP5_COEFF",
   8337     "TXFIR_TAP6_COEFF",
   8338     "TXFIR_TAP7_COEFF",
   8339     "TXFIR_TAP8_COEFF",
   8340     "TXFIR_TAP9_COEFF",
   8341     "TXFIR_TAP_EN",
   8342     "TXFIR_TAP_LOAD",
   8343     "TXFIR_TEST_DATA_EN",
   8344     "TX_CLK_VLD_OVRD",
   8345     "TX_CLK_VLD_STS",
   8346     "TX_DISABLE",
   8347     "TX_DISABLE_LH",
   8348     "TX_DISABLE_LIVE",
   8349     "TX_DISABLE_LL",
   8350     "TX_DISABLE_OEN",
   8351     "TX_DISABLE_OUTPUT_SEL",
   8352     "TX_DISABLE_STATUS",
   8353     "TX_DISABLE_TIMER_CTRL",
   8354     "TX_DISABLE_TRIGGER",
   8355     "TX_EEE_ALERT_EN",
   8356     "TX_EEE_QUIET_EN",
   8357     "TX_ELEC_IDLE_STATUS",
   8358     "TX_FIFO_OVFB",
   8359     "TX_FIFO_OVFB_FALL_EDGE_LH",
   8360     "TX_HW_FW_HANDSHAKE_DISABLE",
   8361     "TX_LANE_ADDR_0",
   8362     "TX_LANE_ADDR_1",
   8363     "TX_LANE_ADDR_2",
   8364     "TX_LANE_ADDR_3",
   8365     "TX_LANE_ADDR_4",
   8366     "TX_LANE_ADDR_5",
   8367     "TX_LANE_ADDR_6",
   8368     "TX_LANE_ADDR_7",
   8369     "TX_LANE_DP_RESET_STATE",
   8370     "TX_LANE_REG_RESET_OCCURRED",
   8371     "TX_LANE_RESET_RELEASED",
   8372     "TX_LANE_RESET_RELEASED_INDEX",
   8373     "TX_LF_ENABLE",
   8374     "TX_LI_ENABLE",
   8375     "TX_LN_DP_S_RSTB",
   8376     "TX_LN_S_RSTB",
   8377     "TX_MULTICAST_MASK_CONTROL",
   8378     "TX_MULTICAST_MASK_CONTROL_STATUS",
   8379     "TX_MUX_SEL_ORDER",
   8380     "TX_NONCE",
   8381     "TX_OSR_MODE",
   8382     "TX_OSR_MODE_FRC",
   8383     "TX_OSR_MODE_FRC_VAL",
   8384     "TX_OSR_MODE_PIN",
   8385     "TX_PAM4_MODE",
   8386     "TX_PAM4_MODE_FRC",
   8387     "TX_PAM4_MODE_FRC_VAL",
   8388     "TX_PAM4_MODE_PIN",
   8389     "TX_PCS_NATIVE_ANA_FRMT_EN",
   8390     "TX_PI_EN",
   8391     "TX_PI_EXT_CTRL_EN",
   8392     "TX_PI_EXT_PD_SEL",
   8393     "TX_PI_EXT_PHASE_BWSEL_INTEG",
   8394     "TX_PI_EXT_PHASE_STEP_CNT_FULL_BYPASS",
   8395     "TX_PI_EXT_PHASE_STEP_CNT_INVERT",
   8396     "TX_PI_EXT_PHASE_STEP_CNT_SEL",
   8397     "TX_PI_FIRST_ORDER_BWSEL_INTEG",
   8398     "TX_PI_FIRST_ORDER_BWSEL_INTEG_S1",
   8399     "TX_PI_FREQ_OVERRIDE_EN",
   8400     "TX_PI_FREQ_OVERRIDE_EN_S1",
   8401     "TX_PI_FREQ_OVERRIDE_VAL",
   8402     "TX_PI_FRZ_FRC",
   8403     "TX_PI_FRZ_FRC_VAL",
   8404     "TX_PI_FRZ_MODE",
   8405     "TX_PI_FRZ_MODE_S1",
   8406     "TX_PI_HS_FIFO_PHSERR",
   8407     "TX_PI_HS_FIFO_PHSERR_INVERT",
   8408     "TX_PI_HS_FIFO_PHSERR_SEL",
   8409     "TX_PI_INTEG1_REG",
   8410     "TX_PI_INTEG2_REG",
   8411     "TX_PI_INTEG2_REG_S1",
   8412     "TX_PI_JITTER_FILTER_EN",
   8413     "TX_PI_JITTER_FILTER_EN_S1",
   8414     "TX_PI_JIT_AMP",
   8415     "TX_PI_JIT_FREQ_IDX",
   8416     "TX_PI_JIT_SSC_FREQ_MODE",
   8417     "TX_PI_LOOP_FILTER_STABLE",
   8418     "TX_PI_LOOP_TIMING_SRC_SEL",
   8419     "TX_PI_PD_BYPASS_FLT",
   8420     "TX_PI_PD_BYPASS_VCO",
   8421     "TX_PI_PHASE_CNTR",
   8422     "TX_PI_PHASE_ERR",
   8423     "TX_PI_PHASE_ERR_S1",
   8424     "TX_PI_PHASE_INVERT",
   8425     "TX_PI_PHASE_OVERRIDE",
   8426     "TX_PI_PHASE_STEP_DIR",
   8427     "TX_PI_PHASE_STEP_NUM",
   8428     "TX_PI_PHASE_STROBE",
   8429     "TX_PI_PHASE_SUM_CAPTURE_RESYNC_LH",
   8430     "TX_PI_REPEATER_MODE_EN",
   8431     "TX_PI_RESET_CODE_DBG",
   8432     "TX_PI_SAMPLER_MAX_CNT",
   8433     "TX_PI_SECOND_ORDER_BWSEL_INTEG",
   8434     "TX_PI_SECOND_ORDER_LOOP_EN",
   8435     "TX_PI_SJ_GEN_EN",
   8436     "TX_PI_SSC_GEN_EN",
   8437     "TX_PLL_SELECT",
   8438     "TX_PMD_DP_INVERT",
   8439     "TX_PMD_LATENCY_IN_FRAC_NS",
   8440     "TX_PMD_LATENCY_IN_NS",
   8441     "TX_PRTP_EN",
   8442     "TX_RESET_COUNT",
   8443     "TX_RF_ENABLE",
   8444     "TX_SCRAMBLER_EN",
   8445     "TX_TEST_PORT_SEL",
   8446     "TX_TRN_ACTIVE_AUTO_MODE_EN",
   8447     "TX_UC_ACK_LANE_CFG_DONE",
   8448     "TX_UC_ACK_LANE_DP_RESET",
   8449     "T_FEC_ENABLE",
   8450     "T_RS_FEC_FEC_MODE",
   8451     "UC_ACK_CORE_CFG_DONE",
   8452     "UC_ACK_CORE_DP_RESET",
   8453     "UC_ACK_DSC_CONFIG",
   8454     "UC_ACK_DSC_EEE_DONE",
   8455     "UC_ACK_DSC_RESTART",
   8456     "UC_ACK_LANE_CFG_DONE",
   8457     "UC_ACK_LANE_DP_RESET",
   8458     "UC_ACTIVE",
   8459     "UC_AFE_SIGDET",
   8460     "UC_AFE_SIGDET_CHANGE",
   8461     "UC_DSC_ERROR_FOUND",
   8462     "UC_DSC_GP_UC_REQ",
   8463     "UC_DSC_READY_FOR_CMD",
   8464     "UC_DSC_SCRATCH",
   8465     "UC_DSC_SUPP_INFO",
   8466     "UC_EXT_SIGDET",
   8467     "UC_EXT_SIGDET_CHANGE",
   8468     "UC_PMD_RX_LOCK",
   8469     "UC_PMD_RX_LOCK_CHANGE",
   8470     "UC_SIGNAL_DETECT",
   8471     "UC_SIGNAL_DETECT_CHANGE",
   8472     "UC_TRNSUM_EN",
   8473     "UC_TUNE_EN",
   8474     "UI_FRAC_M17_TO_M23",
   8475     "UI_FRAC_M1_TO_M16",
   8476     "UNCORCOUNTH_STREAM0",
   8477     "UNCORCOUNTL_STREAM0",
   8478     "UP_15_0",
   8479     "UP_31_16",
   8480     "UP_47_32",
   8481     "VCOCLK4PCS_S_COMCLK_FRC_ON",
   8482     "VCOCLK4PCS_S_COMCLK_SEL",
   8483     "VCO_DONE_EN",
   8484     "VCO_RANGE_ADJUST",
   8485     "VCO_RANGE_ADJUST_EN",
   8486     "VCO_RST_EN",
   8487     "VCO_START_TIME",
   8488     "VCO_STEP_TIME",
   8489     "WAIT_FOR_ACK_EN",
   8490     "WIN_CAL_CNTR",
   8491     "WIS",
   8492     "WM",
   8493     "XGMII_SFD_TIME_STAMP_ENABLE",
   8494 };
   8495 
   8496 #endif
   8497 #endif
   8498 #endif
   8499 #endif /* PHYMOD_CONFIG_INCLUDE_FIELD_INFO */
   8500 
   8501 
   8502 
   8503 /*******************************************************************************
   8504  *
   8505  * The following is the symbol table itself. 
   8506  * It defines the entries for all registers and memories.
   8507  * It also incorporates the field information for each register and memory if
   8508  * applicable.
   8509  */
   8510 static const phymod_symbol_t bcmi_tscbh_xgxs_syms[] = {
   8511 #ifndef PHYMOD_CONFIG_EXCLUDE_CHIP_SYMBOLS_BCMI_TSCBH_XGXS
   8512 {
   8513 	BCMI_TSCBH_XGXS_PHYID2r,
   8514 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   8515 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   8516 	BCMI_TSCBH_XGXS_PHYID2r_fields,
   8517 #else
   8518 	0,
   8519 #endif
   8520 #endif
   8521 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   8522 	PHYMOD_SYMBOL_FLAG_REGISTER,
   8523 	"PHYID2r",
   8524 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   8525 	"CL22_B0_PHYID2",
   8526 	NULL,
   8527 #endif
   8528 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   8529 	0x600d, /* 24589 */
   8530 	0,
   8531 #endif
   8532 },
   8533 {
   8534 	BCMI_TSCBH_XGXS_PHYID3r,
   8535 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   8536 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   8537 	BCMI_TSCBH_XGXS_PHYID3r_fields,
   8538 #else
   8539 	0,
   8540 #endif
   8541 #endif
   8542 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   8543 	PHYMOD_SYMBOL_FLAG_REGISTER,
   8544 	"PHYID3r",
   8545 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   8546 	"CL22_B0_PHYID3",
   8547 	NULL,
   8548 #endif
   8549 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   8550 	0x8770, /* 34672 */
   8551 	0,
   8552 #endif
   8553 },
   8554 {
   8555 	BCMI_TSCBH_XGXS_MAIN0_SETUPr,
   8556 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   8557 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   8558 	BCMI_TSCBH_XGXS_MAIN0_SETUPr_fields,
   8559 #else
   8560 	0,
   8561 #endif
   8562 #endif
   8563 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   8564 	PHYMOD_SYMBOL_FLAG_REGISTER,
   8565 	"MAIN0_SETUPr",
   8566 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   8567 	NULL,
   8568 	NULL,
   8569 #endif
   8570 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   8571 	0x80, /* 128 */
   8572 	0,
   8573 #endif
   8574 },
   8575 {
   8576 	BCMI_TSCBH_XGXS_MAIN0_DEVINPKG5r,
   8577 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   8578 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   8579 	BCMI_TSCBH_XGXS_MAIN0_DEVINPKG5r_fields,
   8580 #else
   8581 	0,
   8582 #endif
   8583 #endif
   8584 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   8585 	PHYMOD_SYMBOL_FLAG_REGISTER,
   8586 	"MAIN0_DEVINPKG5r",
   8587 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   8588 	"MAIN0_DEVICEINPKG5",
   8589 	NULL,
   8590 #endif
   8591 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   8592 	0x83, /* 131 */
   8593 	0,
   8594 #endif
   8595 },
   8596 {
   8597 	BCMI_TSCBH_XGXS_MAIN0_TICK_CTL1r,
   8598 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   8599 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   8600 	BCMI_TSCBH_XGXS_MAIN0_TICK_CTL1r_fields,
   8601 #else
   8602 	0,
   8603 #endif
   8604 #endif
   8605 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   8606 	PHYMOD_SYMBOL_FLAG_REGISTER,
   8607 	"MAIN0_TICK_CTL1r",
   8608 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   8609 	"MAIN0_TICK_CONTROL_1",
   8610 	NULL,
   8611 #endif
   8612 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   8613 	0x0, /* 0 */
   8614 	0,
   8615 #endif
   8616 },
   8617 {
   8618 	BCMI_TSCBH_XGXS_MAIN0_TICK_CTL0r,
   8619 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   8620 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   8621 	BCMI_TSCBH_XGXS_MAIN0_TICK_CTL0r_fields,
   8622 #else
   8623 	0,
   8624 #endif
   8625 #endif
   8626 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   8627 	PHYMOD_SYMBOL_FLAG_REGISTER,
   8628 	"MAIN0_TICK_CTL0r",
   8629 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   8630 	"MAIN0_TICK_CONTROL_0",
   8631 	NULL,
   8632 #endif
   8633 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   8634 	0x0, /* 0 */
   8635 	0,
   8636 #endif
   8637 },
   8638 {
   8639 	BCMI_TSCBH_XGXS_MAIN0_SERDESIDr,
   8640 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   8641 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   8642 	BCMI_TSCBH_XGXS_MAIN0_SERDESIDr_fields,
   8643 #else
   8644 	0,
   8645 #endif
   8646 #endif
   8647 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   8648 	PHYMOD_SYMBOL_FLAG_REGISTER,
   8649 	"MAIN0_SERDESIDr",
   8650 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   8651 	NULL,
   8652 	NULL,
   8653 #endif
   8654 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   8655 	0x325, /* 805 */
   8656 	0,
   8657 #endif
   8658 },
   8659 {
   8660 	BCMI_TSCBH_XGXS_MAIN0_ECC_DIS_CTLr,
   8661 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   8662 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   8663 	BCMI_TSCBH_XGXS_MAIN0_ECC_DIS_CTLr_fields,
   8664 #else
   8665 	0,
   8666 #endif
   8667 #endif
   8668 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   8669 	PHYMOD_SYMBOL_FLAG_REGISTER,
   8670 	"MAIN0_ECC_DIS_CTLr",
   8671 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   8672 	"MAIN0_ECC_DISABLE_CONTROL",
   8673 	NULL,
   8674 #endif
   8675 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   8676 	0x0, /* 0 */
   8677 	0,
   8678 #endif
   8679 },
   8680 {
   8681 	BCMI_TSCBH_XGXS_MAIN0_ECC_1B_ERR_INTR_ENr,
   8682 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   8683 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   8684 	BCMI_TSCBH_XGXS_MAIN0_ECC_1B_ERR_INTR_ENr_fields,
   8685 #else
   8686 	0,
   8687 #endif
   8688 #endif
   8689 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   8690 	PHYMOD_SYMBOL_FLAG_REGISTER,
   8691 	"MAIN0_ECC_1B_ERR_INTR_ENr",
   8692 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   8693 	"MAIN0_ECC_1B_ERR_INTERRUPT_EN",
   8694 	NULL,
   8695 #endif
   8696 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   8697 	0x5beb, /* 23531 */
   8698 	0,
   8699 #endif
   8700 },
   8701 {
   8702 	BCMI_TSCBH_XGXS_MAIN0_ECC_2B_ERR_INTR_ENr,
   8703 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   8704 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   8705 	BCMI_TSCBH_XGXS_MAIN0_ECC_2B_ERR_INTR_ENr_fields,
   8706 #else
   8707 	0,
   8708 #endif
   8709 #endif
   8710 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   8711 	PHYMOD_SYMBOL_FLAG_REGISTER,
   8712 	"MAIN0_ECC_2B_ERR_INTR_ENr",
   8713 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   8714 	"MAIN0_ECC_2B_ERR_INTERRUPT_EN",
   8715 	NULL,
   8716 #endif
   8717 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   8718 	0x5beb, /* 23531 */
   8719 	0,
   8720 #endif
   8721 },
   8722 {
   8723 	BCMI_TSCBH_XGXS_MAIN0_ECC_CORRUPT_CTL0r,
   8724 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   8725 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   8726 	BCMI_TSCBH_XGXS_MAIN0_ECC_CORRUPT_CTL0r_fields,
   8727 #else
   8728 	0,
   8729 #endif
   8730 #endif
   8731 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   8732 	PHYMOD_SYMBOL_FLAG_REGISTER,
   8733 	"MAIN0_ECC_CORRUPT_CTL0r",
   8734 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   8735 	"MAIN0_ECC_CORRUPT_CONTROL_0",
   8736 	NULL,
   8737 #endif
   8738 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   8739 	0x0, /* 0 */
   8740 	0,
   8741 #endif
   8742 },
   8743 {
   8744 	BCMI_TSCBH_XGXS_MAIN0_ECC_CORRUPT_CTL1r,
   8745 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   8746 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   8747 	BCMI_TSCBH_XGXS_MAIN0_ECC_CORRUPT_CTL1r_fields,
   8748 #else
   8749 	0,
   8750 #endif
   8751 #endif
   8752 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   8753 	PHYMOD_SYMBOL_FLAG_REGISTER,
   8754 	"MAIN0_ECC_CORRUPT_CTL1r",
   8755 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   8756 	"MAIN0_ECC_CORRUPT_CONTROL_1",
   8757 	NULL,
   8758 #endif
   8759 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   8760 	0x0, /* 0 */
   8761 	0,
   8762 #endif
   8763 },
   8764 {
   8765 	BCMI_TSCBH_XGXS_MAIN0_TM_CTLr,
   8766 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   8767 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   8768 	BCMI_TSCBH_XGXS_MAIN0_TM_CTLr_fields,
   8769 #else
   8770 	0,
   8771 #endif
   8772 #endif
   8773 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   8774 	PHYMOD_SYMBOL_FLAG_REGISTER,
   8775 	"MAIN0_TM_CTLr",
   8776 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   8777 	"MAIN0_TM_CONTROL",
   8778 	NULL,
   8779 #endif
   8780 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   8781 	0x0, /* 0 */
   8782 	0,
   8783 #endif
   8784 },
   8785 {
   8786 	BCMI_TSCBH_XGXS_PMD_X1_CTLr,
   8787 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   8788 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   8789 	BCMI_TSCBH_XGXS_PMD_X1_CTLr_fields,
   8790 #else
   8791 	0,
   8792 #endif
   8793 #endif
   8794 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   8795 	PHYMOD_SYMBOL_FLAG_REGISTER,
   8796 	"PMD_X1_CTLr",
   8797 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   8798 	"PMD_X1_CONTROL",
   8799 	NULL,
   8800 #endif
   8801 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   8802 	0x1, /* 1 */
   8803 	0,
   8804 #endif
   8805 },
   8806 {
   8807 	BCMI_TSCBH_XGXS_PMD_X1_PM_TMR_OFFSr,
   8808 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   8809 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   8810 	BCMI_TSCBH_XGXS_PMD_X1_PM_TMR_OFFSr_fields,
   8811 #else
   8812 	0,
   8813 #endif
   8814 #endif
   8815 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   8816 	PHYMOD_SYMBOL_FLAG_REGISTER,
   8817 	"PMD_X1_PM_TMR_OFFSr",
   8818 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   8819 	"PMD_X1_PM_TIMER_OFFSET",
   8820 	NULL,
   8821 #endif
   8822 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   8823 	0x0, /* 0 */
   8824 	0,
   8825 #endif
   8826 },
   8827 {
   8828 	BCMI_TSCBH_XGXS_PMD_X1_FCLK_PERIODr,
   8829 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   8830 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   8831 	BCMI_TSCBH_XGXS_PMD_X1_FCLK_PERIODr_fields,
   8832 #else
   8833 	0,
   8834 #endif
   8835 #endif
   8836 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   8837 	PHYMOD_SYMBOL_FLAG_REGISTER,
   8838 	"PMD_X1_FCLK_PERIODr",
   8839 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   8840 	NULL,
   8841 	NULL,
   8842 #endif
   8843 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   8844 	0x634c, /* 25420 */
   8845 	0,
   8846 #endif
   8847 },
   8848 {
   8849 	BCMI_TSCBH_XGXS_PKTGEN_CTL1r,
   8850 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   8851 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   8852 	BCMI_TSCBH_XGXS_PKTGEN_CTL1r_fields,
   8853 #else
   8854 	0,
   8855 #endif
   8856 #endif
   8857 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   8858 	PHYMOD_SYMBOL_FLAG_REGISTER,
   8859 	"PKTGEN_CTL1r",
   8860 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   8861 	"PKTGEN0_PKTGENCTRL1",
   8862 	NULL,
   8863 #endif
   8864 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   8865 	0x0, /* 0 */
   8866 	0,
   8867 #endif
   8868 },
   8869 {
   8870 	BCMI_TSCBH_XGXS_PKTGEN_PRTPCTLr,
   8871 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   8872 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   8873 	BCMI_TSCBH_XGXS_PKTGEN_PRTPCTLr_fields,
   8874 #else
   8875 	0,
   8876 #endif
   8877 #endif
   8878 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   8879 	PHYMOD_SYMBOL_FLAG_REGISTER,
   8880 	"PKTGEN_PRTPCTLr",
   8881 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   8882 	"PKTGEN0_PRTPCONTROL",
   8883 	NULL,
   8884 #endif
   8885 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   8886 	0x0, /* 0 */
   8887 	0,
   8888 #endif
   8889 },
   8890 {
   8891 	BCMI_TSCBH_XGXS_PKTGEN_PCS_SEEDA0r,
   8892 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   8893 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   8894 	BCMI_TSCBH_XGXS_PKTGEN_PCS_SEEDA0r_fields,
   8895 #else
   8896 	0,
   8897 #endif
   8898 #endif
   8899 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   8900 	PHYMOD_SYMBOL_FLAG_REGISTER,
   8901 	"PKTGEN_PCS_SEEDA0r",
   8902 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   8903 	"PKTGEN0_PCS_SEEDA0",
   8904 	NULL,
   8905 #endif
   8906 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   8907 	0x0, /* 0 */
   8908 	0,
   8909 #endif
   8910 },
   8911 {
   8912 	BCMI_TSCBH_XGXS_PKTGEN_PCS_SEEDA1r,
   8913 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   8914 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   8915 	BCMI_TSCBH_XGXS_PKTGEN_PCS_SEEDA1r_fields,
   8916 #else
   8917 	0,
   8918 #endif
   8919 #endif
   8920 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   8921 	PHYMOD_SYMBOL_FLAG_REGISTER,
   8922 	"PKTGEN_PCS_SEEDA1r",
   8923 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   8924 	"PKTGEN0_PCS_SEEDA1",
   8925 	NULL,
   8926 #endif
   8927 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   8928 	0x0, /* 0 */
   8929 	0,
   8930 #endif
   8931 },
   8932 {
   8933 	BCMI_TSCBH_XGXS_PKTGEN_PCS_SEEDA2r,
   8934 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   8935 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   8936 	BCMI_TSCBH_XGXS_PKTGEN_PCS_SEEDA2r_fields,
   8937 #else
   8938 	0,
   8939 #endif
   8940 #endif
   8941 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   8942 	PHYMOD_SYMBOL_FLAG_REGISTER,
   8943 	"PKTGEN_PCS_SEEDA2r",
   8944 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   8945 	"PKTGEN0_PCS_SEEDA2",
   8946 	NULL,
   8947 #endif
   8948 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   8949 	0x0, /* 0 */
   8950 	0,
   8951 #endif
   8952 },
   8953 {
   8954 	BCMI_TSCBH_XGXS_PKTGEN_PCS_SEEDA3r,
   8955 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   8956 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   8957 	BCMI_TSCBH_XGXS_PKTGEN_PCS_SEEDA3r_fields,
   8958 #else
   8959 	0,
   8960 #endif
   8961 #endif
   8962 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   8963 	PHYMOD_SYMBOL_FLAG_REGISTER,
   8964 	"PKTGEN_PCS_SEEDA3r",
   8965 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   8966 	"PKTGEN0_PCS_SEEDA3",
   8967 	NULL,
   8968 #endif
   8969 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   8970 	0x0, /* 0 */
   8971 	0,
   8972 #endif
   8973 },
   8974 {
   8975 	BCMI_TSCBH_XGXS_PKTGEN_PCS_SEEDB0r,
   8976 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   8977 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   8978 	BCMI_TSCBH_XGXS_PKTGEN_PCS_SEEDB0r_fields,
   8979 #else
   8980 	0,
   8981 #endif
   8982 #endif
   8983 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   8984 	PHYMOD_SYMBOL_FLAG_REGISTER,
   8985 	"PKTGEN_PCS_SEEDB0r",
   8986 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   8987 	"PKTGEN0_PCS_SEEDB0",
   8988 	NULL,
   8989 #endif
   8990 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   8991 	0x0, /* 0 */
   8992 	0,
   8993 #endif
   8994 },
   8995 {
   8996 	BCMI_TSCBH_XGXS_PKTGEN_PCS_SEEDB1r,
   8997 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   8998 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   8999 	BCMI_TSCBH_XGXS_PKTGEN_PCS_SEEDB1r_fields,
   9000 #else
   9001 	0,
   9002 #endif
   9003 #endif
   9004 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9005 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9006 	"PKTGEN_PCS_SEEDB1r",
   9007 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9008 	"PKTGEN0_PCS_SEEDB1",
   9009 	NULL,
   9010 #endif
   9011 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9012 	0x0, /* 0 */
   9013 	0,
   9014 #endif
   9015 },
   9016 {
   9017 	BCMI_TSCBH_XGXS_PKTGEN_PCS_SEEDB2r,
   9018 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9019 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9020 	BCMI_TSCBH_XGXS_PKTGEN_PCS_SEEDB2r_fields,
   9021 #else
   9022 	0,
   9023 #endif
   9024 #endif
   9025 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9026 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9027 	"PKTGEN_PCS_SEEDB2r",
   9028 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9029 	"PKTGEN0_PCS_SEEDB2",
   9030 	NULL,
   9031 #endif
   9032 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9033 	0x0, /* 0 */
   9034 	0,
   9035 #endif
   9036 },
   9037 {
   9038 	BCMI_TSCBH_XGXS_PKTGEN_PCS_SEEDB3r,
   9039 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9040 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9041 	BCMI_TSCBH_XGXS_PKTGEN_PCS_SEEDB3r_fields,
   9042 #else
   9043 	0,
   9044 #endif
   9045 #endif
   9046 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9047 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9048 	"PKTGEN_PCS_SEEDB3r",
   9049 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9050 	"PKTGEN0_PCS_SEEDB3",
   9051 	NULL,
   9052 #endif
   9053 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9054 	0x0, /* 0 */
   9055 	0,
   9056 #endif
   9057 },
   9058 {
   9059 	BCMI_TSCBH_XGXS_PKTGEN_ERRMASK4r,
   9060 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9061 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9062 	BCMI_TSCBH_XGXS_PKTGEN_ERRMASK4r_fields,
   9063 #else
   9064 	0,
   9065 #endif
   9066 #endif
   9067 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9068 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9069 	"PKTGEN_ERRMASK4r",
   9070 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9071 	"PKTGEN1_ERRORMASK4",
   9072 	NULL,
   9073 #endif
   9074 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9075 	0x0, /* 0 */
   9076 	0,
   9077 #endif
   9078 },
   9079 {
   9080 	BCMI_TSCBH_XGXS_PKTGEN_ERRMASK3r,
   9081 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9082 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9083 	BCMI_TSCBH_XGXS_PKTGEN_ERRMASK3r_fields,
   9084 #else
   9085 	0,
   9086 #endif
   9087 #endif
   9088 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9089 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9090 	"PKTGEN_ERRMASK3r",
   9091 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9092 	"PKTGEN1_ERRORMASK3",
   9093 	NULL,
   9094 #endif
   9095 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9096 	0x0, /* 0 */
   9097 	0,
   9098 #endif
   9099 },
   9100 {
   9101 	BCMI_TSCBH_XGXS_PKTGEN_ERRMASK2r,
   9102 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9103 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9104 	BCMI_TSCBH_XGXS_PKTGEN_ERRMASK2r_fields,
   9105 #else
   9106 	0,
   9107 #endif
   9108 #endif
   9109 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9110 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9111 	"PKTGEN_ERRMASK2r",
   9112 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9113 	"PKTGEN1_ERRORMASK2",
   9114 	NULL,
   9115 #endif
   9116 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9117 	0x0, /* 0 */
   9118 	0,
   9119 #endif
   9120 },
   9121 {
   9122 	BCMI_TSCBH_XGXS_PKTGEN_ERRMASK1r,
   9123 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9124 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9125 	BCMI_TSCBH_XGXS_PKTGEN_ERRMASK1r_fields,
   9126 #else
   9127 	0,
   9128 #endif
   9129 #endif
   9130 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9131 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9132 	"PKTGEN_ERRMASK1r",
   9133 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9134 	"PKTGEN1_ERRORMASK1",
   9135 	NULL,
   9136 #endif
   9137 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9138 	0x0, /* 0 */
   9139 	0,
   9140 #endif
   9141 },
   9142 {
   9143 	BCMI_TSCBH_XGXS_PKTGEN_ERRMASK0r,
   9144 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9145 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9146 	BCMI_TSCBH_XGXS_PKTGEN_ERRMASK0r_fields,
   9147 #else
   9148 	0,
   9149 #endif
   9150 #endif
   9151 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9152 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9153 	"PKTGEN_ERRMASK0r",
   9154 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9155 	"PKTGEN1_ERRORMASK0",
   9156 	NULL,
   9157 #endif
   9158 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9159 	0x0, /* 0 */
   9160 	0,
   9161 #endif
   9162 },
   9163 {
   9164 	BCMI_TSCBH_XGXS_PKTGEN_GLASTEST_CTLr,
   9165 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9166 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9167 	BCMI_TSCBH_XGXS_PKTGEN_GLASTEST_CTLr_fields,
   9168 #else
   9169 	0,
   9170 #endif
   9171 #endif
   9172 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9173 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9174 	"PKTGEN_GLASTEST_CTLr",
   9175 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9176 	"PKTGEN1_GLASTEST_CONTROL",
   9177 	NULL,
   9178 #endif
   9179 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9180 	0x7c, /* 124 */
   9181 	0,
   9182 #endif
   9183 },
   9184 {
   9185 	BCMI_TSCBH_XGXS_PKTGEN_GLASTEST_EXP0r,
   9186 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9187 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9188 	BCMI_TSCBH_XGXS_PKTGEN_GLASTEST_EXP0r_fields,
   9189 #else
   9190 	0,
   9191 #endif
   9192 #endif
   9193 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9194 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9195 	"PKTGEN_GLASTEST_EXP0r",
   9196 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9197 	"PKTGEN1_GLASTEST_EXP_0",
   9198 	NULL,
   9199 #endif
   9200 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9201 	0x0, /* 0 */
   9202 	0,
   9203 #endif
   9204 },
   9205 {
   9206 	BCMI_TSCBH_XGXS_PKTGEN_GLASTEST_EXP1r,
   9207 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9208 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9209 	BCMI_TSCBH_XGXS_PKTGEN_GLASTEST_EXP1r_fields,
   9210 #else
   9211 	0,
   9212 #endif
   9213 #endif
   9214 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9215 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9216 	"PKTGEN_GLASTEST_EXP1r",
   9217 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9218 	"PKTGEN1_GLASTEST_EXP_1",
   9219 	NULL,
   9220 #endif
   9221 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9222 	0x0, /* 0 */
   9223 	0,
   9224 #endif
   9225 },
   9226 {
   9227 	BCMI_TSCBH_XGXS_PKTGEN_GLASTEST_EXP2r,
   9228 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9229 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9230 	BCMI_TSCBH_XGXS_PKTGEN_GLASTEST_EXP2r_fields,
   9231 #else
   9232 	0,
   9233 #endif
   9234 #endif
   9235 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9236 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9237 	"PKTGEN_GLASTEST_EXP2r",
   9238 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9239 	"PKTGEN1_GLASTEST_EXP_2",
   9240 	NULL,
   9241 #endif
   9242 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9243 	0x0, /* 0 */
   9244 	0,
   9245 #endif
   9246 },
   9247 {
   9248 	BCMI_TSCBH_XGXS_PKTGEN_GLASTEST_ACTDATA0r,
   9249 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9250 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9251 	BCMI_TSCBH_XGXS_PKTGEN_GLASTEST_ACTDATA0r_fields,
   9252 #else
   9253 	0,
   9254 #endif
   9255 #endif
   9256 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9257 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9258 	"PKTGEN_GLASTEST_ACTDATA0r",
   9259 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9260 	"PKTGEN1_GLASTEST_ACTDATA_0",
   9261 	NULL,
   9262 #endif
   9263 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9264 	0x0, /* 0 */
   9265 	0,
   9266 #endif
   9267 },
   9268 {
   9269 	BCMI_TSCBH_XGXS_PKTGEN_GLASTEST_ACTDATA1r,
   9270 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9271 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9272 	BCMI_TSCBH_XGXS_PKTGEN_GLASTEST_ACTDATA1r_fields,
   9273 #else
   9274 	0,
   9275 #endif
   9276 #endif
   9277 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9278 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9279 	"PKTGEN_GLASTEST_ACTDATA1r",
   9280 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9281 	"PKTGEN1_GLASTEST_ACTDATA_1",
   9282 	NULL,
   9283 #endif
   9284 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9285 	0x0, /* 0 */
   9286 	0,
   9287 #endif
   9288 },
   9289 {
   9290 	BCMI_TSCBH_XGXS_PKTGEN_GLASTEST_ACTDATA2r,
   9291 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9292 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9293 	BCMI_TSCBH_XGXS_PKTGEN_GLASTEST_ACTDATA2r_fields,
   9294 #else
   9295 	0,
   9296 #endif
   9297 #endif
   9298 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9299 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9300 	"PKTGEN_GLASTEST_ACTDATA2r",
   9301 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9302 	"PKTGEN1_GLASTEST_ACTDATA_2",
   9303 	NULL,
   9304 #endif
   9305 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9306 	0x0, /* 0 */
   9307 	0,
   9308 #endif
   9309 },
   9310 {
   9311 	BCMI_TSCBH_XGXS_PKTGEN_GLASTEST_ACTADJr,
   9312 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9313 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9314 	BCMI_TSCBH_XGXS_PKTGEN_GLASTEST_ACTADJr_fields,
   9315 #else
   9316 	0,
   9317 #endif
   9318 #endif
   9319 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9320 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9321 	"PKTGEN_GLASTEST_ACTADJr",
   9322 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9323 	"PKTGEN1_GLASTEST_ACTADJ",
   9324 	NULL,
   9325 #endif
   9326 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9327 	0x0, /* 0 */
   9328 	0,
   9329 #endif
   9330 },
   9331 {
   9332 	BCMI_TSCBH_XGXS_TX_X1_TX_LN_SWPr,
   9333 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9334 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9335 	BCMI_TSCBH_XGXS_TX_X1_TX_LN_SWPr_fields,
   9336 #else
   9337 	0,
   9338 #endif
   9339 #endif
   9340 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9341 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9342 	"TX_X1_TX_LN_SWPr",
   9343 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9344 	"TX_X1_CONTROL0_TX_LANE_SWAP",
   9345 	NULL,
   9346 #endif
   9347 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9348 	0x688, /* 1672 */
   9349 	0,
   9350 #endif
   9351 },
   9352 {
   9353 	BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_CTLr,
   9354 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9355 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9356 	BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_CTLr_fields,
   9357 #else
   9358 	0,
   9359 #endif
   9360 #endif
   9361 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9362 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9363 	"TX_X1_GLAS_TPMA_CTLr",
   9364 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9365 	"TX_X1_CONTROL0_GLAS_TPMA_CONTROL",
   9366 	NULL,
   9367 #endif
   9368 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9369 	0x0, /* 0 */
   9370 	0,
   9371 #endif
   9372 },
   9373 {
   9374 	BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_DATA0r,
   9375 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9376 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9377 	BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_DATA0r_fields,
   9378 #else
   9379 	0,
   9380 #endif
   9381 #endif
   9382 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9383 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9384 	"TX_X1_GLAS_TPMA_DATA0r",
   9385 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9386 	"TX_X1_CONTROL0_GLAS_TPMA_DATA_0",
   9387 	NULL,
   9388 #endif
   9389 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9390 	0x0, /* 0 */
   9391 	0,
   9392 #endif
   9393 },
   9394 {
   9395 	BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_DATA1r,
   9396 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9397 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9398 	BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_DATA1r_fields,
   9399 #else
   9400 	0,
   9401 #endif
   9402 #endif
   9403 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9404 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9405 	"TX_X1_GLAS_TPMA_DATA1r",
   9406 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9407 	"TX_X1_CONTROL0_GLAS_TPMA_DATA_1",
   9408 	NULL,
   9409 #endif
   9410 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9411 	0x0, /* 0 */
   9412 	0,
   9413 #endif
   9414 },
   9415 {
   9416 	BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_DATA2r,
   9417 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9418 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9419 	BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_DATA2r_fields,
   9420 #else
   9421 	0,
   9422 #endif
   9423 #endif
   9424 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9425 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9426 	"TX_X1_GLAS_TPMA_DATA2r",
   9427 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9428 	"TX_X1_CONTROL0_GLAS_TPMA_DATA_2",
   9429 	NULL,
   9430 #endif
   9431 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9432 	0x0, /* 0 */
   9433 	0,
   9434 #endif
   9435 },
   9436 {
   9437 	BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_DATA3r,
   9438 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9439 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9440 	BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_DATA3r_fields,
   9441 #else
   9442 	0,
   9443 #endif
   9444 #endif
   9445 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9446 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9447 	"TX_X1_GLAS_TPMA_DATA3r",
   9448 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9449 	"TX_X1_CONTROL0_GLAS_TPMA_DATA_3",
   9450 	NULL,
   9451 #endif
   9452 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9453 	0x0, /* 0 */
   9454 	0,
   9455 #endif
   9456 },
   9457 {
   9458 	BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_DATA4r,
   9459 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9460 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9461 	BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_DATA4r_fields,
   9462 #else
   9463 	0,
   9464 #endif
   9465 #endif
   9466 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9467 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9468 	"TX_X1_GLAS_TPMA_DATA4r",
   9469 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9470 	"TX_X1_CONTROL0_GLAS_TPMA_DATA_4",
   9471 	NULL,
   9472 #endif
   9473 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9474 	0x0, /* 0 */
   9475 	0,
   9476 #endif
   9477 },
   9478 {
   9479 	BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_DATA5r,
   9480 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9481 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9482 	BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_DATA5r_fields,
   9483 #else
   9484 	0,
   9485 #endif
   9486 #endif
   9487 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9488 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9489 	"TX_X1_GLAS_TPMA_DATA5r",
   9490 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9491 	"TX_X1_CONTROL0_GLAS_TPMA_DATA_5",
   9492 	NULL,
   9493 #endif
   9494 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9495 	0x0, /* 0 */
   9496 	0,
   9497 #endif
   9498 },
   9499 {
   9500 	BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_DATA6r,
   9501 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9502 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9503 	BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_DATA6r_fields,
   9504 #else
   9505 	0,
   9506 #endif
   9507 #endif
   9508 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9509 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9510 	"TX_X1_GLAS_TPMA_DATA6r",
   9511 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9512 	"TX_X1_CONTROL0_GLAS_TPMA_DATA_6",
   9513 	NULL,
   9514 #endif
   9515 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9516 	0x0, /* 0 */
   9517 	0,
   9518 #endif
   9519 },
   9520 {
   9521 	BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_DATA7r,
   9522 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9523 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9524 	BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_DATA7r_fields,
   9525 #else
   9526 	0,
   9527 #endif
   9528 #endif
   9529 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9530 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9531 	"TX_X1_GLAS_TPMA_DATA7r",
   9532 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9533 	"TX_X1_CONTROL0_GLAS_TPMA_DATA_7",
   9534 	NULL,
   9535 #endif
   9536 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9537 	0x0, /* 0 */
   9538 	0,
   9539 #endif
   9540 },
   9541 {
   9542 	BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_ADJ_0_1r,
   9543 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9544 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9545 	BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_ADJ_0_1r_fields,
   9546 #else
   9547 	0,
   9548 #endif
   9549 #endif
   9550 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9551 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9552 	"TX_X1_GLAS_TPMA_ADJ_0_1r",
   9553 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9554 	"TX_X1_CONTROL0_GLAS_TPMA_ADJ_0_1",
   9555 	NULL,
   9556 #endif
   9557 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9558 	0x0, /* 0 */
   9559 	0,
   9560 #endif
   9561 },
   9562 {
   9563 	BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_ADJ_2_3r,
   9564 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9565 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9566 	BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_ADJ_2_3r_fields,
   9567 #else
   9568 	0,
   9569 #endif
   9570 #endif
   9571 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9572 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9573 	"TX_X1_GLAS_TPMA_ADJ_2_3r",
   9574 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9575 	"TX_X1_CONTROL0_GLAS_TPMA_ADJ_2_3",
   9576 	NULL,
   9577 #endif
   9578 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9579 	0x0, /* 0 */
   9580 	0,
   9581 #endif
   9582 },
   9583 {
   9584 	BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_ADJ_4_5r,
   9585 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9586 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9587 	BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_ADJ_4_5r_fields,
   9588 #else
   9589 	0,
   9590 #endif
   9591 #endif
   9592 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9593 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9594 	"TX_X1_GLAS_TPMA_ADJ_4_5r",
   9595 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9596 	"TX_X1_CONTROL0_GLAS_TPMA_ADJ_4_5",
   9597 	NULL,
   9598 #endif
   9599 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9600 	0x0, /* 0 */
   9601 	0,
   9602 #endif
   9603 },
   9604 {
   9605 	BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_ADJ_6_7r,
   9606 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9607 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9608 	BCMI_TSCBH_XGXS_TX_X1_GLAS_TPMA_ADJ_6_7r_fields,
   9609 #else
   9610 	0,
   9611 #endif
   9612 #endif
   9613 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9614 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9615 	"TX_X1_GLAS_TPMA_ADJ_6_7r",
   9616 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9617 	"TX_X1_CONTROL0_GLAS_TPMA_ADJ_6_7",
   9618 	NULL,
   9619 #endif
   9620 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9621 	0x0, /* 0 */
   9622 	0,
   9623 #endif
   9624 },
   9625 {
   9626 	BCMI_TSCBH_XGXS_RX_X1_RS_FEC_CFGr,
   9627 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9628 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9629 	BCMI_TSCBH_XGXS_RX_X1_RS_FEC_CFGr_fields,
   9630 #else
   9631 	0,
   9632 #endif
   9633 #endif
   9634 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9635 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9636 	"RX_X1_RS_FEC_CFGr",
   9637 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9638 	"RX_X1_CONTROL0_RS_FEC_CONFIG",
   9639 	NULL,
   9640 #endif
   9641 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9642 	0x2, /* 2 */
   9643 	0,
   9644 #endif
   9645 },
   9646 {
   9647 	BCMI_TSCBH_XGXS_RX_X1_RX_LN_SWPr,
   9648 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9649 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9650 	BCMI_TSCBH_XGXS_RX_X1_RX_LN_SWPr_fields,
   9651 #else
   9652 	0,
   9653 #endif
   9654 #endif
   9655 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9656 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9657 	"RX_X1_RX_LN_SWPr",
   9658 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9659 	"RX_X1_CONTROL0_RX_LANE_SWAP",
   9660 	NULL,
   9661 #endif
   9662 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9663 	0x688, /* 1672 */
   9664 	0,
   9665 #endif
   9666 },
   9667 {
   9668 	BCMI_TSCBH_XGXS_RX_X1_ECC_STS_BASE_R_FECr,
   9669 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9670 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9671 	BCMI_TSCBH_XGXS_RX_X1_ECC_STS_BASE_R_FECr_fields,
   9672 #else
   9673 	0,
   9674 #endif
   9675 #endif
   9676 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9677 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9678 	"RX_X1_ECC_STS_BASE_R_FECr",
   9679 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9680 	"RX_X1_ECC_ECC_STATUS_BASE_R_FEC",
   9681 	NULL,
   9682 #endif
   9683 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9684 	0x0, /* 0 */
   9685 	0,
   9686 #endif
   9687 },
   9688 {
   9689 	BCMI_TSCBH_XGXS_RX_X1_ECC_STS_RSFEC_RBUF_MPPr,
   9690 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9691 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9692 	BCMI_TSCBH_XGXS_RX_X1_ECC_STS_RSFEC_RBUF_MPPr_fields,
   9693 #else
   9694 	0,
   9695 #endif
   9696 #endif
   9697 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9698 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9699 	"RX_X1_ECC_STS_RSFEC_RBUF_MPPr",
   9700 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9701 	"RX_X1_ECC_ECC_STATUS_RSFEC_RBUF_MPP",
   9702 	NULL,
   9703 #endif
   9704 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9705 	0x0, /* 0 */
   9706 	0,
   9707 #endif
   9708 },
   9709 {
   9710 	BCMI_TSCBH_XGXS_RX_X1_ECC_STS_RSFEC_RS400G_MPPr,
   9711 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9712 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9713 	BCMI_TSCBH_XGXS_RX_X1_ECC_STS_RSFEC_RS400G_MPPr_fields,
   9714 #else
   9715 	0,
   9716 #endif
   9717 #endif
   9718 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9719 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9720 	"RX_X1_ECC_STS_RSFEC_RS400G_MPPr",
   9721 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9722 	"RX_X1_ECC_ECC_STATUS_RSFEC_RS400G_MPP",
   9723 	NULL,
   9724 #endif
   9725 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9726 	0x0, /* 0 */
   9727 	0,
   9728 #endif
   9729 },
   9730 {
   9731 	BCMI_TSCBH_XGXS_RX_X1_ECC_STS_DESKEWr,
   9732 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9733 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9734 	BCMI_TSCBH_XGXS_RX_X1_ECC_STS_DESKEWr_fields,
   9735 #else
   9736 	0,
   9737 #endif
   9738 #endif
   9739 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9740 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9741 	"RX_X1_ECC_STS_DESKEWr",
   9742 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9743 	"RX_X1_ECC_ECC_STATUS_DESKEW",
   9744 	NULL,
   9745 #endif
   9746 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9747 	0x0, /* 0 */
   9748 	0,
   9749 #endif
   9750 },
   9751 {
   9752 	BCMI_TSCBH_XGXS_RX_X1_ECC_STS_SPD_TBLr,
   9753 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9754 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9755 	BCMI_TSCBH_XGXS_RX_X1_ECC_STS_SPD_TBLr_fields,
   9756 #else
   9757 	0,
   9758 #endif
   9759 #endif
   9760 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9761 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9762 	"RX_X1_ECC_STS_SPD_TBLr",
   9763 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9764 	"RX_X1_ECC_ECC_STATUS_SPD_TBL",
   9765 	NULL,
   9766 #endif
   9767 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9768 	0x0, /* 0 */
   9769 	0,
   9770 #endif
   9771 },
   9772 {
   9773 	BCMI_TSCBH_XGXS_RX_X1_ECC_STS_AM_TBLr,
   9774 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9775 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9776 	BCMI_TSCBH_XGXS_RX_X1_ECC_STS_AM_TBLr_fields,
   9777 #else
   9778 	0,
   9779 #endif
   9780 #endif
   9781 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9782 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9783 	"RX_X1_ECC_STS_AM_TBLr",
   9784 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9785 	"RX_X1_ECC_ECC_STATUS_AM_TBL",
   9786 	NULL,
   9787 #endif
   9788 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9789 	0x0, /* 0 */
   9790 	0,
   9791 #endif
   9792 },
   9793 {
   9794 	BCMI_TSCBH_XGXS_RX_X1_ECC_STS_UM_TBLr,
   9795 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9796 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9797 	BCMI_TSCBH_XGXS_RX_X1_ECC_STS_UM_TBLr_fields,
   9798 #else
   9799 	0,
   9800 #endif
   9801 #endif
   9802 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9803 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9804 	"RX_X1_ECC_STS_UM_TBLr",
   9805 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9806 	"RX_X1_ECC_ECC_STATUS_UM_TBL",
   9807 	NULL,
   9808 #endif
   9809 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9810 	0x0, /* 0 */
   9811 	0,
   9812 #endif
   9813 },
   9814 {
   9815 	BCMI_TSCBH_XGXS_RX_X1_ECC_STS_TX_1588_MPPr,
   9816 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9817 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9818 	BCMI_TSCBH_XGXS_RX_X1_ECC_STS_TX_1588_MPPr_fields,
   9819 #else
   9820 	0,
   9821 #endif
   9822 #endif
   9823 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9824 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9825 	"RX_X1_ECC_STS_TX_1588_MPPr",
   9826 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9827 	"RX_X1_ECC_ECC_STATUS_TX_1588_MPP",
   9828 	NULL,
   9829 #endif
   9830 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9831 	0x0, /* 0 */
   9832 	0,
   9833 #endif
   9834 },
   9835 {
   9836 	BCMI_TSCBH_XGXS_RX_X1_ECC_STS_TX_1588_400Gr,
   9837 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9838 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9839 	BCMI_TSCBH_XGXS_RX_X1_ECC_STS_TX_1588_400Gr_fields,
   9840 #else
   9841 	0,
   9842 #endif
   9843 #endif
   9844 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9845 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9846 	"RX_X1_ECC_STS_TX_1588_400Gr",
   9847 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9848 	"RX_X1_ECC_ECC_STATUS_TX_1588_400G",
   9849 	NULL,
   9850 #endif
   9851 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9852 	0x0, /* 0 */
   9853 	0,
   9854 #endif
   9855 },
   9856 {
   9857 	BCMI_TSCBH_XGXS_RX_X1_ECC_STS_RX_1588_MPPr,
   9858 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9859 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9860 	BCMI_TSCBH_XGXS_RX_X1_ECC_STS_RX_1588_MPPr_fields,
   9861 #else
   9862 	0,
   9863 #endif
   9864 #endif
   9865 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9866 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9867 	"RX_X1_ECC_STS_RX_1588_MPPr",
   9868 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9869 	"RX_X1_ECC_ECC_STATUS_RX_1588_MPP",
   9870 	NULL,
   9871 #endif
   9872 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9873 	0x0, /* 0 */
   9874 	0,
   9875 #endif
   9876 },
   9877 {
   9878 	BCMI_TSCBH_XGXS_RX_X1_ECC_STS_RX_1588_400Gr,
   9879 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9880 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9881 	BCMI_TSCBH_XGXS_RX_X1_ECC_STS_RX_1588_400Gr_fields,
   9882 #else
   9883 	0,
   9884 #endif
   9885 #endif
   9886 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9887 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9888 	"RX_X1_ECC_STS_RX_1588_400Gr",
   9889 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9890 	"RX_X1_ECC_ECC_STATUS_RX_1588_400G",
   9891 	NULL,
   9892 #endif
   9893 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9894 	0x0, /* 0 */
   9895 	0,
   9896 #endif
   9897 },
   9898 {
   9899 	BCMI_TSCBH_XGXS_AN_X1_OUI_UPRr,
   9900 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9901 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9902 	BCMI_TSCBH_XGXS_AN_X1_OUI_UPRr_fields,
   9903 #else
   9904 	0,
   9905 #endif
   9906 #endif
   9907 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9908 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9909 	"AN_X1_OUI_UPRr",
   9910 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9911 	"AN_X1_CONTROL_OUI_UPPER",
   9912 	NULL,
   9913 #endif
   9914 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9915 	0x0, /* 0 */
   9916 	0,
   9917 #endif
   9918 },
   9919 {
   9920 	BCMI_TSCBH_XGXS_AN_X1_OUI_LWRr,
   9921 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9922 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9923 	BCMI_TSCBH_XGXS_AN_X1_OUI_LWRr_fields,
   9924 #else
   9925 	0,
   9926 #endif
   9927 #endif
   9928 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9929 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9930 	"AN_X1_OUI_LWRr",
   9931 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9932 	"AN_X1_CONTROL_OUI_LOWER",
   9933 	NULL,
   9934 #endif
   9935 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9936 	0x0, /* 0 */
   9937 	0,
   9938 #endif
   9939 },
   9940 {
   9941 	BCMI_TSCBH_XGXS_AN_X1_CL73_BRK_LNKr,
   9942 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9943 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9944 	BCMI_TSCBH_XGXS_AN_X1_CL73_BRK_LNKr_fields,
   9945 #else
   9946 	0,
   9947 #endif
   9948 #endif
   9949 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9950 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9951 	"AN_X1_CL73_BRK_LNKr",
   9952 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9953 	"AN_X1_TIMERS_CL73_BREAK_LINK",
   9954 	NULL,
   9955 #endif
   9956 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9957 	0x0, /* 0 */
   9958 	0,
   9959 #endif
   9960 },
   9961 {
   9962 	BCMI_TSCBH_XGXS_AN_X1_CL73_ERRr,
   9963 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9964 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9965 	BCMI_TSCBH_XGXS_AN_X1_CL73_ERRr_fields,
   9966 #else
   9967 	0,
   9968 #endif
   9969 #endif
   9970 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9971 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9972 	"AN_X1_CL73_ERRr",
   9973 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9974 	"AN_X1_TIMERS_CL73_ERROR",
   9975 	NULL,
   9976 #endif
   9977 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9978 	0x0, /* 0 */
   9979 	0,
   9980 #endif
   9981 },
   9982 {
   9983 	BCMI_TSCBH_XGXS_AN_X1_IGNORE_LNK_TMRr,
   9984 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
   9985 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
   9986 	BCMI_TSCBH_XGXS_AN_X1_IGNORE_LNK_TMRr_fields,
   9987 #else
   9988 	0,
   9989 #endif
   9990 #endif
   9991 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
   9992 	PHYMOD_SYMBOL_FLAG_REGISTER,
   9993 	"AN_X1_IGNORE_LNK_TMRr",
   9994 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
   9995 	"AN_X1_TIMERS_IGNORE_LINK_TIMER",
   9996 	NULL,
   9997 #endif
   9998 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
   9999 	0x0, /* 0 */
  10000 	0,
  10001 #endif
  10002 },
  10003 {
  10004 	BCMI_TSCBH_XGXS_AN_X1_LNK_FAIL_INHBT_TMR_CL72r,
  10005 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10006 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10007 	BCMI_TSCBH_XGXS_AN_X1_LNK_FAIL_INHBT_TMR_CL72r_fields,
  10008 #else
  10009 	0,
  10010 #endif
  10011 #endif
  10012 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10013 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10014 	"AN_X1_LNK_FAIL_INHBT_TMR_CL72r",
  10015 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10016 	"AN_X1_TIMERS_LINK_FAIL_INHIBIT_TIMER_CL72",
  10017 	NULL,
  10018 #endif
  10019 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10020 	0x0, /* 0 */
  10021 	0,
  10022 #endif
  10023 },
  10024 {
  10025 	BCMI_TSCBH_XGXS_AN_X1_LNK_FAIL_INHBT_TMR_NOT_CL72r,
  10026 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10027 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10028 	BCMI_TSCBH_XGXS_AN_X1_LNK_FAIL_INHBT_TMR_NOT_CL72r_fields,
  10029 #else
  10030 	0,
  10031 #endif
  10032 #endif
  10033 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10034 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10035 	"AN_X1_LNK_FAIL_INHBT_TMR_NOT_CL72r",
  10036 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10037 	"AN_X1_TIMERS_LINK_FAIL_INHIBIT_TIMER_NOT_CL72",
  10038 	NULL,
  10039 #endif
  10040 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10041 	0x0, /* 0 */
  10042 	0,
  10043 #endif
  10044 },
  10045 {
  10046 	BCMI_TSCBH_XGXS_AN_X1_DME_PAGE_TMR_TYPEr,
  10047 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10048 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10049 	BCMI_TSCBH_XGXS_AN_X1_DME_PAGE_TMR_TYPEr_fields,
  10050 #else
  10051 	0,
  10052 #endif
  10053 #endif
  10054 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10055 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10056 	"AN_X1_DME_PAGE_TMR_TYPEr",
  10057 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10058 	"AN_X1_TIMERS_DME_PAGE_TIMER_TYPE",
  10059 	NULL,
  10060 #endif
  10061 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10062 	0x3b5f, /* 15199 */
  10063 	0,
  10064 #endif
  10065 },
  10066 {
  10067 	BCMI_TSCBH_XGXS_AN_X1_IGNORE_LNK_TMR_PAM4r,
  10068 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10069 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10070 	BCMI_TSCBH_XGXS_AN_X1_IGNORE_LNK_TMR_PAM4r_fields,
  10071 #else
  10072 	0,
  10073 #endif
  10074 #endif
  10075 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10076 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10077 	"AN_X1_IGNORE_LNK_TMR_PAM4r",
  10078 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10079 	"AN_X1_TIMERS_IGNORE_LINK_TIMER_PAM4",
  10080 	NULL,
  10081 #endif
  10082 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10083 	0x0, /* 0 */
  10084 	0,
  10085 #endif
  10086 },
  10087 {
  10088 	BCMI_TSCBH_XGXS_AN_X1_LNK_FAIL_INHBT_TMR_CL72_PAM4r,
  10089 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10090 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10091 	BCMI_TSCBH_XGXS_AN_X1_LNK_FAIL_INHBT_TMR_CL72_PAM4r_fields,
  10092 #else
  10093 	0,
  10094 #endif
  10095 #endif
  10096 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10097 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10098 	"AN_X1_LNK_FAIL_INHBT_TMR_CL72_PAM4r",
  10099 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10100 	"AN_X1_TIMERS_LINK_FAIL_INHIBIT_TIMER_CL72_PAM4",
  10101 	NULL,
  10102 #endif
  10103 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10104 	0x0, /* 0 */
  10105 	0,
  10106 #endif
  10107 },
  10108 {
  10109 	BCMI_TSCBH_XGXS_AN_X1_LNK_FAIL_INHBT_TMR_NOT_CL72_PAM4r,
  10110 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10111 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10112 	BCMI_TSCBH_XGXS_AN_X1_LNK_FAIL_INHBT_TMR_NOT_CL72_PAM4r_fields,
  10113 #else
  10114 	0,
  10115 #endif
  10116 #endif
  10117 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10118 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10119 	"AN_X1_LNK_FAIL_INHBT_TMR_NOT_CL72_PAM4r",
  10120 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10121 	"AN_X1_TIMERS_LINK_FAIL_INHIBIT_TIMER_NOT_CL72_PAM4",
  10122 	NULL,
  10123 #endif
  10124 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10125 	0x0, /* 0 */
  10126 	0,
  10127 #endif
  10128 },
  10129 {
  10130 	BCMI_TSCBH_XGXS_SC_X1_PIPE_RST_CNTr,
  10131 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10132 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10133 	BCMI_TSCBH_XGXS_SC_X1_PIPE_RST_CNTr_fields,
  10134 #else
  10135 	0,
  10136 #endif
  10137 #endif
  10138 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10139 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10140 	"SC_X1_PIPE_RST_CNTr",
  10141 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10142 	"SC_X1_CONTROL_PIPELINE_RESET_COUNT",
  10143 	NULL,
  10144 #endif
  10145 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10146 	0xff, /* 255 */
  10147 	0,
  10148 #endif
  10149 },
  10150 {
  10151 	BCMI_TSCBH_XGXS_SC_X1_TX_RST_CNTr,
  10152 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10153 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10154 	BCMI_TSCBH_XGXS_SC_X1_TX_RST_CNTr_fields,
  10155 #else
  10156 	0,
  10157 #endif
  10158 #endif
  10159 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10160 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10161 	"SC_X1_TX_RST_CNTr",
  10162 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10163 	"SC_X1_CONTROL_TX_RESET_COUNT",
  10164 	NULL,
  10165 #endif
  10166 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10167 	0x2, /* 2 */
  10168 	0,
  10169 #endif
  10170 },
  10171 {
  10172 	BCMI_TSCBH_XGXS_SC_X1_STSr,
  10173 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10174 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10175 	BCMI_TSCBH_XGXS_SC_X1_STSr_fields,
  10176 #else
  10177 	0,
  10178 #endif
  10179 #endif
  10180 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10181 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10182 	"SC_X1_STSr",
  10183 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10184 	"SC_X1_CONTROL_STATUS",
  10185 	NULL,
  10186 #endif
  10187 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10188 	0x0, /* 0 */
  10189 	0,
  10190 #endif
  10191 },
  10192 {
  10193 	BCMI_TSCBH_XGXS_AN_X1_GLB_INTr,
  10194 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10195 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10196 	BCMI_TSCBH_XGXS_AN_X1_GLB_INTr_fields,
  10197 #else
  10198 	0,
  10199 #endif
  10200 #endif
  10201 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10202 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10203 	"AN_X1_GLB_INTr",
  10204 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10205 	"AN_X1_SW_MGMT_GLB_INT",
  10206 	NULL,
  10207 #endif
  10208 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10209 	0x0, /* 0 */
  10210 	0,
  10211 #endif
  10212 },
  10213 {
  10214 	BCMI_TSCBH_XGXS_AN_X1_GLB_MASKr,
  10215 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10216 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10217 	BCMI_TSCBH_XGXS_AN_X1_GLB_MASKr_fields,
  10218 #else
  10219 	0,
  10220 #endif
  10221 #endif
  10222 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10223 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10224 	"AN_X1_GLB_MASKr",
  10225 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10226 	"AN_X1_SW_MGMT_GLB_MASK",
  10227 	NULL,
  10228 #endif
  10229 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10230 	0x0, /* 0 */
  10231 	0,
  10232 #endif
  10233 },
  10234 {
  10235 	BCMI_TSCBH_XGXS_PMD_X4_CTLr,
  10236 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10237 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10238 	BCMI_TSCBH_XGXS_PMD_X4_CTLr_fields,
  10239 #else
  10240 	0,
  10241 #endif
  10242 #endif
  10243 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10244 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10245 	"PMD_X4_CTLr",
  10246 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10247 	"PMD_X4_CONTROL",
  10248 	NULL,
  10249 #endif
  10250 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10251 	0x0, /* 0 */
  10252 	0,
  10253 #endif
  10254 },
  10255 {
  10256 	BCMI_TSCBH_XGXS_PMD_X4_MODEr,
  10257 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10258 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10259 	BCMI_TSCBH_XGXS_PMD_X4_MODEr_fields,
  10260 #else
  10261 	0,
  10262 #endif
  10263 #endif
  10264 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10265 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10266 	"PMD_X4_MODEr",
  10267 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10268 	NULL,
  10269 	NULL,
  10270 #endif
  10271 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10272 	0x0, /* 0 */
  10273 	0,
  10274 #endif
  10275 },
  10276 {
  10277 	BCMI_TSCBH_XGXS_PMD_X4_STSr,
  10278 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10279 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10280 	BCMI_TSCBH_XGXS_PMD_X4_STSr_fields,
  10281 #else
  10282 	0,
  10283 #endif
  10284 #endif
  10285 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10286 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10287 	"PMD_X4_STSr",
  10288 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10289 	"PMD_X4_STATUS",
  10290 	NULL,
  10291 #endif
  10292 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10293 	0x10, /* 16 */
  10294 	0,
  10295 #endif
  10296 },
  10297 {
  10298 	BCMI_TSCBH_XGXS_PMD_X4_LATCH_STSr,
  10299 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10300 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10301 	BCMI_TSCBH_XGXS_PMD_X4_LATCH_STSr_fields,
  10302 #else
  10303 	0,
  10304 #endif
  10305 #endif
  10306 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10307 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10308 	"PMD_X4_LATCH_STSr",
  10309 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10310 	"PMD_X4_LATCH_STATUS",
  10311 	NULL,
  10312 #endif
  10313 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10314 	0x0, /* 0 */
  10315 	0,
  10316 #endif
  10317 },
  10318 {
  10319 	BCMI_TSCBH_XGXS_PMD_X4_OVRRr,
  10320 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10321 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10322 	BCMI_TSCBH_XGXS_PMD_X4_OVRRr_fields,
  10323 #else
  10324 	0,
  10325 #endif
  10326 #endif
  10327 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10328 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10329 	"PMD_X4_OVRRr",
  10330 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10331 	"PMD_X4_OVERRIDE",
  10332 	NULL,
  10333 #endif
  10334 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10335 	0x0, /* 0 */
  10336 	0,
  10337 #endif
  10338 },
  10339 {
  10340 	BCMI_TSCBH_XGXS_PMD_X4_UI_VALUE_HIr,
  10341 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10342 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10343 	BCMI_TSCBH_XGXS_PMD_X4_UI_VALUE_HIr_fields,
  10344 #else
  10345 	0,
  10346 #endif
  10347 #endif
  10348 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10349 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10350 	"PMD_X4_UI_VALUE_HIr",
  10351 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10352 	NULL,
  10353 	NULL,
  10354 #endif
  10355 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10356 	0x0, /* 0 */
  10357 	0,
  10358 #endif
  10359 },
  10360 {
  10361 	BCMI_TSCBH_XGXS_PMD_X4_UI_VALUE_LOr,
  10362 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10363 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10364 	BCMI_TSCBH_XGXS_PMD_X4_UI_VALUE_LOr_fields,
  10365 #else
  10366 	0,
  10367 #endif
  10368 #endif
  10369 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10370 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10371 	"PMD_X4_UI_VALUE_LOr",
  10372 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10373 	NULL,
  10374 	NULL,
  10375 #endif
  10376 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10377 	0x0, /* 0 */
  10378 	0,
  10379 #endif
  10380 },
  10381 {
  10382 	BCMI_TSCBH_XGXS_PMD_X4_RX_FIXED_LATENCYr,
  10383 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10384 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10385 	BCMI_TSCBH_XGXS_PMD_X4_RX_FIXED_LATENCYr_fields,
  10386 #else
  10387 	0,
  10388 #endif
  10389 #endif
  10390 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10391 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10392 	"PMD_X4_RX_FIXED_LATENCYr",
  10393 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10394 	NULL,
  10395 	NULL,
  10396 #endif
  10397 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10398 	0x0, /* 0 */
  10399 	0,
  10400 #endif
  10401 },
  10402 {
  10403 	BCMI_TSCBH_XGXS_PMD_X4_TX_FIXED_LATENCYr,
  10404 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10405 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10406 	BCMI_TSCBH_XGXS_PMD_X4_TX_FIXED_LATENCYr_fields,
  10407 #else
  10408 	0,
  10409 #endif
  10410 #endif
  10411 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10412 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10413 	"PMD_X4_TX_FIXED_LATENCYr",
  10414 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10415 	NULL,
  10416 	NULL,
  10417 #endif
  10418 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10419 	0x0, /* 0 */
  10420 	0,
  10421 #endif
  10422 },
  10423 {
  10424 	BCMI_TSCBH_XGXS_SC_X4_CTLr,
  10425 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10426 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10427 	BCMI_TSCBH_XGXS_SC_X4_CTLr_fields,
  10428 #else
  10429 	0,
  10430 #endif
  10431 #endif
  10432 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10433 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10434 	"SC_X4_CTLr",
  10435 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10436 	"SC_X4_CONTROL_CONTROL",
  10437 	NULL,
  10438 #endif
  10439 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10440 	0x0, /* 0 */
  10441 	0,
  10442 #endif
  10443 },
  10444 {
  10445 	BCMI_TSCBH_XGXS_SC_X4_STSr,
  10446 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10447 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10448 	BCMI_TSCBH_XGXS_SC_X4_STSr_fields,
  10449 #else
  10450 	0,
  10451 #endif
  10452 #endif
  10453 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10454 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10455 	"SC_X4_STSr",
  10456 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10457 	"SC_X4_CONTROL_STATUS",
  10458 	NULL,
  10459 #endif
  10460 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10461 	0x0, /* 0 */
  10462 	0,
  10463 #endif
  10464 },
  10465 {
  10466 	BCMI_TSCBH_XGXS_SC_X4_DBGr,
  10467 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10468 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10469 	BCMI_TSCBH_XGXS_SC_X4_DBGr_fields,
  10470 #else
  10471 	0,
  10472 #endif
  10473 #endif
  10474 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10475 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10476 	"SC_X4_DBGr",
  10477 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10478 	"SC_X4_CONTROL_DEBUG",
  10479 	NULL,
  10480 #endif
  10481 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10482 	0x8000, /* 32768 */
  10483 	0,
  10484 #endif
  10485 },
  10486 {
  10487 	BCMI_TSCBH_XGXS_SC_X4_SPARE0r,
  10488 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10489 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10490 	BCMI_TSCBH_XGXS_SC_X4_SPARE0r_fields,
  10491 #else
  10492 	0,
  10493 #endif
  10494 #endif
  10495 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10496 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10497 	"SC_X4_SPARE0r",
  10498 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10499 	"SC_X4_CONTROL_SPARE0",
  10500 	NULL,
  10501 #endif
  10502 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10503 	0x0, /* 0 */
  10504 	0,
  10505 #endif
  10506 },
  10507 {
  10508 	BCMI_TSCBH_XGXS_SC_X4_SW_SPARE1r,
  10509 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10510 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10511 	BCMI_TSCBH_XGXS_SC_X4_SW_SPARE1r_fields,
  10512 #else
  10513 	0,
  10514 #endif
  10515 #endif
  10516 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10517 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10518 	"SC_X4_SW_SPARE1r",
  10519 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10520 	"SC_X4_CONTROL_SW_SPARE1",
  10521 	NULL,
  10522 #endif
  10523 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10524 	0x0, /* 0 */
  10525 	0,
  10526 #endif
  10527 },
  10528 {
  10529 	BCMI_TSCBH_XGXS_SC_X4_RSLVD_SPDr,
  10530 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10531 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10532 	BCMI_TSCBH_XGXS_SC_X4_RSLVD_SPDr_fields,
  10533 #else
  10534 	0,
  10535 #endif
  10536 #endif
  10537 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10538 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10539 	"SC_X4_RSLVD_SPDr",
  10540 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10541 	"SC_X4_FINAL_CONFIG_STATUS_RESOLVED_SPEED",
  10542 	NULL,
  10543 #endif
  10544 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10545 	0x0, /* 0 */
  10546 	0,
  10547 #endif
  10548 },
  10549 {
  10550 	BCMI_TSCBH_XGXS_SC_X4_FEC_STSr,
  10551 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10552 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10553 	BCMI_TSCBH_XGXS_SC_X4_FEC_STSr_fields,
  10554 #else
  10555 	0,
  10556 #endif
  10557 #endif
  10558 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10559 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10560 	"SC_X4_FEC_STSr",
  10561 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10562 	"SC_X4_FINAL_CONFIG_STATUS_FEC_STATUS",
  10563 	NULL,
  10564 #endif
  10565 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10566 	0x0, /* 0 */
  10567 	0,
  10568 #endif
  10569 },
  10570 {
  10571 	BCMI_TSCBH_XGXS_TX_X4_RS_SYMr,
  10572 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10573 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10574 	BCMI_TSCBH_XGXS_TX_X4_RS_SYMr_fields,
  10575 #else
  10576 	0,
  10577 #endif
  10578 #endif
  10579 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10580 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10581 	"TX_X4_RS_SYMr",
  10582 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10583 	"TX_X4_CONTROL0_RS_SYMBOL",
  10584 	NULL,
  10585 #endif
  10586 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10587 	0x2aa, /* 682 */
  10588 	0,
  10589 #endif
  10590 },
  10591 {
  10592 	BCMI_TSCBH_XGXS_TX_X4_MISCr,
  10593 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10594 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10595 	BCMI_TSCBH_XGXS_TX_X4_MISCr_fields,
  10596 #else
  10597 	0,
  10598 #endif
  10599 #endif
  10600 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10601 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10602 	"TX_X4_MISCr",
  10603 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10604 	"TX_X4_CONTROL0_MISC",
  10605 	NULL,
  10606 #endif
  10607 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10608 	0x1c, /* 28 */
  10609 	0,
  10610 #endif
  10611 },
  10612 {
  10613 	BCMI_TSCBH_XGXS_TX_X4_TX_TS_CTLr,
  10614 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10615 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10616 	BCMI_TSCBH_XGXS_TX_X4_TX_TS_CTLr_fields,
  10617 #else
  10618 	0,
  10619 #endif
  10620 #endif
  10621 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10622 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10623 	"TX_X4_TX_TS_CTLr",
  10624 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10625 	"TX_X4_CONTROL0_TX_TS_CONTROL",
  10626 	NULL,
  10627 #endif
  10628 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10629 	0x0, /* 0 */
  10630 	0,
  10631 #endif
  10632 },
  10633 {
  10634 	BCMI_TSCBH_XGXS_TX_X4_ERR_CTLr,
  10635 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10636 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10637 	BCMI_TSCBH_XGXS_TX_X4_ERR_CTLr_fields,
  10638 #else
  10639 	0,
  10640 #endif
  10641 #endif
  10642 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10643 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10644 	"TX_X4_ERR_CTLr",
  10645 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10646 	"TX_X4_CONTROL0_ERROR_CONTROL",
  10647 	NULL,
  10648 #endif
  10649 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10650 	0x0, /* 0 */
  10651 	0,
  10652 #endif
  10653 },
  10654 {
  10655 	BCMI_TSCBH_XGXS_TX_X4_ENC_STS1r,
  10656 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10657 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10658 	BCMI_TSCBH_XGXS_TX_X4_ENC_STS1r_fields,
  10659 #else
  10660 	0,
  10661 #endif
  10662 #endif
  10663 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10664 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10665 	"TX_X4_ENC_STS1r",
  10666 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10667 	"TX_X4_STATUS0_ENCODE_STATUS_1",
  10668 	NULL,
  10669 #endif
  10670 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10671 	0x0, /* 0 */
  10672 	0,
  10673 #endif
  10674 },
  10675 {
  10676 	BCMI_TSCBH_XGXS_TX_X4_PCS_STS_LATCHr,
  10677 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10678 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10679 	BCMI_TSCBH_XGXS_TX_X4_PCS_STS_LATCHr_fields,
  10680 #else
  10681 	0,
  10682 #endif
  10683 #endif
  10684 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10685 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10686 	"TX_X4_PCS_STS_LATCHr",
  10687 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10688 	"TX_X4_STATUS0_PCS_STATUS_LATCHED",
  10689 	NULL,
  10690 #endif
  10691 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10692 	0x0, /* 0 */
  10693 	0,
  10694 #endif
  10695 },
  10696 {
  10697 	BCMI_TSCBH_XGXS_TX_X4_TX_1588_TIMESTAMP_STSr,
  10698 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10699 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10700 	BCMI_TSCBH_XGXS_TX_X4_TX_1588_TIMESTAMP_STSr_fields,
  10701 #else
  10702 	0,
  10703 #endif
  10704 #endif
  10705 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10706 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10707 	"TX_X4_TX_1588_TIMESTAMP_STSr",
  10708 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10709 	"TX_X4_STATUS0_TX_1588_TIMESTAMP_STATUS",
  10710 	NULL,
  10711 #endif
  10712 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10713 	0x0, /* 0 */
  10714 	0,
  10715 #endif
  10716 },
  10717 {
  10718 	BCMI_TSCBH_XGXS_TX_X4_TX_1588_TIMESTAMP_HIr,
  10719 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10720 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10721 	BCMI_TSCBH_XGXS_TX_X4_TX_1588_TIMESTAMP_HIr_fields,
  10722 #else
  10723 	0,
  10724 #endif
  10725 #endif
  10726 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10727 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10728 	"TX_X4_TX_1588_TIMESTAMP_HIr",
  10729 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10730 	"TX_X4_STATUS0_TX_1588_TIMESTAMP_HI",
  10731 	NULL,
  10732 #endif
  10733 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10734 	0x0, /* 0 */
  10735 	0,
  10736 #endif
  10737 },
  10738 {
  10739 	BCMI_TSCBH_XGXS_TX_X4_TX_1588_TIMESTAMP_MIDr,
  10740 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10741 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10742 	BCMI_TSCBH_XGXS_TX_X4_TX_1588_TIMESTAMP_MIDr_fields,
  10743 #else
  10744 	0,
  10745 #endif
  10746 #endif
  10747 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10748 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10749 	"TX_X4_TX_1588_TIMESTAMP_MIDr",
  10750 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10751 	"TX_X4_STATUS0_TX_1588_TIMESTAMP_MID",
  10752 	NULL,
  10753 #endif
  10754 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10755 	0x0, /* 0 */
  10756 	0,
  10757 #endif
  10758 },
  10759 {
  10760 	BCMI_TSCBH_XGXS_TX_X4_TX_1588_TIMESTAMP_LOr,
  10761 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10762 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10763 	BCMI_TSCBH_XGXS_TX_X4_TX_1588_TIMESTAMP_LOr_fields,
  10764 #else
  10765 	0,
  10766 #endif
  10767 #endif
  10768 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10769 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10770 	"TX_X4_TX_1588_TIMESTAMP_LOr",
  10771 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10772 	"TX_X4_STATUS0_TX_1588_TIMESTAMP_LO",
  10773 	NULL,
  10774 #endif
  10775 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10776 	0x0, /* 0 */
  10777 	0,
  10778 #endif
  10779 },
  10780 {
  10781 	BCMI_TSCBH_XGXS_TX_X4_TX_TS_SEQ_IDr,
  10782 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10783 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10784 	BCMI_TSCBH_XGXS_TX_X4_TX_TS_SEQ_IDr_fields,
  10785 #else
  10786 	0,
  10787 #endif
  10788 #endif
  10789 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10790 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10791 	"TX_X4_TX_TS_SEQ_IDr",
  10792 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10793 	"TX_X4_STATUS0_TX_TS_SEQ_ID",
  10794 	NULL,
  10795 #endif
  10796 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10797 	0x0, /* 0 */
  10798 	0,
  10799 #endif
  10800 },
  10801 {
  10802 	BCMI_TSCBH_XGXS_RX_X4_RS_FEC_TMRr,
  10803 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10804 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10805 	BCMI_TSCBH_XGXS_RX_X4_RS_FEC_TMRr_fields,
  10806 #else
  10807 	0,
  10808 #endif
  10809 #endif
  10810 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10811 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10812 	"RX_X4_RS_FEC_TMRr",
  10813 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10814 	"RX_X4_CONTROL0_RS_FEC_TIMER",
  10815 	NULL,
  10816 #endif
  10817 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10818 	0xfa0, /* 4000 */
  10819 	0,
  10820 #endif
  10821 },
  10822 {
  10823 	BCMI_TSCBH_XGXS_RX_X4_RS_FEC_RX_CTL0r,
  10824 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10825 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10826 	BCMI_TSCBH_XGXS_RX_X4_RS_FEC_RX_CTL0r_fields,
  10827 #else
  10828 	0,
  10829 #endif
  10830 #endif
  10831 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10832 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10833 	"RX_X4_RS_FEC_RX_CTL0r",
  10834 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10835 	"RX_X4_CONTROL0_RS_FEC_RX_CONTROL_0",
  10836 	NULL,
  10837 #endif
  10838 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10839 	0x8000, /* 32768 */
  10840 	0,
  10841 #endif
  10842 },
  10843 {
  10844 	BCMI_TSCBH_XGXS_RX_X4_DEC_CTL0r,
  10845 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10846 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10847 	BCMI_TSCBH_XGXS_RX_X4_DEC_CTL0r_fields,
  10848 #else
  10849 	0,
  10850 #endif
  10851 #endif
  10852 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10853 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10854 	"RX_X4_DEC_CTL0r",
  10855 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10856 	"RX_X4_CONTROL0_DECODE_CONTROL_0",
  10857 	NULL,
  10858 #endif
  10859 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10860 	0xe, /* 14 */
  10861 	0,
  10862 #endif
  10863 },
  10864 {
  10865 	BCMI_TSCBH_XGXS_RX_X4_PMA_CTL0r,
  10866 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10867 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10868 	BCMI_TSCBH_XGXS_RX_X4_PMA_CTL0r_fields,
  10869 #else
  10870 	0,
  10871 #endif
  10872 #endif
  10873 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10874 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10875 	"RX_X4_PMA_CTL0r",
  10876 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10877 	"RX_X4_CONTROL0_PMA_CONTROL_0",
  10878 	NULL,
  10879 #endif
  10880 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10881 	0x0, /* 0 */
  10882 	0,
  10883 #endif
  10884 },
  10885 {
  10886 	BCMI_TSCBH_XGXS_RX_X4_RX_TS_CTLr,
  10887 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10888 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10889 	BCMI_TSCBH_XGXS_RX_X4_RX_TS_CTLr_fields,
  10890 #else
  10891 	0,
  10892 #endif
  10893 #endif
  10894 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10895 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10896 	"RX_X4_RX_TS_CTLr",
  10897 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10898 	"RX_X4_CONTROL0_RX_TS_CONTROL",
  10899 	NULL,
  10900 #endif
  10901 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10902 	0x1, /* 1 */
  10903 	0,
  10904 #endif
  10905 },
  10906 {
  10907 	BCMI_TSCBH_XGXS_RX_X4_FEC0r,
  10908 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10909 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10910 	BCMI_TSCBH_XGXS_RX_X4_FEC0r_fields,
  10911 #else
  10912 	0,
  10913 #endif
  10914 #endif
  10915 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10916 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10917 	"RX_X4_FEC0r",
  10918 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10919 	"RX_X4_FEC_CONTROL_FEC_0",
  10920 	NULL,
  10921 #endif
  10922 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10923 	0x442c, /* 17452 */
  10924 	0,
  10925 #endif
  10926 },
  10927 {
  10928 	BCMI_TSCBH_XGXS_RX_X4_FEC1r,
  10929 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10930 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10931 	BCMI_TSCBH_XGXS_RX_X4_FEC1r_fields,
  10932 #else
  10933 	0,
  10934 #endif
  10935 #endif
  10936 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10937 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10938 	"RX_X4_FEC1r",
  10939 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10940 	"RX_X4_FEC_CONTROL_FEC_1",
  10941 	NULL,
  10942 #endif
  10943 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10944 	0x28, /* 40 */
  10945 	0,
  10946 #endif
  10947 },
  10948 {
  10949 	BCMI_TSCBH_XGXS_RX_X4_FEC2r,
  10950 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10951 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10952 	BCMI_TSCBH_XGXS_RX_X4_FEC2r_fields,
  10953 #else
  10954 	0,
  10955 #endif
  10956 #endif
  10957 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10958 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10959 	"RX_X4_FEC2r",
  10960 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10961 	"RX_X4_FEC_CONTROL_FEC_2",
  10962 	NULL,
  10963 #endif
  10964 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10965 	0x4, /* 4 */
  10966 	0,
  10967 #endif
  10968 },
  10969 {
  10970 	BCMI_TSCBH_XGXS_RX_X4_BLKSYNC_STSr,
  10971 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10972 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10973 	BCMI_TSCBH_XGXS_RX_X4_BLKSYNC_STSr_fields,
  10974 #else
  10975 	0,
  10976 #endif
  10977 #endif
  10978 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  10979 	PHYMOD_SYMBOL_FLAG_REGISTER,
  10980 	"RX_X4_BLKSYNC_STSr",
  10981 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  10982 	"RX_X4_STATUS0_BLKSYNC_STATUS",
  10983 	NULL,
  10984 #endif
  10985 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  10986 	0x0, /* 0 */
  10987 	0,
  10988 #endif
  10989 },
  10990 {
  10991 	BCMI_TSCBH_XGXS_RX_X4_BLKSYNC_DBG0r,
  10992 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  10993 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  10994 	BCMI_TSCBH_XGXS_RX_X4_BLKSYNC_DBG0r_fields,
  10995 #else
  10996 	0,
  10997 #endif
  10998 #endif
  10999 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11000 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11001 	"RX_X4_BLKSYNC_DBG0r",
  11002 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11003 	"RX_X4_STATUS0_BLKSYNC_DBG0",
  11004 	NULL,
  11005 #endif
  11006 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11007 	0x0, /* 0 */
  11008 	0,
  11009 #endif
  11010 },
  11011 {
  11012 	BCMI_TSCBH_XGXS_RX_X4_BLKSYNC_DBG1r,
  11013 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11014 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11015 	BCMI_TSCBH_XGXS_RX_X4_BLKSYNC_DBG1r_fields,
  11016 #else
  11017 	0,
  11018 #endif
  11019 #endif
  11020 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11021 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11022 	"RX_X4_BLKSYNC_DBG1r",
  11023 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11024 	"RX_X4_STATUS0_BLKSYNC_DBG1",
  11025 	NULL,
  11026 #endif
  11027 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11028 	0x0, /* 0 */
  11029 	0,
  11030 #endif
  11031 },
  11032 {
  11033 	BCMI_TSCBH_XGXS_RX_X4_BLKSYNC_DBG2r,
  11034 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11035 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11036 	BCMI_TSCBH_XGXS_RX_X4_BLKSYNC_DBG2r_fields,
  11037 #else
  11038 	0,
  11039 #endif
  11040 #endif
  11041 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11042 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11043 	"RX_X4_BLKSYNC_DBG2r",
  11044 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11045 	"RX_X4_STATUS0_BLKSYNC_DBG2",
  11046 	NULL,
  11047 #endif
  11048 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11049 	0x0, /* 0 */
  11050 	0,
  11051 #endif
  11052 },
  11053 {
  11054 	BCMI_TSCBH_XGXS_RX_X4_BLK_LOCK_LATCH_STSr,
  11055 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11056 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11057 	BCMI_TSCBH_XGXS_RX_X4_BLK_LOCK_LATCH_STSr_fields,
  11058 #else
  11059 	0,
  11060 #endif
  11061 #endif
  11062 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11063 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11064 	"RX_X4_BLK_LOCK_LATCH_STSr",
  11065 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11066 	"RX_X4_STATUS0_BLOCK_LOCK_LATCHED_STATUS",
  11067 	NULL,
  11068 #endif
  11069 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11070 	0x0, /* 0 */
  11071 	0,
  11072 #endif
  11073 },
  11074 {
  11075 	BCMI_TSCBH_XGXS_RX_X4_AM_LOCK_LATCH_STSr,
  11076 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11077 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11078 	BCMI_TSCBH_XGXS_RX_X4_AM_LOCK_LATCH_STSr_fields,
  11079 #else
  11080 	0,
  11081 #endif
  11082 #endif
  11083 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11084 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11085 	"RX_X4_AM_LOCK_LATCH_STSr",
  11086 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11087 	"RX_X4_STATUS0_AM_LOCK_LATCHED_STATUS",
  11088 	NULL,
  11089 #endif
  11090 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11091 	0x0, /* 0 */
  11092 	0,
  11093 #endif
  11094 },
  11095 {
  11096 	BCMI_TSCBH_XGXS_RX_X4_BIPCNT0r,
  11097 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11098 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11099 	BCMI_TSCBH_XGXS_RX_X4_BIPCNT0r_fields,
  11100 #else
  11101 	0,
  11102 #endif
  11103 #endif
  11104 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11105 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11106 	"RX_X4_BIPCNT0r",
  11107 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11108 	"RX_X4_STATUS0_BIPCOUNT_0",
  11109 	NULL,
  11110 #endif
  11111 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11112 	0x0, /* 0 */
  11113 	0,
  11114 #endif
  11115 },
  11116 {
  11117 	BCMI_TSCBH_XGXS_RX_X4_BIPCNT1r,
  11118 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11119 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11120 	BCMI_TSCBH_XGXS_RX_X4_BIPCNT1r_fields,
  11121 #else
  11122 	0,
  11123 #endif
  11124 #endif
  11125 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11126 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11127 	"RX_X4_BIPCNT1r",
  11128 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11129 	"RX_X4_STATUS0_BIPCOUNT_1",
  11130 	NULL,
  11131 #endif
  11132 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11133 	0x0, /* 0 */
  11134 	0,
  11135 #endif
  11136 },
  11137 {
  11138 	BCMI_TSCBH_XGXS_RX_X4_BIPCNT2r,
  11139 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11140 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11141 	BCMI_TSCBH_XGXS_RX_X4_BIPCNT2r_fields,
  11142 #else
  11143 	0,
  11144 #endif
  11145 #endif
  11146 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11147 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11148 	"RX_X4_BIPCNT2r",
  11149 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11150 	"RX_X4_STATUS0_BIPCOUNT_2",
  11151 	NULL,
  11152 #endif
  11153 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11154 	0x0, /* 0 */
  11155 	0,
  11156 #endif
  11157 },
  11158 {
  11159 	BCMI_TSCBH_XGXS_RX_X4_PSLL_TO_VL_MAP0r,
  11160 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11161 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11162 	BCMI_TSCBH_XGXS_RX_X4_PSLL_TO_VL_MAP0r_fields,
  11163 #else
  11164 	0,
  11165 #endif
  11166 #endif
  11167 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11168 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11169 	"RX_X4_PSLL_TO_VL_MAP0r",
  11170 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11171 	"RX_X4_STATUS0_PSLL_TO_VL_MAPPING_0",
  11172 	NULL,
  11173 #endif
  11174 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11175 	0x0, /* 0 */
  11176 	0,
  11177 #endif
  11178 },
  11179 {
  11180 	BCMI_TSCBH_XGXS_RX_X4_PSLL_TO_VL_MAP1r,
  11181 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11182 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11183 	BCMI_TSCBH_XGXS_RX_X4_PSLL_TO_VL_MAP1r_fields,
  11184 #else
  11185 	0,
  11186 #endif
  11187 #endif
  11188 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11189 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11190 	"RX_X4_PSLL_TO_VL_MAP1r",
  11191 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11192 	"RX_X4_STATUS0_PSLL_TO_VL_MAPPING_1",
  11193 	NULL,
  11194 #endif
  11195 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11196 	0x0, /* 0 */
  11197 	0,
  11198 #endif
  11199 },
  11200 {
  11201 	BCMI_TSCBH_XGXS_RX_X4_RS_SYMr,
  11202 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11203 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11204 	BCMI_TSCBH_XGXS_RX_X4_RS_SYMr_fields,
  11205 #else
  11206 	0,
  11207 #endif
  11208 #endif
  11209 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11210 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11211 	"RX_X4_RS_SYMr",
  11212 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11213 	"RX_X4_STATUS0_RS_SYMBOL",
  11214 	NULL,
  11215 #endif
  11216 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11217 	0x0, /* 0 */
  11218 	0,
  11219 #endif
  11220 },
  11221 {
  11222 	BCMI_TSCBH_XGXS_RX_X4_PCS_LATCH_STS1r,
  11223 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11224 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11225 	BCMI_TSCBH_XGXS_RX_X4_PCS_LATCH_STS1r_fields,
  11226 #else
  11227 	0,
  11228 #endif
  11229 #endif
  11230 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11231 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11232 	"RX_X4_PCS_LATCH_STS1r",
  11233 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11234 	"RX_X4_STATUS1_PCS_LATCHED_STATUS_1",
  11235 	NULL,
  11236 #endif
  11237 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11238 	0x0, /* 0 */
  11239 	0,
  11240 #endif
  11241 },
  11242 {
  11243 	BCMI_TSCBH_XGXS_RX_X4_RL_MODE_HW_STSr,
  11244 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11245 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11246 	BCMI_TSCBH_XGXS_RX_X4_RL_MODE_HW_STSr_fields,
  11247 #else
  11248 	0,
  11249 #endif
  11250 #endif
  11251 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11252 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11253 	"RX_X4_RL_MODE_HW_STSr",
  11254 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11255 	"RX_X4_STATUS1_RL_MODE_HW_STATUS",
  11256 	NULL,
  11257 #endif
  11258 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11259 	0x0, /* 0 */
  11260 	0,
  11261 #endif
  11262 },
  11263 {
  11264 	BCMI_TSCBH_XGXS_RX_X4_RL_MODE_SW_CTLr,
  11265 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11266 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11267 	BCMI_TSCBH_XGXS_RX_X4_RL_MODE_SW_CTLr_fields,
  11268 #else
  11269 	0,
  11270 #endif
  11271 #endif
  11272 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11273 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11274 	"RX_X4_RL_MODE_SW_CTLr",
  11275 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11276 	"RX_X4_STATUS1_RL_MODE_SW_CONTROL",
  11277 	NULL,
  11278 #endif
  11279 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11280 	0x0, /* 0 */
  11281 	0,
  11282 #endif
  11283 },
  11284 {
  11285 	BCMI_TSCBH_XGXS_RX_X4_DEC_STS1r,
  11286 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11287 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11288 	BCMI_TSCBH_XGXS_RX_X4_DEC_STS1r_fields,
  11289 #else
  11290 	0,
  11291 #endif
  11292 #endif
  11293 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11294 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11295 	"RX_X4_DEC_STS1r",
  11296 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11297 	"RX_X4_STATUS1_DECODE_STATUS_1",
  11298 	NULL,
  11299 #endif
  11300 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11301 	0x0, /* 0 */
  11302 	0,
  11303 #endif
  11304 },
  11305 {
  11306 	BCMI_TSCBH_XGXS_RX_X4_DEC_STS3r,
  11307 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11308 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11309 	BCMI_TSCBH_XGXS_RX_X4_DEC_STS3r_fields,
  11310 #else
  11311 	0,
  11312 #endif
  11313 #endif
  11314 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11315 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11316 	"RX_X4_DEC_STS3r",
  11317 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11318 	"RX_X4_STATUS1_DECODE_STATUS_3",
  11319 	NULL,
  11320 #endif
  11321 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11322 	0x0, /* 0 */
  11323 	0,
  11324 #endif
  11325 },
  11326 {
  11327 	BCMI_TSCBH_XGXS_RX_X4_RX_LATCH_STSr,
  11328 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11329 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11330 	BCMI_TSCBH_XGXS_RX_X4_RX_LATCH_STSr_fields,
  11331 #else
  11332 	0,
  11333 #endif
  11334 #endif
  11335 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11336 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11337 	"RX_X4_RX_LATCH_STSr",
  11338 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11339 	"RX_X4_STATUS1_RX_LATCHED_STATUS",
  11340 	NULL,
  11341 #endif
  11342 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11343 	0x1, /* 1 */
  11344 	0,
  11345 #endif
  11346 },
  11347 {
  11348 	BCMI_TSCBH_XGXS_RX_X4_BER_LOr,
  11349 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11350 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11351 	BCMI_TSCBH_XGXS_RX_X4_BER_LOr_fields,
  11352 #else
  11353 	0,
  11354 #endif
  11355 #endif
  11356 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11357 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11358 	"RX_X4_BER_LOr",
  11359 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11360 	"RX_X4_STATUS1_BER_LO",
  11361 	NULL,
  11362 #endif
  11363 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11364 	0x0, /* 0 */
  11365 	0,
  11366 #endif
  11367 },
  11368 {
  11369 	BCMI_TSCBH_XGXS_RX_X4_BER_HOr,
  11370 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11371 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11372 	BCMI_TSCBH_XGXS_RX_X4_BER_HOr_fields,
  11373 #else
  11374 	0,
  11375 #endif
  11376 #endif
  11377 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11378 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11379 	"RX_X4_BER_HOr",
  11380 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11381 	"RX_X4_STATUS1_BER_HO",
  11382 	NULL,
  11383 #endif
  11384 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11385 	0x0, /* 0 */
  11386 	0,
  11387 #endif
  11388 },
  11389 {
  11390 	BCMI_TSCBH_XGXS_RX_X4_ERRED_BLKS_HOr,
  11391 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11392 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11393 	BCMI_TSCBH_XGXS_RX_X4_ERRED_BLKS_HOr_fields,
  11394 #else
  11395 	0,
  11396 #endif
  11397 #endif
  11398 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11399 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11400 	"RX_X4_ERRED_BLKS_HOr",
  11401 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11402 	"RX_X4_STATUS1_ERRORED_BLOCKS_HO",
  11403 	NULL,
  11404 #endif
  11405 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11406 	0x8000, /* 32768 */
  11407 	0,
  11408 #endif
  11409 },
  11410 {
  11411 	BCMI_TSCBH_XGXS_RX_X4_CL49_SCRIDLE_TEST_ERRr,
  11412 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11413 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11414 	BCMI_TSCBH_XGXS_RX_X4_CL49_SCRIDLE_TEST_ERRr_fields,
  11415 #else
  11416 	0,
  11417 #endif
  11418 #endif
  11419 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11420 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11421 	"RX_X4_CL49_SCRIDLE_TEST_ERRr",
  11422 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11423 	"RX_X4_STATUS1_CL49_SCRIDLE_TEST_ERR",
  11424 	NULL,
  11425 #endif
  11426 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11427 	0x0, /* 0 */
  11428 	0,
  11429 #endif
  11430 },
  11431 {
  11432 	BCMI_TSCBH_XGXS_RX_X4_CL82_AM_LATCH_STS_PSLL0r,
  11433 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11434 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11435 	BCMI_TSCBH_XGXS_RX_X4_CL82_AM_LATCH_STS_PSLL0r_fields,
  11436 #else
  11437 	0,
  11438 #endif
  11439 #endif
  11440 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11441 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11442 	"RX_X4_CL82_AM_LATCH_STS_PSLL0r",
  11443 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11444 	"RX_X4_STATUS2_CL82_RX_AM_LATCHED_STATUS_PSLL_0",
  11445 	NULL,
  11446 #endif
  11447 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11448 	0x0, /* 0 */
  11449 	0,
  11450 #endif
  11451 },
  11452 {
  11453 	BCMI_TSCBH_XGXS_RX_X4_CL82_AM_LATCH_STS_PSLL1r,
  11454 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11455 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11456 	BCMI_TSCBH_XGXS_RX_X4_CL82_AM_LATCH_STS_PSLL1r_fields,
  11457 #else
  11458 	0,
  11459 #endif
  11460 #endif
  11461 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11462 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11463 	"RX_X4_CL82_AM_LATCH_STS_PSLL1r",
  11464 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11465 	"RX_X4_STATUS2_CL82_RX_AM_LATCHED_STATUS_PSLL_1",
  11466 	NULL,
  11467 #endif
  11468 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11469 	0x0, /* 0 */
  11470 	0,
  11471 #endif
  11472 },
  11473 {
  11474 	BCMI_TSCBH_XGXS_RX_X4_CL82_AM_LATCH_STS_PSLL2r,
  11475 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11476 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11477 	BCMI_TSCBH_XGXS_RX_X4_CL82_AM_LATCH_STS_PSLL2r_fields,
  11478 #else
  11479 	0,
  11480 #endif
  11481 #endif
  11482 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11483 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11484 	"RX_X4_CL82_AM_LATCH_STS_PSLL2r",
  11485 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11486 	"RX_X4_STATUS2_CL82_RX_AM_LATCHED_STATUS_PSLL_2",
  11487 	NULL,
  11488 #endif
  11489 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11490 	0x0, /* 0 */
  11491 	0,
  11492 #endif
  11493 },
  11494 {
  11495 	BCMI_TSCBH_XGXS_RX_X4_CL82_AM_LATCH_STS_PSLL3r,
  11496 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11497 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11498 	BCMI_TSCBH_XGXS_RX_X4_CL82_AM_LATCH_STS_PSLL3r_fields,
  11499 #else
  11500 	0,
  11501 #endif
  11502 #endif
  11503 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11504 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11505 	"RX_X4_CL82_AM_LATCH_STS_PSLL3r",
  11506 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11507 	"RX_X4_STATUS2_CL82_RX_AM_LATCHED_STATUS_PSLL_3",
  11508 	NULL,
  11509 #endif
  11510 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11511 	0x0, /* 0 */
  11512 	0,
  11513 #endif
  11514 },
  11515 {
  11516 	BCMI_TSCBH_XGXS_RX_X4_CL82_AM_LATCH_STS_PSLL4r,
  11517 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11518 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11519 	BCMI_TSCBH_XGXS_RX_X4_CL82_AM_LATCH_STS_PSLL4r_fields,
  11520 #else
  11521 	0,
  11522 #endif
  11523 #endif
  11524 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11525 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11526 	"RX_X4_CL82_AM_LATCH_STS_PSLL4r",
  11527 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11528 	"RX_X4_STATUS2_CL82_RX_AM_LATCHED_STATUS_PSLL_4",
  11529 	NULL,
  11530 #endif
  11531 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11532 	0x0, /* 0 */
  11533 	0,
  11534 #endif
  11535 },
  11536 {
  11537 	BCMI_TSCBH_XGXS_RX_X4_RS_FEC_SYNC_STSr,
  11538 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11539 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11540 	BCMI_TSCBH_XGXS_RX_X4_RS_FEC_SYNC_STSr_fields,
  11541 #else
  11542 	0,
  11543 #endif
  11544 #endif
  11545 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11546 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11547 	"RX_X4_RS_FEC_SYNC_STSr",
  11548 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11549 	"RX_X4_STATUS2_RS_FEC_SYNC_STATUS",
  11550 	NULL,
  11551 #endif
  11552 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11553 	0x0, /* 0 */
  11554 	0,
  11555 #endif
  11556 },
  11557 {
  11558 	BCMI_TSCBH_XGXS_RX_X4_FEC_SYNC_FSM_STr,
  11559 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11560 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11561 	BCMI_TSCBH_XGXS_RX_X4_FEC_SYNC_FSM_STr_fields,
  11562 #else
  11563 	0,
  11564 #endif
  11565 #endif
  11566 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11567 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11568 	"RX_X4_FEC_SYNC_FSM_STr",
  11569 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11570 	"RX_X4_STATUS2_FEC_SYNC_FSM_STATE",
  11571 	NULL,
  11572 #endif
  11573 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11574 	0x0, /* 0 */
  11575 	0,
  11576 #endif
  11577 },
  11578 {
  11579 	BCMI_TSCBH_XGXS_RX_X4_FEC_DBG_ERRL0r,
  11580 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11581 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11582 	BCMI_TSCBH_XGXS_RX_X4_FEC_DBG_ERRL0r_fields,
  11583 #else
  11584 	0,
  11585 #endif
  11586 #endif
  11587 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11588 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11589 	"RX_X4_FEC_DBG_ERRL0r",
  11590 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11591 	"RX_X4_STATUS3_FEC_DBG_ERRL_0",
  11592 	NULL,
  11593 #endif
  11594 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11595 	0x0, /* 0 */
  11596 	0,
  11597 #endif
  11598 },
  11599 {
  11600 	BCMI_TSCBH_XGXS_RX_X4_FEC_DBG_ERRAH0r,
  11601 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11602 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11603 	BCMI_TSCBH_XGXS_RX_X4_FEC_DBG_ERRAH0r_fields,
  11604 #else
  11605 	0,
  11606 #endif
  11607 #endif
  11608 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11609 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11610 	"RX_X4_FEC_DBG_ERRAH0r",
  11611 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11612 	"RX_X4_STATUS3_FEC_DBG_ERRAH_0",
  11613 	NULL,
  11614 #endif
  11615 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11616 	0x0, /* 0 */
  11617 	0,
  11618 #endif
  11619 },
  11620 {
  11621 	BCMI_TSCBH_XGXS_RX_X4_FEC_BURST_ERR_STSL0r,
  11622 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11623 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11624 	BCMI_TSCBH_XGXS_RX_X4_FEC_BURST_ERR_STSL0r_fields,
  11625 #else
  11626 	0,
  11627 #endif
  11628 #endif
  11629 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11630 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11631 	"RX_X4_FEC_BURST_ERR_STSL0r",
  11632 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11633 	"RX_X4_STATUS3_FEC_BURST_ERR_STATUSL_0",
  11634 	NULL,
  11635 #endif
  11636 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11637 	0x0, /* 0 */
  11638 	0,
  11639 #endif
  11640 },
  11641 {
  11642 	BCMI_TSCBH_XGXS_RX_X4_FEC_BURST_ERR_STSH0r,
  11643 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11644 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11645 	BCMI_TSCBH_XGXS_RX_X4_FEC_BURST_ERR_STSH0r_fields,
  11646 #else
  11647 	0,
  11648 #endif
  11649 #endif
  11650 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11651 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11652 	"RX_X4_FEC_BURST_ERR_STSH0r",
  11653 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11654 	"RX_X4_STATUS4_FEC_BURST_ERR_STATUSH_0",
  11655 	NULL,
  11656 #endif
  11657 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11658 	0x0, /* 0 */
  11659 	0,
  11660 #endif
  11661 },
  11662 {
  11663 	BCMI_TSCBH_XGXS_RX_X4_FEC_CORRBLKSL0r,
  11664 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11665 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11666 	BCMI_TSCBH_XGXS_RX_X4_FEC_CORRBLKSL0r_fields,
  11667 #else
  11668 	0,
  11669 #endif
  11670 #endif
  11671 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11672 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11673 	"RX_X4_FEC_CORRBLKSL0r",
  11674 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11675 	"RX_X4_STATUS4_FEC_CORRECTEDBLKSL_0",
  11676 	NULL,
  11677 #endif
  11678 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11679 	0x0, /* 0 */
  11680 	0,
  11681 #endif
  11682 },
  11683 {
  11684 	BCMI_TSCBH_XGXS_RX_X4_FEC_CORRBLKSH0r,
  11685 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11686 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11687 	BCMI_TSCBH_XGXS_RX_X4_FEC_CORRBLKSH0r_fields,
  11688 #else
  11689 	0,
  11690 #endif
  11691 #endif
  11692 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11693 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11694 	"RX_X4_FEC_CORRBLKSH0r",
  11695 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11696 	"RX_X4_STATUS4_FEC_CORRECTEDBLKSH_0",
  11697 	NULL,
  11698 #endif
  11699 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11700 	0x0, /* 0 */
  11701 	0,
  11702 #endif
  11703 },
  11704 {
  11705 	BCMI_TSCBH_XGXS_RX_X4_PRTPERRCTRr,
  11706 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11707 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11708 	BCMI_TSCBH_XGXS_RX_X4_PRTPERRCTRr_fields,
  11709 #else
  11710 	0,
  11711 #endif
  11712 #endif
  11713 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11714 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11715 	"RX_X4_PRTPERRCTRr",
  11716 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11717 	"RX_X4_STATUS4_PRTPERRORCOUNTER",
  11718 	NULL,
  11719 #endif
  11720 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11721 	0x0, /* 0 */
  11722 	0,
  11723 #endif
  11724 },
  11725 {
  11726 	BCMI_TSCBH_XGXS_RX_X4_PRTPSTSr,
  11727 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11728 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11729 	BCMI_TSCBH_XGXS_RX_X4_PRTPSTSr_fields,
  11730 #else
  11731 	0,
  11732 #endif
  11733 #endif
  11734 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11735 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11736 	"RX_X4_PRTPSTSr",
  11737 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11738 	"RX_X4_STATUS4_PRTPSTATUS",
  11739 	NULL,
  11740 #endif
  11741 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11742 	0x0, /* 0 */
  11743 	0,
  11744 #endif
  11745 },
  11746 {
  11747 	BCMI_TSCBH_XGXS_RX_X4_FEC_UNCORRBLKSL0r,
  11748 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11749 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11750 	BCMI_TSCBH_XGXS_RX_X4_FEC_UNCORRBLKSL0r_fields,
  11751 #else
  11752 	0,
  11753 #endif
  11754 #endif
  11755 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11756 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11757 	"RX_X4_FEC_UNCORRBLKSL0r",
  11758 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11759 	"RX_X4_STATUS5_FEC_UNCORRECTEDBLKSL_0",
  11760 	NULL,
  11761 #endif
  11762 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11763 	0x0, /* 0 */
  11764 	0,
  11765 #endif
  11766 },
  11767 {
  11768 	BCMI_TSCBH_XGXS_RX_X4_FEC_UNCORRBLKSH0r,
  11769 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11770 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11771 	BCMI_TSCBH_XGXS_RX_X4_FEC_UNCORRBLKSH0r_fields,
  11772 #else
  11773 	0,
  11774 #endif
  11775 #endif
  11776 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11777 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11778 	"RX_X4_FEC_UNCORRBLKSH0r",
  11779 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11780 	"RX_X4_STATUS5_FEC_UNCORRECTEDBLKSH_0",
  11781 	NULL,
  11782 #endif
  11783 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11784 	0x0, /* 0 */
  11785 	0,
  11786 #endif
  11787 },
  11788 {
  11789 	BCMI_TSCBH_XGXS_RX_X4_SKEW_OFFSS0r,
  11790 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11791 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11792 	BCMI_TSCBH_XGXS_RX_X4_SKEW_OFFSS0r_fields,
  11793 #else
  11794 	0,
  11795 #endif
  11796 #endif
  11797 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11798 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11799 	"RX_X4_SKEW_OFFSS0r",
  11800 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11801 	"RX_X4_STATUS5_SKEW_OFFSETS_0",
  11802 	NULL,
  11803 #endif
  11804 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11805 	0x0, /* 0 */
  11806 	0,
  11807 #endif
  11808 },
  11809 {
  11810 	BCMI_TSCBH_XGXS_RX_X4_SKEW_OFFSS1r,
  11811 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11812 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11813 	BCMI_TSCBH_XGXS_RX_X4_SKEW_OFFSS1r_fields,
  11814 #else
  11815 	0,
  11816 #endif
  11817 #endif
  11818 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11819 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11820 	"RX_X4_SKEW_OFFSS1r",
  11821 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11822 	"RX_X4_STATUS5_SKEW_OFFSETS_1",
  11823 	NULL,
  11824 #endif
  11825 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11826 	0x0, /* 0 */
  11827 	0,
  11828 #endif
  11829 },
  11830 {
  11831 	BCMI_TSCBH_XGXS_RX_X4_SKEW_OFFSS2r,
  11832 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11833 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11834 	BCMI_TSCBH_XGXS_RX_X4_SKEW_OFFSS2r_fields,
  11835 #else
  11836 	0,
  11837 #endif
  11838 #endif
  11839 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11840 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11841 	"RX_X4_SKEW_OFFSS2r",
  11842 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11843 	"RX_X4_STATUS5_SKEW_OFFSETS_2",
  11844 	NULL,
  11845 #endif
  11846 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11847 	0x0, /* 0 */
  11848 	0,
  11849 #endif
  11850 },
  11851 {
  11852 	BCMI_TSCBH_XGXS_RX_X4_SKEW_OFFSS3r,
  11853 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11854 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11855 	BCMI_TSCBH_XGXS_RX_X4_SKEW_OFFSS3r_fields,
  11856 #else
  11857 	0,
  11858 #endif
  11859 #endif
  11860 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11861 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11862 	"RX_X4_SKEW_OFFSS3r",
  11863 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11864 	"RX_X4_STATUS5_SKEW_OFFSETS_3",
  11865 	NULL,
  11866 #endif
  11867 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11868 	0x0, /* 0 */
  11869 	0,
  11870 #endif
  11871 },
  11872 {
  11873 	BCMI_TSCBH_XGXS_RX_X4_SKEW_OFFSS4r,
  11874 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11875 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11876 	BCMI_TSCBH_XGXS_RX_X4_SKEW_OFFSS4r_fields,
  11877 #else
  11878 	0,
  11879 #endif
  11880 #endif
  11881 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11882 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11883 	"RX_X4_SKEW_OFFSS4r",
  11884 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11885 	"RX_X4_STATUS5_SKEW_OFFSETS_4",
  11886 	NULL,
  11887 #endif
  11888 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11889 	0x0, /* 0 */
  11890 	0,
  11891 #endif
  11892 },
  11893 {
  11894 	BCMI_TSCBH_XGXS_RX_X4_AM_TS_INFO0r,
  11895 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11896 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11897 	BCMI_TSCBH_XGXS_RX_X4_AM_TS_INFO0r_fields,
  11898 #else
  11899 	0,
  11900 #endif
  11901 #endif
  11902 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11903 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11904 	"RX_X4_AM_TS_INFO0r",
  11905 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11906 	"RX_X4_STATUS5_AM_TS_INFO_0",
  11907 	NULL,
  11908 #endif
  11909 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11910 	0x0, /* 0 */
  11911 	0,
  11912 #endif
  11913 },
  11914 {
  11915 	BCMI_TSCBH_XGXS_RX_X4_AM_TS_INFO1r,
  11916 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11917 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11918 	BCMI_TSCBH_XGXS_RX_X4_AM_TS_INFO1r_fields,
  11919 #else
  11920 	0,
  11921 #endif
  11922 #endif
  11923 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11924 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11925 	"RX_X4_AM_TS_INFO1r",
  11926 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11927 	"RX_X4_STATUS5_AM_TS_INFO_1",
  11928 	NULL,
  11929 #endif
  11930 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11931 	0x0, /* 0 */
  11932 	0,
  11933 #endif
  11934 },
  11935 {
  11936 	BCMI_TSCBH_XGXS_RX_X4_AM_TS_INFO2r,
  11937 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11938 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11939 	BCMI_TSCBH_XGXS_RX_X4_AM_TS_INFO2r_fields,
  11940 #else
  11941 	0,
  11942 #endif
  11943 #endif
  11944 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11945 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11946 	"RX_X4_AM_TS_INFO2r",
  11947 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11948 	"RX_X4_STATUS5_AM_TS_INFO_2",
  11949 	NULL,
  11950 #endif
  11951 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11952 	0x0, /* 0 */
  11953 	0,
  11954 #endif
  11955 },
  11956 {
  11957 	BCMI_TSCBH_XGXS_RX_X4_AM_TS_INFO3r,
  11958 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11959 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11960 	BCMI_TSCBH_XGXS_RX_X4_AM_TS_INFO3r_fields,
  11961 #else
  11962 	0,
  11963 #endif
  11964 #endif
  11965 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11966 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11967 	"RX_X4_AM_TS_INFO3r",
  11968 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11969 	"RX_X4_STATUS5_AM_TS_INFO_3",
  11970 	NULL,
  11971 #endif
  11972 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11973 	0x0, /* 0 */
  11974 	0,
  11975 #endif
  11976 },
  11977 {
  11978 	BCMI_TSCBH_XGXS_RX_X4_AM_TS_INFO4r,
  11979 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  11980 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  11981 	BCMI_TSCBH_XGXS_RX_X4_AM_TS_INFO4r_fields,
  11982 #else
  11983 	0,
  11984 #endif
  11985 #endif
  11986 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  11987 	PHYMOD_SYMBOL_FLAG_REGISTER,
  11988 	"RX_X4_AM_TS_INFO4r",
  11989 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  11990 	"RX_X4_STATUS5_AM_TS_INFO_4",
  11991 	NULL,
  11992 #endif
  11993 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  11994 	0x0, /* 0 */
  11995 	0,
  11996 #endif
  11997 },
  11998 {
  11999 	BCMI_TSCBH_XGXS_RX_X4_TEST_STS0_CL82_SCRIDLE_TEST_ERRr,
  12000 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12001 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12002 	BCMI_TSCBH_XGXS_RX_X4_TEST_STS0_CL82_SCRIDLE_TEST_ERRr_fields,
  12003 #else
  12004 	0,
  12005 #endif
  12006 #endif
  12007 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12008 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12009 	"RX_X4_TEST_STS0_CL82_SCRIDLE_TEST_ERRr",
  12010 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12011 	"RX_X4_TEST_STATUS0_CL82_SCRIDLE_TEST_ERR",
  12012 	NULL,
  12013 #endif
  12014 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12015 	0x0, /* 0 */
  12016 	0,
  12017 #endif
  12018 },
  12019 {
  12020 	BCMI_TSCBH_XGXS_AN_X4_CL73_CFGr,
  12021 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12022 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12023 	BCMI_TSCBH_XGXS_AN_X4_CL73_CFGr_fields,
  12024 #else
  12025 	0,
  12026 #endif
  12027 #endif
  12028 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12029 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12030 	"AN_X4_CL73_CFGr",
  12031 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12032 	"AN_X4_ABILITIES_CL73_CFG",
  12033 	NULL,
  12034 #endif
  12035 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12036 	0x0, /* 0 */
  12037 	0,
  12038 #endif
  12039 },
  12040 {
  12041 	BCMI_TSCBH_XGXS_AN_X4_LD_UP1_ABIL0r,
  12042 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12043 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12044 	BCMI_TSCBH_XGXS_AN_X4_LD_UP1_ABIL0r_fields,
  12045 #else
  12046 	0,
  12047 #endif
  12048 #endif
  12049 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12050 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12051 	"AN_X4_LD_UP1_ABIL0r",
  12052 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12053 	"AN_X4_ABILITIES_LD_UP1_ABILITIES_0",
  12054 	NULL,
  12055 #endif
  12056 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12057 	0x0, /* 0 */
  12058 	0,
  12059 #endif
  12060 },
  12061 {
  12062 	BCMI_TSCBH_XGXS_AN_X4_LD_UP1_ABIL1r,
  12063 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12064 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12065 	BCMI_TSCBH_XGXS_AN_X4_LD_UP1_ABIL1r_fields,
  12066 #else
  12067 	0,
  12068 #endif
  12069 #endif
  12070 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12071 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12072 	"AN_X4_LD_UP1_ABIL1r",
  12073 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12074 	"AN_X4_ABILITIES_LD_UP1_ABILITIES_1",
  12075 	NULL,
  12076 #endif
  12077 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12078 	0x0, /* 0 */
  12079 	0,
  12080 #endif
  12081 },
  12082 {
  12083 	BCMI_TSCBH_XGXS_AN_X4_LD_BASE_ABIL0r,
  12084 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12085 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12086 	BCMI_TSCBH_XGXS_AN_X4_LD_BASE_ABIL0r_fields,
  12087 #else
  12088 	0,
  12089 #endif
  12090 #endif
  12091 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12092 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12093 	"AN_X4_LD_BASE_ABIL0r",
  12094 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12095 	"AN_X4_ABILITIES_LD_BASE_ABILITIES_0",
  12096 	NULL,
  12097 #endif
  12098 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12099 	0x2a1, /* 673 */
  12100 	0,
  12101 #endif
  12102 },
  12103 {
  12104 	BCMI_TSCBH_XGXS_AN_X4_LD_BASE_ABIL1r,
  12105 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12106 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12107 	BCMI_TSCBH_XGXS_AN_X4_LD_BASE_ABIL1r_fields,
  12108 #else
  12109 	0,
  12110 #endif
  12111 #endif
  12112 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12113 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12114 	"AN_X4_LD_BASE_ABIL1r",
  12115 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12116 	"AN_X4_ABILITIES_LD_BASE_ABILITIES_1",
  12117 	NULL,
  12118 #endif
  12119 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12120 	0x0, /* 0 */
  12121 	0,
  12122 #endif
  12123 },
  12124 {
  12125 	BCMI_TSCBH_XGXS_AN_X4_LD_BAM_ABILr,
  12126 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12127 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12128 	BCMI_TSCBH_XGXS_AN_X4_LD_BAM_ABILr_fields,
  12129 #else
  12130 	0,
  12131 #endif
  12132 #endif
  12133 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12134 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12135 	"AN_X4_LD_BAM_ABILr",
  12136 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12137 	"AN_X4_ABILITIES_LD_BAM_ABILITIES",
  12138 	NULL,
  12139 #endif
  12140 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12141 	0x0, /* 0 */
  12142 	0,
  12143 #endif
  12144 },
  12145 {
  12146 	BCMI_TSCBH_XGXS_AN_X4_CL73_CTLSr,
  12147 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12148 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12149 	BCMI_TSCBH_XGXS_AN_X4_CL73_CTLSr_fields,
  12150 #else
  12151 	0,
  12152 #endif
  12153 #endif
  12154 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12155 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12156 	"AN_X4_CL73_CTLSr",
  12157 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12158 	"AN_X4_ABILITIES_CL73_CONTROLS",
  12159 	NULL,
  12160 #endif
  12161 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12162 	0x0, /* 0 */
  12163 	0,
  12164 #endif
  12165 },
  12166 {
  12167 	BCMI_TSCBH_XGXS_AN_X4_LD_BASE_ABIL2r,
  12168 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12169 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12170 	BCMI_TSCBH_XGXS_AN_X4_LD_BASE_ABIL2r_fields,
  12171 #else
  12172 	0,
  12173 #endif
  12174 #endif
  12175 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12176 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12177 	"AN_X4_LD_BASE_ABIL2r",
  12178 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12179 	"AN_X4_ABILITIES_LD_BASE_ABILITIES_2",
  12180 	NULL,
  12181 #endif
  12182 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12183 	0x0, /* 0 */
  12184 	0,
  12185 #endif
  12186 },
  12187 {
  12188 	BCMI_TSCBH_XGXS_AN_X4_LD_BASE_ABIL3r,
  12189 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12190 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12191 	BCMI_TSCBH_XGXS_AN_X4_LD_BASE_ABIL3r_fields,
  12192 #else
  12193 	0,
  12194 #endif
  12195 #endif
  12196 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12197 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12198 	"AN_X4_LD_BASE_ABIL3r",
  12199 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12200 	"AN_X4_ABILITIES_LD_BASE_ABILITIES_3",
  12201 	NULL,
  12202 #endif
  12203 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12204 	0x0, /* 0 */
  12205 	0,
  12206 #endif
  12207 },
  12208 {
  12209 	BCMI_TSCBH_XGXS_AN_X4_SW_AN_BASE_PAGE0r,
  12210 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12211 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12212 	BCMI_TSCBH_XGXS_AN_X4_SW_AN_BASE_PAGE0r_fields,
  12213 #else
  12214 	0,
  12215 #endif
  12216 #endif
  12217 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12218 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12219 	"AN_X4_SW_AN_BASE_PAGE0r",
  12220 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12221 	"AN_X4_ABILITIES_SW_AN_BASE_PAGE_0",
  12222 	NULL,
  12223 #endif
  12224 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12225 	0x0, /* 0 */
  12226 	0,
  12227 #endif
  12228 },
  12229 {
  12230 	BCMI_TSCBH_XGXS_AN_X4_SW_AN_BASE_PAGE1r,
  12231 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12232 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12233 	BCMI_TSCBH_XGXS_AN_X4_SW_AN_BASE_PAGE1r_fields,
  12234 #else
  12235 	0,
  12236 #endif
  12237 #endif
  12238 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12239 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12240 	"AN_X4_SW_AN_BASE_PAGE1r",
  12241 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12242 	"AN_X4_ABILITIES_SW_AN_BASE_PAGE_1",
  12243 	NULL,
  12244 #endif
  12245 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12246 	0x0, /* 0 */
  12247 	0,
  12248 #endif
  12249 },
  12250 {
  12251 	BCMI_TSCBH_XGXS_AN_X4_SW_AN_BASE_PAGE2r,
  12252 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12253 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12254 	BCMI_TSCBH_XGXS_AN_X4_SW_AN_BASE_PAGE2r_fields,
  12255 #else
  12256 	0,
  12257 #endif
  12258 #endif
  12259 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12260 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12261 	"AN_X4_SW_AN_BASE_PAGE2r",
  12262 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12263 	"AN_X4_ABILITIES_SW_AN_BASE_PAGE_2",
  12264 	NULL,
  12265 #endif
  12266 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12267 	0x0, /* 0 */
  12268 	0,
  12269 #endif
  12270 },
  12271 {
  12272 	BCMI_TSCBH_XGXS_AN_X4_R_CL73_STSr,
  12273 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12274 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12275 	BCMI_TSCBH_XGXS_AN_X4_R_CL73_STSr_fields,
  12276 #else
  12277 	0,
  12278 #endif
  12279 #endif
  12280 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12281 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12282 	"AN_X4_R_CL73_STSr",
  12283 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12284 	"AN_X4_STATUS_R_CL73_STATUS",
  12285 	NULL,
  12286 #endif
  12287 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12288 	0x0, /* 0 */
  12289 	0,
  12290 #endif
  12291 },
  12292 {
  12293 	BCMI_TSCBH_XGXS_AN_X4_PXNG_STSr,
  12294 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12295 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12296 	BCMI_TSCBH_XGXS_AN_X4_PXNG_STSr_fields,
  12297 #else
  12298 	0,
  12299 #endif
  12300 #endif
  12301 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12302 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12303 	"AN_X4_PXNG_STSr",
  12304 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12305 	"AN_X4_STATUS_PXNG_STATUS",
  12306 	NULL,
  12307 #endif
  12308 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12309 	0x0, /* 0 */
  12310 	0,
  12311 #endif
  12312 },
  12313 {
  12314 	BCMI_TSCBH_XGXS_AN_X4_PSEQ_STSr,
  12315 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12316 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12317 	BCMI_TSCBH_XGXS_AN_X4_PSEQ_STSr_fields,
  12318 #else
  12319 	0,
  12320 #endif
  12321 #endif
  12322 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12323 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12324 	"AN_X4_PSEQ_STSr",
  12325 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12326 	"AN_X4_STATUS_PSEQ_STATUS",
  12327 	NULL,
  12328 #endif
  12329 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12330 	0x0, /* 0 */
  12331 	0,
  12332 #endif
  12333 },
  12334 {
  12335 	BCMI_TSCBH_XGXS_AN_X4_LP_BASE1r,
  12336 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12337 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12338 	BCMI_TSCBH_XGXS_AN_X4_LP_BASE1r_fields,
  12339 #else
  12340 	0,
  12341 #endif
  12342 #endif
  12343 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12344 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12345 	"AN_X4_LP_BASE1r",
  12346 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12347 	"AN_X4_STATUS_LP_BASE1",
  12348 	NULL,
  12349 #endif
  12350 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12351 	0x0, /* 0 */
  12352 	0,
  12353 #endif
  12354 },
  12355 {
  12356 	BCMI_TSCBH_XGXS_AN_X4_LP_BASE2r,
  12357 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12358 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12359 	BCMI_TSCBH_XGXS_AN_X4_LP_BASE2r_fields,
  12360 #else
  12361 	0,
  12362 #endif
  12363 #endif
  12364 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12365 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12366 	"AN_X4_LP_BASE2r",
  12367 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12368 	"AN_X4_STATUS_LP_BASE2",
  12369 	NULL,
  12370 #endif
  12371 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12372 	0x0, /* 0 */
  12373 	0,
  12374 #endif
  12375 },
  12376 {
  12377 	BCMI_TSCBH_XGXS_AN_X4_LP_BASE3r,
  12378 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12379 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12380 	BCMI_TSCBH_XGXS_AN_X4_LP_BASE3r_fields,
  12381 #else
  12382 	0,
  12383 #endif
  12384 #endif
  12385 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12386 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12387 	"AN_X4_LP_BASE3r",
  12388 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12389 	"AN_X4_STATUS_LP_BASE3",
  12390 	NULL,
  12391 #endif
  12392 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12393 	0x0, /* 0 */
  12394 	0,
  12395 #endif
  12396 },
  12397 {
  12398 	BCMI_TSCBH_XGXS_AN_X4_LP_MP5_LWRr,
  12399 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12400 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12401 	BCMI_TSCBH_XGXS_AN_X4_LP_MP5_LWRr_fields,
  12402 #else
  12403 	0,
  12404 #endif
  12405 #endif
  12406 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12407 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12408 	"AN_X4_LP_MP5_LWRr",
  12409 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12410 	"AN_X4_STATUS_LP_MP5_LOWER",
  12411 	NULL,
  12412 #endif
  12413 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12414 	0x0, /* 0 */
  12415 	0,
  12416 #endif
  12417 },
  12418 {
  12419 	BCMI_TSCBH_XGXS_AN_X4_LP_MP5_MIDDLEr,
  12420 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12421 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12422 	BCMI_TSCBH_XGXS_AN_X4_LP_MP5_MIDDLEr_fields,
  12423 #else
  12424 	0,
  12425 #endif
  12426 #endif
  12427 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12428 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12429 	"AN_X4_LP_MP5_MIDDLEr",
  12430 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12431 	"AN_X4_STATUS_LP_MP5_MIDDLE",
  12432 	NULL,
  12433 #endif
  12434 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12435 	0x0, /* 0 */
  12436 	0,
  12437 #endif
  12438 },
  12439 {
  12440 	BCMI_TSCBH_XGXS_AN_X4_LP_MP5_UPRr,
  12441 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12442 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12443 	BCMI_TSCBH_XGXS_AN_X4_LP_MP5_UPRr_fields,
  12444 #else
  12445 	0,
  12446 #endif
  12447 #endif
  12448 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12449 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12450 	"AN_X4_LP_MP5_UPRr",
  12451 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12452 	"AN_X4_STATUS_LP_MP5_UPPER",
  12453 	NULL,
  12454 #endif
  12455 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12456 	0x0, /* 0 */
  12457 	0,
  12458 #endif
  12459 },
  12460 {
  12461 	BCMI_TSCBH_XGXS_AN_X4_LP_UP_LWRr,
  12462 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12463 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12464 	BCMI_TSCBH_XGXS_AN_X4_LP_UP_LWRr_fields,
  12465 #else
  12466 	0,
  12467 #endif
  12468 #endif
  12469 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12470 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12471 	"AN_X4_LP_UP_LWRr",
  12472 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12473 	"AN_X4_STATUS_LP_UP_LOWER",
  12474 	NULL,
  12475 #endif
  12476 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12477 	0x0, /* 0 */
  12478 	0,
  12479 #endif
  12480 },
  12481 {
  12482 	BCMI_TSCBH_XGXS_AN_X4_LP_UP_MIDDLEr,
  12483 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12484 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12485 	BCMI_TSCBH_XGXS_AN_X4_LP_UP_MIDDLEr_fields,
  12486 #else
  12487 	0,
  12488 #endif
  12489 #endif
  12490 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12491 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12492 	"AN_X4_LP_UP_MIDDLEr",
  12493 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12494 	"AN_X4_STATUS_LP_UP_MIDDLE",
  12495 	NULL,
  12496 #endif
  12497 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12498 	0x0, /* 0 */
  12499 	0,
  12500 #endif
  12501 },
  12502 {
  12503 	BCMI_TSCBH_XGXS_AN_X4_LP_UP_UPRr,
  12504 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12505 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12506 	BCMI_TSCBH_XGXS_AN_X4_LP_UP_UPRr_fields,
  12507 #else
  12508 	0,
  12509 #endif
  12510 #endif
  12511 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12512 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12513 	"AN_X4_LP_UP_UPRr",
  12514 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12515 	"AN_X4_STATUS_LP_UP_UPPER",
  12516 	NULL,
  12517 #endif
  12518 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12519 	0x0, /* 0 */
  12520 	0,
  12521 #endif
  12522 },
  12523 {
  12524 	BCMI_TSCBH_XGXS_AN_X4_RES_ERRr,
  12525 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12526 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12527 	BCMI_TSCBH_XGXS_AN_X4_RES_ERRr_fields,
  12528 #else
  12529 	0,
  12530 #endif
  12531 #endif
  12532 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12533 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12534 	"AN_X4_RES_ERRr",
  12535 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12536 	"AN_X4_STATUS_RES_ERR",
  12537 	NULL,
  12538 #endif
  12539 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12540 	0x0, /* 0 */
  12541 	0,
  12542 #endif
  12543 },
  12544 {
  12545 	BCMI_TSCBH_XGXS_AN_X4_LD_PAGE2r,
  12546 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12547 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12548 	BCMI_TSCBH_XGXS_AN_X4_LD_PAGE2r_fields,
  12549 #else
  12550 	0,
  12551 #endif
  12552 #endif
  12553 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12554 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12555 	"AN_X4_LD_PAGE2r",
  12556 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12557 	"AN_X4_SW_MGMT_LD_PAGE_2",
  12558 	NULL,
  12559 #endif
  12560 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12561 	0x0, /* 0 */
  12562 	0,
  12563 #endif
  12564 },
  12565 {
  12566 	BCMI_TSCBH_XGXS_AN_X4_LD_PAGE1r,
  12567 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12568 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12569 	BCMI_TSCBH_XGXS_AN_X4_LD_PAGE1r_fields,
  12570 #else
  12571 	0,
  12572 #endif
  12573 #endif
  12574 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12575 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12576 	"AN_X4_LD_PAGE1r",
  12577 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12578 	"AN_X4_SW_MGMT_LD_PAGE_1",
  12579 	NULL,
  12580 #endif
  12581 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12582 	0x0, /* 0 */
  12583 	0,
  12584 #endif
  12585 },
  12586 {
  12587 	BCMI_TSCBH_XGXS_AN_X4_LD_PAGE0r,
  12588 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12589 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12590 	BCMI_TSCBH_XGXS_AN_X4_LD_PAGE0r_fields,
  12591 #else
  12592 	0,
  12593 #endif
  12594 #endif
  12595 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12596 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12597 	"AN_X4_LD_PAGE0r",
  12598 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12599 	"AN_X4_SW_MGMT_LD_PAGE_0",
  12600 	NULL,
  12601 #endif
  12602 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12603 	0x0, /* 0 */
  12604 	0,
  12605 #endif
  12606 },
  12607 {
  12608 	BCMI_TSCBH_XGXS_AN_X4_LP_PAGE2r,
  12609 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12610 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12611 	BCMI_TSCBH_XGXS_AN_X4_LP_PAGE2r_fields,
  12612 #else
  12613 	0,
  12614 #endif
  12615 #endif
  12616 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12617 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12618 	"AN_X4_LP_PAGE2r",
  12619 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12620 	"AN_X4_SW_MGMT_LP_PAGE_2",
  12621 	NULL,
  12622 #endif
  12623 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12624 	0x0, /* 0 */
  12625 	0,
  12626 #endif
  12627 },
  12628 {
  12629 	BCMI_TSCBH_XGXS_AN_X4_LP_PAGE1r,
  12630 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12631 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12632 	BCMI_TSCBH_XGXS_AN_X4_LP_PAGE1r_fields,
  12633 #else
  12634 	0,
  12635 #endif
  12636 #endif
  12637 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12638 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12639 	"AN_X4_LP_PAGE1r",
  12640 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12641 	"AN_X4_SW_MGMT_LP_PAGE_1",
  12642 	NULL,
  12643 #endif
  12644 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12645 	0x0, /* 0 */
  12646 	0,
  12647 #endif
  12648 },
  12649 {
  12650 	BCMI_TSCBH_XGXS_AN_X4_LP_PAGE0r,
  12651 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12652 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12653 	BCMI_TSCBH_XGXS_AN_X4_LP_PAGE0r_fields,
  12654 #else
  12655 	0,
  12656 #endif
  12657 #endif
  12658 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12659 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12660 	"AN_X4_LP_PAGE0r",
  12661 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12662 	"AN_X4_SW_MGMT_LP_PAGE_0",
  12663 	NULL,
  12664 #endif
  12665 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12666 	0x0, /* 0 */
  12667 	0,
  12668 #endif
  12669 },
  12670 {
  12671 	BCMI_TSCBH_XGXS_AN_X4_SW_CTL_STSr,
  12672 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12673 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12674 	BCMI_TSCBH_XGXS_AN_X4_SW_CTL_STSr_fields,
  12675 #else
  12676 	0,
  12677 #endif
  12678 #endif
  12679 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12680 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12681 	"AN_X4_SW_CTL_STSr",
  12682 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12683 	"AN_X4_SW_MGMT_SW_CONTROL_STATUS",
  12684 	NULL,
  12685 #endif
  12686 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12687 	0x0, /* 0 */
  12688 	0,
  12689 #endif
  12690 },
  12691 {
  12692 	BCMI_TSCBH_XGXS_AN_X4_LD_CTLr,
  12693 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12694 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12695 	BCMI_TSCBH_XGXS_AN_X4_LD_CTLr_fields,
  12696 #else
  12697 	0,
  12698 #endif
  12699 #endif
  12700 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12701 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12702 	"AN_X4_LD_CTLr",
  12703 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12704 	"AN_X4_SW_MGMT_LD_CONTROL",
  12705 	NULL,
  12706 #endif
  12707 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12708 	0x0, /* 0 */
  12709 	0,
  12710 #endif
  12711 },
  12712 {
  12713 	BCMI_TSCBH_XGXS_AN_X4_AN_ABIL_RESOLUTION_STSr,
  12714 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12715 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12716 	BCMI_TSCBH_XGXS_AN_X4_AN_ABIL_RESOLUTION_STSr_fields,
  12717 #else
  12718 	0,
  12719 #endif
  12720 #endif
  12721 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12722 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12723 	"AN_X4_AN_ABIL_RESOLUTION_STSr",
  12724 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12725 	"AN_X4_SW_MGMT_AN_ABILITY_RESOLUTION_STATUS",
  12726 	NULL,
  12727 #endif
  12728 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12729 	0xb0, /* 176 */
  12730 	0,
  12731 #endif
  12732 },
  12733 {
  12734 	BCMI_TSCBH_XGXS_AN_X4_AN_MISC_STSr,
  12735 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12736 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12737 	BCMI_TSCBH_XGXS_AN_X4_AN_MISC_STSr_fields,
  12738 #else
  12739 	0,
  12740 #endif
  12741 #endif
  12742 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12743 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12744 	"AN_X4_AN_MISC_STSr",
  12745 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12746 	"AN_X4_SW_MGMT_AN_MISC_STATUS",
  12747 	NULL,
  12748 #endif
  12749 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12750 	0x0, /* 0 */
  12751 	0,
  12752 #endif
  12753 },
  12754 {
  12755 	BCMI_TSCBH_XGXS_AN_X4_TLA_SEQUENCER_STSr,
  12756 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12757 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12758 	BCMI_TSCBH_XGXS_AN_X4_TLA_SEQUENCER_STSr_fields,
  12759 #else
  12760 	0,
  12761 #endif
  12762 #endif
  12763 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12764 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12765 	"AN_X4_TLA_SEQUENCER_STSr",
  12766 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12767 	"AN_X4_SW_MGMT_TLA_SEQUENCER_STATUS",
  12768 	NULL,
  12769 #endif
  12770 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12771 	0x1, /* 1 */
  12772 	0,
  12773 #endif
  12774 },
  12775 {
  12776 	BCMI_TSCBH_XGXS_AN_X4_INTr,
  12777 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12778 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12779 	BCMI_TSCBH_XGXS_AN_X4_INTr_fields,
  12780 #else
  12781 	0,
  12782 #endif
  12783 #endif
  12784 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12785 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12786 	"AN_X4_INTr",
  12787 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12788 	"AN_X4_SW_MGMT_INT",
  12789 	NULL,
  12790 #endif
  12791 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12792 	0x0, /* 0 */
  12793 	0,
  12794 #endif
  12795 },
  12796 {
  12797 	BCMI_TSCBH_XGXS_AN_X4_INT_ENr,
  12798 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12799 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12800 	BCMI_TSCBH_XGXS_AN_X4_INT_ENr_fields,
  12801 #else
  12802 	0,
  12803 #endif
  12804 #endif
  12805 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12806 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12807 	"AN_X4_INT_ENr",
  12808 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12809 	"AN_X4_SW_MGMT_INT_EN",
  12810 	NULL,
  12811 #endif
  12812 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12813 	0x0, /* 0 */
  12814 	0,
  12815 #endif
  12816 },
  12817 {
  12818 	BCMI_TSCBH_XGXS_AN_X4_WAIT_ACK_COMPLETEr,
  12819 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12820 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12821 	BCMI_TSCBH_XGXS_AN_X4_WAIT_ACK_COMPLETEr_fields,
  12822 #else
  12823 	0,
  12824 #endif
  12825 #endif
  12826 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12827 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12828 	"AN_X4_WAIT_ACK_COMPLETEr",
  12829 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12830 	"AN_X4_SW_MGMT_WAIT_ACK_COMPLETE",
  12831 	NULL,
  12832 #endif
  12833 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12834 	0x0, /* 0 */
  12835 	0,
  12836 #endif
  12837 },
  12838 {
  12839 	BCMI_TSCBH_XGXS_INTEGER_DIVr,
  12840 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12841 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12842 	BCMI_TSCBH_XGXS_INTEGER_DIVr_fields,
  12843 #else
  12844 	0,
  12845 #endif
  12846 #endif
  12847 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12848 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12849 	"INTEGER_DIVr",
  12850 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12851 	"SYNCE_X4_INTEGER_DIV",
  12852 	NULL,
  12853 #endif
  12854 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12855 	0x8, /* 8 */
  12856 	0,
  12857 #endif
  12858 },
  12859 {
  12860 	BCMI_TSCBH_XGXS_FRACTIONAL_DIVr,
  12861 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12862 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12863 	BCMI_TSCBH_XGXS_FRACTIONAL_DIVr_fields,
  12864 #else
  12865 	0,
  12866 #endif
  12867 #endif
  12868 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12869 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12870 	"FRACTIONAL_DIVr",
  12871 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12872 	"SYNCE_X4_FRACTIONAL_DIV",
  12873 	NULL,
  12874 #endif
  12875 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12876 	0x14a0, /* 5280 */
  12877 	0,
  12878 #endif
  12879 },
  12880 {
  12881 	BCMI_TSCBH_XGXS_ILKN_CTL0r,
  12882 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12883 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12884 	BCMI_TSCBH_XGXS_ILKN_CTL0r_fields,
  12885 #else
  12886 	0,
  12887 #endif
  12888 #endif
  12889 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12890 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12891 	"ILKN_CTL0r",
  12892 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12893 	"ILKN_X4_CONTROL0_ILKN_CONTROL0",
  12894 	NULL,
  12895 #endif
  12896 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12897 	0x4, /* 4 */
  12898 	0,
  12899 #endif
  12900 },
  12901 {
  12902 	BCMI_TSCBH_XGXS_ILKN_STS0r,
  12903 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12904 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12905 	BCMI_TSCBH_XGXS_ILKN_STS0r_fields,
  12906 #else
  12907 	0,
  12908 #endif
  12909 #endif
  12910 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12911 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12912 	"ILKN_STS0r",
  12913 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12914 	"ILKN_X4_STATUS0_ILKN_STATUS0",
  12915 	NULL,
  12916 #endif
  12917 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12918 	0x9, /* 9 */
  12919 	0,
  12920 #endif
  12921 },
  12922 {
  12923 	BCMI_TSCBH_XGXS_RX_X4_RS_FEC_RXP_STSr,
  12924 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12925 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12926 	BCMI_TSCBH_XGXS_RX_X4_RS_FEC_RXP_STSr_fields,
  12927 #else
  12928 	0,
  12929 #endif
  12930 #endif
  12931 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12932 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12933 	"RX_X4_RS_FEC_RXP_STSr",
  12934 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12935 	"RX_X4_RS_FEC_STATUS0_RS_FEC_RXP_STATUS",
  12936 	NULL,
  12937 #endif
  12938 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12939 	0x0, /* 0 */
  12940 	0,
  12941 #endif
  12942 },
  12943 {
  12944 	BCMI_TSCBH_XGXS_RX_X4_FEC_CORR_CTR0r,
  12945 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12946 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12947 	BCMI_TSCBH_XGXS_RX_X4_FEC_CORR_CTR0r_fields,
  12948 #else
  12949 	0,
  12950 #endif
  12951 #endif
  12952 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12953 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12954 	"RX_X4_FEC_CORR_CTR0r",
  12955 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12956 	"RX_X4_RS_FEC_STATUS0_FEC_CORRECTED_COUNTER_0",
  12957 	NULL,
  12958 #endif
  12959 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12960 	0x0, /* 0 */
  12961 	0,
  12962 #endif
  12963 },
  12964 {
  12965 	BCMI_TSCBH_XGXS_RX_X4_FEC_CORR_CTR1r,
  12966 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12967 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12968 	BCMI_TSCBH_XGXS_RX_X4_FEC_CORR_CTR1r_fields,
  12969 #else
  12970 	0,
  12971 #endif
  12972 #endif
  12973 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12974 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12975 	"RX_X4_FEC_CORR_CTR1r",
  12976 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12977 	"RX_X4_RS_FEC_STATUS0_FEC_CORRECTED_COUNTER_1",
  12978 	NULL,
  12979 #endif
  12980 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  12981 	0x0, /* 0 */
  12982 	0,
  12983 #endif
  12984 },
  12985 {
  12986 	BCMI_TSCBH_XGXS_RX_X4_FEC_UNCORR_CTR0r,
  12987 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  12988 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  12989 	BCMI_TSCBH_XGXS_RX_X4_FEC_UNCORR_CTR0r_fields,
  12990 #else
  12991 	0,
  12992 #endif
  12993 #endif
  12994 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  12995 	PHYMOD_SYMBOL_FLAG_REGISTER,
  12996 	"RX_X4_FEC_UNCORR_CTR0r",
  12997 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  12998 	"RX_X4_RS_FEC_STATUS0_FEC_UNCORRECTED_COUNTER_0",
  12999 	NULL,
  13000 #endif
  13001 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13002 	0x0, /* 0 */
  13003 	0,
  13004 #endif
  13005 },
  13006 {
  13007 	BCMI_TSCBH_XGXS_RX_X4_FEC_UNCORR_CTR1r,
  13008 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13009 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13010 	BCMI_TSCBH_XGXS_RX_X4_FEC_UNCORR_CTR1r_fields,
  13011 #else
  13012 	0,
  13013 #endif
  13014 #endif
  13015 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13016 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13017 	"RX_X4_FEC_UNCORR_CTR1r",
  13018 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13019 	"RX_X4_RS_FEC_STATUS0_FEC_UNCORRECTED_COUNTER_1",
  13020 	NULL,
  13021 #endif
  13022 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13023 	0x0, /* 0 */
  13024 	0,
  13025 #endif
  13026 },
  13027 {
  13028 	BCMI_TSCBH_XGXS_RX_X4_FEC_BIT_ERR_CTR0r,
  13029 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13030 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13031 	BCMI_TSCBH_XGXS_RX_X4_FEC_BIT_ERR_CTR0r_fields,
  13032 #else
  13033 	0,
  13034 #endif
  13035 #endif
  13036 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13037 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13038 	"RX_X4_FEC_BIT_ERR_CTR0r",
  13039 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13040 	"RX_X4_RS_FEC_STATUS0_FEC_BIT_ERROR_COUNTER_0",
  13041 	NULL,
  13042 #endif
  13043 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13044 	0x0, /* 0 */
  13045 	0,
  13046 #endif
  13047 },
  13048 {
  13049 	BCMI_TSCBH_XGXS_RX_X4_FEC_BIT_ERR_CTR1r,
  13050 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13051 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13052 	BCMI_TSCBH_XGXS_RX_X4_FEC_BIT_ERR_CTR1r_fields,
  13053 #else
  13054 	0,
  13055 #endif
  13056 #endif
  13057 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13058 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13059 	"RX_X4_FEC_BIT_ERR_CTR1r",
  13060 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13061 	"RX_X4_RS_FEC_STATUS0_FEC_BIT_ERROR_COUNTER_1",
  13062 	NULL,
  13063 #endif
  13064 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13065 	0x0, /* 0 */
  13066 	0,
  13067 #endif
  13068 },
  13069 {
  13070 	BCMI_TSCBH_XGXS_RX_X4_RS_FEC_FEC_SYM_ERR_CTR_LOW0r,
  13071 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13072 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13073 	BCMI_TSCBH_XGXS_RX_X4_RS_FEC_FEC_SYM_ERR_CTR_LOW0r_fields,
  13074 #else
  13075 	0,
  13076 #endif
  13077 #endif
  13078 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13079 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13080 	"RX_X4_RS_FEC_FEC_SYM_ERR_CTR_LOW0r",
  13081 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13082 	"RX_X4_RS_FEC_STATUS1_RS_FEC_FEC_SYMB_ERR_CNTR_LOW_0",
  13083 	NULL,
  13084 #endif
  13085 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13086 	0x0, /* 0 */
  13087 	0,
  13088 #endif
  13089 },
  13090 {
  13091 	BCMI_TSCBH_XGXS_RX_X4_RS_FEC_FEC_SYM_ERR_CTR_UP0r,
  13092 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13093 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13094 	BCMI_TSCBH_XGXS_RX_X4_RS_FEC_FEC_SYM_ERR_CTR_UP0r_fields,
  13095 #else
  13096 	0,
  13097 #endif
  13098 #endif
  13099 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13100 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13101 	"RX_X4_RS_FEC_FEC_SYM_ERR_CTR_UP0r",
  13102 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13103 	"RX_X4_RS_FEC_STATUS1_RS_FEC_FEC_SYMB_ERR_CNTR_UP_0",
  13104 	NULL,
  13105 #endif
  13106 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13107 	0x0, /* 0 */
  13108 	0,
  13109 #endif
  13110 },
  13111 {
  13112 	BCMI_TSCBH_XGXS_RX_X4_RS_FEC_FEC_SYM_ERR_CTR_LOW1r,
  13113 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13114 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13115 	BCMI_TSCBH_XGXS_RX_X4_RS_FEC_FEC_SYM_ERR_CTR_LOW1r_fields,
  13116 #else
  13117 	0,
  13118 #endif
  13119 #endif
  13120 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13121 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13122 	"RX_X4_RS_FEC_FEC_SYM_ERR_CTR_LOW1r",
  13123 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13124 	"RX_X4_RS_FEC_STATUS1_RS_FEC_FEC_SYMB_ERR_CNTR_LOW_1",
  13125 	NULL,
  13126 #endif
  13127 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13128 	0x0, /* 0 */
  13129 	0,
  13130 #endif
  13131 },
  13132 {
  13133 	BCMI_TSCBH_XGXS_RX_X4_RS_FEC_FEC_SYM_ERR_CTR_UP1r,
  13134 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13135 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13136 	BCMI_TSCBH_XGXS_RX_X4_RS_FEC_FEC_SYM_ERR_CTR_UP1r_fields,
  13137 #else
  13138 	0,
  13139 #endif
  13140 #endif
  13141 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13142 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13143 	"RX_X4_RS_FEC_FEC_SYM_ERR_CTR_UP1r",
  13144 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13145 	"RX_X4_RS_FEC_STATUS1_RS_FEC_FEC_SYMB_ERR_CNTR_UP_1",
  13146 	NULL,
  13147 #endif
  13148 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13149 	0x0, /* 0 */
  13150 	0,
  13151 #endif
  13152 },
  13153 {
  13154 	BCMI_TSCBH_XGXS_RX_X4_RS_FEC_FEC_SYM_ERR_CTR_LOW2r,
  13155 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13156 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13157 	BCMI_TSCBH_XGXS_RX_X4_RS_FEC_FEC_SYM_ERR_CTR_LOW2r_fields,
  13158 #else
  13159 	0,
  13160 #endif
  13161 #endif
  13162 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13163 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13164 	"RX_X4_RS_FEC_FEC_SYM_ERR_CTR_LOW2r",
  13165 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13166 	"RX_X4_RS_FEC_STATUS1_RS_FEC_FEC_SYMB_ERR_CNTR_LOW_2",
  13167 	NULL,
  13168 #endif
  13169 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13170 	0x0, /* 0 */
  13171 	0,
  13172 #endif
  13173 },
  13174 {
  13175 	BCMI_TSCBH_XGXS_RX_X4_RS_FEC_FEC_SYM_ERR_CTR_UP2r,
  13176 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13177 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13178 	BCMI_TSCBH_XGXS_RX_X4_RS_FEC_FEC_SYM_ERR_CTR_UP2r_fields,
  13179 #else
  13180 	0,
  13181 #endif
  13182 #endif
  13183 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13184 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13185 	"RX_X4_RS_FEC_FEC_SYM_ERR_CTR_UP2r",
  13186 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13187 	"RX_X4_RS_FEC_STATUS1_RS_FEC_FEC_SYMB_ERR_CNTR_UP_2",
  13188 	NULL,
  13189 #endif
  13190 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13191 	0x0, /* 0 */
  13192 	0,
  13193 #endif
  13194 },
  13195 {
  13196 	BCMI_TSCBH_XGXS_RX_X4_RS_FEC_FEC_SYM_ERR_CTR_LOW3r,
  13197 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13198 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13199 	BCMI_TSCBH_XGXS_RX_X4_RS_FEC_FEC_SYM_ERR_CTR_LOW3r_fields,
  13200 #else
  13201 	0,
  13202 #endif
  13203 #endif
  13204 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13205 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13206 	"RX_X4_RS_FEC_FEC_SYM_ERR_CTR_LOW3r",
  13207 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13208 	"RX_X4_RS_FEC_STATUS1_RS_FEC_FEC_SYMB_ERR_CNTR_LOW_3",
  13209 	NULL,
  13210 #endif
  13211 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13212 	0x0, /* 0 */
  13213 	0,
  13214 #endif
  13215 },
  13216 {
  13217 	BCMI_TSCBH_XGXS_RX_X4_RS_FEC_FEC_SYM_ERR_CTR_UP3r,
  13218 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13219 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13220 	BCMI_TSCBH_XGXS_RX_X4_RS_FEC_FEC_SYM_ERR_CTR_UP3r_fields,
  13221 #else
  13222 	0,
  13223 #endif
  13224 #endif
  13225 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13226 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13227 	"RX_X4_RS_FEC_FEC_SYM_ERR_CTR_UP3r",
  13228 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13229 	"RX_X4_RS_FEC_STATUS1_RS_FEC_FEC_SYMB_ERR_CNTR_UP_3",
  13230 	NULL,
  13231 #endif
  13232 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13233 	0x0, /* 0 */
  13234 	0,
  13235 #endif
  13236 },
  13237 {
  13238 	BCMI_TSCBH_XGXS_LNKTRNIT_BASE_R_PMD_CTLr,
  13239 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13240 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13241 	BCMI_TSCBH_XGXS_LNKTRNIT_BASE_R_PMD_CTLr_fields,
  13242 #else
  13243 	0,
  13244 #endif
  13245 #endif
  13246 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13247 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13248 	"LNKTRNIT_BASE_R_PMD_CTLr",
  13249 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13250 	"LINKTRN_IEEE_TX_LINKTRNIT_BASE_R_PMD_CONTROL_REGISTER_150",
  13251 	NULL,
  13252 #endif
  13253 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13254 	0x0, /* 0 */
  13255 	0,
  13256 #endif
  13257 },
  13258 {
  13259 	BCMI_TSCBH_XGXS_LNKTRNIT_BASE_R_PMD_STSr,
  13260 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13261 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13262 	BCMI_TSCBH_XGXS_LNKTRNIT_BASE_R_PMD_STSr_fields,
  13263 #else
  13264 	0,
  13265 #endif
  13266 #endif
  13267 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13268 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13269 	"LNKTRNIT_BASE_R_PMD_STSr",
  13270 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13271 	"LINKTRN_IEEE_TX_LINKTRNIT_BASE_R_PMD_STATUS_REGISTER_151",
  13272 	NULL,
  13273 #endif
  13274 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13275 	0x0, /* 0 */
  13276 	0,
  13277 #endif
  13278 },
  13279 {
  13280 	BCMI_TSCBH_XGXS_LNKTRNIR_BASE_R_LP_COEFF_UPDr,
  13281 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13282 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13283 	BCMI_TSCBH_XGXS_LNKTRNIR_BASE_R_LP_COEFF_UPDr_fields,
  13284 #else
  13285 	0,
  13286 #endif
  13287 #endif
  13288 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13289 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13290 	"LNKTRNIR_BASE_R_LP_COEFF_UPDr",
  13291 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13292 	"LINKTRN_IEEE_RX_LINKTRNIR_BASE_R_LP_COEFF_UPDATE_REGISTER_152",
  13293 	NULL,
  13294 #endif
  13295 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13296 	0x0, /* 0 */
  13297 	0,
  13298 #endif
  13299 },
  13300 {
  13301 	BCMI_TSCBH_XGXS_LNKTRNIR_BASE_R_LP_STS_REPr,
  13302 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13303 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13304 	BCMI_TSCBH_XGXS_LNKTRNIR_BASE_R_LP_STS_REPr_fields,
  13305 #else
  13306 	0,
  13307 #endif
  13308 #endif
  13309 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13310 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13311 	"LNKTRNIR_BASE_R_LP_STS_REPr",
  13312 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13313 	"LINKTRN_IEEE_RX_LINKTRNIR_BASE_R_LP_STATUS_REPORT_REGISTER_153",
  13314 	NULL,
  13315 #endif
  13316 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13317 	0x0, /* 0 */
  13318 	0,
  13319 #endif
  13320 },
  13321 {
  13322 	BCMI_TSCBH_XGXS_LNKTRNIT_BASE_R_LD_COEFF_UPDr,
  13323 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13324 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13325 	BCMI_TSCBH_XGXS_LNKTRNIT_BASE_R_LD_COEFF_UPDr_fields,
  13326 #else
  13327 	0,
  13328 #endif
  13329 #endif
  13330 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13331 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13332 	"LNKTRNIT_BASE_R_LD_COEFF_UPDr",
  13333 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13334 	"LINKTRN_IEEE_TX_LINKTRNIT_BASE_R_LD_COEFF_UPDATE_REGISTER_154",
  13335 	NULL,
  13336 #endif
  13337 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13338 	0x0, /* 0 */
  13339 	0,
  13340 #endif
  13341 },
  13342 {
  13343 	BCMI_TSCBH_XGXS_LNKTRNIT_BASE_R_LD_STS_REPr,
  13344 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13345 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13346 	BCMI_TSCBH_XGXS_LNKTRNIT_BASE_R_LD_STS_REPr_fields,
  13347 #else
  13348 	0,
  13349 #endif
  13350 #endif
  13351 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13352 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13353 	"LNKTRNIT_BASE_R_LD_STS_REPr",
  13354 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13355 	"LINKTRN_IEEE_TX_LINKTRNIT_BASE_R_LD_STATUS_REPORT_REGISTER_155",
  13356 	NULL,
  13357 #endif
  13358 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13359 	0x0, /* 0 */
  13360 	0,
  13361 #endif
  13362 },
  13363 {
  13364 	BCMI_TSCBH_XGXS_DSC_RXA_SLCR_OFFS_ADJ1r,
  13365 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13366 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13367 	BCMI_TSCBH_XGXS_DSC_RXA_SLCR_OFFS_ADJ1r_fields,
  13368 #else
  13369 	0,
  13370 #endif
  13371 #endif
  13372 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13373 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13374 	"DSC_RXA_SLCR_OFFS_ADJ1r",
  13375 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13376 	"DSC_AFE1_RXA_SLICER_OFFSET_ADJ_1",
  13377 	NULL,
  13378 #endif
  13379 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13380 	0x0, /* 0 */
  13381 	0,
  13382 #endif
  13383 },
  13384 {
  13385 	BCMI_TSCBH_XGXS_DSC_RXA_SLCR_OFFS_ADJ2r,
  13386 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13387 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13388 	BCMI_TSCBH_XGXS_DSC_RXA_SLCR_OFFS_ADJ2r_fields,
  13389 #else
  13390 	0,
  13391 #endif
  13392 #endif
  13393 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13394 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13395 	"DSC_RXA_SLCR_OFFS_ADJ2r",
  13396 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13397 	"DSC_AFE1_RXA_SLICER_OFFSET_ADJ_2",
  13398 	NULL,
  13399 #endif
  13400 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13401 	0x0, /* 0 */
  13402 	0,
  13403 #endif
  13404 },
  13405 {
  13406 	BCMI_TSCBH_XGXS_DSC_RXA_SLCR_OFFS_ADJ3r,
  13407 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13408 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13409 	BCMI_TSCBH_XGXS_DSC_RXA_SLCR_OFFS_ADJ3r_fields,
  13410 #else
  13411 	0,
  13412 #endif
  13413 #endif
  13414 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13415 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13416 	"DSC_RXA_SLCR_OFFS_ADJ3r",
  13417 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13418 	"DSC_AFE1_RXA_SLICER_OFFSET_ADJ_3",
  13419 	NULL,
  13420 #endif
  13421 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13422 	0x0, /* 0 */
  13423 	0,
  13424 #endif
  13425 },
  13426 {
  13427 	BCMI_TSCBH_XGXS_DSC_RXA_SLCR_OFFS_ADJ4r,
  13428 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13429 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13430 	BCMI_TSCBH_XGXS_DSC_RXA_SLCR_OFFS_ADJ4r_fields,
  13431 #else
  13432 	0,
  13433 #endif
  13434 #endif
  13435 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13436 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13437 	"DSC_RXA_SLCR_OFFS_ADJ4r",
  13438 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13439 	"DSC_AFE1_RXA_SLICER_OFFSET_ADJ_4",
  13440 	NULL,
  13441 #endif
  13442 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13443 	0x0, /* 0 */
  13444 	0,
  13445 #endif
  13446 },
  13447 {
  13448 	BCMI_TSCBH_XGXS_DSC_RXA_SLCR_OFFS_ADJ5r,
  13449 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13450 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13451 	BCMI_TSCBH_XGXS_DSC_RXA_SLCR_OFFS_ADJ5r_fields,
  13452 #else
  13453 	0,
  13454 #endif
  13455 #endif
  13456 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13457 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13458 	"DSC_RXA_SLCR_OFFS_ADJ5r",
  13459 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13460 	"DSC_AFE1_RXA_SLICER_OFFSET_ADJ_5",
  13461 	NULL,
  13462 #endif
  13463 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13464 	0x0, /* 0 */
  13465 	0,
  13466 #endif
  13467 },
  13468 {
  13469 	BCMI_TSCBH_XGXS_DSC_RXB_SLCR_OFFS_ADJ1r,
  13470 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13471 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13472 	BCMI_TSCBH_XGXS_DSC_RXB_SLCR_OFFS_ADJ1r_fields,
  13473 #else
  13474 	0,
  13475 #endif
  13476 #endif
  13477 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13478 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13479 	"DSC_RXB_SLCR_OFFS_ADJ1r",
  13480 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13481 	"DSC_AFE1_RXB_SLICER_OFFSET_ADJ_1",
  13482 	NULL,
  13483 #endif
  13484 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13485 	0x0, /* 0 */
  13486 	0,
  13487 #endif
  13488 },
  13489 {
  13490 	BCMI_TSCBH_XGXS_DSC_RXB_SLCR_OFFS_ADJ2r,
  13491 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13492 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13493 	BCMI_TSCBH_XGXS_DSC_RXB_SLCR_OFFS_ADJ2r_fields,
  13494 #else
  13495 	0,
  13496 #endif
  13497 #endif
  13498 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13499 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13500 	"DSC_RXB_SLCR_OFFS_ADJ2r",
  13501 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13502 	"DSC_AFE1_RXB_SLICER_OFFSET_ADJ_2",
  13503 	NULL,
  13504 #endif
  13505 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13506 	0x0, /* 0 */
  13507 	0,
  13508 #endif
  13509 },
  13510 {
  13511 	BCMI_TSCBH_XGXS_DSC_RXB_SLCR_OFFS_ADJ3r,
  13512 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13513 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13514 	BCMI_TSCBH_XGXS_DSC_RXB_SLCR_OFFS_ADJ3r_fields,
  13515 #else
  13516 	0,
  13517 #endif
  13518 #endif
  13519 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13520 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13521 	"DSC_RXB_SLCR_OFFS_ADJ3r",
  13522 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13523 	"DSC_AFE1_RXB_SLICER_OFFSET_ADJ_3",
  13524 	NULL,
  13525 #endif
  13526 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13527 	0x0, /* 0 */
  13528 	0,
  13529 #endif
  13530 },
  13531 {
  13532 	BCMI_TSCBH_XGXS_DSC_RXB_SLCR_OFFS_ADJ4r,
  13533 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13534 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13535 	BCMI_TSCBH_XGXS_DSC_RXB_SLCR_OFFS_ADJ4r_fields,
  13536 #else
  13537 	0,
  13538 #endif
  13539 #endif
  13540 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13541 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13542 	"DSC_RXB_SLCR_OFFS_ADJ4r",
  13543 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13544 	"DSC_AFE1_RXB_SLICER_OFFSET_ADJ_4",
  13545 	NULL,
  13546 #endif
  13547 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13548 	0x0, /* 0 */
  13549 	0,
  13550 #endif
  13551 },
  13552 {
  13553 	BCMI_TSCBH_XGXS_DSC_RXB_SLCR_OFFS_ADJ5r,
  13554 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13555 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13556 	BCMI_TSCBH_XGXS_DSC_RXB_SLCR_OFFS_ADJ5r_fields,
  13557 #else
  13558 	0,
  13559 #endif
  13560 #endif
  13561 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13562 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13563 	"DSC_RXB_SLCR_OFFS_ADJ5r",
  13564 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13565 	"DSC_AFE1_RXB_SLICER_OFFSET_ADJ_5",
  13566 	NULL,
  13567 #endif
  13568 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13569 	0x0, /* 0 */
  13570 	0,
  13571 #endif
  13572 },
  13573 {
  13574 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP4_ABr,
  13575 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13576 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13577 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP4_ABr_fields,
  13578 #else
  13579 	0,
  13580 #endif
  13581 #endif
  13582 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13583 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13584 	"DSC_RX_DFE_TAP4_ABr",
  13585 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13586 	"DSC_AFE2_RX_DFE_TAP4_AB",
  13587 	NULL,
  13588 #endif
  13589 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13590 	0x0, /* 0 */
  13591 	0,
  13592 #endif
  13593 },
  13594 {
  13595 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP4_CDr,
  13596 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13597 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13598 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP4_CDr_fields,
  13599 #else
  13600 	0,
  13601 #endif
  13602 #endif
  13603 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13604 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13605 	"DSC_RX_DFE_TAP4_CDr",
  13606 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13607 	"DSC_AFE2_RX_DFE_TAP4_CD",
  13608 	NULL,
  13609 #endif
  13610 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13611 	0x0, /* 0 */
  13612 	0,
  13613 #endif
  13614 },
  13615 {
  13616 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP5_ABCDr,
  13617 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13618 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13619 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP5_ABCDr_fields,
  13620 #else
  13621 	0,
  13622 #endif
  13623 #endif
  13624 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13625 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13626 	"DSC_RX_DFE_TAP5_ABCDr",
  13627 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13628 	"DSC_AFE2_RX_DFE_TAP5_ABCD",
  13629 	NULL,
  13630 #endif
  13631 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13632 	0x0, /* 0 */
  13633 	0,
  13634 #endif
  13635 },
  13636 {
  13637 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP6_ABCDr,
  13638 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13639 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13640 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP6_ABCDr_fields,
  13641 #else
  13642 	0,
  13643 #endif
  13644 #endif
  13645 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13646 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13647 	"DSC_RX_DFE_TAP6_ABCDr",
  13648 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13649 	"DSC_AFE2_RX_DFE_TAP6_ABCD",
  13650 	NULL,
  13651 #endif
  13652 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13653 	0x0, /* 0 */
  13654 	0,
  13655 #endif
  13656 },
  13657 {
  13658 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP7_ABCDr,
  13659 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13660 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13661 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP7_ABCDr_fields,
  13662 #else
  13663 	0,
  13664 #endif
  13665 #endif
  13666 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13667 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13668 	"DSC_RX_DFE_TAP7_ABCDr",
  13669 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13670 	"DSC_AFE2_RX_DFE_TAP7_ABCD",
  13671 	NULL,
  13672 #endif
  13673 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13674 	0x0, /* 0 */
  13675 	0,
  13676 #endif
  13677 },
  13678 {
  13679 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP8_ABCDr,
  13680 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13681 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13682 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP8_ABCDr_fields,
  13683 #else
  13684 	0,
  13685 #endif
  13686 #endif
  13687 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13688 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13689 	"DSC_RX_DFE_TAP8_ABCDr",
  13690 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13691 	"DSC_AFE2_RX_DFE_TAP8_ABCD",
  13692 	NULL,
  13693 #endif
  13694 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13695 	0x0, /* 0 */
  13696 	0,
  13697 #endif
  13698 },
  13699 {
  13700 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP9_ABCDr,
  13701 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13702 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13703 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP9_ABCDr_fields,
  13704 #else
  13705 	0,
  13706 #endif
  13707 #endif
  13708 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13709 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13710 	"DSC_RX_DFE_TAP9_ABCDr",
  13711 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13712 	"DSC_AFE2_RX_DFE_TAP9_ABCD",
  13713 	NULL,
  13714 #endif
  13715 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13716 	0x0, /* 0 */
  13717 	0,
  13718 #endif
  13719 },
  13720 {
  13721 	BCMI_TSCBH_XGXS_DSC_RXC_SLCR_OFFS_ADJ1r,
  13722 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13723 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13724 	BCMI_TSCBH_XGXS_DSC_RXC_SLCR_OFFS_ADJ1r_fields,
  13725 #else
  13726 	0,
  13727 #endif
  13728 #endif
  13729 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13730 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13731 	"DSC_RXC_SLCR_OFFS_ADJ1r",
  13732 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13733 	"DSC_AFE2_RXC_SLICER_OFFSET_ADJ_1",
  13734 	NULL,
  13735 #endif
  13736 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13737 	0x0, /* 0 */
  13738 	0,
  13739 #endif
  13740 },
  13741 {
  13742 	BCMI_TSCBH_XGXS_DSC_RXC_SLCR_OFFS_ADJ2r,
  13743 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13744 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13745 	BCMI_TSCBH_XGXS_DSC_RXC_SLCR_OFFS_ADJ2r_fields,
  13746 #else
  13747 	0,
  13748 #endif
  13749 #endif
  13750 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13751 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13752 	"DSC_RXC_SLCR_OFFS_ADJ2r",
  13753 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13754 	"DSC_AFE2_RXC_SLICER_OFFSET_ADJ_2",
  13755 	NULL,
  13756 #endif
  13757 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13758 	0x0, /* 0 */
  13759 	0,
  13760 #endif
  13761 },
  13762 {
  13763 	BCMI_TSCBH_XGXS_DSC_RXC_SLCR_OFFS_ADJ3r,
  13764 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13765 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13766 	BCMI_TSCBH_XGXS_DSC_RXC_SLCR_OFFS_ADJ3r_fields,
  13767 #else
  13768 	0,
  13769 #endif
  13770 #endif
  13771 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13772 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13773 	"DSC_RXC_SLCR_OFFS_ADJ3r",
  13774 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13775 	"DSC_AFE2_RXC_SLICER_OFFSET_ADJ_3",
  13776 	NULL,
  13777 #endif
  13778 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13779 	0x0, /* 0 */
  13780 	0,
  13781 #endif
  13782 },
  13783 {
  13784 	BCMI_TSCBH_XGXS_DSC_RXC_SLCR_OFFS_ADJ4r,
  13785 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13786 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13787 	BCMI_TSCBH_XGXS_DSC_RXC_SLCR_OFFS_ADJ4r_fields,
  13788 #else
  13789 	0,
  13790 #endif
  13791 #endif
  13792 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13793 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13794 	"DSC_RXC_SLCR_OFFS_ADJ4r",
  13795 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13796 	"DSC_AFE2_RXC_SLICER_OFFSET_ADJ_4",
  13797 	NULL,
  13798 #endif
  13799 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13800 	0x0, /* 0 */
  13801 	0,
  13802 #endif
  13803 },
  13804 {
  13805 	BCMI_TSCBH_XGXS_DSC_RXC_SLCR_OFFS_ADJ5r,
  13806 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13807 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13808 	BCMI_TSCBH_XGXS_DSC_RXC_SLCR_OFFS_ADJ5r_fields,
  13809 #else
  13810 	0,
  13811 #endif
  13812 #endif
  13813 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13814 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13815 	"DSC_RXC_SLCR_OFFS_ADJ5r",
  13816 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13817 	"DSC_AFE2_RXC_SLICER_OFFSET_ADJ_5",
  13818 	NULL,
  13819 #endif
  13820 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13821 	0x0, /* 0 */
  13822 	0,
  13823 #endif
  13824 },
  13825 {
  13826 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP10_ABCDr,
  13827 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13828 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13829 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP10_ABCDr_fields,
  13830 #else
  13831 	0,
  13832 #endif
  13833 #endif
  13834 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13835 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13836 	"DSC_RX_DFE_TAP10_ABCDr",
  13837 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13838 	"DSC_AFE3_RX_DFE_TAP10_ABCD",
  13839 	NULL,
  13840 #endif
  13841 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13842 	0x0, /* 0 */
  13843 	0,
  13844 #endif
  13845 },
  13846 {
  13847 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP11_ABCDr,
  13848 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13849 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13850 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP11_ABCDr_fields,
  13851 #else
  13852 	0,
  13853 #endif
  13854 #endif
  13855 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13856 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13857 	"DSC_RX_DFE_TAP11_ABCDr",
  13858 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13859 	"DSC_AFE3_RX_DFE_TAP11_ABCD",
  13860 	NULL,
  13861 #endif
  13862 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13863 	0x0, /* 0 */
  13864 	0,
  13865 #endif
  13866 },
  13867 {
  13868 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP12_ABCDr,
  13869 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13870 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13871 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP12_ABCDr_fields,
  13872 #else
  13873 	0,
  13874 #endif
  13875 #endif
  13876 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13877 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13878 	"DSC_RX_DFE_TAP12_ABCDr",
  13879 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13880 	"DSC_AFE3_RX_DFE_TAP12_ABCD",
  13881 	NULL,
  13882 #endif
  13883 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13884 	0x0, /* 0 */
  13885 	0,
  13886 #endif
  13887 },
  13888 {
  13889 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP13_ABCDr,
  13890 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13891 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13892 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP13_ABCDr_fields,
  13893 #else
  13894 	0,
  13895 #endif
  13896 #endif
  13897 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13898 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13899 	"DSC_RX_DFE_TAP13_ABCDr",
  13900 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13901 	"DSC_AFE3_RX_DFE_TAP13_ABCD",
  13902 	NULL,
  13903 #endif
  13904 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13905 	0x0, /* 0 */
  13906 	0,
  13907 #endif
  13908 },
  13909 {
  13910 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP14_ABCDr,
  13911 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13912 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13913 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP14_ABCDr_fields,
  13914 #else
  13915 	0,
  13916 #endif
  13917 #endif
  13918 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13919 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13920 	"DSC_RX_DFE_TAP14_ABCDr",
  13921 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13922 	"DSC_AFE3_RX_DFE_TAP14_ABCD",
  13923 	NULL,
  13924 #endif
  13925 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13926 	0x0, /* 0 */
  13927 	0,
  13928 #endif
  13929 },
  13930 {
  13931 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP7_8_MUX_ABCDr,
  13932 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13933 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13934 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP7_8_MUX_ABCDr_fields,
  13935 #else
  13936 	0,
  13937 #endif
  13938 #endif
  13939 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13940 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13941 	"DSC_RX_DFE_TAP7_8_MUX_ABCDr",
  13942 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13943 	"DSC_AFE3_RX_DFE_TAP7_8_MUX_ABCD",
  13944 	NULL,
  13945 #endif
  13946 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13947 	0x0, /* 0 */
  13948 	0,
  13949 #endif
  13950 },
  13951 {
  13952 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP9_10_MUX_ABCDr,
  13953 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13954 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13955 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP9_10_MUX_ABCDr_fields,
  13956 #else
  13957 	0,
  13958 #endif
  13959 #endif
  13960 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13961 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13962 	"DSC_RX_DFE_TAP9_10_MUX_ABCDr",
  13963 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13964 	"DSC_AFE3_RX_DFE_TAP9_10_MUX_ABCD",
  13965 	NULL,
  13966 #endif
  13967 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13968 	0x0, /* 0 */
  13969 	0,
  13970 #endif
  13971 },
  13972 {
  13973 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP11_12_MUX_ABCDr,
  13974 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13975 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13976 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP11_12_MUX_ABCDr_fields,
  13977 #else
  13978 	0,
  13979 #endif
  13980 #endif
  13981 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  13982 	PHYMOD_SYMBOL_FLAG_REGISTER,
  13983 	"DSC_RX_DFE_TAP11_12_MUX_ABCDr",
  13984 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  13985 	"DSC_AFE3_RX_DFE_TAP11_12_MUX_ABCD",
  13986 	NULL,
  13987 #endif
  13988 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  13989 	0x0, /* 0 */
  13990 	0,
  13991 #endif
  13992 },
  13993 {
  13994 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP13_14_MUX_ABCDr,
  13995 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  13996 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  13997 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP13_14_MUX_ABCDr_fields,
  13998 #else
  13999 	0,
  14000 #endif
  14001 #endif
  14002 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14003 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14004 	"DSC_RX_DFE_TAP13_14_MUX_ABCDr",
  14005 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14006 	"DSC_AFE3_RX_DFE_TAP13_14_MUX_ABCD",
  14007 	NULL,
  14008 #endif
  14009 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14010 	0x0, /* 0 */
  14011 	0,
  14012 #endif
  14013 },
  14014 {
  14015 	BCMI_TSCBH_XGXS_DSC_LOAD_PRESETSr,
  14016 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14017 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14018 	BCMI_TSCBH_XGXS_DSC_LOAD_PRESETSr_fields,
  14019 #else
  14020 	0,
  14021 #endif
  14022 #endif
  14023 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14024 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14025 	"DSC_LOAD_PRESETSr",
  14026 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14027 	"DSC_AFE3_LOAD_PRESETS",
  14028 	NULL,
  14029 #endif
  14030 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14031 	0x0, /* 0 */
  14032 	0,
  14033 #endif
  14034 },
  14035 {
  14036 	BCMI_TSCBH_XGXS_DSC_RXD_SLCR_OFFS_ADJ1r,
  14037 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14038 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14039 	BCMI_TSCBH_XGXS_DSC_RXD_SLCR_OFFS_ADJ1r_fields,
  14040 #else
  14041 	0,
  14042 #endif
  14043 #endif
  14044 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14045 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14046 	"DSC_RXD_SLCR_OFFS_ADJ1r",
  14047 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14048 	"DSC_AFE3_RXD_SLICER_OFFSET_ADJ_1",
  14049 	NULL,
  14050 #endif
  14051 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14052 	0x0, /* 0 */
  14053 	0,
  14054 #endif
  14055 },
  14056 {
  14057 	BCMI_TSCBH_XGXS_DSC_RXD_SLCR_OFFS_ADJ2r,
  14058 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14059 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14060 	BCMI_TSCBH_XGXS_DSC_RXD_SLCR_OFFS_ADJ2r_fields,
  14061 #else
  14062 	0,
  14063 #endif
  14064 #endif
  14065 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14066 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14067 	"DSC_RXD_SLCR_OFFS_ADJ2r",
  14068 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14069 	"DSC_AFE3_RXD_SLICER_OFFSET_ADJ_2",
  14070 	NULL,
  14071 #endif
  14072 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14073 	0x0, /* 0 */
  14074 	0,
  14075 #endif
  14076 },
  14077 {
  14078 	BCMI_TSCBH_XGXS_DSC_RXD_SLCR_OFFS_ADJ3r,
  14079 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14080 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14081 	BCMI_TSCBH_XGXS_DSC_RXD_SLCR_OFFS_ADJ3r_fields,
  14082 #else
  14083 	0,
  14084 #endif
  14085 #endif
  14086 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14087 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14088 	"DSC_RXD_SLCR_OFFS_ADJ3r",
  14089 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14090 	"DSC_AFE3_RXD_SLICER_OFFSET_ADJ_3",
  14091 	NULL,
  14092 #endif
  14093 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14094 	0x0, /* 0 */
  14095 	0,
  14096 #endif
  14097 },
  14098 {
  14099 	BCMI_TSCBH_XGXS_DSC_RXD_SLCR_OFFS_ADJ4r,
  14100 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14101 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14102 	BCMI_TSCBH_XGXS_DSC_RXD_SLCR_OFFS_ADJ4r_fields,
  14103 #else
  14104 	0,
  14105 #endif
  14106 #endif
  14107 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14108 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14109 	"DSC_RXD_SLCR_OFFS_ADJ4r",
  14110 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14111 	"DSC_AFE3_RXD_SLICER_OFFSET_ADJ_4",
  14112 	NULL,
  14113 #endif
  14114 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14115 	0x0, /* 0 */
  14116 	0,
  14117 #endif
  14118 },
  14119 {
  14120 	BCMI_TSCBH_XGXS_DSC_RXD_SLCR_OFFS_ADJ5r,
  14121 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14122 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14123 	BCMI_TSCBH_XGXS_DSC_RXD_SLCR_OFFS_ADJ5r_fields,
  14124 #else
  14125 	0,
  14126 #endif
  14127 #endif
  14128 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14129 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14130 	"DSC_RXD_SLCR_OFFS_ADJ5r",
  14131 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14132 	"DSC_AFE3_RXD_SLICER_OFFSET_ADJ_5",
  14133 	NULL,
  14134 #endif
  14135 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14136 	0x0, /* 0 */
  14137 	0,
  14138 #endif
  14139 },
  14140 {
  14141 	BCMI_TSCBH_XGXS_DSC_TRNSUM_PAT_CTL_0Ar,
  14142 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14143 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14144 	BCMI_TSCBH_XGXS_DSC_TRNSUM_PAT_CTL_0Ar_fields,
  14145 #else
  14146 	0,
  14147 #endif
  14148 #endif
  14149 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14150 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14151 	"DSC_TRNSUM_PAT_CTL_0Ar",
  14152 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14153 	"DSC_A_TRNSUM_PAT_CTRL_0A",
  14154 	NULL,
  14155 #endif
  14156 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14157 	0x0, /* 0 */
  14158 	0,
  14159 #endif
  14160 },
  14161 {
  14162 	BCMI_TSCBH_XGXS_DSC_TRNSUM_PAT_CTL_0Br,
  14163 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14164 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14165 	BCMI_TSCBH_XGXS_DSC_TRNSUM_PAT_CTL_0Br_fields,
  14166 #else
  14167 	0,
  14168 #endif
  14169 #endif
  14170 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14171 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14172 	"DSC_TRNSUM_PAT_CTL_0Br",
  14173 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14174 	"DSC_A_TRNSUM_PAT_CTRL_0B",
  14175 	NULL,
  14176 #endif
  14177 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14178 	0x0, /* 0 */
  14179 	0,
  14180 #endif
  14181 },
  14182 {
  14183 	BCMI_TSCBH_XGXS_DSC_TRNSUM_PAT_CTL_1Ar,
  14184 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14185 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14186 	BCMI_TSCBH_XGXS_DSC_TRNSUM_PAT_CTL_1Ar_fields,
  14187 #else
  14188 	0,
  14189 #endif
  14190 #endif
  14191 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14192 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14193 	"DSC_TRNSUM_PAT_CTL_1Ar",
  14194 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14195 	"DSC_A_TRNSUM_PAT_CTRL_1A",
  14196 	NULL,
  14197 #endif
  14198 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14199 	0x0, /* 0 */
  14200 	0,
  14201 #endif
  14202 },
  14203 {
  14204 	BCMI_TSCBH_XGXS_DSC_TRNSUM_PAT_CTL_1Br,
  14205 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14206 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14207 	BCMI_TSCBH_XGXS_DSC_TRNSUM_PAT_CTL_1Br_fields,
  14208 #else
  14209 	0,
  14210 #endif
  14211 #endif
  14212 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14213 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14214 	"DSC_TRNSUM_PAT_CTL_1Br",
  14215 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14216 	"DSC_A_TRNSUM_PAT_CTRL_1B",
  14217 	NULL,
  14218 #endif
  14219 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14220 	0x0, /* 0 */
  14221 	0,
  14222 #endif
  14223 },
  14224 {
  14225 	BCMI_TSCBH_XGXS_DSC_TRNSUM_PAT_CTL_2Ar,
  14226 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14227 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14228 	BCMI_TSCBH_XGXS_DSC_TRNSUM_PAT_CTL_2Ar_fields,
  14229 #else
  14230 	0,
  14231 #endif
  14232 #endif
  14233 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14234 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14235 	"DSC_TRNSUM_PAT_CTL_2Ar",
  14236 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14237 	"DSC_A_TRNSUM_PAT_CTRL_2A",
  14238 	NULL,
  14239 #endif
  14240 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14241 	0x0, /* 0 */
  14242 	0,
  14243 #endif
  14244 },
  14245 {
  14246 	BCMI_TSCBH_XGXS_DSC_TRNSUM_PAT_CTL_2Br,
  14247 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14248 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14249 	BCMI_TSCBH_XGXS_DSC_TRNSUM_PAT_CTL_2Br_fields,
  14250 #else
  14251 	0,
  14252 #endif
  14253 #endif
  14254 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14255 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14256 	"DSC_TRNSUM_PAT_CTL_2Br",
  14257 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14258 	"DSC_A_TRNSUM_PAT_CTRL_2B",
  14259 	NULL,
  14260 #endif
  14261 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14262 	0x0, /* 0 */
  14263 	0,
  14264 #endif
  14265 },
  14266 {
  14267 	BCMI_TSCBH_XGXS_DSC_BLW_CTL1r,
  14268 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14269 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14270 	BCMI_TSCBH_XGXS_DSC_BLW_CTL1r_fields,
  14271 #else
  14272 	0,
  14273 #endif
  14274 #endif
  14275 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14276 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14277 	"DSC_BLW_CTL1r",
  14278 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14279 	"DSC_A_BLW_CTRL_1",
  14280 	NULL,
  14281 #endif
  14282 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14283 	0x4296, /* 17046 */
  14284 	0,
  14285 #endif
  14286 },
  14287 {
  14288 	BCMI_TSCBH_XGXS_DSC_BLW_CTL2r,
  14289 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14290 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14291 	BCMI_TSCBH_XGXS_DSC_BLW_CTL2r_fields,
  14292 #else
  14293 	0,
  14294 #endif
  14295 #endif
  14296 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14297 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14298 	"DSC_BLW_CTL2r",
  14299 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14300 	"DSC_A_BLW_CTRL_2",
  14301 	NULL,
  14302 #endif
  14303 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14304 	0x1002, /* 4098 */
  14305 	0,
  14306 #endif
  14307 },
  14308 {
  14309 	BCMI_TSCBH_XGXS_DSC_BLW_CTL3r,
  14310 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14311 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14312 	BCMI_TSCBH_XGXS_DSC_BLW_CTL3r_fields,
  14313 #else
  14314 	0,
  14315 #endif
  14316 #endif
  14317 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14318 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14319 	"DSC_BLW_CTL3r",
  14320 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14321 	"DSC_A_BLW_CTRL_3",
  14322 	NULL,
  14323 #endif
  14324 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14325 	0x0, /* 0 */
  14326 	0,
  14327 #endif
  14328 },
  14329 {
  14330 	BCMI_TSCBH_XGXS_DSC_BLW_CTL4r,
  14331 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14332 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14333 	BCMI_TSCBH_XGXS_DSC_BLW_CTL4r_fields,
  14334 #else
  14335 	0,
  14336 #endif
  14337 #endif
  14338 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14339 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14340 	"DSC_BLW_CTL4r",
  14341 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14342 	"DSC_A_BLW_CTRL_4",
  14343 	NULL,
  14344 #endif
  14345 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14346 	0x7fff, /* 32767 */
  14347 	0,
  14348 #endif
  14349 },
  14350 {
  14351 	BCMI_TSCBH_XGXS_DSC_BLW_CTL5r,
  14352 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14353 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14354 	BCMI_TSCBH_XGXS_DSC_BLW_CTL5r_fields,
  14355 #else
  14356 	0,
  14357 #endif
  14358 #endif
  14359 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14360 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14361 	"DSC_BLW_CTL5r",
  14362 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14363 	"DSC_A_BLW_CTRL_5",
  14364 	NULL,
  14365 #endif
  14366 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14367 	0x8000, /* 32768 */
  14368 	0,
  14369 #endif
  14370 },
  14371 {
  14372 	BCMI_TSCBH_XGXS_DSC_BLW_STS_1_TYPEr,
  14373 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14374 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14375 	BCMI_TSCBH_XGXS_DSC_BLW_STS_1_TYPEr_fields,
  14376 #else
  14377 	0,
  14378 #endif
  14379 #endif
  14380 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14381 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14382 	"DSC_BLW_STS_1_TYPEr",
  14383 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14384 	"DSC_A_BLW_STATUS_1_TYPE",
  14385 	NULL,
  14386 #endif
  14387 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14388 	0x20, /* 32 */
  14389 	0,
  14390 #endif
  14391 },
  14392 {
  14393 	BCMI_TSCBH_XGXS_DSC_BLW_STS_2_TYPEr,
  14394 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14395 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14396 	BCMI_TSCBH_XGXS_DSC_BLW_STS_2_TYPEr_fields,
  14397 #else
  14398 	0,
  14399 #endif
  14400 #endif
  14401 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14402 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14403 	"DSC_BLW_STS_2_TYPEr",
  14404 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14405 	"DSC_A_BLW_STATUS_2_TYPE",
  14406 	NULL,
  14407 #endif
  14408 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14409 	0x0, /* 0 */
  14410 	0,
  14411 #endif
  14412 },
  14413 {
  14414 	BCMI_TSCBH_XGXS_DSC_UC_CTLr,
  14415 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14416 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14417 	BCMI_TSCBH_XGXS_DSC_UC_CTLr_fields,
  14418 #else
  14419 	0,
  14420 #endif
  14421 #endif
  14422 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14423 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14424 	"DSC_UC_CTLr",
  14425 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14426 	"DSC_A_DSC_UC_CTRL",
  14427 	NULL,
  14428 #endif
  14429 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14430 	0x0, /* 0 */
  14431 	0,
  14432 #endif
  14433 },
  14434 {
  14435 	BCMI_TSCBH_XGXS_DSC_SCRATCHr,
  14436 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14437 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14438 	BCMI_TSCBH_XGXS_DSC_SCRATCHr_fields,
  14439 #else
  14440 	0,
  14441 #endif
  14442 #endif
  14443 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14444 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14445 	"DSC_SCRATCHr",
  14446 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14447 	"DSC_A_DSC_SCRATCH",
  14448 	NULL,
  14449 #endif
  14450 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14451 	0x0, /* 0 */
  14452 	0,
  14453 #endif
  14454 },
  14455 {
  14456 	BCMI_TSCBH_XGXS_DSC_TRNSUM_A_LOr,
  14457 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14458 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14459 	BCMI_TSCBH_XGXS_DSC_TRNSUM_A_LOr_fields,
  14460 #else
  14461 	0,
  14462 #endif
  14463 #endif
  14464 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14465 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14466 	"DSC_TRNSUM_A_LOr",
  14467 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14468 	"DSC_B_TRNSUM_A_LOW",
  14469 	NULL,
  14470 #endif
  14471 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14472 	0x0, /* 0 */
  14473 	0,
  14474 #endif
  14475 },
  14476 {
  14477 	BCMI_TSCBH_XGXS_DSC_TRNSUM_Ar,
  14478 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14479 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14480 	BCMI_TSCBH_XGXS_DSC_TRNSUM_Ar_fields,
  14481 #else
  14482 	0,
  14483 #endif
  14484 #endif
  14485 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14486 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14487 	"DSC_TRNSUM_Ar",
  14488 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14489 	"DSC_B_TRNSUM_A",
  14490 	NULL,
  14491 #endif
  14492 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14493 	0x0, /* 0 */
  14494 	0,
  14495 #endif
  14496 },
  14497 {
  14498 	BCMI_TSCBH_XGXS_DSC_TRNSUM_B_LOr,
  14499 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14500 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14501 	BCMI_TSCBH_XGXS_DSC_TRNSUM_B_LOr_fields,
  14502 #else
  14503 	0,
  14504 #endif
  14505 #endif
  14506 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14507 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14508 	"DSC_TRNSUM_B_LOr",
  14509 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14510 	"DSC_B_TRNSUM_B_LOW",
  14511 	NULL,
  14512 #endif
  14513 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14514 	0x0, /* 0 */
  14515 	0,
  14516 #endif
  14517 },
  14518 {
  14519 	BCMI_TSCBH_XGXS_DSC_TRNSUM_Br,
  14520 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14521 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14522 	BCMI_TSCBH_XGXS_DSC_TRNSUM_Br_fields,
  14523 #else
  14524 	0,
  14525 #endif
  14526 #endif
  14527 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14528 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14529 	"DSC_TRNSUM_Br",
  14530 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14531 	"DSC_B_TRNSUM_B",
  14532 	NULL,
  14533 #endif
  14534 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14535 	0x0, /* 0 */
  14536 	0,
  14537 #endif
  14538 },
  14539 {
  14540 	BCMI_TSCBH_XGXS_DSC_TRNSUM_C_LOr,
  14541 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14542 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14543 	BCMI_TSCBH_XGXS_DSC_TRNSUM_C_LOr_fields,
  14544 #else
  14545 	0,
  14546 #endif
  14547 #endif
  14548 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14549 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14550 	"DSC_TRNSUM_C_LOr",
  14551 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14552 	"DSC_B_TRNSUM_C_LOW",
  14553 	NULL,
  14554 #endif
  14555 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14556 	0x0, /* 0 */
  14557 	0,
  14558 #endif
  14559 },
  14560 {
  14561 	BCMI_TSCBH_XGXS_DSC_TRNSUM_Cr,
  14562 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14563 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14564 	BCMI_TSCBH_XGXS_DSC_TRNSUM_Cr_fields,
  14565 #else
  14566 	0,
  14567 #endif
  14568 #endif
  14569 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14570 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14571 	"DSC_TRNSUM_Cr",
  14572 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14573 	"DSC_B_TRNSUM_C",
  14574 	NULL,
  14575 #endif
  14576 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14577 	0x0, /* 0 */
  14578 	0,
  14579 #endif
  14580 },
  14581 {
  14582 	BCMI_TSCBH_XGXS_DSC_TRNSUM_D_LOr,
  14583 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14584 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14585 	BCMI_TSCBH_XGXS_DSC_TRNSUM_D_LOr_fields,
  14586 #else
  14587 	0,
  14588 #endif
  14589 #endif
  14590 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14591 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14592 	"DSC_TRNSUM_D_LOr",
  14593 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14594 	"DSC_B_TRNSUM_D_LOW",
  14595 	NULL,
  14596 #endif
  14597 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14598 	0x0, /* 0 */
  14599 	0,
  14600 #endif
  14601 },
  14602 {
  14603 	BCMI_TSCBH_XGXS_DSC_TRNSUM_Dr,
  14604 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14605 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14606 	BCMI_TSCBH_XGXS_DSC_TRNSUM_Dr_fields,
  14607 #else
  14608 	0,
  14609 #endif
  14610 #endif
  14611 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14612 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14613 	"DSC_TRNSUM_Dr",
  14614 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14615 	"DSC_B_TRNSUM_D",
  14616 	NULL,
  14617 #endif
  14618 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14619 	0x0, /* 0 */
  14620 	0,
  14621 #endif
  14622 },
  14623 {
  14624 	BCMI_TSCBH_XGXS_DSC_TRNSUM_LOr,
  14625 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14626 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14627 	BCMI_TSCBH_XGXS_DSC_TRNSUM_LOr_fields,
  14628 #else
  14629 	0,
  14630 #endif
  14631 #endif
  14632 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14633 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14634 	"DSC_TRNSUM_LOr",
  14635 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14636 	"DSC_B_TRNSUM_LOW",
  14637 	NULL,
  14638 #endif
  14639 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14640 	0x0, /* 0 */
  14641 	0,
  14642 #endif
  14643 },
  14644 {
  14645 	BCMI_TSCBH_XGXS_DSC_TRNSUMr,
  14646 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14647 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14648 	BCMI_TSCBH_XGXS_DSC_TRNSUMr_fields,
  14649 #else
  14650 	0,
  14651 #endif
  14652 #endif
  14653 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14654 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14655 	"DSC_TRNSUMr",
  14656 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14657 	"DSC_B_TRNSUM",
  14658 	NULL,
  14659 #endif
  14660 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14661 	0x0, /* 0 */
  14662 	0,
  14663 #endif
  14664 },
  14665 {
  14666 	BCMI_TSCBH_XGXS_DSC_VGA_PHASE_THR_STSr,
  14667 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14668 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14669 	BCMI_TSCBH_XGXS_DSC_VGA_PHASE_THR_STSr_fields,
  14670 #else
  14671 	0,
  14672 #endif
  14673 #endif
  14674 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14675 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14676 	"DSC_VGA_PHASE_THR_STSr",
  14677 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14678 	"DSC_B_VGA_PHASE_THRESH_STATUS",
  14679 	NULL,
  14680 #endif
  14681 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14682 	0x0, /* 0 */
  14683 	0,
  14684 #endif
  14685 },
  14686 {
  14687 	BCMI_TSCBH_XGXS_DSC_VGA_DATA_THR_STSr,
  14688 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14689 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14690 	BCMI_TSCBH_XGXS_DSC_VGA_DATA_THR_STSr_fields,
  14691 #else
  14692 	0,
  14693 #endif
  14694 #endif
  14695 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14696 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14697 	"DSC_VGA_DATA_THR_STSr",
  14698 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14699 	"DSC_B_VGA_DATA_THRESH_STATUS",
  14700 	NULL,
  14701 #endif
  14702 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14703 	0x0, /* 0 */
  14704 	0,
  14705 #endif
  14706 },
  14707 {
  14708 	BCMI_TSCBH_XGXS_DSC_DC_OFFS_STSr,
  14709 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14710 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14711 	BCMI_TSCBH_XGXS_DSC_DC_OFFS_STSr_fields,
  14712 #else
  14713 	0,
  14714 #endif
  14715 #endif
  14716 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14717 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14718 	"DSC_DC_OFFS_STSr",
  14719 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14720 	"DSC_B_DC_OFFSET_STATUS",
  14721 	NULL,
  14722 #endif
  14723 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14724 	0x0, /* 0 */
  14725 	0,
  14726 #endif
  14727 },
  14728 {
  14729 	BCMI_TSCBH_XGXS_DSC_VGA_D_THR_STSr,
  14730 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14731 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14732 	BCMI_TSCBH_XGXS_DSC_VGA_D_THR_STSr_fields,
  14733 #else
  14734 	0,
  14735 #endif
  14736 #endif
  14737 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14738 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14739 	"DSC_VGA_D_THR_STSr",
  14740 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14741 	"DSC_B_VGA_D_THRESH_STATUS",
  14742 	NULL,
  14743 #endif
  14744 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14745 	0x2700, /* 9984 */
  14746 	0,
  14747 #endif
  14748 },
  14749 {
  14750 	BCMI_TSCBH_XGXS_DSC_CDR_CTL0r,
  14751 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14752 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14753 	BCMI_TSCBH_XGXS_DSC_CDR_CTL0r_fields,
  14754 #else
  14755 	0,
  14756 #endif
  14757 #endif
  14758 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14759 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14760 	"DSC_CDR_CTL0r",
  14761 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14762 	"DSC_C_CDR_CONTROL_0",
  14763 	NULL,
  14764 #endif
  14765 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14766 	0x9, /* 9 */
  14767 	0,
  14768 #endif
  14769 },
  14770 {
  14771 	BCMI_TSCBH_XGXS_DSC_CDR_CTL1r,
  14772 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14773 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14774 	BCMI_TSCBH_XGXS_DSC_CDR_CTL1r_fields,
  14775 #else
  14776 	0,
  14777 #endif
  14778 #endif
  14779 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14780 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14781 	"DSC_CDR_CTL1r",
  14782 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14783 	"DSC_C_CDR_CONTROL_1",
  14784 	NULL,
  14785 #endif
  14786 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14787 	0x7, /* 7 */
  14788 	0,
  14789 #endif
  14790 },
  14791 {
  14792 	BCMI_TSCBH_XGXS_DSC_CDR_CTL2r,
  14793 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14794 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14795 	BCMI_TSCBH_XGXS_DSC_CDR_CTL2r_fields,
  14796 #else
  14797 	0,
  14798 #endif
  14799 #endif
  14800 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14801 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14802 	"DSC_CDR_CTL2r",
  14803 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14804 	"DSC_C_CDR_CONTROL_2",
  14805 	NULL,
  14806 #endif
  14807 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14808 	0x0, /* 0 */
  14809 	0,
  14810 #endif
  14811 },
  14812 {
  14813 	BCMI_TSCBH_XGXS_DSC_RX_PI_CTLr,
  14814 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14815 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14816 	BCMI_TSCBH_XGXS_DSC_RX_PI_CTLr_fields,
  14817 #else
  14818 	0,
  14819 #endif
  14820 #endif
  14821 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14822 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14823 	"DSC_RX_PI_CTLr",
  14824 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14825 	"DSC_C_RX_PI_CONTROL",
  14826 	NULL,
  14827 #endif
  14828 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14829 	0x1000, /* 4096 */
  14830 	0,
  14831 #endif
  14832 },
  14833 {
  14834 	BCMI_TSCBH_XGXS_DSC_TRNSUM_CTL2r,
  14835 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14836 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14837 	BCMI_TSCBH_XGXS_DSC_TRNSUM_CTL2r_fields,
  14838 #else
  14839 	0,
  14840 #endif
  14841 #endif
  14842 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14843 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14844 	"DSC_TRNSUM_CTL2r",
  14845 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14846 	"DSC_C_TRNSUM_CONTROL2",
  14847 	NULL,
  14848 #endif
  14849 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14850 	0x0, /* 0 */
  14851 	0,
  14852 #endif
  14853 },
  14854 {
  14855 	BCMI_TSCBH_XGXS_DSC_TRNSUM_CTLr,
  14856 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14857 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14858 	BCMI_TSCBH_XGXS_DSC_TRNSUM_CTLr_fields,
  14859 #else
  14860 	0,
  14861 #endif
  14862 #endif
  14863 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14864 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14865 	"DSC_TRNSUM_CTLr",
  14866 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14867 	"DSC_C_TRNSUM_CONTROL",
  14868 	NULL,
  14869 #endif
  14870 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14871 	0x0, /* 0 */
  14872 	0,
  14873 #endif
  14874 },
  14875 {
  14876 	BCMI_TSCBH_XGXS_DSC_TRNSUM_TAP_CTLr,
  14877 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14878 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14879 	BCMI_TSCBH_XGXS_DSC_TRNSUM_TAP_CTLr_fields,
  14880 #else
  14881 	0,
  14882 #endif
  14883 #endif
  14884 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14885 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14886 	"DSC_TRNSUM_TAP_CTLr",
  14887 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14888 	"DSC_C_TRNSUM_TAP_CTRL",
  14889 	NULL,
  14890 #endif
  14891 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14892 	0x0, /* 0 */
  14893 	0,
  14894 #endif
  14895 },
  14896 {
  14897 	BCMI_TSCBH_XGXS_DSC_TRNSUM_TDT_CTLr,
  14898 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14899 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14900 	BCMI_TSCBH_XGXS_DSC_TRNSUM_TDT_CTLr_fields,
  14901 #else
  14902 	0,
  14903 #endif
  14904 #endif
  14905 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14906 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14907 	"DSC_TRNSUM_TDT_CTLr",
  14908 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14909 	"DSC_C_TRNSUM_TDT_CTL",
  14910 	NULL,
  14911 #endif
  14912 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14913 	0x0, /* 0 */
  14914 	0,
  14915 #endif
  14916 },
  14917 {
  14918 	BCMI_TSCBH_XGXS_DSC_TRNSUM_MISCr,
  14919 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14920 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14921 	BCMI_TSCBH_XGXS_DSC_TRNSUM_MISCr_fields,
  14922 #else
  14923 	0,
  14924 #endif
  14925 #endif
  14926 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14927 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14928 	"DSC_TRNSUM_MISCr",
  14929 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14930 	"DSC_C_TRNSUM_MISC",
  14931 	NULL,
  14932 #endif
  14933 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14934 	0x0, /* 0 */
  14935 	0,
  14936 #endif
  14937 },
  14938 {
  14939 	BCMI_TSCBH_XGXS_DSC_SLCRS_WRITE_CTLr,
  14940 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14941 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14942 	BCMI_TSCBH_XGXS_DSC_SLCRS_WRITE_CTLr_fields,
  14943 #else
  14944 	0,
  14945 #endif
  14946 #endif
  14947 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14948 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14949 	"DSC_SLCRS_WRITE_CTLr",
  14950 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14951 	"DSC_C_SLICERS_WRITE_CTRL",
  14952 	NULL,
  14953 #endif
  14954 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14955 	0x0, /* 0 */
  14956 	0,
  14957 #endif
  14958 },
  14959 {
  14960 	BCMI_TSCBH_XGXS_DSC_LMS_THR_CTLr,
  14961 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14962 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14963 	BCMI_TSCBH_XGXS_DSC_LMS_THR_CTLr_fields,
  14964 #else
  14965 	0,
  14966 #endif
  14967 #endif
  14968 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14969 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14970 	"DSC_LMS_THR_CTLr",
  14971 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14972 	"DSC_C_LMS_THRESH_CONTROL",
  14973 	NULL,
  14974 #endif
  14975 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14976 	0x0, /* 0 */
  14977 	0,
  14978 #endif
  14979 },
  14980 {
  14981 	BCMI_TSCBH_XGXS_DSC_DC_OFFS_CTLr,
  14982 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  14983 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  14984 	BCMI_TSCBH_XGXS_DSC_DC_OFFS_CTLr_fields,
  14985 #else
  14986 	0,
  14987 #endif
  14988 #endif
  14989 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  14990 	PHYMOD_SYMBOL_FLAG_REGISTER,
  14991 	"DSC_DC_OFFS_CTLr",
  14992 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  14993 	"DSC_C_DC_OFFSET_CONTROL",
  14994 	NULL,
  14995 #endif
  14996 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  14997 	0x10, /* 16 */
  14998 	0,
  14999 #endif
  15000 },
  15001 {
  15002 	BCMI_TSCBH_XGXS_DSC_SM_CTL0r,
  15003 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15004 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15005 	BCMI_TSCBH_XGXS_DSC_SM_CTL0r_fields,
  15006 #else
  15007 	0,
  15008 #endif
  15009 #endif
  15010 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15011 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15012 	"DSC_SM_CTL0r",
  15013 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15014 	"DSC_D_DSC_SM_CTRL_0",
  15015 	NULL,
  15016 #endif
  15017 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15018 	0x8, /* 8 */
  15019 	0,
  15020 #endif
  15021 },
  15022 {
  15023 	BCMI_TSCBH_XGXS_DSC_SM_CTL1r,
  15024 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15025 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15026 	BCMI_TSCBH_XGXS_DSC_SM_CTL1r_fields,
  15027 #else
  15028 	0,
  15029 #endif
  15030 #endif
  15031 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15032 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15033 	"DSC_SM_CTL1r",
  15034 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15035 	"DSC_D_DSC_SM_CTRL_1",
  15036 	NULL,
  15037 #endif
  15038 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15039 	0x200, /* 512 */
  15040 	0,
  15041 #endif
  15042 },
  15043 {
  15044 	BCMI_TSCBH_XGXS_DSC_SM_CTL2r,
  15045 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15046 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15047 	BCMI_TSCBH_XGXS_DSC_SM_CTL2r_fields,
  15048 #else
  15049 	0,
  15050 #endif
  15051 #endif
  15052 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15053 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15054 	"DSC_SM_CTL2r",
  15055 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15056 	"DSC_D_DSC_SM_CTRL_2",
  15057 	NULL,
  15058 #endif
  15059 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15060 	0x87, /* 135 */
  15061 	0,
  15062 #endif
  15063 },
  15064 {
  15065 	BCMI_TSCBH_XGXS_DSC_SM_CTL3r,
  15066 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15067 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15068 	BCMI_TSCBH_XGXS_DSC_SM_CTL3r_fields,
  15069 #else
  15070 	0,
  15071 #endif
  15072 #endif
  15073 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15074 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15075 	"DSC_SM_CTL3r",
  15076 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15077 	"DSC_D_DSC_SM_CTRL_3",
  15078 	NULL,
  15079 #endif
  15080 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15081 	0x1c1e, /* 7198 */
  15082 	0,
  15083 #endif
  15084 },
  15085 {
  15086 	BCMI_TSCBH_XGXS_DSC_SM_CTL4r,
  15087 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15088 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15089 	BCMI_TSCBH_XGXS_DSC_SM_CTL4r_fields,
  15090 #else
  15091 	0,
  15092 #endif
  15093 #endif
  15094 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15095 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15096 	"DSC_SM_CTL4r",
  15097 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15098 	"DSC_D_DSC_SM_CTRL_4",
  15099 	NULL,
  15100 #endif
  15101 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15102 	0x0, /* 0 */
  15103 	0,
  15104 #endif
  15105 },
  15106 {
  15107 	BCMI_TSCBH_XGXS_DSC_SM_CTL5r,
  15108 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15109 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15110 	BCMI_TSCBH_XGXS_DSC_SM_CTL5r_fields,
  15111 #else
  15112 	0,
  15113 #endif
  15114 #endif
  15115 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15116 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15117 	"DSC_SM_CTL5r",
  15118 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15119 	"DSC_D_DSC_SM_CTRL_5",
  15120 	NULL,
  15121 #endif
  15122 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15123 	0x35ad, /* 13741 */
  15124 	0,
  15125 #endif
  15126 },
  15127 {
  15128 	BCMI_TSCBH_XGXS_DSC_SM_CTL6r,
  15129 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15130 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15131 	BCMI_TSCBH_XGXS_DSC_SM_CTL6r_fields,
  15132 #else
  15133 	0,
  15134 #endif
  15135 #endif
  15136 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15137 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15138 	"DSC_SM_CTL6r",
  15139 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15140 	"DSC_D_DSC_SM_CTRL_6",
  15141 	NULL,
  15142 #endif
  15143 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15144 	0x340d, /* 13325 */
  15145 	0,
  15146 #endif
  15147 },
  15148 {
  15149 	BCMI_TSCBH_XGXS_DSC_SM_CTL7r,
  15150 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15151 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15152 	BCMI_TSCBH_XGXS_DSC_SM_CTL7r_fields,
  15153 #else
  15154 	0,
  15155 #endif
  15156 #endif
  15157 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15158 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15159 	"DSC_SM_CTL7r",
  15160 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15161 	"DSC_D_DSC_SM_CTRL_7",
  15162 	NULL,
  15163 #endif
  15164 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15165 	0x0, /* 0 */
  15166 	0,
  15167 #endif
  15168 },
  15169 {
  15170 	BCMI_TSCBH_XGXS_DSC_SM_CTL8r,
  15171 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15172 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15173 	BCMI_TSCBH_XGXS_DSC_SM_CTL8r_fields,
  15174 #else
  15175 	0,
  15176 #endif
  15177 #endif
  15178 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15179 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15180 	"DSC_SM_CTL8r",
  15181 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15182 	"DSC_D_DSC_SM_CTRL_8",
  15183 	NULL,
  15184 #endif
  15185 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15186 	0x11, /* 17 */
  15187 	0,
  15188 #endif
  15189 },
  15190 {
  15191 	BCMI_TSCBH_XGXS_DSC_SM_CTL9r,
  15192 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15193 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15194 	BCMI_TSCBH_XGXS_DSC_SM_CTL9r_fields,
  15195 #else
  15196 	0,
  15197 #endif
  15198 #endif
  15199 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15200 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15201 	"DSC_SM_CTL9r",
  15202 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15203 	"DSC_D_DSC_SM_CTRL_9",
  15204 	NULL,
  15205 #endif
  15206 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15207 	0x0, /* 0 */
  15208 	0,
  15209 #endif
  15210 },
  15211 {
  15212 	BCMI_TSCBH_XGXS_DSC_SM_STS_DSC_LOCKr,
  15213 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15214 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15215 	BCMI_TSCBH_XGXS_DSC_SM_STS_DSC_LOCKr_fields,
  15216 #else
  15217 	0,
  15218 #endif
  15219 #endif
  15220 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15221 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15222 	"DSC_SM_STS_DSC_LOCKr",
  15223 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15224 	"DSC_D_DSC_SM_STATUS_DSC_LOCK",
  15225 	NULL,
  15226 #endif
  15227 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15228 	0x0, /* 0 */
  15229 	0,
  15230 #endif
  15231 },
  15232 {
  15233 	BCMI_TSCBH_XGXS_DSC_SM_STS_DSC_ST_ONE_HOTr,
  15234 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15235 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15236 	BCMI_TSCBH_XGXS_DSC_SM_STS_DSC_ST_ONE_HOTr_fields,
  15237 #else
  15238 	0,
  15239 #endif
  15240 #endif
  15241 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15242 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15243 	"DSC_SM_STS_DSC_ST_ONE_HOTr",
  15244 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15245 	"DSC_D_DSC_SM_STATUS_DSC_STATE_ONE_HOT",
  15246 	NULL,
  15247 #endif
  15248 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15249 	0x0, /* 0 */
  15250 	0,
  15251 #endif
  15252 },
  15253 {
  15254 	BCMI_TSCBH_XGXS_DSC_SM_STS_DSC_ST_EEE_ONE_HOTr,
  15255 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15256 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15257 	BCMI_TSCBH_XGXS_DSC_SM_STS_DSC_ST_EEE_ONE_HOTr_fields,
  15258 #else
  15259 	0,
  15260 #endif
  15261 #endif
  15262 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15263 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15264 	"DSC_SM_STS_DSC_ST_EEE_ONE_HOTr",
  15265 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15266 	"DSC_D_DSC_SM_STATUS_DSC_STATE_EEE_ONE_HOT",
  15267 	NULL,
  15268 #endif
  15269 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15270 	0x0, /* 0 */
  15271 	0,
  15272 #endif
  15273 },
  15274 {
  15275 	BCMI_TSCBH_XGXS_DSC_SM_STS_RESTARTr,
  15276 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15277 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15278 	BCMI_TSCBH_XGXS_DSC_SM_STS_RESTARTr_fields,
  15279 #else
  15280 	0,
  15281 #endif
  15282 #endif
  15283 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15284 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15285 	"DSC_SM_STS_RESTARTr",
  15286 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15287 	"DSC_D_DSC_SM_STATUS_RESTART",
  15288 	NULL,
  15289 #endif
  15290 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15291 	0x0, /* 0 */
  15292 	0,
  15293 #endif
  15294 },
  15295 {
  15296 	BCMI_TSCBH_XGXS_DSC_SM_STS_DSC_STr,
  15297 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15298 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15299 	BCMI_TSCBH_XGXS_DSC_SM_STS_DSC_STr_fields,
  15300 #else
  15301 	0,
  15302 #endif
  15303 #endif
  15304 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15305 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15306 	"DSC_SM_STS_DSC_STr",
  15307 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15308 	"DSC_D_DSC_SM_STATUS_DSC_STATE",
  15309 	NULL,
  15310 #endif
  15311 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15312 	0x0, /* 0 */
  15313 	0,
  15314 #endif
  15315 },
  15316 {
  15317 	BCMI_TSCBH_XGXS_DSC_RX_PI_CNT_BIN_PDr,
  15318 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15319 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15320 	BCMI_TSCBH_XGXS_DSC_RX_PI_CNT_BIN_PDr_fields,
  15321 #else
  15322 	0,
  15323 #endif
  15324 #endif
  15325 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15326 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15327 	"DSC_RX_PI_CNT_BIN_PDr",
  15328 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15329 	"DSC_E_RX_PI_CNT_BIN_PD",
  15330 	NULL,
  15331 #endif
  15332 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15333 	0x0, /* 0 */
  15334 	0,
  15335 #endif
  15336 },
  15337 {
  15338 	BCMI_TSCBH_XGXS_DSC_RX_PI_CNT_BIN_LDr,
  15339 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15340 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15341 	BCMI_TSCBH_XGXS_DSC_RX_PI_CNT_BIN_LDr_fields,
  15342 #else
  15343 	0,
  15344 #endif
  15345 #endif
  15346 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15347 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15348 	"DSC_RX_PI_CNT_BIN_LDr",
  15349 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15350 	"DSC_E_RX_PI_CNT_BIN_LD",
  15351 	NULL,
  15352 #endif
  15353 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15354 	0x0, /* 0 */
  15355 	0,
  15356 #endif
  15357 },
  15358 {
  15359 	BCMI_TSCBH_XGXS_DSC_RX_DATA_15_TO0r,
  15360 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15361 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15362 	BCMI_TSCBH_XGXS_DSC_RX_DATA_15_TO0r_fields,
  15363 #else
  15364 	0,
  15365 #endif
  15366 #endif
  15367 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15368 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15369 	"DSC_RX_DATA_15_TO0r",
  15370 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15371 	"DSC_E_RX_DATA_15_TO_0",
  15372 	NULL,
  15373 #endif
  15374 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15375 	0x0, /* 0 */
  15376 	0,
  15377 #endif
  15378 },
  15379 {
  15380 	BCMI_TSCBH_XGXS_DSC_RX_DATA_35_TO_20r,
  15381 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15382 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15383 	BCMI_TSCBH_XGXS_DSC_RX_DATA_35_TO_20r_fields,
  15384 #else
  15385 	0,
  15386 #endif
  15387 #endif
  15388 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15389 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15390 	"DSC_RX_DATA_35_TO_20r",
  15391 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15392 	"DSC_E_RX_DATA_35_TO_20",
  15393 	NULL,
  15394 #endif
  15395 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15396 	0x0, /* 0 */
  15397 	0,
  15398 #endif
  15399 },
  15400 {
  15401 	BCMI_TSCBH_XGXS_DSC_CDR_STS_PHASE_ERRr,
  15402 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15403 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15404 	BCMI_TSCBH_XGXS_DSC_CDR_STS_PHASE_ERRr_fields,
  15405 #else
  15406 	0,
  15407 #endif
  15408 #endif
  15409 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15410 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15411 	"DSC_CDR_STS_PHASE_ERRr",
  15412 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15413 	"DSC_E_CDR_STATUS_PHASE_ERROR",
  15414 	NULL,
  15415 #endif
  15416 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15417 	0x100, /* 256 */
  15418 	0,
  15419 #endif
  15420 },
  15421 {
  15422 	BCMI_TSCBH_XGXS_DSC_RX_PI_CNT_BIN_Dr,
  15423 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15424 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15425 	BCMI_TSCBH_XGXS_DSC_RX_PI_CNT_BIN_Dr_fields,
  15426 #else
  15427 	0,
  15428 #endif
  15429 #endif
  15430 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15431 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15432 	"DSC_RX_PI_CNT_BIN_Dr",
  15433 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15434 	"DSC_E_RX_PI_CNT_BIN_D",
  15435 	NULL,
  15436 #endif
  15437 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15438 	0x0, /* 0 */
  15439 	0,
  15440 #endif
  15441 },
  15442 {
  15443 	BCMI_TSCBH_XGXS_DSC_RX_PI_CNT_BIN_Pr,
  15444 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15445 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15446 	BCMI_TSCBH_XGXS_DSC_RX_PI_CNT_BIN_Pr_fields,
  15447 #else
  15448 	0,
  15449 #endif
  15450 #endif
  15451 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15452 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15453 	"DSC_RX_PI_CNT_BIN_Pr",
  15454 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15455 	"DSC_E_RX_PI_CNT_BIN_P",
  15456 	NULL,
  15457 #endif
  15458 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15459 	0x0, /* 0 */
  15460 	0,
  15461 #endif
  15462 },
  15463 {
  15464 	BCMI_TSCBH_XGXS_DSC_RX_PI_CNT_BIN_Lr,
  15465 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15466 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15467 	BCMI_TSCBH_XGXS_DSC_RX_PI_CNT_BIN_Lr_fields,
  15468 #else
  15469 	0,
  15470 #endif
  15471 #endif
  15472 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15473 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15474 	"DSC_RX_PI_CNT_BIN_Lr",
  15475 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15476 	"DSC_E_RX_PI_CNT_BIN_L",
  15477 	NULL,
  15478 #endif
  15479 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15480 	0x0, /* 0 */
  15481 	0,
  15482 #endif
  15483 },
  15484 {
  15485 	BCMI_TSCBH_XGXS_DSC_CDR_STS_INTEGr,
  15486 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15487 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15488 	BCMI_TSCBH_XGXS_DSC_CDR_STS_INTEGr_fields,
  15489 #else
  15490 	0,
  15491 #endif
  15492 #endif
  15493 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15494 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15495 	"DSC_CDR_STS_INTEGr",
  15496 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15497 	"DSC_E_CDR_STATUS_INTEG_REG",
  15498 	NULL,
  15499 #endif
  15500 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15501 	0x0, /* 0 */
  15502 	0,
  15503 #endif
  15504 },
  15505 {
  15506 	BCMI_TSCBH_XGXS_DSC_CDR_1G_STSr,
  15507 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15508 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15509 	BCMI_TSCBH_XGXS_DSC_CDR_1G_STSr_fields,
  15510 #else
  15511 	0,
  15512 #endif
  15513 #endif
  15514 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15515 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15516 	"DSC_CDR_1G_STSr",
  15517 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15518 	"DSC_E_CDR_1G_STATUS",
  15519 	NULL,
  15520 #endif
  15521 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15522 	0x0, /* 0 */
  15523 	0,
  15524 #endif
  15525 },
  15526 {
  15527 	BCMI_TSCBH_XGXS_DSC_RX_PI_CTR_PHASE_ERRr,
  15528 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15529 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15530 	BCMI_TSCBH_XGXS_DSC_RX_PI_CTR_PHASE_ERRr_fields,
  15531 #else
  15532 	0,
  15533 #endif
  15534 #endif
  15535 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15536 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15537 	"DSC_RX_PI_CTR_PHASE_ERRr",
  15538 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15539 	"DSC_E_RX_PI_CNTR_PHASE_ERR",
  15540 	NULL,
  15541 #endif
  15542 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15543 	0x0, /* 0 */
  15544 	0,
  15545 #endif
  15546 },
  15547 {
  15548 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP2_STSr,
  15549 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15550 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15551 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP2_STSr_fields,
  15552 #else
  15553 	0,
  15554 #endif
  15555 #endif
  15556 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15557 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15558 	"DSC_RX_DFE_TAP2_STSr",
  15559 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15560 	"DSC_E_RX_DFE_TAP2_STATUS",
  15561 	NULL,
  15562 #endif
  15563 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15564 	0x0, /* 0 */
  15565 	0,
  15566 #endif
  15567 },
  15568 {
  15569 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP2_3_STSr,
  15570 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15571 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15572 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP2_3_STSr_fields,
  15573 #else
  15574 	0,
  15575 #endif
  15576 #endif
  15577 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15578 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15579 	"DSC_RX_DFE_TAP2_3_STSr",
  15580 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15581 	"DSC_E_RX_DFE_TAP2_3_STATUS",
  15582 	NULL,
  15583 #endif
  15584 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15585 	0x0, /* 0 */
  15586 	0,
  15587 #endif
  15588 },
  15589 {
  15590 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP3_STSr,
  15591 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15592 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15593 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP3_STSr_fields,
  15594 #else
  15595 	0,
  15596 #endif
  15597 #endif
  15598 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15599 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15600 	"DSC_RX_DFE_TAP3_STSr",
  15601 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15602 	"DSC_E_RX_DFE_TAP3_STATUS",
  15603 	NULL,
  15604 #endif
  15605 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15606 	0x0, /* 0 */
  15607 	0,
  15608 #endif
  15609 },
  15610 {
  15611 	BCMI_TSCBH_XGXS_DSC_PRESETr,
  15612 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15613 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15614 	BCMI_TSCBH_XGXS_DSC_PRESETr_fields,
  15615 #else
  15616 	0,
  15617 #endif
  15618 #endif
  15619 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15620 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15621 	"DSC_PRESETr",
  15622 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15623 	"DSC_E_PRESET_REG",
  15624 	NULL,
  15625 #endif
  15626 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15627 	0x0, /* 0 */
  15628 	0,
  15629 #endif
  15630 },
  15631 {
  15632 	BCMI_TSCBH_XGXS_LNKTRNUR_CTL0r,
  15633 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15634 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15635 	BCMI_TSCBH_XGXS_LNKTRNUR_CTL0r_fields,
  15636 #else
  15637 	0,
  15638 #endif
  15639 #endif
  15640 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15641 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15642 	"LNKTRNUR_CTL0r",
  15643 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15644 	"LINKTRN_USER_RX_LINKTRNUR_CONTROL0_REGISTER",
  15645 	NULL,
  15646 #endif
  15647 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15648 	0x4, /* 4 */
  15649 	0,
  15650 #endif
  15651 },
  15652 {
  15653 	BCMI_TSCBH_XGXS_LNKTRNUR_CTL1r,
  15654 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15655 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15656 	BCMI_TSCBH_XGXS_LNKTRNUR_CTL1r_fields,
  15657 #else
  15658 	0,
  15659 #endif
  15660 #endif
  15661 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15662 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15663 	"LNKTRNUR_CTL1r",
  15664 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15665 	"LINKTRN_USER_RX_LINKTRNUR_CONTROL1_REGISTER",
  15666 	NULL,
  15667 #endif
  15668 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15669 	0x52, /* 82 */
  15670 	0,
  15671 #endif
  15672 },
  15673 {
  15674 	BCMI_TSCBH_XGXS_LNKTRNUR_CTL2r,
  15675 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15676 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15677 	BCMI_TSCBH_XGXS_LNKTRNUR_CTL2r_fields,
  15678 #else
  15679 	0,
  15680 #endif
  15681 #endif
  15682 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15683 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15684 	"LNKTRNUR_CTL2r",
  15685 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15686 	"LINKTRN_USER_RX_LINKTRNUR_CONTROL2_REGISTER",
  15687 	NULL,
  15688 #endif
  15689 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15690 	0xb90, /* 2960 */
  15691 	0,
  15692 #endif
  15693 },
  15694 {
  15695 	BCMI_TSCBH_XGXS_LNKTRNUR_STS0r,
  15696 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15697 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15698 	BCMI_TSCBH_XGXS_LNKTRNUR_STS0r_fields,
  15699 #else
  15700 	0,
  15701 #endif
  15702 #endif
  15703 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15704 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15705 	"LNKTRNUR_STS0r",
  15706 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15707 	"LINKTRN_USER_RX_LINKTRNUR_STATUS0_REGISTER",
  15708 	NULL,
  15709 #endif
  15710 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15711 	0x0, /* 0 */
  15712 	0,
  15713 #endif
  15714 },
  15715 {
  15716 	BCMI_TSCBH_XGXS_LNKTRNUR_UC_INTR_CTL0r,
  15717 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15718 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15719 	BCMI_TSCBH_XGXS_LNKTRNUR_UC_INTR_CTL0r_fields,
  15720 #else
  15721 	0,
  15722 #endif
  15723 #endif
  15724 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15725 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15726 	"LNKTRNUR_UC_INTR_CTL0r",
  15727 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15728 	"LINKTRN_USER_RX_LINKTRNUR_MICRO_INTERRUPT_CONTROL0_REGISTER",
  15729 	NULL,
  15730 #endif
  15731 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15732 	0x0, /* 0 */
  15733 	0,
  15734 #endif
  15735 },
  15736 {
  15737 	BCMI_TSCBH_XGXS_LNKTRNUR_UC_STS0r,
  15738 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15739 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15740 	BCMI_TSCBH_XGXS_LNKTRNUR_UC_STS0r_fields,
  15741 #else
  15742 	0,
  15743 #endif
  15744 #endif
  15745 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15746 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15747 	"LNKTRNUR_UC_STS0r",
  15748 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15749 	"LINKTRN_USER_RX_LINKTRNUR_MICRO_STATUS0_REGISTER",
  15750 	NULL,
  15751 #endif
  15752 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15753 	0x0, /* 0 */
  15754 	0,
  15755 #endif
  15756 },
  15757 {
  15758 	BCMI_TSCBH_XGXS_LNKTRNUR_UC_STS1r,
  15759 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15760 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15761 	BCMI_TSCBH_XGXS_LNKTRNUR_UC_STS1r_fields,
  15762 #else
  15763 	0,
  15764 #endif
  15765 #endif
  15766 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15767 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15768 	"LNKTRNUR_UC_STS1r",
  15769 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15770 	"LINKTRN_USER_RX_LINKTRNUR_MICRO_STATUS1_REGISTER",
  15771 	NULL,
  15772 #endif
  15773 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15774 	0x0, /* 0 */
  15775 	0,
  15776 #endif
  15777 },
  15778 {
  15779 	BCMI_TSCBH_XGXS_LNKTRNUR_CTL3r,
  15780 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15781 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15782 	BCMI_TSCBH_XGXS_LNKTRNUR_CTL3r_fields,
  15783 #else
  15784 	0,
  15785 #endif
  15786 #endif
  15787 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15788 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15789 	"LNKTRNUR_CTL3r",
  15790 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15791 	"LINKTRN_USER_RX_LINKTRNUR_CONTROL3_REGISTER",
  15792 	NULL,
  15793 #endif
  15794 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15795 	0xd, /* 13 */
  15796 	0,
  15797 #endif
  15798 },
  15799 {
  15800 	BCMI_TSCBH_XGXS_LNKTRNUR_CTL4r,
  15801 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15802 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15803 	BCMI_TSCBH_XGXS_LNKTRNUR_CTL4r_fields,
  15804 #else
  15805 	0,
  15806 #endif
  15807 #endif
  15808 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15809 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15810 	"LNKTRNUR_CTL4r",
  15811 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15812 	"LINKTRN_USER_RX_LINKTRNUR_CONTROL4_REGISTER",
  15813 	NULL,
  15814 #endif
  15815 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15816 	0x0, /* 0 */
  15817 	0,
  15818 #endif
  15819 },
  15820 {
  15821 	BCMI_TSCBH_XGXS_LNKTRNUR_STS1r,
  15822 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15823 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15824 	BCMI_TSCBH_XGXS_LNKTRNUR_STS1r_fields,
  15825 #else
  15826 	0,
  15827 #endif
  15828 #endif
  15829 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15830 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15831 	"LNKTRNUR_STS1r",
  15832 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15833 	"LINKTRN_USER_RX_LINKTRNUR_STATUS1_REGISTER",
  15834 	NULL,
  15835 #endif
  15836 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15837 	0x0, /* 0 */
  15838 	0,
  15839 #endif
  15840 },
  15841 {
  15842 	BCMI_TSCBH_XGXS_LNKTRNUR_CTL5r,
  15843 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15844 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15845 	BCMI_TSCBH_XGXS_LNKTRNUR_CTL5r_fields,
  15846 #else
  15847 	0,
  15848 #endif
  15849 #endif
  15850 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15851 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15852 	"LNKTRNUR_CTL5r",
  15853 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15854 	"LINKTRN_USER_RX_LINKTRNUR_CONTROL5_REGISTER",
  15855 	NULL,
  15856 #endif
  15857 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15858 	0x510, /* 1296 */
  15859 	0,
  15860 #endif
  15861 },
  15862 {
  15863 	BCMI_TSCBH_XGXS_LNKTRNUR_UC_INTR_CTL1r,
  15864 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15865 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15866 	BCMI_TSCBH_XGXS_LNKTRNUR_UC_INTR_CTL1r_fields,
  15867 #else
  15868 	0,
  15869 #endif
  15870 #endif
  15871 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15872 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15873 	"LNKTRNUR_UC_INTR_CTL1r",
  15874 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15875 	"LINKTRN_USER_RX_LINKTRNUR_MICRO_INTERRUPT_CONTROL1_REGISTER",
  15876 	NULL,
  15877 #endif
  15878 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15879 	0x0, /* 0 */
  15880 	0,
  15881 #endif
  15882 },
  15883 {
  15884 	BCMI_TSCBH_XGXS_LNKTRNUR_UC_INTR_CTL2r,
  15885 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15886 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15887 	BCMI_TSCBH_XGXS_LNKTRNUR_UC_INTR_CTL2r_fields,
  15888 #else
  15889 	0,
  15890 #endif
  15891 #endif
  15892 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15893 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15894 	"LNKTRNUR_UC_INTR_CTL2r",
  15895 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15896 	"LINKTRN_USER_RX_LINKTRNUR_MICRO_INTERRUPT_CONTROL2_REGISTER",
  15897 	NULL,
  15898 #endif
  15899 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15900 	0x0, /* 0 */
  15901 	0,
  15902 #endif
  15903 },
  15904 {
  15905 	BCMI_TSCBH_XGXS_LNKTRNUT_XMT_UPD_PAGEr,
  15906 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15907 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15908 	BCMI_TSCBH_XGXS_LNKTRNUT_XMT_UPD_PAGEr_fields,
  15909 #else
  15910 	0,
  15911 #endif
  15912 #endif
  15913 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15914 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15915 	"LNKTRNUT_XMT_UPD_PAGEr",
  15916 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15917 	"LINKTRN_USER_TX_LINKTRNUT_XMT_UPDATE_PAGE_REGISTER",
  15918 	NULL,
  15919 #endif
  15920 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15921 	0x0, /* 0 */
  15922 	0,
  15923 #endif
  15924 },
  15925 {
  15926 	BCMI_TSCBH_XGXS_LNKTRNUT_LD_XMT_STS_PAGEr,
  15927 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15928 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15929 	BCMI_TSCBH_XGXS_LNKTRNUT_LD_XMT_STS_PAGEr_fields,
  15930 #else
  15931 	0,
  15932 #endif
  15933 #endif
  15934 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15935 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15936 	"LNKTRNUT_LD_XMT_STS_PAGEr",
  15937 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15938 	"LINKTRN_USER_TX_LINKTRNUT_LD_XMT_STATUS_PAGE",
  15939 	NULL,
  15940 #endif
  15941 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15942 	0x0, /* 0 */
  15943 	0,
  15944 #endif
  15945 },
  15946 {
  15947 	BCMI_TSCBH_XGXS_LNKTRNUT_CTL0r,
  15948 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15949 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15950 	BCMI_TSCBH_XGXS_LNKTRNUT_CTL0r_fields,
  15951 #else
  15952 	0,
  15953 #endif
  15954 #endif
  15955 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15956 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15957 	"LNKTRNUT_CTL0r",
  15958 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15959 	"LINKTRN_USER_TX_LINKTRNUT_CONTROL0_REGISTER",
  15960 	NULL,
  15961 #endif
  15962 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15963 	0x0, /* 0 */
  15964 	0,
  15965 #endif
  15966 },
  15967 {
  15968 	BCMI_TSCBH_XGXS_LNKTRNUT_CTL1r,
  15969 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15970 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15971 	BCMI_TSCBH_XGXS_LNKTRNUT_CTL1r_fields,
  15972 #else
  15973 	0,
  15974 #endif
  15975 #endif
  15976 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15977 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15978 	"LNKTRNUT_CTL1r",
  15979 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  15980 	"LINKTRN_USER_TX_LINKTRNUT_CONTROL1_REGISTER",
  15981 	NULL,
  15982 #endif
  15983 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  15984 	0x4, /* 4 */
  15985 	0,
  15986 #endif
  15987 },
  15988 {
  15989 	BCMI_TSCBH_XGXS_LNKTRNUT_CTL2r,
  15990 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  15991 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  15992 	BCMI_TSCBH_XGXS_LNKTRNUT_CTL2r_fields,
  15993 #else
  15994 	0,
  15995 #endif
  15996 #endif
  15997 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  15998 	PHYMOD_SYMBOL_FLAG_REGISTER,
  15999 	"LNKTRNUT_CTL2r",
  16000 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16001 	"LINKTRN_USER_TX_LINKTRNUT_CONTROL2_REGISTER",
  16002 	NULL,
  16003 #endif
  16004 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16005 	0x1021, /* 4129 */
  16006 	0,
  16007 #endif
  16008 },
  16009 {
  16010 	BCMI_TSCBH_XGXS_LNKTRNUT_CTL3r,
  16011 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16012 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16013 	BCMI_TSCBH_XGXS_LNKTRNUT_CTL3r_fields,
  16014 #else
  16015 	0,
  16016 #endif
  16017 #endif
  16018 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16019 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16020 	"LNKTRNUT_CTL3r",
  16021 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16022 	"LINKTRN_USER_TX_LINKTRNUT_CONTROL3_REGISTER",
  16023 	NULL,
  16024 #endif
  16025 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16026 	0x1aa0, /* 6816 */
  16027 	0,
  16028 #endif
  16029 },
  16030 {
  16031 	BCMI_TSCBH_XGXS_LNKTRNUT_STS0r,
  16032 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16033 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16034 	BCMI_TSCBH_XGXS_LNKTRNUT_STS0r_fields,
  16035 #else
  16036 	0,
  16037 #endif
  16038 #endif
  16039 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16040 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16041 	"LNKTRNUT_STS0r",
  16042 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16043 	"LINKTRN_USER_TX_LINKTRNUT_STATUS0_REGISTER",
  16044 	NULL,
  16045 #endif
  16046 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16047 	0x0, /* 0 */
  16048 	0,
  16049 #endif
  16050 },
  16051 {
  16052 	BCMI_TSCBH_XGXS_LNKTRNUT_CTL4r,
  16053 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16054 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16055 	BCMI_TSCBH_XGXS_LNKTRNUT_CTL4r_fields,
  16056 #else
  16057 	0,
  16058 #endif
  16059 #endif
  16060 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16061 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16062 	"LNKTRNUT_CTL4r",
  16063 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16064 	"LINKTRN_USER_TX_LINKTRNUT_CONTROL4_REGISTER",
  16065 	NULL,
  16066 #endif
  16067 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16068 	0x3f5, /* 1013 */
  16069 	0,
  16070 #endif
  16071 },
  16072 {
  16073 	BCMI_TSCBH_XGXS_TX_PI_CTL0r,
  16074 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16075 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16076 	BCMI_TSCBH_XGXS_TX_PI_CTL0r_fields,
  16077 #else
  16078 	0,
  16079 #endif
  16080 #endif
  16081 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16082 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16083 	"TX_PI_CTL0r",
  16084 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16085 	"TX_PI_8X_PLL2X_V1P0_TX_PI_CONTROL_0",
  16086 	NULL,
  16087 #endif
  16088 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16089 	0x7000, /* 28672 */
  16090 	0,
  16091 #endif
  16092 },
  16093 {
  16094 	BCMI_TSCBH_XGXS_TX_PI_CTL1r,
  16095 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16096 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16097 	BCMI_TSCBH_XGXS_TX_PI_CTL1r_fields,
  16098 #else
  16099 	0,
  16100 #endif
  16101 #endif
  16102 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16103 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16104 	"TX_PI_CTL1r",
  16105 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16106 	"TX_PI_8X_PLL2X_V1P0_TX_PI_CONTROL_1",
  16107 	NULL,
  16108 #endif
  16109 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16110 	0x0, /* 0 */
  16111 	0,
  16112 #endif
  16113 },
  16114 {
  16115 	BCMI_TSCBH_XGXS_TX_PI_CTL2r,
  16116 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16117 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16118 	BCMI_TSCBH_XGXS_TX_PI_CTL2r_fields,
  16119 #else
  16120 	0,
  16121 #endif
  16122 #endif
  16123 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16124 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16125 	"TX_PI_CTL2r",
  16126 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16127 	"TX_PI_8X_PLL2X_V1P0_TX_PI_CONTROL_2",
  16128 	NULL,
  16129 #endif
  16130 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16131 	0x0, /* 0 */
  16132 	0,
  16133 #endif
  16134 },
  16135 {
  16136 	BCMI_TSCBH_XGXS_TX_PI_CTL3r,
  16137 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16138 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16139 	BCMI_TSCBH_XGXS_TX_PI_CTL3r_fields,
  16140 #else
  16141 	0,
  16142 #endif
  16143 #endif
  16144 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16145 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16146 	"TX_PI_CTL3r",
  16147 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16148 	"TX_PI_8X_PLL2X_V1P0_TX_PI_CONTROL_3",
  16149 	NULL,
  16150 #endif
  16151 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16152 	0x100, /* 256 */
  16153 	0,
  16154 #endif
  16155 },
  16156 {
  16157 	BCMI_TSCBH_XGXS_TX_PI_CTL4r,
  16158 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16159 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16160 	BCMI_TSCBH_XGXS_TX_PI_CTL4r_fields,
  16161 #else
  16162 	0,
  16163 #endif
  16164 #endif
  16165 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16166 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16167 	"TX_PI_CTL4r",
  16168 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16169 	"TX_PI_8X_PLL2X_V1P0_TX_PI_CONTROL_4",
  16170 	NULL,
  16171 #endif
  16172 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16173 	0x704, /* 1796 */
  16174 	0,
  16175 #endif
  16176 },
  16177 {
  16178 	BCMI_TSCBH_XGXS_TX_PI_CTL5r,
  16179 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16180 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16181 	BCMI_TSCBH_XGXS_TX_PI_CTL5r_fields,
  16182 #else
  16183 	0,
  16184 #endif
  16185 #endif
  16186 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16187 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16188 	"TX_PI_CTL5r",
  16189 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16190 	"TX_PI_8X_PLL2X_V1P0_TX_PI_CONTROL_5",
  16191 	NULL,
  16192 #endif
  16193 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16194 	0x84, /* 132 */
  16195 	0,
  16196 #endif
  16197 },
  16198 {
  16199 	BCMI_TSCBH_XGXS_TX_PI_STS0r,
  16200 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16201 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16202 	BCMI_TSCBH_XGXS_TX_PI_STS0r_fields,
  16203 #else
  16204 	0,
  16205 #endif
  16206 #endif
  16207 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16208 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16209 	"TX_PI_STS0r",
  16210 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16211 	"TX_PI_8X_PLL2X_V1P0_TX_PI_STATUS_0",
  16212 	NULL,
  16213 #endif
  16214 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16215 	0x0, /* 0 */
  16216 	0,
  16217 #endif
  16218 },
  16219 {
  16220 	BCMI_TSCBH_XGXS_TX_PI_STS1r,
  16221 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16222 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16223 	BCMI_TSCBH_XGXS_TX_PI_STS1r_fields,
  16224 #else
  16225 	0,
  16226 #endif
  16227 #endif
  16228 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16229 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16230 	"TX_PI_STS1r",
  16231 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16232 	"TX_PI_8X_PLL2X_V1P0_TX_PI_STATUS_1",
  16233 	NULL,
  16234 #endif
  16235 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16236 	0x0, /* 0 */
  16237 	0,
  16238 #endif
  16239 },
  16240 {
  16241 	BCMI_TSCBH_XGXS_TX_PI_STS2r,
  16242 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16243 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16244 	BCMI_TSCBH_XGXS_TX_PI_STS2r_fields,
  16245 #else
  16246 	0,
  16247 #endif
  16248 #endif
  16249 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16250 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16251 	"TX_PI_STS2r",
  16252 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16253 	"TX_PI_8X_PLL2X_V1P0_TX_PI_STATUS_2",
  16254 	NULL,
  16255 #endif
  16256 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16257 	0x0, /* 0 */
  16258 	0,
  16259 #endif
  16260 },
  16261 {
  16262 	BCMI_TSCBH_XGXS_TX_PI_STS3r,
  16263 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16264 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16265 	BCMI_TSCBH_XGXS_TX_PI_STS3r_fields,
  16266 #else
  16267 	0,
  16268 #endif
  16269 #endif
  16270 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16271 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16272 	"TX_PI_STS3r",
  16273 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16274 	"TX_PI_8X_PLL2X_V1P0_TX_PI_STATUS_3",
  16275 	NULL,
  16276 #endif
  16277 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16278 	0x0, /* 0 */
  16279 	0,
  16280 #endif
  16281 },
  16282 {
  16283 	BCMI_TSCBH_XGXS_TX_PI_STS4r,
  16284 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16285 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16286 	BCMI_TSCBH_XGXS_TX_PI_STS4r_fields,
  16287 #else
  16288 	0,
  16289 #endif
  16290 #endif
  16291 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16292 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16293 	"TX_PI_STS4r",
  16294 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16295 	"TX_PI_8X_PLL2X_V1P0_TX_PI_STATUS_4",
  16296 	NULL,
  16297 #endif
  16298 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16299 	0x0, /* 0 */
  16300 	0,
  16301 #endif
  16302 },
  16303 {
  16304 	BCMI_TSCBH_XGXS_TX_PI_TX_FIFO_OVFB_STSr,
  16305 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16306 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16307 	BCMI_TSCBH_XGXS_TX_PI_TX_FIFO_OVFB_STSr_fields,
  16308 #else
  16309 	0,
  16310 #endif
  16311 #endif
  16312 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16313 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16314 	"TX_PI_TX_FIFO_OVFB_STSr",
  16315 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16316 	"TX_PI_8X_PLL2X_V1P0_TX_PI_TX_FIFO_OVFB_STATUS",
  16317 	NULL,
  16318 #endif
  16319 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16320 	0x0, /* 0 */
  16321 	0,
  16322 #endif
  16323 },
  16324 {
  16325 	BCMI_TSCBH_XGXS_TX_PI_STS5r,
  16326 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16327 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16328 	BCMI_TSCBH_XGXS_TX_PI_STS5r_fields,
  16329 #else
  16330 	0,
  16331 #endif
  16332 #endif
  16333 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16334 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16335 	"TX_PI_STS5r",
  16336 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16337 	"TX_PI_8X_PLL2X_V1P0_TX_PI_STATUS_5",
  16338 	NULL,
  16339 #endif
  16340 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16341 	0x0, /* 0 */
  16342 	0,
  16343 #endif
  16344 },
  16345 {
  16346 	BCMI_TSCBH_XGXS_RXTXCOM_OSR_MODE_CTLr,
  16347 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16348 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16349 	BCMI_TSCBH_XGXS_RXTXCOM_OSR_MODE_CTLr_fields,
  16350 #else
  16351 	0,
  16352 #endif
  16353 #endif
  16354 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16355 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16356 	"RXTXCOM_OSR_MODE_CTLr",
  16357 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16358 	"RXTXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXTXCOM_OSR_MODE_CONTROL",
  16359 	NULL,
  16360 #endif
  16361 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16362 	0x0, /* 0 */
  16363 	0,
  16364 #endif
  16365 },
  16366 {
  16367 	BCMI_TSCBH_XGXS_RXTXCOM_LN_CLK_RST_N_PWRDWN_CTLr,
  16368 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16369 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16370 	BCMI_TSCBH_XGXS_RXTXCOM_LN_CLK_RST_N_PWRDWN_CTLr_fields,
  16371 #else
  16372 	0,
  16373 #endif
  16374 #endif
  16375 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16376 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16377 	"RXTXCOM_LN_CLK_RST_N_PWRDWN_CTLr",
  16378 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16379 	"RXTXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXTXCOM_LANE_CLK_RESET_N_POWERDOWN_CONTROL",
  16380 	NULL,
  16381 #endif
  16382 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16383 	0x0, /* 0 */
  16384 	0,
  16385 #endif
  16386 },
  16387 {
  16388 	BCMI_TSCBH_XGXS_RXTXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr,
  16389 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16390 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16391 	BCMI_TSCBH_XGXS_RXTXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields,
  16392 #else
  16393 	0,
  16394 #endif
  16395 #endif
  16396 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16397 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16398 	"RXTXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr",
  16399 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16400 	"RXTXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXTXCOM_LANE_RESET_N_PWRDN_PIN_KILL_CONTROL",
  16401 	NULL,
  16402 #endif
  16403 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16404 	0x0, /* 0 */
  16405 	0,
  16406 #endif
  16407 },
  16408 {
  16409 	BCMI_TSCBH_XGXS_RXTXCOM_UC_ACK_LN_CTLr,
  16410 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16411 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16412 	BCMI_TSCBH_XGXS_RXTXCOM_UC_ACK_LN_CTLr_fields,
  16413 #else
  16414 	0,
  16415 #endif
  16416 #endif
  16417 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16418 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16419 	"RXTXCOM_UC_ACK_LN_CTLr",
  16420 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16421 	"RXTXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXTXCOM_UC_ACK_LANE_CONTROL",
  16422 	NULL,
  16423 #endif
  16424 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16425 	0x0, /* 0 */
  16426 	0,
  16427 #endif
  16428 },
  16429 {
  16430 	BCMI_TSCBH_XGXS_RXTXCOM_LN_RST_OCC_CTLr,
  16431 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16432 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16433 	BCMI_TSCBH_XGXS_RXTXCOM_LN_RST_OCC_CTLr_fields,
  16434 #else
  16435 	0,
  16436 #endif
  16437 #endif
  16438 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16439 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16440 	"RXTXCOM_LN_RST_OCC_CTLr",
  16441 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16442 	"RXTXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXTXCOM_LANE_REG_RESET_OCCURRED_CONTROL",
  16443 	NULL,
  16444 #endif
  16445 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16446 	0x1, /* 1 */
  16447 	0,
  16448 #endif
  16449 },
  16450 {
  16451 	BCMI_TSCBH_XGXS_RXTXCOM_PLL_SEL_CTLr,
  16452 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16453 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16454 	BCMI_TSCBH_XGXS_RXTXCOM_PLL_SEL_CTLr_fields,
  16455 #else
  16456 	0,
  16457 #endif
  16458 #endif
  16459 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16460 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16461 	"RXTXCOM_PLL_SEL_CTLr",
  16462 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16463 	"RXTXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXTXCOM_PLL_SELECT_CONTROL",
  16464 	NULL,
  16465 #endif
  16466 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16467 	0x0, /* 0 */
  16468 	0,
  16469 #endif
  16470 },
  16471 {
  16472 	BCMI_TSCBH_XGXS_RXTXCOM_LN_DP_RST_ST_STSr,
  16473 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16474 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16475 	BCMI_TSCBH_XGXS_RXTXCOM_LN_DP_RST_ST_STSr_fields,
  16476 #else
  16477 	0,
  16478 #endif
  16479 #endif
  16480 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16481 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16482 	"RXTXCOM_LN_DP_RST_ST_STSr",
  16483 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16484 	"RXTXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXTXCOM_LANE_DP_RESET_STATE_STATUS",
  16485 	NULL,
  16486 #endif
  16487 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16488 	0x7, /* 7 */
  16489 	0,
  16490 #endif
  16491 },
  16492 {
  16493 	BCMI_TSCBH_XGXS_RXTXCOM_MCST_MASK_CTLr,
  16494 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16495 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16496 	BCMI_TSCBH_XGXS_RXTXCOM_MCST_MASK_CTLr_fields,
  16497 #else
  16498 	0,
  16499 #endif
  16500 #endif
  16501 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16502 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16503 	"RXTXCOM_MCST_MASK_CTLr",
  16504 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16505 	"RXTXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXTXCOM_MULTICAST_MASK_CONTROL",
  16506 	NULL,
  16507 #endif
  16508 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16509 	0x0, /* 0 */
  16510 	0,
  16511 #endif
  16512 },
  16513 {
  16514 	BCMI_TSCBH_XGXS_RXTXCOM_OSR_MODE_STS_MC_MASKr,
  16515 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16516 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16517 	BCMI_TSCBH_XGXS_RXTXCOM_OSR_MODE_STS_MC_MASKr_fields,
  16518 #else
  16519 	0,
  16520 #endif
  16521 #endif
  16522 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16523 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16524 	"RXTXCOM_OSR_MODE_STS_MC_MASKr",
  16525 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16526 	"RXTXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXTXCOM_OSR_MODE_STATUS_MC_MASK",
  16527 	NULL,
  16528 #endif
  16529 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16530 	0x0, /* 0 */
  16531 	0,
  16532 #endif
  16533 },
  16534 {
  16535 	BCMI_TSCBH_XGXS_RXTXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr,
  16536 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16537 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16538 	BCMI_TSCBH_XGXS_RXTXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr_fields,
  16539 #else
  16540 	0,
  16541 #endif
  16542 #endif
  16543 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16544 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16545 	"RXTXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr",
  16546 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16547 	"RXTXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXTXCOM_AFE_RESET_PWRDN_OSR_MODE_PIN_STATUS",
  16548 	NULL,
  16549 #endif
  16550 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16551 	0x0, /* 0 */
  16552 	0,
  16553 #endif
  16554 },
  16555 {
  16556 	BCMI_TSCBH_XGXS_RXTXCOM_LN_S_RSTB_CTLr,
  16557 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16558 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16559 	BCMI_TSCBH_XGXS_RXTXCOM_LN_S_RSTB_CTLr_fields,
  16560 #else
  16561 	0,
  16562 #endif
  16563 #endif
  16564 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16565 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16566 	"RXTXCOM_LN_S_RSTB_CTLr",
  16567 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16568 	"RXTXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXTXCOM_LN_S_RSTB_CONTROL",
  16569 	NULL,
  16570 #endif
  16571 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16572 	0x1, /* 1 */
  16573 	0,
  16574 #endif
  16575 },
  16576 {
  16577 	BCMI_TSCBH_XGXS_AMS_RX_RX_CTL0r,
  16578 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16579 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16580 	BCMI_TSCBH_XGXS_AMS_RX_RX_CTL0r_fields,
  16581 #else
  16582 	0,
  16583 #endif
  16584 #endif
  16585 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16586 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16587 	"AMS_RX_RX_CTL0r",
  16588 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16589 	"AMS_RX_RX_CONTROL_0",
  16590 	NULL,
  16591 #endif
  16592 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16593 	0x10, /* 16 */
  16594 	0,
  16595 #endif
  16596 },
  16597 {
  16598 	BCMI_TSCBH_XGXS_AMS_RX_RX_CTL1r,
  16599 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16600 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16601 	BCMI_TSCBH_XGXS_AMS_RX_RX_CTL1r_fields,
  16602 #else
  16603 	0,
  16604 #endif
  16605 #endif
  16606 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16607 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16608 	"AMS_RX_RX_CTL1r",
  16609 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16610 	"AMS_RX_RX_CONTROL_1",
  16611 	NULL,
  16612 #endif
  16613 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16614 	0x0, /* 0 */
  16615 	0,
  16616 #endif
  16617 },
  16618 {
  16619 	BCMI_TSCBH_XGXS_AMS_RX_RX_CTL2r,
  16620 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16621 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16622 	BCMI_TSCBH_XGXS_AMS_RX_RX_CTL2r_fields,
  16623 #else
  16624 	0,
  16625 #endif
  16626 #endif
  16627 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16628 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16629 	"AMS_RX_RX_CTL2r",
  16630 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16631 	"AMS_RX_RX_CONTROL_2",
  16632 	NULL,
  16633 #endif
  16634 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16635 	0xe00, /* 3584 */
  16636 	0,
  16637 #endif
  16638 },
  16639 {
  16640 	BCMI_TSCBH_XGXS_AMS_RX_RX_CTL3r,
  16641 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16642 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16643 	BCMI_TSCBH_XGXS_AMS_RX_RX_CTL3r_fields,
  16644 #else
  16645 	0,
  16646 #endif
  16647 #endif
  16648 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16649 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16650 	"AMS_RX_RX_CTL3r",
  16651 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16652 	"AMS_RX_RX_CONTROL_3",
  16653 	NULL,
  16654 #endif
  16655 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16656 	0x0, /* 0 */
  16657 	0,
  16658 #endif
  16659 },
  16660 {
  16661 	BCMI_TSCBH_XGXS_AMS_RX_RX_CTL4r,
  16662 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16663 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16664 	BCMI_TSCBH_XGXS_AMS_RX_RX_CTL4r_fields,
  16665 #else
  16666 	0,
  16667 #endif
  16668 #endif
  16669 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16670 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16671 	"AMS_RX_RX_CTL4r",
  16672 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16673 	"AMS_RX_RX_CONTROL_4",
  16674 	NULL,
  16675 #endif
  16676 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16677 	0x0, /* 0 */
  16678 	0,
  16679 #endif
  16680 },
  16681 {
  16682 	BCMI_TSCBH_XGXS_AMS_RX_RX_CTL5r,
  16683 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16684 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16685 	BCMI_TSCBH_XGXS_AMS_RX_RX_CTL5r_fields,
  16686 #else
  16687 	0,
  16688 #endif
  16689 #endif
  16690 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16691 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16692 	"AMS_RX_RX_CTL5r",
  16693 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16694 	"AMS_RX_RX_CONTROL_5",
  16695 	NULL,
  16696 #endif
  16697 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16698 	0x0, /* 0 */
  16699 	0,
  16700 #endif
  16701 },
  16702 {
  16703 	BCMI_TSCBH_XGXS_AMS_RX_RX_CTL6r,
  16704 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16705 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16706 	BCMI_TSCBH_XGXS_AMS_RX_RX_CTL6r_fields,
  16707 #else
  16708 	0,
  16709 #endif
  16710 #endif
  16711 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16712 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16713 	"AMS_RX_RX_CTL6r",
  16714 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16715 	"AMS_RX_RX_CONTROL_6",
  16716 	NULL,
  16717 #endif
  16718 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16719 	0x0, /* 0 */
  16720 	0,
  16721 #endif
  16722 },
  16723 {
  16724 	BCMI_TSCBH_XGXS_AMS_RX_RX_CTL7r,
  16725 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16726 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16727 	BCMI_TSCBH_XGXS_AMS_RX_RX_CTL7r_fields,
  16728 #else
  16729 	0,
  16730 #endif
  16731 #endif
  16732 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16733 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16734 	"AMS_RX_RX_CTL7r",
  16735 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16736 	"AMS_RX_RX_CONTROL_7",
  16737 	NULL,
  16738 #endif
  16739 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16740 	0x0, /* 0 */
  16741 	0,
  16742 #endif
  16743 },
  16744 {
  16745 	BCMI_TSCBH_XGXS_AMS_RX_RX_CTL8r,
  16746 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16747 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16748 	BCMI_TSCBH_XGXS_AMS_RX_RX_CTL8r_fields,
  16749 #else
  16750 	0,
  16751 #endif
  16752 #endif
  16753 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16754 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16755 	"AMS_RX_RX_CTL8r",
  16756 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16757 	"AMS_RX_RX_CONTROL_8",
  16758 	NULL,
  16759 #endif
  16760 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16761 	0x0, /* 0 */
  16762 	0,
  16763 #endif
  16764 },
  16765 {
  16766 	BCMI_TSCBH_XGXS_AMS_RX_RX_CTL9r,
  16767 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16768 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16769 	BCMI_TSCBH_XGXS_AMS_RX_RX_CTL9r_fields,
  16770 #else
  16771 	0,
  16772 #endif
  16773 #endif
  16774 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16775 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16776 	"AMS_RX_RX_CTL9r",
  16777 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16778 	"AMS_RX_RX_CONTROL_9",
  16779 	NULL,
  16780 #endif
  16781 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16782 	0x300, /* 768 */
  16783 	0,
  16784 #endif
  16785 },
  16786 {
  16787 	BCMI_TSCBH_XGXS_AMS_RX_RX_CTL_10r,
  16788 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16789 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16790 	BCMI_TSCBH_XGXS_AMS_RX_RX_CTL_10r_fields,
  16791 #else
  16792 	0,
  16793 #endif
  16794 #endif
  16795 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16796 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16797 	"AMS_RX_RX_CTL_10r",
  16798 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16799 	"AMS_RX_RX_CONTROL_10",
  16800 	NULL,
  16801 #endif
  16802 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16803 	0x0, /* 0 */
  16804 	0,
  16805 #endif
  16806 },
  16807 {
  16808 	BCMI_TSCBH_XGXS_AMS_RX_RX_STSr,
  16809 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16810 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16811 	BCMI_TSCBH_XGXS_AMS_RX_RX_STSr_fields,
  16812 #else
  16813 	0,
  16814 #endif
  16815 #endif
  16816 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16817 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16818 	"AMS_RX_RX_STSr",
  16819 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16820 	"AMS_RX_RX_STATUS",
  16821 	NULL,
  16822 #endif
  16823 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16824 	0x8000, /* 32768 */
  16825 	0,
  16826 #endif
  16827 },
  16828 {
  16829 	BCMI_TSCBH_XGXS_AMS_TX_TX_CTL0r,
  16830 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16831 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16832 	BCMI_TSCBH_XGXS_AMS_TX_TX_CTL0r_fields,
  16833 #else
  16834 	0,
  16835 #endif
  16836 #endif
  16837 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16838 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16839 	"AMS_TX_TX_CTL0r",
  16840 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16841 	"AMS_TX_TX_CONTROL_0",
  16842 	NULL,
  16843 #endif
  16844 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16845 	0x40, /* 64 */
  16846 	0,
  16847 #endif
  16848 },
  16849 {
  16850 	BCMI_TSCBH_XGXS_AMS_TX_TX_CTL1r,
  16851 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16852 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16853 	BCMI_TSCBH_XGXS_AMS_TX_TX_CTL1r_fields,
  16854 #else
  16855 	0,
  16856 #endif
  16857 #endif
  16858 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16859 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16860 	"AMS_TX_TX_CTL1r",
  16861 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16862 	"AMS_TX_TX_CONTROL_1",
  16863 	NULL,
  16864 #endif
  16865 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16866 	0x0, /* 0 */
  16867 	0,
  16868 #endif
  16869 },
  16870 {
  16871 	BCMI_TSCBH_XGXS_AMS_TX_TX_CTL2r,
  16872 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16873 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16874 	BCMI_TSCBH_XGXS_AMS_TX_TX_CTL2r_fields,
  16875 #else
  16876 	0,
  16877 #endif
  16878 #endif
  16879 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16880 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16881 	"AMS_TX_TX_CTL2r",
  16882 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16883 	"AMS_TX_TX_CONTROL_2",
  16884 	NULL,
  16885 #endif
  16886 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16887 	0x0, /* 0 */
  16888 	0,
  16889 #endif
  16890 },
  16891 {
  16892 	BCMI_TSCBH_XGXS_AMS_TX_TX_CTL3r,
  16893 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16894 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16895 	BCMI_TSCBH_XGXS_AMS_TX_TX_CTL3r_fields,
  16896 #else
  16897 	0,
  16898 #endif
  16899 #endif
  16900 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16901 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16902 	"AMS_TX_TX_CTL3r",
  16903 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16904 	"AMS_TX_TX_CONTROL_3",
  16905 	NULL,
  16906 #endif
  16907 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16908 	0x0, /* 0 */
  16909 	0,
  16910 #endif
  16911 },
  16912 {
  16913 	BCMI_TSCBH_XGXS_AMS_TX_TX_STSr,
  16914 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16915 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16916 	BCMI_TSCBH_XGXS_AMS_TX_TX_STSr_fields,
  16917 #else
  16918 	0,
  16919 #endif
  16920 #endif
  16921 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16922 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16923 	"AMS_TX_TX_STSr",
  16924 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16925 	"AMS_TX_TX_STATUS",
  16926 	NULL,
  16927 #endif
  16928 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16929 	0xa0, /* 160 */
  16930 	0,
  16931 #endif
  16932 },
  16933 {
  16934 	BCMI_TSCBH_XGXS_SIGDET_CTL0r,
  16935 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16936 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16937 	BCMI_TSCBH_XGXS_SIGDET_CTL0r_fields,
  16938 #else
  16939 	0,
  16940 #endif
  16941 #endif
  16942 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16943 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16944 	"SIGDET_CTL0r",
  16945 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16946 	"SIGDET_SIGDET_CTRL_0",
  16947 	NULL,
  16948 #endif
  16949 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16950 	0x1109, /* 4361 */
  16951 	0,
  16952 #endif
  16953 },
  16954 {
  16955 	BCMI_TSCBH_XGXS_SIGDET_CTL1r,
  16956 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16957 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16958 	BCMI_TSCBH_XGXS_SIGDET_CTL1r_fields,
  16959 #else
  16960 	0,
  16961 #endif
  16962 #endif
  16963 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16964 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16965 	"SIGDET_CTL1r",
  16966 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16967 	"SIGDET_SIGDET_CTRL_1",
  16968 	NULL,
  16969 #endif
  16970 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16971 	0xa008, /* 40968 */
  16972 	0,
  16973 #endif
  16974 },
  16975 {
  16976 	BCMI_TSCBH_XGXS_SIGDET_CTL2r,
  16977 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16978 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  16979 	BCMI_TSCBH_XGXS_SIGDET_CTL2r_fields,
  16980 #else
  16981 	0,
  16982 #endif
  16983 #endif
  16984 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  16985 	PHYMOD_SYMBOL_FLAG_REGISTER,
  16986 	"SIGDET_CTL2r",
  16987 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  16988 	"SIGDET_SIGDET_CTRL_2",
  16989 	NULL,
  16990 #endif
  16991 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  16992 	0x3f22, /* 16162 */
  16993 	0,
  16994 #endif
  16995 },
  16996 {
  16997 	BCMI_TSCBH_XGXS_SIGDET_STS0r,
  16998 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  16999 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17000 	BCMI_TSCBH_XGXS_SIGDET_STS0r_fields,
  17001 #else
  17002 	0,
  17003 #endif
  17004 #endif
  17005 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17006 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17007 	"SIGDET_STS0r",
  17008 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17009 	"SIGDET_SIGDET_STATUS_0",
  17010 	NULL,
  17011 #endif
  17012 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17013 	0x0, /* 0 */
  17014 	0,
  17015 #endif
  17016 },
  17017 {
  17018 	BCMI_TSCBH_XGXS_SIGDET_STS1r,
  17019 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17020 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17021 	BCMI_TSCBH_XGXS_SIGDET_STS1r_fields,
  17022 #else
  17023 	0,
  17024 #endif
  17025 #endif
  17026 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17027 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17028 	"SIGDET_STS1r",
  17029 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17030 	"SIGDET_SIGDET_STATUS_1",
  17031 	NULL,
  17032 #endif
  17033 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17034 	0x0, /* 0 */
  17035 	0,
  17036 #endif
  17037 },
  17038 {
  17039 	BCMI_TSCBH_XGXS_SIGDET_STS2r,
  17040 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17041 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17042 	BCMI_TSCBH_XGXS_SIGDET_STS2r_fields,
  17043 #else
  17044 	0,
  17045 #endif
  17046 #endif
  17047 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17048 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17049 	"SIGDET_STS2r",
  17050 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17051 	"SIGDET_SIGDET_STATUS_2",
  17052 	NULL,
  17053 #endif
  17054 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17055 	0x0, /* 0 */
  17056 	0,
  17057 #endif
  17058 },
  17059 {
  17060 	BCMI_TSCBH_XGXS_SIGDET_STS3r,
  17061 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17062 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17063 	BCMI_TSCBH_XGXS_SIGDET_STS3r_fields,
  17064 #else
  17065 	0,
  17066 #endif
  17067 #endif
  17068 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17069 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17070 	"SIGDET_STS3r",
  17071 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17072 	"SIGDET_SIGDET_STATUS_3",
  17073 	NULL,
  17074 #endif
  17075 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17076 	0x0, /* 0 */
  17077 	0,
  17078 #endif
  17079 },
  17080 {
  17081 	BCMI_TSCBH_XGXS_SIGDET_STS4r,
  17082 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17083 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17084 	BCMI_TSCBH_XGXS_SIGDET_STS4r_fields,
  17085 #else
  17086 	0,
  17087 #endif
  17088 #endif
  17089 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17090 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17091 	"SIGDET_STS4r",
  17092 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17093 	"SIGDET_SIGDET_STATUS_4",
  17094 	NULL,
  17095 #endif
  17096 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17097 	0x2, /* 2 */
  17098 	0,
  17099 #endif
  17100 },
  17101 {
  17102 	BCMI_TSCBH_XGXS_DSC_RX_HOFFS_JITGENr,
  17103 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17104 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17105 	BCMI_TSCBH_XGXS_DSC_RX_HOFFS_JITGENr_fields,
  17106 #else
  17107 	0,
  17108 #endif
  17109 #endif
  17110 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17111 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17112 	"DSC_RX_HOFFS_JITGENr",
  17113 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17114 	"DSC_F_RX_HOFFS_JITGEN_REG",
  17115 	NULL,
  17116 #endif
  17117 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17118 	0x0, /* 0 */
  17119 	0,
  17120 #endif
  17121 },
  17122 {
  17123 	BCMI_TSCBH_XGXS_DSC_LMS_THR_RANDOM1r,
  17124 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17125 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17126 	BCMI_TSCBH_XGXS_DSC_LMS_THR_RANDOM1r_fields,
  17127 #else
  17128 	0,
  17129 #endif
  17130 #endif
  17131 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17132 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17133 	"DSC_LMS_THR_RANDOM1r",
  17134 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17135 	"DSC_F_LMS_THRESH_RANDOM1_REG",
  17136 	NULL,
  17137 #endif
  17138 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17139 	0x0, /* 0 */
  17140 	0,
  17141 #endif
  17142 },
  17143 {
  17144 	BCMI_TSCBH_XGXS_DSC_LMS_THR_RANDOM2r,
  17145 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17146 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17147 	BCMI_TSCBH_XGXS_DSC_LMS_THR_RANDOM2r_fields,
  17148 #else
  17149 	0,
  17150 #endif
  17151 #endif
  17152 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17153 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17154 	"DSC_LMS_THR_RANDOM2r",
  17155 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17156 	"DSC_F_LMS_THRESH_RANDOM2_REG",
  17157 	NULL,
  17158 #endif
  17159 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17160 	0x0, /* 0 */
  17161 	0,
  17162 #endif
  17163 },
  17164 {
  17165 	BCMI_TSCBH_XGXS_DSC_LMS_THR_RANDOM3r,
  17166 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17167 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17168 	BCMI_TSCBH_XGXS_DSC_LMS_THR_RANDOM3r_fields,
  17169 #else
  17170 	0,
  17171 #endif
  17172 #endif
  17173 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17174 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17175 	"DSC_LMS_THR_RANDOM3r",
  17176 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17177 	"DSC_F_LMS_THRESH_RANDOM3_REG",
  17178 	NULL,
  17179 #endif
  17180 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17181 	0x0, /* 0 */
  17182 	0,
  17183 #endif
  17184 },
  17185 {
  17186 	BCMI_TSCBH_XGXS_DSC_LMS_THR_RANDOM4r,
  17187 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17188 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17189 	BCMI_TSCBH_XGXS_DSC_LMS_THR_RANDOM4r_fields,
  17190 #else
  17191 	0,
  17192 #endif
  17193 #endif
  17194 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17195 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17196 	"DSC_LMS_THR_RANDOM4r",
  17197 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17198 	"DSC_F_LMS_THRESH_RANDOM4_REG",
  17199 	NULL,
  17200 #endif
  17201 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17202 	0x0, /* 0 */
  17203 	0,
  17204 #endif
  17205 },
  17206 {
  17207 	BCMI_TSCBH_XGXS_DSC_LMS_THR_RANDOM5r,
  17208 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17209 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17210 	BCMI_TSCBH_XGXS_DSC_LMS_THR_RANDOM5r_fields,
  17211 #else
  17212 	0,
  17213 #endif
  17214 #endif
  17215 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17216 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17217 	"DSC_LMS_THR_RANDOM5r",
  17218 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17219 	"DSC_F_LMS_THRESH_RANDOM5_REG",
  17220 	NULL,
  17221 #endif
  17222 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17223 	0x0, /* 0 */
  17224 	0,
  17225 #endif
  17226 },
  17227 {
  17228 	BCMI_TSCBH_XGXS_DSC_LMS_THR_RANDOM6r,
  17229 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17230 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17231 	BCMI_TSCBH_XGXS_DSC_LMS_THR_RANDOM6r_fields,
  17232 #else
  17233 	0,
  17234 #endif
  17235 #endif
  17236 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17237 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17238 	"DSC_LMS_THR_RANDOM6r",
  17239 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17240 	"DSC_F_LMS_THRESH_RANDOM6_REG",
  17241 	NULL,
  17242 #endif
  17243 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17244 	0x0, /* 0 */
  17245 	0,
  17246 #endif
  17247 },
  17248 {
  17249 	BCMI_TSCBH_XGXS_DSC_LMS_THR_OFFSr,
  17250 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17251 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17252 	BCMI_TSCBH_XGXS_DSC_LMS_THR_OFFSr_fields,
  17253 #else
  17254 	0,
  17255 #endif
  17256 #endif
  17257 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17258 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17259 	"DSC_LMS_THR_OFFSr",
  17260 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17261 	"DSC_F_LMS_THRESHOLD_OFFS_REG",
  17262 	NULL,
  17263 #endif
  17264 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17265 	0x0, /* 0 */
  17266 	0,
  17267 #endif
  17268 },
  17269 {
  17270 	BCMI_TSCBH_XGXS_DSC_LMS_THR_STSr,
  17271 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17272 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17273 	BCMI_TSCBH_XGXS_DSC_LMS_THR_STSr_fields,
  17274 #else
  17275 	0,
  17276 #endif
  17277 #endif
  17278 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17279 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17280 	"DSC_LMS_THR_STSr",
  17281 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17282 	"DSC_F_LMS_THRESH_STS_REG",
  17283 	NULL,
  17284 #endif
  17285 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17286 	0x0, /* 0 */
  17287 	0,
  17288 #endif
  17289 },
  17290 {
  17291 	BCMI_TSCBH_XGXS_DSC_LMS_THR_STS2r,
  17292 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17293 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17294 	BCMI_TSCBH_XGXS_DSC_LMS_THR_STS2r_fields,
  17295 #else
  17296 	0,
  17297 #endif
  17298 #endif
  17299 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17300 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17301 	"DSC_LMS_THR_STS2r",
  17302 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17303 	"DSC_F_LMS_THRESH_STS2_REG",
  17304 	NULL,
  17305 #endif
  17306 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17307 	0x0, /* 0 */
  17308 	0,
  17309 #endif
  17310 },
  17311 {
  17312 	BCMI_TSCBH_XGXS_DSC_TRNSUM_INL_MEASr,
  17313 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17314 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17315 	BCMI_TSCBH_XGXS_DSC_TRNSUM_INL_MEASr_fields,
  17316 #else
  17317 	0,
  17318 #endif
  17319 #endif
  17320 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17321 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17322 	"DSC_TRNSUM_INL_MEASr",
  17323 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17324 	"DSC_F_TRNSUM_INL_MEAS_REG",
  17325 	NULL,
  17326 #endif
  17327 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17328 	0x0, /* 0 */
  17329 	0,
  17330 #endif
  17331 },
  17332 {
  17333 	BCMI_TSCBH_XGXS_DIG_REVID0r,
  17334 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17335 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17336 	BCMI_TSCBH_XGXS_DIG_REVID0r_fields,
  17337 #else
  17338 	0,
  17339 #endif
  17340 #endif
  17341 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17342 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17343 	"DIG_REVID0r",
  17344 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17345 	"DIG_COM_REVID0",
  17346 	NULL,
  17347 #endif
  17348 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17349 	0x366, /* 870 */
  17350 	0,
  17351 #endif
  17352 },
  17353 {
  17354 	BCMI_TSCBH_XGXS_DIG_RST_CTL_PMDr,
  17355 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17356 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17357 	BCMI_TSCBH_XGXS_DIG_RST_CTL_PMDr_fields,
  17358 #else
  17359 	0,
  17360 #endif
  17361 #endif
  17362 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17363 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17364 	"DIG_RST_CTL_PMDr",
  17365 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17366 	"DIG_COM_RESET_CONTROL_PMD",
  17367 	NULL,
  17368 #endif
  17369 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17370 	0x1, /* 1 */
  17371 	0,
  17372 #endif
  17373 },
  17374 {
  17375 	BCMI_TSCBH_XGXS_DIG_RST_CTL_CORE_DPr,
  17376 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17377 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17378 	BCMI_TSCBH_XGXS_DIG_RST_CTL_CORE_DPr_fields,
  17379 #else
  17380 	0,
  17381 #endif
  17382 #endif
  17383 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17384 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17385 	"DIG_RST_CTL_CORE_DPr",
  17386 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17387 	"DIG_COM_RESET_CONTROL_CORE_DP",
  17388 	NULL,
  17389 #endif
  17390 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17391 	0x0, /* 0 */
  17392 	0,
  17393 #endif
  17394 },
  17395 {
  17396 	BCMI_TSCBH_XGXS_DIG_MASKDATAr,
  17397 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17398 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17399 	BCMI_TSCBH_XGXS_DIG_MASKDATAr_fields,
  17400 #else
  17401 	0,
  17402 #endif
  17403 #endif
  17404 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17405 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17406 	"DIG_MASKDATAr",
  17407 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17408 	"DIG_COM_MASKDATA_REG",
  17409 	NULL,
  17410 #endif
  17411 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17412 	0x0, /* 0 */
  17413 	0,
  17414 #endif
  17415 },
  17416 {
  17417 	BCMI_TSCBH_XGXS_DIG_TOP_USER_CTL0r,
  17418 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17419 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17420 	BCMI_TSCBH_XGXS_DIG_TOP_USER_CTL0r_fields,
  17421 #else
  17422 	0,
  17423 #endif
  17424 #endif
  17425 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17426 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17427 	"DIG_TOP_USER_CTL0r",
  17428 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17429 	"DIG_COM_TOP_USER_CONTROL_0",
  17430 	NULL,
  17431 #endif
  17432 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17433 	0x271, /* 625 */
  17434 	0,
  17435 #endif
  17436 },
  17437 {
  17438 	BCMI_TSCBH_XGXS_DIG_CORE_RST_OCC_CTLr,
  17439 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17440 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17441 	BCMI_TSCBH_XGXS_DIG_CORE_RST_OCC_CTLr_fields,
  17442 #else
  17443 	0,
  17444 #endif
  17445 #endif
  17446 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17447 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17448 	"DIG_CORE_RST_OCC_CTLr",
  17449 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17450 	"DIG_COM_CORE_REG_RESET_OCCURRED_CONTROL",
  17451 	NULL,
  17452 #endif
  17453 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17454 	0x1, /* 1 */
  17455 	0,
  17456 #endif
  17457 },
  17458 {
  17459 	BCMI_TSCBH_XGXS_DIG_RST_SEQ_TMR_CTLr,
  17460 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17461 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17462 	BCMI_TSCBH_XGXS_DIG_RST_SEQ_TMR_CTLr_fields,
  17463 #else
  17464 	0,
  17465 #endif
  17466 #endif
  17467 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17468 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17469 	"DIG_RST_SEQ_TMR_CTLr",
  17470 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17471 	"DIG_COM_RST_SEQ_TIMER_CONTROL",
  17472 	NULL,
  17473 #endif
  17474 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17475 	0x8304, /* 33540 */
  17476 	0,
  17477 #endif
  17478 },
  17479 {
  17480 	BCMI_TSCBH_XGXS_DIG_CORE_DP_RST_ST_STSr,
  17481 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17482 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17483 	BCMI_TSCBH_XGXS_DIG_CORE_DP_RST_ST_STSr_fields,
  17484 #else
  17485 	0,
  17486 #endif
  17487 #endif
  17488 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17489 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17490 	"DIG_CORE_DP_RST_ST_STSr",
  17491 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17492 	"DIG_COM_CORE_DP_RESET_STATE_STATUS",
  17493 	NULL,
  17494 #endif
  17495 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17496 	0x0, /* 0 */
  17497 	0,
  17498 #endif
  17499 },
  17500 {
  17501 	BCMI_TSCBH_XGXS_DIG_REVID1r,
  17502 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17503 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17504 	BCMI_TSCBH_XGXS_DIG_REVID1r_fields,
  17505 #else
  17506 	0,
  17507 #endif
  17508 #endif
  17509 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17510 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17511 	"DIG_REVID1r",
  17512 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17513 	"DIG_COM_REVID1",
  17514 	NULL,
  17515 #endif
  17516 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17517 	0x803c, /* 32828 */
  17518 	0,
  17519 #endif
  17520 },
  17521 {
  17522 	BCMI_TSCBH_XGXS_DIG_REVID2r,
  17523 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17524 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17525 	BCMI_TSCBH_XGXS_DIG_REVID2r_fields,
  17526 #else
  17527 	0,
  17528 #endif
  17529 #endif
  17530 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17531 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17532 	"DIG_REVID2r",
  17533 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17534 	"DIG_COM_REVID2",
  17535 	NULL,
  17536 #endif
  17537 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17538 	0x0, /* 0 */
  17539 	0,
  17540 #endif
  17541 },
  17542 {
  17543 	BCMI_TSCBH_XGXS_AMS_PLL_PLL_CTL0r,
  17544 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17545 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17546 	BCMI_TSCBH_XGXS_AMS_PLL_PLL_CTL0r_fields,
  17547 #else
  17548 	0,
  17549 #endif
  17550 #endif
  17551 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17552 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17553 	"AMS_PLL_PLL_CTL0r",
  17554 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17555 	"AMS_PLL_COM_PLL_CONTROL_0",
  17556 	NULL,
  17557 #endif
  17558 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17559 	0x200, /* 512 */
  17560 	0,
  17561 #endif
  17562 },
  17563 {
  17564 	BCMI_TSCBH_XGXS_AMS_PLL_PLL_CTL1r,
  17565 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17566 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17567 	BCMI_TSCBH_XGXS_AMS_PLL_PLL_CTL1r_fields,
  17568 #else
  17569 	0,
  17570 #endif
  17571 #endif
  17572 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17573 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17574 	"AMS_PLL_PLL_CTL1r",
  17575 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17576 	"AMS_PLL_COM_PLL_CONTROL_1",
  17577 	NULL,
  17578 #endif
  17579 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17580 	0x8001, /* 32769 */
  17581 	0,
  17582 #endif
  17583 },
  17584 {
  17585 	BCMI_TSCBH_XGXS_AMS_PLL_PLL_CTL2r,
  17586 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17587 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17588 	BCMI_TSCBH_XGXS_AMS_PLL_PLL_CTL2r_fields,
  17589 #else
  17590 	0,
  17591 #endif
  17592 #endif
  17593 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17594 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17595 	"AMS_PLL_PLL_CTL2r",
  17596 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17597 	"AMS_PLL_COM_PLL_CONTROL_2",
  17598 	NULL,
  17599 #endif
  17600 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17601 	0xf, /* 15 */
  17602 	0,
  17603 #endif
  17604 },
  17605 {
  17606 	BCMI_TSCBH_XGXS_AMS_PLL_PLL_CTL3r,
  17607 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17608 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17609 	BCMI_TSCBH_XGXS_AMS_PLL_PLL_CTL3r_fields,
  17610 #else
  17611 	0,
  17612 #endif
  17613 #endif
  17614 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17615 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17616 	"AMS_PLL_PLL_CTL3r",
  17617 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17618 	"AMS_PLL_COM_PLL_CONTROL_3",
  17619 	NULL,
  17620 #endif
  17621 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17622 	0x0, /* 0 */
  17623 	0,
  17624 #endif
  17625 },
  17626 {
  17627 	BCMI_TSCBH_XGXS_AMS_PLL_PLL_CTL4r,
  17628 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17629 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17630 	BCMI_TSCBH_XGXS_AMS_PLL_PLL_CTL4r_fields,
  17631 #else
  17632 	0,
  17633 #endif
  17634 #endif
  17635 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17636 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17637 	"AMS_PLL_PLL_CTL4r",
  17638 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17639 	"AMS_PLL_COM_PLL_CONTROL_4",
  17640 	NULL,
  17641 #endif
  17642 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17643 	0x77, /* 119 */
  17644 	0,
  17645 #endif
  17646 },
  17647 {
  17648 	BCMI_TSCBH_XGXS_AMS_PLL_PLL_CTL5r,
  17649 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17650 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17651 	BCMI_TSCBH_XGXS_AMS_PLL_PLL_CTL5r_fields,
  17652 #else
  17653 	0,
  17654 #endif
  17655 #endif
  17656 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17657 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17658 	"AMS_PLL_PLL_CTL5r",
  17659 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17660 	"AMS_PLL_COM_PLL_CONTROL_5",
  17661 	NULL,
  17662 #endif
  17663 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17664 	0x2700, /* 9984 */
  17665 	0,
  17666 #endif
  17667 },
  17668 {
  17669 	BCMI_TSCBH_XGXS_AMS_PLL_PLL_CTL6r,
  17670 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17671 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17672 	BCMI_TSCBH_XGXS_AMS_PLL_PLL_CTL6r_fields,
  17673 #else
  17674 	0,
  17675 #endif
  17676 #endif
  17677 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17678 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17679 	"AMS_PLL_PLL_CTL6r",
  17680 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17681 	"AMS_PLL_COM_PLL_CONTROL_6",
  17682 	NULL,
  17683 #endif
  17684 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17685 	0x0, /* 0 */
  17686 	0,
  17687 #endif
  17688 },
  17689 {
  17690 	BCMI_TSCBH_XGXS_AMS_PLL_PLL_CTL7r,
  17691 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17692 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17693 	BCMI_TSCBH_XGXS_AMS_PLL_PLL_CTL7r_fields,
  17694 #else
  17695 	0,
  17696 #endif
  17697 #endif
  17698 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17699 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17700 	"AMS_PLL_PLL_CTL7r",
  17701 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17702 	"AMS_PLL_COM_PLL_CONTROL_7",
  17703 	NULL,
  17704 #endif
  17705 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17706 	0x2700, /* 9984 */
  17707 	0,
  17708 #endif
  17709 },
  17710 {
  17711 	BCMI_TSCBH_XGXS_AMS_PLL_PLL_CTL8r,
  17712 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17713 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17714 	BCMI_TSCBH_XGXS_AMS_PLL_PLL_CTL8r_fields,
  17715 #else
  17716 	0,
  17717 #endif
  17718 #endif
  17719 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17720 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17721 	"AMS_PLL_PLL_CTL8r",
  17722 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17723 	"AMS_PLL_COM_PLL_CONTROL_8",
  17724 	NULL,
  17725 #endif
  17726 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17727 	0x0, /* 0 */
  17728 	0,
  17729 #endif
  17730 },
  17731 {
  17732 	BCMI_TSCBH_XGXS_AMS_PLL_PLL_CTL9r,
  17733 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17734 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17735 	BCMI_TSCBH_XGXS_AMS_PLL_PLL_CTL9r_fields,
  17736 #else
  17737 	0,
  17738 #endif
  17739 #endif
  17740 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17741 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17742 	"AMS_PLL_PLL_CTL9r",
  17743 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17744 	"AMS_PLL_COM_PLL_CONTROL_9",
  17745 	NULL,
  17746 #endif
  17747 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17748 	0x0, /* 0 */
  17749 	0,
  17750 #endif
  17751 },
  17752 {
  17753 	BCMI_TSCBH_XGXS_AMS_PLL_PLL_CTL_10r,
  17754 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17755 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17756 	BCMI_TSCBH_XGXS_AMS_PLL_PLL_CTL_10r_fields,
  17757 #else
  17758 	0,
  17759 #endif
  17760 #endif
  17761 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17762 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17763 	"AMS_PLL_PLL_CTL_10r",
  17764 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17765 	"AMS_PLL_COM_PLL_CONTROL_10",
  17766 	NULL,
  17767 #endif
  17768 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17769 	0x0, /* 0 */
  17770 	0,
  17771 #endif
  17772 },
  17773 {
  17774 	BCMI_TSCBH_XGXS_AMS_PLL_PLL_INTCTLr,
  17775 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17776 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17777 	BCMI_TSCBH_XGXS_AMS_PLL_PLL_INTCTLr_fields,
  17778 #else
  17779 	0,
  17780 #endif
  17781 #endif
  17782 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17783 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17784 	"AMS_PLL_PLL_INTCTLr",
  17785 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17786 	"AMS_PLL_COM_PLL_INTCTRL",
  17787 	NULL,
  17788 #endif
  17789 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17790 	0x4, /* 4 */
  17791 	0,
  17792 #endif
  17793 },
  17794 {
  17795 	BCMI_TSCBH_XGXS_AMS_PLL_PLL_STSr,
  17796 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17797 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17798 	BCMI_TSCBH_XGXS_AMS_PLL_PLL_STSr_fields,
  17799 #else
  17800 	0,
  17801 #endif
  17802 #endif
  17803 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17804 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17805 	"AMS_PLL_PLL_STSr",
  17806 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17807 	"AMS_PLL_COM_PLL_STATUS",
  17808 	NULL,
  17809 #endif
  17810 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17811 	0x27, /* 39 */
  17812 	0,
  17813 #endif
  17814 },
  17815 {
  17816 	BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ0r,
  17817 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17818 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17819 	BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ0r_fields,
  17820 #else
  17821 	0,
  17822 #endif
  17823 #endif
  17824 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17825 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17826 	"PATGEN_PATGEN_SEQ0r",
  17827 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17828 	"PATT_GEN_COM_PATT_GEN_SEQ_0",
  17829 	NULL,
  17830 #endif
  17831 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17832 	0xff00, /* 65280 */
  17833 	0,
  17834 #endif
  17835 },
  17836 {
  17837 	BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ1r,
  17838 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17839 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17840 	BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ1r_fields,
  17841 #else
  17842 	0,
  17843 #endif
  17844 #endif
  17845 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17846 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17847 	"PATGEN_PATGEN_SEQ1r",
  17848 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17849 	"PATT_GEN_COM_PATT_GEN_SEQ_1",
  17850 	NULL,
  17851 #endif
  17852 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17853 	0xff00, /* 65280 */
  17854 	0,
  17855 #endif
  17856 },
  17857 {
  17858 	BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ2r,
  17859 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17860 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17861 	BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ2r_fields,
  17862 #else
  17863 	0,
  17864 #endif
  17865 #endif
  17866 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17867 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17868 	"PATGEN_PATGEN_SEQ2r",
  17869 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17870 	"PATT_GEN_COM_PATT_GEN_SEQ_2",
  17871 	NULL,
  17872 #endif
  17873 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17874 	0xff00, /* 65280 */
  17875 	0,
  17876 #endif
  17877 },
  17878 {
  17879 	BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ3r,
  17880 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17881 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17882 	BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ3r_fields,
  17883 #else
  17884 	0,
  17885 #endif
  17886 #endif
  17887 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17888 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17889 	"PATGEN_PATGEN_SEQ3r",
  17890 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17891 	"PATT_GEN_COM_PATT_GEN_SEQ_3",
  17892 	NULL,
  17893 #endif
  17894 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17895 	0xff00, /* 65280 */
  17896 	0,
  17897 #endif
  17898 },
  17899 {
  17900 	BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ4r,
  17901 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17902 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17903 	BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ4r_fields,
  17904 #else
  17905 	0,
  17906 #endif
  17907 #endif
  17908 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17909 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17910 	"PATGEN_PATGEN_SEQ4r",
  17911 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17912 	"PATT_GEN_COM_PATT_GEN_SEQ_4",
  17913 	NULL,
  17914 #endif
  17915 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17916 	0xff00, /* 65280 */
  17917 	0,
  17918 #endif
  17919 },
  17920 {
  17921 	BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ5r,
  17922 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17923 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17924 	BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ5r_fields,
  17925 #else
  17926 	0,
  17927 #endif
  17928 #endif
  17929 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17930 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17931 	"PATGEN_PATGEN_SEQ5r",
  17932 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17933 	"PATT_GEN_COM_PATT_GEN_SEQ_5",
  17934 	NULL,
  17935 #endif
  17936 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17937 	0xff00, /* 65280 */
  17938 	0,
  17939 #endif
  17940 },
  17941 {
  17942 	BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ6r,
  17943 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17944 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17945 	BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ6r_fields,
  17946 #else
  17947 	0,
  17948 #endif
  17949 #endif
  17950 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17951 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17952 	"PATGEN_PATGEN_SEQ6r",
  17953 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17954 	"PATT_GEN_COM_PATT_GEN_SEQ_6",
  17955 	NULL,
  17956 #endif
  17957 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17958 	0xff00, /* 65280 */
  17959 	0,
  17960 #endif
  17961 },
  17962 {
  17963 	BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ7r,
  17964 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17965 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17966 	BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ7r_fields,
  17967 #else
  17968 	0,
  17969 #endif
  17970 #endif
  17971 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17972 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17973 	"PATGEN_PATGEN_SEQ7r",
  17974 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17975 	"PATT_GEN_COM_PATT_GEN_SEQ_7",
  17976 	NULL,
  17977 #endif
  17978 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  17979 	0xff00, /* 65280 */
  17980 	0,
  17981 #endif
  17982 },
  17983 {
  17984 	BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ8r,
  17985 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  17986 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  17987 	BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ8r_fields,
  17988 #else
  17989 	0,
  17990 #endif
  17991 #endif
  17992 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  17993 	PHYMOD_SYMBOL_FLAG_REGISTER,
  17994 	"PATGEN_PATGEN_SEQ8r",
  17995 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  17996 	"PATT_GEN_COM_PATT_GEN_SEQ_8",
  17997 	NULL,
  17998 #endif
  17999 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18000 	0xff00, /* 65280 */
  18001 	0,
  18002 #endif
  18003 },
  18004 {
  18005 	BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ9r,
  18006 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18007 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18008 	BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ9r_fields,
  18009 #else
  18010 	0,
  18011 #endif
  18012 #endif
  18013 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18014 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18015 	"PATGEN_PATGEN_SEQ9r",
  18016 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18017 	"PATT_GEN_COM_PATT_GEN_SEQ_9",
  18018 	NULL,
  18019 #endif
  18020 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18021 	0xff00, /* 65280 */
  18022 	0,
  18023 #endif
  18024 },
  18025 {
  18026 	BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ_10r,
  18027 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18028 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18029 	BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ_10r_fields,
  18030 #else
  18031 	0,
  18032 #endif
  18033 #endif
  18034 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18035 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18036 	"PATGEN_PATGEN_SEQ_10r",
  18037 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18038 	"PATT_GEN_COM_PATT_GEN_SEQ_10",
  18039 	NULL,
  18040 #endif
  18041 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18042 	0xff00, /* 65280 */
  18043 	0,
  18044 #endif
  18045 },
  18046 {
  18047 	BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ_11r,
  18048 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18049 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18050 	BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ_11r_fields,
  18051 #else
  18052 	0,
  18053 #endif
  18054 #endif
  18055 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18056 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18057 	"PATGEN_PATGEN_SEQ_11r",
  18058 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18059 	"PATT_GEN_COM_PATT_GEN_SEQ_11",
  18060 	NULL,
  18061 #endif
  18062 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18063 	0xff00, /* 65280 */
  18064 	0,
  18065 #endif
  18066 },
  18067 {
  18068 	BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ_12r,
  18069 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18070 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18071 	BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ_12r_fields,
  18072 #else
  18073 	0,
  18074 #endif
  18075 #endif
  18076 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18077 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18078 	"PATGEN_PATGEN_SEQ_12r",
  18079 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18080 	"PATT_GEN_COM_PATT_GEN_SEQ_12",
  18081 	NULL,
  18082 #endif
  18083 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18084 	0xff00, /* 65280 */
  18085 	0,
  18086 #endif
  18087 },
  18088 {
  18089 	BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ_13r,
  18090 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18091 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18092 	BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ_13r_fields,
  18093 #else
  18094 	0,
  18095 #endif
  18096 #endif
  18097 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18098 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18099 	"PATGEN_PATGEN_SEQ_13r",
  18100 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18101 	"PATT_GEN_COM_PATT_GEN_SEQ_13",
  18102 	NULL,
  18103 #endif
  18104 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18105 	0xff00, /* 65280 */
  18106 	0,
  18107 #endif
  18108 },
  18109 {
  18110 	BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ_14r,
  18111 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18112 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18113 	BCMI_TSCBH_XGXS_PATGEN_PATGEN_SEQ_14r_fields,
  18114 #else
  18115 	0,
  18116 #endif
  18117 #endif
  18118 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18119 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18120 	"PATGEN_PATGEN_SEQ_14r",
  18121 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18122 	"PATT_GEN_COM_PATT_GEN_SEQ_14",
  18123 	NULL,
  18124 #endif
  18125 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18126 	0xff00, /* 65280 */
  18127 	0,
  18128 #endif
  18129 },
  18130 {
  18131 	BCMI_TSCBH_XGXS_TXFIR_UC_CTL0r,
  18132 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18133 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18134 	BCMI_TSCBH_XGXS_TXFIR_UC_CTL0r_fields,
  18135 #else
  18136 	0,
  18137 #endif
  18138 #endif
  18139 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18140 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18141 	"TXFIR_UC_CTL0r",
  18142 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18143 	"TX_FED_TXFIR_MICRO_CONTROL0",
  18144 	NULL,
  18145 #endif
  18146 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18147 	0xc160, /* 49504 */
  18148 	0,
  18149 #endif
  18150 },
  18151 {
  18152 	BCMI_TSCBH_XGXS_TXFIR_MISC_CTL0r,
  18153 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18154 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18155 	BCMI_TSCBH_XGXS_TXFIR_MISC_CTL0r_fields,
  18156 #else
  18157 	0,
  18158 #endif
  18159 #endif
  18160 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18161 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18162 	"TXFIR_MISC_CTL0r",
  18163 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18164 	"TX_FED_TXFIR_MISC_CONTROL0",
  18165 	NULL,
  18166 #endif
  18167 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18168 	0x0, /* 0 */
  18169 	0,
  18170 #endif
  18171 },
  18172 {
  18173 	BCMI_TSCBH_XGXS_TXFIR_MISC_STS0r,
  18174 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18175 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18176 	BCMI_TSCBH_XGXS_TXFIR_MISC_STS0r_fields,
  18177 #else
  18178 	0,
  18179 #endif
  18180 #endif
  18181 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18182 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18183 	"TXFIR_MISC_STS0r",
  18184 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18185 	"TX_FED_TXFIR_MISC_STATUS0",
  18186 	NULL,
  18187 #endif
  18188 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18189 	0x3, /* 3 */
  18190 	0,
  18191 #endif
  18192 },
  18193 {
  18194 	BCMI_TSCBH_XGXS_TXFIR_TAP_CTL0r,
  18195 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18196 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18197 	BCMI_TSCBH_XGXS_TXFIR_TAP_CTL0r_fields,
  18198 #else
  18199 	0,
  18200 #endif
  18201 #endif
  18202 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18203 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18204 	"TXFIR_TAP_CTL0r",
  18205 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18206 	"TX_FED_TXFIR_TAP_CONTROL0",
  18207 	NULL,
  18208 #endif
  18209 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18210 	0x3000, /* 12288 */
  18211 	0,
  18212 #endif
  18213 },
  18214 {
  18215 	BCMI_TSCBH_XGXS_TXFIR_TAP_CTL1r,
  18216 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18217 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18218 	BCMI_TSCBH_XGXS_TXFIR_TAP_CTL1r_fields,
  18219 #else
  18220 	0,
  18221 #endif
  18222 #endif
  18223 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18224 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18225 	"TXFIR_TAP_CTL1r",
  18226 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18227 	"TX_FED_TXFIR_TAP_CONTROL1",
  18228 	NULL,
  18229 #endif
  18230 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18231 	0x0, /* 0 */
  18232 	0,
  18233 #endif
  18234 },
  18235 {
  18236 	BCMI_TSCBH_XGXS_TXFIR_TAP_CTL2r,
  18237 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18238 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18239 	BCMI_TSCBH_XGXS_TXFIR_TAP_CTL2r_fields,
  18240 #else
  18241 	0,
  18242 #endif
  18243 #endif
  18244 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18245 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18246 	"TXFIR_TAP_CTL2r",
  18247 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18248 	"TX_FED_TXFIR_TAP_CONTROL2",
  18249 	NULL,
  18250 #endif
  18251 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18252 	0xa8, /* 168 */
  18253 	0,
  18254 #endif
  18255 },
  18256 {
  18257 	BCMI_TSCBH_XGXS_TXFIR_TAP_CTL3r,
  18258 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18259 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18260 	BCMI_TSCBH_XGXS_TXFIR_TAP_CTL3r_fields,
  18261 #else
  18262 	0,
  18263 #endif
  18264 #endif
  18265 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18266 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18267 	"TXFIR_TAP_CTL3r",
  18268 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18269 	"TX_FED_TXFIR_TAP_CONTROL3",
  18270 	NULL,
  18271 #endif
  18272 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18273 	0x0, /* 0 */
  18274 	0,
  18275 #endif
  18276 },
  18277 {
  18278 	BCMI_TSCBH_XGXS_TXFIR_TAP_CTL4r,
  18279 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18280 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18281 	BCMI_TSCBH_XGXS_TXFIR_TAP_CTL4r_fields,
  18282 #else
  18283 	0,
  18284 #endif
  18285 #endif
  18286 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18287 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18288 	"TXFIR_TAP_CTL4r",
  18289 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18290 	"TX_FED_TXFIR_TAP_CONTROL4",
  18291 	NULL,
  18292 #endif
  18293 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18294 	0x0, /* 0 */
  18295 	0,
  18296 #endif
  18297 },
  18298 {
  18299 	BCMI_TSCBH_XGXS_TXFIR_TAP_CTL5r,
  18300 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18301 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18302 	BCMI_TSCBH_XGXS_TXFIR_TAP_CTL5r_fields,
  18303 #else
  18304 	0,
  18305 #endif
  18306 #endif
  18307 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18308 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18309 	"TXFIR_TAP_CTL5r",
  18310 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18311 	"TX_FED_TXFIR_TAP_CONTROL5",
  18312 	NULL,
  18313 #endif
  18314 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18315 	0x0, /* 0 */
  18316 	0,
  18317 #endif
  18318 },
  18319 {
  18320 	BCMI_TSCBH_XGXS_TXFIR_TAP_CTL6r,
  18321 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18322 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18323 	BCMI_TSCBH_XGXS_TXFIR_TAP_CTL6r_fields,
  18324 #else
  18325 	0,
  18326 #endif
  18327 #endif
  18328 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18329 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18330 	"TXFIR_TAP_CTL6r",
  18331 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18332 	"TX_FED_TXFIR_TAP_CONTROL6",
  18333 	NULL,
  18334 #endif
  18335 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18336 	0x0, /* 0 */
  18337 	0,
  18338 #endif
  18339 },
  18340 {
  18341 	BCMI_TSCBH_XGXS_TXFIR_TAP_CTL7r,
  18342 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18343 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18344 	BCMI_TSCBH_XGXS_TXFIR_TAP_CTL7r_fields,
  18345 #else
  18346 	0,
  18347 #endif
  18348 #endif
  18349 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18350 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18351 	"TXFIR_TAP_CTL7r",
  18352 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18353 	"TX_FED_TXFIR_TAP_CONTROL7",
  18354 	NULL,
  18355 #endif
  18356 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18357 	0x0, /* 0 */
  18358 	0,
  18359 #endif
  18360 },
  18361 {
  18362 	BCMI_TSCBH_XGXS_TXFIR_TAP_CTL8r,
  18363 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18364 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18365 	BCMI_TSCBH_XGXS_TXFIR_TAP_CTL8r_fields,
  18366 #else
  18367 	0,
  18368 #endif
  18369 #endif
  18370 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18371 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18372 	"TXFIR_TAP_CTL8r",
  18373 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18374 	"TX_FED_TXFIR_TAP_CONTROL8",
  18375 	NULL,
  18376 #endif
  18377 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18378 	0x0, /* 0 */
  18379 	0,
  18380 #endif
  18381 },
  18382 {
  18383 	BCMI_TSCBH_XGXS_TXFIR_TAP_CTL9r,
  18384 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18385 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18386 	BCMI_TSCBH_XGXS_TXFIR_TAP_CTL9r_fields,
  18387 #else
  18388 	0,
  18389 #endif
  18390 #endif
  18391 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18392 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18393 	"TXFIR_TAP_CTL9r",
  18394 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18395 	"TX_FED_TXFIR_TAP_CONTROL9",
  18396 	NULL,
  18397 #endif
  18398 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18399 	0x0, /* 0 */
  18400 	0,
  18401 #endif
  18402 },
  18403 {
  18404 	BCMI_TSCBH_XGXS_TXFIR_TAP_CTL10r,
  18405 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18406 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18407 	BCMI_TSCBH_XGXS_TXFIR_TAP_CTL10r_fields,
  18408 #else
  18409 	0,
  18410 #endif
  18411 #endif
  18412 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18413 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18414 	"TXFIR_TAP_CTL10r",
  18415 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18416 	"TX_FED_TXFIR_TAP_CONTROL10",
  18417 	NULL,
  18418 #endif
  18419 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18420 	0x0, /* 0 */
  18421 	0,
  18422 #endif
  18423 },
  18424 {
  18425 	BCMI_TSCBH_XGXS_TXFIR_TAP_CTL11r,
  18426 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18427 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18428 	BCMI_TSCBH_XGXS_TXFIR_TAP_CTL11r_fields,
  18429 #else
  18430 	0,
  18431 #endif
  18432 #endif
  18433 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18434 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18435 	"TXFIR_TAP_CTL11r",
  18436 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18437 	"TX_FED_TXFIR_TAP_CONTROL11",
  18438 	NULL,
  18439 #endif
  18440 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18441 	0x0, /* 0 */
  18442 	0,
  18443 #endif
  18444 },
  18445 {
  18446 	BCMI_TSCBH_XGXS_PLL_CAL_CTL0r,
  18447 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18448 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18449 	BCMI_TSCBH_XGXS_PLL_CAL_CTL0r_fields,
  18450 #else
  18451 	0,
  18452 #endif
  18453 #endif
  18454 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18455 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18456 	"PLL_CAL_CTL0r",
  18457 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18458 	"PLL_CAL_COM_CTL_0",
  18459 	NULL,
  18460 #endif
  18461 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18462 	0xc803, /* 51203 */
  18463 	0,
  18464 #endif
  18465 },
  18466 {
  18467 	BCMI_TSCBH_XGXS_PLL_CAL_CTL1r,
  18468 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18469 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18470 	BCMI_TSCBH_XGXS_PLL_CAL_CTL1r_fields,
  18471 #else
  18472 	0,
  18473 #endif
  18474 #endif
  18475 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18476 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18477 	"PLL_CAL_CTL1r",
  18478 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18479 	"PLL_CAL_COM_CTL_1",
  18480 	NULL,
  18481 #endif
  18482 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18483 	0xc8ff, /* 51455 */
  18484 	0,
  18485 #endif
  18486 },
  18487 {
  18488 	BCMI_TSCBH_XGXS_PLL_CAL_CTL2r,
  18489 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18490 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18491 	BCMI_TSCBH_XGXS_PLL_CAL_CTL2r_fields,
  18492 #else
  18493 	0,
  18494 #endif
  18495 #endif
  18496 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18497 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18498 	"PLL_CAL_CTL2r",
  18499 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18500 	"PLL_CAL_COM_CTL_2",
  18501 	NULL,
  18502 #endif
  18503 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18504 	0xff01, /* 65281 */
  18505 	0,
  18506 #endif
  18507 },
  18508 {
  18509 	BCMI_TSCBH_XGXS_PLL_CAL_CTL3r,
  18510 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18511 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18512 	BCMI_TSCBH_XGXS_PLL_CAL_CTL3r_fields,
  18513 #else
  18514 	0,
  18515 #endif
  18516 #endif
  18517 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18518 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18519 	"PLL_CAL_CTL3r",
  18520 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18521 	"PLL_CAL_COM_CTL_3",
  18522 	NULL,
  18523 #endif
  18524 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18525 	0x0, /* 0 */
  18526 	0,
  18527 #endif
  18528 },
  18529 {
  18530 	BCMI_TSCBH_XGXS_PLL_CAL_CTL4r,
  18531 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18532 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18533 	BCMI_TSCBH_XGXS_PLL_CAL_CTL4r_fields,
  18534 #else
  18535 	0,
  18536 #endif
  18537 #endif
  18538 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18539 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18540 	"PLL_CAL_CTL4r",
  18541 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18542 	"PLL_CAL_COM_CTL_4",
  18543 	NULL,
  18544 #endif
  18545 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18546 	0xa80d, /* 43021 */
  18547 	0,
  18548 #endif
  18549 },
  18550 {
  18551 	BCMI_TSCBH_XGXS_PLL_CAL_CTL5r,
  18552 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18553 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18554 	BCMI_TSCBH_XGXS_PLL_CAL_CTL5r_fields,
  18555 #else
  18556 	0,
  18557 #endif
  18558 #endif
  18559 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18560 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18561 	"PLL_CAL_CTL5r",
  18562 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18563 	"PLL_CAL_COM_CTL_5",
  18564 	NULL,
  18565 #endif
  18566 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18567 	0x27, /* 39 */
  18568 	0,
  18569 #endif
  18570 },
  18571 {
  18572 	BCMI_TSCBH_XGXS_PLL_CAL_CTL6r,
  18573 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18574 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18575 	BCMI_TSCBH_XGXS_PLL_CAL_CTL6r_fields,
  18576 #else
  18577 	0,
  18578 #endif
  18579 #endif
  18580 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18581 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18582 	"PLL_CAL_CTL6r",
  18583 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18584 	"PLL_CAL_COM_CTL_6",
  18585 	NULL,
  18586 #endif
  18587 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18588 	0x7, /* 7 */
  18589 	0,
  18590 #endif
  18591 },
  18592 {
  18593 	BCMI_TSCBH_XGXS_PLL_CAL_CTL7r,
  18594 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18595 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18596 	BCMI_TSCBH_XGXS_PLL_CAL_CTL7r_fields,
  18597 #else
  18598 	0,
  18599 #endif
  18600 #endif
  18601 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18602 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18603 	"PLL_CAL_CTL7r",
  18604 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18605 	"PLL_CAL_COM_CTL_7",
  18606 	NULL,
  18607 #endif
  18608 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18609 	0x7, /* 7 */
  18610 	0,
  18611 #endif
  18612 },
  18613 {
  18614 	BCMI_TSCBH_XGXS_PLL_CAL_CTL_STS0r,
  18615 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18616 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18617 	BCMI_TSCBH_XGXS_PLL_CAL_CTL_STS0r_fields,
  18618 #else
  18619 	0,
  18620 #endif
  18621 #endif
  18622 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18623 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18624 	"PLL_CAL_CTL_STS0r",
  18625 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18626 	"PLL_CAL_COM_CTL_STATUS_0",
  18627 	NULL,
  18628 #endif
  18629 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18630 	0x0, /* 0 */
  18631 	0,
  18632 #endif
  18633 },
  18634 {
  18635 	BCMI_TSCBH_XGXS_PLL_CAL_CTL_STS1r,
  18636 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18637 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18638 	BCMI_TSCBH_XGXS_PLL_CAL_CTL_STS1r_fields,
  18639 #else
  18640 	0,
  18641 #endif
  18642 #endif
  18643 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18644 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18645 	"PLL_CAL_CTL_STS1r",
  18646 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18647 	"PLL_CAL_COM_CTL_STATUS_1",
  18648 	NULL,
  18649 #endif
  18650 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18651 	0x0, /* 0 */
  18652 	0,
  18653 #endif
  18654 },
  18655 {
  18656 	BCMI_TSCBH_XGXS_PLL_CAL_CTL_STS_DBGr,
  18657 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18658 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18659 	BCMI_TSCBH_XGXS_PLL_CAL_CTL_STS_DBGr_fields,
  18660 #else
  18661 	0,
  18662 #endif
  18663 #endif
  18664 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18665 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18666 	"PLL_CAL_CTL_STS_DBGr",
  18667 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18668 	"PLL_CAL_COM_CTL_STATUS_DBG",
  18669 	NULL,
  18670 #endif
  18671 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18672 	0x1, /* 1 */
  18673 	0,
  18674 #endif
  18675 },
  18676 {
  18677 	BCMI_TSCBH_XGXS_TXCOM_CTL2r,
  18678 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18679 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18680 	BCMI_TSCBH_XGXS_TXCOM_CTL2r_fields,
  18681 #else
  18682 	0,
  18683 #endif
  18684 #endif
  18685 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18686 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18687 	"TXCOM_CTL2r",
  18688 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18689 	"TXCOM_TXCOM_CONTROL2_REGISTER",
  18690 	NULL,
  18691 #endif
  18692 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18693 	0x1f4, /* 500 */
  18694 	0,
  18695 #endif
  18696 },
  18697 {
  18698 	BCMI_TSCBH_XGXS_TXCOM_CTL3r,
  18699 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18700 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18701 	BCMI_TSCBH_XGXS_TXCOM_CTL3r_fields,
  18702 #else
  18703 	0,
  18704 #endif
  18705 #endif
  18706 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18707 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18708 	"TXCOM_CTL3r",
  18709 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18710 	"TXCOM_TXCOM_CONTROL3_REGISTER",
  18711 	NULL,
  18712 #endif
  18713 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18714 	0xc8, /* 200 */
  18715 	0,
  18716 #endif
  18717 },
  18718 {
  18719 	BCMI_TSCBH_XGXS_TXCOM_CTL4r,
  18720 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18721 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18722 	BCMI_TSCBH_XGXS_TXCOM_CTL4r_fields,
  18723 #else
  18724 	0,
  18725 #endif
  18726 #endif
  18727 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18728 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18729 	"TXCOM_CTL4r",
  18730 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18731 	"TXCOM_TXCOM_CONTROL4_REGISTER",
  18732 	NULL,
  18733 #endif
  18734 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18735 	0x5dc, /* 1500 */
  18736 	0,
  18737 #endif
  18738 },
  18739 {
  18740 	BCMI_TSCBH_XGXS_TXCOM_CTL5r,
  18741 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18742 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18743 	BCMI_TSCBH_XGXS_TXCOM_CTL5r_fields,
  18744 #else
  18745 	0,
  18746 #endif
  18747 #endif
  18748 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18749 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18750 	"TXCOM_CTL5r",
  18751 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18752 	"TXCOM_TXCOM_CONTROL5_REGISTER",
  18753 	NULL,
  18754 #endif
  18755 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18756 	0x1b8, /* 440 */
  18757 	0,
  18758 #endif
  18759 },
  18760 {
  18761 	BCMI_TSCBH_XGXS_TLB_RX_PRBS_CHK_CNT_CFGr,
  18762 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18763 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18764 	BCMI_TSCBH_XGXS_TLB_RX_PRBS_CHK_CNT_CFGr_fields,
  18765 #else
  18766 	0,
  18767 #endif
  18768 #endif
  18769 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18770 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18771 	"TLB_RX_PRBS_CHK_CNT_CFGr",
  18772 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18773 	"TLB_RX_PRBS_CHK_CNT_CONFIG",
  18774 	NULL,
  18775 #endif
  18776 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18777 	0x8602, /* 34306 */
  18778 	0,
  18779 #endif
  18780 },
  18781 {
  18782 	BCMI_TSCBH_XGXS_TLB_RX_PRBS_CHK_CFGr,
  18783 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18784 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18785 	BCMI_TSCBH_XGXS_TLB_RX_PRBS_CHK_CFGr_fields,
  18786 #else
  18787 	0,
  18788 #endif
  18789 #endif
  18790 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18791 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18792 	"TLB_RX_PRBS_CHK_CFGr",
  18793 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18794 	"TLB_RX_PRBS_CHK_CONFIG",
  18795 	NULL,
  18796 #endif
  18797 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18798 	0x12a, /* 298 */
  18799 	0,
  18800 #endif
  18801 },
  18802 {
  18803 	BCMI_TSCBH_XGXS_TLB_RX_DIG_LPBK_CFGr,
  18804 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18805 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18806 	BCMI_TSCBH_XGXS_TLB_RX_DIG_LPBK_CFGr_fields,
  18807 #else
  18808 	0,
  18809 #endif
  18810 #endif
  18811 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18812 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18813 	"TLB_RX_DIG_LPBK_CFGr",
  18814 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18815 	"TLB_RX_DIG_LPBK_CONFIG",
  18816 	NULL,
  18817 #endif
  18818 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18819 	0xe, /* 14 */
  18820 	0,
  18821 #endif
  18822 },
  18823 {
  18824 	BCMI_TSCBH_XGXS_TLB_RX_TLB_RX_MISC_CFGr,
  18825 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18826 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18827 	BCMI_TSCBH_XGXS_TLB_RX_TLB_RX_MISC_CFGr_fields,
  18828 #else
  18829 	0,
  18830 #endif
  18831 #endif
  18832 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18833 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18834 	"TLB_RX_TLB_RX_MISC_CFGr",
  18835 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18836 	"TLB_RX_TLB_RX_MISC_CONFIG",
  18837 	NULL,
  18838 #endif
  18839 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18840 	0x700, /* 1792 */
  18841 	0,
  18842 #endif
  18843 },
  18844 {
  18845 	BCMI_TSCBH_XGXS_TLB_RX_PRBS_CHK_EN_TMR_CTLr,
  18846 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18847 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18848 	BCMI_TSCBH_XGXS_TLB_RX_PRBS_CHK_EN_TMR_CTLr_fields,
  18849 #else
  18850 	0,
  18851 #endif
  18852 #endif
  18853 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18854 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18855 	"TLB_RX_PRBS_CHK_EN_TMR_CTLr",
  18856 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18857 	"TLB_RX_PRBS_CHK_EN_TIMER_CONTROL",
  18858 	NULL,
  18859 #endif
  18860 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18861 	0x0, /* 0 */
  18862 	0,
  18863 #endif
  18864 },
  18865 {
  18866 	BCMI_TSCBH_XGXS_TLB_RX_PRBS_CHK_BURST_ERR_CNT_STSr,
  18867 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18868 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18869 	BCMI_TSCBH_XGXS_TLB_RX_PRBS_CHK_BURST_ERR_CNT_STSr_fields,
  18870 #else
  18871 	0,
  18872 #endif
  18873 #endif
  18874 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18875 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18876 	"TLB_RX_PRBS_CHK_BURST_ERR_CNT_STSr",
  18877 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18878 	"TLB_RX_PRBS_CHK_BURST_ERR_CNT_STATUS",
  18879 	NULL,
  18880 #endif
  18881 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18882 	0x0, /* 0 */
  18883 	0,
  18884 #endif
  18885 },
  18886 {
  18887 	BCMI_TSCBH_XGXS_TLB_RX_DBG_PMD_RX_LOCK_STSr,
  18888 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18889 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18890 	BCMI_TSCBH_XGXS_TLB_RX_DBG_PMD_RX_LOCK_STSr_fields,
  18891 #else
  18892 	0,
  18893 #endif
  18894 #endif
  18895 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18896 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18897 	"TLB_RX_DBG_PMD_RX_LOCK_STSr",
  18898 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18899 	"TLB_RX_DBG_PMD_RX_LOCK_STATUS",
  18900 	NULL,
  18901 #endif
  18902 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18903 	0x0, /* 0 */
  18904 	0,
  18905 #endif
  18906 },
  18907 {
  18908 	BCMI_TSCBH_XGXS_TLB_RX_UC_PMD_RX_LOCK_STSr,
  18909 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18910 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18911 	BCMI_TSCBH_XGXS_TLB_RX_UC_PMD_RX_LOCK_STSr_fields,
  18912 #else
  18913 	0,
  18914 #endif
  18915 #endif
  18916 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18917 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18918 	"TLB_RX_UC_PMD_RX_LOCK_STSr",
  18919 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18920 	"TLB_RX_UC_PMD_RX_LOCK_STATUS",
  18921 	NULL,
  18922 #endif
  18923 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18924 	0x0, /* 0 */
  18925 	0,
  18926 #endif
  18927 },
  18928 {
  18929 	BCMI_TSCBH_XGXS_TLB_RX_DIG_LPBK_PD_STSr,
  18930 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18931 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18932 	BCMI_TSCBH_XGXS_TLB_RX_DIG_LPBK_PD_STSr_fields,
  18933 #else
  18934 	0,
  18935 #endif
  18936 #endif
  18937 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18938 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18939 	"TLB_RX_DIG_LPBK_PD_STSr",
  18940 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18941 	"TLB_RX_DIG_LPBK_PD_STATUS",
  18942 	NULL,
  18943 #endif
  18944 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18945 	0x2, /* 2 */
  18946 	0,
  18947 #endif
  18948 },
  18949 {
  18950 	BCMI_TSCBH_XGXS_TLB_RX_PRBS_CHK_LOCK_STSr,
  18951 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18952 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18953 	BCMI_TSCBH_XGXS_TLB_RX_PRBS_CHK_LOCK_STSr_fields,
  18954 #else
  18955 	0,
  18956 #endif
  18957 #endif
  18958 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18959 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18960 	"TLB_RX_PRBS_CHK_LOCK_STSr",
  18961 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18962 	"TLB_RX_PRBS_CHK_LOCK_STATUS",
  18963 	NULL,
  18964 #endif
  18965 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18966 	0x0, /* 0 */
  18967 	0,
  18968 #endif
  18969 },
  18970 {
  18971 	BCMI_TSCBH_XGXS_TLB_RX_PRBS_CHK_ERR_CNT_MSB_STSr,
  18972 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18973 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18974 	BCMI_TSCBH_XGXS_TLB_RX_PRBS_CHK_ERR_CNT_MSB_STSr_fields,
  18975 #else
  18976 	0,
  18977 #endif
  18978 #endif
  18979 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  18980 	PHYMOD_SYMBOL_FLAG_REGISTER,
  18981 	"TLB_RX_PRBS_CHK_ERR_CNT_MSB_STSr",
  18982 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  18983 	"TLB_RX_PRBS_CHK_ERR_CNT_MSB_STATUS",
  18984 	NULL,
  18985 #endif
  18986 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  18987 	0x8000, /* 32768 */
  18988 	0,
  18989 #endif
  18990 },
  18991 {
  18992 	BCMI_TSCBH_XGXS_TLB_RX_PRBS_CHK_ERR_CNT_LSB_STSr,
  18993 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  18994 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  18995 	BCMI_TSCBH_XGXS_TLB_RX_PRBS_CHK_ERR_CNT_LSB_STSr_fields,
  18996 #else
  18997 	0,
  18998 #endif
  18999 #endif
  19000 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19001 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19002 	"TLB_RX_PRBS_CHK_ERR_CNT_LSB_STSr",
  19003 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19004 	"TLB_RX_PRBS_CHK_ERR_CNT_LSB_STATUS",
  19005 	NULL,
  19006 #endif
  19007 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19008 	0x0, /* 0 */
  19009 	0,
  19010 #endif
  19011 },
  19012 {
  19013 	BCMI_TSCBH_XGXS_TLB_RX_PMD_RX_LOCK_STSr,
  19014 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19015 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19016 	BCMI_TSCBH_XGXS_TLB_RX_PMD_RX_LOCK_STSr_fields,
  19017 #else
  19018 	0,
  19019 #endif
  19020 #endif
  19021 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19022 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19023 	"TLB_RX_PMD_RX_LOCK_STSr",
  19024 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19025 	"TLB_RX_PMD_RX_LOCK_STATUS",
  19026 	NULL,
  19027 #endif
  19028 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19029 	0x0, /* 0 */
  19030 	0,
  19031 #endif
  19032 },
  19033 {
  19034 	BCMI_TSCBH_XGXS_TLB_RX_PRBS_BURST_ERR_LEN_STSr,
  19035 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19036 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19037 	BCMI_TSCBH_XGXS_TLB_RX_PRBS_BURST_ERR_LEN_STSr_fields,
  19038 #else
  19039 	0,
  19040 #endif
  19041 #endif
  19042 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19043 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19044 	"TLB_RX_PRBS_BURST_ERR_LEN_STSr",
  19045 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19046 	"TLB_RX_PRBS_BURST_ERR_LENGTH_STATUS",
  19047 	NULL,
  19048 #endif
  19049 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19050 	0x0, /* 0 */
  19051 	0,
  19052 #endif
  19053 },
  19054 {
  19055 	BCMI_TSCBH_XGXS_TLB_RX_MAX_PRBS_BURST_ERR_LEN_STSr,
  19056 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19057 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19058 	BCMI_TSCBH_XGXS_TLB_RX_MAX_PRBS_BURST_ERR_LEN_STSr_fields,
  19059 #else
  19060 	0,
  19061 #endif
  19062 #endif
  19063 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19064 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19065 	"TLB_RX_MAX_PRBS_BURST_ERR_LEN_STSr",
  19066 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19067 	"TLB_RX_MAX_PRBS_BURST_ERR_LENGTH_STATUS",
  19068 	NULL,
  19069 #endif
  19070 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19071 	0x0, /* 0 */
  19072 	0,
  19073 #endif
  19074 },
  19075 {
  19076 	BCMI_TSCBH_XGXS_TLB_TX_PATGEN_CFGr,
  19077 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19078 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19079 	BCMI_TSCBH_XGXS_TLB_TX_PATGEN_CFGr_fields,
  19080 #else
  19081 	0,
  19082 #endif
  19083 #endif
  19084 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19085 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19086 	"TLB_TX_PATGEN_CFGr",
  19087 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19088 	"TLB_TX_PATT_GEN_CONFIG",
  19089 	NULL,
  19090 #endif
  19091 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19092 	0xb000, /* 45056 */
  19093 	0,
  19094 #endif
  19095 },
  19096 {
  19097 	BCMI_TSCBH_XGXS_TLB_TX_PRBS_GEN_CFGr,
  19098 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19099 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19100 	BCMI_TSCBH_XGXS_TLB_TX_PRBS_GEN_CFGr_fields,
  19101 #else
  19102 	0,
  19103 #endif
  19104 #endif
  19105 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19106 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19107 	"TLB_TX_PRBS_GEN_CFGr",
  19108 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19109 	"TLB_TX_PRBS_GEN_CONFIG",
  19110 	NULL,
  19111 #endif
  19112 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19113 	0xa, /* 10 */
  19114 	0,
  19115 #endif
  19116 },
  19117 {
  19118 	BCMI_TSCBH_XGXS_TLB_TX_RMT_LPBK_CFGr,
  19119 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19120 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19121 	BCMI_TSCBH_XGXS_TLB_TX_RMT_LPBK_CFGr_fields,
  19122 #else
  19123 	0,
  19124 #endif
  19125 #endif
  19126 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19127 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19128 	"TLB_TX_RMT_LPBK_CFGr",
  19129 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19130 	"TLB_TX_RMT_LPBK_CONFIG",
  19131 	NULL,
  19132 #endif
  19133 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19134 	0x2, /* 2 */
  19135 	0,
  19136 #endif
  19137 },
  19138 {
  19139 	BCMI_TSCBH_XGXS_TLB_TX_TLB_TX_MISC_CFGr,
  19140 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19141 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19142 	BCMI_TSCBH_XGXS_TLB_TX_TLB_TX_MISC_CFGr_fields,
  19143 #else
  19144 	0,
  19145 #endif
  19146 #endif
  19147 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19148 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19149 	"TLB_TX_TLB_TX_MISC_CFGr",
  19150 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19151 	"TLB_TX_TLB_TX_MISC_CONFIG",
  19152 	NULL,
  19153 #endif
  19154 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19155 	0x10, /* 16 */
  19156 	0,
  19157 #endif
  19158 },
  19159 {
  19160 	BCMI_TSCBH_XGXS_TLB_TX_TLB_TX_PAM4_CFG0r,
  19161 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19162 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19163 	BCMI_TSCBH_XGXS_TLB_TX_TLB_TX_PAM4_CFG0r_fields,
  19164 #else
  19165 	0,
  19166 #endif
  19167 #endif
  19168 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19169 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19170 	"TLB_TX_TLB_TX_PAM4_CFG0r",
  19171 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19172 	"TLB_TX_TLB_TX_PAM4_CONFIG_0",
  19173 	NULL,
  19174 #endif
  19175 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19176 	0x0, /* 0 */
  19177 	0,
  19178 #endif
  19179 },
  19180 {
  19181 	BCMI_TSCBH_XGXS_TLB_TX_RMT_LPBK_PD_STSr,
  19182 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19183 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19184 	BCMI_TSCBH_XGXS_TLB_TX_RMT_LPBK_PD_STSr_fields,
  19185 #else
  19186 	0,
  19187 #endif
  19188 #endif
  19189 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19190 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19191 	"TLB_TX_RMT_LPBK_PD_STSr",
  19192 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19193 	"TLB_TX_RMT_LPBK_PD_STATUS",
  19194 	NULL,
  19195 #endif
  19196 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19197 	0x2, /* 2 */
  19198 	0,
  19199 #endif
  19200 },
  19201 {
  19202 	BCMI_TSCBH_XGXS_TLB_TX_TLB_TX_BC_ENC_CFG0r,
  19203 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19204 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19205 	BCMI_TSCBH_XGXS_TLB_TX_TLB_TX_BC_ENC_CFG0r_fields,
  19206 #else
  19207 	0,
  19208 #endif
  19209 #endif
  19210 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19211 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19212 	"TLB_TX_TLB_TX_BC_ENC_CFG0r",
  19213 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19214 	"TLB_TX_TLB_TX_BC_ENC_CONFIG_0",
  19215 	NULL,
  19216 #endif
  19217 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19218 	0x0, /* 0 */
  19219 	0,
  19220 #endif
  19221 },
  19222 {
  19223 	BCMI_TSCBH_XGXS_TLB_TX_TLB_TX_BC_ENC_CFG1r,
  19224 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19225 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19226 	BCMI_TSCBH_XGXS_TLB_TX_TLB_TX_BC_ENC_CFG1r_fields,
  19227 #else
  19228 	0,
  19229 #endif
  19230 #endif
  19231 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19232 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19233 	"TLB_TX_TLB_TX_BC_ENC_CFG1r",
  19234 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19235 	"TLB_TX_TLB_TX_BC_ENC_CONFIG_1",
  19236 	NULL,
  19237 #endif
  19238 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19239 	0xf628, /* 63016 */
  19240 	0,
  19241 #endif
  19242 },
  19243 {
  19244 	BCMI_TSCBH_XGXS_TLB_TX_TLB_TX_BC_ENC_CFG2r,
  19245 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19246 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19247 	BCMI_TSCBH_XGXS_TLB_TX_TLB_TX_BC_ENC_CFG2r_fields,
  19248 #else
  19249 	0,
  19250 #endif
  19251 #endif
  19252 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19253 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19254 	"TLB_TX_TLB_TX_BC_ENC_CFG2r",
  19255 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19256 	"TLB_TX_TLB_TX_BC_ENC_CONFIG_2",
  19257 	NULL,
  19258 #endif
  19259 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19260 	0x0, /* 0 */
  19261 	0,
  19262 #endif
  19263 },
  19264 {
  19265 	BCMI_TSCBH_XGXS_TLB_TX_TLB_TX_BC_ENC_STS0r,
  19266 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19267 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19268 	BCMI_TSCBH_XGXS_TLB_TX_TLB_TX_BC_ENC_STS0r_fields,
  19269 #else
  19270 	0,
  19271 #endif
  19272 #endif
  19273 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19274 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19275 	"TLB_TX_TLB_TX_BC_ENC_STS0r",
  19276 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19277 	"TLB_TX_TLB_TX_BC_ENC_STATUS_0",
  19278 	NULL,
  19279 #endif
  19280 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19281 	0x0, /* 0 */
  19282 	0,
  19283 #endif
  19284 },
  19285 {
  19286 	BCMI_TSCBH_XGXS_CORE_PLL_PMD_CORE_MODE_STSr,
  19287 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19288 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19289 	BCMI_TSCBH_XGXS_CORE_PLL_PMD_CORE_MODE_STSr_fields,
  19290 #else
  19291 	0,
  19292 #endif
  19293 #endif
  19294 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19295 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19296 	"CORE_PLL_PMD_CORE_MODE_STSr",
  19297 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19298 	"CORE_PLL_COM_PMD_CORE_MODE_STATUS",
  19299 	NULL,
  19300 #endif
  19301 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19302 	0x0, /* 0 */
  19303 	0,
  19304 #endif
  19305 },
  19306 {
  19307 	BCMI_TSCBH_XGXS_CORE_PLL_RST_CTL_PLL_DPr,
  19308 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19309 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19310 	BCMI_TSCBH_XGXS_CORE_PLL_RST_CTL_PLL_DPr_fields,
  19311 #else
  19312 	0,
  19313 #endif
  19314 #endif
  19315 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19316 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19317 	"CORE_PLL_RST_CTL_PLL_DPr",
  19318 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19319 	"CORE_PLL_COM_RESET_CONTROL_PLL_DP",
  19320 	NULL,
  19321 #endif
  19322 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19323 	0x0, /* 0 */
  19324 	0,
  19325 #endif
  19326 },
  19327 {
  19328 	BCMI_TSCBH_XGXS_CORE_PLL_TOP_USER_CTLr,
  19329 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19330 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19331 	BCMI_TSCBH_XGXS_CORE_PLL_TOP_USER_CTLr_fields,
  19332 #else
  19333 	0,
  19334 #endif
  19335 #endif
  19336 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19337 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19338 	"CORE_PLL_TOP_USER_CTLr",
  19339 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19340 	"CORE_PLL_COM_TOP_USER_CONTROL",
  19341 	NULL,
  19342 #endif
  19343 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19344 	0x0, /* 0 */
  19345 	0,
  19346 #endif
  19347 },
  19348 {
  19349 	BCMI_TSCBH_XGXS_CORE_PLL_UC_ACK_CORE_CTLr,
  19350 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19351 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19352 	BCMI_TSCBH_XGXS_CORE_PLL_UC_ACK_CORE_CTLr_fields,
  19353 #else
  19354 	0,
  19355 #endif
  19356 #endif
  19357 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19358 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19359 	"CORE_PLL_UC_ACK_CORE_CTLr",
  19360 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19361 	"CORE_PLL_COM_UC_ACK_CORE_CONTROL",
  19362 	NULL,
  19363 #endif
  19364 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19365 	0x0, /* 0 */
  19366 	0,
  19367 #endif
  19368 },
  19369 {
  19370 	BCMI_TSCBH_XGXS_CORE_PLL_PLL_DP_RST_ST_STSr,
  19371 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19372 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19373 	BCMI_TSCBH_XGXS_CORE_PLL_PLL_DP_RST_ST_STSr_fields,
  19374 #else
  19375 	0,
  19376 #endif
  19377 #endif
  19378 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19379 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19380 	"CORE_PLL_PLL_DP_RST_ST_STSr",
  19381 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19382 	"CORE_PLL_COM_PLL_DP_RESET_STATE_STATUS",
  19383 	NULL,
  19384 #endif
  19385 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19386 	0x7, /* 7 */
  19387 	0,
  19388 #endif
  19389 },
  19390 {
  19391 	BCMI_TSCBH_XGXS_CORE_PLL_CORE_PLL_COM_STS2r,
  19392 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19393 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19394 	BCMI_TSCBH_XGXS_CORE_PLL_CORE_PLL_COM_STS2r_fields,
  19395 #else
  19396 	0,
  19397 #endif
  19398 #endif
  19399 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19400 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19401 	"CORE_PLL_CORE_PLL_COM_STS2r",
  19402 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19403 	"CORE_PLL_COM_CORE_PLL_COM_STATUS_2",
  19404 	NULL,
  19405 #endif
  19406 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19407 	0x1, /* 1 */
  19408 	0,
  19409 #endif
  19410 },
  19411 {
  19412 	BCMI_TSCBH_XGXS_CORE_PLL_PLL_CFG_FWAPI_DATA0r,
  19413 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19414 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19415 	BCMI_TSCBH_XGXS_CORE_PLL_PLL_CFG_FWAPI_DATA0r_fields,
  19416 #else
  19417 	0,
  19418 #endif
  19419 #endif
  19420 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19421 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19422 	"CORE_PLL_PLL_CFG_FWAPI_DATA0r",
  19423 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19424 	"CORE_PLL_COM_PLL_CFG_FWAPI_DATA0",
  19425 	NULL,
  19426 #endif
  19427 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19428 	0x0, /* 0 */
  19429 	0,
  19430 #endif
  19431 },
  19432 {
  19433 	BCMI_TSCBH_XGXS_CORE_PLL_PLL_CFG_FWAPI_DATA1r,
  19434 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19435 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19436 	BCMI_TSCBH_XGXS_CORE_PLL_PLL_CFG_FWAPI_DATA1r_fields,
  19437 #else
  19438 	0,
  19439 #endif
  19440 #endif
  19441 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19442 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19443 	"CORE_PLL_PLL_CFG_FWAPI_DATA1r",
  19444 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19445 	"CORE_PLL_COM_PLL_CFG_FWAPI_DATA1",
  19446 	NULL,
  19447 #endif
  19448 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19449 	0x0, /* 0 */
  19450 	0,
  19451 #endif
  19452 },
  19453 {
  19454 	BCMI_TSCBH_XGXS_LN_ADDR0r,
  19455 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19456 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19457 	BCMI_TSCBH_XGXS_LN_ADDR0r_fields,
  19458 #else
  19459 	0,
  19460 #endif
  19461 #endif
  19462 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19463 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19464 	"LN_ADDR0r",
  19465 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19466 	"DIG_COM_B_LANE_ADDR_0",
  19467 	NULL,
  19468 #endif
  19469 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19470 	0x0, /* 0 */
  19471 	0,
  19472 #endif
  19473 },
  19474 {
  19475 	BCMI_TSCBH_XGXS_LN_ADDR1r,
  19476 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19477 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19478 	BCMI_TSCBH_XGXS_LN_ADDR1r_fields,
  19479 #else
  19480 	0,
  19481 #endif
  19482 #endif
  19483 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19484 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19485 	"LN_ADDR1r",
  19486 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19487 	"DIG_COM_B_LANE_ADDR_1",
  19488 	NULL,
  19489 #endif
  19490 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19491 	0x101, /* 257 */
  19492 	0,
  19493 #endif
  19494 },
  19495 {
  19496 	BCMI_TSCBH_XGXS_LN_ADDR2r,
  19497 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19498 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19499 	BCMI_TSCBH_XGXS_LN_ADDR2r_fields,
  19500 #else
  19501 	0,
  19502 #endif
  19503 #endif
  19504 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19505 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19506 	"LN_ADDR2r",
  19507 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19508 	"DIG_COM_B_LANE_ADDR_2",
  19509 	NULL,
  19510 #endif
  19511 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19512 	0x202, /* 514 */
  19513 	0,
  19514 #endif
  19515 },
  19516 {
  19517 	BCMI_TSCBH_XGXS_LN_ADDR3r,
  19518 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19519 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19520 	BCMI_TSCBH_XGXS_LN_ADDR3r_fields,
  19521 #else
  19522 	0,
  19523 #endif
  19524 #endif
  19525 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19526 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19527 	"LN_ADDR3r",
  19528 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19529 	"DIG_COM_B_LANE_ADDR_3",
  19530 	NULL,
  19531 #endif
  19532 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19533 	0x303, /* 771 */
  19534 	0,
  19535 #endif
  19536 },
  19537 {
  19538 	BCMI_TSCBH_XGXS_LN_ADDR4r,
  19539 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19540 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19541 	BCMI_TSCBH_XGXS_LN_ADDR4r_fields,
  19542 #else
  19543 	0,
  19544 #endif
  19545 #endif
  19546 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19547 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19548 	"LN_ADDR4r",
  19549 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19550 	"DIG_COM_B_LANE_ADDR_4",
  19551 	NULL,
  19552 #endif
  19553 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19554 	0x404, /* 1028 */
  19555 	0,
  19556 #endif
  19557 },
  19558 {
  19559 	BCMI_TSCBH_XGXS_LN_ADDR5r,
  19560 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19561 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19562 	BCMI_TSCBH_XGXS_LN_ADDR5r_fields,
  19563 #else
  19564 	0,
  19565 #endif
  19566 #endif
  19567 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19568 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19569 	"LN_ADDR5r",
  19570 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19571 	"DIG_COM_B_LANE_ADDR_5",
  19572 	NULL,
  19573 #endif
  19574 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19575 	0x505, /* 1285 */
  19576 	0,
  19577 #endif
  19578 },
  19579 {
  19580 	BCMI_TSCBH_XGXS_LN_ADDR6r,
  19581 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19582 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19583 	BCMI_TSCBH_XGXS_LN_ADDR6r_fields,
  19584 #else
  19585 	0,
  19586 #endif
  19587 #endif
  19588 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19589 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19590 	"LN_ADDR6r",
  19591 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19592 	"DIG_COM_B_LANE_ADDR_6",
  19593 	NULL,
  19594 #endif
  19595 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19596 	0x606, /* 1542 */
  19597 	0,
  19598 #endif
  19599 },
  19600 {
  19601 	BCMI_TSCBH_XGXS_LN_ADDR7r,
  19602 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19603 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19604 	BCMI_TSCBH_XGXS_LN_ADDR7r_fields,
  19605 #else
  19606 	0,
  19607 #endif
  19608 #endif
  19609 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19610 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19611 	"LN_ADDR7r",
  19612 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19613 	"DIG_COM_B_LANE_ADDR_7",
  19614 	NULL,
  19615 #endif
  19616 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19617 	0x707, /* 1799 */
  19618 	0,
  19619 #endif
  19620 },
  19621 {
  19622 	BCMI_TSCBH_XGXS_DIG_COM_B_CTL_CLK4SYNC_DIV2_0r,
  19623 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19624 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19625 	BCMI_TSCBH_XGXS_DIG_COM_B_CTL_CLK4SYNC_DIV2_0r_fields,
  19626 #else
  19627 	0,
  19628 #endif
  19629 #endif
  19630 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19631 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19632 	"DIG_COM_B_CTL_CLK4SYNC_DIV2_0r",
  19633 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19634 	"DIG_COM_B_DIG_COM_B_CONTROL_CLK4SYNC_DIV2_0",
  19635 	NULL,
  19636 #endif
  19637 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19638 	0x40, /* 64 */
  19639 	0,
  19640 #endif
  19641 },
  19642 {
  19643 	BCMI_TSCBH_XGXS_DIG_COM_B_STS_CLK4SYNC_DIV2_0r,
  19644 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19645 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19646 	BCMI_TSCBH_XGXS_DIG_COM_B_STS_CLK4SYNC_DIV2_0r_fields,
  19647 #else
  19648 	0,
  19649 #endif
  19650 #endif
  19651 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19652 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19653 	"DIG_COM_B_STS_CLK4SYNC_DIV2_0r",
  19654 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19655 	"DIG_COM_B_DIG_COM_B_STATUS_CLK4SYNC_DIV2_0",
  19656 	NULL,
  19657 #endif
  19658 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19659 	0x1, /* 1 */
  19660 	0,
  19661 #endif
  19662 },
  19663 {
  19664 	BCMI_TSCBH_XGXS_DIG_COM_B_CTL_UC_CLK0r,
  19665 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19666 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19667 	BCMI_TSCBH_XGXS_DIG_COM_B_CTL_UC_CLK0r_fields,
  19668 #else
  19669 	0,
  19670 #endif
  19671 #endif
  19672 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19673 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19674 	"DIG_COM_B_CTL_UC_CLK0r",
  19675 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19676 	"DIG_COM_B_DIG_COM_B_CONTROL_MICRO_CLK_0",
  19677 	NULL,
  19678 #endif
  19679 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19680 	0x47, /* 71 */
  19681 	0,
  19682 #endif
  19683 },
  19684 {
  19685 	BCMI_TSCBH_XGXS_DIG_COM_B_STS_UC_CLK0r,
  19686 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19687 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19688 	BCMI_TSCBH_XGXS_DIG_COM_B_STS_UC_CLK0r_fields,
  19689 #else
  19690 	0,
  19691 #endif
  19692 #endif
  19693 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19694 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19695 	"DIG_COM_B_STS_UC_CLK0r",
  19696 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19697 	"DIG_COM_B_DIG_COM_B_STATUS_MICRO_CLK_0",
  19698 	NULL,
  19699 #endif
  19700 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19701 	0x1, /* 1 */
  19702 	0,
  19703 #endif
  19704 },
  19705 {
  19706 	BCMI_TSCBH_XGXS_RX_LN_CLK_RST_N_PWRDWN_CTLr,
  19707 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19708 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19709 	BCMI_TSCBH_XGXS_RX_LN_CLK_RST_N_PWRDWN_CTLr_fields,
  19710 #else
  19711 	0,
  19712 #endif
  19713 #endif
  19714 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19715 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19716 	"RX_LN_CLK_RST_N_PWRDWN_CTLr",
  19717 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19718 	"RX_CKRST_CTRL_8X_PLL2X_V1P0_RX_LANE_CLK_RESET_N_POWERDOWN_CONTROL",
  19719 	NULL,
  19720 #endif
  19721 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19722 	0x0, /* 0 */
  19723 	0,
  19724 #endif
  19725 },
  19726 {
  19727 	BCMI_TSCBH_XGXS_RX_LN_AFE_RST_PWRDWN_CTL_CTLr,
  19728 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19729 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19730 	BCMI_TSCBH_XGXS_RX_LN_AFE_RST_PWRDWN_CTL_CTLr_fields,
  19731 #else
  19732 	0,
  19733 #endif
  19734 #endif
  19735 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19736 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19737 	"RX_LN_AFE_RST_PWRDWN_CTL_CTLr",
  19738 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19739 	"RX_CKRST_CTRL_8X_PLL2X_V1P0_RX_LANE_AFE_RESET_PWRDWN_CONTROL_CONTROL",
  19740 	NULL,
  19741 #endif
  19742 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19743 	0x0, /* 0 */
  19744 	0,
  19745 #endif
  19746 },
  19747 {
  19748 	BCMI_TSCBH_XGXS_RX_LN_RST_N_PWRDN_PIN_KILL_CTLr,
  19749 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19750 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19751 	BCMI_TSCBH_XGXS_RX_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields,
  19752 #else
  19753 	0,
  19754 #endif
  19755 #endif
  19756 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19757 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19758 	"RX_LN_RST_N_PWRDN_PIN_KILL_CTLr",
  19759 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19760 	"RX_CKRST_CTRL_8X_PLL2X_V1P0_RX_LANE_RESET_N_PWRDN_PIN_KILL_CONTROL",
  19761 	NULL,
  19762 #endif
  19763 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19764 	0x0, /* 0 */
  19765 	0,
  19766 #endif
  19767 },
  19768 {
  19769 	BCMI_TSCBH_XGXS_RX_LN_DBG_RST_CTLr,
  19770 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19771 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19772 	BCMI_TSCBH_XGXS_RX_LN_DBG_RST_CTLr_fields,
  19773 #else
  19774 	0,
  19775 #endif
  19776 #endif
  19777 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19778 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19779 	"RX_LN_DBG_RST_CTLr",
  19780 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19781 	"RX_CKRST_CTRL_8X_PLL2X_V1P0_RX_LANE_DEBUG_RESET_CONTROL",
  19782 	NULL,
  19783 #endif
  19784 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19785 	0x3, /* 3 */
  19786 	0,
  19787 #endif
  19788 },
  19789 {
  19790 	BCMI_TSCBH_XGXS_RX_CLK_N_RST_DBG_CTLr,
  19791 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19792 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19793 	BCMI_TSCBH_XGXS_RX_CLK_N_RST_DBG_CTLr_fields,
  19794 #else
  19795 	0,
  19796 #endif
  19797 #endif
  19798 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19799 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19800 	"RX_CLK_N_RST_DBG_CTLr",
  19801 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19802 	"RX_CKRST_CTRL_8X_PLL2X_V1P0_RX_CLOCK_N_RESET_DEBUG_CONTROL",
  19803 	NULL,
  19804 #endif
  19805 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19806 	0x0, /* 0 */
  19807 	0,
  19808 #endif
  19809 },
  19810 {
  19811 	BCMI_TSCBH_XGXS_RX_PMD_LN_MODE_STSr,
  19812 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19813 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19814 	BCMI_TSCBH_XGXS_RX_PMD_LN_MODE_STSr_fields,
  19815 #else
  19816 	0,
  19817 #endif
  19818 #endif
  19819 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19820 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19821 	"RX_PMD_LN_MODE_STSr",
  19822 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19823 	"RX_CKRST_CTRL_8X_PLL2X_V1P0_RX_PMD_LANE_MODE_STATUS",
  19824 	NULL,
  19825 #endif
  19826 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19827 	0x0, /* 0 */
  19828 	0,
  19829 #endif
  19830 },
  19831 {
  19832 	BCMI_TSCBH_XGXS_RX_AFE_RST_PWRDN_OSR_MODE_PIN_STSr,
  19833 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19834 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19835 	BCMI_TSCBH_XGXS_RX_AFE_RST_PWRDN_OSR_MODE_PIN_STSr_fields,
  19836 #else
  19837 	0,
  19838 #endif
  19839 #endif
  19840 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19841 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19842 	"RX_AFE_RST_PWRDN_OSR_MODE_PIN_STSr",
  19843 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19844 	"RX_CKRST_CTRL_8X_PLL2X_V1P0_RX_AFE_RESET_PWRDN_OSR_MODE_PIN_STATUS",
  19845 	NULL,
  19846 #endif
  19847 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19848 	0x7, /* 7 */
  19849 	0,
  19850 #endif
  19851 },
  19852 {
  19853 	BCMI_TSCBH_XGXS_LN_CFG_FWAPI_DATA0r,
  19854 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19855 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19856 	BCMI_TSCBH_XGXS_LN_CFG_FWAPI_DATA0r_fields,
  19857 #else
  19858 	0,
  19859 #endif
  19860 #endif
  19861 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19862 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19863 	"LN_CFG_FWAPI_DATA0r",
  19864 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19865 	"RX_CKRST_CTRL_8X_PLL2X_V1P0_LANE_CFG_FWAPI_DATA0",
  19866 	NULL,
  19867 #endif
  19868 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19869 	0x0, /* 0 */
  19870 	0,
  19871 #endif
  19872 },
  19873 {
  19874 	BCMI_TSCBH_XGXS_LN_CFG_FWAPI_DATA1r,
  19875 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19876 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19877 	BCMI_TSCBH_XGXS_LN_CFG_FWAPI_DATA1r_fields,
  19878 #else
  19879 	0,
  19880 #endif
  19881 #endif
  19882 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19883 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19884 	"LN_CFG_FWAPI_DATA1r",
  19885 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19886 	"RX_CKRST_CTRL_8X_PLL2X_V1P0_LANE_CFG_FWAPI_DATA1",
  19887 	NULL,
  19888 #endif
  19889 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19890 	0x0, /* 0 */
  19891 	0,
  19892 #endif
  19893 },
  19894 {
  19895 	BCMI_TSCBH_XGXS_TX_LN_CLK_RST_N_PWRDWN_CTLr,
  19896 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19897 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19898 	BCMI_TSCBH_XGXS_TX_LN_CLK_RST_N_PWRDWN_CTLr_fields,
  19899 #else
  19900 	0,
  19901 #endif
  19902 #endif
  19903 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19904 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19905 	"TX_LN_CLK_RST_N_PWRDWN_CTLr",
  19906 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19907 	"TX_CKRST_CTRL_8X_PLL2X_V1P0_TX_LANE_CLK_RESET_N_POWERDOWN_CONTROL",
  19908 	NULL,
  19909 #endif
  19910 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19911 	0x0, /* 0 */
  19912 	0,
  19913 #endif
  19914 },
  19915 {
  19916 	BCMI_TSCBH_XGXS_TX_LN_AFE_RST_PWRDWN_CTL_CTLr,
  19917 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19918 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19919 	BCMI_TSCBH_XGXS_TX_LN_AFE_RST_PWRDWN_CTL_CTLr_fields,
  19920 #else
  19921 	0,
  19922 #endif
  19923 #endif
  19924 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19925 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19926 	"TX_LN_AFE_RST_PWRDWN_CTL_CTLr",
  19927 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19928 	"TX_CKRST_CTRL_8X_PLL2X_V1P0_TX_LANE_AFE_RESET_PWRDWN_CONTROL_CONTROL",
  19929 	NULL,
  19930 #endif
  19931 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19932 	0x0, /* 0 */
  19933 	0,
  19934 #endif
  19935 },
  19936 {
  19937 	BCMI_TSCBH_XGXS_TX_LN_RST_N_PWRDN_PIN_KILL_CTLr,
  19938 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19939 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19940 	BCMI_TSCBH_XGXS_TX_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields,
  19941 #else
  19942 	0,
  19943 #endif
  19944 #endif
  19945 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19946 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19947 	"TX_LN_RST_N_PWRDN_PIN_KILL_CTLr",
  19948 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19949 	"TX_CKRST_CTRL_8X_PLL2X_V1P0_TX_LANE_RESET_N_PWRDN_PIN_KILL_CONTROL",
  19950 	NULL,
  19951 #endif
  19952 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19953 	0x0, /* 0 */
  19954 	0,
  19955 #endif
  19956 },
  19957 {
  19958 	BCMI_TSCBH_XGXS_TX_LN_DBG_RST_CTLr,
  19959 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19960 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19961 	BCMI_TSCBH_XGXS_TX_LN_DBG_RST_CTLr_fields,
  19962 #else
  19963 	0,
  19964 #endif
  19965 #endif
  19966 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19967 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19968 	"TX_LN_DBG_RST_CTLr",
  19969 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19970 	"TX_CKRST_CTRL_8X_PLL2X_V1P0_TX_LANE_DEBUG_RESET_CONTROL",
  19971 	NULL,
  19972 #endif
  19973 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19974 	0x3, /* 3 */
  19975 	0,
  19976 #endif
  19977 },
  19978 {
  19979 	BCMI_TSCBH_XGXS_TX_CLK_N_RST_DBG_CTLr,
  19980 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  19981 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  19982 	BCMI_TSCBH_XGXS_TX_CLK_N_RST_DBG_CTLr_fields,
  19983 #else
  19984 	0,
  19985 #endif
  19986 #endif
  19987 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  19988 	PHYMOD_SYMBOL_FLAG_REGISTER,
  19989 	"TX_CLK_N_RST_DBG_CTLr",
  19990 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  19991 	"TX_CKRST_CTRL_8X_PLL2X_V1P0_TX_CLOCK_N_RESET_DEBUG_CONTROL",
  19992 	NULL,
  19993 #endif
  19994 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  19995 	0x0, /* 0 */
  19996 	0,
  19997 #endif
  19998 },
  19999 {
  20000 	BCMI_TSCBH_XGXS_TX_PMD_LN_MODE_STSr,
  20001 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20002 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20003 	BCMI_TSCBH_XGXS_TX_PMD_LN_MODE_STSr_fields,
  20004 #else
  20005 	0,
  20006 #endif
  20007 #endif
  20008 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20009 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20010 	"TX_PMD_LN_MODE_STSr",
  20011 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20012 	"TX_CKRST_CTRL_8X_PLL2X_V1P0_TX_PMD_LANE_MODE_STATUS",
  20013 	NULL,
  20014 #endif
  20015 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20016 	0x0, /* 0 */
  20017 	0,
  20018 #endif
  20019 },
  20020 {
  20021 	BCMI_TSCBH_XGXS_TX_AFE_RST_PWRDN_OSR_MODE_PIN_STSr,
  20022 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20023 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20024 	BCMI_TSCBH_XGXS_TX_AFE_RST_PWRDN_OSR_MODE_PIN_STSr_fields,
  20025 #else
  20026 	0,
  20027 #endif
  20028 #endif
  20029 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20030 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20031 	"TX_AFE_RST_PWRDN_OSR_MODE_PIN_STSr",
  20032 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20033 	"TX_CKRST_CTRL_8X_PLL2X_V1P0_TX_AFE_RESET_PWRDN_OSR_MODE_PIN_STATUS",
  20034 	NULL,
  20035 #endif
  20036 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20037 	0x3, /* 3 */
  20038 	0,
  20039 #endif
  20040 },
  20041 {
  20042 	BCMI_TSCBH_XGXS_TX_CLK_N_RST_MISC_CTLr,
  20043 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20044 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20045 	BCMI_TSCBH_XGXS_TX_CLK_N_RST_MISC_CTLr_fields,
  20046 #else
  20047 	0,
  20048 #endif
  20049 #endif
  20050 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20051 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20052 	"TX_CLK_N_RST_MISC_CTLr",
  20053 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20054 	"TX_CKRST_CTRL_8X_PLL2X_V1P0_TX_CLOCK_N_RESET_MISC_CONTROL",
  20055 	NULL,
  20056 #endif
  20057 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20058 	0x1, /* 1 */
  20059 	0,
  20060 #endif
  20061 },
  20062 {
  20063 	BCMI_TSCBH_XGXS_RXCOM_OSR_MODE_CTLr,
  20064 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20065 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20066 	BCMI_TSCBH_XGXS_RXCOM_OSR_MODE_CTLr_fields,
  20067 #else
  20068 	0,
  20069 #endif
  20070 #endif
  20071 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20072 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20073 	"RXCOM_OSR_MODE_CTLr",
  20074 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20075 	"RXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXCOM_OSR_MODE_CONTROL",
  20076 	NULL,
  20077 #endif
  20078 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20079 	0x0, /* 0 */
  20080 	0,
  20081 #endif
  20082 },
  20083 {
  20084 	BCMI_TSCBH_XGXS_RXCOM_LN_CLK_RST_N_PWRDWN_CTLr,
  20085 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20086 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20087 	BCMI_TSCBH_XGXS_RXCOM_LN_CLK_RST_N_PWRDWN_CTLr_fields,
  20088 #else
  20089 	0,
  20090 #endif
  20091 #endif
  20092 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20093 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20094 	"RXCOM_LN_CLK_RST_N_PWRDWN_CTLr",
  20095 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20096 	"RXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXCOM_LANE_CLK_RESET_N_POWERDOWN_CONTROL",
  20097 	NULL,
  20098 #endif
  20099 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20100 	0x0, /* 0 */
  20101 	0,
  20102 #endif
  20103 },
  20104 {
  20105 	BCMI_TSCBH_XGXS_RXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr,
  20106 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20107 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20108 	BCMI_TSCBH_XGXS_RXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields,
  20109 #else
  20110 	0,
  20111 #endif
  20112 #endif
  20113 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20114 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20115 	"RXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr",
  20116 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20117 	"RXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXCOM_LANE_RESET_N_PWRDN_PIN_KILL_CONTROL",
  20118 	NULL,
  20119 #endif
  20120 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20121 	0x0, /* 0 */
  20122 	0,
  20123 #endif
  20124 },
  20125 {
  20126 	BCMI_TSCBH_XGXS_RXCOM_UC_ACK_LN_CTLr,
  20127 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20128 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20129 	BCMI_TSCBH_XGXS_RXCOM_UC_ACK_LN_CTLr_fields,
  20130 #else
  20131 	0,
  20132 #endif
  20133 #endif
  20134 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20135 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20136 	"RXCOM_UC_ACK_LN_CTLr",
  20137 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20138 	"RXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXCOM_UC_ACK_LANE_CONTROL",
  20139 	NULL,
  20140 #endif
  20141 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20142 	0x0, /* 0 */
  20143 	0,
  20144 #endif
  20145 },
  20146 {
  20147 	BCMI_TSCBH_XGXS_RXCOM_LN_RST_OCC_CTLr,
  20148 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20149 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20150 	BCMI_TSCBH_XGXS_RXCOM_LN_RST_OCC_CTLr_fields,
  20151 #else
  20152 	0,
  20153 #endif
  20154 #endif
  20155 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20156 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20157 	"RXCOM_LN_RST_OCC_CTLr",
  20158 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20159 	"RXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXCOM_LANE_REG_RESET_OCCURRED_CONTROL",
  20160 	NULL,
  20161 #endif
  20162 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20163 	0x1, /* 1 */
  20164 	0,
  20165 #endif
  20166 },
  20167 {
  20168 	BCMI_TSCBH_XGXS_RXCOM_PLL_SEL_CTLr,
  20169 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20170 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20171 	BCMI_TSCBH_XGXS_RXCOM_PLL_SEL_CTLr_fields,
  20172 #else
  20173 	0,
  20174 #endif
  20175 #endif
  20176 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20177 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20178 	"RXCOM_PLL_SEL_CTLr",
  20179 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20180 	"RXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXCOM_PLL_SELECT_CONTROL",
  20181 	NULL,
  20182 #endif
  20183 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20184 	0x0, /* 0 */
  20185 	0,
  20186 #endif
  20187 },
  20188 {
  20189 	BCMI_TSCBH_XGXS_RXCOM_LN_DP_RST_ST_STSr,
  20190 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20191 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20192 	BCMI_TSCBH_XGXS_RXCOM_LN_DP_RST_ST_STSr_fields,
  20193 #else
  20194 	0,
  20195 #endif
  20196 #endif
  20197 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20198 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20199 	"RXCOM_LN_DP_RST_ST_STSr",
  20200 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20201 	"RXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXCOM_LANE_DP_RESET_STATE_STATUS",
  20202 	NULL,
  20203 #endif
  20204 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20205 	0x7, /* 7 */
  20206 	0,
  20207 #endif
  20208 },
  20209 {
  20210 	BCMI_TSCBH_XGXS_RXCOM_MCST_MASK_CTLr,
  20211 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20212 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20213 	BCMI_TSCBH_XGXS_RXCOM_MCST_MASK_CTLr_fields,
  20214 #else
  20215 	0,
  20216 #endif
  20217 #endif
  20218 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20219 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20220 	"RXCOM_MCST_MASK_CTLr",
  20221 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20222 	"RXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXCOM_MULTICAST_MASK_CONTROL",
  20223 	NULL,
  20224 #endif
  20225 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20226 	0x0, /* 0 */
  20227 	0,
  20228 #endif
  20229 },
  20230 {
  20231 	BCMI_TSCBH_XGXS_RXCOM_OSR_MODE_STS_MC_MASKr,
  20232 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20233 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20234 	BCMI_TSCBH_XGXS_RXCOM_OSR_MODE_STS_MC_MASKr_fields,
  20235 #else
  20236 	0,
  20237 #endif
  20238 #endif
  20239 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20240 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20241 	"RXCOM_OSR_MODE_STS_MC_MASKr",
  20242 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20243 	"RXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXCOM_OSR_MODE_STATUS_MC_MASK",
  20244 	NULL,
  20245 #endif
  20246 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20247 	0x0, /* 0 */
  20248 	0,
  20249 #endif
  20250 },
  20251 {
  20252 	BCMI_TSCBH_XGXS_RXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr,
  20253 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20254 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20255 	BCMI_TSCBH_XGXS_RXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr_fields,
  20256 #else
  20257 	0,
  20258 #endif
  20259 #endif
  20260 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20261 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20262 	"RXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr",
  20263 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20264 	"RXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXCOM_AFE_RESET_PWRDN_OSR_MODE_PIN_STATUS",
  20265 	NULL,
  20266 #endif
  20267 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20268 	0x0, /* 0 */
  20269 	0,
  20270 #endif
  20271 },
  20272 {
  20273 	BCMI_TSCBH_XGXS_RXCOM_LN_S_RSTB_CTLr,
  20274 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20275 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20276 	BCMI_TSCBH_XGXS_RXCOM_LN_S_RSTB_CTLr_fields,
  20277 #else
  20278 	0,
  20279 #endif
  20280 #endif
  20281 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20282 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20283 	"RXCOM_LN_S_RSTB_CTLr",
  20284 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20285 	"RXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXCOM_LN_S_RSTB_CONTROL",
  20286 	NULL,
  20287 #endif
  20288 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20289 	0x1, /* 1 */
  20290 	0,
  20291 #endif
  20292 },
  20293 {
  20294 	BCMI_TSCBH_XGXS_TXCOM_OSR_MODE_CTLr,
  20295 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20296 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20297 	BCMI_TSCBH_XGXS_TXCOM_OSR_MODE_CTLr_fields,
  20298 #else
  20299 	0,
  20300 #endif
  20301 #endif
  20302 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20303 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20304 	"TXCOM_OSR_MODE_CTLr",
  20305 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20306 	"TXCOM_CKRST_CTRL_8X_PLL2X_V1P0_TXCOM_OSR_MODE_CONTROL",
  20307 	NULL,
  20308 #endif
  20309 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20310 	0x0, /* 0 */
  20311 	0,
  20312 #endif
  20313 },
  20314 {
  20315 	BCMI_TSCBH_XGXS_TXCOM_LN_CLK_RST_N_PWRDWN_CTLr,
  20316 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20317 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20318 	BCMI_TSCBH_XGXS_TXCOM_LN_CLK_RST_N_PWRDWN_CTLr_fields,
  20319 #else
  20320 	0,
  20321 #endif
  20322 #endif
  20323 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20324 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20325 	"TXCOM_LN_CLK_RST_N_PWRDWN_CTLr",
  20326 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20327 	"TXCOM_CKRST_CTRL_8X_PLL2X_V1P0_TXCOM_LANE_CLK_RESET_N_POWERDOWN_CONTROL",
  20328 	NULL,
  20329 #endif
  20330 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20331 	0x0, /* 0 */
  20332 	0,
  20333 #endif
  20334 },
  20335 {
  20336 	BCMI_TSCBH_XGXS_TXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr,
  20337 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20338 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20339 	BCMI_TSCBH_XGXS_TXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields,
  20340 #else
  20341 	0,
  20342 #endif
  20343 #endif
  20344 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20345 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20346 	"TXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr",
  20347 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20348 	"TXCOM_CKRST_CTRL_8X_PLL2X_V1P0_TXCOM_LANE_RESET_N_PWRDN_PIN_KILL_CONTROL",
  20349 	NULL,
  20350 #endif
  20351 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20352 	0x0, /* 0 */
  20353 	0,
  20354 #endif
  20355 },
  20356 {
  20357 	BCMI_TSCBH_XGXS_TXCOM_UC_ACK_LN_CTLr,
  20358 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20359 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20360 	BCMI_TSCBH_XGXS_TXCOM_UC_ACK_LN_CTLr_fields,
  20361 #else
  20362 	0,
  20363 #endif
  20364 #endif
  20365 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20366 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20367 	"TXCOM_UC_ACK_LN_CTLr",
  20368 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20369 	"TXCOM_CKRST_CTRL_8X_PLL2X_V1P0_TXCOM_UC_ACK_LANE_CONTROL",
  20370 	NULL,
  20371 #endif
  20372 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20373 	0x0, /* 0 */
  20374 	0,
  20375 #endif
  20376 },
  20377 {
  20378 	BCMI_TSCBH_XGXS_TXCOM_LN_RST_OCC_CTLr,
  20379 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20380 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20381 	BCMI_TSCBH_XGXS_TXCOM_LN_RST_OCC_CTLr_fields,
  20382 #else
  20383 	0,
  20384 #endif
  20385 #endif
  20386 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20387 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20388 	"TXCOM_LN_RST_OCC_CTLr",
  20389 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20390 	"TXCOM_CKRST_CTRL_8X_PLL2X_V1P0_TXCOM_LANE_REG_RESET_OCCURRED_CONTROL",
  20391 	NULL,
  20392 #endif
  20393 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20394 	0x1, /* 1 */
  20395 	0,
  20396 #endif
  20397 },
  20398 {
  20399 	BCMI_TSCBH_XGXS_TXCOM_PLL_SEL_CTLr,
  20400 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20401 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20402 	BCMI_TSCBH_XGXS_TXCOM_PLL_SEL_CTLr_fields,
  20403 #else
  20404 	0,
  20405 #endif
  20406 #endif
  20407 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20408 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20409 	"TXCOM_PLL_SEL_CTLr",
  20410 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20411 	"TXCOM_CKRST_CTRL_8X_PLL2X_V1P0_TXCOM_PLL_SELECT_CONTROL",
  20412 	NULL,
  20413 #endif
  20414 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20415 	0x0, /* 0 */
  20416 	0,
  20417 #endif
  20418 },
  20419 {
  20420 	BCMI_TSCBH_XGXS_TXCOM_LN_DP_RST_ST_STSr,
  20421 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20422 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20423 	BCMI_TSCBH_XGXS_TXCOM_LN_DP_RST_ST_STSr_fields,
  20424 #else
  20425 	0,
  20426 #endif
  20427 #endif
  20428 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20429 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20430 	"TXCOM_LN_DP_RST_ST_STSr",
  20431 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20432 	"TXCOM_CKRST_CTRL_8X_PLL2X_V1P0_TXCOM_LANE_DP_RESET_STATE_STATUS",
  20433 	NULL,
  20434 #endif
  20435 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20436 	0x7, /* 7 */
  20437 	0,
  20438 #endif
  20439 },
  20440 {
  20441 	BCMI_TSCBH_XGXS_TXCOM_MCST_MASK_CTLr,
  20442 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20443 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20444 	BCMI_TSCBH_XGXS_TXCOM_MCST_MASK_CTLr_fields,
  20445 #else
  20446 	0,
  20447 #endif
  20448 #endif
  20449 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20450 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20451 	"TXCOM_MCST_MASK_CTLr",
  20452 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20453 	"TXCOM_CKRST_CTRL_8X_PLL2X_V1P0_TXCOM_MULTICAST_MASK_CONTROL",
  20454 	NULL,
  20455 #endif
  20456 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20457 	0x0, /* 0 */
  20458 	0,
  20459 #endif
  20460 },
  20461 {
  20462 	BCMI_TSCBH_XGXS_TXCOM_OSR_MODE_STS_MC_MASKr,
  20463 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20464 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20465 	BCMI_TSCBH_XGXS_TXCOM_OSR_MODE_STS_MC_MASKr_fields,
  20466 #else
  20467 	0,
  20468 #endif
  20469 #endif
  20470 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20471 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20472 	"TXCOM_OSR_MODE_STS_MC_MASKr",
  20473 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20474 	"TXCOM_CKRST_CTRL_8X_PLL2X_V1P0_TXCOM_OSR_MODE_STATUS_MC_MASK",
  20475 	NULL,
  20476 #endif
  20477 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20478 	0x0, /* 0 */
  20479 	0,
  20480 #endif
  20481 },
  20482 {
  20483 	BCMI_TSCBH_XGXS_TXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr,
  20484 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20485 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20486 	BCMI_TSCBH_XGXS_TXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr_fields,
  20487 #else
  20488 	0,
  20489 #endif
  20490 #endif
  20491 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20492 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20493 	"TXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr",
  20494 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20495 	"TXCOM_CKRST_CTRL_8X_PLL2X_V1P0_TXCOM_AFE_RESET_PWRDN_OSR_MODE_PIN_STATUS",
  20496 	NULL,
  20497 #endif
  20498 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20499 	0x0, /* 0 */
  20500 	0,
  20501 #endif
  20502 },
  20503 {
  20504 	BCMI_TSCBH_XGXS_TXCOM_LN_S_RSTB_CTLr,
  20505 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20506 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20507 	BCMI_TSCBH_XGXS_TXCOM_LN_S_RSTB_CTLr_fields,
  20508 #else
  20509 	0,
  20510 #endif
  20511 #endif
  20512 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20513 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20514 	"TXCOM_LN_S_RSTB_CTLr",
  20515 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20516 	"TXCOM_CKRST_CTRL_8X_PLL2X_V1P0_TXCOM_LN_S_RSTB_CONTROL",
  20517 	NULL,
  20518 #endif
  20519 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20520 	0x1, /* 1 */
  20521 	0,
  20522 #endif
  20523 },
  20524 {
  20525 	BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_CFG0r,
  20526 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20527 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20528 	BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_CFG0r_fields,
  20529 #else
  20530 	0,
  20531 #endif
  20532 #endif
  20533 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20534 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20535 	"TLB_RX_B_TLB_RX_B_CFG0r",
  20536 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20537 	"TLB_RX_B_TLB_RX_B_CONFIG_0",
  20538 	NULL,
  20539 #endif
  20540 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20541 	0x2110, /* 8464 */
  20542 	0,
  20543 #endif
  20544 },
  20545 {
  20546 	BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_CFG1r,
  20547 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20548 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20549 	BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_CFG1r_fields,
  20550 #else
  20551 	0,
  20552 #endif
  20553 #endif
  20554 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20555 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20556 	"TLB_RX_B_TLB_RX_B_CFG1r",
  20557 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20558 	"TLB_RX_B_TLB_RX_B_CONFIG_1",
  20559 	NULL,
  20560 #endif
  20561 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20562 	0xf628, /* 63016 */
  20563 	0,
  20564 #endif
  20565 },
  20566 {
  20567 	BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_CFG2r,
  20568 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20569 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20570 	BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_CFG2r_fields,
  20571 #else
  20572 	0,
  20573 #endif
  20574 #endif
  20575 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20576 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20577 	"TLB_RX_B_TLB_RX_B_CFG2r",
  20578 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20579 	"TLB_RX_B_TLB_RX_B_CONFIG_2",
  20580 	NULL,
  20581 #endif
  20582 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20583 	0x3a0, /* 928 */
  20584 	0,
  20585 #endif
  20586 },
  20587 {
  20588 	BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_CFG3r,
  20589 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20590 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20591 	BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_CFG3r_fields,
  20592 #else
  20593 	0,
  20594 #endif
  20595 #endif
  20596 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20597 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20598 	"TLB_RX_B_TLB_RX_B_CFG3r",
  20599 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20600 	"TLB_RX_B_TLB_RX_B_CONFIG_3",
  20601 	NULL,
  20602 #endif
  20603 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20604 	0x80, /* 128 */
  20605 	0,
  20606 #endif
  20607 },
  20608 {
  20609 	BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_CFG4r,
  20610 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20611 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20612 	BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_CFG4r_fields,
  20613 #else
  20614 	0,
  20615 #endif
  20616 #endif
  20617 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20618 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20619 	"TLB_RX_B_TLB_RX_B_CFG4r",
  20620 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20621 	"TLB_RX_B_TLB_RX_B_CONFIG_4",
  20622 	NULL,
  20623 #endif
  20624 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20625 	0xf, /* 15 */
  20626 	0,
  20627 #endif
  20628 },
  20629 {
  20630 	BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_STS7r,
  20631 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20632 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20633 	BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_STS7r_fields,
  20634 #else
  20635 	0,
  20636 #endif
  20637 #endif
  20638 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20639 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20640 	"TLB_RX_B_TLB_RX_B_STS7r",
  20641 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20642 	"TLB_RX_B_TLB_RX_B_STATUS_7",
  20643 	NULL,
  20644 #endif
  20645 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20646 	0x0, /* 0 */
  20647 	0,
  20648 #endif
  20649 },
  20650 {
  20651 	BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_STS6r,
  20652 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20653 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20654 	BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_STS6r_fields,
  20655 #else
  20656 	0,
  20657 #endif
  20658 #endif
  20659 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20660 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20661 	"TLB_RX_B_TLB_RX_B_STS6r",
  20662 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20663 	"TLB_RX_B_TLB_RX_B_STATUS_6",
  20664 	NULL,
  20665 #endif
  20666 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20667 	0x0, /* 0 */
  20668 	0,
  20669 #endif
  20670 },
  20671 {
  20672 	BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_STS5r,
  20673 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20674 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20675 	BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_STS5r_fields,
  20676 #else
  20677 	0,
  20678 #endif
  20679 #endif
  20680 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20681 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20682 	"TLB_RX_B_TLB_RX_B_STS5r",
  20683 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20684 	"TLB_RX_B_TLB_RX_B_STATUS_5",
  20685 	NULL,
  20686 #endif
  20687 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20688 	0x0, /* 0 */
  20689 	0,
  20690 #endif
  20691 },
  20692 {
  20693 	BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_STS4r,
  20694 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20695 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20696 	BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_STS4r_fields,
  20697 #else
  20698 	0,
  20699 #endif
  20700 #endif
  20701 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20702 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20703 	"TLB_RX_B_TLB_RX_B_STS4r",
  20704 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20705 	"TLB_RX_B_TLB_RX_B_STATUS_4",
  20706 	NULL,
  20707 #endif
  20708 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20709 	0x0, /* 0 */
  20710 	0,
  20711 #endif
  20712 },
  20713 {
  20714 	BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_STS3r,
  20715 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20716 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20717 	BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_STS3r_fields,
  20718 #else
  20719 	0,
  20720 #endif
  20721 #endif
  20722 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20723 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20724 	"TLB_RX_B_TLB_RX_B_STS3r",
  20725 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20726 	"TLB_RX_B_TLB_RX_B_STATUS_3",
  20727 	NULL,
  20728 #endif
  20729 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20730 	0x0, /* 0 */
  20731 	0,
  20732 #endif
  20733 },
  20734 {
  20735 	BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_STS2r,
  20736 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20737 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20738 	BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_STS2r_fields,
  20739 #else
  20740 	0,
  20741 #endif
  20742 #endif
  20743 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20744 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20745 	"TLB_RX_B_TLB_RX_B_STS2r",
  20746 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20747 	"TLB_RX_B_TLB_RX_B_STATUS_2",
  20748 	NULL,
  20749 #endif
  20750 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20751 	0x0, /* 0 */
  20752 	0,
  20753 #endif
  20754 },
  20755 {
  20756 	BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_STS1r,
  20757 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20758 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20759 	BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_STS1r_fields,
  20760 #else
  20761 	0,
  20762 #endif
  20763 #endif
  20764 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20765 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20766 	"TLB_RX_B_TLB_RX_B_STS1r",
  20767 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20768 	"TLB_RX_B_TLB_RX_B_STATUS_1",
  20769 	NULL,
  20770 #endif
  20771 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20772 	0x0, /* 0 */
  20773 	0,
  20774 #endif
  20775 },
  20776 {
  20777 	BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_STS0r,
  20778 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20779 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20780 	BCMI_TSCBH_XGXS_TLB_RX_B_TLB_RX_B_STS0r_fields,
  20781 #else
  20782 	0,
  20783 #endif
  20784 #endif
  20785 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20786 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20787 	"TLB_RX_B_TLB_RX_B_STS0r",
  20788 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20789 	"TLB_RX_B_TLB_RX_B_STATUS_0",
  20790 	NULL,
  20791 #endif
  20792 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20793 	0x0, /* 0 */
  20794 	0,
  20795 #endif
  20796 },
  20797 {
  20798 	BCMI_TSCBH_XGXS_TLB_RX_C_TLB_RX_C_CFG0r,
  20799 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20800 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20801 	BCMI_TSCBH_XGXS_TLB_RX_C_TLB_RX_C_CFG0r_fields,
  20802 #else
  20803 	0,
  20804 #endif
  20805 #endif
  20806 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20807 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20808 	"TLB_RX_C_TLB_RX_C_CFG0r",
  20809 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20810 	"TLB_RX_C_TLB_RX_C_CONFIG_0",
  20811 	NULL,
  20812 #endif
  20813 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20814 	0x440c, /* 17420 */
  20815 	0,
  20816 #endif
  20817 },
  20818 {
  20819 	BCMI_TSCBH_XGXS_TLB_RX_C_TLB_RX_C_CFG1r,
  20820 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20821 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20822 	BCMI_TSCBH_XGXS_TLB_RX_C_TLB_RX_C_CFG1r_fields,
  20823 #else
  20824 	0,
  20825 #endif
  20826 #endif
  20827 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20828 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20829 	"TLB_RX_C_TLB_RX_C_CFG1r",
  20830 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20831 	"TLB_RX_C_TLB_RX_C_CONFIG_1",
  20832 	NULL,
  20833 #endif
  20834 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20835 	0x3, /* 3 */
  20836 	0,
  20837 #endif
  20838 },
  20839 {
  20840 	BCMI_TSCBH_XGXS_TLB_RX_C_NUM_ERRS_IN_FEC_FRAMES_STS_HIr,
  20841 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20842 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20843 	BCMI_TSCBH_XGXS_TLB_RX_C_NUM_ERRS_IN_FEC_FRAMES_STS_HIr_fields,
  20844 #else
  20845 	0,
  20846 #endif
  20847 #endif
  20848 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20849 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20850 	"TLB_RX_C_NUM_ERRS_IN_FEC_FRAMES_STS_HIr",
  20851 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20852 	"TLB_RX_C_NUM_ERRORS_IN_FEC_FRAMES_STATUS_HI",
  20853 	NULL,
  20854 #endif
  20855 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20856 	0x0, /* 0 */
  20857 	0,
  20858 #endif
  20859 },
  20860 {
  20861 	BCMI_TSCBH_XGXS_TLB_RX_C_NUM_ERRS_IN_FEC_FRAMES_STS_LOr,
  20862 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20863 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20864 	BCMI_TSCBH_XGXS_TLB_RX_C_NUM_ERRS_IN_FEC_FRAMES_STS_LOr_fields,
  20865 #else
  20866 	0,
  20867 #endif
  20868 #endif
  20869 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20870 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20871 	"TLB_RX_C_NUM_ERRS_IN_FEC_FRAMES_STS_LOr",
  20872 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20873 	"TLB_RX_C_NUM_ERRORS_IN_FEC_FRAMES_STATUS_LO",
  20874 	NULL,
  20875 #endif
  20876 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20877 	0x0, /* 0 */
  20878 	0,
  20879 #endif
  20880 },
  20881 {
  20882 	BCMI_TSCBH_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS7r,
  20883 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20884 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20885 	BCMI_TSCBH_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS7r_fields,
  20886 #else
  20887 	0,
  20888 #endif
  20889 #endif
  20890 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20891 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20892 	"TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS7r",
  20893 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20894 	"TLB_RX_C_COUNT_HISTOGRAM_ERROR_OFFSET_7",
  20895 	NULL,
  20896 #endif
  20897 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20898 	0x0, /* 0 */
  20899 	0,
  20900 #endif
  20901 },
  20902 {
  20903 	BCMI_TSCBH_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS6r,
  20904 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20905 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20906 	BCMI_TSCBH_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS6r_fields,
  20907 #else
  20908 	0,
  20909 #endif
  20910 #endif
  20911 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20912 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20913 	"TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS6r",
  20914 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20915 	"TLB_RX_C_COUNT_HISTOGRAM_ERROR_OFFSET_6",
  20916 	NULL,
  20917 #endif
  20918 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20919 	0x0, /* 0 */
  20920 	0,
  20921 #endif
  20922 },
  20923 {
  20924 	BCMI_TSCBH_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS5r,
  20925 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20926 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20927 	BCMI_TSCBH_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS5r_fields,
  20928 #else
  20929 	0,
  20930 #endif
  20931 #endif
  20932 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20933 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20934 	"TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS5r",
  20935 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20936 	"TLB_RX_C_COUNT_HISTOGRAM_ERROR_OFFSET_5",
  20937 	NULL,
  20938 #endif
  20939 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20940 	0x0, /* 0 */
  20941 	0,
  20942 #endif
  20943 },
  20944 {
  20945 	BCMI_TSCBH_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS4r,
  20946 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20947 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20948 	BCMI_TSCBH_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS4r_fields,
  20949 #else
  20950 	0,
  20951 #endif
  20952 #endif
  20953 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20954 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20955 	"TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS4r",
  20956 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20957 	"TLB_RX_C_COUNT_HISTOGRAM_ERROR_OFFSET_4",
  20958 	NULL,
  20959 #endif
  20960 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20961 	0x0, /* 0 */
  20962 	0,
  20963 #endif
  20964 },
  20965 {
  20966 	BCMI_TSCBH_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS3r,
  20967 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20968 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20969 	BCMI_TSCBH_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS3r_fields,
  20970 #else
  20971 	0,
  20972 #endif
  20973 #endif
  20974 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20975 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20976 	"TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS3r",
  20977 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20978 	"TLB_RX_C_COUNT_HISTOGRAM_ERROR_OFFSET_3",
  20979 	NULL,
  20980 #endif
  20981 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  20982 	0x0, /* 0 */
  20983 	0,
  20984 #endif
  20985 },
  20986 {
  20987 	BCMI_TSCBH_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS2r,
  20988 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  20989 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  20990 	BCMI_TSCBH_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS2r_fields,
  20991 #else
  20992 	0,
  20993 #endif
  20994 #endif
  20995 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  20996 	PHYMOD_SYMBOL_FLAG_REGISTER,
  20997 	"TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS2r",
  20998 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  20999 	"TLB_RX_C_COUNT_HISTOGRAM_ERROR_OFFSET_2",
  21000 	NULL,
  21001 #endif
  21002 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21003 	0x0, /* 0 */
  21004 	0,
  21005 #endif
  21006 },
  21007 {
  21008 	BCMI_TSCBH_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS1r,
  21009 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21010 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21011 	BCMI_TSCBH_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS1r_fields,
  21012 #else
  21013 	0,
  21014 #endif
  21015 #endif
  21016 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21017 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21018 	"TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS1r",
  21019 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21020 	"TLB_RX_C_COUNT_HISTOGRAM_ERROR_OFFSET_1",
  21021 	NULL,
  21022 #endif
  21023 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21024 	0x0, /* 0 */
  21025 	0,
  21026 #endif
  21027 },
  21028 {
  21029 	BCMI_TSCBH_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS0r,
  21030 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21031 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21032 	BCMI_TSCBH_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS0r_fields,
  21033 #else
  21034 	0,
  21035 #endif
  21036 #endif
  21037 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21038 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21039 	"TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS0r",
  21040 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21041 	"TLB_RX_C_COUNT_HISTOGRAM_ERROR_OFFSET_0",
  21042 	NULL,
  21043 #endif
  21044 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21045 	0x0, /* 0 */
  21046 	0,
  21047 #endif
  21048 },
  21049 {
  21050 	BCMI_TSCBH_XGXS_UC_CLK_CTL0r,
  21051 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21052 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21053 	BCMI_TSCBH_XGXS_UC_CLK_CTL0r_fields,
  21054 #else
  21055 	0,
  21056 #endif
  21057 #endif
  21058 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21059 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21060 	"UC_CLK_CTL0r",
  21061 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21062 	"MICRO_A_CLOCK_CONTROL0",
  21063 	NULL,
  21064 #endif
  21065 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21066 	0x0, /* 0 */
  21067 	0,
  21068 #endif
  21069 },
  21070 {
  21071 	BCMI_TSCBH_XGXS_UC_RST_CTL0r,
  21072 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21073 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21074 	BCMI_TSCBH_XGXS_UC_RST_CTL0r_fields,
  21075 #else
  21076 	0,
  21077 #endif
  21078 #endif
  21079 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21080 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21081 	"UC_RST_CTL0r",
  21082 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21083 	"MICRO_A_RESET_CONTROL0",
  21084 	NULL,
  21085 #endif
  21086 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21087 	0x4000, /* 16384 */
  21088 	0,
  21089 #endif
  21090 },
  21091 {
  21092 	BCMI_TSCBH_XGXS_UC_AHB_CTL0r,
  21093 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21094 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21095 	BCMI_TSCBH_XGXS_UC_AHB_CTL0r_fields,
  21096 #else
  21097 	0,
  21098 #endif
  21099 #endif
  21100 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21101 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21102 	"UC_AHB_CTL0r",
  21103 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21104 	"MICRO_A_AHB_CONTROL0",
  21105 	NULL,
  21106 #endif
  21107 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21108 	0x0, /* 0 */
  21109 	0,
  21110 #endif
  21111 },
  21112 {
  21113 	BCMI_TSCBH_XGXS_UC_AHB_STS0r,
  21114 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21115 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21116 	BCMI_TSCBH_XGXS_UC_AHB_STS0r_fields,
  21117 #else
  21118 	0,
  21119 #endif
  21120 #endif
  21121 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21122 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21123 	"UC_AHB_STS0r",
  21124 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21125 	"MICRO_A_AHB_STATUS0",
  21126 	NULL,
  21127 #endif
  21128 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21129 	0x0, /* 0 */
  21130 	0,
  21131 #endif
  21132 },
  21133 {
  21134 	BCMI_TSCBH_XGXS_UC_AHB_WRADDR_LSWr,
  21135 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21136 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21137 	BCMI_TSCBH_XGXS_UC_AHB_WRADDR_LSWr_fields,
  21138 #else
  21139 	0,
  21140 #endif
  21141 #endif
  21142 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21143 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21144 	"UC_AHB_WRADDR_LSWr",
  21145 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21146 	"MICRO_A_AHB_WRADDR_LSW",
  21147 	NULL,
  21148 #endif
  21149 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21150 	0x0, /* 0 */
  21151 	0,
  21152 #endif
  21153 },
  21154 {
  21155 	BCMI_TSCBH_XGXS_UC_AHB_WRADDR_MSWr,
  21156 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21157 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21158 	BCMI_TSCBH_XGXS_UC_AHB_WRADDR_MSWr_fields,
  21159 #else
  21160 	0,
  21161 #endif
  21162 #endif
  21163 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21164 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21165 	"UC_AHB_WRADDR_MSWr",
  21166 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21167 	"MICRO_A_AHB_WRADDR_MSW",
  21168 	NULL,
  21169 #endif
  21170 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21171 	0x0, /* 0 */
  21172 	0,
  21173 #endif
  21174 },
  21175 {
  21176 	BCMI_TSCBH_XGXS_UC_AHB_WRDATA_LSWr,
  21177 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21178 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21179 	BCMI_TSCBH_XGXS_UC_AHB_WRDATA_LSWr_fields,
  21180 #else
  21181 	0,
  21182 #endif
  21183 #endif
  21184 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21185 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21186 	"UC_AHB_WRDATA_LSWr",
  21187 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21188 	"MICRO_A_AHB_WRDATA_LSW",
  21189 	NULL,
  21190 #endif
  21191 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21192 	0x0, /* 0 */
  21193 	0,
  21194 #endif
  21195 },
  21196 {
  21197 	BCMI_TSCBH_XGXS_UC_AHB_WRDATA_MSWr,
  21198 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21199 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21200 	BCMI_TSCBH_XGXS_UC_AHB_WRDATA_MSWr_fields,
  21201 #else
  21202 	0,
  21203 #endif
  21204 #endif
  21205 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21206 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21207 	"UC_AHB_WRDATA_MSWr",
  21208 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21209 	"MICRO_A_AHB_WRDATA_MSW",
  21210 	NULL,
  21211 #endif
  21212 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21213 	0x0, /* 0 */
  21214 	0,
  21215 #endif
  21216 },
  21217 {
  21218 	BCMI_TSCBH_XGXS_UC_AHB_RDADDR_LSWr,
  21219 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21220 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21221 	BCMI_TSCBH_XGXS_UC_AHB_RDADDR_LSWr_fields,
  21222 #else
  21223 	0,
  21224 #endif
  21225 #endif
  21226 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21227 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21228 	"UC_AHB_RDADDR_LSWr",
  21229 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21230 	"MICRO_A_AHB_RDADDR_LSW",
  21231 	NULL,
  21232 #endif
  21233 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21234 	0x0, /* 0 */
  21235 	0,
  21236 #endif
  21237 },
  21238 {
  21239 	BCMI_TSCBH_XGXS_UC_AHB_RDADDR_MSWr,
  21240 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21241 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21242 	BCMI_TSCBH_XGXS_UC_AHB_RDADDR_MSWr_fields,
  21243 #else
  21244 	0,
  21245 #endif
  21246 #endif
  21247 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21248 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21249 	"UC_AHB_RDADDR_MSWr",
  21250 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21251 	"MICRO_A_AHB_RDADDR_MSW",
  21252 	NULL,
  21253 #endif
  21254 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21255 	0x0, /* 0 */
  21256 	0,
  21257 #endif
  21258 },
  21259 {
  21260 	BCMI_TSCBH_XGXS_UC_AHB_RDDATA_LSWr,
  21261 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21262 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21263 	BCMI_TSCBH_XGXS_UC_AHB_RDDATA_LSWr_fields,
  21264 #else
  21265 	0,
  21266 #endif
  21267 #endif
  21268 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21269 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21270 	"UC_AHB_RDDATA_LSWr",
  21271 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21272 	"MICRO_A_AHB_RDDATA_LSW",
  21273 	NULL,
  21274 #endif
  21275 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21276 	0x0, /* 0 */
  21277 	0,
  21278 #endif
  21279 },
  21280 {
  21281 	BCMI_TSCBH_XGXS_UC_AHB_RDDATA_MSWr,
  21282 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21283 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21284 	BCMI_TSCBH_XGXS_UC_AHB_RDDATA_MSWr_fields,
  21285 #else
  21286 	0,
  21287 #endif
  21288 #endif
  21289 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21290 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21291 	"UC_AHB_RDDATA_MSWr",
  21292 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21293 	"MICRO_A_AHB_RDDATA_MSW",
  21294 	NULL,
  21295 #endif
  21296 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21297 	0x0, /* 0 */
  21298 	0,
  21299 #endif
  21300 },
  21301 {
  21302 	BCMI_TSCBH_XGXS_UC_PRAMIF_CTL0r,
  21303 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21304 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21305 	BCMI_TSCBH_XGXS_UC_PRAMIF_CTL0r_fields,
  21306 #else
  21307 	0,
  21308 #endif
  21309 #endif
  21310 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21311 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21312 	"UC_PRAMIF_CTL0r",
  21313 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21314 	"MICRO_A_PRAMIF_CONTROL0",
  21315 	NULL,
  21316 #endif
  21317 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21318 	0x0, /* 0 */
  21319 	0,
  21320 #endif
  21321 },
  21322 {
  21323 	BCMI_TSCBH_XGXS_UC_PRAMIF_AHB_WRADDR_LSWr,
  21324 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21325 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21326 	BCMI_TSCBH_XGXS_UC_PRAMIF_AHB_WRADDR_LSWr_fields,
  21327 #else
  21328 	0,
  21329 #endif
  21330 #endif
  21331 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21332 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21333 	"UC_PRAMIF_AHB_WRADDR_LSWr",
  21334 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21335 	"MICRO_A_PRAMIF_AHB_WRADDR_LSW",
  21336 	NULL,
  21337 #endif
  21338 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21339 	0x0, /* 0 */
  21340 	0,
  21341 #endif
  21342 },
  21343 {
  21344 	BCMI_TSCBH_XGXS_UC_PRAMIF_AHB_WRADDR_MSWr,
  21345 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21346 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21347 	BCMI_TSCBH_XGXS_UC_PRAMIF_AHB_WRADDR_MSWr_fields,
  21348 #else
  21349 	0,
  21350 #endif
  21351 #endif
  21352 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21353 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21354 	"UC_PRAMIF_AHB_WRADDR_MSWr",
  21355 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21356 	"MICRO_A_PRAMIF_AHB_WRADDR_MSW",
  21357 	NULL,
  21358 #endif
  21359 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21360 	0x0, /* 0 */
  21361 	0,
  21362 #endif
  21363 },
  21364 {
  21365 	BCMI_TSCBH_XGXS_UC_PVT_STS0r,
  21366 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21367 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21368 	BCMI_TSCBH_XGXS_UC_PVT_STS0r_fields,
  21369 #else
  21370 	0,
  21371 #endif
  21372 #endif
  21373 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21374 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21375 	"UC_PVT_STS0r",
  21376 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21377 	"MICRO_B_PVT_STATUS0",
  21378 	NULL,
  21379 #endif
  21380 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21381 	0x0, /* 0 */
  21382 	0,
  21383 #endif
  21384 },
  21385 {
  21386 	BCMI_TSCBH_XGXS_UC_RMI_AHB_CTL1r,
  21387 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21388 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21389 	BCMI_TSCBH_XGXS_UC_RMI_AHB_CTL1r_fields,
  21390 #else
  21391 	0,
  21392 #endif
  21393 #endif
  21394 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21395 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21396 	"UC_RMI_AHB_CTL1r",
  21397 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21398 	"MICRO_B_RMI_AHB_CONTROL1",
  21399 	NULL,
  21400 #endif
  21401 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21402 	0x0, /* 0 */
  21403 	0,
  21404 #endif
  21405 },
  21406 {
  21407 	BCMI_TSCBH_XGXS_UC_RMI_AHB_STS1r,
  21408 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21409 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21410 	BCMI_TSCBH_XGXS_UC_RMI_AHB_STS1r_fields,
  21411 #else
  21412 	0,
  21413 #endif
  21414 #endif
  21415 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21416 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21417 	"UC_RMI_AHB_STS1r",
  21418 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21419 	"MICRO_B_RMI_AHB_STATUS1",
  21420 	NULL,
  21421 #endif
  21422 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21423 	0x0, /* 0 */
  21424 	0,
  21425 #endif
  21426 },
  21427 {
  21428 	BCMI_TSCBH_XGXS_UC_RMI_RA_AINC_NXT_WRADDR_LSWr,
  21429 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21430 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21431 	BCMI_TSCBH_XGXS_UC_RMI_RA_AINC_NXT_WRADDR_LSWr_fields,
  21432 #else
  21433 	0,
  21434 #endif
  21435 #endif
  21436 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21437 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21438 	"UC_RMI_RA_AINC_NXT_WRADDR_LSWr",
  21439 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21440 	"MICRO_B_RMI_RA_AUTOINC_NXT_WRADDR_LSW",
  21441 	NULL,
  21442 #endif
  21443 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21444 	0x0, /* 0 */
  21445 	0,
  21446 #endif
  21447 },
  21448 {
  21449 	BCMI_TSCBH_XGXS_UC_RMI_RA_AINC_NXT_RDADDR_LSWr,
  21450 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21451 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21452 	BCMI_TSCBH_XGXS_UC_RMI_RA_AINC_NXT_RDADDR_LSWr_fields,
  21453 #else
  21454 	0,
  21455 #endif
  21456 #endif
  21457 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21458 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21459 	"UC_RMI_RA_AINC_NXT_RDADDR_LSWr",
  21460 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21461 	"MICRO_B_RMI_RA_AUTOINC_NXT_RDADDR_LSW",
  21462 	NULL,
  21463 #endif
  21464 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21465 	0x0, /* 0 */
  21466 	0,
  21467 #endif
  21468 },
  21469 {
  21470 	BCMI_TSCBH_XGXS_UC_RMI_PR_AINC_NXT_WRADDR_LSWr,
  21471 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21472 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21473 	BCMI_TSCBH_XGXS_UC_RMI_PR_AINC_NXT_WRADDR_LSWr_fields,
  21474 #else
  21475 	0,
  21476 #endif
  21477 #endif
  21478 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21479 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21480 	"UC_RMI_PR_AINC_NXT_WRADDR_LSWr",
  21481 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21482 	"MICRO_B_RMI_PR_AUTOINC_NXT_WRADDR_LSW",
  21483 	NULL,
  21484 #endif
  21485 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21486 	0x0, /* 0 */
  21487 	0,
  21488 #endif
  21489 },
  21490 {
  21491 	BCMI_TSCBH_XGXS_UC_RMI_PVT_CTL0r,
  21492 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21493 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21494 	BCMI_TSCBH_XGXS_UC_RMI_PVT_CTL0r_fields,
  21495 #else
  21496 	0,
  21497 #endif
  21498 #endif
  21499 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21500 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21501 	"UC_RMI_PVT_CTL0r",
  21502 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21503 	"MICRO_B_RMI_PVT_CONTROL0",
  21504 	NULL,
  21505 #endif
  21506 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21507 	0x0, /* 0 */
  21508 	0,
  21509 #endif
  21510 },
  21511 {
  21512 	BCMI_TSCBH_XGXS_UC_RMI_RAM_CR_CRCCTL0r,
  21513 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21514 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21515 	BCMI_TSCBH_XGXS_UC_RMI_RAM_CR_CRCCTL0r_fields,
  21516 #else
  21517 	0,
  21518 #endif
  21519 #endif
  21520 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21521 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21522 	"UC_RMI_RAM_CR_CRCCTL0r",
  21523 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21524 	"MICRO_B_RMI_RAM_CR_CRCCONTROL0",
  21525 	NULL,
  21526 #endif
  21527 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21528 	0x3, /* 3 */
  21529 	0,
  21530 #endif
  21531 },
  21532 {
  21533 	BCMI_TSCBH_XGXS_UC_RMI_RAM_CR_CRCSTS0r,
  21534 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21535 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21536 	BCMI_TSCBH_XGXS_UC_RMI_RAM_CR_CRCSTS0r_fields,
  21537 #else
  21538 	0,
  21539 #endif
  21540 #endif
  21541 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21542 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21543 	"UC_RMI_RAM_CR_CRCSTS0r",
  21544 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21545 	"MICRO_B_RMI_RAM_CR_CRCSTATUS0",
  21546 	NULL,
  21547 #endif
  21548 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21549 	0xffff, /* 65535 */
  21550 	0,
  21551 #endif
  21552 },
  21553 {
  21554 	BCMI_TSCBH_XGXS_UC_RMI_UC_HARDFAULT_CTL0r,
  21555 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21556 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21557 	BCMI_TSCBH_XGXS_UC_RMI_UC_HARDFAULT_CTL0r_fields,
  21558 #else
  21559 	0,
  21560 #endif
  21561 #endif
  21562 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21563 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21564 	"UC_RMI_UC_HARDFAULT_CTL0r",
  21565 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21566 	"MICRO_B_RMI_MICRO_HARDFAULT_CONTROL0",
  21567 	NULL,
  21568 #endif
  21569 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21570 	0xe01, /* 3585 */
  21571 	0,
  21572 #endif
  21573 },
  21574 {
  21575 	BCMI_TSCBH_XGXS_UC_RMI_UC_SDK_STS0r,
  21576 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21577 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21578 	BCMI_TSCBH_XGXS_UC_RMI_UC_SDK_STS0r_fields,
  21579 #else
  21580 	0,
  21581 #endif
  21582 #endif
  21583 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21584 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21585 	"UC_RMI_UC_SDK_STS0r",
  21586 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21587 	"MICRO_B_RMI_MICRO_SDK_STATUS0",
  21588 	NULL,
  21589 #endif
  21590 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21591 	0x4000, /* 16384 */
  21592 	0,
  21593 #endif
  21594 },
  21595 {
  21596 	BCMI_TSCBH_XGXS_UC_RMI_UC_DBGGER_ID_LSWr,
  21597 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21598 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21599 	BCMI_TSCBH_XGXS_UC_RMI_UC_DBGGER_ID_LSWr_fields,
  21600 #else
  21601 	0,
  21602 #endif
  21603 #endif
  21604 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21605 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21606 	"UC_RMI_UC_DBGGER_ID_LSWr",
  21607 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21608 	"MICRO_B_RMI_MICRO_DEBUGGER_ID_LSW",
  21609 	NULL,
  21610 #endif
  21611 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21612 	0x617f, /* 24959 */
  21613 	0,
  21614 #endif
  21615 },
  21616 {
  21617 	BCMI_TSCBH_XGXS_UC_RMI_UC_DBGGER_ID_MSWr,
  21618 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21619 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21620 	BCMI_TSCBH_XGXS_UC_RMI_UC_DBGGER_ID_MSWr_fields,
  21621 #else
  21622 	0,
  21623 #endif
  21624 #endif
  21625 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21626 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21627 	"UC_RMI_UC_DBGGER_ID_MSWr",
  21628 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21629 	"MICRO_B_RMI_MICRO_DEBUGGER_ID_MSW",
  21630 	NULL,
  21631 #endif
  21632 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21633 	0x36, /* 54 */
  21634 	0,
  21635 #endif
  21636 },
  21637 {
  21638 	BCMI_TSCBH_XGXS_UC_RMI_UC_MISC_STS0r,
  21639 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21640 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21641 	BCMI_TSCBH_XGXS_UC_RMI_UC_MISC_STS0r_fields,
  21642 #else
  21643 	0,
  21644 #endif
  21645 #endif
  21646 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21647 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21648 	"UC_RMI_UC_MISC_STS0r",
  21649 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21650 	"MICRO_B_RMI_MICRO_MISC_STATUS0",
  21651 	NULL,
  21652 #endif
  21653 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21654 	0x0, /* 0 */
  21655 	0,
  21656 #endif
  21657 },
  21658 {
  21659 	BCMI_TSCBH_XGXS_UC_RMI_UC_DBGGER_CTL0r,
  21660 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21661 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21662 	BCMI_TSCBH_XGXS_UC_RMI_UC_DBGGER_CTL0r_fields,
  21663 #else
  21664 	0,
  21665 #endif
  21666 #endif
  21667 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21668 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21669 	"UC_RMI_UC_DBGGER_CTL0r",
  21670 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21671 	"MICRO_B_RMI_MICRO_DEBUGGER_CONTROL0",
  21672 	NULL,
  21673 #endif
  21674 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21675 	0x0, /* 0 */
  21676 	0,
  21677 #endif
  21678 },
  21679 {
  21680 	BCMI_TSCBH_XGXS_UC_RAM_ECCCTL0r,
  21681 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21682 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21683 	BCMI_TSCBH_XGXS_UC_RAM_ECCCTL0r_fields,
  21684 #else
  21685 	0,
  21686 #endif
  21687 #endif
  21688 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21689 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21690 	"UC_RAM_ECCCTL0r",
  21691 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21692 	"MICRO_C_RAM_ECCCONTROL0",
  21693 	NULL,
  21694 #endif
  21695 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21696 	0x0, /* 0 */
  21697 	0,
  21698 #endif
  21699 },
  21700 {
  21701 	BCMI_TSCBH_XGXS_UC_RAM_ECCCTL1r,
  21702 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21703 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21704 	BCMI_TSCBH_XGXS_UC_RAM_ECCCTL1r_fields,
  21705 #else
  21706 	0,
  21707 #endif
  21708 #endif
  21709 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21710 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21711 	"UC_RAM_ECCCTL1r",
  21712 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21713 	"MICRO_C_RAM_ECCCONTROL1",
  21714 	NULL,
  21715 #endif
  21716 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21717 	0x0, /* 0 */
  21718 	0,
  21719 #endif
  21720 },
  21721 {
  21722 	BCMI_TSCBH_XGXS_UC_RAM_ECCSTS0r,
  21723 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21724 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21725 	BCMI_TSCBH_XGXS_UC_RAM_ECCSTS0r_fields,
  21726 #else
  21727 	0,
  21728 #endif
  21729 #endif
  21730 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21731 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21732 	"UC_RAM_ECCSTS0r",
  21733 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21734 	"MICRO_C_RAM_ECCSTATUS0",
  21735 	NULL,
  21736 #endif
  21737 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21738 	0x0, /* 0 */
  21739 	0,
  21740 #endif
  21741 },
  21742 {
  21743 	BCMI_TSCBH_XGXS_UC_RAM_ECCSTS1r,
  21744 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21745 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21746 	BCMI_TSCBH_XGXS_UC_RAM_ECCSTS1r_fields,
  21747 #else
  21748 	0,
  21749 #endif
  21750 #endif
  21751 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21752 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21753 	"UC_RAM_ECCSTS1r",
  21754 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21755 	"MICRO_C_RAM_ECCSTATUS1",
  21756 	NULL,
  21757 #endif
  21758 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21759 	0x0, /* 0 */
  21760 	0,
  21761 #endif
  21762 },
  21763 {
  21764 	BCMI_TSCBH_XGXS_UC_RAM_ECCSTS2r,
  21765 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21766 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21767 	BCMI_TSCBH_XGXS_UC_RAM_ECCSTS2r_fields,
  21768 #else
  21769 	0,
  21770 #endif
  21771 #endif
  21772 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21773 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21774 	"UC_RAM_ECCSTS2r",
  21775 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21776 	"MICRO_C_RAM_ECCSTATUS2",
  21777 	NULL,
  21778 #endif
  21779 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21780 	0x0, /* 0 */
  21781 	0,
  21782 #endif
  21783 },
  21784 {
  21785 	BCMI_TSCBH_XGXS_UC_RAM_TESTIFCTL0r,
  21786 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21787 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21788 	BCMI_TSCBH_XGXS_UC_RAM_TESTIFCTL0r_fields,
  21789 #else
  21790 	0,
  21791 #endif
  21792 #endif
  21793 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21794 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21795 	"UC_RAM_TESTIFCTL0r",
  21796 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21797 	"MICRO_C_RAM_TESTIFCONTROL0",
  21798 	NULL,
  21799 #endif
  21800 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21801 	0x0, /* 0 */
  21802 	0,
  21803 #endif
  21804 },
  21805 {
  21806 	BCMI_TSCBH_XGXS_UC_RAM_TESTIFCTL1r,
  21807 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21808 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21809 	BCMI_TSCBH_XGXS_UC_RAM_TESTIFCTL1r_fields,
  21810 #else
  21811 	0,
  21812 #endif
  21813 #endif
  21814 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21815 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21816 	"UC_RAM_TESTIFCTL1r",
  21817 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21818 	"MICRO_C_RAM_TESTIFCONTROL1",
  21819 	NULL,
  21820 #endif
  21821 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21822 	0x0, /* 0 */
  21823 	0,
  21824 #endif
  21825 },
  21826 {
  21827 	BCMI_TSCBH_XGXS_UC_RAM_CTL0r,
  21828 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21829 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21830 	BCMI_TSCBH_XGXS_UC_RAM_CTL0r_fields,
  21831 #else
  21832 	0,
  21833 #endif
  21834 #endif
  21835 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21836 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21837 	"UC_RAM_CTL0r",
  21838 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21839 	"MICRO_C_RAM_CONTROL0",
  21840 	NULL,
  21841 #endif
  21842 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21843 	0x8382, /* 33666 */
  21844 	0,
  21845 #endif
  21846 },
  21847 {
  21848 	BCMI_TSCBH_XGXS_UC_RAM_CTL1r,
  21849 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21850 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21851 	BCMI_TSCBH_XGXS_UC_RAM_CTL1r_fields,
  21852 #else
  21853 	0,
  21854 #endif
  21855 #endif
  21856 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21857 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21858 	"UC_RAM_CTL1r",
  21859 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21860 	"MICRO_C_RAM_CONTROL1",
  21861 	NULL,
  21862 #endif
  21863 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21864 	0x0, /* 0 */
  21865 	0,
  21866 #endif
  21867 },
  21868 {
  21869 	BCMI_TSCBH_XGXS_UC_RMI_EXT_INTR_CTL0r,
  21870 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21871 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21872 	BCMI_TSCBH_XGXS_UC_RMI_EXT_INTR_CTL0r_fields,
  21873 #else
  21874 	0,
  21875 #endif
  21876 #endif
  21877 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21878 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21879 	"UC_RMI_EXT_INTR_CTL0r",
  21880 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21881 	"MICRO_C_RMI_EXT_INTR_CONTROL0",
  21882 	NULL,
  21883 #endif
  21884 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21885 	0x0, /* 0 */
  21886 	0,
  21887 #endif
  21888 },
  21889 {
  21890 	BCMI_TSCBH_XGXS_UC_RMI_EXT_INTR_STS0r,
  21891 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21892 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21893 	BCMI_TSCBH_XGXS_UC_RMI_EXT_INTR_STS0r_fields,
  21894 #else
  21895 	0,
  21896 #endif
  21897 #endif
  21898 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21899 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21900 	"UC_RMI_EXT_INTR_STS0r",
  21901 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21902 	"MICRO_C_RMI_EXT_INTR_STATUS0",
  21903 	NULL,
  21904 #endif
  21905 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21906 	0x0, /* 0 */
  21907 	0,
  21908 #endif
  21909 },
  21910 {
  21911 	BCMI_TSCBH_XGXS_UC_RMI_PMI_IF_CTL0r,
  21912 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21913 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21914 	BCMI_TSCBH_XGXS_UC_RMI_PMI_IF_CTL0r_fields,
  21915 #else
  21916 	0,
  21917 #endif
  21918 #endif
  21919 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21920 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21921 	"UC_RMI_PMI_IF_CTL0r",
  21922 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21923 	"MICRO_C_RMI_PMI_IF_CONTROL0",
  21924 	NULL,
  21925 #endif
  21926 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21927 	0x1, /* 1 */
  21928 	0,
  21929 #endif
  21930 },
  21931 {
  21932 	BCMI_TSCBH_XGXS_UC_RMI_SILICON_DBG_CTL0r,
  21933 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21934 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21935 	BCMI_TSCBH_XGXS_UC_RMI_SILICON_DBG_CTL0r_fields,
  21936 #else
  21937 	0,
  21938 #endif
  21939 #endif
  21940 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21941 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21942 	"UC_RMI_SILICON_DBG_CTL0r",
  21943 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21944 	"MICRO_C_RMI_SILICON_DEBUG_CONTROL0",
  21945 	NULL,
  21946 #endif
  21947 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21948 	0x0, /* 0 */
  21949 	0,
  21950 #endif
  21951 },
  21952 {
  21953 	BCMI_TSCBH_XGXS_UC_RMI_SILICON_DBG_STS0r,
  21954 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21955 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21956 	BCMI_TSCBH_XGXS_UC_RMI_SILICON_DBG_STS0r_fields,
  21957 #else
  21958 	0,
  21959 #endif
  21960 #endif
  21961 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21962 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21963 	"UC_RMI_SILICON_DBG_STS0r",
  21964 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21965 	"MICRO_C_RMI_SILICON_DEBUG_STATUS0",
  21966 	NULL,
  21967 #endif
  21968 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21969 	0x0, /* 0 */
  21970 	0,
  21971 #endif
  21972 },
  21973 {
  21974 	BCMI_TSCBH_XGXS_UC_RAM_CTL2r,
  21975 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21976 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21977 	BCMI_TSCBH_XGXS_UC_RAM_CTL2r_fields,
  21978 #else
  21979 	0,
  21980 #endif
  21981 #endif
  21982 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  21983 	PHYMOD_SYMBOL_FLAG_REGISTER,
  21984 	"UC_RAM_CTL2r",
  21985 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  21986 	"MICRO_C_RAM_CONTROL2",
  21987 	NULL,
  21988 #endif
  21989 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  21990 	0x8400, /* 33792 */
  21991 	0,
  21992 #endif
  21993 },
  21994 {
  21995 	BCMI_TSCBH_XGXS_UC_RMI_UC_MSG_CTL0r,
  21996 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  21997 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  21998 	BCMI_TSCBH_XGXS_UC_RMI_UC_MSG_CTL0r_fields,
  21999 #else
  22000 	0,
  22001 #endif
  22002 #endif
  22003 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22004 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22005 	"UC_RMI_UC_MSG_CTL0r",
  22006 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22007 	"MICRO_D_RMI_MICRO_MSG_CONTROL0",
  22008 	NULL,
  22009 #endif
  22010 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22011 	0x0, /* 0 */
  22012 	0,
  22013 #endif
  22014 },
  22015 {
  22016 	BCMI_TSCBH_XGXS_UC_RMI_UC_MSG_CTL1r,
  22017 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22018 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22019 	BCMI_TSCBH_XGXS_UC_RMI_UC_MSG_CTL1r_fields,
  22020 #else
  22021 	0,
  22022 #endif
  22023 #endif
  22024 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22025 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22026 	"UC_RMI_UC_MSG_CTL1r",
  22027 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22028 	"MICRO_D_RMI_MICRO_MSG_CONTROL1",
  22029 	NULL,
  22030 #endif
  22031 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22032 	0x0, /* 0 */
  22033 	0,
  22034 #endif
  22035 },
  22036 {
  22037 	BCMI_TSCBH_XGXS_UC_RMI_UC_MSG_CTL2r,
  22038 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22039 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22040 	BCMI_TSCBH_XGXS_UC_RMI_UC_MSG_CTL2r_fields,
  22041 #else
  22042 	0,
  22043 #endif
  22044 #endif
  22045 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22046 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22047 	"UC_RMI_UC_MSG_CTL2r",
  22048 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22049 	"MICRO_D_RMI_MICRO_MSG_CONTROL2",
  22050 	NULL,
  22051 #endif
  22052 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22053 	0x0, /* 0 */
  22054 	0,
  22055 #endif
  22056 },
  22057 {
  22058 	BCMI_TSCBH_XGXS_UC_RMI_UC_MSG_CTL3r,
  22059 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22060 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22061 	BCMI_TSCBH_XGXS_UC_RMI_UC_MSG_CTL3r_fields,
  22062 #else
  22063 	0,
  22064 #endif
  22065 #endif
  22066 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22067 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22068 	"UC_RMI_UC_MSG_CTL3r",
  22069 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22070 	"MICRO_D_RMI_MICRO_MSG_CONTROL3",
  22071 	NULL,
  22072 #endif
  22073 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22074 	0x0, /* 0 */
  22075 	0,
  22076 #endif
  22077 },
  22078 {
  22079 	BCMI_TSCBH_XGXS_UC_UC_CORE_CLK_CTL0r,
  22080 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22081 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22082 	BCMI_TSCBH_XGXS_UC_UC_CORE_CLK_CTL0r_fields,
  22083 #else
  22084 	0,
  22085 #endif
  22086 #endif
  22087 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22088 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22089 	"UC_UC_CORE_CLK_CTL0r",
  22090 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22091 	"MICRO_E_MICRO_CORE_CLOCK_CONTROL0",
  22092 	NULL,
  22093 #endif
  22094 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22095 	0x0, /* 0 */
  22096 	0,
  22097 #endif
  22098 },
  22099 {
  22100 	BCMI_TSCBH_XGXS_UC_UC_CORE_RST_CTL0r,
  22101 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22102 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22103 	BCMI_TSCBH_XGXS_UC_UC_CORE_RST_CTL0r_fields,
  22104 #else
  22105 	0,
  22106 #endif
  22107 #endif
  22108 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22109 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22110 	"UC_UC_CORE_RST_CTL0r",
  22111 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22112 	"MICRO_E_MICRO_CORE_RESET_CONTROL0",
  22113 	NULL,
  22114 #endif
  22115 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22116 	0xc000, /* 49152 */
  22117 	0,
  22118 #endif
  22119 },
  22120 {
  22121 	BCMI_TSCBH_XGXS_UC_UC_CORE_STS0r,
  22122 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22123 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22124 	BCMI_TSCBH_XGXS_UC_UC_CORE_STS0r_fields,
  22125 #else
  22126 	0,
  22127 #endif
  22128 #endif
  22129 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22130 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22131 	"UC_UC_CORE_STS0r",
  22132 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22133 	"MICRO_E_MICRO_CORE_STATUS0",
  22134 	NULL,
  22135 #endif
  22136 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22137 	0x0, /* 0 */
  22138 	0,
  22139 #endif
  22140 },
  22141 {
  22142 	BCMI_TSCBH_XGXS_UC_UC_CORE_CTL0r,
  22143 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22144 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22145 	BCMI_TSCBH_XGXS_UC_UC_CORE_CTL0r_fields,
  22146 #else
  22147 	0,
  22148 #endif
  22149 #endif
  22150 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22151 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22152 	"UC_UC_CORE_CTL0r",
  22153 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22154 	"MICRO_E_MICRO_CORE_CONTROL0",
  22155 	NULL,
  22156 #endif
  22157 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22158 	0x3, /* 3 */
  22159 	0,
  22160 #endif
  22161 },
  22162 {
  22163 	BCMI_TSCBH_XGXS_UC_UC_CORE_MBOX_CTL0r,
  22164 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22165 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22166 	BCMI_TSCBH_XGXS_UC_UC_CORE_MBOX_CTL0r_fields,
  22167 #else
  22168 	0,
  22169 #endif
  22170 #endif
  22171 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22172 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22173 	"UC_UC_CORE_MBOX_CTL0r",
  22174 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22175 	"MICRO_E_MICRO_CORE_MBOX_CONTROL0",
  22176 	NULL,
  22177 #endif
  22178 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22179 	0x0, /* 0 */
  22180 	0,
  22181 #endif
  22182 },
  22183 {
  22184 	BCMI_TSCBH_XGXS_UC_UC_CORE_LOW_PWR_CTL0r,
  22185 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22186 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22187 	BCMI_TSCBH_XGXS_UC_UC_CORE_LOW_PWR_CTL0r_fields,
  22188 #else
  22189 	0,
  22190 #endif
  22191 #endif
  22192 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22193 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22194 	"UC_UC_CORE_LOW_PWR_CTL0r",
  22195 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22196 	"MICRO_E_MICRO_CORE_LOW_POWER_CONTROL0",
  22197 	NULL,
  22198 #endif
  22199 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22200 	0xe, /* 14 */
  22201 	0,
  22202 #endif
  22203 },
  22204 {
  22205 	BCMI_TSCBH_XGXS_UC_UC_CORE_LOW_PWR_STS0r,
  22206 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22207 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22208 	BCMI_TSCBH_XGXS_UC_UC_CORE_LOW_PWR_STS0r_fields,
  22209 #else
  22210 	0,
  22211 #endif
  22212 #endif
  22213 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22214 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22215 	"UC_UC_CORE_LOW_PWR_STS0r",
  22216 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22217 	"MICRO_E_MICRO_CORE_LOW_POWER_STATUS0",
  22218 	NULL,
  22219 #endif
  22220 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22221 	0x2, /* 2 */
  22222 	0,
  22223 #endif
  22224 },
  22225 {
  22226 	BCMI_TSCBH_XGXS_UC_UC_CORE_STS1r,
  22227 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22228 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22229 	BCMI_TSCBH_XGXS_UC_UC_CORE_STS1r_fields,
  22230 #else
  22231 	0,
  22232 #endif
  22233 #endif
  22234 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22235 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22236 	"UC_UC_CORE_STS1r",
  22237 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22238 	"MICRO_E_MICRO_CORE_STATUS1",
  22239 	NULL,
  22240 #endif
  22241 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22242 	0x0, /* 0 */
  22243 	0,
  22244 #endif
  22245 },
  22246 {
  22247 	BCMI_TSCBH_XGXS_UC_UC_CORE_STS2r,
  22248 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22249 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22250 	BCMI_TSCBH_XGXS_UC_UC_CORE_STS2r_fields,
  22251 #else
  22252 	0,
  22253 #endif
  22254 #endif
  22255 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22256 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22257 	"UC_UC_CORE_STS2r",
  22258 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22259 	"MICRO_E_MICRO_CORE_STATUS2",
  22260 	NULL,
  22261 #endif
  22262 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22263 	0x0, /* 0 */
  22264 	0,
  22265 #endif
  22266 },
  22267 {
  22268 	BCMI_TSCBH_XGXS_UC_UC_CORE_CFG_FWAPI_DATA0r,
  22269 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22270 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22271 	BCMI_TSCBH_XGXS_UC_UC_CORE_CFG_FWAPI_DATA0r_fields,
  22272 #else
  22273 	0,
  22274 #endif
  22275 #endif
  22276 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22277 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22278 	"UC_UC_CORE_CFG_FWAPI_DATA0r",
  22279 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22280 	"MICRO_E_MICRO_CORE_CFG_FWAPI_DATA0",
  22281 	NULL,
  22282 #endif
  22283 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22284 	0x0, /* 0 */
  22285 	0,
  22286 #endif
  22287 },
  22288 {
  22289 	BCMI_TSCBH_XGXS_UC_UC_CORE_CFG_FW_API_DATA1r,
  22290 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22291 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22292 	BCMI_TSCBH_XGXS_UC_UC_CORE_CFG_FW_API_DATA1r_fields,
  22293 #else
  22294 	0,
  22295 #endif
  22296 #endif
  22297 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22298 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22299 	"UC_UC_CORE_CFG_FW_API_DATA1r",
  22300 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22301 	"MICRO_E_MICRO_CORE_CFG_FW_API_DATA1",
  22302 	NULL,
  22303 #endif
  22304 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22305 	0x0, /* 0 */
  22306 	0,
  22307 #endif
  22308 },
  22309 {
  22310 	BCMI_TSCBH_XGXS_DAC_TEST_COM_READBACK_DATA0r,
  22311 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22312 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22313 	BCMI_TSCBH_XGXS_DAC_TEST_COM_READBACK_DATA0r_fields,
  22314 #else
  22315 	0,
  22316 #endif
  22317 #endif
  22318 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22319 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22320 	"DAC_TEST_COM_READBACK_DATA0r",
  22321 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22322 	"DAC_TEST_COM_READBACK_DATA_0",
  22323 	NULL,
  22324 #endif
  22325 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22326 	0x0, /* 0 */
  22327 	0,
  22328 #endif
  22329 },
  22330 {
  22331 	BCMI_TSCBH_XGXS_DAC_TEST_COM_READBACK_DATA1r,
  22332 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22333 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22334 	BCMI_TSCBH_XGXS_DAC_TEST_COM_READBACK_DATA1r_fields,
  22335 #else
  22336 	0,
  22337 #endif
  22338 #endif
  22339 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22340 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22341 	"DAC_TEST_COM_READBACK_DATA1r",
  22342 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22343 	"DAC_TEST_COM_READBACK_DATA_1",
  22344 	NULL,
  22345 #endif
  22346 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22347 	0x0, /* 0 */
  22348 	0,
  22349 #endif
  22350 },
  22351 {
  22352 	BCMI_TSCBH_XGXS_DAC_TEST_COM_READBACK_DATA2r,
  22353 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22354 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22355 	BCMI_TSCBH_XGXS_DAC_TEST_COM_READBACK_DATA2r_fields,
  22356 #else
  22357 	0,
  22358 #endif
  22359 #endif
  22360 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22361 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22362 	"DAC_TEST_COM_READBACK_DATA2r",
  22363 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22364 	"DAC_TEST_COM_READBACK_DATA_2",
  22365 	NULL,
  22366 #endif
  22367 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22368 	0x0, /* 0 */
  22369 	0,
  22370 #endif
  22371 },
  22372 {
  22373 	BCMI_TSCBH_XGXS_DAC_TEST_COM_READBACK_DATA3r,
  22374 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22375 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22376 	BCMI_TSCBH_XGXS_DAC_TEST_COM_READBACK_DATA3r_fields,
  22377 #else
  22378 	0,
  22379 #endif
  22380 #endif
  22381 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22382 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22383 	"DAC_TEST_COM_READBACK_DATA3r",
  22384 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22385 	"DAC_TEST_COM_READBACK_DATA_3",
  22386 	NULL,
  22387 #endif
  22388 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22389 	0x0, /* 0 */
  22390 	0,
  22391 #endif
  22392 },
  22393 {
  22394 	BCMI_TSCBH_XGXS_DAC_TEST_COM_READBACK_DATA4r,
  22395 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22396 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22397 	BCMI_TSCBH_XGXS_DAC_TEST_COM_READBACK_DATA4r_fields,
  22398 #else
  22399 	0,
  22400 #endif
  22401 #endif
  22402 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22403 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22404 	"DAC_TEST_COM_READBACK_DATA4r",
  22405 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22406 	"DAC_TEST_COM_READBACK_DATA_4",
  22407 	NULL,
  22408 #endif
  22409 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22410 	0x0, /* 0 */
  22411 	0,
  22412 #endif
  22413 },
  22414 {
  22415 	BCMI_TSCBH_XGXS_DAC_TEST_COM_READBACK_DATA5r,
  22416 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22417 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22418 	BCMI_TSCBH_XGXS_DAC_TEST_COM_READBACK_DATA5r_fields,
  22419 #else
  22420 	0,
  22421 #endif
  22422 #endif
  22423 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22424 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22425 	"DAC_TEST_COM_READBACK_DATA5r",
  22426 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22427 	"DAC_TEST_COM_READBACK_DATA_5",
  22428 	NULL,
  22429 #endif
  22430 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22431 	0x0, /* 0 */
  22432 	0,
  22433 #endif
  22434 },
  22435 {
  22436 	BCMI_TSCBH_XGXS_DAC_TEST_COM_READBACK_DATA6r,
  22437 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22438 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22439 	BCMI_TSCBH_XGXS_DAC_TEST_COM_READBACK_DATA6r_fields,
  22440 #else
  22441 	0,
  22442 #endif
  22443 #endif
  22444 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22445 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22446 	"DAC_TEST_COM_READBACK_DATA6r",
  22447 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22448 	"DAC_TEST_COM_READBACK_DATA_6",
  22449 	NULL,
  22450 #endif
  22451 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22452 	0x0, /* 0 */
  22453 	0,
  22454 #endif
  22455 },
  22456 {
  22457 	BCMI_TSCBH_XGXS_DAC_TEST_COM_READBACK_DATA7r,
  22458 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22459 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22460 	BCMI_TSCBH_XGXS_DAC_TEST_COM_READBACK_DATA7r_fields,
  22461 #else
  22462 	0,
  22463 #endif
  22464 #endif
  22465 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22466 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22467 	"DAC_TEST_COM_READBACK_DATA7r",
  22468 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22469 	"DAC_TEST_COM_READBACK_DATA_7",
  22470 	NULL,
  22471 #endif
  22472 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22473 	0x0, /* 0 */
  22474 	0,
  22475 #endif
  22476 },
  22477 {
  22478 	BCMI_TSCBH_XGXS_DAC_TEST_COM_READBACK_DATA8r,
  22479 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22480 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22481 	BCMI_TSCBH_XGXS_DAC_TEST_COM_READBACK_DATA8r_fields,
  22482 #else
  22483 	0,
  22484 #endif
  22485 #endif
  22486 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22487 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22488 	"DAC_TEST_COM_READBACK_DATA8r",
  22489 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22490 	"DAC_TEST_COM_READBACK_DATA_8",
  22491 	NULL,
  22492 #endif
  22493 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22494 	0x0, /* 0 */
  22495 	0,
  22496 #endif
  22497 },
  22498 {
  22499 	BCMI_TSCBH_XGXS_DAC_TEST_COM_READBACK_ADDRr,
  22500 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22501 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22502 	BCMI_TSCBH_XGXS_DAC_TEST_COM_READBACK_ADDRr_fields,
  22503 #else
  22504 	0,
  22505 #endif
  22506 #endif
  22507 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22508 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22509 	"DAC_TEST_COM_READBACK_ADDRr",
  22510 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22511 	"DAC_TEST_COM_READBACK_ADDRESS",
  22512 	NULL,
  22513 #endif
  22514 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22515 	0x0, /* 0 */
  22516 	0,
  22517 #endif
  22518 },
  22519 {
  22520 	BCMI_TSCBH_XGXS_DAC_TEST_COM_DAC_TEST_CTLr,
  22521 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22522 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22523 	BCMI_TSCBH_XGXS_DAC_TEST_COM_DAC_TEST_CTLr_fields,
  22524 #else
  22525 	0,
  22526 #endif
  22527 #endif
  22528 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22529 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22530 	"DAC_TEST_COM_DAC_TEST_CTLr",
  22531 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22532 	"DAC_TEST_COM_DAC_TEST_CONTROL",
  22533 	NULL,
  22534 #endif
  22535 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22536 	0x0, /* 0 */
  22537 	0,
  22538 #endif
  22539 },
  22540 {
  22541 	BCMI_TSCBH_XGXS_DAC_TEST_COM_DAC_TEST_MEM_TESTr,
  22542 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22543 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22544 	BCMI_TSCBH_XGXS_DAC_TEST_COM_DAC_TEST_MEM_TESTr_fields,
  22545 #else
  22546 	0,
  22547 #endif
  22548 #endif
  22549 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22550 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22551 	"DAC_TEST_COM_DAC_TEST_MEM_TESTr",
  22552 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22553 	NULL,
  22554 	NULL,
  22555 #endif
  22556 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22557 	0x0, /* 0 */
  22558 	0,
  22559 #endif
  22560 },
  22561 {
  22562 	BCMI_TSCBH_XGXS_TLB_ERR_AGGR_TLB_ERR_AGGR_CFG0r,
  22563 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22564 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22565 	BCMI_TSCBH_XGXS_TLB_ERR_AGGR_TLB_ERR_AGGR_CFG0r_fields,
  22566 #else
  22567 	0,
  22568 #endif
  22569 #endif
  22570 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22571 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22572 	"TLB_ERR_AGGR_TLB_ERR_AGGR_CFG0r",
  22573 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22574 	"TLB_ERR_AGGR_TLB_ERR_AGGR_CONFIG_0",
  22575 	NULL,
  22576 #endif
  22577 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22578 	0xc, /* 12 */
  22579 	0,
  22580 #endif
  22581 },
  22582 {
  22583 	BCMI_TSCBH_XGXS_TLB_ERR_AGGR_TLB_ERR_AGGR_CFG1r,
  22584 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22585 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22586 	BCMI_TSCBH_XGXS_TLB_ERR_AGGR_TLB_ERR_AGGR_CFG1r_fields,
  22587 #else
  22588 	0,
  22589 #endif
  22590 #endif
  22591 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22592 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22593 	"TLB_ERR_AGGR_TLB_ERR_AGGR_CFG1r",
  22594 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22595 	"TLB_ERR_AGGR_TLB_ERR_AGGR_CONFIG_1",
  22596 	NULL,
  22597 #endif
  22598 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22599 	0xa3, /* 163 */
  22600 	0,
  22601 #endif
  22602 },
  22603 {
  22604 	BCMI_TSCBH_XGXS_TLB_ERR_AGGR_NUM_ERRS_IN_FEC_FRAMES_STS_HIr,
  22605 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22606 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22607 	BCMI_TSCBH_XGXS_TLB_ERR_AGGR_NUM_ERRS_IN_FEC_FRAMES_STS_HIr_fields,
  22608 #else
  22609 	0,
  22610 #endif
  22611 #endif
  22612 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22613 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22614 	"TLB_ERR_AGGR_NUM_ERRS_IN_FEC_FRAMES_STS_HIr",
  22615 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22616 	"TLB_ERR_AGGR_NUM_ERRORS_IN_FEC_FRAMES_STATUS_HI",
  22617 	NULL,
  22618 #endif
  22619 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22620 	0x0, /* 0 */
  22621 	0,
  22622 #endif
  22623 },
  22624 {
  22625 	BCMI_TSCBH_XGXS_TLB_ERR_AGGR_NUM_ERRS_IN_FEC_FRAMES_STS_LOr,
  22626 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22627 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22628 	BCMI_TSCBH_XGXS_TLB_ERR_AGGR_NUM_ERRS_IN_FEC_FRAMES_STS_LOr_fields,
  22629 #else
  22630 	0,
  22631 #endif
  22632 #endif
  22633 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22634 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22635 	"TLB_ERR_AGGR_NUM_ERRS_IN_FEC_FRAMES_STS_LOr",
  22636 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22637 	"TLB_ERR_AGGR_NUM_ERRORS_IN_FEC_FRAMES_STATUS_LO",
  22638 	NULL,
  22639 #endif
  22640 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22641 	0x0, /* 0 */
  22642 	0,
  22643 #endif
  22644 },
  22645 {
  22646 	BCMI_TSCBH_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS7r,
  22647 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22648 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22649 	BCMI_TSCBH_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS7r_fields,
  22650 #else
  22651 	0,
  22652 #endif
  22653 #endif
  22654 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22655 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22656 	"TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS7r",
  22657 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22658 	"TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_7",
  22659 	NULL,
  22660 #endif
  22661 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22662 	0x0, /* 0 */
  22663 	0,
  22664 #endif
  22665 },
  22666 {
  22667 	BCMI_TSCBH_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS6r,
  22668 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22669 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22670 	BCMI_TSCBH_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS6r_fields,
  22671 #else
  22672 	0,
  22673 #endif
  22674 #endif
  22675 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22676 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22677 	"TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS6r",
  22678 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22679 	"TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_6",
  22680 	NULL,
  22681 #endif
  22682 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22683 	0x0, /* 0 */
  22684 	0,
  22685 #endif
  22686 },
  22687 {
  22688 	BCMI_TSCBH_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS5r,
  22689 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22690 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22691 	BCMI_TSCBH_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS5r_fields,
  22692 #else
  22693 	0,
  22694 #endif
  22695 #endif
  22696 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22697 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22698 	"TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS5r",
  22699 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22700 	"TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_5",
  22701 	NULL,
  22702 #endif
  22703 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22704 	0x0, /* 0 */
  22705 	0,
  22706 #endif
  22707 },
  22708 {
  22709 	BCMI_TSCBH_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS4r,
  22710 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22711 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22712 	BCMI_TSCBH_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS4r_fields,
  22713 #else
  22714 	0,
  22715 #endif
  22716 #endif
  22717 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22718 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22719 	"TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS4r",
  22720 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22721 	"TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_4",
  22722 	NULL,
  22723 #endif
  22724 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22725 	0x0, /* 0 */
  22726 	0,
  22727 #endif
  22728 },
  22729 {
  22730 	BCMI_TSCBH_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS3r,
  22731 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22732 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22733 	BCMI_TSCBH_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS3r_fields,
  22734 #else
  22735 	0,
  22736 #endif
  22737 #endif
  22738 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22739 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22740 	"TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS3r",
  22741 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22742 	"TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_3",
  22743 	NULL,
  22744 #endif
  22745 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22746 	0x0, /* 0 */
  22747 	0,
  22748 #endif
  22749 },
  22750 {
  22751 	BCMI_TSCBH_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS2r,
  22752 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22753 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22754 	BCMI_TSCBH_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS2r_fields,
  22755 #else
  22756 	0,
  22757 #endif
  22758 #endif
  22759 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22760 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22761 	"TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS2r",
  22762 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22763 	"TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_2",
  22764 	NULL,
  22765 #endif
  22766 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22767 	0x0, /* 0 */
  22768 	0,
  22769 #endif
  22770 },
  22771 {
  22772 	BCMI_TSCBH_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS1r,
  22773 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22774 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22775 	BCMI_TSCBH_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS1r_fields,
  22776 #else
  22777 	0,
  22778 #endif
  22779 #endif
  22780 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22781 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22782 	"TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS1r",
  22783 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22784 	"TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_1",
  22785 	NULL,
  22786 #endif
  22787 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22788 	0x0, /* 0 */
  22789 	0,
  22790 #endif
  22791 },
  22792 {
  22793 	BCMI_TSCBH_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS0r,
  22794 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22795 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22796 	BCMI_TSCBH_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS0r_fields,
  22797 #else
  22798 	0,
  22799 #endif
  22800 #endif
  22801 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22802 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22803 	"TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS0r",
  22804 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22805 	"TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_0",
  22806 	NULL,
  22807 #endif
  22808 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22809 	0x0, /* 0 */
  22810 	0,
  22811 #endif
  22812 },
  22813 {
  22814 	BCMI_TSCBH_XGXS_DSC_RXA_FFE_TAPr,
  22815 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22816 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22817 	BCMI_TSCBH_XGXS_DSC_RXA_FFE_TAPr_fields,
  22818 #else
  22819 	0,
  22820 #endif
  22821 #endif
  22822 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22823 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22824 	"DSC_RXA_FFE_TAPr",
  22825 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22826 	"DSC_G_RXA_FFE_TAP",
  22827 	NULL,
  22828 #endif
  22829 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22830 	0x0, /* 0 */
  22831 	0,
  22832 #endif
  22833 },
  22834 {
  22835 	BCMI_TSCBH_XGXS_DSC_RXB_FFE_TAPr,
  22836 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22837 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22838 	BCMI_TSCBH_XGXS_DSC_RXB_FFE_TAPr_fields,
  22839 #else
  22840 	0,
  22841 #endif
  22842 #endif
  22843 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22844 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22845 	"DSC_RXB_FFE_TAPr",
  22846 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22847 	"DSC_G_RXB_FFE_TAP",
  22848 	NULL,
  22849 #endif
  22850 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22851 	0x0, /* 0 */
  22852 	0,
  22853 #endif
  22854 },
  22855 {
  22856 	BCMI_TSCBH_XGXS_DSC_RXC_FFE_TAPr,
  22857 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22858 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22859 	BCMI_TSCBH_XGXS_DSC_RXC_FFE_TAPr_fields,
  22860 #else
  22861 	0,
  22862 #endif
  22863 #endif
  22864 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22865 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22866 	"DSC_RXC_FFE_TAPr",
  22867 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22868 	"DSC_G_RXC_FFE_TAP",
  22869 	NULL,
  22870 #endif
  22871 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22872 	0x0, /* 0 */
  22873 	0,
  22874 #endif
  22875 },
  22876 {
  22877 	BCMI_TSCBH_XGXS_DSC_RXD_FFE_TAPr,
  22878 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22879 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22880 	BCMI_TSCBH_XGXS_DSC_RXD_FFE_TAPr_fields,
  22881 #else
  22882 	0,
  22883 #endif
  22884 #endif
  22885 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22886 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22887 	"DSC_RXD_FFE_TAPr",
  22888 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22889 	"DSC_G_RXD_FFE_TAP",
  22890 	NULL,
  22891 #endif
  22892 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22893 	0x0, /* 0 */
  22894 	0,
  22895 #endif
  22896 },
  22897 {
  22898 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP2_CTLr,
  22899 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22900 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22901 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP2_CTLr_fields,
  22902 #else
  22903 	0,
  22904 #endif
  22905 #endif
  22906 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22907 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22908 	"DSC_RX_DFE_TAP2_CTLr",
  22909 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22910 	"DSC_G_RX_DFE_TAP2_CTRL",
  22911 	NULL,
  22912 #endif
  22913 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22914 	0x0, /* 0 */
  22915 	0,
  22916 #endif
  22917 },
  22918 {
  22919 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP2_3_CTLr,
  22920 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22921 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22922 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP2_3_CTLr_fields,
  22923 #else
  22924 	0,
  22925 #endif
  22926 #endif
  22927 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22928 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22929 	"DSC_RX_DFE_TAP2_3_CTLr",
  22930 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22931 	"DSC_G_RX_DFE_TAP2_3_CTRL",
  22932 	NULL,
  22933 #endif
  22934 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22935 	0x0, /* 0 */
  22936 	0,
  22937 #endif
  22938 },
  22939 {
  22940 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP3_CTLr,
  22941 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22942 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22943 	BCMI_TSCBH_XGXS_DSC_RX_DFE_TAP3_CTLr_fields,
  22944 #else
  22945 	0,
  22946 #endif
  22947 #endif
  22948 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22949 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22950 	"DSC_RX_DFE_TAP3_CTLr",
  22951 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22952 	"DSC_G_RX_DFE_TAP3_CTRL",
  22953 	NULL,
  22954 #endif
  22955 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22956 	0x0, /* 0 */
  22957 	0,
  22958 #endif
  22959 },
  22960 {
  22961 	BCMI_TSCBH_XGXS_DSC_RX_AUTO_RATE_MOD_DFE_TAP2_ABr,
  22962 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22963 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22964 	BCMI_TSCBH_XGXS_DSC_RX_AUTO_RATE_MOD_DFE_TAP2_ABr_fields,
  22965 #else
  22966 	0,
  22967 #endif
  22968 #endif
  22969 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22970 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22971 	"DSC_RX_AUTO_RATE_MOD_DFE_TAP2_ABr",
  22972 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22973 	"DSC_G_RX_AUTO_RATE_MOD_DFE_TAP2_AB",
  22974 	NULL,
  22975 #endif
  22976 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22977 	0x0, /* 0 */
  22978 	0,
  22979 #endif
  22980 },
  22981 {
  22982 	BCMI_TSCBH_XGXS_DSC_RX_AUTO_RATE_MOD_DFE_TAP2_CDr,
  22983 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  22984 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  22985 	BCMI_TSCBH_XGXS_DSC_RX_AUTO_RATE_MOD_DFE_TAP2_CDr_fields,
  22986 #else
  22987 	0,
  22988 #endif
  22989 #endif
  22990 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  22991 	PHYMOD_SYMBOL_FLAG_REGISTER,
  22992 	"DSC_RX_AUTO_RATE_MOD_DFE_TAP2_CDr",
  22993 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  22994 	"DSC_G_RX_AUTO_RATE_MOD_DFE_TAP2_CD",
  22995 	NULL,
  22996 #endif
  22997 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  22998 	0x0, /* 0 */
  22999 	0,
  23000 #endif
  23001 },
  23002 {
  23003 	BCMI_TSCBH_XGXS_DSC_RX_AUTO_RATE_MOD_DFE_TAP3_ABr,
  23004 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23005 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23006 	BCMI_TSCBH_XGXS_DSC_RX_AUTO_RATE_MOD_DFE_TAP3_ABr_fields,
  23007 #else
  23008 	0,
  23009 #endif
  23010 #endif
  23011 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23012 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23013 	"DSC_RX_AUTO_RATE_MOD_DFE_TAP3_ABr",
  23014 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23015 	"DSC_G_RX_AUTO_RATE_MOD_DFE_TAP3_AB",
  23016 	NULL,
  23017 #endif
  23018 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23019 	0x0, /* 0 */
  23020 	0,
  23021 #endif
  23022 },
  23023 {
  23024 	BCMI_TSCBH_XGXS_DSC_RX_AUTO_RATE_MOD_DFE_TAP3_CDr,
  23025 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23026 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23027 	BCMI_TSCBH_XGXS_DSC_RX_AUTO_RATE_MOD_DFE_TAP3_CDr_fields,
  23028 #else
  23029 	0,
  23030 #endif
  23031 #endif
  23032 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23033 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23034 	"DSC_RX_AUTO_RATE_MOD_DFE_TAP3_CDr",
  23035 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23036 	"DSC_G_RX_AUTO_RATE_MOD_DFE_TAP3_CD",
  23037 	NULL,
  23038 #endif
  23039 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23040 	0x0, /* 0 */
  23041 	0,
  23042 #endif
  23043 },
  23044 {
  23045 	BCMI_TSCBH_XGXS_DSC_RX_AUTO_RATE_MOD_DATA23_14r,
  23046 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23047 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23048 	BCMI_TSCBH_XGXS_DSC_RX_AUTO_RATE_MOD_DATA23_14r_fields,
  23049 #else
  23050 	0,
  23051 #endif
  23052 #endif
  23053 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23054 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23055 	"DSC_RX_AUTO_RATE_MOD_DATA23_14r",
  23056 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23057 	"DSC_G_RX_AUTO_RATE_MOD_DATA23_14",
  23058 	NULL,
  23059 #endif
  23060 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23061 	0x0, /* 0 */
  23062 	0,
  23063 #endif
  23064 },
  23065 {
  23066 	BCMI_TSCBH_XGXS_DSC_RX_AUTO_RATE_MOD_PHASE02_1r,
  23067 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23068 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23069 	BCMI_TSCBH_XGXS_DSC_RX_AUTO_RATE_MOD_PHASE02_1r_fields,
  23070 #else
  23071 	0,
  23072 #endif
  23073 #endif
  23074 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23075 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23076 	"DSC_RX_AUTO_RATE_MOD_PHASE02_1r",
  23077 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23078 	"DSC_G_RX_AUTO_RATE_MOD_PHASE02_1",
  23079 	NULL,
  23080 #endif
  23081 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23082 	0x0, /* 0 */
  23083 	0,
  23084 #endif
  23085 },
  23086 {
  23087 	BCMI_TSCBH_XGXS_DSC_RX_AUTO_RATE_MOD_DATA05r,
  23088 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23089 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23090 	BCMI_TSCBH_XGXS_DSC_RX_AUTO_RATE_MOD_DATA05r_fields,
  23091 #else
  23092 	0,
  23093 #endif
  23094 #endif
  23095 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23096 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23097 	"DSC_RX_AUTO_RATE_MOD_DATA05r",
  23098 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23099 	"DSC_G_RX_AUTO_RATE_MOD_DATA05",
  23100 	NULL,
  23101 #endif
  23102 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23103 	0x0, /* 0 */
  23104 	0,
  23105 #endif
  23106 },
  23107 {
  23108 	BCMI_TSCBH_XGXS_DSC_AUTO_DATA23_UPD_CTLr,
  23109 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23110 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23111 	BCMI_TSCBH_XGXS_DSC_AUTO_DATA23_UPD_CTLr_fields,
  23112 #else
  23113 	0,
  23114 #endif
  23115 #endif
  23116 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23117 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23118 	"DSC_AUTO_DATA23_UPD_CTLr",
  23119 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23120 	"DSC_H_AUTO_DATA23_UPDATE_CTRL",
  23121 	NULL,
  23122 #endif
  23123 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23124 	0x0, /* 0 */
  23125 	0,
  23126 #endif
  23127 },
  23128 {
  23129 	BCMI_TSCBH_XGXS_DSC_AUTO_DATA14_UPD_CTLr,
  23130 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23131 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23132 	BCMI_TSCBH_XGXS_DSC_AUTO_DATA14_UPD_CTLr_fields,
  23133 #else
  23134 	0,
  23135 #endif
  23136 #endif
  23137 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23138 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23139 	"DSC_AUTO_DATA14_UPD_CTLr",
  23140 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23141 	"DSC_H_AUTO_DATA14_UPDATE_CTRL",
  23142 	NULL,
  23143 #endif
  23144 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23145 	0x0, /* 0 */
  23146 	0,
  23147 #endif
  23148 },
  23149 {
  23150 	BCMI_TSCBH_XGXS_DSC_AUTO_DATA05_UPD_CTLr,
  23151 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23152 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23153 	BCMI_TSCBH_XGXS_DSC_AUTO_DATA05_UPD_CTLr_fields,
  23154 #else
  23155 	0,
  23156 #endif
  23157 #endif
  23158 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23159 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23160 	"DSC_AUTO_DATA05_UPD_CTLr",
  23161 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23162 	"DSC_H_AUTO_DATA05_UPDATE_CTRL",
  23163 	NULL,
  23164 #endif
  23165 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23166 	0x0, /* 0 */
  23167 	0,
  23168 #endif
  23169 },
  23170 {
  23171 	BCMI_TSCBH_XGXS_DSC_AUTO_PHASE1_UPD_CTLr,
  23172 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23173 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23174 	BCMI_TSCBH_XGXS_DSC_AUTO_PHASE1_UPD_CTLr_fields,
  23175 #else
  23176 	0,
  23177 #endif
  23178 #endif
  23179 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23180 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23181 	"DSC_AUTO_PHASE1_UPD_CTLr",
  23182 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23183 	"DSC_H_AUTO_PHASE1_UPDATE_CTRL",
  23184 	NULL,
  23185 #endif
  23186 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23187 	0x0, /* 0 */
  23188 	0,
  23189 #endif
  23190 },
  23191 {
  23192 	BCMI_TSCBH_XGXS_DSC_AUTO_PHASE02_UPD_CTLr,
  23193 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23194 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23195 	BCMI_TSCBH_XGXS_DSC_AUTO_PHASE02_UPD_CTLr_fields,
  23196 #else
  23197 	0,
  23198 #endif
  23199 #endif
  23200 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23201 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23202 	"DSC_AUTO_PHASE02_UPD_CTLr",
  23203 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23204 	"DSC_H_AUTO_PHASE02_UPDATE_CTRL",
  23205 	NULL,
  23206 #endif
  23207 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23208 	0x0, /* 0 */
  23209 	0,
  23210 #endif
  23211 },
  23212 {
  23213 	BCMI_TSCBH_XGXS_DSC_AUTO_RXA_DFE_TAP2_UPD_CTLr,
  23214 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23215 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23216 	BCMI_TSCBH_XGXS_DSC_AUTO_RXA_DFE_TAP2_UPD_CTLr_fields,
  23217 #else
  23218 	0,
  23219 #endif
  23220 #endif
  23221 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23222 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23223 	"DSC_AUTO_RXA_DFE_TAP2_UPD_CTLr",
  23224 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23225 	"DSC_H_AUTO_RXA_DFE_TAP2_UPDATE_CTRL",
  23226 	NULL,
  23227 #endif
  23228 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23229 	0x0, /* 0 */
  23230 	0,
  23231 #endif
  23232 },
  23233 {
  23234 	BCMI_TSCBH_XGXS_DSC_AUTO_RXB_DFE_TAP2_UPD_CTLr,
  23235 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23236 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23237 	BCMI_TSCBH_XGXS_DSC_AUTO_RXB_DFE_TAP2_UPD_CTLr_fields,
  23238 #else
  23239 	0,
  23240 #endif
  23241 #endif
  23242 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23243 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23244 	"DSC_AUTO_RXB_DFE_TAP2_UPD_CTLr",
  23245 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23246 	"DSC_H_AUTO_RXB_DFE_TAP2_UPDATE_CTRL",
  23247 	NULL,
  23248 #endif
  23249 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23250 	0x0, /* 0 */
  23251 	0,
  23252 #endif
  23253 },
  23254 {
  23255 	BCMI_TSCBH_XGXS_DSC_AUTO_RXC_DFE_TAP2_UPD_CTLr,
  23256 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23257 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23258 	BCMI_TSCBH_XGXS_DSC_AUTO_RXC_DFE_TAP2_UPD_CTLr_fields,
  23259 #else
  23260 	0,
  23261 #endif
  23262 #endif
  23263 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23264 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23265 	"DSC_AUTO_RXC_DFE_TAP2_UPD_CTLr",
  23266 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23267 	"DSC_H_AUTO_RXC_DFE_TAP2_UPDATE_CTRL",
  23268 	NULL,
  23269 #endif
  23270 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23271 	0x0, /* 0 */
  23272 	0,
  23273 #endif
  23274 },
  23275 {
  23276 	BCMI_TSCBH_XGXS_DSC_AUTO_RXD_DFE_TAP2_UPD_CTLr,
  23277 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23278 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23279 	BCMI_TSCBH_XGXS_DSC_AUTO_RXD_DFE_TAP2_UPD_CTLr_fields,
  23280 #else
  23281 	0,
  23282 #endif
  23283 #endif
  23284 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23285 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23286 	"DSC_AUTO_RXD_DFE_TAP2_UPD_CTLr",
  23287 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23288 	"DSC_H_AUTO_RXD_DFE_TAP2_UPDATE_CTRL",
  23289 	NULL,
  23290 #endif
  23291 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23292 	0x0, /* 0 */
  23293 	0,
  23294 #endif
  23295 },
  23296 {
  23297 	BCMI_TSCBH_XGXS_DSC_AUTO_RXA_DFE_TAP3_UPD_CTLr,
  23298 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23299 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23300 	BCMI_TSCBH_XGXS_DSC_AUTO_RXA_DFE_TAP3_UPD_CTLr_fields,
  23301 #else
  23302 	0,
  23303 #endif
  23304 #endif
  23305 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23306 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23307 	"DSC_AUTO_RXA_DFE_TAP3_UPD_CTLr",
  23308 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23309 	"DSC_H_AUTO_RXA_DFE_TAP3_UPDATE_CTRL",
  23310 	NULL,
  23311 #endif
  23312 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23313 	0x0, /* 0 */
  23314 	0,
  23315 #endif
  23316 },
  23317 {
  23318 	BCMI_TSCBH_XGXS_DSC_AUTO_RXB_DFE_TAP3_UPD_CTLr,
  23319 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23320 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23321 	BCMI_TSCBH_XGXS_DSC_AUTO_RXB_DFE_TAP3_UPD_CTLr_fields,
  23322 #else
  23323 	0,
  23324 #endif
  23325 #endif
  23326 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23327 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23328 	"DSC_AUTO_RXB_DFE_TAP3_UPD_CTLr",
  23329 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23330 	"DSC_H_AUTO_RXB_DFE_TAP3_UPDATE_CTRL",
  23331 	NULL,
  23332 #endif
  23333 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23334 	0x0, /* 0 */
  23335 	0,
  23336 #endif
  23337 },
  23338 {
  23339 	BCMI_TSCBH_XGXS_DSC_AUTO_RXC_DFE_TAP3_UPD_CTLr,
  23340 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23341 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23342 	BCMI_TSCBH_XGXS_DSC_AUTO_RXC_DFE_TAP3_UPD_CTLr_fields,
  23343 #else
  23344 	0,
  23345 #endif
  23346 #endif
  23347 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23348 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23349 	"DSC_AUTO_RXC_DFE_TAP3_UPD_CTLr",
  23350 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23351 	"DSC_H_AUTO_RXC_DFE_TAP3_UPDATE_CTRL",
  23352 	NULL,
  23353 #endif
  23354 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23355 	0x0, /* 0 */
  23356 	0,
  23357 #endif
  23358 },
  23359 {
  23360 	BCMI_TSCBH_XGXS_DSC_AUTO_RXD_DFE_TAP3_UPD_CTLr,
  23361 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23362 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23363 	BCMI_TSCBH_XGXS_DSC_AUTO_RXD_DFE_TAP3_UPD_CTLr_fields,
  23364 #else
  23365 	0,
  23366 #endif
  23367 #endif
  23368 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23369 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23370 	"DSC_AUTO_RXD_DFE_TAP3_UPD_CTLr",
  23371 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23372 	"DSC_H_AUTO_RXD_DFE_TAP3_UPDATE_CTRL",
  23373 	NULL,
  23374 #endif
  23375 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23376 	0x0, /* 0 */
  23377 	0,
  23378 #endif
  23379 },
  23380 {
  23381 	BCMI_TSCBH_XGXS_DSC_SLCR_DFE_TAPS_CTLr,
  23382 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23383 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23384 	BCMI_TSCBH_XGXS_DSC_SLCR_DFE_TAPS_CTLr_fields,
  23385 #else
  23386 	0,
  23387 #endif
  23388 #endif
  23389 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23390 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23391 	"DSC_SLCR_DFE_TAPS_CTLr",
  23392 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23393 	"DSC_H_SLICER_DFE_TAPS_CTRL",
  23394 	NULL,
  23395 #endif
  23396 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23397 	0x0, /* 0 */
  23398 	0,
  23399 #endif
  23400 },
  23401 {
  23402 	BCMI_TSCBH_XGXS_DSC_RX_PF_CTL_DC_OFFS_AND_VGAr,
  23403 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23404 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23405 	BCMI_TSCBH_XGXS_DSC_RX_PF_CTL_DC_OFFS_AND_VGAr_fields,
  23406 #else
  23407 	0,
  23408 #endif
  23409 #endif
  23410 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23411 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23412 	"DSC_RX_PF_CTL_DC_OFFS_AND_VGAr",
  23413 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23414 	"DSC_H_RX_PF_CTRL_DC_OFFSET_AND_VGA",
  23415 	NULL,
  23416 #endif
  23417 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23418 	0x27, /* 39 */
  23419 	0,
  23420 #endif
  23421 },
  23422 {
  23423 	BCMI_TSCBH_XGXS_TX_PI_B_CTL_12r,
  23424 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23425 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23426 	BCMI_TSCBH_XGXS_TX_PI_B_CTL_12r_fields,
  23427 #else
  23428 	0,
  23429 #endif
  23430 #endif
  23431 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23432 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23433 	"TX_PI_B_CTL_12r",
  23434 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23435 	"TX_PI_B_8X_PLL2X_V1P0_TX_PI_B_CONTROL_12",
  23436 	NULL,
  23437 #endif
  23438 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23439 	0x0, /* 0 */
  23440 	0,
  23441 #endif
  23442 },
  23443 {
  23444 	BCMI_TSCBH_XGXS_DSC_RX_PI_B_CTL0r,
  23445 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23446 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23447 	BCMI_TSCBH_XGXS_DSC_RX_PI_B_CTL0r_fields,
  23448 #else
  23449 	0,
  23450 #endif
  23451 #endif
  23452 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23453 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23454 	"DSC_RX_PI_B_CTL0r",
  23455 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23456 	"DSC_I_RX_PI_B_CONTROL_0",
  23457 	NULL,
  23458 #endif
  23459 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23460 	0x0, /* 0 */
  23461 	0,
  23462 #endif
  23463 },
  23464 {
  23465 	BCMI_TSCBH_XGXS_DSC_RX_PI_B_CTL1r,
  23466 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23467 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23468 	BCMI_TSCBH_XGXS_DSC_RX_PI_B_CTL1r_fields,
  23469 #else
  23470 	0,
  23471 #endif
  23472 #endif
  23473 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23474 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23475 	"DSC_RX_PI_B_CTL1r",
  23476 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23477 	"DSC_I_RX_PI_B_CONTROL_1",
  23478 	NULL,
  23479 #endif
  23480 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23481 	0x0, /* 0 */
  23482 	0,
  23483 #endif
  23484 },
  23485 {
  23486 	BCMI_TSCBH_XGXS_DSC_RX_PI_B_CTL2r,
  23487 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23488 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23489 	BCMI_TSCBH_XGXS_DSC_RX_PI_B_CTL2r_fields,
  23490 #else
  23491 	0,
  23492 #endif
  23493 #endif
  23494 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23495 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23496 	"DSC_RX_PI_B_CTL2r",
  23497 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23498 	"DSC_I_RX_PI_B_CONTROL_2",
  23499 	NULL,
  23500 #endif
  23501 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23502 	0x0, /* 0 */
  23503 	0,
  23504 #endif
  23505 },
  23506 {
  23507 	BCMI_TSCBH_XGXS_DSC_RX_PI_B_CTL3r,
  23508 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23509 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23510 	BCMI_TSCBH_XGXS_DSC_RX_PI_B_CTL3r_fields,
  23511 #else
  23512 	0,
  23513 #endif
  23514 #endif
  23515 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23516 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23517 	"DSC_RX_PI_B_CTL3r",
  23518 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23519 	"DSC_I_RX_PI_B_CONTROL_3",
  23520 	NULL,
  23521 #endif
  23522 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23523 	0x0, /* 0 */
  23524 	0,
  23525 #endif
  23526 },
  23527 {
  23528 	BCMI_TSCBH_XGXS_DSC_RX_PI_B_CTL4r,
  23529 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23530 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23531 	BCMI_TSCBH_XGXS_DSC_RX_PI_B_CTL4r_fields,
  23532 #else
  23533 	0,
  23534 #endif
  23535 #endif
  23536 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23537 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23538 	"DSC_RX_PI_B_CTL4r",
  23539 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23540 	"DSC_I_RX_PI_B_CONTROL_4",
  23541 	NULL,
  23542 #endif
  23543 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23544 	0x0, /* 0 */
  23545 	0,
  23546 #endif
  23547 },
  23548 {
  23549 	BCMI_TSCBH_XGXS_DSC_RX_PI_B_CTL5r,
  23550 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23551 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23552 	BCMI_TSCBH_XGXS_DSC_RX_PI_B_CTL5r_fields,
  23553 #else
  23554 	0,
  23555 #endif
  23556 #endif
  23557 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23558 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23559 	"DSC_RX_PI_B_CTL5r",
  23560 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23561 	"DSC_I_RX_PI_B_CONTROL_5",
  23562 	NULL,
  23563 #endif
  23564 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23565 	0x0, /* 0 */
  23566 	0,
  23567 #endif
  23568 },
  23569 {
  23570 	BCMI_TSCBH_XGXS_DSC_RX_PI_B_CTL6r,
  23571 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23572 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23573 	BCMI_TSCBH_XGXS_DSC_RX_PI_B_CTL6r_fields,
  23574 #else
  23575 	0,
  23576 #endif
  23577 #endif
  23578 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23579 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23580 	"DSC_RX_PI_B_CTL6r",
  23581 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23582 	"DSC_I_RX_PI_B_CONTROL_6",
  23583 	NULL,
  23584 #endif
  23585 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23586 	0x0, /* 0 */
  23587 	0,
  23588 #endif
  23589 },
  23590 {
  23591 	BCMI_TSCBH_XGXS_DSC_RX_PI_B_CTL7r,
  23592 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23593 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23594 	BCMI_TSCBH_XGXS_DSC_RX_PI_B_CTL7r_fields,
  23595 #else
  23596 	0,
  23597 #endif
  23598 #endif
  23599 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23600 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23601 	"DSC_RX_PI_B_CTL7r",
  23602 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23603 	"DSC_I_RX_PI_B_CONTROL_7",
  23604 	NULL,
  23605 #endif
  23606 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23607 	0x0, /* 0 */
  23608 	0,
  23609 #endif
  23610 },
  23611 {
  23612 	BCMI_TSCBH_XGXS_DSC_RX_PI_B_CTL9r,
  23613 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23614 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23615 	BCMI_TSCBH_XGXS_DSC_RX_PI_B_CTL9r_fields,
  23616 #else
  23617 	0,
  23618 #endif
  23619 #endif
  23620 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23621 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23622 	"DSC_RX_PI_B_CTL9r",
  23623 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23624 	"DSC_I_RX_PI_B_CONTROL_9",
  23625 	NULL,
  23626 #endif
  23627 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23628 	0x0, /* 0 */
  23629 	0,
  23630 #endif
  23631 },
  23632 {
  23633 	BCMI_TSCBH_XGXS_DSC_RX_PI_B_CTL_10r,
  23634 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23635 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23636 	BCMI_TSCBH_XGXS_DSC_RX_PI_B_CTL_10r_fields,
  23637 #else
  23638 	0,
  23639 #endif
  23640 #endif
  23641 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23642 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23643 	"DSC_RX_PI_B_CTL_10r",
  23644 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23645 	"DSC_I_RX_PI_B_CONTROL_10",
  23646 	NULL,
  23647 #endif
  23648 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23649 	0x200, /* 512 */
  23650 	0,
  23651 #endif
  23652 },
  23653 {
  23654 	BCMI_TSCBH_XGXS_DSC_SPARE_DSC_Ir,
  23655 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23656 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23657 	BCMI_TSCBH_XGXS_DSC_SPARE_DSC_Ir_fields,
  23658 #else
  23659 	0,
  23660 #endif
  23661 #endif
  23662 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23663 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23664 	"DSC_SPARE_DSC_Ir",
  23665 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23666 	"DSC_I_SPARE_REG_DSC_I",
  23667 	NULL,
  23668 #endif
  23669 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23670 	0x0, /* 0 */
  23671 	0,
  23672 #endif
  23673 },
  23674 {
  23675 	BCMI_TSCBH_XGXS_DSC_RX_PI_B_STS0r,
  23676 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23677 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23678 	BCMI_TSCBH_XGXS_DSC_RX_PI_B_STS0r_fields,
  23679 #else
  23680 	0,
  23681 #endif
  23682 #endif
  23683 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23684 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23685 	"DSC_RX_PI_B_STS0r",
  23686 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23687 	"DSC_I_RX_PI_B_STATUS_0",
  23688 	NULL,
  23689 #endif
  23690 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23691 	0x0, /* 0 */
  23692 	0,
  23693 #endif
  23694 },
  23695 {
  23696 	BCMI_TSCBH_XGXS_MDIO_BCST_PORT_ADDRr,
  23697 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23698 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23699 	BCMI_TSCBH_XGXS_MDIO_BCST_PORT_ADDRr_fields,
  23700 #else
  23701 	0,
  23702 #endif
  23703 #endif
  23704 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23705 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23706 	"MDIO_BCST_PORT_ADDRr",
  23707 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23708 	"MDIO_MMDSEL_AER_COM_MDIO_BRCST_PORT_ADDR",
  23709 	NULL,
  23710 #endif
  23711 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23712 	0x1f, /* 31 */
  23713 	0,
  23714 #endif
  23715 },
  23716 {
  23717 	BCMI_TSCBH_XGXS_MDIO_MMD_SELr,
  23718 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23719 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23720 	BCMI_TSCBH_XGXS_MDIO_MMD_SELr_fields,
  23721 #else
  23722 	0,
  23723 #endif
  23724 #endif
  23725 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23726 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23727 	"MDIO_MMD_SELr",
  23728 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23729 	"MDIO_MMDSEL_AER_COM_MDIO_MMD_SELECT",
  23730 	NULL,
  23731 #endif
  23732 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23733 	0x404d, /* 16461 */
  23734 	0,
  23735 #endif
  23736 },
  23737 {
  23738 	BCMI_TSCBH_XGXS_MDIO_AERr,
  23739 #if  PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1
  23740 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_TSCBH_XGXS
  23741 	BCMI_TSCBH_XGXS_MDIO_AERr_fields,
  23742 #else
  23743 	0,
  23744 #endif
  23745 #endif
  23746 	 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1),
  23747 	PHYMOD_SYMBOL_FLAG_REGISTER,
  23748 	"MDIO_AERr",
  23749 #if  PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1
  23750 	"MDIO_MMDSEL_AER_COM_MDIO_AER",
  23751 	NULL,
  23752 #endif
  23753 #if  PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1
  23754 	0x0, /* 0 */
  23755 	0,
  23756 #endif
  23757 },
  23758 #endif
  23759 };
  23760 
  23761 
  23762 phymod_symbols_t bcmi_tscbh_xgxs_symbols = 
  23763 {
  23764    bcmi_tscbh_xgxs_syms, sizeof(bcmi_tscbh_xgxs_syms)/sizeof(bcmi_tscbh_xgxs_syms[0]),
  23765 #if PHYMOD_CONFIG_INCLUDE_FIELD_NAMES == 1
  23766    bcmi_tscbh_xgxs_fields
  23767 #else
  23768    NULL
  23769 #endif
  23770 /* END OF SYMBOL FILE */
  23771 };
  23772 
  23773 #endif /* PHYMOD_CONFIG_INCLUDE_CHIP_SYMBOLS */
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