bcmi_sgmiip2x4_serdes_sym.c (121143B)
1 /******************************************************************************* 2 * 3 * 4 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 5 * 6 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 7 * 8 * DO NOT EDIT THIS FILE! 9 * This file is auto-generated from the registers file. 10 * Edits to this file will be lost when it is regenerated. 11 * 12 * Symbol table file for the BCMI_SGMIIP2X4_SERDES. 13 * This symbol table is used by the Broadcom debug shell. 14 */ 15 16 17 #include <phymod/chip/bcmi_sgmiip2x4_serdes_defs.h> 18 #include <phymod/phymod_symbols.h> 19 20 /* No symbols will be compiled unless this is defined. */ 21 #if PHYMOD_CONFIG_INCLUDE_CHIP_SYMBOLS == 1 22 /******************************************************************************* 23 * 24 * If PHYMOD_CONFIG_INCLUDE_FIELD_INFO is 1, then symbol information 25 * necessary to encode and decode the individual fields of a register or memory 26 * will be available. 27 * 28 * Without it, only the register and memory names will be symbolically available 29 * and their values will be displayed as raw data only. 30 * 31 * Field information can be compiled out in the interest of saving code space. 32 */ 33 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 34 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 35 36 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_AERr_fields[] = 37 { 38 /* MMD_PORT:0:10 */ 39 PHYMOD_SYMBOL_FIELD_ENCODE(207, 10, 0), 40 /* MMD_DEVICETYPE:11:15 */ 41 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(204, 15, 11) 42 }; 43 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_AUTONEGADVr_fields[] = 44 { 45 /* FULL_DUPLEX:5:5 */ 46 PHYMOD_SYMBOL_FIELD_ENCODE(128, 5, 5), 47 /* HALF_DUPLEX:6:6 */ 48 PHYMOD_SYMBOL_FIELD_ENCODE(131, 6, 6), 49 /* PAUSE:7:8 */ 50 PHYMOD_SYMBOL_FIELD_ENCODE(222, 8, 7), 51 /* REMOTE_FAULT:12:13 */ 52 PHYMOD_SYMBOL_FIELD_ENCODE(295, 13, 12), 53 /* NEXT_PAGE:15:15 */ 54 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(218, 15, 15) 55 }; 56 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_AUTONEGEXPr_fields[] = 57 { 58 /* LATCH_PAGE_RX:1:1 */ 59 PHYMOD_SYMBOL_FIELD_ENCODE(164, 1, 1), 60 /* NEXT_PAGE_ABILITY:2:2 */ 61 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(219, 2, 2) 62 }; 63 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_AUTONEGLPABILr_fields[] = 64 { 65 /* MR_LP_ADV_ABILITY:0:15 */ 66 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(213, 15, 0) 67 }; 68 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_AUTONEGLPABIL2r_fields[] = 69 { 70 /* MR_LP_NP_RX_O:0:15 */ 71 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(214, 15, 0) 72 }; 73 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_AUTONEGNPr_fields[] = 74 { 75 /* MESSAGE:0:10 */ 76 PHYMOD_SYMBOL_FIELD_ENCODE(199, 10, 0), 77 /* TOGGLE:11:11 */ 78 PHYMOD_SYMBOL_FIELD_ENCODE(423, 11, 11), 79 /* ACK2:12:12 */ 80 PHYMOD_SYMBOL_FIELD_ENCODE(1, 12, 12), 81 /* MESSAGE_PAGE:13:13 */ 82 PHYMOD_SYMBOL_FIELD_ENCODE(200, 13, 13), 83 /* ACK:14:14 */ 84 PHYMOD_SYMBOL_FIELD_ENCODE(0, 14, 14), 85 /* NEXT_PAGE:15:15 */ 86 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(218, 15, 15) 87 }; 88 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_BLKADDR0r_fields[] = 89 { 90 /* BLOCKADDRESS:4:14 */ 91 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(15, 14, 4) 92 }; 93 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_BLKADDR1r_fields[] = 94 { 95 /* BLOCKADDRESS:4:14 */ 96 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(15, 14, 4) 97 }; 98 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_BLKADDR2r_fields[] = 99 { 100 /* BLOCKADDRESS:4:14 */ 101 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(15, 14, 4) 102 }; 103 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_COMBO_AUTONEGADVr_fields[] = 104 { 105 /* FULL_DUPLEX:5:5 */ 106 PHYMOD_SYMBOL_FIELD_ENCODE(128, 5, 5), 107 /* HALF_DUPLEX:6:6 */ 108 PHYMOD_SYMBOL_FIELD_ENCODE(131, 6, 6), 109 /* PAUSE:7:8 */ 110 PHYMOD_SYMBOL_FIELD_ENCODE(222, 8, 7), 111 /* REMOTE_FAULT:12:13 */ 112 PHYMOD_SYMBOL_FIELD_ENCODE(295, 13, 12), 113 /* NEXT_PAGE:15:15 */ 114 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(218, 15, 15) 115 }; 116 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_COMBO_AUTONEGEXPr_fields[] = 117 { 118 /* LATCH_PAGE_RX:1:1 */ 119 PHYMOD_SYMBOL_FIELD_ENCODE(164, 1, 1), 120 /* NEXT_PAGE_ABILITY:2:2 */ 121 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(219, 2, 2) 122 }; 123 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_COMBO_AUTONEGLPABILr_fields[] = 124 { 125 /* MR_LP_ADV_ABILITY:0:15 */ 126 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(213, 15, 0) 127 }; 128 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_COMBO_AUTONEGLPABIL2r_fields[] = 129 { 130 /* MR_LP_NP_RX_O:0:15 */ 131 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(214, 15, 0) 132 }; 133 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_COMBO_AUTONEGNPr_fields[] = 134 { 135 /* MESSAGE:0:10 */ 136 PHYMOD_SYMBOL_FIELD_ENCODE(199, 10, 0), 137 /* TOGGLE:11:11 */ 138 PHYMOD_SYMBOL_FIELD_ENCODE(423, 11, 11), 139 /* ACK2:12:12 */ 140 PHYMOD_SYMBOL_FIELD_ENCODE(1, 12, 12), 141 /* MESSAGE_PAGE:13:13 */ 142 PHYMOD_SYMBOL_FIELD_ENCODE(200, 13, 13), 143 /* ACK:14:14 */ 144 PHYMOD_SYMBOL_FIELD_ENCODE(0, 14, 14), 145 /* NEXT_PAGE:15:15 */ 146 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(218, 15, 15) 147 }; 148 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_COMBO_ID1r_fields[] = 149 { 150 /* REGID:0:15 */ 151 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(294, 15, 0) 152 }; 153 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_COMBO_ID2r_fields[] = 154 { 155 /* REGID:0:15 */ 156 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(294, 15, 0) 157 }; 158 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_COMBO_MIICTLr_fields[] = 159 { 160 /* MANUAL_SPEED1:6:6 */ 161 PHYMOD_SYMBOL_FIELD_ENCODE(194, 6, 6), 162 /* COLLISION_TEST_EN:7:7 */ 163 PHYMOD_SYMBOL_FIELD_ENCODE(44, 7, 7), 164 /* DUPLEX:8:8 */ 165 PHYMOD_SYMBOL_FIELD_ENCODE(85, 8, 8), 166 /* RESTART_AUTONEG:9:9 */ 167 PHYMOD_SYMBOL_FIELD_ENCODE(325, 9, 9), 168 /* PWRDWN_SW:11:11 */ 169 PHYMOD_SYMBOL_FIELD_ENCODE(274, 11, 11), 170 /* AUTONEG_ENABLE:12:12 */ 171 PHYMOD_SYMBOL_FIELD_ENCODE(9, 12, 12), 172 /* MANUAL_SPEED0:13:13 */ 173 PHYMOD_SYMBOL_FIELD_ENCODE(193, 13, 13), 174 /* GLOOPBACK:14:14 */ 175 PHYMOD_SYMBOL_FIELD_ENCODE(130, 14, 14), 176 /* RST_HW:15:15 */ 177 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(331, 15, 15) 178 }; 179 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_COMBO_MIIEXTSTATr_fields[] = 180 { 181 /* S1000BASE_T_HALF_DUPLEX_CAPABLE:12:12 */ 182 PHYMOD_SYMBOL_FIELD_ENCODE(365, 12, 12), 183 /* S1000BASE_T_FULL_DUPLEX_CAPABLE:13:13 */ 184 PHYMOD_SYMBOL_FIELD_ENCODE(364, 13, 13), 185 /* S1000BASE_X_HALF_DUPLEX_CAPABLE:14:14 */ 186 PHYMOD_SYMBOL_FIELD_ENCODE(367, 14, 14), 187 /* S1000BASE_X_FULL_DUPLEX_CAPABLE:15:15 */ 188 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(366, 15, 15) 189 }; 190 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_COMBO_MIISTATr_fields[] = 191 { 192 /* EXTENDED_CAPABILITY:0:0 */ 193 PHYMOD_SYMBOL_FIELD_ENCODE(101, 0, 0), 194 /* JABBER_DETECT:1:1 */ 195 PHYMOD_SYMBOL_FIELD_ENCODE(163, 1, 1), 196 /* LINK_STATUS:2:2 */ 197 PHYMOD_SYMBOL_FIELD_ENCODE(166, 2, 2), 198 /* AUTONEG_ABILITY:3:3 */ 199 PHYMOD_SYMBOL_FIELD_ENCODE(7, 3, 3), 200 /* REMOTE_FAULT_STAT:4:4 */ 201 PHYMOD_SYMBOL_FIELD_ENCODE(296, 4, 4), 202 /* AUTONEG_COMPLETE:5:5 */ 203 PHYMOD_SYMBOL_FIELD_ENCODE(8, 5, 5), 204 /* MF_PREAMBLE_SUPRESSION:6:6 */ 205 PHYMOD_SYMBOL_FIELD_ENCODE(201, 6, 6), 206 /* EXTENDED_STATUS:8:8 */ 207 PHYMOD_SYMBOL_FIELD_ENCODE(102, 8, 8), 208 /* S100BASE_T2_HALF_DUPLEX_CAPABLE:9:9 */ 209 PHYMOD_SYMBOL_FIELD_ENCODE(369, 9, 9), 210 /* S100BASE_T2_FULL_DUPLEX_CAPABLE:10:10 */ 211 PHYMOD_SYMBOL_FIELD_ENCODE(368, 10, 10), 212 /* S10BASE_T_HALF_DUPLEX_CAPABLE:11:11 */ 213 PHYMOD_SYMBOL_FIELD_ENCODE(374, 11, 11), 214 /* S10BASE_T_FULL_DUPLEX_CAPABLE:12:12 */ 215 PHYMOD_SYMBOL_FIELD_ENCODE(373, 12, 12), 216 /* S100BASE_X_HALF_DUPLEX_CAPABLE:13:13 */ 217 PHYMOD_SYMBOL_FIELD_ENCODE(372, 13, 13), 218 /* S100BASE_X_FULL_DUPLEX_CAPABLE:14:14 */ 219 PHYMOD_SYMBOL_FIELD_ENCODE(371, 14, 14), 220 /* S100BASE_T4_CAPABLE:15:15 */ 221 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(370, 15, 15) 222 }; 223 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_COMBO_MMD_ACCADr_fields[] = 224 { 225 /* ADDRDATA:0:15 */ 226 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2, 15, 0) 227 }; 228 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_COMBO_MMD_ACCCTLr_fields[] = 229 { 230 /* DEVAD:0:4 */ 231 PHYMOD_SYMBOL_FIELD_ENCODE(56, 4, 0), 232 /* INCREMENT_CTRL:14:15 */ 233 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(141, 15, 14) 234 }; 235 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_DIGITAL4_BLKADDRr_fields[] = 236 { 237 /* BLOCKADDRESS:4:14 */ 238 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(15, 14, 4) 239 }; 240 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_DIGITAL5_BLKADDRr_fields[] = 241 { 242 /* BLOCKADDRESS:4:14 */ 243 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(15, 14, 4) 244 }; 245 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_DIGITAL_BLKADDRr_fields[] = 246 { 247 /* BLOCKADDRESS:4:14 */ 248 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(15, 14, 4) 249 }; 250 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_DIGITAL_CTL1000X1r_fields[] = 251 { 252 /* FIBER_MODE_1000X:0:0 */ 253 PHYMOD_SYMBOL_FIELD_ENCODE(113, 0, 0), 254 /* SIGNAL_DETECT_EN:2:2 */ 255 PHYMOD_SYMBOL_FIELD_ENCODE(387, 2, 2), 256 /* INVERT_SIGNAL_DETECT:3:3 */ 257 PHYMOD_SYMBOL_FIELD_ENCODE(152, 3, 3), 258 /* AUTODET_EN:4:4 */ 259 PHYMOD_SYMBOL_FIELD_ENCODE(6, 4, 4), 260 /* SGMII_MASTER_MODE:5:5 */ 261 PHYMOD_SYMBOL_FIELD_ENCODE(379, 5, 5), 262 /* DISABLE_PLL_PWRDWN:6:6 */ 263 PHYMOD_SYMBOL_FIELD_ENCODE(67, 6, 6), 264 /* COMMA_DET_EN:8:8 */ 265 PHYMOD_SYMBOL_FIELD_ENCODE(45, 8, 8), 266 /* REMOTE_LOOPBACK:10:10 */ 267 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(297, 10, 10) 268 }; 269 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_DIGITAL_CTL1000X2r_fields[] = 270 { 271 /* ENABLE_PARALLEL_DETECTION:0:0 */ 272 PHYMOD_SYMBOL_FIELD_ENCODE(95, 0, 0), 273 /* DISABLE_FALSE_LINK:1:1 */ 274 PHYMOD_SYMBOL_FIELD_ENCODE(66, 1, 1), 275 /* FILTER_FORCE_LINK:2:2 */ 276 PHYMOD_SYMBOL_FIELD_ENCODE(116, 2, 2), 277 /* AUTONEG_FAST_TIMERS:6:6 */ 278 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(10, 6, 6) 279 }; 280 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_FX100_BLKADDRr_fields[] = 281 { 282 /* BLOCKADDRESS:4:14 */ 283 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(15, 14, 4) 284 }; 285 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_FX100_CTL1r_fields[] = 286 { 287 /* ENABLE:0:0 */ 288 PHYMOD_SYMBOL_FIELD_ENCODE(94, 0, 0), 289 /* FULL_DUPLEX:1:1 */ 290 PHYMOD_SYMBOL_FIELD_ENCODE(128, 1, 1), 291 /* FAR_END_FAULT_EN:3:3 */ 292 PHYMOD_SYMBOL_FIELD_ENCODE(111, 3, 3), 293 /* RXDATA_SEL:6:9 */ 294 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(335, 9, 6) 295 }; 296 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_FX100_CTL3r_fields[] = 297 { 298 /* FAST_TIMERS:0:0 */ 299 PHYMOD_SYMBOL_FIELD_ENCODE(112, 0, 0), 300 /* FORCE_LINK:3:3 */ 301 PHYMOD_SYMBOL_FIELD_ENCODE(120, 3, 3), 302 /* CORRELATOR_DISABLE:7:7 */ 303 PHYMOD_SYMBOL_FIELD_ENCODE(48, 7, 7), 304 /* NUMBER_OF_IDLE:8:15 */ 305 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(221, 15, 8) 306 }; 307 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_ID1r_fields[] = 308 { 309 /* REGID:0:15 */ 310 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(294, 15, 0) 311 }; 312 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_ID2r_fields[] = 313 { 314 /* REGID:0:15 */ 315 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(294, 15, 0) 316 }; 317 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_LANECTLr_fields[] = 318 { 319 /* PCS_EN_TX:0:0 */ 320 PHYMOD_SYMBOL_FIELD_ENCODE(228, 0, 0), 321 /* PCS_EN_RX:1:1 */ 322 PHYMOD_SYMBOL_FIELD_ENCODE(227, 1, 1), 323 /* CDET:2:2 */ 324 PHYMOD_SYMBOL_FIELD_ENCODE(31, 2, 2), 325 /* EDEN:3:3 */ 326 PHYMOD_SYMBOL_FIELD_ENCODE(88, 3, 3), 327 /* PMD_TXDISABLE:4:4 */ 328 PHYMOD_SYMBOL_FIELD_ENCODE(257, 4, 4), 329 /* GLOOP1G:8:8 */ 330 PHYMOD_SYMBOL_FIELD_ENCODE(129, 8, 8), 331 /* RLOOP1G:9:9 */ 332 PHYMOD_SYMBOL_FIELD_ENCODE(329, 9, 9), 333 /* BYPASS_OSMODE:10:10 */ 334 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(20, 10, 10) 335 }; 336 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_LANECTL3r_fields[] = 337 { 338 /* PWRDWN_PLL:8:8 */ 339 PHYMOD_SYMBOL_FIELD_ENCODE(273, 8, 8), 340 /* PWRDWN_FORCE:11:11 */ 341 PHYMOD_SYMBOL_FIELD_ENCODE(272, 11, 11), 342 /* FORCE_PLL_LOCK:12:12 */ 343 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(122, 12, 12) 344 }; 345 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_MIICTLr_fields[] = 346 { 347 /* MANUAL_SPEED1:6:6 */ 348 PHYMOD_SYMBOL_FIELD_ENCODE(194, 6, 6), 349 /* COLLISION_TEST_EN:7:7 */ 350 PHYMOD_SYMBOL_FIELD_ENCODE(44, 7, 7), 351 /* DUPLEX:8:8 */ 352 PHYMOD_SYMBOL_FIELD_ENCODE(85, 8, 8), 353 /* RESTART_AUTONEG:9:9 */ 354 PHYMOD_SYMBOL_FIELD_ENCODE(325, 9, 9), 355 /* PWRDWN_SW:11:11 */ 356 PHYMOD_SYMBOL_FIELD_ENCODE(274, 11, 11), 357 /* AUTONEG_ENABLE:12:12 */ 358 PHYMOD_SYMBOL_FIELD_ENCODE(9, 12, 12), 359 /* MANUAL_SPEED0:13:13 */ 360 PHYMOD_SYMBOL_FIELD_ENCODE(193, 13, 13), 361 /* GLOOPBACK:14:14 */ 362 PHYMOD_SYMBOL_FIELD_ENCODE(130, 14, 14), 363 /* RST_HW:15:15 */ 364 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(331, 15, 15) 365 }; 366 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_MIIEXTSTATr_fields[] = 367 { 368 /* S1000BASE_T_HALF_DUPLEX_CAPABLE:12:12 */ 369 PHYMOD_SYMBOL_FIELD_ENCODE(365, 12, 12), 370 /* S1000BASE_T_FULL_DUPLEX_CAPABLE:13:13 */ 371 PHYMOD_SYMBOL_FIELD_ENCODE(364, 13, 13), 372 /* S1000BASE_X_HALF_DUPLEX_CAPABLE:14:14 */ 373 PHYMOD_SYMBOL_FIELD_ENCODE(367, 14, 14), 374 /* S1000BASE_X_FULL_DUPLEX_CAPABLE:15:15 */ 375 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(366, 15, 15) 376 }; 377 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_MIISTATr_fields[] = 378 { 379 /* EXTENDED_CAPABILITY:0:0 */ 380 PHYMOD_SYMBOL_FIELD_ENCODE(101, 0, 0), 381 /* JABBER_DETECT:1:1 */ 382 PHYMOD_SYMBOL_FIELD_ENCODE(163, 1, 1), 383 /* LINK_STATUS:2:2 */ 384 PHYMOD_SYMBOL_FIELD_ENCODE(166, 2, 2), 385 /* AUTONEG_ABILITY:3:3 */ 386 PHYMOD_SYMBOL_FIELD_ENCODE(7, 3, 3), 387 /* REMOTE_FAULT_STAT:4:4 */ 388 PHYMOD_SYMBOL_FIELD_ENCODE(296, 4, 4), 389 /* AUTONEG_COMPLETE:5:5 */ 390 PHYMOD_SYMBOL_FIELD_ENCODE(8, 5, 5), 391 /* MF_PREAMBLE_SUPRESSION:6:6 */ 392 PHYMOD_SYMBOL_FIELD_ENCODE(201, 6, 6), 393 /* EXTENDED_STATUS:8:8 */ 394 PHYMOD_SYMBOL_FIELD_ENCODE(102, 8, 8), 395 /* S100BASE_T2_HALF_DUPLEX_CAPABLE:9:9 */ 396 PHYMOD_SYMBOL_FIELD_ENCODE(369, 9, 9), 397 /* S100BASE_T2_FULL_DUPLEX_CAPABLE:10:10 */ 398 PHYMOD_SYMBOL_FIELD_ENCODE(368, 10, 10), 399 /* S10BASE_T_HALF_DUPLEX_CAPABLE:11:11 */ 400 PHYMOD_SYMBOL_FIELD_ENCODE(374, 11, 11), 401 /* S10BASE_T_FULL_DUPLEX_CAPABLE:12:12 */ 402 PHYMOD_SYMBOL_FIELD_ENCODE(373, 12, 12), 403 /* S100BASE_X_HALF_DUPLEX_CAPABLE:13:13 */ 404 PHYMOD_SYMBOL_FIELD_ENCODE(372, 13, 13), 405 /* S100BASE_X_FULL_DUPLEX_CAPABLE:14:14 */ 406 PHYMOD_SYMBOL_FIELD_ENCODE(371, 14, 14), 407 /* S100BASE_T4_CAPABLE:15:15 */ 408 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(370, 15, 15) 409 }; 410 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_MISC1r_fields[] = 411 { 412 /* FORCE_SPEED:0:4 */ 413 PHYMOD_SYMBOL_FIELD_ENCODE(123, 4, 0), 414 /* REFCLK_SEL:13:15 */ 415 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(292, 15, 13) 416 }; 417 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_MISC2r_fields[] = 418 { 419 /* FIFO_ERR_CYA:4:4 */ 420 PHYMOD_SYMBOL_FIELD_ENCODE(114, 4, 4), 421 /* MIIGMIIMUX_EN:7:7 */ 422 PHYMOD_SYMBOL_FIELD_ENCODE(203, 7, 7), 423 /* MIIGMIIDLY_EN:8:8 */ 424 PHYMOD_SYMBOL_FIELD_ENCODE(202, 8, 8), 425 /* CLK41_BYPASS:9:9 */ 426 PHYMOD_SYMBOL_FIELD_ENCODE(41, 9, 9), 427 /* CLKSIGDET_BYPASS:10:10 */ 428 PHYMOD_SYMBOL_FIELD_ENCODE(42, 10, 10), 429 /* RXCK_MII_GEN_SEL_VAL:13:13 */ 430 PHYMOD_SYMBOL_FIELD_ENCODE(334, 13, 13), 431 /* RXCK_MII_GEN_SEL_FORCE:14:14 */ 432 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(333, 14, 14) 433 }; 434 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_MISC3r_fields[] = 435 { 436 /* SGMII_EXT_SEL:7:7 */ 437 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(378, 7, 7) 438 }; 439 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_MISC5r_fields[] = 440 { 441 /* LPI_EN_TX:14:14 */ 442 PHYMOD_SYMBOL_FIELD_ENCODE(188, 14, 14), 443 /* LPI_EN_RX:15:15 */ 444 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(187, 15, 15) 445 }; 446 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_MISC8r_fields[] = 447 { 448 /* FORCE_OSCDR_MODE:0:3 */ 449 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(121, 3, 0) 450 }; 451 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_MISCCTL1r_fields[] = 452 { 453 /* IEEE_BLKSEL_VAL:0:0 */ 454 PHYMOD_SYMBOL_FIELD_ENCODE(140, 0, 0), 455 /* IEEE_BLKSEL_AUTODET:1:1 */ 456 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(139, 1, 1) 457 }; 458 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_MISCRESETr_fields[] = 459 { 460 /* RESET_PLL:8:8 */ 461 PHYMOD_SYMBOL_FIELD_ENCODE(322, 8, 8), 462 /* RESET_MDIO:15:15 */ 463 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(321, 15, 15) 464 }; 465 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_MMDSELr_fields[] = 466 { 467 /* DEVCL22_EN:0:0 */ 468 PHYMOD_SYMBOL_FIELD_ENCODE(58, 0, 0), 469 /* DEVDEVAD_EN:1:1 */ 470 PHYMOD_SYMBOL_FIELD_ENCODE(59, 1, 1), 471 /* DEVPMD_EN:2:2 */ 472 PHYMOD_SYMBOL_FIELD_ENCODE(60, 2, 2), 473 /* DEVAN_EN:3:3 */ 474 PHYMOD_SYMBOL_FIELD_ENCODE(57, 3, 3), 475 /* PRTAD_BCST_DISABLE:13:13 */ 476 PHYMOD_SYMBOL_FIELD_ENCODE(268, 13, 13), 477 /* MULTIMMDS_EN:14:14 */ 478 PHYMOD_SYMBOL_FIELD_ENCODE(215, 14, 14), 479 /* MULTIPRTS_EN:15:15 */ 480 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(217, 15, 15) 481 }; 482 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_MMD_ACCADr_fields[] = 483 { 484 /* ADDRDATA:0:15 */ 485 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(2, 15, 0) 486 }; 487 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_MMD_ACCCTLr_fields[] = 488 { 489 /* DEVAD:0:4 */ 490 PHYMOD_SYMBOL_FIELD_ENCODE(56, 4, 0), 491 /* INCREMENT_CTRL:14:15 */ 492 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(141, 15, 14) 493 }; 494 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_MODE1Gr_fields[] = 495 { 496 /* TX1G_MODE:0:1 */ 497 PHYMOD_SYMBOL_FIELD_ENCODE(425, 1, 0), 498 /* RX1G_MODE:2:3 */ 499 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(332, 3, 2) 500 }; 501 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_PLL2_BLKADDRr_fields[] = 502 { 503 /* BLOCKADDRESS:4:14 */ 504 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(15, 14, 4) 505 }; 506 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_PLL2_CTL1r_fields[] = 507 { 508 /* EXT_RANGE:0:6 */ 509 PHYMOD_SYMBOL_FIELD_ENCODE(103, 6, 0), 510 /* CAL_TH:7:10 */ 511 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(29, 10, 7) 512 }; 513 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_PLL2_CTL2r_fields[] = 514 { 515 /* RANGE_OVRD_VAL:0:6 */ 516 PHYMOD_SYMBOL_FIELD_ENCODE(285, 6, 0), 517 /* RANGE_OVRD:7:7 */ 518 PHYMOD_SYMBOL_FIELD_ENCODE(284, 7, 7), 519 /* RANGE_DFS:8:14 */ 520 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(283, 14, 8) 521 }; 522 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_PLL2_CTL3r_fields[] = 523 { 524 /* CALIB_CAP_CHARGE_TIME:0:15 */ 525 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(22, 15, 0) 526 }; 527 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_PLL2_CTL4r_fields[] = 528 { 529 /* CALIB_DELAY_TIME:0:15 */ 530 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(23, 15, 0) 531 }; 532 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_PLL2_CTL5r_fields[] = 533 { 534 /* CALIB_STEP_TIME:0:15 */ 535 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(24, 15, 0) 536 }; 537 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_PLL2_CTL6r_fields[] = 538 { 539 /* DFE0_VCOCAL_VALID_OVRD_VAL:0:0 */ 540 PHYMOD_SYMBOL_FIELD_ENCODE(65, 0, 0), 541 /* DFE0_VCOCAL_VALID_OVRD:1:1 */ 542 PHYMOD_SYMBOL_FIELD_ENCODE(64, 1, 1), 543 /* DFE0_CALIB_SEARCH_BIT:2:4 */ 544 PHYMOD_SYMBOL_FIELD_ENCODE(61, 4, 2), 545 /* DFE0_HALFSTEP_EN:5:5 */ 546 PHYMOD_SYMBOL_FIELD_ENCODE(63, 5, 5), 547 /* DFE0_EN_CALIB_N:6:6 */ 548 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(62, 6, 6) 549 }; 550 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_PLL2_STAT0r_fields[] = 551 { 552 /* CAL_ERROR:0:0 */ 553 PHYMOD_SYMBOL_FIELD_ENCODE(25, 0, 0), 554 /* CAL_VALID:1:1 */ 555 PHYMOD_SYMBOL_FIELD_ENCODE(30, 1, 1), 556 /* CAL_STATE:2:5 */ 557 PHYMOD_SYMBOL_FIELD_ENCODE(26, 5, 2), 558 /* VCO_RANGE:6:12 */ 559 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(437, 12, 6) 560 }; 561 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_PLL_AFE_BLKADDRr_fields[] = 562 { 563 /* BLOCKADDRESS:4:14 */ 564 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(15, 14, 4) 565 }; 566 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_PLL_AFE_CTL0r_fields[] = 567 { 568 /* CM_SEL:0:0 */ 569 PHYMOD_SYMBOL_FIELD_ENCODE(43, 0, 0), 570 /* HIPASS:1:1 */ 571 PHYMOD_SYMBOL_FIELD_ENCODE(134, 1, 1), 572 /* CURR_SEL:2:5 */ 573 PHYMOD_SYMBOL_FIELD_ENCODE(50, 5, 2), 574 /* RPAR:6:9 */ 575 PHYMOD_SYMBOL_FIELD_ENCODE(330, 9, 6), 576 /* CPAR:10:11 */ 577 PHYMOD_SYMBOL_FIELD_ENCODE(49, 11, 10), 578 /* XTAL_BIAS:12:14 */ 579 PHYMOD_SYMBOL_FIELD_ENCODE(443, 14, 12), 580 /* EN_TEST_INTEGER_CLK:15:15 */ 581 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(100, 15, 15) 582 }; 583 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_PLL_AFE_CTL1r_fields[] = 584 { 585 /* EN_TEST_FRAC_CLK:0:0 */ 586 PHYMOD_SYMBOL_FIELD_ENCODE(99, 0, 0), 587 /* LV_EN:1:1 */ 588 PHYMOD_SYMBOL_FIELD_ENCODE(189, 1, 1), 589 /* XTAL_CORE_BIAS:2:5 */ 590 PHYMOD_SYMBOL_FIELD_ENCODE(444, 5, 2), 591 /* PLL_PON:6:9 */ 592 PHYMOD_SYMBOL_FIELD_ENCODE(256, 9, 6), 593 /* LEAKAGE_TEST:10:11 */ 594 PHYMOD_SYMBOL_FIELD_ENCODE(165, 11, 10), 595 /* RESERVED_31_28:12:15 */ 596 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(307, 15, 12) 597 }; 598 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_PLL_AFE_CTL2r_fields[] = 599 { 600 /* RESERVED_33_32:0:1 */ 601 PHYMOD_SYMBOL_FIELD_ENCODE(309, 1, 0), 602 /* TEST_VC:2:2 */ 603 PHYMOD_SYMBOL_FIELD_ENCODE(420, 2, 2), 604 /* EN10T:3:3 */ 605 PHYMOD_SYMBOL_FIELD_ENCODE(93, 3, 3), 606 /* INTN_FB_EN:4:4 */ 607 PHYMOD_SYMBOL_FIELD_ENCODE(150, 4, 4), 608 /* TEST_AMP:5:8 */ 609 PHYMOD_SYMBOL_FIELD_ENCODE(417, 8, 5), 610 /* RESERVED_41:9:9 */ 611 PHYMOD_SYMBOL_FIELD_ENCODE(311, 9, 9), 612 /* TEST_PLL_MODE:10:10 */ 613 PHYMOD_SYMBOL_FIELD_ENCODE(418, 10, 10), 614 /* VCO_ICTR:11:13 */ 615 PHYMOD_SYMBOL_FIELD_ENCODE(436, 13, 11), 616 /* I_PLL_FRAC_MODE:14:15 */ 617 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(161, 15, 14) 618 }; 619 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_PLL_AFE_CTL3r_fields[] = 620 { 621 /* TCEST_NEG:0:2 */ 622 PHYMOD_SYMBOL_FIELD_ENCODE(412, 2, 0), 623 /* TESTCLK_EN:3:3 */ 624 PHYMOD_SYMBOL_FIELD_ENCODE(415, 3, 3), 625 /* TEST_SEL:4:6 */ 626 PHYMOD_SYMBOL_FIELD_ENCODE(419, 6, 4), 627 /* MMD_EN:7:7 */ 628 PHYMOD_SYMBOL_FIELD_ENCODE(206, 7, 7), 629 /* INT_DIV_EN:8:8 */ 630 PHYMOD_SYMBOL_FIELD_ENCODE(151, 8, 8), 631 /* REFCLK_IN_BIAS:9:14 */ 632 PHYMOD_SYMBOL_FIELD_ENCODE(291, 14, 9), 633 /* PLL_MODE:15:15 */ 634 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(255, 15, 15) 635 }; 636 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_PLL_AFE_CTL4r_fields[] = 637 { 638 /* DIV:0:3 */ 639 PHYMOD_SYMBOL_FIELD_ENCODE(72, 3, 0), 640 /* EN_CAP:4:6 */ 641 PHYMOD_SYMBOL_FIELD_ENCODE(96, 6, 4), 642 /* RESERVED_74_71:7:10 */ 643 PHYMOD_SYMBOL_FIELD_ENCODE(318, 10, 7), 644 /* MMD_RESETB:11:11 */ 645 PHYMOD_SYMBOL_FIELD_ENCODE(210, 11, 11), 646 /* ADJ:12:14 */ 647 PHYMOD_SYMBOL_FIELD_ENCODE(3, 14, 12), 648 /* MMD_PRSC8OR9PWDB:15:15 */ 649 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(209, 15, 15) 650 }; 651 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_PLL_AFE_CTL5r_fields[] = 652 { 653 /* MMD_PRSC4OR5PWDB:0:0 */ 654 PHYMOD_SYMBOL_FIELD_ENCODE(208, 0, 0), 655 /* CALIB_ADJ:1:3 */ 656 PHYMOD_SYMBOL_FIELD_ENCODE(21, 3, 1), 657 /* RESERVED_84:4:4 */ 658 PHYMOD_SYMBOL_FIELD_ENCODE(319, 4, 4), 659 /* EN_CUR:5:7 */ 660 PHYMOD_SYMBOL_FIELD_ENCODE(97, 7, 5), 661 /* I_PFD_OFFSET_ENLARGE:8:8 */ 662 PHYMOD_SYMBOL_FIELD_ENCODE(160, 8, 8), 663 /* REF_DOUBLER_EN:9:9 */ 664 PHYMOD_SYMBOL_FIELD_ENCODE(293, 9, 9), 665 /* I_PFD_OFFSET:10:11 */ 666 PHYMOD_SYMBOL_FIELD_ENCODE(159, 11, 10), 667 /* I_NDIV_FRAC_3_0:12:15 */ 668 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(156, 15, 12) 669 }; 670 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_PLL_AFE_CTL6r_fields[] = 671 { 672 /* I_NDIV_FRAC_17_4:0:13 */ 673 PHYMOD_SYMBOL_FIELD_ENCODE(155, 13, 0), 674 /* I_NDIV_INT_1_0:14:15 */ 675 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(157, 15, 14) 676 }; 677 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_PLL_AFE_CTL7r_fields[] = 678 { 679 /* I_NDIV_INT_9_2:0:7 */ 680 PHYMOD_SYMBOL_FIELD_ENCODE(158, 7, 0), 681 /* MMD_DIV_RANGE:8:8 */ 682 PHYMOD_SYMBOL_FIELD_ENCODE(205, 8, 8), 683 /* I_NDIV_DITHER_EN:9:9 */ 684 PHYMOD_SYMBOL_FIELD_ENCODE(154, 9, 9), 685 /* INV_VCO_CAL:10:10 */ 686 PHYMOD_SYMBOL_FIELD_ENCODE(153, 10, 10), 687 /* I_PLL_SDM_PWRDNB:11:11 */ 688 PHYMOD_SYMBOL_FIELD_ENCODE(162, 11, 11), 689 /* SEL_FP3CAP:12:15 */ 690 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(377, 15, 12) 691 }; 692 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_PLL_AFE_CTL8r_fields[] = 693 { 694 /* VDD1P0_PLL_EN:0:0 */ 695 PHYMOD_SYMBOL_FIELD_ENCODE(439, 0, 0), 696 /* RESERVED_143_129:1:15 */ 697 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(302, 15, 1) 698 }; 699 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_PRBSr_fields[] = 700 { 701 /* PRBSGEN_ORDER:0:2 */ 702 PHYMOD_SYMBOL_FIELD_ENCODE(264, 2, 0), 703 /* PRBSGEN_INV:3:3 */ 704 PHYMOD_SYMBOL_FIELD_ENCODE(263, 3, 3), 705 /* PRBSGEN_EN:4:4 */ 706 PHYMOD_SYMBOL_FIELD_ENCODE(262, 4, 4), 707 /* TXDATAI_SEL:5:5 */ 708 PHYMOD_SYMBOL_FIELD_ENCODE(427, 5, 5), 709 /* PRBSMON_ORDER:8:10 */ 710 PHYMOD_SYMBOL_FIELD_ENCODE(267, 10, 8), 711 /* PRBSMON_INV:11:11 */ 712 PHYMOD_SYMBOL_FIELD_ENCODE(266, 11, 11), 713 /* PRBSMON_EN:12:12 */ 714 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(265, 12, 12) 715 }; 716 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_PWRRSTr_fields[] = 717 { 718 /* PWRDN_TX:0:0 */ 719 PHYMOD_SYMBOL_FIELD_ENCODE(271, 0, 0), 720 /* RESET_TX:1:1 */ 721 PHYMOD_SYMBOL_FIELD_ENCODE(324, 1, 1), 722 /* PWRDN_RX:8:8 */ 723 PHYMOD_SYMBOL_FIELD_ENCODE(270, 8, 8), 724 /* RESET_RX:9:9 */ 725 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(323, 9, 9) 726 }; 727 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_QSGMIIr_fields[] = 728 { 729 /* QSGMII_EN:0:0 */ 730 PHYMOD_SYMBOL_FIELD_ENCODE(278, 0, 0), 731 /* QSGMII_PIN_DISABLE:1:1 */ 732 PHYMOD_SYMBOL_FIELD_ENCODE(280, 1, 1), 733 /* QSGMII_SYNC_FORCE:2:2 */ 734 PHYMOD_SYMBOL_FIELD_ENCODE(281, 2, 2), 735 /* QSGMII_ADJ_EN_VAL:3:3 */ 736 PHYMOD_SYMBOL_FIELD_ENCODE(276, 3, 3), 737 /* QSGMII_ADJ_EN_FORCE:4:4 */ 738 PHYMOD_SYMBOL_FIELD_ENCODE(275, 4, 4), 739 /* QSGMII_AUTO_PDRST_LN123_DISABLE:5:5 */ 740 PHYMOD_SYMBOL_FIELD_ENCODE(277, 5, 5), 741 /* QSGMII_K28P1_LN_SEL:6:7 */ 742 PHYMOD_SYMBOL_FIELD_ENCODE(279, 7, 6), 743 /* DISPARITY_EN_VAL:12:12 */ 744 PHYMOD_SYMBOL_FIELD_ENCODE(68, 12, 12), 745 /* DISPERROR_SYNC_VAL:13:13 */ 746 PHYMOD_SYMBOL_FIELD_ENCODE(71, 13, 13), 747 /* DISPERROR_EN_VAL:14:14 */ 748 PHYMOD_SYMBOL_FIELD_ENCODE(70, 14, 14), 749 /* DISPERROR_EN_FORCE:15:15 */ 750 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(69, 15, 15) 751 }; 752 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX2_BLKADDRr_fields[] = 753 { 754 /* BLOCKADDRESS:4:14 */ 755 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(15, 14, 4) 756 }; 757 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX2_CDR0r_fields[] = 758 { 759 /* PI_PHASE_INVERT:0:0 */ 760 PHYMOD_SYMBOL_FIELD_ENCODE(253, 0, 0), 761 /* MDIO_EM_PWRDN:1:1 */ 762 PHYMOD_SYMBOL_FIELD_ENCODE(198, 1, 1), 763 /* MDIO_EM_ERR_CNT_FRZ:2:2 */ 764 PHYMOD_SYMBOL_FIELD_ENCODE(197, 2, 2), 765 /* MDIO_EM_ERR_CNT_CLR:3:3 */ 766 PHYMOD_SYMBOL_FIELD_ENCODE(196, 3, 3), 767 /* PI_PHASE_ROTATE_OVERRIDE:4:4 */ 768 PHYMOD_SYMBOL_FIELD_ENCODE(254, 4, 4), 769 /* PI_CLK90_OFFSET_OVERRIDE:5:5 */ 770 PHYMOD_SYMBOL_FIELD_ENCODE(249, 5, 5), 771 /* RX_INTERP_STATUS_SEL:6:8 */ 772 PHYMOD_SYMBOL_FIELD_ENCODE(338, 8, 6), 773 /* RX_INTERP_CTRL_CAP:9:9 */ 774 PHYMOD_SYMBOL_FIELD_ENCODE(337, 9, 9), 775 /* EM_PHASE_SHIFT_360_OVRD:10:10 */ 776 PHYMOD_SYMBOL_FIELD_ENCODE(91, 10, 10), 777 /* EM_PHASE_SHIFT_360_OVRD_VAL:11:11 */ 778 PHYMOD_SYMBOL_FIELD_ENCODE(92, 11, 11), 779 /* SIGDETTIME_SM:12:15 */ 780 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(381, 15, 12) 781 }; 782 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX2_CDR1r_fields[] = 783 { 784 /* PHASE_SAT_CTRL:0:1 */ 785 PHYMOD_SYMBOL_FIELD_ENCODE(239, 1, 0), 786 /* PHS_COUNTER_CLR:2:2 */ 787 PHYMOD_SYMBOL_FIELD_ENCODE(247, 2, 2), 788 /* PHASE_DELTA:3:3 */ 789 PHYMOD_SYMBOL_FIELD_ENCODE(233, 3, 3), 790 /* FREQ_UPD_EN:4:4 */ 791 PHYMOD_SYMBOL_FIELD_ENCODE(127, 4, 4), 792 /* FALLING_EDGE:5:5 */ 793 PHYMOD_SYMBOL_FIELD_ENCODE(110, 5, 5), 794 /* RISING_EDGE:6:6 */ 795 PHYMOD_SYMBOL_FIELD_ENCODE(328, 6, 6), 796 /* FLIP_PEAK_POLARITY:7:7 */ 797 PHYMOD_SYMBOL_FIELD_ENCODE(118, 7, 7), 798 /* FLIP_ZERO_POLARITY:8:8 */ 799 PHYMOD_SYMBOL_FIELD_ENCODE(119, 8, 8), 800 /* STEP_ONE:9:10 */ 801 PHYMOD_SYMBOL_FIELD_ENCODE(407, 10, 9), 802 /* STEP_TWO:11:12 */ 803 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(408, 12, 11) 804 }; 805 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX2_CDR2r_fields[] = 806 { 807 /* PHSACQ_TIMEOUT:0:7 */ 808 PHYMOD_SYMBOL_FIELD_ENCODE(246, 7, 0), 809 /* PHSACQ_STEP:8:8 */ 810 PHYMOD_SYMBOL_FIELD_ENCODE(245, 8, 8), 811 /* PHSACQ_FREQ_SEL:9:9 */ 812 PHYMOD_SYMBOL_FIELD_ENCODE(244, 9, 9), 813 /* PHSACQ_DIR:11:11 */ 814 PHYMOD_SYMBOL_FIELD_ENCODE(242, 11, 11), 815 /* RATE_SELECT:12:12 */ 816 PHYMOD_SYMBOL_FIELD_ENCODE(286, 12, 12), 817 /* PHSACQ_ENABLE:13:13 */ 818 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(243, 13, 13) 819 }; 820 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX2_CDR3r_fields[] = 821 { 822 /* PHASE_DELTA_SM:0:4 */ 823 PHYMOD_SYMBOL_FIELD_ENCODE(234, 4, 0), 824 /* PHASE_STROBE_SM:5:5 */ 825 PHYMOD_SYMBOL_FIELD_ENCODE(241, 5, 5), 826 /* PHASE_DEC_SM:6:6 */ 827 PHYMOD_SYMBOL_FIELD_ENCODE(232, 6, 6), 828 /* PHASE_INC_SM:7:7 */ 829 PHYMOD_SYMBOL_FIELD_ENCODE(237, 7, 7), 830 /* PHASE_OVERRIDE_SM:8:8 */ 831 PHYMOD_SYMBOL_FIELD_ENCODE(238, 8, 8), 832 /* PHASE_FRZ_1_EN:9:9 */ 833 PHYMOD_SYMBOL_FIELD_ENCODE(236, 9, 9), 834 /* PHASE_FRZ_1:10:10 */ 835 PHYMOD_SYMBOL_FIELD_ENCODE(235, 10, 10), 836 /* PHASE_STEP:11:12 */ 837 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(240, 12, 11) 838 }; 839 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX2_CDR4r_fields[] = 840 { 841 /* FREQ_OVERRIDE_VAL:0:4 */ 842 PHYMOD_SYMBOL_FIELD_ENCODE(126, 4, 0), 843 /* FREQ_OVERRIDE_EN:5:5 */ 844 PHYMOD_SYMBOL_FIELD_ENCODE(125, 5, 5), 845 /* FREQ_EN:6:6 */ 846 PHYMOD_SYMBOL_FIELD_ENCODE(124, 6, 6), 847 /* INTEG_CLR:7:7 */ 848 PHYMOD_SYMBOL_FIELD_ENCODE(146, 7, 7), 849 /* BWSEL_PROP:8:11 */ 850 PHYMOD_SYMBOL_FIELD_ENCODE(19, 11, 8), 851 /* BWSEL_INTEG:12:15 */ 852 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(18, 15, 12) 853 }; 854 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX2_SEQ0r_fields[] = 855 { 856 /* CDRLOCKTIMEACQ_S1_SM:0:7 */ 857 PHYMOD_SYMBOL_FIELD_ENCODE(33, 7, 0), 858 /* CDRLOCKTIMETRCKNRML_SM:8:15 */ 859 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(36, 15, 8) 860 }; 861 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX2_SEQ1r_fields[] = 862 { 863 /* CDRLOCKTIMEACQ_S3_SM:0:7 */ 864 PHYMOD_SYMBOL_FIELD_ENCODE(35, 7, 0), 865 /* CDRLOCKTIMEACQ_S2_SM:8:15 */ 866 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(34, 15, 8) 867 }; 868 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX2_STS0r_fields[] = 869 { 870 /* RX_SLOFF2_INVALID:0:0 */ 871 PHYMOD_SYMBOL_FIELD_ENCODE(361, 0, 0), 872 /* RX_SLOFF1_INVALID:1:1 */ 873 PHYMOD_SYMBOL_FIELD_ENCODE(357, 1, 1), 874 /* RX_SLOFF0_INVALID:2:2 */ 875 PHYMOD_SYMBOL_FIELD_ENCODE(353, 2, 2), 876 /* RX_SLICER_CAL_DONE:3:3 */ 877 PHYMOD_SYMBOL_FIELD_ENCODE(351, 3, 3), 878 /* RX_LMTOFF:4:9 */ 879 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(340, 9, 4) 880 }; 881 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX2_STS1r_fields[] = 882 { 883 /* SLCAL_STATE:0:2 */ 884 PHYMOD_SYMBOL_FIELD_ENCODE(394, 2, 0), 885 /* SLOFFX_VAL:3:6 */ 886 PHYMOD_SYMBOL_FIELD_ENCODE(402, 6, 3), 887 /* DN_SLOFFX_VAL:7:10 */ 888 PHYMOD_SYMBOL_FIELD_ENCODE(76, 10, 7), 889 /* UP_SLOFFX_VAL:11:14 */ 890 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(435, 14, 11) 891 }; 892 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX2_STS2r_fields[] = 893 { 894 /* LMTCAL_ACC:0:15 */ 895 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(168, 15, 0) 896 }; 897 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX2_STS3r_fields[] = 898 { 899 /* RECAL_IND:0:0 */ 900 PHYMOD_SYMBOL_FIELD_ENCODE(287, 0, 0), 901 /* LMTCAL_ADJ_CNT:1:5 */ 902 PHYMOD_SYMBOL_FIELD_ENCODE(170, 5, 1), 903 /* LMTCAL_VALID:6:6 */ 904 PHYMOD_SYMBOL_FIELD_ENCODE(186, 6, 6), 905 /* RX_LA_CAL_DONE:7:7 */ 906 PHYMOD_SYMBOL_FIELD_ENCODE(339, 7, 7), 907 /* LMTCAL_STATE:8:10 */ 908 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(185, 10, 8) 909 }; 910 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX2_STS4r_fields[] = 911 { 912 /* EM_ERR_CNT_H:0:15 */ 913 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(89, 15, 0) 914 }; 915 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX2_STS5r_fields[] = 916 { 917 /* EM_ERR_CNT_L:0:15 */ 918 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(90, 15, 0) 919 }; 920 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX2_STS6r_fields[] = 921 { 922 /* RX_PHS_INTERP_STATUS:0:15 */ 923 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(344, 15, 0) 924 }; 925 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX3_BLKADDRr_fields[] = 926 { 927 /* BLOCKADDRESS:4:14 */ 928 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(15, 14, 4) 929 }; 930 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL0r_fields[] = 931 { 932 /* LMTCAL_INTV_TIME:0:10 */ 933 PHYMOD_SYMBOL_FIELD_ENCODE(180, 10, 0), 934 /* LMTCAL_MAX_ADJ:11:15 */ 935 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(182, 15, 11) 936 }; 937 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL1r_fields[] = 938 { 939 /* LMTCAL_INIT_TIME:0:10 */ 940 PHYMOD_SYMBOL_FIELD_ENCODE(178, 10, 0), 941 /* LMTCAL_ADJ_DIR:11:11 */ 942 PHYMOD_SYMBOL_FIELD_ENCODE(171, 11, 11), 943 /* LMTCAL_KP:12:13 */ 944 PHYMOD_SYMBOL_FIELD_ENCODE(181, 13, 12), 945 /* LMTCAL_RISING_EDGE_EN:14:14 */ 946 PHYMOD_SYMBOL_FIELD_ENCODE(184, 14, 14), 947 /* LMTCAL_FALLING_EDGE_EN:15:15 */ 948 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(177, 15, 15) 949 }; 950 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL10r_fields[] = 951 { 952 /* SLCAL_DN_THRES:0:10 */ 953 PHYMOD_SYMBOL_FIELD_ENCODE(389, 10, 0), 954 /* SLICER_INTERVAL_TIME:11:15 */ 955 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(400, 15, 11) 956 }; 957 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL11r_fields[] = 958 { 959 /* PM_RXLIMITAMPCALBYP:0:0 */ 960 PHYMOD_SYMBOL_FIELD_ENCODE(258, 0, 0), 961 /* PM_RXSLICERCALBYP:1:1 */ 962 PHYMOD_SYMBOL_FIELD_ENCODE(259, 1, 1), 963 /* SLCAL_INIT_TIME:7:14 */ 964 PHYMOD_SYMBOL_FIELD_ENCODE(392, 14, 7), 965 /* RECAL_IND_CLR:15:15 */ 966 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(288, 15, 15) 967 }; 968 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL2r_fields[] = 969 { 970 /* LMTCAL_DONE_OVRD_VAL:0:0 */ 971 PHYMOD_SYMBOL_FIELD_ENCODE(174, 0, 0), 972 /* LMTCAL_DONE_OVRD:1:1 */ 973 PHYMOD_SYMBOL_FIELD_ENCODE(173, 1, 1), 974 /* LMTCAL_EN_OVRD_VAL:2:2 */ 975 PHYMOD_SYMBOL_FIELD_ENCODE(176, 2, 2), 976 /* LMTCAL_EN_OVRD:3:3 */ 977 PHYMOD_SYMBOL_FIELD_ENCODE(175, 3, 3), 978 /* LMTCAL_ACC_TIME:4:14 */ 979 PHYMOD_SYMBOL_FIELD_ENCODE(169, 14, 4), 980 /* LMTCAL_PD_POLARITY:15:15 */ 981 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(183, 15, 15) 982 }; 983 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL3r_fields[] = 984 { 985 /* RECAL_POS_THRES:0:15 */ 986 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(290, 15, 0) 987 }; 988 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL4r_fields[] = 989 { 990 /* RECAL_NEG_THRES:0:15 */ 991 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(289, 15, 0) 992 }; 993 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL5r_fields[] = 994 { 995 /* CONT_LMTCAL_EN:0:0 */ 996 PHYMOD_SYMBOL_FIELD_ENCODE(47, 0, 0), 997 /* LMTCAL_CONT_ACC_TIME:1:11 */ 998 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(172, 11, 1) 999 }; 1000 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL6r_fields[] = 1001 { 1002 /* RX_LMTOFF_OVRD_VAL:0:5 */ 1003 PHYMOD_SYMBOL_FIELD_ENCODE(342, 5, 0), 1004 /* RX_LMTOFF_OVRD:6:6 */ 1005 PHYMOD_SYMBOL_FIELD_ENCODE(341, 6, 6), 1006 /* LMTCAL_INTERVAL_TIME:7:11 */ 1007 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(179, 11, 7) 1008 }; 1009 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL7r_fields[] = 1010 { 1011 /* SLCAL_VALID_OVRD_VAL:0:0 */ 1012 PHYMOD_SYMBOL_FIELD_ENCODE(397, 0, 0), 1013 /* SLCAL_VALID_OVRD:1:1 */ 1014 PHYMOD_SYMBOL_FIELD_ENCODE(396, 1, 1), 1015 /* SLCAL_POL:10:10 */ 1016 PHYMOD_SYMBOL_FIELD_ENCODE(393, 10, 10), 1017 /* SLCAL_ACC_OPT:11:12 */ 1018 PHYMOD_SYMBOL_FIELD_ENCODE(388, 12, 11), 1019 /* SLCAL_EN_OVRD_VAL:13:13 */ 1020 PHYMOD_SYMBOL_FIELD_ENCODE(391, 13, 13), 1021 /* SLCAL_EN_OVRD:14:14 */ 1022 PHYMOD_SYMBOL_FIELD_ENCODE(390, 14, 14), 1023 /* CAL_STATE_OVRD:15:15 */ 1024 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(27, 15, 15) 1025 }; 1026 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL8r_fields[] = 1027 { 1028 /* RX_SLOFF0_OVRD_VAL:0:3 */ 1029 PHYMOD_SYMBOL_FIELD_ENCODE(355, 3, 0), 1030 /* RX_SLOFF0_OVRD:4:4 */ 1031 PHYMOD_SYMBOL_FIELD_ENCODE(354, 4, 4), 1032 /* RX_SLOFF1_OVRD_VAL:5:8 */ 1033 PHYMOD_SYMBOL_FIELD_ENCODE(359, 8, 5), 1034 /* RX_SLOFF1_OVRD:9:9 */ 1035 PHYMOD_SYMBOL_FIELD_ENCODE(358, 9, 9), 1036 /* RX_SLOFF2_OVRD_VAL:10:13 */ 1037 PHYMOD_SYMBOL_FIELD_ENCODE(363, 13, 10), 1038 /* RX_SLOFF2_OVRD:14:14 */ 1039 PHYMOD_SYMBOL_FIELD_ENCODE(362, 14, 14), 1040 /* SLICER_DATA_SEL:15:15 */ 1041 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(399, 15, 15) 1042 }; 1043 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL9r_fields[] = 1044 { 1045 /* SLCAL_UP_THRES:0:10 */ 1046 PHYMOD_SYMBOL_FIELD_ENCODE(395, 10, 0), 1047 /* RX_SLICER_CALVALID_OVRD_VAL:11:11 */ 1048 PHYMOD_SYMBOL_FIELD_ENCODE(350, 11, 11), 1049 /* RX_SLICER_CALVALID_OVRD:12:12 */ 1050 PHYMOD_SYMBOL_FIELD_ENCODE(349, 12, 12), 1051 /* CAL_STATE_OVRD_VAL:13:15 */ 1052 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(28, 15, 13) 1053 }; 1054 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX3_SLCRSTATr_fields[] = 1055 { 1056 /* RX_SLOFF0:0:3 */ 1057 PHYMOD_SYMBOL_FIELD_ENCODE(352, 3, 0), 1058 /* RX_SLOFF1:4:7 */ 1059 PHYMOD_SYMBOL_FIELD_ENCODE(356, 7, 4), 1060 /* RX_SLOFF2:8:11 */ 1061 PHYMOD_SYMBOL_FIELD_ENCODE(360, 11, 8), 1062 /* RX_SLICER_CALVALID:12:12 */ 1063 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(348, 12, 12) 1064 }; 1065 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_ANARXCTLr_fields[] = 1066 { 1067 /* STATUS_SEL:0:2 */ 1068 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(406, 2, 0) 1069 }; 1070 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_ANARXCTLPCIr_fields[] = 1071 { 1072 /* RX_POLARITY_R:2:2 */ 1073 PHYMOD_SYMBOL_FIELD_ENCODE(346, 2, 2), 1074 /* RX_POLARITY_FORCE_SM:3:3 */ 1075 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(345, 3, 3) 1076 }; 1077 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_ANARXSIGDETr_fields[] = 1078 { 1079 /* RX_PF_CTRL:12:15 */ 1080 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(343, 15, 12) 1081 }; 1082 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_ANARXSTSr_fields[] = 1083 { 1084 /* SP2_RX_AFE_ANARXSTS:0:15 */ 1085 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(403, 15, 0) 1086 }; 1087 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_BLKADDRr_fields[] = 1088 { 1089 /* BLOCKADDRESS:4:14 */ 1090 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(15, 14, 4) 1091 }; 1092 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_CTL0r_fields[] = 1093 { 1094 /* RESERVED_0:0:0 */ 1095 PHYMOD_SYMBOL_FIELD_ENCODE(299, 0, 0), 1096 /* PD_EQZ:1:1 */ 1097 PHYMOD_SYMBOL_FIELD_ENCODE(230, 1, 1), 1098 /* PD_LMTNG:2:2 */ 1099 PHYMOD_SYMBOL_FIELD_ENCODE(231, 2, 2), 1100 /* RESERVED_5_3:3:5 */ 1101 PHYMOD_SYMBOL_FIELD_ENCODE(314, 5, 3), 1102 /* FILTER_BAND:6:7 */ 1103 PHYMOD_SYMBOL_FIELD_ENCODE(115, 7, 6), 1104 /* RX_PON:8:11 */ 1105 PHYMOD_SYMBOL_FIELD_ENCODE(347, 11, 8), 1106 /* RESERVED_14_12:12:14 */ 1107 PHYMOD_SYMBOL_FIELD_ENCODE(303, 14, 12), 1108 /* SLICER_PD:15:15 */ 1109 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(401, 15, 15) 1110 }; 1111 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_CTL1r_fields[] = 1112 { 1113 /* EYEM_PD:0:0 */ 1114 PHYMOD_SYMBOL_FIELD_ENCODE(106, 0, 0), 1115 /* RESERVED_26_17:1:10 */ 1116 PHYMOD_SYMBOL_FIELD_ENCODE(305, 10, 1), 1117 /* DIV_4_DEMUX_ENABLE:11:11 */ 1118 PHYMOD_SYMBOL_FIELD_ENCODE(75, 11, 11), 1119 /* DEMUX_ZERO_PD:12:12 */ 1120 PHYMOD_SYMBOL_FIELD_ENCODE(55, 12, 12), 1121 /* DEMUX_PEAK_PD:13:13 */ 1122 PHYMOD_SYMBOL_FIELD_ENCODE(54, 13, 13), 1123 /* DEMUX_PD:14:14 */ 1124 PHYMOD_SYMBOL_FIELD_ENCODE(53, 14, 14), 1125 /* DEMUX_EYEM_PD:15:15 */ 1126 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(52, 15, 15) 1127 }; 1128 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_CTL2r_fields[] = 1129 { 1130 /* RESERVED_32:0:0 */ 1131 PHYMOD_SYMBOL_FIELD_ENCODE(308, 0, 0), 1132 /* DIV4_PD:1:1 */ 1133 PHYMOD_SYMBOL_FIELD_ENCODE(74, 1, 1), 1134 /* DIV10_PD:2:2 */ 1135 PHYMOD_SYMBOL_FIELD_ENCODE(73, 2, 2), 1136 /* INPUTERM_CM_EN:3:3 */ 1137 PHYMOD_SYMBOL_FIELD_ENCODE(143, 3, 3), 1138 /* INPUTERM_CMULT_EN:4:4 */ 1139 PHYMOD_SYMBOL_FIELD_ENCODE(142, 4, 4), 1140 /* INPUTERM_LOWZGND_EN:5:5 */ 1141 PHYMOD_SYMBOL_FIELD_ENCODE(144, 5, 5), 1142 /* INPUTERM_LOWZVDD_EN:6:6 */ 1143 PHYMOD_SYMBOL_FIELD_ENCODE(145, 6, 6), 1144 /* RESERVED_47_39:7:15 */ 1145 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(312, 15, 7) 1146 }; 1147 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_CTL3r_fields[] = 1148 { 1149 /* RESERVED_52_48:0:4 */ 1150 PHYMOD_SYMBOL_FIELD_ENCODE(313, 4, 0), 1151 /* DCC_EN:5:5 */ 1152 PHYMOD_SYMBOL_FIELD_ENCODE(51, 5, 5), 1153 /* DUTY_CYCLE:6:8 */ 1154 PHYMOD_SYMBOL_FIELD_ENCODE(87, 8, 6), 1155 /* PD_BIAS:9:9 */ 1156 PHYMOD_SYMBOL_FIELD_ENCODE(229, 9, 9), 1157 /* RESERVED_63_58:10:15 */ 1158 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(316, 15, 10) 1159 }; 1160 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_CTL4r_fields[] = 1161 { 1162 /* BIAS_LA_CTRL:0:2 */ 1163 PHYMOD_SYMBOL_FIELD_ENCODE(12, 2, 0), 1164 /* BIAS_LA_DAC_CTRL:3:5 */ 1165 PHYMOD_SYMBOL_FIELD_ENCODE(13, 5, 3), 1166 /* BIAS_EYEM_CTRL:6:8 */ 1167 PHYMOD_SYMBOL_FIELD_ENCODE(11, 8, 6), 1168 /* BIAS_SIGDET_CTRL:9:11 */ 1169 PHYMOD_SYMBOL_FIELD_ENCODE(14, 11, 9), 1170 /* SIGDET_BYPASS:12:12 */ 1171 PHYMOD_SYMBOL_FIELD_ENCODE(382, 12, 12), 1172 /* SIGDET_PD:13:13 */ 1173 PHYMOD_SYMBOL_FIELD_ENCODE(384, 13, 13), 1174 /* SIGDET_MODESELECT:14:14 */ 1175 PHYMOD_SYMBOL_FIELD_ENCODE(383, 14, 14), 1176 /* EN_TESTMUX:15:15 */ 1177 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(98, 15, 15) 1178 }; 1179 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_CTL5r_fields[] = 1180 { 1181 /* SIGDET_THRESHOLD:0:3 */ 1182 PHYMOD_SYMBOL_FIELD_ENCODE(385, 3, 0), 1183 /* SEL_CLK:4:5 */ 1184 PHYMOD_SYMBOL_FIELD_ENCODE(376, 5, 4), 1185 /* EYEM_REFADJUST:6:10 */ 1186 PHYMOD_SYMBOL_FIELD_ENCODE(107, 10, 6), 1187 /* EYEMONITORREF_PD:11:11 */ 1188 PHYMOD_SYMBOL_FIELD_ENCODE(104, 11, 11), 1189 /* EYEMONITOR_REF_ZERO:12:12 */ 1190 PHYMOD_SYMBOL_FIELD_ENCODE(105, 12, 12), 1191 /* PI_MAIN_ENABLE:13:13 */ 1192 PHYMOD_SYMBOL_FIELD_ENCODE(252, 13, 13), 1193 /* PI_EYEM_ENABLE:14:14 */ 1194 PHYMOD_SYMBOL_FIELD_ENCODE(250, 14, 14), 1195 /* SIGDET_USB_EN:15:15 */ 1196 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(386, 15, 15) 1197 }; 1198 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_CTL6r_fields[] = 1199 { 1200 /* RESERVED_96:0:0 */ 1201 PHYMOD_SYMBOL_FIELD_ENCODE(320, 0, 0), 1202 /* MAIN_PI_PWD_LVL2PI:1:1 */ 1203 PHYMOD_SYMBOL_FIELD_ENCODE(192, 1, 1), 1204 /* MAIN_PI_BW_SEL:2:2 */ 1205 PHYMOD_SYMBOL_FIELD_ENCODE(191, 2, 2), 1206 /* PI_LOWVDD_ENB:3:3 */ 1207 PHYMOD_SYMBOL_FIELD_ENCODE(251, 3, 3), 1208 /* RESERVED_100:4:4 */ 1209 PHYMOD_SYMBOL_FIELD_ENCODE(300, 4, 4), 1210 /* EYE_MONITOR_PI_PWD_LVL2PI:5:5 */ 1211 PHYMOD_SYMBOL_FIELD_ENCODE(109, 5, 5), 1212 /* EYE_MONITOR_PI_BW_SEL:6:6 */ 1213 PHYMOD_SYMBOL_FIELD_ENCODE(108, 6, 6), 1214 /* RESERVED_105_103:7:9 */ 1215 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(301, 9, 7) 1216 }; 1217 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_SERDESID0r_fields[] = 1218 { 1219 /* MODEL_NUMBER:0:5 */ 1220 PHYMOD_SYMBOL_FIELD_ENCODE(212, 5, 0), 1221 /* TECH_PROC:6:8 */ 1222 PHYMOD_SYMBOL_FIELD_ENCODE(413, 8, 6), 1223 /* BONDING:9:10 */ 1224 PHYMOD_SYMBOL_FIELD_ENCODE(16, 10, 9), 1225 /* REV_NUMBER:11:13 */ 1226 PHYMOD_SYMBOL_FIELD_ENCODE(327, 13, 11), 1227 /* REV_LETTER:14:15 */ 1228 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(326, 15, 14) 1229 }; 1230 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_SERDESID1r_fields[] = 1231 { 1232 /* SCRAMBLER:2:2 */ 1233 PHYMOD_SYMBOL_FIELD_ENCODE(375, 2, 2), 1234 /* BRCM_64B66B:3:3 */ 1235 PHYMOD_SYMBOL_FIELD_ENCODE(17, 3, 3), 1236 /* PCIE_II:4:4 */ 1237 PHYMOD_SYMBOL_FIELD_ENCODE(226, 4, 4), 1238 /* PCIE:5:5 */ 1239 PHYMOD_SYMBOL_FIELD_ENCODE(225, 5, 5), 1240 /* HIGIGII:6:6 */ 1241 PHYMOD_SYMBOL_FIELD_ENCODE(133, 6, 6), 1242 /* HIGIG:7:7 */ 1243 PHYMOD_SYMBOL_FIELD_ENCODE(132, 7, 7), 1244 /* CL48:8:8 */ 1245 PHYMOD_SYMBOL_FIELD_ENCODE(39, 8, 8), 1246 /* CL36:9:9 */ 1247 PHYMOD_SYMBOL_FIELD_ENCODE(37, 9, 9), 1248 /* CL73:10:10 */ 1249 PHYMOD_SYMBOL_FIELD_ENCODE(40, 10, 10), 1250 /* CL37:11:11 */ 1251 PHYMOD_SYMBOL_FIELD_ENCODE(38, 11, 11), 1252 /* MULTIPLICITY:12:15 */ 1253 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(216, 15, 12) 1254 }; 1255 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_SERDESID2r_fields[] = 1256 { 1257 /* DR_10M_SL:0:0 */ 1258 PHYMOD_SYMBOL_FIELD_ENCODE(80, 0, 0), 1259 /* DR_100M_SL:1:1 */ 1260 PHYMOD_SYMBOL_FIELD_ENCODE(78, 1, 1), 1261 /* DR_1G_SL:2:2 */ 1262 PHYMOD_SYMBOL_FIELD_ENCODE(81, 2, 2), 1263 /* DR_2P5G_SL:3:3 */ 1264 PHYMOD_SYMBOL_FIELD_ENCODE(82, 3, 3), 1265 /* DR_5G_4L:4:4 */ 1266 PHYMOD_SYMBOL_FIELD_ENCODE(83, 4, 4), 1267 /* DR_6G_4L:5:5 */ 1268 PHYMOD_SYMBOL_FIELD_ENCODE(84, 5, 5), 1269 /* DR_10G_4L:6:6 */ 1270 PHYMOD_SYMBOL_FIELD_ENCODE(79, 6, 6), 1271 /* ID3PRESENT:15:15 */ 1272 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(136, 15, 15) 1273 }; 1274 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_SERDESID3r_fields[] = 1275 { 1276 /* DR_100FX:0:0 */ 1277 PHYMOD_SYMBOL_FIELD_ENCODE(77, 0, 0), 1278 /* ID4PRESENT:15:15 */ 1279 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(137, 15, 15) 1280 }; 1281 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_SERDESID_BLKADDRr_fields[] = 1282 { 1283 /* BLOCKADDRESS:4:14 */ 1284 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(15, 14, 4) 1285 }; 1286 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_STS1000X1r_fields[] = 1287 { 1288 /* SGMII_MODE:0:0 */ 1289 PHYMOD_SYMBOL_FIELD_ENCODE(380, 0, 0), 1290 /* LINK_STATUS:1:1 */ 1291 PHYMOD_SYMBOL_FIELD_ENCODE(166, 1, 1), 1292 /* DUPLEX_STATUS:2:2 */ 1293 PHYMOD_SYMBOL_FIELD_ENCODE(86, 2, 2), 1294 /* SPEED_STATUS:3:4 */ 1295 PHYMOD_SYMBOL_FIELD_ENCODE(404, 4, 3), 1296 /* PAUSE_RESOLUTION_TXSIDE:5:5 */ 1297 PHYMOD_SYMBOL_FIELD_ENCODE(224, 5, 5), 1298 /* PAUSE_RESOLUTION_RXSIDE:6:6 */ 1299 PHYMOD_SYMBOL_FIELD_ENCODE(223, 6, 6), 1300 /* LINK_STATUS_BAR:7:7 */ 1301 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(167, 7, 7) 1302 }; 1303 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_TCATMR0r_fields[] = 1304 { 1305 /* TCA_COARSE_TIMER:0:13 */ 1306 PHYMOD_SYMBOL_FIELD_ENCODE(409, 13, 0), 1307 /* TCA_TIMER_SEL:14:15 */ 1308 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(411, 15, 14) 1309 }; 1310 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_TCATMR1r_fields[] = 1311 { 1312 /* TCA_FINE_TIMER:0:13 */ 1313 PHYMOD_SYMBOL_FIELD_ENCODE(410, 13, 0), 1314 /* INTERP_OVERRIDE:14:14 */ 1315 PHYMOD_SYMBOL_FIELD_ENCODE(149, 14, 14), 1316 /* XGXS_SEL:15:15 */ 1317 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(442, 15, 15) 1318 }; 1319 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_TESTMODELANEr_fields[] = 1320 { 1321 /* TM_SLICE:0:1 */ 1322 PHYMOD_SYMBOL_FIELD_ENCODE(422, 1, 0), 1323 /* TOGGLE_FRACN_SEL:5:5 */ 1324 PHYMOD_SYMBOL_FIELD_ENCODE(424, 5, 5), 1325 /* RESCAL_SEL:6:6 */ 1326 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(298, 6, 6) 1327 }; 1328 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_TX_AFE_ANATXACTL0r_fields[] = 1329 { 1330 /* TX_MDATA_EN:0:0 */ 1331 PHYMOD_SYMBOL_FIELD_ENCODE(431, 0, 0), 1332 /* TXPOL_FLIP:5:5 */ 1333 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(430, 5, 5) 1334 }; 1335 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_TX_AFE_ANATXMDATA0r_fields[] = 1336 { 1337 /* TXMDIOTSTDATAL:0:9 */ 1338 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(429, 9, 0) 1339 }; 1340 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_TX_AFE_ANATXMDATA1r_fields[] = 1341 { 1342 /* TXMDIOTSTDATAH:0:9 */ 1343 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(428, 9, 0) 1344 }; 1345 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_TX_AFE_BLKADDRr_fields[] = 1346 { 1347 /* BLOCKADDRESS:4:14 */ 1348 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(15, 14, 4) 1349 }; 1350 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_TX_AFE_CTL0r_fields[] = 1351 { 1352 /* TX_PWRDN:0:0 */ 1353 PHYMOD_SYMBOL_FIELD_ENCODE(433, 0, 0), 1354 /* TESTSEL:1:1 */ 1355 PHYMOD_SYMBOL_FIELD_ENCODE(416, 1, 1), 1356 /* RESERVED_3_2:2:3 */ 1357 PHYMOD_SYMBOL_FIELD_ENCODE(310, 3, 2), 1358 /* IDLE_ENA:4:4 */ 1359 PHYMOD_SYMBOL_FIELD_ENCODE(138, 4, 4), 1360 /* RXDETECT_TH:5:6 */ 1361 PHYMOD_SYMBOL_FIELD_ENCODE(336, 6, 5), 1362 /* RESERVED_7:7:7 */ 1363 PHYMOD_SYMBOL_FIELD_ENCODE(317, 7, 7), 1364 /* MAIN_CONTROL:8:13 */ 1365 PHYMOD_SYMBOL_FIELD_ENCODE(190, 13, 8), 1366 /* QUARTER_UNIT_EN:14:14 */ 1367 PHYMOD_SYMBOL_FIELD_ENCODE(282, 14, 14), 1368 /* FIX_10UNITS_EN:15:15 */ 1369 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(117, 15, 15) 1370 }; 1371 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_TX_AFE_CTL1r_fields[] = 1372 { 1373 /* VDD1P0_ENB:0:0 */ 1374 PHYMOD_SYMBOL_FIELD_ENCODE(438, 0, 0), 1375 /* AMP_MODE:1:1 */ 1376 PHYMOD_SYMBOL_FIELD_ENCODE(5, 1, 1), 1377 /* CONST_IMPEDANCE:2:2 */ 1378 PHYMOD_SYMBOL_FIELD_ENCODE(46, 2, 2), 1379 /* PI_BW_SEL:3:3 */ 1380 PHYMOD_SYMBOL_FIELD_ENCODE(248, 3, 3), 1381 /* PWD_LVL2PI:4:4 */ 1382 PHYMOD_SYMBOL_FIELD_ENCODE(269, 4, 4), 1383 /* RESERVED_21:5:5 */ 1384 PHYMOD_SYMBOL_FIELD_ENCODE(304, 5, 5), 1385 /* POST_CONTROL:6:11 */ 1386 PHYMOD_SYMBOL_FIELD_ENCODE(260, 11, 6), 1387 /* POST_ENABLE:12:12 */ 1388 PHYMOD_SYMBOL_FIELD_ENCODE(261, 12, 12), 1389 /* RESERVED_29:13:13 */ 1390 PHYMOD_SYMBOL_FIELD_ENCODE(306, 13, 13), 1391 /* SLEW_RATE_CONTROL:14:15 */ 1392 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(398, 15, 14) 1393 }; 1394 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_TX_AFE_CTL2r_fields[] = 1395 { 1396 /* TESTCK_EN:0:0 */ 1397 PHYMOD_SYMBOL_FIELD_ENCODE(414, 0, 0), 1398 /* TICKSEL:1:2 */ 1399 PHYMOD_SYMBOL_FIELD_ENCODE(421, 2, 1), 1400 /* TX_PON:3:6 */ 1401 PHYMOD_SYMBOL_FIELD_ENCODE(432, 6, 3), 1402 /* VDD_NOISE_SHAPE:7:9 */ 1403 PHYMOD_SYMBOL_FIELD_ENCODE(441, 9, 7), 1404 /* NOISE_CNCL_BIAS:10:13 */ 1405 PHYMOD_SYMBOL_FIELD_ENCODE(220, 13, 10), 1406 /* VDD_NOISE_CNCL_EN:14:14 */ 1407 PHYMOD_SYMBOL_FIELD_ENCODE(440, 14, 14), 1408 /* LEAKAGE_TEST:15:15 */ 1409 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(165, 15, 15) 1410 }; 1411 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_TX_AFE_CTL3r_fields[] = 1412 { 1413 /* RESERVED_63_48:0:15 */ 1414 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(315, 15, 0) 1415 }; 1416 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_TX_AFE_INTERPr_fields[] = 1417 { 1418 /* INTERP_CTRL_PHS:0:4 */ 1419 PHYMOD_SYMBOL_FIELD_ENCODE(147, 4, 0), 1420 /* INTERP_CTRL_QUADRANT:5:6 */ 1421 PHYMOD_SYMBOL_FIELD_ENCODE(148, 6, 5), 1422 /* TX_RATESELECT:7:7 */ 1423 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(434, 7, 7) 1424 }; 1425 static uint32_t BCMI_SGMIIP2X4_SERDES_SP2_XGXSCTLr_fields[] = 1426 { 1427 /* TXCKO_DIV:0:0 */ 1428 PHYMOD_SYMBOL_FIELD_ENCODE(426, 0, 0), 1429 /* AFRST_EN:1:1 */ 1430 PHYMOD_SYMBOL_FIELD_ENCODE(4, 1, 1), 1431 /* EDEN:2:2 */ 1432 PHYMOD_SYMBOL_FIELD_ENCODE(88, 2, 2), 1433 /* CDET_EN:3:3 */ 1434 PHYMOD_SYMBOL_FIELD_ENCODE(32, 3, 3), 1435 /* MDIO_CONT_EN:4:4 */ 1436 PHYMOD_SYMBOL_FIELD_ENCODE(195, 4, 4), 1437 /* HSTL:5:5 */ 1438 PHYMOD_SYMBOL_FIELD_ENCODE(135, 5, 5), 1439 /* MODE:8:11 */ 1440 PHYMOD_SYMBOL_FIELD_ENCODE(211, 11, 8), 1441 /* START_SEQUENCER:13:13 */ 1442 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(405, 13, 13) 1443 }; 1444 1445 1446 1447 /******************************************************************************* 1448 * 1449 * The following is the field name table. 1450 */ 1451 #if PHYMOD_CONFIG_INCLUDE_FIELD_NAMES == 1 1452 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_NAMES_BCMI_SGMIIP2X4_SERDES 1453 const char* bcmi_sgmiip2x4_serdes_fields[] = 1454 { 1455 "ACK", 1456 "ACK2", 1457 "ADDRDATA", 1458 "ADJ", 1459 "AFRST_EN", 1460 "AMP_MODE", 1461 "AUTODET_EN", 1462 "AUTONEG_ABILITY", 1463 "AUTONEG_COMPLETE", 1464 "AUTONEG_ENABLE", 1465 "AUTONEG_FAST_TIMERS", 1466 "BIAS_EYEM_CTRL", 1467 "BIAS_LA_CTRL", 1468 "BIAS_LA_DAC_CTRL", 1469 "BIAS_SIGDET_CTRL", 1470 "BLOCKADDRESS", 1471 "BONDING", 1472 "BRCM_64B66B", 1473 "BWSEL_INTEG", 1474 "BWSEL_PROP", 1475 "BYPASS_OSMODE", 1476 "CALIB_ADJ", 1477 "CALIB_CAP_CHARGE_TIME", 1478 "CALIB_DELAY_TIME", 1479 "CALIB_STEP_TIME", 1480 "CAL_ERROR", 1481 "CAL_STATE", 1482 "CAL_STATE_OVRD", 1483 "CAL_STATE_OVRD_VAL", 1484 "CAL_TH", 1485 "CAL_VALID", 1486 "CDET", 1487 "CDET_EN", 1488 "CDRLOCKTIMEACQ_S1_SM", 1489 "CDRLOCKTIMEACQ_S2_SM", 1490 "CDRLOCKTIMEACQ_S3_SM", 1491 "CDRLOCKTIMETRCKNRML_SM", 1492 "CL36", 1493 "CL37", 1494 "CL48", 1495 "CL73", 1496 "CLK41_BYPASS", 1497 "CLKSIGDET_BYPASS", 1498 "CM_SEL", 1499 "COLLISION_TEST_EN", 1500 "COMMA_DET_EN", 1501 "CONST_IMPEDANCE", 1502 "CONT_LMTCAL_EN", 1503 "CORRELATOR_DISABLE", 1504 "CPAR", 1505 "CURR_SEL", 1506 "DCC_EN", 1507 "DEMUX_EYEM_PD", 1508 "DEMUX_PD", 1509 "DEMUX_PEAK_PD", 1510 "DEMUX_ZERO_PD", 1511 "DEVAD", 1512 "DEVAN_EN", 1513 "DEVCL22_EN", 1514 "DEVDEVAD_EN", 1515 "DEVPMD_EN", 1516 "DFE0_CALIB_SEARCH_BIT", 1517 "DFE0_EN_CALIB_N", 1518 "DFE0_HALFSTEP_EN", 1519 "DFE0_VCOCAL_VALID_OVRD", 1520 "DFE0_VCOCAL_VALID_OVRD_VAL", 1521 "DISABLE_FALSE_LINK", 1522 "DISABLE_PLL_PWRDWN", 1523 "DISPARITY_EN_VAL", 1524 "DISPERROR_EN_FORCE", 1525 "DISPERROR_EN_VAL", 1526 "DISPERROR_SYNC_VAL", 1527 "DIV", 1528 "DIV10_PD", 1529 "DIV4_PD", 1530 "DIV_4_DEMUX_ENABLE", 1531 "DN_SLOFFX_VAL", 1532 "DR_100FX", 1533 "DR_100M_SL", 1534 "DR_10G_4L", 1535 "DR_10M_SL", 1536 "DR_1G_SL", 1537 "DR_2P5G_SL", 1538 "DR_5G_4L", 1539 "DR_6G_4L", 1540 "DUPLEX", 1541 "DUPLEX_STATUS", 1542 "DUTY_CYCLE", 1543 "EDEN", 1544 "EM_ERR_CNT_H", 1545 "EM_ERR_CNT_L", 1546 "EM_PHASE_SHIFT_360_OVRD", 1547 "EM_PHASE_SHIFT_360_OVRD_VAL", 1548 "EN10T", 1549 "ENABLE", 1550 "ENABLE_PARALLEL_DETECTION", 1551 "EN_CAP", 1552 "EN_CUR", 1553 "EN_TESTMUX", 1554 "EN_TEST_FRAC_CLK", 1555 "EN_TEST_INTEGER_CLK", 1556 "EXTENDED_CAPABILITY", 1557 "EXTENDED_STATUS", 1558 "EXT_RANGE", 1559 "EYEMONITORREF_PD", 1560 "EYEMONITOR_REF_ZERO", 1561 "EYEM_PD", 1562 "EYEM_REFADJUST", 1563 "EYE_MONITOR_PI_BW_SEL", 1564 "EYE_MONITOR_PI_PWD_LVL2PI", 1565 "FALLING_EDGE", 1566 "FAR_END_FAULT_EN", 1567 "FAST_TIMERS", 1568 "FIBER_MODE_1000X", 1569 "FIFO_ERR_CYA", 1570 "FILTER_BAND", 1571 "FILTER_FORCE_LINK", 1572 "FIX_10UNITS_EN", 1573 "FLIP_PEAK_POLARITY", 1574 "FLIP_ZERO_POLARITY", 1575 "FORCE_LINK", 1576 "FORCE_OSCDR_MODE", 1577 "FORCE_PLL_LOCK", 1578 "FORCE_SPEED", 1579 "FREQ_EN", 1580 "FREQ_OVERRIDE_EN", 1581 "FREQ_OVERRIDE_VAL", 1582 "FREQ_UPD_EN", 1583 "FULL_DUPLEX", 1584 "GLOOP1G", 1585 "GLOOPBACK", 1586 "HALF_DUPLEX", 1587 "HIGIG", 1588 "HIGIGII", 1589 "HIPASS", 1590 "HSTL", 1591 "ID3PRESENT", 1592 "ID4PRESENT", 1593 "IDLE_ENA", 1594 "IEEE_BLKSEL_AUTODET", 1595 "IEEE_BLKSEL_VAL", 1596 "INCREMENT_CTRL", 1597 "INPUTERM_CMULT_EN", 1598 "INPUTERM_CM_EN", 1599 "INPUTERM_LOWZGND_EN", 1600 "INPUTERM_LOWZVDD_EN", 1601 "INTEG_CLR", 1602 "INTERP_CTRL_PHS", 1603 "INTERP_CTRL_QUADRANT", 1604 "INTERP_OVERRIDE", 1605 "INTN_FB_EN", 1606 "INT_DIV_EN", 1607 "INVERT_SIGNAL_DETECT", 1608 "INV_VCO_CAL", 1609 "I_NDIV_DITHER_EN", 1610 "I_NDIV_FRAC_17_4", 1611 "I_NDIV_FRAC_3_0", 1612 "I_NDIV_INT_1_0", 1613 "I_NDIV_INT_9_2", 1614 "I_PFD_OFFSET", 1615 "I_PFD_OFFSET_ENLARGE", 1616 "I_PLL_FRAC_MODE", 1617 "I_PLL_SDM_PWRDNB", 1618 "JABBER_DETECT", 1619 "LATCH_PAGE_RX", 1620 "LEAKAGE_TEST", 1621 "LINK_STATUS", 1622 "LINK_STATUS_BAR", 1623 "LMTCAL_ACC", 1624 "LMTCAL_ACC_TIME", 1625 "LMTCAL_ADJ_CNT", 1626 "LMTCAL_ADJ_DIR", 1627 "LMTCAL_CONT_ACC_TIME", 1628 "LMTCAL_DONE_OVRD", 1629 "LMTCAL_DONE_OVRD_VAL", 1630 "LMTCAL_EN_OVRD", 1631 "LMTCAL_EN_OVRD_VAL", 1632 "LMTCAL_FALLING_EDGE_EN", 1633 "LMTCAL_INIT_TIME", 1634 "LMTCAL_INTERVAL_TIME", 1635 "LMTCAL_INTV_TIME", 1636 "LMTCAL_KP", 1637 "LMTCAL_MAX_ADJ", 1638 "LMTCAL_PD_POLARITY", 1639 "LMTCAL_RISING_EDGE_EN", 1640 "LMTCAL_STATE", 1641 "LMTCAL_VALID", 1642 "LPI_EN_RX", 1643 "LPI_EN_TX", 1644 "LV_EN", 1645 "MAIN_CONTROL", 1646 "MAIN_PI_BW_SEL", 1647 "MAIN_PI_PWD_LVL2PI", 1648 "MANUAL_SPEED0", 1649 "MANUAL_SPEED1", 1650 "MDIO_CONT_EN", 1651 "MDIO_EM_ERR_CNT_CLR", 1652 "MDIO_EM_ERR_CNT_FRZ", 1653 "MDIO_EM_PWRDN", 1654 "MESSAGE", 1655 "MESSAGE_PAGE", 1656 "MF_PREAMBLE_SUPRESSION", 1657 "MIIGMIIDLY_EN", 1658 "MIIGMIIMUX_EN", 1659 "MMD_DEVICETYPE", 1660 "MMD_DIV_RANGE", 1661 "MMD_EN", 1662 "MMD_PORT", 1663 "MMD_PRSC4OR5PWDB", 1664 "MMD_PRSC8OR9PWDB", 1665 "MMD_RESETB", 1666 "MODE", 1667 "MODEL_NUMBER", 1668 "MR_LP_ADV_ABILITY", 1669 "MR_LP_NP_RX_O", 1670 "MULTIMMDS_EN", 1671 "MULTIPLICITY", 1672 "MULTIPRTS_EN", 1673 "NEXT_PAGE", 1674 "NEXT_PAGE_ABILITY", 1675 "NOISE_CNCL_BIAS", 1676 "NUMBER_OF_IDLE", 1677 "PAUSE", 1678 "PAUSE_RESOLUTION_RXSIDE", 1679 "PAUSE_RESOLUTION_TXSIDE", 1680 "PCIE", 1681 "PCIE_II", 1682 "PCS_EN_RX", 1683 "PCS_EN_TX", 1684 "PD_BIAS", 1685 "PD_EQZ", 1686 "PD_LMTNG", 1687 "PHASE_DEC_SM", 1688 "PHASE_DELTA", 1689 "PHASE_DELTA_SM", 1690 "PHASE_FRZ_1", 1691 "PHASE_FRZ_1_EN", 1692 "PHASE_INC_SM", 1693 "PHASE_OVERRIDE_SM", 1694 "PHASE_SAT_CTRL", 1695 "PHASE_STEP", 1696 "PHASE_STROBE_SM", 1697 "PHSACQ_DIR", 1698 "PHSACQ_ENABLE", 1699 "PHSACQ_FREQ_SEL", 1700 "PHSACQ_STEP", 1701 "PHSACQ_TIMEOUT", 1702 "PHS_COUNTER_CLR", 1703 "PI_BW_SEL", 1704 "PI_CLK90_OFFSET_OVERRIDE", 1705 "PI_EYEM_ENABLE", 1706 "PI_LOWVDD_ENB", 1707 "PI_MAIN_ENABLE", 1708 "PI_PHASE_INVERT", 1709 "PI_PHASE_ROTATE_OVERRIDE", 1710 "PLL_MODE", 1711 "PLL_PON", 1712 "PMD_TXDISABLE", 1713 "PM_RXLIMITAMPCALBYP", 1714 "PM_RXSLICERCALBYP", 1715 "POST_CONTROL", 1716 "POST_ENABLE", 1717 "PRBSGEN_EN", 1718 "PRBSGEN_INV", 1719 "PRBSGEN_ORDER", 1720 "PRBSMON_EN", 1721 "PRBSMON_INV", 1722 "PRBSMON_ORDER", 1723 "PRTAD_BCST_DISABLE", 1724 "PWD_LVL2PI", 1725 "PWRDN_RX", 1726 "PWRDN_TX", 1727 "PWRDWN_FORCE", 1728 "PWRDWN_PLL", 1729 "PWRDWN_SW", 1730 "QSGMII_ADJ_EN_FORCE", 1731 "QSGMII_ADJ_EN_VAL", 1732 "QSGMII_AUTO_PDRST_LN123_DISABLE", 1733 "QSGMII_EN", 1734 "QSGMII_K28P1_LN_SEL", 1735 "QSGMII_PIN_DISABLE", 1736 "QSGMII_SYNC_FORCE", 1737 "QUARTER_UNIT_EN", 1738 "RANGE_DFS", 1739 "RANGE_OVRD", 1740 "RANGE_OVRD_VAL", 1741 "RATE_SELECT", 1742 "RECAL_IND", 1743 "RECAL_IND_CLR", 1744 "RECAL_NEG_THRES", 1745 "RECAL_POS_THRES", 1746 "REFCLK_IN_BIAS", 1747 "REFCLK_SEL", 1748 "REF_DOUBLER_EN", 1749 "REGID", 1750 "REMOTE_FAULT", 1751 "REMOTE_FAULT_STAT", 1752 "REMOTE_LOOPBACK", 1753 "RESCAL_SEL", 1754 "RESERVED_0", 1755 "RESERVED_100", 1756 "RESERVED_105_103", 1757 "RESERVED_143_129", 1758 "RESERVED_14_12", 1759 "RESERVED_21", 1760 "RESERVED_26_17", 1761 "RESERVED_29", 1762 "RESERVED_31_28", 1763 "RESERVED_32", 1764 "RESERVED_33_32", 1765 "RESERVED_3_2", 1766 "RESERVED_41", 1767 "RESERVED_47_39", 1768 "RESERVED_52_48", 1769 "RESERVED_5_3", 1770 "RESERVED_63_48", 1771 "RESERVED_63_58", 1772 "RESERVED_7", 1773 "RESERVED_74_71", 1774 "RESERVED_84", 1775 "RESERVED_96", 1776 "RESET_MDIO", 1777 "RESET_PLL", 1778 "RESET_RX", 1779 "RESET_TX", 1780 "RESTART_AUTONEG", 1781 "REV_LETTER", 1782 "REV_NUMBER", 1783 "RISING_EDGE", 1784 "RLOOP1G", 1785 "RPAR", 1786 "RST_HW", 1787 "RX1G_MODE", 1788 "RXCK_MII_GEN_SEL_FORCE", 1789 "RXCK_MII_GEN_SEL_VAL", 1790 "RXDATA_SEL", 1791 "RXDETECT_TH", 1792 "RX_INTERP_CTRL_CAP", 1793 "RX_INTERP_STATUS_SEL", 1794 "RX_LA_CAL_DONE", 1795 "RX_LMTOFF", 1796 "RX_LMTOFF_OVRD", 1797 "RX_LMTOFF_OVRD_VAL", 1798 "RX_PF_CTRL", 1799 "RX_PHS_INTERP_STATUS", 1800 "RX_POLARITY_FORCE_SM", 1801 "RX_POLARITY_R", 1802 "RX_PON", 1803 "RX_SLICER_CALVALID", 1804 "RX_SLICER_CALVALID_OVRD", 1805 "RX_SLICER_CALVALID_OVRD_VAL", 1806 "RX_SLICER_CAL_DONE", 1807 "RX_SLOFF0", 1808 "RX_SLOFF0_INVALID", 1809 "RX_SLOFF0_OVRD", 1810 "RX_SLOFF0_OVRD_VAL", 1811 "RX_SLOFF1", 1812 "RX_SLOFF1_INVALID", 1813 "RX_SLOFF1_OVRD", 1814 "RX_SLOFF1_OVRD_VAL", 1815 "RX_SLOFF2", 1816 "RX_SLOFF2_INVALID", 1817 "RX_SLOFF2_OVRD", 1818 "RX_SLOFF2_OVRD_VAL", 1819 "S1000BASE_T_FULL_DUPLEX_CAPABLE", 1820 "S1000BASE_T_HALF_DUPLEX_CAPABLE", 1821 "S1000BASE_X_FULL_DUPLEX_CAPABLE", 1822 "S1000BASE_X_HALF_DUPLEX_CAPABLE", 1823 "S100BASE_T2_FULL_DUPLEX_CAPABLE", 1824 "S100BASE_T2_HALF_DUPLEX_CAPABLE", 1825 "S100BASE_T4_CAPABLE", 1826 "S100BASE_X_FULL_DUPLEX_CAPABLE", 1827 "S100BASE_X_HALF_DUPLEX_CAPABLE", 1828 "S10BASE_T_FULL_DUPLEX_CAPABLE", 1829 "S10BASE_T_HALF_DUPLEX_CAPABLE", 1830 "SCRAMBLER", 1831 "SEL_CLK", 1832 "SEL_FP3CAP", 1833 "SGMII_EXT_SEL", 1834 "SGMII_MASTER_MODE", 1835 "SGMII_MODE", 1836 "SIGDETTIME_SM", 1837 "SIGDET_BYPASS", 1838 "SIGDET_MODESELECT", 1839 "SIGDET_PD", 1840 "SIGDET_THRESHOLD", 1841 "SIGDET_USB_EN", 1842 "SIGNAL_DETECT_EN", 1843 "SLCAL_ACC_OPT", 1844 "SLCAL_DN_THRES", 1845 "SLCAL_EN_OVRD", 1846 "SLCAL_EN_OVRD_VAL", 1847 "SLCAL_INIT_TIME", 1848 "SLCAL_POL", 1849 "SLCAL_STATE", 1850 "SLCAL_UP_THRES", 1851 "SLCAL_VALID_OVRD", 1852 "SLCAL_VALID_OVRD_VAL", 1853 "SLEW_RATE_CONTROL", 1854 "SLICER_DATA_SEL", 1855 "SLICER_INTERVAL_TIME", 1856 "SLICER_PD", 1857 "SLOFFX_VAL", 1858 "SP2_RX_AFE_ANARXSTS", 1859 "SPEED_STATUS", 1860 "START_SEQUENCER", 1861 "STATUS_SEL", 1862 "STEP_ONE", 1863 "STEP_TWO", 1864 "TCA_COARSE_TIMER", 1865 "TCA_FINE_TIMER", 1866 "TCA_TIMER_SEL", 1867 "TCEST_NEG", 1868 "TECH_PROC", 1869 "TESTCK_EN", 1870 "TESTCLK_EN", 1871 "TESTSEL", 1872 "TEST_AMP", 1873 "TEST_PLL_MODE", 1874 "TEST_SEL", 1875 "TEST_VC", 1876 "TICKSEL", 1877 "TM_SLICE", 1878 "TOGGLE", 1879 "TOGGLE_FRACN_SEL", 1880 "TX1G_MODE", 1881 "TXCKO_DIV", 1882 "TXDATAI_SEL", 1883 "TXMDIOTSTDATAH", 1884 "TXMDIOTSTDATAL", 1885 "TXPOL_FLIP", 1886 "TX_MDATA_EN", 1887 "TX_PON", 1888 "TX_PWRDN", 1889 "TX_RATESELECT", 1890 "UP_SLOFFX_VAL", 1891 "VCO_ICTR", 1892 "VCO_RANGE", 1893 "VDD1P0_ENB", 1894 "VDD1P0_PLL_EN", 1895 "VDD_NOISE_CNCL_EN", 1896 "VDD_NOISE_SHAPE", 1897 "XGXS_SEL", 1898 "XTAL_BIAS", 1899 "XTAL_CORE_BIAS", 1900 }; 1901 1902 #endif 1903 #endif 1904 #endif 1905 #endif /* PHYMOD_CONFIG_INCLUDE_FIELD_INFO */ 1906 1907 1908 1909 /******************************************************************************* 1910 * 1911 * The following is the symbol table itself. 1912 * It defines the entries for all registers and memories. 1913 * It also incorporates the field information for each register and memory if 1914 * applicable. 1915 */ 1916 static const phymod_symbol_t bcmi_sgmiip2x4_serdes_syms[] = { 1917 #ifndef PHYMOD_CONFIG_EXCLUDE_CHIP_SYMBOLS_BCMI_SGMIIP2X4_SERDES 1918 { 1919 BCMI_SGMIIP2X4_SERDES_SP2_MIICTLr, 1920 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 1921 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 1922 BCMI_SGMIIP2X4_SERDES_SP2_MIICTLr_fields, 1923 #else 1924 0, 1925 #endif 1926 #endif 1927 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 1928 PHYMOD_SYMBOL_FLAG_REGISTER, 1929 "SP2_MIICTLr", 1930 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 1931 "CL22_B0_MIICNTL", 1932 NULL, 1933 #endif 1934 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 1935 0x140, /* 320 */ 1936 0, 1937 #endif 1938 }, 1939 { 1940 BCMI_SGMIIP2X4_SERDES_SP2_MIISTATr, 1941 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 1942 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 1943 BCMI_SGMIIP2X4_SERDES_SP2_MIISTATr_fields, 1944 #else 1945 0, 1946 #endif 1947 #endif 1948 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 1949 PHYMOD_SYMBOL_FLAG_REGISTER, 1950 "SP2_MIISTATr", 1951 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 1952 "CL22_B0_MIISTAT", 1953 NULL, 1954 #endif 1955 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 1956 0x109, /* 265 */ 1957 0, 1958 #endif 1959 }, 1960 { 1961 BCMI_SGMIIP2X4_SERDES_SP2_ID1r, 1962 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 1963 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 1964 BCMI_SGMIIP2X4_SERDES_SP2_ID1r_fields, 1965 #else 1966 0, 1967 #endif 1968 #endif 1969 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 1970 PHYMOD_SYMBOL_FLAG_REGISTER, 1971 "SP2_ID1r", 1972 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 1973 "CL22_B0_ID1", 1974 NULL, 1975 #endif 1976 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 1977 0x143, /* 323 */ 1978 0, 1979 #endif 1980 }, 1981 { 1982 BCMI_SGMIIP2X4_SERDES_SP2_ID2r, 1983 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 1984 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 1985 BCMI_SGMIIP2X4_SERDES_SP2_ID2r_fields, 1986 #else 1987 0, 1988 #endif 1989 #endif 1990 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 1991 PHYMOD_SYMBOL_FLAG_REGISTER, 1992 "SP2_ID2r", 1993 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 1994 "CL22_B0_ID2", 1995 NULL, 1996 #endif 1997 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 1998 0xbff0, /* 49136 */ 1999 0, 2000 #endif 2001 }, 2002 { 2003 BCMI_SGMIIP2X4_SERDES_SP2_AUTONEGADVr, 2004 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2005 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2006 BCMI_SGMIIP2X4_SERDES_SP2_AUTONEGADVr_fields, 2007 #else 2008 0, 2009 #endif 2010 #endif 2011 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2012 PHYMOD_SYMBOL_FLAG_REGISTER, 2013 "SP2_AUTONEGADVr", 2014 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2015 "CL22_B0_AUTONEGADV", 2016 NULL, 2017 #endif 2018 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2019 0x20, /* 32 */ 2020 0, 2021 #endif 2022 }, 2023 { 2024 BCMI_SGMIIP2X4_SERDES_SP2_AUTONEGLPABILr, 2025 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2026 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2027 BCMI_SGMIIP2X4_SERDES_SP2_AUTONEGLPABILr_fields, 2028 #else 2029 0, 2030 #endif 2031 #endif 2032 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2033 PHYMOD_SYMBOL_FLAG_REGISTER, 2034 "SP2_AUTONEGLPABILr", 2035 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2036 "CL22_B0_AUTONEGLPABIL", 2037 NULL, 2038 #endif 2039 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2040 0x0, /* 0 */ 2041 0, 2042 #endif 2043 }, 2044 { 2045 BCMI_SGMIIP2X4_SERDES_SP2_AUTONEGEXPr, 2046 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2047 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2048 BCMI_SGMIIP2X4_SERDES_SP2_AUTONEGEXPr_fields, 2049 #else 2050 0, 2051 #endif 2052 #endif 2053 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2054 PHYMOD_SYMBOL_FLAG_REGISTER, 2055 "SP2_AUTONEGEXPr", 2056 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2057 "CL22_B0_AUTONEGEXP", 2058 NULL, 2059 #endif 2060 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2061 0x4, /* 4 */ 2062 0, 2063 #endif 2064 }, 2065 { 2066 BCMI_SGMIIP2X4_SERDES_SP2_AUTONEGNPr, 2067 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2068 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2069 BCMI_SGMIIP2X4_SERDES_SP2_AUTONEGNPr_fields, 2070 #else 2071 0, 2072 #endif 2073 #endif 2074 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2075 PHYMOD_SYMBOL_FLAG_REGISTER, 2076 "SP2_AUTONEGNPr", 2077 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2078 "CL22_B0_AUTONEGNP", 2079 NULL, 2080 #endif 2081 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2082 0x2001, /* 8193 */ 2083 0, 2084 #endif 2085 }, 2086 { 2087 BCMI_SGMIIP2X4_SERDES_SP2_AUTONEGLPABIL2r, 2088 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2089 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2090 BCMI_SGMIIP2X4_SERDES_SP2_AUTONEGLPABIL2r_fields, 2091 #else 2092 0, 2093 #endif 2094 #endif 2095 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2096 PHYMOD_SYMBOL_FLAG_REGISTER, 2097 "SP2_AUTONEGLPABIL2r", 2098 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2099 "CL22_B0_AUTONEGLPABIL2", 2100 NULL, 2101 #endif 2102 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2103 0x0, /* 0 */ 2104 0, 2105 #endif 2106 }, 2107 { 2108 BCMI_SGMIIP2X4_SERDES_SP2_MMD_ACCCTLr, 2109 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2110 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2111 BCMI_SGMIIP2X4_SERDES_SP2_MMD_ACCCTLr_fields, 2112 #else 2113 0, 2114 #endif 2115 #endif 2116 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2117 PHYMOD_SYMBOL_FLAG_REGISTER, 2118 "SP2_MMD_ACCCTLr", 2119 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2120 "CL22_B0_MMD_ACCESSCONTROL", 2121 NULL, 2122 #endif 2123 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2124 0x0, /* 0 */ 2125 0, 2126 #endif 2127 }, 2128 { 2129 BCMI_SGMIIP2X4_SERDES_SP2_MMD_ACCADr, 2130 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2131 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2132 BCMI_SGMIIP2X4_SERDES_SP2_MMD_ACCADr_fields, 2133 #else 2134 0, 2135 #endif 2136 #endif 2137 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2138 PHYMOD_SYMBOL_FLAG_REGISTER, 2139 "SP2_MMD_ACCADr", 2140 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2141 "CL22_B0_MMD_ACCESSAD", 2142 NULL, 2143 #endif 2144 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2145 0x0, /* 0 */ 2146 0, 2147 #endif 2148 }, 2149 { 2150 BCMI_SGMIIP2X4_SERDES_SP2_MIIEXTSTATr, 2151 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2152 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2153 BCMI_SGMIIP2X4_SERDES_SP2_MIIEXTSTATr_fields, 2154 #else 2155 0, 2156 #endif 2157 #endif 2158 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2159 PHYMOD_SYMBOL_FLAG_REGISTER, 2160 "SP2_MIIEXTSTATr", 2161 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2162 "CL22_B0_MIIEXTSTAT", 2163 NULL, 2164 #endif 2165 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2166 0xc000, /* 49152 */ 2167 0, 2168 #endif 2169 }, 2170 { 2171 BCMI_SGMIIP2X4_SERDES_SP2_XGXSCTLr, 2172 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2173 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2174 BCMI_SGMIIP2X4_SERDES_SP2_XGXSCTLr_fields, 2175 #else 2176 0, 2177 #endif 2178 #endif 2179 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2180 PHYMOD_SYMBOL_FLAG_REGISTER, 2181 "SP2_XGXSCTLr", 2182 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2183 "BLK0_XGXSCONTROL", 2184 NULL, 2185 #endif 2186 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2187 0x252f, /* 9519 */ 2188 0, 2189 #endif 2190 }, 2191 { 2192 BCMI_SGMIIP2X4_SERDES_SP2_MMDSELr, 2193 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2194 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2195 BCMI_SGMIIP2X4_SERDES_SP2_MMDSELr_fields, 2196 #else 2197 0, 2198 #endif 2199 #endif 2200 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2201 PHYMOD_SYMBOL_FLAG_REGISTER, 2202 "SP2_MMDSELr", 2203 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2204 "BLK0_MMDSELECT", 2205 NULL, 2206 #endif 2207 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2208 0xf, /* 15 */ 2209 0, 2210 #endif 2211 }, 2212 { 2213 BCMI_SGMIIP2X4_SERDES_SP2_MISCCTL1r, 2214 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2215 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2216 BCMI_SGMIIP2X4_SERDES_SP2_MISCCTL1r_fields, 2217 #else 2218 0, 2219 #endif 2220 #endif 2221 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2222 PHYMOD_SYMBOL_FLAG_REGISTER, 2223 "SP2_MISCCTL1r", 2224 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2225 "BLK0_MISCCONTROL1", 2226 NULL, 2227 #endif 2228 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2229 0x0, /* 0 */ 2230 0, 2231 #endif 2232 }, 2233 { 2234 BCMI_SGMIIP2X4_SERDES_SP2_BLKADDR0r, 2235 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2236 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2237 BCMI_SGMIIP2X4_SERDES_SP2_BLKADDR0r_fields, 2238 #else 2239 0, 2240 #endif 2241 #endif 2242 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2243 PHYMOD_SYMBOL_FLAG_REGISTER, 2244 "SP2_BLKADDR0r", 2245 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2246 "BLK0_BLOCKADDRESS", 2247 NULL, 2248 #endif 2249 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2250 0x0, /* 0 */ 2251 0, 2252 #endif 2253 }, 2254 { 2255 BCMI_SGMIIP2X4_SERDES_SP2_LANECTL3r, 2256 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2257 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2258 BCMI_SGMIIP2X4_SERDES_SP2_LANECTL3r_fields, 2259 #else 2260 0, 2261 #endif 2262 #endif 2263 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2264 PHYMOD_SYMBOL_FLAG_REGISTER, 2265 "SP2_LANECTL3r", 2266 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2267 "BLK1_LANECTRL3", 2268 NULL, 2269 #endif 2270 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2271 0x0, /* 0 */ 2272 0, 2273 #endif 2274 }, 2275 { 2276 BCMI_SGMIIP2X4_SERDES_SP2_BLKADDR1r, 2277 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2278 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2279 BCMI_SGMIIP2X4_SERDES_SP2_BLKADDR1r_fields, 2280 #else 2281 0, 2282 #endif 2283 #endif 2284 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2285 PHYMOD_SYMBOL_FLAG_REGISTER, 2286 "SP2_BLKADDR1r", 2287 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2288 "BLK1_BLOCKADDRESS", 2289 NULL, 2290 #endif 2291 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2292 0x10, /* 16 */ 2293 0, 2294 #endif 2295 }, 2296 { 2297 BCMI_SGMIIP2X4_SERDES_SP2_PLL_AFE_CTL0r, 2298 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2299 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2300 BCMI_SGMIIP2X4_SERDES_SP2_PLL_AFE_CTL0r_fields, 2301 #else 2302 0, 2303 #endif 2304 #endif 2305 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2306 PHYMOD_SYMBOL_FLAG_REGISTER, 2307 "SP2_PLL_AFE_CTL0r", 2308 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2309 "PLL_AFE_CTRL0", 2310 NULL, 2311 #endif 2312 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2313 0x5740, /* 22336 */ 2314 0, 2315 #endif 2316 }, 2317 { 2318 BCMI_SGMIIP2X4_SERDES_SP2_PLL_AFE_CTL1r, 2319 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2320 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2321 BCMI_SGMIIP2X4_SERDES_SP2_PLL_AFE_CTL1r_fields, 2322 #else 2323 0, 2324 #endif 2325 #endif 2326 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2327 PHYMOD_SYMBOL_FLAG_REGISTER, 2328 "SP2_PLL_AFE_CTL1r", 2329 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2330 "PLL_AFE_CTRL1", 2331 NULL, 2332 #endif 2333 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2334 0x1d0, /* 464 */ 2335 0, 2336 #endif 2337 }, 2338 { 2339 BCMI_SGMIIP2X4_SERDES_SP2_PLL_AFE_CTL2r, 2340 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2341 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2342 BCMI_SGMIIP2X4_SERDES_SP2_PLL_AFE_CTL2r_fields, 2343 #else 2344 0, 2345 #endif 2346 #endif 2347 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2348 PHYMOD_SYMBOL_FLAG_REGISTER, 2349 "SP2_PLL_AFE_CTL2r", 2350 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2351 "PLL_AFE_CTRL2", 2352 NULL, 2353 #endif 2354 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2355 0x19f8, /* 6648 */ 2356 0, 2357 #endif 2358 }, 2359 { 2360 BCMI_SGMIIP2X4_SERDES_SP2_PLL_AFE_CTL3r, 2361 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2362 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2363 BCMI_SGMIIP2X4_SERDES_SP2_PLL_AFE_CTL3r_fields, 2364 #else 2365 0, 2366 #endif 2367 #endif 2368 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2369 PHYMOD_SYMBOL_FLAG_REGISTER, 2370 "SP2_PLL_AFE_CTL3r", 2371 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2372 "PLL_AFE_CTRL3", 2373 NULL, 2374 #endif 2375 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2376 0x2b00, /* 11008 */ 2377 0, 2378 #endif 2379 }, 2380 { 2381 BCMI_SGMIIP2X4_SERDES_SP2_PLL_AFE_CTL4r, 2382 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2383 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2384 BCMI_SGMIIP2X4_SERDES_SP2_PLL_AFE_CTL4r_fields, 2385 #else 2386 0, 2387 #endif 2388 #endif 2389 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2390 PHYMOD_SYMBOL_FLAG_REGISTER, 2391 "SP2_PLL_AFE_CTL4r", 2392 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2393 "PLL_AFE_CTRL4", 2394 NULL, 2395 #endif 2396 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2397 0x21, /* 33 */ 2398 0, 2399 #endif 2400 }, 2401 { 2402 BCMI_SGMIIP2X4_SERDES_SP2_PLL_AFE_CTL5r, 2403 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2404 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2405 BCMI_SGMIIP2X4_SERDES_SP2_PLL_AFE_CTL5r_fields, 2406 #else 2407 0, 2408 #endif 2409 #endif 2410 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2411 PHYMOD_SYMBOL_FLAG_REGISTER, 2412 "SP2_PLL_AFE_CTL5r", 2413 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2414 "PLL_AFE_CTRL5", 2415 NULL, 2416 #endif 2417 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2418 0x44, /* 68 */ 2419 0, 2420 #endif 2421 }, 2422 { 2423 BCMI_SGMIIP2X4_SERDES_SP2_PLL_AFE_CTL6r, 2424 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2425 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2426 BCMI_SGMIIP2X4_SERDES_SP2_PLL_AFE_CTL6r_fields, 2427 #else 2428 0, 2429 #endif 2430 #endif 2431 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2432 PHYMOD_SYMBOL_FLAG_REGISTER, 2433 "SP2_PLL_AFE_CTL6r", 2434 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2435 "PLL_AFE_CTRL6", 2436 NULL, 2437 #endif 2438 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2439 0x0, /* 0 */ 2440 0, 2441 #endif 2442 }, 2443 { 2444 BCMI_SGMIIP2X4_SERDES_SP2_PLL_AFE_CTL7r, 2445 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2446 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2447 BCMI_SGMIIP2X4_SERDES_SP2_PLL_AFE_CTL7r_fields, 2448 #else 2449 0, 2450 #endif 2451 #endif 2452 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2453 PHYMOD_SYMBOL_FLAG_REGISTER, 2454 "SP2_PLL_AFE_CTL7r", 2455 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2456 "PLL_AFE_CTRL7", 2457 NULL, 2458 #endif 2459 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2460 0x0, /* 0 */ 2461 0, 2462 #endif 2463 }, 2464 { 2465 BCMI_SGMIIP2X4_SERDES_SP2_PLL_AFE_CTL8r, 2466 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2467 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2468 BCMI_SGMIIP2X4_SERDES_SP2_PLL_AFE_CTL8r_fields, 2469 #else 2470 0, 2471 #endif 2472 #endif 2473 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2474 PHYMOD_SYMBOL_FLAG_REGISTER, 2475 "SP2_PLL_AFE_CTL8r", 2476 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2477 "PLL_AFE_CTRL8", 2478 NULL, 2479 #endif 2480 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2481 0x0, /* 0 */ 2482 0, 2483 #endif 2484 }, 2485 { 2486 BCMI_SGMIIP2X4_SERDES_SP2_TCATMR0r, 2487 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2488 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2489 BCMI_SGMIIP2X4_SERDES_SP2_TCATMR0r_fields, 2490 #else 2491 0, 2492 #endif 2493 #endif 2494 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2495 PHYMOD_SYMBOL_FLAG_REGISTER, 2496 "SP2_TCATMR0r", 2497 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2498 "PLL_AFE_TCATIMER0", 2499 NULL, 2500 #endif 2501 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2502 0xd80, /* 3456 */ 2503 0, 2504 #endif 2505 }, 2506 { 2507 BCMI_SGMIIP2X4_SERDES_SP2_TCATMR1r, 2508 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2509 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2510 BCMI_SGMIIP2X4_SERDES_SP2_TCATMR1r_fields, 2511 #else 2512 0, 2513 #endif 2514 #endif 2515 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2516 PHYMOD_SYMBOL_FLAG_REGISTER, 2517 "SP2_TCATMR1r", 2518 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2519 "PLL_AFE_TCATIMER1", 2520 NULL, 2521 #endif 2522 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2523 0x400, /* 1024 */ 2524 0, 2525 #endif 2526 }, 2527 { 2528 BCMI_SGMIIP2X4_SERDES_SP2_PLL_AFE_BLKADDRr, 2529 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2530 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2531 BCMI_SGMIIP2X4_SERDES_SP2_PLL_AFE_BLKADDRr_fields, 2532 #else 2533 0, 2534 #endif 2535 #endif 2536 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2537 PHYMOD_SYMBOL_FLAG_REGISTER, 2538 "SP2_PLL_AFE_BLKADDRr", 2539 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2540 "PLL_AFE_BLOCKADDRESS", 2541 NULL, 2542 #endif 2543 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2544 0x50, /* 80 */ 2545 0, 2546 #endif 2547 }, 2548 { 2549 BCMI_SGMIIP2X4_SERDES_SP2_TX_AFE_ANATXACTL0r, 2550 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2551 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2552 BCMI_SGMIIP2X4_SERDES_SP2_TX_AFE_ANATXACTL0r_fields, 2553 #else 2554 0, 2555 #endif 2556 #endif 2557 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2558 PHYMOD_SYMBOL_FLAG_REGISTER, 2559 "SP2_TX_AFE_ANATXACTL0r", 2560 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2561 "TX_AFE_ANATXACONTROL0", 2562 NULL, 2563 #endif 2564 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2565 0x0, /* 0 */ 2566 0, 2567 #endif 2568 }, 2569 { 2570 BCMI_SGMIIP2X4_SERDES_SP2_TX_AFE_ANATXMDATA0r, 2571 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2572 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2573 BCMI_SGMIIP2X4_SERDES_SP2_TX_AFE_ANATXMDATA0r_fields, 2574 #else 2575 0, 2576 #endif 2577 #endif 2578 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2579 PHYMOD_SYMBOL_FLAG_REGISTER, 2580 "SP2_TX_AFE_ANATXMDATA0r", 2581 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2582 "TX_AFE_ANATXMDATA0", 2583 NULL, 2584 #endif 2585 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2586 0x0, /* 0 */ 2587 0, 2588 #endif 2589 }, 2590 { 2591 BCMI_SGMIIP2X4_SERDES_SP2_TX_AFE_ANATXMDATA1r, 2592 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2593 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2594 BCMI_SGMIIP2X4_SERDES_SP2_TX_AFE_ANATXMDATA1r_fields, 2595 #else 2596 0, 2597 #endif 2598 #endif 2599 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2600 PHYMOD_SYMBOL_FLAG_REGISTER, 2601 "SP2_TX_AFE_ANATXMDATA1r", 2602 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2603 "TX_AFE_ANATXMDATA1", 2604 NULL, 2605 #endif 2606 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2607 0x0, /* 0 */ 2608 0, 2609 #endif 2610 }, 2611 { 2612 BCMI_SGMIIP2X4_SERDES_SP2_TX_AFE_CTL0r, 2613 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2614 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2615 BCMI_SGMIIP2X4_SERDES_SP2_TX_AFE_CTL0r_fields, 2616 #else 2617 0, 2618 #endif 2619 #endif 2620 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2621 PHYMOD_SYMBOL_FLAG_REGISTER, 2622 "SP2_TX_AFE_CTL0r", 2623 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2624 "TX_AFE_CONTROL0", 2625 NULL, 2626 #endif 2627 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2628 0x3220, /* 12832 */ 2629 0, 2630 #endif 2631 }, 2632 { 2633 BCMI_SGMIIP2X4_SERDES_SP2_TX_AFE_CTL1r, 2634 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2635 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2636 BCMI_SGMIIP2X4_SERDES_SP2_TX_AFE_CTL1r_fields, 2637 #else 2638 0, 2639 #endif 2640 #endif 2641 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2642 PHYMOD_SYMBOL_FLAG_REGISTER, 2643 "SP2_TX_AFE_CTL1r", 2644 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2645 "TX_AFE_CONTROL1", 2646 NULL, 2647 #endif 2648 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2649 0x8009, /* 32777 */ 2650 0, 2651 #endif 2652 }, 2653 { 2654 BCMI_SGMIIP2X4_SERDES_SP2_TX_AFE_CTL2r, 2655 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2656 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2657 BCMI_SGMIIP2X4_SERDES_SP2_TX_AFE_CTL2r_fields, 2658 #else 2659 0, 2660 #endif 2661 #endif 2662 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2663 PHYMOD_SYMBOL_FLAG_REGISTER, 2664 "SP2_TX_AFE_CTL2r", 2665 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2666 "TX_AFE_CONTROL2", 2667 NULL, 2668 #endif 2669 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2670 0x38, /* 56 */ 2671 0, 2672 #endif 2673 }, 2674 { 2675 BCMI_SGMIIP2X4_SERDES_SP2_TX_AFE_CTL3r, 2676 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2677 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2678 BCMI_SGMIIP2X4_SERDES_SP2_TX_AFE_CTL3r_fields, 2679 #else 2680 0, 2681 #endif 2682 #endif 2683 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2684 PHYMOD_SYMBOL_FLAG_REGISTER, 2685 "SP2_TX_AFE_CTL3r", 2686 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2687 "TX_AFE_CONTROL3", 2688 NULL, 2689 #endif 2690 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2691 0x16, /* 22 */ 2692 0, 2693 #endif 2694 }, 2695 { 2696 BCMI_SGMIIP2X4_SERDES_SP2_TX_AFE_INTERPr, 2697 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2698 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2699 BCMI_SGMIIP2X4_SERDES_SP2_TX_AFE_INTERPr_fields, 2700 #else 2701 0, 2702 #endif 2703 #endif 2704 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2705 PHYMOD_SYMBOL_FLAG_REGISTER, 2706 "SP2_TX_AFE_INTERPr", 2707 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2708 "TX_AFE_INTERP", 2709 NULL, 2710 #endif 2711 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2712 0x80, /* 128 */ 2713 0, 2714 #endif 2715 }, 2716 { 2717 BCMI_SGMIIP2X4_SERDES_SP2_TX_AFE_BLKADDRr, 2718 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2719 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2720 BCMI_SGMIIP2X4_SERDES_SP2_TX_AFE_BLKADDRr_fields, 2721 #else 2722 0, 2723 #endif 2724 #endif 2725 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2726 PHYMOD_SYMBOL_FLAG_REGISTER, 2727 "SP2_TX_AFE_BLKADDRr", 2728 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2729 "TX_AFE_BLOCKADDRESS", 2730 NULL, 2731 #endif 2732 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2733 0x60, /* 96 */ 2734 0, 2735 #endif 2736 }, 2737 { 2738 BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_ANARXSTSr, 2739 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2740 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2741 BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_ANARXSTSr_fields, 2742 #else 2743 0, 2744 #endif 2745 #endif 2746 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2747 PHYMOD_SYMBOL_FLAG_REGISTER, 2748 "SP2_RX_AFE_ANARXSTSr", 2749 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2750 "RX_AFE_ANARXSTATUS", 2751 NULL, 2752 #endif 2753 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2754 0x0, /* 0 */ 2755 0, 2756 #endif 2757 }, 2758 { 2759 BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_ANARXCTLr, 2760 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2761 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2762 BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_ANARXCTLr_fields, 2763 #else 2764 0, 2765 #endif 2766 #endif 2767 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2768 PHYMOD_SYMBOL_FLAG_REGISTER, 2769 "SP2_RX_AFE_ANARXCTLr", 2770 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2771 "RX_AFE_ANARXCONTROL", 2772 NULL, 2773 #endif 2774 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2775 0x0, /* 0 */ 2776 0, 2777 #endif 2778 }, 2779 { 2780 BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_CTL0r, 2781 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2782 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2783 BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_CTL0r_fields, 2784 #else 2785 0, 2786 #endif 2787 #endif 2788 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2789 PHYMOD_SYMBOL_FLAG_REGISTER, 2790 "SP2_RX_AFE_CTL0r", 2791 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2792 "RX_AFE_CTRL0", 2793 NULL, 2794 #endif 2795 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2796 0x780, /* 1920 */ 2797 0, 2798 #endif 2799 }, 2800 { 2801 BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_CTL1r, 2802 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2803 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2804 BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_CTL1r_fields, 2805 #else 2806 0, 2807 #endif 2808 #endif 2809 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2810 PHYMOD_SYMBOL_FLAG_REGISTER, 2811 "SP2_RX_AFE_CTL1r", 2812 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2813 "RX_AFE_CTRL1", 2814 NULL, 2815 #endif 2816 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2817 0x8001, /* 32769 */ 2818 0, 2819 #endif 2820 }, 2821 { 2822 BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_ANARXSIGDETr, 2823 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2824 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2825 BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_ANARXSIGDETr_fields, 2826 #else 2827 0, 2828 #endif 2829 #endif 2830 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2831 PHYMOD_SYMBOL_FLAG_REGISTER, 2832 "SP2_RX_AFE_ANARXSIGDETr", 2833 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2834 "RX_AFE_ANARXSIGDET", 2835 NULL, 2836 #endif 2837 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2838 0x0, /* 0 */ 2839 0, 2840 #endif 2841 }, 2842 { 2843 BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_CTL2r, 2844 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2845 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2846 BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_CTL2r_fields, 2847 #else 2848 0, 2849 #endif 2850 #endif 2851 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2852 PHYMOD_SYMBOL_FLAG_REGISTER, 2853 "SP2_RX_AFE_CTL2r", 2854 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2855 "RX_AFE_CTRL2", 2856 NULL, 2857 #endif 2858 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2859 0x22, /* 34 */ 2860 0, 2861 #endif 2862 }, 2863 { 2864 BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_CTL3r, 2865 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2866 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2867 BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_CTL3r_fields, 2868 #else 2869 0, 2870 #endif 2871 #endif 2872 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2873 PHYMOD_SYMBOL_FLAG_REGISTER, 2874 "SP2_RX_AFE_CTL3r", 2875 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2876 "RX_AFE_CTRL3", 2877 NULL, 2878 #endif 2879 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2880 0xc0, /* 192 */ 2881 0, 2882 #endif 2883 }, 2884 { 2885 BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_CTL4r, 2886 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2887 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2888 BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_CTL4r_fields, 2889 #else 2890 0, 2891 #endif 2892 #endif 2893 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2894 PHYMOD_SYMBOL_FLAG_REGISTER, 2895 "SP2_RX_AFE_CTL4r", 2896 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2897 "RX_AFE_CTRL4", 2898 NULL, 2899 #endif 2900 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2901 0x492, /* 1170 */ 2902 0, 2903 #endif 2904 }, 2905 { 2906 BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_ANARXCTLPCIr, 2907 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2908 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2909 BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_ANARXCTLPCIr_fields, 2910 #else 2911 0, 2912 #endif 2913 #endif 2914 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2915 PHYMOD_SYMBOL_FLAG_REGISTER, 2916 "SP2_RX_AFE_ANARXCTLPCIr", 2917 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2918 "RX_AFE_ANARXCONTROLPCI", 2919 NULL, 2920 #endif 2921 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2922 0x0, /* 0 */ 2923 0, 2924 #endif 2925 }, 2926 { 2927 BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_CTL5r, 2928 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2929 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2930 BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_CTL5r_fields, 2931 #else 2932 0, 2933 #endif 2934 #endif 2935 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2936 PHYMOD_SYMBOL_FLAG_REGISTER, 2937 "SP2_RX_AFE_CTL5r", 2938 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2939 "RX_AFE_CTRL5", 2940 NULL, 2941 #endif 2942 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2943 0x2c0e, /* 11278 */ 2944 0, 2945 #endif 2946 }, 2947 { 2948 BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_CTL6r, 2949 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2950 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2951 BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_CTL6r_fields, 2952 #else 2953 0, 2954 #endif 2955 #endif 2956 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2957 PHYMOD_SYMBOL_FLAG_REGISTER, 2958 "SP2_RX_AFE_CTL6r", 2959 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2960 "RX_AFE_CTRL6", 2961 NULL, 2962 #endif 2963 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2964 0x44, /* 68 */ 2965 0, 2966 #endif 2967 }, 2968 { 2969 BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_BLKADDRr, 2970 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2971 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2972 BCMI_SGMIIP2X4_SERDES_SP2_RX_AFE_BLKADDRr_fields, 2973 #else 2974 0, 2975 #endif 2976 #endif 2977 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2978 PHYMOD_SYMBOL_FLAG_REGISTER, 2979 "SP2_RX_AFE_BLKADDRr", 2980 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 2981 "RX_AFE_BLOCKADDRESS", 2982 NULL, 2983 #endif 2984 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 2985 0xb0, /* 176 */ 2986 0, 2987 #endif 2988 }, 2989 { 2990 BCMI_SGMIIP2X4_SERDES_SP2_TESTMODELANEr, 2991 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 2992 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 2993 BCMI_SGMIIP2X4_SERDES_SP2_TESTMODELANEr_fields, 2994 #else 2995 0, 2996 #endif 2997 #endif 2998 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 2999 PHYMOD_SYMBOL_FLAG_REGISTER, 3000 "SP2_TESTMODELANEr", 3001 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3002 "BLK2_TESTMODELANE", 3003 NULL, 3004 #endif 3005 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3006 0x0, /* 0 */ 3007 0, 3008 #endif 3009 }, 3010 { 3011 BCMI_SGMIIP2X4_SERDES_SP2_MISCRESETr, 3012 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3013 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3014 BCMI_SGMIIP2X4_SERDES_SP2_MISCRESETr_fields, 3015 #else 3016 0, 3017 #endif 3018 #endif 3019 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3020 PHYMOD_SYMBOL_FLAG_REGISTER, 3021 "SP2_MISCRESETr", 3022 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3023 "BLK2_MISCRESET", 3024 NULL, 3025 #endif 3026 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3027 0x0, /* 0 */ 3028 0, 3029 #endif 3030 }, 3031 { 3032 BCMI_SGMIIP2X4_SERDES_SP2_QSGMIIr, 3033 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3034 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3035 BCMI_SGMIIP2X4_SERDES_SP2_QSGMIIr_fields, 3036 #else 3037 0, 3038 #endif 3039 #endif 3040 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3041 PHYMOD_SYMBOL_FLAG_REGISTER, 3042 "SP2_QSGMIIr", 3043 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3044 "BLK2_QSGMII", 3045 NULL, 3046 #endif 3047 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3048 0x0, /* 0 */ 3049 0, 3050 #endif 3051 }, 3052 { 3053 BCMI_SGMIIP2X4_SERDES_SP2_BLKADDR2r, 3054 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3055 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3056 BCMI_SGMIIP2X4_SERDES_SP2_BLKADDR2r_fields, 3057 #else 3058 0, 3059 #endif 3060 #endif 3061 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3062 PHYMOD_SYMBOL_FLAG_REGISTER, 3063 "SP2_BLKADDR2r", 3064 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3065 "BLK2_BLOCKADDRESS", 3066 NULL, 3067 #endif 3068 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3069 0x100, /* 256 */ 3070 0, 3071 #endif 3072 }, 3073 { 3074 BCMI_SGMIIP2X4_SERDES_SP2_PLL2_STAT0r, 3075 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3076 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3077 BCMI_SGMIIP2X4_SERDES_SP2_PLL2_STAT0r_fields, 3078 #else 3079 0, 3080 #endif 3081 #endif 3082 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3083 PHYMOD_SYMBOL_FLAG_REGISTER, 3084 "SP2_PLL2_STAT0r", 3085 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3086 "PLL2_STAT0", 3087 NULL, 3088 #endif 3089 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3090 0x422, /* 1058 */ 3091 0, 3092 #endif 3093 }, 3094 { 3095 BCMI_SGMIIP2X4_SERDES_SP2_PLL2_CTL1r, 3096 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3097 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3098 BCMI_SGMIIP2X4_SERDES_SP2_PLL2_CTL1r_fields, 3099 #else 3100 0, 3101 #endif 3102 #endif 3103 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3104 PHYMOD_SYMBOL_FLAG_REGISTER, 3105 "SP2_PLL2_CTL1r", 3106 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3107 "PLL2_CTRL1", 3108 NULL, 3109 #endif 3110 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3111 0x300, /* 768 */ 3112 0, 3113 #endif 3114 }, 3115 { 3116 BCMI_SGMIIP2X4_SERDES_SP2_PLL2_CTL2r, 3117 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3118 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3119 BCMI_SGMIIP2X4_SERDES_SP2_PLL2_CTL2r_fields, 3120 #else 3121 0, 3122 #endif 3123 #endif 3124 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3125 PHYMOD_SYMBOL_FLAG_REGISTER, 3126 "SP2_PLL2_CTL2r", 3127 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3128 "PLL2_CTRL2", 3129 NULL, 3130 #endif 3131 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3132 0x4000, /* 16384 */ 3133 0, 3134 #endif 3135 }, 3136 { 3137 BCMI_SGMIIP2X4_SERDES_SP2_PLL2_CTL3r, 3138 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3139 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3140 BCMI_SGMIIP2X4_SERDES_SP2_PLL2_CTL3r_fields, 3141 #else 3142 0, 3143 #endif 3144 #endif 3145 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3146 PHYMOD_SYMBOL_FLAG_REGISTER, 3147 "SP2_PLL2_CTL3r", 3148 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3149 "PLL2_CTRL3", 3150 NULL, 3151 #endif 3152 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3153 0x1e84, /* 7812 */ 3154 0, 3155 #endif 3156 }, 3157 { 3158 BCMI_SGMIIP2X4_SERDES_SP2_PLL2_CTL4r, 3159 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3160 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3161 BCMI_SGMIIP2X4_SERDES_SP2_PLL2_CTL4r_fields, 3162 #else 3163 0, 3164 #endif 3165 #endif 3166 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3167 PHYMOD_SYMBOL_FLAG_REGISTER, 3168 "SP2_PLL2_CTL4r", 3169 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3170 "PLL2_CTRL4", 3171 NULL, 3172 #endif 3173 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3174 0x61a, /* 1562 */ 3175 0, 3176 #endif 3177 }, 3178 { 3179 BCMI_SGMIIP2X4_SERDES_SP2_PLL2_CTL5r, 3180 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3181 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3182 BCMI_SGMIIP2X4_SERDES_SP2_PLL2_CTL5r_fields, 3183 #else 3184 0, 3185 #endif 3186 #endif 3187 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3188 PHYMOD_SYMBOL_FLAG_REGISTER, 3189 "SP2_PLL2_CTL5r", 3190 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3191 "PLL2_CTRL5", 3192 NULL, 3193 #endif 3194 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3195 0x3d09, /* 15625 */ 3196 0, 3197 #endif 3198 }, 3199 { 3200 BCMI_SGMIIP2X4_SERDES_SP2_PLL2_CTL6r, 3201 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3202 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3203 BCMI_SGMIIP2X4_SERDES_SP2_PLL2_CTL6r_fields, 3204 #else 3205 0, 3206 #endif 3207 #endif 3208 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3209 PHYMOD_SYMBOL_FLAG_REGISTER, 3210 "SP2_PLL2_CTL6r", 3211 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3212 "PLL2_CTRL6", 3213 NULL, 3214 #endif 3215 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3216 0x3c, /* 60 */ 3217 0, 3218 #endif 3219 }, 3220 { 3221 BCMI_SGMIIP2X4_SERDES_SP2_PLL2_BLKADDRr, 3222 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3223 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3224 BCMI_SGMIIP2X4_SERDES_SP2_PLL2_BLKADDRr_fields, 3225 #else 3226 0, 3227 #endif 3228 #endif 3229 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3230 PHYMOD_SYMBOL_FLAG_REGISTER, 3231 "SP2_PLL2_BLKADDRr", 3232 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3233 "PLL2_BLOCKADDRESS", 3234 NULL, 3235 #endif 3236 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3237 0x180, /* 384 */ 3238 0, 3239 #endif 3240 }, 3241 { 3242 BCMI_SGMIIP2X4_SERDES_SP2_DIGITAL_CTL1000X1r, 3243 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3244 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3245 BCMI_SGMIIP2X4_SERDES_SP2_DIGITAL_CTL1000X1r_fields, 3246 #else 3247 0, 3248 #endif 3249 #endif 3250 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3251 PHYMOD_SYMBOL_FLAG_REGISTER, 3252 "SP2_DIGITAL_CTL1000X1r", 3253 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3254 "DIGITAL_CONTROL1000X1", 3255 NULL, 3256 #endif 3257 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3258 0x100, /* 256 */ 3259 0, 3260 #endif 3261 }, 3262 { 3263 BCMI_SGMIIP2X4_SERDES_SP2_DIGITAL_CTL1000X2r, 3264 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3265 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3266 BCMI_SGMIIP2X4_SERDES_SP2_DIGITAL_CTL1000X2r_fields, 3267 #else 3268 0, 3269 #endif 3270 #endif 3271 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3272 PHYMOD_SYMBOL_FLAG_REGISTER, 3273 "SP2_DIGITAL_CTL1000X2r", 3274 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3275 "DIGITAL_CONTROL1000X2", 3276 NULL, 3277 #endif 3278 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3279 0x6, /* 6 */ 3280 0, 3281 #endif 3282 }, 3283 { 3284 BCMI_SGMIIP2X4_SERDES_SP2_STS1000X1r, 3285 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3286 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3287 BCMI_SGMIIP2X4_SERDES_SP2_STS1000X1r_fields, 3288 #else 3289 0, 3290 #endif 3291 #endif 3292 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3293 PHYMOD_SYMBOL_FLAG_REGISTER, 3294 "SP2_STS1000X1r", 3295 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3296 "DIGITAL_STATUS1000X1", 3297 NULL, 3298 #endif 3299 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3300 0x0, /* 0 */ 3301 0, 3302 #endif 3303 }, 3304 { 3305 BCMI_SGMIIP2X4_SERDES_SP2_MISC1r, 3306 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3307 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3308 BCMI_SGMIIP2X4_SERDES_SP2_MISC1r_fields, 3309 #else 3310 0, 3311 #endif 3312 #endif 3313 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3314 PHYMOD_SYMBOL_FLAG_REGISTER, 3315 "SP2_MISC1r", 3316 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3317 "DIGITAL_MISC1", 3318 NULL, 3319 #endif 3320 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3321 0x6000, /* 24576 */ 3322 0, 3323 #endif 3324 }, 3325 { 3326 BCMI_SGMIIP2X4_SERDES_SP2_MISC2r, 3327 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3328 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3329 BCMI_SGMIIP2X4_SERDES_SP2_MISC2r_fields, 3330 #else 3331 0, 3332 #endif 3333 #endif 3334 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3335 PHYMOD_SYMBOL_FLAG_REGISTER, 3336 "SP2_MISC2r", 3337 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3338 "DIGITAL_MISC2", 3339 NULL, 3340 #endif 3341 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3342 0x2190, /* 8592 */ 3343 0, 3344 #endif 3345 }, 3346 { 3347 BCMI_SGMIIP2X4_SERDES_SP2_DIGITAL_BLKADDRr, 3348 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3349 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3350 BCMI_SGMIIP2X4_SERDES_SP2_DIGITAL_BLKADDRr_fields, 3351 #else 3352 0, 3353 #endif 3354 #endif 3355 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3356 PHYMOD_SYMBOL_FLAG_REGISTER, 3357 "SP2_DIGITAL_BLKADDRr", 3358 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3359 "DIGITAL_BLOCKADDRESS", 3360 NULL, 3361 #endif 3362 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3363 0x300, /* 768 */ 3364 0, 3365 #endif 3366 }, 3367 { 3368 BCMI_SGMIIP2X4_SERDES_SP2_SERDESID0r, 3369 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3370 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3371 BCMI_SGMIIP2X4_SERDES_SP2_SERDESID0r_fields, 3372 #else 3373 0, 3374 #endif 3375 #endif 3376 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3377 PHYMOD_SYMBOL_FLAG_REGISTER, 3378 "SP2_SERDESID0r", 3379 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3380 "SERDESID_SERDESID0", 3381 NULL, 3382 #endif 3383 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3384 0x2cf, /* 719 */ 3385 0, 3386 #endif 3387 }, 3388 { 3389 BCMI_SGMIIP2X4_SERDES_SP2_SERDESID1r, 3390 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3391 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3392 BCMI_SGMIIP2X4_SERDES_SP2_SERDESID1r_fields, 3393 #else 3394 0, 3395 #endif 3396 #endif 3397 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3398 PHYMOD_SYMBOL_FLAG_REGISTER, 3399 "SP2_SERDESID1r", 3400 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3401 "SERDESID_SERDESID1", 3402 NULL, 3403 #endif 3404 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3405 0x4a00, /* 18944 */ 3406 0, 3407 #endif 3408 }, 3409 { 3410 BCMI_SGMIIP2X4_SERDES_SP2_SERDESID2r, 3411 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3412 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3413 BCMI_SGMIIP2X4_SERDES_SP2_SERDESID2r_fields, 3414 #else 3415 0, 3416 #endif 3417 #endif 3418 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3419 PHYMOD_SYMBOL_FLAG_REGISTER, 3420 "SP2_SERDESID2r", 3421 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3422 "SERDESID_SERDESID2", 3423 NULL, 3424 #endif 3425 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3426 0x800f, /* 32783 */ 3427 0, 3428 #endif 3429 }, 3430 { 3431 BCMI_SGMIIP2X4_SERDES_SP2_SERDESID3r, 3432 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3433 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3434 BCMI_SGMIIP2X4_SERDES_SP2_SERDESID3r_fields, 3435 #else 3436 0, 3437 #endif 3438 #endif 3439 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3440 PHYMOD_SYMBOL_FLAG_REGISTER, 3441 "SP2_SERDESID3r", 3442 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3443 "SERDESID_SERDESID3", 3444 NULL, 3445 #endif 3446 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3447 0x1, /* 1 */ 3448 0, 3449 #endif 3450 }, 3451 { 3452 BCMI_SGMIIP2X4_SERDES_SP2_SERDESID_BLKADDRr, 3453 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3454 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3455 BCMI_SGMIIP2X4_SERDES_SP2_SERDESID_BLKADDRr_fields, 3456 #else 3457 0, 3458 #endif 3459 #endif 3460 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3461 PHYMOD_SYMBOL_FLAG_REGISTER, 3462 "SP2_SERDESID_BLKADDRr", 3463 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3464 "SERDESID_BLOCKADDRESS", 3465 NULL, 3466 #endif 3467 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3468 0x310, /* 784 */ 3469 0, 3470 #endif 3471 }, 3472 { 3473 BCMI_SGMIIP2X4_SERDES_SP2_MISC3r, 3474 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3475 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3476 BCMI_SGMIIP2X4_SERDES_SP2_MISC3r_fields, 3477 #else 3478 0, 3479 #endif 3480 #endif 3481 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3482 PHYMOD_SYMBOL_FLAG_REGISTER, 3483 "SP2_MISC3r", 3484 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3485 "DIGITAL4_MISC3", 3486 NULL, 3487 #endif 3488 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3489 0x0, /* 0 */ 3490 0, 3491 #endif 3492 }, 3493 { 3494 BCMI_SGMIIP2X4_SERDES_SP2_MISC5r, 3495 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3496 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3497 BCMI_SGMIIP2X4_SERDES_SP2_MISC5r_fields, 3498 #else 3499 0, 3500 #endif 3501 #endif 3502 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3503 PHYMOD_SYMBOL_FLAG_REGISTER, 3504 "SP2_MISC5r", 3505 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3506 "DIGITAL4_MISC5", 3507 NULL, 3508 #endif 3509 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3510 0xc000, /* 49152 */ 3511 0, 3512 #endif 3513 }, 3514 { 3515 BCMI_SGMIIP2X4_SERDES_SP2_DIGITAL4_BLKADDRr, 3516 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3517 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3518 BCMI_SGMIIP2X4_SERDES_SP2_DIGITAL4_BLKADDRr_fields, 3519 #else 3520 0, 3521 #endif 3522 #endif 3523 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3524 PHYMOD_SYMBOL_FLAG_REGISTER, 3525 "SP2_DIGITAL4_BLKADDRr", 3526 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3527 "DIGITAL4_BLOCKADDRESS", 3528 NULL, 3529 #endif 3530 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3531 0x330, /* 816 */ 3532 0, 3533 #endif 3534 }, 3535 { 3536 BCMI_SGMIIP2X4_SERDES_SP2_MISC8r, 3537 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3538 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3539 BCMI_SGMIIP2X4_SERDES_SP2_MISC8r_fields, 3540 #else 3541 0, 3542 #endif 3543 #endif 3544 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3545 PHYMOD_SYMBOL_FLAG_REGISTER, 3546 "SP2_MISC8r", 3547 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3548 "DIGITAL5_MISC8", 3549 NULL, 3550 #endif 3551 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3552 0x3, /* 3 */ 3553 0, 3554 #endif 3555 }, 3556 { 3557 BCMI_SGMIIP2X4_SERDES_SP2_DIGITAL5_BLKADDRr, 3558 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3559 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3560 BCMI_SGMIIP2X4_SERDES_SP2_DIGITAL5_BLKADDRr_fields, 3561 #else 3562 0, 3563 #endif 3564 #endif 3565 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3566 PHYMOD_SYMBOL_FLAG_REGISTER, 3567 "SP2_DIGITAL5_BLKADDRr", 3568 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3569 "DIGITAL5_BLOCKADDRESS", 3570 NULL, 3571 #endif 3572 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3573 0x340, /* 832 */ 3574 0, 3575 #endif 3576 }, 3577 { 3578 BCMI_SGMIIP2X4_SERDES_SP2_FX100_CTL1r, 3579 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3580 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3581 BCMI_SGMIIP2X4_SERDES_SP2_FX100_CTL1r_fields, 3582 #else 3583 0, 3584 #endif 3585 #endif 3586 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3587 PHYMOD_SYMBOL_FLAG_REGISTER, 3588 "SP2_FX100_CTL1r", 3589 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3590 "FX100_CONTROL1", 3591 NULL, 3592 #endif 3593 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3594 0x14a, /* 330 */ 3595 0, 3596 #endif 3597 }, 3598 { 3599 BCMI_SGMIIP2X4_SERDES_SP2_FX100_CTL3r, 3600 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3601 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3602 BCMI_SGMIIP2X4_SERDES_SP2_FX100_CTL3r_fields, 3603 #else 3604 0, 3605 #endif 3606 #endif 3607 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3608 PHYMOD_SYMBOL_FLAG_REGISTER, 3609 "SP2_FX100_CTL3r", 3610 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3611 "FX100_CONTROL3", 3612 NULL, 3613 #endif 3614 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3615 0x800, /* 2048 */ 3616 0, 3617 #endif 3618 }, 3619 { 3620 BCMI_SGMIIP2X4_SERDES_SP2_FX100_BLKADDRr, 3621 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3622 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3623 BCMI_SGMIIP2X4_SERDES_SP2_FX100_BLKADDRr_fields, 3624 #else 3625 0, 3626 #endif 3627 #endif 3628 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3629 PHYMOD_SYMBOL_FLAG_REGISTER, 3630 "SP2_FX100_BLKADDRr", 3631 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3632 "FX100_BLOCKADDRESS", 3633 NULL, 3634 #endif 3635 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3636 0x400, /* 1024 */ 3637 0, 3638 #endif 3639 }, 3640 { 3641 BCMI_SGMIIP2X4_SERDES_SP2_RX2_SEQ0r, 3642 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3643 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3644 BCMI_SGMIIP2X4_SERDES_SP2_RX2_SEQ0r_fields, 3645 #else 3646 0, 3647 #endif 3648 #endif 3649 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3650 PHYMOD_SYMBOL_FLAG_REGISTER, 3651 "SP2_RX2_SEQ0r", 3652 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3653 "RX2_RXSEQ0", 3654 NULL, 3655 #endif 3656 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3657 0x1080, /* 4224 */ 3658 0, 3659 #endif 3660 }, 3661 { 3662 BCMI_SGMIIP2X4_SERDES_SP2_RX2_SEQ1r, 3663 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3664 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3665 BCMI_SGMIIP2X4_SERDES_SP2_RX2_SEQ1r_fields, 3666 #else 3667 0, 3668 #endif 3669 #endif 3670 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3671 PHYMOD_SYMBOL_FLAG_REGISTER, 3672 "SP2_RX2_SEQ1r", 3673 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3674 "RX2_RXSEQ1", 3675 NULL, 3676 #endif 3677 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3678 0x8080, /* 32896 */ 3679 0, 3680 #endif 3681 }, 3682 { 3683 BCMI_SGMIIP2X4_SERDES_SP2_RX2_CDR0r, 3684 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3685 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3686 BCMI_SGMIIP2X4_SERDES_SP2_RX2_CDR0r_fields, 3687 #else 3688 0, 3689 #endif 3690 #endif 3691 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3692 PHYMOD_SYMBOL_FLAG_REGISTER, 3693 "SP2_RX2_CDR0r", 3694 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3695 "RX2_RXCDR0", 3696 NULL, 3697 #endif 3698 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3699 0x4006, /* 16390 */ 3700 0, 3701 #endif 3702 }, 3703 { 3704 BCMI_SGMIIP2X4_SERDES_SP2_RX2_CDR1r, 3705 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3706 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3707 BCMI_SGMIIP2X4_SERDES_SP2_RX2_CDR1r_fields, 3708 #else 3709 0, 3710 #endif 3711 #endif 3712 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3713 PHYMOD_SYMBOL_FLAG_REGISTER, 3714 "SP2_RX2_CDR1r", 3715 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3716 "RX2_RXCDR1", 3717 NULL, 3718 #endif 3719 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3720 0x1251, /* 4689 */ 3721 0, 3722 #endif 3723 }, 3724 { 3725 BCMI_SGMIIP2X4_SERDES_SP2_RX2_CDR2r, 3726 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3727 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3728 BCMI_SGMIIP2X4_SERDES_SP2_RX2_CDR2r_fields, 3729 #else 3730 0, 3731 #endif 3732 #endif 3733 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3734 PHYMOD_SYMBOL_FLAG_REGISTER, 3735 "SP2_RX2_CDR2r", 3736 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3737 "RX2_RXCDR2", 3738 NULL, 3739 #endif 3740 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3741 0x1880, /* 6272 */ 3742 0, 3743 #endif 3744 }, 3745 { 3746 BCMI_SGMIIP2X4_SERDES_SP2_RX2_CDR3r, 3747 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3748 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3749 BCMI_SGMIIP2X4_SERDES_SP2_RX2_CDR3r_fields, 3750 #else 3751 0, 3752 #endif 3753 #endif 3754 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3755 PHYMOD_SYMBOL_FLAG_REGISTER, 3756 "SP2_RX2_CDR3r", 3757 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3758 "RX2_RXCDR3", 3759 NULL, 3760 #endif 3761 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3762 0x1004, /* 4100 */ 3763 0, 3764 #endif 3765 }, 3766 { 3767 BCMI_SGMIIP2X4_SERDES_SP2_RX2_CDR4r, 3768 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3769 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3770 BCMI_SGMIIP2X4_SERDES_SP2_RX2_CDR4r_fields, 3771 #else 3772 0, 3773 #endif 3774 #endif 3775 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3776 PHYMOD_SYMBOL_FLAG_REGISTER, 3777 "SP2_RX2_CDR4r", 3778 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3779 "RX2_RXCDR4", 3780 NULL, 3781 #endif 3782 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3783 0x4840, /* 18496 */ 3784 0, 3785 #endif 3786 }, 3787 { 3788 BCMI_SGMIIP2X4_SERDES_SP2_RX2_STS0r, 3789 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3790 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3791 BCMI_SGMIIP2X4_SERDES_SP2_RX2_STS0r_fields, 3792 #else 3793 0, 3794 #endif 3795 #endif 3796 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3797 PHYMOD_SYMBOL_FLAG_REGISTER, 3798 "SP2_RX2_STS0r", 3799 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3800 "RX2_STATUS0", 3801 NULL, 3802 #endif 3803 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3804 0x0, /* 0 */ 3805 0, 3806 #endif 3807 }, 3808 { 3809 BCMI_SGMIIP2X4_SERDES_SP2_RX2_STS1r, 3810 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3811 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3812 BCMI_SGMIIP2X4_SERDES_SP2_RX2_STS1r_fields, 3813 #else 3814 0, 3815 #endif 3816 #endif 3817 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3818 PHYMOD_SYMBOL_FLAG_REGISTER, 3819 "SP2_RX2_STS1r", 3820 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3821 "RX2_STATUS1", 3822 NULL, 3823 #endif 3824 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3825 0x0, /* 0 */ 3826 0, 3827 #endif 3828 }, 3829 { 3830 BCMI_SGMIIP2X4_SERDES_SP2_RX2_STS2r, 3831 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3832 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3833 BCMI_SGMIIP2X4_SERDES_SP2_RX2_STS2r_fields, 3834 #else 3835 0, 3836 #endif 3837 #endif 3838 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3839 PHYMOD_SYMBOL_FLAG_REGISTER, 3840 "SP2_RX2_STS2r", 3841 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3842 "RX2_STATUS2", 3843 NULL, 3844 #endif 3845 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3846 0x0, /* 0 */ 3847 0, 3848 #endif 3849 }, 3850 { 3851 BCMI_SGMIIP2X4_SERDES_SP2_RX2_STS3r, 3852 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3853 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3854 BCMI_SGMIIP2X4_SERDES_SP2_RX2_STS3r_fields, 3855 #else 3856 0, 3857 #endif 3858 #endif 3859 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3860 PHYMOD_SYMBOL_FLAG_REGISTER, 3861 "SP2_RX2_STS3r", 3862 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3863 "RX2_STATUS3", 3864 NULL, 3865 #endif 3866 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3867 0x0, /* 0 */ 3868 0, 3869 #endif 3870 }, 3871 { 3872 BCMI_SGMIIP2X4_SERDES_SP2_RX2_STS4r, 3873 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3874 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3875 BCMI_SGMIIP2X4_SERDES_SP2_RX2_STS4r_fields, 3876 #else 3877 0, 3878 #endif 3879 #endif 3880 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3881 PHYMOD_SYMBOL_FLAG_REGISTER, 3882 "SP2_RX2_STS4r", 3883 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3884 "RX2_STATUS4", 3885 NULL, 3886 #endif 3887 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3888 0x0, /* 0 */ 3889 0, 3890 #endif 3891 }, 3892 { 3893 BCMI_SGMIIP2X4_SERDES_SP2_RX2_STS5r, 3894 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3895 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3896 BCMI_SGMIIP2X4_SERDES_SP2_RX2_STS5r_fields, 3897 #else 3898 0, 3899 #endif 3900 #endif 3901 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3902 PHYMOD_SYMBOL_FLAG_REGISTER, 3903 "SP2_RX2_STS5r", 3904 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3905 "RX2_STATUS5", 3906 NULL, 3907 #endif 3908 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3909 0x0, /* 0 */ 3910 0, 3911 #endif 3912 }, 3913 { 3914 BCMI_SGMIIP2X4_SERDES_SP2_RX2_STS6r, 3915 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3916 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3917 BCMI_SGMIIP2X4_SERDES_SP2_RX2_STS6r_fields, 3918 #else 3919 0, 3920 #endif 3921 #endif 3922 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3923 PHYMOD_SYMBOL_FLAG_REGISTER, 3924 "SP2_RX2_STS6r", 3925 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3926 "RX2_STATUS6", 3927 NULL, 3928 #endif 3929 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3930 0x0, /* 0 */ 3931 0, 3932 #endif 3933 }, 3934 { 3935 BCMI_SGMIIP2X4_SERDES_SP2_RX2_BLKADDRr, 3936 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3937 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3938 BCMI_SGMIIP2X4_SERDES_SP2_RX2_BLKADDRr_fields, 3939 #else 3940 0, 3941 #endif 3942 #endif 3943 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3944 PHYMOD_SYMBOL_FLAG_REGISTER, 3945 "SP2_RX2_BLKADDRr", 3946 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3947 "RX2_BLOCKADDRESS", 3948 NULL, 3949 #endif 3950 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3951 0x470, /* 1136 */ 3952 0, 3953 #endif 3954 }, 3955 { 3956 BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL0r, 3957 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3958 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3959 BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL0r_fields, 3960 #else 3961 0, 3962 #endif 3963 #endif 3964 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3965 PHYMOD_SYMBOL_FLAG_REGISTER, 3966 "SP2_RX3_CTL0r", 3967 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3968 "RX3_CONTROL0", 3969 NULL, 3970 #endif 3971 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3972 0x7801, /* 30721 */ 3973 0, 3974 #endif 3975 }, 3976 { 3977 BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL1r, 3978 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 3979 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 3980 BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL1r_fields, 3981 #else 3982 0, 3983 #endif 3984 #endif 3985 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 3986 PHYMOD_SYMBOL_FLAG_REGISTER, 3987 "SP2_RX3_CTL1r", 3988 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 3989 "RX3_CONTROL1", 3990 NULL, 3991 #endif 3992 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 3993 0xc805, /* 51205 */ 3994 0, 3995 #endif 3996 }, 3997 { 3998 BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL2r, 3999 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4000 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 4001 BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL2r_fields, 4002 #else 4003 0, 4004 #endif 4005 #endif 4006 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4007 PHYMOD_SYMBOL_FLAG_REGISTER, 4008 "SP2_RX3_CTL2r", 4009 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4010 "RX3_CONTROL2", 4011 NULL, 4012 #endif 4013 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4014 0x83f8, /* 33784 */ 4015 0, 4016 #endif 4017 }, 4018 { 4019 BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL3r, 4020 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4021 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 4022 BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL3r_fields, 4023 #else 4024 0, 4025 #endif 4026 #endif 4027 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4028 PHYMOD_SYMBOL_FLAG_REGISTER, 4029 "SP2_RX3_CTL3r", 4030 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4031 "RX3_CONTROL3", 4032 NULL, 4033 #endif 4034 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4035 0x0, /* 0 */ 4036 0, 4037 #endif 4038 }, 4039 { 4040 BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL4r, 4041 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4042 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 4043 BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL4r_fields, 4044 #else 4045 0, 4046 #endif 4047 #endif 4048 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4049 PHYMOD_SYMBOL_FLAG_REGISTER, 4050 "SP2_RX3_CTL4r", 4051 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4052 "RX3_CONTROL4", 4053 NULL, 4054 #endif 4055 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4056 0x0, /* 0 */ 4057 0, 4058 #endif 4059 }, 4060 { 4061 BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL5r, 4062 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4063 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 4064 BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL5r_fields, 4065 #else 4066 0, 4067 #endif 4068 #endif 4069 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4070 PHYMOD_SYMBOL_FLAG_REGISTER, 4071 "SP2_RX3_CTL5r", 4072 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4073 "RX3_CONTROL5", 4074 NULL, 4075 #endif 4076 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4077 0x7e, /* 126 */ 4078 0, 4079 #endif 4080 }, 4081 { 4082 BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL6r, 4083 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4084 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 4085 BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL6r_fields, 4086 #else 4087 0, 4088 #endif 4089 #endif 4090 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4091 PHYMOD_SYMBOL_FLAG_REGISTER, 4092 "SP2_RX3_CTL6r", 4093 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4094 "RX3_CONTROL6", 4095 NULL, 4096 #endif 4097 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4098 0x280, /* 640 */ 4099 0, 4100 #endif 4101 }, 4102 { 4103 BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL7r, 4104 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4105 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 4106 BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL7r_fields, 4107 #else 4108 0, 4109 #endif 4110 #endif 4111 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4112 PHYMOD_SYMBOL_FLAG_REGISTER, 4113 "SP2_RX3_CTL7r", 4114 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4115 "RX3_CONTROL7", 4116 NULL, 4117 #endif 4118 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4119 0x1000, /* 4096 */ 4120 0, 4121 #endif 4122 }, 4123 { 4124 BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL8r, 4125 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4126 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 4127 BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL8r_fields, 4128 #else 4129 0, 4130 #endif 4131 #endif 4132 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4133 PHYMOD_SYMBOL_FLAG_REGISTER, 4134 "SP2_RX3_CTL8r", 4135 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4136 "RX3_CONTROL8", 4137 NULL, 4138 #endif 4139 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4140 0x0, /* 0 */ 4141 0, 4142 #endif 4143 }, 4144 { 4145 BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL9r, 4146 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4147 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 4148 BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL9r_fields, 4149 #else 4150 0, 4151 #endif 4152 #endif 4153 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4154 PHYMOD_SYMBOL_FLAG_REGISTER, 4155 "SP2_RX3_CTL9r", 4156 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4157 "RX3_CONTROL9", 4158 NULL, 4159 #endif 4160 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4161 0x280, /* 640 */ 4162 0, 4163 #endif 4164 }, 4165 { 4166 BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL10r, 4167 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4168 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 4169 BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL10r_fields, 4170 #else 4171 0, 4172 #endif 4173 #endif 4174 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4175 PHYMOD_SYMBOL_FLAG_REGISTER, 4176 "SP2_RX3_CTL10r", 4177 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4178 "RX3_CONTROL10", 4179 NULL, 4180 #endif 4181 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4182 0x0, /* 0 */ 4183 0, 4184 #endif 4185 }, 4186 { 4187 BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL11r, 4188 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4189 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 4190 BCMI_SGMIIP2X4_SERDES_SP2_RX3_CTL11r_fields, 4191 #else 4192 0, 4193 #endif 4194 #endif 4195 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4196 PHYMOD_SYMBOL_FLAG_REGISTER, 4197 "SP2_RX3_CTL11r", 4198 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4199 "RX3_CONTROL11", 4200 NULL, 4201 #endif 4202 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4203 0x1d80, /* 7552 */ 4204 0, 4205 #endif 4206 }, 4207 { 4208 BCMI_SGMIIP2X4_SERDES_SP2_RX3_SLCRSTATr, 4209 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4210 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 4211 BCMI_SGMIIP2X4_SERDES_SP2_RX3_SLCRSTATr_fields, 4212 #else 4213 0, 4214 #endif 4215 #endif 4216 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4217 PHYMOD_SYMBOL_FLAG_REGISTER, 4218 "SP2_RX3_SLCRSTATr", 4219 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4220 "RX3_SLICERSTAT", 4221 NULL, 4222 #endif 4223 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4224 0x0, /* 0 */ 4225 0, 4226 #endif 4227 }, 4228 { 4229 BCMI_SGMIIP2X4_SERDES_SP2_RX3_BLKADDRr, 4230 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4231 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 4232 BCMI_SGMIIP2X4_SERDES_SP2_RX3_BLKADDRr_fields, 4233 #else 4234 0, 4235 #endif 4236 #endif 4237 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4238 PHYMOD_SYMBOL_FLAG_REGISTER, 4239 "SP2_RX3_BLKADDRr", 4240 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4241 "RX3_BLOCKADDRESS", 4242 NULL, 4243 #endif 4244 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4245 0x480, /* 1152 */ 4246 0, 4247 #endif 4248 }, 4249 { 4250 BCMI_SGMIIP2X4_SERDES_SP2_PRBSr, 4251 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4252 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 4253 BCMI_SGMIIP2X4_SERDES_SP2_PRBSr_fields, 4254 #else 4255 0, 4256 #endif 4257 #endif 4258 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4259 PHYMOD_SYMBOL_FLAG_REGISTER, 4260 "SP2_PRBSr", 4261 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4262 "CTRL_PRBS", 4263 NULL, 4264 #endif 4265 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4266 0x0, /* 0 */ 4267 0, 4268 #endif 4269 }, 4270 { 4271 BCMI_SGMIIP2X4_SERDES_SP2_LANECTLr, 4272 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4273 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 4274 BCMI_SGMIIP2X4_SERDES_SP2_LANECTLr_fields, 4275 #else 4276 0, 4277 #endif 4278 #endif 4279 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4280 PHYMOD_SYMBOL_FLAG_REGISTER, 4281 "SP2_LANECTLr", 4282 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4283 "CTRL_LANECTRL", 4284 NULL, 4285 #endif 4286 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4287 0xf, /* 15 */ 4288 0, 4289 #endif 4290 }, 4291 { 4292 BCMI_SGMIIP2X4_SERDES_SP2_MODE1Gr, 4293 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4294 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 4295 BCMI_SGMIIP2X4_SERDES_SP2_MODE1Gr_fields, 4296 #else 4297 0, 4298 #endif 4299 #endif 4300 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4301 PHYMOD_SYMBOL_FLAG_REGISTER, 4302 "SP2_MODE1Gr", 4303 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4304 "CTRL_MODE1G", 4305 NULL, 4306 #endif 4307 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4308 0x0, /* 0 */ 4309 0, 4310 #endif 4311 }, 4312 { 4313 BCMI_SGMIIP2X4_SERDES_SP2_PWRRSTr, 4314 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4315 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 4316 BCMI_SGMIIP2X4_SERDES_SP2_PWRRSTr_fields, 4317 #else 4318 0, 4319 #endif 4320 #endif 4321 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4322 PHYMOD_SYMBOL_FLAG_REGISTER, 4323 "SP2_PWRRSTr", 4324 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4325 "CTRL_PWRRST", 4326 NULL, 4327 #endif 4328 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4329 0x0, /* 0 */ 4330 0, 4331 #endif 4332 }, 4333 { 4334 BCMI_SGMIIP2X4_SERDES_SP2_AERr, 4335 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4336 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 4337 BCMI_SGMIIP2X4_SERDES_SP2_AERr_fields, 4338 #else 4339 0, 4340 #endif 4341 #endif 4342 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4343 PHYMOD_SYMBOL_FLAG_REGISTER, 4344 "SP2_AERr", 4345 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4346 "AERBLK_AER", 4347 NULL, 4348 #endif 4349 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4350 0x0, /* 0 */ 4351 0, 4352 #endif 4353 }, 4354 { 4355 BCMI_SGMIIP2X4_SERDES_SP2_COMBO_MIICTLr, 4356 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4357 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 4358 BCMI_SGMIIP2X4_SERDES_SP2_COMBO_MIICTLr_fields, 4359 #else 4360 0, 4361 #endif 4362 #endif 4363 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4364 PHYMOD_SYMBOL_FLAG_REGISTER, 4365 "SP2_COMBO_MIICTLr", 4366 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4367 "COMBO_IEEE0_MIICNTL", 4368 NULL, 4369 #endif 4370 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4371 0x140, /* 320 */ 4372 0, 4373 #endif 4374 }, 4375 { 4376 BCMI_SGMIIP2X4_SERDES_SP2_COMBO_MIISTATr, 4377 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4378 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 4379 BCMI_SGMIIP2X4_SERDES_SP2_COMBO_MIISTATr_fields, 4380 #else 4381 0, 4382 #endif 4383 #endif 4384 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4385 PHYMOD_SYMBOL_FLAG_REGISTER, 4386 "SP2_COMBO_MIISTATr", 4387 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4388 "COMBO_IEEE0_MIISTAT", 4389 NULL, 4390 #endif 4391 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4392 0x109, /* 265 */ 4393 0, 4394 #endif 4395 }, 4396 { 4397 BCMI_SGMIIP2X4_SERDES_SP2_COMBO_ID1r, 4398 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4399 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 4400 BCMI_SGMIIP2X4_SERDES_SP2_COMBO_ID1r_fields, 4401 #else 4402 0, 4403 #endif 4404 #endif 4405 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4406 PHYMOD_SYMBOL_FLAG_REGISTER, 4407 "SP2_COMBO_ID1r", 4408 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4409 "COMBO_IEEE0_ID1", 4410 NULL, 4411 #endif 4412 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4413 0x143, /* 323 */ 4414 0, 4415 #endif 4416 }, 4417 { 4418 BCMI_SGMIIP2X4_SERDES_SP2_COMBO_ID2r, 4419 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4420 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 4421 BCMI_SGMIIP2X4_SERDES_SP2_COMBO_ID2r_fields, 4422 #else 4423 0, 4424 #endif 4425 #endif 4426 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4427 PHYMOD_SYMBOL_FLAG_REGISTER, 4428 "SP2_COMBO_ID2r", 4429 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4430 "COMBO_IEEE0_ID2", 4431 NULL, 4432 #endif 4433 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4434 0xbff0, /* 49136 */ 4435 0, 4436 #endif 4437 }, 4438 { 4439 BCMI_SGMIIP2X4_SERDES_SP2_COMBO_AUTONEGADVr, 4440 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4441 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 4442 BCMI_SGMIIP2X4_SERDES_SP2_COMBO_AUTONEGADVr_fields, 4443 #else 4444 0, 4445 #endif 4446 #endif 4447 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4448 PHYMOD_SYMBOL_FLAG_REGISTER, 4449 "SP2_COMBO_AUTONEGADVr", 4450 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4451 "COMBO_IEEE0_AUTONEGADV", 4452 NULL, 4453 #endif 4454 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4455 0x20, /* 32 */ 4456 0, 4457 #endif 4458 }, 4459 { 4460 BCMI_SGMIIP2X4_SERDES_SP2_COMBO_AUTONEGLPABILr, 4461 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4462 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 4463 BCMI_SGMIIP2X4_SERDES_SP2_COMBO_AUTONEGLPABILr_fields, 4464 #else 4465 0, 4466 #endif 4467 #endif 4468 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4469 PHYMOD_SYMBOL_FLAG_REGISTER, 4470 "SP2_COMBO_AUTONEGLPABILr", 4471 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4472 "COMBO_IEEE0_AUTONEGLPABIL", 4473 NULL, 4474 #endif 4475 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4476 0x0, /* 0 */ 4477 0, 4478 #endif 4479 }, 4480 { 4481 BCMI_SGMIIP2X4_SERDES_SP2_COMBO_AUTONEGEXPr, 4482 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4483 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 4484 BCMI_SGMIIP2X4_SERDES_SP2_COMBO_AUTONEGEXPr_fields, 4485 #else 4486 0, 4487 #endif 4488 #endif 4489 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4490 PHYMOD_SYMBOL_FLAG_REGISTER, 4491 "SP2_COMBO_AUTONEGEXPr", 4492 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4493 "COMBO_IEEE0_AUTONEGEXP", 4494 NULL, 4495 #endif 4496 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4497 0x4, /* 4 */ 4498 0, 4499 #endif 4500 }, 4501 { 4502 BCMI_SGMIIP2X4_SERDES_SP2_COMBO_AUTONEGNPr, 4503 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4504 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 4505 BCMI_SGMIIP2X4_SERDES_SP2_COMBO_AUTONEGNPr_fields, 4506 #else 4507 0, 4508 #endif 4509 #endif 4510 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4511 PHYMOD_SYMBOL_FLAG_REGISTER, 4512 "SP2_COMBO_AUTONEGNPr", 4513 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4514 "COMBO_IEEE0_AUTONEGNP", 4515 NULL, 4516 #endif 4517 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4518 0x2001, /* 8193 */ 4519 0, 4520 #endif 4521 }, 4522 { 4523 BCMI_SGMIIP2X4_SERDES_SP2_COMBO_AUTONEGLPABIL2r, 4524 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4525 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 4526 BCMI_SGMIIP2X4_SERDES_SP2_COMBO_AUTONEGLPABIL2r_fields, 4527 #else 4528 0, 4529 #endif 4530 #endif 4531 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4532 PHYMOD_SYMBOL_FLAG_REGISTER, 4533 "SP2_COMBO_AUTONEGLPABIL2r", 4534 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4535 "COMBO_IEEE0_AUTONEGLPABIL2", 4536 NULL, 4537 #endif 4538 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4539 0x0, /* 0 */ 4540 0, 4541 #endif 4542 }, 4543 { 4544 BCMI_SGMIIP2X4_SERDES_SP2_COMBO_MMD_ACCCTLr, 4545 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4546 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 4547 BCMI_SGMIIP2X4_SERDES_SP2_COMBO_MMD_ACCCTLr_fields, 4548 #else 4549 0, 4550 #endif 4551 #endif 4552 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4553 PHYMOD_SYMBOL_FLAG_REGISTER, 4554 "SP2_COMBO_MMD_ACCCTLr", 4555 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4556 "COMBO_IEEE0_MMD_ACCESSCONTROL", 4557 NULL, 4558 #endif 4559 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4560 0x0, /* 0 */ 4561 0, 4562 #endif 4563 }, 4564 { 4565 BCMI_SGMIIP2X4_SERDES_SP2_COMBO_MMD_ACCADr, 4566 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4567 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 4568 BCMI_SGMIIP2X4_SERDES_SP2_COMBO_MMD_ACCADr_fields, 4569 #else 4570 0, 4571 #endif 4572 #endif 4573 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4574 PHYMOD_SYMBOL_FLAG_REGISTER, 4575 "SP2_COMBO_MMD_ACCADr", 4576 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4577 "COMBO_IEEE0_MMD_ACCESSAD", 4578 NULL, 4579 #endif 4580 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4581 0x0, /* 0 */ 4582 0, 4583 #endif 4584 }, 4585 { 4586 BCMI_SGMIIP2X4_SERDES_SP2_COMBO_MIIEXTSTATr, 4587 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 4588 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_SGMIIP2X4_SERDES 4589 BCMI_SGMIIP2X4_SERDES_SP2_COMBO_MIIEXTSTATr_fields, 4590 #else 4591 0, 4592 #endif 4593 #endif 4594 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 4595 PHYMOD_SYMBOL_FLAG_REGISTER, 4596 "SP2_COMBO_MIIEXTSTATr", 4597 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 4598 "COMBO_IEEE0_MIIEXTSTAT", 4599 NULL, 4600 #endif 4601 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 4602 0xc000, /* 49152 */ 4603 0, 4604 #endif 4605 }, 4606 #endif 4607 }; 4608 4609 4610 phymod_symbols_t bcmi_sgmiip2x4_serdes_symbols = 4611 { 4612 bcmi_sgmiip2x4_serdes_syms, sizeof(bcmi_sgmiip2x4_serdes_syms)/sizeof(bcmi_sgmiip2x4_serdes_syms[0]), 4613 #if PHYMOD_CONFIG_INCLUDE_FIELD_NAMES == 1 4614 bcmi_sgmiip2x4_serdes_fields 4615 #else 4616 NULL 4617 #endif 4618 /* END OF SYMBOL FILE */ 4619 }; 4620 4621 #endif /* PHYMOD_CONFIG_INCLUDE_CHIP_SYMBOLS */