bcmi_qsgmiie_serdes_sym.c (485428B)
1 /******************************************************************************* 2 * 3 * 4 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 5 * 6 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 7 * 8 * DO NOT EDIT THIS FILE! 9 * This file is auto-generated from the registers file. 10 * Edits to this file will be lost when it is regenerated. 11 * 12 * Symbol table file for the BCMI_QSGMIIE_SERDES. 13 * This symbol table is used by the Broadcom debug shell. 14 */ 15 16 17 #include <phymod/chip/bcmi_qsgmiie_serdes_defs.h> 18 #include <phymod/phymod_symbols.h> 19 20 /* No symbols will be compiled unless this is defined. */ 21 #if PHYMOD_CONFIG_INCLUDE_CHIP_SYMBOLS == 1 22 /******************************************************************************* 23 * 24 * If PHYMOD_CONFIG_INCLUDE_FIELD_INFO is 1, then symbol information 25 * necessary to encode and decode the individual fields of a register or memory 26 * will be available. 27 * 28 * Without it, only the register and memory names will be symbolically available 29 * and their values will be displayed as raw data only. 30 * 31 * Field information can be compiled out in the interest of saving code space. 32 */ 33 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 34 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 35 36 static uint32_t BCMI_QSGMIIE_SERDES_ACC_ADDR_DATAr_fields[] = 37 { 38 /* MDIO_ADDR_DATA:0:15 */ 39 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(941, 15, 0) 40 }; 41 static uint32_t BCMI_QSGMIIE_SERDES_ACC_CTLr_fields[] = 42 { 43 /* MDIO_DEVAD:0:4 */ 44 PHYMOD_SYMBOL_FIELD_ENCODE(946, 4, 0), 45 /* MDIO_FUNCTION:14:15 */ 46 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(953, 15, 14) 47 }; 48 static uint32_t BCMI_QSGMIIE_SERDES_AMS_CTL0r_fields[] = 49 { 50 /* AMS_PLL_LOWPWR_6G:0:0 */ 51 PHYMOD_SYMBOL_FIELD_ENCODE(76, 0, 0), 52 /* AMS_PLL_TXCG_VDDR_BGB:1:1 */ 53 PHYMOD_SYMBOL_FIELD_ENCODE(96, 1, 1), 54 /* AMS_PLL_IMIN_ICLKINT:2:2 */ 55 PHYMOD_SYMBOL_FIELD_ENCODE(58, 2, 2), 56 /* AMS_PLL_IMAX_ICLKINT:3:3 */ 57 PHYMOD_SYMBOL_FIELD_ENCODE(48, 3, 3), 58 /* AMS_PLL_IMODE_ICLKINT:4:4 */ 59 PHYMOD_SYMBOL_FIELD_ENCODE(68, 4, 4), 60 /* AMS_PLL_IMIN_ICKGEN:5:5 */ 61 PHYMOD_SYMBOL_FIELD_ENCODE(56, 5, 5), 62 /* AMS_PLL_IMAX_ICKGEN:6:6 */ 63 PHYMOD_SYMBOL_FIELD_ENCODE(46, 6, 6), 64 /* AMS_PLL_IMODE_ICKGEN:7:7 */ 65 PHYMOD_SYMBOL_FIELD_ENCODE(66, 7, 7), 66 /* AMS_PLL_IMIN_ICLKIDRV1:8:8 */ 67 PHYMOD_SYMBOL_FIELD_ENCODE(57, 8, 8), 68 /* AMS_PLL_IMAX_ICLKIDRV1:9:9 */ 69 PHYMOD_SYMBOL_FIELD_ENCODE(47, 9, 9), 70 /* AMS_PLL_IMODE_ICLKIDRV1:10:10 */ 71 PHYMOD_SYMBOL_FIELD_ENCODE(67, 10, 10), 72 /* AMS_PLL_CAL_OFF:11:11 */ 73 PHYMOD_SYMBOL_FIELD_ENCODE(27, 11, 11), 74 /* AMS_PLL_CAL_AUX:12:15 */ 75 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(26, 15, 12) 76 }; 77 static uint32_t BCMI_QSGMIIE_SERDES_AMS_CTL1r_fields[] = 78 { 79 /* AMS_PLL_DBLR_CTRL:0:1 */ 80 PHYMOD_SYMBOL_FIELD_ENCODE(29, 1, 0), 81 /* AMS_PLL_SPARE_18:2:2 */ 82 PHYMOD_SYMBOL_FIELD_ENCODE(88, 2, 2), 83 /* AMS_PLL_FP3_RH:3:3 */ 84 PHYMOD_SYMBOL_FIELD_ENCODE(36, 3, 3), 85 /* AMS_PLL_FP3_CTRL:4:5 */ 86 PHYMOD_SYMBOL_FIELD_ENCODE(35, 5, 4), 87 /* AMS_PLL_VCO_DIV2:6:6 */ 88 PHYMOD_SYMBOL_FIELD_ENCODE(100, 6, 6), 89 /* AMS_PLL_VCO_DIV4:7:7 */ 90 PHYMOD_SYMBOL_FIELD_ENCODE(101, 7, 7), 91 /* AMS_PLL_VCOICTRL:8:9 */ 92 PHYMOD_SYMBOL_FIELD_ENCODE(99, 9, 8), 93 /* AMS_PLL_VCO_IMAX:10:10 */ 94 PHYMOD_SYMBOL_FIELD_ENCODE(102, 10, 10), 95 /* AMS_PLL_IVCO:11:13 */ 96 PHYMOD_SYMBOL_FIELD_ENCODE(74, 13, 11), 97 /* AMS_PLL_RESET:14:14 */ 98 PHYMOD_SYMBOL_FIELD_ENCODE(86, 14, 14), 99 /* AMS_PLL_ENABLE_FTUNE:15:15 */ 100 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(31, 15, 15) 101 }; 102 static uint32_t BCMI_QSGMIIE_SERDES_AMS_CTL2r_fields[] = 103 { 104 /* AMS_PLL_EN_HRZ:0:0 */ 105 PHYMOD_SYMBOL_FIELD_ENCODE(32, 0, 0), 106 /* AMS_PLL_IQP:1:4 */ 107 PHYMOD_SYMBOL_FIELD_ENCODE(73, 4, 1), 108 /* AMS_PLL_REFL_PLL:5:5 */ 109 PHYMOD_SYMBOL_FIELD_ENCODE(85, 5, 5), 110 /* AMS_PLL_REFH_PLL:6:6 */ 111 PHYMOD_SYMBOL_FIELD_ENCODE(84, 6, 6), 112 /* AMS_PLL_IMIN_IBIAS:7:7 */ 113 PHYMOD_SYMBOL_FIELD_ENCODE(54, 7, 7), 114 /* AMS_PLL_IMODE_IBIAS:8:8 */ 115 PHYMOD_SYMBOL_FIELD_ENCODE(64, 8, 8), 116 /* AMS_PLL_IMAX_IBIAS:9:9 */ 117 PHYMOD_SYMBOL_FIELD_ENCODE(44, 9, 9), 118 /* AMS_PLL_IMIN_ICP:10:10 */ 119 PHYMOD_SYMBOL_FIELD_ENCODE(61, 10, 10), 120 /* AMS_PLL_IMODE_ICP:11:11 */ 121 PHYMOD_SYMBOL_FIELD_ENCODE(71, 11, 11), 122 /* AMS_PLL_IMAX_ICP:12:12 */ 123 PHYMOD_SYMBOL_FIELD_ENCODE(51, 12, 12), 124 /* AMS_PLL_IMIN_ICK:13:13 */ 125 PHYMOD_SYMBOL_FIELD_ENCODE(55, 13, 13), 126 /* AMS_PLL_IMODE_ICK:14:14 */ 127 PHYMOD_SYMBOL_FIELD_ENCODE(65, 14, 14), 128 /* AMS_PLL_IMAX_ICK:15:15 */ 129 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(45, 15, 15) 130 }; 131 static uint32_t BCMI_QSGMIIE_SERDES_AMS_CTL3r_fields[] = 132 { 133 /* AMS_PLL_IMIN_I10GBUF:0:0 */ 134 PHYMOD_SYMBOL_FIELD_ENCODE(53, 0, 0), 135 /* AMS_PLL_IMODE_I10GBUF:1:1 */ 136 PHYMOD_SYMBOL_FIELD_ENCODE(63, 1, 1), 137 /* AMS_PLL_IMAX_I10GBUF:2:2 */ 138 PHYMOD_SYMBOL_FIELD_ENCODE(43, 2, 2), 139 /* AMS_PLL_IMIN_ICML:3:3 */ 140 PHYMOD_SYMBOL_FIELD_ENCODE(59, 3, 3), 141 /* AMS_PLL_IMODE_ICML:4:4 */ 142 PHYMOD_SYMBOL_FIELD_ENCODE(69, 4, 4), 143 /* AMS_PLL_IMAX_ICML:5:5 */ 144 PHYMOD_SYMBOL_FIELD_ENCODE(49, 5, 5), 145 /* AMS_PLL_IMIN_ICOMP:6:6 */ 146 PHYMOD_SYMBOL_FIELD_ENCODE(60, 6, 6), 147 /* AMS_PLL_IMODE_ICOMP:7:7 */ 148 PHYMOD_SYMBOL_FIELD_ENCODE(70, 7, 7), 149 /* AMS_PLL_IMAX_ICOMP:8:8 */ 150 PHYMOD_SYMBOL_FIELD_ENCODE(50, 8, 8), 151 /* AMS_PLL_IMIN_IOP:9:9 */ 152 PHYMOD_SYMBOL_FIELD_ENCODE(62, 9, 9), 153 /* AMS_PLL_IMODE_IOP:10:10 */ 154 PHYMOD_SYMBOL_FIELD_ENCODE(72, 10, 10), 155 /* AMS_PLL_IMAX_IOP:11:11 */ 156 PHYMOD_SYMBOL_FIELD_ENCODE(52, 11, 11), 157 /* AMS_PLL_TEST_VREF:12:12 */ 158 PHYMOD_SYMBOL_FIELD_ENCODE(95, 12, 12), 159 /* AMS_PLL_TEST_VC:13:13 */ 160 PHYMOD_SYMBOL_FIELD_ENCODE(94, 13, 13), 161 /* AMS_PLL_TEST_PLL:14:14 */ 162 PHYMOD_SYMBOL_FIELD_ENCODE(91, 14, 14), 163 /* AMS_PLL_TEST_RX:15:15 */ 164 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(93, 15, 15) 165 }; 166 static uint32_t BCMI_QSGMIIE_SERDES_AMS_CTL4r_fields[] = 167 { 168 /* AMS_PLL_BGR_PTATADJ:0:3 */ 169 PHYMOD_SYMBOL_FIELD_ENCODE(25, 3, 0), 170 /* AMS_PLL_BGR_CTATADJ:4:7 */ 171 PHYMOD_SYMBOL_FIELD_ENCODE(24, 7, 4), 172 /* AMS_PLL_2RX_CLKBW:8:9 */ 173 PHYMOD_SYMBOL_FIELD_ENCODE(19, 9, 8), 174 /* AMS_PLL_COMP_VTH:10:10 */ 175 PHYMOD_SYMBOL_FIELD_ENCODE(28, 10, 10), 176 /* AMS_PLL_VDDR_BGB:11:11 */ 177 PHYMOD_SYMBOL_FIELD_ENCODE(103, 11, 11), 178 /* AMS_PLL_KVH_FORCE:12:13 */ 179 PHYMOD_SYMBOL_FIELD_ENCODE(75, 13, 12), 180 /* AMS_PLL_FORCE_KVH_BW:14:14 */ 181 PHYMOD_SYMBOL_FIELD_ENCODE(33, 14, 14), 182 /* AMS_PLL_FORCE_RESCAL:15:15 */ 183 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(34, 15, 15) 184 }; 185 static uint32_t BCMI_QSGMIIE_SERDES_AMS_CTL5r_fields[] = 186 { 187 /* AMS_PLL_MAX_TEST_PORT_AMPL:0:0 */ 188 PHYMOD_SYMBOL_FIELD_ENCODE(77, 0, 0), 189 /* AMS_PLL_BGIP:1:1 */ 190 PHYMOD_SYMBOL_FIELD_ENCODE(23, 1, 1), 191 /* AMS_PLL_BGINT:2:2 */ 192 PHYMOD_SYMBOL_FIELD_ENCODE(22, 2, 2), 193 /* AMS_PLL_VBYPASS:3:3 */ 194 PHYMOD_SYMBOL_FIELD_ENCODE(98, 3, 3), 195 /* AMS_PLL_TEST_PNP:4:5 */ 196 PHYMOD_SYMBOL_FIELD_ENCODE(92, 5, 4), 197 /* AMS_PLL_BGCALR_CTATADJ:6:10 */ 198 PHYMOD_SYMBOL_FIELD_ENCODE(20, 10, 6), 199 /* AMS_PLL_BGCALR_PTATADJ:11:15 */ 200 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(21, 15, 11) 201 }; 202 static uint32_t BCMI_QSGMIIE_SERDES_AMS_CTL6r_fields[] = 203 { 204 /* AMS_PLL_TEST_FRACN_EN:0:0 */ 205 PHYMOD_SYMBOL_FIELD_ENCODE(90, 0, 0), 206 /* AMS_PLL_PDF_SKEW_ENLARGE:1:1 */ 207 PHYMOD_SYMBOL_FIELD_ENCODE(82, 1, 1), 208 /* AMS_PLL_PDF_FD_SKEW:2:2 */ 209 PHYMOD_SYMBOL_FIELD_ENCODE(80, 2, 2), 210 /* AMS_PLL_PDF_REF_SKEW:3:3 */ 211 PHYMOD_SYMBOL_FIELD_ENCODE(81, 3, 3), 212 /* AMS_PLL_SPARE_100:4:4 */ 213 PHYMOD_SYMBOL_FIELD_ENCODE(87, 4, 4), 214 /* AMS_PLL_REFCLK_DOUBLER:5:5 */ 215 PHYMOD_SYMBOL_FIELD_ENCODE(83, 5, 5), 216 /* AMS_PLL_MIX2P1CR_CTATADJ:6:10 */ 217 PHYMOD_SYMBOL_FIELD_ENCODE(78, 10, 6), 218 /* AMS_PLL_MIX2P1CR_PTATADJ:11:15 */ 219 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(79, 15, 11) 220 }; 221 static uint32_t BCMI_QSGMIIE_SERDES_AMS_CTL7r_fields[] = 222 { 223 /* AMS_PLL_FRACN_DIV_L:0:15 */ 224 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(40, 15, 0) 225 }; 226 static uint32_t BCMI_QSGMIIE_SERDES_AMS_CTL8r_fields[] = 227 { 228 /* AMS_PLL_FRACN_DIV_H:0:1 */ 229 PHYMOD_SYMBOL_FIELD_ENCODE(39, 1, 0), 230 /* AMS_PLL_FRACN_DIVRANGE:2:2 */ 231 PHYMOD_SYMBOL_FIELD_ENCODE(38, 2, 2), 232 /* AMS_PLL_FRACN_BYPASS:3:3 */ 233 PHYMOD_SYMBOL_FIELD_ENCODE(37, 3, 3), 234 /* AMS_PLL_FRACN_NDIV_INT:4:13 */ 235 PHYMOD_SYMBOL_FIELD_ENCODE(41, 13, 4), 236 /* AMS_PLL_DITHEREN:14:14 */ 237 PHYMOD_SYMBOL_FIELD_ENCODE(30, 14, 14), 238 /* AMS_PLL_FRACN_SEL:15:15 */ 239 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(42, 15, 15) 240 }; 241 static uint32_t BCMI_QSGMIIE_SERDES_AMS_INTCTLr_fields[] = 242 { 243 /* AMS_PLL_TX_LOWPWR_6G:0:0 */ 244 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(97, 0, 0) 245 }; 246 static uint32_t BCMI_QSGMIIE_SERDES_AMS_RX_CTL0r_fields[] = 247 { 248 /* AMS_RX_SEL_DFECKDELAY:0:1 */ 249 PHYMOD_SYMBOL_FIELD_ENCODE(151, 1, 0), 250 /* AMS_RX_PHASE_INT_AMPL_CTRL:2:2 */ 251 PHYMOD_SYMBOL_FIELD_ENCODE(149, 2, 2), 252 /* AMS_RX_SIGDET_THRESHOLD:3:5 */ 253 PHYMOD_SYMBOL_FIELD_ENCODE(156, 5, 3), 254 /* AMS_RX_SIG_PWRDN:6:6 */ 255 PHYMOD_SYMBOL_FIELD_ENCODE(157, 6, 6), 256 /* AMS_RX_VGA_OUTPUT_IDLE:7:7 */ 257 PHYMOD_SYMBOL_FIELD_ENCODE(168, 7, 7), 258 /* AMS_RX_TPORT_EN:8:8 */ 259 PHYMOD_SYMBOL_FIELD_ENCODE(166, 8, 8), 260 /* AMS_RX_SIGDET_BYPASS:9:9 */ 261 PHYMOD_SYMBOL_FIELD_ENCODE(154, 9, 9), 262 /* AMS_RX_SIGDET_LOW_POWER:10:10 */ 263 PHYMOD_SYMBOL_FIELD_ENCODE(155, 10, 10), 264 /* AMS_RX_VGA_BW_EXTENSION:11:11 */ 265 PHYMOD_SYMBOL_FIELD_ENCODE(167, 11, 11), 266 /* AMS_RX_DC_COUPLE:12:12 */ 267 PHYMOD_SYMBOL_FIELD_ENCODE(104, 12, 12), 268 /* AMS_RX_EN_10GMODE:13:13 */ 269 PHYMOD_SYMBOL_FIELD_ENCODE(108, 13, 13), 270 /* AMS_RX_IMIN_COMMONMODE:14:14 */ 271 PHYMOD_SYMBOL_FIELD_ENCODE(125, 14, 14), 272 /* AMS_RX_IMOD_COMMONMODE:15:15 */ 273 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(148, 15, 15) 274 }; 275 static uint32_t BCMI_QSGMIIE_SERDES_AMS_RX_CTL1r_fields[] = 276 { 277 /* AMS_RX_IMAX_COMMONMODE:0:0 */ 278 PHYMOD_SYMBOL_FIELD_ENCODE(113, 0, 0), 279 /* AMS_RX_IMIN_PHASE_INT:1:1 */ 280 PHYMOD_SYMBOL_FIELD_ENCODE(132, 1, 1), 281 /* AMS_RX_IMODE_PHASE_INT:2:2 */ 282 PHYMOD_SYMBOL_FIELD_ENCODE(143, 2, 2), 283 /* AMS_RX_IMAX_PHASE_INT:3:3 */ 284 PHYMOD_SYMBOL_FIELD_ENCODE(120, 3, 3), 285 /* AMS_RX_IMIN_VGA:4:4 */ 286 PHYMOD_SYMBOL_FIELD_ENCODE(136, 4, 4), 287 /* AMS_RX_IMODE_VGA:5:5 */ 288 PHYMOD_SYMBOL_FIELD_ENCODE(147, 5, 5), 289 /* AMS_RX_IMAX_VGA:6:6 */ 290 PHYMOD_SYMBOL_FIELD_ENCODE(124, 6, 6), 291 /* AMS_RX_IMIN_DFE_SUMMER:7:7 */ 292 PHYMOD_SYMBOL_FIELD_ENCODE(128, 7, 7), 293 /* AMS_RX_IMODE_DFE_SUMMER:8:8 */ 294 PHYMOD_SYMBOL_FIELD_ENCODE(139, 8, 8), 295 /* AMS_RX_IMAX_DFE_SUMMER:9:9 */ 296 PHYMOD_SYMBOL_FIELD_ENCODE(116, 9, 9), 297 /* AMS_RX_IMIN_PF:10:10 */ 298 PHYMOD_SYMBOL_FIELD_ENCODE(131, 10, 10), 299 /* AMS_RX_IMODE_PF:11:11 */ 300 PHYMOD_SYMBOL_FIELD_ENCODE(142, 11, 11), 301 /* AMS_RX_IMAX_PF:12:12 */ 302 PHYMOD_SYMBOL_FIELD_ENCODE(119, 12, 12), 303 /* AMS_RX_IMIN_CTAT:13:13 */ 304 PHYMOD_SYMBOL_FIELD_ENCODE(126, 13, 13), 305 /* AMS_RX_IMODE_CTAT:14:14 */ 306 PHYMOD_SYMBOL_FIELD_ENCODE(137, 14, 14), 307 /* AMS_RX_IMAX_CTAT:15:15 */ 308 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(114, 15, 15) 309 }; 310 static uint32_t BCMI_QSGMIIE_SERDES_AMS_RX_CTL2r_fields[] = 311 { 312 /* AMS_RX_SPARE_32:0:0 */ 313 PHYMOD_SYMBOL_FIELD_ENCODE(158, 0, 0), 314 /* AMS_RX_SPARE_33:1:1 */ 315 PHYMOD_SYMBOL_FIELD_ENCODE(159, 1, 1), 316 /* AMS_RX_SPARE_34:2:2 */ 317 PHYMOD_SYMBOL_FIELD_ENCODE(160, 2, 2), 318 /* AMS_RX_IMIN_SLICER:3:3 */ 319 PHYMOD_SYMBOL_FIELD_ENCODE(135, 3, 3), 320 /* AMS_RX_IMODE_SLICER:4:4 */ 321 PHYMOD_SYMBOL_FIELD_ENCODE(146, 4, 4), 322 /* AMS_RX_IMAX_SLICER:5:5 */ 323 PHYMOD_SYMBOL_FIELD_ENCODE(123, 5, 5), 324 /* AMS_RX_IMIN_DFE_TAP_WEIGHT:6:6 */ 325 PHYMOD_SYMBOL_FIELD_ENCODE(129, 6, 6), 326 /* AMS_RX_IMODE_DFE_TAP_WEIGHT:7:7 */ 327 PHYMOD_SYMBOL_FIELD_ENCODE(140, 7, 7), 328 /* AMS_RX_IMAX_DFE_TAP_WEIGHT:8:8 */ 329 PHYMOD_SYMBOL_FIELD_ENCODE(117, 8, 8), 330 /* AMS_RX_SEL_UGBW:9:10 */ 331 PHYMOD_SYMBOL_FIELD_ENCODE(153, 10, 9), 332 /* AMS_RX_SEL_TH4DFE:11:12 */ 333 PHYMOD_SYMBOL_FIELD_ENCODE(152, 12, 11), 334 /* AMS_RX_EN_VCCTRL:13:13 */ 335 PHYMOD_SYMBOL_FIELD_ENCODE(109, 13, 13), 336 /* AMS_RX_SPARE_46:14:14 */ 337 PHYMOD_SYMBOL_FIELD_ENCODE(161, 14, 14), 338 /* AMS_RX_SPARE_47:15:15 */ 339 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(162, 15, 15) 340 }; 341 static uint32_t BCMI_QSGMIIE_SERDES_AMS_RX_CTL3r_fields[] = 342 { 343 /* AMS_RX_IMIN_DC_OFFSET_DAC:0:0 */ 344 PHYMOD_SYMBOL_FIELD_ENCODE(127, 0, 0), 345 /* AMS_RX_IMODE_DC_OFFSET_DAC:1:1 */ 346 PHYMOD_SYMBOL_FIELD_ENCODE(138, 1, 1), 347 /* AMS_RX_IMAX_DC_OFFSET_DAC:2:2 */ 348 PHYMOD_SYMBOL_FIELD_ENCODE(115, 2, 2), 349 /* AMS_RX_IMIN_PHASE_INT_P1:3:3 */ 350 PHYMOD_SYMBOL_FIELD_ENCODE(133, 3, 3), 351 /* AMS_RX_IMODE_PHASE_INT_P1:4:4 */ 352 PHYMOD_SYMBOL_FIELD_ENCODE(144, 4, 4), 353 /* AMS_RX_IMAX_PHASE_INT_P1:5:5 */ 354 PHYMOD_SYMBOL_FIELD_ENCODE(121, 5, 5), 355 /* AMS_RX_IMIN_METRES_EYEDIAG:6:6 */ 356 PHYMOD_SYMBOL_FIELD_ENCODE(130, 6, 6), 357 /* AMS_RX_IMODE_METRES_EYEDIAG:7:7 */ 358 PHYMOD_SYMBOL_FIELD_ENCODE(141, 7, 7), 359 /* AMS_RX_IMAX_METRES_EYEDIAG:8:8 */ 360 PHYMOD_SYMBOL_FIELD_ENCODE(118, 8, 8), 361 /* AMS_RX_IMIN_SIGNAL_DETECT:9:9 */ 362 PHYMOD_SYMBOL_FIELD_ENCODE(134, 9, 9), 363 /* AMS_RX_IMODE_SIGNAL_DETECT:10:10 */ 364 PHYMOD_SYMBOL_FIELD_ENCODE(145, 10, 10), 365 /* AMS_RX_IMAX_SIGNAL_DETECT:11:11 */ 366 PHYMOD_SYMBOL_FIELD_ENCODE(122, 11, 11), 367 /* AMS_RX_I4DEADZONE:12:12 */ 368 PHYMOD_SYMBOL_FIELD_ENCODE(112, 12, 12), 369 /* AMS_RX_I1P25DFE:13:13 */ 370 PHYMOD_SYMBOL_FIELD_ENCODE(111, 13, 13), 371 /* AMS_RX_SPARE_62:14:14 */ 372 PHYMOD_SYMBOL_FIELD_ENCODE(163, 14, 14), 373 /* AMS_RX_SPARE_63:15:15 */ 374 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(164, 15, 15) 375 }; 376 static uint32_t BCMI_QSGMIIE_SERDES_AMS_RX_CTL4r_fields[] = 377 { 378 /* AMS_RX_DC_OFFSET:0:6 */ 379 PHYMOD_SYMBOL_FIELD_ENCODE(105, 6, 0), 380 /* AMS_RX_FORCE_DC_OFFSET:7:7 */ 381 PHYMOD_SYMBOL_FIELD_ENCODE(110, 7, 7), 382 /* AMS_RX_DC_OFFSET_RANGE:8:8 */ 383 PHYMOD_SYMBOL_FIELD_ENCODE(106, 8, 8), 384 /* AMS_RX_VGA_RESCAL_MUX:9:11 */ 385 PHYMOD_SYMBOL_FIELD_ENCODE(169, 11, 9), 386 /* AMS_RX_PHS_INTERP_RESCAL_MUX:12:15 */ 387 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(150, 15, 12) 388 }; 389 static uint32_t BCMI_QSGMIIE_SERDES_AMS_RX_INTCTLr_fields[] = 390 { 391 /* AMS_RX_DFE_OS2X_MODE:0:0 */ 392 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(107, 0, 0) 393 }; 394 static uint32_t BCMI_QSGMIIE_SERDES_AMS_RX_STSr_fields[] = 395 { 396 /* AMS_RX_STS:0:15 */ 397 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(165, 15, 0) 398 }; 399 static uint32_t BCMI_QSGMIIE_SERDES_AMS_STSr_fields[] = 400 { 401 /* AMS_PLL_STS:0:15 */ 402 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(89, 15, 0) 403 }; 404 static uint32_t BCMI_QSGMIIE_SERDES_AMS_TX_CTL0r_fields[] = 405 { 406 /* AMS_TX_OSR4:0:0 */ 407 PHYMOD_SYMBOL_FIELD_ENCODE(182, 0, 0), 408 /* AMS_TX_SPARE_1:1:1 */ 409 PHYMOD_SYMBOL_FIELD_ENCODE(188, 1, 1), 410 /* AMS_TX_SPARE_2:2:2 */ 411 PHYMOD_SYMBOL_FIELD_ENCODE(189, 2, 2), 412 /* AMS_TX_SPARE_3:3:3 */ 413 PHYMOD_SYMBOL_FIELD_ENCODE(190, 3, 3), 414 /* AMS_TX_TEST_DATA:4:5 */ 415 PHYMOD_SYMBOL_FIELD_ENCODE(193, 5, 4), 416 /* AMS_TX_TICKSEL:6:7 */ 417 PHYMOD_SYMBOL_FIELD_ENCODE(194, 7, 6), 418 /* AMS_TX_KR_TEST_MODE:8:8 */ 419 PHYMOD_SYMBOL_FIELD_ENCODE(180, 8, 8), 420 /* AMS_TX_DCC_SEL:9:9 */ 421 PHYMOD_SYMBOL_FIELD_ENCODE(174, 9, 9), 422 /* AMS_TX_DCC_DIS:10:10 */ 423 PHYMOD_SYMBOL_FIELD_ENCODE(173, 10, 10), 424 /* AMS_TX_CAL_OFF:11:11 */ 425 PHYMOD_SYMBOL_FIELD_ENCODE(172, 11, 11), 426 /* AMS_TX_CAL_AUX:12:15 */ 427 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(171, 15, 12) 428 }; 429 static uint32_t BCMI_QSGMIIE_SERDES_AMS_TX_CTL1r_fields[] = 430 { 431 /* AMS_TX_IBIAS:0:2 */ 432 PHYMOD_SYMBOL_FIELD_ENCODE(177, 2, 0), 433 /* AMS_TX_IDCC:3:5 */ 434 PHYMOD_SYMBOL_FIELD_ENCODE(179, 5, 3), 435 /* AMS_TX_ICML:6:8 */ 436 PHYMOD_SYMBOL_FIELD_ENCODE(178, 8, 6), 437 /* AMS_TX_SPARE_30_25:9:14 */ 438 PHYMOD_SYMBOL_FIELD_ENCODE(191, 14, 9), 439 /* AMS_TX_LP_OVRD:15:15 */ 440 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(181, 15, 15) 441 }; 442 static uint32_t BCMI_QSGMIIE_SERDES_AMS_TX_CTL2r_fields[] = 443 { 444 /* AMS_TX_AMP_CTL:0:3 */ 445 PHYMOD_SYMBOL_FIELD_ENCODE(170, 3, 0), 446 /* AMS_TX_POST3_COEF:4:6 */ 447 PHYMOD_SYMBOL_FIELD_ENCODE(184, 6, 4), 448 /* AMS_TX_SIGN_POST3:7:7 */ 449 PHYMOD_SYMBOL_FIELD_ENCODE(187, 7, 7), 450 /* AMS_TX_POST2_COEF:8:11 */ 451 PHYMOD_SYMBOL_FIELD_ENCODE(183, 11, 8), 452 /* AMS_TX_SIGN_POST2:12:12 */ 453 PHYMOD_SYMBOL_FIELD_ENCODE(186, 12, 12), 454 /* AMS_TX_DRIVERMODE:13:14 */ 455 PHYMOD_SYMBOL_FIELD_ENCODE(175, 14, 13), 456 /* AMS_TX_ELEC_IDLE_AUX:15:15 */ 457 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(176, 15, 15) 458 }; 459 static uint32_t BCMI_QSGMIIE_SERDES_AMS_TX_INTCTLr_fields[] = 460 { 461 /* AMS_TX_SEL_HALFRATE:0:0 */ 462 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(185, 0, 0) 463 }; 464 static uint32_t BCMI_QSGMIIE_SERDES_AMS_TX_STSr_fields[] = 465 { 466 /* AMS_TX_STS:0:15 */ 467 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(192, 15, 0) 468 }; 469 static uint32_t BCMI_QSGMIIE_SERDES_AN_X1_BAM_SPD_PRI_11_6r_fields[] = 470 { 471 /* AN_PRIORITY_10GCX4:0:1 */ 472 PHYMOD_SYMBOL_FIELD_ENCODE(225, 1, 0), 473 /* AN_PRIORITY_10GCX1:2:3 */ 474 PHYMOD_SYMBOL_FIELD_ENCODE(223, 3, 2), 475 /* AN_PRIORITY_6GX4:4:5 */ 476 PHYMOD_SYMBOL_FIELD_ENCODE(255, 5, 4), 477 /* AN_PRIORITY_10GX4:6:7 */ 478 PHYMOD_SYMBOL_FIELD_ENCODE(229, 7, 6), 479 /* AN_PRIORITY_10GKX4:8:9 */ 480 PHYMOD_SYMBOL_FIELD_ENCODE(227, 9, 8), 481 /* AN_PRIORITY_10GKR:10:11 */ 482 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(226, 11, 10) 483 }; 484 static uint32_t BCMI_QSGMIIE_SERDES_AN_X1_BAM_SPD_PRI_17_12r_fields[] = 485 { 486 /* AN_PRIORITY_10P5GX2:0:1 */ 487 PHYMOD_SYMBOL_FIELD_ENCODE(231, 1, 0), 488 /* AN_PRIORITY_10GX2:2:3 */ 489 PHYMOD_SYMBOL_FIELD_ENCODE(228, 3, 2), 490 /* AN_PRIORITY_10GCX2:4:5 */ 491 PHYMOD_SYMBOL_FIELD_ENCODE(224, 5, 4), 492 /* AN_PRIORITY_12P7GX2:6:7 */ 493 PHYMOD_SYMBOL_FIELD_ENCODE(234, 7, 6), 494 /* AN_PRIORITY_12P5GX4:8:9 */ 495 PHYMOD_SYMBOL_FIELD_ENCODE(233, 9, 8), 496 /* AN_PRIORITY_12GX4:10:11 */ 497 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(232, 11, 10) 498 }; 499 static uint32_t BCMI_QSGMIIE_SERDES_AN_X1_BAM_SPD_PRI_23_18r_fields[] = 500 { 501 /* AN_PRIORITY_15P75GX2:0:1 */ 502 PHYMOD_SYMBOL_FIELD_ENCODE(237, 1, 0), 503 /* AN_PRIORITY_15GX4:2:3 */ 504 PHYMOD_SYMBOL_FIELD_ENCODE(236, 3, 2), 505 /* AN_PRIORITY_13GX4:4:5 */ 506 PHYMOD_SYMBOL_FIELD_ENCODE(235, 5, 4), 507 /* AN_PRIORITY_100GCR10:6:7 */ 508 PHYMOD_SYMBOL_FIELD_ENCODE(221, 7, 6), 509 /* AN_PRIORITY_40GKR4:8:9 */ 510 PHYMOD_SYMBOL_FIELD_ENCODE(252, 9, 8), 511 /* AN_PRIORITY_40GCR4:10:11 */ 512 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(251, 11, 10) 513 }; 514 static uint32_t BCMI_QSGMIIE_SERDES_AN_X1_BAM_SPD_PRI_29_24r_fields[] = 515 { 516 /* AN_PRIORITY_20GCR2:0:1 */ 517 PHYMOD_SYMBOL_FIELD_ENCODE(240, 1, 0), 518 /* AN_PRIORITY_20GCX2:2:3 */ 519 PHYMOD_SYMBOL_FIELD_ENCODE(241, 3, 2), 520 /* AN_PRIORITY_16GX4:4:5 */ 521 PHYMOD_SYMBOL_FIELD_ENCODE(238, 5, 4), 522 /* AN_PRIORITY_20GX2:6:7 */ 523 PHYMOD_SYMBOL_FIELD_ENCODE(244, 7, 6), 524 /* AN_PRIORITY_20GCX4:8:9 */ 525 PHYMOD_SYMBOL_FIELD_ENCODE(242, 9, 8), 526 /* AN_PRIORITY_20GKR2:10:11 */ 527 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(243, 11, 10) 528 }; 529 static uint32_t BCMI_QSGMIIE_SERDES_AN_X1_BAM_SPD_PRI_35_30r_fields[] = 530 { 531 /* AN_PRIORITY_25P45GX4:0:1 */ 532 PHYMOD_SYMBOL_FIELD_ENCODE(247, 1, 0), 533 /* AN_PRIORITY_21GX4:2:3 */ 534 PHYMOD_SYMBOL_FIELD_ENCODE(246, 3, 2), 535 /* AN_PRIORITY_20GX4:4:5 */ 536 PHYMOD_SYMBOL_FIELD_ENCODE(245, 5, 4), 537 /* AN_PRIORITY_40GX4:6:7 */ 538 PHYMOD_SYMBOL_FIELD_ENCODE(253, 7, 6), 539 /* AN_PRIORITY_32P7G:8:9 */ 540 PHYMOD_SYMBOL_FIELD_ENCODE(250, 9, 8), 541 /* AN_PRIORITY_31P5G:10:11 */ 542 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(249, 11, 10) 543 }; 544 static uint32_t BCMI_QSGMIIE_SERDES_AN_X1_BAM_SPD_PRI_5_0r_fields[] = 545 { 546 /* AN_PRIORITY_1000M:0:1 */ 547 PHYMOD_SYMBOL_FIELD_ENCODE(220, 1, 0), 548 /* AN_PRIORITY_100M:2:3 */ 549 PHYMOD_SYMBOL_FIELD_ENCODE(222, 3, 2), 550 /* AN_PRIORITY_10M:4:5 */ 551 PHYMOD_SYMBOL_FIELD_ENCODE(230, 5, 4), 552 /* AN_PRIORITY_5GX4:6:7 */ 553 PHYMOD_SYMBOL_FIELD_ENCODE(254, 7, 6), 554 /* AN_PRIORITY_2P5GX1:8:9 */ 555 PHYMOD_SYMBOL_FIELD_ENCODE(248, 9, 8), 556 /* AN_PRIORITY_1GKX:10:11 */ 557 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(239, 11, 10) 558 }; 559 static uint32_t BCMI_QSGMIIE_SERDES_AN_X1_CFG_CTLr_fields[] = 560 { 561 /* AN_PD_TO_CL37_RETRY_COUNT:0:7 */ 562 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(219, 7, 0) 563 }; 564 static uint32_t BCMI_QSGMIIE_SERDES_AN_X1_CL37_ACKr_fields[] = 565 { 566 /* CL37_ACK_TIMER_PERIOD:0:15 */ 567 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(425, 15, 0) 568 }; 569 static uint32_t BCMI_QSGMIIE_SERDES_AN_X1_CL37_ERRr_fields[] = 570 { 571 /* CL37_ERROR_TIMER_PERIOD:0:15 */ 572 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(432, 15, 0) 573 }; 574 static uint32_t BCMI_QSGMIIE_SERDES_AN_X1_CL37_RESTARTr_fields[] = 575 { 576 /* CL37_RESTART_TIMER_PERIOD:0:15 */ 577 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(438, 15, 0) 578 }; 579 static uint32_t BCMI_QSGMIIE_SERDES_AN_X1_CL37_SYNC_STS_FILTER_TMRr_fields[] = 580 { 581 /* CL37_SYNC_STATUS_FILTER_TIMER_PERIOD:0:15 */ 582 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(441, 15, 0) 583 }; 584 static uint32_t BCMI_QSGMIIE_SERDES_AN_X1_CL73_BRK_LNKr_fields[] = 585 { 586 /* TX_DISABLE_TIMER_PERIOD:0:15 */ 587 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1472, 15, 0) 588 }; 589 static uint32_t BCMI_QSGMIIE_SERDES_AN_X1_CL73_DME_LOCKr_fields[] = 590 { 591 /* PD_DME_LOCK_TIMER_PERIOD:0:15 */ 592 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1081, 15, 0) 593 }; 594 static uint32_t BCMI_QSGMIIE_SERDES_AN_X1_CL73_ERRr_fields[] = 595 { 596 /* CL73_ERROR_TIMER_PERIOD:0:15 */ 597 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(541, 15, 0) 598 }; 599 static uint32_t BCMI_QSGMIIE_SERDES_AN_X1_DME_PAGE_TMRr_fields[] = 600 { 601 /* CL73_PAGE_TEST_MIN_TIMER:0:6 */ 602 PHYMOD_SYMBOL_FIELD_ENCODE(548, 6, 0), 603 /* CL73_PAGE_TEST_MAX_TIMER:7:13 */ 604 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(547, 13, 7) 605 }; 606 static uint32_t BCMI_QSGMIIE_SERDES_AN_X1_IGNORE_LNK_TMRr_fields[] = 607 { 608 /* IGNORE_LINK_TIMER_PERIOD:0:15 */ 609 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(822, 15, 0) 610 }; 611 static uint32_t BCMI_QSGMIIE_SERDES_AN_X1_LNK_FAIL_INHBT_TMR_CL72r_fields[] = 612 { 613 /* LINK_FAIL_INHIBIT_TIMER_CL72_PERIOD:0:15 */ 614 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(867, 15, 0) 615 }; 616 static uint32_t BCMI_QSGMIIE_SERDES_AN_X1_LNK_FAIL_INHBT_TMR_NOT_CL72r_fields[] = 617 { 618 /* LINK_FAIL_INHIBIT_TIMER_NCL72_PERIOD:0:15 */ 619 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(868, 15, 0) 620 }; 621 static uint32_t BCMI_QSGMIIE_SERDES_AN_X1_LNK_UPr_fields[] = 622 { 623 /* CL73_LINK_UP_TIMER_PERIOD:0:15 */ 624 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(543, 15, 0) 625 }; 626 static uint32_t BCMI_QSGMIIE_SERDES_AN_X1_OUI_LWRr_fields[] = 627 { 628 /* OUI_LOWER_DATA:0:15 */ 629 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1036, 15, 0) 630 }; 631 static uint32_t BCMI_QSGMIIE_SERDES_AN_X1_OUI_UPRr_fields[] = 632 { 633 /* OUI_UPPER_DATA:0:7 */ 634 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1037, 7, 0) 635 }; 636 static uint32_t BCMI_QSGMIIE_SERDES_AN_X1_PD_SD_TMRr_fields[] = 637 { 638 /* PD_SD_TIMER_PERIOD:0:15 */ 639 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1086, 15, 0) 640 }; 641 static uint32_t BCMI_QSGMIIE_SERDES_AN_X1_PD_TO_CL37_LNK_WAIT_TMRr_fields[] = 642 { 643 /* PD_TO_CL37_LINK_WAIT_TIMER:0:15 */ 644 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1087, 15, 0) 645 }; 646 static uint32_t BCMI_QSGMIIE_SERDES_AN_X1_SGMII_CL73_TMR_TYPEr_fields[] = 647 { 648 /* SGMII_TIMER:0:15 */ 649 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1347, 15, 0) 650 }; 651 static uint32_t BCMI_QSGMIIE_SERDES_AN_X4_AN_ABIL_RESOLUTION_STSr_fields[] = 652 { 653 /* AN_HCD_SWITCH_TO_CL37:0:0 */ 654 PHYMOD_SYMBOL_FIELD_ENCODE(217, 0, 0), 655 /* AN_HCD_HIGIG2:1:1 */ 656 PHYMOD_SYMBOL_FIELD_ENCODE(214, 1, 1), 657 /* AN_HCD_CL72:2:2 */ 658 PHYMOD_SYMBOL_FIELD_ENCODE(211, 2, 2), 659 /* AN_HCD_FEC:3:3 */ 660 PHYMOD_SYMBOL_FIELD_ENCODE(213, 3, 3), 661 /* AN_HCD_SPEED:4:11 */ 662 PHYMOD_SYMBOL_FIELD_ENCODE(216, 11, 4), 663 /* AN_HCD_PAUSE:12:13 */ 664 PHYMOD_SYMBOL_FIELD_ENCODE(215, 13, 12), 665 /* AN_HCD_DUPLEX:14:14 */ 666 PHYMOD_SYMBOL_FIELD_ENCODE(212, 14, 14), 667 /* AN_ST_RESOLUTION_ERR:15:15 */ 668 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(286, 15, 15) 669 }; 670 static uint32_t BCMI_QSGMIIE_SERDES_AN_X4_AN_MISC_STSr_fields[] = 671 { 672 /* PD_HCD_KX4_OR_KX:0:0 */ 673 PHYMOD_SYMBOL_FIELD_ENCODE(1082, 0, 0), 674 /* PD_IN_PROGRESS:1:1 */ 675 PHYMOD_SYMBOL_FIELD_ENCODE(1083, 1, 1), 676 /* AN_FAIL_COUNT:2:5 */ 677 PHYMOD_SYMBOL_FIELD_ENCODE(207, 5, 2), 678 /* AN_ACTIVE:6:6 */ 679 PHYMOD_SYMBOL_FIELD_ENCODE(202, 6, 6), 680 /* PD_COMPLETED:7:7 */ 681 PHYMOD_SYMBOL_FIELD_ENCODE(1080, 7, 7), 682 /* REMOTE_FAULT_IN_BASE_PAGE:8:8 */ 683 PHYMOD_SYMBOL_FIELD_ENCODE(1203, 8, 8), 684 /* AN_RETRY_COUNT:9:14 */ 685 PHYMOD_SYMBOL_FIELD_ENCODE(256, 14, 9), 686 /* AN_COMPLETE:15:15 */ 687 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(203, 15, 15) 688 }; 689 static uint32_t BCMI_QSGMIIE_SERDES_AN_X4_AN_PAGE_DECR_STSr_fields[] = 690 { 691 /* AN_RX_ST_STATE:0:1 */ 692 PHYMOD_SYMBOL_FIELD_ENCODE(269, 1, 0), 693 /* AN_RX_ST_RUDI_INVALID:2:2 */ 694 PHYMOD_SYMBOL_FIELD_ENCODE(268, 2, 2), 695 /* AN_RX_ST_RUDI_CONFIG:3:3 */ 696 PHYMOD_SYMBOL_FIELD_ENCODE(266, 3, 3), 697 /* AN_RX_ST_RUDI_IDLE:4:4 */ 698 PHYMOD_SYMBOL_FIELD_ENCODE(267, 4, 4), 699 /* AN_RX_ST_PAGE:5:5 */ 700 PHYMOD_SYMBOL_FIELD_ENCODE(260, 5, 5), 701 /* AN_RX_ST_MV_PAIR:6:6 */ 702 PHYMOD_SYMBOL_FIELD_ENCODE(259, 6, 6), 703 /* AN_RX_ST_CLK_TRANS_MISS:7:7 */ 704 PHYMOD_SYMBOL_FIELD_ENCODE(258, 7, 7), 705 /* AN_RX_ST_PAGE_TOO_LONG:8:8 */ 706 PHYMOD_SYMBOL_FIELD_ENCODE(261, 8, 8), 707 /* AN_RX_ST_PAGE_TOO_SHORT:9:9 */ 708 PHYMOD_SYMBOL_FIELD_ENCODE(262, 9, 9), 709 /* AN_RX_ST_PULSE_TOO_LONG:10:10 */ 710 PHYMOD_SYMBOL_FIELD_ENCODE(263, 10, 10), 711 /* AN_RX_ST_PULSE_TOO_SHORT:11:11 */ 712 PHYMOD_SYMBOL_FIELD_ENCODE(265, 11, 11), 713 /* AN_RX_ST_PULSE_TOO_MODERATE:12:12 */ 714 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(264, 12, 12) 715 }; 716 static uint32_t BCMI_QSGMIIE_SERDES_AN_X4_AN_PAGE_EXCHANGEER_STSr_fields[] = 717 { 718 /* AN_ST_CONFIG_RESTART:0:0 */ 719 PHYMOD_SYMBOL_FIELD_ENCODE(278, 0, 0), 720 /* AN_ST_IDLE_DETECT:1:1 */ 721 PHYMOD_SYMBOL_FIELD_ENCODE(283, 1, 1), 722 /* AN_ST_DISABLE_LINK:2:2 */ 723 PHYMOD_SYMBOL_FIELD_ENCODE(280, 2, 2), 724 /* AN_ST_ERROR_STATE:3:3 */ 725 PHYMOD_SYMBOL_FIELD_ENCODE(281, 3, 3), 726 /* AN_ST_AN_ENABLE:4:4 */ 727 PHYMOD_SYMBOL_FIELD_ENCODE(272, 4, 4), 728 /* AN_ST_ABILITY_DETECT:5:5 */ 729 PHYMOD_SYMBOL_FIELD_ENCODE(270, 5, 5), 730 /* AN_ST_ACK_DETECT:6:6 */ 731 PHYMOD_SYMBOL_FIELD_ENCODE(271, 6, 6), 732 /* AN_ST_COMPLETE_ACK:7:7 */ 733 PHYMOD_SYMBOL_FIELD_ENCODE(276, 7, 7), 734 /* AN_ST_CONSISTENCY_MISMATCH:8:8 */ 735 PHYMOD_SYMBOL_FIELD_ENCODE(279, 8, 8), 736 /* AN_ST_CONFIG_NONZERO:9:9 */ 737 PHYMOD_SYMBOL_FIELD_ENCODE(277, 9, 9), 738 /* AN_ST_RESTART:10:10 */ 739 PHYMOD_SYMBOL_FIELD_ENCODE(287, 10, 10), 740 /* AN_ST_AN_GOOD_CHECK:11:11 */ 741 PHYMOD_SYMBOL_FIELD_ENCODE(273, 11, 11), 742 /* AN_ST_LINK_OK:12:12 */ 743 PHYMOD_SYMBOL_FIELD_ENCODE(284, 12, 12), 744 /* AN_ST_NEXT_PAGE_WAIT:13:13 */ 745 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(285, 13, 13) 746 }; 747 static uint32_t BCMI_QSGMIIE_SERDES_AN_X4_AN_PAGE_SEQUENCER_STSr_fields[] = 748 { 749 /* AN_ST_CL73_COMPLETE:0:0 */ 750 PHYMOD_SYMBOL_FIELD_ENCODE(275, 0, 0), 751 /* AN_ST_CL37_COMPLETE:1:1 */ 752 PHYMOD_SYMBOL_FIELD_ENCODE(274, 1, 1), 753 /* AN_ST_RX_NP_TOGGLE_ERR:2:2 */ 754 PHYMOD_SYMBOL_FIELD_ENCODE(295, 2, 2), 755 /* AN_ST_RX_INVALID_SEQ:3:3 */ 756 PHYMOD_SYMBOL_FIELD_ENCODE(289, 3, 3), 757 /* AN_ST_RX_UP_OUI_MATCH:4:4 */ 758 PHYMOD_SYMBOL_FIELD_ENCODE(298, 4, 4), 759 /* AN_ST_RX_UP_OUI_MISMATCH:5:5 */ 760 PHYMOD_SYMBOL_FIELD_ENCODE(299, 5, 5), 761 /* AN_ST_RX_UP_3:6:6 */ 762 PHYMOD_SYMBOL_FIELD_ENCODE(297, 6, 6), 763 /* AN_ST_RX_MP_MISMATCH:7:7 */ 764 PHYMOD_SYMBOL_FIELD_ENCODE(290, 7, 7), 765 /* AN_ST_RX_MP_OVER1G:8:8 */ 766 PHYMOD_SYMBOL_FIELD_ENCODE(293, 8, 8), 767 /* AN_ST_RX_MP_OUI:9:9 */ 768 PHYMOD_SYMBOL_FIELD_ENCODE(292, 9, 9), 769 /* AN_ST_RX_MP_NULL:10:10 */ 770 PHYMOD_SYMBOL_FIELD_ENCODE(291, 10, 10), 771 /* AN_ST_RX_NP:11:11 */ 772 PHYMOD_SYMBOL_FIELD_ENCODE(294, 11, 11), 773 /* AN_ST_RX_BP:12:12 */ 774 PHYMOD_SYMBOL_FIELD_ENCODE(288, 12, 12), 775 /* AN_ST_RX_SGMII_MISMATCH:13:13 */ 776 PHYMOD_SYMBOL_FIELD_ENCODE(296, 13, 13), 777 /* AN_ST_HP_MODE:14:14 */ 778 PHYMOD_SYMBOL_FIELD_ENCODE(282, 14, 14), 779 /* AN_ST_SGMII_MODE:15:15 */ 780 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(300, 15, 15) 781 }; 782 static uint32_t BCMI_QSGMIIE_SERDES_AN_X4_AN_SEQ_UNEXPECTED_PAGEr_fields[] = 783 { 784 /* SEQ_UNEXPECTED_PAGE:0:15 */ 785 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1337, 15, 0) 786 }; 787 static uint32_t BCMI_QSGMIIE_SERDES_AN_X4_CTLSr_fields[] = 788 { 789 /* PD_KX4_EN:0:0 */ 790 PHYMOD_SYMBOL_FIELD_ENCODE(1084, 0, 0), 791 /* PD_KX_EN:1:1 */ 792 PHYMOD_SYMBOL_FIELD_ENCODE(1085, 1, 1), 793 /* AN_GOOD_TRAP:2:2 */ 794 PHYMOD_SYMBOL_FIELD_ENCODE(210, 2, 2), 795 /* AN_GOOD_CHECK_TRAP:3:3 */ 796 PHYMOD_SYMBOL_FIELD_ENCODE(209, 3, 3), 797 /* LINKFAILTIMER_DIS:4:4 */ 798 PHYMOD_SYMBOL_FIELD_ENCODE(864, 4, 4), 799 /* LINKFAILTIMERQUAL_EN:5:5 */ 800 PHYMOD_SYMBOL_FIELD_ENCODE(863, 5, 5), 801 /* AN_FAIL_COUNT_LIMIT:6:9 */ 802 PHYMOD_SYMBOL_FIELD_ENCODE(208, 9, 6), 803 /* OUI_CONTROL:10:15 */ 804 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1035, 15, 10) 805 }; 806 static uint32_t BCMI_QSGMIIE_SERDES_AN_X4_ENSr_fields[] = 807 { 808 /* CL73_AN_RESTART:0:0 */ 809 PHYMOD_SYMBOL_FIELD_ENCODE(536, 0, 0), 810 /* CL37_AN_RESTART:1:1 */ 811 PHYMOD_SYMBOL_FIELD_ENCODE(426, 1, 1), 812 /* HPAM_TO_CL73_AUTO_ENABLE:2:2 */ 813 PHYMOD_SYMBOL_FIELD_ENCODE(814, 2, 2), 814 /* CL73_BAM_TO_HPAM_AUTO_ENABLE:3:3 */ 815 PHYMOD_SYMBOL_FIELD_ENCODE(539, 3, 3), 816 /* SGMII_TO_CL37_AUTO_ENABLE:4:4 */ 817 PHYMOD_SYMBOL_FIELD_ENCODE(1348, 4, 4), 818 /* CL37_BAM_TO_SGMII_AUTO_ENABLE:5:5 */ 819 PHYMOD_SYMBOL_FIELD_ENCODE(430, 5, 5), 820 /* CL37_ENABLE:6:6 */ 821 PHYMOD_SYMBOL_FIELD_ENCODE(431, 6, 6), 822 /* CL37_SGMII_ENABLE:7:7 */ 823 PHYMOD_SYMBOL_FIELD_ENCODE(439, 7, 7), 824 /* CL73_ENABLE:8:8 */ 825 PHYMOD_SYMBOL_FIELD_ENCODE(540, 8, 8), 826 /* CL73_HPAM_ENABLE:9:9 */ 827 PHYMOD_SYMBOL_FIELD_ENCODE(542, 9, 9), 828 /* CL73_BAM_ENABLE:10:10 */ 829 PHYMOD_SYMBOL_FIELD_ENCODE(538, 10, 10), 830 /* CL37_BAM_ENABLE:11:11 */ 831 PHYMOD_SYMBOL_FIELD_ENCODE(429, 11, 11), 832 /* NUM_ADVERTISED_LANES:12:13 */ 833 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1021, 13, 12) 834 }; 835 static uint32_t BCMI_QSGMIIE_SERDES_AN_X4_LD_CTLr_fields[] = 836 { 837 /* SW_HCD:0:0 */ 838 PHYMOD_SYMBOL_FIELD_ENCODE(1380, 0, 0), 839 /* SW_AN:1:1 */ 840 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1379, 1, 1) 841 }; 842 static uint32_t BCMI_QSGMIIE_SERDES_AN_X4_LD_PAGE0r_fields[] = 843 { 844 /* LD_PAGE_0_PAGE_DATA:0:15 */ 845 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(859, 15, 0) 846 }; 847 static uint32_t BCMI_QSGMIIE_SERDES_AN_X4_LD_PAGE1r_fields[] = 848 { 849 /* LD_PAGE_1_PAGE_DATA:0:15 */ 850 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(860, 15, 0) 851 }; 852 static uint32_t BCMI_QSGMIIE_SERDES_AN_X4_LD_PAGE2r_fields[] = 853 { 854 /* LD_PAGE_2_PAGE_DATA:0:15 */ 855 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(861, 15, 0) 856 }; 857 static uint32_t BCMI_QSGMIIE_SERDES_AN_X4_LOC_DEV_CL37_BAM_ABILr_fields[] = 858 { 859 /* OVER1G_PAGE_COUNT:0:1 */ 860 PHYMOD_SYMBOL_FIELD_ENCODE(1039, 1, 0), 861 /* OVER1G_ABILITY:2:2 */ 862 PHYMOD_SYMBOL_FIELD_ENCODE(1038, 2, 2), 863 /* CL37_BAM_CODE:3:11 */ 864 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(428, 11, 3) 865 }; 866 static uint32_t BCMI_QSGMIIE_SERDES_AN_X4_LOC_DEV_CL37_BASE_ABILr_fields[] = 867 { 868 /* SGMII_SPEED:0:1 */ 869 PHYMOD_SYMBOL_FIELD_ENCODE(1346, 1, 0), 870 /* SGMII_FULL_DUPLEX:2:2 */ 871 PHYMOD_SYMBOL_FIELD_ENCODE(1341, 2, 2), 872 /* CL37_FULL_DUPLEX:4:4 */ 873 PHYMOD_SYMBOL_FIELD_ENCODE(433, 4, 4), 874 /* CL37_HALF_DUPLEX:5:5 */ 875 PHYMOD_SYMBOL_FIELD_ENCODE(434, 5, 5), 876 /* CL37_PAUSE:6:7 */ 877 PHYMOD_SYMBOL_FIELD_ENCODE(437, 7, 6), 878 /* CL37_NEXT_PAGE:8:8 */ 879 PHYMOD_SYMBOL_FIELD_ENCODE(436, 8, 8), 880 /* SGMII_MASTER_MODE:9:9 */ 881 PHYMOD_SYMBOL_FIELD_ENCODE(1342, 9, 9), 882 /* AN_PD_TO_CL37_ENABLE:10:10 */ 883 PHYMOD_SYMBOL_FIELD_ENCODE(218, 10, 10), 884 /* CL37_AN_RESTART_RESET_DISABLE:11:11 */ 885 PHYMOD_SYMBOL_FIELD_ENCODE(427, 11, 11), 886 /* CL37_SW_RESTART_RESET_DISABLE:12:12 */ 887 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(440, 12, 12) 888 }; 889 static uint32_t BCMI_QSGMIIE_SERDES_AN_X4_LOC_DEV_CL73_BAM_ABILr_fields[] = 890 { 891 /* BAM_20GBASE_KR2:0:0 */ 892 PHYMOD_SYMBOL_FIELD_ENCODE(329, 0, 0), 893 /* BAM_20GBASE_CR2:1:1 */ 894 PHYMOD_SYMBOL_FIELD_ENCODE(328, 1, 1), 895 /* CL73_BAM_CODE:2:10 */ 896 PHYMOD_SYMBOL_FIELD_ENCODE(537, 10, 2), 897 /* HPAM_20GKR2:11:11 */ 898 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(813, 11, 11) 899 }; 900 static uint32_t BCMI_QSGMIIE_SERDES_AN_X4_LOC_DEV_CL73_BASE_ABIL0r_fields[] = 901 { 902 /* BASE_100GBASE_CR10:0:0 */ 903 PHYMOD_SYMBOL_FIELD_ENCODE(343, 0, 0), 904 /* BASE_40GBASE_CR4:1:1 */ 905 PHYMOD_SYMBOL_FIELD_ENCODE(346, 1, 1), 906 /* BASE_40GBASE_KR4:2:2 */ 907 PHYMOD_SYMBOL_FIELD_ENCODE(347, 2, 2), 908 /* BASE_10GBASE_KR:3:3 */ 909 PHYMOD_SYMBOL_FIELD_ENCODE(344, 3, 3), 910 /* BASE_10GBASE_KX4:4:4 */ 911 PHYMOD_SYMBOL_FIELD_ENCODE(345, 4, 4), 912 /* BASE_1000BASE_KX:5:5 */ 913 PHYMOD_SYMBOL_FIELD_ENCODE(342, 5, 5), 914 /* CL73_PAUSE:6:7 */ 915 PHYMOD_SYMBOL_FIELD_ENCODE(549, 7, 6), 916 /* FEC:8:9 */ 917 PHYMOD_SYMBOL_FIELD_ENCODE(773, 9, 8), 918 /* NEXT_PAGE:10:10 */ 919 PHYMOD_SYMBOL_FIELD_ENCODE(1019, 10, 10), 920 /* CL73_REMOTE_FAULT:11:11 */ 921 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(550, 11, 11) 922 }; 923 static uint32_t BCMI_QSGMIIE_SERDES_AN_X4_LOC_DEV_CL73_BASE_ABIL1r_fields[] = 924 { 925 /* BASE_SELECTOR:0:4 */ 926 PHYMOD_SYMBOL_FIELD_ENCODE(348, 4, 0), 927 /* TRANSMIT_NONCE:5:9 */ 928 PHYMOD_SYMBOL_FIELD_ENCODE(1410, 9, 5), 929 /* CL73_NONCE_MATCH_VAL:10:10 */ 930 PHYMOD_SYMBOL_FIELD_ENCODE(546, 10, 10), 931 /* CL73_NONCE_MATCH_OVER:11:11 */ 932 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(545, 11, 11) 933 }; 934 static uint32_t BCMI_QSGMIIE_SERDES_AN_X4_LOC_DEV_OVER1G_ABIL0r_fields[] = 935 { 936 /* BAM_2P5GBASE_X:0:0 */ 937 PHYMOD_SYMBOL_FIELD_ENCODE(336, 0, 0), 938 /* BAM_5GBASE_X4:1:1 */ 939 PHYMOD_SYMBOL_FIELD_ENCODE(340, 1, 1), 940 /* BAM_6GBASE_X4:2:2 */ 941 PHYMOD_SYMBOL_FIELD_ENCODE(341, 2, 2), 942 /* BAM_10GBASE_X4:3:3 */ 943 PHYMOD_SYMBOL_FIELD_ENCODE(318, 3, 3), 944 /* BAM_10GBASE_X4_CX4:4:4 */ 945 PHYMOD_SYMBOL_FIELD_ENCODE(319, 4, 4), 946 /* BAM_10GBASE_X2:5:5 */ 947 PHYMOD_SYMBOL_FIELD_ENCODE(316, 5, 5), 948 /* BAM_10GBASE_X2_CX4:6:6 */ 949 PHYMOD_SYMBOL_FIELD_ENCODE(317, 6, 6), 950 /* BAM_10P5GBASE_X2:7:7 */ 951 PHYMOD_SYMBOL_FIELD_ENCODE(320, 7, 7), 952 /* BAM_12GBASE_X4:8:8 */ 953 PHYMOD_SYMBOL_FIELD_ENCODE(321, 8, 8), 954 /* BAM_12P5GBASE_X4:9:9 */ 955 PHYMOD_SYMBOL_FIELD_ENCODE(322, 9, 9), 956 /* BAM_12P7GBASE_X2:10:10 */ 957 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(323, 10, 10) 958 }; 959 static uint32_t BCMI_QSGMIIE_SERDES_AN_X4_LOC_DEV_OVER1G_ABIL1r_fields[] = 960 { 961 /* BAM_13GBASE_X4:0:0 */ 962 PHYMOD_SYMBOL_FIELD_ENCODE(324, 0, 0), 963 /* BAM_15GBASE_X4:1:1 */ 964 PHYMOD_SYMBOL_FIELD_ENCODE(325, 1, 1), 965 /* BAM_15P75GBASE_X2:2:2 */ 966 PHYMOD_SYMBOL_FIELD_ENCODE(326, 2, 2), 967 /* BAM_16GBASE_X4:3:3 */ 968 PHYMOD_SYMBOL_FIELD_ENCODE(327, 3, 3), 969 /* BAM_20GBASE_X4_CX4:4:4 */ 970 PHYMOD_SYMBOL_FIELD_ENCODE(333, 4, 4), 971 /* BAM_20GBASE_X4:5:5 */ 972 PHYMOD_SYMBOL_FIELD_ENCODE(332, 5, 5), 973 /* BAM_20GBASE_X2:6:6 */ 974 PHYMOD_SYMBOL_FIELD_ENCODE(330, 6, 6), 975 /* BAM_20GBASE_X2_CX4:7:7 */ 976 PHYMOD_SYMBOL_FIELD_ENCODE(331, 7, 7), 977 /* BAM_21GBASE_X4:8:8 */ 978 PHYMOD_SYMBOL_FIELD_ENCODE(334, 8, 8), 979 /* BAM_25P455GBASE_X4:9:9 */ 980 PHYMOD_SYMBOL_FIELD_ENCODE(335, 9, 9), 981 /* BAM_31P5GBASE_X4:10:10 */ 982 PHYMOD_SYMBOL_FIELD_ENCODE(337, 10, 10), 983 /* BAM_32P7GBASE_X4:11:11 */ 984 PHYMOD_SYMBOL_FIELD_ENCODE(338, 11, 11), 985 /* BAM_40GBASE_X4:12:12 */ 986 PHYMOD_SYMBOL_FIELD_ENCODE(339, 12, 12), 987 /* CL72:13:13 */ 988 PHYMOD_SYMBOL_FIELD_ENCODE(487, 13, 13), 989 /* FEC:14:14 */ 990 PHYMOD_SYMBOL_FIELD_ENCODE(773, 14, 14), 991 /* HG2:15:15 */ 992 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(804, 15, 15) 993 }; 994 static uint32_t BCMI_QSGMIIE_SERDES_AN_X4_LP_BASE_PAGE1r_fields[] = 995 { 996 /* LP_BASE_PAGE1_PAGE_DATA:0:15 */ 997 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(911, 15, 0) 998 }; 999 static uint32_t BCMI_QSGMIIE_SERDES_AN_X4_LP_BASE_PAGE2r_fields[] = 1000 { 1001 /* LP_BASE_PAGE2_PAGE_DATA:0:15 */ 1002 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(912, 15, 0) 1003 }; 1004 static uint32_t BCMI_QSGMIIE_SERDES_AN_X4_LP_BASE_PAGE3r_fields[] = 1005 { 1006 /* LP_BASE_PAGE3_PAGE_DATA:0:15 */ 1007 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(913, 15, 0) 1008 }; 1009 static uint32_t BCMI_QSGMIIE_SERDES_AN_X4_LP_MP1024_UP1r_fields[] = 1010 { 1011 /* LP_MP1024_UP1_PAGE_DATA:0:15 */ 1012 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(914, 15, 0) 1013 }; 1014 static uint32_t BCMI_QSGMIIE_SERDES_AN_X4_LP_MP1024_UP2r_fields[] = 1015 { 1016 /* LP_MP1024_UP2_PAGE_DATA:0:15 */ 1017 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(915, 15, 0) 1018 }; 1019 static uint32_t BCMI_QSGMIIE_SERDES_AN_X4_LP_MP1024_UP3r_fields[] = 1020 { 1021 /* LP_MP1024_UP3_PAGE_DATA:0:15 */ 1022 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(916, 15, 0) 1023 }; 1024 static uint32_t BCMI_QSGMIIE_SERDES_AN_X4_LP_MP1024_UP4r_fields[] = 1025 { 1026 /* LP_MP1024_UP4_PAGE_DATA:0:15 */ 1027 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(917, 15, 0) 1028 }; 1029 static uint32_t BCMI_QSGMIIE_SERDES_AN_X4_LP_MP5_UP1r_fields[] = 1030 { 1031 /* LP_MP5_UP1_PAGE_DATA:0:15 */ 1032 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(918, 15, 0) 1033 }; 1034 static uint32_t BCMI_QSGMIIE_SERDES_AN_X4_LP_MP5_UP2r_fields[] = 1035 { 1036 /* LP_MP5_UP2_PAGE_DATA:0:15 */ 1037 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(919, 15, 0) 1038 }; 1039 static uint32_t BCMI_QSGMIIE_SERDES_AN_X4_LP_MP5_UP3r_fields[] = 1040 { 1041 /* LP_MP5_UP3_PAGE_DATA:0:15 */ 1042 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(920, 15, 0) 1043 }; 1044 static uint32_t BCMI_QSGMIIE_SERDES_AN_X4_LP_MP5_UP4r_fields[] = 1045 { 1046 /* LP_MP5_UP4_PAGE_DATA:0:15 */ 1047 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(921, 15, 0) 1048 }; 1049 static uint32_t BCMI_QSGMIIE_SERDES_AN_X4_LP_PAGE0r_fields[] = 1050 { 1051 /* LP_PAGE_0_PAGE_DATA:0:15 */ 1052 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(922, 15, 0) 1053 }; 1054 static uint32_t BCMI_QSGMIIE_SERDES_AN_X4_LP_PAGE1r_fields[] = 1055 { 1056 /* LP_PAGE_1_PAGE_DATA:0:15 */ 1057 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(923, 15, 0) 1058 }; 1059 static uint32_t BCMI_QSGMIIE_SERDES_AN_X4_LP_PAGE2r_fields[] = 1060 { 1061 /* LP_PAGE_2_PAGE_DATA:0:15 */ 1062 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(924, 15, 0) 1063 }; 1064 static uint32_t BCMI_QSGMIIE_SERDES_AN_X4_SW_CTL_STSr_fields[] = 1065 { 1066 /* TLA_LN_SEQUENCER_FSM_STATUS1:0:7 */ 1067 PHYMOD_SYMBOL_FIELD_ENCODE(1409, 7, 0), 1068 /* PD_CL37_COMPLETED:8:8 */ 1069 PHYMOD_SYMBOL_FIELD_ENCODE(1079, 8, 8), 1070 /* LP_STATUS_VALID:13:13 */ 1071 PHYMOD_SYMBOL_FIELD_ENCODE(925, 13, 13), 1072 /* LD_CONTROL_VALID:14:14 */ 1073 PHYMOD_SYMBOL_FIELD_ENCODE(858, 14, 14), 1074 /* AN_COMPLETED_SW:15:15 */ 1075 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(204, 15, 15) 1076 }; 1077 static uint32_t BCMI_QSGMIIE_SERDES_AN_X4_TLA_SEQUENCER_STSr_fields[] = 1078 { 1079 /* TLA_LN_SEQUENCER_FSM_STATUS:0:15 */ 1080 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1408, 15, 0) 1081 }; 1082 static uint32_t BCMI_QSGMIIE_SERDES_CKRST_CLK_N_RST_DBG_CTLr_fields[] = 1083 { 1084 /* LN_RX_S_CLKGATE_FRC_ON:0:0 */ 1085 PHYMOD_SYMBOL_FIELD_ENCODE(880, 0, 0), 1086 /* LN_RX_S_COMCLK_SEL:1:1 */ 1087 PHYMOD_SYMBOL_FIELD_ENCODE(882, 1, 1), 1088 /* LN_RX_S_COMCLK_FRC_ON:2:2 */ 1089 PHYMOD_SYMBOL_FIELD_ENCODE(881, 2, 2), 1090 /* PMD_RX_CLK_VLD_FRC:3:3 */ 1091 PHYMOD_SYMBOL_FIELD_ENCODE(1142, 3, 3), 1092 /* PMD_RX_CLK_VLD_FRC_VAL:4:4 */ 1093 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1143, 4, 4) 1094 }; 1095 static uint32_t BCMI_QSGMIIE_SERDES_CKRST_LN_AFE_RST_PWRDWN_CTL_CTLr_fields[] = 1096 { 1097 /* AFE_RX_PWRDN_FRC:0:0 */ 1098 PHYMOD_SYMBOL_FIELD_ENCODE(2, 0, 0), 1099 /* AFE_RX_PWRDN_FRC_VAL:1:1 */ 1100 PHYMOD_SYMBOL_FIELD_ENCODE(3, 1, 1), 1101 /* AFE_RX_RESET_FRC:2:2 */ 1102 PHYMOD_SYMBOL_FIELD_ENCODE(4, 2, 2), 1103 /* AFE_RX_RESET_FRC_VAL:3:3 */ 1104 PHYMOD_SYMBOL_FIELD_ENCODE(5, 3, 3), 1105 /* AFE_TX_PWRDN_FRC:4:4 */ 1106 PHYMOD_SYMBOL_FIELD_ENCODE(12, 4, 4), 1107 /* AFE_TX_PWRDN_FRC_VAL:5:5 */ 1108 PHYMOD_SYMBOL_FIELD_ENCODE(13, 5, 5), 1109 /* AFE_TX_RESET_FRC:6:6 */ 1110 PHYMOD_SYMBOL_FIELD_ENCODE(14, 6, 6), 1111 /* AFE_TX_RESET_FRC_VAL:7:7 */ 1112 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(15, 7, 7) 1113 }; 1114 static uint32_t BCMI_QSGMIIE_SERDES_CKRST_LN_CLK_RST_N_PWRDWN_CTLr_fields[] = 1115 { 1116 /* LN_DP_S_RSTB:1:1 */ 1117 PHYMOD_SYMBOL_FIELD_ENCODE(876, 1, 1), 1118 /* LN_RX_S_PWRDN:2:2 */ 1119 PHYMOD_SYMBOL_FIELD_ENCODE(883, 2, 2), 1120 /* LN_TX_S_PWRDN:3:3 */ 1121 PHYMOD_SYMBOL_FIELD_ENCODE(888, 3, 3), 1122 /* AFE_SIGDET_PWRDN:4:4 */ 1123 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(6, 4, 4) 1124 }; 1125 static uint32_t BCMI_QSGMIIE_SERDES_CKRST_LN_DBG_RST_CTLr_fields[] = 1126 { 1127 /* LN_RX_S_RSTB:0:0 */ 1128 PHYMOD_SYMBOL_FIELD_ENCODE(884, 0, 0), 1129 /* LN_RX_DP_S_RSTB:1:1 */ 1130 PHYMOD_SYMBOL_FIELD_ENCODE(878, 1, 1), 1131 /* SIGDET_DP_RSTB_EN:2:2 */ 1132 PHYMOD_SYMBOL_FIELD_ENCODE(1350, 2, 2), 1133 /* LN_TX_S_RSTB:8:8 */ 1134 PHYMOD_SYMBOL_FIELD_ENCODE(889, 8, 8), 1135 /* LN_TX_DP_S_RSTB:9:9 */ 1136 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(886, 9, 9) 1137 }; 1138 static uint32_t BCMI_QSGMIIE_SERDES_CKRST_LN_DP_RST_ST_STSr_fields[] = 1139 { 1140 /* LANE_DP_RESET_STATE:0:2 */ 1141 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(849, 2, 0) 1142 }; 1143 static uint32_t BCMI_QSGMIIE_SERDES_CKRST_LN_MCST_MASK_CTLr_fields[] = 1144 { 1145 /* LANE_MULTICAST_MASK_CONTROL:0:0 */ 1146 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(852, 0, 0) 1147 }; 1148 static uint32_t BCMI_QSGMIIE_SERDES_CKRST_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields[] = 1149 { 1150 /* PMD_LN_H_RSTB_PKILL:0:0 */ 1151 PHYMOD_SYMBOL_FIELD_ENCODE(1136, 0, 0), 1152 /* PMD_LN_DP_H_RSTB_PKILL:1:1 */ 1153 PHYMOD_SYMBOL_FIELD_ENCODE(1135, 1, 1), 1154 /* PMD_LN_RX_H_PWRDN_PKILL:2:2 */ 1155 PHYMOD_SYMBOL_FIELD_ENCODE(1137, 2, 2), 1156 /* PMD_LN_TX_H_PWRDN_PKILL:3:3 */ 1157 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1138, 3, 3) 1158 }; 1159 static uint32_t BCMI_QSGMIIE_SERDES_CKRST_LN_RST_OCC_CTLr_fields[] = 1160 { 1161 /* LANE_REG_RESET_OCCURRED:0:0 */ 1162 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(853, 0, 0) 1163 }; 1164 static uint32_t BCMI_QSGMIIE_SERDES_CKRST_LN_S_RSTB_CTLr_fields[] = 1165 { 1166 /* LN_S_RSTB:0:0 */ 1167 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(885, 0, 0) 1168 }; 1169 static uint32_t BCMI_QSGMIIE_SERDES_CKRST_OSR_MODE_CTLr_fields[] = 1170 { 1171 /* OSR_MODE_FRC_VAL:0:3 */ 1172 PHYMOD_SYMBOL_FIELD_ENCODE(1029, 3, 0), 1173 /* OSR_MODE_FRC:15:15 */ 1174 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1028, 15, 15) 1175 }; 1176 static uint32_t BCMI_QSGMIIE_SERDES_CKRST_OSR_MODE_PIN_STSr_fields[] = 1177 { 1178 /* OSR_MODE_PIN:0:3 */ 1179 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1031, 3, 0) 1180 }; 1181 static uint32_t BCMI_QSGMIIE_SERDES_CKRST_OSR_MODE_STSr_fields[] = 1182 { 1183 /* OSR_MODE:0:3 */ 1184 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1027, 3, 0) 1185 }; 1186 static uint32_t BCMI_QSGMIIE_SERDES_CKRST_PMD_LN_MODE_STSr_fields[] = 1187 { 1188 /* PMD_LANE_MODE:0:15 */ 1189 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1134, 15, 0) 1190 }; 1191 static uint32_t BCMI_QSGMIIE_SERDES_CKRST_UC_ACK_LN_CTLr_fields[] = 1192 { 1193 /* UC_ACK_LANE_CFG_DONE:0:0 */ 1194 PHYMOD_SYMBOL_FIELD_ENCODE(1539, 0, 0), 1195 /* UC_ACK_LANE_DP_RESET:1:1 */ 1196 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1540, 1, 1) 1197 }; 1198 static uint32_t BCMI_QSGMIIE_SERDES_CL72_LNK_CTLr_fields[] = 1199 { 1200 /* LINK_CONTROL_FORCEVAL:14:14 */ 1201 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(865, 14, 14) 1202 }; 1203 static uint32_t BCMI_QSGMIIE_SERDES_CL72_RXBASE_R_LD_STS_REPr_fields[] = 1204 { 1205 /* CL72_IEEE_LP_STATUS_REPORT:0:15 */ 1206 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(505, 15, 0) 1207 }; 1208 static uint32_t BCMI_QSGMIIE_SERDES_CL72_RXCL72_LP_CTL_PAGEr_fields[] = 1209 { 1210 /* CL72_LP_CONTROL_PAGE:0:15 */ 1211 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(516, 15, 0) 1212 }; 1213 static uint32_t BCMI_QSGMIIE_SERDES_CL72_RXCL72_STS1r_fields[] = 1214 { 1215 /* CL72_SIGNAL_DETECT:0:0 */ 1216 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(523, 0, 0) 1217 }; 1218 static uint32_t BCMI_QSGMIIE_SERDES_CL72_RXDBG2r_fields[] = 1219 { 1220 /* CL72_GOOD_MARKER_CNT:0:1 */ 1221 PHYMOD_SYMBOL_FIELD_ENCODE(500, 1, 0), 1222 /* CL72_BAD_MARKER_CNT:2:4 */ 1223 PHYMOD_SYMBOL_FIELD_ENCODE(488, 4, 2), 1224 /* CL72_DME_CELL_BOUNDARY_CHK:7:7 */ 1225 PHYMOD_SYMBOL_FIELD_ENCODE(493, 7, 7), 1226 /* CL72_CTRL_FRAME_DLY:8:11 */ 1227 PHYMOD_SYMBOL_FIELD_ENCODE(490, 11, 8), 1228 /* CL72_STRICT_DME_CHK:12:12 */ 1229 PHYMOD_SYMBOL_FIELD_ENCODE(525, 12, 12), 1230 /* CL72_STRICT_MARKER_CHK:13:13 */ 1231 PHYMOD_SYMBOL_FIELD_ENCODE(526, 13, 13), 1232 /* CL72_PPM_OFFSET_EN:14:14 */ 1233 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(518, 14, 14) 1234 }; 1235 static uint32_t BCMI_QSGMIIE_SERDES_CL72_RXMISC1_CTLr_fields[] = 1236 { 1237 /* CL72_TR_COARSE_LOCK:1:1 */ 1238 PHYMOD_SYMBOL_FIELD_ENCODE(529, 1, 1), 1239 /* CL72_RX_DP_LN_CLK_EN:2:2 */ 1240 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(521, 2, 2) 1241 }; 1242 static uint32_t BCMI_QSGMIIE_SERDES_CL72_RXRCVD_STSr_fields[] = 1243 { 1244 /* CL72_RCVD_STATUS_PAGE:0:15 */ 1245 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(519, 15, 0) 1246 }; 1247 static uint32_t BCMI_QSGMIIE_SERDES_CL72_TXBASE_R_LD_COEFF_UPDr_fields[] = 1248 { 1249 /* CL72_IEEE_LD_COEFF_UPDATE:0:15 */ 1250 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(502, 15, 0) 1251 }; 1252 static uint32_t BCMI_QSGMIIE_SERDES_CL72_TXBASE_R_LD_STS_REPr_fields[] = 1253 { 1254 /* CL72_IEEE_LD_STATUS_REPORT:0:15 */ 1255 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(503, 15, 0) 1256 }; 1257 static uint32_t BCMI_QSGMIIE_SERDES_CL72_TXBASE_R_LP_COEFF_UPDr_fields[] = 1258 { 1259 /* CL72_IEEE_LP_COEFF_UPDATE:0:15 */ 1260 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(504, 15, 0) 1261 }; 1262 static uint32_t BCMI_QSGMIIE_SERDES_CL72_TXBASE_R_PMD_CTLr_fields[] = 1263 { 1264 /* CL72_IEEE_RESTART_TRAINING:0:0 */ 1265 PHYMOD_SYMBOL_FIELD_ENCODE(507, 0, 0), 1266 /* CL72_IEEE_TRAINING_ENABLE:1:1 */ 1267 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(508, 1, 1) 1268 }; 1269 static uint32_t BCMI_QSGMIIE_SERDES_CL72_TXBASE_R_PMD_STSr_fields[] = 1270 { 1271 /* CL72_IEEE_RECEIVER_STATUS:0:0 */ 1272 PHYMOD_SYMBOL_FIELD_ENCODE(506, 0, 0), 1273 /* CL72_IEEE_FRAME_LOCK:1:1 */ 1274 PHYMOD_SYMBOL_FIELD_ENCODE(501, 1, 1), 1275 /* CL72_IEEE_TRAINING_STATUS:2:2 */ 1276 PHYMOD_SYMBOL_FIELD_ENCODE(510, 2, 2), 1277 /* CL72_IEEE_TRAINING_FAILURE:3:3 */ 1278 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(509, 3, 3) 1279 }; 1280 static uint32_t BCMI_QSGMIIE_SERDES_CL72_TXCL72_LD_STS_PAGEr_fields[] = 1281 { 1282 /* CL72_LD_STATUS_PAGE:0:15 */ 1283 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(513, 15, 0) 1284 }; 1285 static uint32_t BCMI_QSGMIIE_SERDES_CL72_TXCL72_LD_XMT_STS_PAGE_OVRRr_fields[] = 1286 { 1287 /* CL72_OVERRIDE_LD_STATUS_PAGE:0:15 */ 1288 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(517, 15, 0) 1289 }; 1290 static uint32_t BCMI_QSGMIIE_SERDES_CL72_TXCL72_READY_FOR_CMDr_fields[] = 1291 { 1292 /* CL72_READY_FOR_CMD:0:0 */ 1293 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(520, 0, 0) 1294 }; 1295 static uint32_t BCMI_QSGMIIE_SERDES_CL72_TXCL72_TX_DBG_STSr_fields[] = 1296 { 1297 /* CL72_LD_COEFF_CMD_HIST:0:10 */ 1298 PHYMOD_SYMBOL_FIELD_ENCODE(512, 10, 0), 1299 /* CL72_FRAME_LOCK_LH:11:11 */ 1300 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(498, 11, 11) 1301 }; 1302 static uint32_t BCMI_QSGMIIE_SERDES_CL72_TXC_DBG1r_fields[] = 1303 { 1304 /* MAIN_TAP_MIN_VAL:0:6 */ 1305 PHYMOD_SYMBOL_FIELD_ENCODE(934, 6, 0), 1306 /* TAP_SUM_MAX_VAL:7:14 */ 1307 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1393, 14, 7) 1308 }; 1309 static uint32_t BCMI_QSGMIIE_SERDES_CL72_TXC_MAX_WAIT_TMRr_fields[] = 1310 { 1311 /* MAX_WAIT_TIMER_PERIOD:0:15 */ 1312 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(940, 15, 0) 1313 }; 1314 static uint32_t BCMI_QSGMIIE_SERDES_CL72_TXC_TAP_LIMIT_CTL1r_fields[] = 1315 { 1316 /* PRE_TAP_LIMIT:0:4 */ 1317 PHYMOD_SYMBOL_FIELD_ENCODE(1174, 4, 0), 1318 /* POST_TAP_LIMIT:5:10 */ 1319 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1151, 10, 5) 1320 }; 1321 static uint32_t BCMI_QSGMIIE_SERDES_CL72_TXC_TAP_LIMIT_CTL2r_fields[] = 1322 { 1323 /* MAIN_TAP_LIMIT:0:6 */ 1324 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(933, 6, 0) 1325 }; 1326 static uint32_t BCMI_QSGMIIE_SERDES_CL72_TXC_TAP_PRESET_CTLr_fields[] = 1327 { 1328 /* POST_TAP_PRESET_VAL:0:5 */ 1329 PHYMOD_SYMBOL_FIELD_ENCODE(1152, 5, 0), 1330 /* PRE_TAP_PRESET_VAL:6:10 */ 1331 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1175, 10, 6) 1332 }; 1333 static uint32_t BCMI_QSGMIIE_SERDES_CL72_TXC_WAIT_TMRr_fields[] = 1334 { 1335 /* WAIT_CNTR_LIMIT:0:8 */ 1336 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1572, 8, 0) 1337 }; 1338 static uint32_t BCMI_QSGMIIE_SERDES_CL72_TXDBG3r_fields[] = 1339 { 1340 /* CL72_BRK_RING_OSC:0:0 */ 1341 PHYMOD_SYMBOL_FIELD_ENCODE(489, 0, 0), 1342 /* CL72_FRAME_LOCK_RDY_FOR_CMD_EN:1:1 */ 1343 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(499, 1, 1) 1344 }; 1345 static uint32_t BCMI_QSGMIIE_SERDES_CL72_TXKR_DFLT_CTL1r_fields[] = 1346 { 1347 /* CL72_TX_FIR_TAP_PRE_KR_INIT_VAL:0:4 */ 1348 PHYMOD_SYMBOL_FIELD_ENCODE(533, 4, 0), 1349 /* CL72_TX_FIR_TAP_POST_KR_INIT_VAL:5:10 */ 1350 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(532, 10, 5) 1351 }; 1352 static uint32_t BCMI_QSGMIIE_SERDES_CL72_TXKR_DFLT_CTL2r_fields[] = 1353 { 1354 /* CL72_TX_FIR_TAP_MAIN_KR_INIT_VAL:0:6 */ 1355 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(531, 6, 0) 1356 }; 1357 static uint32_t BCMI_QSGMIIE_SERDES_CL72_TXMISC2_CTLr_fields[] = 1358 { 1359 /* CL72_RX_TRAINED:0:0 */ 1360 PHYMOD_SYMBOL_FIELD_ENCODE(522, 0, 0), 1361 /* CL72_SIGNAL_DET_FRC:1:1 */ 1362 PHYMOD_SYMBOL_FIELD_ENCODE(524, 1, 1), 1363 /* CL72_TX_DP_LN_CLK_EN:2:2 */ 1364 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(530, 2, 2) 1365 }; 1366 static uint32_t BCMI_QSGMIIE_SERDES_CL72_TXMISC_COEFF_CTLr_fields[] = 1367 { 1368 /* CL72_INC_DEC_VAL_SEL:0:1 */ 1369 PHYMOD_SYMBOL_FIELD_ENCODE(511, 1, 0), 1370 /* CL72_TAP_V2_VAL:2:7 */ 1371 PHYMOD_SYMBOL_FIELD_ENCODE(527, 7, 2), 1372 /* CL72_V2_CONSTRAINT_DIS:8:8 */ 1373 PHYMOD_SYMBOL_FIELD_ENCODE(534, 8, 8), 1374 /* CL72_LD_XMT_STATUS_LOAD:9:9 */ 1375 PHYMOD_SYMBOL_FIELD_ENCODE(514, 9, 9), 1376 /* CL72_LD_XMT_STATUS_OVERRIDE:10:10 */ 1377 PHYMOD_SYMBOL_FIELD_ENCODE(515, 10, 10), 1378 /* CL72_DIS_LP_COEFF_UPDATES_TO_LD:11:11 */ 1379 PHYMOD_SYMBOL_FIELD_ENCODE(491, 11, 11), 1380 /* CL72_DOUBLE_CMD_EN:12:12 */ 1381 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(494, 12, 12) 1382 }; 1383 static uint32_t BCMI_QSGMIIE_SERDES_CL72_TXPCS_INTERFACE_CTLr_fields[] = 1384 { 1385 /* CL72_DIS_MAX_WAIT_TIMER:0:0 */ 1386 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(492, 0, 0) 1387 }; 1388 static uint32_t BCMI_QSGMIIE_SERDES_CL72_TXXMT_UPDr_fields[] = 1389 { 1390 /* CL72_XMT_UPDATE_PAGE:0:15 */ 1391 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(535, 15, 0) 1392 }; 1393 static uint32_t BCMI_QSGMIIE_SERDES_CL82_BER_HO_STSr_fields[] = 1394 { 1395 /* BER_HO:0:15 */ 1396 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(351, 15, 0) 1397 }; 1398 static uint32_t BCMI_QSGMIIE_SERDES_CL82_LANES_1_0_AM_BYTE2r_fields[] = 1399 { 1400 /* LANE_0_AM_2:0:7 */ 1401 PHYMOD_SYMBOL_FIELD_ENCODE(838, 7, 0), 1402 /* LANE_1_AM_2:8:15 */ 1403 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(840, 15, 8) 1404 }; 1405 static uint32_t BCMI_QSGMIIE_SERDES_CL82_LANES_3_2_AM_BYTE2r_fields[] = 1406 { 1407 /* LANE_2_AM_2:0:7 */ 1408 PHYMOD_SYMBOL_FIELD_ENCODE(842, 7, 0), 1409 /* LANE_3_AM_2:8:15 */ 1410 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(844, 15, 8) 1411 }; 1412 static uint32_t BCMI_QSGMIIE_SERDES_CL82_LN_0_AM_BYTE10r_fields[] = 1413 { 1414 /* LANE_0_AM_1_0:0:15 */ 1415 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(837, 15, 0) 1416 }; 1417 static uint32_t BCMI_QSGMIIE_SERDES_CL82_LN_1_AM_BYTE10r_fields[] = 1418 { 1419 /* LANE_1_AM_1_0:0:15 */ 1420 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(839, 15, 0) 1421 }; 1422 static uint32_t BCMI_QSGMIIE_SERDES_CL82_LN_2_AM_BYTE10r_fields[] = 1423 { 1424 /* LANE_2_AM_1_0:0:15 */ 1425 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(841, 15, 0) 1426 }; 1427 static uint32_t BCMI_QSGMIIE_SERDES_CL82_LN_3_AM_BYTE10r_fields[] = 1428 { 1429 /* LANE_3_AM_1_0:0:15 */ 1430 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(843, 15, 0) 1431 }; 1432 static uint32_t BCMI_QSGMIIE_SERDES_CL82_PCS_ERRED_BLKS_HOr_fields[] = 1433 { 1434 /* ERRORED_BLOCKS_HO:0:13 */ 1435 PHYMOD_SYMBOL_FIELD_ENCODE(757, 13, 0), 1436 /* ERRORED_BLOCKS_HO_PRESENT:15:15 */ 1437 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(758, 15, 15) 1438 }; 1439 static uint32_t BCMI_QSGMIIE_SERDES_CL82_RX_AM_TMRr_fields[] = 1440 { 1441 /* AM_TIMER_INIT_RX_VAL:0:15 */ 1442 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(200, 15, 0) 1443 }; 1444 static uint32_t BCMI_QSGMIIE_SERDES_CL82_RX_DECR_STSr_fields[] = 1445 { 1446 /* RXSM_STATE:0:6 */ 1447 PHYMOD_SYMBOL_FIELD_ENCODE(1276, 6, 0), 1448 /* R_TYPE_CODED:7:12 */ 1449 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1308, 12, 7) 1450 }; 1451 static uint32_t BCMI_QSGMIIE_SERDES_CL82_RX_DESKEW_BER_STSr_fields[] = 1452 { 1453 /* BERMON_STATE:0:4 */ 1454 PHYMOD_SYMBOL_FIELD_ENCODE(349, 4, 0), 1455 /* LBERMON_STATE:6:10 */ 1456 PHYMOD_SYMBOL_FIELD_ENCODE(857, 10, 6), 1457 /* DESKEW_HIS_STATE:12:13 */ 1458 PHYMOD_SYMBOL_FIELD_ENCODE(632, 13, 12), 1459 /* DESKEW_STATE:14:15 */ 1460 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(633, 15, 14) 1461 }; 1462 static uint32_t BCMI_QSGMIIE_SERDES_DIG_CORE_DP_RST_ST_STSr_fields[] = 1463 { 1464 /* CORE_DP_RESET_STATE:0:2 */ 1465 PHYMOD_SYMBOL_FIELD_ENCODE(589, 2, 0), 1466 /* LANE_RESET_RELEASED_INDEX:8:12 */ 1467 PHYMOD_SYMBOL_FIELD_ENCODE(855, 12, 8), 1468 /* LANE_RESET_RELEASED:14:14 */ 1469 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(854, 14, 14) 1470 }; 1471 static uint32_t BCMI_QSGMIIE_SERDES_DIG_CORE_MCST_MASK_CTLr_fields[] = 1472 { 1473 /* CORE_MULTICAST_MASK_CONTROL:0:3 */ 1474 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(593, 3, 0) 1475 }; 1476 static uint32_t BCMI_QSGMIIE_SERDES_DIG_CORE_RST_OCC_CTLr_fields[] = 1477 { 1478 /* CORE_REG_RESET_OCCURRED:0:0 */ 1479 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(594, 0, 0) 1480 }; 1481 static uint32_t BCMI_QSGMIIE_SERDES_DIG_CTL1000X2r_fields[] = 1482 { 1483 /* DISABLE_REMOTE_FAULT_REPORTING:4:4 */ 1484 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(717, 4, 4) 1485 }; 1486 static uint32_t BCMI_QSGMIIE_SERDES_DIG_LN_ADDR_2_3r_fields[] = 1487 { 1488 /* LANE_ADDR_2:0:4 */ 1489 PHYMOD_SYMBOL_FIELD_ENCODE(847, 4, 0), 1490 /* LANE_ADDR_3:8:12 */ 1491 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(848, 12, 8) 1492 }; 1493 static uint32_t BCMI_QSGMIIE_SERDES_DIG_PMD_CORE_MODE_STSr_fields[] = 1494 { 1495 /* PMD_CORE_MODE:0:15 */ 1496 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1128, 15, 0) 1497 }; 1498 static uint32_t BCMI_QSGMIIE_SERDES_DIG_REVID0r_fields[] = 1499 { 1500 /* REVID_MODEL:0:5 */ 1501 PHYMOD_SYMBOL_FIELD_ENCODE(1232, 5, 0), 1502 /* REVID_PROCESS:6:8 */ 1503 PHYMOD_SYMBOL_FIELD_ENCODE(1235, 8, 6), 1504 /* REVID_BONDING:9:10 */ 1505 PHYMOD_SYMBOL_FIELD_ENCODE(1226, 10, 9), 1506 /* REVID_REV_NUMBER:11:13 */ 1507 PHYMOD_SYMBOL_FIELD_ENCODE(1237, 13, 11), 1508 /* REVID_REV_LETTER:14:15 */ 1509 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1236, 15, 14) 1510 }; 1511 static uint32_t BCMI_QSGMIIE_SERDES_DIG_REVID1r_fields[] = 1512 { 1513 /* REVID_EEE:0:0 */ 1514 PHYMOD_SYMBOL_FIELD_ENCODE(1228, 0, 0), 1515 /* REVID_LLP:1:1 */ 1516 PHYMOD_SYMBOL_FIELD_ENCODE(1229, 1, 1), 1517 /* REVID_PIR:2:2 */ 1518 PHYMOD_SYMBOL_FIELD_ENCODE(1234, 2, 2), 1519 /* REVID_CL72:3:3 */ 1520 PHYMOD_SYMBOL_FIELD_ENCODE(1227, 3, 3), 1521 /* REVID_MICRO:4:4 */ 1522 PHYMOD_SYMBOL_FIELD_ENCODE(1231, 4, 4), 1523 /* REVID_MDIO:5:5 */ 1524 PHYMOD_SYMBOL_FIELD_ENCODE(1230, 5, 5), 1525 /* REVID_MULTIPLICITY:12:15 */ 1526 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1233, 15, 12) 1527 }; 1528 static uint32_t BCMI_QSGMIIE_SERDES_DIG_REVID2r_fields[] = 1529 { 1530 /* REVID2:0:3 */ 1531 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1225, 3, 0) 1532 }; 1533 static uint32_t BCMI_QSGMIIE_SERDES_DIG_RST_CTL_CORE_DPr_fields[] = 1534 { 1535 /* PMD_CORE_DP_H_RSTB_PKILL:1:1 */ 1536 PHYMOD_SYMBOL_FIELD_ENCODE(1127, 1, 1), 1537 /* SUP_RST_SEQ_FRC_VAL:3:3 */ 1538 PHYMOD_SYMBOL_FIELD_ENCODE(1378, 3, 3), 1539 /* SUP_RST_SEQ_FRC:4:4 */ 1540 PHYMOD_SYMBOL_FIELD_ENCODE(1377, 4, 4), 1541 /* PMD_MDIO_TRANS_PKILL:5:5 */ 1542 PHYMOD_SYMBOL_FIELD_ENCODE(1141, 5, 5), 1543 /* PMD_TX_CLK_VLD_FRC:7:7 */ 1544 PHYMOD_SYMBOL_FIELD_ENCODE(1146, 7, 7), 1545 /* PMD_TX_CLK_VLD_FRC_VAL:8:8 */ 1546 PHYMOD_SYMBOL_FIELD_ENCODE(1147, 8, 8), 1547 /* TX_S_COMCLK_SEL:9:9 */ 1548 PHYMOD_SYMBOL_FIELD_ENCODE(1529, 9, 9), 1549 /* TX_S_COMCLK_FRC_ON:10:10 */ 1550 PHYMOD_SYMBOL_FIELD_ENCODE(1528, 10, 10), 1551 /* TX_S_CLKGATE_FRC_ON:11:11 */ 1552 PHYMOD_SYMBOL_FIELD_ENCODE(1527, 11, 11), 1553 /* AFE_S_PLL_RESET_FRC_VAL:12:12 */ 1554 PHYMOD_SYMBOL_FIELD_ENCODE(11, 12, 12), 1555 /* AFE_S_PLL_RESET_FRC:13:13 */ 1556 PHYMOD_SYMBOL_FIELD_ENCODE(10, 13, 13), 1557 /* TX_PI_LOOP_FILTER_STABLE:14:14 */ 1558 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1508, 14, 14) 1559 }; 1560 static uint32_t BCMI_QSGMIIE_SERDES_DIG_RST_CTL_PMDr_fields[] = 1561 { 1562 /* CORE_S_RSTB:0:0 */ 1563 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(595, 0, 0) 1564 }; 1565 static uint32_t BCMI_QSGMIIE_SERDES_DIG_RST_SEQ_TMR_CTLr_fields[] = 1566 { 1567 /* RST_SEQ_TIMER:0:2 */ 1568 PHYMOD_SYMBOL_FIELD_ENCODE(1265, 2, 0), 1569 /* PWRDN_SEQ_TIMER:8:10 */ 1570 PHYMOD_SYMBOL_FIELD_ENCODE(1183, 10, 8), 1571 /* RST_SEQ_DIS_FLT_MODE:14:15 */ 1572 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1264, 15, 14) 1573 }; 1574 static uint32_t BCMI_QSGMIIE_SERDES_DIG_SPARE0r_fields[] = 1575 { 1576 /* SPARE0:0:7 */ 1577 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1370, 7, 0) 1578 }; 1579 static uint32_t BCMI_QSGMIIE_SERDES_DIG_SPARE1r_fields[] = 1580 { 1581 /* SPARE1:0:7 */ 1582 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1371, 7, 0) 1583 }; 1584 static uint32_t BCMI_QSGMIIE_SERDES_DIG_TOP_USER_CTL0r_fields[] = 1585 { 1586 /* HEARTBEAT_COUNT_1US:0:9 */ 1587 PHYMOD_SYMBOL_FIELD_ENCODE(803, 9, 0), 1588 /* CORE_DP_S_RSTB:13:13 */ 1589 PHYMOD_SYMBOL_FIELD_ENCODE(590, 13, 13), 1590 /* AFE_S_PLL_PWRDN:14:14 */ 1591 PHYMOD_SYMBOL_FIELD_ENCODE(9, 14, 14), 1592 /* UC_ACTIVE:15:15 */ 1593 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1541, 15, 15) 1594 }; 1595 static uint32_t BCMI_QSGMIIE_SERDES_DIG_TX_LN_MAP_0_1_2r_fields[] = 1596 { 1597 /* TX_LANE_MAP_0:0:4 */ 1598 PHYMOD_SYMBOL_FIELD_ENCODE(1477, 4, 0), 1599 /* TX_LANE_MAP_1:5:9 */ 1600 PHYMOD_SYMBOL_FIELD_ENCODE(1478, 9, 5), 1601 /* TX_LANE_MAP_2:10:14 */ 1602 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1479, 14, 10) 1603 }; 1604 static uint32_t BCMI_QSGMIIE_SERDES_DIG_TX_LN_MAP_3_N_LN_ADDR_0_1r_fields[] = 1605 { 1606 /* TX_LANE_MAP_3:0:4 */ 1607 PHYMOD_SYMBOL_FIELD_ENCODE(1480, 4, 0), 1608 /* LANE_ADDR_0:5:9 */ 1609 PHYMOD_SYMBOL_FIELD_ENCODE(845, 9, 5), 1610 /* LANE_ADDR_1:10:14 */ 1611 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(846, 14, 10) 1612 }; 1613 static uint32_t BCMI_QSGMIIE_SERDES_DIG_UC_ACK_CORE_CTLr_fields[] = 1614 { 1615 /* UC_ACK_CORE_CFG_DONE:0:0 */ 1616 PHYMOD_SYMBOL_FIELD_ENCODE(1533, 0, 0), 1617 /* UC_ACK_CORE_DP_RESET:1:1 */ 1618 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1534, 1, 1) 1619 }; 1620 static uint32_t BCMI_QSGMIIE_SERDES_DSC_CDR_CTL0r_fields[] = 1621 { 1622 /* CDR_PHASE_SAT_CTRL:0:0 */ 1623 PHYMOD_SYMBOL_FIELD_ENCODE(409, 0, 0), 1624 /* BR_PD_EN:1:1 */ 1625 PHYMOD_SYMBOL_FIELD_ENCODE(359, 1, 1), 1626 /* CDR_FREQ_EN:2:2 */ 1627 PHYMOD_SYMBOL_FIELD_ENCODE(397, 2, 2), 1628 /* CDR_INTEG_REG_CLR:4:4 */ 1629 PHYMOD_SYMBOL_FIELD_ENCODE(403, 4, 4), 1630 /* CDR_PHASE_ERR_FRZ:5:5 */ 1631 PHYMOD_SYMBOL_FIELD_ENCODE(408, 5, 5), 1632 /* CDR_INTEG_SAT_SEL:6:6 */ 1633 PHYMOD_SYMBOL_FIELD_ENCODE(404, 6, 6), 1634 /* CDR_FREQ_OVERRIDE_EN:7:7 */ 1635 PHYMOD_SYMBOL_FIELD_ENCODE(398, 7, 7), 1636 /* CDR_LM_THR_SEL:8:10 */ 1637 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(406, 10, 8) 1638 }; 1639 static uint32_t BCMI_QSGMIIE_SERDES_DSC_CDR_CTL1r_fields[] = 1640 { 1641 /* CDR_FREQ_OVERRIDE_VAL:0:15 */ 1642 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(399, 15, 0) 1643 }; 1644 static uint32_t BCMI_QSGMIIE_SERDES_DSC_CDR_CTL2r_fields[] = 1645 { 1646 /* CDR_ZERO_POLARITY:0:0 */ 1647 PHYMOD_SYMBOL_FIELD_ENCODE(412, 0, 0), 1648 /* PHASE_ERR_OFFSET_MULT_2:1:1 */ 1649 PHYMOD_SYMBOL_FIELD_ENCODE(1094, 1, 1), 1650 /* PATTERN_SEL:4:7 */ 1651 PHYMOD_SYMBOL_FIELD_ENCODE(1047, 7, 4), 1652 /* OSX2P_PHERR_GAIN:8:9 */ 1653 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1032, 9, 8) 1654 }; 1655 static uint32_t BCMI_QSGMIIE_SERDES_DSC_CDR_STS_INTEGr_fields[] = 1656 { 1657 /* CDR_INTEG_REG:0:15 */ 1658 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(402, 15, 0) 1659 }; 1660 static uint32_t BCMI_QSGMIIE_SERDES_DSC_CDR_STS_PHASE_ERRr_fields[] = 1661 { 1662 /* CDR_PHASE_ERR:0:4 */ 1663 PHYMOD_SYMBOL_FIELD_ENCODE(407, 4, 0), 1664 /* CDR_LM_OUTOFLOCK:8:8 */ 1665 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(405, 8, 8) 1666 }; 1667 static uint32_t BCMI_QSGMIIE_SERDES_DSC_CTLr_fields[] = 1668 { 1669 /* PD_CH_P1:0:0 */ 1670 PHYMOD_SYMBOL_FIELD_ENCODE(1078, 0, 0), 1671 /* OFFSET_PD:1:1 */ 1672 PHYMOD_SYMBOL_FIELD_ENCODE(1026, 1, 1), 1673 /* EN_HGAIN:2:2 */ 1674 PHYMOD_SYMBOL_FIELD_ENCODE(755, 2, 2), 1675 /* P1_THRESH_SEL:3:3 */ 1676 PHYMOD_SYMBOL_FIELD_ENCODE(1045, 3, 3), 1677 /* M1_THRESH_ZERO:4:4 */ 1678 PHYMOD_SYMBOL_FIELD_ENCODE(930, 4, 4), 1679 /* M1_THRESH_SEL:5:6 */ 1680 PHYMOD_SYMBOL_FIELD_ENCODE(929, 6, 5), 1681 /* PF_HIZ:7:7 */ 1682 PHYMOD_SYMBOL_FIELD_ENCODE(1090, 7, 7), 1683 /* EN_DFE_CLK:8:8 */ 1684 PHYMOD_SYMBOL_FIELD_ENCODE(754, 8, 8), 1685 /* OFFSET_FASTACQ:9:9 */ 1686 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1025, 9, 9) 1687 }; 1688 static uint32_t BCMI_QSGMIIE_SERDES_DSC_DC_OFFSr_fields[] = 1689 { 1690 /* DC_OFFSET:0:6 */ 1691 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(612, 6, 0) 1692 }; 1693 static uint32_t BCMI_QSGMIIE_SERDES_DSC_DFE_1_CTLr_fields[] = 1694 { 1695 /* DFE_1_ACC_CLR:0:0 */ 1696 PHYMOD_SYMBOL_FIELD_ENCODE(638, 0, 0), 1697 /* DFE_1_CMN_ONLY:1:1 */ 1698 PHYMOD_SYMBOL_FIELD_ENCODE(640, 1, 1), 1699 /* DFE_1_INV_P1:8:8 */ 1700 PHYMOD_SYMBOL_FIELD_ENCODE(647, 8, 8), 1701 /* DFE_1_INV_M1:9:9 */ 1702 PHYMOD_SYMBOL_FIELD_ENCODE(646, 9, 9), 1703 /* DFE_1_ERR_GAIN:10:11 */ 1704 PHYMOD_SYMBOL_FIELD_ENCODE(643, 11, 10), 1705 /* DFE_1_GRADIENT_INVERT:12:12 */ 1706 PHYMOD_SYMBOL_FIELD_ENCODE(645, 12, 12), 1707 /* DFE_1_ERR_SEL:13:14 */ 1708 PHYMOD_SYMBOL_FIELD_ENCODE(644, 14, 13), 1709 /* DFE_1_EN:15:15 */ 1710 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(642, 15, 15) 1711 }; 1712 static uint32_t BCMI_QSGMIIE_SERDES_DSC_DFE_1_PAT_CTLr_fields[] = 1713 { 1714 /* DFE_1_PATTERN:0:5 */ 1715 PHYMOD_SYMBOL_FIELD_ENCODE(649, 5, 0), 1716 /* DFE_1_PATTERN_BIT_EN:8:13 */ 1717 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(650, 13, 8) 1718 }; 1719 static uint32_t BCMI_QSGMIIE_SERDES_DSC_DFE_1_STSr_fields[] = 1720 { 1721 /* DFE_1_CMN:0:5 */ 1722 PHYMOD_SYMBOL_FIELD_ENCODE(639, 5, 0), 1723 /* DFE_1_O:8:10 */ 1724 PHYMOD_SYMBOL_FIELD_ENCODE(648, 10, 8), 1725 /* DFE_1_E:11:13 */ 1726 PHYMOD_SYMBOL_FIELD_ENCODE(641, 13, 11), 1727 /* DFE_1_WANTS_NEGATIVE:15:15 */ 1728 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(651, 15, 15) 1729 }; 1730 static uint32_t BCMI_QSGMIIE_SERDES_DSC_DFE_2_CTLr_fields[] = 1731 { 1732 /* DFE_2_ACC_CLR:0:0 */ 1733 PHYMOD_SYMBOL_FIELD_ENCODE(652, 0, 0), 1734 /* DFE_2_CMN_ONLY:1:1 */ 1735 PHYMOD_SYMBOL_FIELD_ENCODE(654, 1, 1), 1736 /* DFE_2_INV_P1:8:8 */ 1737 PHYMOD_SYMBOL_FIELD_ENCODE(661, 8, 8), 1738 /* DFE_2_INV_M1:9:9 */ 1739 PHYMOD_SYMBOL_FIELD_ENCODE(660, 9, 9), 1740 /* DFE_2_ERR_GAIN:10:11 */ 1741 PHYMOD_SYMBOL_FIELD_ENCODE(657, 11, 10), 1742 /* DFE_2_GRADIENT_INVERT:12:12 */ 1743 PHYMOD_SYMBOL_FIELD_ENCODE(659, 12, 12), 1744 /* DFE_2_ERR_SEL:13:14 */ 1745 PHYMOD_SYMBOL_FIELD_ENCODE(658, 14, 13), 1746 /* DFE_2_EN:15:15 */ 1747 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(656, 15, 15) 1748 }; 1749 static uint32_t BCMI_QSGMIIE_SERDES_DSC_DFE_2_PAT_CTLr_fields[] = 1750 { 1751 /* DFE_2_PATTERN:0:5 */ 1752 PHYMOD_SYMBOL_FIELD_ENCODE(663, 5, 0), 1753 /* DFE_2_PATTERN_BIT_EN:8:13 */ 1754 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(664, 13, 8) 1755 }; 1756 static uint32_t BCMI_QSGMIIE_SERDES_DSC_DFE_2_STSr_fields[] = 1757 { 1758 /* DFE_2_CMN:0:4 */ 1759 PHYMOD_SYMBOL_FIELD_ENCODE(653, 4, 0), 1760 /* DFE_2_SO:5:5 */ 1761 PHYMOD_SYMBOL_FIELD_ENCODE(666, 5, 5), 1762 /* DFE_2_SE:6:6 */ 1763 PHYMOD_SYMBOL_FIELD_ENCODE(665, 6, 6), 1764 /* DFE_2_O:8:10 */ 1765 PHYMOD_SYMBOL_FIELD_ENCODE(662, 10, 8), 1766 /* DFE_2_E:11:13 */ 1767 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(655, 13, 11) 1768 }; 1769 static uint32_t BCMI_QSGMIIE_SERDES_DSC_DFE_3_4_5_STSr_fields[] = 1770 { 1771 /* DFE_3_CMN:0:5 */ 1772 PHYMOD_SYMBOL_FIELD_ENCODE(668, 5, 0), 1773 /* DFE_4_CMN:6:10 */ 1774 PHYMOD_SYMBOL_FIELD_ENCODE(678, 10, 6), 1775 /* DFE_5_CMN:11:15 */ 1776 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(688, 15, 11) 1777 }; 1778 static uint32_t BCMI_QSGMIIE_SERDES_DSC_DFE_3_CTLr_fields[] = 1779 { 1780 /* DFE_3_ACC_CLR:0:0 */ 1781 PHYMOD_SYMBOL_FIELD_ENCODE(667, 0, 0), 1782 /* DFE_3_INV_P1:8:8 */ 1783 PHYMOD_SYMBOL_FIELD_ENCODE(674, 8, 8), 1784 /* DFE_3_INV_M1:9:9 */ 1785 PHYMOD_SYMBOL_FIELD_ENCODE(673, 9, 9), 1786 /* DFE_3_ERR_GAIN:10:11 */ 1787 PHYMOD_SYMBOL_FIELD_ENCODE(670, 11, 10), 1788 /* DFE_3_GRADIENT_INVERT:12:12 */ 1789 PHYMOD_SYMBOL_FIELD_ENCODE(672, 12, 12), 1790 /* DFE_3_ERR_SEL:13:14 */ 1791 PHYMOD_SYMBOL_FIELD_ENCODE(671, 14, 13), 1792 /* DFE_3_EN:15:15 */ 1793 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(669, 15, 15) 1794 }; 1795 static uint32_t BCMI_QSGMIIE_SERDES_DSC_DFE_3_PAT_CTLr_fields[] = 1796 { 1797 /* DFE_3_PATTERN:0:5 */ 1798 PHYMOD_SYMBOL_FIELD_ENCODE(675, 5, 0), 1799 /* DFE_3_PATTERN_BIT_EN:8:13 */ 1800 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(676, 13, 8) 1801 }; 1802 static uint32_t BCMI_QSGMIIE_SERDES_DSC_DFE_4_CTLr_fields[] = 1803 { 1804 /* DFE_4_ACC_CLR:0:0 */ 1805 PHYMOD_SYMBOL_FIELD_ENCODE(677, 0, 0), 1806 /* DFE_4_INV_P1:8:8 */ 1807 PHYMOD_SYMBOL_FIELD_ENCODE(684, 8, 8), 1808 /* DFE_4_INV_M1:9:9 */ 1809 PHYMOD_SYMBOL_FIELD_ENCODE(683, 9, 9), 1810 /* DFE_4_ERR_GAIN:10:11 */ 1811 PHYMOD_SYMBOL_FIELD_ENCODE(680, 11, 10), 1812 /* DFE_4_GRADIENT_INVERT:12:12 */ 1813 PHYMOD_SYMBOL_FIELD_ENCODE(682, 12, 12), 1814 /* DFE_4_ERR_SEL:13:14 */ 1815 PHYMOD_SYMBOL_FIELD_ENCODE(681, 14, 13), 1816 /* DFE_4_EN:15:15 */ 1817 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(679, 15, 15) 1818 }; 1819 static uint32_t BCMI_QSGMIIE_SERDES_DSC_DFE_4_PAT_CTLr_fields[] = 1820 { 1821 /* DFE_4_PATTERN:0:5 */ 1822 PHYMOD_SYMBOL_FIELD_ENCODE(685, 5, 0), 1823 /* DFE_4_PATTERN_BIT_EN:8:13 */ 1824 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(686, 13, 8) 1825 }; 1826 static uint32_t BCMI_QSGMIIE_SERDES_DSC_DFE_5_CTLr_fields[] = 1827 { 1828 /* DFE_5_ACC_CLR:0:0 */ 1829 PHYMOD_SYMBOL_FIELD_ENCODE(687, 0, 0), 1830 /* DFE_5_INV_P1:8:8 */ 1831 PHYMOD_SYMBOL_FIELD_ENCODE(694, 8, 8), 1832 /* DFE_5_INV_M1:9:9 */ 1833 PHYMOD_SYMBOL_FIELD_ENCODE(693, 9, 9), 1834 /* DFE_5_ERR_GAIN:10:11 */ 1835 PHYMOD_SYMBOL_FIELD_ENCODE(690, 11, 10), 1836 /* DFE_5_GRADIENT_INVERT:12:12 */ 1837 PHYMOD_SYMBOL_FIELD_ENCODE(692, 12, 12), 1838 /* DFE_5_ERR_SEL:13:14 */ 1839 PHYMOD_SYMBOL_FIELD_ENCODE(691, 14, 13), 1840 /* DFE_5_EN:15:15 */ 1841 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(689, 15, 15) 1842 }; 1843 static uint32_t BCMI_QSGMIIE_SERDES_DSC_DFE_5_PAT_CTLr_fields[] = 1844 { 1845 /* DFE_5_PATTERN:0:5 */ 1846 PHYMOD_SYMBOL_FIELD_ENCODE(695, 5, 0), 1847 /* DFE_5_PATTERN_BIT_EN:8:13 */ 1848 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(696, 13, 8) 1849 }; 1850 static uint32_t BCMI_QSGMIIE_SERDES_DSC_DFE_COMMON_CTLr_fields[] = 1851 { 1852 /* DFE_UPDATE_GAIN:13:13 */ 1853 PHYMOD_SYMBOL_FIELD_ENCODE(705, 13, 13), 1854 /* DFE_ALLOW_SIMULT:14:14 */ 1855 PHYMOD_SYMBOL_FIELD_ENCODE(698, 14, 14), 1856 /* DFE_ACC_HYS_EN:15:15 */ 1857 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(697, 15, 15) 1858 }; 1859 static uint32_t BCMI_QSGMIIE_SERDES_DSC_DFE_VGA_OVRRr_fields[] = 1860 { 1861 /* DFE_VGA_WRITE_VAL:0:8 */ 1862 PHYMOD_SYMBOL_FIELD_ENCODE(708, 8, 0), 1863 /* DFE_VGA_WRITE_TAPSEL:9:13 */ 1864 PHYMOD_SYMBOL_FIELD_ENCODE(707, 13, 9), 1865 /* DFE_VGA_WRITE_EN:15:15 */ 1866 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(706, 15, 15) 1867 }; 1868 static uint32_t BCMI_QSGMIIE_SERDES_DSC_OFFS_ADJ_DATA_EVENr_fields[] = 1869 { 1870 /* DFE_OFFSET_ADJ_DATA_EVEN:0:5 */ 1871 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(699, 5, 0) 1872 }; 1873 static uint32_t BCMI_QSGMIIE_SERDES_DSC_OFFS_ADJ_DATA_ODDr_fields[] = 1874 { 1875 /* DFE_OFFSET_ADJ_DATA_ODD:0:5 */ 1876 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(700, 5, 0) 1877 }; 1878 static uint32_t BCMI_QSGMIIE_SERDES_DSC_OFFS_ADJ_M1_EVENr_fields[] = 1879 { 1880 /* DFE_OFFSET_ADJ_M1_EVEN:0:5 */ 1881 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(701, 5, 0) 1882 }; 1883 static uint32_t BCMI_QSGMIIE_SERDES_DSC_OFFS_ADJ_M1_ODDr_fields[] = 1884 { 1885 /* DFE_OFFSET_ADJ_M1_ODD:0:5 */ 1886 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(702, 5, 0) 1887 }; 1888 static uint32_t BCMI_QSGMIIE_SERDES_DSC_OFFS_ADJ_P1_EVENr_fields[] = 1889 { 1890 /* DFE_OFFSET_ADJ_P1_EVEN:0:5 */ 1891 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(703, 5, 0) 1892 }; 1893 static uint32_t BCMI_QSGMIIE_SERDES_DSC_OFFS_ADJ_P1_ODDr_fields[] = 1894 { 1895 /* DFE_OFFSET_ADJ_P1_ODD:0:5 */ 1896 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(704, 5, 0) 1897 }; 1898 static uint32_t BCMI_QSGMIIE_SERDES_DSC_P1_FRAC_OFFS_CTLr_fields[] = 1899 { 1900 /* P1_OFFSET:0:6 */ 1901 PHYMOD_SYMBOL_FIELD_ENCODE(1042, 6, 0), 1902 /* P1_OFFSET_EN:7:7 */ 1903 PHYMOD_SYMBOL_FIELD_ENCODE(1043, 7, 7), 1904 /* P1_OFF_3LEVELQ_EN:8:8 */ 1905 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1044, 8, 8) 1906 }; 1907 static uint32_t BCMI_QSGMIIE_SERDES_DSC_PF2_LOWP_CTLr_fields[] = 1908 { 1909 /* PF2_LOWP_CTRL:0:2 */ 1910 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1088, 2, 0) 1911 }; 1912 static uint32_t BCMI_QSGMIIE_SERDES_DSC_PF_CTLr_fields[] = 1913 { 1914 /* PF_CTRL:0:3 */ 1915 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1089, 3, 0) 1916 }; 1917 static uint32_t BCMI_QSGMIIE_SERDES_DSC_RX_PI_CNT_BIN_Dr_fields[] = 1918 { 1919 /* CNT_BIN_D_DREG:0:6 */ 1920 PHYMOD_SYMBOL_FIELD_ENCODE(575, 6, 0), 1921 /* CNT_BIN_P1_DREG:8:14 */ 1922 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(579, 14, 8) 1923 }; 1924 static uint32_t BCMI_QSGMIIE_SERDES_DSC_RX_PI_CNT_BIN_Mr_fields[] = 1925 { 1926 /* CNT_BIN_M1_MREG:0:6 */ 1927 PHYMOD_SYMBOL_FIELD_ENCODE(577, 6, 0), 1928 /* CNT_BIN_D_MREG:8:14 */ 1929 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(576, 14, 8) 1930 }; 1931 static uint32_t BCMI_QSGMIIE_SERDES_DSC_RX_PI_CNT_BIN_Pr_fields[] = 1932 { 1933 /* CNT_BIN_P1_PREG:0:6 */ 1934 PHYMOD_SYMBOL_FIELD_ENCODE(580, 6, 0), 1935 /* CNT_BIN_M1_PREG:8:14 */ 1936 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(578, 14, 8) 1937 }; 1938 static uint32_t BCMI_QSGMIIE_SERDES_DSC_RX_PI_CTLr_fields[] = 1939 { 1940 /* RX_PI_PHASE_STEP_CNT:0:6 */ 1941 PHYMOD_SYMBOL_FIELD_ENCODE(1298, 6, 0), 1942 /* RX_PI_MANUAL_STROBE:9:9 */ 1943 PHYMOD_SYMBOL_FIELD_ENCODE(1297, 9, 9), 1944 /* RX_PI_PHASE_STEP_DIR:10:10 */ 1945 PHYMOD_SYMBOL_FIELD_ENCODE(1299, 10, 10), 1946 /* RX_PI_MANUAL_MODE:11:11 */ 1947 PHYMOD_SYMBOL_FIELD_ENCODE(1295, 11, 11), 1948 /* RX_PI_SLICERS_EN:12:14 */ 1949 PHYMOD_SYMBOL_FIELD_ENCODE(1300, 14, 12), 1950 /* RX_PI_MANUAL_RESET:15:15 */ 1951 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1296, 15, 15) 1952 }; 1953 static uint32_t BCMI_QSGMIIE_SERDES_DSC_RX_PI_DIFF_BINr_fields[] = 1954 { 1955 /* CNT_D_MINUS_M1:0:7 */ 1956 PHYMOD_SYMBOL_FIELD_ENCODE(581, 7, 0), 1957 /* CNT_D_MINUS_P1:8:15 */ 1958 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(582, 15, 8) 1959 }; 1960 static uint32_t BCMI_QSGMIIE_SERDES_DSC_SCRATCHr_fields[] = 1961 { 1962 /* UC_DSC_SCRATCH:0:15 */ 1963 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1545, 15, 0) 1964 }; 1965 static uint32_t BCMI_QSGMIIE_SERDES_DSC_SM_CTL0r_fields[] = 1966 { 1967 /* EEE_MODE_EN:1:1 */ 1968 PHYMOD_SYMBOL_FIELD_ENCODE(741, 1, 1), 1969 /* EEE_QUIET_RX_AFE_PWRDWN_VAL:2:2 */ 1970 PHYMOD_SYMBOL_FIELD_ENCODE(745, 2, 2), 1971 /* IGNORE_RX_MODE:3:3 */ 1972 PHYMOD_SYMBOL_FIELD_ENCODE(824, 3, 3), 1973 /* CL72_TIMER_EN:4:4 */ 1974 PHYMOD_SYMBOL_FIELD_ENCODE(528, 4, 4), 1975 /* UC_TUNE_EN:5:5 */ 1976 PHYMOD_SYMBOL_FIELD_ENCODE(1548, 5, 5), 1977 /* HW_TUNE_EN:6:6 */ 1978 PHYMOD_SYMBOL_FIELD_ENCODE(816, 6, 6), 1979 /* UC_TRNSUM_EN:7:7 */ 1980 PHYMOD_SYMBOL_FIELD_ENCODE(1547, 7, 7), 1981 /* EEE_MEASURE_EN:8:8 */ 1982 PHYMOD_SYMBOL_FIELD_ENCODE(740, 8, 8), 1983 /* UC_ACK_DSC_EEE_DONE:11:11 */ 1984 PHYMOD_SYMBOL_FIELD_ENCODE(1536, 11, 11), 1985 /* UC_ACK_DSC_RESET:12:12 */ 1986 PHYMOD_SYMBOL_FIELD_ENCODE(1537, 12, 12), 1987 /* UC_ACK_DSC_RESTART:13:13 */ 1988 PHYMOD_SYMBOL_FIELD_ENCODE(1538, 13, 13), 1989 /* UC_ACK_DSC_CONFIG:14:14 */ 1990 PHYMOD_SYMBOL_FIELD_ENCODE(1535, 14, 14), 1991 /* SET_MEAS_INCOMPLETE:15:15 */ 1992 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1340, 15, 15) 1993 }; 1994 static uint32_t BCMI_QSGMIIE_SERDES_DSC_SM_CTL1r_fields[] = 1995 { 1996 /* RX_DSC_LOCK_FRC:0:0 */ 1997 PHYMOD_SYMBOL_FIELD_ENCODE(1285, 0, 0), 1998 /* RX_DSC_LOCK_FRC_VAL:1:1 */ 1999 PHYMOD_SYMBOL_FIELD_ENCODE(1286, 1, 1), 2000 /* DSC_CLR_FRC:2:2 */ 2001 PHYMOD_SYMBOL_FIELD_ENCODE(721, 2, 2), 2002 /* DSC_CLR_FRC_VAL:3:3 */ 2003 PHYMOD_SYMBOL_FIELD_ENCODE(722, 3, 3), 2004 /* TRNSUM_FRZ_FRC:4:4 */ 2005 PHYMOD_SYMBOL_FIELD_ENCODE(1419, 4, 4), 2006 /* TRNSUM_FRZ_FRC_VAL:5:5 */ 2007 PHYMOD_SYMBOL_FIELD_ENCODE(1420, 5, 5), 2008 /* TIMER_DONE_FRC:6:6 */ 2009 PHYMOD_SYMBOL_FIELD_ENCODE(1406, 6, 6), 2010 /* TIMER_DONE_FRC_VAL:7:7 */ 2011 PHYMOD_SYMBOL_FIELD_ENCODE(1407, 7, 7), 2012 /* FREQ_UPD_EN_FRC:8:8 */ 2013 PHYMOD_SYMBOL_FIELD_ENCODE(795, 8, 8), 2014 /* FREQ_UPD_EN_FRC_VAL:9:9 */ 2015 PHYMOD_SYMBOL_FIELD_ENCODE(796, 9, 9), 2016 /* CDR_FRZ_FRC:10:10 */ 2017 PHYMOD_SYMBOL_FIELD_ENCODE(400, 10, 10), 2018 /* CDR_FRZ_FRC_VAL:11:11 */ 2019 PHYMOD_SYMBOL_FIELD_ENCODE(401, 11, 11), 2020 /* TRNSUM_CLR_FRC:12:12 */ 2021 PHYMOD_SYMBOL_FIELD_ENCODE(1411, 12, 12), 2022 /* TRNSUM_CLR_FRC_VAL:13:13 */ 2023 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1412, 13, 13) 2024 }; 2025 static uint32_t BCMI_QSGMIIE_SERDES_DSC_SM_CTL2r_fields[] = 2026 { 2027 /* EEE_LFSR_CNT:0:12 */ 2028 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(738, 12, 0) 2029 }; 2030 static uint32_t BCMI_QSGMIIE_SERDES_DSC_SM_CTL3r_fields[] = 2031 { 2032 /* MEASURE_LFSR_CNT:0:12 */ 2033 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(957, 12, 0) 2034 }; 2035 static uint32_t BCMI_QSGMIIE_SERDES_DSC_SM_CTL4r_fields[] = 2036 { 2037 /* ACQ_CDR_TIMEOUT:0:4 */ 2038 PHYMOD_SYMBOL_FIELD_ENCODE(1, 4, 0), 2039 /* CDR_SETTLE_TIMEOUT:5:9 */ 2040 PHYMOD_SYMBOL_FIELD_ENCODE(411, 9, 5), 2041 /* HW_TUNE_TIMEOUT:10:14 */ 2042 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(817, 14, 10) 2043 }; 2044 static uint32_t BCMI_QSGMIIE_SERDES_DSC_SM_CTL5r_fields[] = 2045 { 2046 /* MEASURE_TIMEOUT:0:4 */ 2047 PHYMOD_SYMBOL_FIELD_ENCODE(958, 4, 0), 2048 /* EEE_ACQ_CDR_TIMEOUT:5:9 */ 2049 PHYMOD_SYMBOL_FIELD_ENCODE(734, 9, 5), 2050 /* EEE_CDR_SETTLE_TIMEOUT:10:14 */ 2051 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(736, 14, 10) 2052 }; 2053 static uint32_t BCMI_QSGMIIE_SERDES_DSC_SM_CTL6r_fields[] = 2054 { 2055 /* EEE_HW_TUNE_TIMEOUT:0:4 */ 2056 PHYMOD_SYMBOL_FIELD_ENCODE(737, 4, 0), 2057 /* EEE_ANA_PWR_TIMEOUT:10:14 */ 2058 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(735, 14, 10) 2059 }; 2060 static uint32_t BCMI_QSGMIIE_SERDES_DSC_SM_CTL7r_fields[] = 2061 { 2062 /* CDR_BWSEL_INTEG_ACQCDR:0:3 */ 2063 PHYMOD_SYMBOL_FIELD_ENCODE(391, 3, 0), 2064 /* CDR_BWSEL_INTEG_EEE_ACQCDR:4:7 */ 2065 PHYMOD_SYMBOL_FIELD_ENCODE(392, 7, 4), 2066 /* CDR_BWSEL_INTEG_NORM:8:11 */ 2067 PHYMOD_SYMBOL_FIELD_ENCODE(393, 11, 8), 2068 /* CDR_BWSEL_PROP_ACQCDR:12:13 */ 2069 PHYMOD_SYMBOL_FIELD_ENCODE(394, 13, 12), 2070 /* CDR_BWSEL_PROP_NORM:14:15 */ 2071 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(396, 15, 14) 2072 }; 2073 static uint32_t BCMI_QSGMIIE_SERDES_DSC_SM_CTL8r_fields[] = 2074 { 2075 /* PHASE_ERR_OFFSET:0:3 */ 2076 PHYMOD_SYMBOL_FIELD_ENCODE(1092, 3, 0), 2077 /* EEE_PHASE_ERR_OFFSET:4:7 */ 2078 PHYMOD_SYMBOL_FIELD_ENCODE(742, 7, 4), 2079 /* PHASE_ERR_OFFSET_EN:8:9 */ 2080 PHYMOD_SYMBOL_FIELD_ENCODE(1093, 9, 8), 2081 /* EEE_PHASE_ERR_OFFSET_EN:10:11 */ 2082 PHYMOD_SYMBOL_FIELD_ENCODE(743, 11, 10), 2083 /* CDR_BWSEL_PROP_EEE_ACQCDR:14:15 */ 2084 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(395, 15, 14) 2085 }; 2086 static uint32_t BCMI_QSGMIIE_SERDES_DSC_SM_CTL9r_fields[] = 2087 { 2088 /* RX_RESTART_PMD:0:0 */ 2089 PHYMOD_SYMBOL_FIELD_ENCODE(1305, 0, 0), 2090 /* RX_RESTART_PMD_HOLD:1:1 */ 2091 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1306, 1, 1) 2092 }; 2093 static uint32_t BCMI_QSGMIIE_SERDES_DSC_SM_STS_DSC_LOCKr_fields[] = 2094 { 2095 /* RX_DSC_LOCK:0:0 */ 2096 PHYMOD_SYMBOL_FIELD_ENCODE(1284, 0, 0), 2097 /* MEAS_INCOMPLETE:1:1 */ 2098 PHYMOD_SYMBOL_FIELD_ENCODE(959, 1, 1), 2099 /* EEE_MEASURE_CNT:7:15 */ 2100 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(739, 15, 7) 2101 }; 2102 static uint32_t BCMI_QSGMIIE_SERDES_DSC_SM_STS_DSC_STr_fields[] = 2103 { 2104 /* DSC_SM_SCRATCH:0:3 */ 2105 PHYMOD_SYMBOL_FIELD_ENCODE(725, 3, 0), 2106 /* DSC_SM_READY_FOR_CMD:4:4 */ 2107 PHYMOD_SYMBOL_FIELD_ENCODE(724, 4, 4), 2108 /* DSC_SM_GP_UC_REQ:5:10 */ 2109 PHYMOD_SYMBOL_FIELD_ENCODE(723, 10, 5), 2110 /* DSC_STATE:11:15 */ 2111 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(726, 15, 11) 2112 }; 2113 static uint32_t BCMI_QSGMIIE_SERDES_DSC_SM_STS_DSC_ST_EEE_ONE_HOTr_fields[] = 2114 { 2115 /* DSC_STATE_EEE_ONE_HOT:0:6 */ 2116 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(727, 6, 0) 2117 }; 2118 static uint32_t BCMI_QSGMIIE_SERDES_DSC_SM_STS_DSC_ST_ONE_HOTr_fields[] = 2119 { 2120 /* DSC_STATE_ONE_HOT:0:9 */ 2121 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(728, 9, 0) 2122 }; 2123 static uint32_t BCMI_QSGMIIE_SERDES_DSC_SM_STS_RESTARTr_fields[] = 2124 { 2125 /* RESTART_PI_EXT_MODE:0:0 */ 2126 PHYMOD_SYMBOL_FIELD_ENCODE(1220, 0, 0), 2127 /* RESTART_SIGDET:1:1 */ 2128 PHYMOD_SYMBOL_FIELD_ENCODE(1222, 1, 1), 2129 /* RESTART_PMD_RESTART:2:2 */ 2130 PHYMOD_SYMBOL_FIELD_ENCODE(1221, 2, 2), 2131 /* EEE_QUIET_FROM_EEE_STATES:3:3 */ 2132 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(744, 3, 3) 2133 }; 2134 static uint32_t BCMI_QSGMIIE_SERDES_DSC_TRNSUM_CTL1r_fields[] = 2135 { 2136 /* TRNSUM_TAP_RANGE_SEL:2:3 */ 2137 PHYMOD_SYMBOL_FIELD_ENCODE(1432, 3, 2), 2138 /* CDR_QPHASE_MULT_EN:4:4 */ 2139 PHYMOD_SYMBOL_FIELD_ENCODE(410, 4, 4), 2140 /* TRNSUM_EYE_CLOSURE_EN:5:5 */ 2141 PHYMOD_SYMBOL_FIELD_ENCODE(1416, 5, 5), 2142 /* TRNSUM_GAIN:6:7 */ 2143 PHYMOD_SYMBOL_FIELD_ENCODE(1421, 7, 6), 2144 /* TRNSUM_PATTERN_FULL_CHECK_OFF:9:9 */ 2145 PHYMOD_SYMBOL_FIELD_ENCODE(1429, 9, 9), 2146 /* TRNSUM_INV_PATTERN_EN:10:10 */ 2147 PHYMOD_SYMBOL_FIELD_ENCODE(1423, 10, 10), 2148 /* TRNSUM_RANDOM_TAPSEL_DISABLE:11:11 */ 2149 PHYMOD_SYMBOL_FIELD_ENCODE(1430, 11, 11), 2150 /* TRNSUM_ERR_SEL:12:14 */ 2151 PHYMOD_SYMBOL_FIELD_ENCODE(1415, 14, 12), 2152 /* TRNSUM_EN:15:15 */ 2153 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1413, 15, 15) 2154 }; 2155 static uint32_t BCMI_QSGMIIE_SERDES_DSC_TRNSUM_CTL2r_fields[] = 2156 { 2157 /* TRNSUM_PATTERN_BIT_EN:0:7 */ 2158 PHYMOD_SYMBOL_FIELD_ENCODE(1428, 7, 0), 2159 /* TRNSUM_PATTERN:8:15 */ 2160 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1427, 15, 8) 2161 }; 2162 static uint32_t BCMI_QSGMIIE_SERDES_DSC_TRNSUM_CTL3r_fields[] = 2163 { 2164 /* TRNSUM_TAP_SIGN:0:7 */ 2165 PHYMOD_SYMBOL_FIELD_ENCODE(1433, 7, 0), 2166 /* TRNSUM_TAP_EN:8:15 */ 2167 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1431, 15, 8) 2168 }; 2169 static uint32_t BCMI_QSGMIIE_SERDES_DSC_TRNSUM_CTL4r_fields[] = 2170 { 2171 /* TRNSUM_UNSIGNED_CORR:0:0 */ 2172 PHYMOD_SYMBOL_FIELD_ENCODE(1434, 0, 0), 2173 /* TRNSUM_UNSIGNED_FLIP:1:1 */ 2174 PHYMOD_SYMBOL_FIELD_ENCODE(1435, 1, 1), 2175 /* TDR_BIT_SEL:2:6 */ 2176 PHYMOD_SYMBOL_FIELD_ENCODE(1396, 6, 2), 2177 /* TDR_TRNSUM_EN:7:7 */ 2178 PHYMOD_SYMBOL_FIELD_ENCODE(1399, 7, 7), 2179 /* TDR_CYCLE_SEL:8:11 */ 2180 PHYMOD_SYMBOL_FIELD_ENCODE(1398, 11, 8), 2181 /* TDR_CYCLE_BIN:12:15 */ 2182 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1397, 15, 12) 2183 }; 2184 static uint32_t BCMI_QSGMIIE_SERDES_DSC_TRNSUM_CTL5r_fields[] = 2185 { 2186 /* SEND_LMS_TO_PCS:14:14 */ 2187 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1336, 14, 14) 2188 }; 2189 static uint32_t BCMI_QSGMIIE_SERDES_DSC_TRNSUM_STS1r_fields[] = 2190 { 2191 /* TRNSUM_E_HIGH:0:15 */ 2192 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1417, 15, 0) 2193 }; 2194 static uint32_t BCMI_QSGMIIE_SERDES_DSC_TRNSUM_STS2r_fields[] = 2195 { 2196 /* TRNSUM_E_LOW:0:7 */ 2197 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1418, 7, 0) 2198 }; 2199 static uint32_t BCMI_QSGMIIE_SERDES_DSC_TRNSUM_STS3r_fields[] = 2200 { 2201 /* TRNSUM_O_HIGH:0:15 */ 2202 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1425, 15, 0) 2203 }; 2204 static uint32_t BCMI_QSGMIIE_SERDES_DSC_TRNSUM_STS4r_fields[] = 2205 { 2206 /* TRNSUM_O_LOW:0:7 */ 2207 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1426, 7, 0) 2208 }; 2209 static uint32_t BCMI_QSGMIIE_SERDES_DSC_TRNSUM_STS5r_fields[] = 2210 { 2211 /* TRNSUM_HIGH:0:15 */ 2212 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1422, 15, 0) 2213 }; 2214 static uint32_t BCMI_QSGMIIE_SERDES_DSC_TRNSUM_STS6r_fields[] = 2215 { 2216 /* TRNSUM_LOW:0:9 */ 2217 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1424, 9, 0) 2218 }; 2219 static uint32_t BCMI_QSGMIIE_SERDES_DSC_UC_CTLr_fields[] = 2220 { 2221 /* UC_DSC_GP_UC_REQ:0:5 */ 2222 PHYMOD_SYMBOL_FIELD_ENCODE(1543, 5, 0), 2223 /* UC_DSC_ERROR_FOUND:6:6 */ 2224 PHYMOD_SYMBOL_FIELD_ENCODE(1542, 6, 6), 2225 /* UC_DSC_READY_FOR_CMD:7:7 */ 2226 PHYMOD_SYMBOL_FIELD_ENCODE(1544, 7, 7), 2227 /* UC_DSC_SUPP_INFO:8:15 */ 2228 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1546, 15, 8) 2229 }; 2230 static uint32_t BCMI_QSGMIIE_SERDES_DSC_VGA_CTLr_fields[] = 2231 { 2232 /* VGA_P1_ACC_CLR:0:0 */ 2233 PHYMOD_SYMBOL_FIELD_ENCODE(1564, 0, 0), 2234 /* VGA_ACC_HYS_EN:1:1 */ 2235 PHYMOD_SYMBOL_FIELD_ENCODE(1556, 1, 1), 2236 /* VGA_TABLEMAP_DISABLE:2:2 */ 2237 PHYMOD_SYMBOL_FIELD_ENCODE(1568, 2, 2), 2238 /* VGA_UPDATE_GAIN:6:7 */ 2239 PHYMOD_SYMBOL_FIELD_ENCODE(1569, 7, 6), 2240 /* VGA_INV_P1:8:8 */ 2241 PHYMOD_SYMBOL_FIELD_ENCODE(1563, 8, 8), 2242 /* VGA_INV_M1:9:9 */ 2243 PHYMOD_SYMBOL_FIELD_ENCODE(1562, 9, 9), 2244 /* VGA_ERR_GAIN:10:11 */ 2245 PHYMOD_SYMBOL_FIELD_ENCODE(1560, 11, 10), 2246 /* VGA_P1_GRADIENT_INVERT:12:12 */ 2247 PHYMOD_SYMBOL_FIELD_ENCODE(1565, 12, 12), 2248 /* VGA_ERR_SEL:13:14 */ 2249 PHYMOD_SYMBOL_FIELD_ENCODE(1561, 14, 13), 2250 /* VGA_EN:15:15 */ 2251 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1559, 15, 15) 2252 }; 2253 static uint32_t BCMI_QSGMIIE_SERDES_DSC_VGA_P1EYEDIAG_STSr_fields[] = 2254 { 2255 /* VGA_BIN:0:5 */ 2256 PHYMOD_SYMBOL_FIELD_ENCODE(1557, 5, 0), 2257 /* P1_EYEDIAG_BIN:8:13 */ 2258 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1040, 13, 8) 2259 }; 2260 static uint32_t BCMI_QSGMIIE_SERDES_DSC_VGA_PAT_EYEDIAG_CTLr_fields[] = 2261 { 2262 /* VGA_PATTERN:0:3 */ 2263 PHYMOD_SYMBOL_FIELD_ENCODE(1566, 3, 0), 2264 /* VGA_PATTERN_BIT_EN:4:7 */ 2265 PHYMOD_SYMBOL_FIELD_ENCODE(1567, 7, 4), 2266 /* P1_EYEDIAG_EN:15:15 */ 2267 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1041, 15, 15) 2268 }; 2269 static uint32_t BCMI_QSGMIIE_SERDES_DSC_VGA_TAP_BINr_fields[] = 2270 { 2271 /* VGA_CTRL_BIN:0:4 */ 2272 PHYMOD_SYMBOL_FIELD_ENCODE(1558, 4, 0), 2273 /* VGA3_CTRL_BIN:8:11 */ 2274 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1555, 11, 8) 2275 }; 2276 static uint32_t BCMI_QSGMIIE_SERDES_ILKN_CTL0r_fields[] = 2277 { 2278 /* WM:0:2 */ 2279 PHYMOD_SYMBOL_FIELD_ENCODE(1575, 2, 0), 2280 /* ILKN_SEL:3:3 */ 2281 PHYMOD_SYMBOL_FIELD_ENCODE(825, 3, 3), 2282 /* INV_TX_ORDER:6:6 */ 2283 PHYMOD_SYMBOL_FIELD_ENCODE(832, 6, 6), 2284 /* INV_RX_ORDER:7:7 */ 2285 PHYMOD_SYMBOL_FIELD_ENCODE(831, 7, 7), 2286 /* SOFT_RST_TX:8:8 */ 2287 PHYMOD_SYMBOL_FIELD_ENCODE(1369, 8, 8), 2288 /* SOFT_RST_RX:9:9 */ 2289 PHYMOD_SYMBOL_FIELD_ENCODE(1368, 9, 9), 2290 /* CREDIT_EN:15:15 */ 2291 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(601, 15, 15) 2292 }; 2293 static uint32_t BCMI_QSGMIIE_SERDES_ILKN_STS0r_fields[] = 2294 { 2295 /* RXFIFO_EMPTY:0:0 */ 2296 PHYMOD_SYMBOL_FIELD_ENCODE(1269, 0, 0), 2297 /* RXFIFO_FULL:1:1 */ 2298 PHYMOD_SYMBOL_FIELD_ENCODE(1271, 1, 1), 2299 /* RXFIFO_OVERRUN:2:2 */ 2300 PHYMOD_SYMBOL_FIELD_ENCODE(1272, 2, 2), 2301 /* RXFIFO_UNDERRUN:3:3 */ 2302 PHYMOD_SYMBOL_FIELD_ENCODE(1273, 3, 3), 2303 /* TXFIFO_EMPTY:4:4 */ 2304 PHYMOD_SYMBOL_FIELD_ENCODE(1437, 4, 4), 2305 /* TXFIFO_FULL:5:5 */ 2306 PHYMOD_SYMBOL_FIELD_ENCODE(1439, 5, 5), 2307 /* TXFIFO_OVERRUN:6:6 */ 2308 PHYMOD_SYMBOL_FIELD_ENCODE(1440, 6, 6), 2309 /* TXFIFO_UNDERRUN:7:7 */ 2310 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1441, 7, 7) 2311 }; 2312 static uint32_t BCMI_QSGMIIE_SERDES_LANECTRL0r_fields[] = 2313 { 2314 /* CL36_PCS_EN_TX:0:3 */ 2315 PHYMOD_SYMBOL_FIELD_ENCODE(422, 3, 0), 2316 /* CL36_PCS_EN_RX:4:7 */ 2317 PHYMOD_SYMBOL_FIELD_ENCODE(421, 7, 4), 2318 /* QSGMII_EN_TX:8:11 */ 2319 PHYMOD_SYMBOL_FIELD_ENCODE(1196, 11, 8), 2320 /* QSGMII_EN_RX:12:15 */ 2321 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1195, 15, 12) 2322 }; 2323 static uint32_t BCMI_QSGMIIE_SERDES_LANECTRL2r_fields[] = 2324 { 2325 /* GLOOP1G:0:3 */ 2326 PHYMOD_SYMBOL_FIELD_ENCODE(801, 3, 0), 2327 /* RLOOP1G:4:7 */ 2328 PHYMOD_SYMBOL_FIELD_ENCODE(1253, 7, 4), 2329 /* EDEN1G:8:11 */ 2330 PHYMOD_SYMBOL_FIELD_ENCODE(733, 11, 8), 2331 /* CDET_EN1G:12:15 */ 2332 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(390, 15, 12) 2333 }; 2334 static uint32_t BCMI_QSGMIIE_SERDES_LANECTRL3r_fields[] = 2335 { 2336 /* PWRDWN_RX:0:3 */ 2337 PHYMOD_SYMBOL_FIELD_ENCODE(1187, 3, 0), 2338 /* PWRDWN_TX:4:7 */ 2339 PHYMOD_SYMBOL_FIELD_ENCODE(1189, 7, 4), 2340 /* PWRDWN_PLL:8:8 */ 2341 PHYMOD_SYMBOL_FIELD_ENCODE(1186, 8, 8), 2342 /* PWRDWN10G_PLL_DIS:9:9 */ 2343 PHYMOD_SYMBOL_FIELD_ENCODE(1184, 9, 9), 2344 /* LOCK_REF_EN:10:10 */ 2345 PHYMOD_SYMBOL_FIELD_ENCODE(893, 10, 10), 2346 /* PWRDWN_FORCE:11:11 */ 2347 PHYMOD_SYMBOL_FIELD_ENCODE(1185, 11, 11), 2348 /* LOCK_REF_R:12:15 */ 2349 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(894, 15, 12) 2350 }; 2351 static uint32_t BCMI_QSGMIIE_SERDES_MAIN0_DEVINPKG5r_fields[] = 2352 { 2353 /* CLAUSE22:0:0 */ 2354 PHYMOD_SYMBOL_FIELD_ENCODE(566, 0, 0), 2355 /* PMA_PMD:1:1 */ 2356 PHYMOD_SYMBOL_FIELD_ENCODE(1125, 1, 1), 2357 /* WIS:2:2 */ 2358 PHYMOD_SYMBOL_FIELD_ENCODE(1574, 2, 2), 2359 /* PCS_XS:3:3 */ 2360 PHYMOD_SYMBOL_FIELD_ENCODE(1077, 3, 3), 2361 /* PHY_XS:4:4 */ 2362 PHYMOD_SYMBOL_FIELD_ENCODE(1095, 4, 4), 2363 /* DTE_XS:5:5 */ 2364 PHYMOD_SYMBOL_FIELD_ENCODE(729, 5, 5), 2365 /* TC:6:6 */ 2366 PHYMOD_SYMBOL_FIELD_ENCODE(1395, 6, 6), 2367 /* AN:7:7 */ 2368 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(201, 7, 7) 2369 }; 2370 static uint32_t BCMI_QSGMIIE_SERDES_MAIN0_LN_SWPr_fields[] = 2371 { 2372 /* LOG0_TO_PHY_LNSWAP_SEL:0:1 */ 2373 PHYMOD_SYMBOL_FIELD_ENCODE(895, 1, 0), 2374 /* LOG1_TO_PHY_LNSWAP_SEL:2:3 */ 2375 PHYMOD_SYMBOL_FIELD_ENCODE(896, 3, 2), 2376 /* LOG2_TO_PHY_LNSWAP_SEL:4:5 */ 2377 PHYMOD_SYMBOL_FIELD_ENCODE(897, 5, 4), 2378 /* LOG3_TO_PHY_LNSWAP_SEL:6:7 */ 2379 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(898, 7, 6) 2380 }; 2381 static uint32_t BCMI_QSGMIIE_SERDES_MAIN0_LPBK_CTLr_fields[] = 2382 { 2383 /* LOCAL_PCS_LOOPBACK_ENABLE:4:7 */ 2384 PHYMOD_SYMBOL_FIELD_ENCODE(892, 7, 4), 2385 /* REMOTE_PMD_LOOPBACK_ENABLE:8:11 */ 2386 PHYMOD_SYMBOL_FIELD_ENCODE(1207, 11, 8), 2387 /* REMOTE_PCS_LOOPBACK_ENABLE:12:15 */ 2388 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1206, 15, 12) 2389 }; 2390 static uint32_t BCMI_QSGMIIE_SERDES_MAIN0_MDIO_BCSTr_fields[] = 2391 { 2392 /* MULTIPRTS_EN:7:10 */ 2393 PHYMOD_SYMBOL_FIELD_ENCODE(1018, 10, 7), 2394 /* PRTAD_BCST:11:15 */ 2395 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1179, 15, 11) 2396 }; 2397 static uint32_t BCMI_QSGMIIE_SERDES_MAIN0_MISCr_fields[] = 2398 { 2399 /* CL82_MLD_PHYS_MAP:7:8 */ 2400 PHYMOD_SYMBOL_FIELD_ENCODE(557, 8, 7), 2401 /* CL82_MULTI_PIPE_MODE:9:10 */ 2402 PHYMOD_SYMBOL_FIELD_ENCODE(558, 10, 9), 2403 /* CL49_LOW_LATENCY_EN:11:11 */ 2404 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(471, 11, 11) 2405 }; 2406 static uint32_t BCMI_QSGMIIE_SERDES_MAIN0_SERDESIDr_fields[] = 2407 { 2408 /* MODEL_NUMBER:0:5 */ 2409 PHYMOD_SYMBOL_FIELD_ENCODE(1013, 5, 0), 2410 /* TECH_PROC:6:8 */ 2411 PHYMOD_SYMBOL_FIELD_ENCODE(1401, 8, 6), 2412 /* BONDING:9:10 */ 2413 PHYMOD_SYMBOL_FIELD_ENCODE(355, 10, 9), 2414 /* REV_NUMBER:11:13 */ 2415 PHYMOD_SYMBOL_FIELD_ENCODE(1239, 13, 11), 2416 /* REV_LETTER:14:15 */ 2417 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1238, 15, 14) 2418 }; 2419 static uint32_t BCMI_QSGMIIE_SERDES_MAIN0_SETUPr_fields[] = 2420 { 2421 /* STAND_ALONE_MODE:2:2 */ 2422 PHYMOD_SYMBOL_FIELD_ENCODE(1374, 2, 2), 2423 /* SINGLE_PORT_MODE:3:3 */ 2424 PHYMOD_SYMBOL_FIELD_ENCODE(1365, 3, 3), 2425 /* PORT_MODE_SEL:4:6 */ 2426 PHYMOD_SYMBOL_FIELD_ENCODE(1149, 6, 4), 2427 /* MASTER_PORT_NUM:8:9 */ 2428 PHYMOD_SYMBOL_FIELD_ENCODE(939, 9, 8), 2429 /* PLL_RESET_EN:10:10 */ 2430 PHYMOD_SYMBOL_FIELD_ENCODE(1119, 10, 10), 2431 /* CL73_LOW_VCO:11:11 */ 2432 PHYMOD_SYMBOL_FIELD_ENCODE(544, 11, 11), 2433 /* CL37_HIGH_VCO:12:12 */ 2434 PHYMOD_SYMBOL_FIELD_ENCODE(435, 12, 12), 2435 /* REFCLK_SEL:13:15 */ 2436 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1199, 15, 13) 2437 }; 2438 static uint32_t BCMI_QSGMIIE_SERDES_MAIN0_SYNCE_CTLr_fields[] = 2439 { 2440 /* SYNCE_MODE_PHY_LN0:0:1 */ 2441 PHYMOD_SYMBOL_FIELD_ENCODE(1386, 1, 0), 2442 /* SYNCE_MODE_PHY_LN1:2:3 */ 2443 PHYMOD_SYMBOL_FIELD_ENCODE(1387, 3, 2), 2444 /* SYNCE_MODE_PHY_LN2:4:5 */ 2445 PHYMOD_SYMBOL_FIELD_ENCODE(1388, 5, 4), 2446 /* SYNCE_MODE_PHY_LN3:6:7 */ 2447 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1389, 7, 6) 2448 }; 2449 static uint32_t BCMI_QSGMIIE_SERDES_MAIN0_TICK_CTL0r_fields[] = 2450 { 2451 /* TICK_DENOMINATOR:2:11 */ 2452 PHYMOD_SYMBOL_FIELD_ENCODE(1402, 11, 2), 2453 /* TICK_NUMERATOR_LOWER:12:15 */ 2454 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1403, 15, 12) 2455 }; 2456 static uint32_t BCMI_QSGMIIE_SERDES_MAIN0_TICK_CTL1r_fields[] = 2457 { 2458 /* TICK_NUMERATOR_UPPER:0:14 */ 2459 PHYMOD_SYMBOL_FIELD_ENCODE(1404, 14, 0), 2460 /* TICK_OVERRIDE:15:15 */ 2461 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1405, 15, 15) 2462 }; 2463 static uint32_t BCMI_QSGMIIE_SERDES_MDIO_AERr_fields[] = 2464 { 2465 /* MDIO_AER:0:15 */ 2466 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(942, 15, 0) 2467 }; 2468 static uint32_t BCMI_QSGMIIE_SERDES_MDIO_BCST_PORT_ADDRr_fields[] = 2469 { 2470 /* MDIO_BRCST_PORT_ADDR:0:4 */ 2471 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(944, 4, 0) 2472 }; 2473 static uint32_t BCMI_QSGMIIE_SERDES_MDIO_BLK_ADDRr_fields[] = 2474 { 2475 /* MDIO_BLK_ADDR:4:14 */ 2476 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(943, 14, 4) 2477 }; 2478 static uint32_t BCMI_QSGMIIE_SERDES_MDIO_MASKDATAr_fields[] = 2479 { 2480 /* MDIO_MASKDATA:0:15 */ 2481 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(954, 15, 0) 2482 }; 2483 static uint32_t BCMI_QSGMIIE_SERDES_MDIO_MMD_SELr_fields[] = 2484 { 2485 /* MDIO_DEV_CL22_EN:0:0 */ 2486 PHYMOD_SYMBOL_FIELD_ENCODE(948, 0, 0), 2487 /* MDIO_DEV_PMD_EN:2:2 */ 2488 PHYMOD_SYMBOL_FIELD_ENCODE(952, 2, 2), 2489 /* MDIO_DEV_AN_EN:3:3 */ 2490 PHYMOD_SYMBOL_FIELD_ENCODE(947, 3, 3), 2491 /* MDIO_DEV_PHY_EN:4:4 */ 2492 PHYMOD_SYMBOL_FIELD_ENCODE(951, 4, 4), 2493 /* MDIO_DEV_DTE_EN:5:5 */ 2494 PHYMOD_SYMBOL_FIELD_ENCODE(949, 5, 5), 2495 /* MDIO_DEV_PCS_EN:6:6 */ 2496 PHYMOD_SYMBOL_FIELD_ENCODE(950, 6, 6), 2497 /* MDIO_MULTI_MMDS_EN:14:14 */ 2498 PHYMOD_SYMBOL_FIELD_ENCODE(955, 14, 14), 2499 /* MDIO_MULTI_PRTS_EN:15:15 */ 2500 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(956, 15, 15) 2501 }; 2502 static uint32_t BCMI_QSGMIIE_SERDES_MEM_ECC_CORRUPTr_fields[] = 2503 { 2504 /* DESKEW_ECC_CORRUPT:0:1 */ 2505 PHYMOD_SYMBOL_FIELD_ENCODE(631, 1, 0), 2506 /* RFEC0_ECC_CORRUPT:2:3 */ 2507 PHYMOD_SYMBOL_FIELD_ENCODE(1244, 3, 2), 2508 /* RFEC1_ECC_CORRUPT:4:5 */ 2509 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1250, 5, 4) 2510 }; 2511 static uint32_t BCMI_QSGMIIE_SERDES_MEM_ECC_DESKEW_STSr_fields[] = 2512 { 2513 /* DESKEW_ADDRESS:0:6 */ 2514 PHYMOD_SYMBOL_FIELD_ENCODE(629, 6, 0), 2515 /* DESKEW_2BIT_ERROR:14:14 */ 2516 PHYMOD_SYMBOL_FIELD_ENCODE(628, 14, 14), 2517 /* DESKEW_1BIT_ERROR:15:15 */ 2518 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(627, 15, 15) 2519 }; 2520 static uint32_t BCMI_QSGMIIE_SERDES_MEM_ECC_DISr_fields[] = 2521 { 2522 /* DESKEW_DISABLE_ECC:0:0 */ 2523 PHYMOD_SYMBOL_FIELD_ENCODE(630, 0, 0), 2524 /* RFEC0_DISABLE_ECC:1:1 */ 2525 PHYMOD_SYMBOL_FIELD_ENCODE(1243, 1, 1), 2526 /* RFEC1_DISABLE_ECC:2:2 */ 2527 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1249, 2, 2) 2528 }; 2529 static uint32_t BCMI_QSGMIIE_SERDES_MEM_ECC_INT_1BITr_fields[] = 2530 { 2531 /* INT_1B:0:3 */ 2532 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(826, 3, 0) 2533 }; 2534 static uint32_t BCMI_QSGMIIE_SERDES_MEM_ECC_INT_2BITr_fields[] = 2535 { 2536 /* INT_2B:0:3 */ 2537 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(827, 3, 0) 2538 }; 2539 static uint32_t BCMI_QSGMIIE_SERDES_MEM_ECC_MSK_1BITr_fields[] = 2540 { 2541 /* MSK_1B:0:3 */ 2542 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1015, 3, 0) 2543 }; 2544 static uint32_t BCMI_QSGMIIE_SERDES_MEM_ECC_MSK_2BITr_fields[] = 2545 { 2546 /* MSK_2B:0:3 */ 2547 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1016, 3, 0) 2548 }; 2549 static uint32_t BCMI_QSGMIIE_SERDES_MEM_ECC_RFEC0_STSr_fields[] = 2550 { 2551 /* RFEC0_ADDRESS:0:7 */ 2552 PHYMOD_SYMBOL_FIELD_ENCODE(1242, 7, 0), 2553 /* RFEC0_2BIT_ERROR:14:14 */ 2554 PHYMOD_SYMBOL_FIELD_ENCODE(1241, 14, 14), 2555 /* RFEC0_1BIT_ERROR:15:15 */ 2556 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1240, 15, 15) 2557 }; 2558 static uint32_t BCMI_QSGMIIE_SERDES_MEM_ECC_RFEC1_STSr_fields[] = 2559 { 2560 /* RFEC1_ADDRESS:0:7 */ 2561 PHYMOD_SYMBOL_FIELD_ENCODE(1248, 7, 0), 2562 /* RFEC1_2BIT_ERROR:14:14 */ 2563 PHYMOD_SYMBOL_FIELD_ENCODE(1247, 14, 14), 2564 /* RFEC1_1BIT_ERROR:15:15 */ 2565 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1246, 15, 15) 2566 }; 2567 static uint32_t BCMI_QSGMIIE_SERDES_MEM_TM_DESKEWr_fields[] = 2568 { 2569 /* DESKEW_TM:0:11 */ 2570 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(637, 11, 0) 2571 }; 2572 static uint32_t BCMI_QSGMIIE_SERDES_MEM_TM_RFEC0r_fields[] = 2573 { 2574 /* RFEC0_TM:0:11 */ 2575 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1245, 11, 0) 2576 }; 2577 static uint32_t BCMI_QSGMIIE_SERDES_MEM_TM_RFEC1r_fields[] = 2578 { 2579 /* RFEC1_TM:0:11 */ 2580 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1251, 11, 0) 2581 }; 2582 static uint32_t BCMI_QSGMIIE_SERDES_MIICONTROLr_fields[] = 2583 { 2584 /* FORCE_2500:5:5 */ 2585 PHYMOD_SYMBOL_FIELD_ENCODE(780, 5, 5), 2586 /* MANUAL_SPEED_1:6:6 */ 2587 PHYMOD_SYMBOL_FIELD_ENCODE(937, 6, 6), 2588 /* COLLISION_TEST_EN:7:7 */ 2589 PHYMOD_SYMBOL_FIELD_ENCODE(583, 7, 7), 2590 /* MANUAL_FULL_DUPLEX:8:8 */ 2591 PHYMOD_SYMBOL_FIELD_ENCODE(935, 8, 8), 2592 /* RESTART_AUTONEG:9:9 */ 2593 PHYMOD_SYMBOL_FIELD_ENCODE(1219, 9, 9), 2594 /* PWRDWN_SW:11:11 */ 2595 PHYMOD_SYMBOL_FIELD_ENCODE(1188, 11, 11), 2596 /* AUTONEG_ENABLE:12:12 */ 2597 PHYMOD_SYMBOL_FIELD_ENCODE(306, 12, 12), 2598 /* MANUAL_SPEED_0:13:13 */ 2599 PHYMOD_SYMBOL_FIELD_ENCODE(936, 13, 13), 2600 /* LOOPBACK:14:14 */ 2601 PHYMOD_SYMBOL_FIELD_ENCODE(899, 14, 14), 2602 /* RST_SW:15:15 */ 2603 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1266, 15, 15) 2604 }; 2605 static uint32_t BCMI_QSGMIIE_SERDES_MIISTATUSr_fields[] = 2606 { 2607 /* EXTENDED_CAPABILITY:0:0 */ 2608 PHYMOD_SYMBOL_FIELD_ENCODE(766, 0, 0), 2609 /* JABBER_DETECT:1:1 */ 2610 PHYMOD_SYMBOL_FIELD_ENCODE(834, 1, 1), 2611 /* LINK_STATUS:2:2 */ 2612 PHYMOD_SYMBOL_FIELD_ENCODE(871, 2, 2), 2613 /* AUTONEG_ABILITY:3:3 */ 2614 PHYMOD_SYMBOL_FIELD_ENCODE(304, 3, 3), 2615 /* REMOTE_FAULT:4:4 */ 2616 PHYMOD_SYMBOL_FIELD_ENCODE(1202, 4, 4), 2617 /* AUTONEG_COMPLETE:5:5 */ 2618 PHYMOD_SYMBOL_FIELD_ENCODE(305, 5, 5), 2619 /* MF_PREAMBLE_SUPRESSION:6:6 */ 2620 PHYMOD_SYMBOL_FIELD_ENCODE(960, 6, 6), 2621 /* EXTENDED_STATUS:8:8 */ 2622 PHYMOD_SYMBOL_FIELD_ENCODE(767, 8, 8), 2623 /* CAP_100BASET2_HALF_DUPLEX:9:9 */ 2624 PHYMOD_SYMBOL_FIELD_ENCODE(368, 9, 9), 2625 /* CAP_100BASET2_FULL_DUPLEX:10:10 */ 2626 PHYMOD_SYMBOL_FIELD_ENCODE(367, 10, 10), 2627 /* CAP_10BASET_HALF_DUPLEX:11:11 */ 2628 PHYMOD_SYMBOL_FIELD_ENCODE(373, 11, 11), 2629 /* CAP_10BASET_FULL_DUPLEX:12:12 */ 2630 PHYMOD_SYMBOL_FIELD_ENCODE(372, 12, 12), 2631 /* CAP_100BASEX_HALF_DUPLEX:13:13 */ 2632 PHYMOD_SYMBOL_FIELD_ENCODE(370, 13, 13), 2633 /* CAP_100BASEX_FULL_DUPLEX:14:14 */ 2634 PHYMOD_SYMBOL_FIELD_ENCODE(369, 14, 14), 2635 /* CAP_100BASE_T4:15:15 */ 2636 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(371, 15, 15) 2637 }; 2638 static uint32_t BCMI_QSGMIIE_SERDES_MISC1r_fields[] = 2639 { 2640 /* FORCE_SPEED:0:3 */ 2641 PHYMOD_SYMBOL_FIELD_ENCODE(785, 3, 0), 2642 /* FORCE_SPEED_SEL:4:4 */ 2643 PHYMOD_SYMBOL_FIELD_ENCODE(786, 4, 4), 2644 /* FORCE_LN_MODE:5:5 */ 2645 PHYMOD_SYMBOL_FIELD_ENCODE(782, 5, 5), 2646 /* TX_UNDERRUN_1000_DIS:6:6 */ 2647 PHYMOD_SYMBOL_FIELD_ENCODE(1531, 6, 6), 2648 /* FORCE_TICK0_SW2:7:7 */ 2649 PHYMOD_SYMBOL_FIELD_ENCODE(787, 7, 7), 2650 /* FORCE_PLL_MODE_AFE:8:11 */ 2651 PHYMOD_SYMBOL_FIELD_ENCODE(783, 11, 8), 2652 /* FORCE_PLL_MODE_AFE_SEL:12:12 */ 2653 PHYMOD_SYMBOL_FIELD_ENCODE(784, 12, 12), 2654 /* REFCLK_SEL:13:15 */ 2655 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1199, 15, 13) 2656 }; 2657 static uint32_t BCMI_QSGMIIE_SERDES_MISC2r_fields[] = 2658 { 2659 /* AN_DEADTRAP:0:0 */ 2660 PHYMOD_SYMBOL_FIELD_ENCODE(205, 0, 0), 2661 /* AN_TXDISABLE_LN:1:1 */ 2662 PHYMOD_SYMBOL_FIELD_ENCODE(302, 1, 1), 2663 /* AN_RXSEQSTARTDIS:2:2 */ 2664 PHYMOD_SYMBOL_FIELD_ENCODE(257, 2, 2), 2665 /* AN_TXDISABLEPHASE:3:3 */ 2666 PHYMOD_SYMBOL_FIELD_ENCODE(301, 3, 3), 2667 /* FIFO_ERR_CYA:4:4 */ 2668 PHYMOD_SYMBOL_FIELD_ENCODE(779, 4, 4), 2669 /* PMA_PMD_FORCED_SPEED_ENC_EN:5:5 */ 2670 PHYMOD_SYMBOL_FIELD_ENCODE(1126, 5, 5), 2671 /* KX_CL73_AN_EN:6:6 */ 2672 PHYMOD_SYMBOL_FIELD_ENCODE(836, 6, 6), 2673 /* MIIGMIIMUX_EN:7:7 */ 2674 PHYMOD_SYMBOL_FIELD_ENCODE(1010, 7, 7), 2675 /* MIIGMIIDLY_EN:8:8 */ 2676 PHYMOD_SYMBOL_FIELD_ENCODE(1009, 8, 8), 2677 /* CLK41_BYPASS:9:9 */ 2678 PHYMOD_SYMBOL_FIELD_ENCODE(568, 9, 9), 2679 /* CLKSIGDET_BYPASS:10:10 */ 2680 PHYMOD_SYMBOL_FIELD_ENCODE(569, 10, 10), 2681 /* RLPBK_RXRST_EN:11:11 */ 2682 PHYMOD_SYMBOL_FIELD_ENCODE(1254, 11, 11), 2683 /* RLPBK_SW_FORCE:12:12 */ 2684 PHYMOD_SYMBOL_FIELD_ENCODE(1255, 12, 12), 2685 /* RXCK_MII_GEN_SEL:13:13 */ 2686 PHYMOD_SYMBOL_FIELD_ENCODE(1268, 13, 13), 2687 /* LFCK_MII_GEN_SEL:14:14 */ 2688 PHYMOD_SYMBOL_FIELD_ENCODE(862, 14, 14), 2689 /* RXCKPL_SEL_COMBO:15:15 */ 2690 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1267, 15, 15) 2691 }; 2692 static uint32_t BCMI_QSGMIIE_SERDES_MISCCONTROL1r_fields[] = 2693 { 2694 /* IEEE_BLKSEL_VAL_0:0:0 */ 2695 PHYMOD_SYMBOL_FIELD_ENCODE(820, 0, 0), 2696 /* IEEE_BLKSEL_AUTODET:1:1 */ 2697 PHYMOD_SYMBOL_FIELD_ENCODE(819, 1, 1), 2698 /* INVERT_RX_SIGDET:2:2 */ 2699 PHYMOD_SYMBOL_FIELD_ENCODE(829, 2, 2), 2700 /* PARDET10G_PWRDNLINK_EN:3:3 */ 2701 PHYMOD_SYMBOL_FIELD_ENCODE(1046, 3, 3), 2702 /* FORCE_DIV5_FOR_LXCK25:4:4 */ 2703 PHYMOD_SYMBOL_FIELD_ENCODE(781, 4, 4), 2704 /* IEEE_BLKSEL_VAL_1:5:5 */ 2705 PHYMOD_SYMBOL_FIELD_ENCODE(821, 5, 5), 2706 /* LATCH_LINKDOWN_ENABLE:6:6 */ 2707 PHYMOD_SYMBOL_FIELD_ENCODE(856, 6, 6), 2708 /* CLEAR_LINKDOWN:7:7 */ 2709 PHYMOD_SYMBOL_FIELD_ENCODE(567, 7, 7), 2710 /* AN_DEV_EN_OVERRIDE:8:8 */ 2711 PHYMOD_SYMBOL_FIELD_ENCODE(206, 8, 8), 2712 /* PMD_DEV_EN_OVERRIDE:9:9 */ 2713 PHYMOD_SYMBOL_FIELD_ENCODE(1129, 9, 9), 2714 /* PCS_DEV_EN_OVERRIDE:10:10 */ 2715 PHYMOD_SYMBOL_FIELD_ENCODE(1076, 10, 10), 2716 /* GLOBAL_PMD_TX_DISABLE:11:11 */ 2717 PHYMOD_SYMBOL_FIELD_ENCODE(800, 11, 11), 2718 /* PMD_LANE0_TX_DISABLE:12:12 */ 2719 PHYMOD_SYMBOL_FIELD_ENCODE(1130, 12, 12), 2720 /* PMD_LANE1_TX_DISABLE:13:13 */ 2721 PHYMOD_SYMBOL_FIELD_ENCODE(1131, 13, 13), 2722 /* PMD_LANE2_TX_DISABLE:14:14 */ 2723 PHYMOD_SYMBOL_FIELD_ENCODE(1132, 14, 14), 2724 /* PMD_LANE3_TX_DISABLE:15:15 */ 2725 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1133, 15, 15) 2726 }; 2727 static uint32_t BCMI_QSGMIIE_SERDES_MISC_CL72_EN_MASKr_fields[] = 2728 { 2729 /* CL72_EN_MASK:0:15 */ 2730 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(496, 15, 0) 2731 }; 2732 static uint32_t BCMI_QSGMIIE_SERDES_MISC_SCRMBLR_CTLr_fields[] = 2733 { 2734 /* SCRAMBLER_EN_MASK:0:4 */ 2735 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1309, 4, 0) 2736 }; 2737 static uint32_t BCMI_QSGMIIE_SERDES_MISC_TX_RATE_MISMATCHr_fields[] = 2738 { 2739 /* TX_LANE_RATE_MISMATCH:0:3 */ 2740 PHYMOD_SYMBOL_FIELD_ENCODE(1481, 3, 0), 2741 /* TX_LANE_RATE_MISMATCH_VL1:4:7 */ 2742 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1482, 7, 4) 2743 }; 2744 static uint32_t BCMI_QSGMIIE_SERDES_MISC_XGXSSTS0r_fields[] = 2745 { 2746 /* SKEW_STATUS:0:0 */ 2747 PHYMOD_SYMBOL_FIELD_ENCODE(1366, 0, 0), 2748 /* STATUS_EN:15:15 */ 2749 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1376, 15, 15) 2750 }; 2751 static uint32_t BCMI_QSGMIIE_SERDES_PATGEN_RXPKTCNT_Lr_fields[] = 2752 { 2753 /* RXPKTCNT_L:0:15 */ 2754 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1274, 15, 0) 2755 }; 2756 static uint32_t BCMI_QSGMIIE_SERDES_PATGEN_RXPKTCNT_Ur_fields[] = 2757 { 2758 /* RXPKTCNT_U:0:15 */ 2759 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1275, 15, 0) 2760 }; 2761 static uint32_t BCMI_QSGMIIE_SERDES_PATGEN_SEQ0r_fields[] = 2762 { 2763 /* PATT_GEN_SEQ_0:0:15 */ 2764 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1049, 15, 0) 2765 }; 2766 static uint32_t BCMI_QSGMIIE_SERDES_PATGEN_SEQ1r_fields[] = 2767 { 2768 /* PATT_GEN_SEQ_1:0:15 */ 2769 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1050, 15, 0) 2770 }; 2771 static uint32_t BCMI_QSGMIIE_SERDES_PATGEN_SEQ2r_fields[] = 2772 { 2773 /* PATT_GEN_SEQ_2:0:15 */ 2774 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1056, 15, 0) 2775 }; 2776 static uint32_t BCMI_QSGMIIE_SERDES_PATGEN_SEQ3r_fields[] = 2777 { 2778 /* PATT_GEN_SEQ_3:0:15 */ 2779 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1057, 15, 0) 2780 }; 2781 static uint32_t BCMI_QSGMIIE_SERDES_PATGEN_SEQ4r_fields[] = 2782 { 2783 /* PATT_GEN_SEQ_4:0:15 */ 2784 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1058, 15, 0) 2785 }; 2786 static uint32_t BCMI_QSGMIIE_SERDES_PATGEN_SEQ5r_fields[] = 2787 { 2788 /* PATT_GEN_SEQ_5:0:15 */ 2789 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1059, 15, 0) 2790 }; 2791 static uint32_t BCMI_QSGMIIE_SERDES_PATGEN_SEQ6r_fields[] = 2792 { 2793 /* PATT_GEN_SEQ_6:0:15 */ 2794 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1060, 15, 0) 2795 }; 2796 static uint32_t BCMI_QSGMIIE_SERDES_PATGEN_SEQ7r_fields[] = 2797 { 2798 /* PATT_GEN_SEQ_7:0:15 */ 2799 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1061, 15, 0) 2800 }; 2801 static uint32_t BCMI_QSGMIIE_SERDES_PATGEN_SEQ8r_fields[] = 2802 { 2803 /* PATT_GEN_SEQ_8:0:15 */ 2804 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1062, 15, 0) 2805 }; 2806 static uint32_t BCMI_QSGMIIE_SERDES_PATGEN_SEQ9r_fields[] = 2807 { 2808 /* PATT_GEN_SEQ_9:0:15 */ 2809 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1063, 15, 0) 2810 }; 2811 static uint32_t BCMI_QSGMIIE_SERDES_PATGEN_SEQ_10r_fields[] = 2812 { 2813 /* PATT_GEN_SEQ_10:0:15 */ 2814 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1051, 15, 0) 2815 }; 2816 static uint32_t BCMI_QSGMIIE_SERDES_PATGEN_SEQ_11r_fields[] = 2817 { 2818 /* PATT_GEN_SEQ_11:0:15 */ 2819 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1052, 15, 0) 2820 }; 2821 static uint32_t BCMI_QSGMIIE_SERDES_PATGEN_SEQ_12r_fields[] = 2822 { 2823 /* PATT_GEN_SEQ_12:0:15 */ 2824 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1053, 15, 0) 2825 }; 2826 static uint32_t BCMI_QSGMIIE_SERDES_PATGEN_SEQ_13r_fields[] = 2827 { 2828 /* PATT_GEN_SEQ_13:0:15 */ 2829 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1054, 15, 0) 2830 }; 2831 static uint32_t BCMI_QSGMIIE_SERDES_PATGEN_SEQ_14r_fields[] = 2832 { 2833 /* PATT_GEN_SEQ_14:0:15 */ 2834 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1055, 15, 0) 2835 }; 2836 static uint32_t BCMI_QSGMIIE_SERDES_PATGEN_TXPKTCNT_Lr_fields[] = 2837 { 2838 /* TXPKTCNT_L:0:15 */ 2839 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1461, 15, 0) 2840 }; 2841 static uint32_t BCMI_QSGMIIE_SERDES_PATGEN_TXPKTCNT_Ur_fields[] = 2842 { 2843 /* TXPKTCNT_U:0:15 */ 2844 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1462, 15, 0) 2845 }; 2846 static uint32_t BCMI_QSGMIIE_SERDES_PHYID2r_fields[] = 2847 { 2848 /* REGID1:0:15 */ 2849 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1200, 15, 0) 2850 }; 2851 static uint32_t BCMI_QSGMIIE_SERDES_PHYID3r_fields[] = 2852 { 2853 /* REGID2:0:15 */ 2854 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1201, 15, 0) 2855 }; 2856 static uint32_t BCMI_QSGMIIE_SERDES_PKTGEN_CRCERRCNTr_fields[] = 2857 { 2858 /* CRCERRCNT:0:15 */ 2859 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(596, 15, 0) 2860 }; 2861 static uint32_t BCMI_QSGMIIE_SERDES_PKTGEN_CTL1r_fields[] = 2862 { 2863 /* PKT_OR_PRTP:0:0 */ 2864 PHYMOD_SYMBOL_FIELD_ENCODE(1098, 0, 0), 2865 /* TX_TEST_PORT_SEL:1:2 */ 2866 PHYMOD_SYMBOL_FIELD_ENCODE(1530, 2, 1), 2867 /* LPI_EN:3:3 */ 2868 PHYMOD_SYMBOL_FIELD_ENCODE(907, 3, 3), 2869 /* PRTP_DATA_PATTERN_SEL:5:5 */ 2870 PHYMOD_SYMBOL_FIELD_ENCODE(1180, 5, 5), 2871 /* TX_PRTP_EN:6:6 */ 2872 PHYMOD_SYMBOL_FIELD_ENCODE(1524, 6, 6), 2873 /* RX_PORT_SEL:7:8 */ 2874 PHYMOD_SYMBOL_FIELD_ENCODE(1303, 8, 7), 2875 /* CLR_CRCCNT:9:9 */ 2876 PHYMOD_SYMBOL_FIELD_ENCODE(574, 9, 9), 2877 /* RX_MSBUS_TYPE:10:10 */ 2878 PHYMOD_SYMBOL_FIELD_ENCODE(1294, 10, 10), 2879 /* RX_PKT_CHECK_EN:11:11 */ 2880 PHYMOD_SYMBOL_FIELD_ENCODE(1301, 11, 11), 2881 /* NUMBER_PKT:12:15 */ 2882 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1020, 15, 12) 2883 }; 2884 static uint32_t BCMI_QSGMIIE_SERDES_PKTGEN_CTL2r_fields[] = 2885 { 2886 /* IPG_SIZE:0:4 */ 2887 PHYMOD_SYMBOL_FIELD_ENCODE(833, 4, 0), 2888 /* PKT_SIZE:5:10 */ 2889 PHYMOD_SYMBOL_FIELD_ENCODE(1099, 10, 5), 2890 /* PAYLOAD_TYPE:11:13 */ 2891 PHYMOD_SYMBOL_FIELD_ENCODE(1068, 13, 11), 2892 /* TX_MSBUS_TYPE:14:14 */ 2893 PHYMOD_SYMBOL_FIELD_ENCODE(1487, 14, 14), 2894 /* PKTGEN_EN:15:15 */ 2895 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1097, 15, 15) 2896 }; 2897 static uint32_t BCMI_QSGMIIE_SERDES_PKTGEN_ERRMASK0r_fields[] = 2898 { 2899 /* ERROR_MASK_15_0:0:15 */ 2900 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(761, 15, 0) 2901 }; 2902 static uint32_t BCMI_QSGMIIE_SERDES_PKTGEN_ERRMASK1r_fields[] = 2903 { 2904 /* ERROR_MASK_31_16:0:15 */ 2905 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(762, 15, 0) 2906 }; 2907 static uint32_t BCMI_QSGMIIE_SERDES_PKTGEN_ERRMASK2r_fields[] = 2908 { 2909 /* ERROR_MASK_47_32:0:15 */ 2910 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(763, 15, 0) 2911 }; 2912 static uint32_t BCMI_QSGMIIE_SERDES_PKTGEN_ERRMASK3r_fields[] = 2913 { 2914 /* ERROR_MASK_63_48:0:15 */ 2915 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(764, 15, 0) 2916 }; 2917 static uint32_t BCMI_QSGMIIE_SERDES_PKTGEN_ERRMASK4r_fields[] = 2918 { 2919 /* ERROR_MASK_79_64:0:15 */ 2920 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(765, 15, 0) 2921 }; 2922 static uint32_t BCMI_QSGMIIE_SERDES_PKTGEN_PAYLOADBYTESr_fields[] = 2923 { 2924 /* BYTE0:0:7 */ 2925 PHYMOD_SYMBOL_FIELD_ENCODE(365, 7, 0), 2926 /* BYTE1:8:15 */ 2927 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(366, 15, 8) 2928 }; 2929 static uint32_t BCMI_QSGMIIE_SERDES_PKTGEN_PCS_SEEDA0r_fields[] = 2930 { 2931 /* SEEDA0:0:15 */ 2932 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1327, 15, 0) 2933 }; 2934 static uint32_t BCMI_QSGMIIE_SERDES_PKTGEN_PCS_SEEDA1r_fields[] = 2935 { 2936 /* SEEDA1:0:15 */ 2937 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1328, 15, 0) 2938 }; 2939 static uint32_t BCMI_QSGMIIE_SERDES_PKTGEN_PCS_SEEDA2r_fields[] = 2940 { 2941 /* SEEDA2:0:15 */ 2942 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1329, 15, 0) 2943 }; 2944 static uint32_t BCMI_QSGMIIE_SERDES_PKTGEN_PCS_SEEDA3r_fields[] = 2945 { 2946 /* SEEDA3:0:9 */ 2947 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1330, 9, 0) 2948 }; 2949 static uint32_t BCMI_QSGMIIE_SERDES_PKTGEN_PCS_SEEDB0r_fields[] = 2950 { 2951 /* SEEDB0:0:15 */ 2952 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1331, 15, 0) 2953 }; 2954 static uint32_t BCMI_QSGMIIE_SERDES_PKTGEN_PCS_SEEDB1r_fields[] = 2955 { 2956 /* SEEDB1:0:15 */ 2957 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1332, 15, 0) 2958 }; 2959 static uint32_t BCMI_QSGMIIE_SERDES_PKTGEN_PCS_SEEDB2r_fields[] = 2960 { 2961 /* SEEDB2:0:15 */ 2962 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1333, 15, 0) 2963 }; 2964 static uint32_t BCMI_QSGMIIE_SERDES_PKTGEN_PCS_SEEDB3r_fields[] = 2965 { 2966 /* SEEDB3:0:9 */ 2967 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1334, 9, 0) 2968 }; 2969 static uint32_t BCMI_QSGMIIE_SERDES_PKTGEN_PRTPCTLr_fields[] = 2970 { 2971 /* RX_PRTP_EN:4:4 */ 2972 PHYMOD_SYMBOL_FIELD_ENCODE(1304, 4, 4), 2973 /* ERRGEN_EN:5:8 */ 2974 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(756, 8, 5) 2975 }; 2976 static uint32_t BCMI_QSGMIIE_SERDES_PKTGEN_PRTPERRCTRr_fields[] = 2977 { 2978 /* PRTP_ERR_COUNT:0:15 */ 2979 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1181, 15, 0) 2980 }; 2981 static uint32_t BCMI_QSGMIIE_SERDES_PKTGEN_PRTPLOCKSTSr_fields[] = 2982 { 2983 /* PRTP_LOCK:0:0 */ 2984 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1182, 0, 0) 2985 }; 2986 static uint32_t BCMI_QSGMIIE_SERDES_PLL_CAL_CTL0r_fields[] = 2987 { 2988 /* VCO_STEP_TIME:0:7 */ 2989 PHYMOD_SYMBOL_FIELD_ENCODE(1554, 7, 0), 2990 /* VCO_START_TIME:8:15 */ 2991 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1553, 15, 8) 2992 }; 2993 static uint32_t BCMI_QSGMIIE_SERDES_PLL_CAL_CTL1r_fields[] = 2994 { 2995 /* RETRY_TIME:0:7 */ 2996 PHYMOD_SYMBOL_FIELD_ENCODE(1224, 7, 0), 2997 /* PRE_FREQ_DET_TIME:8:15 */ 2998 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1173, 15, 8) 2999 }; 3000 static uint32_t BCMI_QSGMIIE_SERDES_PLL_CAL_CTL2r_fields[] = 3001 { 3002 /* WIN_CAL_CNTR:0:7 */ 3003 PHYMOD_SYMBOL_FIELD_ENCODE(1573, 7, 0), 3004 /* RES_CAL_CNTR:8:15 */ 3005 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1223, 15, 8) 3006 }; 3007 static uint32_t BCMI_QSGMIIE_SERDES_PLL_CAL_CTL3r_fields[] = 3008 { 3009 /* FAST_SEARCH_MODE:0:0 */ 3010 PHYMOD_SYMBOL_FIELD_ENCODE(772, 0, 0), 3011 /* CAP_CNT_MASK_EN:1:1 */ 3012 PHYMOD_SYMBOL_FIELD_ENCODE(374, 1, 1), 3013 /* CAP_SEQ_CYA:2:2 */ 3014 PHYMOD_SYMBOL_FIELD_ENCODE(386, 2, 2), 3015 /* CAP_RESTART:3:3 */ 3016 PHYMOD_SYMBOL_FIELD_ENCODE(381, 3, 3), 3017 /* CAP_RETRY_EN:4:4 */ 3018 PHYMOD_SYMBOL_FIELD_ENCODE(382, 4, 4), 3019 /* CAP_FORCE_SLOWDOWN:5:5 */ 3020 PHYMOD_SYMBOL_FIELD_ENCODE(377, 5, 5), 3021 /* CAP_FORCE_SLOWDOWN_EN:6:6 */ 3022 PHYMOD_SYMBOL_FIELD_ENCODE(378, 6, 6), 3023 /* CAP_SELECT_M_EN:7:7 */ 3024 PHYMOD_SYMBOL_FIELD_ENCODE(385, 7, 7), 3025 /* CAP_SELECT_M:8:15 */ 3026 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(384, 15, 8) 3027 }; 3028 static uint32_t BCMI_QSGMIIE_SERDES_PLL_CAL_CTL4r_fields[] = 3029 { 3030 /* PLL_LOCK_FRC_VAL:0:0 */ 3031 PHYMOD_SYMBOL_FIELD_ENCODE(1110, 0, 0), 3032 /* PLL_LOCK_FRC:1:1 */ 3033 PHYMOD_SYMBOL_FIELD_ENCODE(1109, 1, 1), 3034 /* PLL_FORCE_CAP_PASS:2:2 */ 3035 PHYMOD_SYMBOL_FIELD_ENCODE(1103, 2, 2), 3036 /* PLL_FORCE_CAP_PASS_EN:3:3 */ 3037 PHYMOD_SYMBOL_FIELD_ENCODE(1104, 3, 3), 3038 /* PLL_FORCE_CAP_DONE:4:4 */ 3039 PHYMOD_SYMBOL_FIELD_ENCODE(1101, 4, 4), 3040 /* PLL_FORCE_CAP_DONE_EN:5:5 */ 3041 PHYMOD_SYMBOL_FIELD_ENCODE(1102, 5, 5), 3042 /* PLL_FORCE_FPASS:6:6 */ 3043 PHYMOD_SYMBOL_FIELD_ENCODE(1107, 6, 6), 3044 /* PLL_FORCE_FDONE:7:7 */ 3045 PHYMOD_SYMBOL_FIELD_ENCODE(1105, 7, 7), 3046 /* PLL_FORCE_FDONE_EN:8:8 */ 3047 PHYMOD_SYMBOL_FIELD_ENCODE(1106, 8, 8), 3048 /* VCO_RST_EN:9:9 */ 3049 PHYMOD_SYMBOL_FIELD_ENCODE(1552, 9, 9), 3050 /* SLOWDN_XOR:10:10 */ 3051 PHYMOD_SYMBOL_FIELD_ENCODE(1367, 10, 10), 3052 /* FREQ_MONITOR_EN:11:11 */ 3053 PHYMOD_SYMBOL_FIELD_ENCODE(792, 11, 11), 3054 /* FREQ_DET_RESTART_EN:12:12 */ 3055 PHYMOD_SYMBOL_FIELD_ENCODE(788, 12, 12), 3056 /* FREQ_DET_RETRY_EN:13:13 */ 3057 PHYMOD_SYMBOL_FIELD_ENCODE(789, 13, 13), 3058 /* VCO_DONE_EN:14:14 */ 3059 PHYMOD_SYMBOL_FIELD_ENCODE(1551, 14, 14), 3060 /* PLL_SEQ_START:15:15 */ 3061 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1124, 15, 15) 3062 }; 3063 static uint32_t BCMI_QSGMIIE_SERDES_PLL_CAL_CTL5r_fields[] = 3064 { 3065 /* REFCLK_DIVCNT:0:13 */ 3066 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1197, 13, 0) 3067 }; 3068 static uint32_t BCMI_QSGMIIE_SERDES_PLL_CAL_CTL6r_fields[] = 3069 { 3070 /* REFCLK_DIVCNT_SEL:0:2 */ 3071 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1198, 2, 0) 3072 }; 3073 static uint32_t BCMI_QSGMIIE_SERDES_PLL_CAL_CTL7r_fields[] = 3074 { 3075 /* PLL_MODE:0:3 */ 3076 PHYMOD_SYMBOL_FIELD_ENCODE(1118, 3, 0), 3077 /* RESCAL_FRC_VAL:4:7 */ 3078 PHYMOD_SYMBOL_FIELD_ENCODE(1213, 7, 4), 3079 /* RESCAL_FRC:8:8 */ 3080 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1212, 8, 8) 3081 }; 3082 static uint32_t BCMI_QSGMIIE_SERDES_PLL_CAL_CTL_STS0r_fields[] = 3083 { 3084 /* PLL_LOCK_LH_LL:0:0 */ 3085 PHYMOD_SYMBOL_FIELD_ENCODE(1112, 0, 0), 3086 /* PLL_SEQ_PASS_LH_LL:1:1 */ 3087 PHYMOD_SYMBOL_FIELD_ENCODE(1123, 1, 1), 3088 /* PLL_SEQ_DONE_LH_LL:2:2 */ 3089 PHYMOD_SYMBOL_FIELD_ENCODE(1121, 2, 2), 3090 /* FREQ_PASS_SM_LH_LL:3:3 */ 3091 PHYMOD_SYMBOL_FIELD_ENCODE(794, 3, 3), 3092 /* FREQ_DONE_SM_LH_LL:4:4 */ 3093 PHYMOD_SYMBOL_FIELD_ENCODE(791, 4, 4), 3094 /* CAP_PASS_LH_LL:5:5 */ 3095 PHYMOD_SYMBOL_FIELD_ENCODE(380, 5, 5), 3096 /* CAP_DONE_LH_LL:6:6 */ 3097 PHYMOD_SYMBOL_FIELD_ENCODE(376, 6, 6), 3098 /* PLL_LOCK:8:8 */ 3099 PHYMOD_SYMBOL_FIELD_ENCODE(1108, 8, 8), 3100 /* PLL_SEQ_PASS:9:9 */ 3101 PHYMOD_SYMBOL_FIELD_ENCODE(1122, 9, 9), 3102 /* PLL_SEQ_DONE:10:10 */ 3103 PHYMOD_SYMBOL_FIELD_ENCODE(1120, 10, 10), 3104 /* FREQ_PASS_SM:11:11 */ 3105 PHYMOD_SYMBOL_FIELD_ENCODE(793, 11, 11), 3106 /* FREQ_DONE_SM:12:12 */ 3107 PHYMOD_SYMBOL_FIELD_ENCODE(790, 12, 12), 3108 /* CAP_PASS:13:13 */ 3109 PHYMOD_SYMBOL_FIELD_ENCODE(379, 13, 13), 3110 /* CAP_DONE:14:14 */ 3111 PHYMOD_SYMBOL_FIELD_ENCODE(375, 14, 14), 3112 /* LOST_PLL_LOCK_SM:15:15 */ 3113 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(904, 15, 15) 3114 }; 3115 static uint32_t BCMI_QSGMIIE_SERDES_PLL_CAL_CTL_STS1r_fields[] = 3116 { 3117 /* CAP_SELECT:0:7 */ 3118 PHYMOD_SYMBOL_FIELD_ENCODE(383, 7, 0), 3119 /* RESCAL_IN:8:11 */ 3120 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1214, 11, 8) 3121 }; 3122 static uint32_t BCMI_QSGMIIE_SERDES_PLL_CAL_CTL_STS_DBGr_fields[] = 3123 { 3124 /* DBG_SLOWDN:0:0 */ 3125 PHYMOD_SYMBOL_FIELD_ENCODE(610, 0, 0), 3126 /* DBG_SLOWDN_CHANGE:1:1 */ 3127 PHYMOD_SYMBOL_FIELD_ENCODE(611, 1, 1), 3128 /* DBG_FDBCK:2:2 */ 3129 PHYMOD_SYMBOL_FIELD_ENCODE(607, 2, 2), 3130 /* DBG_CAP_STATE_ONE_HOT:3:7 */ 3131 PHYMOD_SYMBOL_FIELD_ENCODE(602, 7, 3), 3132 /* DBG_PLL_STATE_ONE_HOT:8:15 */ 3133 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(609, 15, 8) 3134 }; 3135 static uint32_t BCMI_QSGMIIE_SERDES_PMD_X1_CTLr_fields[] = 3136 { 3137 /* CORE_DP_H_RSTB:0:0 */ 3138 PHYMOD_SYMBOL_FIELD_ENCODE(587, 0, 0), 3139 /* POR_H_RSTB:1:1 */ 3140 PHYMOD_SYMBOL_FIELD_ENCODE(1150, 1, 1), 3141 /* PRAM_ABILITY:8:8 */ 3142 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1153, 8, 8) 3143 }; 3144 static uint32_t BCMI_QSGMIIE_SERDES_PMD_X1_LATCH_STSr_fields[] = 3145 { 3146 /* PLL_LOCK_LL:0:0 */ 3147 PHYMOD_SYMBOL_FIELD_ENCODE(1113, 0, 0), 3148 /* PLL_LOCK_LH:1:1 */ 3149 PHYMOD_SYMBOL_FIELD_ENCODE(1111, 1, 1), 3150 /* TX_CLK_VLD_LL:2:2 */ 3151 PHYMOD_SYMBOL_FIELD_ENCODE(1465, 2, 2), 3152 /* TX_CLK_VLD_LH:3:3 */ 3153 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1464, 3, 3) 3154 }; 3155 static uint32_t BCMI_QSGMIIE_SERDES_PMD_X1_MODEr_fields[] = 3156 { 3157 /* CORE_MODE:0:15 */ 3158 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(591, 15, 0) 3159 }; 3160 static uint32_t BCMI_QSGMIIE_SERDES_PMD_X1_OVRRr_fields[] = 3161 { 3162 /* PLL_LOCK_OVRD:0:0 */ 3163 PHYMOD_SYMBOL_FIELD_ENCODE(1114, 0, 0), 3164 /* TX_CLK_VLD_OVRD:1:1 */ 3165 PHYMOD_SYMBOL_FIELD_ENCODE(1466, 1, 1), 3166 /* CORE_MODE_OEN:2:2 */ 3167 PHYMOD_SYMBOL_FIELD_ENCODE(592, 2, 2), 3168 /* CORE_DP_H_RSTB_OEN:3:3 */ 3169 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(588, 3, 3) 3170 }; 3171 static uint32_t BCMI_QSGMIIE_SERDES_PMD_X1_STSr_fields[] = 3172 { 3173 /* PLL_LOCK_STS:0:0 */ 3174 PHYMOD_SYMBOL_FIELD_ENCODE(1115, 0, 0), 3175 /* TX_CLK_VLD_STS:1:1 */ 3176 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1467, 1, 1) 3177 }; 3178 static uint32_t BCMI_QSGMIIE_SERDES_PMD_X4_CTLr_fields[] = 3179 { 3180 /* LN_DP_H_RSTB:0:0 */ 3181 PHYMOD_SYMBOL_FIELD_ENCODE(874, 0, 0), 3182 /* LN_H_RSTB:1:1 */ 3183 PHYMOD_SYMBOL_FIELD_ENCODE(877, 1, 1), 3184 /* LN_TX_H_PWRDN:2:2 */ 3185 PHYMOD_SYMBOL_FIELD_ENCODE(887, 2, 2), 3186 /* LN_RX_H_PWRDN:3:3 */ 3187 PHYMOD_SYMBOL_FIELD_ENCODE(879, 3, 3), 3188 /* TX_DISABLE:8:8 */ 3189 PHYMOD_SYMBOL_FIELD_ENCODE(1468, 8, 8), 3190 /* OSR_MODE:9:12 */ 3191 PHYMOD_SYMBOL_FIELD_ENCODE(1027, 12, 9), 3192 /* RX_DME_EN:13:13 */ 3193 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1282, 13, 13) 3194 }; 3195 static uint32_t BCMI_QSGMIIE_SERDES_PMD_X4_EEE_CTLr_fields[] = 3196 { 3197 /* TX_MODE:0:1 */ 3198 PHYMOD_SYMBOL_FIELD_ENCODE(1486, 1, 0), 3199 /* RX_MODE:2:2 */ 3200 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1293, 2, 2) 3201 }; 3202 static uint32_t BCMI_QSGMIIE_SERDES_PMD_X4_EEE_STSr_fields[] = 3203 { 3204 /* ENERGY_DETECT:0:0 */ 3205 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(749, 0, 0) 3206 }; 3207 static uint32_t BCMI_QSGMIIE_SERDES_PMD_X4_LATCH_STSr_fields[] = 3208 { 3209 /* RX_LOCK_LL:0:0 */ 3210 PHYMOD_SYMBOL_FIELD_ENCODE(1290, 0, 0), 3211 /* RX_LOCK_LH:1:1 */ 3212 PHYMOD_SYMBOL_FIELD_ENCODE(1289, 1, 1), 3213 /* SIGNAL_DETECT_LL:2:2 */ 3214 PHYMOD_SYMBOL_FIELD_ENCODE(1359, 2, 2), 3215 /* SIGNAL_DETECT_LH:3:3 */ 3216 PHYMOD_SYMBOL_FIELD_ENCODE(1358, 3, 3), 3217 /* RX_CLK_VLD_LL:4:4 */ 3218 PHYMOD_SYMBOL_FIELD_ENCODE(1279, 4, 4), 3219 /* RX_CLK_VLD_LH:5:5 */ 3220 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1278, 5, 5) 3221 }; 3222 static uint32_t BCMI_QSGMIIE_SERDES_PMD_X4_MODEr_fields[] = 3223 { 3224 /* LANE_MODE:0:15 */ 3225 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(850, 15, 0) 3226 }; 3227 static uint32_t BCMI_QSGMIIE_SERDES_PMD_X4_OVRRr_fields[] = 3228 { 3229 /* RX_LOCK_OVRD:0:0 */ 3230 PHYMOD_SYMBOL_FIELD_ENCODE(1291, 0, 0), 3231 /* SIGNAL_DETECT_OVRD:1:1 */ 3232 PHYMOD_SYMBOL_FIELD_ENCODE(1360, 1, 1), 3233 /* RX_CLK_VLD_OVRD:2:2 */ 3234 PHYMOD_SYMBOL_FIELD_ENCODE(1280, 2, 2), 3235 /* LANE_MODE_OEN:3:3 */ 3236 PHYMOD_SYMBOL_FIELD_ENCODE(851, 3, 3), 3237 /* OSR_MODE_OEN:4:4 */ 3238 PHYMOD_SYMBOL_FIELD_ENCODE(1030, 4, 4), 3239 /* RX_DME_EN_OEN:5:5 */ 3240 PHYMOD_SYMBOL_FIELD_ENCODE(1283, 5, 5), 3241 /* TX_DISABLE_OEN:6:6 */ 3242 PHYMOD_SYMBOL_FIELD_ENCODE(1469, 6, 6), 3243 /* LN_DP_H_RSTB_OEN:7:7 */ 3244 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(875, 7, 7) 3245 }; 3246 static uint32_t BCMI_QSGMIIE_SERDES_PMD_X4_STSr_fields[] = 3247 { 3248 /* RX_LOCK_STS:0:0 */ 3249 PHYMOD_SYMBOL_FIELD_ENCODE(1292, 0, 0), 3250 /* SIGNAL_DETECT_STS:1:1 */ 3251 PHYMOD_SYMBOL_FIELD_ENCODE(1363, 1, 1), 3252 /* RX_CLK_VLD_STS:2:2 */ 3253 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1281, 2, 2) 3254 }; 3255 static uint32_t BCMI_QSGMIIE_SERDES_R1000XCONTROL1r_fields[] = 3256 { 3257 /* FIBER_MODE_1000X:0:0 */ 3258 PHYMOD_SYMBOL_FIELD_ENCODE(778, 0, 0), 3259 /* TBI_INTERFACE:1:1 */ 3260 PHYMOD_SYMBOL_FIELD_ENCODE(1394, 1, 1), 3261 /* SIGNAL_DETECT_EN:2:2 */ 3262 PHYMOD_SYMBOL_FIELD_ENCODE(1353, 2, 2), 3263 /* INVERT_SIGNAL_DETECT:3:3 */ 3264 PHYMOD_SYMBOL_FIELD_ENCODE(830, 3, 3), 3265 /* AUTODET_EN:4:4 */ 3266 PHYMOD_SYMBOL_FIELD_ENCODE(303, 4, 4), 3267 /* SGMII_MASTER_MODE:5:5 */ 3268 PHYMOD_SYMBOL_FIELD_ENCODE(1342, 5, 5), 3269 /* DISABLE_PLL_PWRDWN:6:6 */ 3270 PHYMOD_SYMBOL_FIELD_ENCODE(716, 6, 6), 3271 /* CRC_CHECKER_DISABLE:7:7 */ 3272 PHYMOD_SYMBOL_FIELD_ENCODE(597, 7, 7), 3273 /* COMMA_DET_EN:8:8 */ 3274 PHYMOD_SYMBOL_FIELD_ENCODE(584, 8, 8), 3275 /* ZERO_COMMA_DETECTOR_PHASE:9:9 */ 3276 PHYMOD_SYMBOL_FIELD_ENCODE(1576, 9, 9), 3277 /* REMOTE_LOOPBACK:10:10 */ 3278 PHYMOD_SYMBOL_FIELD_ENCODE(1205, 10, 10), 3279 /* SEL_RX_PKTS_FOR_CNTR:11:11 */ 3280 PHYMOD_SYMBOL_FIELD_ENCODE(1335, 11, 11), 3281 /* SERDES_TX_AMPLITUDE_OVERRIDE:12:12 */ 3282 PHYMOD_SYMBOL_FIELD_ENCODE(1338, 12, 12), 3283 /* MASTER_MDIO_PHY_SEL:13:13 */ 3284 PHYMOD_SYMBOL_FIELD_ENCODE(938, 13, 13), 3285 /* DISABLE_SIGNAL_DETCT_FILTER:14:14 */ 3286 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(718, 14, 14) 3287 }; 3288 static uint32_t BCMI_QSGMIIE_SERDES_R1000XSTATUS1r_fields[] = 3289 { 3290 /* SGMII_MODE:0:0 */ 3291 PHYMOD_SYMBOL_FIELD_ENCODE(1343, 0, 0), 3292 /* LINK_STATUS:1:1 */ 3293 PHYMOD_SYMBOL_FIELD_ENCODE(871, 1, 1), 3294 /* DUPLEX_STATUS:2:2 */ 3295 PHYMOD_SYMBOL_FIELD_ENCODE(730, 2, 2), 3296 /* SPEED_STATUS:3:4 */ 3297 PHYMOD_SYMBOL_FIELD_ENCODE(1373, 4, 3), 3298 /* PAUSE_RESOLUTION_TXSIDE:5:5 */ 3299 PHYMOD_SYMBOL_FIELD_ENCODE(1067, 5, 5), 3300 /* PAUSE_RESOLUTION_RXSIDE:6:6 */ 3301 PHYMOD_SYMBOL_FIELD_ENCODE(1066, 6, 6), 3302 /* EARLY_END_EXTENSION_DETECTED:8:8 */ 3303 PHYMOD_SYMBOL_FIELD_ENCODE(731, 8, 8), 3304 /* CARRIER_EXTEND_ERR_DETECTED:9:9 */ 3305 PHYMOD_SYMBOL_FIELD_ENCODE(387, 9, 9), 3306 /* RX_ERR_DETECTED:10:10 */ 3307 PHYMOD_SYMBOL_FIELD_ENCODE(1287, 10, 10), 3308 /* TX_ERR_DETECTED:11:11 */ 3309 PHYMOD_SYMBOL_FIELD_ENCODE(1475, 11, 11), 3310 /* CRC_ERR_DETECTED:12:12 */ 3311 PHYMOD_SYMBOL_FIELD_ENCODE(598, 12, 12), 3312 /* FALSE_CARRIER_DETECTED:13:13 */ 3313 PHYMOD_SYMBOL_FIELD_ENCODE(770, 13, 13), 3314 /* RXFIFO_ERR_DETECTED:14:14 */ 3315 PHYMOD_SYMBOL_FIELD_ENCODE(1270, 14, 14), 3316 /* TXFIFO_ERR_DETECTED:15:15 */ 3317 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1438, 15, 15) 3318 }; 3319 static uint32_t BCMI_QSGMIIE_SERDES_RX_X1_DEC_CTL0r_fields[] = 3320 { 3321 /* HYSTCOUNT:0:3 */ 3322 PHYMOD_SYMBOL_FIELD_ENCODE(818, 3, 0), 3323 /* GCWCOUNT:4:7 */ 3324 PHYMOD_SYMBOL_FIELD_ENCODE(799, 7, 4), 3325 /* SCWCOUNT:8:11 */ 3326 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1322, 11, 8) 3327 }; 3328 static uint32_t BCMI_QSGMIIE_SERDES_RX_X1_DEC_CTL1r_fields[] = 3329 { 3330 /* CL49_BER_LIMIT:2:7 */ 3331 PHYMOD_SYMBOL_FIELD_ENCODE(468, 7, 2), 3332 /* CL82_BER_LIMIT:8:14 */ 3333 PHYMOD_SYMBOL_FIELD_ENCODE(551, 14, 8), 3334 /* SET_BER_WINDOW_512:15:15 */ 3335 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1339, 15, 15) 3336 }; 3337 static uint32_t BCMI_QSGMIIE_SERDES_RX_X1_DESKEW_WINSr_fields[] = 3338 { 3339 /* CL48_DSWIN8B10B:0:3 */ 3340 PHYMOD_SYMBOL_FIELD_ENCODE(444, 3, 0), 3341 /* CL48_DSWIN64B66B:4:6 */ 3342 PHYMOD_SYMBOL_FIELD_ENCODE(443, 6, 4), 3343 /* CL82_DSWIN:7:11 */ 3344 PHYMOD_SYMBOL_FIELD_ENCODE(553, 11, 7), 3345 /* CL82_DSWIN_100G:12:15 */ 3346 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(554, 15, 12) 3347 }; 3348 static uint32_t BCMI_QSGMIIE_SERDES_RX_X1_INVALID_SHCNT_CL82r_fields[] = 3349 { 3350 /* CL82_INVALID_SH_CNT:0:11 */ 3351 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(556, 11, 0) 3352 }; 3353 static uint32_t BCMI_QSGMIIE_SERDES_RX_X1_SCW0r_fields[] = 3354 { 3355 /* SCW0:0:15 */ 3356 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1312, 15, 0) 3357 }; 3358 static uint32_t BCMI_QSGMIIE_SERDES_RX_X1_SCW0_MASKr_fields[] = 3359 { 3360 /* SCW0_MASK:0:15 */ 3361 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1313, 15, 0) 3362 }; 3363 static uint32_t BCMI_QSGMIIE_SERDES_RX_X1_SCW1r_fields[] = 3364 { 3365 /* SCW1:0:15 */ 3366 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1314, 15, 0) 3367 }; 3368 static uint32_t BCMI_QSGMIIE_SERDES_RX_X1_SCW1_MASKr_fields[] = 3369 { 3370 /* SCW1_MASK:0:15 */ 3371 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1315, 15, 0) 3372 }; 3373 static uint32_t BCMI_QSGMIIE_SERDES_RX_X1_SCW2r_fields[] = 3374 { 3375 /* SCW2:0:15 */ 3376 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1316, 15, 0) 3377 }; 3378 static uint32_t BCMI_QSGMIIE_SERDES_RX_X1_SCW2_MASKr_fields[] = 3379 { 3380 /* SCW2_MASK:0:15 */ 3381 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1317, 15, 0) 3382 }; 3383 static uint32_t BCMI_QSGMIIE_SERDES_RX_X1_SCW3r_fields[] = 3384 { 3385 /* SCW3:0:15 */ 3386 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1318, 15, 0) 3387 }; 3388 static uint32_t BCMI_QSGMIIE_SERDES_RX_X1_SCW3_MASKr_fields[] = 3389 { 3390 /* SCW3_MASK:0:15 */ 3391 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1319, 15, 0) 3392 }; 3393 static uint32_t BCMI_QSGMIIE_SERDES_RX_X1_SCW4r_fields[] = 3394 { 3395 /* SCW4:0:1 */ 3396 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1320, 1, 0) 3397 }; 3398 static uint32_t BCMI_QSGMIIE_SERDES_RX_X1_SCW4_MASKr_fields[] = 3399 { 3400 /* SCW4_MASK:0:1 */ 3401 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1321, 1, 0) 3402 }; 3403 static uint32_t BCMI_QSGMIIE_SERDES_RX_X1_SHCNT_CL49r_fields[] = 3404 { 3405 /* CL49_INVALID_SH_CNT:0:7 */ 3406 PHYMOD_SYMBOL_FIELD_ENCODE(470, 7, 0), 3407 /* CL49_VALID_SH_CNT:8:15 */ 3408 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(486, 15, 8) 3409 }; 3410 static uint32_t BCMI_QSGMIIE_SERDES_RX_X1_VALID_SHCNT_CL82r_fields[] = 3411 { 3412 /* CL82_VALID_SH_CNT:0:11 */ 3413 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(565, 11, 0) 3414 }; 3415 static uint32_t BCMI_QSGMIIE_SERDES_RX_X2_MISC0r_fields[] = 3416 { 3417 /* BYPASS_CL82RXSM:0:0 */ 3418 PHYMOD_SYMBOL_FIELD_ENCODE(364, 0, 0), 3419 /* DIS_CL82_BERMON:1:1 */ 3420 PHYMOD_SYMBOL_FIELD_ENCODE(719, 1, 1), 3421 /* BRCM_MODE_USE_K20PT5:8:8 */ 3422 PHYMOD_SYMBOL_FIELD_ENCODE(358, 8, 8), 3423 /* CHK_END_EN:10:10 */ 3424 PHYMOD_SYMBOL_FIELD_ENCODE(413, 10, 10), 3425 /* LINK_EN:12:12 */ 3426 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(866, 12, 12) 3427 }; 3428 static uint32_t BCMI_QSGMIIE_SERDES_RX_X2_MISC1r_fields[] = 3429 { 3430 /* CL82_RX_RF_ENABLE:0:0 */ 3431 PHYMOD_SYMBOL_FIELD_ENCODE(561, 0, 0), 3432 /* CL82_RX_LF_ENABLE:1:1 */ 3433 PHYMOD_SYMBOL_FIELD_ENCODE(559, 1, 1), 3434 /* CL48_RX_RF_ENABLE:2:2 */ 3435 PHYMOD_SYMBOL_FIELD_ENCODE(448, 2, 2), 3436 /* CL48_RX_LF_ENABLE:3:3 */ 3437 PHYMOD_SYMBOL_FIELD_ENCODE(445, 3, 3), 3438 /* CL48_RX_LI_ENABLE:8:8 */ 3439 PHYMOD_SYMBOL_FIELD_ENCODE(446, 8, 8), 3440 /* CL82_RX_LI_ENABLE:9:9 */ 3441 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(560, 9, 9) 3442 }; 3443 static uint32_t BCMI_QSGMIIE_SERDES_RX_X2_QRSVD0r_fields[] = 3444 { 3445 /* CL48_RX_QRSVDCTRL:1:4 */ 3446 PHYMOD_SYMBOL_FIELD_ENCODE(447, 4, 1), 3447 /* QRSVDSWAP:5:14 */ 3448 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1194, 14, 5) 3449 }; 3450 static uint32_t BCMI_QSGMIIE_SERDES_RX_X2_QRSVD1r_fields[] = 3451 { 3452 /* QRSVD2_8_2:0:6 */ 3453 PHYMOD_SYMBOL_FIELD_ENCODE(1192, 6, 0), 3454 /* QRSVD1:7:15 */ 3455 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1190, 15, 7) 3456 }; 3457 static uint32_t BCMI_QSGMIIE_SERDES_RX_X2_QRSVD2r_fields[] = 3458 { 3459 /* QRSVD3:5:13 */ 3460 PHYMOD_SYMBOL_FIELD_ENCODE(1193, 13, 5), 3461 /* QRSVD2_1_0:14:15 */ 3462 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1191, 15, 14) 3463 }; 3464 static uint32_t BCMI_QSGMIIE_SERDES_RX_X2_SKEW_STS0r_fields[] = 3465 { 3466 /* CL48_SKEWACQ_STATE_D_3:3:5 */ 3467 PHYMOD_SYMBOL_FIELD_ENCODE(452, 5, 3), 3468 /* CL48_SKEWACQ_STATE_D_2:6:8 */ 3469 PHYMOD_SYMBOL_FIELD_ENCODE(451, 8, 6), 3470 /* CL48_SKEWACQ_STATE_D_1:9:11 */ 3471 PHYMOD_SYMBOL_FIELD_ENCODE(450, 11, 9), 3472 /* CL48_SKEWACQ_STATE_D_0:12:14 */ 3473 PHYMOD_SYMBOL_FIELD_ENCODE(449, 14, 12), 3474 /* CL48_SKEW_STATUS:15:15 */ 3475 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(454, 15, 15) 3476 }; 3477 static uint32_t BCMI_QSGMIIE_SERDES_RX_X2_SKEW_STS1r_fields[] = 3478 { 3479 /* CL48_SKEWACQ_STATE_L:0:7 */ 3480 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(453, 7, 0) 3481 }; 3482 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_BARREL_SHIFTER_STr_fields[] = 3483 { 3484 /* SHIFT_AMMOUNT:0:7 */ 3485 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1349, 7, 0) 3486 }; 3487 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_BERCNTr_fields[] = 3488 { 3489 /* BER_COUNT_PER_LN:0:7 */ 3490 PHYMOD_SYMBOL_FIELD_ENCODE(350, 7, 0), 3491 /* BIP_ERROR_COUNT_PER_LANE:8:15 */ 3492 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(352, 15, 8) 3493 }; 3494 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_CL36_RX0r_fields[] = 3495 { 3496 /* CL36_EN:0:0 */ 3497 PHYMOD_SYMBOL_FIELD_ENCODE(418, 0, 0), 3498 /* REORDER_EN:1:1 */ 3499 PHYMOD_SYMBOL_FIELD_ENCODE(1208, 1, 1), 3500 /* DISABLE_CARRIER_EXTEND:2:2 */ 3501 PHYMOD_SYMBOL_FIELD_ENCODE(714, 2, 2), 3502 /* CL36_FORCE_COMMA_ALIGN_ENABLE:3:3 */ 3503 PHYMOD_SYMBOL_FIELD_ENCODE(420, 3, 3), 3504 /* CL36_BER_EN:5:5 */ 3505 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(417, 5, 5) 3506 }; 3507 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_CL49_LOCK_FSM_STSr_fields[] = 3508 { 3509 /* LSM_CURR_STATE:0:1 */ 3510 PHYMOD_SYMBOL_FIELD_ENCODE(926, 1, 0), 3511 /* LSM_HIS_STATE:2:4 */ 3512 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(927, 4, 2) 3513 }; 3514 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_CL82_AM_LATCH_STSr_fields[] = 3515 { 3516 /* AM_LOCK_HIS_STATE:0:9 */ 3517 PHYMOD_SYMBOL_FIELD_ENCODE(196, 9, 0), 3518 /* AMRKR_SPACING_ERR_LATCH_MUX:10:10 */ 3519 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(18, 10, 10) 3520 }; 3521 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_CL82_AM_LIVE_STSr_fields[] = 3522 { 3523 /* AM_LOCK_STATE:0:9 */ 3524 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(199, 9, 0) 3525 }; 3526 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_DEC_CTL0r_fields[] = 3527 { 3528 /* BLOCK_SYNC_MODE:0:2 */ 3529 PHYMOD_SYMBOL_FIELD_ENCODE(353, 2, 0), 3530 /* CL49_RX_RF_ENABLE:4:4 */ 3531 PHYMOD_SYMBOL_FIELD_ENCODE(477, 4, 4), 3532 /* CL49_RX_LF_ENABLE:5:5 */ 3533 PHYMOD_SYMBOL_FIELD_ENCODE(475, 5, 5), 3534 /* CL49_RX_LI_ENABLE:6:6 */ 3535 PHYMOD_SYMBOL_FIELD_ENCODE(476, 6, 6), 3536 /* DISABLE_CL49_BERMON:8:8 */ 3537 PHYMOD_SYMBOL_FIELD_ENCODE(715, 8, 8), 3538 /* HG2_CODEC:9:9 */ 3539 PHYMOD_SYMBOL_FIELD_ENCODE(805, 9, 9), 3540 /* CL48_CGBAD_EN:10:10 */ 3541 PHYMOD_SYMBOL_FIELD_ENCODE(442, 10, 10), 3542 /* CL48_SYNCACQ_EN:11:11 */ 3543 PHYMOD_SYMBOL_FIELD_ENCODE(455, 11, 11), 3544 /* HG2_ENABLE:12:12 */ 3545 PHYMOD_SYMBOL_FIELD_ENCODE(806, 12, 12), 3546 /* HG2_MESSAGE_INVALID_CODE_ENABLE:13:13 */ 3547 PHYMOD_SYMBOL_FIELD_ENCODE(807, 13, 13), 3548 /* R_TEST_MODE_CFG:14:14 */ 3549 PHYMOD_SYMBOL_FIELD_ENCODE(1307, 14, 14), 3550 /* BYPASS_CL49RXSM:15:15 */ 3551 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(363, 15, 15) 3552 }; 3553 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_DEC_CTL1r_fields[] = 3554 { 3555 /* B66DEC_CGBAD_EN:0:0 */ 3556 PHYMOD_SYMBOL_FIELD_ENCODE(307, 0, 0), 3557 /* B66DEC_SYNCERRCOUNT_EN:1:1 */ 3558 PHYMOD_SYMBOL_FIELD_ENCODE(315, 1, 1), 3559 /* B66DEC_KCODE66ERRCOUNT_EN:2:2 */ 3560 PHYMOD_SYMBOL_FIELD_ENCODE(311, 2, 2), 3561 /* B66DEC_FAULT_DET_EN:3:3 */ 3562 PHYMOD_SYMBOL_FIELD_ENCODE(310, 3, 3), 3563 /* B66DEC_PROG_TL_CHAR:4:11 */ 3564 PHYMOD_SYMBOL_FIELD_ENCODE(313, 11, 4), 3565 /* B66DEC_PROG_TL_EN:12:12 */ 3566 PHYMOD_SYMBOL_FIELD_ENCODE(314, 12, 12), 3567 /* B66DEC_NOBLOCKLOCK_DOUT_SEL:13:14 */ 3568 PHYMOD_SYMBOL_FIELD_ENCODE(312, 14, 13), 3569 /* B66DEC_DOUT_ERRORS_IF_BAD_SYNC:15:15 */ 3570 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(308, 15, 15) 3571 }; 3572 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_DEC_STS0r_fields[] = 3573 { 3574 /* CL49_RXSM_CURRENT_STATE:0:2 */ 3575 PHYMOD_SYMBOL_FIELD_ENCODE(473, 2, 0), 3576 /* CL49_RXSM_HISTORY_STATE:3:10 */ 3577 PHYMOD_SYMBOL_FIELD_ENCODE(474, 10, 3), 3578 /* CL49_R_TYPE_CODED:12:15 */ 3579 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(478, 15, 12) 3580 }; 3581 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_DEC_STS1r_fields[] = 3582 { 3583 /* CL49_BERMON_CURRENT_STATE:0:4 */ 3584 PHYMOD_SYMBOL_FIELD_ENCODE(466, 4, 0), 3585 /* CL49_BERMON_HISTORY_STATE:5:9 */ 3586 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(467, 9, 5) 3587 }; 3588 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_DEC_STS2r_fields[] = 3589 { 3590 /* KCODE66ERRCOUNT:0:7 */ 3591 PHYMOD_SYMBOL_FIELD_ENCODE(835, 7, 0), 3592 /* SYNC66ERRCOUNT:8:15 */ 3593 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1385, 15, 8) 3594 }; 3595 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_DEC_STS3r_fields[] = 3596 { 3597 /* CL49IEEE_ERRORED_BLOCKS:2:9 */ 3598 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(465, 9, 2) 3599 }; 3600 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_DEC_STS4r_fields[] = 3601 { 3602 /* CL48_SYNCACQ_STATE_L:4:14 */ 3603 PHYMOD_SYMBOL_FIELD_ENCODE(460, 14, 4), 3604 /* B66DEC_FAULT_DET:15:15 */ 3605 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(309, 15, 15) 3606 }; 3607 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_DEC_STS5r_fields[] = 3608 { 3609 /* CL48_SYNCACQ_STATE_D_3:0:3 */ 3610 PHYMOD_SYMBOL_FIELD_ENCODE(459, 3, 0), 3611 /* CL48_SYNCACQ_STATE_D_2:4:7 */ 3612 PHYMOD_SYMBOL_FIELD_ENCODE(458, 7, 4), 3613 /* CL48_SYNCACQ_STATE_D_1:8:11 */ 3614 PHYMOD_SYMBOL_FIELD_ENCODE(457, 11, 8), 3615 /* CL48_SYNCACQ_STATE_D_0:12:15 */ 3616 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(456, 15, 12) 3617 }; 3618 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_FEC0r_fields[] = 3619 { 3620 /* FAST_LOCK_EN:9:9 */ 3621 PHYMOD_SYMBOL_FIELD_ENCODE(771, 9, 9), 3622 /* DBG_ENABLE:10:10 */ 3623 PHYMOD_SYMBOL_FIELD_ENCODE(603, 10, 10), 3624 /* ERROR_EN_OVR_VAL:11:11 */ 3625 PHYMOD_SYMBOL_FIELD_ENCODE(760, 11, 11), 3626 /* ERROR_EN_OVR:12:12 */ 3627 PHYMOD_SYMBOL_FIELD_ENCODE(759, 12, 12), 3628 /* FEC_ERR_ENABLE:13:13 */ 3629 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(777, 13, 13) 3630 }; 3631 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_FEC1r_fields[] = 3632 { 3633 /* DBG_ERR_MODE:0:0 */ 3634 PHYMOD_SYMBOL_FIELD_ENCODE(606, 0, 0), 3635 /* BURST_ERR_STATUS_MODE:1:1 */ 3636 PHYMOD_SYMBOL_FIELD_ENCODE(362, 1, 1), 3637 /* DEC_MAX_PM:2:7 */ 3638 PHYMOD_SYMBOL_FIELD_ENCODE(619, 7, 2), 3639 /* INVALID_PARITY_CNT:8:11 */ 3640 PHYMOD_SYMBOL_FIELD_ENCODE(828, 11, 8), 3641 /* GOOD_PARITY_CNT:12:14 */ 3642 PHYMOD_SYMBOL_FIELD_ENCODE(802, 14, 12), 3643 /* FEC_ERROR_CODE_ALL:15:15 */ 3644 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(776, 15, 15) 3645 }; 3646 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_FEC2r_fields[] = 3647 { 3648 /* DEC_GAP_COUNT_MODE:1:1 */ 3649 PHYMOD_SYMBOL_FIELD_ENCODE(618, 1, 1), 3650 /* DEC_17B_BURST_GAP_COUNT:2:4 */ 3651 PHYMOD_SYMBOL_FIELD_ENCODE(615, 4, 2), 3652 /* DEC_18B_BURST_GAP_COUNT:5:7 */ 3653 PHYMOD_SYMBOL_FIELD_ENCODE(616, 7, 5), 3654 /* DEC_19B_BURST_GAP_COUNT:8:10 */ 3655 PHYMOD_SYMBOL_FIELD_ENCODE(617, 10, 8), 3656 /* DEC_PM_MODE:11:15 */ 3657 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(620, 15, 11) 3658 }; 3659 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_FEC_BURST_ERR_STSHr_fields[] = 3660 { 3661 /* BURST_ERR_STATUSH:0:15 */ 3662 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(360, 15, 0) 3663 }; 3664 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_FEC_BURST_ERR_STSLr_fields[] = 3665 { 3666 /* BURST_ERR_STATUSL:0:15 */ 3667 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(361, 15, 0) 3668 }; 3669 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_FEC_CORRBLKSHr_fields[] = 3670 { 3671 /* CORCOUNTH:0:15 */ 3672 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(585, 15, 0) 3673 }; 3674 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_FEC_CORRBLKSLr_fields[] = 3675 { 3676 /* CORCOUNTL:0:15 */ 3677 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(586, 15, 0) 3678 }; 3679 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_FEC_DBG_ERRAHr_fields[] = 3680 { 3681 /* DBG_ERRH:0:15 */ 3682 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(604, 15, 0) 3683 }; 3684 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_FEC_DBG_ERRLr_fields[] = 3685 { 3686 /* DBG_ERRL:0:15 */ 3687 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(605, 15, 0) 3688 }; 3689 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_FEC_UNCORRBLKSHr_fields[] = 3690 { 3691 /* UNCORCOUNTH:0:15 */ 3692 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1549, 15, 0) 3693 }; 3694 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_FEC_UNCORRBLKSLr_fields[] = 3695 { 3696 /* UNCORCOUNTL:0:15 */ 3697 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1550, 15, 0) 3698 }; 3699 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_GBOX_STSr_fields[] = 3700 { 3701 /* GBOX_UNDERFLOW_ERR:0:0 */ 3702 PHYMOD_SYMBOL_FIELD_ENCODE(798, 0, 0), 3703 /* GBOX_OVERFLOW_ERR:1:1 */ 3704 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(797, 1, 1) 3705 }; 3706 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_LNK_CTLr_fields[] = 3707 { 3708 /* LATCH_LINKDOWN_ENABLE:0:0 */ 3709 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(856, 0, 0) 3710 }; 3711 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_PCS_CTL0r_fields[] = 3712 { 3713 /* BRCM64B66_DESCRAMBLER_ENABLE:1:1 */ 3714 PHYMOD_SYMBOL_FIELD_ENCODE(356, 1, 1), 3715 /* LPI_ENABLE:2:2 */ 3716 PHYMOD_SYMBOL_FIELD_ENCODE(908, 2, 2), 3717 /* CL36BYTEDELETEMODE:3:4 */ 3718 PHYMOD_SYMBOL_FIELD_ENCODE(415, 4, 3), 3719 /* DESC2_MODE:5:7 */ 3720 PHYMOD_SYMBOL_FIELD_ENCODE(621, 7, 5), 3721 /* DESKEWMODE:8:10 */ 3722 PHYMOD_SYMBOL_FIELD_ENCODE(625, 10, 8), 3723 /* DECODERMODE:11:13 */ 3724 PHYMOD_SYMBOL_FIELD_ENCODE(613, 13, 11), 3725 /* DESCRAMBLERMODE:14:15 */ 3726 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(623, 15, 14) 3727 }; 3728 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_PCS_LATCH_STS0r_fields[] = 3729 { 3730 /* SYNC_STATUS_LL:6:6 */ 3731 PHYMOD_SYMBOL_FIELD_ENCODE(1392, 6, 6), 3732 /* SYNC_STATUS_LH:7:7 */ 3733 PHYMOD_SYMBOL_FIELD_ENCODE(1391, 7, 7), 3734 /* LINK_STATUS_LL:8:8 */ 3735 PHYMOD_SYMBOL_FIELD_ENCODE(873, 8, 8), 3736 /* LINK_STATUS_LH:9:9 */ 3737 PHYMOD_SYMBOL_FIELD_ENCODE(872, 9, 9), 3738 /* HI_BER_LL:10:10 */ 3739 PHYMOD_SYMBOL_FIELD_ENCODE(810, 10, 10), 3740 /* HI_BER_LH:11:11 */ 3741 PHYMOD_SYMBOL_FIELD_ENCODE(809, 11, 11), 3742 /* DESKEW_STATUS_LL:12:12 */ 3743 PHYMOD_SYMBOL_FIELD_ENCODE(636, 12, 12), 3744 /* DESKEW_STATUS_LH:13:13 */ 3745 PHYMOD_SYMBOL_FIELD_ENCODE(635, 13, 13), 3746 /* AM_LOCK_LL:14:14 */ 3747 PHYMOD_SYMBOL_FIELD_ENCODE(198, 14, 14), 3748 /* AM_LOCK_LH:15:15 */ 3749 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(197, 15, 15) 3750 }; 3751 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_PCS_LATCH_STS1r_fields[] = 3752 { 3753 /* LPI_RECEIVED_LH:3:3 */ 3754 PHYMOD_SYMBOL_FIELD_ENCODE(910, 3, 3), 3755 /* RESERVED_ORDERED_BYTE_3:4:11 */ 3756 PHYMOD_SYMBOL_FIELD_ENCODE(1215, 11, 4), 3757 /* RESERVED_ORDERED_SET_LH:12:12 */ 3758 PHYMOD_SYMBOL_FIELD_ENCODE(1216, 12, 12), 3759 /* LINK_INTERRUPT_LH:13:13 */ 3760 PHYMOD_SYMBOL_FIELD_ENCODE(870, 13, 13), 3761 /* REMOTE_FAULT_LH:14:14 */ 3762 PHYMOD_SYMBOL_FIELD_ENCODE(1204, 14, 14), 3763 /* LOCAL_FAULT_LH:15:15 */ 3764 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(891, 15, 15) 3765 }; 3766 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_PCS_LIVE_STSr_fields[] = 3767 { 3768 /* SYNC_STATUS:0:0 */ 3769 PHYMOD_SYMBOL_FIELD_ENCODE(1390, 0, 0), 3770 /* LINK_STATUS:1:1 */ 3771 PHYMOD_SYMBOL_FIELD_ENCODE(871, 1, 1), 3772 /* HI_BER:2:2 */ 3773 PHYMOD_SYMBOL_FIELD_ENCODE(808, 2, 2), 3774 /* DESKEW_STATUS:3:3 */ 3775 PHYMOD_SYMBOL_FIELD_ENCODE(634, 3, 3), 3776 /* AM_LOCK:4:4 */ 3777 PHYMOD_SYMBOL_FIELD_ENCODE(195, 4, 4), 3778 /* LPI_RECEIVED:5:5 */ 3779 PHYMOD_SYMBOL_FIELD_ENCODE(909, 5, 5), 3780 /* LINK_INTERRUPT:6:6 */ 3781 PHYMOD_SYMBOL_FIELD_ENCODE(869, 6, 6), 3782 /* REMOTE_FAULT:7:7 */ 3783 PHYMOD_SYMBOL_FIELD_ENCODE(1202, 7, 7), 3784 /* LOCAL_FAULT:8:8 */ 3785 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(890, 8, 8) 3786 }; 3787 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_PMA_CTL0r_fields[] = 3788 { 3789 /* RSTB_LANE:0:0 */ 3790 PHYMOD_SYMBOL_FIELD_ENCODE(1262, 0, 0), 3791 /* RX_GBOX_AFRST_EN:1:1 */ 3792 PHYMOD_SYMBOL_FIELD_ENCODE(1288, 1, 1), 3793 /* OS_MODE:3:6 */ 3794 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1033, 6, 3) 3795 }; 3796 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_SYNCACQ_STS0r_fields[] = 3797 { 3798 /* CL36_SYNCACQ_STATE_CODED_PER_LN:0:3 */ 3799 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(424, 3, 0) 3800 }; 3801 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_SYNCACQ_STS1r_fields[] = 3802 { 3803 /* CL36_SYNCACQ_HIS_STATE_PER_LN:0:12 */ 3804 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(423, 12, 0) 3805 }; 3806 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_T12_BARREL_SHIFTER_STr_fields[] = 3807 { 3808 /* SHIFT_AMMOUNT:0:7 */ 3809 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1349, 7, 0) 3810 }; 3811 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_T12_BERCNTr_fields[] = 3812 { 3813 /* BIP_ERROR_COUNT_PER_LANE:0:7 */ 3814 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(352, 7, 0) 3815 }; 3816 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_T12_CL49_LOCK_FSM_STSr_fields[] = 3817 { 3818 /* LSM_CURR_STATE:0:1 */ 3819 PHYMOD_SYMBOL_FIELD_ENCODE(926, 1, 0), 3820 /* LSM_HIS_STATE:2:4 */ 3821 PHYMOD_SYMBOL_FIELD_ENCODE(927, 4, 2), 3822 /* ALIGN_STATUS_CL82:7:7 */ 3823 PHYMOD_SYMBOL_FIELD_ENCODE(17, 7, 7), 3824 /* RMLD_STATUS:8:15 */ 3825 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1256, 15, 8) 3826 }; 3827 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_T12_CL82_PCS_LATCH_STSr_fields[] = 3828 { 3829 /* AM_LOCK_HIS_STATE:0:9 */ 3830 PHYMOD_SYMBOL_FIELD_ENCODE(196, 9, 0), 3831 /* AMRKR_SPACING_ERR_LATCH_MUX:10:10 */ 3832 PHYMOD_SYMBOL_FIELD_ENCODE(18, 10, 10), 3833 /* SYNC_STATUS_LL:12:12 */ 3834 PHYMOD_SYMBOL_FIELD_ENCODE(1392, 12, 12), 3835 /* SYNC_STATUS_LH:13:13 */ 3836 PHYMOD_SYMBOL_FIELD_ENCODE(1391, 13, 13), 3837 /* AM_LOCK_LL:14:14 */ 3838 PHYMOD_SYMBOL_FIELD_ENCODE(198, 14, 14), 3839 /* AM_LOCK_LH:15:15 */ 3840 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(197, 15, 15) 3841 }; 3842 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_T12_CL82_PCS_LIVE_STSr_fields[] = 3843 { 3844 /* AM_LOCK_STATE:0:9 */ 3845 PHYMOD_SYMBOL_FIELD_ENCODE(199, 9, 0), 3846 /* SYNC_STATUS:14:14 */ 3847 PHYMOD_SYMBOL_FIELD_ENCODE(1390, 14, 14), 3848 /* AM_LOCK:15:15 */ 3849 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(195, 15, 15) 3850 }; 3851 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_T12_FEC0r_fields[] = 3852 { 3853 /* FAST_LOCK_EN:9:9 */ 3854 PHYMOD_SYMBOL_FIELD_ENCODE(771, 9, 9), 3855 /* DBG_ENABLE:10:10 */ 3856 PHYMOD_SYMBOL_FIELD_ENCODE(603, 10, 10), 3857 /* ERROR_EN_OVR_VAL:11:11 */ 3858 PHYMOD_SYMBOL_FIELD_ENCODE(760, 11, 11), 3859 /* ERROR_EN_OVR:12:12 */ 3860 PHYMOD_SYMBOL_FIELD_ENCODE(759, 12, 12), 3861 /* FEC_ERR_ENABLE:13:13 */ 3862 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(777, 13, 13) 3863 }; 3864 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_T12_FEC1r_fields[] = 3865 { 3866 /* DBG_ERR_MODE:0:0 */ 3867 PHYMOD_SYMBOL_FIELD_ENCODE(606, 0, 0), 3868 /* BURST_ERR_STATUS_MODE:1:1 */ 3869 PHYMOD_SYMBOL_FIELD_ENCODE(362, 1, 1), 3870 /* DEC_MAX_PM:2:7 */ 3871 PHYMOD_SYMBOL_FIELD_ENCODE(619, 7, 2), 3872 /* INVALID_PARITY_CNT:8:11 */ 3873 PHYMOD_SYMBOL_FIELD_ENCODE(828, 11, 8), 3874 /* GOOD_PARITY_CNT:12:14 */ 3875 PHYMOD_SYMBOL_FIELD_ENCODE(802, 14, 12), 3876 /* FEC_ERROR_CODE_ALL:15:15 */ 3877 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(776, 15, 15) 3878 }; 3879 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_T12_FEC2r_fields[] = 3880 { 3881 /* DEC_GAP_COUNT_MODE:1:1 */ 3882 PHYMOD_SYMBOL_FIELD_ENCODE(618, 1, 1), 3883 /* DEC_17B_BURST_GAP_COUNT:2:4 */ 3884 PHYMOD_SYMBOL_FIELD_ENCODE(615, 4, 2), 3885 /* DEC_18B_BURST_GAP_COUNT:5:7 */ 3886 PHYMOD_SYMBOL_FIELD_ENCODE(616, 7, 5), 3887 /* DEC_19B_BURST_GAP_COUNT:8:10 */ 3888 PHYMOD_SYMBOL_FIELD_ENCODE(617, 10, 8), 3889 /* DEC_PM_MODE:11:15 */ 3890 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(620, 15, 11) 3891 }; 3892 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_T12_FEC_BURST_ERR_STSHr_fields[] = 3893 { 3894 /* BURST_ERR_STATUSH:0:15 */ 3895 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(360, 15, 0) 3896 }; 3897 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_T12_FEC_BURST_ERR_STSLr_fields[] = 3898 { 3899 /* BURST_ERR_STATUSL:0:15 */ 3900 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(361, 15, 0) 3901 }; 3902 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_T12_FEC_CORRBLKSHr_fields[] = 3903 { 3904 /* CORCOUNTH:0:15 */ 3905 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(585, 15, 0) 3906 }; 3907 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_T12_FEC_CORRBLKSLr_fields[] = 3908 { 3909 /* CORCOUNTL:0:15 */ 3910 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(586, 15, 0) 3911 }; 3912 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_T12_FEC_DBG_ERRAHr_fields[] = 3913 { 3914 /* DBG_ERRH:0:15 */ 3915 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(604, 15, 0) 3916 }; 3917 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_T12_FEC_DBG_ERRLr_fields[] = 3918 { 3919 /* DBG_ERRL:0:15 */ 3920 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(605, 15, 0) 3921 }; 3922 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_T12_FEC_UNCORRBLKSHr_fields[] = 3923 { 3924 /* UNCORCOUNTH:0:15 */ 3925 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1549, 15, 0) 3926 }; 3927 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_T12_FEC_UNCORRBLKSLr_fields[] = 3928 { 3929 /* UNCORCOUNTL:0:15 */ 3930 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1550, 15, 0) 3931 }; 3932 static uint32_t BCMI_QSGMIIE_SERDES_RX_X4_T12_MLD_VL_INFO0r_fields[] = 3933 { 3934 /* VL_ON_LL_0:0:4 */ 3935 PHYMOD_SYMBOL_FIELD_ENCODE(1570, 4, 0), 3936 /* VL_ON_LL_1:5:9 */ 3937 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1571, 9, 5) 3938 }; 3939 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_PIPE_RST_CNTr_fields[] = 3940 { 3941 /* PIPELINE_RESET_COUNT:0:15 */ 3942 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1096, 15, 0) 3943 }; 3944 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_PLL_LOCK_TMRr_fields[] = 3945 { 3946 /* PLL_LOCK_TIMER_PERIOD:0:15 */ 3947 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1117, 15, 0) 3948 }; 3949 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_PMD_LOCK_TMRr_fields[] = 3950 { 3951 /* PMD_LOCK_TIMER_PERIOD:0:15 */ 3952 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1140, 15, 0) 3953 }; 3954 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR0_0r_fields[] = 3955 { 3956 /* ENCODEMODE:0:2 */ 3957 PHYMOD_SYMBOL_FIELD_ENCODE(747, 2, 0), 3958 /* FEC_ENABLE:8:8 */ 3959 PHYMOD_SYMBOL_FIELD_ENCODE(774, 8, 8), 3960 /* CL72_ENABLE:9:9 */ 3961 PHYMOD_SYMBOL_FIELD_ENCODE(495, 9, 9), 3962 /* SCR_MODE:10:11 */ 3963 PHYMOD_SYMBOL_FIELD_ENCODE(1310, 11, 10), 3964 /* OS_MODE:12:15 */ 3965 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1033, 15, 12) 3966 }; 3967 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR0_1r_fields[] = 3968 { 3969 /* BRCM64B66_DESCRAMBLER_ENABLE:1:1 */ 3970 PHYMOD_SYMBOL_FIELD_ENCODE(356, 1, 1), 3971 /* CL36BYTEDELETEMODE:3:4 */ 3972 PHYMOD_SYMBOL_FIELD_ENCODE(415, 4, 3), 3973 /* DESC2_MODE:5:7 */ 3974 PHYMOD_SYMBOL_FIELD_ENCODE(621, 7, 5), 3975 /* DESKEWMODE:8:10 */ 3976 PHYMOD_SYMBOL_FIELD_ENCODE(625, 10, 8), 3977 /* DECODERMODE:11:13 */ 3978 PHYMOD_SYMBOL_FIELD_ENCODE(613, 13, 11), 3979 /* DESCRAMBLERMODE:14:15 */ 3980 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(623, 15, 14) 3981 }; 3982 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR0_2r_fields[] = 3983 { 3984 /* CL36_EN:0:0 */ 3985 PHYMOD_SYMBOL_FIELD_ENCODE(418, 0, 0), 3986 /* REORDER_EN:1:1 */ 3987 PHYMOD_SYMBOL_FIELD_ENCODE(1208, 1, 1), 3988 /* BLOCK_SYNC_MODE:4:6 */ 3989 PHYMOD_SYMBOL_FIELD_ENCODE(353, 6, 4), 3990 /* CHK_END_EN:10:10 */ 3991 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(413, 10, 10) 3992 }; 3993 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR0_3r_fields[] = 3994 { 3995 /* CLOCKCNT0:0:13 */ 3996 PHYMOD_SYMBOL_FIELD_ENCODE(570, 13, 0), 3997 /* SGMII_SPD_SWITCH:15:15 */ 3998 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1344, 15, 15) 3999 }; 4000 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR0_4r_fields[] = 4001 { 4002 /* CLOCKCNT1:0:7 */ 4003 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(572, 7, 0) 4004 }; 4005 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR0_5r_fields[] = 4006 { 4007 /* LOOPCNT1:0:5 */ 4008 PHYMOD_SYMBOL_FIELD_ENCODE(902, 5, 0), 4009 /* LOOPCNT0:6:13 */ 4010 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(900, 13, 6) 4011 }; 4012 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR0_6r_fields[] = 4013 { 4014 /* MAC_CREDITGENCNT:0:12 */ 4015 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(931, 12, 0) 4016 }; 4017 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR0_7r_fields[] = 4018 { 4019 /* PCS_CLOCKCNT0:0:13 */ 4020 PHYMOD_SYMBOL_FIELD_ENCODE(1070, 13, 0), 4021 /* PCS_CREDITENABLE:14:14 */ 4022 PHYMOD_SYMBOL_FIELD_ENCODE(1072, 14, 14), 4023 /* REPLICATION_CNT:15:15 */ 4024 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1210, 15, 15) 4025 }; 4026 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR0_8r_fields[] = 4027 { 4028 /* PCS_CREDITGENCNT:0:12 */ 4029 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1074, 12, 0) 4030 }; 4031 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR0_SPDr_fields[] = 4032 { 4033 /* NUM_LANES:0:2 */ 4034 PHYMOD_SYMBOL_FIELD_ENCODE(1022, 2, 0), 4035 /* SPEED:8:15 */ 4036 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1372, 15, 8) 4037 }; 4038 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR1_0r_fields[] = 4039 { 4040 /* ENCODEMODE:0:2 */ 4041 PHYMOD_SYMBOL_FIELD_ENCODE(747, 2, 0), 4042 /* FEC_ENABLE:8:8 */ 4043 PHYMOD_SYMBOL_FIELD_ENCODE(774, 8, 8), 4044 /* CL72_ENABLE:9:9 */ 4045 PHYMOD_SYMBOL_FIELD_ENCODE(495, 9, 9), 4046 /* SCR_MODE:10:11 */ 4047 PHYMOD_SYMBOL_FIELD_ENCODE(1310, 11, 10), 4048 /* OS_MODE:12:15 */ 4049 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1033, 15, 12) 4050 }; 4051 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR1_1r_fields[] = 4052 { 4053 /* BRCM64B66_DESCRAMBLER_ENABLE:1:1 */ 4054 PHYMOD_SYMBOL_FIELD_ENCODE(356, 1, 1), 4055 /* CL36BYTEDELETEMODE:3:4 */ 4056 PHYMOD_SYMBOL_FIELD_ENCODE(415, 4, 3), 4057 /* DESC2_MODE:5:7 */ 4058 PHYMOD_SYMBOL_FIELD_ENCODE(621, 7, 5), 4059 /* DESKEWMODE:8:10 */ 4060 PHYMOD_SYMBOL_FIELD_ENCODE(625, 10, 8), 4061 /* DECODERMODE:11:13 */ 4062 PHYMOD_SYMBOL_FIELD_ENCODE(613, 13, 11), 4063 /* DESCRAMBLERMODE:14:15 */ 4064 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(623, 15, 14) 4065 }; 4066 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR1_2r_fields[] = 4067 { 4068 /* CL36_EN:0:0 */ 4069 PHYMOD_SYMBOL_FIELD_ENCODE(418, 0, 0), 4070 /* REORDER_EN:1:1 */ 4071 PHYMOD_SYMBOL_FIELD_ENCODE(1208, 1, 1), 4072 /* BLOCK_SYNC_MODE:4:6 */ 4073 PHYMOD_SYMBOL_FIELD_ENCODE(353, 6, 4), 4074 /* CHK_END_EN:10:10 */ 4075 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(413, 10, 10) 4076 }; 4077 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR1_3r_fields[] = 4078 { 4079 /* CLOCKCNT0:0:13 */ 4080 PHYMOD_SYMBOL_FIELD_ENCODE(570, 13, 0), 4081 /* SGMII_SPD_SWITCH:15:15 */ 4082 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1344, 15, 15) 4083 }; 4084 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR1_4r_fields[] = 4085 { 4086 /* CLOCKCNT1:0:7 */ 4087 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(572, 7, 0) 4088 }; 4089 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR1_5r_fields[] = 4090 { 4091 /* LOOPCNT1:0:5 */ 4092 PHYMOD_SYMBOL_FIELD_ENCODE(902, 5, 0), 4093 /* LOOPCNT0:6:13 */ 4094 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(900, 13, 6) 4095 }; 4096 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR1_6r_fields[] = 4097 { 4098 /* MAC_CREDITGENCNT:0:12 */ 4099 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(931, 12, 0) 4100 }; 4101 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR1_7r_fields[] = 4102 { 4103 /* PCS_CLOCKCNT0:0:13 */ 4104 PHYMOD_SYMBOL_FIELD_ENCODE(1070, 13, 0), 4105 /* PCS_CREDITENABLE:14:14 */ 4106 PHYMOD_SYMBOL_FIELD_ENCODE(1072, 14, 14), 4107 /* REPLICATION_CNT:15:15 */ 4108 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1210, 15, 15) 4109 }; 4110 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR1_8r_fields[] = 4111 { 4112 /* PCS_CREDITGENCNT:0:12 */ 4113 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1074, 12, 0) 4114 }; 4115 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR1_SPDr_fields[] = 4116 { 4117 /* NUM_LANES:0:2 */ 4118 PHYMOD_SYMBOL_FIELD_ENCODE(1022, 2, 0), 4119 /* SPEED:8:15 */ 4120 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1372, 15, 8) 4121 }; 4122 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR2_0r_fields[] = 4123 { 4124 /* ENCODEMODE:0:2 */ 4125 PHYMOD_SYMBOL_FIELD_ENCODE(747, 2, 0), 4126 /* FEC_ENABLE:8:8 */ 4127 PHYMOD_SYMBOL_FIELD_ENCODE(774, 8, 8), 4128 /* CL72_ENABLE:9:9 */ 4129 PHYMOD_SYMBOL_FIELD_ENCODE(495, 9, 9), 4130 /* SCR_MODE:10:11 */ 4131 PHYMOD_SYMBOL_FIELD_ENCODE(1310, 11, 10), 4132 /* OS_MODE:12:15 */ 4133 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1033, 15, 12) 4134 }; 4135 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR2_1r_fields[] = 4136 { 4137 /* BRCM64B66_DESCRAMBLER_ENABLE:1:1 */ 4138 PHYMOD_SYMBOL_FIELD_ENCODE(356, 1, 1), 4139 /* CL36BYTEDELETEMODE:3:4 */ 4140 PHYMOD_SYMBOL_FIELD_ENCODE(415, 4, 3), 4141 /* DESC2_MODE:5:7 */ 4142 PHYMOD_SYMBOL_FIELD_ENCODE(621, 7, 5), 4143 /* DESKEWMODE:8:10 */ 4144 PHYMOD_SYMBOL_FIELD_ENCODE(625, 10, 8), 4145 /* DECODERMODE:11:13 */ 4146 PHYMOD_SYMBOL_FIELD_ENCODE(613, 13, 11), 4147 /* DESCRAMBLERMODE:14:15 */ 4148 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(623, 15, 14) 4149 }; 4150 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR2_2r_fields[] = 4151 { 4152 /* CL36_EN:0:0 */ 4153 PHYMOD_SYMBOL_FIELD_ENCODE(418, 0, 0), 4154 /* REORDER_EN:1:1 */ 4155 PHYMOD_SYMBOL_FIELD_ENCODE(1208, 1, 1), 4156 /* BLOCK_SYNC_MODE:4:6 */ 4157 PHYMOD_SYMBOL_FIELD_ENCODE(353, 6, 4), 4158 /* CHK_END_EN:10:10 */ 4159 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(413, 10, 10) 4160 }; 4161 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR2_3r_fields[] = 4162 { 4163 /* CLOCKCNT0:0:13 */ 4164 PHYMOD_SYMBOL_FIELD_ENCODE(570, 13, 0), 4165 /* SGMII_SPD_SWITCH:15:15 */ 4166 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1344, 15, 15) 4167 }; 4168 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR2_4r_fields[] = 4169 { 4170 /* CLOCKCNT1:0:7 */ 4171 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(572, 7, 0) 4172 }; 4173 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR2_5r_fields[] = 4174 { 4175 /* LOOPCNT1:0:5 */ 4176 PHYMOD_SYMBOL_FIELD_ENCODE(902, 5, 0), 4177 /* LOOPCNT0:6:13 */ 4178 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(900, 13, 6) 4179 }; 4180 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR2_6r_fields[] = 4181 { 4182 /* MAC_CREDITGENCNT:0:12 */ 4183 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(931, 12, 0) 4184 }; 4185 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR2_7r_fields[] = 4186 { 4187 /* PCS_CLOCKCNT0:0:13 */ 4188 PHYMOD_SYMBOL_FIELD_ENCODE(1070, 13, 0), 4189 /* PCS_CREDITENABLE:14:14 */ 4190 PHYMOD_SYMBOL_FIELD_ENCODE(1072, 14, 14), 4191 /* REPLICATION_CNT:15:15 */ 4192 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1210, 15, 15) 4193 }; 4194 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR2_8r_fields[] = 4195 { 4196 /* PCS_CREDITGENCNT:0:12 */ 4197 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1074, 12, 0) 4198 }; 4199 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR2_SPDr_fields[] = 4200 { 4201 /* NUM_LANES:0:2 */ 4202 PHYMOD_SYMBOL_FIELD_ENCODE(1022, 2, 0), 4203 /* SPEED:8:15 */ 4204 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1372, 15, 8) 4205 }; 4206 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR3_0r_fields[] = 4207 { 4208 /* ENCODEMODE:0:2 */ 4209 PHYMOD_SYMBOL_FIELD_ENCODE(747, 2, 0), 4210 /* FEC_ENABLE:8:8 */ 4211 PHYMOD_SYMBOL_FIELD_ENCODE(774, 8, 8), 4212 /* CL72_ENABLE:9:9 */ 4213 PHYMOD_SYMBOL_FIELD_ENCODE(495, 9, 9), 4214 /* SCR_MODE:10:11 */ 4215 PHYMOD_SYMBOL_FIELD_ENCODE(1310, 11, 10), 4216 /* OS_MODE:12:15 */ 4217 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1033, 15, 12) 4218 }; 4219 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR3_1r_fields[] = 4220 { 4221 /* BRCM64B66_DESCRAMBLER_ENABLE:1:1 */ 4222 PHYMOD_SYMBOL_FIELD_ENCODE(356, 1, 1), 4223 /* CL36BYTEDELETEMODE:3:4 */ 4224 PHYMOD_SYMBOL_FIELD_ENCODE(415, 4, 3), 4225 /* DESC2_MODE:5:7 */ 4226 PHYMOD_SYMBOL_FIELD_ENCODE(621, 7, 5), 4227 /* DESKEWMODE:8:10 */ 4228 PHYMOD_SYMBOL_FIELD_ENCODE(625, 10, 8), 4229 /* DECODERMODE:11:13 */ 4230 PHYMOD_SYMBOL_FIELD_ENCODE(613, 13, 11), 4231 /* DESCRAMBLERMODE:14:15 */ 4232 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(623, 15, 14) 4233 }; 4234 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR3_2r_fields[] = 4235 { 4236 /* CL36_EN:0:0 */ 4237 PHYMOD_SYMBOL_FIELD_ENCODE(418, 0, 0), 4238 /* REORDER_EN:1:1 */ 4239 PHYMOD_SYMBOL_FIELD_ENCODE(1208, 1, 1), 4240 /* BLOCK_SYNC_MODE:4:6 */ 4241 PHYMOD_SYMBOL_FIELD_ENCODE(353, 6, 4), 4242 /* CHK_END_EN:10:10 */ 4243 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(413, 10, 10) 4244 }; 4245 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR3_3r_fields[] = 4246 { 4247 /* CLOCKCNT0:0:13 */ 4248 PHYMOD_SYMBOL_FIELD_ENCODE(570, 13, 0), 4249 /* SGMII_SPD_SWITCH:15:15 */ 4250 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1344, 15, 15) 4251 }; 4252 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR3_4r_fields[] = 4253 { 4254 /* CLOCKCNT1:0:7 */ 4255 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(572, 7, 0) 4256 }; 4257 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR3_5r_fields[] = 4258 { 4259 /* LOOPCNT1:0:5 */ 4260 PHYMOD_SYMBOL_FIELD_ENCODE(902, 5, 0), 4261 /* LOOPCNT0:6:13 */ 4262 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(900, 13, 6) 4263 }; 4264 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR3_6r_fields[] = 4265 { 4266 /* MAC_CREDITGENCNT:0:12 */ 4267 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(931, 12, 0) 4268 }; 4269 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR3_7r_fields[] = 4270 { 4271 /* PCS_CLOCKCNT0:0:13 */ 4272 PHYMOD_SYMBOL_FIELD_ENCODE(1070, 13, 0), 4273 /* PCS_CREDITENABLE:14:14 */ 4274 PHYMOD_SYMBOL_FIELD_ENCODE(1072, 14, 14), 4275 /* REPLICATION_CNT:15:15 */ 4276 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1210, 15, 15) 4277 }; 4278 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR3_8r_fields[] = 4279 { 4280 /* PCS_CREDITGENCNT:0:12 */ 4281 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1074, 12, 0) 4282 }; 4283 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR3_SPDr_fields[] = 4284 { 4285 /* NUM_LANES:0:2 */ 4286 PHYMOD_SYMBOL_FIELD_ENCODE(1022, 2, 0), 4287 /* SPEED:8:15 */ 4288 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1372, 15, 8) 4289 }; 4290 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_STSr_fields[] = 4291 { 4292 /* RESOLVED_PORT_MODE:0:2 */ 4293 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1218, 2, 0) 4294 }; 4295 static uint32_t BCMI_QSGMIIE_SERDES_SC_X1_TX_RST_CNTr_fields[] = 4296 { 4297 /* TX_RESET_COUNT:0:15 */ 4298 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1526, 15, 0) 4299 }; 4300 static uint32_t BCMI_QSGMIIE_SERDES_SC_X4_BYPASSr_fields[] = 4301 { 4302 /* SC_BYPASS:0:0 */ 4303 PHYMOD_SYMBOL_FIELD_ENCODE(1323, 0, 0), 4304 /* SC_IGNORE_TX_DATA_VLD:1:1 */ 4305 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1325, 1, 1) 4306 }; 4307 static uint32_t BCMI_QSGMIIE_SERDES_SC_X4_CTLr_fields[] = 4308 { 4309 /* SW_SPEED:0:7 */ 4310 PHYMOD_SYMBOL_FIELD_ENCODE(1381, 7, 0), 4311 /* SW_SPEED_CHANGE:8:8 */ 4312 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1382, 8, 8) 4313 }; 4314 static uint32_t BCMI_QSGMIIE_SERDES_SC_X4_DBGr_fields[] = 4315 { 4316 /* SC_FSM_STATUS:0:15 */ 4317 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1324, 15, 0) 4318 }; 4319 static uint32_t BCMI_QSGMIIE_SERDES_SC_X4_ERRr_fields[] = 4320 { 4321 /* PLL_LOCK_TIMED_OUT:0:0 */ 4322 PHYMOD_SYMBOL_FIELD_ENCODE(1116, 0, 0), 4323 /* PMD_LOCK_TIMED_OUT:1:1 */ 4324 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1139, 1, 1) 4325 }; 4326 static uint32_t BCMI_QSGMIIE_SERDES_SC_X4_FLD_OVRR_EN0_TYPEr_fields[] = 4327 { 4328 /* BLOCK_SYNC_MODE_OEN:0:0 */ 4329 PHYMOD_SYMBOL_FIELD_ENCODE(354, 0, 0), 4330 /* CHK_END_EN_OEN:2:2 */ 4331 PHYMOD_SYMBOL_FIELD_ENCODE(414, 2, 2), 4332 /* BRCM64B66_DESCRAMBLER_ENABLE_OEN:3:3 */ 4333 PHYMOD_SYMBOL_FIELD_ENCODE(357, 3, 3), 4334 /* CL36BYTEDELETEMODE_OEN:4:4 */ 4335 PHYMOD_SYMBOL_FIELD_ENCODE(416, 4, 4), 4336 /* DESC2_MODE_OEN:5:5 */ 4337 PHYMOD_SYMBOL_FIELD_ENCODE(622, 5, 5), 4338 /* DESKEWMODE_OEN:6:6 */ 4339 PHYMOD_SYMBOL_FIELD_ENCODE(626, 6, 6), 4340 /* DECODERMODE_OEN:7:7 */ 4341 PHYMOD_SYMBOL_FIELD_ENCODE(614, 7, 7), 4342 /* DESCRAMBLERMODE_OEN:8:8 */ 4343 PHYMOD_SYMBOL_FIELD_ENCODE(624, 8, 8), 4344 /* ENCODEMODE_OEN:9:9 */ 4345 PHYMOD_SYMBOL_FIELD_ENCODE(748, 9, 9), 4346 /* FEC_ENABLE_OEN:10:10 */ 4347 PHYMOD_SYMBOL_FIELD_ENCODE(775, 10, 10), 4348 /* SCR_MODE_OEN:11:11 */ 4349 PHYMOD_SYMBOL_FIELD_ENCODE(1311, 11, 11), 4350 /* OS_MODE_OEN:12:12 */ 4351 PHYMOD_SYMBOL_FIELD_ENCODE(1034, 12, 12), 4352 /* NUM_LANES_OEN:14:14 */ 4353 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1023, 14, 14) 4354 }; 4355 static uint32_t BCMI_QSGMIIE_SERDES_SC_X4_FLD_OVRR_EN1_TYPEr_fields[] = 4356 { 4357 /* PCS_CREDITGENCNT_OEN:0:0 */ 4358 PHYMOD_SYMBOL_FIELD_ENCODE(1075, 0, 0), 4359 /* PCS_CLOCKCNT0_OEN:1:1 */ 4360 PHYMOD_SYMBOL_FIELD_ENCODE(1071, 1, 1), 4361 /* PCS_CREDITENABLE_OEN:2:2 */ 4362 PHYMOD_SYMBOL_FIELD_ENCODE(1073, 2, 2), 4363 /* REPLICATION_CNT_OEN:3:3 */ 4364 PHYMOD_SYMBOL_FIELD_ENCODE(1211, 3, 3), 4365 /* MAC_CREDITGENCNT_OEN:4:4 */ 4366 PHYMOD_SYMBOL_FIELD_ENCODE(932, 4, 4), 4367 /* LOOPCNT1_OEN:5:5 */ 4368 PHYMOD_SYMBOL_FIELD_ENCODE(903, 5, 5), 4369 /* LOOPCNT0_OEN:6:6 */ 4370 PHYMOD_SYMBOL_FIELD_ENCODE(901, 6, 6), 4371 /* CLOCKCNT1_OEN:7:7 */ 4372 PHYMOD_SYMBOL_FIELD_ENCODE(573, 7, 7), 4373 /* CLOCKCNT0_OEN:8:8 */ 4374 PHYMOD_SYMBOL_FIELD_ENCODE(571, 8, 8), 4375 /* CREDITENABLE_OEN:9:9 */ 4376 PHYMOD_SYMBOL_FIELD_ENCODE(600, 9, 9), 4377 /* SGMII_SPD_SWITCH_OEN:10:10 */ 4378 PHYMOD_SYMBOL_FIELD_ENCODE(1345, 10, 10), 4379 /* CL36_EN_OEN:11:11 */ 4380 PHYMOD_SYMBOL_FIELD_ENCODE(419, 11, 11), 4381 /* REORDER_EN_OEN:12:12 */ 4382 PHYMOD_SYMBOL_FIELD_ENCODE(1209, 12, 12), 4383 /* CL72_EN_OEN:13:13 */ 4384 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(497, 13, 13) 4385 }; 4386 static uint32_t BCMI_QSGMIIE_SERDES_SC_X4_LN_NUM_OVRRr_fields[] = 4387 { 4388 /* NUM_LANES_OVERRIDE_VALUE:0:2 */ 4389 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1024, 2, 0) 4390 }; 4391 static uint32_t BCMI_QSGMIIE_SERDES_SC_X4_RSLVD0r_fields[] = 4392 { 4393 /* ENCODEMODE:0:2 */ 4394 PHYMOD_SYMBOL_FIELD_ENCODE(747, 2, 0), 4395 /* FEC_ENABLE:8:8 */ 4396 PHYMOD_SYMBOL_FIELD_ENCODE(774, 8, 8), 4397 /* CL72_ENABLE:9:9 */ 4398 PHYMOD_SYMBOL_FIELD_ENCODE(495, 9, 9), 4399 /* SCR_MODE:10:11 */ 4400 PHYMOD_SYMBOL_FIELD_ENCODE(1310, 11, 10), 4401 /* OS_MODE:12:15 */ 4402 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1033, 15, 12) 4403 }; 4404 static uint32_t BCMI_QSGMIIE_SERDES_SC_X4_RSLVD1r_fields[] = 4405 { 4406 /* BRCM64B66_DESCRAMBLER_ENABLE:1:1 */ 4407 PHYMOD_SYMBOL_FIELD_ENCODE(356, 1, 1), 4408 /* CL36BYTEDELETEMODE:3:4 */ 4409 PHYMOD_SYMBOL_FIELD_ENCODE(415, 4, 3), 4410 /* DESC2_MODE:5:7 */ 4411 PHYMOD_SYMBOL_FIELD_ENCODE(621, 7, 5), 4412 /* DESKEWMODE:8:10 */ 4413 PHYMOD_SYMBOL_FIELD_ENCODE(625, 10, 8), 4414 /* DECODERMODE:11:13 */ 4415 PHYMOD_SYMBOL_FIELD_ENCODE(613, 13, 11), 4416 /* DESCRAMBLERMODE:14:15 */ 4417 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(623, 15, 14) 4418 }; 4419 static uint32_t BCMI_QSGMIIE_SERDES_SC_X4_RSLVD2r_fields[] = 4420 { 4421 /* CL36_EN:0:0 */ 4422 PHYMOD_SYMBOL_FIELD_ENCODE(418, 0, 0), 4423 /* REORDER_EN:1:1 */ 4424 PHYMOD_SYMBOL_FIELD_ENCODE(1208, 1, 1), 4425 /* BLOCK_SYNC_MODE:4:6 */ 4426 PHYMOD_SYMBOL_FIELD_ENCODE(353, 6, 4), 4427 /* CHK_END_EN:10:10 */ 4428 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(413, 10, 10) 4429 }; 4430 static uint32_t BCMI_QSGMIIE_SERDES_SC_X4_RSLVD3r_fields[] = 4431 { 4432 /* CLOCKCNT0:0:13 */ 4433 PHYMOD_SYMBOL_FIELD_ENCODE(570, 13, 0), 4434 /* SGMII_SPD_SWITCH:15:15 */ 4435 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1344, 15, 15) 4436 }; 4437 static uint32_t BCMI_QSGMIIE_SERDES_SC_X4_RSLVD4r_fields[] = 4438 { 4439 /* CLOCKCNT1:0:7 */ 4440 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(572, 7, 0) 4441 }; 4442 static uint32_t BCMI_QSGMIIE_SERDES_SC_X4_RSLVD5r_fields[] = 4443 { 4444 /* LOOPCNT1:0:5 */ 4445 PHYMOD_SYMBOL_FIELD_ENCODE(902, 5, 0), 4446 /* LOOPCNT0:6:13 */ 4447 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(900, 13, 6) 4448 }; 4449 static uint32_t BCMI_QSGMIIE_SERDES_SC_X4_RSLVD6r_fields[] = 4450 { 4451 /* MAC_CREDITGENCNT:0:12 */ 4452 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(931, 12, 0) 4453 }; 4454 static uint32_t BCMI_QSGMIIE_SERDES_SC_X4_RSLVD7r_fields[] = 4455 { 4456 /* PCS_CLOCKCNT0:0:13 */ 4457 PHYMOD_SYMBOL_FIELD_ENCODE(1070, 13, 0), 4458 /* PCS_CREDITENABLE:14:14 */ 4459 PHYMOD_SYMBOL_FIELD_ENCODE(1072, 14, 14), 4460 /* REPLICATION_CNT:15:15 */ 4461 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1210, 15, 15) 4462 }; 4463 static uint32_t BCMI_QSGMIIE_SERDES_SC_X4_RSLVD8r_fields[] = 4464 { 4465 /* PCS_CREDITGENCNT:0:12 */ 4466 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1074, 12, 0) 4467 }; 4468 static uint32_t BCMI_QSGMIIE_SERDES_SC_X4_RSLVD_SPDr_fields[] = 4469 { 4470 /* NUM_LANES:0:2 */ 4471 PHYMOD_SYMBOL_FIELD_ENCODE(1022, 2, 0), 4472 /* SPEED:8:15 */ 4473 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1372, 15, 8) 4474 }; 4475 static uint32_t BCMI_QSGMIIE_SERDES_SC_X4_STSr_fields[] = 4476 { 4477 /* SW_SPEED_CHANGE_DONE:0:0 */ 4478 PHYMOD_SYMBOL_FIELD_ENCODE(1383, 0, 0), 4479 /* SW_SPEED_CONFIG_VLD:1:1 */ 4480 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1384, 1, 1) 4481 }; 4482 static uint32_t BCMI_QSGMIIE_SERDES_SERDES_ID0r_fields[] = 4483 { 4484 /* MODEL:0:5 */ 4485 PHYMOD_SYMBOL_FIELD_ENCODE(1012, 5, 0), 4486 /* TECH:6:8 */ 4487 PHYMOD_SYMBOL_FIELD_ENCODE(1400, 8, 6), 4488 /* BONDING:9:10 */ 4489 PHYMOD_SYMBOL_FIELD_ENCODE(355, 10, 9), 4490 /* REV_NUMBER:11:13 */ 4491 PHYMOD_SYMBOL_FIELD_ENCODE(1239, 13, 11), 4492 /* REV_LETTER:14:15 */ 4493 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1238, 15, 14) 4494 }; 4495 static uint32_t BCMI_QSGMIIE_SERDES_SERDES_ID1r_fields[] = 4496 { 4497 /* PROTOCOL:0:11 */ 4498 PHYMOD_SYMBOL_FIELD_ENCODE(1178, 11, 0), 4499 /* MULTIPLICITY:12:15 */ 4500 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1017, 15, 12) 4501 }; 4502 static uint32_t BCMI_QSGMIIE_SERDES_SERDES_ID2r_fields[] = 4503 { 4504 /* SPEED:0:15 */ 4505 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1372, 15, 0) 4506 }; 4507 static uint32_t BCMI_QSGMIIE_SERDES_SIGDET_CTL0r_fields[] = 4508 { 4509 /* SIGNAL_DETECT_FILTER_COUNT:0:4 */ 4510 PHYMOD_SYMBOL_FIELD_ENCODE(1355, 4, 0), 4511 /* LOS_FILTER_COUNT:8:12 */ 4512 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(905, 12, 8) 4513 }; 4514 static uint32_t BCMI_QSGMIIE_SERDES_SIGDET_CTL1r_fields[] = 4515 { 4516 /* AFE_SIGNAL_DETECT_DIS:0:0 */ 4517 PHYMOD_SYMBOL_FIELD_ENCODE(8, 0, 0), 4518 /* EXT_LOS_EN:1:1 */ 4519 PHYMOD_SYMBOL_FIELD_ENCODE(768, 1, 1), 4520 /* EXT_LOS_INV:2:2 */ 4521 PHYMOD_SYMBOL_FIELD_ENCODE(769, 2, 2), 4522 /* IGNORE_LP_MODE:3:3 */ 4523 PHYMOD_SYMBOL_FIELD_ENCODE(823, 3, 3), 4524 /* SIGNAL_DETECT_FILTER_1US:4:4 */ 4525 PHYMOD_SYMBOL_FIELD_ENCODE(1354, 4, 4), 4526 /* ENERGY_DETECT_FRC:5:5 */ 4527 PHYMOD_SYMBOL_FIELD_ENCODE(751, 5, 5), 4528 /* ENERGY_DETECT_FRC_VAL:6:6 */ 4529 PHYMOD_SYMBOL_FIELD_ENCODE(752, 6, 6), 4530 /* SIGNAL_DETECT_FRC:7:7 */ 4531 PHYMOD_SYMBOL_FIELD_ENCODE(1356, 7, 7), 4532 /* SIGNAL_DETECT_FRC_VAL:8:8 */ 4533 PHYMOD_SYMBOL_FIELD_ENCODE(1357, 8, 8), 4534 /* ENERGY_DETECT_MASK_COUNT:11:15 */ 4535 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(753, 15, 11) 4536 }; 4537 static uint32_t BCMI_QSGMIIE_SERDES_SIGDET_CTL2r_fields[] = 4538 { 4539 /* LOS_THRESH:0:2 */ 4540 PHYMOD_SYMBOL_FIELD_ENCODE(906, 2, 0), 4541 /* SIGNAL_DETECT_THRESH:4:6 */ 4542 PHYMOD_SYMBOL_FIELD_ENCODE(1364, 6, 4), 4543 /* HOLD_LOS_COUNT:8:10 */ 4544 PHYMOD_SYMBOL_FIELD_ENCODE(811, 10, 8), 4545 /* HOLD_SD_COUNT:11:13 */ 4546 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(812, 13, 11) 4547 }; 4548 static uint32_t BCMI_QSGMIIE_SERDES_SIGDET_STS0r_fields[] = 4549 { 4550 /* SIGNAL_DETECT:0:0 */ 4551 PHYMOD_SYMBOL_FIELD_ENCODE(1351, 0, 0), 4552 /* SIGNAL_DETECT_CHANGE:1:1 */ 4553 PHYMOD_SYMBOL_FIELD_ENCODE(1352, 1, 1), 4554 /* ENERGY_DETECT:2:2 */ 4555 PHYMOD_SYMBOL_FIELD_ENCODE(749, 2, 2), 4556 /* ENERGY_DETECT_CHANGE:3:3 */ 4557 PHYMOD_SYMBOL_FIELD_ENCODE(750, 3, 3), 4558 /* SIGNAL_DETECT_RAW:4:4 */ 4559 PHYMOD_SYMBOL_FIELD_ENCODE(1361, 4, 4), 4560 /* SIGNAL_DETECT_RAW_CHANGE:5:5 */ 4561 PHYMOD_SYMBOL_FIELD_ENCODE(1362, 5, 5), 4562 /* AFE_SIGDET_THRESH:8:10 */ 4563 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(7, 10, 8) 4564 }; 4565 static uint32_t BCMI_QSGMIIE_SERDES_TLB_RX_DIG_LPBK_CFGr_fields[] = 4566 { 4567 /* DIG_LPBK_EN:0:0 */ 4568 PHYMOD_SYMBOL_FIELD_ENCODE(709, 0, 0), 4569 /* DIG_LPBK_PD_MODE:1:1 */ 4570 PHYMOD_SYMBOL_FIELD_ENCODE(713, 1, 1), 4571 /* DIG_LPBK_PD_FLT_BYPASS:2:2 */ 4572 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(711, 2, 2) 4573 }; 4574 static uint32_t BCMI_QSGMIIE_SERDES_TLB_RX_DIG_LPBK_PD_STSr_fields[] = 4575 { 4576 /* DIG_LPBK_PD_LATE_IND:0:0 */ 4577 PHYMOD_SYMBOL_FIELD_ENCODE(712, 0, 0), 4578 /* DIG_LPBK_PD_EARLY_IND:1:1 */ 4579 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(710, 1, 1) 4580 }; 4581 static uint32_t BCMI_QSGMIIE_SERDES_TLB_RX_PMD_RX_LOCK_STSr_fields[] = 4582 { 4583 /* PMD_RX_LOCK:0:0 */ 4584 PHYMOD_SYMBOL_FIELD_ENCODE(1144, 0, 0), 4585 /* PMD_RX_LOCK_CHANGE:1:1 */ 4586 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1145, 1, 1) 4587 }; 4588 static uint32_t BCMI_QSGMIIE_SERDES_TLB_RX_PRBS_CHK_CFGr_fields[] = 4589 { 4590 /* PRBS_CHK_EN:0:0 */ 4591 PHYMOD_SYMBOL_FIELD_ENCODE(1155, 0, 0), 4592 /* PRBS_CHK_MODE_SEL:1:3 */ 4593 PHYMOD_SYMBOL_FIELD_ENCODE(1167, 3, 1), 4594 /* PRBS_CHK_INV:4:4 */ 4595 PHYMOD_SYMBOL_FIELD_ENCODE(1162, 4, 4), 4596 /* PRBS_CHK_MODE:5:6 */ 4597 PHYMOD_SYMBOL_FIELD_ENCODE(1166, 6, 5), 4598 /* PRBS_CHK_EN_AUTO_MODE:7:7 */ 4599 PHYMOD_SYMBOL_FIELD_ENCODE(1156, 7, 7), 4600 /* PRBS_CHK_ERR_CNT_BURST_MODE:9:9 */ 4601 PHYMOD_SYMBOL_FIELD_ENCODE(1159, 9, 9), 4602 /* TRNSUM_ERROR_COUNT_EN:10:10 */ 4603 PHYMOD_SYMBOL_FIELD_ENCODE(1414, 10, 10), 4604 /* PRBS_CHK_CLK_EN_FRC_ON:11:11 */ 4605 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1154, 11, 11) 4606 }; 4607 static uint32_t BCMI_QSGMIIE_SERDES_TLB_RX_PRBS_CHK_CNT_CFGr_fields[] = 4608 { 4609 /* PRBS_CHK_LOCK_CNT:0:4 */ 4610 PHYMOD_SYMBOL_FIELD_ENCODE(1164, 4, 0), 4611 /* PRBS_CHK_OOL_CNT:8:12 */ 4612 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1168, 12, 8) 4613 }; 4614 static uint32_t BCMI_QSGMIIE_SERDES_TLB_RX_PRBS_CHK_EN_TMR_CTLr_fields[] = 4615 { 4616 /* PRBS_CHK_EN_TIMER_MODE:0:1 */ 4617 PHYMOD_SYMBOL_FIELD_ENCODE(1158, 1, 0), 4618 /* PRBS_CHK_EN_TIMEOUT:8:12 */ 4619 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1157, 12, 8) 4620 }; 4621 static uint32_t BCMI_QSGMIIE_SERDES_TLB_RX_PRBS_CHK_ERR_CNT_LSB_STSr_fields[] = 4622 { 4623 /* PRBS_CHK_ERR_CNT_LSB:0:15 */ 4624 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1160, 15, 0) 4625 }; 4626 static uint32_t BCMI_QSGMIIE_SERDES_TLB_RX_PRBS_CHK_ERR_CNT_MSB_STSr_fields[] = 4627 { 4628 /* PRBS_CHK_ERR_CNT_MSB:0:14 */ 4629 PHYMOD_SYMBOL_FIELD_ENCODE(1161, 14, 0), 4630 /* PRBS_CHK_LOCK_LOST_LH:15:15 */ 4631 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1165, 15, 15) 4632 }; 4633 static uint32_t BCMI_QSGMIIE_SERDES_TLB_RX_PRBS_CHK_LOCK_STSr_fields[] = 4634 { 4635 /* PRBS_CHK_LOCK:0:0 */ 4636 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1163, 0, 0) 4637 }; 4638 static uint32_t BCMI_QSGMIIE_SERDES_TLB_RX_TLB_RX_MISC_CFGr_fields[] = 4639 { 4640 /* RX_PMD_DP_INVERT:0:0 */ 4641 PHYMOD_SYMBOL_FIELD_ENCODE(1302, 0, 0), 4642 /* RX_AGGREGATOR_BYPASS_EN:1:1 */ 4643 PHYMOD_SYMBOL_FIELD_ENCODE(1277, 1, 1), 4644 /* DBG_MASK_DIG_LPBK_EN:2:2 */ 4645 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(608, 2, 2) 4646 }; 4647 static uint32_t BCMI_QSGMIIE_SERDES_TLB_TX_PATGEN_CFGr_fields[] = 4648 { 4649 /* PATT_GEN_EN:0:0 */ 4650 PHYMOD_SYMBOL_FIELD_ENCODE(1048, 0, 0), 4651 /* PATT_GEN_STOP_POS:8:11 */ 4652 PHYMOD_SYMBOL_FIELD_ENCODE(1065, 11, 8), 4653 /* PATT_GEN_START_POS:12:15 */ 4654 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1064, 15, 12) 4655 }; 4656 static uint32_t BCMI_QSGMIIE_SERDES_TLB_TX_PRBS_GEN_CFGr_fields[] = 4657 { 4658 /* PRBS_GEN_EN:0:0 */ 4659 PHYMOD_SYMBOL_FIELD_ENCODE(1169, 0, 0), 4660 /* PRBS_GEN_MODE_SEL:1:3 */ 4661 PHYMOD_SYMBOL_FIELD_ENCODE(1172, 3, 1), 4662 /* PRBS_GEN_INV:4:4 */ 4663 PHYMOD_SYMBOL_FIELD_ENCODE(1171, 4, 4), 4664 /* PRBS_GEN_ERR_INS:5:5 */ 4665 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1170, 5, 5) 4666 }; 4667 static uint32_t BCMI_QSGMIIE_SERDES_TLB_TX_RMT_LPBK_CFGr_fields[] = 4668 { 4669 /* RMT_LPBK_EN:0:0 */ 4670 PHYMOD_SYMBOL_FIELD_ENCODE(1257, 0, 0), 4671 /* RMT_LPBK_PD_MODE:1:1 */ 4672 PHYMOD_SYMBOL_FIELD_ENCODE(1261, 1, 1), 4673 /* RMT_LPBK_PD_FRC_ON:2:2 */ 4674 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1259, 2, 2) 4675 }; 4676 static uint32_t BCMI_QSGMIIE_SERDES_TLB_TX_RMT_LPBK_PD_STSr_fields[] = 4677 { 4678 /* RMT_LPBK_PD_LATE_IND:0:0 */ 4679 PHYMOD_SYMBOL_FIELD_ENCODE(1260, 0, 0), 4680 /* RMT_LPBK_PD_EARLY_IND:1:1 */ 4681 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1258, 1, 1) 4682 }; 4683 static uint32_t BCMI_QSGMIIE_SERDES_TLB_TX_TLB_TX_MISC_CFGr_fields[] = 4684 { 4685 /* TX_PMD_DP_INVERT:0:0 */ 4686 PHYMOD_SYMBOL_FIELD_ENCODE(1523, 0, 0), 4687 /* TX_PCS_NATIVE_ANA_FRMT_EN:1:1 */ 4688 PHYMOD_SYMBOL_FIELD_ENCODE(1489, 1, 1), 4689 /* TX_MUX_SEL_ORDER:2:2 */ 4690 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1488, 2, 2) 4691 }; 4692 static uint32_t BCMI_QSGMIIE_SERDES_TLB_TX_TX_PI_LOOP_TIMING_CFGr_fields[] = 4693 { 4694 /* TX_PI_LOOP_TIMING_SRC_SEL:0:0 */ 4695 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1509, 0, 0) 4696 }; 4697 static uint32_t BCMI_QSGMIIE_SERDES_TXFIR_CTL1r_fields[] = 4698 { 4699 /* TXFIR_PRE_OVERRIDE:0:4 */ 4700 PHYMOD_SYMBOL_FIELD_ENCODE(1460, 4, 0), 4701 /* TXFIR_POST_OVERRIDE:5:10 */ 4702 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1456, 10, 5) 4703 }; 4704 static uint32_t BCMI_QSGMIIE_SERDES_TXFIR_CTL2r_fields[] = 4705 { 4706 /* TXFIR_MAIN_OVERRIDE:0:6 */ 4707 PHYMOD_SYMBOL_FIELD_ENCODE(1445, 6, 0), 4708 /* TXFIR_POST2:7:11 */ 4709 PHYMOD_SYMBOL_FIELD_ENCODE(1447, 11, 7), 4710 /* TXFIR_OVERRIDE_EN:15:15 */ 4711 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1446, 15, 15) 4712 }; 4713 static uint32_t BCMI_QSGMIIE_SERDES_TXFIR_CTL3r_fields[] = 4714 { 4715 /* TXFIR_PRE_OFFSET:0:3 */ 4716 PHYMOD_SYMBOL_FIELD_ENCODE(1459, 3, 0), 4717 /* TXFIR_MAIN_OFFSET:4:7 */ 4718 PHYMOD_SYMBOL_FIELD_ENCODE(1444, 7, 4), 4719 /* TXFIR_POST_OFFSET:8:11 */ 4720 PHYMOD_SYMBOL_FIELD_ENCODE(1455, 11, 8), 4721 /* TXFIR_POST2_OFFSET:12:15 */ 4722 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1449, 15, 12) 4723 }; 4724 static uint32_t BCMI_QSGMIIE_SERDES_TXFIR_CTL4r_fields[] = 4725 { 4726 /* TXFIR_POST3:0:3 */ 4727 PHYMOD_SYMBOL_FIELD_ENCODE(1450, 3, 0), 4728 /* TXFIR_POST3_OFFSET:8:11 */ 4729 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1452, 11, 8) 4730 }; 4731 static uint32_t BCMI_QSGMIIE_SERDES_TXFIR_MISC_CTL1r_fields[] = 4732 { 4733 /* SDK_TX_DISABLE:0:0 */ 4734 PHYMOD_SYMBOL_FIELD_ENCODE(1326, 0, 0), 4735 /* PMD_TX_DISABLE_PIN_DIS:1:1 */ 4736 PHYMOD_SYMBOL_FIELD_ENCODE(1148, 1, 1), 4737 /* TX_DISABLE_TIMER_CTRL:2:7 */ 4738 PHYMOD_SYMBOL_FIELD_ENCODE(1471, 7, 2), 4739 /* TX_EEE_QUIET_EN:8:8 */ 4740 PHYMOD_SYMBOL_FIELD_ENCODE(1474, 8, 8), 4741 /* TX_EEE_ALERT_EN:9:9 */ 4742 PHYMOD_SYMBOL_FIELD_ENCODE(1473, 9, 9), 4743 /* TX_DISABLE_OUTPUT_SEL:10:11 */ 4744 PHYMOD_SYMBOL_FIELD_ENCODE(1470, 11, 10), 4745 /* DP_RESET_TX_DISABLE_DIS:12:12 */ 4746 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(720, 12, 12) 4747 }; 4748 static uint32_t BCMI_QSGMIIE_SERDES_TXFIR_STS1r_fields[] = 4749 { 4750 /* TXFIR_PRE_AFTER_OVR:0:4 */ 4751 PHYMOD_SYMBOL_FIELD_ENCODE(1458, 4, 0), 4752 /* TXFIR_POST_AFTER_OVR:5:10 */ 4753 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1454, 10, 5) 4754 }; 4755 static uint32_t BCMI_QSGMIIE_SERDES_TXFIR_STS2r_fields[] = 4756 { 4757 /* TXFIR_MAIN_AFTER_OVR:0:6 */ 4758 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1443, 6, 0) 4759 }; 4760 static uint32_t BCMI_QSGMIIE_SERDES_TXFIR_STS3r_fields[] = 4761 { 4762 /* TXFIR_PRE_ADJUSTED:0:4 */ 4763 PHYMOD_SYMBOL_FIELD_ENCODE(1457, 4, 0), 4764 /* TXFIR_POST_ADJUSTED:5:10 */ 4765 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1453, 10, 5) 4766 }; 4767 static uint32_t BCMI_QSGMIIE_SERDES_TXFIR_STS4r_fields[] = 4768 { 4769 /* TXFIR_MAIN_ADJUSTED:0:6 */ 4770 PHYMOD_SYMBOL_FIELD_ENCODE(1442, 6, 0), 4771 /* TXFIR_POST2_ADJUSTED:7:11 */ 4772 PHYMOD_SYMBOL_FIELD_ENCODE(1448, 11, 7), 4773 /* TXFIR_POST3_ADJUSTED:12:15 */ 4774 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1451, 15, 12) 4775 }; 4776 static uint32_t BCMI_QSGMIIE_SERDES_TXFIR_UC_CTLr_fields[] = 4777 { 4778 /* MICRO_TX_DISABLE:0:0 */ 4779 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1004, 0, 0) 4780 }; 4781 static uint32_t BCMI_QSGMIIE_SERDES_TX_PI_CTL0r_fields[] = 4782 { 4783 /* TX_PI_EN:0:0 */ 4784 PHYMOD_SYMBOL_FIELD_ENCODE(1490, 0, 0), 4785 /* TX_PI_JITTER_FILTER_EN:1:1 */ 4786 PHYMOD_SYMBOL_FIELD_ENCODE(1502, 1, 1), 4787 /* TX_PI_EXT_CTRL_EN:2:2 */ 4788 PHYMOD_SYMBOL_FIELD_ENCODE(1491, 2, 2), 4789 /* TX_PI_FREQ_OVERRIDE_EN:3:3 */ 4790 PHYMOD_SYMBOL_FIELD_ENCODE(1495, 3, 3), 4791 /* TX_PI_SJ_GEN_EN:4:4 */ 4792 PHYMOD_SYMBOL_FIELD_ENCODE(1521, 4, 4), 4793 /* TX_PI_SSC_GEN_EN:5:5 */ 4794 PHYMOD_SYMBOL_FIELD_ENCODE(1522, 5, 5), 4795 /* TX_PI_JIT_SSC_FREQ_MODE:6:6 */ 4796 PHYMOD_SYMBOL_FIELD_ENCODE(1505, 6, 6), 4797 /* TX_PI_SECOND_ORDER_LOOP_EN:7:7 */ 4798 PHYMOD_SYMBOL_FIELD_ENCODE(1520, 7, 7), 4799 /* TX_PI_FIRST_ORDER_BWSEL_INTEG:8:9 */ 4800 PHYMOD_SYMBOL_FIELD_ENCODE(1493, 9, 8), 4801 /* TX_PI_SECOND_ORDER_BWSEL_INTEG:10:11 */ 4802 PHYMOD_SYMBOL_FIELD_ENCODE(1519, 11, 10), 4803 /* TX_PI_EXT_PHASE_BWSEL_INTEG:12:14 */ 4804 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1492, 14, 12) 4805 }; 4806 static uint32_t BCMI_QSGMIIE_SERDES_TX_PI_CTL1r_fields[] = 4807 { 4808 /* TX_PI_FREQ_OVERRIDE_VAL:0:14 */ 4809 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1496, 14, 0) 4810 }; 4811 static uint32_t BCMI_QSGMIIE_SERDES_TX_PI_CTL2r_fields[] = 4812 { 4813 /* TX_PI_JIT_FREQ_IDX:0:5 */ 4814 PHYMOD_SYMBOL_FIELD_ENCODE(1504, 5, 0), 4815 /* TX_PI_JIT_AMP:8:13 */ 4816 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1503, 13, 8) 4817 }; 4818 static uint32_t BCMI_QSGMIIE_SERDES_TX_PI_CTL3r_fields[] = 4819 { 4820 /* TX_PI_PHASE_OVERRIDE:0:0 */ 4821 PHYMOD_SYMBOL_FIELD_ENCODE(1513, 0, 0), 4822 /* TX_PI_PHASE_STROBE:1:1 */ 4823 PHYMOD_SYMBOL_FIELD_ENCODE(1516, 1, 1), 4824 /* TX_PI_PHASE_STEP_DIR:2:2 */ 4825 PHYMOD_SYMBOL_FIELD_ENCODE(1514, 2, 2), 4826 /* TX_PI_PHASE_INVERT:4:4 */ 4827 PHYMOD_SYMBOL_FIELD_ENCODE(1512, 4, 4), 4828 /* TX_PI_PHASE_STEP_NUM:8:11 */ 4829 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1515, 11, 8) 4830 }; 4831 static uint32_t BCMI_QSGMIIE_SERDES_TX_PI_CTL4r_fields[] = 4832 { 4833 /* TX_PI_FRZ_FRC:0:0 */ 4834 PHYMOD_SYMBOL_FIELD_ENCODE(1497, 0, 0), 4835 /* TX_PI_FRZ_FRC_VAL:1:1 */ 4836 PHYMOD_SYMBOL_FIELD_ENCODE(1498, 1, 1), 4837 /* TX_PI_FRZ_MODE:2:2 */ 4838 PHYMOD_SYMBOL_FIELD_ENCODE(1499, 2, 2), 4839 /* TX_PI_RESET_CODE_DBG:3:3 */ 4840 PHYMOD_SYMBOL_FIELD_ENCODE(1517, 3, 3), 4841 /* TX_PI_RMT_LPBK_BYPASS_FLT:4:4 */ 4842 PHYMOD_SYMBOL_FIELD_ENCODE(1518, 4, 4), 4843 /* TX_PI_FRC_PHASE_STEP_MUX_SEL:5:5 */ 4844 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1494, 5, 5) 4845 }; 4846 static uint32_t BCMI_QSGMIIE_SERDES_TX_PI_CTL6r_fields[] = 4847 { 4848 /* TX_PI_LANE_SEL_FRC_VAL:0:4 */ 4849 PHYMOD_SYMBOL_FIELD_ENCODE(1507, 4, 0), 4850 /* TX_PI_LANE_SEL_FRC:8:8 */ 4851 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1506, 8, 8) 4852 }; 4853 static uint32_t BCMI_QSGMIIE_SERDES_TX_PI_STS0r_fields[] = 4854 { 4855 /* TX_PI_PHASE_CNTR:0:6 */ 4856 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1510, 6, 0) 4857 }; 4858 static uint32_t BCMI_QSGMIIE_SERDES_TX_PI_STS1r_fields[] = 4859 { 4860 /* TX_PI_INTEG1_REG:0:13 */ 4861 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1500, 13, 0) 4862 }; 4863 static uint32_t BCMI_QSGMIIE_SERDES_TX_PI_STS2r_fields[] = 4864 { 4865 /* TX_PI_INTEG2_REG:0:14 */ 4866 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1501, 14, 0) 4867 }; 4868 static uint32_t BCMI_QSGMIIE_SERDES_TX_PI_STS3r_fields[] = 4869 { 4870 /* TX_PI_PHASE_ERR:0:5 */ 4871 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1511, 5, 0) 4872 }; 4873 static uint32_t BCMI_QSGMIIE_SERDES_TX_X2_BRCM_MODEr_fields[] = 4874 { 4875 /* ACOL_SWAP_COUNT64B66B:0:7 */ 4876 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(0, 7, 0) 4877 }; 4878 static uint32_t BCMI_QSGMIIE_SERDES_TX_X2_CL48_0r_fields[] = 4879 { 4880 /* CL48_TX_QRSVDCTRL:0:3 */ 4881 PHYMOD_SYMBOL_FIELD_ENCODE(463, 3, 0), 4882 /* CL48_TX_RF_ENABLE:4:4 */ 4883 PHYMOD_SYMBOL_FIELD_ENCODE(464, 4, 4), 4884 /* CL48_TX_LF_ENABLE:5:5 */ 4885 PHYMOD_SYMBOL_FIELD_ENCODE(461, 5, 5), 4886 /* CL48_TX_LI_ENABLE:6:6 */ 4887 PHYMOD_SYMBOL_FIELD_ENCODE(462, 6, 6), 4888 /* BRCM_MODE_USE_K20PT5:15:15 */ 4889 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(358, 15, 15) 4890 }; 4891 static uint32_t BCMI_QSGMIIE_SERDES_TX_X2_CL82_0r_fields[] = 4892 { 4893 /* CL82_TX_RF_ENABLE:4:4 */ 4894 PHYMOD_SYMBOL_FIELD_ENCODE(564, 4, 4), 4895 /* CL82_TX_LF_ENABLE:5:5 */ 4896 PHYMOD_SYMBOL_FIELD_ENCODE(562, 5, 5), 4897 /* CL82_TX_LI_ENABLE:6:6 */ 4898 PHYMOD_SYMBOL_FIELD_ENCODE(563, 6, 6), 4899 /* CL82_BYPASS_TXSM:10:10 */ 4900 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(552, 10, 10) 4901 }; 4902 static uint32_t BCMI_QSGMIIE_SERDES_TX_X2_CL82_TX_STS0r_fields[] = 4903 { 4904 /* TXSM_STATE:0:2 */ 4905 PHYMOD_SYMBOL_FIELD_ENCODE(1463, 2, 0), 4906 /* LTXSM_STATE:3:9 */ 4907 PHYMOD_SYMBOL_FIELD_ENCODE(928, 9, 3), 4908 /* T_TYPE_CODED:10:12 */ 4909 PHYMOD_SYMBOL_FIELD_ENCODE(1532, 12, 10), 4910 /* CL82_IDLE_DELETION_UNDERFLOW:13:13 */ 4911 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(555, 13, 13) 4912 }; 4913 static uint32_t BCMI_QSGMIIE_SERDES_TX_X2_MLD_SWP_CNTr_fields[] = 4914 { 4915 /* MLD_SWAP_COUNT:0:15 */ 4916 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1011, 15, 0) 4917 }; 4918 static uint32_t BCMI_QSGMIIE_SERDES_TX_X4_CRED0r_fields[] = 4919 { 4920 /* CLOCKCNT0:0:13 */ 4921 PHYMOD_SYMBOL_FIELD_ENCODE(570, 13, 0), 4922 /* CREDITENABLE:14:14 */ 4923 PHYMOD_SYMBOL_FIELD_ENCODE(599, 14, 14), 4924 /* SGMII_SPD_SWITCH:15:15 */ 4925 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1344, 15, 15) 4926 }; 4927 static uint32_t BCMI_QSGMIIE_SERDES_TX_X4_CRED1r_fields[] = 4928 { 4929 /* CLOCKCNT1:0:7 */ 4930 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(572, 7, 0) 4931 }; 4932 static uint32_t BCMI_QSGMIIE_SERDES_TX_X4_ENC0r_fields[] = 4933 { 4934 /* ENCODEMODE:2:4 */ 4935 PHYMOD_SYMBOL_FIELD_ENCODE(747, 4, 2), 4936 /* CL49_TX_TL_MODE:5:6 */ 4937 PHYMOD_SYMBOL_FIELD_ENCODE(484, 6, 5), 4938 /* CL49_BYPASS_TXSM:9:9 */ 4939 PHYMOD_SYMBOL_FIELD_ENCODE(469, 9, 9), 4940 /* HG2_ENABLE:10:10 */ 4941 PHYMOD_SYMBOL_FIELD_ENCODE(806, 10, 10), 4942 /* HG2_MESSAGE_INVALID_CODE_ENABLE:11:11 */ 4943 PHYMOD_SYMBOL_FIELD_ENCODE(807, 11, 11), 4944 /* HG2_CODEC:12:12 */ 4945 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(805, 12, 12) 4946 }; 4947 static uint32_t BCMI_QSGMIIE_SERDES_TX_X4_ENC1r_fields[] = 4948 { 4949 /* PROG_TL_CHAR:0:7 */ 4950 PHYMOD_SYMBOL_FIELD_ENCODE(1176, 7, 0), 4951 /* PROG_TL_EN:8:8 */ 4952 PHYMOD_SYMBOL_FIELD_ENCODE(1177, 8, 8), 4953 /* CATCH_ALL_8B10B_DIS:9:9 */ 4954 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(388, 9, 9) 4955 }; 4956 static uint32_t BCMI_QSGMIIE_SERDES_TX_X4_ENC_STS0r_fields[] = 4957 { 4958 /* CL49_TXSM_STATE:0:2 */ 4959 PHYMOD_SYMBOL_FIELD_ENCODE(479, 2, 0), 4960 /* CL49_LTXSM_STATE:3:10 */ 4961 PHYMOD_SYMBOL_FIELD_ENCODE(472, 10, 3), 4962 /* CL49_TX_FAULT_DET:11:11 */ 4963 PHYMOD_SYMBOL_FIELD_ENCODE(480, 11, 11), 4964 /* CL49_T_TYPE_CODED:12:15 */ 4965 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(485, 15, 12) 4966 }; 4967 static uint32_t BCMI_QSGMIIE_SERDES_TX_X4_LOOPCNTr_fields[] = 4968 { 4969 /* LOOPCNT1:0:5 */ 4970 PHYMOD_SYMBOL_FIELD_ENCODE(902, 5, 0), 4971 /* LOOPCNT0:6:13 */ 4972 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(900, 13, 6) 4973 }; 4974 static uint32_t BCMI_QSGMIIE_SERDES_TX_X4_MAC_CREDGENCNTr_fields[] = 4975 { 4976 /* MAC_CREDITGENCNT:0:12 */ 4977 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(931, 12, 0) 4978 }; 4979 static uint32_t BCMI_QSGMIIE_SERDES_TX_X4_MISCr_fields[] = 4980 { 4981 /* ENABLE_TX_LANE:0:0 */ 4982 PHYMOD_SYMBOL_FIELD_ENCODE(746, 0, 0), 4983 /* RSTB_TX_LANE:1:1 */ 4984 PHYMOD_SYMBOL_FIELD_ENCODE(1263, 1, 1), 4985 /* TX_FIFO_WATERMARK:2:3 */ 4986 PHYMOD_SYMBOL_FIELD_ENCODE(1476, 3, 2), 4987 /* CL49_TX_RF_ENABLE:6:6 */ 4988 PHYMOD_SYMBOL_FIELD_ENCODE(483, 6, 6), 4989 /* CL49_TX_LF_ENABLE:7:7 */ 4990 PHYMOD_SYMBOL_FIELD_ENCODE(481, 7, 7), 4991 /* CL49_TX_LI_ENABLE:8:8 */ 4992 PHYMOD_SYMBOL_FIELD_ENCODE(482, 8, 8), 4993 /* FEC_ENABLE:10:10 */ 4994 PHYMOD_SYMBOL_FIELD_ENCODE(774, 10, 10), 4995 /* SCR_MODE:14:15 */ 4996 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1310, 15, 14) 4997 }; 4998 static uint32_t BCMI_QSGMIIE_SERDES_TX_X4_PCS_CLKCNT0r_fields[] = 4999 { 5000 /* PCS_CLOCKCNT0:0:13 */ 5001 PHYMOD_SYMBOL_FIELD_ENCODE(1070, 13, 0), 5002 /* PCS_CREDITENABLE:14:14 */ 5003 PHYMOD_SYMBOL_FIELD_ENCODE(1072, 14, 14), 5004 /* REPLICATION_CNT:15:15 */ 5005 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1210, 15, 15) 5006 }; 5007 static uint32_t BCMI_QSGMIIE_SERDES_TX_X4_PCS_CREDGENCNTr_fields[] = 5008 { 5009 /* PCS_CREDITGENCNT:0:12 */ 5010 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1074, 12, 0) 5011 }; 5012 static uint32_t BCMI_QSGMIIE_SERDES_TX_X4_PCS_STSr_fields[] = 5013 { 5014 /* LPI_RECEIVED_LH:0:0 */ 5015 PHYMOD_SYMBOL_FIELD_ENCODE(910, 0, 0), 5016 /* RESERVED_ORDERED_SET_LH:1:1 */ 5017 PHYMOD_SYMBOL_FIELD_ENCODE(1216, 1, 1), 5018 /* REMOTE_FAULT_LH:2:2 */ 5019 PHYMOD_SYMBOL_FIELD_ENCODE(1204, 2, 2), 5020 /* LOCAL_FAULT_LH:3:3 */ 5021 PHYMOD_SYMBOL_FIELD_ENCODE(891, 3, 3), 5022 /* LINK_INTERRUPT_LH:4:4 */ 5023 PHYMOD_SYMBOL_FIELD_ENCODE(870, 4, 4), 5024 /* TX_LPI_RECEIVED:5:5 */ 5025 PHYMOD_SYMBOL_FIELD_ENCODE(1485, 5, 5), 5026 /* TX_LINK_INTERRUPT:6:6 */ 5027 PHYMOD_SYMBOL_FIELD_ENCODE(1483, 6, 6), 5028 /* TX_REMOTE_FAULT:7:7 */ 5029 PHYMOD_SYMBOL_FIELD_ENCODE(1525, 7, 7), 5030 /* TX_LOCAL_FAULT:8:8 */ 5031 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1484, 8, 8) 5032 }; 5033 static uint32_t BCMI_QSGMIIE_SERDES_UC_ADDRr_fields[] = 5034 { 5035 /* MICRO_RAM_ADDRESS:0:15 */ 5036 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(988, 15, 0) 5037 }; 5038 static uint32_t BCMI_QSGMIIE_SERDES_UC_COMMANDr_fields[] = 5039 { 5040 /* MICRO_RUN:0:0 */ 5041 PHYMOD_SYMBOL_FIELD_ENCODE(994, 0, 0), 5042 /* MICRO_STOP:1:1 */ 5043 PHYMOD_SYMBOL_FIELD_ENCODE(1000, 1, 1), 5044 /* MICRO_READ:2:2 */ 5045 PHYMOD_SYMBOL_FIELD_ENCODE(993, 2, 2), 5046 /* MICRO_WRITE:3:3 */ 5047 PHYMOD_SYMBOL_FIELD_ENCODE(1007, 3, 3), 5048 /* MICRO_MDIO_DW8051_RESET_N:4:4 */ 5049 PHYMOD_SYMBOL_FIELD_ENCODE(974, 4, 4), 5050 /* MICRO_MDIO_RAM_READ_AUTOINC_EN:6:6 */ 5051 PHYMOD_SYMBOL_FIELD_ENCODE(978, 6, 6), 5052 /* MICRO_MDIO_RAM_ACCESS_MODE:7:8 */ 5053 PHYMOD_SYMBOL_FIELD_ENCODE(977, 8, 7), 5054 /* MICRO_BYTE_MODE:9:9 */ 5055 PHYMOD_SYMBOL_FIELD_ENCODE(961, 9, 9), 5056 /* MICRO_MDIO_AUTOWAKEUP:10:10 */ 5057 PHYMOD_SYMBOL_FIELD_ENCODE(973, 10, 10), 5058 /* MICRO_MDIO_PROG_RAM_CS_FRC:11:11 */ 5059 PHYMOD_SYMBOL_FIELD_ENCODE(975, 11, 11), 5060 /* MICRO_MDIO_PROG_RAM_CS_FRC_VAL:12:12 */ 5061 PHYMOD_SYMBOL_FIELD_ENCODE(976, 12, 12), 5062 /* MICRO_PMI_HP_ACK_FRC:13:13 */ 5063 PHYMOD_SYMBOL_FIELD_ENCODE(982, 13, 13), 5064 /* MICRO_PMI_HP_ACK_FRC_VAL:14:14 */ 5065 PHYMOD_SYMBOL_FIELD_ENCODE(983, 14, 14), 5066 /* MICRO_INIT_CMD:15:15 */ 5067 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(968, 15, 15) 5068 }; 5069 static uint32_t BCMI_QSGMIIE_SERDES_UC_COMMAND2r_fields[] = 5070 { 5071 /* MICRO_PMI_ACK_TIMEOUT_VAL:0:3 */ 5072 PHYMOD_SYMBOL_FIELD_ENCODE(981, 3, 0), 5073 /* MICRO_SRST_MDIO_DATARAM_ACCESS:10:10 */ 5074 PHYMOD_SYMBOL_FIELD_ENCODE(996, 10, 10), 5075 /* MICRO_RAM_CLK_INVERT:11:11 */ 5076 PHYMOD_SYMBOL_FIELD_ENCODE(989, 11, 11), 5077 /* MICRO_ZERO_ROM_DATAOUT:12:12 */ 5078 PHYMOD_SYMBOL_FIELD_ENCODE(1008, 12, 12), 5079 /* MICRO_SRST_MDIO_LOAD_PROGRAM_RAM:13:13 */ 5080 PHYMOD_SYMBOL_FIELD_ENCODE(997, 13, 13), 5081 /* MICRO_SRST_MDIO_PROGRAM_ACCESS:14:14 */ 5082 PHYMOD_SYMBOL_FIELD_ENCODE(998, 14, 14), 5083 /* MICRO_SRST_DW8051_TO_PMI:15:15 */ 5084 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(995, 15, 15) 5085 }; 5086 static uint32_t BCMI_QSGMIIE_SERDES_UC_COMMAND3r_fields[] = 5087 { 5088 /* MICRO_PRAM_IF_EN:0:0 */ 5089 PHYMOD_SYMBOL_FIELD_ENCODE(984, 0, 0), 5090 /* MICRO_PRAM_IF_FLOP_BYPASS:1:1 */ 5091 PHYMOD_SYMBOL_FIELD_ENCODE(985, 1, 1), 5092 /* MICRO_PRAM_IF_RSTB:2:2 */ 5093 PHYMOD_SYMBOL_FIELD_ENCODE(986, 2, 2), 5094 /* MICRO_INRUSH_CURRENT_FRC:10:10 */ 5095 PHYMOD_SYMBOL_FIELD_ENCODE(970, 10, 10), 5096 /* MICRO_INRUSH_CURRENT_FRC_VAL:11:11 */ 5097 PHYMOD_SYMBOL_FIELD_ENCODE(971, 11, 11), 5098 /* MICRO_DISABLE_ECC:12:12 */ 5099 PHYMOD_SYMBOL_FIELD_ENCODE(963, 12, 12), 5100 /* MICRO_GEN_STATUS_SEL:13:15 */ 5101 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(967, 15, 13) 5102 }; 5103 static uint32_t BCMI_QSGMIIE_SERDES_UC_COMMAND4r_fields[] = 5104 { 5105 /* MICRO_SYSTEM_CLK_EN:0:0 */ 5106 PHYMOD_SYMBOL_FIELD_ENCODE(1001, 0, 0), 5107 /* MICRO_SYSTEM_RESET_N:1:1 */ 5108 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1002, 1, 1) 5109 }; 5110 static uint32_t BCMI_QSGMIIE_SERDES_UC_DATARAM_CTL1r_fields[] = 5111 { 5112 /* MICRO_DATARAM_TM:0:9 */ 5113 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(962, 9, 0) 5114 }; 5115 static uint32_t BCMI_QSGMIIE_SERDES_UC_DWNLOAD_STSr_fields[] = 5116 { 5117 /* MICRO_ERR0:0:0 */ 5118 PHYMOD_SYMBOL_FIELD_ENCODE(964, 0, 0), 5119 /* MICRO_ERR1:1:1 */ 5120 PHYMOD_SYMBOL_FIELD_ENCODE(965, 1, 1), 5121 /* MICRO_FSM:2:5 */ 5122 PHYMOD_SYMBOL_FIELD_ENCODE(966, 5, 2), 5123 /* MICRO_INIT_DONE:15:15 */ 5124 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(969, 15, 15) 5125 }; 5126 static uint32_t BCMI_QSGMIIE_SERDES_UC_IRAM_CTL1r_fields[] = 5127 { 5128 /* MICRO_IRAM_TM:0:9 */ 5129 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(972, 9, 0) 5130 }; 5131 static uint32_t BCMI_QSGMIIE_SERDES_UC_MDIO_UC_MAILBOX_LSWr_fields[] = 5132 { 5133 /* MICRO_MDIO_UC_MAILBOX_LSW:0:15 */ 5134 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(979, 15, 0) 5135 }; 5136 static uint32_t BCMI_QSGMIIE_SERDES_UC_MDIO_UC_MAILBOX_MSWr_fields[] = 5137 { 5138 /* MICRO_MDIO_UC_MAILBOX_MSW:0:15 */ 5139 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(980, 15, 0) 5140 }; 5141 static uint32_t BCMI_QSGMIIE_SERDES_UC_PROGRAM_RAM_CTL1r_fields[] = 5142 { 5143 /* MICRO_PROGRAM_RAM_TM:0:13 */ 5144 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(987, 13, 0) 5145 }; 5146 static uint32_t BCMI_QSGMIIE_SERDES_UC_RAMWORDr_fields[] = 5147 { 5148 /* MICRO_RAM_COUNT:0:15 */ 5149 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(990, 15, 0) 5150 }; 5151 static uint32_t BCMI_QSGMIIE_SERDES_UC_RAM_RDDATAr_fields[] = 5152 { 5153 /* MICRO_RAM_RDDATA:0:15 */ 5154 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(991, 15, 0) 5155 }; 5156 static uint32_t BCMI_QSGMIIE_SERDES_UC_RAM_WRDATAr_fields[] = 5157 { 5158 /* MICRO_RAM_WRDATA:0:15 */ 5159 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(992, 15, 0) 5160 }; 5161 static uint32_t BCMI_QSGMIIE_SERDES_UC_SFR_STSr_fields[] = 5162 { 5163 /* MICRO_STATUS_MUXED:0:15 */ 5164 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(999, 15, 0) 5165 }; 5166 static uint32_t BCMI_QSGMIIE_SERDES_UC_TEMPERATURE_STSr_fields[] = 5167 { 5168 /* MICRO_TEMPATURE_DATA:0:15 */ 5169 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1003, 15, 0) 5170 }; 5171 static uint32_t BCMI_QSGMIIE_SERDES_UC_UC_MDIO_MAILBOX_LSWr_fields[] = 5172 { 5173 /* MICRO_UC_MDIO_MAILBOX_LSW:0:15 */ 5174 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1005, 15, 0) 5175 }; 5176 static uint32_t BCMI_QSGMIIE_SERDES_UC_UC_MDIO_MAILBOX_MSWr_fields[] = 5177 { 5178 /* MICRO_UC_MDIO_MAILBOX_MSW:0:15 */ 5179 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1006, 15, 0) 5180 }; 5181 static uint32_t BCMI_QSGMIIE_SERDES_XGXSCONTROLr_fields[] = 5182 { 5183 /* TXCKO_DIV:0:0 */ 5184 PHYMOD_SYMBOL_FIELD_ENCODE(1436, 0, 0), 5185 /* AFRST_EN:1:1 */ 5186 PHYMOD_SYMBOL_FIELD_ENCODE(16, 1, 1), 5187 /* EDEN:2:2 */ 5188 PHYMOD_SYMBOL_FIELD_ENCODE(732, 2, 2), 5189 /* CDET_EN:3:3 */ 5190 PHYMOD_SYMBOL_FIELD_ENCODE(389, 3, 3), 5191 /* MDIO_CONT_EN:4:4 */ 5192 PHYMOD_SYMBOL_FIELD_ENCODE(945, 4, 4), 5193 /* HSTL:5:5 */ 5194 PHYMOD_SYMBOL_FIELD_ENCODE(815, 5, 5), 5195 /* RLOOP:6:6 */ 5196 PHYMOD_SYMBOL_FIELD_ENCODE(1252, 6, 6), 5197 /* PLL_BYPASS:7:7 */ 5198 PHYMOD_SYMBOL_FIELD_ENCODE(1100, 7, 7), 5199 /* MODE_10G:8:11 */ 5200 PHYMOD_SYMBOL_FIELD_ENCODE(1014, 11, 8), 5201 /* RESET_ANLG:12:12 */ 5202 PHYMOD_SYMBOL_FIELD_ENCODE(1217, 12, 12), 5203 /* START_SEQUENCER:13:13 */ 5204 PHYMOD_SYMBOL_FIELD_ENCODE(1375, 13, 13), 5205 /* PCMP_EN:14:14 */ 5206 PHYMOD_SYMBOL_FIELD_ENCODE(1069, 14, 14), 5207 /* PGEN_EN:15:15 */ 5208 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1091, 15, 15) 5209 }; 5210 5211 5212 5213 /******************************************************************************* 5214 * 5215 * The following is the field name table. 5216 */ 5217 #if PHYMOD_CONFIG_INCLUDE_FIELD_NAMES == 1 5218 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_NAMES_BCMI_QSGMIIE_SERDES 5219 const char* bcmi_qsgmiie_serdes_fields[] = 5220 { 5221 "ACOL_SWAP_COUNT64B66B", 5222 "ACQ_CDR_TIMEOUT", 5223 "AFE_RX_PWRDN_FRC", 5224 "AFE_RX_PWRDN_FRC_VAL", 5225 "AFE_RX_RESET_FRC", 5226 "AFE_RX_RESET_FRC_VAL", 5227 "AFE_SIGDET_PWRDN", 5228 "AFE_SIGDET_THRESH", 5229 "AFE_SIGNAL_DETECT_DIS", 5230 "AFE_S_PLL_PWRDN", 5231 "AFE_S_PLL_RESET_FRC", 5232 "AFE_S_PLL_RESET_FRC_VAL", 5233 "AFE_TX_PWRDN_FRC", 5234 "AFE_TX_PWRDN_FRC_VAL", 5235 "AFE_TX_RESET_FRC", 5236 "AFE_TX_RESET_FRC_VAL", 5237 "AFRST_EN", 5238 "ALIGN_STATUS_CL82", 5239 "AMRKR_SPACING_ERR_LATCH_MUX", 5240 "AMS_PLL_2RX_CLKBW", 5241 "AMS_PLL_BGCALR_CTATADJ", 5242 "AMS_PLL_BGCALR_PTATADJ", 5243 "AMS_PLL_BGINT", 5244 "AMS_PLL_BGIP", 5245 "AMS_PLL_BGR_CTATADJ", 5246 "AMS_PLL_BGR_PTATADJ", 5247 "AMS_PLL_CAL_AUX", 5248 "AMS_PLL_CAL_OFF", 5249 "AMS_PLL_COMP_VTH", 5250 "AMS_PLL_DBLR_CTRL", 5251 "AMS_PLL_DITHEREN", 5252 "AMS_PLL_ENABLE_FTUNE", 5253 "AMS_PLL_EN_HRZ", 5254 "AMS_PLL_FORCE_KVH_BW", 5255 "AMS_PLL_FORCE_RESCAL", 5256 "AMS_PLL_FP3_CTRL", 5257 "AMS_PLL_FP3_RH", 5258 "AMS_PLL_FRACN_BYPASS", 5259 "AMS_PLL_FRACN_DIVRANGE", 5260 "AMS_PLL_FRACN_DIV_H", 5261 "AMS_PLL_FRACN_DIV_L", 5262 "AMS_PLL_FRACN_NDIV_INT", 5263 "AMS_PLL_FRACN_SEL", 5264 "AMS_PLL_IMAX_I10GBUF", 5265 "AMS_PLL_IMAX_IBIAS", 5266 "AMS_PLL_IMAX_ICK", 5267 "AMS_PLL_IMAX_ICKGEN", 5268 "AMS_PLL_IMAX_ICLKIDRV1", 5269 "AMS_PLL_IMAX_ICLKINT", 5270 "AMS_PLL_IMAX_ICML", 5271 "AMS_PLL_IMAX_ICOMP", 5272 "AMS_PLL_IMAX_ICP", 5273 "AMS_PLL_IMAX_IOP", 5274 "AMS_PLL_IMIN_I10GBUF", 5275 "AMS_PLL_IMIN_IBIAS", 5276 "AMS_PLL_IMIN_ICK", 5277 "AMS_PLL_IMIN_ICKGEN", 5278 "AMS_PLL_IMIN_ICLKIDRV1", 5279 "AMS_PLL_IMIN_ICLKINT", 5280 "AMS_PLL_IMIN_ICML", 5281 "AMS_PLL_IMIN_ICOMP", 5282 "AMS_PLL_IMIN_ICP", 5283 "AMS_PLL_IMIN_IOP", 5284 "AMS_PLL_IMODE_I10GBUF", 5285 "AMS_PLL_IMODE_IBIAS", 5286 "AMS_PLL_IMODE_ICK", 5287 "AMS_PLL_IMODE_ICKGEN", 5288 "AMS_PLL_IMODE_ICLKIDRV1", 5289 "AMS_PLL_IMODE_ICLKINT", 5290 "AMS_PLL_IMODE_ICML", 5291 "AMS_PLL_IMODE_ICOMP", 5292 "AMS_PLL_IMODE_ICP", 5293 "AMS_PLL_IMODE_IOP", 5294 "AMS_PLL_IQP", 5295 "AMS_PLL_IVCO", 5296 "AMS_PLL_KVH_FORCE", 5297 "AMS_PLL_LOWPWR_6G", 5298 "AMS_PLL_MAX_TEST_PORT_AMPL", 5299 "AMS_PLL_MIX2P1CR_CTATADJ", 5300 "AMS_PLL_MIX2P1CR_PTATADJ", 5301 "AMS_PLL_PDF_FD_SKEW", 5302 "AMS_PLL_PDF_REF_SKEW", 5303 "AMS_PLL_PDF_SKEW_ENLARGE", 5304 "AMS_PLL_REFCLK_DOUBLER", 5305 "AMS_PLL_REFH_PLL", 5306 "AMS_PLL_REFL_PLL", 5307 "AMS_PLL_RESET", 5308 "AMS_PLL_SPARE_100", 5309 "AMS_PLL_SPARE_18", 5310 "AMS_PLL_STS", 5311 "AMS_PLL_TEST_FRACN_EN", 5312 "AMS_PLL_TEST_PLL", 5313 "AMS_PLL_TEST_PNP", 5314 "AMS_PLL_TEST_RX", 5315 "AMS_PLL_TEST_VC", 5316 "AMS_PLL_TEST_VREF", 5317 "AMS_PLL_TXCG_VDDR_BGB", 5318 "AMS_PLL_TX_LOWPWR_6G", 5319 "AMS_PLL_VBYPASS", 5320 "AMS_PLL_VCOICTRL", 5321 "AMS_PLL_VCO_DIV2", 5322 "AMS_PLL_VCO_DIV4", 5323 "AMS_PLL_VCO_IMAX", 5324 "AMS_PLL_VDDR_BGB", 5325 "AMS_RX_DC_COUPLE", 5326 "AMS_RX_DC_OFFSET", 5327 "AMS_RX_DC_OFFSET_RANGE", 5328 "AMS_RX_DFE_OS2X_MODE", 5329 "AMS_RX_EN_10GMODE", 5330 "AMS_RX_EN_VCCTRL", 5331 "AMS_RX_FORCE_DC_OFFSET", 5332 "AMS_RX_I1P25DFE", 5333 "AMS_RX_I4DEADZONE", 5334 "AMS_RX_IMAX_COMMONMODE", 5335 "AMS_RX_IMAX_CTAT", 5336 "AMS_RX_IMAX_DC_OFFSET_DAC", 5337 "AMS_RX_IMAX_DFE_SUMMER", 5338 "AMS_RX_IMAX_DFE_TAP_WEIGHT", 5339 "AMS_RX_IMAX_METRES_EYEDIAG", 5340 "AMS_RX_IMAX_PF", 5341 "AMS_RX_IMAX_PHASE_INT", 5342 "AMS_RX_IMAX_PHASE_INT_P1", 5343 "AMS_RX_IMAX_SIGNAL_DETECT", 5344 "AMS_RX_IMAX_SLICER", 5345 "AMS_RX_IMAX_VGA", 5346 "AMS_RX_IMIN_COMMONMODE", 5347 "AMS_RX_IMIN_CTAT", 5348 "AMS_RX_IMIN_DC_OFFSET_DAC", 5349 "AMS_RX_IMIN_DFE_SUMMER", 5350 "AMS_RX_IMIN_DFE_TAP_WEIGHT", 5351 "AMS_RX_IMIN_METRES_EYEDIAG", 5352 "AMS_RX_IMIN_PF", 5353 "AMS_RX_IMIN_PHASE_INT", 5354 "AMS_RX_IMIN_PHASE_INT_P1", 5355 "AMS_RX_IMIN_SIGNAL_DETECT", 5356 "AMS_RX_IMIN_SLICER", 5357 "AMS_RX_IMIN_VGA", 5358 "AMS_RX_IMODE_CTAT", 5359 "AMS_RX_IMODE_DC_OFFSET_DAC", 5360 "AMS_RX_IMODE_DFE_SUMMER", 5361 "AMS_RX_IMODE_DFE_TAP_WEIGHT", 5362 "AMS_RX_IMODE_METRES_EYEDIAG", 5363 "AMS_RX_IMODE_PF", 5364 "AMS_RX_IMODE_PHASE_INT", 5365 "AMS_RX_IMODE_PHASE_INT_P1", 5366 "AMS_RX_IMODE_SIGNAL_DETECT", 5367 "AMS_RX_IMODE_SLICER", 5368 "AMS_RX_IMODE_VGA", 5369 "AMS_RX_IMOD_COMMONMODE", 5370 "AMS_RX_PHASE_INT_AMPL_CTRL", 5371 "AMS_RX_PHS_INTERP_RESCAL_MUX", 5372 "AMS_RX_SEL_DFECKDELAY", 5373 "AMS_RX_SEL_TH4DFE", 5374 "AMS_RX_SEL_UGBW", 5375 "AMS_RX_SIGDET_BYPASS", 5376 "AMS_RX_SIGDET_LOW_POWER", 5377 "AMS_RX_SIGDET_THRESHOLD", 5378 "AMS_RX_SIG_PWRDN", 5379 "AMS_RX_SPARE_32", 5380 "AMS_RX_SPARE_33", 5381 "AMS_RX_SPARE_34", 5382 "AMS_RX_SPARE_46", 5383 "AMS_RX_SPARE_47", 5384 "AMS_RX_SPARE_62", 5385 "AMS_RX_SPARE_63", 5386 "AMS_RX_STS", 5387 "AMS_RX_TPORT_EN", 5388 "AMS_RX_VGA_BW_EXTENSION", 5389 "AMS_RX_VGA_OUTPUT_IDLE", 5390 "AMS_RX_VGA_RESCAL_MUX", 5391 "AMS_TX_AMP_CTL", 5392 "AMS_TX_CAL_AUX", 5393 "AMS_TX_CAL_OFF", 5394 "AMS_TX_DCC_DIS", 5395 "AMS_TX_DCC_SEL", 5396 "AMS_TX_DRIVERMODE", 5397 "AMS_TX_ELEC_IDLE_AUX", 5398 "AMS_TX_IBIAS", 5399 "AMS_TX_ICML", 5400 "AMS_TX_IDCC", 5401 "AMS_TX_KR_TEST_MODE", 5402 "AMS_TX_LP_OVRD", 5403 "AMS_TX_OSR4", 5404 "AMS_TX_POST2_COEF", 5405 "AMS_TX_POST3_COEF", 5406 "AMS_TX_SEL_HALFRATE", 5407 "AMS_TX_SIGN_POST2", 5408 "AMS_TX_SIGN_POST3", 5409 "AMS_TX_SPARE_1", 5410 "AMS_TX_SPARE_2", 5411 "AMS_TX_SPARE_3", 5412 "AMS_TX_SPARE_30_25", 5413 "AMS_TX_STS", 5414 "AMS_TX_TEST_DATA", 5415 "AMS_TX_TICKSEL", 5416 "AM_LOCK", 5417 "AM_LOCK_HIS_STATE", 5418 "AM_LOCK_LH", 5419 "AM_LOCK_LL", 5420 "AM_LOCK_STATE", 5421 "AM_TIMER_INIT_RX_VAL", 5422 "AN", 5423 "AN_ACTIVE", 5424 "AN_COMPLETE", 5425 "AN_COMPLETED_SW", 5426 "AN_DEADTRAP", 5427 "AN_DEV_EN_OVERRIDE", 5428 "AN_FAIL_COUNT", 5429 "AN_FAIL_COUNT_LIMIT", 5430 "AN_GOOD_CHECK_TRAP", 5431 "AN_GOOD_TRAP", 5432 "AN_HCD_CL72", 5433 "AN_HCD_DUPLEX", 5434 "AN_HCD_FEC", 5435 "AN_HCD_HIGIG2", 5436 "AN_HCD_PAUSE", 5437 "AN_HCD_SPEED", 5438 "AN_HCD_SWITCH_TO_CL37", 5439 "AN_PD_TO_CL37_ENABLE", 5440 "AN_PD_TO_CL37_RETRY_COUNT", 5441 "AN_PRIORITY_1000M", 5442 "AN_PRIORITY_100GCR10", 5443 "AN_PRIORITY_100M", 5444 "AN_PRIORITY_10GCX1", 5445 "AN_PRIORITY_10GCX2", 5446 "AN_PRIORITY_10GCX4", 5447 "AN_PRIORITY_10GKR", 5448 "AN_PRIORITY_10GKX4", 5449 "AN_PRIORITY_10GX2", 5450 "AN_PRIORITY_10GX4", 5451 "AN_PRIORITY_10M", 5452 "AN_PRIORITY_10P5GX2", 5453 "AN_PRIORITY_12GX4", 5454 "AN_PRIORITY_12P5GX4", 5455 "AN_PRIORITY_12P7GX2", 5456 "AN_PRIORITY_13GX4", 5457 "AN_PRIORITY_15GX4", 5458 "AN_PRIORITY_15P75GX2", 5459 "AN_PRIORITY_16GX4", 5460 "AN_PRIORITY_1GKX", 5461 "AN_PRIORITY_20GCR2", 5462 "AN_PRIORITY_20GCX2", 5463 "AN_PRIORITY_20GCX4", 5464 "AN_PRIORITY_20GKR2", 5465 "AN_PRIORITY_20GX2", 5466 "AN_PRIORITY_20GX4", 5467 "AN_PRIORITY_21GX4", 5468 "AN_PRIORITY_25P45GX4", 5469 "AN_PRIORITY_2P5GX1", 5470 "AN_PRIORITY_31P5G", 5471 "AN_PRIORITY_32P7G", 5472 "AN_PRIORITY_40GCR4", 5473 "AN_PRIORITY_40GKR4", 5474 "AN_PRIORITY_40GX4", 5475 "AN_PRIORITY_5GX4", 5476 "AN_PRIORITY_6GX4", 5477 "AN_RETRY_COUNT", 5478 "AN_RXSEQSTARTDIS", 5479 "AN_RX_ST_CLK_TRANS_MISS", 5480 "AN_RX_ST_MV_PAIR", 5481 "AN_RX_ST_PAGE", 5482 "AN_RX_ST_PAGE_TOO_LONG", 5483 "AN_RX_ST_PAGE_TOO_SHORT", 5484 "AN_RX_ST_PULSE_TOO_LONG", 5485 "AN_RX_ST_PULSE_TOO_MODERATE", 5486 "AN_RX_ST_PULSE_TOO_SHORT", 5487 "AN_RX_ST_RUDI_CONFIG", 5488 "AN_RX_ST_RUDI_IDLE", 5489 "AN_RX_ST_RUDI_INVALID", 5490 "AN_RX_ST_STATE", 5491 "AN_ST_ABILITY_DETECT", 5492 "AN_ST_ACK_DETECT", 5493 "AN_ST_AN_ENABLE", 5494 "AN_ST_AN_GOOD_CHECK", 5495 "AN_ST_CL37_COMPLETE", 5496 "AN_ST_CL73_COMPLETE", 5497 "AN_ST_COMPLETE_ACK", 5498 "AN_ST_CONFIG_NONZERO", 5499 "AN_ST_CONFIG_RESTART", 5500 "AN_ST_CONSISTENCY_MISMATCH", 5501 "AN_ST_DISABLE_LINK", 5502 "AN_ST_ERROR_STATE", 5503 "AN_ST_HP_MODE", 5504 "AN_ST_IDLE_DETECT", 5505 "AN_ST_LINK_OK", 5506 "AN_ST_NEXT_PAGE_WAIT", 5507 "AN_ST_RESOLUTION_ERR", 5508 "AN_ST_RESTART", 5509 "AN_ST_RX_BP", 5510 "AN_ST_RX_INVALID_SEQ", 5511 "AN_ST_RX_MP_MISMATCH", 5512 "AN_ST_RX_MP_NULL", 5513 "AN_ST_RX_MP_OUI", 5514 "AN_ST_RX_MP_OVER1G", 5515 "AN_ST_RX_NP", 5516 "AN_ST_RX_NP_TOGGLE_ERR", 5517 "AN_ST_RX_SGMII_MISMATCH", 5518 "AN_ST_RX_UP_3", 5519 "AN_ST_RX_UP_OUI_MATCH", 5520 "AN_ST_RX_UP_OUI_MISMATCH", 5521 "AN_ST_SGMII_MODE", 5522 "AN_TXDISABLEPHASE", 5523 "AN_TXDISABLE_LN", 5524 "AUTODET_EN", 5525 "AUTONEG_ABILITY", 5526 "AUTONEG_COMPLETE", 5527 "AUTONEG_ENABLE", 5528 "B66DEC_CGBAD_EN", 5529 "B66DEC_DOUT_ERRORS_IF_BAD_SYNC", 5530 "B66DEC_FAULT_DET", 5531 "B66DEC_FAULT_DET_EN", 5532 "B66DEC_KCODE66ERRCOUNT_EN", 5533 "B66DEC_NOBLOCKLOCK_DOUT_SEL", 5534 "B66DEC_PROG_TL_CHAR", 5535 "B66DEC_PROG_TL_EN", 5536 "B66DEC_SYNCERRCOUNT_EN", 5537 "BAM_10GBASE_X2", 5538 "BAM_10GBASE_X2_CX4", 5539 "BAM_10GBASE_X4", 5540 "BAM_10GBASE_X4_CX4", 5541 "BAM_10P5GBASE_X2", 5542 "BAM_12GBASE_X4", 5543 "BAM_12P5GBASE_X4", 5544 "BAM_12P7GBASE_X2", 5545 "BAM_13GBASE_X4", 5546 "BAM_15GBASE_X4", 5547 "BAM_15P75GBASE_X2", 5548 "BAM_16GBASE_X4", 5549 "BAM_20GBASE_CR2", 5550 "BAM_20GBASE_KR2", 5551 "BAM_20GBASE_X2", 5552 "BAM_20GBASE_X2_CX4", 5553 "BAM_20GBASE_X4", 5554 "BAM_20GBASE_X4_CX4", 5555 "BAM_21GBASE_X4", 5556 "BAM_25P455GBASE_X4", 5557 "BAM_2P5GBASE_X", 5558 "BAM_31P5GBASE_X4", 5559 "BAM_32P7GBASE_X4", 5560 "BAM_40GBASE_X4", 5561 "BAM_5GBASE_X4", 5562 "BAM_6GBASE_X4", 5563 "BASE_1000BASE_KX", 5564 "BASE_100GBASE_CR10", 5565 "BASE_10GBASE_KR", 5566 "BASE_10GBASE_KX4", 5567 "BASE_40GBASE_CR4", 5568 "BASE_40GBASE_KR4", 5569 "BASE_SELECTOR", 5570 "BERMON_STATE", 5571 "BER_COUNT_PER_LN", 5572 "BER_HO", 5573 "BIP_ERROR_COUNT_PER_LANE", 5574 "BLOCK_SYNC_MODE", 5575 "BLOCK_SYNC_MODE_OEN", 5576 "BONDING", 5577 "BRCM64B66_DESCRAMBLER_ENABLE", 5578 "BRCM64B66_DESCRAMBLER_ENABLE_OEN", 5579 "BRCM_MODE_USE_K20PT5", 5580 "BR_PD_EN", 5581 "BURST_ERR_STATUSH", 5582 "BURST_ERR_STATUSL", 5583 "BURST_ERR_STATUS_MODE", 5584 "BYPASS_CL49RXSM", 5585 "BYPASS_CL82RXSM", 5586 "BYTE0", 5587 "BYTE1", 5588 "CAP_100BASET2_FULL_DUPLEX", 5589 "CAP_100BASET2_HALF_DUPLEX", 5590 "CAP_100BASEX_FULL_DUPLEX", 5591 "CAP_100BASEX_HALF_DUPLEX", 5592 "CAP_100BASE_T4", 5593 "CAP_10BASET_FULL_DUPLEX", 5594 "CAP_10BASET_HALF_DUPLEX", 5595 "CAP_CNT_MASK_EN", 5596 "CAP_DONE", 5597 "CAP_DONE_LH_LL", 5598 "CAP_FORCE_SLOWDOWN", 5599 "CAP_FORCE_SLOWDOWN_EN", 5600 "CAP_PASS", 5601 "CAP_PASS_LH_LL", 5602 "CAP_RESTART", 5603 "CAP_RETRY_EN", 5604 "CAP_SELECT", 5605 "CAP_SELECT_M", 5606 "CAP_SELECT_M_EN", 5607 "CAP_SEQ_CYA", 5608 "CARRIER_EXTEND_ERR_DETECTED", 5609 "CATCH_ALL_8B10B_DIS", 5610 "CDET_EN", 5611 "CDET_EN1G", 5612 "CDR_BWSEL_INTEG_ACQCDR", 5613 "CDR_BWSEL_INTEG_EEE_ACQCDR", 5614 "CDR_BWSEL_INTEG_NORM", 5615 "CDR_BWSEL_PROP_ACQCDR", 5616 "CDR_BWSEL_PROP_EEE_ACQCDR", 5617 "CDR_BWSEL_PROP_NORM", 5618 "CDR_FREQ_EN", 5619 "CDR_FREQ_OVERRIDE_EN", 5620 "CDR_FREQ_OVERRIDE_VAL", 5621 "CDR_FRZ_FRC", 5622 "CDR_FRZ_FRC_VAL", 5623 "CDR_INTEG_REG", 5624 "CDR_INTEG_REG_CLR", 5625 "CDR_INTEG_SAT_SEL", 5626 "CDR_LM_OUTOFLOCK", 5627 "CDR_LM_THR_SEL", 5628 "CDR_PHASE_ERR", 5629 "CDR_PHASE_ERR_FRZ", 5630 "CDR_PHASE_SAT_CTRL", 5631 "CDR_QPHASE_MULT_EN", 5632 "CDR_SETTLE_TIMEOUT", 5633 "CDR_ZERO_POLARITY", 5634 "CHK_END_EN", 5635 "CHK_END_EN_OEN", 5636 "CL36BYTEDELETEMODE", 5637 "CL36BYTEDELETEMODE_OEN", 5638 "CL36_BER_EN", 5639 "CL36_EN", 5640 "CL36_EN_OEN", 5641 "CL36_FORCE_COMMA_ALIGN_ENABLE", 5642 "CL36_PCS_EN_RX", 5643 "CL36_PCS_EN_TX", 5644 "CL36_SYNCACQ_HIS_STATE_PER_LN", 5645 "CL36_SYNCACQ_STATE_CODED_PER_LN", 5646 "CL37_ACK_TIMER_PERIOD", 5647 "CL37_AN_RESTART", 5648 "CL37_AN_RESTART_RESET_DISABLE", 5649 "CL37_BAM_CODE", 5650 "CL37_BAM_ENABLE", 5651 "CL37_BAM_TO_SGMII_AUTO_ENABLE", 5652 "CL37_ENABLE", 5653 "CL37_ERROR_TIMER_PERIOD", 5654 "CL37_FULL_DUPLEX", 5655 "CL37_HALF_DUPLEX", 5656 "CL37_HIGH_VCO", 5657 "CL37_NEXT_PAGE", 5658 "CL37_PAUSE", 5659 "CL37_RESTART_TIMER_PERIOD", 5660 "CL37_SGMII_ENABLE", 5661 "CL37_SW_RESTART_RESET_DISABLE", 5662 "CL37_SYNC_STATUS_FILTER_TIMER_PERIOD", 5663 "CL48_CGBAD_EN", 5664 "CL48_DSWIN64B66B", 5665 "CL48_DSWIN8B10B", 5666 "CL48_RX_LF_ENABLE", 5667 "CL48_RX_LI_ENABLE", 5668 "CL48_RX_QRSVDCTRL", 5669 "CL48_RX_RF_ENABLE", 5670 "CL48_SKEWACQ_STATE_D_0", 5671 "CL48_SKEWACQ_STATE_D_1", 5672 "CL48_SKEWACQ_STATE_D_2", 5673 "CL48_SKEWACQ_STATE_D_3", 5674 "CL48_SKEWACQ_STATE_L", 5675 "CL48_SKEW_STATUS", 5676 "CL48_SYNCACQ_EN", 5677 "CL48_SYNCACQ_STATE_D_0", 5678 "CL48_SYNCACQ_STATE_D_1", 5679 "CL48_SYNCACQ_STATE_D_2", 5680 "CL48_SYNCACQ_STATE_D_3", 5681 "CL48_SYNCACQ_STATE_L", 5682 "CL48_TX_LF_ENABLE", 5683 "CL48_TX_LI_ENABLE", 5684 "CL48_TX_QRSVDCTRL", 5685 "CL48_TX_RF_ENABLE", 5686 "CL49IEEE_ERRORED_BLOCKS", 5687 "CL49_BERMON_CURRENT_STATE", 5688 "CL49_BERMON_HISTORY_STATE", 5689 "CL49_BER_LIMIT", 5690 "CL49_BYPASS_TXSM", 5691 "CL49_INVALID_SH_CNT", 5692 "CL49_LOW_LATENCY_EN", 5693 "CL49_LTXSM_STATE", 5694 "CL49_RXSM_CURRENT_STATE", 5695 "CL49_RXSM_HISTORY_STATE", 5696 "CL49_RX_LF_ENABLE", 5697 "CL49_RX_LI_ENABLE", 5698 "CL49_RX_RF_ENABLE", 5699 "CL49_R_TYPE_CODED", 5700 "CL49_TXSM_STATE", 5701 "CL49_TX_FAULT_DET", 5702 "CL49_TX_LF_ENABLE", 5703 "CL49_TX_LI_ENABLE", 5704 "CL49_TX_RF_ENABLE", 5705 "CL49_TX_TL_MODE", 5706 "CL49_T_TYPE_CODED", 5707 "CL49_VALID_SH_CNT", 5708 "CL72", 5709 "CL72_BAD_MARKER_CNT", 5710 "CL72_BRK_RING_OSC", 5711 "CL72_CTRL_FRAME_DLY", 5712 "CL72_DIS_LP_COEFF_UPDATES_TO_LD", 5713 "CL72_DIS_MAX_WAIT_TIMER", 5714 "CL72_DME_CELL_BOUNDARY_CHK", 5715 "CL72_DOUBLE_CMD_EN", 5716 "CL72_ENABLE", 5717 "CL72_EN_MASK", 5718 "CL72_EN_OEN", 5719 "CL72_FRAME_LOCK_LH", 5720 "CL72_FRAME_LOCK_RDY_FOR_CMD_EN", 5721 "CL72_GOOD_MARKER_CNT", 5722 "CL72_IEEE_FRAME_LOCK", 5723 "CL72_IEEE_LD_COEFF_UPDATE", 5724 "CL72_IEEE_LD_STATUS_REPORT", 5725 "CL72_IEEE_LP_COEFF_UPDATE", 5726 "CL72_IEEE_LP_STATUS_REPORT", 5727 "CL72_IEEE_RECEIVER_STATUS", 5728 "CL72_IEEE_RESTART_TRAINING", 5729 "CL72_IEEE_TRAINING_ENABLE", 5730 "CL72_IEEE_TRAINING_FAILURE", 5731 "CL72_IEEE_TRAINING_STATUS", 5732 "CL72_INC_DEC_VAL_SEL", 5733 "CL72_LD_COEFF_CMD_HIST", 5734 "CL72_LD_STATUS_PAGE", 5735 "CL72_LD_XMT_STATUS_LOAD", 5736 "CL72_LD_XMT_STATUS_OVERRIDE", 5737 "CL72_LP_CONTROL_PAGE", 5738 "CL72_OVERRIDE_LD_STATUS_PAGE", 5739 "CL72_PPM_OFFSET_EN", 5740 "CL72_RCVD_STATUS_PAGE", 5741 "CL72_READY_FOR_CMD", 5742 "CL72_RX_DP_LN_CLK_EN", 5743 "CL72_RX_TRAINED", 5744 "CL72_SIGNAL_DETECT", 5745 "CL72_SIGNAL_DET_FRC", 5746 "CL72_STRICT_DME_CHK", 5747 "CL72_STRICT_MARKER_CHK", 5748 "CL72_TAP_V2_VAL", 5749 "CL72_TIMER_EN", 5750 "CL72_TR_COARSE_LOCK", 5751 "CL72_TX_DP_LN_CLK_EN", 5752 "CL72_TX_FIR_TAP_MAIN_KR_INIT_VAL", 5753 "CL72_TX_FIR_TAP_POST_KR_INIT_VAL", 5754 "CL72_TX_FIR_TAP_PRE_KR_INIT_VAL", 5755 "CL72_V2_CONSTRAINT_DIS", 5756 "CL72_XMT_UPDATE_PAGE", 5757 "CL73_AN_RESTART", 5758 "CL73_BAM_CODE", 5759 "CL73_BAM_ENABLE", 5760 "CL73_BAM_TO_HPAM_AUTO_ENABLE", 5761 "CL73_ENABLE", 5762 "CL73_ERROR_TIMER_PERIOD", 5763 "CL73_HPAM_ENABLE", 5764 "CL73_LINK_UP_TIMER_PERIOD", 5765 "CL73_LOW_VCO", 5766 "CL73_NONCE_MATCH_OVER", 5767 "CL73_NONCE_MATCH_VAL", 5768 "CL73_PAGE_TEST_MAX_TIMER", 5769 "CL73_PAGE_TEST_MIN_TIMER", 5770 "CL73_PAUSE", 5771 "CL73_REMOTE_FAULT", 5772 "CL82_BER_LIMIT", 5773 "CL82_BYPASS_TXSM", 5774 "CL82_DSWIN", 5775 "CL82_DSWIN_100G", 5776 "CL82_IDLE_DELETION_UNDERFLOW", 5777 "CL82_INVALID_SH_CNT", 5778 "CL82_MLD_PHYS_MAP", 5779 "CL82_MULTI_PIPE_MODE", 5780 "CL82_RX_LF_ENABLE", 5781 "CL82_RX_LI_ENABLE", 5782 "CL82_RX_RF_ENABLE", 5783 "CL82_TX_LF_ENABLE", 5784 "CL82_TX_LI_ENABLE", 5785 "CL82_TX_RF_ENABLE", 5786 "CL82_VALID_SH_CNT", 5787 "CLAUSE22", 5788 "CLEAR_LINKDOWN", 5789 "CLK41_BYPASS", 5790 "CLKSIGDET_BYPASS", 5791 "CLOCKCNT0", 5792 "CLOCKCNT0_OEN", 5793 "CLOCKCNT1", 5794 "CLOCKCNT1_OEN", 5795 "CLR_CRCCNT", 5796 "CNT_BIN_D_DREG", 5797 "CNT_BIN_D_MREG", 5798 "CNT_BIN_M1_MREG", 5799 "CNT_BIN_M1_PREG", 5800 "CNT_BIN_P1_DREG", 5801 "CNT_BIN_P1_PREG", 5802 "CNT_D_MINUS_M1", 5803 "CNT_D_MINUS_P1", 5804 "COLLISION_TEST_EN", 5805 "COMMA_DET_EN", 5806 "CORCOUNTH", 5807 "CORCOUNTL", 5808 "CORE_DP_H_RSTB", 5809 "CORE_DP_H_RSTB_OEN", 5810 "CORE_DP_RESET_STATE", 5811 "CORE_DP_S_RSTB", 5812 "CORE_MODE", 5813 "CORE_MODE_OEN", 5814 "CORE_MULTICAST_MASK_CONTROL", 5815 "CORE_REG_RESET_OCCURRED", 5816 "CORE_S_RSTB", 5817 "CRCERRCNT", 5818 "CRC_CHECKER_DISABLE", 5819 "CRC_ERR_DETECTED", 5820 "CREDITENABLE", 5821 "CREDITENABLE_OEN", 5822 "CREDIT_EN", 5823 "DBG_CAP_STATE_ONE_HOT", 5824 "DBG_ENABLE", 5825 "DBG_ERRH", 5826 "DBG_ERRL", 5827 "DBG_ERR_MODE", 5828 "DBG_FDBCK", 5829 "DBG_MASK_DIG_LPBK_EN", 5830 "DBG_PLL_STATE_ONE_HOT", 5831 "DBG_SLOWDN", 5832 "DBG_SLOWDN_CHANGE", 5833 "DC_OFFSET", 5834 "DECODERMODE", 5835 "DECODERMODE_OEN", 5836 "DEC_17B_BURST_GAP_COUNT", 5837 "DEC_18B_BURST_GAP_COUNT", 5838 "DEC_19B_BURST_GAP_COUNT", 5839 "DEC_GAP_COUNT_MODE", 5840 "DEC_MAX_PM", 5841 "DEC_PM_MODE", 5842 "DESC2_MODE", 5843 "DESC2_MODE_OEN", 5844 "DESCRAMBLERMODE", 5845 "DESCRAMBLERMODE_OEN", 5846 "DESKEWMODE", 5847 "DESKEWMODE_OEN", 5848 "DESKEW_1BIT_ERROR", 5849 "DESKEW_2BIT_ERROR", 5850 "DESKEW_ADDRESS", 5851 "DESKEW_DISABLE_ECC", 5852 "DESKEW_ECC_CORRUPT", 5853 "DESKEW_HIS_STATE", 5854 "DESKEW_STATE", 5855 "DESKEW_STATUS", 5856 "DESKEW_STATUS_LH", 5857 "DESKEW_STATUS_LL", 5858 "DESKEW_TM", 5859 "DFE_1_ACC_CLR", 5860 "DFE_1_CMN", 5861 "DFE_1_CMN_ONLY", 5862 "DFE_1_E", 5863 "DFE_1_EN", 5864 "DFE_1_ERR_GAIN", 5865 "DFE_1_ERR_SEL", 5866 "DFE_1_GRADIENT_INVERT", 5867 "DFE_1_INV_M1", 5868 "DFE_1_INV_P1", 5869 "DFE_1_O", 5870 "DFE_1_PATTERN", 5871 "DFE_1_PATTERN_BIT_EN", 5872 "DFE_1_WANTS_NEGATIVE", 5873 "DFE_2_ACC_CLR", 5874 "DFE_2_CMN", 5875 "DFE_2_CMN_ONLY", 5876 "DFE_2_E", 5877 "DFE_2_EN", 5878 "DFE_2_ERR_GAIN", 5879 "DFE_2_ERR_SEL", 5880 "DFE_2_GRADIENT_INVERT", 5881 "DFE_2_INV_M1", 5882 "DFE_2_INV_P1", 5883 "DFE_2_O", 5884 "DFE_2_PATTERN", 5885 "DFE_2_PATTERN_BIT_EN", 5886 "DFE_2_SE", 5887 "DFE_2_SO", 5888 "DFE_3_ACC_CLR", 5889 "DFE_3_CMN", 5890 "DFE_3_EN", 5891 "DFE_3_ERR_GAIN", 5892 "DFE_3_ERR_SEL", 5893 "DFE_3_GRADIENT_INVERT", 5894 "DFE_3_INV_M1", 5895 "DFE_3_INV_P1", 5896 "DFE_3_PATTERN", 5897 "DFE_3_PATTERN_BIT_EN", 5898 "DFE_4_ACC_CLR", 5899 "DFE_4_CMN", 5900 "DFE_4_EN", 5901 "DFE_4_ERR_GAIN", 5902 "DFE_4_ERR_SEL", 5903 "DFE_4_GRADIENT_INVERT", 5904 "DFE_4_INV_M1", 5905 "DFE_4_INV_P1", 5906 "DFE_4_PATTERN", 5907 "DFE_4_PATTERN_BIT_EN", 5908 "DFE_5_ACC_CLR", 5909 "DFE_5_CMN", 5910 "DFE_5_EN", 5911 "DFE_5_ERR_GAIN", 5912 "DFE_5_ERR_SEL", 5913 "DFE_5_GRADIENT_INVERT", 5914 "DFE_5_INV_M1", 5915 "DFE_5_INV_P1", 5916 "DFE_5_PATTERN", 5917 "DFE_5_PATTERN_BIT_EN", 5918 "DFE_ACC_HYS_EN", 5919 "DFE_ALLOW_SIMULT", 5920 "DFE_OFFSET_ADJ_DATA_EVEN", 5921 "DFE_OFFSET_ADJ_DATA_ODD", 5922 "DFE_OFFSET_ADJ_M1_EVEN", 5923 "DFE_OFFSET_ADJ_M1_ODD", 5924 "DFE_OFFSET_ADJ_P1_EVEN", 5925 "DFE_OFFSET_ADJ_P1_ODD", 5926 "DFE_UPDATE_GAIN", 5927 "DFE_VGA_WRITE_EN", 5928 "DFE_VGA_WRITE_TAPSEL", 5929 "DFE_VGA_WRITE_VAL", 5930 "DIG_LPBK_EN", 5931 "DIG_LPBK_PD_EARLY_IND", 5932 "DIG_LPBK_PD_FLT_BYPASS", 5933 "DIG_LPBK_PD_LATE_IND", 5934 "DIG_LPBK_PD_MODE", 5935 "DISABLE_CARRIER_EXTEND", 5936 "DISABLE_CL49_BERMON", 5937 "DISABLE_PLL_PWRDWN", 5938 "DISABLE_REMOTE_FAULT_REPORTING", 5939 "DISABLE_SIGNAL_DETCT_FILTER", 5940 "DIS_CL82_BERMON", 5941 "DP_RESET_TX_DISABLE_DIS", 5942 "DSC_CLR_FRC", 5943 "DSC_CLR_FRC_VAL", 5944 "DSC_SM_GP_UC_REQ", 5945 "DSC_SM_READY_FOR_CMD", 5946 "DSC_SM_SCRATCH", 5947 "DSC_STATE", 5948 "DSC_STATE_EEE_ONE_HOT", 5949 "DSC_STATE_ONE_HOT", 5950 "DTE_XS", 5951 "DUPLEX_STATUS", 5952 "EARLY_END_EXTENSION_DETECTED", 5953 "EDEN", 5954 "EDEN1G", 5955 "EEE_ACQ_CDR_TIMEOUT", 5956 "EEE_ANA_PWR_TIMEOUT", 5957 "EEE_CDR_SETTLE_TIMEOUT", 5958 "EEE_HW_TUNE_TIMEOUT", 5959 "EEE_LFSR_CNT", 5960 "EEE_MEASURE_CNT", 5961 "EEE_MEASURE_EN", 5962 "EEE_MODE_EN", 5963 "EEE_PHASE_ERR_OFFSET", 5964 "EEE_PHASE_ERR_OFFSET_EN", 5965 "EEE_QUIET_FROM_EEE_STATES", 5966 "EEE_QUIET_RX_AFE_PWRDWN_VAL", 5967 "ENABLE_TX_LANE", 5968 "ENCODEMODE", 5969 "ENCODEMODE_OEN", 5970 "ENERGY_DETECT", 5971 "ENERGY_DETECT_CHANGE", 5972 "ENERGY_DETECT_FRC", 5973 "ENERGY_DETECT_FRC_VAL", 5974 "ENERGY_DETECT_MASK_COUNT", 5975 "EN_DFE_CLK", 5976 "EN_HGAIN", 5977 "ERRGEN_EN", 5978 "ERRORED_BLOCKS_HO", 5979 "ERRORED_BLOCKS_HO_PRESENT", 5980 "ERROR_EN_OVR", 5981 "ERROR_EN_OVR_VAL", 5982 "ERROR_MASK_15_0", 5983 "ERROR_MASK_31_16", 5984 "ERROR_MASK_47_32", 5985 "ERROR_MASK_63_48", 5986 "ERROR_MASK_79_64", 5987 "EXTENDED_CAPABILITY", 5988 "EXTENDED_STATUS", 5989 "EXT_LOS_EN", 5990 "EXT_LOS_INV", 5991 "FALSE_CARRIER_DETECTED", 5992 "FAST_LOCK_EN", 5993 "FAST_SEARCH_MODE", 5994 "FEC", 5995 "FEC_ENABLE", 5996 "FEC_ENABLE_OEN", 5997 "FEC_ERROR_CODE_ALL", 5998 "FEC_ERR_ENABLE", 5999 "FIBER_MODE_1000X", 6000 "FIFO_ERR_CYA", 6001 "FORCE_2500", 6002 "FORCE_DIV5_FOR_LXCK25", 6003 "FORCE_LN_MODE", 6004 "FORCE_PLL_MODE_AFE", 6005 "FORCE_PLL_MODE_AFE_SEL", 6006 "FORCE_SPEED", 6007 "FORCE_SPEED_SEL", 6008 "FORCE_TICK0_SW2", 6009 "FREQ_DET_RESTART_EN", 6010 "FREQ_DET_RETRY_EN", 6011 "FREQ_DONE_SM", 6012 "FREQ_DONE_SM_LH_LL", 6013 "FREQ_MONITOR_EN", 6014 "FREQ_PASS_SM", 6015 "FREQ_PASS_SM_LH_LL", 6016 "FREQ_UPD_EN_FRC", 6017 "FREQ_UPD_EN_FRC_VAL", 6018 "GBOX_OVERFLOW_ERR", 6019 "GBOX_UNDERFLOW_ERR", 6020 "GCWCOUNT", 6021 "GLOBAL_PMD_TX_DISABLE", 6022 "GLOOP1G", 6023 "GOOD_PARITY_CNT", 6024 "HEARTBEAT_COUNT_1US", 6025 "HG2", 6026 "HG2_CODEC", 6027 "HG2_ENABLE", 6028 "HG2_MESSAGE_INVALID_CODE_ENABLE", 6029 "HI_BER", 6030 "HI_BER_LH", 6031 "HI_BER_LL", 6032 "HOLD_LOS_COUNT", 6033 "HOLD_SD_COUNT", 6034 "HPAM_20GKR2", 6035 "HPAM_TO_CL73_AUTO_ENABLE", 6036 "HSTL", 6037 "HW_TUNE_EN", 6038 "HW_TUNE_TIMEOUT", 6039 "HYSTCOUNT", 6040 "IEEE_BLKSEL_AUTODET", 6041 "IEEE_BLKSEL_VAL_0", 6042 "IEEE_BLKSEL_VAL_1", 6043 "IGNORE_LINK_TIMER_PERIOD", 6044 "IGNORE_LP_MODE", 6045 "IGNORE_RX_MODE", 6046 "ILKN_SEL", 6047 "INT_1B", 6048 "INT_2B", 6049 "INVALID_PARITY_CNT", 6050 "INVERT_RX_SIGDET", 6051 "INVERT_SIGNAL_DETECT", 6052 "INV_RX_ORDER", 6053 "INV_TX_ORDER", 6054 "IPG_SIZE", 6055 "JABBER_DETECT", 6056 "KCODE66ERRCOUNT", 6057 "KX_CL73_AN_EN", 6058 "LANE_0_AM_1_0", 6059 "LANE_0_AM_2", 6060 "LANE_1_AM_1_0", 6061 "LANE_1_AM_2", 6062 "LANE_2_AM_1_0", 6063 "LANE_2_AM_2", 6064 "LANE_3_AM_1_0", 6065 "LANE_3_AM_2", 6066 "LANE_ADDR_0", 6067 "LANE_ADDR_1", 6068 "LANE_ADDR_2", 6069 "LANE_ADDR_3", 6070 "LANE_DP_RESET_STATE", 6071 "LANE_MODE", 6072 "LANE_MODE_OEN", 6073 "LANE_MULTICAST_MASK_CONTROL", 6074 "LANE_REG_RESET_OCCURRED", 6075 "LANE_RESET_RELEASED", 6076 "LANE_RESET_RELEASED_INDEX", 6077 "LATCH_LINKDOWN_ENABLE", 6078 "LBERMON_STATE", 6079 "LD_CONTROL_VALID", 6080 "LD_PAGE_0_PAGE_DATA", 6081 "LD_PAGE_1_PAGE_DATA", 6082 "LD_PAGE_2_PAGE_DATA", 6083 "LFCK_MII_GEN_SEL", 6084 "LINKFAILTIMERQUAL_EN", 6085 "LINKFAILTIMER_DIS", 6086 "LINK_CONTROL_FORCEVAL", 6087 "LINK_EN", 6088 "LINK_FAIL_INHIBIT_TIMER_CL72_PERIOD", 6089 "LINK_FAIL_INHIBIT_TIMER_NCL72_PERIOD", 6090 "LINK_INTERRUPT", 6091 "LINK_INTERRUPT_LH", 6092 "LINK_STATUS", 6093 "LINK_STATUS_LH", 6094 "LINK_STATUS_LL", 6095 "LN_DP_H_RSTB", 6096 "LN_DP_H_RSTB_OEN", 6097 "LN_DP_S_RSTB", 6098 "LN_H_RSTB", 6099 "LN_RX_DP_S_RSTB", 6100 "LN_RX_H_PWRDN", 6101 "LN_RX_S_CLKGATE_FRC_ON", 6102 "LN_RX_S_COMCLK_FRC_ON", 6103 "LN_RX_S_COMCLK_SEL", 6104 "LN_RX_S_PWRDN", 6105 "LN_RX_S_RSTB", 6106 "LN_S_RSTB", 6107 "LN_TX_DP_S_RSTB", 6108 "LN_TX_H_PWRDN", 6109 "LN_TX_S_PWRDN", 6110 "LN_TX_S_RSTB", 6111 "LOCAL_FAULT", 6112 "LOCAL_FAULT_LH", 6113 "LOCAL_PCS_LOOPBACK_ENABLE", 6114 "LOCK_REF_EN", 6115 "LOCK_REF_R", 6116 "LOG0_TO_PHY_LNSWAP_SEL", 6117 "LOG1_TO_PHY_LNSWAP_SEL", 6118 "LOG2_TO_PHY_LNSWAP_SEL", 6119 "LOG3_TO_PHY_LNSWAP_SEL", 6120 "LOOPBACK", 6121 "LOOPCNT0", 6122 "LOOPCNT0_OEN", 6123 "LOOPCNT1", 6124 "LOOPCNT1_OEN", 6125 "LOST_PLL_LOCK_SM", 6126 "LOS_FILTER_COUNT", 6127 "LOS_THRESH", 6128 "LPI_EN", 6129 "LPI_ENABLE", 6130 "LPI_RECEIVED", 6131 "LPI_RECEIVED_LH", 6132 "LP_BASE_PAGE1_PAGE_DATA", 6133 "LP_BASE_PAGE2_PAGE_DATA", 6134 "LP_BASE_PAGE3_PAGE_DATA", 6135 "LP_MP1024_UP1_PAGE_DATA", 6136 "LP_MP1024_UP2_PAGE_DATA", 6137 "LP_MP1024_UP3_PAGE_DATA", 6138 "LP_MP1024_UP4_PAGE_DATA", 6139 "LP_MP5_UP1_PAGE_DATA", 6140 "LP_MP5_UP2_PAGE_DATA", 6141 "LP_MP5_UP3_PAGE_DATA", 6142 "LP_MP5_UP4_PAGE_DATA", 6143 "LP_PAGE_0_PAGE_DATA", 6144 "LP_PAGE_1_PAGE_DATA", 6145 "LP_PAGE_2_PAGE_DATA", 6146 "LP_STATUS_VALID", 6147 "LSM_CURR_STATE", 6148 "LSM_HIS_STATE", 6149 "LTXSM_STATE", 6150 "M1_THRESH_SEL", 6151 "M1_THRESH_ZERO", 6152 "MAC_CREDITGENCNT", 6153 "MAC_CREDITGENCNT_OEN", 6154 "MAIN_TAP_LIMIT", 6155 "MAIN_TAP_MIN_VAL", 6156 "MANUAL_FULL_DUPLEX", 6157 "MANUAL_SPEED_0", 6158 "MANUAL_SPEED_1", 6159 "MASTER_MDIO_PHY_SEL", 6160 "MASTER_PORT_NUM", 6161 "MAX_WAIT_TIMER_PERIOD", 6162 "MDIO_ADDR_DATA", 6163 "MDIO_AER", 6164 "MDIO_BLK_ADDR", 6165 "MDIO_BRCST_PORT_ADDR", 6166 "MDIO_CONT_EN", 6167 "MDIO_DEVAD", 6168 "MDIO_DEV_AN_EN", 6169 "MDIO_DEV_CL22_EN", 6170 "MDIO_DEV_DTE_EN", 6171 "MDIO_DEV_PCS_EN", 6172 "MDIO_DEV_PHY_EN", 6173 "MDIO_DEV_PMD_EN", 6174 "MDIO_FUNCTION", 6175 "MDIO_MASKDATA", 6176 "MDIO_MULTI_MMDS_EN", 6177 "MDIO_MULTI_PRTS_EN", 6178 "MEASURE_LFSR_CNT", 6179 "MEASURE_TIMEOUT", 6180 "MEAS_INCOMPLETE", 6181 "MF_PREAMBLE_SUPRESSION", 6182 "MICRO_BYTE_MODE", 6183 "MICRO_DATARAM_TM", 6184 "MICRO_DISABLE_ECC", 6185 "MICRO_ERR0", 6186 "MICRO_ERR1", 6187 "MICRO_FSM", 6188 "MICRO_GEN_STATUS_SEL", 6189 "MICRO_INIT_CMD", 6190 "MICRO_INIT_DONE", 6191 "MICRO_INRUSH_CURRENT_FRC", 6192 "MICRO_INRUSH_CURRENT_FRC_VAL", 6193 "MICRO_IRAM_TM", 6194 "MICRO_MDIO_AUTOWAKEUP", 6195 "MICRO_MDIO_DW8051_RESET_N", 6196 "MICRO_MDIO_PROG_RAM_CS_FRC", 6197 "MICRO_MDIO_PROG_RAM_CS_FRC_VAL", 6198 "MICRO_MDIO_RAM_ACCESS_MODE", 6199 "MICRO_MDIO_RAM_READ_AUTOINC_EN", 6200 "MICRO_MDIO_UC_MAILBOX_LSW", 6201 "MICRO_MDIO_UC_MAILBOX_MSW", 6202 "MICRO_PMI_ACK_TIMEOUT_VAL", 6203 "MICRO_PMI_HP_ACK_FRC", 6204 "MICRO_PMI_HP_ACK_FRC_VAL", 6205 "MICRO_PRAM_IF_EN", 6206 "MICRO_PRAM_IF_FLOP_BYPASS", 6207 "MICRO_PRAM_IF_RSTB", 6208 "MICRO_PROGRAM_RAM_TM", 6209 "MICRO_RAM_ADDRESS", 6210 "MICRO_RAM_CLK_INVERT", 6211 "MICRO_RAM_COUNT", 6212 "MICRO_RAM_RDDATA", 6213 "MICRO_RAM_WRDATA", 6214 "MICRO_READ", 6215 "MICRO_RUN", 6216 "MICRO_SRST_DW8051_TO_PMI", 6217 "MICRO_SRST_MDIO_DATARAM_ACCESS", 6218 "MICRO_SRST_MDIO_LOAD_PROGRAM_RAM", 6219 "MICRO_SRST_MDIO_PROGRAM_ACCESS", 6220 "MICRO_STATUS_MUXED", 6221 "MICRO_STOP", 6222 "MICRO_SYSTEM_CLK_EN", 6223 "MICRO_SYSTEM_RESET_N", 6224 "MICRO_TEMPATURE_DATA", 6225 "MICRO_TX_DISABLE", 6226 "MICRO_UC_MDIO_MAILBOX_LSW", 6227 "MICRO_UC_MDIO_MAILBOX_MSW", 6228 "MICRO_WRITE", 6229 "MICRO_ZERO_ROM_DATAOUT", 6230 "MIIGMIIDLY_EN", 6231 "MIIGMIIMUX_EN", 6232 "MLD_SWAP_COUNT", 6233 "MODEL", 6234 "MODEL_NUMBER", 6235 "MODE_10G", 6236 "MSK_1B", 6237 "MSK_2B", 6238 "MULTIPLICITY", 6239 "MULTIPRTS_EN", 6240 "NEXT_PAGE", 6241 "NUMBER_PKT", 6242 "NUM_ADVERTISED_LANES", 6243 "NUM_LANES", 6244 "NUM_LANES_OEN", 6245 "NUM_LANES_OVERRIDE_VALUE", 6246 "OFFSET_FASTACQ", 6247 "OFFSET_PD", 6248 "OSR_MODE", 6249 "OSR_MODE_FRC", 6250 "OSR_MODE_FRC_VAL", 6251 "OSR_MODE_OEN", 6252 "OSR_MODE_PIN", 6253 "OSX2P_PHERR_GAIN", 6254 "OS_MODE", 6255 "OS_MODE_OEN", 6256 "OUI_CONTROL", 6257 "OUI_LOWER_DATA", 6258 "OUI_UPPER_DATA", 6259 "OVER1G_ABILITY", 6260 "OVER1G_PAGE_COUNT", 6261 "P1_EYEDIAG_BIN", 6262 "P1_EYEDIAG_EN", 6263 "P1_OFFSET", 6264 "P1_OFFSET_EN", 6265 "P1_OFF_3LEVELQ_EN", 6266 "P1_THRESH_SEL", 6267 "PARDET10G_PWRDNLINK_EN", 6268 "PATTERN_SEL", 6269 "PATT_GEN_EN", 6270 "PATT_GEN_SEQ_0", 6271 "PATT_GEN_SEQ_1", 6272 "PATT_GEN_SEQ_10", 6273 "PATT_GEN_SEQ_11", 6274 "PATT_GEN_SEQ_12", 6275 "PATT_GEN_SEQ_13", 6276 "PATT_GEN_SEQ_14", 6277 "PATT_GEN_SEQ_2", 6278 "PATT_GEN_SEQ_3", 6279 "PATT_GEN_SEQ_4", 6280 "PATT_GEN_SEQ_5", 6281 "PATT_GEN_SEQ_6", 6282 "PATT_GEN_SEQ_7", 6283 "PATT_GEN_SEQ_8", 6284 "PATT_GEN_SEQ_9", 6285 "PATT_GEN_START_POS", 6286 "PATT_GEN_STOP_POS", 6287 "PAUSE_RESOLUTION_RXSIDE", 6288 "PAUSE_RESOLUTION_TXSIDE", 6289 "PAYLOAD_TYPE", 6290 "PCMP_EN", 6291 "PCS_CLOCKCNT0", 6292 "PCS_CLOCKCNT0_OEN", 6293 "PCS_CREDITENABLE", 6294 "PCS_CREDITENABLE_OEN", 6295 "PCS_CREDITGENCNT", 6296 "PCS_CREDITGENCNT_OEN", 6297 "PCS_DEV_EN_OVERRIDE", 6298 "PCS_XS", 6299 "PD_CH_P1", 6300 "PD_CL37_COMPLETED", 6301 "PD_COMPLETED", 6302 "PD_DME_LOCK_TIMER_PERIOD", 6303 "PD_HCD_KX4_OR_KX", 6304 "PD_IN_PROGRESS", 6305 "PD_KX4_EN", 6306 "PD_KX_EN", 6307 "PD_SD_TIMER_PERIOD", 6308 "PD_TO_CL37_LINK_WAIT_TIMER", 6309 "PF2_LOWP_CTRL", 6310 "PF_CTRL", 6311 "PF_HIZ", 6312 "PGEN_EN", 6313 "PHASE_ERR_OFFSET", 6314 "PHASE_ERR_OFFSET_EN", 6315 "PHASE_ERR_OFFSET_MULT_2", 6316 "PHY_XS", 6317 "PIPELINE_RESET_COUNT", 6318 "PKTGEN_EN", 6319 "PKT_OR_PRTP", 6320 "PKT_SIZE", 6321 "PLL_BYPASS", 6322 "PLL_FORCE_CAP_DONE", 6323 "PLL_FORCE_CAP_DONE_EN", 6324 "PLL_FORCE_CAP_PASS", 6325 "PLL_FORCE_CAP_PASS_EN", 6326 "PLL_FORCE_FDONE", 6327 "PLL_FORCE_FDONE_EN", 6328 "PLL_FORCE_FPASS", 6329 "PLL_LOCK", 6330 "PLL_LOCK_FRC", 6331 "PLL_LOCK_FRC_VAL", 6332 "PLL_LOCK_LH", 6333 "PLL_LOCK_LH_LL", 6334 "PLL_LOCK_LL", 6335 "PLL_LOCK_OVRD", 6336 "PLL_LOCK_STS", 6337 "PLL_LOCK_TIMED_OUT", 6338 "PLL_LOCK_TIMER_PERIOD", 6339 "PLL_MODE", 6340 "PLL_RESET_EN", 6341 "PLL_SEQ_DONE", 6342 "PLL_SEQ_DONE_LH_LL", 6343 "PLL_SEQ_PASS", 6344 "PLL_SEQ_PASS_LH_LL", 6345 "PLL_SEQ_START", 6346 "PMA_PMD", 6347 "PMA_PMD_FORCED_SPEED_ENC_EN", 6348 "PMD_CORE_DP_H_RSTB_PKILL", 6349 "PMD_CORE_MODE", 6350 "PMD_DEV_EN_OVERRIDE", 6351 "PMD_LANE0_TX_DISABLE", 6352 "PMD_LANE1_TX_DISABLE", 6353 "PMD_LANE2_TX_DISABLE", 6354 "PMD_LANE3_TX_DISABLE", 6355 "PMD_LANE_MODE", 6356 "PMD_LN_DP_H_RSTB_PKILL", 6357 "PMD_LN_H_RSTB_PKILL", 6358 "PMD_LN_RX_H_PWRDN_PKILL", 6359 "PMD_LN_TX_H_PWRDN_PKILL", 6360 "PMD_LOCK_TIMED_OUT", 6361 "PMD_LOCK_TIMER_PERIOD", 6362 "PMD_MDIO_TRANS_PKILL", 6363 "PMD_RX_CLK_VLD_FRC", 6364 "PMD_RX_CLK_VLD_FRC_VAL", 6365 "PMD_RX_LOCK", 6366 "PMD_RX_LOCK_CHANGE", 6367 "PMD_TX_CLK_VLD_FRC", 6368 "PMD_TX_CLK_VLD_FRC_VAL", 6369 "PMD_TX_DISABLE_PIN_DIS", 6370 "PORT_MODE_SEL", 6371 "POR_H_RSTB", 6372 "POST_TAP_LIMIT", 6373 "POST_TAP_PRESET_VAL", 6374 "PRAM_ABILITY", 6375 "PRBS_CHK_CLK_EN_FRC_ON", 6376 "PRBS_CHK_EN", 6377 "PRBS_CHK_EN_AUTO_MODE", 6378 "PRBS_CHK_EN_TIMEOUT", 6379 "PRBS_CHK_EN_TIMER_MODE", 6380 "PRBS_CHK_ERR_CNT_BURST_MODE", 6381 "PRBS_CHK_ERR_CNT_LSB", 6382 "PRBS_CHK_ERR_CNT_MSB", 6383 "PRBS_CHK_INV", 6384 "PRBS_CHK_LOCK", 6385 "PRBS_CHK_LOCK_CNT", 6386 "PRBS_CHK_LOCK_LOST_LH", 6387 "PRBS_CHK_MODE", 6388 "PRBS_CHK_MODE_SEL", 6389 "PRBS_CHK_OOL_CNT", 6390 "PRBS_GEN_EN", 6391 "PRBS_GEN_ERR_INS", 6392 "PRBS_GEN_INV", 6393 "PRBS_GEN_MODE_SEL", 6394 "PRE_FREQ_DET_TIME", 6395 "PRE_TAP_LIMIT", 6396 "PRE_TAP_PRESET_VAL", 6397 "PROG_TL_CHAR", 6398 "PROG_TL_EN", 6399 "PROTOCOL", 6400 "PRTAD_BCST", 6401 "PRTP_DATA_PATTERN_SEL", 6402 "PRTP_ERR_COUNT", 6403 "PRTP_LOCK", 6404 "PWRDN_SEQ_TIMER", 6405 "PWRDWN10G_PLL_DIS", 6406 "PWRDWN_FORCE", 6407 "PWRDWN_PLL", 6408 "PWRDWN_RX", 6409 "PWRDWN_SW", 6410 "PWRDWN_TX", 6411 "QRSVD1", 6412 "QRSVD2_1_0", 6413 "QRSVD2_8_2", 6414 "QRSVD3", 6415 "QRSVDSWAP", 6416 "QSGMII_EN_RX", 6417 "QSGMII_EN_TX", 6418 "REFCLK_DIVCNT", 6419 "REFCLK_DIVCNT_SEL", 6420 "REFCLK_SEL", 6421 "REGID1", 6422 "REGID2", 6423 "REMOTE_FAULT", 6424 "REMOTE_FAULT_IN_BASE_PAGE", 6425 "REMOTE_FAULT_LH", 6426 "REMOTE_LOOPBACK", 6427 "REMOTE_PCS_LOOPBACK_ENABLE", 6428 "REMOTE_PMD_LOOPBACK_ENABLE", 6429 "REORDER_EN", 6430 "REORDER_EN_OEN", 6431 "REPLICATION_CNT", 6432 "REPLICATION_CNT_OEN", 6433 "RESCAL_FRC", 6434 "RESCAL_FRC_VAL", 6435 "RESCAL_IN", 6436 "RESERVED_ORDERED_BYTE_3", 6437 "RESERVED_ORDERED_SET_LH", 6438 "RESET_ANLG", 6439 "RESOLVED_PORT_MODE", 6440 "RESTART_AUTONEG", 6441 "RESTART_PI_EXT_MODE", 6442 "RESTART_PMD_RESTART", 6443 "RESTART_SIGDET", 6444 "RES_CAL_CNTR", 6445 "RETRY_TIME", 6446 "REVID2", 6447 "REVID_BONDING", 6448 "REVID_CL72", 6449 "REVID_EEE", 6450 "REVID_LLP", 6451 "REVID_MDIO", 6452 "REVID_MICRO", 6453 "REVID_MODEL", 6454 "REVID_MULTIPLICITY", 6455 "REVID_PIR", 6456 "REVID_PROCESS", 6457 "REVID_REV_LETTER", 6458 "REVID_REV_NUMBER", 6459 "REV_LETTER", 6460 "REV_NUMBER", 6461 "RFEC0_1BIT_ERROR", 6462 "RFEC0_2BIT_ERROR", 6463 "RFEC0_ADDRESS", 6464 "RFEC0_DISABLE_ECC", 6465 "RFEC0_ECC_CORRUPT", 6466 "RFEC0_TM", 6467 "RFEC1_1BIT_ERROR", 6468 "RFEC1_2BIT_ERROR", 6469 "RFEC1_ADDRESS", 6470 "RFEC1_DISABLE_ECC", 6471 "RFEC1_ECC_CORRUPT", 6472 "RFEC1_TM", 6473 "RLOOP", 6474 "RLOOP1G", 6475 "RLPBK_RXRST_EN", 6476 "RLPBK_SW_FORCE", 6477 "RMLD_STATUS", 6478 "RMT_LPBK_EN", 6479 "RMT_LPBK_PD_EARLY_IND", 6480 "RMT_LPBK_PD_FRC_ON", 6481 "RMT_LPBK_PD_LATE_IND", 6482 "RMT_LPBK_PD_MODE", 6483 "RSTB_LANE", 6484 "RSTB_TX_LANE", 6485 "RST_SEQ_DIS_FLT_MODE", 6486 "RST_SEQ_TIMER", 6487 "RST_SW", 6488 "RXCKPL_SEL_COMBO", 6489 "RXCK_MII_GEN_SEL", 6490 "RXFIFO_EMPTY", 6491 "RXFIFO_ERR_DETECTED", 6492 "RXFIFO_FULL", 6493 "RXFIFO_OVERRUN", 6494 "RXFIFO_UNDERRUN", 6495 "RXPKTCNT_L", 6496 "RXPKTCNT_U", 6497 "RXSM_STATE", 6498 "RX_AGGREGATOR_BYPASS_EN", 6499 "RX_CLK_VLD_LH", 6500 "RX_CLK_VLD_LL", 6501 "RX_CLK_VLD_OVRD", 6502 "RX_CLK_VLD_STS", 6503 "RX_DME_EN", 6504 "RX_DME_EN_OEN", 6505 "RX_DSC_LOCK", 6506 "RX_DSC_LOCK_FRC", 6507 "RX_DSC_LOCK_FRC_VAL", 6508 "RX_ERR_DETECTED", 6509 "RX_GBOX_AFRST_EN", 6510 "RX_LOCK_LH", 6511 "RX_LOCK_LL", 6512 "RX_LOCK_OVRD", 6513 "RX_LOCK_STS", 6514 "RX_MODE", 6515 "RX_MSBUS_TYPE", 6516 "RX_PI_MANUAL_MODE", 6517 "RX_PI_MANUAL_RESET", 6518 "RX_PI_MANUAL_STROBE", 6519 "RX_PI_PHASE_STEP_CNT", 6520 "RX_PI_PHASE_STEP_DIR", 6521 "RX_PI_SLICERS_EN", 6522 "RX_PKT_CHECK_EN", 6523 "RX_PMD_DP_INVERT", 6524 "RX_PORT_SEL", 6525 "RX_PRTP_EN", 6526 "RX_RESTART_PMD", 6527 "RX_RESTART_PMD_HOLD", 6528 "R_TEST_MODE_CFG", 6529 "R_TYPE_CODED", 6530 "SCRAMBLER_EN_MASK", 6531 "SCR_MODE", 6532 "SCR_MODE_OEN", 6533 "SCW0", 6534 "SCW0_MASK", 6535 "SCW1", 6536 "SCW1_MASK", 6537 "SCW2", 6538 "SCW2_MASK", 6539 "SCW3", 6540 "SCW3_MASK", 6541 "SCW4", 6542 "SCW4_MASK", 6543 "SCWCOUNT", 6544 "SC_BYPASS", 6545 "SC_FSM_STATUS", 6546 "SC_IGNORE_TX_DATA_VLD", 6547 "SDK_TX_DISABLE", 6548 "SEEDA0", 6549 "SEEDA1", 6550 "SEEDA2", 6551 "SEEDA3", 6552 "SEEDB0", 6553 "SEEDB1", 6554 "SEEDB2", 6555 "SEEDB3", 6556 "SEL_RX_PKTS_FOR_CNTR", 6557 "SEND_LMS_TO_PCS", 6558 "SEQ_UNEXPECTED_PAGE", 6559 "SERDES_TX_AMPLITUDE_OVERRIDE", 6560 "SET_BER_WINDOW_512", 6561 "SET_MEAS_INCOMPLETE", 6562 "SGMII_FULL_DUPLEX", 6563 "SGMII_MASTER_MODE", 6564 "SGMII_MODE", 6565 "SGMII_SPD_SWITCH", 6566 "SGMII_SPD_SWITCH_OEN", 6567 "SGMII_SPEED", 6568 "SGMII_TIMER", 6569 "SGMII_TO_CL37_AUTO_ENABLE", 6570 "SHIFT_AMMOUNT", 6571 "SIGDET_DP_RSTB_EN", 6572 "SIGNAL_DETECT", 6573 "SIGNAL_DETECT_CHANGE", 6574 "SIGNAL_DETECT_EN", 6575 "SIGNAL_DETECT_FILTER_1US", 6576 "SIGNAL_DETECT_FILTER_COUNT", 6577 "SIGNAL_DETECT_FRC", 6578 "SIGNAL_DETECT_FRC_VAL", 6579 "SIGNAL_DETECT_LH", 6580 "SIGNAL_DETECT_LL", 6581 "SIGNAL_DETECT_OVRD", 6582 "SIGNAL_DETECT_RAW", 6583 "SIGNAL_DETECT_RAW_CHANGE", 6584 "SIGNAL_DETECT_STS", 6585 "SIGNAL_DETECT_THRESH", 6586 "SINGLE_PORT_MODE", 6587 "SKEW_STATUS", 6588 "SLOWDN_XOR", 6589 "SOFT_RST_RX", 6590 "SOFT_RST_TX", 6591 "SPARE0", 6592 "SPARE1", 6593 "SPEED", 6594 "SPEED_STATUS", 6595 "STAND_ALONE_MODE", 6596 "START_SEQUENCER", 6597 "STATUS_EN", 6598 "SUP_RST_SEQ_FRC", 6599 "SUP_RST_SEQ_FRC_VAL", 6600 "SW_AN", 6601 "SW_HCD", 6602 "SW_SPEED", 6603 "SW_SPEED_CHANGE", 6604 "SW_SPEED_CHANGE_DONE", 6605 "SW_SPEED_CONFIG_VLD", 6606 "SYNC66ERRCOUNT", 6607 "SYNCE_MODE_PHY_LN0", 6608 "SYNCE_MODE_PHY_LN1", 6609 "SYNCE_MODE_PHY_LN2", 6610 "SYNCE_MODE_PHY_LN3", 6611 "SYNC_STATUS", 6612 "SYNC_STATUS_LH", 6613 "SYNC_STATUS_LL", 6614 "TAP_SUM_MAX_VAL", 6615 "TBI_INTERFACE", 6616 "TC", 6617 "TDR_BIT_SEL", 6618 "TDR_CYCLE_BIN", 6619 "TDR_CYCLE_SEL", 6620 "TDR_TRNSUM_EN", 6621 "TECH", 6622 "TECH_PROC", 6623 "TICK_DENOMINATOR", 6624 "TICK_NUMERATOR_LOWER", 6625 "TICK_NUMERATOR_UPPER", 6626 "TICK_OVERRIDE", 6627 "TIMER_DONE_FRC", 6628 "TIMER_DONE_FRC_VAL", 6629 "TLA_LN_SEQUENCER_FSM_STATUS", 6630 "TLA_LN_SEQUENCER_FSM_STATUS1", 6631 "TRANSMIT_NONCE", 6632 "TRNSUM_CLR_FRC", 6633 "TRNSUM_CLR_FRC_VAL", 6634 "TRNSUM_EN", 6635 "TRNSUM_ERROR_COUNT_EN", 6636 "TRNSUM_ERR_SEL", 6637 "TRNSUM_EYE_CLOSURE_EN", 6638 "TRNSUM_E_HIGH", 6639 "TRNSUM_E_LOW", 6640 "TRNSUM_FRZ_FRC", 6641 "TRNSUM_FRZ_FRC_VAL", 6642 "TRNSUM_GAIN", 6643 "TRNSUM_HIGH", 6644 "TRNSUM_INV_PATTERN_EN", 6645 "TRNSUM_LOW", 6646 "TRNSUM_O_HIGH", 6647 "TRNSUM_O_LOW", 6648 "TRNSUM_PATTERN", 6649 "TRNSUM_PATTERN_BIT_EN", 6650 "TRNSUM_PATTERN_FULL_CHECK_OFF", 6651 "TRNSUM_RANDOM_TAPSEL_DISABLE", 6652 "TRNSUM_TAP_EN", 6653 "TRNSUM_TAP_RANGE_SEL", 6654 "TRNSUM_TAP_SIGN", 6655 "TRNSUM_UNSIGNED_CORR", 6656 "TRNSUM_UNSIGNED_FLIP", 6657 "TXCKO_DIV", 6658 "TXFIFO_EMPTY", 6659 "TXFIFO_ERR_DETECTED", 6660 "TXFIFO_FULL", 6661 "TXFIFO_OVERRUN", 6662 "TXFIFO_UNDERRUN", 6663 "TXFIR_MAIN_ADJUSTED", 6664 "TXFIR_MAIN_AFTER_OVR", 6665 "TXFIR_MAIN_OFFSET", 6666 "TXFIR_MAIN_OVERRIDE", 6667 "TXFIR_OVERRIDE_EN", 6668 "TXFIR_POST2", 6669 "TXFIR_POST2_ADJUSTED", 6670 "TXFIR_POST2_OFFSET", 6671 "TXFIR_POST3", 6672 "TXFIR_POST3_ADJUSTED", 6673 "TXFIR_POST3_OFFSET", 6674 "TXFIR_POST_ADJUSTED", 6675 "TXFIR_POST_AFTER_OVR", 6676 "TXFIR_POST_OFFSET", 6677 "TXFIR_POST_OVERRIDE", 6678 "TXFIR_PRE_ADJUSTED", 6679 "TXFIR_PRE_AFTER_OVR", 6680 "TXFIR_PRE_OFFSET", 6681 "TXFIR_PRE_OVERRIDE", 6682 "TXPKTCNT_L", 6683 "TXPKTCNT_U", 6684 "TXSM_STATE", 6685 "TX_CLK_VLD_LH", 6686 "TX_CLK_VLD_LL", 6687 "TX_CLK_VLD_OVRD", 6688 "TX_CLK_VLD_STS", 6689 "TX_DISABLE", 6690 "TX_DISABLE_OEN", 6691 "TX_DISABLE_OUTPUT_SEL", 6692 "TX_DISABLE_TIMER_CTRL", 6693 "TX_DISABLE_TIMER_PERIOD", 6694 "TX_EEE_ALERT_EN", 6695 "TX_EEE_QUIET_EN", 6696 "TX_ERR_DETECTED", 6697 "TX_FIFO_WATERMARK", 6698 "TX_LANE_MAP_0", 6699 "TX_LANE_MAP_1", 6700 "TX_LANE_MAP_2", 6701 "TX_LANE_MAP_3", 6702 "TX_LANE_RATE_MISMATCH", 6703 "TX_LANE_RATE_MISMATCH_VL1", 6704 "TX_LINK_INTERRUPT", 6705 "TX_LOCAL_FAULT", 6706 "TX_LPI_RECEIVED", 6707 "TX_MODE", 6708 "TX_MSBUS_TYPE", 6709 "TX_MUX_SEL_ORDER", 6710 "TX_PCS_NATIVE_ANA_FRMT_EN", 6711 "TX_PI_EN", 6712 "TX_PI_EXT_CTRL_EN", 6713 "TX_PI_EXT_PHASE_BWSEL_INTEG", 6714 "TX_PI_FIRST_ORDER_BWSEL_INTEG", 6715 "TX_PI_FRC_PHASE_STEP_MUX_SEL", 6716 "TX_PI_FREQ_OVERRIDE_EN", 6717 "TX_PI_FREQ_OVERRIDE_VAL", 6718 "TX_PI_FRZ_FRC", 6719 "TX_PI_FRZ_FRC_VAL", 6720 "TX_PI_FRZ_MODE", 6721 "TX_PI_INTEG1_REG", 6722 "TX_PI_INTEG2_REG", 6723 "TX_PI_JITTER_FILTER_EN", 6724 "TX_PI_JIT_AMP", 6725 "TX_PI_JIT_FREQ_IDX", 6726 "TX_PI_JIT_SSC_FREQ_MODE", 6727 "TX_PI_LANE_SEL_FRC", 6728 "TX_PI_LANE_SEL_FRC_VAL", 6729 "TX_PI_LOOP_FILTER_STABLE", 6730 "TX_PI_LOOP_TIMING_SRC_SEL", 6731 "TX_PI_PHASE_CNTR", 6732 "TX_PI_PHASE_ERR", 6733 "TX_PI_PHASE_INVERT", 6734 "TX_PI_PHASE_OVERRIDE", 6735 "TX_PI_PHASE_STEP_DIR", 6736 "TX_PI_PHASE_STEP_NUM", 6737 "TX_PI_PHASE_STROBE", 6738 "TX_PI_RESET_CODE_DBG", 6739 "TX_PI_RMT_LPBK_BYPASS_FLT", 6740 "TX_PI_SECOND_ORDER_BWSEL_INTEG", 6741 "TX_PI_SECOND_ORDER_LOOP_EN", 6742 "TX_PI_SJ_GEN_EN", 6743 "TX_PI_SSC_GEN_EN", 6744 "TX_PMD_DP_INVERT", 6745 "TX_PRTP_EN", 6746 "TX_REMOTE_FAULT", 6747 "TX_RESET_COUNT", 6748 "TX_S_CLKGATE_FRC_ON", 6749 "TX_S_COMCLK_FRC_ON", 6750 "TX_S_COMCLK_SEL", 6751 "TX_TEST_PORT_SEL", 6752 "TX_UNDERRUN_1000_DIS", 6753 "T_TYPE_CODED", 6754 "UC_ACK_CORE_CFG_DONE", 6755 "UC_ACK_CORE_DP_RESET", 6756 "UC_ACK_DSC_CONFIG", 6757 "UC_ACK_DSC_EEE_DONE", 6758 "UC_ACK_DSC_RESET", 6759 "UC_ACK_DSC_RESTART", 6760 "UC_ACK_LANE_CFG_DONE", 6761 "UC_ACK_LANE_DP_RESET", 6762 "UC_ACTIVE", 6763 "UC_DSC_ERROR_FOUND", 6764 "UC_DSC_GP_UC_REQ", 6765 "UC_DSC_READY_FOR_CMD", 6766 "UC_DSC_SCRATCH", 6767 "UC_DSC_SUPP_INFO", 6768 "UC_TRNSUM_EN", 6769 "UC_TUNE_EN", 6770 "UNCORCOUNTH", 6771 "UNCORCOUNTL", 6772 "VCO_DONE_EN", 6773 "VCO_RST_EN", 6774 "VCO_START_TIME", 6775 "VCO_STEP_TIME", 6776 "VGA3_CTRL_BIN", 6777 "VGA_ACC_HYS_EN", 6778 "VGA_BIN", 6779 "VGA_CTRL_BIN", 6780 "VGA_EN", 6781 "VGA_ERR_GAIN", 6782 "VGA_ERR_SEL", 6783 "VGA_INV_M1", 6784 "VGA_INV_P1", 6785 "VGA_P1_ACC_CLR", 6786 "VGA_P1_GRADIENT_INVERT", 6787 "VGA_PATTERN", 6788 "VGA_PATTERN_BIT_EN", 6789 "VGA_TABLEMAP_DISABLE", 6790 "VGA_UPDATE_GAIN", 6791 "VL_ON_LL_0", 6792 "VL_ON_LL_1", 6793 "WAIT_CNTR_LIMIT", 6794 "WIN_CAL_CNTR", 6795 "WIS", 6796 "WM", 6797 "ZERO_COMMA_DETECTOR_PHASE", 6798 }; 6799 6800 #endif 6801 #endif 6802 #endif 6803 #endif /* PHYMOD_CONFIG_INCLUDE_FIELD_INFO */ 6804 6805 6806 6807 /******************************************************************************* 6808 * 6809 * The following is the symbol table itself. 6810 * It defines the entries for all registers and memories. 6811 * It also incorporates the field information for each register and memory if 6812 * applicable. 6813 */ 6814 static const phymod_symbol_t bcmi_qsgmiie_serdes_syms[] = { 6815 #ifndef PHYMOD_CONFIG_EXCLUDE_CHIP_SYMBOLS_BCMI_QSGMIIE_SERDES 6816 { 6817 BCMI_QSGMIIE_SERDES_MIICONTROLr, 6818 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6819 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 6820 BCMI_QSGMIIE_SERDES_MIICONTROLr_fields, 6821 #else 6822 0, 6823 #endif 6824 #endif 6825 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6826 PHYMOD_SYMBOL_FLAG_REGISTER, 6827 "MIICONTROLr", 6828 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6829 "IEEE0_MIICONTROL", 6830 NULL, 6831 #endif 6832 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6833 0x0, /* 0 */ 6834 0, 6835 #endif 6836 }, 6837 { 6838 BCMI_QSGMIIE_SERDES_MIISTATUSr, 6839 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6840 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 6841 BCMI_QSGMIIE_SERDES_MIISTATUSr_fields, 6842 #else 6843 0, 6844 #endif 6845 #endif 6846 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6847 PHYMOD_SYMBOL_FLAG_REGISTER, 6848 "MIISTATUSr", 6849 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6850 "IEEE0_MIISTATUS", 6851 NULL, 6852 #endif 6853 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6854 0x149, /* 329 */ 6855 0, 6856 #endif 6857 }, 6858 { 6859 BCMI_QSGMIIE_SERDES_PHYID2r, 6860 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6861 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 6862 BCMI_QSGMIIE_SERDES_PHYID2r_fields, 6863 #else 6864 0, 6865 #endif 6866 #endif 6867 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6868 PHYMOD_SYMBOL_FLAG_REGISTER, 6869 "PHYID2r", 6870 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6871 "CL22_B0_PHYID2", 6872 NULL, 6873 #endif 6874 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6875 0x143, /* 323 */ 6876 0, 6877 #endif 6878 }, 6879 { 6880 BCMI_QSGMIIE_SERDES_PHYID3r, 6881 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6882 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 6883 BCMI_QSGMIIE_SERDES_PHYID3r_fields, 6884 #else 6885 0, 6886 #endif 6887 #endif 6888 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6889 PHYMOD_SYMBOL_FLAG_REGISTER, 6890 "PHYID3r", 6891 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6892 "CL22_B0_PHYID3", 6893 NULL, 6894 #endif 6895 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6896 0xbff0, /* 49136 */ 6897 0, 6898 #endif 6899 }, 6900 { 6901 BCMI_QSGMIIE_SERDES_XGXSCONTROLr, 6902 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6903 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 6904 BCMI_QSGMIIE_SERDES_XGXSCONTROLr_fields, 6905 #else 6906 0, 6907 #endif 6908 #endif 6909 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6910 PHYMOD_SYMBOL_FLAG_REGISTER, 6911 "XGXSCONTROLr", 6912 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6913 "XGXS_BLOCK0_XGXSCONTROL", 6914 NULL, 6915 #endif 6916 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6917 0x0, /* 0 */ 6918 0, 6919 #endif 6920 }, 6921 { 6922 BCMI_QSGMIIE_SERDES_MISCCONTROL1r, 6923 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6924 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 6925 BCMI_QSGMIIE_SERDES_MISCCONTROL1r_fields, 6926 #else 6927 0, 6928 #endif 6929 #endif 6930 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6931 PHYMOD_SYMBOL_FLAG_REGISTER, 6932 "MISCCONTROL1r", 6933 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6934 "XGXS_BLOCK0_MISCCONTROL1", 6935 NULL, 6936 #endif 6937 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6938 0x0, /* 0 */ 6939 0, 6940 #endif 6941 }, 6942 { 6943 BCMI_QSGMIIE_SERDES_LANECTRL0r, 6944 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6945 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 6946 BCMI_QSGMIIE_SERDES_LANECTRL0r_fields, 6947 #else 6948 0, 6949 #endif 6950 #endif 6951 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6952 PHYMOD_SYMBOL_FLAG_REGISTER, 6953 "LANECTRL0r", 6954 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6955 "XGXS_BLOCK1_LANECTRL0", 6956 NULL, 6957 #endif 6958 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6959 0x0, /* 0 */ 6960 0, 6961 #endif 6962 }, 6963 { 6964 BCMI_QSGMIIE_SERDES_LANECTRL2r, 6965 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6966 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 6967 BCMI_QSGMIIE_SERDES_LANECTRL2r_fields, 6968 #else 6969 0, 6970 #endif 6971 #endif 6972 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6973 PHYMOD_SYMBOL_FLAG_REGISTER, 6974 "LANECTRL2r", 6975 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6976 "XGXS_BLOCK1_LANECTRL2", 6977 NULL, 6978 #endif 6979 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6980 0xff00, /* 65280 */ 6981 0, 6982 #endif 6983 }, 6984 { 6985 BCMI_QSGMIIE_SERDES_LANECTRL3r, 6986 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6987 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 6988 BCMI_QSGMIIE_SERDES_LANECTRL3r_fields, 6989 #else 6990 0, 6991 #endif 6992 #endif 6993 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6994 PHYMOD_SYMBOL_FLAG_REGISTER, 6995 "LANECTRL3r", 6996 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6997 "XGXS_BLOCK1_LANECTRL3", 6998 NULL, 6999 #endif 7000 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7001 0x200, /* 512 */ 7002 0, 7003 #endif 7004 }, 7005 { 7006 BCMI_QSGMIIE_SERDES_R1000XCONTROL1r, 7007 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7008 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7009 BCMI_QSGMIIE_SERDES_R1000XCONTROL1r_fields, 7010 #else 7011 0, 7012 #endif 7013 #endif 7014 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7015 PHYMOD_SYMBOL_FLAG_REGISTER, 7016 "R1000XCONTROL1r", 7017 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7018 "SERDES_DIGITAL_1000XCONTROL1", 7019 NULL, 7020 #endif 7021 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7022 0x0, /* 0 */ 7023 0, 7024 #endif 7025 }, 7026 { 7027 BCMI_QSGMIIE_SERDES_R1000XSTATUS1r, 7028 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7029 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7030 BCMI_QSGMIIE_SERDES_R1000XSTATUS1r_fields, 7031 #else 7032 0, 7033 #endif 7034 #endif 7035 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7036 PHYMOD_SYMBOL_FLAG_REGISTER, 7037 "R1000XSTATUS1r", 7038 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7039 "SERDES_DIGITAL_1000XSTATUS1", 7040 NULL, 7041 #endif 7042 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7043 0x0, /* 0 */ 7044 0, 7045 #endif 7046 }, 7047 { 7048 BCMI_QSGMIIE_SERDES_MISC1r, 7049 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7050 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7051 BCMI_QSGMIIE_SERDES_MISC1r_fields, 7052 #else 7053 0, 7054 #endif 7055 #endif 7056 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7057 PHYMOD_SYMBOL_FLAG_REGISTER, 7058 "MISC1r", 7059 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7060 "SERDES_DIGITAL_MISC1", 7061 NULL, 7062 #endif 7063 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7064 0x0, /* 0 */ 7065 0, 7066 #endif 7067 }, 7068 { 7069 BCMI_QSGMIIE_SERDES_MISC2r, 7070 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7071 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7072 BCMI_QSGMIIE_SERDES_MISC2r_fields, 7073 #else 7074 0, 7075 #endif 7076 #endif 7077 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7078 PHYMOD_SYMBOL_FLAG_REGISTER, 7079 "MISC2r", 7080 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7081 "SERDES_DIGITAL_MISC2", 7082 NULL, 7083 #endif 7084 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7085 0x0, /* 0 */ 7086 0, 7087 #endif 7088 }, 7089 { 7090 BCMI_QSGMIIE_SERDES_SERDES_ID0r, 7091 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7092 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7093 BCMI_QSGMIIE_SERDES_SERDES_ID0r_fields, 7094 #else 7095 0, 7096 #endif 7097 #endif 7098 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7099 PHYMOD_SYMBOL_FLAG_REGISTER, 7100 "SERDES_ID0r", 7101 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7102 "TEST_SERDES_ID0", 7103 NULL, 7104 #endif 7105 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7106 0xc047, /* 49223 */ 7107 0, 7108 #endif 7109 }, 7110 { 7111 BCMI_QSGMIIE_SERDES_SERDES_ID1r, 7112 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7113 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7114 BCMI_QSGMIIE_SERDES_SERDES_ID1r_fields, 7115 #else 7116 0, 7117 #endif 7118 #endif 7119 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7120 PHYMOD_SYMBOL_FLAG_REGISTER, 7121 "SERDES_ID1r", 7122 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7123 "TEST_SERDES_ID1", 7124 NULL, 7125 #endif 7126 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7127 0x2a02, /* 10754 */ 7128 0, 7129 #endif 7130 }, 7131 { 7132 BCMI_QSGMIIE_SERDES_SERDES_ID2r, 7133 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7134 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7135 BCMI_QSGMIIE_SERDES_SERDES_ID2r_fields, 7136 #else 7137 0, 7138 #endif 7139 #endif 7140 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7141 PHYMOD_SYMBOL_FLAG_REGISTER, 7142 "SERDES_ID2r", 7143 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7144 "TEST_SERDES_ID2", 7145 NULL, 7146 #endif 7147 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7148 0xf, /* 15 */ 7149 0, 7150 #endif 7151 }, 7152 { 7153 BCMI_QSGMIIE_SERDES_MAIN0_SETUPr, 7154 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7155 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7156 BCMI_QSGMIIE_SERDES_MAIN0_SETUPr_fields, 7157 #else 7158 0, 7159 #endif 7160 #endif 7161 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7162 PHYMOD_SYMBOL_FLAG_REGISTER, 7163 "MAIN0_SETUPr", 7164 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7165 NULL, 7166 NULL, 7167 #endif 7168 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7169 0x0, /* 0 */ 7170 0, 7171 #endif 7172 }, 7173 { 7174 BCMI_QSGMIIE_SERDES_MAIN0_SYNCE_CTLr, 7175 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7176 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7177 BCMI_QSGMIIE_SERDES_MAIN0_SYNCE_CTLr_fields, 7178 #else 7179 0, 7180 #endif 7181 #endif 7182 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7183 PHYMOD_SYMBOL_FLAG_REGISTER, 7184 "MAIN0_SYNCE_CTLr", 7185 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7186 "MAIN0_SYNCE_CONTROL", 7187 NULL, 7188 #endif 7189 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7190 0xaa, /* 170 */ 7191 0, 7192 #endif 7193 }, 7194 { 7195 BCMI_QSGMIIE_SERDES_MAIN0_LN_SWPr, 7196 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7197 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7198 BCMI_QSGMIIE_SERDES_MAIN0_LN_SWPr_fields, 7199 #else 7200 0, 7201 #endif 7202 #endif 7203 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7204 PHYMOD_SYMBOL_FLAG_REGISTER, 7205 "MAIN0_LN_SWPr", 7206 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7207 "MAIN0_LANE_SWAP", 7208 NULL, 7209 #endif 7210 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7211 0xe4, /* 228 */ 7212 0, 7213 #endif 7214 }, 7215 { 7216 BCMI_QSGMIIE_SERDES_MAIN0_DEVINPKG5r, 7217 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7218 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7219 BCMI_QSGMIIE_SERDES_MAIN0_DEVINPKG5r_fields, 7220 #else 7221 0, 7222 #endif 7223 #endif 7224 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7225 PHYMOD_SYMBOL_FLAG_REGISTER, 7226 "MAIN0_DEVINPKG5r", 7227 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7228 "MAIN0_DEVICEINPKG5", 7229 NULL, 7230 #endif 7231 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7232 0x83, /* 131 */ 7233 0, 7234 #endif 7235 }, 7236 { 7237 BCMI_QSGMIIE_SERDES_MAIN0_MISCr, 7238 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7239 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7240 BCMI_QSGMIIE_SERDES_MAIN0_MISCr_fields, 7241 #else 7242 0, 7243 #endif 7244 #endif 7245 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7246 PHYMOD_SYMBOL_FLAG_REGISTER, 7247 "MAIN0_MISCr", 7248 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7249 NULL, 7250 NULL, 7251 #endif 7252 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7253 0x0, /* 0 */ 7254 0, 7255 #endif 7256 }, 7257 { 7258 BCMI_QSGMIIE_SERDES_MAIN0_TICK_CTL1r, 7259 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7260 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7261 BCMI_QSGMIIE_SERDES_MAIN0_TICK_CTL1r_fields, 7262 #else 7263 0, 7264 #endif 7265 #endif 7266 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7267 PHYMOD_SYMBOL_FLAG_REGISTER, 7268 "MAIN0_TICK_CTL1r", 7269 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7270 "MAIN0_TICK_CONTROL_1", 7271 NULL, 7272 #endif 7273 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7274 0x0, /* 0 */ 7275 0, 7276 #endif 7277 }, 7278 { 7279 BCMI_QSGMIIE_SERDES_MAIN0_TICK_CTL0r, 7280 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7281 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7282 BCMI_QSGMIIE_SERDES_MAIN0_TICK_CTL0r_fields, 7283 #else 7284 0, 7285 #endif 7286 #endif 7287 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7288 PHYMOD_SYMBOL_FLAG_REGISTER, 7289 "MAIN0_TICK_CTL0r", 7290 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7291 "MAIN0_TICK_CONTROL_0", 7292 NULL, 7293 #endif 7294 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7295 0x0, /* 0 */ 7296 0, 7297 #endif 7298 }, 7299 { 7300 BCMI_QSGMIIE_SERDES_MAIN0_LPBK_CTLr, 7301 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7302 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7303 BCMI_QSGMIIE_SERDES_MAIN0_LPBK_CTLr_fields, 7304 #else 7305 0, 7306 #endif 7307 #endif 7308 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7309 PHYMOD_SYMBOL_FLAG_REGISTER, 7310 "MAIN0_LPBK_CTLr", 7311 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7312 "MAIN0_LOOPBACK_CONTROL", 7313 NULL, 7314 #endif 7315 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7316 0x0, /* 0 */ 7317 0, 7318 #endif 7319 }, 7320 { 7321 BCMI_QSGMIIE_SERDES_MAIN0_MDIO_BCSTr, 7322 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7323 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7324 BCMI_QSGMIIE_SERDES_MAIN0_MDIO_BCSTr_fields, 7325 #else 7326 0, 7327 #endif 7328 #endif 7329 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7330 PHYMOD_SYMBOL_FLAG_REGISTER, 7331 "MAIN0_MDIO_BCSTr", 7332 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7333 "MAIN0_MDIO_BROADCAST", 7334 NULL, 7335 #endif 7336 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7337 0xf800, /* 63488 */ 7338 0, 7339 #endif 7340 }, 7341 { 7342 BCMI_QSGMIIE_SERDES_MAIN0_SERDESIDr, 7343 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7344 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7345 BCMI_QSGMIIE_SERDES_MAIN0_SERDESIDr_fields, 7346 #else 7347 0, 7348 #endif 7349 #endif 7350 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7351 PHYMOD_SYMBOL_FLAG_REGISTER, 7352 "MAIN0_SERDESIDr", 7353 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7354 NULL, 7355 NULL, 7356 #endif 7357 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7358 0x2d2, /* 722 */ 7359 0, 7360 #endif 7361 }, 7362 { 7363 BCMI_QSGMIIE_SERDES_PMD_X1_CTLr, 7364 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7365 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7366 BCMI_QSGMIIE_SERDES_PMD_X1_CTLr_fields, 7367 #else 7368 0, 7369 #endif 7370 #endif 7371 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7372 PHYMOD_SYMBOL_FLAG_REGISTER, 7373 "PMD_X1_CTLr", 7374 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7375 "PMD_X1_CONTROL", 7376 NULL, 7377 #endif 7378 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7379 0x0, /* 0 */ 7380 0, 7381 #endif 7382 }, 7383 { 7384 BCMI_QSGMIIE_SERDES_PMD_X1_MODEr, 7385 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7386 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7387 BCMI_QSGMIIE_SERDES_PMD_X1_MODEr_fields, 7388 #else 7389 0, 7390 #endif 7391 #endif 7392 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7393 PHYMOD_SYMBOL_FLAG_REGISTER, 7394 "PMD_X1_MODEr", 7395 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7396 NULL, 7397 NULL, 7398 #endif 7399 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7400 0x0, /* 0 */ 7401 0, 7402 #endif 7403 }, 7404 { 7405 BCMI_QSGMIIE_SERDES_PMD_X1_STSr, 7406 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7407 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7408 BCMI_QSGMIIE_SERDES_PMD_X1_STSr_fields, 7409 #else 7410 0, 7411 #endif 7412 #endif 7413 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7414 PHYMOD_SYMBOL_FLAG_REGISTER, 7415 "PMD_X1_STSr", 7416 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7417 "PMD_X1_STATUS", 7418 NULL, 7419 #endif 7420 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7421 0x0, /* 0 */ 7422 0, 7423 #endif 7424 }, 7425 { 7426 BCMI_QSGMIIE_SERDES_PMD_X1_LATCH_STSr, 7427 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7428 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7429 BCMI_QSGMIIE_SERDES_PMD_X1_LATCH_STSr_fields, 7430 #else 7431 0, 7432 #endif 7433 #endif 7434 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7435 PHYMOD_SYMBOL_FLAG_REGISTER, 7436 "PMD_X1_LATCH_STSr", 7437 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7438 "PMD_X1_LATCH_STATUS", 7439 NULL, 7440 #endif 7441 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7442 0x0, /* 0 */ 7443 0, 7444 #endif 7445 }, 7446 { 7447 BCMI_QSGMIIE_SERDES_PMD_X1_OVRRr, 7448 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7449 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7450 BCMI_QSGMIIE_SERDES_PMD_X1_OVRRr_fields, 7451 #else 7452 0, 7453 #endif 7454 #endif 7455 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7456 PHYMOD_SYMBOL_FLAG_REGISTER, 7457 "PMD_X1_OVRRr", 7458 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7459 "PMD_X1_OVERRIDE", 7460 NULL, 7461 #endif 7462 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7463 0x0, /* 0 */ 7464 0, 7465 #endif 7466 }, 7467 { 7468 BCMI_QSGMIIE_SERDES_PKTGEN_CTL1r, 7469 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7470 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7471 BCMI_QSGMIIE_SERDES_PKTGEN_CTL1r_fields, 7472 #else 7473 0, 7474 #endif 7475 #endif 7476 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7477 PHYMOD_SYMBOL_FLAG_REGISTER, 7478 "PKTGEN_CTL1r", 7479 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7480 "PKTGEN0_PKTGENCTRL1", 7481 NULL, 7482 #endif 7483 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7484 0x0, /* 0 */ 7485 0, 7486 #endif 7487 }, 7488 { 7489 BCMI_QSGMIIE_SERDES_PKTGEN_CTL2r, 7490 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7491 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7492 BCMI_QSGMIIE_SERDES_PKTGEN_CTL2r_fields, 7493 #else 7494 0, 7495 #endif 7496 #endif 7497 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7498 PHYMOD_SYMBOL_FLAG_REGISTER, 7499 "PKTGEN_CTL2r", 7500 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7501 "PKTGEN0_PKTGENCTRL2", 7502 NULL, 7503 #endif 7504 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7505 0x28, /* 40 */ 7506 0, 7507 #endif 7508 }, 7509 { 7510 BCMI_QSGMIIE_SERDES_PKTGEN_PRTPCTLr, 7511 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7512 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7513 BCMI_QSGMIIE_SERDES_PKTGEN_PRTPCTLr_fields, 7514 #else 7515 0, 7516 #endif 7517 #endif 7518 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7519 PHYMOD_SYMBOL_FLAG_REGISTER, 7520 "PKTGEN_PRTPCTLr", 7521 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7522 "PKTGEN0_PRTPCONTROL", 7523 NULL, 7524 #endif 7525 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7526 0x0, /* 0 */ 7527 0, 7528 #endif 7529 }, 7530 { 7531 BCMI_QSGMIIE_SERDES_PKTGEN_CRCERRCNTr, 7532 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7533 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7534 BCMI_QSGMIIE_SERDES_PKTGEN_CRCERRCNTr_fields, 7535 #else 7536 0, 7537 #endif 7538 #endif 7539 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7540 PHYMOD_SYMBOL_FLAG_REGISTER, 7541 "PKTGEN_CRCERRCNTr", 7542 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7543 "PKTGEN0_CRCERRORCOUNT", 7544 NULL, 7545 #endif 7546 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7547 0x0, /* 0 */ 7548 0, 7549 #endif 7550 }, 7551 { 7552 BCMI_QSGMIIE_SERDES_PKTGEN_PRTPERRCTRr, 7553 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7554 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7555 BCMI_QSGMIIE_SERDES_PKTGEN_PRTPERRCTRr_fields, 7556 #else 7557 0, 7558 #endif 7559 #endif 7560 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7561 PHYMOD_SYMBOL_FLAG_REGISTER, 7562 "PKTGEN_PRTPERRCTRr", 7563 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7564 "PKTGEN0_PRTPERRORCOUNTER", 7565 NULL, 7566 #endif 7567 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7568 0x0, /* 0 */ 7569 0, 7570 #endif 7571 }, 7572 { 7573 BCMI_QSGMIIE_SERDES_PKTGEN_PRTPLOCKSTSr, 7574 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7575 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7576 BCMI_QSGMIIE_SERDES_PKTGEN_PRTPLOCKSTSr_fields, 7577 #else 7578 0, 7579 #endif 7580 #endif 7581 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7582 PHYMOD_SYMBOL_FLAG_REGISTER, 7583 "PKTGEN_PRTPLOCKSTSr", 7584 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7585 "PKTGEN0_PRTPLOCKSTATUS", 7586 NULL, 7587 #endif 7588 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7589 0x0, /* 0 */ 7590 0, 7591 #endif 7592 }, 7593 { 7594 BCMI_QSGMIIE_SERDES_PKTGEN_PCS_SEEDA0r, 7595 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7596 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7597 BCMI_QSGMIIE_SERDES_PKTGEN_PCS_SEEDA0r_fields, 7598 #else 7599 0, 7600 #endif 7601 #endif 7602 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7603 PHYMOD_SYMBOL_FLAG_REGISTER, 7604 "PKTGEN_PCS_SEEDA0r", 7605 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7606 "PKTGEN0_PCS_SEEDA0", 7607 NULL, 7608 #endif 7609 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7610 0x0, /* 0 */ 7611 0, 7612 #endif 7613 }, 7614 { 7615 BCMI_QSGMIIE_SERDES_PKTGEN_PCS_SEEDA1r, 7616 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7617 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7618 BCMI_QSGMIIE_SERDES_PKTGEN_PCS_SEEDA1r_fields, 7619 #else 7620 0, 7621 #endif 7622 #endif 7623 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7624 PHYMOD_SYMBOL_FLAG_REGISTER, 7625 "PKTGEN_PCS_SEEDA1r", 7626 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7627 "PKTGEN0_PCS_SEEDA1", 7628 NULL, 7629 #endif 7630 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7631 0x0, /* 0 */ 7632 0, 7633 #endif 7634 }, 7635 { 7636 BCMI_QSGMIIE_SERDES_PKTGEN_PCS_SEEDA2r, 7637 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7638 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7639 BCMI_QSGMIIE_SERDES_PKTGEN_PCS_SEEDA2r_fields, 7640 #else 7641 0, 7642 #endif 7643 #endif 7644 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7645 PHYMOD_SYMBOL_FLAG_REGISTER, 7646 "PKTGEN_PCS_SEEDA2r", 7647 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7648 "PKTGEN0_PCS_SEEDA2", 7649 NULL, 7650 #endif 7651 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7652 0x0, /* 0 */ 7653 0, 7654 #endif 7655 }, 7656 { 7657 BCMI_QSGMIIE_SERDES_PKTGEN_PCS_SEEDA3r, 7658 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7659 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7660 BCMI_QSGMIIE_SERDES_PKTGEN_PCS_SEEDA3r_fields, 7661 #else 7662 0, 7663 #endif 7664 #endif 7665 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7666 PHYMOD_SYMBOL_FLAG_REGISTER, 7667 "PKTGEN_PCS_SEEDA3r", 7668 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7669 "PKTGEN0_PCS_SEEDA3", 7670 NULL, 7671 #endif 7672 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7673 0x0, /* 0 */ 7674 0, 7675 #endif 7676 }, 7677 { 7678 BCMI_QSGMIIE_SERDES_PKTGEN_PCS_SEEDB0r, 7679 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7680 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7681 BCMI_QSGMIIE_SERDES_PKTGEN_PCS_SEEDB0r_fields, 7682 #else 7683 0, 7684 #endif 7685 #endif 7686 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7687 PHYMOD_SYMBOL_FLAG_REGISTER, 7688 "PKTGEN_PCS_SEEDB0r", 7689 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7690 "PKTGEN0_PCS_SEEDB0", 7691 NULL, 7692 #endif 7693 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7694 0x0, /* 0 */ 7695 0, 7696 #endif 7697 }, 7698 { 7699 BCMI_QSGMIIE_SERDES_PKTGEN_PCS_SEEDB1r, 7700 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7701 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7702 BCMI_QSGMIIE_SERDES_PKTGEN_PCS_SEEDB1r_fields, 7703 #else 7704 0, 7705 #endif 7706 #endif 7707 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7708 PHYMOD_SYMBOL_FLAG_REGISTER, 7709 "PKTGEN_PCS_SEEDB1r", 7710 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7711 "PKTGEN0_PCS_SEEDB1", 7712 NULL, 7713 #endif 7714 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7715 0x0, /* 0 */ 7716 0, 7717 #endif 7718 }, 7719 { 7720 BCMI_QSGMIIE_SERDES_PKTGEN_PCS_SEEDB2r, 7721 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7722 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7723 BCMI_QSGMIIE_SERDES_PKTGEN_PCS_SEEDB2r_fields, 7724 #else 7725 0, 7726 #endif 7727 #endif 7728 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7729 PHYMOD_SYMBOL_FLAG_REGISTER, 7730 "PKTGEN_PCS_SEEDB2r", 7731 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7732 "PKTGEN0_PCS_SEEDB2", 7733 NULL, 7734 #endif 7735 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7736 0x0, /* 0 */ 7737 0, 7738 #endif 7739 }, 7740 { 7741 BCMI_QSGMIIE_SERDES_PKTGEN_PCS_SEEDB3r, 7742 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7743 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7744 BCMI_QSGMIIE_SERDES_PKTGEN_PCS_SEEDB3r_fields, 7745 #else 7746 0, 7747 #endif 7748 #endif 7749 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7750 PHYMOD_SYMBOL_FLAG_REGISTER, 7751 "PKTGEN_PCS_SEEDB3r", 7752 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7753 "PKTGEN0_PCS_SEEDB3", 7754 NULL, 7755 #endif 7756 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7757 0x0, /* 0 */ 7758 0, 7759 #endif 7760 }, 7761 { 7762 BCMI_QSGMIIE_SERDES_PKTGEN_PAYLOADBYTESr, 7763 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7764 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7765 BCMI_QSGMIIE_SERDES_PKTGEN_PAYLOADBYTESr_fields, 7766 #else 7767 0, 7768 #endif 7769 #endif 7770 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7771 PHYMOD_SYMBOL_FLAG_REGISTER, 7772 "PKTGEN_PAYLOADBYTESr", 7773 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7774 "PKTGEN1_PAYLOADBYTES", 7775 NULL, 7776 #endif 7777 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7778 0x0, /* 0 */ 7779 0, 7780 #endif 7781 }, 7782 { 7783 BCMI_QSGMIIE_SERDES_PKTGEN_ERRMASK4r, 7784 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7785 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7786 BCMI_QSGMIIE_SERDES_PKTGEN_ERRMASK4r_fields, 7787 #else 7788 0, 7789 #endif 7790 #endif 7791 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7792 PHYMOD_SYMBOL_FLAG_REGISTER, 7793 "PKTGEN_ERRMASK4r", 7794 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7795 "PKTGEN1_ERRORMASK4", 7796 NULL, 7797 #endif 7798 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7799 0x0, /* 0 */ 7800 0, 7801 #endif 7802 }, 7803 { 7804 BCMI_QSGMIIE_SERDES_PKTGEN_ERRMASK3r, 7805 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7806 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7807 BCMI_QSGMIIE_SERDES_PKTGEN_ERRMASK3r_fields, 7808 #else 7809 0, 7810 #endif 7811 #endif 7812 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7813 PHYMOD_SYMBOL_FLAG_REGISTER, 7814 "PKTGEN_ERRMASK3r", 7815 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7816 "PKTGEN1_ERRORMASK3", 7817 NULL, 7818 #endif 7819 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7820 0x0, /* 0 */ 7821 0, 7822 #endif 7823 }, 7824 { 7825 BCMI_QSGMIIE_SERDES_PKTGEN_ERRMASK2r, 7826 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7827 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7828 BCMI_QSGMIIE_SERDES_PKTGEN_ERRMASK2r_fields, 7829 #else 7830 0, 7831 #endif 7832 #endif 7833 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7834 PHYMOD_SYMBOL_FLAG_REGISTER, 7835 "PKTGEN_ERRMASK2r", 7836 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7837 "PKTGEN1_ERRORMASK2", 7838 NULL, 7839 #endif 7840 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7841 0x0, /* 0 */ 7842 0, 7843 #endif 7844 }, 7845 { 7846 BCMI_QSGMIIE_SERDES_PKTGEN_ERRMASK1r, 7847 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7848 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7849 BCMI_QSGMIIE_SERDES_PKTGEN_ERRMASK1r_fields, 7850 #else 7851 0, 7852 #endif 7853 #endif 7854 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7855 PHYMOD_SYMBOL_FLAG_REGISTER, 7856 "PKTGEN_ERRMASK1r", 7857 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7858 "PKTGEN1_ERRORMASK1", 7859 NULL, 7860 #endif 7861 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7862 0x0, /* 0 */ 7863 0, 7864 #endif 7865 }, 7866 { 7867 BCMI_QSGMIIE_SERDES_PKTGEN_ERRMASK0r, 7868 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7869 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7870 BCMI_QSGMIIE_SERDES_PKTGEN_ERRMASK0r_fields, 7871 #else 7872 0, 7873 #endif 7874 #endif 7875 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7876 PHYMOD_SYMBOL_FLAG_REGISTER, 7877 "PKTGEN_ERRMASK0r", 7878 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7879 "PKTGEN1_ERRORMASK0", 7880 NULL, 7881 #endif 7882 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7883 0x0, /* 0 */ 7884 0, 7885 #endif 7886 }, 7887 { 7888 BCMI_QSGMIIE_SERDES_MEM_ECC_INT_1BITr, 7889 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7890 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7891 BCMI_QSGMIIE_SERDES_MEM_ECC_INT_1BITr_fields, 7892 #else 7893 0, 7894 #endif 7895 #endif 7896 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7897 PHYMOD_SYMBOL_FLAG_REGISTER, 7898 "MEM_ECC_INT_1BITr", 7899 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7900 "MEM_ECC_ECC_INT_1BIT", 7901 NULL, 7902 #endif 7903 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7904 0x0, /* 0 */ 7905 0, 7906 #endif 7907 }, 7908 { 7909 BCMI_QSGMIIE_SERDES_MEM_ECC_INT_2BITr, 7910 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7911 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7912 BCMI_QSGMIIE_SERDES_MEM_ECC_INT_2BITr_fields, 7913 #else 7914 0, 7915 #endif 7916 #endif 7917 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7918 PHYMOD_SYMBOL_FLAG_REGISTER, 7919 "MEM_ECC_INT_2BITr", 7920 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7921 "MEM_ECC_ECC_INT_2BIT", 7922 NULL, 7923 #endif 7924 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7925 0x0, /* 0 */ 7926 0, 7927 #endif 7928 }, 7929 { 7930 BCMI_QSGMIIE_SERDES_MEM_ECC_MSK_1BITr, 7931 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7932 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7933 BCMI_QSGMIIE_SERDES_MEM_ECC_MSK_1BITr_fields, 7934 #else 7935 0, 7936 #endif 7937 #endif 7938 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7939 PHYMOD_SYMBOL_FLAG_REGISTER, 7940 "MEM_ECC_MSK_1BITr", 7941 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7942 "MEM_ECC_ECC_MSK_1BIT", 7943 NULL, 7944 #endif 7945 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7946 0x0, /* 0 */ 7947 0, 7948 #endif 7949 }, 7950 { 7951 BCMI_QSGMIIE_SERDES_MEM_ECC_MSK_2BITr, 7952 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7953 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7954 BCMI_QSGMIIE_SERDES_MEM_ECC_MSK_2BITr_fields, 7955 #else 7956 0, 7957 #endif 7958 #endif 7959 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7960 PHYMOD_SYMBOL_FLAG_REGISTER, 7961 "MEM_ECC_MSK_2BITr", 7962 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7963 "MEM_ECC_ECC_MSK_2BIT", 7964 NULL, 7965 #endif 7966 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7967 0x0, /* 0 */ 7968 0, 7969 #endif 7970 }, 7971 { 7972 BCMI_QSGMIIE_SERDES_MEM_ECC_DISr, 7973 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7974 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7975 BCMI_QSGMIIE_SERDES_MEM_ECC_DISr_fields, 7976 #else 7977 0, 7978 #endif 7979 #endif 7980 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7981 PHYMOD_SYMBOL_FLAG_REGISTER, 7982 "MEM_ECC_DISr", 7983 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7984 "MEM_ECC_ECC_DISABLE", 7985 NULL, 7986 #endif 7987 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7988 0x0, /* 0 */ 7989 0, 7990 #endif 7991 }, 7992 { 7993 BCMI_QSGMIIE_SERDES_MEM_ECC_CORRUPTr, 7994 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7995 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 7996 BCMI_QSGMIIE_SERDES_MEM_ECC_CORRUPTr_fields, 7997 #else 7998 0, 7999 #endif 8000 #endif 8001 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8002 PHYMOD_SYMBOL_FLAG_REGISTER, 8003 "MEM_ECC_CORRUPTr", 8004 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8005 "MEM_ECC_ECC_CORRUPT", 8006 NULL, 8007 #endif 8008 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8009 0x0, /* 0 */ 8010 0, 8011 #endif 8012 }, 8013 { 8014 BCMI_QSGMIIE_SERDES_MEM_ECC_DESKEW_STSr, 8015 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8016 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8017 BCMI_QSGMIIE_SERDES_MEM_ECC_DESKEW_STSr_fields, 8018 #else 8019 0, 8020 #endif 8021 #endif 8022 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8023 PHYMOD_SYMBOL_FLAG_REGISTER, 8024 "MEM_ECC_DESKEW_STSr", 8025 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8026 "MEM_ECC_ECC_DESKEW_STATUS", 8027 NULL, 8028 #endif 8029 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8030 0x0, /* 0 */ 8031 0, 8032 #endif 8033 }, 8034 { 8035 BCMI_QSGMIIE_SERDES_MEM_ECC_RFEC0_STSr, 8036 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8037 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8038 BCMI_QSGMIIE_SERDES_MEM_ECC_RFEC0_STSr_fields, 8039 #else 8040 0, 8041 #endif 8042 #endif 8043 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8044 PHYMOD_SYMBOL_FLAG_REGISTER, 8045 "MEM_ECC_RFEC0_STSr", 8046 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8047 "MEM_ECC_ECC_RFEC0_STATUS", 8048 NULL, 8049 #endif 8050 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8051 0x0, /* 0 */ 8052 0, 8053 #endif 8054 }, 8055 { 8056 BCMI_QSGMIIE_SERDES_MEM_ECC_RFEC1_STSr, 8057 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8058 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8059 BCMI_QSGMIIE_SERDES_MEM_ECC_RFEC1_STSr_fields, 8060 #else 8061 0, 8062 #endif 8063 #endif 8064 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8065 PHYMOD_SYMBOL_FLAG_REGISTER, 8066 "MEM_ECC_RFEC1_STSr", 8067 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8068 "MEM_ECC_ECC_RFEC1_STATUS", 8069 NULL, 8070 #endif 8071 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8072 0x0, /* 0 */ 8073 0, 8074 #endif 8075 }, 8076 { 8077 BCMI_QSGMIIE_SERDES_MEM_TM_DESKEWr, 8078 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8079 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8080 BCMI_QSGMIIE_SERDES_MEM_TM_DESKEWr_fields, 8081 #else 8082 0, 8083 #endif 8084 #endif 8085 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8086 PHYMOD_SYMBOL_FLAG_REGISTER, 8087 "MEM_TM_DESKEWr", 8088 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8089 "MEM_DBG_MEM_TM_DESKEW", 8090 NULL, 8091 #endif 8092 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8093 0x0, /* 0 */ 8094 0, 8095 #endif 8096 }, 8097 { 8098 BCMI_QSGMIIE_SERDES_MEM_TM_RFEC0r, 8099 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8100 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8101 BCMI_QSGMIIE_SERDES_MEM_TM_RFEC0r_fields, 8102 #else 8103 0, 8104 #endif 8105 #endif 8106 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8107 PHYMOD_SYMBOL_FLAG_REGISTER, 8108 "MEM_TM_RFEC0r", 8109 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8110 "MEM_DBG_MEM_TM_RFEC0", 8111 NULL, 8112 #endif 8113 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8114 0x0, /* 0 */ 8115 0, 8116 #endif 8117 }, 8118 { 8119 BCMI_QSGMIIE_SERDES_MEM_TM_RFEC1r, 8120 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8121 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8122 BCMI_QSGMIIE_SERDES_MEM_TM_RFEC1r_fields, 8123 #else 8124 0, 8125 #endif 8126 #endif 8127 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8128 PHYMOD_SYMBOL_FLAG_REGISTER, 8129 "MEM_TM_RFEC1r", 8130 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8131 "MEM_DBG_MEM_TM_RFEC1", 8132 NULL, 8133 #endif 8134 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8135 0x0, /* 0 */ 8136 0, 8137 #endif 8138 }, 8139 { 8140 BCMI_QSGMIIE_SERDES_MISC_XGXSSTS0r, 8141 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8142 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8143 BCMI_QSGMIIE_SERDES_MISC_XGXSSTS0r_fields, 8144 #else 8145 0, 8146 #endif 8147 #endif 8148 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8149 PHYMOD_SYMBOL_FLAG_REGISTER, 8150 "MISC_XGXSSTS0r", 8151 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8152 "MISC_XGXSSTATUS0", 8153 NULL, 8154 #endif 8155 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8156 0x8000, /* 32768 */ 8157 0, 8158 #endif 8159 }, 8160 { 8161 BCMI_QSGMIIE_SERDES_MISC_TX_RATE_MISMATCHr, 8162 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8163 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8164 BCMI_QSGMIIE_SERDES_MISC_TX_RATE_MISMATCHr_fields, 8165 #else 8166 0, 8167 #endif 8168 #endif 8169 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8170 PHYMOD_SYMBOL_FLAG_REGISTER, 8171 "MISC_TX_RATE_MISMATCHr", 8172 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8173 NULL, 8174 NULL, 8175 #endif 8176 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8177 0x0, /* 0 */ 8178 0, 8179 #endif 8180 }, 8181 { 8182 BCMI_QSGMIIE_SERDES_MISC_SCRMBLR_CTLr, 8183 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8184 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8185 BCMI_QSGMIIE_SERDES_MISC_SCRMBLR_CTLr_fields, 8186 #else 8187 0, 8188 #endif 8189 #endif 8190 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8191 PHYMOD_SYMBOL_FLAG_REGISTER, 8192 "MISC_SCRMBLR_CTLr", 8193 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8194 "MISC_SCRAMBLER_CONTROL", 8195 NULL, 8196 #endif 8197 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8198 0x1d, /* 29 */ 8199 0, 8200 #endif 8201 }, 8202 { 8203 BCMI_QSGMIIE_SERDES_MISC_CL72_EN_MASKr, 8204 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8205 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8206 BCMI_QSGMIIE_SERDES_MISC_CL72_EN_MASKr_fields, 8207 #else 8208 0, 8209 #endif 8210 #endif 8211 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8212 PHYMOD_SYMBOL_FLAG_REGISTER, 8213 "MISC_CL72_EN_MASKr", 8214 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8215 "MISC_CL72_ENABLE_MASK", 8216 NULL, 8217 #endif 8218 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8219 0xffff, /* 65535 */ 8220 0, 8221 #endif 8222 }, 8223 { 8224 BCMI_QSGMIIE_SERDES_CL82_RX_AM_TMRr, 8225 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8226 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8227 BCMI_QSGMIIE_SERDES_CL82_RX_AM_TMRr_fields, 8228 #else 8229 0, 8230 #endif 8231 #endif 8232 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8233 PHYMOD_SYMBOL_FLAG_REGISTER, 8234 "CL82_RX_AM_TMRr", 8235 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8236 "CL82_SHARED_CL82_RX_AM_TIMER", 8237 NULL, 8238 #endif 8239 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8240 0x3fff, /* 16383 */ 8241 0, 8242 #endif 8243 }, 8244 { 8245 BCMI_QSGMIIE_SERDES_CL82_LN_0_AM_BYTE10r, 8246 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8247 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8248 BCMI_QSGMIIE_SERDES_CL82_LN_0_AM_BYTE10r_fields, 8249 #else 8250 0, 8251 #endif 8252 #endif 8253 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8254 PHYMOD_SYMBOL_FLAG_REGISTER, 8255 "CL82_LN_0_AM_BYTE10r", 8256 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8257 "CL82_AM_REGS_LANE_0_AM_BYTE10", 8258 NULL, 8259 #endif 8260 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8261 0x7690, /* 30352 */ 8262 0, 8263 #endif 8264 }, 8265 { 8266 BCMI_QSGMIIE_SERDES_CL82_LN_1_AM_BYTE10r, 8267 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8268 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8269 BCMI_QSGMIIE_SERDES_CL82_LN_1_AM_BYTE10r_fields, 8270 #else 8271 0, 8272 #endif 8273 #endif 8274 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8275 PHYMOD_SYMBOL_FLAG_REGISTER, 8276 "CL82_LN_1_AM_BYTE10r", 8277 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8278 "CL82_AM_REGS_LANE_1_AM_BYTE10", 8279 NULL, 8280 #endif 8281 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8282 0xc4f0, /* 50416 */ 8283 0, 8284 #endif 8285 }, 8286 { 8287 BCMI_QSGMIIE_SERDES_CL82_LANES_1_0_AM_BYTE2r, 8288 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8289 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8290 BCMI_QSGMIIE_SERDES_CL82_LANES_1_0_AM_BYTE2r_fields, 8291 #else 8292 0, 8293 #endif 8294 #endif 8295 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8296 PHYMOD_SYMBOL_FLAG_REGISTER, 8297 "CL82_LANES_1_0_AM_BYTE2r", 8298 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8299 "CL82_AM_REGS_LANES_1_0_AM_BYTE2", 8300 NULL, 8301 #endif 8302 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8303 0xe647, /* 58951 */ 8304 0, 8305 #endif 8306 }, 8307 { 8308 BCMI_QSGMIIE_SERDES_CL82_LN_2_AM_BYTE10r, 8309 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8310 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8311 BCMI_QSGMIIE_SERDES_CL82_LN_2_AM_BYTE10r_fields, 8312 #else 8313 0, 8314 #endif 8315 #endif 8316 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8317 PHYMOD_SYMBOL_FLAG_REGISTER, 8318 "CL82_LN_2_AM_BYTE10r", 8319 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8320 "CL82_AM_REGS_TSC_12_LANE_2_AM_BYTE10", 8321 NULL, 8322 #endif 8323 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8324 0x65c5, /* 26053 */ 8325 0, 8326 #endif 8327 }, 8328 { 8329 BCMI_QSGMIIE_SERDES_CL82_LN_3_AM_BYTE10r, 8330 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8331 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8332 BCMI_QSGMIIE_SERDES_CL82_LN_3_AM_BYTE10r_fields, 8333 #else 8334 0, 8335 #endif 8336 #endif 8337 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8338 PHYMOD_SYMBOL_FLAG_REGISTER, 8339 "CL82_LN_3_AM_BYTE10r", 8340 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8341 "CL82_AM_REGS_TSC_12_LANE_3_AM_BYTE10", 8342 NULL, 8343 #endif 8344 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8345 0x79a2, /* 31138 */ 8346 0, 8347 #endif 8348 }, 8349 { 8350 BCMI_QSGMIIE_SERDES_CL82_LANES_3_2_AM_BYTE2r, 8351 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8352 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8353 BCMI_QSGMIIE_SERDES_CL82_LANES_3_2_AM_BYTE2r_fields, 8354 #else 8355 0, 8356 #endif 8357 #endif 8358 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8359 PHYMOD_SYMBOL_FLAG_REGISTER, 8360 "CL82_LANES_3_2_AM_BYTE2r", 8361 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8362 "CL82_AM_REGS_TSC_12_LANES_3_2_AM_BYTE2", 8363 NULL, 8364 #endif 8365 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8366 0x3d9b, /* 15771 */ 8367 0, 8368 #endif 8369 }, 8370 { 8371 BCMI_QSGMIIE_SERDES_RX_X1_DEC_CTL0r, 8372 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8373 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8374 BCMI_QSGMIIE_SERDES_RX_X1_DEC_CTL0r_fields, 8375 #else 8376 0, 8377 #endif 8378 #endif 8379 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8380 PHYMOD_SYMBOL_FLAG_REGISTER, 8381 "RX_X1_DEC_CTL0r", 8382 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8383 "RX_X1_CONTROL0_DECODE_CONTROL_0", 8384 NULL, 8385 #endif 8386 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8387 0x101, /* 257 */ 8388 0, 8389 #endif 8390 }, 8391 { 8392 BCMI_QSGMIIE_SERDES_RX_X1_DEC_CTL1r, 8393 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8394 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8395 BCMI_QSGMIIE_SERDES_RX_X1_DEC_CTL1r_fields, 8396 #else 8397 0, 8398 #endif 8399 #endif 8400 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8401 PHYMOD_SYMBOL_FLAG_REGISTER, 8402 "RX_X1_DEC_CTL1r", 8403 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8404 "RX_X1_CONTROL0_DECODE_CONTROL_1", 8405 NULL, 8406 #endif 8407 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8408 0x6140, /* 24896 */ 8409 0, 8410 #endif 8411 }, 8412 { 8413 BCMI_QSGMIIE_SERDES_RX_X1_DESKEW_WINSr, 8414 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8415 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8416 BCMI_QSGMIIE_SERDES_RX_X1_DESKEW_WINSr_fields, 8417 #else 8418 0, 8419 #endif 8420 #endif 8421 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8422 PHYMOD_SYMBOL_FLAG_REGISTER, 8423 "RX_X1_DESKEW_WINSr", 8424 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8425 "RX_X1_CONTROL0_DESKEW_WINDOWS", 8426 NULL, 8427 #endif 8428 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8429 0xee17, /* 60951 */ 8430 0, 8431 #endif 8432 }, 8433 { 8434 BCMI_QSGMIIE_SERDES_RX_X1_SHCNT_CL49r, 8435 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8436 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8437 BCMI_QSGMIIE_SERDES_RX_X1_SHCNT_CL49r_fields, 8438 #else 8439 0, 8440 #endif 8441 #endif 8442 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8443 PHYMOD_SYMBOL_FLAG_REGISTER, 8444 "RX_X1_SHCNT_CL49r", 8445 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8446 "RX_X1_CONTROL1_SHCNT_CL49", 8447 NULL, 8448 #endif 8449 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8450 0x4010, /* 16400 */ 8451 0, 8452 #endif 8453 }, 8454 { 8455 BCMI_QSGMIIE_SERDES_RX_X1_VALID_SHCNT_CL82r, 8456 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8457 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8458 BCMI_QSGMIIE_SERDES_RX_X1_VALID_SHCNT_CL82r_fields, 8459 #else 8460 0, 8461 #endif 8462 #endif 8463 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8464 PHYMOD_SYMBOL_FLAG_REGISTER, 8465 "RX_X1_VALID_SHCNT_CL82r", 8466 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8467 "RX_X1_CONTROL1_VALID_SHCNT_CL82", 8468 NULL, 8469 #endif 8470 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8471 0x400, /* 1024 */ 8472 0, 8473 #endif 8474 }, 8475 { 8476 BCMI_QSGMIIE_SERDES_RX_X1_INVALID_SHCNT_CL82r, 8477 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8478 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8479 BCMI_QSGMIIE_SERDES_RX_X1_INVALID_SHCNT_CL82r_fields, 8480 #else 8481 0, 8482 #endif 8483 #endif 8484 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8485 PHYMOD_SYMBOL_FLAG_REGISTER, 8486 "RX_X1_INVALID_SHCNT_CL82r", 8487 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8488 "RX_X1_CONTROL1_INVALID_SHCNT_CL82", 8489 NULL, 8490 #endif 8491 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8492 0x41, /* 65 */ 8493 0, 8494 #endif 8495 }, 8496 { 8497 BCMI_QSGMIIE_SERDES_RX_X1_SCW0r, 8498 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8499 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8500 BCMI_QSGMIIE_SERDES_RX_X1_SCW0r_fields, 8501 #else 8502 0, 8503 #endif 8504 #endif 8505 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8506 PHYMOD_SYMBOL_FLAG_REGISTER, 8507 "RX_X1_SCW0r", 8508 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8509 "RX_X1_CONTROL1_SCW0", 8510 NULL, 8511 #endif 8512 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8513 0x8090, /* 32912 */ 8514 0, 8515 #endif 8516 }, 8517 { 8518 BCMI_QSGMIIE_SERDES_RX_X1_SCW1r, 8519 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8520 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8521 BCMI_QSGMIIE_SERDES_RX_X1_SCW1r_fields, 8522 #else 8523 0, 8524 #endif 8525 #endif 8526 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8527 PHYMOD_SYMBOL_FLAG_REGISTER, 8528 "RX_X1_SCW1r", 8529 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8530 "RX_X1_CONTROL1_SCW1", 8531 NULL, 8532 #endif 8533 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8534 0xa0b0, /* 41136 */ 8535 0, 8536 #endif 8537 }, 8538 { 8539 BCMI_QSGMIIE_SERDES_RX_X1_SCW2r, 8540 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8541 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8542 BCMI_QSGMIIE_SERDES_RX_X1_SCW2r_fields, 8543 #else 8544 0, 8545 #endif 8546 #endif 8547 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8548 PHYMOD_SYMBOL_FLAG_REGISTER, 8549 "RX_X1_SCW2r", 8550 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8551 "RX_X1_CONTROL1_SCW2", 8552 NULL, 8553 #endif 8554 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8555 0xc0d0, /* 49360 */ 8556 0, 8557 #endif 8558 }, 8559 { 8560 BCMI_QSGMIIE_SERDES_RX_X1_SCW3r, 8561 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8562 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8563 BCMI_QSGMIIE_SERDES_RX_X1_SCW3r_fields, 8564 #else 8565 0, 8566 #endif 8567 #endif 8568 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8569 PHYMOD_SYMBOL_FLAG_REGISTER, 8570 "RX_X1_SCW3r", 8571 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8572 "RX_X1_CONTROL1_SCW3", 8573 NULL, 8574 #endif 8575 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8576 0xe070, /* 57456 */ 8577 0, 8578 #endif 8579 }, 8580 { 8581 BCMI_QSGMIIE_SERDES_RX_X1_SCW4r, 8582 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8583 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8584 BCMI_QSGMIIE_SERDES_RX_X1_SCW4r_fields, 8585 #else 8586 0, 8587 #endif 8588 #endif 8589 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8590 PHYMOD_SYMBOL_FLAG_REGISTER, 8591 "RX_X1_SCW4r", 8592 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8593 "RX_X1_CONTROL1_SCW4", 8594 NULL, 8595 #endif 8596 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8597 0x1, /* 1 */ 8598 0, 8599 #endif 8600 }, 8601 { 8602 BCMI_QSGMIIE_SERDES_RX_X1_SCW0_MASKr, 8603 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8604 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8605 BCMI_QSGMIIE_SERDES_RX_X1_SCW0_MASKr_fields, 8606 #else 8607 0, 8608 #endif 8609 #endif 8610 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8611 PHYMOD_SYMBOL_FLAG_REGISTER, 8612 "RX_X1_SCW0_MASKr", 8613 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8614 "RX_X1_CONTROL1_SCW0_MASK", 8615 NULL, 8616 #endif 8617 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8618 0xf0f0, /* 61680 */ 8619 0, 8620 #endif 8621 }, 8622 { 8623 BCMI_QSGMIIE_SERDES_RX_X1_SCW1_MASKr, 8624 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8625 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8626 BCMI_QSGMIIE_SERDES_RX_X1_SCW1_MASKr_fields, 8627 #else 8628 0, 8629 #endif 8630 #endif 8631 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8632 PHYMOD_SYMBOL_FLAG_REGISTER, 8633 "RX_X1_SCW1_MASKr", 8634 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8635 "RX_X1_CONTROL1_SCW1_MASK", 8636 NULL, 8637 #endif 8638 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8639 0xf0f0, /* 61680 */ 8640 0, 8641 #endif 8642 }, 8643 { 8644 BCMI_QSGMIIE_SERDES_RX_X1_SCW2_MASKr, 8645 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8646 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8647 BCMI_QSGMIIE_SERDES_RX_X1_SCW2_MASKr_fields, 8648 #else 8649 0, 8650 #endif 8651 #endif 8652 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8653 PHYMOD_SYMBOL_FLAG_REGISTER, 8654 "RX_X1_SCW2_MASKr", 8655 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8656 "RX_X1_CONTROL1_SCW2_MASK", 8657 NULL, 8658 #endif 8659 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8660 0xf0f0, /* 61680 */ 8661 0, 8662 #endif 8663 }, 8664 { 8665 BCMI_QSGMIIE_SERDES_RX_X1_SCW3_MASKr, 8666 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8667 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8668 BCMI_QSGMIIE_SERDES_RX_X1_SCW3_MASKr_fields, 8669 #else 8670 0, 8671 #endif 8672 #endif 8673 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8674 PHYMOD_SYMBOL_FLAG_REGISTER, 8675 "RX_X1_SCW3_MASKr", 8676 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8677 "RX_X1_CONTROL1_SCW3_MASK", 8678 NULL, 8679 #endif 8680 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8681 0xf0f0, /* 61680 */ 8682 0, 8683 #endif 8684 }, 8685 { 8686 BCMI_QSGMIIE_SERDES_RX_X1_SCW4_MASKr, 8687 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8688 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8689 BCMI_QSGMIIE_SERDES_RX_X1_SCW4_MASKr_fields, 8690 #else 8691 0, 8692 #endif 8693 #endif 8694 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8695 PHYMOD_SYMBOL_FLAG_REGISTER, 8696 "RX_X1_SCW4_MASKr", 8697 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8698 "RX_X1_CONTROL1_SCW4_MASK", 8699 NULL, 8700 #endif 8701 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8702 0x3, /* 3 */ 8703 0, 8704 #endif 8705 }, 8706 { 8707 BCMI_QSGMIIE_SERDES_AN_X1_OUI_UPRr, 8708 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8709 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8710 BCMI_QSGMIIE_SERDES_AN_X1_OUI_UPRr_fields, 8711 #else 8712 0, 8713 #endif 8714 #endif 8715 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8716 PHYMOD_SYMBOL_FLAG_REGISTER, 8717 "AN_X1_OUI_UPRr", 8718 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8719 "AN_X1_CONTROL_OUI_UPPER", 8720 NULL, 8721 #endif 8722 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8723 0x0, /* 0 */ 8724 0, 8725 #endif 8726 }, 8727 { 8728 BCMI_QSGMIIE_SERDES_AN_X1_OUI_LWRr, 8729 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8730 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8731 BCMI_QSGMIIE_SERDES_AN_X1_OUI_LWRr_fields, 8732 #else 8733 0, 8734 #endif 8735 #endif 8736 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8737 PHYMOD_SYMBOL_FLAG_REGISTER, 8738 "AN_X1_OUI_LWRr", 8739 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8740 "AN_X1_CONTROL_OUI_LOWER", 8741 NULL, 8742 #endif 8743 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8744 0x0, /* 0 */ 8745 0, 8746 #endif 8747 }, 8748 { 8749 BCMI_QSGMIIE_SERDES_AN_X1_BAM_SPD_PRI_5_0r, 8750 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8751 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8752 BCMI_QSGMIIE_SERDES_AN_X1_BAM_SPD_PRI_5_0r_fields, 8753 #else 8754 0, 8755 #endif 8756 #endif 8757 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8758 PHYMOD_SYMBOL_FLAG_REGISTER, 8759 "AN_X1_BAM_SPD_PRI_5_0r", 8760 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8761 "AN_X1_CONTROL_BAM_SPEED_PRI_5_0", 8762 NULL, 8763 #endif 8764 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8765 0x0, /* 0 */ 8766 0, 8767 #endif 8768 }, 8769 { 8770 BCMI_QSGMIIE_SERDES_AN_X1_BAM_SPD_PRI_11_6r, 8771 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8772 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8773 BCMI_QSGMIIE_SERDES_AN_X1_BAM_SPD_PRI_11_6r_fields, 8774 #else 8775 0, 8776 #endif 8777 #endif 8778 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8779 PHYMOD_SYMBOL_FLAG_REGISTER, 8780 "AN_X1_BAM_SPD_PRI_11_6r", 8781 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8782 "AN_X1_CONTROL_BAM_SPEED_PRI_11_6", 8783 NULL, 8784 #endif 8785 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8786 0x0, /* 0 */ 8787 0, 8788 #endif 8789 }, 8790 { 8791 BCMI_QSGMIIE_SERDES_AN_X1_BAM_SPD_PRI_17_12r, 8792 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8793 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8794 BCMI_QSGMIIE_SERDES_AN_X1_BAM_SPD_PRI_17_12r_fields, 8795 #else 8796 0, 8797 #endif 8798 #endif 8799 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8800 PHYMOD_SYMBOL_FLAG_REGISTER, 8801 "AN_X1_BAM_SPD_PRI_17_12r", 8802 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8803 "AN_X1_CONTROL_BAM_SPEED_PRI_17_12", 8804 NULL, 8805 #endif 8806 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8807 0x0, /* 0 */ 8808 0, 8809 #endif 8810 }, 8811 { 8812 BCMI_QSGMIIE_SERDES_AN_X1_BAM_SPD_PRI_23_18r, 8813 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8814 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8815 BCMI_QSGMIIE_SERDES_AN_X1_BAM_SPD_PRI_23_18r_fields, 8816 #else 8817 0, 8818 #endif 8819 #endif 8820 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8821 PHYMOD_SYMBOL_FLAG_REGISTER, 8822 "AN_X1_BAM_SPD_PRI_23_18r", 8823 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8824 "AN_X1_CONTROL_BAM_SPEED_PRI_23_18", 8825 NULL, 8826 #endif 8827 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8828 0x0, /* 0 */ 8829 0, 8830 #endif 8831 }, 8832 { 8833 BCMI_QSGMIIE_SERDES_AN_X1_BAM_SPD_PRI_29_24r, 8834 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8835 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8836 BCMI_QSGMIIE_SERDES_AN_X1_BAM_SPD_PRI_29_24r_fields, 8837 #else 8838 0, 8839 #endif 8840 #endif 8841 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8842 PHYMOD_SYMBOL_FLAG_REGISTER, 8843 "AN_X1_BAM_SPD_PRI_29_24r", 8844 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8845 "AN_X1_CONTROL_BAM_SPEED_PRI_29_24", 8846 NULL, 8847 #endif 8848 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8849 0x0, /* 0 */ 8850 0, 8851 #endif 8852 }, 8853 { 8854 BCMI_QSGMIIE_SERDES_AN_X1_BAM_SPD_PRI_35_30r, 8855 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8856 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8857 BCMI_QSGMIIE_SERDES_AN_X1_BAM_SPD_PRI_35_30r_fields, 8858 #else 8859 0, 8860 #endif 8861 #endif 8862 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8863 PHYMOD_SYMBOL_FLAG_REGISTER, 8864 "AN_X1_BAM_SPD_PRI_35_30r", 8865 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8866 "AN_X1_CONTROL_BAM_SPEED_PRI_35_30", 8867 NULL, 8868 #endif 8869 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8870 0x0, /* 0 */ 8871 0, 8872 #endif 8873 }, 8874 { 8875 BCMI_QSGMIIE_SERDES_AN_X1_CFG_CTLr, 8876 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8877 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8878 BCMI_QSGMIIE_SERDES_AN_X1_CFG_CTLr_fields, 8879 #else 8880 0, 8881 #endif 8882 #endif 8883 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8884 PHYMOD_SYMBOL_FLAG_REGISTER, 8885 "AN_X1_CFG_CTLr", 8886 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8887 "AN_X1_CONTROL_CONFIG_CONTROL", 8888 NULL, 8889 #endif 8890 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8891 0x0, /* 0 */ 8892 0, 8893 #endif 8894 }, 8895 { 8896 BCMI_QSGMIIE_SERDES_AN_X1_CL37_RESTARTr, 8897 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8898 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8899 BCMI_QSGMIIE_SERDES_AN_X1_CL37_RESTARTr_fields, 8900 #else 8901 0, 8902 #endif 8903 #endif 8904 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8905 PHYMOD_SYMBOL_FLAG_REGISTER, 8906 "AN_X1_CL37_RESTARTr", 8907 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8908 "AN_X1_TIMERS_CL37_RESTART", 8909 NULL, 8910 #endif 8911 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8912 0x0, /* 0 */ 8913 0, 8914 #endif 8915 }, 8916 { 8917 BCMI_QSGMIIE_SERDES_AN_X1_CL37_ACKr, 8918 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8919 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8920 BCMI_QSGMIIE_SERDES_AN_X1_CL37_ACKr_fields, 8921 #else 8922 0, 8923 #endif 8924 #endif 8925 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8926 PHYMOD_SYMBOL_FLAG_REGISTER, 8927 "AN_X1_CL37_ACKr", 8928 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8929 "AN_X1_TIMERS_CL37_ACK", 8930 NULL, 8931 #endif 8932 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8933 0x0, /* 0 */ 8934 0, 8935 #endif 8936 }, 8937 { 8938 BCMI_QSGMIIE_SERDES_AN_X1_CL37_ERRr, 8939 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8940 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8941 BCMI_QSGMIIE_SERDES_AN_X1_CL37_ERRr_fields, 8942 #else 8943 0, 8944 #endif 8945 #endif 8946 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8947 PHYMOD_SYMBOL_FLAG_REGISTER, 8948 "AN_X1_CL37_ERRr", 8949 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8950 "AN_X1_TIMERS_CL37_ERROR", 8951 NULL, 8952 #endif 8953 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8954 0x0, /* 0 */ 8955 0, 8956 #endif 8957 }, 8958 { 8959 BCMI_QSGMIIE_SERDES_AN_X1_CL73_BRK_LNKr, 8960 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8961 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8962 BCMI_QSGMIIE_SERDES_AN_X1_CL73_BRK_LNKr_fields, 8963 #else 8964 0, 8965 #endif 8966 #endif 8967 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8968 PHYMOD_SYMBOL_FLAG_REGISTER, 8969 "AN_X1_CL73_BRK_LNKr", 8970 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8971 "AN_X1_TIMERS_CL73_BREAK_LINK", 8972 NULL, 8973 #endif 8974 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8975 0x0, /* 0 */ 8976 0, 8977 #endif 8978 }, 8979 { 8980 BCMI_QSGMIIE_SERDES_AN_X1_CL73_ERRr, 8981 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8982 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 8983 BCMI_QSGMIIE_SERDES_AN_X1_CL73_ERRr_fields, 8984 #else 8985 0, 8986 #endif 8987 #endif 8988 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8989 PHYMOD_SYMBOL_FLAG_REGISTER, 8990 "AN_X1_CL73_ERRr", 8991 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8992 "AN_X1_TIMERS_CL73_ERROR", 8993 NULL, 8994 #endif 8995 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8996 0x0, /* 0 */ 8997 0, 8998 #endif 8999 }, 9000 { 9001 BCMI_QSGMIIE_SERDES_AN_X1_CL73_DME_LOCKr, 9002 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9003 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9004 BCMI_QSGMIIE_SERDES_AN_X1_CL73_DME_LOCKr_fields, 9005 #else 9006 0, 9007 #endif 9008 #endif 9009 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9010 PHYMOD_SYMBOL_FLAG_REGISTER, 9011 "AN_X1_CL73_DME_LOCKr", 9012 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9013 "AN_X1_TIMERS_CL73_DME_LOCK", 9014 NULL, 9015 #endif 9016 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9017 0x0, /* 0 */ 9018 0, 9019 #endif 9020 }, 9021 { 9022 BCMI_QSGMIIE_SERDES_AN_X1_LNK_UPr, 9023 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9024 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9025 BCMI_QSGMIIE_SERDES_AN_X1_LNK_UPr_fields, 9026 #else 9027 0, 9028 #endif 9029 #endif 9030 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9031 PHYMOD_SYMBOL_FLAG_REGISTER, 9032 "AN_X1_LNK_UPr", 9033 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9034 "AN_X1_TIMERS_LINK_UP", 9035 NULL, 9036 #endif 9037 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9038 0x0, /* 0 */ 9039 0, 9040 #endif 9041 }, 9042 { 9043 BCMI_QSGMIIE_SERDES_AN_X1_LNK_FAIL_INHBT_TMR_CL72r, 9044 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9045 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9046 BCMI_QSGMIIE_SERDES_AN_X1_LNK_FAIL_INHBT_TMR_CL72r_fields, 9047 #else 9048 0, 9049 #endif 9050 #endif 9051 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9052 PHYMOD_SYMBOL_FLAG_REGISTER, 9053 "AN_X1_LNK_FAIL_INHBT_TMR_CL72r", 9054 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9055 "AN_X1_TIMERS_LINK_FAIL_INHIBIT_TIMER_CL72", 9056 NULL, 9057 #endif 9058 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9059 0x0, /* 0 */ 9060 0, 9061 #endif 9062 }, 9063 { 9064 BCMI_QSGMIIE_SERDES_AN_X1_LNK_FAIL_INHBT_TMR_NOT_CL72r, 9065 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9066 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9067 BCMI_QSGMIIE_SERDES_AN_X1_LNK_FAIL_INHBT_TMR_NOT_CL72r_fields, 9068 #else 9069 0, 9070 #endif 9071 #endif 9072 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9073 PHYMOD_SYMBOL_FLAG_REGISTER, 9074 "AN_X1_LNK_FAIL_INHBT_TMR_NOT_CL72r", 9075 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9076 "AN_X1_TIMERS_LINK_FAIL_INHIBIT_TIMER_NOT_CL72", 9077 NULL, 9078 #endif 9079 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9080 0x0, /* 0 */ 9081 0, 9082 #endif 9083 }, 9084 { 9085 BCMI_QSGMIIE_SERDES_AN_X1_PD_SD_TMRr, 9086 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9087 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9088 BCMI_QSGMIIE_SERDES_AN_X1_PD_SD_TMRr_fields, 9089 #else 9090 0, 9091 #endif 9092 #endif 9093 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9094 PHYMOD_SYMBOL_FLAG_REGISTER, 9095 "AN_X1_PD_SD_TMRr", 9096 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9097 "AN_X1_TIMERS_PD_SD_TIMER", 9098 NULL, 9099 #endif 9100 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9101 0x0, /* 0 */ 9102 0, 9103 #endif 9104 }, 9105 { 9106 BCMI_QSGMIIE_SERDES_AN_X1_CL37_SYNC_STS_FILTER_TMRr, 9107 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9108 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9109 BCMI_QSGMIIE_SERDES_AN_X1_CL37_SYNC_STS_FILTER_TMRr_fields, 9110 #else 9111 0, 9112 #endif 9113 #endif 9114 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9115 PHYMOD_SYMBOL_FLAG_REGISTER, 9116 "AN_X1_CL37_SYNC_STS_FILTER_TMRr", 9117 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9118 "AN_X1_TIMERS_CL37_SYNC_STATUS_FILTER_TIMER", 9119 NULL, 9120 #endif 9121 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9122 0x2, /* 2 */ 9123 0, 9124 #endif 9125 }, 9126 { 9127 BCMI_QSGMIIE_SERDES_AN_X1_PD_TO_CL37_LNK_WAIT_TMRr, 9128 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9129 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9130 BCMI_QSGMIIE_SERDES_AN_X1_PD_TO_CL37_LNK_WAIT_TMRr_fields, 9131 #else 9132 0, 9133 #endif 9134 #endif 9135 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9136 PHYMOD_SYMBOL_FLAG_REGISTER, 9137 "AN_X1_PD_TO_CL37_LNK_WAIT_TMRr", 9138 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9139 "AN_X1_TIMERS_PD_TO_CL37_LINK_WAIT_TIMER", 9140 NULL, 9141 #endif 9142 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9143 0x6b, /* 107 */ 9144 0, 9145 #endif 9146 }, 9147 { 9148 BCMI_QSGMIIE_SERDES_AN_X1_IGNORE_LNK_TMRr, 9149 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9150 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9151 BCMI_QSGMIIE_SERDES_AN_X1_IGNORE_LNK_TMRr_fields, 9152 #else 9153 0, 9154 #endif 9155 #endif 9156 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9157 PHYMOD_SYMBOL_FLAG_REGISTER, 9158 "AN_X1_IGNORE_LNK_TMRr", 9159 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9160 "AN_X1_TIMERS_IGNORE_LINK_TIMER", 9161 NULL, 9162 #endif 9163 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9164 0x0, /* 0 */ 9165 0, 9166 #endif 9167 }, 9168 { 9169 BCMI_QSGMIIE_SERDES_AN_X1_DME_PAGE_TMRr, 9170 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9171 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9172 BCMI_QSGMIIE_SERDES_AN_X1_DME_PAGE_TMRr_fields, 9173 #else 9174 0, 9175 #endif 9176 #endif 9177 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9178 PHYMOD_SYMBOL_FLAG_REGISTER, 9179 "AN_X1_DME_PAGE_TMRr", 9180 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9181 "AN_X1_TIMERS_DME_PAGE_TIMER", 9182 NULL, 9183 #endif 9184 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9185 0x3b5f, /* 15199 */ 9186 0, 9187 #endif 9188 }, 9189 { 9190 BCMI_QSGMIIE_SERDES_AN_X1_SGMII_CL73_TMR_TYPEr, 9191 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9192 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9193 BCMI_QSGMIIE_SERDES_AN_X1_SGMII_CL73_TMR_TYPEr_fields, 9194 #else 9195 0, 9196 #endif 9197 #endif 9198 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9199 PHYMOD_SYMBOL_FLAG_REGISTER, 9200 "AN_X1_SGMII_CL73_TMR_TYPEr", 9201 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9202 "AN_X1_TIMERS_SGMII_CL73_TIMER_TYPE", 9203 NULL, 9204 #endif 9205 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9206 0x6b, /* 107 */ 9207 0, 9208 #endif 9209 }, 9210 { 9211 BCMI_QSGMIIE_SERDES_SC_X1_PLL_LOCK_TMRr, 9212 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9213 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9214 BCMI_QSGMIIE_SERDES_SC_X1_PLL_LOCK_TMRr_fields, 9215 #else 9216 0, 9217 #endif 9218 #endif 9219 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9220 PHYMOD_SYMBOL_FLAG_REGISTER, 9221 "SC_X1_PLL_LOCK_TMRr", 9222 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9223 "SC_X1_CONTROL_PLL_LOCK_TIMER", 9224 NULL, 9225 #endif 9226 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9227 0x0, /* 0 */ 9228 0, 9229 #endif 9230 }, 9231 { 9232 BCMI_QSGMIIE_SERDES_SC_X1_PMD_LOCK_TMRr, 9233 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9234 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9235 BCMI_QSGMIIE_SERDES_SC_X1_PMD_LOCK_TMRr_fields, 9236 #else 9237 0, 9238 #endif 9239 #endif 9240 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9241 PHYMOD_SYMBOL_FLAG_REGISTER, 9242 "SC_X1_PMD_LOCK_TMRr", 9243 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9244 "SC_X1_CONTROL_PMD_LOCK_TIMER", 9245 NULL, 9246 #endif 9247 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9248 0x0, /* 0 */ 9249 0, 9250 #endif 9251 }, 9252 { 9253 BCMI_QSGMIIE_SERDES_SC_X1_PIPE_RST_CNTr, 9254 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9255 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9256 BCMI_QSGMIIE_SERDES_SC_X1_PIPE_RST_CNTr_fields, 9257 #else 9258 0, 9259 #endif 9260 #endif 9261 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9262 PHYMOD_SYMBOL_FLAG_REGISTER, 9263 "SC_X1_PIPE_RST_CNTr", 9264 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9265 "SC_X1_CONTROL_PIPELINE_RESET_COUNT", 9266 NULL, 9267 #endif 9268 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9269 0xff, /* 255 */ 9270 0, 9271 #endif 9272 }, 9273 { 9274 BCMI_QSGMIIE_SERDES_SC_X1_TX_RST_CNTr, 9275 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9276 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9277 BCMI_QSGMIIE_SERDES_SC_X1_TX_RST_CNTr_fields, 9278 #else 9279 0, 9280 #endif 9281 #endif 9282 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9283 PHYMOD_SYMBOL_FLAG_REGISTER, 9284 "SC_X1_TX_RST_CNTr", 9285 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9286 "SC_X1_CONTROL_TX_RESET_COUNT", 9287 NULL, 9288 #endif 9289 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9290 0x2, /* 2 */ 9291 0, 9292 #endif 9293 }, 9294 { 9295 BCMI_QSGMIIE_SERDES_SC_X1_STSr, 9296 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9297 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9298 BCMI_QSGMIIE_SERDES_SC_X1_STSr_fields, 9299 #else 9300 0, 9301 #endif 9302 #endif 9303 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9304 PHYMOD_SYMBOL_FLAG_REGISTER, 9305 "SC_X1_STSr", 9306 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9307 "SC_X1_CONTROL_STATUS", 9308 NULL, 9309 #endif 9310 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9311 0x0, /* 0 */ 9312 0, 9313 #endif 9314 }, 9315 { 9316 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR0_SPDr, 9317 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9318 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9319 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR0_SPDr_fields, 9320 #else 9321 0, 9322 #endif 9323 #endif 9324 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9325 PHYMOD_SYMBOL_FLAG_REGISTER, 9326 "SC_X1_SPD_OVRR0_SPDr", 9327 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9328 "SC_X1_SPEED_OVERRIDE0_OVERRIDE_SPEED", 9329 NULL, 9330 #endif 9331 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9332 0xff00, /* 65280 */ 9333 0, 9334 #endif 9335 }, 9336 { 9337 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR0_0r, 9338 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9339 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9340 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR0_0r_fields, 9341 #else 9342 0, 9343 #endif 9344 #endif 9345 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9346 PHYMOD_SYMBOL_FLAG_REGISTER, 9347 "SC_X1_SPD_OVRR0_0r", 9348 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9349 "SC_X1_SPEED_OVERRIDE0_OVERRIDE_0", 9350 NULL, 9351 #endif 9352 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9353 0x0, /* 0 */ 9354 0, 9355 #endif 9356 }, 9357 { 9358 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR0_1r, 9359 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9360 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9361 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR0_1r_fields, 9362 #else 9363 0, 9364 #endif 9365 #endif 9366 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9367 PHYMOD_SYMBOL_FLAG_REGISTER, 9368 "SC_X1_SPD_OVRR0_1r", 9369 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9370 "SC_X1_SPEED_OVERRIDE0_OVERRIDE_1", 9371 NULL, 9372 #endif 9373 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9374 0x0, /* 0 */ 9375 0, 9376 #endif 9377 }, 9378 { 9379 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR0_2r, 9380 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9381 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9382 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR0_2r_fields, 9383 #else 9384 0, 9385 #endif 9386 #endif 9387 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9388 PHYMOD_SYMBOL_FLAG_REGISTER, 9389 "SC_X1_SPD_OVRR0_2r", 9390 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9391 "SC_X1_SPEED_OVERRIDE0_OVERRIDE_2", 9392 NULL, 9393 #endif 9394 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9395 0x400, /* 1024 */ 9396 0, 9397 #endif 9398 }, 9399 { 9400 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR0_3r, 9401 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9402 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9403 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR0_3r_fields, 9404 #else 9405 0, 9406 #endif 9407 #endif 9408 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9409 PHYMOD_SYMBOL_FLAG_REGISTER, 9410 "SC_X1_SPD_OVRR0_3r", 9411 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9412 "SC_X1_SPEED_OVERRIDE0_OVERRIDE_3", 9413 NULL, 9414 #endif 9415 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9416 0x0, /* 0 */ 9417 0, 9418 #endif 9419 }, 9420 { 9421 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR0_4r, 9422 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9423 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9424 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR0_4r_fields, 9425 #else 9426 0, 9427 #endif 9428 #endif 9429 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9430 PHYMOD_SYMBOL_FLAG_REGISTER, 9431 "SC_X1_SPD_OVRR0_4r", 9432 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9433 "SC_X1_SPEED_OVERRIDE0_OVERRIDE_4", 9434 NULL, 9435 #endif 9436 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9437 0x0, /* 0 */ 9438 0, 9439 #endif 9440 }, 9441 { 9442 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR0_5r, 9443 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9444 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9445 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR0_5r_fields, 9446 #else 9447 0, 9448 #endif 9449 #endif 9450 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9451 PHYMOD_SYMBOL_FLAG_REGISTER, 9452 "SC_X1_SPD_OVRR0_5r", 9453 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9454 "SC_X1_SPEED_OVERRIDE0_OVERRIDE_5", 9455 NULL, 9456 #endif 9457 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9458 0x0, /* 0 */ 9459 0, 9460 #endif 9461 }, 9462 { 9463 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR0_6r, 9464 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9465 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9466 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR0_6r_fields, 9467 #else 9468 0, 9469 #endif 9470 #endif 9471 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9472 PHYMOD_SYMBOL_FLAG_REGISTER, 9473 "SC_X1_SPD_OVRR0_6r", 9474 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9475 "SC_X1_SPEED_OVERRIDE0_OVERRIDE_6", 9476 NULL, 9477 #endif 9478 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9479 0x0, /* 0 */ 9480 0, 9481 #endif 9482 }, 9483 { 9484 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR0_7r, 9485 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9486 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9487 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR0_7r_fields, 9488 #else 9489 0, 9490 #endif 9491 #endif 9492 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9493 PHYMOD_SYMBOL_FLAG_REGISTER, 9494 "SC_X1_SPD_OVRR0_7r", 9495 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9496 "SC_X1_SPEED_OVERRIDE0_OVERRIDE_7", 9497 NULL, 9498 #endif 9499 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9500 0x0, /* 0 */ 9501 0, 9502 #endif 9503 }, 9504 { 9505 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR0_8r, 9506 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9507 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9508 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR0_8r_fields, 9509 #else 9510 0, 9511 #endif 9512 #endif 9513 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9514 PHYMOD_SYMBOL_FLAG_REGISTER, 9515 "SC_X1_SPD_OVRR0_8r", 9516 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9517 "SC_X1_SPEED_OVERRIDE0_OVERRIDE_8", 9518 NULL, 9519 #endif 9520 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9521 0x0, /* 0 */ 9522 0, 9523 #endif 9524 }, 9525 { 9526 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR1_SPDr, 9527 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9528 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9529 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR1_SPDr_fields, 9530 #else 9531 0, 9532 #endif 9533 #endif 9534 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9535 PHYMOD_SYMBOL_FLAG_REGISTER, 9536 "SC_X1_SPD_OVRR1_SPDr", 9537 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9538 "SC_X1_SPEED_OVERRIDE1_OVERRIDE_SPEED", 9539 NULL, 9540 #endif 9541 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9542 0xff00, /* 65280 */ 9543 0, 9544 #endif 9545 }, 9546 { 9547 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR1_0r, 9548 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9549 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9550 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR1_0r_fields, 9551 #else 9552 0, 9553 #endif 9554 #endif 9555 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9556 PHYMOD_SYMBOL_FLAG_REGISTER, 9557 "SC_X1_SPD_OVRR1_0r", 9558 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9559 "SC_X1_SPEED_OVERRIDE1_OVERRIDE_0", 9560 NULL, 9561 #endif 9562 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9563 0x0, /* 0 */ 9564 0, 9565 #endif 9566 }, 9567 { 9568 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR1_1r, 9569 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9570 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9571 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR1_1r_fields, 9572 #else 9573 0, 9574 #endif 9575 #endif 9576 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9577 PHYMOD_SYMBOL_FLAG_REGISTER, 9578 "SC_X1_SPD_OVRR1_1r", 9579 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9580 "SC_X1_SPEED_OVERRIDE1_OVERRIDE_1", 9581 NULL, 9582 #endif 9583 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9584 0x0, /* 0 */ 9585 0, 9586 #endif 9587 }, 9588 { 9589 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR1_2r, 9590 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9591 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9592 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR1_2r_fields, 9593 #else 9594 0, 9595 #endif 9596 #endif 9597 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9598 PHYMOD_SYMBOL_FLAG_REGISTER, 9599 "SC_X1_SPD_OVRR1_2r", 9600 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9601 "SC_X1_SPEED_OVERRIDE1_OVERRIDE_2", 9602 NULL, 9603 #endif 9604 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9605 0x400, /* 1024 */ 9606 0, 9607 #endif 9608 }, 9609 { 9610 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR1_3r, 9611 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9612 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9613 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR1_3r_fields, 9614 #else 9615 0, 9616 #endif 9617 #endif 9618 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9619 PHYMOD_SYMBOL_FLAG_REGISTER, 9620 "SC_X1_SPD_OVRR1_3r", 9621 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9622 "SC_X1_SPEED_OVERRIDE1_OVERRIDE_3", 9623 NULL, 9624 #endif 9625 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9626 0x0, /* 0 */ 9627 0, 9628 #endif 9629 }, 9630 { 9631 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR1_4r, 9632 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9633 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9634 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR1_4r_fields, 9635 #else 9636 0, 9637 #endif 9638 #endif 9639 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9640 PHYMOD_SYMBOL_FLAG_REGISTER, 9641 "SC_X1_SPD_OVRR1_4r", 9642 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9643 "SC_X1_SPEED_OVERRIDE1_OVERRIDE_4", 9644 NULL, 9645 #endif 9646 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9647 0x0, /* 0 */ 9648 0, 9649 #endif 9650 }, 9651 { 9652 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR1_5r, 9653 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9654 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9655 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR1_5r_fields, 9656 #else 9657 0, 9658 #endif 9659 #endif 9660 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9661 PHYMOD_SYMBOL_FLAG_REGISTER, 9662 "SC_X1_SPD_OVRR1_5r", 9663 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9664 "SC_X1_SPEED_OVERRIDE1_OVERRIDE_5", 9665 NULL, 9666 #endif 9667 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9668 0x0, /* 0 */ 9669 0, 9670 #endif 9671 }, 9672 { 9673 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR1_6r, 9674 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9675 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9676 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR1_6r_fields, 9677 #else 9678 0, 9679 #endif 9680 #endif 9681 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9682 PHYMOD_SYMBOL_FLAG_REGISTER, 9683 "SC_X1_SPD_OVRR1_6r", 9684 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9685 "SC_X1_SPEED_OVERRIDE1_OVERRIDE_6", 9686 NULL, 9687 #endif 9688 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9689 0x0, /* 0 */ 9690 0, 9691 #endif 9692 }, 9693 { 9694 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR1_7r, 9695 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9696 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9697 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR1_7r_fields, 9698 #else 9699 0, 9700 #endif 9701 #endif 9702 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9703 PHYMOD_SYMBOL_FLAG_REGISTER, 9704 "SC_X1_SPD_OVRR1_7r", 9705 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9706 "SC_X1_SPEED_OVERRIDE1_OVERRIDE_7", 9707 NULL, 9708 #endif 9709 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9710 0x0, /* 0 */ 9711 0, 9712 #endif 9713 }, 9714 { 9715 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR1_8r, 9716 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9717 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9718 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR1_8r_fields, 9719 #else 9720 0, 9721 #endif 9722 #endif 9723 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9724 PHYMOD_SYMBOL_FLAG_REGISTER, 9725 "SC_X1_SPD_OVRR1_8r", 9726 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9727 "SC_X1_SPEED_OVERRIDE1_OVERRIDE_8", 9728 NULL, 9729 #endif 9730 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9731 0x0, /* 0 */ 9732 0, 9733 #endif 9734 }, 9735 { 9736 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR2_SPDr, 9737 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9738 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9739 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR2_SPDr_fields, 9740 #else 9741 0, 9742 #endif 9743 #endif 9744 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9745 PHYMOD_SYMBOL_FLAG_REGISTER, 9746 "SC_X1_SPD_OVRR2_SPDr", 9747 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9748 "SC_X1_SPEED_OVERRIDE2_OVERRIDE_SPEED", 9749 NULL, 9750 #endif 9751 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9752 0xff00, /* 65280 */ 9753 0, 9754 #endif 9755 }, 9756 { 9757 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR2_0r, 9758 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9759 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9760 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR2_0r_fields, 9761 #else 9762 0, 9763 #endif 9764 #endif 9765 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9766 PHYMOD_SYMBOL_FLAG_REGISTER, 9767 "SC_X1_SPD_OVRR2_0r", 9768 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9769 "SC_X1_SPEED_OVERRIDE2_OVERRIDE_0", 9770 NULL, 9771 #endif 9772 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9773 0x0, /* 0 */ 9774 0, 9775 #endif 9776 }, 9777 { 9778 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR2_1r, 9779 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9780 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9781 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR2_1r_fields, 9782 #else 9783 0, 9784 #endif 9785 #endif 9786 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9787 PHYMOD_SYMBOL_FLAG_REGISTER, 9788 "SC_X1_SPD_OVRR2_1r", 9789 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9790 "SC_X1_SPEED_OVERRIDE2_OVERRIDE_1", 9791 NULL, 9792 #endif 9793 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9794 0x0, /* 0 */ 9795 0, 9796 #endif 9797 }, 9798 { 9799 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR2_2r, 9800 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9801 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9802 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR2_2r_fields, 9803 #else 9804 0, 9805 #endif 9806 #endif 9807 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9808 PHYMOD_SYMBOL_FLAG_REGISTER, 9809 "SC_X1_SPD_OVRR2_2r", 9810 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9811 "SC_X1_SPEED_OVERRIDE2_OVERRIDE_2", 9812 NULL, 9813 #endif 9814 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9815 0x400, /* 1024 */ 9816 0, 9817 #endif 9818 }, 9819 { 9820 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR2_3r, 9821 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9822 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9823 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR2_3r_fields, 9824 #else 9825 0, 9826 #endif 9827 #endif 9828 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9829 PHYMOD_SYMBOL_FLAG_REGISTER, 9830 "SC_X1_SPD_OVRR2_3r", 9831 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9832 "SC_X1_SPEED_OVERRIDE2_OVERRIDE_3", 9833 NULL, 9834 #endif 9835 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9836 0x0, /* 0 */ 9837 0, 9838 #endif 9839 }, 9840 { 9841 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR2_4r, 9842 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9843 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9844 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR2_4r_fields, 9845 #else 9846 0, 9847 #endif 9848 #endif 9849 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9850 PHYMOD_SYMBOL_FLAG_REGISTER, 9851 "SC_X1_SPD_OVRR2_4r", 9852 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9853 "SC_X1_SPEED_OVERRIDE2_OVERRIDE_4", 9854 NULL, 9855 #endif 9856 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9857 0x0, /* 0 */ 9858 0, 9859 #endif 9860 }, 9861 { 9862 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR2_5r, 9863 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9864 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9865 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR2_5r_fields, 9866 #else 9867 0, 9868 #endif 9869 #endif 9870 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9871 PHYMOD_SYMBOL_FLAG_REGISTER, 9872 "SC_X1_SPD_OVRR2_5r", 9873 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9874 "SC_X1_SPEED_OVERRIDE2_OVERRIDE_5", 9875 NULL, 9876 #endif 9877 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9878 0x0, /* 0 */ 9879 0, 9880 #endif 9881 }, 9882 { 9883 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR2_6r, 9884 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9885 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9886 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR2_6r_fields, 9887 #else 9888 0, 9889 #endif 9890 #endif 9891 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9892 PHYMOD_SYMBOL_FLAG_REGISTER, 9893 "SC_X1_SPD_OVRR2_6r", 9894 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9895 "SC_X1_SPEED_OVERRIDE2_OVERRIDE_6", 9896 NULL, 9897 #endif 9898 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9899 0x0, /* 0 */ 9900 0, 9901 #endif 9902 }, 9903 { 9904 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR2_7r, 9905 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9906 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9907 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR2_7r_fields, 9908 #else 9909 0, 9910 #endif 9911 #endif 9912 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9913 PHYMOD_SYMBOL_FLAG_REGISTER, 9914 "SC_X1_SPD_OVRR2_7r", 9915 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9916 "SC_X1_SPEED_OVERRIDE2_OVERRIDE_7", 9917 NULL, 9918 #endif 9919 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9920 0x0, /* 0 */ 9921 0, 9922 #endif 9923 }, 9924 { 9925 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR2_8r, 9926 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9927 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9928 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR2_8r_fields, 9929 #else 9930 0, 9931 #endif 9932 #endif 9933 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9934 PHYMOD_SYMBOL_FLAG_REGISTER, 9935 "SC_X1_SPD_OVRR2_8r", 9936 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9937 "SC_X1_SPEED_OVERRIDE2_OVERRIDE_8", 9938 NULL, 9939 #endif 9940 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9941 0x0, /* 0 */ 9942 0, 9943 #endif 9944 }, 9945 { 9946 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR3_SPDr, 9947 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9948 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9949 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR3_SPDr_fields, 9950 #else 9951 0, 9952 #endif 9953 #endif 9954 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9955 PHYMOD_SYMBOL_FLAG_REGISTER, 9956 "SC_X1_SPD_OVRR3_SPDr", 9957 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9958 "SC_X1_SPEED_OVERRIDE3_OVERRIDE_SPEED", 9959 NULL, 9960 #endif 9961 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9962 0xff00, /* 65280 */ 9963 0, 9964 #endif 9965 }, 9966 { 9967 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR3_0r, 9968 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9969 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9970 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR3_0r_fields, 9971 #else 9972 0, 9973 #endif 9974 #endif 9975 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9976 PHYMOD_SYMBOL_FLAG_REGISTER, 9977 "SC_X1_SPD_OVRR3_0r", 9978 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9979 "SC_X1_SPEED_OVERRIDE3_OVERRIDE_0", 9980 NULL, 9981 #endif 9982 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9983 0x0, /* 0 */ 9984 0, 9985 #endif 9986 }, 9987 { 9988 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR3_1r, 9989 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9990 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 9991 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR3_1r_fields, 9992 #else 9993 0, 9994 #endif 9995 #endif 9996 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9997 PHYMOD_SYMBOL_FLAG_REGISTER, 9998 "SC_X1_SPD_OVRR3_1r", 9999 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10000 "SC_X1_SPEED_OVERRIDE3_OVERRIDE_1", 10001 NULL, 10002 #endif 10003 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10004 0x0, /* 0 */ 10005 0, 10006 #endif 10007 }, 10008 { 10009 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR3_2r, 10010 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10011 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10012 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR3_2r_fields, 10013 #else 10014 0, 10015 #endif 10016 #endif 10017 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10018 PHYMOD_SYMBOL_FLAG_REGISTER, 10019 "SC_X1_SPD_OVRR3_2r", 10020 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10021 "SC_X1_SPEED_OVERRIDE3_OVERRIDE_2", 10022 NULL, 10023 #endif 10024 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10025 0x400, /* 1024 */ 10026 0, 10027 #endif 10028 }, 10029 { 10030 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR3_3r, 10031 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10032 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10033 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR3_3r_fields, 10034 #else 10035 0, 10036 #endif 10037 #endif 10038 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10039 PHYMOD_SYMBOL_FLAG_REGISTER, 10040 "SC_X1_SPD_OVRR3_3r", 10041 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10042 "SC_X1_SPEED_OVERRIDE3_OVERRIDE_3", 10043 NULL, 10044 #endif 10045 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10046 0x0, /* 0 */ 10047 0, 10048 #endif 10049 }, 10050 { 10051 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR3_4r, 10052 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10053 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10054 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR3_4r_fields, 10055 #else 10056 0, 10057 #endif 10058 #endif 10059 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10060 PHYMOD_SYMBOL_FLAG_REGISTER, 10061 "SC_X1_SPD_OVRR3_4r", 10062 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10063 "SC_X1_SPEED_OVERRIDE3_OVERRIDE_4", 10064 NULL, 10065 #endif 10066 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10067 0x0, /* 0 */ 10068 0, 10069 #endif 10070 }, 10071 { 10072 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR3_5r, 10073 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10074 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10075 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR3_5r_fields, 10076 #else 10077 0, 10078 #endif 10079 #endif 10080 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10081 PHYMOD_SYMBOL_FLAG_REGISTER, 10082 "SC_X1_SPD_OVRR3_5r", 10083 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10084 "SC_X1_SPEED_OVERRIDE3_OVERRIDE_5", 10085 NULL, 10086 #endif 10087 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10088 0x0, /* 0 */ 10089 0, 10090 #endif 10091 }, 10092 { 10093 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR3_6r, 10094 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10095 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10096 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR3_6r_fields, 10097 #else 10098 0, 10099 #endif 10100 #endif 10101 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10102 PHYMOD_SYMBOL_FLAG_REGISTER, 10103 "SC_X1_SPD_OVRR3_6r", 10104 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10105 "SC_X1_SPEED_OVERRIDE3_OVERRIDE_6", 10106 NULL, 10107 #endif 10108 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10109 0x0, /* 0 */ 10110 0, 10111 #endif 10112 }, 10113 { 10114 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR3_7r, 10115 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10116 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10117 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR3_7r_fields, 10118 #else 10119 0, 10120 #endif 10121 #endif 10122 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10123 PHYMOD_SYMBOL_FLAG_REGISTER, 10124 "SC_X1_SPD_OVRR3_7r", 10125 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10126 "SC_X1_SPEED_OVERRIDE3_OVERRIDE_7", 10127 NULL, 10128 #endif 10129 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10130 0x0, /* 0 */ 10131 0, 10132 #endif 10133 }, 10134 { 10135 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR3_8r, 10136 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10137 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10138 BCMI_QSGMIIE_SERDES_SC_X1_SPD_OVRR3_8r_fields, 10139 #else 10140 0, 10141 #endif 10142 #endif 10143 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10144 PHYMOD_SYMBOL_FLAG_REGISTER, 10145 "SC_X1_SPD_OVRR3_8r", 10146 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10147 "SC_X1_SPEED_OVERRIDE3_OVERRIDE_8", 10148 NULL, 10149 #endif 10150 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10151 0x0, /* 0 */ 10152 0, 10153 #endif 10154 }, 10155 { 10156 BCMI_QSGMIIE_SERDES_TX_X2_MLD_SWP_CNTr, 10157 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10158 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10159 BCMI_QSGMIIE_SERDES_TX_X2_MLD_SWP_CNTr_fields, 10160 #else 10161 0, 10162 #endif 10163 #endif 10164 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10165 PHYMOD_SYMBOL_FLAG_REGISTER, 10166 "TX_X2_MLD_SWP_CNTr", 10167 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10168 "TX_X2_CONTROL0_MLD_SWAP_COUNT", 10169 NULL, 10170 #endif 10171 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10172 0x7ffe, /* 32766 */ 10173 0, 10174 #endif 10175 }, 10176 { 10177 BCMI_QSGMIIE_SERDES_TX_X2_CL48_0r, 10178 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10179 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10180 BCMI_QSGMIIE_SERDES_TX_X2_CL48_0r_fields, 10181 #else 10182 0, 10183 #endif 10184 #endif 10185 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10186 PHYMOD_SYMBOL_FLAG_REGISTER, 10187 "TX_X2_CL48_0r", 10188 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10189 "TX_X2_CONTROL0_CL48_0", 10190 NULL, 10191 #endif 10192 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10193 0x8000, /* 32768 */ 10194 0, 10195 #endif 10196 }, 10197 { 10198 BCMI_QSGMIIE_SERDES_TX_X2_CL82_0r, 10199 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10200 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10201 BCMI_QSGMIIE_SERDES_TX_X2_CL82_0r_fields, 10202 #else 10203 0, 10204 #endif 10205 #endif 10206 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10207 PHYMOD_SYMBOL_FLAG_REGISTER, 10208 "TX_X2_CL82_0r", 10209 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10210 "TX_X2_CONTROL0_CL82_0", 10211 NULL, 10212 #endif 10213 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10214 0x70, /* 112 */ 10215 0, 10216 #endif 10217 }, 10218 { 10219 BCMI_QSGMIIE_SERDES_TX_X2_BRCM_MODEr, 10220 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10221 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10222 BCMI_QSGMIIE_SERDES_TX_X2_BRCM_MODEr_fields, 10223 #else 10224 0, 10225 #endif 10226 #endif 10227 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10228 PHYMOD_SYMBOL_FLAG_REGISTER, 10229 "TX_X2_BRCM_MODEr", 10230 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10231 "TX_X2_CONTROL0_BRCM_MODE", 10232 NULL, 10233 #endif 10234 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10235 0x64, /* 100 */ 10236 0, 10237 #endif 10238 }, 10239 { 10240 BCMI_QSGMIIE_SERDES_TX_X2_CL82_TX_STS0r, 10241 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10242 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10243 BCMI_QSGMIIE_SERDES_TX_X2_CL82_TX_STS0r_fields, 10244 #else 10245 0, 10246 #endif 10247 #endif 10248 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10249 PHYMOD_SYMBOL_FLAG_REGISTER, 10250 "TX_X2_CL82_TX_STS0r", 10251 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10252 "TX_X2_STATUS0_CL82_TX_STATUS_0", 10253 NULL, 10254 #endif 10255 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10256 0x0, /* 0 */ 10257 0, 10258 #endif 10259 }, 10260 { 10261 BCMI_QSGMIIE_SERDES_RX_X2_QRSVD0r, 10262 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10263 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10264 BCMI_QSGMIIE_SERDES_RX_X2_QRSVD0r_fields, 10265 #else 10266 0, 10267 #endif 10268 #endif 10269 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10270 PHYMOD_SYMBOL_FLAG_REGISTER, 10271 "RX_X2_QRSVD0r", 10272 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10273 "RX_X2_CONTROL0_QRSVD_0", 10274 NULL, 10275 #endif 10276 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10277 0x0, /* 0 */ 10278 0, 10279 #endif 10280 }, 10281 { 10282 BCMI_QSGMIIE_SERDES_RX_X2_QRSVD1r, 10283 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10284 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10285 BCMI_QSGMIIE_SERDES_RX_X2_QRSVD1r_fields, 10286 #else 10287 0, 10288 #endif 10289 #endif 10290 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10291 PHYMOD_SYMBOL_FLAG_REGISTER, 10292 "RX_X2_QRSVD1r", 10293 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10294 "RX_X2_CONTROL0_QRSVD_1", 10295 NULL, 10296 #endif 10297 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10298 0x0, /* 0 */ 10299 0, 10300 #endif 10301 }, 10302 { 10303 BCMI_QSGMIIE_SERDES_RX_X2_QRSVD2r, 10304 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10305 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10306 BCMI_QSGMIIE_SERDES_RX_X2_QRSVD2r_fields, 10307 #else 10308 0, 10309 #endif 10310 #endif 10311 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10312 PHYMOD_SYMBOL_FLAG_REGISTER, 10313 "RX_X2_QRSVD2r", 10314 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10315 "RX_X2_CONTROL0_QRSVD_2", 10316 NULL, 10317 #endif 10318 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10319 0x0, /* 0 */ 10320 0, 10321 #endif 10322 }, 10323 { 10324 BCMI_QSGMIIE_SERDES_RX_X2_MISC0r, 10325 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10326 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10327 BCMI_QSGMIIE_SERDES_RX_X2_MISC0r_fields, 10328 #else 10329 0, 10330 #endif 10331 #endif 10332 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10333 PHYMOD_SYMBOL_FLAG_REGISTER, 10334 "RX_X2_MISC0r", 10335 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10336 "RX_X2_CONTROL0_MISC_0", 10337 NULL, 10338 #endif 10339 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10340 0x1400, /* 5120 */ 10341 0, 10342 #endif 10343 }, 10344 { 10345 BCMI_QSGMIIE_SERDES_RX_X2_MISC1r, 10346 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10347 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10348 BCMI_QSGMIIE_SERDES_RX_X2_MISC1r_fields, 10349 #else 10350 0, 10351 #endif 10352 #endif 10353 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10354 PHYMOD_SYMBOL_FLAG_REGISTER, 10355 "RX_X2_MISC1r", 10356 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10357 "RX_X2_CONTROL0_MISC_1", 10358 NULL, 10359 #endif 10360 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10361 0x30f, /* 783 */ 10362 0, 10363 #endif 10364 }, 10365 { 10366 BCMI_QSGMIIE_SERDES_RX_X2_SKEW_STS0r, 10367 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10368 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10369 BCMI_QSGMIIE_SERDES_RX_X2_SKEW_STS0r_fields, 10370 #else 10371 0, 10372 #endif 10373 #endif 10374 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10375 PHYMOD_SYMBOL_FLAG_REGISTER, 10376 "RX_X2_SKEW_STS0r", 10377 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10378 "RX_X2_STATUS0_SKEW_STATUS_0", 10379 NULL, 10380 #endif 10381 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10382 0x0, /* 0 */ 10383 0, 10384 #endif 10385 }, 10386 { 10387 BCMI_QSGMIIE_SERDES_RX_X2_SKEW_STS1r, 10388 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10389 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10390 BCMI_QSGMIIE_SERDES_RX_X2_SKEW_STS1r_fields, 10391 #else 10392 0, 10393 #endif 10394 #endif 10395 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10396 PHYMOD_SYMBOL_FLAG_REGISTER, 10397 "RX_X2_SKEW_STS1r", 10398 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10399 "RX_X2_STATUS0_SKEW_STATUS_1", 10400 NULL, 10401 #endif 10402 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10403 0x0, /* 0 */ 10404 0, 10405 #endif 10406 }, 10407 { 10408 BCMI_QSGMIIE_SERDES_CL82_RX_DECR_STSr, 10409 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10410 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10411 BCMI_QSGMIIE_SERDES_CL82_RX_DECR_STSr_fields, 10412 #else 10413 0, 10414 #endif 10415 #endif 10416 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10417 PHYMOD_SYMBOL_FLAG_REGISTER, 10418 "CL82_RX_DECR_STSr", 10419 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10420 "CL82_RX_DECODER_STATUS", 10421 NULL, 10422 #endif 10423 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10424 0x0, /* 0 */ 10425 0, 10426 #endif 10427 }, 10428 { 10429 BCMI_QSGMIIE_SERDES_CL82_RX_DESKEW_BER_STSr, 10430 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10431 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10432 BCMI_QSGMIIE_SERDES_CL82_RX_DESKEW_BER_STSr_fields, 10433 #else 10434 0, 10435 #endif 10436 #endif 10437 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10438 PHYMOD_SYMBOL_FLAG_REGISTER, 10439 "CL82_RX_DESKEW_BER_STSr", 10440 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10441 "CL82_RX_DESKEW_BER_STATUS", 10442 NULL, 10443 #endif 10444 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10445 0x0, /* 0 */ 10446 0, 10447 #endif 10448 }, 10449 { 10450 BCMI_QSGMIIE_SERDES_CL82_BER_HO_STSr, 10451 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10452 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10453 BCMI_QSGMIIE_SERDES_CL82_BER_HO_STSr_fields, 10454 #else 10455 0, 10456 #endif 10457 #endif 10458 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10459 PHYMOD_SYMBOL_FLAG_REGISTER, 10460 "CL82_BER_HO_STSr", 10461 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10462 "CL82_BER_HO_STATUS", 10463 NULL, 10464 #endif 10465 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10466 0x0, /* 0 */ 10467 0, 10468 #endif 10469 }, 10470 { 10471 BCMI_QSGMIIE_SERDES_CL82_PCS_ERRED_BLKS_HOr, 10472 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10473 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10474 BCMI_QSGMIIE_SERDES_CL82_PCS_ERRED_BLKS_HOr_fields, 10475 #else 10476 0, 10477 #endif 10478 #endif 10479 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10480 PHYMOD_SYMBOL_FLAG_REGISTER, 10481 "CL82_PCS_ERRED_BLKS_HOr", 10482 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10483 "CL82_PCS_ERRORED_BLOCKS_HO", 10484 NULL, 10485 #endif 10486 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10487 0x8000, /* 32768 */ 10488 0, 10489 #endif 10490 }, 10491 { 10492 BCMI_QSGMIIE_SERDES_PMD_X4_CTLr, 10493 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10494 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10495 BCMI_QSGMIIE_SERDES_PMD_X4_CTLr_fields, 10496 #else 10497 0, 10498 #endif 10499 #endif 10500 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10501 PHYMOD_SYMBOL_FLAG_REGISTER, 10502 "PMD_X4_CTLr", 10503 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10504 "PMD_X4_CONTROL", 10505 NULL, 10506 #endif 10507 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10508 0x0, /* 0 */ 10509 0, 10510 #endif 10511 }, 10512 { 10513 BCMI_QSGMIIE_SERDES_PMD_X4_MODEr, 10514 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10515 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10516 BCMI_QSGMIIE_SERDES_PMD_X4_MODEr_fields, 10517 #else 10518 0, 10519 #endif 10520 #endif 10521 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10522 PHYMOD_SYMBOL_FLAG_REGISTER, 10523 "PMD_X4_MODEr", 10524 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10525 NULL, 10526 NULL, 10527 #endif 10528 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10529 0x0, /* 0 */ 10530 0, 10531 #endif 10532 }, 10533 { 10534 BCMI_QSGMIIE_SERDES_PMD_X4_STSr, 10535 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10536 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10537 BCMI_QSGMIIE_SERDES_PMD_X4_STSr_fields, 10538 #else 10539 0, 10540 #endif 10541 #endif 10542 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10543 PHYMOD_SYMBOL_FLAG_REGISTER, 10544 "PMD_X4_STSr", 10545 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10546 "PMD_X4_STATUS", 10547 NULL, 10548 #endif 10549 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10550 0x0, /* 0 */ 10551 0, 10552 #endif 10553 }, 10554 { 10555 BCMI_QSGMIIE_SERDES_PMD_X4_LATCH_STSr, 10556 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10557 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10558 BCMI_QSGMIIE_SERDES_PMD_X4_LATCH_STSr_fields, 10559 #else 10560 0, 10561 #endif 10562 #endif 10563 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10564 PHYMOD_SYMBOL_FLAG_REGISTER, 10565 "PMD_X4_LATCH_STSr", 10566 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10567 "PMD_X4_LATCH_STATUS", 10568 NULL, 10569 #endif 10570 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10571 0x0, /* 0 */ 10572 0, 10573 #endif 10574 }, 10575 { 10576 BCMI_QSGMIIE_SERDES_PMD_X4_OVRRr, 10577 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10578 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10579 BCMI_QSGMIIE_SERDES_PMD_X4_OVRRr_fields, 10580 #else 10581 0, 10582 #endif 10583 #endif 10584 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10585 PHYMOD_SYMBOL_FLAG_REGISTER, 10586 "PMD_X4_OVRRr", 10587 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10588 "PMD_X4_OVERRIDE", 10589 NULL, 10590 #endif 10591 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10592 0x0, /* 0 */ 10593 0, 10594 #endif 10595 }, 10596 { 10597 BCMI_QSGMIIE_SERDES_PMD_X4_EEE_CTLr, 10598 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10599 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10600 BCMI_QSGMIIE_SERDES_PMD_X4_EEE_CTLr_fields, 10601 #else 10602 0, 10603 #endif 10604 #endif 10605 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10606 PHYMOD_SYMBOL_FLAG_REGISTER, 10607 "PMD_X4_EEE_CTLr", 10608 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10609 "PMD_X4_EEE_CONTROL", 10610 NULL, 10611 #endif 10612 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10613 0x0, /* 0 */ 10614 0, 10615 #endif 10616 }, 10617 { 10618 BCMI_QSGMIIE_SERDES_PMD_X4_EEE_STSr, 10619 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10620 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10621 BCMI_QSGMIIE_SERDES_PMD_X4_EEE_STSr_fields, 10622 #else 10623 0, 10624 #endif 10625 #endif 10626 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10627 PHYMOD_SYMBOL_FLAG_REGISTER, 10628 "PMD_X4_EEE_STSr", 10629 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10630 "PMD_X4_EEE_STATUS", 10631 NULL, 10632 #endif 10633 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10634 0x0, /* 0 */ 10635 0, 10636 #endif 10637 }, 10638 { 10639 BCMI_QSGMIIE_SERDES_PATGEN_TXPKTCNT_Ur, 10640 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10641 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10642 BCMI_QSGMIIE_SERDES_PATGEN_TXPKTCNT_Ur_fields, 10643 #else 10644 0, 10645 #endif 10646 #endif 10647 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10648 PHYMOD_SYMBOL_FLAG_REGISTER, 10649 "PATGEN_TXPKTCNT_Ur", 10650 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10651 "PATGEN1_TXPKTCNT_U", 10652 NULL, 10653 #endif 10654 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10655 0x0, /* 0 */ 10656 0, 10657 #endif 10658 }, 10659 { 10660 BCMI_QSGMIIE_SERDES_PATGEN_TXPKTCNT_Lr, 10661 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10662 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10663 BCMI_QSGMIIE_SERDES_PATGEN_TXPKTCNT_Lr_fields, 10664 #else 10665 0, 10666 #endif 10667 #endif 10668 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10669 PHYMOD_SYMBOL_FLAG_REGISTER, 10670 "PATGEN_TXPKTCNT_Lr", 10671 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10672 "PATGEN1_TXPKTCNT_L", 10673 NULL, 10674 #endif 10675 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10676 0x0, /* 0 */ 10677 0, 10678 #endif 10679 }, 10680 { 10681 BCMI_QSGMIIE_SERDES_PATGEN_RXPKTCNT_Ur, 10682 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10683 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10684 BCMI_QSGMIIE_SERDES_PATGEN_RXPKTCNT_Ur_fields, 10685 #else 10686 0, 10687 #endif 10688 #endif 10689 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10690 PHYMOD_SYMBOL_FLAG_REGISTER, 10691 "PATGEN_RXPKTCNT_Ur", 10692 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10693 "PATGEN1_RXPKTCNT_U", 10694 NULL, 10695 #endif 10696 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10697 0x0, /* 0 */ 10698 0, 10699 #endif 10700 }, 10701 { 10702 BCMI_QSGMIIE_SERDES_PATGEN_RXPKTCNT_Lr, 10703 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10704 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10705 BCMI_QSGMIIE_SERDES_PATGEN_RXPKTCNT_Lr_fields, 10706 #else 10707 0, 10708 #endif 10709 #endif 10710 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10711 PHYMOD_SYMBOL_FLAG_REGISTER, 10712 "PATGEN_RXPKTCNT_Lr", 10713 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10714 "PATGEN1_RXPKTCNT_L", 10715 NULL, 10716 #endif 10717 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10718 0x0, /* 0 */ 10719 0, 10720 #endif 10721 }, 10722 { 10723 BCMI_QSGMIIE_SERDES_SC_X4_CTLr, 10724 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10725 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10726 BCMI_QSGMIIE_SERDES_SC_X4_CTLr_fields, 10727 #else 10728 0, 10729 #endif 10730 #endif 10731 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10732 PHYMOD_SYMBOL_FLAG_REGISTER, 10733 "SC_X4_CTLr", 10734 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10735 "SC_X4_CONTROL_CONTROL", 10736 NULL, 10737 #endif 10738 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10739 0xff, /* 255 */ 10740 0, 10741 #endif 10742 }, 10743 { 10744 BCMI_QSGMIIE_SERDES_SC_X4_STSr, 10745 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10746 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10747 BCMI_QSGMIIE_SERDES_SC_X4_STSr_fields, 10748 #else 10749 0, 10750 #endif 10751 #endif 10752 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10753 PHYMOD_SYMBOL_FLAG_REGISTER, 10754 "SC_X4_STSr", 10755 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10756 "SC_X4_CONTROL_STATUS", 10757 NULL, 10758 #endif 10759 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10760 0x0, /* 0 */ 10761 0, 10762 #endif 10763 }, 10764 { 10765 BCMI_QSGMIIE_SERDES_SC_X4_ERRr, 10766 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10767 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10768 BCMI_QSGMIIE_SERDES_SC_X4_ERRr_fields, 10769 #else 10770 0, 10771 #endif 10772 #endif 10773 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10774 PHYMOD_SYMBOL_FLAG_REGISTER, 10775 "SC_X4_ERRr", 10776 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10777 "SC_X4_CONTROL_ERROR", 10778 NULL, 10779 #endif 10780 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10781 0x0, /* 0 */ 10782 0, 10783 #endif 10784 }, 10785 { 10786 BCMI_QSGMIIE_SERDES_SC_X4_DBGr, 10787 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10788 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10789 BCMI_QSGMIIE_SERDES_SC_X4_DBGr_fields, 10790 #else 10791 0, 10792 #endif 10793 #endif 10794 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10795 PHYMOD_SYMBOL_FLAG_REGISTER, 10796 "SC_X4_DBGr", 10797 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10798 "SC_X4_CONTROL_DEBUG", 10799 NULL, 10800 #endif 10801 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10802 0x8000, /* 32768 */ 10803 0, 10804 #endif 10805 }, 10806 { 10807 BCMI_QSGMIIE_SERDES_SC_X4_LN_NUM_OVRRr, 10808 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10809 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10810 BCMI_QSGMIIE_SERDES_SC_X4_LN_NUM_OVRRr_fields, 10811 #else 10812 0, 10813 #endif 10814 #endif 10815 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10816 PHYMOD_SYMBOL_FLAG_REGISTER, 10817 "SC_X4_LN_NUM_OVRRr", 10818 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10819 "SC_X4_CONTROL_LANE_NUM_OVERRIDE", 10820 NULL, 10821 #endif 10822 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10823 0x0, /* 0 */ 10824 0, 10825 #endif 10826 }, 10827 { 10828 BCMI_QSGMIIE_SERDES_SC_X4_BYPASSr, 10829 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10830 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10831 BCMI_QSGMIIE_SERDES_SC_X4_BYPASSr_fields, 10832 #else 10833 0, 10834 #endif 10835 #endif 10836 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10837 PHYMOD_SYMBOL_FLAG_REGISTER, 10838 "SC_X4_BYPASSr", 10839 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10840 "SC_X4_CONTROL_BYPASS", 10841 NULL, 10842 #endif 10843 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10844 0x0, /* 0 */ 10845 0, 10846 #endif 10847 }, 10848 { 10849 BCMI_QSGMIIE_SERDES_SC_X4_FLD_OVRR_EN0_TYPEr, 10850 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10851 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10852 BCMI_QSGMIIE_SERDES_SC_X4_FLD_OVRR_EN0_TYPEr_fields, 10853 #else 10854 0, 10855 #endif 10856 #endif 10857 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10858 PHYMOD_SYMBOL_FLAG_REGISTER, 10859 "SC_X4_FLD_OVRR_EN0_TYPEr", 10860 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10861 "SC_X4_FIELD_OVERRIDE_ENABLE_FIELD_OVERRIDE_ENABLE0_TYPE", 10862 NULL, 10863 #endif 10864 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10865 0x0, /* 0 */ 10866 0, 10867 #endif 10868 }, 10869 { 10870 BCMI_QSGMIIE_SERDES_SC_X4_FLD_OVRR_EN1_TYPEr, 10871 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10872 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10873 BCMI_QSGMIIE_SERDES_SC_X4_FLD_OVRR_EN1_TYPEr_fields, 10874 #else 10875 0, 10876 #endif 10877 #endif 10878 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10879 PHYMOD_SYMBOL_FLAG_REGISTER, 10880 "SC_X4_FLD_OVRR_EN1_TYPEr", 10881 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10882 "SC_X4_FIELD_OVERRIDE_ENABLE_FIELD_OVERRIDE_ENABLE1_TYPE", 10883 NULL, 10884 #endif 10885 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10886 0x0, /* 0 */ 10887 0, 10888 #endif 10889 }, 10890 { 10891 BCMI_QSGMIIE_SERDES_SC_X4_RSLVD_SPDr, 10892 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10893 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10894 BCMI_QSGMIIE_SERDES_SC_X4_RSLVD_SPDr_fields, 10895 #else 10896 0, 10897 #endif 10898 #endif 10899 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10900 PHYMOD_SYMBOL_FLAG_REGISTER, 10901 "SC_X4_RSLVD_SPDr", 10902 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10903 "SC_X4_FINAL_CONFIG_STATUS_RESOLVED_SPEED", 10904 NULL, 10905 #endif 10906 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10907 0xff00, /* 65280 */ 10908 0, 10909 #endif 10910 }, 10911 { 10912 BCMI_QSGMIIE_SERDES_SC_X4_RSLVD0r, 10913 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10914 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10915 BCMI_QSGMIIE_SERDES_SC_X4_RSLVD0r_fields, 10916 #else 10917 0, 10918 #endif 10919 #endif 10920 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10921 PHYMOD_SYMBOL_FLAG_REGISTER, 10922 "SC_X4_RSLVD0r", 10923 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10924 "SC_X4_FINAL_CONFIG_STATUS_RESOLVED_0", 10925 NULL, 10926 #endif 10927 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10928 0x0, /* 0 */ 10929 0, 10930 #endif 10931 }, 10932 { 10933 BCMI_QSGMIIE_SERDES_SC_X4_RSLVD1r, 10934 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10935 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10936 BCMI_QSGMIIE_SERDES_SC_X4_RSLVD1r_fields, 10937 #else 10938 0, 10939 #endif 10940 #endif 10941 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10942 PHYMOD_SYMBOL_FLAG_REGISTER, 10943 "SC_X4_RSLVD1r", 10944 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10945 "SC_X4_FINAL_CONFIG_STATUS_RESOLVED_1", 10946 NULL, 10947 #endif 10948 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10949 0x0, /* 0 */ 10950 0, 10951 #endif 10952 }, 10953 { 10954 BCMI_QSGMIIE_SERDES_SC_X4_RSLVD2r, 10955 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10956 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10957 BCMI_QSGMIIE_SERDES_SC_X4_RSLVD2r_fields, 10958 #else 10959 0, 10960 #endif 10961 #endif 10962 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10963 PHYMOD_SYMBOL_FLAG_REGISTER, 10964 "SC_X4_RSLVD2r", 10965 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10966 "SC_X4_FINAL_CONFIG_STATUS_RESOLVED_2", 10967 NULL, 10968 #endif 10969 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10970 0x400, /* 1024 */ 10971 0, 10972 #endif 10973 }, 10974 { 10975 BCMI_QSGMIIE_SERDES_SC_X4_RSLVD3r, 10976 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10977 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10978 BCMI_QSGMIIE_SERDES_SC_X4_RSLVD3r_fields, 10979 #else 10980 0, 10981 #endif 10982 #endif 10983 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10984 PHYMOD_SYMBOL_FLAG_REGISTER, 10985 "SC_X4_RSLVD3r", 10986 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10987 "SC_X4_FINAL_CONFIG_STATUS_RESOLVED_3", 10988 NULL, 10989 #endif 10990 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10991 0x0, /* 0 */ 10992 0, 10993 #endif 10994 }, 10995 { 10996 BCMI_QSGMIIE_SERDES_SC_X4_RSLVD4r, 10997 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10998 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 10999 BCMI_QSGMIIE_SERDES_SC_X4_RSLVD4r_fields, 11000 #else 11001 0, 11002 #endif 11003 #endif 11004 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11005 PHYMOD_SYMBOL_FLAG_REGISTER, 11006 "SC_X4_RSLVD4r", 11007 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11008 "SC_X4_FINAL_CONFIG_STATUS_RESOLVED_4", 11009 NULL, 11010 #endif 11011 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11012 0x0, /* 0 */ 11013 0, 11014 #endif 11015 }, 11016 { 11017 BCMI_QSGMIIE_SERDES_SC_X4_RSLVD5r, 11018 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11019 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11020 BCMI_QSGMIIE_SERDES_SC_X4_RSLVD5r_fields, 11021 #else 11022 0, 11023 #endif 11024 #endif 11025 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11026 PHYMOD_SYMBOL_FLAG_REGISTER, 11027 "SC_X4_RSLVD5r", 11028 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11029 "SC_X4_FINAL_CONFIG_STATUS_RESOLVED_5", 11030 NULL, 11031 #endif 11032 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11033 0x0, /* 0 */ 11034 0, 11035 #endif 11036 }, 11037 { 11038 BCMI_QSGMIIE_SERDES_SC_X4_RSLVD6r, 11039 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11040 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11041 BCMI_QSGMIIE_SERDES_SC_X4_RSLVD6r_fields, 11042 #else 11043 0, 11044 #endif 11045 #endif 11046 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11047 PHYMOD_SYMBOL_FLAG_REGISTER, 11048 "SC_X4_RSLVD6r", 11049 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11050 "SC_X4_FINAL_CONFIG_STATUS_RESOLVED_6", 11051 NULL, 11052 #endif 11053 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11054 0x0, /* 0 */ 11055 0, 11056 #endif 11057 }, 11058 { 11059 BCMI_QSGMIIE_SERDES_SC_X4_RSLVD7r, 11060 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11061 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11062 BCMI_QSGMIIE_SERDES_SC_X4_RSLVD7r_fields, 11063 #else 11064 0, 11065 #endif 11066 #endif 11067 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11068 PHYMOD_SYMBOL_FLAG_REGISTER, 11069 "SC_X4_RSLVD7r", 11070 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11071 "SC_X4_FINAL_CONFIG_STATUS_RESOLVED_7", 11072 NULL, 11073 #endif 11074 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11075 0x0, /* 0 */ 11076 0, 11077 #endif 11078 }, 11079 { 11080 BCMI_QSGMIIE_SERDES_SC_X4_RSLVD8r, 11081 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11082 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11083 BCMI_QSGMIIE_SERDES_SC_X4_RSLVD8r_fields, 11084 #else 11085 0, 11086 #endif 11087 #endif 11088 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11089 PHYMOD_SYMBOL_FLAG_REGISTER, 11090 "SC_X4_RSLVD8r", 11091 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11092 "SC_X4_FINAL_CONFIG_STATUS_RESOLVED_8", 11093 NULL, 11094 #endif 11095 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11096 0x0, /* 0 */ 11097 0, 11098 #endif 11099 }, 11100 { 11101 BCMI_QSGMIIE_SERDES_TX_X4_CRED0r, 11102 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11103 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11104 BCMI_QSGMIIE_SERDES_TX_X4_CRED0r_fields, 11105 #else 11106 0, 11107 #endif 11108 #endif 11109 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11110 PHYMOD_SYMBOL_FLAG_REGISTER, 11111 "TX_X4_CRED0r", 11112 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11113 "TX_X4_CREDIT0_CREDIT0", 11114 NULL, 11115 #endif 11116 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11117 0x0, /* 0 */ 11118 0, 11119 #endif 11120 }, 11121 { 11122 BCMI_QSGMIIE_SERDES_TX_X4_CRED1r, 11123 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11124 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11125 BCMI_QSGMIIE_SERDES_TX_X4_CRED1r_fields, 11126 #else 11127 0, 11128 #endif 11129 #endif 11130 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11131 PHYMOD_SYMBOL_FLAG_REGISTER, 11132 "TX_X4_CRED1r", 11133 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11134 "TX_X4_CREDIT0_CREDIT1", 11135 NULL, 11136 #endif 11137 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11138 0x0, /* 0 */ 11139 0, 11140 #endif 11141 }, 11142 { 11143 BCMI_QSGMIIE_SERDES_TX_X4_LOOPCNTr, 11144 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11145 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11146 BCMI_QSGMIIE_SERDES_TX_X4_LOOPCNTr_fields, 11147 #else 11148 0, 11149 #endif 11150 #endif 11151 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11152 PHYMOD_SYMBOL_FLAG_REGISTER, 11153 "TX_X4_LOOPCNTr", 11154 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11155 "TX_X4_CREDIT0_LOOPCNT", 11156 NULL, 11157 #endif 11158 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11159 0x0, /* 0 */ 11160 0, 11161 #endif 11162 }, 11163 { 11164 BCMI_QSGMIIE_SERDES_TX_X4_MAC_CREDGENCNTr, 11165 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11166 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11167 BCMI_QSGMIIE_SERDES_TX_X4_MAC_CREDGENCNTr_fields, 11168 #else 11169 0, 11170 #endif 11171 #endif 11172 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11173 PHYMOD_SYMBOL_FLAG_REGISTER, 11174 "TX_X4_MAC_CREDGENCNTr", 11175 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11176 "TX_X4_CREDIT0_MAC_CREDITGENCNT", 11177 NULL, 11178 #endif 11179 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11180 0x0, /* 0 */ 11181 0, 11182 #endif 11183 }, 11184 { 11185 BCMI_QSGMIIE_SERDES_TX_X4_PCS_CLKCNT0r, 11186 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11187 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11188 BCMI_QSGMIIE_SERDES_TX_X4_PCS_CLKCNT0r_fields, 11189 #else 11190 0, 11191 #endif 11192 #endif 11193 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11194 PHYMOD_SYMBOL_FLAG_REGISTER, 11195 "TX_X4_PCS_CLKCNT0r", 11196 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11197 "TX_X4_CREDIT0_PCS_CLOCKCNT0", 11198 NULL, 11199 #endif 11200 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11201 0x0, /* 0 */ 11202 0, 11203 #endif 11204 }, 11205 { 11206 BCMI_QSGMIIE_SERDES_TX_X4_PCS_CREDGENCNTr, 11207 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11208 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11209 BCMI_QSGMIIE_SERDES_TX_X4_PCS_CREDGENCNTr_fields, 11210 #else 11211 0, 11212 #endif 11213 #endif 11214 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11215 PHYMOD_SYMBOL_FLAG_REGISTER, 11216 "TX_X4_PCS_CREDGENCNTr", 11217 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11218 "TX_X4_CREDIT0_PCS_CREDITGENCNT", 11219 NULL, 11220 #endif 11221 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11222 0x0, /* 0 */ 11223 0, 11224 #endif 11225 }, 11226 { 11227 BCMI_QSGMIIE_SERDES_TX_X4_ENC0r, 11228 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11229 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11230 BCMI_QSGMIIE_SERDES_TX_X4_ENC0r_fields, 11231 #else 11232 0, 11233 #endif 11234 #endif 11235 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11236 PHYMOD_SYMBOL_FLAG_REGISTER, 11237 "TX_X4_ENC0r", 11238 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11239 "TX_X4_CONTROL0_ENCODE_0", 11240 NULL, 11241 #endif 11242 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11243 0x800, /* 2048 */ 11244 0, 11245 #endif 11246 }, 11247 { 11248 BCMI_QSGMIIE_SERDES_TX_X4_ENC1r, 11249 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11250 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11251 BCMI_QSGMIIE_SERDES_TX_X4_ENC1r_fields, 11252 #else 11253 0, 11254 #endif 11255 #endif 11256 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11257 PHYMOD_SYMBOL_FLAG_REGISTER, 11258 "TX_X4_ENC1r", 11259 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11260 "TX_X4_CONTROL0_ENCODE_1", 11261 NULL, 11262 #endif 11263 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11264 0x1b4, /* 436 */ 11265 0, 11266 #endif 11267 }, 11268 { 11269 BCMI_QSGMIIE_SERDES_TX_X4_MISCr, 11270 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11271 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11272 BCMI_QSGMIIE_SERDES_TX_X4_MISCr_fields, 11273 #else 11274 0, 11275 #endif 11276 #endif 11277 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11278 PHYMOD_SYMBOL_FLAG_REGISTER, 11279 "TX_X4_MISCr", 11280 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11281 "TX_X4_CONTROL0_MISC", 11282 NULL, 11283 #endif 11284 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11285 0x1c8, /* 456 */ 11286 0, 11287 #endif 11288 }, 11289 { 11290 BCMI_QSGMIIE_SERDES_TX_X4_ENC_STS0r, 11291 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11292 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11293 BCMI_QSGMIIE_SERDES_TX_X4_ENC_STS0r_fields, 11294 #else 11295 0, 11296 #endif 11297 #endif 11298 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11299 PHYMOD_SYMBOL_FLAG_REGISTER, 11300 "TX_X4_ENC_STS0r", 11301 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11302 "TX_X4_STATUS0_ENCODE_STATUS_0", 11303 NULL, 11304 #endif 11305 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11306 0x0, /* 0 */ 11307 0, 11308 #endif 11309 }, 11310 { 11311 BCMI_QSGMIIE_SERDES_TX_X4_PCS_STSr, 11312 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11313 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11314 BCMI_QSGMIIE_SERDES_TX_X4_PCS_STSr_fields, 11315 #else 11316 0, 11317 #endif 11318 #endif 11319 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11320 PHYMOD_SYMBOL_FLAG_REGISTER, 11321 "TX_X4_PCS_STSr", 11322 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11323 "TX_X4_STATUS0_PCS_STATUS", 11324 NULL, 11325 #endif 11326 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11327 0x0, /* 0 */ 11328 0, 11329 #endif 11330 }, 11331 { 11332 BCMI_QSGMIIE_SERDES_RX_X4_PCS_CTL0r, 11333 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11334 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11335 BCMI_QSGMIIE_SERDES_RX_X4_PCS_CTL0r_fields, 11336 #else 11337 0, 11338 #endif 11339 #endif 11340 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11341 PHYMOD_SYMBOL_FLAG_REGISTER, 11342 "RX_X4_PCS_CTL0r", 11343 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11344 "RX_X4_CONTROL0_PCS_CONTROL_0", 11345 NULL, 11346 #endif 11347 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11348 0x0, /* 0 */ 11349 0, 11350 #endif 11351 }, 11352 { 11353 BCMI_QSGMIIE_SERDES_RX_X4_FEC0r, 11354 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11355 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11356 BCMI_QSGMIIE_SERDES_RX_X4_FEC0r_fields, 11357 #else 11358 0, 11359 #endif 11360 #endif 11361 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11362 PHYMOD_SYMBOL_FLAG_REGISTER, 11363 "RX_X4_FEC0r", 11364 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11365 "RX_X4_CONTROL0_FEC_0", 11366 NULL, 11367 #endif 11368 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11369 0x0, /* 0 */ 11370 0, 11371 #endif 11372 }, 11373 { 11374 BCMI_QSGMIIE_SERDES_RX_X4_FEC1r, 11375 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11376 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11377 BCMI_QSGMIIE_SERDES_RX_X4_FEC1r_fields, 11378 #else 11379 0, 11380 #endif 11381 #endif 11382 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11383 PHYMOD_SYMBOL_FLAG_REGISTER, 11384 "RX_X4_FEC1r", 11385 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11386 "RX_X4_CONTROL0_FEC_1", 11387 NULL, 11388 #endif 11389 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11390 0x4478, /* 17528 */ 11391 0, 11392 #endif 11393 }, 11394 { 11395 BCMI_QSGMIIE_SERDES_RX_X4_FEC2r, 11396 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11397 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11398 BCMI_QSGMIIE_SERDES_RX_X4_FEC2r_fields, 11399 #else 11400 0, 11401 #endif 11402 #endif 11403 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11404 PHYMOD_SYMBOL_FLAG_REGISTER, 11405 "RX_X4_FEC2r", 11406 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11407 "RX_X4_CONTROL0_FEC_2", 11408 NULL, 11409 #endif 11410 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11411 0x7828, /* 30760 */ 11412 0, 11413 #endif 11414 }, 11415 { 11416 BCMI_QSGMIIE_SERDES_RX_X4_DEC_CTL0r, 11417 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11418 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11419 BCMI_QSGMIIE_SERDES_RX_X4_DEC_CTL0r_fields, 11420 #else 11421 0, 11422 #endif 11423 #endif 11424 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11425 PHYMOD_SYMBOL_FLAG_REGISTER, 11426 "RX_X4_DEC_CTL0r", 11427 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11428 "RX_X4_CONTROL0_DECODE_CONTROL_0", 11429 NULL, 11430 #endif 11431 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11432 0x2870, /* 10352 */ 11433 0, 11434 #endif 11435 }, 11436 { 11437 BCMI_QSGMIIE_SERDES_RX_X4_DEC_CTL1r, 11438 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11439 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11440 BCMI_QSGMIIE_SERDES_RX_X4_DEC_CTL1r_fields, 11441 #else 11442 0, 11443 #endif 11444 #endif 11445 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11446 PHYMOD_SYMBOL_FLAG_REGISTER, 11447 "RX_X4_DEC_CTL1r", 11448 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11449 "RX_X4_CONTROL0_DECODE_CONTROL_1", 11450 NULL, 11451 #endif 11452 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11453 0x0, /* 0 */ 11454 0, 11455 #endif 11456 }, 11457 { 11458 BCMI_QSGMIIE_SERDES_RX_X4_CL36_RX0r, 11459 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11460 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11461 BCMI_QSGMIIE_SERDES_RX_X4_CL36_RX0r_fields, 11462 #else 11463 0, 11464 #endif 11465 #endif 11466 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11467 PHYMOD_SYMBOL_FLAG_REGISTER, 11468 "RX_X4_CL36_RX0r", 11469 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11470 "RX_X4_CONTROL0_CL36_RX_0", 11471 NULL, 11472 #endif 11473 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11474 0x0, /* 0 */ 11475 0, 11476 #endif 11477 }, 11478 { 11479 BCMI_QSGMIIE_SERDES_RX_X4_PMA_CTL0r, 11480 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11481 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11482 BCMI_QSGMIIE_SERDES_RX_X4_PMA_CTL0r_fields, 11483 #else 11484 0, 11485 #endif 11486 #endif 11487 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11488 PHYMOD_SYMBOL_FLAG_REGISTER, 11489 "RX_X4_PMA_CTL0r", 11490 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11491 "RX_X4_CONTROL0_PMA_CONTROL_0", 11492 NULL, 11493 #endif 11494 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11495 0x0, /* 0 */ 11496 0, 11497 #endif 11498 }, 11499 { 11500 BCMI_QSGMIIE_SERDES_RX_X4_LNK_CTLr, 11501 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11502 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11503 BCMI_QSGMIIE_SERDES_RX_X4_LNK_CTLr_fields, 11504 #else 11505 0, 11506 #endif 11507 #endif 11508 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11509 PHYMOD_SYMBOL_FLAG_REGISTER, 11510 "RX_X4_LNK_CTLr", 11511 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11512 "RX_X4_CONTROL0_LINK_CONTROL", 11513 NULL, 11514 #endif 11515 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11516 0x0, /* 0 */ 11517 0, 11518 #endif 11519 }, 11520 { 11521 BCMI_QSGMIIE_SERDES_RX_X4_FEC_DBG_ERRLr, 11522 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11523 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11524 BCMI_QSGMIIE_SERDES_RX_X4_FEC_DBG_ERRLr_fields, 11525 #else 11526 0, 11527 #endif 11528 #endif 11529 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11530 PHYMOD_SYMBOL_FLAG_REGISTER, 11531 "RX_X4_FEC_DBG_ERRLr", 11532 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11533 "RX_X4_STATUS0_FEC_DBG_ERRL", 11534 NULL, 11535 #endif 11536 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11537 0x0, /* 0 */ 11538 0, 11539 #endif 11540 }, 11541 { 11542 BCMI_QSGMIIE_SERDES_RX_X4_FEC_DBG_ERRAHr, 11543 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11544 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11545 BCMI_QSGMIIE_SERDES_RX_X4_FEC_DBG_ERRAHr_fields, 11546 #else 11547 0, 11548 #endif 11549 #endif 11550 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11551 PHYMOD_SYMBOL_FLAG_REGISTER, 11552 "RX_X4_FEC_DBG_ERRAHr", 11553 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11554 "RX_X4_STATUS0_FEC_DBG_ERRAH", 11555 NULL, 11556 #endif 11557 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11558 0x0, /* 0 */ 11559 0, 11560 #endif 11561 }, 11562 { 11563 BCMI_QSGMIIE_SERDES_RX_X4_FEC_BURST_ERR_STSLr, 11564 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11565 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11566 BCMI_QSGMIIE_SERDES_RX_X4_FEC_BURST_ERR_STSLr_fields, 11567 #else 11568 0, 11569 #endif 11570 #endif 11571 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11572 PHYMOD_SYMBOL_FLAG_REGISTER, 11573 "RX_X4_FEC_BURST_ERR_STSLr", 11574 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11575 "RX_X4_STATUS0_FEC_BURST_ERR_STATUSL", 11576 NULL, 11577 #endif 11578 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11579 0x0, /* 0 */ 11580 0, 11581 #endif 11582 }, 11583 { 11584 BCMI_QSGMIIE_SERDES_RX_X4_FEC_BURST_ERR_STSHr, 11585 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11586 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11587 BCMI_QSGMIIE_SERDES_RX_X4_FEC_BURST_ERR_STSHr_fields, 11588 #else 11589 0, 11590 #endif 11591 #endif 11592 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11593 PHYMOD_SYMBOL_FLAG_REGISTER, 11594 "RX_X4_FEC_BURST_ERR_STSHr", 11595 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11596 "RX_X4_STATUS0_FEC_BURST_ERR_STATUSH", 11597 NULL, 11598 #endif 11599 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11600 0x0, /* 0 */ 11601 0, 11602 #endif 11603 }, 11604 { 11605 BCMI_QSGMIIE_SERDES_RX_X4_BARREL_SHIFTER_STr, 11606 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11607 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11608 BCMI_QSGMIIE_SERDES_RX_X4_BARREL_SHIFTER_STr_fields, 11609 #else 11610 0, 11611 #endif 11612 #endif 11613 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11614 PHYMOD_SYMBOL_FLAG_REGISTER, 11615 "RX_X4_BARREL_SHIFTER_STr", 11616 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11617 "RX_X4_STATUS0_BARREL_SHIFTER_STATE", 11618 NULL, 11619 #endif 11620 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11621 0x0, /* 0 */ 11622 0, 11623 #endif 11624 }, 11625 { 11626 BCMI_QSGMIIE_SERDES_RX_X4_CL49_LOCK_FSM_STSr, 11627 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11628 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11629 BCMI_QSGMIIE_SERDES_RX_X4_CL49_LOCK_FSM_STSr_fields, 11630 #else 11631 0, 11632 #endif 11633 #endif 11634 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11635 PHYMOD_SYMBOL_FLAG_REGISTER, 11636 "RX_X4_CL49_LOCK_FSM_STSr", 11637 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11638 "RX_X4_STATUS0_CL49_LOCK_FSM_STATUS", 11639 NULL, 11640 #endif 11641 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11642 0x0, /* 0 */ 11643 0, 11644 #endif 11645 }, 11646 { 11647 BCMI_QSGMIIE_SERDES_RX_X4_DEC_STS0r, 11648 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11649 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11650 BCMI_QSGMIIE_SERDES_RX_X4_DEC_STS0r_fields, 11651 #else 11652 0, 11653 #endif 11654 #endif 11655 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11656 PHYMOD_SYMBOL_FLAG_REGISTER, 11657 "RX_X4_DEC_STS0r", 11658 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11659 "RX_X4_STATUS0_DECODE_STATUS_0", 11660 NULL, 11661 #endif 11662 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11663 0x0, /* 0 */ 11664 0, 11665 #endif 11666 }, 11667 { 11668 BCMI_QSGMIIE_SERDES_RX_X4_DEC_STS1r, 11669 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11670 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11671 BCMI_QSGMIIE_SERDES_RX_X4_DEC_STS1r_fields, 11672 #else 11673 0, 11674 #endif 11675 #endif 11676 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11677 PHYMOD_SYMBOL_FLAG_REGISTER, 11678 "RX_X4_DEC_STS1r", 11679 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11680 "RX_X4_STATUS0_DECODE_STATUS_1", 11681 NULL, 11682 #endif 11683 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11684 0x0, /* 0 */ 11685 0, 11686 #endif 11687 }, 11688 { 11689 BCMI_QSGMIIE_SERDES_RX_X4_DEC_STS2r, 11690 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11691 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11692 BCMI_QSGMIIE_SERDES_RX_X4_DEC_STS2r_fields, 11693 #else 11694 0, 11695 #endif 11696 #endif 11697 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11698 PHYMOD_SYMBOL_FLAG_REGISTER, 11699 "RX_X4_DEC_STS2r", 11700 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11701 "RX_X4_STATUS0_DECODE_STATUS_2", 11702 NULL, 11703 #endif 11704 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11705 0x0, /* 0 */ 11706 0, 11707 #endif 11708 }, 11709 { 11710 BCMI_QSGMIIE_SERDES_RX_X4_DEC_STS3r, 11711 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11712 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11713 BCMI_QSGMIIE_SERDES_RX_X4_DEC_STS3r_fields, 11714 #else 11715 0, 11716 #endif 11717 #endif 11718 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11719 PHYMOD_SYMBOL_FLAG_REGISTER, 11720 "RX_X4_DEC_STS3r", 11721 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11722 "RX_X4_STATUS0_DECODE_STATUS_3", 11723 NULL, 11724 #endif 11725 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11726 0x0, /* 0 */ 11727 0, 11728 #endif 11729 }, 11730 { 11731 BCMI_QSGMIIE_SERDES_RX_X4_DEC_STS4r, 11732 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11733 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11734 BCMI_QSGMIIE_SERDES_RX_X4_DEC_STS4r_fields, 11735 #else 11736 0, 11737 #endif 11738 #endif 11739 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11740 PHYMOD_SYMBOL_FLAG_REGISTER, 11741 "RX_X4_DEC_STS4r", 11742 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11743 "RX_X4_STATUS0_DECODE_STATUS_4", 11744 NULL, 11745 #endif 11746 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11747 0x0, /* 0 */ 11748 0, 11749 #endif 11750 }, 11751 { 11752 BCMI_QSGMIIE_SERDES_RX_X4_DEC_STS5r, 11753 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11754 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11755 BCMI_QSGMIIE_SERDES_RX_X4_DEC_STS5r_fields, 11756 #else 11757 0, 11758 #endif 11759 #endif 11760 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11761 PHYMOD_SYMBOL_FLAG_REGISTER, 11762 "RX_X4_DEC_STS5r", 11763 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11764 "RX_X4_STATUS0_DECODE_STATUS_5", 11765 NULL, 11766 #endif 11767 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11768 0x0, /* 0 */ 11769 0, 11770 #endif 11771 }, 11772 { 11773 BCMI_QSGMIIE_SERDES_RX_X4_SYNCACQ_STS0r, 11774 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11775 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11776 BCMI_QSGMIIE_SERDES_RX_X4_SYNCACQ_STS0r_fields, 11777 #else 11778 0, 11779 #endif 11780 #endif 11781 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11782 PHYMOD_SYMBOL_FLAG_REGISTER, 11783 "RX_X4_SYNCACQ_STS0r", 11784 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11785 "RX_X4_STATUS0_SYNCACQ_STATUS_0", 11786 NULL, 11787 #endif 11788 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11789 0x0, /* 0 */ 11790 0, 11791 #endif 11792 }, 11793 { 11794 BCMI_QSGMIIE_SERDES_RX_X4_SYNCACQ_STS1r, 11795 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11796 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11797 BCMI_QSGMIIE_SERDES_RX_X4_SYNCACQ_STS1r_fields, 11798 #else 11799 0, 11800 #endif 11801 #endif 11802 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11803 PHYMOD_SYMBOL_FLAG_REGISTER, 11804 "RX_X4_SYNCACQ_STS1r", 11805 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11806 "RX_X4_STATUS0_SYNCACQ_STATUS_1", 11807 NULL, 11808 #endif 11809 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11810 0x0, /* 0 */ 11811 0, 11812 #endif 11813 }, 11814 { 11815 BCMI_QSGMIIE_SERDES_RX_X4_BERCNTr, 11816 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11817 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11818 BCMI_QSGMIIE_SERDES_RX_X4_BERCNTr_fields, 11819 #else 11820 0, 11821 #endif 11822 #endif 11823 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11824 PHYMOD_SYMBOL_FLAG_REGISTER, 11825 "RX_X4_BERCNTr", 11826 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11827 "RX_X4_STATUS0_BERCOUNT", 11828 NULL, 11829 #endif 11830 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11831 0x0, /* 0 */ 11832 0, 11833 #endif 11834 }, 11835 { 11836 BCMI_QSGMIIE_SERDES_RX_X4_PCS_LATCH_STS1r, 11837 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11838 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11839 BCMI_QSGMIIE_SERDES_RX_X4_PCS_LATCH_STS1r_fields, 11840 #else 11841 0, 11842 #endif 11843 #endif 11844 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11845 PHYMOD_SYMBOL_FLAG_REGISTER, 11846 "RX_X4_PCS_LATCH_STS1r", 11847 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11848 "RX_X4_STATUS1_PCS_LATCHED_STATUS_1", 11849 NULL, 11850 #endif 11851 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11852 0x0, /* 0 */ 11853 0, 11854 #endif 11855 }, 11856 { 11857 BCMI_QSGMIIE_SERDES_RX_X4_PCS_LATCH_STS0r, 11858 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11859 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11860 BCMI_QSGMIIE_SERDES_RX_X4_PCS_LATCH_STS0r_fields, 11861 #else 11862 0, 11863 #endif 11864 #endif 11865 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11866 PHYMOD_SYMBOL_FLAG_REGISTER, 11867 "RX_X4_PCS_LATCH_STS0r", 11868 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11869 "RX_X4_STATUS1_PCS_LATCHED_STATUS_0", 11870 NULL, 11871 #endif 11872 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11873 0x0, /* 0 */ 11874 0, 11875 #endif 11876 }, 11877 { 11878 BCMI_QSGMIIE_SERDES_RX_X4_PCS_LIVE_STSr, 11879 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11880 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11881 BCMI_QSGMIIE_SERDES_RX_X4_PCS_LIVE_STSr_fields, 11882 #else 11883 0, 11884 #endif 11885 #endif 11886 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11887 PHYMOD_SYMBOL_FLAG_REGISTER, 11888 "RX_X4_PCS_LIVE_STSr", 11889 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11890 "RX_X4_STATUS1_PCS_LIVE_STATUS", 11891 NULL, 11892 #endif 11893 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11894 0x0, /* 0 */ 11895 0, 11896 #endif 11897 }, 11898 { 11899 BCMI_QSGMIIE_SERDES_RX_X4_CL82_AM_LATCH_STSr, 11900 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11901 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11902 BCMI_QSGMIIE_SERDES_RX_X4_CL82_AM_LATCH_STSr_fields, 11903 #else 11904 0, 11905 #endif 11906 #endif 11907 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11908 PHYMOD_SYMBOL_FLAG_REGISTER, 11909 "RX_X4_CL82_AM_LATCH_STSr", 11910 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11911 "RX_X4_STATUS1_CL82_RX_AM_LATCHED_STATUS", 11912 NULL, 11913 #endif 11914 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11915 0x0, /* 0 */ 11916 0, 11917 #endif 11918 }, 11919 { 11920 BCMI_QSGMIIE_SERDES_RX_X4_CL82_AM_LIVE_STSr, 11921 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11922 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11923 BCMI_QSGMIIE_SERDES_RX_X4_CL82_AM_LIVE_STSr_fields, 11924 #else 11925 0, 11926 #endif 11927 #endif 11928 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11929 PHYMOD_SYMBOL_FLAG_REGISTER, 11930 "RX_X4_CL82_AM_LIVE_STSr", 11931 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11932 "RX_X4_STATUS1_CL82_RX_AM_LIVE_STATUS", 11933 NULL, 11934 #endif 11935 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11936 0x0, /* 0 */ 11937 0, 11938 #endif 11939 }, 11940 { 11941 BCMI_QSGMIIE_SERDES_RX_X4_FEC_CORRBLKSLr, 11942 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11943 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11944 BCMI_QSGMIIE_SERDES_RX_X4_FEC_CORRBLKSLr_fields, 11945 #else 11946 0, 11947 #endif 11948 #endif 11949 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11950 PHYMOD_SYMBOL_FLAG_REGISTER, 11951 "RX_X4_FEC_CORRBLKSLr", 11952 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11953 "RX_X4_STATUS1_FEC_CORRECTEDBLKSL", 11954 NULL, 11955 #endif 11956 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11957 0x0, /* 0 */ 11958 0, 11959 #endif 11960 }, 11961 { 11962 BCMI_QSGMIIE_SERDES_RX_X4_FEC_CORRBLKSHr, 11963 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11964 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11965 BCMI_QSGMIIE_SERDES_RX_X4_FEC_CORRBLKSHr_fields, 11966 #else 11967 0, 11968 #endif 11969 #endif 11970 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11971 PHYMOD_SYMBOL_FLAG_REGISTER, 11972 "RX_X4_FEC_CORRBLKSHr", 11973 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11974 "RX_X4_STATUS1_FEC_CORRECTEDBLKSH", 11975 NULL, 11976 #endif 11977 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11978 0x0, /* 0 */ 11979 0, 11980 #endif 11981 }, 11982 { 11983 BCMI_QSGMIIE_SERDES_RX_X4_FEC_UNCORRBLKSLr, 11984 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11985 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 11986 BCMI_QSGMIIE_SERDES_RX_X4_FEC_UNCORRBLKSLr_fields, 11987 #else 11988 0, 11989 #endif 11990 #endif 11991 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11992 PHYMOD_SYMBOL_FLAG_REGISTER, 11993 "RX_X4_FEC_UNCORRBLKSLr", 11994 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11995 "RX_X4_STATUS1_FEC_UNCORRECTEDBLKSL", 11996 NULL, 11997 #endif 11998 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11999 0x0, /* 0 */ 12000 0, 12001 #endif 12002 }, 12003 { 12004 BCMI_QSGMIIE_SERDES_RX_X4_FEC_UNCORRBLKSHr, 12005 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12006 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12007 BCMI_QSGMIIE_SERDES_RX_X4_FEC_UNCORRBLKSHr_fields, 12008 #else 12009 0, 12010 #endif 12011 #endif 12012 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12013 PHYMOD_SYMBOL_FLAG_REGISTER, 12014 "RX_X4_FEC_UNCORRBLKSHr", 12015 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12016 "RX_X4_STATUS1_FEC_UNCORRECTEDBLKSH", 12017 NULL, 12018 #endif 12019 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12020 0x0, /* 0 */ 12021 0, 12022 #endif 12023 }, 12024 { 12025 BCMI_QSGMIIE_SERDES_RX_X4_GBOX_STSr, 12026 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12027 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12028 BCMI_QSGMIIE_SERDES_RX_X4_GBOX_STSr_fields, 12029 #else 12030 0, 12031 #endif 12032 #endif 12033 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12034 PHYMOD_SYMBOL_FLAG_REGISTER, 12035 "RX_X4_GBOX_STSr", 12036 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12037 "RX_X4_STATUS1_GBOX_STATUS", 12038 NULL, 12039 #endif 12040 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12041 0x0, /* 0 */ 12042 0, 12043 #endif 12044 }, 12045 { 12046 BCMI_QSGMIIE_SERDES_RX_X4_T12_FEC0r, 12047 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12048 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12049 BCMI_QSGMIIE_SERDES_RX_X4_T12_FEC0r_fields, 12050 #else 12051 0, 12052 #endif 12053 #endif 12054 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12055 PHYMOD_SYMBOL_FLAG_REGISTER, 12056 "RX_X4_T12_FEC0r", 12057 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12058 "RX_X4_CONTROL0_TSC_12_FEC_0", 12059 NULL, 12060 #endif 12061 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12062 0x0, /* 0 */ 12063 0, 12064 #endif 12065 }, 12066 { 12067 BCMI_QSGMIIE_SERDES_RX_X4_T12_FEC1r, 12068 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12069 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12070 BCMI_QSGMIIE_SERDES_RX_X4_T12_FEC1r_fields, 12071 #else 12072 0, 12073 #endif 12074 #endif 12075 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12076 PHYMOD_SYMBOL_FLAG_REGISTER, 12077 "RX_X4_T12_FEC1r", 12078 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12079 "RX_X4_CONTROL0_TSC_12_FEC_1", 12080 NULL, 12081 #endif 12082 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12083 0x4478, /* 17528 */ 12084 0, 12085 #endif 12086 }, 12087 { 12088 BCMI_QSGMIIE_SERDES_RX_X4_T12_FEC2r, 12089 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12090 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12091 BCMI_QSGMIIE_SERDES_RX_X4_T12_FEC2r_fields, 12092 #else 12093 0, 12094 #endif 12095 #endif 12096 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12097 PHYMOD_SYMBOL_FLAG_REGISTER, 12098 "RX_X4_T12_FEC2r", 12099 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12100 "RX_X4_CONTROL0_TSC_12_FEC_2", 12101 NULL, 12102 #endif 12103 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12104 0x7828, /* 30760 */ 12105 0, 12106 #endif 12107 }, 12108 { 12109 BCMI_QSGMIIE_SERDES_RX_X4_T12_FEC_DBG_ERRLr, 12110 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12111 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12112 BCMI_QSGMIIE_SERDES_RX_X4_T12_FEC_DBG_ERRLr_fields, 12113 #else 12114 0, 12115 #endif 12116 #endif 12117 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12118 PHYMOD_SYMBOL_FLAG_REGISTER, 12119 "RX_X4_T12_FEC_DBG_ERRLr", 12120 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12121 "RX_X4_STATUS0_TSC_12_FEC_DBG_ERRL", 12122 NULL, 12123 #endif 12124 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12125 0x0, /* 0 */ 12126 0, 12127 #endif 12128 }, 12129 { 12130 BCMI_QSGMIIE_SERDES_RX_X4_T12_FEC_DBG_ERRAHr, 12131 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12132 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12133 BCMI_QSGMIIE_SERDES_RX_X4_T12_FEC_DBG_ERRAHr_fields, 12134 #else 12135 0, 12136 #endif 12137 #endif 12138 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12139 PHYMOD_SYMBOL_FLAG_REGISTER, 12140 "RX_X4_T12_FEC_DBG_ERRAHr", 12141 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12142 "RX_X4_STATUS0_TSC_12_FEC_DBG_ERRAH", 12143 NULL, 12144 #endif 12145 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12146 0x0, /* 0 */ 12147 0, 12148 #endif 12149 }, 12150 { 12151 BCMI_QSGMIIE_SERDES_RX_X4_T12_FEC_BURST_ERR_STSLr, 12152 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12153 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12154 BCMI_QSGMIIE_SERDES_RX_X4_T12_FEC_BURST_ERR_STSLr_fields, 12155 #else 12156 0, 12157 #endif 12158 #endif 12159 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12160 PHYMOD_SYMBOL_FLAG_REGISTER, 12161 "RX_X4_T12_FEC_BURST_ERR_STSLr", 12162 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12163 "RX_X4_STATUS0_TSC_12_FEC_BURST_ERR_STATUSL", 12164 NULL, 12165 #endif 12166 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12167 0x0, /* 0 */ 12168 0, 12169 #endif 12170 }, 12171 { 12172 BCMI_QSGMIIE_SERDES_RX_X4_T12_FEC_BURST_ERR_STSHr, 12173 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12174 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12175 BCMI_QSGMIIE_SERDES_RX_X4_T12_FEC_BURST_ERR_STSHr_fields, 12176 #else 12177 0, 12178 #endif 12179 #endif 12180 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12181 PHYMOD_SYMBOL_FLAG_REGISTER, 12182 "RX_X4_T12_FEC_BURST_ERR_STSHr", 12183 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12184 "RX_X4_STATUS0_TSC_12_FEC_BURST_ERR_STATUSH", 12185 NULL, 12186 #endif 12187 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12188 0x0, /* 0 */ 12189 0, 12190 #endif 12191 }, 12192 { 12193 BCMI_QSGMIIE_SERDES_RX_X4_T12_BERCNTr, 12194 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12195 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12196 BCMI_QSGMIIE_SERDES_RX_X4_T12_BERCNTr_fields, 12197 #else 12198 0, 12199 #endif 12200 #endif 12201 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12202 PHYMOD_SYMBOL_FLAG_REGISTER, 12203 "RX_X4_T12_BERCNTr", 12204 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12205 "RX_X4_STATUS0_TSC_12_BERCOUNT", 12206 NULL, 12207 #endif 12208 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12209 0x0, /* 0 */ 12210 0, 12211 #endif 12212 }, 12213 { 12214 BCMI_QSGMIIE_SERDES_RX_X4_T12_CL49_LOCK_FSM_STSr, 12215 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12216 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12217 BCMI_QSGMIIE_SERDES_RX_X4_T12_CL49_LOCK_FSM_STSr_fields, 12218 #else 12219 0, 12220 #endif 12221 #endif 12222 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12223 PHYMOD_SYMBOL_FLAG_REGISTER, 12224 "RX_X4_T12_CL49_LOCK_FSM_STSr", 12225 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12226 "RX_X4_STATUS0_TSC_12_CL49_LOCK_FSM_STATUS", 12227 NULL, 12228 #endif 12229 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12230 0x0, /* 0 */ 12231 0, 12232 #endif 12233 }, 12234 { 12235 BCMI_QSGMIIE_SERDES_RX_X4_T12_MLD_VL_INFO0r, 12236 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12237 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12238 BCMI_QSGMIIE_SERDES_RX_X4_T12_MLD_VL_INFO0r_fields, 12239 #else 12240 0, 12241 #endif 12242 #endif 12243 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12244 PHYMOD_SYMBOL_FLAG_REGISTER, 12245 "RX_X4_T12_MLD_VL_INFO0r", 12246 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12247 "RX_X4_STATUS0_TSC_12_MLD_VL_INFO_0", 12248 NULL, 12249 #endif 12250 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12251 0x0, /* 0 */ 12252 0, 12253 #endif 12254 }, 12255 { 12256 BCMI_QSGMIIE_SERDES_RX_X4_T12_BARREL_SHIFTER_STr, 12257 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12258 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12259 BCMI_QSGMIIE_SERDES_RX_X4_T12_BARREL_SHIFTER_STr_fields, 12260 #else 12261 0, 12262 #endif 12263 #endif 12264 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12265 PHYMOD_SYMBOL_FLAG_REGISTER, 12266 "RX_X4_T12_BARREL_SHIFTER_STr", 12267 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12268 "RX_X4_STATUS0_TSC_12_BARREL_SHIFTER_STATE", 12269 NULL, 12270 #endif 12271 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12272 0x0, /* 0 */ 12273 0, 12274 #endif 12275 }, 12276 { 12277 BCMI_QSGMIIE_SERDES_RX_X4_T12_FEC_CORRBLKSLr, 12278 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12279 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12280 BCMI_QSGMIIE_SERDES_RX_X4_T12_FEC_CORRBLKSLr_fields, 12281 #else 12282 0, 12283 #endif 12284 #endif 12285 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12286 PHYMOD_SYMBOL_FLAG_REGISTER, 12287 "RX_X4_T12_FEC_CORRBLKSLr", 12288 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12289 "RX_X4_STATUS0_TSC_12_FEC_CORRECTEDBLKSL", 12290 NULL, 12291 #endif 12292 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12293 0x0, /* 0 */ 12294 0, 12295 #endif 12296 }, 12297 { 12298 BCMI_QSGMIIE_SERDES_RX_X4_T12_FEC_CORRBLKSHr, 12299 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12300 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12301 BCMI_QSGMIIE_SERDES_RX_X4_T12_FEC_CORRBLKSHr_fields, 12302 #else 12303 0, 12304 #endif 12305 #endif 12306 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12307 PHYMOD_SYMBOL_FLAG_REGISTER, 12308 "RX_X4_T12_FEC_CORRBLKSHr", 12309 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12310 "RX_X4_STATUS0_TSC_12_FEC_CORRECTEDBLKSH", 12311 NULL, 12312 #endif 12313 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12314 0x0, /* 0 */ 12315 0, 12316 #endif 12317 }, 12318 { 12319 BCMI_QSGMIIE_SERDES_RX_X4_T12_FEC_UNCORRBLKSLr, 12320 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12321 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12322 BCMI_QSGMIIE_SERDES_RX_X4_T12_FEC_UNCORRBLKSLr_fields, 12323 #else 12324 0, 12325 #endif 12326 #endif 12327 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12328 PHYMOD_SYMBOL_FLAG_REGISTER, 12329 "RX_X4_T12_FEC_UNCORRBLKSLr", 12330 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12331 "RX_X4_STATUS0_TSC_12_FEC_UNCORRECTEDBLKSL", 12332 NULL, 12333 #endif 12334 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12335 0x0, /* 0 */ 12336 0, 12337 #endif 12338 }, 12339 { 12340 BCMI_QSGMIIE_SERDES_RX_X4_T12_FEC_UNCORRBLKSHr, 12341 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12342 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12343 BCMI_QSGMIIE_SERDES_RX_X4_T12_FEC_UNCORRBLKSHr_fields, 12344 #else 12345 0, 12346 #endif 12347 #endif 12348 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12349 PHYMOD_SYMBOL_FLAG_REGISTER, 12350 "RX_X4_T12_FEC_UNCORRBLKSHr", 12351 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12352 "RX_X4_STATUS0_TSC_12_FEC_UNCORRECTEDBLKSH", 12353 NULL, 12354 #endif 12355 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12356 0x0, /* 0 */ 12357 0, 12358 #endif 12359 }, 12360 { 12361 BCMI_QSGMIIE_SERDES_RX_X4_T12_CL82_PCS_LATCH_STSr, 12362 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12363 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12364 BCMI_QSGMIIE_SERDES_RX_X4_T12_CL82_PCS_LATCH_STSr_fields, 12365 #else 12366 0, 12367 #endif 12368 #endif 12369 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12370 PHYMOD_SYMBOL_FLAG_REGISTER, 12371 "RX_X4_T12_CL82_PCS_LATCH_STSr", 12372 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12373 "RX_X4_STATUS0_TSC_12_CL82_PCS_LATCHED_STATUS", 12374 NULL, 12375 #endif 12376 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12377 0x0, /* 0 */ 12378 0, 12379 #endif 12380 }, 12381 { 12382 BCMI_QSGMIIE_SERDES_RX_X4_T12_CL82_PCS_LIVE_STSr, 12383 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12384 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12385 BCMI_QSGMIIE_SERDES_RX_X4_T12_CL82_PCS_LIVE_STSr_fields, 12386 #else 12387 0, 12388 #endif 12389 #endif 12390 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12391 PHYMOD_SYMBOL_FLAG_REGISTER, 12392 "RX_X4_T12_CL82_PCS_LIVE_STSr", 12393 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12394 "RX_X4_STATUS0_TSC_12_CL82_PCS_LIVE_STATUS", 12395 NULL, 12396 #endif 12397 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12398 0x0, /* 0 */ 12399 0, 12400 #endif 12401 }, 12402 { 12403 BCMI_QSGMIIE_SERDES_AN_X4_ENSr, 12404 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12405 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12406 BCMI_QSGMIIE_SERDES_AN_X4_ENSr_fields, 12407 #else 12408 0, 12409 #endif 12410 #endif 12411 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12412 PHYMOD_SYMBOL_FLAG_REGISTER, 12413 "AN_X4_ENSr", 12414 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12415 "AN_X4_ABILITIES_ENABLES", 12416 NULL, 12417 #endif 12418 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12419 0x0, /* 0 */ 12420 0, 12421 #endif 12422 }, 12423 { 12424 BCMI_QSGMIIE_SERDES_AN_X4_LOC_DEV_CL37_BASE_ABILr, 12425 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12426 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12427 BCMI_QSGMIIE_SERDES_AN_X4_LOC_DEV_CL37_BASE_ABILr_fields, 12428 #else 12429 0, 12430 #endif 12431 #endif 12432 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12433 PHYMOD_SYMBOL_FLAG_REGISTER, 12434 "AN_X4_LOC_DEV_CL37_BASE_ABILr", 12435 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12436 "AN_X4_ABILITIES_LOCAL_DEVICE_CL37_BASE_ABILITIES", 12437 NULL, 12438 #endif 12439 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12440 0x0, /* 0 */ 12441 0, 12442 #endif 12443 }, 12444 { 12445 BCMI_QSGMIIE_SERDES_AN_X4_LOC_DEV_CL37_BAM_ABILr, 12446 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12447 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12448 BCMI_QSGMIIE_SERDES_AN_X4_LOC_DEV_CL37_BAM_ABILr_fields, 12449 #else 12450 0, 12451 #endif 12452 #endif 12453 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12454 PHYMOD_SYMBOL_FLAG_REGISTER, 12455 "AN_X4_LOC_DEV_CL37_BAM_ABILr", 12456 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12457 "AN_X4_ABILITIES_LOCAL_DEVICE_CL37_BAM_ABILITIES", 12458 NULL, 12459 #endif 12460 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12461 0x0, /* 0 */ 12462 0, 12463 #endif 12464 }, 12465 { 12466 BCMI_QSGMIIE_SERDES_AN_X4_LOC_DEV_OVER1G_ABIL1r, 12467 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12468 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12469 BCMI_QSGMIIE_SERDES_AN_X4_LOC_DEV_OVER1G_ABIL1r_fields, 12470 #else 12471 0, 12472 #endif 12473 #endif 12474 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12475 PHYMOD_SYMBOL_FLAG_REGISTER, 12476 "AN_X4_LOC_DEV_OVER1G_ABIL1r", 12477 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12478 "AN_X4_ABILITIES_LOCAL_DEVICE_OVER1G_ABILITIES_1", 12479 NULL, 12480 #endif 12481 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12482 0x0, /* 0 */ 12483 0, 12484 #endif 12485 }, 12486 { 12487 BCMI_QSGMIIE_SERDES_AN_X4_LOC_DEV_OVER1G_ABIL0r, 12488 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12489 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12490 BCMI_QSGMIIE_SERDES_AN_X4_LOC_DEV_OVER1G_ABIL0r_fields, 12491 #else 12492 0, 12493 #endif 12494 #endif 12495 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12496 PHYMOD_SYMBOL_FLAG_REGISTER, 12497 "AN_X4_LOC_DEV_OVER1G_ABIL0r", 12498 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12499 "AN_X4_ABILITIES_LOCAL_DEVICE_OVER1G_ABILITIES_0", 12500 NULL, 12501 #endif 12502 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12503 0x0, /* 0 */ 12504 0, 12505 #endif 12506 }, 12507 { 12508 BCMI_QSGMIIE_SERDES_AN_X4_LOC_DEV_CL73_BASE_ABIL1r, 12509 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12510 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12511 BCMI_QSGMIIE_SERDES_AN_X4_LOC_DEV_CL73_BASE_ABIL1r_fields, 12512 #else 12513 0, 12514 #endif 12515 #endif 12516 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12517 PHYMOD_SYMBOL_FLAG_REGISTER, 12518 "AN_X4_LOC_DEV_CL73_BASE_ABIL1r", 12519 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12520 "AN_X4_ABILITIES_LOCAL_DEVICE_CL73_BASE_ABILITIES_1", 12521 NULL, 12522 #endif 12523 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12524 0x2a0, /* 672 */ 12525 0, 12526 #endif 12527 }, 12528 { 12529 BCMI_QSGMIIE_SERDES_AN_X4_LOC_DEV_CL73_BASE_ABIL0r, 12530 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12531 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12532 BCMI_QSGMIIE_SERDES_AN_X4_LOC_DEV_CL73_BASE_ABIL0r_fields, 12533 #else 12534 0, 12535 #endif 12536 #endif 12537 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12538 PHYMOD_SYMBOL_FLAG_REGISTER, 12539 "AN_X4_LOC_DEV_CL73_BASE_ABIL0r", 12540 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12541 "AN_X4_ABILITIES_LOCAL_DEVICE_CL73_BASE_ABILITIES_0", 12542 NULL, 12543 #endif 12544 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12545 0x0, /* 0 */ 12546 0, 12547 #endif 12548 }, 12549 { 12550 BCMI_QSGMIIE_SERDES_AN_X4_LOC_DEV_CL73_BAM_ABILr, 12551 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12552 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12553 BCMI_QSGMIIE_SERDES_AN_X4_LOC_DEV_CL73_BAM_ABILr_fields, 12554 #else 12555 0, 12556 #endif 12557 #endif 12558 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12559 PHYMOD_SYMBOL_FLAG_REGISTER, 12560 "AN_X4_LOC_DEV_CL73_BAM_ABILr", 12561 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12562 "AN_X4_ABILITIES_LOCAL_DEVICE_CL73_BAM_ABILITIES", 12563 NULL, 12564 #endif 12565 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12566 0x0, /* 0 */ 12567 0, 12568 #endif 12569 }, 12570 { 12571 BCMI_QSGMIIE_SERDES_AN_X4_CTLSr, 12572 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12573 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12574 BCMI_QSGMIIE_SERDES_AN_X4_CTLSr_fields, 12575 #else 12576 0, 12577 #endif 12578 #endif 12579 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12580 PHYMOD_SYMBOL_FLAG_REGISTER, 12581 "AN_X4_CTLSr", 12582 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12583 "AN_X4_ABILITIES_CONTROLS", 12584 NULL, 12585 #endif 12586 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12587 0x0, /* 0 */ 12588 0, 12589 #endif 12590 }, 12591 { 12592 BCMI_QSGMIIE_SERDES_AN_X4_LP_MP5_UP1r, 12593 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12594 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12595 BCMI_QSGMIIE_SERDES_AN_X4_LP_MP5_UP1r_fields, 12596 #else 12597 0, 12598 #endif 12599 #endif 12600 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12601 PHYMOD_SYMBOL_FLAG_REGISTER, 12602 "AN_X4_LP_MP5_UP1r", 12603 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12604 "AN_X4_HW_LP_PAGES_LP_MP5_UP1", 12605 NULL, 12606 #endif 12607 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12608 0x0, /* 0 */ 12609 0, 12610 #endif 12611 }, 12612 { 12613 BCMI_QSGMIIE_SERDES_AN_X4_LP_MP5_UP2r, 12614 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12615 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12616 BCMI_QSGMIIE_SERDES_AN_X4_LP_MP5_UP2r_fields, 12617 #else 12618 0, 12619 #endif 12620 #endif 12621 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12622 PHYMOD_SYMBOL_FLAG_REGISTER, 12623 "AN_X4_LP_MP5_UP2r", 12624 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12625 "AN_X4_HW_LP_PAGES_LP_MP5_UP2", 12626 NULL, 12627 #endif 12628 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12629 0x0, /* 0 */ 12630 0, 12631 #endif 12632 }, 12633 { 12634 BCMI_QSGMIIE_SERDES_AN_X4_LP_MP5_UP3r, 12635 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12636 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12637 BCMI_QSGMIIE_SERDES_AN_X4_LP_MP5_UP3r_fields, 12638 #else 12639 0, 12640 #endif 12641 #endif 12642 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12643 PHYMOD_SYMBOL_FLAG_REGISTER, 12644 "AN_X4_LP_MP5_UP3r", 12645 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12646 "AN_X4_HW_LP_PAGES_LP_MP5_UP3", 12647 NULL, 12648 #endif 12649 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12650 0x0, /* 0 */ 12651 0, 12652 #endif 12653 }, 12654 { 12655 BCMI_QSGMIIE_SERDES_AN_X4_LP_MP5_UP4r, 12656 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12657 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12658 BCMI_QSGMIIE_SERDES_AN_X4_LP_MP5_UP4r_fields, 12659 #else 12660 0, 12661 #endif 12662 #endif 12663 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12664 PHYMOD_SYMBOL_FLAG_REGISTER, 12665 "AN_X4_LP_MP5_UP4r", 12666 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12667 "AN_X4_HW_LP_PAGES_LP_MP5_UP4", 12668 NULL, 12669 #endif 12670 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12671 0x0, /* 0 */ 12672 0, 12673 #endif 12674 }, 12675 { 12676 BCMI_QSGMIIE_SERDES_AN_X4_LP_MP1024_UP1r, 12677 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12678 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12679 BCMI_QSGMIIE_SERDES_AN_X4_LP_MP1024_UP1r_fields, 12680 #else 12681 0, 12682 #endif 12683 #endif 12684 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12685 PHYMOD_SYMBOL_FLAG_REGISTER, 12686 "AN_X4_LP_MP1024_UP1r", 12687 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12688 "AN_X4_HW_LP_PAGES_LP_MP1024_UP1", 12689 NULL, 12690 #endif 12691 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12692 0x0, /* 0 */ 12693 0, 12694 #endif 12695 }, 12696 { 12697 BCMI_QSGMIIE_SERDES_AN_X4_LP_MP1024_UP2r, 12698 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12699 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12700 BCMI_QSGMIIE_SERDES_AN_X4_LP_MP1024_UP2r_fields, 12701 #else 12702 0, 12703 #endif 12704 #endif 12705 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12706 PHYMOD_SYMBOL_FLAG_REGISTER, 12707 "AN_X4_LP_MP1024_UP2r", 12708 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12709 "AN_X4_HW_LP_PAGES_LP_MP1024_UP2", 12710 NULL, 12711 #endif 12712 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12713 0x0, /* 0 */ 12714 0, 12715 #endif 12716 }, 12717 { 12718 BCMI_QSGMIIE_SERDES_AN_X4_LP_MP1024_UP3r, 12719 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12720 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12721 BCMI_QSGMIIE_SERDES_AN_X4_LP_MP1024_UP3r_fields, 12722 #else 12723 0, 12724 #endif 12725 #endif 12726 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12727 PHYMOD_SYMBOL_FLAG_REGISTER, 12728 "AN_X4_LP_MP1024_UP3r", 12729 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12730 "AN_X4_HW_LP_PAGES_LP_MP1024_UP3", 12731 NULL, 12732 #endif 12733 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12734 0x0, /* 0 */ 12735 0, 12736 #endif 12737 }, 12738 { 12739 BCMI_QSGMIIE_SERDES_AN_X4_LP_MP1024_UP4r, 12740 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12741 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12742 BCMI_QSGMIIE_SERDES_AN_X4_LP_MP1024_UP4r_fields, 12743 #else 12744 0, 12745 #endif 12746 #endif 12747 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12748 PHYMOD_SYMBOL_FLAG_REGISTER, 12749 "AN_X4_LP_MP1024_UP4r", 12750 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12751 "AN_X4_HW_LP_PAGES_LP_MP1024_UP4", 12752 NULL, 12753 #endif 12754 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12755 0x0, /* 0 */ 12756 0, 12757 #endif 12758 }, 12759 { 12760 BCMI_QSGMIIE_SERDES_AN_X4_LP_BASE_PAGE1r, 12761 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12762 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12763 BCMI_QSGMIIE_SERDES_AN_X4_LP_BASE_PAGE1r_fields, 12764 #else 12765 0, 12766 #endif 12767 #endif 12768 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12769 PHYMOD_SYMBOL_FLAG_REGISTER, 12770 "AN_X4_LP_BASE_PAGE1r", 12771 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12772 "AN_X4_HW_LP_PAGES_LP_BASE_PAGE1", 12773 NULL, 12774 #endif 12775 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12776 0x0, /* 0 */ 12777 0, 12778 #endif 12779 }, 12780 { 12781 BCMI_QSGMIIE_SERDES_AN_X4_LP_BASE_PAGE2r, 12782 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12783 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12784 BCMI_QSGMIIE_SERDES_AN_X4_LP_BASE_PAGE2r_fields, 12785 #else 12786 0, 12787 #endif 12788 #endif 12789 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12790 PHYMOD_SYMBOL_FLAG_REGISTER, 12791 "AN_X4_LP_BASE_PAGE2r", 12792 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12793 "AN_X4_HW_LP_PAGES_LP_BASE_PAGE2", 12794 NULL, 12795 #endif 12796 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12797 0x0, /* 0 */ 12798 0, 12799 #endif 12800 }, 12801 { 12802 BCMI_QSGMIIE_SERDES_AN_X4_LP_BASE_PAGE3r, 12803 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12804 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12805 BCMI_QSGMIIE_SERDES_AN_X4_LP_BASE_PAGE3r_fields, 12806 #else 12807 0, 12808 #endif 12809 #endif 12810 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12811 PHYMOD_SYMBOL_FLAG_REGISTER, 12812 "AN_X4_LP_BASE_PAGE3r", 12813 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12814 "AN_X4_HW_LP_PAGES_LP_BASE_PAGE3", 12815 NULL, 12816 #endif 12817 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12818 0x0, /* 0 */ 12819 0, 12820 #endif 12821 }, 12822 { 12823 BCMI_QSGMIIE_SERDES_AN_X4_LD_PAGE2r, 12824 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12825 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12826 BCMI_QSGMIIE_SERDES_AN_X4_LD_PAGE2r_fields, 12827 #else 12828 0, 12829 #endif 12830 #endif 12831 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12832 PHYMOD_SYMBOL_FLAG_REGISTER, 12833 "AN_X4_LD_PAGE2r", 12834 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12835 "AN_X4_SW_MANAGEMENT_LD_PAGE_2", 12836 NULL, 12837 #endif 12838 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12839 0x0, /* 0 */ 12840 0, 12841 #endif 12842 }, 12843 { 12844 BCMI_QSGMIIE_SERDES_AN_X4_LD_PAGE1r, 12845 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12846 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12847 BCMI_QSGMIIE_SERDES_AN_X4_LD_PAGE1r_fields, 12848 #else 12849 0, 12850 #endif 12851 #endif 12852 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12853 PHYMOD_SYMBOL_FLAG_REGISTER, 12854 "AN_X4_LD_PAGE1r", 12855 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12856 "AN_X4_SW_MANAGEMENT_LD_PAGE_1", 12857 NULL, 12858 #endif 12859 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12860 0x0, /* 0 */ 12861 0, 12862 #endif 12863 }, 12864 { 12865 BCMI_QSGMIIE_SERDES_AN_X4_LD_PAGE0r, 12866 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12867 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12868 BCMI_QSGMIIE_SERDES_AN_X4_LD_PAGE0r_fields, 12869 #else 12870 0, 12871 #endif 12872 #endif 12873 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12874 PHYMOD_SYMBOL_FLAG_REGISTER, 12875 "AN_X4_LD_PAGE0r", 12876 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12877 "AN_X4_SW_MANAGEMENT_LD_PAGE_0", 12878 NULL, 12879 #endif 12880 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12881 0x0, /* 0 */ 12882 0, 12883 #endif 12884 }, 12885 { 12886 BCMI_QSGMIIE_SERDES_AN_X4_LP_PAGE2r, 12887 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12888 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12889 BCMI_QSGMIIE_SERDES_AN_X4_LP_PAGE2r_fields, 12890 #else 12891 0, 12892 #endif 12893 #endif 12894 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12895 PHYMOD_SYMBOL_FLAG_REGISTER, 12896 "AN_X4_LP_PAGE2r", 12897 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12898 "AN_X4_SW_MANAGEMENT_LP_PAGE_2", 12899 NULL, 12900 #endif 12901 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12902 0x0, /* 0 */ 12903 0, 12904 #endif 12905 }, 12906 { 12907 BCMI_QSGMIIE_SERDES_AN_X4_LP_PAGE1r, 12908 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12909 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12910 BCMI_QSGMIIE_SERDES_AN_X4_LP_PAGE1r_fields, 12911 #else 12912 0, 12913 #endif 12914 #endif 12915 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12916 PHYMOD_SYMBOL_FLAG_REGISTER, 12917 "AN_X4_LP_PAGE1r", 12918 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12919 "AN_X4_SW_MANAGEMENT_LP_PAGE_1", 12920 NULL, 12921 #endif 12922 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12923 0x0, /* 0 */ 12924 0, 12925 #endif 12926 }, 12927 { 12928 BCMI_QSGMIIE_SERDES_AN_X4_LP_PAGE0r, 12929 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12930 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12931 BCMI_QSGMIIE_SERDES_AN_X4_LP_PAGE0r_fields, 12932 #else 12933 0, 12934 #endif 12935 #endif 12936 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12937 PHYMOD_SYMBOL_FLAG_REGISTER, 12938 "AN_X4_LP_PAGE0r", 12939 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12940 "AN_X4_SW_MANAGEMENT_LP_PAGE_0", 12941 NULL, 12942 #endif 12943 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12944 0x0, /* 0 */ 12945 0, 12946 #endif 12947 }, 12948 { 12949 BCMI_QSGMIIE_SERDES_AN_X4_SW_CTL_STSr, 12950 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12951 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12952 BCMI_QSGMIIE_SERDES_AN_X4_SW_CTL_STSr_fields, 12953 #else 12954 0, 12955 #endif 12956 #endif 12957 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12958 PHYMOD_SYMBOL_FLAG_REGISTER, 12959 "AN_X4_SW_CTL_STSr", 12960 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12961 "AN_X4_SW_MANAGEMENT_SW_CONTROL_STATUS", 12962 NULL, 12963 #endif 12964 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12965 0x0, /* 0 */ 12966 0, 12967 #endif 12968 }, 12969 { 12970 BCMI_QSGMIIE_SERDES_AN_X4_LD_CTLr, 12971 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12972 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12973 BCMI_QSGMIIE_SERDES_AN_X4_LD_CTLr_fields, 12974 #else 12975 0, 12976 #endif 12977 #endif 12978 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12979 PHYMOD_SYMBOL_FLAG_REGISTER, 12980 "AN_X4_LD_CTLr", 12981 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12982 "AN_X4_SW_MANAGEMENT_LD_CONTROL", 12983 NULL, 12984 #endif 12985 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12986 0x0, /* 0 */ 12987 0, 12988 #endif 12989 }, 12990 { 12991 BCMI_QSGMIIE_SERDES_AN_X4_AN_PAGE_SEQUENCER_STSr, 12992 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12993 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 12994 BCMI_QSGMIIE_SERDES_AN_X4_AN_PAGE_SEQUENCER_STSr_fields, 12995 #else 12996 0, 12997 #endif 12998 #endif 12999 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13000 PHYMOD_SYMBOL_FLAG_REGISTER, 13001 "AN_X4_AN_PAGE_SEQUENCER_STSr", 13002 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13003 "AN_X4_SW_MANAGEMENT_AN_PAGE_SEQUENCER_STATUS", 13004 NULL, 13005 #endif 13006 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13007 0x0, /* 0 */ 13008 0, 13009 #endif 13010 }, 13011 { 13012 BCMI_QSGMIIE_SERDES_AN_X4_AN_PAGE_EXCHANGEER_STSr, 13013 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13014 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13015 BCMI_QSGMIIE_SERDES_AN_X4_AN_PAGE_EXCHANGEER_STSr_fields, 13016 #else 13017 0, 13018 #endif 13019 #endif 13020 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13021 PHYMOD_SYMBOL_FLAG_REGISTER, 13022 "AN_X4_AN_PAGE_EXCHANGEER_STSr", 13023 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13024 "AN_X4_SW_MANAGEMENT_AN_PAGE_EXCHANGEER_STATUS", 13025 NULL, 13026 #endif 13027 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13028 0x0, /* 0 */ 13029 0, 13030 #endif 13031 }, 13032 { 13033 BCMI_QSGMIIE_SERDES_AN_X4_AN_PAGE_DECR_STSr, 13034 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13035 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13036 BCMI_QSGMIIE_SERDES_AN_X4_AN_PAGE_DECR_STSr_fields, 13037 #else 13038 0, 13039 #endif 13040 #endif 13041 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13042 PHYMOD_SYMBOL_FLAG_REGISTER, 13043 "AN_X4_AN_PAGE_DECR_STSr", 13044 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13045 "AN_X4_SW_MANAGEMENT_AN_PAGE_DECODER_STATUS", 13046 NULL, 13047 #endif 13048 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13049 0x0, /* 0 */ 13050 0, 13051 #endif 13052 }, 13053 { 13054 BCMI_QSGMIIE_SERDES_AN_X4_AN_ABIL_RESOLUTION_STSr, 13055 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13056 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13057 BCMI_QSGMIIE_SERDES_AN_X4_AN_ABIL_RESOLUTION_STSr_fields, 13058 #else 13059 0, 13060 #endif 13061 #endif 13062 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13063 PHYMOD_SYMBOL_FLAG_REGISTER, 13064 "AN_X4_AN_ABIL_RESOLUTION_STSr", 13065 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13066 "AN_X4_SW_MANAGEMENT_AN_ABILITY_RESOLUTION_STATUS", 13067 NULL, 13068 #endif 13069 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13070 0x0, /* 0 */ 13071 0, 13072 #endif 13073 }, 13074 { 13075 BCMI_QSGMIIE_SERDES_AN_X4_AN_MISC_STSr, 13076 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13077 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13078 BCMI_QSGMIIE_SERDES_AN_X4_AN_MISC_STSr_fields, 13079 #else 13080 0, 13081 #endif 13082 #endif 13083 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13084 PHYMOD_SYMBOL_FLAG_REGISTER, 13085 "AN_X4_AN_MISC_STSr", 13086 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13087 "AN_X4_SW_MANAGEMENT_AN_MISC_STATUS", 13088 NULL, 13089 #endif 13090 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13091 0x0, /* 0 */ 13092 0, 13093 #endif 13094 }, 13095 { 13096 BCMI_QSGMIIE_SERDES_AN_X4_TLA_SEQUENCER_STSr, 13097 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13098 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13099 BCMI_QSGMIIE_SERDES_AN_X4_TLA_SEQUENCER_STSr_fields, 13100 #else 13101 0, 13102 #endif 13103 #endif 13104 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13105 PHYMOD_SYMBOL_FLAG_REGISTER, 13106 "AN_X4_TLA_SEQUENCER_STSr", 13107 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13108 "AN_X4_SW_MANAGEMENT_TLA_SEQUENCER_STATUS", 13109 NULL, 13110 #endif 13111 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13112 0x1, /* 1 */ 13113 0, 13114 #endif 13115 }, 13116 { 13117 BCMI_QSGMIIE_SERDES_AN_X4_AN_SEQ_UNEXPECTED_PAGEr, 13118 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13119 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13120 BCMI_QSGMIIE_SERDES_AN_X4_AN_SEQ_UNEXPECTED_PAGEr_fields, 13121 #else 13122 0, 13123 #endif 13124 #endif 13125 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13126 PHYMOD_SYMBOL_FLAG_REGISTER, 13127 "AN_X4_AN_SEQ_UNEXPECTED_PAGEr", 13128 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13129 "AN_X4_SW_MANAGEMENT_AN_SEQ_UNEXPECTED_PAGE", 13130 NULL, 13131 #endif 13132 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13133 0x0, /* 0 */ 13134 0, 13135 #endif 13136 }, 13137 { 13138 BCMI_QSGMIIE_SERDES_CL72_LNK_CTLr, 13139 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13140 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13141 BCMI_QSGMIIE_SERDES_CL72_LNK_CTLr_fields, 13142 #else 13143 0, 13144 #endif 13145 #endif 13146 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13147 PHYMOD_SYMBOL_FLAG_REGISTER, 13148 "CL72_LNK_CTLr", 13149 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13150 "CL72_LINK_CONTROL", 13151 NULL, 13152 #endif 13153 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13154 0x0, /* 0 */ 13155 0, 13156 #endif 13157 }, 13158 { 13159 BCMI_QSGMIIE_SERDES_DIG_CTL1000X2r, 13160 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13161 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13162 BCMI_QSGMIIE_SERDES_DIG_CTL1000X2r_fields, 13163 #else 13164 0, 13165 #endif 13166 #endif 13167 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13168 PHYMOD_SYMBOL_FLAG_REGISTER, 13169 "DIG_CTL1000X2r", 13170 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13171 "DIGITAL_CONTROL1000X2", 13172 NULL, 13173 #endif 13174 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13175 0x0, /* 0 */ 13176 0, 13177 #endif 13178 }, 13179 { 13180 BCMI_QSGMIIE_SERDES_DIG_SPARE0r, 13181 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13182 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13183 BCMI_QSGMIIE_SERDES_DIG_SPARE0r_fields, 13184 #else 13185 0, 13186 #endif 13187 #endif 13188 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13189 PHYMOD_SYMBOL_FLAG_REGISTER, 13190 "DIG_SPARE0r", 13191 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13192 "DIGITAL_SPARE0", 13193 NULL, 13194 #endif 13195 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13196 0x0, /* 0 */ 13197 0, 13198 #endif 13199 }, 13200 { 13201 BCMI_QSGMIIE_SERDES_DIG_SPARE1r, 13202 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13203 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13204 BCMI_QSGMIIE_SERDES_DIG_SPARE1r_fields, 13205 #else 13206 0, 13207 #endif 13208 #endif 13209 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13210 PHYMOD_SYMBOL_FLAG_REGISTER, 13211 "DIG_SPARE1r", 13212 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13213 "DIGITAL_SPARE1", 13214 NULL, 13215 #endif 13216 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13217 0x0, /* 0 */ 13218 0, 13219 #endif 13220 }, 13221 { 13222 BCMI_QSGMIIE_SERDES_ILKN_CTL0r, 13223 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13224 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13225 BCMI_QSGMIIE_SERDES_ILKN_CTL0r_fields, 13226 #else 13227 0, 13228 #endif 13229 #endif 13230 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13231 PHYMOD_SYMBOL_FLAG_REGISTER, 13232 "ILKN_CTL0r", 13233 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13234 "ILKN_CONTROL0_ILKN_CONTROL0", 13235 NULL, 13236 #endif 13237 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13238 0x2, /* 2 */ 13239 0, 13240 #endif 13241 }, 13242 { 13243 BCMI_QSGMIIE_SERDES_ILKN_STS0r, 13244 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13245 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13246 BCMI_QSGMIIE_SERDES_ILKN_STS0r_fields, 13247 #else 13248 0, 13249 #endif 13250 #endif 13251 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13252 PHYMOD_SYMBOL_FLAG_REGISTER, 13253 "ILKN_STS0r", 13254 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13255 "ILKN_STATUS0_ILKN_STATUS0", 13256 NULL, 13257 #endif 13258 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13259 0x11, /* 17 */ 13260 0, 13261 #endif 13262 }, 13263 { 13264 BCMI_QSGMIIE_SERDES_ACC_CTLr, 13265 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13266 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13267 BCMI_QSGMIIE_SERDES_ACC_CTLr_fields, 13268 #else 13269 0, 13270 #endif 13271 #endif 13272 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13273 PHYMOD_SYMBOL_FLAG_REGISTER, 13274 "ACC_CTLr", 13275 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13276 "MDIO_CL22_IEEE_COM_ACC_CTRL", 13277 NULL, 13278 #endif 13279 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13280 0x0, /* 0 */ 13281 0, 13282 #endif 13283 }, 13284 { 13285 BCMI_QSGMIIE_SERDES_ACC_ADDR_DATAr, 13286 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13287 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13288 BCMI_QSGMIIE_SERDES_ACC_ADDR_DATAr_fields, 13289 #else 13290 0, 13291 #endif 13292 #endif 13293 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13294 PHYMOD_SYMBOL_FLAG_REGISTER, 13295 "ACC_ADDR_DATAr", 13296 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13297 "MDIO_CL22_IEEE_COM_ACC_ADDR_DATA", 13298 NULL, 13299 #endif 13300 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13301 0x0, /* 0 */ 13302 0, 13303 #endif 13304 }, 13305 { 13306 BCMI_QSGMIIE_SERDES_CL72_TXBASE_R_PMD_CTLr, 13307 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13308 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13309 BCMI_QSGMIIE_SERDES_CL72_TXBASE_R_PMD_CTLr_fields, 13310 #else 13311 0, 13312 #endif 13313 #endif 13314 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13315 PHYMOD_SYMBOL_FLAG_REGISTER, 13316 "CL72_TXBASE_R_PMD_CTLr", 13317 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13318 "CL72_IEEE_TX_BASE_R_PMD_CONTROL_REGISTER_150", 13319 NULL, 13320 #endif 13321 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13322 0x0, /* 0 */ 13323 0, 13324 #endif 13325 }, 13326 { 13327 BCMI_QSGMIIE_SERDES_CL72_TXBASE_R_PMD_STSr, 13328 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13329 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13330 BCMI_QSGMIIE_SERDES_CL72_TXBASE_R_PMD_STSr_fields, 13331 #else 13332 0, 13333 #endif 13334 #endif 13335 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13336 PHYMOD_SYMBOL_FLAG_REGISTER, 13337 "CL72_TXBASE_R_PMD_STSr", 13338 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13339 "CL72_IEEE_TX_BASE_R_PMD_STATUS_REGISTER_151", 13340 NULL, 13341 #endif 13342 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13343 0x0, /* 0 */ 13344 0, 13345 #endif 13346 }, 13347 { 13348 BCMI_QSGMIIE_SERDES_CL72_TXBASE_R_LP_COEFF_UPDr, 13349 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13350 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13351 BCMI_QSGMIIE_SERDES_CL72_TXBASE_R_LP_COEFF_UPDr_fields, 13352 #else 13353 0, 13354 #endif 13355 #endif 13356 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13357 PHYMOD_SYMBOL_FLAG_REGISTER, 13358 "CL72_TXBASE_R_LP_COEFF_UPDr", 13359 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13360 "CL72_IEEE_TX_BASE_R_LP_COEFF_UPDATE_REGISTER_152", 13361 NULL, 13362 #endif 13363 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13364 0x0, /* 0 */ 13365 0, 13366 #endif 13367 }, 13368 { 13369 BCMI_QSGMIIE_SERDES_CL72_RXBASE_R_LD_STS_REPr, 13370 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13371 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13372 BCMI_QSGMIIE_SERDES_CL72_RXBASE_R_LD_STS_REPr_fields, 13373 #else 13374 0, 13375 #endif 13376 #endif 13377 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13378 PHYMOD_SYMBOL_FLAG_REGISTER, 13379 "CL72_RXBASE_R_LD_STS_REPr", 13380 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13381 "CL72_IEEE_RX_BASE_R_LD_STATUS_REPORT_REGISTER_153", 13382 NULL, 13383 #endif 13384 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13385 0x0, /* 0 */ 13386 0, 13387 #endif 13388 }, 13389 { 13390 BCMI_QSGMIIE_SERDES_CL72_TXBASE_R_LD_COEFF_UPDr, 13391 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13392 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13393 BCMI_QSGMIIE_SERDES_CL72_TXBASE_R_LD_COEFF_UPDr_fields, 13394 #else 13395 0, 13396 #endif 13397 #endif 13398 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13399 PHYMOD_SYMBOL_FLAG_REGISTER, 13400 "CL72_TXBASE_R_LD_COEFF_UPDr", 13401 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13402 "CL72_IEEE_TX_BASE_R_LD_COEFF_UPDATE_REGISTER_154", 13403 NULL, 13404 #endif 13405 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13406 0x0, /* 0 */ 13407 0, 13408 #endif 13409 }, 13410 { 13411 BCMI_QSGMIIE_SERDES_CL72_TXBASE_R_LD_STS_REPr, 13412 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13413 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13414 BCMI_QSGMIIE_SERDES_CL72_TXBASE_R_LD_STS_REPr_fields, 13415 #else 13416 0, 13417 #endif 13418 #endif 13419 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13420 PHYMOD_SYMBOL_FLAG_REGISTER, 13421 "CL72_TXBASE_R_LD_STS_REPr", 13422 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13423 "CL72_IEEE_TX_BASE_R_LD_STATUS_REPORT_REGISTER_155", 13424 NULL, 13425 #endif 13426 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13427 0x0, /* 0 */ 13428 0, 13429 #endif 13430 }, 13431 { 13432 BCMI_QSGMIIE_SERDES_DSC_CDR_CTL0r, 13433 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13434 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13435 BCMI_QSGMIIE_SERDES_DSC_CDR_CTL0r_fields, 13436 #else 13437 0, 13438 #endif 13439 #endif 13440 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13441 PHYMOD_SYMBOL_FLAG_REGISTER, 13442 "DSC_CDR_CTL0r", 13443 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13444 "DSC_A_CDR_CONTROL_0", 13445 NULL, 13446 #endif 13447 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13448 0x4, /* 4 */ 13449 0, 13450 #endif 13451 }, 13452 { 13453 BCMI_QSGMIIE_SERDES_DSC_CDR_CTL1r, 13454 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13455 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13456 BCMI_QSGMIIE_SERDES_DSC_CDR_CTL1r_fields, 13457 #else 13458 0, 13459 #endif 13460 #endif 13461 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13462 PHYMOD_SYMBOL_FLAG_REGISTER, 13463 "DSC_CDR_CTL1r", 13464 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13465 "DSC_A_CDR_CONTROL_1", 13466 NULL, 13467 #endif 13468 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13469 0x690, /* 1680 */ 13470 0, 13471 #endif 13472 }, 13473 { 13474 BCMI_QSGMIIE_SERDES_DSC_CDR_CTL2r, 13475 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13476 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13477 BCMI_QSGMIIE_SERDES_DSC_CDR_CTL2r_fields, 13478 #else 13479 0, 13480 #endif 13481 #endif 13482 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13483 PHYMOD_SYMBOL_FLAG_REGISTER, 13484 "DSC_CDR_CTL2r", 13485 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13486 "DSC_A_CDR_CONTROL_2", 13487 NULL, 13488 #endif 13489 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13490 0xf0, /* 240 */ 13491 0, 13492 #endif 13493 }, 13494 { 13495 BCMI_QSGMIIE_SERDES_DSC_RX_PI_CTLr, 13496 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13497 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13498 BCMI_QSGMIIE_SERDES_DSC_RX_PI_CTLr_fields, 13499 #else 13500 0, 13501 #endif 13502 #endif 13503 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13504 PHYMOD_SYMBOL_FLAG_REGISTER, 13505 "DSC_RX_PI_CTLr", 13506 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13507 "DSC_A_RX_PI_CONTROL", 13508 NULL, 13509 #endif 13510 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13511 0x0, /* 0 */ 13512 0, 13513 #endif 13514 }, 13515 { 13516 BCMI_QSGMIIE_SERDES_DSC_CDR_STS_INTEGr, 13517 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13518 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13519 BCMI_QSGMIIE_SERDES_DSC_CDR_STS_INTEGr_fields, 13520 #else 13521 0, 13522 #endif 13523 #endif 13524 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13525 PHYMOD_SYMBOL_FLAG_REGISTER, 13526 "DSC_CDR_STS_INTEGr", 13527 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13528 "DSC_A_CDR_STATUS_INTEG_REG", 13529 NULL, 13530 #endif 13531 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13532 0x0, /* 0 */ 13533 0, 13534 #endif 13535 }, 13536 { 13537 BCMI_QSGMIIE_SERDES_DSC_CDR_STS_PHASE_ERRr, 13538 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13539 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13540 BCMI_QSGMIIE_SERDES_DSC_CDR_STS_PHASE_ERRr_fields, 13541 #else 13542 0, 13543 #endif 13544 #endif 13545 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13546 PHYMOD_SYMBOL_FLAG_REGISTER, 13547 "DSC_CDR_STS_PHASE_ERRr", 13548 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13549 "DSC_A_CDR_STATUS_PHASE_ERROR", 13550 NULL, 13551 #endif 13552 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13553 0x100, /* 256 */ 13554 0, 13555 #endif 13556 }, 13557 { 13558 BCMI_QSGMIIE_SERDES_DSC_RX_PI_CNT_BIN_Dr, 13559 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13560 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13561 BCMI_QSGMIIE_SERDES_DSC_RX_PI_CNT_BIN_Dr_fields, 13562 #else 13563 0, 13564 #endif 13565 #endif 13566 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13567 PHYMOD_SYMBOL_FLAG_REGISTER, 13568 "DSC_RX_PI_CNT_BIN_Dr", 13569 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13570 "DSC_A_RX_PI_CNT_BIN_D", 13571 NULL, 13572 #endif 13573 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13574 0x0, /* 0 */ 13575 0, 13576 #endif 13577 }, 13578 { 13579 BCMI_QSGMIIE_SERDES_DSC_RX_PI_CNT_BIN_Pr, 13580 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13581 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13582 BCMI_QSGMIIE_SERDES_DSC_RX_PI_CNT_BIN_Pr_fields, 13583 #else 13584 0, 13585 #endif 13586 #endif 13587 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13588 PHYMOD_SYMBOL_FLAG_REGISTER, 13589 "DSC_RX_PI_CNT_BIN_Pr", 13590 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13591 "DSC_A_RX_PI_CNT_BIN_P", 13592 NULL, 13593 #endif 13594 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13595 0x2000, /* 8192 */ 13596 0, 13597 #endif 13598 }, 13599 { 13600 BCMI_QSGMIIE_SERDES_DSC_RX_PI_CNT_BIN_Mr, 13601 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13602 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13603 BCMI_QSGMIIE_SERDES_DSC_RX_PI_CNT_BIN_Mr_fields, 13604 #else 13605 0, 13606 #endif 13607 #endif 13608 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13609 PHYMOD_SYMBOL_FLAG_REGISTER, 13610 "DSC_RX_PI_CNT_BIN_Mr", 13611 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13612 "DSC_A_RX_PI_CNT_BIN_M", 13613 NULL, 13614 #endif 13615 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13616 0x20, /* 32 */ 13617 0, 13618 #endif 13619 }, 13620 { 13621 BCMI_QSGMIIE_SERDES_DSC_RX_PI_DIFF_BINr, 13622 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13623 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13624 BCMI_QSGMIIE_SERDES_DSC_RX_PI_DIFF_BINr_fields, 13625 #else 13626 0, 13627 #endif 13628 #endif 13629 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13630 PHYMOD_SYMBOL_FLAG_REGISTER, 13631 "DSC_RX_PI_DIFF_BINr", 13632 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13633 "DSC_A_RX_PI_DIFF_BIN", 13634 NULL, 13635 #endif 13636 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13637 0x0, /* 0 */ 13638 0, 13639 #endif 13640 }, 13641 { 13642 BCMI_QSGMIIE_SERDES_DSC_TRNSUM_CTL5r, 13643 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13644 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13645 BCMI_QSGMIIE_SERDES_DSC_TRNSUM_CTL5r_fields, 13646 #else 13647 0, 13648 #endif 13649 #endif 13650 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13651 PHYMOD_SYMBOL_FLAG_REGISTER, 13652 "DSC_TRNSUM_CTL5r", 13653 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13654 "DSC_A_TRNSUM_CNTL_5", 13655 NULL, 13656 #endif 13657 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13658 0x0, /* 0 */ 13659 0, 13660 #endif 13661 }, 13662 { 13663 BCMI_QSGMIIE_SERDES_DSC_UC_CTLr, 13664 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13665 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13666 BCMI_QSGMIIE_SERDES_DSC_UC_CTLr_fields, 13667 #else 13668 0, 13669 #endif 13670 #endif 13671 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13672 PHYMOD_SYMBOL_FLAG_REGISTER, 13673 "DSC_UC_CTLr", 13674 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13675 "DSC_A_DSC_UC_CTRL", 13676 NULL, 13677 #endif 13678 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13679 0x0, /* 0 */ 13680 0, 13681 #endif 13682 }, 13683 { 13684 BCMI_QSGMIIE_SERDES_DSC_SCRATCHr, 13685 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13686 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13687 BCMI_QSGMIIE_SERDES_DSC_SCRATCHr_fields, 13688 #else 13689 0, 13690 #endif 13691 #endif 13692 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13693 PHYMOD_SYMBOL_FLAG_REGISTER, 13694 "DSC_SCRATCHr", 13695 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13696 "DSC_A_DSC_SCRATCH", 13697 NULL, 13698 #endif 13699 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13700 0x0, /* 0 */ 13701 0, 13702 #endif 13703 }, 13704 { 13705 BCMI_QSGMIIE_SERDES_DSC_SM_CTL0r, 13706 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13707 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13708 BCMI_QSGMIIE_SERDES_DSC_SM_CTL0r_fields, 13709 #else 13710 0, 13711 #endif 13712 #endif 13713 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13714 PHYMOD_SYMBOL_FLAG_REGISTER, 13715 "DSC_SM_CTL0r", 13716 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13717 "DSC_B_DSC_SM_CTRL_0", 13718 NULL, 13719 #endif 13720 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13721 0x8, /* 8 */ 13722 0, 13723 #endif 13724 }, 13725 { 13726 BCMI_QSGMIIE_SERDES_DSC_SM_CTL1r, 13727 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13728 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13729 BCMI_QSGMIIE_SERDES_DSC_SM_CTL1r_fields, 13730 #else 13731 0, 13732 #endif 13733 #endif 13734 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13735 PHYMOD_SYMBOL_FLAG_REGISTER, 13736 "DSC_SM_CTL1r", 13737 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13738 "DSC_B_DSC_SM_CTRL_1", 13739 NULL, 13740 #endif 13741 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13742 0x200, /* 512 */ 13743 0, 13744 #endif 13745 }, 13746 { 13747 BCMI_QSGMIIE_SERDES_DSC_SM_CTL2r, 13748 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13749 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13750 BCMI_QSGMIIE_SERDES_DSC_SM_CTL2r_fields, 13751 #else 13752 0, 13753 #endif 13754 #endif 13755 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13756 PHYMOD_SYMBOL_FLAG_REGISTER, 13757 "DSC_SM_CTL2r", 13758 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13759 "DSC_B_DSC_SM_CTRL_2", 13760 NULL, 13761 #endif 13762 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13763 0x87, /* 135 */ 13764 0, 13765 #endif 13766 }, 13767 { 13768 BCMI_QSGMIIE_SERDES_DSC_SM_CTL3r, 13769 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13770 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13771 BCMI_QSGMIIE_SERDES_DSC_SM_CTL3r_fields, 13772 #else 13773 0, 13774 #endif 13775 #endif 13776 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13777 PHYMOD_SYMBOL_FLAG_REGISTER, 13778 "DSC_SM_CTL3r", 13779 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13780 "DSC_B_DSC_SM_CTRL_3", 13781 NULL, 13782 #endif 13783 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13784 0x1c1e, /* 7198 */ 13785 0, 13786 #endif 13787 }, 13788 { 13789 BCMI_QSGMIIE_SERDES_DSC_SM_CTL4r, 13790 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13791 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13792 BCMI_QSGMIIE_SERDES_DSC_SM_CTL4r_fields, 13793 #else 13794 0, 13795 #endif 13796 #endif 13797 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13798 PHYMOD_SYMBOL_FLAG_REGISTER, 13799 "DSC_SM_CTL4r", 13800 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13801 "DSC_B_DSC_SM_CTRL_4", 13802 NULL, 13803 #endif 13804 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13805 0x35ad, /* 13741 */ 13806 0, 13807 #endif 13808 }, 13809 { 13810 BCMI_QSGMIIE_SERDES_DSC_SM_CTL5r, 13811 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13812 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13813 BCMI_QSGMIIE_SERDES_DSC_SM_CTL5r_fields, 13814 #else 13815 0, 13816 #endif 13817 #endif 13818 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13819 PHYMOD_SYMBOL_FLAG_REGISTER, 13820 "DSC_SM_CTL5r", 13821 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13822 "DSC_B_DSC_SM_CTRL_5", 13823 NULL, 13824 #endif 13825 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13826 0x35ad, /* 13741 */ 13827 0, 13828 #endif 13829 }, 13830 { 13831 BCMI_QSGMIIE_SERDES_DSC_SM_CTL6r, 13832 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13833 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13834 BCMI_QSGMIIE_SERDES_DSC_SM_CTL6r_fields, 13835 #else 13836 0, 13837 #endif 13838 #endif 13839 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13840 PHYMOD_SYMBOL_FLAG_REGISTER, 13841 "DSC_SM_CTL6r", 13842 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13843 "DSC_B_DSC_SM_CTRL_6", 13844 NULL, 13845 #endif 13846 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13847 0x340d, /* 13325 */ 13848 0, 13849 #endif 13850 }, 13851 { 13852 BCMI_QSGMIIE_SERDES_DSC_SM_CTL7r, 13853 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13854 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13855 BCMI_QSGMIIE_SERDES_DSC_SM_CTL7r_fields, 13856 #else 13857 0, 13858 #endif 13859 #endif 13860 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13861 PHYMOD_SYMBOL_FLAG_REGISTER, 13862 "DSC_SM_CTL7r", 13863 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13864 "DSC_B_DSC_SM_CTRL_7", 13865 NULL, 13866 #endif 13867 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13868 0x0, /* 0 */ 13869 0, 13870 #endif 13871 }, 13872 { 13873 BCMI_QSGMIIE_SERDES_DSC_SM_CTL8r, 13874 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13875 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13876 BCMI_QSGMIIE_SERDES_DSC_SM_CTL8r_fields, 13877 #else 13878 0, 13879 #endif 13880 #endif 13881 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13882 PHYMOD_SYMBOL_FLAG_REGISTER, 13883 "DSC_SM_CTL8r", 13884 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13885 "DSC_B_DSC_SM_CTRL_8", 13886 NULL, 13887 #endif 13888 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13889 0x11, /* 17 */ 13890 0, 13891 #endif 13892 }, 13893 { 13894 BCMI_QSGMIIE_SERDES_DSC_SM_CTL9r, 13895 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13896 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13897 BCMI_QSGMIIE_SERDES_DSC_SM_CTL9r_fields, 13898 #else 13899 0, 13900 #endif 13901 #endif 13902 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13903 PHYMOD_SYMBOL_FLAG_REGISTER, 13904 "DSC_SM_CTL9r", 13905 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13906 "DSC_B_DSC_SM_CTRL_9", 13907 NULL, 13908 #endif 13909 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13910 0x0, /* 0 */ 13911 0, 13912 #endif 13913 }, 13914 { 13915 BCMI_QSGMIIE_SERDES_DSC_SM_STS_DSC_LOCKr, 13916 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13917 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13918 BCMI_QSGMIIE_SERDES_DSC_SM_STS_DSC_LOCKr_fields, 13919 #else 13920 0, 13921 #endif 13922 #endif 13923 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13924 PHYMOD_SYMBOL_FLAG_REGISTER, 13925 "DSC_SM_STS_DSC_LOCKr", 13926 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13927 "DSC_B_DSC_SM_STATUS_DSC_LOCK", 13928 NULL, 13929 #endif 13930 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13931 0x0, /* 0 */ 13932 0, 13933 #endif 13934 }, 13935 { 13936 BCMI_QSGMIIE_SERDES_DSC_SM_STS_DSC_ST_ONE_HOTr, 13937 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13938 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13939 BCMI_QSGMIIE_SERDES_DSC_SM_STS_DSC_ST_ONE_HOTr_fields, 13940 #else 13941 0, 13942 #endif 13943 #endif 13944 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13945 PHYMOD_SYMBOL_FLAG_REGISTER, 13946 "DSC_SM_STS_DSC_ST_ONE_HOTr", 13947 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13948 "DSC_B_DSC_SM_STATUS_DSC_STATE_ONE_HOT", 13949 NULL, 13950 #endif 13951 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13952 0x0, /* 0 */ 13953 0, 13954 #endif 13955 }, 13956 { 13957 BCMI_QSGMIIE_SERDES_DSC_SM_STS_DSC_ST_EEE_ONE_HOTr, 13958 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13959 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13960 BCMI_QSGMIIE_SERDES_DSC_SM_STS_DSC_ST_EEE_ONE_HOTr_fields, 13961 #else 13962 0, 13963 #endif 13964 #endif 13965 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13966 PHYMOD_SYMBOL_FLAG_REGISTER, 13967 "DSC_SM_STS_DSC_ST_EEE_ONE_HOTr", 13968 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13969 "DSC_B_DSC_SM_STATUS_DSC_STATE_EEE_ONE_HOT", 13970 NULL, 13971 #endif 13972 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13973 0x0, /* 0 */ 13974 0, 13975 #endif 13976 }, 13977 { 13978 BCMI_QSGMIIE_SERDES_DSC_SM_STS_RESTARTr, 13979 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13980 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 13981 BCMI_QSGMIIE_SERDES_DSC_SM_STS_RESTARTr_fields, 13982 #else 13983 0, 13984 #endif 13985 #endif 13986 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13987 PHYMOD_SYMBOL_FLAG_REGISTER, 13988 "DSC_SM_STS_RESTARTr", 13989 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13990 "DSC_B_DSC_SM_STATUS_RESTART", 13991 NULL, 13992 #endif 13993 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13994 0x0, /* 0 */ 13995 0, 13996 #endif 13997 }, 13998 { 13999 BCMI_QSGMIIE_SERDES_DSC_SM_STS_DSC_STr, 14000 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14001 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14002 BCMI_QSGMIIE_SERDES_DSC_SM_STS_DSC_STr_fields, 14003 #else 14004 0, 14005 #endif 14006 #endif 14007 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14008 PHYMOD_SYMBOL_FLAG_REGISTER, 14009 "DSC_SM_STS_DSC_STr", 14010 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14011 "DSC_B_DSC_SM_STATUS_DSC_STATE", 14012 NULL, 14013 #endif 14014 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14015 0x0, /* 0 */ 14016 0, 14017 #endif 14018 }, 14019 { 14020 BCMI_QSGMIIE_SERDES_DSC_DFE_COMMON_CTLr, 14021 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14022 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14023 BCMI_QSGMIIE_SERDES_DSC_DFE_COMMON_CTLr_fields, 14024 #else 14025 0, 14026 #endif 14027 #endif 14028 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14029 PHYMOD_SYMBOL_FLAG_REGISTER, 14030 "DSC_DFE_COMMON_CTLr", 14031 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14032 "DSC_C_DFE_COMMON_CTL", 14033 NULL, 14034 #endif 14035 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14036 0x0, /* 0 */ 14037 0, 14038 #endif 14039 }, 14040 { 14041 BCMI_QSGMIIE_SERDES_DSC_DFE_1_CTLr, 14042 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14043 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14044 BCMI_QSGMIIE_SERDES_DSC_DFE_1_CTLr_fields, 14045 #else 14046 0, 14047 #endif 14048 #endif 14049 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14050 PHYMOD_SYMBOL_FLAG_REGISTER, 14051 "DSC_DFE_1_CTLr", 14052 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14053 "DSC_C_DFE_1_CTL", 14054 NULL, 14055 #endif 14056 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14057 0x0, /* 0 */ 14058 0, 14059 #endif 14060 }, 14061 { 14062 BCMI_QSGMIIE_SERDES_DSC_DFE_1_PAT_CTLr, 14063 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14064 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14065 BCMI_QSGMIIE_SERDES_DSC_DFE_1_PAT_CTLr_fields, 14066 #else 14067 0, 14068 #endif 14069 #endif 14070 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14071 PHYMOD_SYMBOL_FLAG_REGISTER, 14072 "DSC_DFE_1_PAT_CTLr", 14073 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14074 "DSC_C_DFE_1_PAT_CTL", 14075 NULL, 14076 #endif 14077 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14078 0x0, /* 0 */ 14079 0, 14080 #endif 14081 }, 14082 { 14083 BCMI_QSGMIIE_SERDES_DSC_DFE_2_CTLr, 14084 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14085 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14086 BCMI_QSGMIIE_SERDES_DSC_DFE_2_CTLr_fields, 14087 #else 14088 0, 14089 #endif 14090 #endif 14091 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14092 PHYMOD_SYMBOL_FLAG_REGISTER, 14093 "DSC_DFE_2_CTLr", 14094 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14095 "DSC_C_DFE_2_CTL", 14096 NULL, 14097 #endif 14098 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14099 0x0, /* 0 */ 14100 0, 14101 #endif 14102 }, 14103 { 14104 BCMI_QSGMIIE_SERDES_DSC_DFE_2_PAT_CTLr, 14105 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14106 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14107 BCMI_QSGMIIE_SERDES_DSC_DFE_2_PAT_CTLr_fields, 14108 #else 14109 0, 14110 #endif 14111 #endif 14112 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14113 PHYMOD_SYMBOL_FLAG_REGISTER, 14114 "DSC_DFE_2_PAT_CTLr", 14115 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14116 "DSC_C_DFE_2_PAT_CTL", 14117 NULL, 14118 #endif 14119 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14120 0x0, /* 0 */ 14121 0, 14122 #endif 14123 }, 14124 { 14125 BCMI_QSGMIIE_SERDES_DSC_DFE_3_CTLr, 14126 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14127 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14128 BCMI_QSGMIIE_SERDES_DSC_DFE_3_CTLr_fields, 14129 #else 14130 0, 14131 #endif 14132 #endif 14133 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14134 PHYMOD_SYMBOL_FLAG_REGISTER, 14135 "DSC_DFE_3_CTLr", 14136 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14137 "DSC_C_DFE_3_CTL", 14138 NULL, 14139 #endif 14140 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14141 0x0, /* 0 */ 14142 0, 14143 #endif 14144 }, 14145 { 14146 BCMI_QSGMIIE_SERDES_DSC_DFE_3_PAT_CTLr, 14147 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14148 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14149 BCMI_QSGMIIE_SERDES_DSC_DFE_3_PAT_CTLr_fields, 14150 #else 14151 0, 14152 #endif 14153 #endif 14154 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14155 PHYMOD_SYMBOL_FLAG_REGISTER, 14156 "DSC_DFE_3_PAT_CTLr", 14157 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14158 "DSC_C_DFE_3_PAT_CTL", 14159 NULL, 14160 #endif 14161 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14162 0x0, /* 0 */ 14163 0, 14164 #endif 14165 }, 14166 { 14167 BCMI_QSGMIIE_SERDES_DSC_DFE_4_CTLr, 14168 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14169 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14170 BCMI_QSGMIIE_SERDES_DSC_DFE_4_CTLr_fields, 14171 #else 14172 0, 14173 #endif 14174 #endif 14175 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14176 PHYMOD_SYMBOL_FLAG_REGISTER, 14177 "DSC_DFE_4_CTLr", 14178 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14179 "DSC_C_DFE_4_CTL", 14180 NULL, 14181 #endif 14182 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14183 0x0, /* 0 */ 14184 0, 14185 #endif 14186 }, 14187 { 14188 BCMI_QSGMIIE_SERDES_DSC_DFE_4_PAT_CTLr, 14189 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14190 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14191 BCMI_QSGMIIE_SERDES_DSC_DFE_4_PAT_CTLr_fields, 14192 #else 14193 0, 14194 #endif 14195 #endif 14196 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14197 PHYMOD_SYMBOL_FLAG_REGISTER, 14198 "DSC_DFE_4_PAT_CTLr", 14199 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14200 "DSC_C_DFE_4_PAT_CTL", 14201 NULL, 14202 #endif 14203 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14204 0x0, /* 0 */ 14205 0, 14206 #endif 14207 }, 14208 { 14209 BCMI_QSGMIIE_SERDES_DSC_DFE_5_CTLr, 14210 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14211 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14212 BCMI_QSGMIIE_SERDES_DSC_DFE_5_CTLr_fields, 14213 #else 14214 0, 14215 #endif 14216 #endif 14217 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14218 PHYMOD_SYMBOL_FLAG_REGISTER, 14219 "DSC_DFE_5_CTLr", 14220 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14221 "DSC_C_DFE_5_CTL", 14222 NULL, 14223 #endif 14224 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14225 0x0, /* 0 */ 14226 0, 14227 #endif 14228 }, 14229 { 14230 BCMI_QSGMIIE_SERDES_DSC_DFE_5_PAT_CTLr, 14231 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14232 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14233 BCMI_QSGMIIE_SERDES_DSC_DFE_5_PAT_CTLr_fields, 14234 #else 14235 0, 14236 #endif 14237 #endif 14238 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14239 PHYMOD_SYMBOL_FLAG_REGISTER, 14240 "DSC_DFE_5_PAT_CTLr", 14241 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14242 "DSC_C_DFE_5_PAT_CTL", 14243 NULL, 14244 #endif 14245 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14246 0x0, /* 0 */ 14247 0, 14248 #endif 14249 }, 14250 { 14251 BCMI_QSGMIIE_SERDES_DSC_DFE_VGA_OVRRr, 14252 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14253 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14254 BCMI_QSGMIIE_SERDES_DSC_DFE_VGA_OVRRr_fields, 14255 #else 14256 0, 14257 #endif 14258 #endif 14259 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14260 PHYMOD_SYMBOL_FLAG_REGISTER, 14261 "DSC_DFE_VGA_OVRRr", 14262 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14263 "DSC_C_DFE_VGA_OVERRIDE", 14264 NULL, 14265 #endif 14266 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14267 0x0, /* 0 */ 14268 0, 14269 #endif 14270 }, 14271 { 14272 BCMI_QSGMIIE_SERDES_DSC_VGA_CTLr, 14273 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14274 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14275 BCMI_QSGMIIE_SERDES_DSC_VGA_CTLr_fields, 14276 #else 14277 0, 14278 #endif 14279 #endif 14280 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14281 PHYMOD_SYMBOL_FLAG_REGISTER, 14282 "DSC_VGA_CTLr", 14283 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14284 "DSC_C_VGA_CTL", 14285 NULL, 14286 #endif 14287 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14288 0x0, /* 0 */ 14289 0, 14290 #endif 14291 }, 14292 { 14293 BCMI_QSGMIIE_SERDES_DSC_VGA_PAT_EYEDIAG_CTLr, 14294 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14295 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14296 BCMI_QSGMIIE_SERDES_DSC_VGA_PAT_EYEDIAG_CTLr_fields, 14297 #else 14298 0, 14299 #endif 14300 #endif 14301 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14302 PHYMOD_SYMBOL_FLAG_REGISTER, 14303 "DSC_VGA_PAT_EYEDIAG_CTLr", 14304 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14305 "DSC_C_VGA_PAT_EYEDIAG_CTL", 14306 NULL, 14307 #endif 14308 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14309 0x0, /* 0 */ 14310 0, 14311 #endif 14312 }, 14313 { 14314 BCMI_QSGMIIE_SERDES_DSC_P1_FRAC_OFFS_CTLr, 14315 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14316 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14317 BCMI_QSGMIIE_SERDES_DSC_P1_FRAC_OFFS_CTLr_fields, 14318 #else 14319 0, 14320 #endif 14321 #endif 14322 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14323 PHYMOD_SYMBOL_FLAG_REGISTER, 14324 "DSC_P1_FRAC_OFFS_CTLr", 14325 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14326 "DSC_C_P1_FRAC_OFFS_CTL", 14327 NULL, 14328 #endif 14329 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14330 0x0, /* 0 */ 14331 0, 14332 #endif 14333 }, 14334 { 14335 BCMI_QSGMIIE_SERDES_DSC_TRNSUM_CTL1r, 14336 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14337 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14338 BCMI_QSGMIIE_SERDES_DSC_TRNSUM_CTL1r_fields, 14339 #else 14340 0, 14341 #endif 14342 #endif 14343 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14344 PHYMOD_SYMBOL_FLAG_REGISTER, 14345 "DSC_TRNSUM_CTL1r", 14346 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14347 "DSC_D_TRNSUM_CTL_1", 14348 NULL, 14349 #endif 14350 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14351 0x0, /* 0 */ 14352 0, 14353 #endif 14354 }, 14355 { 14356 BCMI_QSGMIIE_SERDES_DSC_TRNSUM_CTL2r, 14357 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14358 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14359 BCMI_QSGMIIE_SERDES_DSC_TRNSUM_CTL2r_fields, 14360 #else 14361 0, 14362 #endif 14363 #endif 14364 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14365 PHYMOD_SYMBOL_FLAG_REGISTER, 14366 "DSC_TRNSUM_CTL2r", 14367 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14368 "DSC_D_TRNSUM_CTL_2", 14369 NULL, 14370 #endif 14371 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14372 0x0, /* 0 */ 14373 0, 14374 #endif 14375 }, 14376 { 14377 BCMI_QSGMIIE_SERDES_DSC_TRNSUM_CTL3r, 14378 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14379 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14380 BCMI_QSGMIIE_SERDES_DSC_TRNSUM_CTL3r_fields, 14381 #else 14382 0, 14383 #endif 14384 #endif 14385 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14386 PHYMOD_SYMBOL_FLAG_REGISTER, 14387 "DSC_TRNSUM_CTL3r", 14388 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14389 "DSC_D_TRNSUM_CTL_3", 14390 NULL, 14391 #endif 14392 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14393 0x0, /* 0 */ 14394 0, 14395 #endif 14396 }, 14397 { 14398 BCMI_QSGMIIE_SERDES_DSC_TRNSUM_CTL4r, 14399 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14400 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14401 BCMI_QSGMIIE_SERDES_DSC_TRNSUM_CTL4r_fields, 14402 #else 14403 0, 14404 #endif 14405 #endif 14406 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14407 PHYMOD_SYMBOL_FLAG_REGISTER, 14408 "DSC_TRNSUM_CTL4r", 14409 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14410 "DSC_D_TRNSUM_CTL_4", 14411 NULL, 14412 #endif 14413 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14414 0x0, /* 0 */ 14415 0, 14416 #endif 14417 }, 14418 { 14419 BCMI_QSGMIIE_SERDES_DSC_TRNSUM_STS1r, 14420 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14421 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14422 BCMI_QSGMIIE_SERDES_DSC_TRNSUM_STS1r_fields, 14423 #else 14424 0, 14425 #endif 14426 #endif 14427 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14428 PHYMOD_SYMBOL_FLAG_REGISTER, 14429 "DSC_TRNSUM_STS1r", 14430 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14431 "DSC_D_TRNSUM_STS_1", 14432 NULL, 14433 #endif 14434 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14435 0x0, /* 0 */ 14436 0, 14437 #endif 14438 }, 14439 { 14440 BCMI_QSGMIIE_SERDES_DSC_TRNSUM_STS2r, 14441 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14442 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14443 BCMI_QSGMIIE_SERDES_DSC_TRNSUM_STS2r_fields, 14444 #else 14445 0, 14446 #endif 14447 #endif 14448 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14449 PHYMOD_SYMBOL_FLAG_REGISTER, 14450 "DSC_TRNSUM_STS2r", 14451 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14452 "DSC_D_TRNSUM_STS_2", 14453 NULL, 14454 #endif 14455 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14456 0x0, /* 0 */ 14457 0, 14458 #endif 14459 }, 14460 { 14461 BCMI_QSGMIIE_SERDES_DSC_TRNSUM_STS3r, 14462 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14463 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14464 BCMI_QSGMIIE_SERDES_DSC_TRNSUM_STS3r_fields, 14465 #else 14466 0, 14467 #endif 14468 #endif 14469 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14470 PHYMOD_SYMBOL_FLAG_REGISTER, 14471 "DSC_TRNSUM_STS3r", 14472 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14473 "DSC_D_TRNSUM_STS_3", 14474 NULL, 14475 #endif 14476 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14477 0x0, /* 0 */ 14478 0, 14479 #endif 14480 }, 14481 { 14482 BCMI_QSGMIIE_SERDES_DSC_TRNSUM_STS4r, 14483 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14484 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14485 BCMI_QSGMIIE_SERDES_DSC_TRNSUM_STS4r_fields, 14486 #else 14487 0, 14488 #endif 14489 #endif 14490 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14491 PHYMOD_SYMBOL_FLAG_REGISTER, 14492 "DSC_TRNSUM_STS4r", 14493 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14494 "DSC_D_TRNSUM_STS_4", 14495 NULL, 14496 #endif 14497 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14498 0x0, /* 0 */ 14499 0, 14500 #endif 14501 }, 14502 { 14503 BCMI_QSGMIIE_SERDES_DSC_TRNSUM_STS5r, 14504 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14505 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14506 BCMI_QSGMIIE_SERDES_DSC_TRNSUM_STS5r_fields, 14507 #else 14508 0, 14509 #endif 14510 #endif 14511 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14512 PHYMOD_SYMBOL_FLAG_REGISTER, 14513 "DSC_TRNSUM_STS5r", 14514 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14515 "DSC_D_TRNSUM_STS_5", 14516 NULL, 14517 #endif 14518 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14519 0x0, /* 0 */ 14520 0, 14521 #endif 14522 }, 14523 { 14524 BCMI_QSGMIIE_SERDES_DSC_TRNSUM_STS6r, 14525 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14526 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14527 BCMI_QSGMIIE_SERDES_DSC_TRNSUM_STS6r_fields, 14528 #else 14529 0, 14530 #endif 14531 #endif 14532 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14533 PHYMOD_SYMBOL_FLAG_REGISTER, 14534 "DSC_TRNSUM_STS6r", 14535 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14536 "DSC_D_TRNSUM_STS_6", 14537 NULL, 14538 #endif 14539 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14540 0x0, /* 0 */ 14541 0, 14542 #endif 14543 }, 14544 { 14545 BCMI_QSGMIIE_SERDES_DSC_VGA_P1EYEDIAG_STSr, 14546 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14547 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14548 BCMI_QSGMIIE_SERDES_DSC_VGA_P1EYEDIAG_STSr_fields, 14549 #else 14550 0, 14551 #endif 14552 #endif 14553 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14554 PHYMOD_SYMBOL_FLAG_REGISTER, 14555 "DSC_VGA_P1EYEDIAG_STSr", 14556 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14557 "DSC_D_VGA_P1EYEDIAG_STS", 14558 NULL, 14559 #endif 14560 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14561 0x0, /* 0 */ 14562 0, 14563 #endif 14564 }, 14565 { 14566 BCMI_QSGMIIE_SERDES_DSC_DFE_1_STSr, 14567 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14568 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14569 BCMI_QSGMIIE_SERDES_DSC_DFE_1_STSr_fields, 14570 #else 14571 0, 14572 #endif 14573 #endif 14574 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14575 PHYMOD_SYMBOL_FLAG_REGISTER, 14576 "DSC_DFE_1_STSr", 14577 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14578 "DSC_D_DFE_1_STS", 14579 NULL, 14580 #endif 14581 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14582 0x0, /* 0 */ 14583 0, 14584 #endif 14585 }, 14586 { 14587 BCMI_QSGMIIE_SERDES_DSC_DFE_2_STSr, 14588 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14589 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14590 BCMI_QSGMIIE_SERDES_DSC_DFE_2_STSr_fields, 14591 #else 14592 0, 14593 #endif 14594 #endif 14595 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14596 PHYMOD_SYMBOL_FLAG_REGISTER, 14597 "DSC_DFE_2_STSr", 14598 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14599 "DSC_D_DFE_2_STS", 14600 NULL, 14601 #endif 14602 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14603 0x0, /* 0 */ 14604 0, 14605 #endif 14606 }, 14607 { 14608 BCMI_QSGMIIE_SERDES_DSC_DFE_3_4_5_STSr, 14609 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14610 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14611 BCMI_QSGMIIE_SERDES_DSC_DFE_3_4_5_STSr_fields, 14612 #else 14613 0, 14614 #endif 14615 #endif 14616 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14617 PHYMOD_SYMBOL_FLAG_REGISTER, 14618 "DSC_DFE_3_4_5_STSr", 14619 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14620 "DSC_D_DFE_3_4_5_STS", 14621 NULL, 14622 #endif 14623 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14624 0x0, /* 0 */ 14625 0, 14626 #endif 14627 }, 14628 { 14629 BCMI_QSGMIIE_SERDES_DSC_VGA_TAP_BINr, 14630 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14631 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14632 BCMI_QSGMIIE_SERDES_DSC_VGA_TAP_BINr_fields, 14633 #else 14634 0, 14635 #endif 14636 #endif 14637 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14638 PHYMOD_SYMBOL_FLAG_REGISTER, 14639 "DSC_VGA_TAP_BINr", 14640 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14641 "DSC_D_VGA_TAP_BIN", 14642 NULL, 14643 #endif 14644 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14645 0x0, /* 0 */ 14646 0, 14647 #endif 14648 }, 14649 { 14650 BCMI_QSGMIIE_SERDES_DSC_CTLr, 14651 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14652 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14653 BCMI_QSGMIIE_SERDES_DSC_CTLr_fields, 14654 #else 14655 0, 14656 #endif 14657 #endif 14658 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14659 PHYMOD_SYMBOL_FLAG_REGISTER, 14660 "DSC_CTLr", 14661 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14662 "DSC_E_CTRL", 14663 NULL, 14664 #endif 14665 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14666 0x20, /* 32 */ 14667 0, 14668 #endif 14669 }, 14670 { 14671 BCMI_QSGMIIE_SERDES_DSC_PF_CTLr, 14672 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14673 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14674 BCMI_QSGMIIE_SERDES_DSC_PF_CTLr_fields, 14675 #else 14676 0, 14677 #endif 14678 #endif 14679 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14680 PHYMOD_SYMBOL_FLAG_REGISTER, 14681 "DSC_PF_CTLr", 14682 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14683 "DSC_E_PF_CTRL", 14684 NULL, 14685 #endif 14686 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14687 0x0, /* 0 */ 14688 0, 14689 #endif 14690 }, 14691 { 14692 BCMI_QSGMIIE_SERDES_DSC_PF2_LOWP_CTLr, 14693 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14694 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14695 BCMI_QSGMIIE_SERDES_DSC_PF2_LOWP_CTLr_fields, 14696 #else 14697 0, 14698 #endif 14699 #endif 14700 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14701 PHYMOD_SYMBOL_FLAG_REGISTER, 14702 "DSC_PF2_LOWP_CTLr", 14703 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14704 "DSC_E_PF2_LOWP_CTRL", 14705 NULL, 14706 #endif 14707 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14708 0x0, /* 0 */ 14709 0, 14710 #endif 14711 }, 14712 { 14713 BCMI_QSGMIIE_SERDES_DSC_OFFS_ADJ_DATA_ODDr, 14714 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14715 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14716 BCMI_QSGMIIE_SERDES_DSC_OFFS_ADJ_DATA_ODDr_fields, 14717 #else 14718 0, 14719 #endif 14720 #endif 14721 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14722 PHYMOD_SYMBOL_FLAG_REGISTER, 14723 "DSC_OFFS_ADJ_DATA_ODDr", 14724 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14725 "DSC_E_OFFSET_ADJ_DATA_ODD", 14726 NULL, 14727 #endif 14728 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14729 0x0, /* 0 */ 14730 0, 14731 #endif 14732 }, 14733 { 14734 BCMI_QSGMIIE_SERDES_DSC_OFFS_ADJ_DATA_EVENr, 14735 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14736 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14737 BCMI_QSGMIIE_SERDES_DSC_OFFS_ADJ_DATA_EVENr_fields, 14738 #else 14739 0, 14740 #endif 14741 #endif 14742 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14743 PHYMOD_SYMBOL_FLAG_REGISTER, 14744 "DSC_OFFS_ADJ_DATA_EVENr", 14745 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14746 "DSC_E_OFFSET_ADJ_DATA_EVEN", 14747 NULL, 14748 #endif 14749 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14750 0x0, /* 0 */ 14751 0, 14752 #endif 14753 }, 14754 { 14755 BCMI_QSGMIIE_SERDES_DSC_OFFS_ADJ_P1_ODDr, 14756 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14757 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14758 BCMI_QSGMIIE_SERDES_DSC_OFFS_ADJ_P1_ODDr_fields, 14759 #else 14760 0, 14761 #endif 14762 #endif 14763 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14764 PHYMOD_SYMBOL_FLAG_REGISTER, 14765 "DSC_OFFS_ADJ_P1_ODDr", 14766 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14767 "DSC_E_OFFSET_ADJ_P1_ODD", 14768 NULL, 14769 #endif 14770 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14771 0x0, /* 0 */ 14772 0, 14773 #endif 14774 }, 14775 { 14776 BCMI_QSGMIIE_SERDES_DSC_OFFS_ADJ_P1_EVENr, 14777 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14778 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14779 BCMI_QSGMIIE_SERDES_DSC_OFFS_ADJ_P1_EVENr_fields, 14780 #else 14781 0, 14782 #endif 14783 #endif 14784 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14785 PHYMOD_SYMBOL_FLAG_REGISTER, 14786 "DSC_OFFS_ADJ_P1_EVENr", 14787 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14788 "DSC_E_OFFSET_ADJ_P1_EVEN", 14789 NULL, 14790 #endif 14791 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14792 0x0, /* 0 */ 14793 0, 14794 #endif 14795 }, 14796 { 14797 BCMI_QSGMIIE_SERDES_DSC_OFFS_ADJ_M1_ODDr, 14798 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14799 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14800 BCMI_QSGMIIE_SERDES_DSC_OFFS_ADJ_M1_ODDr_fields, 14801 #else 14802 0, 14803 #endif 14804 #endif 14805 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14806 PHYMOD_SYMBOL_FLAG_REGISTER, 14807 "DSC_OFFS_ADJ_M1_ODDr", 14808 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14809 "DSC_E_OFFSET_ADJ_M1_ODD", 14810 NULL, 14811 #endif 14812 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14813 0x0, /* 0 */ 14814 0, 14815 #endif 14816 }, 14817 { 14818 BCMI_QSGMIIE_SERDES_DSC_OFFS_ADJ_M1_EVENr, 14819 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14820 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14821 BCMI_QSGMIIE_SERDES_DSC_OFFS_ADJ_M1_EVENr_fields, 14822 #else 14823 0, 14824 #endif 14825 #endif 14826 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14827 PHYMOD_SYMBOL_FLAG_REGISTER, 14828 "DSC_OFFS_ADJ_M1_EVENr", 14829 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14830 "DSC_E_OFFSET_ADJ_M1_EVEN", 14831 NULL, 14832 #endif 14833 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14834 0x0, /* 0 */ 14835 0, 14836 #endif 14837 }, 14838 { 14839 BCMI_QSGMIIE_SERDES_DSC_DC_OFFSr, 14840 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14841 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14842 BCMI_QSGMIIE_SERDES_DSC_DC_OFFSr_fields, 14843 #else 14844 0, 14845 #endif 14846 #endif 14847 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14848 PHYMOD_SYMBOL_FLAG_REGISTER, 14849 "DSC_DC_OFFSr", 14850 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14851 "DSC_E_DC_OFFSET", 14852 NULL, 14853 #endif 14854 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14855 0x0, /* 0 */ 14856 0, 14857 #endif 14858 }, 14859 { 14860 BCMI_QSGMIIE_SERDES_CL72_RXRCVD_STSr, 14861 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14862 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14863 BCMI_QSGMIIE_SERDES_CL72_RXRCVD_STSr_fields, 14864 #else 14865 0, 14866 #endif 14867 #endif 14868 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14869 PHYMOD_SYMBOL_FLAG_REGISTER, 14870 "CL72_RXRCVD_STSr", 14871 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14872 "CL72_USER_RX_RCVD_STATUS_REGISTER", 14873 NULL, 14874 #endif 14875 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14876 0x0, /* 0 */ 14877 0, 14878 #endif 14879 }, 14880 { 14881 BCMI_QSGMIIE_SERDES_CL72_RXMISC1_CTLr, 14882 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14883 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14884 BCMI_QSGMIIE_SERDES_CL72_RXMISC1_CTLr_fields, 14885 #else 14886 0, 14887 #endif 14888 #endif 14889 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14890 PHYMOD_SYMBOL_FLAG_REGISTER, 14891 "CL72_RXMISC1_CTLr", 14892 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14893 "CL72_USER_RX_MISC1_CONTROL", 14894 NULL, 14895 #endif 14896 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14897 0x4, /* 4 */ 14898 0, 14899 #endif 14900 }, 14901 { 14902 BCMI_QSGMIIE_SERDES_CL72_RXDBG2r, 14903 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14904 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14905 BCMI_QSGMIIE_SERDES_CL72_RXDBG2r_fields, 14906 #else 14907 0, 14908 #endif 14909 #endif 14910 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14911 PHYMOD_SYMBOL_FLAG_REGISTER, 14912 "CL72_RXDBG2r", 14913 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14914 "CL72_USER_RX_DEBUG_2_REGISTER", 14915 NULL, 14916 #endif 14917 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14918 0x96, /* 150 */ 14919 0, 14920 #endif 14921 }, 14922 { 14923 BCMI_QSGMIIE_SERDES_CL72_RXCL72_LP_CTL_PAGEr, 14924 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14925 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14926 BCMI_QSGMIIE_SERDES_CL72_RXCL72_LP_CTL_PAGEr_fields, 14927 #else 14928 0, 14929 #endif 14930 #endif 14931 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14932 PHYMOD_SYMBOL_FLAG_REGISTER, 14933 "CL72_RXCL72_LP_CTL_PAGEr", 14934 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14935 "CL72_USER_RX_CL72_LP_CONTROL_PAGE", 14936 NULL, 14937 #endif 14938 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14939 0x0, /* 0 */ 14940 0, 14941 #endif 14942 }, 14943 { 14944 BCMI_QSGMIIE_SERDES_CL72_RXCL72_STS1r, 14945 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14946 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14947 BCMI_QSGMIIE_SERDES_CL72_RXCL72_STS1r_fields, 14948 #else 14949 0, 14950 #endif 14951 #endif 14952 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14953 PHYMOD_SYMBOL_FLAG_REGISTER, 14954 "CL72_RXCL72_STS1r", 14955 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14956 "CL72_USER_RX_CL72_STATUS1_REGISTER", 14957 NULL, 14958 #endif 14959 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14960 0x0, /* 0 */ 14961 0, 14962 #endif 14963 }, 14964 { 14965 BCMI_QSGMIIE_SERDES_CL72_TXXMT_UPDr, 14966 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14967 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14968 BCMI_QSGMIIE_SERDES_CL72_TXXMT_UPDr_fields, 14969 #else 14970 0, 14971 #endif 14972 #endif 14973 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14974 PHYMOD_SYMBOL_FLAG_REGISTER, 14975 "CL72_TXXMT_UPDr", 14976 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14977 "CL72_USER_TX_XMT_UPDATE_REGISTER", 14978 NULL, 14979 #endif 14980 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14981 0x0, /* 0 */ 14982 0, 14983 #endif 14984 }, 14985 { 14986 BCMI_QSGMIIE_SERDES_CL72_TXMISC2_CTLr, 14987 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14988 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 14989 BCMI_QSGMIIE_SERDES_CL72_TXMISC2_CTLr_fields, 14990 #else 14991 0, 14992 #endif 14993 #endif 14994 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14995 PHYMOD_SYMBOL_FLAG_REGISTER, 14996 "CL72_TXMISC2_CTLr", 14997 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14998 "CL72_USER_TX_MISC2_CONTROL", 14999 NULL, 15000 #endif 15001 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15002 0x4, /* 4 */ 15003 0, 15004 #endif 15005 }, 15006 { 15007 BCMI_QSGMIIE_SERDES_CL72_TXDBG3r, 15008 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15009 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15010 BCMI_QSGMIIE_SERDES_CL72_TXDBG3r_fields, 15011 #else 15012 0, 15013 #endif 15014 #endif 15015 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15016 PHYMOD_SYMBOL_FLAG_REGISTER, 15017 "CL72_TXDBG3r", 15018 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15019 "CL72_USER_TX_DEBUG_3_REGISTER", 15020 NULL, 15021 #endif 15022 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15023 0x2, /* 2 */ 15024 0, 15025 #endif 15026 }, 15027 { 15028 BCMI_QSGMIIE_SERDES_CL72_TXPCS_INTERFACE_CTLr, 15029 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15030 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15031 BCMI_QSGMIIE_SERDES_CL72_TXPCS_INTERFACE_CTLr_fields, 15032 #else 15033 0, 15034 #endif 15035 #endif 15036 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15037 PHYMOD_SYMBOL_FLAG_REGISTER, 15038 "CL72_TXPCS_INTERFACE_CTLr", 15039 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15040 "CL72_USER_TX_PCS_INTERFACE_CONTROL_REGISTER", 15041 NULL, 15042 #endif 15043 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15044 0x0, /* 0 */ 15045 0, 15046 #endif 15047 }, 15048 { 15049 BCMI_QSGMIIE_SERDES_CL72_TXCL72_LD_STS_PAGEr, 15050 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15051 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15052 BCMI_QSGMIIE_SERDES_CL72_TXCL72_LD_STS_PAGEr_fields, 15053 #else 15054 0, 15055 #endif 15056 #endif 15057 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15058 PHYMOD_SYMBOL_FLAG_REGISTER, 15059 "CL72_TXCL72_LD_STS_PAGEr", 15060 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15061 "CL72_USER_TX_CL72_LD_STATUS_PAGE", 15062 NULL, 15063 #endif 15064 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15065 0x0, /* 0 */ 15066 0, 15067 #endif 15068 }, 15069 { 15070 BCMI_QSGMIIE_SERDES_CL72_TXCL72_READY_FOR_CMDr, 15071 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15072 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15073 BCMI_QSGMIIE_SERDES_CL72_TXCL72_READY_FOR_CMDr_fields, 15074 #else 15075 0, 15076 #endif 15077 #endif 15078 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15079 PHYMOD_SYMBOL_FLAG_REGISTER, 15080 "CL72_TXCL72_READY_FOR_CMDr", 15081 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15082 "CL72_USER_TX_CL72_READY_FOR_CMD_REGISTER", 15083 NULL, 15084 #endif 15085 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15086 0x1, /* 1 */ 15087 0, 15088 #endif 15089 }, 15090 { 15091 BCMI_QSGMIIE_SERDES_CL72_TXKR_DFLT_CTL1r, 15092 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15093 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15094 BCMI_QSGMIIE_SERDES_CL72_TXKR_DFLT_CTL1r_fields, 15095 #else 15096 0, 15097 #endif 15098 #endif 15099 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15100 PHYMOD_SYMBOL_FLAG_REGISTER, 15101 "CL72_TXKR_DFLT_CTL1r", 15102 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15103 "CL72_USER_TX_KR_DEFAULT_CONTROL1", 15104 NULL, 15105 #endif 15106 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15107 0x588, /* 1416 */ 15108 0, 15109 #endif 15110 }, 15111 { 15112 BCMI_QSGMIIE_SERDES_CL72_TXKR_DFLT_CTL2r, 15113 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15114 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15115 BCMI_QSGMIIE_SERDES_CL72_TXKR_DFLT_CTL2r_fields, 15116 #else 15117 0, 15118 #endif 15119 #endif 15120 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15121 PHYMOD_SYMBOL_FLAG_REGISTER, 15122 "CL72_TXKR_DFLT_CTL2r", 15123 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15124 "CL72_USER_TX_KR_DEFAULT_CONTROL2", 15125 NULL, 15126 #endif 15127 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15128 0x3c, /* 60 */ 15129 0, 15130 #endif 15131 }, 15132 { 15133 BCMI_QSGMIIE_SERDES_CL72_TXMISC_COEFF_CTLr, 15134 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15135 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15136 BCMI_QSGMIIE_SERDES_CL72_TXMISC_COEFF_CTLr_fields, 15137 #else 15138 0, 15139 #endif 15140 #endif 15141 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15142 PHYMOD_SYMBOL_FLAG_REGISTER, 15143 "CL72_TXMISC_COEFF_CTLr", 15144 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15145 "CL72_USER_TX_MISC_COEFF_CONTROL", 15146 NULL, 15147 #endif 15148 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15149 0x83, /* 131 */ 15150 0, 15151 #endif 15152 }, 15153 { 15154 BCMI_QSGMIIE_SERDES_CL72_TXCL72_LD_XMT_STS_PAGE_OVRRr, 15155 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15156 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15157 BCMI_QSGMIIE_SERDES_CL72_TXCL72_LD_XMT_STS_PAGE_OVRRr_fields, 15158 #else 15159 0, 15160 #endif 15161 #endif 15162 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15163 PHYMOD_SYMBOL_FLAG_REGISTER, 15164 "CL72_TXCL72_LD_XMT_STS_PAGE_OVRRr", 15165 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15166 "CL72_USER_TX_CL72_LD_XMT_STATUS_PAGE_OVERRIDE", 15167 NULL, 15168 #endif 15169 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15170 0x0, /* 0 */ 15171 0, 15172 #endif 15173 }, 15174 { 15175 BCMI_QSGMIIE_SERDES_CL72_TXCL72_TX_DBG_STSr, 15176 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15177 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15178 BCMI_QSGMIIE_SERDES_CL72_TXCL72_TX_DBG_STSr_fields, 15179 #else 15180 0, 15181 #endif 15182 #endif 15183 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15184 PHYMOD_SYMBOL_FLAG_REGISTER, 15185 "CL72_TXCL72_TX_DBG_STSr", 15186 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15187 "CL72_USER_TX_CL72_TX_DEBUG_STATUS", 15188 NULL, 15189 #endif 15190 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15191 0x0, /* 0 */ 15192 0, 15193 #endif 15194 }, 15195 { 15196 BCMI_QSGMIIE_SERDES_TX_PI_CTL0r, 15197 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15198 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15199 BCMI_QSGMIIE_SERDES_TX_PI_CTL0r_fields, 15200 #else 15201 0, 15202 #endif 15203 #endif 15204 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15205 PHYMOD_SYMBOL_FLAG_REGISTER, 15206 "TX_PI_CTL0r", 15207 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15208 "TX_PI_COM_CONTROL_0", 15209 NULL, 15210 #endif 15211 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15212 0x2000, /* 8192 */ 15213 0, 15214 #endif 15215 }, 15216 { 15217 BCMI_QSGMIIE_SERDES_TX_PI_CTL1r, 15218 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15219 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15220 BCMI_QSGMIIE_SERDES_TX_PI_CTL1r_fields, 15221 #else 15222 0, 15223 #endif 15224 #endif 15225 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15226 PHYMOD_SYMBOL_FLAG_REGISTER, 15227 "TX_PI_CTL1r", 15228 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15229 "TX_PI_COM_CONTROL_1", 15230 NULL, 15231 #endif 15232 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15233 0x0, /* 0 */ 15234 0, 15235 #endif 15236 }, 15237 { 15238 BCMI_QSGMIIE_SERDES_TX_PI_CTL2r, 15239 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15240 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15241 BCMI_QSGMIIE_SERDES_TX_PI_CTL2r_fields, 15242 #else 15243 0, 15244 #endif 15245 #endif 15246 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15247 PHYMOD_SYMBOL_FLAG_REGISTER, 15248 "TX_PI_CTL2r", 15249 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15250 "TX_PI_COM_CONTROL_2", 15251 NULL, 15252 #endif 15253 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15254 0x0, /* 0 */ 15255 0, 15256 #endif 15257 }, 15258 { 15259 BCMI_QSGMIIE_SERDES_TX_PI_CTL3r, 15260 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15261 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15262 BCMI_QSGMIIE_SERDES_TX_PI_CTL3r_fields, 15263 #else 15264 0, 15265 #endif 15266 #endif 15267 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15268 PHYMOD_SYMBOL_FLAG_REGISTER, 15269 "TX_PI_CTL3r", 15270 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15271 "TX_PI_COM_CONTROL_3", 15272 NULL, 15273 #endif 15274 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15275 0x100, /* 256 */ 15276 0, 15277 #endif 15278 }, 15279 { 15280 BCMI_QSGMIIE_SERDES_TX_PI_CTL4r, 15281 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15282 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15283 BCMI_QSGMIIE_SERDES_TX_PI_CTL4r_fields, 15284 #else 15285 0, 15286 #endif 15287 #endif 15288 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15289 PHYMOD_SYMBOL_FLAG_REGISTER, 15290 "TX_PI_CTL4r", 15291 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15292 "TX_PI_COM_CONTROL_4", 15293 NULL, 15294 #endif 15295 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15296 0x4, /* 4 */ 15297 0, 15298 #endif 15299 }, 15300 { 15301 BCMI_QSGMIIE_SERDES_TX_PI_CTL6r, 15302 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15303 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15304 BCMI_QSGMIIE_SERDES_TX_PI_CTL6r_fields, 15305 #else 15306 0, 15307 #endif 15308 #endif 15309 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15310 PHYMOD_SYMBOL_FLAG_REGISTER, 15311 "TX_PI_CTL6r", 15312 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15313 "TX_PI_COM_CONTROL_6", 15314 NULL, 15315 #endif 15316 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15317 0x0, /* 0 */ 15318 0, 15319 #endif 15320 }, 15321 { 15322 BCMI_QSGMIIE_SERDES_TX_PI_STS0r, 15323 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15324 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15325 BCMI_QSGMIIE_SERDES_TX_PI_STS0r_fields, 15326 #else 15327 0, 15328 #endif 15329 #endif 15330 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15331 PHYMOD_SYMBOL_FLAG_REGISTER, 15332 "TX_PI_STS0r", 15333 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15334 "TX_PI_COM_STATUS_0", 15335 NULL, 15336 #endif 15337 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15338 0x0, /* 0 */ 15339 0, 15340 #endif 15341 }, 15342 { 15343 BCMI_QSGMIIE_SERDES_TX_PI_STS1r, 15344 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15345 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15346 BCMI_QSGMIIE_SERDES_TX_PI_STS1r_fields, 15347 #else 15348 0, 15349 #endif 15350 #endif 15351 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15352 PHYMOD_SYMBOL_FLAG_REGISTER, 15353 "TX_PI_STS1r", 15354 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15355 "TX_PI_COM_STATUS_1", 15356 NULL, 15357 #endif 15358 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15359 0x0, /* 0 */ 15360 0, 15361 #endif 15362 }, 15363 { 15364 BCMI_QSGMIIE_SERDES_TX_PI_STS2r, 15365 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15366 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15367 BCMI_QSGMIIE_SERDES_TX_PI_STS2r_fields, 15368 #else 15369 0, 15370 #endif 15371 #endif 15372 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15373 PHYMOD_SYMBOL_FLAG_REGISTER, 15374 "TX_PI_STS2r", 15375 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15376 "TX_PI_COM_STATUS_2", 15377 NULL, 15378 #endif 15379 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15380 0x0, /* 0 */ 15381 0, 15382 #endif 15383 }, 15384 { 15385 BCMI_QSGMIIE_SERDES_TX_PI_STS3r, 15386 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15387 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15388 BCMI_QSGMIIE_SERDES_TX_PI_STS3r_fields, 15389 #else 15390 0, 15391 #endif 15392 #endif 15393 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15394 PHYMOD_SYMBOL_FLAG_REGISTER, 15395 "TX_PI_STS3r", 15396 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15397 "TX_PI_COM_STATUS_3", 15398 NULL, 15399 #endif 15400 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15401 0x0, /* 0 */ 15402 0, 15403 #endif 15404 }, 15405 { 15406 BCMI_QSGMIIE_SERDES_CKRST_OSR_MODE_CTLr, 15407 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15408 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15409 BCMI_QSGMIIE_SERDES_CKRST_OSR_MODE_CTLr_fields, 15410 #else 15411 0, 15412 #endif 15413 #endif 15414 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15415 PHYMOD_SYMBOL_FLAG_REGISTER, 15416 "CKRST_OSR_MODE_CTLr", 15417 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15418 "CKRST_CTRL_OSR_MODE_CONTROL", 15419 NULL, 15420 #endif 15421 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15422 0x0, /* 0 */ 15423 0, 15424 #endif 15425 }, 15426 { 15427 BCMI_QSGMIIE_SERDES_CKRST_LN_CLK_RST_N_PWRDWN_CTLr, 15428 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15429 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15430 BCMI_QSGMIIE_SERDES_CKRST_LN_CLK_RST_N_PWRDWN_CTLr_fields, 15431 #else 15432 0, 15433 #endif 15434 #endif 15435 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15436 PHYMOD_SYMBOL_FLAG_REGISTER, 15437 "CKRST_LN_CLK_RST_N_PWRDWN_CTLr", 15438 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15439 "CKRST_CTRL_LANE_CLK_RESET_N_POWERDOWN_CONTROL", 15440 NULL, 15441 #endif 15442 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15443 0x0, /* 0 */ 15444 0, 15445 #endif 15446 }, 15447 { 15448 BCMI_QSGMIIE_SERDES_CKRST_LN_AFE_RST_PWRDWN_CTL_CTLr, 15449 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15450 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15451 BCMI_QSGMIIE_SERDES_CKRST_LN_AFE_RST_PWRDWN_CTL_CTLr_fields, 15452 #else 15453 0, 15454 #endif 15455 #endif 15456 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15457 PHYMOD_SYMBOL_FLAG_REGISTER, 15458 "CKRST_LN_AFE_RST_PWRDWN_CTL_CTLr", 15459 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15460 "CKRST_CTRL_LANE_AFE_RESET_PWRDWN_CONTROL_CONTROL", 15461 NULL, 15462 #endif 15463 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15464 0x0, /* 0 */ 15465 0, 15466 #endif 15467 }, 15468 { 15469 BCMI_QSGMIIE_SERDES_CKRST_LN_RST_N_PWRDN_PIN_KILL_CTLr, 15470 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15471 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15472 BCMI_QSGMIIE_SERDES_CKRST_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields, 15473 #else 15474 0, 15475 #endif 15476 #endif 15477 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15478 PHYMOD_SYMBOL_FLAG_REGISTER, 15479 "CKRST_LN_RST_N_PWRDN_PIN_KILL_CTLr", 15480 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15481 "CKRST_CTRL_LANE_RESET_N_PWRDN_PIN_KILL_CONTROL", 15482 NULL, 15483 #endif 15484 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15485 0x0, /* 0 */ 15486 0, 15487 #endif 15488 }, 15489 { 15490 BCMI_QSGMIIE_SERDES_CKRST_LN_DBG_RST_CTLr, 15491 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15492 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15493 BCMI_QSGMIIE_SERDES_CKRST_LN_DBG_RST_CTLr_fields, 15494 #else 15495 0, 15496 #endif 15497 #endif 15498 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15499 PHYMOD_SYMBOL_FLAG_REGISTER, 15500 "CKRST_LN_DBG_RST_CTLr", 15501 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15502 "CKRST_CTRL_LANE_DEBUG_RESET_CONTROL", 15503 NULL, 15504 #endif 15505 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15506 0x303, /* 771 */ 15507 0, 15508 #endif 15509 }, 15510 { 15511 BCMI_QSGMIIE_SERDES_CKRST_UC_ACK_LN_CTLr, 15512 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15513 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15514 BCMI_QSGMIIE_SERDES_CKRST_UC_ACK_LN_CTLr_fields, 15515 #else 15516 0, 15517 #endif 15518 #endif 15519 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15520 PHYMOD_SYMBOL_FLAG_REGISTER, 15521 "CKRST_UC_ACK_LN_CTLr", 15522 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15523 "CKRST_CTRL_UC_ACK_LANE_CONTROL", 15524 NULL, 15525 #endif 15526 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15527 0x0, /* 0 */ 15528 0, 15529 #endif 15530 }, 15531 { 15532 BCMI_QSGMIIE_SERDES_CKRST_LN_RST_OCC_CTLr, 15533 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15534 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15535 BCMI_QSGMIIE_SERDES_CKRST_LN_RST_OCC_CTLr_fields, 15536 #else 15537 0, 15538 #endif 15539 #endif 15540 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15541 PHYMOD_SYMBOL_FLAG_REGISTER, 15542 "CKRST_LN_RST_OCC_CTLr", 15543 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15544 "CKRST_CTRL_LANE_REG_RESET_OCCURRED_CONTROL", 15545 NULL, 15546 #endif 15547 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15548 0x1, /* 1 */ 15549 0, 15550 #endif 15551 }, 15552 { 15553 BCMI_QSGMIIE_SERDES_CKRST_CLK_N_RST_DBG_CTLr, 15554 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15555 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15556 BCMI_QSGMIIE_SERDES_CKRST_CLK_N_RST_DBG_CTLr_fields, 15557 #else 15558 0, 15559 #endif 15560 #endif 15561 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15562 PHYMOD_SYMBOL_FLAG_REGISTER, 15563 "CKRST_CLK_N_RST_DBG_CTLr", 15564 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15565 "CKRST_CTRL_CLOCK_N_RESET_DEBUG_CONTROL", 15566 NULL, 15567 #endif 15568 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15569 0x0, /* 0 */ 15570 0, 15571 #endif 15572 }, 15573 { 15574 BCMI_QSGMIIE_SERDES_CKRST_PMD_LN_MODE_STSr, 15575 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15576 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15577 BCMI_QSGMIIE_SERDES_CKRST_PMD_LN_MODE_STSr_fields, 15578 #else 15579 0, 15580 #endif 15581 #endif 15582 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15583 PHYMOD_SYMBOL_FLAG_REGISTER, 15584 "CKRST_PMD_LN_MODE_STSr", 15585 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15586 "CKRST_CTRL_PMD_LANE_MODE_STATUS", 15587 NULL, 15588 #endif 15589 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15590 0x0, /* 0 */ 15591 0, 15592 #endif 15593 }, 15594 { 15595 BCMI_QSGMIIE_SERDES_CKRST_LN_DP_RST_ST_STSr, 15596 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15597 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15598 BCMI_QSGMIIE_SERDES_CKRST_LN_DP_RST_ST_STSr_fields, 15599 #else 15600 0, 15601 #endif 15602 #endif 15603 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15604 PHYMOD_SYMBOL_FLAG_REGISTER, 15605 "CKRST_LN_DP_RST_ST_STSr", 15606 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15607 "CKRST_CTRL_LANE_DP_RESET_STATE_STATUS", 15608 NULL, 15609 #endif 15610 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15611 0x7, /* 7 */ 15612 0, 15613 #endif 15614 }, 15615 { 15616 BCMI_QSGMIIE_SERDES_CKRST_LN_MCST_MASK_CTLr, 15617 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15618 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15619 BCMI_QSGMIIE_SERDES_CKRST_LN_MCST_MASK_CTLr_fields, 15620 #else 15621 0, 15622 #endif 15623 #endif 15624 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15625 PHYMOD_SYMBOL_FLAG_REGISTER, 15626 "CKRST_LN_MCST_MASK_CTLr", 15627 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15628 "CKRST_CTRL_LANE_MULTICAST_MASK_CONTROL", 15629 NULL, 15630 #endif 15631 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15632 0x0, /* 0 */ 15633 0, 15634 #endif 15635 }, 15636 { 15637 BCMI_QSGMIIE_SERDES_CKRST_OSR_MODE_STSr, 15638 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15639 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15640 BCMI_QSGMIIE_SERDES_CKRST_OSR_MODE_STSr_fields, 15641 #else 15642 0, 15643 #endif 15644 #endif 15645 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15646 PHYMOD_SYMBOL_FLAG_REGISTER, 15647 "CKRST_OSR_MODE_STSr", 15648 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15649 "CKRST_CTRL_OSR_MODE_STATUS", 15650 NULL, 15651 #endif 15652 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15653 0x0, /* 0 */ 15654 0, 15655 #endif 15656 }, 15657 { 15658 BCMI_QSGMIIE_SERDES_CKRST_OSR_MODE_PIN_STSr, 15659 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15660 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15661 BCMI_QSGMIIE_SERDES_CKRST_OSR_MODE_PIN_STSr_fields, 15662 #else 15663 0, 15664 #endif 15665 #endif 15666 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15667 PHYMOD_SYMBOL_FLAG_REGISTER, 15668 "CKRST_OSR_MODE_PIN_STSr", 15669 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15670 "CKRST_CTRL_OSR_MODE_PIN_STATUS", 15671 NULL, 15672 #endif 15673 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15674 0x0, /* 0 */ 15675 0, 15676 #endif 15677 }, 15678 { 15679 BCMI_QSGMIIE_SERDES_CKRST_LN_S_RSTB_CTLr, 15680 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15681 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15682 BCMI_QSGMIIE_SERDES_CKRST_LN_S_RSTB_CTLr_fields, 15683 #else 15684 0, 15685 #endif 15686 #endif 15687 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15688 PHYMOD_SYMBOL_FLAG_REGISTER, 15689 "CKRST_LN_S_RSTB_CTLr", 15690 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15691 "CKRST_CTRL_LN_S_RSTB_CONTROL", 15692 NULL, 15693 #endif 15694 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15695 0x1, /* 1 */ 15696 0, 15697 #endif 15698 }, 15699 { 15700 BCMI_QSGMIIE_SERDES_AMS_RX_CTL0r, 15701 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15702 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15703 BCMI_QSGMIIE_SERDES_AMS_RX_CTL0r_fields, 15704 #else 15705 0, 15706 #endif 15707 #endif 15708 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15709 PHYMOD_SYMBOL_FLAG_REGISTER, 15710 "AMS_RX_CTL0r", 15711 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15712 "AMS_RX_CONTROL_0", 15713 NULL, 15714 #endif 15715 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15716 0x10, /* 16 */ 15717 0, 15718 #endif 15719 }, 15720 { 15721 BCMI_QSGMIIE_SERDES_AMS_RX_CTL1r, 15722 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15723 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15724 BCMI_QSGMIIE_SERDES_AMS_RX_CTL1r_fields, 15725 #else 15726 0, 15727 #endif 15728 #endif 15729 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15730 PHYMOD_SYMBOL_FLAG_REGISTER, 15731 "AMS_RX_CTL1r", 15732 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15733 "AMS_RX_CONTROL_1", 15734 NULL, 15735 #endif 15736 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15737 0x0, /* 0 */ 15738 0, 15739 #endif 15740 }, 15741 { 15742 BCMI_QSGMIIE_SERDES_AMS_RX_CTL2r, 15743 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15744 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15745 BCMI_QSGMIIE_SERDES_AMS_RX_CTL2r_fields, 15746 #else 15747 0, 15748 #endif 15749 #endif 15750 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15751 PHYMOD_SYMBOL_FLAG_REGISTER, 15752 "AMS_RX_CTL2r", 15753 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15754 "AMS_RX_CONTROL_2", 15755 NULL, 15756 #endif 15757 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15758 0x2800, /* 10240 */ 15759 0, 15760 #endif 15761 }, 15762 { 15763 BCMI_QSGMIIE_SERDES_AMS_RX_CTL3r, 15764 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15765 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15766 BCMI_QSGMIIE_SERDES_AMS_RX_CTL3r_fields, 15767 #else 15768 0, 15769 #endif 15770 #endif 15771 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15772 PHYMOD_SYMBOL_FLAG_REGISTER, 15773 "AMS_RX_CTL3r", 15774 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15775 "AMS_RX_CONTROL_3", 15776 NULL, 15777 #endif 15778 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15779 0x0, /* 0 */ 15780 0, 15781 #endif 15782 }, 15783 { 15784 BCMI_QSGMIIE_SERDES_AMS_RX_CTL4r, 15785 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15786 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15787 BCMI_QSGMIIE_SERDES_AMS_RX_CTL4r_fields, 15788 #else 15789 0, 15790 #endif 15791 #endif 15792 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15793 PHYMOD_SYMBOL_FLAG_REGISTER, 15794 "AMS_RX_CTL4r", 15795 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15796 "AMS_RX_CONTROL_4", 15797 NULL, 15798 #endif 15799 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15800 0x0, /* 0 */ 15801 0, 15802 #endif 15803 }, 15804 { 15805 BCMI_QSGMIIE_SERDES_AMS_RX_INTCTLr, 15806 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15807 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15808 BCMI_QSGMIIE_SERDES_AMS_RX_INTCTLr_fields, 15809 #else 15810 0, 15811 #endif 15812 #endif 15813 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15814 PHYMOD_SYMBOL_FLAG_REGISTER, 15815 "AMS_RX_INTCTLr", 15816 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15817 "AMS_RX_INTCTRL", 15818 NULL, 15819 #endif 15820 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15821 0x0, /* 0 */ 15822 0, 15823 #endif 15824 }, 15825 { 15826 BCMI_QSGMIIE_SERDES_AMS_RX_STSr, 15827 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15828 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15829 BCMI_QSGMIIE_SERDES_AMS_RX_STSr_fields, 15830 #else 15831 0, 15832 #endif 15833 #endif 15834 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15835 PHYMOD_SYMBOL_FLAG_REGISTER, 15836 "AMS_RX_STSr", 15837 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15838 "AMS_RX_STATUS", 15839 NULL, 15840 #endif 15841 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15842 0x8000, /* 32768 */ 15843 0, 15844 #endif 15845 }, 15846 { 15847 BCMI_QSGMIIE_SERDES_AMS_TX_CTL0r, 15848 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15849 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15850 BCMI_QSGMIIE_SERDES_AMS_TX_CTL0r_fields, 15851 #else 15852 0, 15853 #endif 15854 #endif 15855 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15856 PHYMOD_SYMBOL_FLAG_REGISTER, 15857 "AMS_TX_CTL0r", 15858 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15859 "AMS_TX_CONTROL_0", 15860 NULL, 15861 #endif 15862 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15863 0x80, /* 128 */ 15864 0, 15865 #endif 15866 }, 15867 { 15868 BCMI_QSGMIIE_SERDES_AMS_TX_CTL1r, 15869 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15870 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15871 BCMI_QSGMIIE_SERDES_AMS_TX_CTL1r_fields, 15872 #else 15873 0, 15874 #endif 15875 #endif 15876 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15877 PHYMOD_SYMBOL_FLAG_REGISTER, 15878 "AMS_TX_CTL1r", 15879 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15880 "AMS_TX_CONTROL_1", 15881 NULL, 15882 #endif 15883 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15884 0x0, /* 0 */ 15885 0, 15886 #endif 15887 }, 15888 { 15889 BCMI_QSGMIIE_SERDES_AMS_TX_CTL2r, 15890 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15891 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15892 BCMI_QSGMIIE_SERDES_AMS_TX_CTL2r_fields, 15893 #else 15894 0, 15895 #endif 15896 #endif 15897 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15898 PHYMOD_SYMBOL_FLAG_REGISTER, 15899 "AMS_TX_CTL2r", 15900 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15901 "AMS_TX_CONTROL_2", 15902 NULL, 15903 #endif 15904 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15905 0xc, /* 12 */ 15906 0, 15907 #endif 15908 }, 15909 { 15910 BCMI_QSGMIIE_SERDES_AMS_TX_INTCTLr, 15911 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15912 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15913 BCMI_QSGMIIE_SERDES_AMS_TX_INTCTLr_fields, 15914 #else 15915 0, 15916 #endif 15917 #endif 15918 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15919 PHYMOD_SYMBOL_FLAG_REGISTER, 15920 "AMS_TX_INTCTLr", 15921 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15922 "AMS_TX_INTCTRL", 15923 NULL, 15924 #endif 15925 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15926 0x0, /* 0 */ 15927 0, 15928 #endif 15929 }, 15930 { 15931 BCMI_QSGMIIE_SERDES_AMS_TX_STSr, 15932 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15933 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15934 BCMI_QSGMIIE_SERDES_AMS_TX_STSr_fields, 15935 #else 15936 0, 15937 #endif 15938 #endif 15939 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15940 PHYMOD_SYMBOL_FLAG_REGISTER, 15941 "AMS_TX_STSr", 15942 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15943 "AMS_TX_STATUS", 15944 NULL, 15945 #endif 15946 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15947 0x0, /* 0 */ 15948 0, 15949 #endif 15950 }, 15951 { 15952 BCMI_QSGMIIE_SERDES_AMS_CTL0r, 15953 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15954 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15955 BCMI_QSGMIIE_SERDES_AMS_CTL0r_fields, 15956 #else 15957 0, 15958 #endif 15959 #endif 15960 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15961 PHYMOD_SYMBOL_FLAG_REGISTER, 15962 "AMS_CTL0r", 15963 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15964 "AMS_COM_CONTROL_0", 15965 NULL, 15966 #endif 15967 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15968 0x0, /* 0 */ 15969 0, 15970 #endif 15971 }, 15972 { 15973 BCMI_QSGMIIE_SERDES_AMS_CTL1r, 15974 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15975 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15976 BCMI_QSGMIIE_SERDES_AMS_CTL1r_fields, 15977 #else 15978 0, 15979 #endif 15980 #endif 15981 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15982 PHYMOD_SYMBOL_FLAG_REGISTER, 15983 "AMS_CTL1r", 15984 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15985 "AMS_COM_CONTROL_1", 15986 NULL, 15987 #endif 15988 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15989 0x8001, /* 32769 */ 15990 0, 15991 #endif 15992 }, 15993 { 15994 BCMI_QSGMIIE_SERDES_AMS_CTL2r, 15995 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15996 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 15997 BCMI_QSGMIIE_SERDES_AMS_CTL2r_fields, 15998 #else 15999 0, 16000 #endif 16001 #endif 16002 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16003 PHYMOD_SYMBOL_FLAG_REGISTER, 16004 "AMS_CTL2r", 16005 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16006 "AMS_COM_CONTROL_2", 16007 NULL, 16008 #endif 16009 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16010 0x16, /* 22 */ 16011 0, 16012 #endif 16013 }, 16014 { 16015 BCMI_QSGMIIE_SERDES_AMS_CTL3r, 16016 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16017 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16018 BCMI_QSGMIIE_SERDES_AMS_CTL3r_fields, 16019 #else 16020 0, 16021 #endif 16022 #endif 16023 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16024 PHYMOD_SYMBOL_FLAG_REGISTER, 16025 "AMS_CTL3r", 16026 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16027 "AMS_COM_CONTROL_3", 16028 NULL, 16029 #endif 16030 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16031 0x0, /* 0 */ 16032 0, 16033 #endif 16034 }, 16035 { 16036 BCMI_QSGMIIE_SERDES_AMS_CTL4r, 16037 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16038 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16039 BCMI_QSGMIIE_SERDES_AMS_CTL4r_fields, 16040 #else 16041 0, 16042 #endif 16043 #endif 16044 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16045 PHYMOD_SYMBOL_FLAG_REGISTER, 16046 "AMS_CTL4r", 16047 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16048 "AMS_COM_CONTROL_4", 16049 NULL, 16050 #endif 16051 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16052 0x77, /* 119 */ 16053 0, 16054 #endif 16055 }, 16056 { 16057 BCMI_QSGMIIE_SERDES_AMS_CTL5r, 16058 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16059 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16060 BCMI_QSGMIIE_SERDES_AMS_CTL5r_fields, 16061 #else 16062 0, 16063 #endif 16064 #endif 16065 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16066 PHYMOD_SYMBOL_FLAG_REGISTER, 16067 "AMS_CTL5r", 16068 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16069 "AMS_COM_CONTROL_5", 16070 NULL, 16071 #endif 16072 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16073 0x7bc0, /* 31680 */ 16074 0, 16075 #endif 16076 }, 16077 { 16078 BCMI_QSGMIIE_SERDES_AMS_CTL6r, 16079 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16080 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16081 BCMI_QSGMIIE_SERDES_AMS_CTL6r_fields, 16082 #else 16083 0, 16084 #endif 16085 #endif 16086 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16087 PHYMOD_SYMBOL_FLAG_REGISTER, 16088 "AMS_CTL6r", 16089 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16090 "AMS_COM_CONTROL_6", 16091 NULL, 16092 #endif 16093 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16094 0x45c0, /* 17856 */ 16095 0, 16096 #endif 16097 }, 16098 { 16099 BCMI_QSGMIIE_SERDES_AMS_CTL7r, 16100 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16101 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16102 BCMI_QSGMIIE_SERDES_AMS_CTL7r_fields, 16103 #else 16104 0, 16105 #endif 16106 #endif 16107 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16108 PHYMOD_SYMBOL_FLAG_REGISTER, 16109 "AMS_CTL7r", 16110 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16111 "AMS_COM_CONTROL_7", 16112 NULL, 16113 #endif 16114 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16115 0x0, /* 0 */ 16116 0, 16117 #endif 16118 }, 16119 { 16120 BCMI_QSGMIIE_SERDES_AMS_CTL8r, 16121 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16122 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16123 BCMI_QSGMIIE_SERDES_AMS_CTL8r_fields, 16124 #else 16125 0, 16126 #endif 16127 #endif 16128 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16129 PHYMOD_SYMBOL_FLAG_REGISTER, 16130 "AMS_CTL8r", 16131 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16132 "AMS_COM_CONTROL_8", 16133 NULL, 16134 #endif 16135 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16136 0x0, /* 0 */ 16137 0, 16138 #endif 16139 }, 16140 { 16141 BCMI_QSGMIIE_SERDES_AMS_INTCTLr, 16142 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16143 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16144 BCMI_QSGMIIE_SERDES_AMS_INTCTLr_fields, 16145 #else 16146 0, 16147 #endif 16148 #endif 16149 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16150 PHYMOD_SYMBOL_FLAG_REGISTER, 16151 "AMS_INTCTLr", 16152 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16153 "AMS_COM_INTCTRL", 16154 NULL, 16155 #endif 16156 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16157 0x0, /* 0 */ 16158 0, 16159 #endif 16160 }, 16161 { 16162 BCMI_QSGMIIE_SERDES_AMS_STSr, 16163 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16164 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16165 BCMI_QSGMIIE_SERDES_AMS_STSr_fields, 16166 #else 16167 0, 16168 #endif 16169 #endif 16170 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16171 PHYMOD_SYMBOL_FLAG_REGISTER, 16172 "AMS_STSr", 16173 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16174 "AMS_COM_STATUS", 16175 NULL, 16176 #endif 16177 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16178 0x300a, /* 12298 */ 16179 0, 16180 #endif 16181 }, 16182 { 16183 BCMI_QSGMIIE_SERDES_SIGDET_CTL0r, 16184 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16185 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16186 BCMI_QSGMIIE_SERDES_SIGDET_CTL0r_fields, 16187 #else 16188 0, 16189 #endif 16190 #endif 16191 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16192 PHYMOD_SYMBOL_FLAG_REGISTER, 16193 "SIGDET_CTL0r", 16194 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16195 "SIGDET_CTRL_0", 16196 NULL, 16197 #endif 16198 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16199 0x1109, /* 4361 */ 16200 0, 16201 #endif 16202 }, 16203 { 16204 BCMI_QSGMIIE_SERDES_SIGDET_CTL1r, 16205 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16206 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16207 BCMI_QSGMIIE_SERDES_SIGDET_CTL1r_fields, 16208 #else 16209 0, 16210 #endif 16211 #endif 16212 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16213 PHYMOD_SYMBOL_FLAG_REGISTER, 16214 "SIGDET_CTL1r", 16215 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16216 "SIGDET_CTRL_1", 16217 NULL, 16218 #endif 16219 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16220 0xa008, /* 40968 */ 16221 0, 16222 #endif 16223 }, 16224 { 16225 BCMI_QSGMIIE_SERDES_SIGDET_CTL2r, 16226 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16227 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16228 BCMI_QSGMIIE_SERDES_SIGDET_CTL2r_fields, 16229 #else 16230 0, 16231 #endif 16232 #endif 16233 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16234 PHYMOD_SYMBOL_FLAG_REGISTER, 16235 "SIGDET_CTL2r", 16236 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16237 "SIGDET_CTRL_2", 16238 NULL, 16239 #endif 16240 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16241 0x3f22, /* 16162 */ 16242 0, 16243 #endif 16244 }, 16245 { 16246 BCMI_QSGMIIE_SERDES_SIGDET_STS0r, 16247 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16248 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16249 BCMI_QSGMIIE_SERDES_SIGDET_STS0r_fields, 16250 #else 16251 0, 16252 #endif 16253 #endif 16254 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16255 PHYMOD_SYMBOL_FLAG_REGISTER, 16256 "SIGDET_STS0r", 16257 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16258 "SIGDET_STATUS_0", 16259 NULL, 16260 #endif 16261 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16262 0x200, /* 512 */ 16263 0, 16264 #endif 16265 }, 16266 { 16267 BCMI_QSGMIIE_SERDES_TLB_RX_PRBS_CHK_CNT_CFGr, 16268 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16269 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16270 BCMI_QSGMIIE_SERDES_TLB_RX_PRBS_CHK_CNT_CFGr_fields, 16271 #else 16272 0, 16273 #endif 16274 #endif 16275 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16276 PHYMOD_SYMBOL_FLAG_REGISTER, 16277 "TLB_RX_PRBS_CHK_CNT_CFGr", 16278 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16279 "TLB_RX_PRBS_CHK_CNT_CONFIG", 16280 NULL, 16281 #endif 16282 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16283 0x602, /* 1538 */ 16284 0, 16285 #endif 16286 }, 16287 { 16288 BCMI_QSGMIIE_SERDES_TLB_RX_PRBS_CHK_CFGr, 16289 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16290 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16291 BCMI_QSGMIIE_SERDES_TLB_RX_PRBS_CHK_CFGr_fields, 16292 #else 16293 0, 16294 #endif 16295 #endif 16296 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16297 PHYMOD_SYMBOL_FLAG_REGISTER, 16298 "TLB_RX_PRBS_CHK_CFGr", 16299 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16300 "TLB_RX_PRBS_CHK_CONFIG", 16301 NULL, 16302 #endif 16303 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16304 0xa, /* 10 */ 16305 0, 16306 #endif 16307 }, 16308 { 16309 BCMI_QSGMIIE_SERDES_TLB_RX_DIG_LPBK_CFGr, 16310 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16311 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16312 BCMI_QSGMIIE_SERDES_TLB_RX_DIG_LPBK_CFGr_fields, 16313 #else 16314 0, 16315 #endif 16316 #endif 16317 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16318 PHYMOD_SYMBOL_FLAG_REGISTER, 16319 "TLB_RX_DIG_LPBK_CFGr", 16320 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16321 "TLB_RX_DIG_LPBK_CONFIG", 16322 NULL, 16323 #endif 16324 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16325 0x6, /* 6 */ 16326 0, 16327 #endif 16328 }, 16329 { 16330 BCMI_QSGMIIE_SERDES_TLB_RX_TLB_RX_MISC_CFGr, 16331 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16332 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16333 BCMI_QSGMIIE_SERDES_TLB_RX_TLB_RX_MISC_CFGr_fields, 16334 #else 16335 0, 16336 #endif 16337 #endif 16338 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16339 PHYMOD_SYMBOL_FLAG_REGISTER, 16340 "TLB_RX_TLB_RX_MISC_CFGr", 16341 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16342 "TLB_RX_TLB_RX_MISC_CONFIG", 16343 NULL, 16344 #endif 16345 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16346 0x0, /* 0 */ 16347 0, 16348 #endif 16349 }, 16350 { 16351 BCMI_QSGMIIE_SERDES_TLB_RX_PRBS_CHK_EN_TMR_CTLr, 16352 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16353 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16354 BCMI_QSGMIIE_SERDES_TLB_RX_PRBS_CHK_EN_TMR_CTLr_fields, 16355 #else 16356 0, 16357 #endif 16358 #endif 16359 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16360 PHYMOD_SYMBOL_FLAG_REGISTER, 16361 "TLB_RX_PRBS_CHK_EN_TMR_CTLr", 16362 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16363 "TLB_RX_PRBS_CHK_EN_TIMER_CONTROL", 16364 NULL, 16365 #endif 16366 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16367 0x0, /* 0 */ 16368 0, 16369 #endif 16370 }, 16371 { 16372 BCMI_QSGMIIE_SERDES_TLB_RX_DIG_LPBK_PD_STSr, 16373 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16374 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16375 BCMI_QSGMIIE_SERDES_TLB_RX_DIG_LPBK_PD_STSr_fields, 16376 #else 16377 0, 16378 #endif 16379 #endif 16380 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16381 PHYMOD_SYMBOL_FLAG_REGISTER, 16382 "TLB_RX_DIG_LPBK_PD_STSr", 16383 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16384 "TLB_RX_DIG_LPBK_PD_STATUS", 16385 NULL, 16386 #endif 16387 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16388 0x2, /* 2 */ 16389 0, 16390 #endif 16391 }, 16392 { 16393 BCMI_QSGMIIE_SERDES_TLB_RX_PRBS_CHK_LOCK_STSr, 16394 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16395 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16396 BCMI_QSGMIIE_SERDES_TLB_RX_PRBS_CHK_LOCK_STSr_fields, 16397 #else 16398 0, 16399 #endif 16400 #endif 16401 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16402 PHYMOD_SYMBOL_FLAG_REGISTER, 16403 "TLB_RX_PRBS_CHK_LOCK_STSr", 16404 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16405 "TLB_RX_PRBS_CHK_LOCK_STATUS", 16406 NULL, 16407 #endif 16408 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16409 0x0, /* 0 */ 16410 0, 16411 #endif 16412 }, 16413 { 16414 BCMI_QSGMIIE_SERDES_TLB_RX_PRBS_CHK_ERR_CNT_MSB_STSr, 16415 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16416 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16417 BCMI_QSGMIIE_SERDES_TLB_RX_PRBS_CHK_ERR_CNT_MSB_STSr_fields, 16418 #else 16419 0, 16420 #endif 16421 #endif 16422 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16423 PHYMOD_SYMBOL_FLAG_REGISTER, 16424 "TLB_RX_PRBS_CHK_ERR_CNT_MSB_STSr", 16425 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16426 "TLB_RX_PRBS_CHK_ERR_CNT_MSB_STATUS", 16427 NULL, 16428 #endif 16429 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16430 0x8000, /* 32768 */ 16431 0, 16432 #endif 16433 }, 16434 { 16435 BCMI_QSGMIIE_SERDES_TLB_RX_PRBS_CHK_ERR_CNT_LSB_STSr, 16436 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16437 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16438 BCMI_QSGMIIE_SERDES_TLB_RX_PRBS_CHK_ERR_CNT_LSB_STSr_fields, 16439 #else 16440 0, 16441 #endif 16442 #endif 16443 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16444 PHYMOD_SYMBOL_FLAG_REGISTER, 16445 "TLB_RX_PRBS_CHK_ERR_CNT_LSB_STSr", 16446 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16447 "TLB_RX_PRBS_CHK_ERR_CNT_LSB_STATUS", 16448 NULL, 16449 #endif 16450 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16451 0x0, /* 0 */ 16452 0, 16453 #endif 16454 }, 16455 { 16456 BCMI_QSGMIIE_SERDES_TLB_RX_PMD_RX_LOCK_STSr, 16457 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16458 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16459 BCMI_QSGMIIE_SERDES_TLB_RX_PMD_RX_LOCK_STSr_fields, 16460 #else 16461 0, 16462 #endif 16463 #endif 16464 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16465 PHYMOD_SYMBOL_FLAG_REGISTER, 16466 "TLB_RX_PMD_RX_LOCK_STSr", 16467 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16468 "TLB_RX_PMD_RX_LOCK_STATUS", 16469 NULL, 16470 #endif 16471 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16472 0x0, /* 0 */ 16473 0, 16474 #endif 16475 }, 16476 { 16477 BCMI_QSGMIIE_SERDES_TLB_TX_PATGEN_CFGr, 16478 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16479 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16480 BCMI_QSGMIIE_SERDES_TLB_TX_PATGEN_CFGr_fields, 16481 #else 16482 0, 16483 #endif 16484 #endif 16485 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16486 PHYMOD_SYMBOL_FLAG_REGISTER, 16487 "TLB_TX_PATGEN_CFGr", 16488 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16489 "TLB_TX_PATT_GEN_CONFIG", 16490 NULL, 16491 #endif 16492 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16493 0xb000, /* 45056 */ 16494 0, 16495 #endif 16496 }, 16497 { 16498 BCMI_QSGMIIE_SERDES_TLB_TX_PRBS_GEN_CFGr, 16499 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16500 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16501 BCMI_QSGMIIE_SERDES_TLB_TX_PRBS_GEN_CFGr_fields, 16502 #else 16503 0, 16504 #endif 16505 #endif 16506 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16507 PHYMOD_SYMBOL_FLAG_REGISTER, 16508 "TLB_TX_PRBS_GEN_CFGr", 16509 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16510 "TLB_TX_PRBS_GEN_CONFIG", 16511 NULL, 16512 #endif 16513 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16514 0xa, /* 10 */ 16515 0, 16516 #endif 16517 }, 16518 { 16519 BCMI_QSGMIIE_SERDES_TLB_TX_RMT_LPBK_CFGr, 16520 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16521 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16522 BCMI_QSGMIIE_SERDES_TLB_TX_RMT_LPBK_CFGr_fields, 16523 #else 16524 0, 16525 #endif 16526 #endif 16527 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16528 PHYMOD_SYMBOL_FLAG_REGISTER, 16529 "TLB_TX_RMT_LPBK_CFGr", 16530 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16531 "TLB_TX_RMT_LPBK_CONFIG", 16532 NULL, 16533 #endif 16534 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16535 0x2, /* 2 */ 16536 0, 16537 #endif 16538 }, 16539 { 16540 BCMI_QSGMIIE_SERDES_TLB_TX_TLB_TX_MISC_CFGr, 16541 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16542 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16543 BCMI_QSGMIIE_SERDES_TLB_TX_TLB_TX_MISC_CFGr_fields, 16544 #else 16545 0, 16546 #endif 16547 #endif 16548 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16549 PHYMOD_SYMBOL_FLAG_REGISTER, 16550 "TLB_TX_TLB_TX_MISC_CFGr", 16551 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16552 "TLB_TX_TLB_TX_MISC_CONFIG", 16553 NULL, 16554 #endif 16555 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16556 0x0, /* 0 */ 16557 0, 16558 #endif 16559 }, 16560 { 16561 BCMI_QSGMIIE_SERDES_TLB_TX_TX_PI_LOOP_TIMING_CFGr, 16562 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16563 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16564 BCMI_QSGMIIE_SERDES_TLB_TX_TX_PI_LOOP_TIMING_CFGr_fields, 16565 #else 16566 0, 16567 #endif 16568 #endif 16569 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16570 PHYMOD_SYMBOL_FLAG_REGISTER, 16571 "TLB_TX_TX_PI_LOOP_TIMING_CFGr", 16572 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16573 "TLB_TX_TX_PI_LOOP_TIMING_CONFIG", 16574 NULL, 16575 #endif 16576 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16577 0x0, /* 0 */ 16578 0, 16579 #endif 16580 }, 16581 { 16582 BCMI_QSGMIIE_SERDES_TLB_TX_RMT_LPBK_PD_STSr, 16583 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16584 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16585 BCMI_QSGMIIE_SERDES_TLB_TX_RMT_LPBK_PD_STSr_fields, 16586 #else 16587 0, 16588 #endif 16589 #endif 16590 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16591 PHYMOD_SYMBOL_FLAG_REGISTER, 16592 "TLB_TX_RMT_LPBK_PD_STSr", 16593 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16594 "TLB_TX_RMT_LPBK_PD_STATUS", 16595 NULL, 16596 #endif 16597 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16598 0x2, /* 2 */ 16599 0, 16600 #endif 16601 }, 16602 { 16603 BCMI_QSGMIIE_SERDES_DIG_REVID0r, 16604 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16605 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16606 BCMI_QSGMIIE_SERDES_DIG_REVID0r_fields, 16607 #else 16608 0, 16609 #endif 16610 #endif 16611 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16612 PHYMOD_SYMBOL_FLAG_REGISTER, 16613 "DIG_REVID0r", 16614 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16615 "DIG_COM_REVID0", 16616 NULL, 16617 #endif 16618 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16619 0x2da, /* 730 */ 16620 0, 16621 #endif 16622 }, 16623 { 16624 BCMI_QSGMIIE_SERDES_DIG_RST_CTL_PMDr, 16625 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16626 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16627 BCMI_QSGMIIE_SERDES_DIG_RST_CTL_PMDr_fields, 16628 #else 16629 0, 16630 #endif 16631 #endif 16632 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16633 PHYMOD_SYMBOL_FLAG_REGISTER, 16634 "DIG_RST_CTL_PMDr", 16635 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16636 "DIG_COM_RESET_CONTROL_PMD", 16637 NULL, 16638 #endif 16639 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16640 0x1, /* 1 */ 16641 0, 16642 #endif 16643 }, 16644 { 16645 BCMI_QSGMIIE_SERDES_DIG_RST_CTL_CORE_DPr, 16646 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16647 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16648 BCMI_QSGMIIE_SERDES_DIG_RST_CTL_CORE_DPr_fields, 16649 #else 16650 0, 16651 #endif 16652 #endif 16653 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16654 PHYMOD_SYMBOL_FLAG_REGISTER, 16655 "DIG_RST_CTL_CORE_DPr", 16656 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16657 "DIG_COM_RESET_CONTROL_CORE_DP", 16658 NULL, 16659 #endif 16660 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16661 0x4000, /* 16384 */ 16662 0, 16663 #endif 16664 }, 16665 { 16666 BCMI_QSGMIIE_SERDES_DIG_CORE_MCST_MASK_CTLr, 16667 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16668 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16669 BCMI_QSGMIIE_SERDES_DIG_CORE_MCST_MASK_CTLr_fields, 16670 #else 16671 0, 16672 #endif 16673 #endif 16674 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16675 PHYMOD_SYMBOL_FLAG_REGISTER, 16676 "DIG_CORE_MCST_MASK_CTLr", 16677 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16678 "DIG_COM_CORE_MULTICAST_MASK_CONRTOL", 16679 NULL, 16680 #endif 16681 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16682 0x0, /* 0 */ 16683 0, 16684 #endif 16685 }, 16686 { 16687 BCMI_QSGMIIE_SERDES_DIG_TOP_USER_CTL0r, 16688 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16689 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16690 BCMI_QSGMIIE_SERDES_DIG_TOP_USER_CTL0r_fields, 16691 #else 16692 0, 16693 #endif 16694 #endif 16695 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16696 PHYMOD_SYMBOL_FLAG_REGISTER, 16697 "DIG_TOP_USER_CTL0r", 16698 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16699 "DIG_COM_TOP_USER_CONTROL_0", 16700 NULL, 16701 #endif 16702 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16703 0x271, /* 625 */ 16704 0, 16705 #endif 16706 }, 16707 { 16708 BCMI_QSGMIIE_SERDES_DIG_UC_ACK_CORE_CTLr, 16709 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16710 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16711 BCMI_QSGMIIE_SERDES_DIG_UC_ACK_CORE_CTLr_fields, 16712 #else 16713 0, 16714 #endif 16715 #endif 16716 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16717 PHYMOD_SYMBOL_FLAG_REGISTER, 16718 "DIG_UC_ACK_CORE_CTLr", 16719 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16720 "DIG_COM_UC_ACK_CORE_CONTROL", 16721 NULL, 16722 #endif 16723 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16724 0x0, /* 0 */ 16725 0, 16726 #endif 16727 }, 16728 { 16729 BCMI_QSGMIIE_SERDES_DIG_CORE_RST_OCC_CTLr, 16730 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16731 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16732 BCMI_QSGMIIE_SERDES_DIG_CORE_RST_OCC_CTLr_fields, 16733 #else 16734 0, 16735 #endif 16736 #endif 16737 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16738 PHYMOD_SYMBOL_FLAG_REGISTER, 16739 "DIG_CORE_RST_OCC_CTLr", 16740 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16741 "DIG_COM_CORE_REG_RESET_OCCURRED_CONTROL", 16742 NULL, 16743 #endif 16744 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16745 0x1, /* 1 */ 16746 0, 16747 #endif 16748 }, 16749 { 16750 BCMI_QSGMIIE_SERDES_DIG_RST_SEQ_TMR_CTLr, 16751 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16752 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16753 BCMI_QSGMIIE_SERDES_DIG_RST_SEQ_TMR_CTLr_fields, 16754 #else 16755 0, 16756 #endif 16757 #endif 16758 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16759 PHYMOD_SYMBOL_FLAG_REGISTER, 16760 "DIG_RST_SEQ_TMR_CTLr", 16761 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16762 "DIG_COM_RST_SEQ_TIMER_CONTROL", 16763 NULL, 16764 #endif 16765 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16766 0x8304, /* 33540 */ 16767 0, 16768 #endif 16769 }, 16770 { 16771 BCMI_QSGMIIE_SERDES_DIG_CORE_DP_RST_ST_STSr, 16772 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16773 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16774 BCMI_QSGMIIE_SERDES_DIG_CORE_DP_RST_ST_STSr_fields, 16775 #else 16776 0, 16777 #endif 16778 #endif 16779 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16780 PHYMOD_SYMBOL_FLAG_REGISTER, 16781 "DIG_CORE_DP_RST_ST_STSr", 16782 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16783 "DIG_COM_CORE_DP_RESET_STATE_STATUS", 16784 NULL, 16785 #endif 16786 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16787 0x7, /* 7 */ 16788 0, 16789 #endif 16790 }, 16791 { 16792 BCMI_QSGMIIE_SERDES_DIG_PMD_CORE_MODE_STSr, 16793 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16794 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16795 BCMI_QSGMIIE_SERDES_DIG_PMD_CORE_MODE_STSr_fields, 16796 #else 16797 0, 16798 #endif 16799 #endif 16800 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16801 PHYMOD_SYMBOL_FLAG_REGISTER, 16802 "DIG_PMD_CORE_MODE_STSr", 16803 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16804 "DIG_COM_PMD_CORE_MODE_STATUS", 16805 NULL, 16806 #endif 16807 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16808 0x0, /* 0 */ 16809 0, 16810 #endif 16811 }, 16812 { 16813 BCMI_QSGMIIE_SERDES_DIG_REVID1r, 16814 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16815 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16816 BCMI_QSGMIIE_SERDES_DIG_REVID1r_fields, 16817 #else 16818 0, 16819 #endif 16820 #endif 16821 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16822 PHYMOD_SYMBOL_FLAG_REGISTER, 16823 "DIG_REVID1r", 16824 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16825 "DIG_COM_REVID1", 16826 NULL, 16827 #endif 16828 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16829 0x4038, /* 16440 */ 16830 0, 16831 #endif 16832 }, 16833 { 16834 BCMI_QSGMIIE_SERDES_DIG_TX_LN_MAP_0_1_2r, 16835 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16836 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16837 BCMI_QSGMIIE_SERDES_DIG_TX_LN_MAP_0_1_2r_fields, 16838 #else 16839 0, 16840 #endif 16841 #endif 16842 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16843 PHYMOD_SYMBOL_FLAG_REGISTER, 16844 "DIG_TX_LN_MAP_0_1_2r", 16845 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16846 "DIG_COM_TX_LANE_MAP_0_1_2", 16847 NULL, 16848 #endif 16849 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16850 0x820, /* 2080 */ 16851 0, 16852 #endif 16853 }, 16854 { 16855 BCMI_QSGMIIE_SERDES_DIG_TX_LN_MAP_3_N_LN_ADDR_0_1r, 16856 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16857 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16858 BCMI_QSGMIIE_SERDES_DIG_TX_LN_MAP_3_N_LN_ADDR_0_1r_fields, 16859 #else 16860 0, 16861 #endif 16862 #endif 16863 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16864 PHYMOD_SYMBOL_FLAG_REGISTER, 16865 "DIG_TX_LN_MAP_3_N_LN_ADDR_0_1r", 16866 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16867 "DIG_COM_TX_LANE_MAP_3_N_LANE_ADDR_0_1", 16868 NULL, 16869 #endif 16870 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16871 0x403, /* 1027 */ 16872 0, 16873 #endif 16874 }, 16875 { 16876 BCMI_QSGMIIE_SERDES_DIG_LN_ADDR_2_3r, 16877 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16878 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16879 BCMI_QSGMIIE_SERDES_DIG_LN_ADDR_2_3r_fields, 16880 #else 16881 0, 16882 #endif 16883 #endif 16884 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16885 PHYMOD_SYMBOL_FLAG_REGISTER, 16886 "DIG_LN_ADDR_2_3r", 16887 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16888 "DIG_COM_LANE_ADDR_2_3", 16889 NULL, 16890 #endif 16891 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16892 0x302, /* 770 */ 16893 0, 16894 #endif 16895 }, 16896 { 16897 BCMI_QSGMIIE_SERDES_DIG_REVID2r, 16898 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16899 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16900 BCMI_QSGMIIE_SERDES_DIG_REVID2r_fields, 16901 #else 16902 0, 16903 #endif 16904 #endif 16905 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16906 PHYMOD_SYMBOL_FLAG_REGISTER, 16907 "DIG_REVID2r", 16908 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16909 "DIG_COM_REVID2", 16910 NULL, 16911 #endif 16912 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16913 0x0, /* 0 */ 16914 0, 16915 #endif 16916 }, 16917 { 16918 BCMI_QSGMIIE_SERDES_PATGEN_SEQ0r, 16919 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16920 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16921 BCMI_QSGMIIE_SERDES_PATGEN_SEQ0r_fields, 16922 #else 16923 0, 16924 #endif 16925 #endif 16926 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16927 PHYMOD_SYMBOL_FLAG_REGISTER, 16928 "PATGEN_SEQ0r", 16929 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16930 "PATT_GEN_COM_SEQ_0", 16931 NULL, 16932 #endif 16933 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16934 0xff00, /* 65280 */ 16935 0, 16936 #endif 16937 }, 16938 { 16939 BCMI_QSGMIIE_SERDES_PATGEN_SEQ1r, 16940 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16941 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16942 BCMI_QSGMIIE_SERDES_PATGEN_SEQ1r_fields, 16943 #else 16944 0, 16945 #endif 16946 #endif 16947 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16948 PHYMOD_SYMBOL_FLAG_REGISTER, 16949 "PATGEN_SEQ1r", 16950 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16951 "PATT_GEN_COM_SEQ_1", 16952 NULL, 16953 #endif 16954 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16955 0xff00, /* 65280 */ 16956 0, 16957 #endif 16958 }, 16959 { 16960 BCMI_QSGMIIE_SERDES_PATGEN_SEQ2r, 16961 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16962 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16963 BCMI_QSGMIIE_SERDES_PATGEN_SEQ2r_fields, 16964 #else 16965 0, 16966 #endif 16967 #endif 16968 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16969 PHYMOD_SYMBOL_FLAG_REGISTER, 16970 "PATGEN_SEQ2r", 16971 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16972 "PATT_GEN_COM_SEQ_2", 16973 NULL, 16974 #endif 16975 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16976 0xff00, /* 65280 */ 16977 0, 16978 #endif 16979 }, 16980 { 16981 BCMI_QSGMIIE_SERDES_PATGEN_SEQ3r, 16982 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16983 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 16984 BCMI_QSGMIIE_SERDES_PATGEN_SEQ3r_fields, 16985 #else 16986 0, 16987 #endif 16988 #endif 16989 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16990 PHYMOD_SYMBOL_FLAG_REGISTER, 16991 "PATGEN_SEQ3r", 16992 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16993 "PATT_GEN_COM_SEQ_3", 16994 NULL, 16995 #endif 16996 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16997 0xff00, /* 65280 */ 16998 0, 16999 #endif 17000 }, 17001 { 17002 BCMI_QSGMIIE_SERDES_PATGEN_SEQ4r, 17003 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17004 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17005 BCMI_QSGMIIE_SERDES_PATGEN_SEQ4r_fields, 17006 #else 17007 0, 17008 #endif 17009 #endif 17010 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17011 PHYMOD_SYMBOL_FLAG_REGISTER, 17012 "PATGEN_SEQ4r", 17013 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17014 "PATT_GEN_COM_SEQ_4", 17015 NULL, 17016 #endif 17017 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17018 0xff00, /* 65280 */ 17019 0, 17020 #endif 17021 }, 17022 { 17023 BCMI_QSGMIIE_SERDES_PATGEN_SEQ5r, 17024 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17025 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17026 BCMI_QSGMIIE_SERDES_PATGEN_SEQ5r_fields, 17027 #else 17028 0, 17029 #endif 17030 #endif 17031 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17032 PHYMOD_SYMBOL_FLAG_REGISTER, 17033 "PATGEN_SEQ5r", 17034 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17035 "PATT_GEN_COM_SEQ_5", 17036 NULL, 17037 #endif 17038 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17039 0xff00, /* 65280 */ 17040 0, 17041 #endif 17042 }, 17043 { 17044 BCMI_QSGMIIE_SERDES_PATGEN_SEQ6r, 17045 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17046 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17047 BCMI_QSGMIIE_SERDES_PATGEN_SEQ6r_fields, 17048 #else 17049 0, 17050 #endif 17051 #endif 17052 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17053 PHYMOD_SYMBOL_FLAG_REGISTER, 17054 "PATGEN_SEQ6r", 17055 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17056 "PATT_GEN_COM_SEQ_6", 17057 NULL, 17058 #endif 17059 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17060 0xff00, /* 65280 */ 17061 0, 17062 #endif 17063 }, 17064 { 17065 BCMI_QSGMIIE_SERDES_PATGEN_SEQ7r, 17066 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17067 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17068 BCMI_QSGMIIE_SERDES_PATGEN_SEQ7r_fields, 17069 #else 17070 0, 17071 #endif 17072 #endif 17073 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17074 PHYMOD_SYMBOL_FLAG_REGISTER, 17075 "PATGEN_SEQ7r", 17076 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17077 "PATT_GEN_COM_SEQ_7", 17078 NULL, 17079 #endif 17080 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17081 0xff00, /* 65280 */ 17082 0, 17083 #endif 17084 }, 17085 { 17086 BCMI_QSGMIIE_SERDES_PATGEN_SEQ8r, 17087 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17088 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17089 BCMI_QSGMIIE_SERDES_PATGEN_SEQ8r_fields, 17090 #else 17091 0, 17092 #endif 17093 #endif 17094 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17095 PHYMOD_SYMBOL_FLAG_REGISTER, 17096 "PATGEN_SEQ8r", 17097 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17098 "PATT_GEN_COM_SEQ_8", 17099 NULL, 17100 #endif 17101 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17102 0xff00, /* 65280 */ 17103 0, 17104 #endif 17105 }, 17106 { 17107 BCMI_QSGMIIE_SERDES_PATGEN_SEQ9r, 17108 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17109 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17110 BCMI_QSGMIIE_SERDES_PATGEN_SEQ9r_fields, 17111 #else 17112 0, 17113 #endif 17114 #endif 17115 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17116 PHYMOD_SYMBOL_FLAG_REGISTER, 17117 "PATGEN_SEQ9r", 17118 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17119 "PATT_GEN_COM_SEQ_9", 17120 NULL, 17121 #endif 17122 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17123 0xff00, /* 65280 */ 17124 0, 17125 #endif 17126 }, 17127 { 17128 BCMI_QSGMIIE_SERDES_PATGEN_SEQ_10r, 17129 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17130 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17131 BCMI_QSGMIIE_SERDES_PATGEN_SEQ_10r_fields, 17132 #else 17133 0, 17134 #endif 17135 #endif 17136 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17137 PHYMOD_SYMBOL_FLAG_REGISTER, 17138 "PATGEN_SEQ_10r", 17139 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17140 "PATT_GEN_COM_SEQ_10", 17141 NULL, 17142 #endif 17143 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17144 0xff00, /* 65280 */ 17145 0, 17146 #endif 17147 }, 17148 { 17149 BCMI_QSGMIIE_SERDES_PATGEN_SEQ_11r, 17150 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17151 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17152 BCMI_QSGMIIE_SERDES_PATGEN_SEQ_11r_fields, 17153 #else 17154 0, 17155 #endif 17156 #endif 17157 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17158 PHYMOD_SYMBOL_FLAG_REGISTER, 17159 "PATGEN_SEQ_11r", 17160 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17161 "PATT_GEN_COM_SEQ_11", 17162 NULL, 17163 #endif 17164 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17165 0xff00, /* 65280 */ 17166 0, 17167 #endif 17168 }, 17169 { 17170 BCMI_QSGMIIE_SERDES_PATGEN_SEQ_12r, 17171 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17172 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17173 BCMI_QSGMIIE_SERDES_PATGEN_SEQ_12r_fields, 17174 #else 17175 0, 17176 #endif 17177 #endif 17178 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17179 PHYMOD_SYMBOL_FLAG_REGISTER, 17180 "PATGEN_SEQ_12r", 17181 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17182 "PATT_GEN_COM_SEQ_12", 17183 NULL, 17184 #endif 17185 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17186 0xff00, /* 65280 */ 17187 0, 17188 #endif 17189 }, 17190 { 17191 BCMI_QSGMIIE_SERDES_PATGEN_SEQ_13r, 17192 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17193 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17194 BCMI_QSGMIIE_SERDES_PATGEN_SEQ_13r_fields, 17195 #else 17196 0, 17197 #endif 17198 #endif 17199 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17200 PHYMOD_SYMBOL_FLAG_REGISTER, 17201 "PATGEN_SEQ_13r", 17202 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17203 "PATT_GEN_COM_SEQ_13", 17204 NULL, 17205 #endif 17206 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17207 0xff00, /* 65280 */ 17208 0, 17209 #endif 17210 }, 17211 { 17212 BCMI_QSGMIIE_SERDES_PATGEN_SEQ_14r, 17213 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17214 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17215 BCMI_QSGMIIE_SERDES_PATGEN_SEQ_14r_fields, 17216 #else 17217 0, 17218 #endif 17219 #endif 17220 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17221 PHYMOD_SYMBOL_FLAG_REGISTER, 17222 "PATGEN_SEQ_14r", 17223 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17224 "PATT_GEN_COM_SEQ_14", 17225 NULL, 17226 #endif 17227 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17228 0xff00, /* 65280 */ 17229 0, 17230 #endif 17231 }, 17232 { 17233 BCMI_QSGMIIE_SERDES_TXFIR_CTL1r, 17234 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17235 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17236 BCMI_QSGMIIE_SERDES_TXFIR_CTL1r_fields, 17237 #else 17238 0, 17239 #endif 17240 #endif 17241 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17242 PHYMOD_SYMBOL_FLAG_REGISTER, 17243 "TXFIR_CTL1r", 17244 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17245 "TX_FED_TXFIR_CONTROL1", 17246 NULL, 17247 #endif 17248 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17249 0x588, /* 1416 */ 17250 0, 17251 #endif 17252 }, 17253 { 17254 BCMI_QSGMIIE_SERDES_TXFIR_CTL2r, 17255 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17256 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17257 BCMI_QSGMIIE_SERDES_TXFIR_CTL2r_fields, 17258 #else 17259 0, 17260 #endif 17261 #endif 17262 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17263 PHYMOD_SYMBOL_FLAG_REGISTER, 17264 "TXFIR_CTL2r", 17265 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17266 "TX_FED_TXFIR_CONTROL2", 17267 NULL, 17268 #endif 17269 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17270 0x3c, /* 60 */ 17271 0, 17272 #endif 17273 }, 17274 { 17275 BCMI_QSGMIIE_SERDES_TXFIR_CTL3r, 17276 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17277 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17278 BCMI_QSGMIIE_SERDES_TXFIR_CTL3r_fields, 17279 #else 17280 0, 17281 #endif 17282 #endif 17283 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17284 PHYMOD_SYMBOL_FLAG_REGISTER, 17285 "TXFIR_CTL3r", 17286 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17287 "TX_FED_TXFIR_CONTROL3", 17288 NULL, 17289 #endif 17290 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17291 0x8888, /* 34952 */ 17292 0, 17293 #endif 17294 }, 17295 { 17296 BCMI_QSGMIIE_SERDES_TXFIR_STS1r, 17297 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17298 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17299 BCMI_QSGMIIE_SERDES_TXFIR_STS1r_fields, 17300 #else 17301 0, 17302 #endif 17303 #endif 17304 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17305 PHYMOD_SYMBOL_FLAG_REGISTER, 17306 "TXFIR_STS1r", 17307 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17308 "TX_FED_TXFIR_STATUS1", 17309 NULL, 17310 #endif 17311 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17312 0x588, /* 1416 */ 17313 0, 17314 #endif 17315 }, 17316 { 17317 BCMI_QSGMIIE_SERDES_TXFIR_STS2r, 17318 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17319 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17320 BCMI_QSGMIIE_SERDES_TXFIR_STS2r_fields, 17321 #else 17322 0, 17323 #endif 17324 #endif 17325 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17326 PHYMOD_SYMBOL_FLAG_REGISTER, 17327 "TXFIR_STS2r", 17328 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17329 "TX_FED_TXFIR_STATUS2", 17330 NULL, 17331 #endif 17332 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17333 0x3c, /* 60 */ 17334 0, 17335 #endif 17336 }, 17337 { 17338 BCMI_QSGMIIE_SERDES_TXFIR_STS3r, 17339 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17340 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17341 BCMI_QSGMIIE_SERDES_TXFIR_STS3r_fields, 17342 #else 17343 0, 17344 #endif 17345 #endif 17346 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17347 PHYMOD_SYMBOL_FLAG_REGISTER, 17348 "TXFIR_STS3r", 17349 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17350 "TX_FED_TXFIR_STATUS3", 17351 NULL, 17352 #endif 17353 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17354 0x588, /* 1416 */ 17355 0, 17356 #endif 17357 }, 17358 { 17359 BCMI_QSGMIIE_SERDES_TXFIR_STS4r, 17360 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17361 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17362 BCMI_QSGMIIE_SERDES_TXFIR_STS4r_fields, 17363 #else 17364 0, 17365 #endif 17366 #endif 17367 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17368 PHYMOD_SYMBOL_FLAG_REGISTER, 17369 "TXFIR_STS4r", 17370 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17371 "TX_FED_TXFIR_STATUS4", 17372 NULL, 17373 #endif 17374 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17375 0x3c, /* 60 */ 17376 0, 17377 #endif 17378 }, 17379 { 17380 BCMI_QSGMIIE_SERDES_TXFIR_UC_CTLr, 17381 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17382 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17383 BCMI_QSGMIIE_SERDES_TXFIR_UC_CTLr_fields, 17384 #else 17385 0, 17386 #endif 17387 #endif 17388 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17389 PHYMOD_SYMBOL_FLAG_REGISTER, 17390 "TXFIR_UC_CTLr", 17391 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17392 "TX_FED_MICRO_CONTROL", 17393 NULL, 17394 #endif 17395 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17396 0x0, /* 0 */ 17397 0, 17398 #endif 17399 }, 17400 { 17401 BCMI_QSGMIIE_SERDES_TXFIR_MISC_CTL1r, 17402 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17403 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17404 BCMI_QSGMIIE_SERDES_TXFIR_MISC_CTL1r_fields, 17405 #else 17406 0, 17407 #endif 17408 #endif 17409 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17410 PHYMOD_SYMBOL_FLAG_REGISTER, 17411 "TXFIR_MISC_CTL1r", 17412 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17413 "TX_FED_MISC_CONTROL1", 17414 NULL, 17415 #endif 17416 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17417 0x300, /* 768 */ 17418 0, 17419 #endif 17420 }, 17421 { 17422 BCMI_QSGMIIE_SERDES_TXFIR_CTL4r, 17423 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17424 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17425 BCMI_QSGMIIE_SERDES_TXFIR_CTL4r_fields, 17426 #else 17427 0, 17428 #endif 17429 #endif 17430 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17431 PHYMOD_SYMBOL_FLAG_REGISTER, 17432 "TXFIR_CTL4r", 17433 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17434 "TX_FED_TXFIR_CONTROL4", 17435 NULL, 17436 #endif 17437 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17438 0x800, /* 2048 */ 17439 0, 17440 #endif 17441 }, 17442 { 17443 BCMI_QSGMIIE_SERDES_PLL_CAL_CTL0r, 17444 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17445 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17446 BCMI_QSGMIIE_SERDES_PLL_CAL_CTL0r_fields, 17447 #else 17448 0, 17449 #endif 17450 #endif 17451 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17452 PHYMOD_SYMBOL_FLAG_REGISTER, 17453 "PLL_CAL_CTL0r", 17454 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17455 "PLL_CAL_COM_CTL_0", 17456 NULL, 17457 #endif 17458 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17459 0xc803, /* 51203 */ 17460 0, 17461 #endif 17462 }, 17463 { 17464 BCMI_QSGMIIE_SERDES_PLL_CAL_CTL1r, 17465 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17466 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17467 BCMI_QSGMIIE_SERDES_PLL_CAL_CTL1r_fields, 17468 #else 17469 0, 17470 #endif 17471 #endif 17472 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17473 PHYMOD_SYMBOL_FLAG_REGISTER, 17474 "PLL_CAL_CTL1r", 17475 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17476 "PLL_CAL_COM_CTL_1", 17477 NULL, 17478 #endif 17479 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17480 0xc8ff, /* 51455 */ 17481 0, 17482 #endif 17483 }, 17484 { 17485 BCMI_QSGMIIE_SERDES_PLL_CAL_CTL2r, 17486 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17487 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17488 BCMI_QSGMIIE_SERDES_PLL_CAL_CTL2r_fields, 17489 #else 17490 0, 17491 #endif 17492 #endif 17493 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17494 PHYMOD_SYMBOL_FLAG_REGISTER, 17495 "PLL_CAL_CTL2r", 17496 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17497 "PLL_CAL_COM_CTL_2", 17498 NULL, 17499 #endif 17500 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17501 0xff01, /* 65281 */ 17502 0, 17503 #endif 17504 }, 17505 { 17506 BCMI_QSGMIIE_SERDES_PLL_CAL_CTL3r, 17507 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17508 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17509 BCMI_QSGMIIE_SERDES_PLL_CAL_CTL3r_fields, 17510 #else 17511 0, 17512 #endif 17513 #endif 17514 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17515 PHYMOD_SYMBOL_FLAG_REGISTER, 17516 "PLL_CAL_CTL3r", 17517 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17518 "PLL_CAL_COM_CTL_3", 17519 NULL, 17520 #endif 17521 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17522 0x0, /* 0 */ 17523 0, 17524 #endif 17525 }, 17526 { 17527 BCMI_QSGMIIE_SERDES_PLL_CAL_CTL4r, 17528 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17529 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17530 BCMI_QSGMIIE_SERDES_PLL_CAL_CTL4r_fields, 17531 #else 17532 0, 17533 #endif 17534 #endif 17535 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17536 PHYMOD_SYMBOL_FLAG_REGISTER, 17537 "PLL_CAL_CTL4r", 17538 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17539 "PLL_CAL_COM_CTL_4", 17540 NULL, 17541 #endif 17542 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17543 0xa80d, /* 43021 */ 17544 0, 17545 #endif 17546 }, 17547 { 17548 BCMI_QSGMIIE_SERDES_PLL_CAL_CTL5r, 17549 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17550 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17551 BCMI_QSGMIIE_SERDES_PLL_CAL_CTL5r_fields, 17552 #else 17553 0, 17554 #endif 17555 #endif 17556 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17557 PHYMOD_SYMBOL_FLAG_REGISTER, 17558 "PLL_CAL_CTL5r", 17559 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17560 "PLL_CAL_COM_CTL_5", 17561 NULL, 17562 #endif 17563 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17564 0x27, /* 39 */ 17565 0, 17566 #endif 17567 }, 17568 { 17569 BCMI_QSGMIIE_SERDES_PLL_CAL_CTL6r, 17570 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17571 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17572 BCMI_QSGMIIE_SERDES_PLL_CAL_CTL6r_fields, 17573 #else 17574 0, 17575 #endif 17576 #endif 17577 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17578 PHYMOD_SYMBOL_FLAG_REGISTER, 17579 "PLL_CAL_CTL6r", 17580 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17581 "PLL_CAL_COM_CTL_6", 17582 NULL, 17583 #endif 17584 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17585 0x7, /* 7 */ 17586 0, 17587 #endif 17588 }, 17589 { 17590 BCMI_QSGMIIE_SERDES_PLL_CAL_CTL7r, 17591 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17592 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17593 BCMI_QSGMIIE_SERDES_PLL_CAL_CTL7r_fields, 17594 #else 17595 0, 17596 #endif 17597 #endif 17598 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17599 PHYMOD_SYMBOL_FLAG_REGISTER, 17600 "PLL_CAL_CTL7r", 17601 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17602 "PLL_CAL_COM_CTL_7", 17603 NULL, 17604 #endif 17605 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17606 0xa, /* 10 */ 17607 0, 17608 #endif 17609 }, 17610 { 17611 BCMI_QSGMIIE_SERDES_PLL_CAL_CTL_STS0r, 17612 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17613 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17614 BCMI_QSGMIIE_SERDES_PLL_CAL_CTL_STS0r_fields, 17615 #else 17616 0, 17617 #endif 17618 #endif 17619 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17620 PHYMOD_SYMBOL_FLAG_REGISTER, 17621 "PLL_CAL_CTL_STS0r", 17622 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17623 "PLL_CAL_COM_CTL_STATUS_0", 17624 NULL, 17625 #endif 17626 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17627 0x0, /* 0 */ 17628 0, 17629 #endif 17630 }, 17631 { 17632 BCMI_QSGMIIE_SERDES_PLL_CAL_CTL_STS1r, 17633 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17634 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17635 BCMI_QSGMIIE_SERDES_PLL_CAL_CTL_STS1r_fields, 17636 #else 17637 0, 17638 #endif 17639 #endif 17640 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17641 PHYMOD_SYMBOL_FLAG_REGISTER, 17642 "PLL_CAL_CTL_STS1r", 17643 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17644 "PLL_CAL_COM_CTL_STATUS_1", 17645 NULL, 17646 #endif 17647 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17648 0x0, /* 0 */ 17649 0, 17650 #endif 17651 }, 17652 { 17653 BCMI_QSGMIIE_SERDES_PLL_CAL_CTL_STS_DBGr, 17654 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17655 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17656 BCMI_QSGMIIE_SERDES_PLL_CAL_CTL_STS_DBGr_fields, 17657 #else 17658 0, 17659 #endif 17660 #endif 17661 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17662 PHYMOD_SYMBOL_FLAG_REGISTER, 17663 "PLL_CAL_CTL_STS_DBGr", 17664 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17665 "PLL_CAL_COM_CTL_STATUS_DBG", 17666 NULL, 17667 #endif 17668 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17669 0x1, /* 1 */ 17670 0, 17671 #endif 17672 }, 17673 { 17674 BCMI_QSGMIIE_SERDES_CL72_TXC_TAP_LIMIT_CTL1r, 17675 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17676 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17677 BCMI_QSGMIIE_SERDES_CL72_TXC_TAP_LIMIT_CTL1r_fields, 17678 #else 17679 0, 17680 #endif 17681 #endif 17682 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17683 PHYMOD_SYMBOL_FLAG_REGISTER, 17684 "CL72_TXC_TAP_LIMIT_CTL1r", 17685 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17686 "TX_COM_CL72_TAP_LIMIT_CONTROL1", 17687 NULL, 17688 #endif 17689 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17690 0x7ff, /* 2047 */ 17691 0, 17692 #endif 17693 }, 17694 { 17695 BCMI_QSGMIIE_SERDES_CL72_TXC_TAP_LIMIT_CTL2r, 17696 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17697 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17698 BCMI_QSGMIIE_SERDES_CL72_TXC_TAP_LIMIT_CTL2r_fields, 17699 #else 17700 0, 17701 #endif 17702 #endif 17703 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17704 PHYMOD_SYMBOL_FLAG_REGISTER, 17705 "CL72_TXC_TAP_LIMIT_CTL2r", 17706 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17707 "TX_COM_CL72_TAP_LIMIT_CONTROL2", 17708 NULL, 17709 #endif 17710 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17711 0x70, /* 112 */ 17712 0, 17713 #endif 17714 }, 17715 { 17716 BCMI_QSGMIIE_SERDES_CL72_TXC_TAP_PRESET_CTLr, 17717 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17718 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17719 BCMI_QSGMIIE_SERDES_CL72_TXC_TAP_PRESET_CTLr_fields, 17720 #else 17721 0, 17722 #endif 17723 #endif 17724 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17725 PHYMOD_SYMBOL_FLAG_REGISTER, 17726 "CL72_TXC_TAP_PRESET_CTLr", 17727 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17728 "TX_COM_CL72_TAP_PRESET_CONTROL", 17729 NULL, 17730 #endif 17731 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17732 0x0, /* 0 */ 17733 0, 17734 #endif 17735 }, 17736 { 17737 BCMI_QSGMIIE_SERDES_CL72_TXC_DBG1r, 17738 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17739 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17740 BCMI_QSGMIIE_SERDES_CL72_TXC_DBG1r_fields, 17741 #else 17742 0, 17743 #endif 17744 #endif 17745 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17746 PHYMOD_SYMBOL_FLAG_REGISTER, 17747 "CL72_TXC_DBG1r", 17748 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17749 "TX_COM_CL72_DEBUG_1_REGISTER", 17750 NULL, 17751 #endif 17752 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17753 0x3828, /* 14376 */ 17754 0, 17755 #endif 17756 }, 17757 { 17758 BCMI_QSGMIIE_SERDES_CL72_TXC_MAX_WAIT_TMRr, 17759 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17760 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17761 BCMI_QSGMIIE_SERDES_CL72_TXC_MAX_WAIT_TMRr_fields, 17762 #else 17763 0, 17764 #endif 17765 #endif 17766 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17767 PHYMOD_SYMBOL_FLAG_REGISTER, 17768 "CL72_TXC_MAX_WAIT_TMRr", 17769 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17770 "TX_COM_CL72_MAX_WAIT_TIMER_REGISTER", 17771 NULL, 17772 #endif 17773 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17774 0x1f4, /* 500 */ 17775 0, 17776 #endif 17777 }, 17778 { 17779 BCMI_QSGMIIE_SERDES_CL72_TXC_WAIT_TMRr, 17780 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17781 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17782 BCMI_QSGMIIE_SERDES_CL72_TXC_WAIT_TMRr_fields, 17783 #else 17784 0, 17785 #endif 17786 #endif 17787 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17788 PHYMOD_SYMBOL_FLAG_REGISTER, 17789 "CL72_TXC_WAIT_TMRr", 17790 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17791 "TX_COM_CL72_WAIT_TIMER_REGISTER", 17792 NULL, 17793 #endif 17794 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17795 0xc8, /* 200 */ 17796 0, 17797 #endif 17798 }, 17799 { 17800 BCMI_QSGMIIE_SERDES_UC_RAMWORDr, 17801 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17802 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17803 BCMI_QSGMIIE_SERDES_UC_RAMWORDr_fields, 17804 #else 17805 0, 17806 #endif 17807 #endif 17808 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17809 PHYMOD_SYMBOL_FLAG_REGISTER, 17810 "UC_RAMWORDr", 17811 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17812 "MICRO_A_COM_RAMWORD", 17813 NULL, 17814 #endif 17815 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17816 0x0, /* 0 */ 17817 0, 17818 #endif 17819 }, 17820 { 17821 BCMI_QSGMIIE_SERDES_UC_ADDRr, 17822 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17823 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17824 BCMI_QSGMIIE_SERDES_UC_ADDRr_fields, 17825 #else 17826 0, 17827 #endif 17828 #endif 17829 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17830 PHYMOD_SYMBOL_FLAG_REGISTER, 17831 "UC_ADDRr", 17832 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17833 "MICRO_A_COM_ADDRESS", 17834 NULL, 17835 #endif 17836 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17837 0x0, /* 0 */ 17838 0, 17839 #endif 17840 }, 17841 { 17842 BCMI_QSGMIIE_SERDES_UC_COMMANDr, 17843 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17844 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17845 BCMI_QSGMIIE_SERDES_UC_COMMANDr_fields, 17846 #else 17847 0, 17848 #endif 17849 #endif 17850 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17851 PHYMOD_SYMBOL_FLAG_REGISTER, 17852 "UC_COMMANDr", 17853 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17854 "MICRO_A_COM_COMMAND", 17855 NULL, 17856 #endif 17857 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17858 0x0, /* 0 */ 17859 0, 17860 #endif 17861 }, 17862 { 17863 BCMI_QSGMIIE_SERDES_UC_RAM_WRDATAr, 17864 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17865 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17866 BCMI_QSGMIIE_SERDES_UC_RAM_WRDATAr_fields, 17867 #else 17868 0, 17869 #endif 17870 #endif 17871 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17872 PHYMOD_SYMBOL_FLAG_REGISTER, 17873 "UC_RAM_WRDATAr", 17874 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17875 "MICRO_A_COM_RAM_WRDATA", 17876 NULL, 17877 #endif 17878 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17879 0x0, /* 0 */ 17880 0, 17881 #endif 17882 }, 17883 { 17884 BCMI_QSGMIIE_SERDES_UC_RAM_RDDATAr, 17885 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17886 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17887 BCMI_QSGMIIE_SERDES_UC_RAM_RDDATAr_fields, 17888 #else 17889 0, 17890 #endif 17891 #endif 17892 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17893 PHYMOD_SYMBOL_FLAG_REGISTER, 17894 "UC_RAM_RDDATAr", 17895 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17896 "MICRO_A_COM_RAM_RDDATA", 17897 NULL, 17898 #endif 17899 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17900 0x0, /* 0 */ 17901 0, 17902 #endif 17903 }, 17904 { 17905 BCMI_QSGMIIE_SERDES_UC_DWNLOAD_STSr, 17906 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17907 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17908 BCMI_QSGMIIE_SERDES_UC_DWNLOAD_STSr_fields, 17909 #else 17910 0, 17911 #endif 17912 #endif 17913 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17914 PHYMOD_SYMBOL_FLAG_REGISTER, 17915 "UC_DWNLOAD_STSr", 17916 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17917 "MICRO_A_COM_DOWNLOAD_STATUS", 17918 NULL, 17919 #endif 17920 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17921 0x0, /* 0 */ 17922 0, 17923 #endif 17924 }, 17925 { 17926 BCMI_QSGMIIE_SERDES_UC_SFR_STSr, 17927 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17928 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17929 BCMI_QSGMIIE_SERDES_UC_SFR_STSr_fields, 17930 #else 17931 0, 17932 #endif 17933 #endif 17934 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17935 PHYMOD_SYMBOL_FLAG_REGISTER, 17936 "UC_SFR_STSr", 17937 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17938 "MICRO_A_COM_SFR_STATUS", 17939 NULL, 17940 #endif 17941 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17942 0x0, /* 0 */ 17943 0, 17944 #endif 17945 }, 17946 { 17947 BCMI_QSGMIIE_SERDES_UC_MDIO_UC_MAILBOX_MSWr, 17948 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17949 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17950 BCMI_QSGMIIE_SERDES_UC_MDIO_UC_MAILBOX_MSWr_fields, 17951 #else 17952 0, 17953 #endif 17954 #endif 17955 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17956 PHYMOD_SYMBOL_FLAG_REGISTER, 17957 "UC_MDIO_UC_MAILBOX_MSWr", 17958 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17959 "MICRO_A_COM_MDIO_UC_MAILBOX_MSW", 17960 NULL, 17961 #endif 17962 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17963 0x0, /* 0 */ 17964 0, 17965 #endif 17966 }, 17967 { 17968 BCMI_QSGMIIE_SERDES_UC_MDIO_UC_MAILBOX_LSWr, 17969 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17970 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17971 BCMI_QSGMIIE_SERDES_UC_MDIO_UC_MAILBOX_LSWr_fields, 17972 #else 17973 0, 17974 #endif 17975 #endif 17976 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17977 PHYMOD_SYMBOL_FLAG_REGISTER, 17978 "UC_MDIO_UC_MAILBOX_LSWr", 17979 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 17980 "MICRO_A_COM_MDIO_UC_MAILBOX_LSW", 17981 NULL, 17982 #endif 17983 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 17984 0x0, /* 0 */ 17985 0, 17986 #endif 17987 }, 17988 { 17989 BCMI_QSGMIIE_SERDES_UC_UC_MDIO_MAILBOX_LSWr, 17990 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 17991 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 17992 BCMI_QSGMIIE_SERDES_UC_UC_MDIO_MAILBOX_LSWr_fields, 17993 #else 17994 0, 17995 #endif 17996 #endif 17997 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 17998 PHYMOD_SYMBOL_FLAG_REGISTER, 17999 "UC_UC_MDIO_MAILBOX_LSWr", 18000 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18001 "MICRO_A_COM_UC_MDIO_MAILBOX_LSW", 18002 NULL, 18003 #endif 18004 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18005 0x0, /* 0 */ 18006 0, 18007 #endif 18008 }, 18009 { 18010 BCMI_QSGMIIE_SERDES_UC_COMMAND2r, 18011 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18012 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 18013 BCMI_QSGMIIE_SERDES_UC_COMMAND2r_fields, 18014 #else 18015 0, 18016 #endif 18017 #endif 18018 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18019 PHYMOD_SYMBOL_FLAG_REGISTER, 18020 "UC_COMMAND2r", 18021 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18022 "MICRO_A_COM_COMMAND2", 18023 NULL, 18024 #endif 18025 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18026 0x80f, /* 2063 */ 18027 0, 18028 #endif 18029 }, 18030 { 18031 BCMI_QSGMIIE_SERDES_UC_UC_MDIO_MAILBOX_MSWr, 18032 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18033 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 18034 BCMI_QSGMIIE_SERDES_UC_UC_MDIO_MAILBOX_MSWr_fields, 18035 #else 18036 0, 18037 #endif 18038 #endif 18039 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18040 PHYMOD_SYMBOL_FLAG_REGISTER, 18041 "UC_UC_MDIO_MAILBOX_MSWr", 18042 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18043 "MICRO_A_COM_UC_MDIO_MAILBOX_MSW", 18044 NULL, 18045 #endif 18046 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18047 0x0, /* 0 */ 18048 0, 18049 #endif 18050 }, 18051 { 18052 BCMI_QSGMIIE_SERDES_UC_COMMAND3r, 18053 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18054 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 18055 BCMI_QSGMIIE_SERDES_UC_COMMAND3r_fields, 18056 #else 18057 0, 18058 #endif 18059 #endif 18060 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18061 PHYMOD_SYMBOL_FLAG_REGISTER, 18062 "UC_COMMAND3r", 18063 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18064 "MICRO_A_COM_COMMAND3", 18065 NULL, 18066 #endif 18067 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18068 0x2, /* 2 */ 18069 0, 18070 #endif 18071 }, 18072 { 18073 BCMI_QSGMIIE_SERDES_UC_COMMAND4r, 18074 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18075 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 18076 BCMI_QSGMIIE_SERDES_UC_COMMAND4r_fields, 18077 #else 18078 0, 18079 #endif 18080 #endif 18081 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18082 PHYMOD_SYMBOL_FLAG_REGISTER, 18083 "UC_COMMAND4r", 18084 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18085 "MICRO_A_COM_COMMAND4", 18086 NULL, 18087 #endif 18088 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18089 0x0, /* 0 */ 18090 0, 18091 #endif 18092 }, 18093 { 18094 BCMI_QSGMIIE_SERDES_UC_TEMPERATURE_STSr, 18095 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18096 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 18097 BCMI_QSGMIIE_SERDES_UC_TEMPERATURE_STSr_fields, 18098 #else 18099 0, 18100 #endif 18101 #endif 18102 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18103 PHYMOD_SYMBOL_FLAG_REGISTER, 18104 "UC_TEMPERATURE_STSr", 18105 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18106 "MICRO_A_COM_TEMPERATURE_STATUS", 18107 NULL, 18108 #endif 18109 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18110 0x0, /* 0 */ 18111 0, 18112 #endif 18113 }, 18114 { 18115 BCMI_QSGMIIE_SERDES_UC_PROGRAM_RAM_CTL1r, 18116 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18117 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 18118 BCMI_QSGMIIE_SERDES_UC_PROGRAM_RAM_CTL1r_fields, 18119 #else 18120 0, 18121 #endif 18122 #endif 18123 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18124 PHYMOD_SYMBOL_FLAG_REGISTER, 18125 "UC_PROGRAM_RAM_CTL1r", 18126 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18127 "MICRO_B_COM_PROGRAM_RAM_CONTROL1", 18128 NULL, 18129 #endif 18130 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18131 0x0, /* 0 */ 18132 0, 18133 #endif 18134 }, 18135 { 18136 BCMI_QSGMIIE_SERDES_UC_DATARAM_CTL1r, 18137 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18138 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 18139 BCMI_QSGMIIE_SERDES_UC_DATARAM_CTL1r_fields, 18140 #else 18141 0, 18142 #endif 18143 #endif 18144 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18145 PHYMOD_SYMBOL_FLAG_REGISTER, 18146 "UC_DATARAM_CTL1r", 18147 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18148 "MICRO_B_COM_DATARAM_CONTROL1", 18149 NULL, 18150 #endif 18151 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18152 0x0, /* 0 */ 18153 0, 18154 #endif 18155 }, 18156 { 18157 BCMI_QSGMIIE_SERDES_UC_IRAM_CTL1r, 18158 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18159 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 18160 BCMI_QSGMIIE_SERDES_UC_IRAM_CTL1r_fields, 18161 #else 18162 0, 18163 #endif 18164 #endif 18165 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18166 PHYMOD_SYMBOL_FLAG_REGISTER, 18167 "UC_IRAM_CTL1r", 18168 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18169 "MICRO_B_COM_IRAM_CONTROL1", 18170 NULL, 18171 #endif 18172 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18173 0x0, /* 0 */ 18174 0, 18175 #endif 18176 }, 18177 { 18178 BCMI_QSGMIIE_SERDES_MDIO_MASKDATAr, 18179 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18180 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 18181 BCMI_QSGMIIE_SERDES_MDIO_MASKDATAr_fields, 18182 #else 18183 0, 18184 #endif 18185 #endif 18186 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18187 PHYMOD_SYMBOL_FLAG_REGISTER, 18188 "MDIO_MASKDATAr", 18189 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18190 "MDIO_MMDSEL_AER_COM_MDIO_MASKDATA", 18191 NULL, 18192 #endif 18193 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18194 0x0, /* 0 */ 18195 0, 18196 #endif 18197 }, 18198 { 18199 BCMI_QSGMIIE_SERDES_MDIO_BCST_PORT_ADDRr, 18200 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18201 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 18202 BCMI_QSGMIIE_SERDES_MDIO_BCST_PORT_ADDRr_fields, 18203 #else 18204 0, 18205 #endif 18206 #endif 18207 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18208 PHYMOD_SYMBOL_FLAG_REGISTER, 18209 "MDIO_BCST_PORT_ADDRr", 18210 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18211 "MDIO_MMDSEL_AER_COM_MDIO_BRCST_PORT_ADDR", 18212 NULL, 18213 #endif 18214 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18215 0x1f, /* 31 */ 18216 0, 18217 #endif 18218 }, 18219 { 18220 BCMI_QSGMIIE_SERDES_MDIO_MMD_SELr, 18221 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18222 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 18223 BCMI_QSGMIIE_SERDES_MDIO_MMD_SELr_fields, 18224 #else 18225 0, 18226 #endif 18227 #endif 18228 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18229 PHYMOD_SYMBOL_FLAG_REGISTER, 18230 "MDIO_MMD_SELr", 18231 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18232 "MDIO_MMDSEL_AER_COM_MDIO_MMD_SELECT", 18233 NULL, 18234 #endif 18235 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18236 0x404d, /* 16461 */ 18237 0, 18238 #endif 18239 }, 18240 { 18241 BCMI_QSGMIIE_SERDES_MDIO_AERr, 18242 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18243 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 18244 BCMI_QSGMIIE_SERDES_MDIO_AERr_fields, 18245 #else 18246 0, 18247 #endif 18248 #endif 18249 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18250 PHYMOD_SYMBOL_FLAG_REGISTER, 18251 "MDIO_AERr", 18252 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18253 "MDIO_MMDSEL_AER_COM_MDIO_AER", 18254 NULL, 18255 #endif 18256 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18257 0x0, /* 0 */ 18258 0, 18259 #endif 18260 }, 18261 { 18262 BCMI_QSGMIIE_SERDES_MDIO_BLK_ADDRr, 18263 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 18264 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_QSGMIIE_SERDES 18265 BCMI_QSGMIIE_SERDES_MDIO_BLK_ADDRr_fields, 18266 #else 18267 0, 18268 #endif 18269 #endif 18270 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 18271 PHYMOD_SYMBOL_FLAG_REGISTER, 18272 "MDIO_BLK_ADDRr", 18273 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 18274 "MDIO_BLK_ADDR_COM_BLK_ADDR", 18275 NULL, 18276 #endif 18277 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 18278 0x0, /* 0 */ 18279 0, 18280 #endif 18281 }, 18282 #endif 18283 }; 18284 18285 18286 phymod_symbols_t bcmi_qsgmiie_serdes_symbols = 18287 { 18288 bcmi_qsgmiie_serdes_syms, sizeof(bcmi_qsgmiie_serdes_syms)/sizeof(bcmi_qsgmiie_serdes_syms[0]), 18289 #if PHYMOD_CONFIG_INCLUDE_FIELD_NAMES == 1 18290 bcmi_qsgmiie_serdes_fields 18291 #else 18292 NULL 18293 #endif 18294 /* END OF SYMBOL FILE */ 18295 }; 18296 18297 #endif /* PHYMOD_CONFIG_INCLUDE_CHIP_SYMBOLS */