bcmi_blackhawk_xgxs_sym.c (458527B)
1 /******************************************************************************* 2 * 3 * 4 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 5 * 6 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 7 * 8 * DO NOT EDIT THIS FILE! 9 * This file is auto-generated from the registers file. 10 * Edits to this file will be lost when it is regenerated. 11 * 12 * Symbol table file for the BCMI_BLACKHAWK_XGXS. 13 * This symbol table is used by the Broadcom debug shell. 14 */ 15 16 17 #include <phymod/chip/bcmi_blackhawk_xgxs_defs.h> 18 #include <phymod/phymod_symbols.h> 19 20 /* No symbols will be compiled unless this is defined. */ 21 #if PHYMOD_CONFIG_INCLUDE_CHIP_SYMBOLS == 1 22 /******************************************************************************* 23 * 24 * If PHYMOD_CONFIG_INCLUDE_FIELD_INFO is 1, then symbol information 25 * necessary to encode and decode the individual fields of a register or memory 26 * will be available. 27 * 28 * Without it, only the register and memory names will be symbolically available 29 * and their values will be displayed as raw data only. 30 * 31 * Field information can be compiled out in the interest of saving code space. 32 */ 33 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 34 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 35 36 static uint32_t BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_CTL0r_fields[] = 37 { 38 /* AMS_PLL_SET_CLK4PCS:0:1 */ 39 PHYMOD_SYMBOL_FIELD_ENCODE(107, 1, 0), 40 /* AMS_PLL_CP_CMFDBK_IADJ:2:3 */ 41 PHYMOD_SYMBOL_FIELD_ENCODE(35, 3, 2), 42 /* AMS_PLL_FP3_CTRL:4:7 */ 43 PHYMOD_SYMBOL_FIELD_ENCODE(46, 7, 4), 44 /* AMS_PLL_FP3_RH:8:8 */ 45 PHYMOD_SYMBOL_FIELD_ENCODE(47, 8, 8), 46 /* AMS_PLL_LPF_RZ:9:10 */ 47 PHYMOD_SYMBOL_FIELD_ENCODE(80, 10, 9), 48 /* AMS_PLL_SPARE_11_11:11:11 */ 49 PHYMOD_SYMBOL_FIELD_ENCODE(109, 11, 11), 50 /* AMS_PLL_RESCAL_AUX:12:15 */ 51 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(97, 15, 12) 52 }; 53 static uint32_t BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_CTL1r_fields[] = 54 { 55 /* AMS_PLL_COMP_THRESH:0:2 */ 56 PHYMOD_SYMBOL_FIELD_ENCODE(34, 2, 0), 57 /* AMS_PLL_DRV_HV_DISABLE:3:3 */ 58 PHYMOD_SYMBOL_FIELD_ENCODE(42, 3, 3), 59 /* AMS_PLL_SPARE_20_20:4:4 */ 60 PHYMOD_SYMBOL_FIELD_ENCODE(112, 4, 4), 61 /* AMS_PLL_VCO_RES_CS:5:5 */ 62 PHYMOD_SYMBOL_FIELD_ENCODE(129, 5, 5), 63 /* AMS_PLL_VCO_AUTOGM:6:6 */ 64 PHYMOD_SYMBOL_FIELD_ENCODE(128, 6, 6), 65 /* AMS_PLL_VCO2_15G:7:7 */ 66 PHYMOD_SYMBOL_FIELD_ENCODE(125, 7, 7), 67 /* AMS_PLL_VCOICTRL:8:9 */ 68 PHYMOD_SYMBOL_FIELD_ENCODE(127, 9, 8), 69 /* AMS_PLL_TEST_VCO2_CSSW:10:10 */ 70 PHYMOD_SYMBOL_FIELD_ENCODE(118, 10, 10), 71 /* AMS_PLL_IVCO:11:13 */ 72 PHYMOD_SYMBOL_FIELD_ENCODE(76, 13, 11), 73 /* AMS_PLL_RESET:14:14 */ 74 PHYMOD_SYMBOL_FIELD_ENCODE(98, 14, 14), 75 /* AMS_PLL_ENABLE_FTUNE:15:15 */ 76 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(43, 15, 15) 77 }; 78 static uint32_t BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_CTL2r_fields[] = 79 { 80 /* AMS_PLL_IQP:0:3 */ 81 PHYMOD_SYMBOL_FIELD_ENCODE(75, 3, 0), 82 /* AMS_PLL_VDD88_EN:4:4 */ 83 PHYMOD_SYMBOL_FIELD_ENCODE(130, 4, 4), 84 /* AMS_PLL_REFL_PLL:5:5 */ 85 PHYMOD_SYMBOL_FIELD_ENCODE(96, 5, 5), 86 /* AMS_PLL_REFH_PLL:6:6 */ 87 PHYMOD_SYMBOL_FIELD_ENCODE(95, 6, 6), 88 /* AMS_PLL_IMIN_IBIAS:7:7 */ 89 PHYMOD_SYMBOL_FIELD_ENCODE(61, 7, 7), 90 /* AMS_PLL_IMODE_IBIAS:8:8 */ 91 PHYMOD_SYMBOL_FIELD_ENCODE(68, 8, 8), 92 /* AMS_PLL_IMAX_IBIAS:9:9 */ 93 PHYMOD_SYMBOL_FIELD_ENCODE(54, 9, 9), 94 /* AMS_PLL_IMIN_ICP:10:10 */ 95 PHYMOD_SYMBOL_FIELD_ENCODE(65, 10, 10), 96 /* AMS_PLL_IMODE_ICP:11:11 */ 97 PHYMOD_SYMBOL_FIELD_ENCODE(72, 11, 11), 98 /* AMS_PLL_IMAX_ICP:12:12 */ 99 PHYMOD_SYMBOL_FIELD_ENCODE(58, 12, 12), 100 /* AMS_PLL_IMIN_ICK:13:13 */ 101 PHYMOD_SYMBOL_FIELD_ENCODE(62, 13, 13), 102 /* AMS_PLL_IMODE_ICK:14:14 */ 103 PHYMOD_SYMBOL_FIELD_ENCODE(69, 14, 14), 104 /* AMS_PLL_IMAX_ICK:15:15 */ 105 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(55, 15, 15) 106 }; 107 static uint32_t BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_CTL3r_fields[] = 108 { 109 /* AMS_PLL_IMIN_IRXCLKBUF:0:0 */ 110 PHYMOD_SYMBOL_FIELD_ENCODE(67, 0, 0), 111 /* AMS_PLL_IMODE_IRXCLKBUF:1:1 */ 112 PHYMOD_SYMBOL_FIELD_ENCODE(74, 1, 1), 113 /* AMS_PLL_IMAX_IRXCLKBUF:2:2 */ 114 PHYMOD_SYMBOL_FIELD_ENCODE(60, 2, 2), 115 /* AMS_PLL_IMIN_ICMLDIV:3:3 */ 116 PHYMOD_SYMBOL_FIELD_ENCODE(63, 3, 3), 117 /* AMS_PLL_IMODE_ICMLDIV:4:4 */ 118 PHYMOD_SYMBOL_FIELD_ENCODE(70, 4, 4), 119 /* AMS_PLL_IMAX_ICMLDIV:5:5 */ 120 PHYMOD_SYMBOL_FIELD_ENCODE(56, 5, 5), 121 /* AMS_PLL_IMIN_ICOMP:6:6 */ 122 PHYMOD_SYMBOL_FIELD_ENCODE(64, 6, 6), 123 /* AMS_PLL_IMODE_ICOMP:7:7 */ 124 PHYMOD_SYMBOL_FIELD_ENCODE(71, 7, 7), 125 /* AMS_PLL_IMAX_ICOMP:8:8 */ 126 PHYMOD_SYMBOL_FIELD_ENCODE(57, 8, 8), 127 /* AMS_PLL_IMIN_IOP:9:9 */ 128 PHYMOD_SYMBOL_FIELD_ENCODE(66, 9, 9), 129 /* AMS_PLL_IMODE_IOP:10:10 */ 130 PHYMOD_SYMBOL_FIELD_ENCODE(73, 10, 10), 131 /* AMS_PLL_IMAX_IOP:11:11 */ 132 PHYMOD_SYMBOL_FIELD_ENCODE(59, 11, 11), 133 /* AMS_PLL_TEST_VREF:12:12 */ 134 PHYMOD_SYMBOL_FIELD_ENCODE(120, 12, 12), 135 /* AMS_PLL_TEST_VC:13:13 */ 136 PHYMOD_SYMBOL_FIELD_ENCODE(117, 13, 13), 137 /* AMS_PLL_TEST_PLL:14:14 */ 138 PHYMOD_SYMBOL_FIELD_ENCODE(114, 14, 14), 139 /* AMS_PLL_TEST_RX:15:15 */ 140 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(116, 15, 15) 141 }; 142 static uint32_t BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_CTL4r_fields[] = 143 { 144 /* AMS_PLL_BGR_PTATADJ:0:3 */ 145 PHYMOD_SYMBOL_FIELD_ENCODE(31, 3, 0), 146 /* AMS_PLL_BGR_CTATADJ:4:7 */ 147 PHYMOD_SYMBOL_FIELD_ENCODE(30, 7, 4), 148 /* AMS_PLL_PLL2RX_CLKBW:8:9 */ 149 PHYMOD_SYMBOL_FIELD_ENCODE(91, 9, 8), 150 /* AMS_PLL_TEST_VDDR4BG:10:10 */ 151 PHYMOD_SYMBOL_FIELD_ENCODE(119, 10, 10), 152 /* AMS_PLL_VDDR_BGB:11:11 */ 153 PHYMOD_SYMBOL_FIELD_ENCODE(131, 11, 11), 154 /* AMS_PLL_KVH_FORCE:12:13 */ 155 PHYMOD_SYMBOL_FIELD_ENCODE(78, 13, 12), 156 /* AMS_PLL_FORCE_KVH_BW:14:14 */ 157 PHYMOD_SYMBOL_FIELD_ENCODE(44, 14, 14), 158 /* AMS_PLL_FORCE_RESCAL:15:15 */ 159 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(45, 15, 15) 160 }; 161 static uint32_t BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_CTL5r_fields[] = 162 { 163 /* AMS_PLL_MAX_TEST_PORT_AMPLITUDE:0:0 */ 164 PHYMOD_SYMBOL_FIELD_ENCODE(81, 0, 0), 165 /* AMS_PLL_BGIP:1:1 */ 166 PHYMOD_SYMBOL_FIELD_ENCODE(29, 1, 1), 167 /* AMS_PLL_BGINT:2:2 */ 168 PHYMOD_SYMBOL_FIELD_ENCODE(28, 2, 2), 169 /* AMS_PLL_VBYPASS:3:3 */ 170 PHYMOD_SYMBOL_FIELD_ENCODE(124, 3, 3), 171 /* AMS_PLL_TEST_PNP:4:5 */ 172 PHYMOD_SYMBOL_FIELD_ENCODE(115, 5, 4), 173 /* AMS_PLL_MIX3P1C_CALR_CTATADJ:6:10 */ 174 PHYMOD_SYMBOL_FIELD_ENCODE(84, 10, 6), 175 /* AMS_PLL_MIX3P1C_CALR_PTATADJ:11:15 */ 176 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(85, 15, 11) 177 }; 178 static uint32_t BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_CTL6r_fields[] = 179 { 180 /* AMS_PLL_RTERM200:0:0 */ 181 PHYMOD_SYMBOL_FIELD_ENCODE(99, 0, 0), 182 /* AMS_PLL_DIV2:1:1 */ 183 PHYMOD_SYMBOL_FIELD_ENCODE(37, 1, 1), 184 /* AMS_PLL_DIV4:2:2 */ 185 PHYMOD_SYMBOL_FIELD_ENCODE(38, 2, 2), 186 /* AMS_PLL_RTERM400:3:3 */ 187 PHYMOD_SYMBOL_FIELD_ENCODE(101, 3, 3), 188 /* AMS_PLL_RTERMHIZ:4:4 */ 189 PHYMOD_SYMBOL_FIELD_ENCODE(102, 4, 4), 190 /* AMS_PLL_RTERM300:5:5 */ 191 PHYMOD_SYMBOL_FIELD_ENCODE(100, 5, 5), 192 /* AMS_PLL_CLK4SYNC_DIV:6:6 */ 193 PHYMOD_SYMBOL_FIELD_ENCODE(32, 6, 6), 194 /* AMS_PLL_CLK4SYNC_EN:7:7 */ 195 PHYMOD_SYMBOL_FIELD_ENCODE(33, 7, 7), 196 /* AMS_PLL_DOUBLER_CAP:8:10 */ 197 PHYMOD_SYMBOL_FIELD_ENCODE(40, 10, 8), 198 /* AMS_PLL_SET_CLK4PCS_MSB:11:11 */ 199 PHYMOD_SYMBOL_FIELD_ENCODE(108, 11, 11), 200 /* AMS_PLL_DOUBLER_RES:12:14 */ 201 PHYMOD_SYMBOL_FIELD_ENCODE(41, 14, 12), 202 /* AMS_PLL_REFCLK_DOUBLER:15:15 */ 203 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(94, 15, 15) 204 }; 205 static uint32_t BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_CTL7r_fields[] = 206 { 207 /* AMS_PLL_TEST_FRACN_EN:0:0 */ 208 PHYMOD_SYMBOL_FIELD_ENCODE(113, 0, 0), 209 /* AMS_PLL_PFD_SKEW_ENLARGE:1:1 */ 210 PHYMOD_SYMBOL_FIELD_ENCODE(90, 1, 1), 211 /* AMS_PLL_PFD_FB_SKEW:2:2 */ 212 PHYMOD_SYMBOL_FIELD_ENCODE(88, 2, 2), 213 /* AMS_PLL_PFD_REF_SKEW:3:3 */ 214 PHYMOD_SYMBOL_FIELD_ENCODE(89, 3, 3), 215 /* AMS_PLL_NDIV_FRAC_VALID:4:4 */ 216 PHYMOD_SYMBOL_FIELD_ENCODE(87, 4, 4), 217 /* AMS_PLL_VCODIV_REFOUT:5:5 */ 218 PHYMOD_SYMBOL_FIELD_ENCODE(126, 5, 5), 219 /* AMS_PLL_MIX3P1CR_CTATADJ:6:10 */ 220 PHYMOD_SYMBOL_FIELD_ENCODE(82, 10, 6), 221 /* AMS_PLL_MIX3P1CR_PTATADJ:11:15 */ 222 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(83, 15, 11) 223 }; 224 static uint32_t BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_CTL8r_fields[] = 225 { 226 /* AMS_PLL_FRACN_DIV:0:15 */ 227 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(49, 15, 0) 228 }; 229 static uint32_t BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_CTL9r_fields[] = 230 { 231 /* AMS_PLL_FRACN_DIV_17_16:0:1 */ 232 PHYMOD_SYMBOL_FIELD_ENCODE(51, 1, 0), 233 /* AMS_PLL_FRACN_DIVRANGE:2:2 */ 234 PHYMOD_SYMBOL_FIELD_ENCODE(50, 2, 2), 235 /* AMS_PLL_FRACN_BYPASS:3:3 */ 236 PHYMOD_SYMBOL_FIELD_ENCODE(48, 3, 3), 237 /* AMS_PLL_FRACN_NDIV_INT:4:13 */ 238 PHYMOD_SYMBOL_FIELD_ENCODE(52, 13, 4), 239 /* AMS_PLL_DITHEREN:14:14 */ 240 PHYMOD_SYMBOL_FIELD_ENCODE(36, 14, 14), 241 /* AMS_PLL_FRACN_SEL:15:15 */ 242 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(53, 15, 15) 243 }; 244 static uint32_t BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_CTL_10r_fields[] = 245 { 246 /* AMS_PLL_RX_CLK_RPTR_PD:0:0 */ 247 PHYMOD_SYMBOL_FIELD_ENCODE(106, 0, 0), 248 /* AMS_PLL_RX_CLKRPTR_BIAS:1:3 */ 249 PHYMOD_SYMBOL_FIELD_ENCODE(104, 3, 1), 250 /* AMS_PLL_RX_CLKRPTR_BW:4:5 */ 251 PHYMOD_SYMBOL_FIELD_ENCODE(105, 5, 4), 252 /* AMS_PLL_SPARE_167_166:6:7 */ 253 PHYMOD_SYMBOL_FIELD_ENCODE(110, 7, 6), 254 /* AMS_PLL_TX_CLK_RPTR_PD:8:8 */ 255 PHYMOD_SYMBOL_FIELD_ENCODE(123, 8, 8), 256 /* AMS_PLL_TX_CLKRPTR_BIAS:9:11 */ 257 PHYMOD_SYMBOL_FIELD_ENCODE(121, 11, 9), 258 /* AMS_PLL_TX_CLKRPTR_BW:12:13 */ 259 PHYMOD_SYMBOL_FIELD_ENCODE(122, 13, 12), 260 /* AMS_PLL_SPARE_175_174:14:15 */ 261 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(111, 15, 14) 262 }; 263 static uint32_t BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_INTCTLr_fields[] = 264 { 265 /* AMS_PLL_RTERM_SEL:0:0 */ 266 PHYMOD_SYMBOL_FIELD_ENCODE(103, 0, 0), 267 /* AMS_PLL_DIV4_2_SEL:1:1 */ 268 PHYMOD_SYMBOL_FIELD_ENCODE(39, 1, 1), 269 /* AMS_PLL_PWRDN:2:2 */ 270 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(92, 2, 2) 271 }; 272 static uint32_t BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_STSr_fields[] = 273 { 274 /* AMS_PLL_MODE:0:4 */ 275 PHYMOD_SYMBOL_FIELD_ENCODE(86, 4, 0), 276 /* AMS_PLL_LOW:5:5 */ 277 PHYMOD_SYMBOL_FIELD_ENCODE(79, 5, 5), 278 /* AMS_PLL_RANGE:6:13 */ 279 PHYMOD_SYMBOL_FIELD_ENCODE(93, 13, 6), 280 /* AMS_PLL_KVH:14:15 */ 281 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(77, 15, 14) 282 }; 283 static uint32_t BCMI_BLACKHAWK_XGXS_AMS_RX_RX_CTL0r_fields[] = 284 { 285 /* AMS_RX_MASTER_DIODES_IBIAS:0:2 */ 286 PHYMOD_SYMBOL_FIELD_ENCODE(164, 2, 0), 287 /* AMS_RX_SIGDET_THRESHOLD:3:5 */ 288 PHYMOD_SYMBOL_FIELD_ENCODE(195, 5, 3), 289 /* AMS_RX_SIGDET_PWRDN:6:6 */ 290 PHYMOD_SYMBOL_FIELD_ENCODE(194, 6, 6), 291 /* AMS_RX_RXCLK66_EN:7:7 */ 292 PHYMOD_SYMBOL_FIELD_ENCODE(183, 7, 7), 293 /* AMS_RX_TPORT_EN:8:8 */ 294 PHYMOD_SYMBOL_FIELD_ENCODE(199, 8, 8), 295 /* AMS_RX_VGA_10G_BW:9:9 */ 296 PHYMOD_SYMBOL_FIELD_ENCODE(208, 9, 9), 297 /* AMS_RX_EQ_LZ_EN:10:10 */ 298 PHYMOD_SYMBOL_FIELD_ENCODE(158, 10, 10), 299 /* AMS_RX_DFE_HGAIN_EN:11:11 */ 300 PHYMOD_SYMBOL_FIELD_ENCODE(150, 11, 11), 301 /* AMS_RX_DC_COUPLE:12:12 */ 302 PHYMOD_SYMBOL_FIELD_ENCODE(145, 12, 12), 303 /* AMS_RX_PEAKING_FILTER_IBIAS:13:15 */ 304 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(170, 15, 13) 305 }; 306 static uint32_t BCMI_BLACKHAWK_XGXS_AMS_RX_RX_CTL1r_fields[] = 307 { 308 /* AMS_RX_BYPASS_AC_CAP:0:0 */ 309 PHYMOD_SYMBOL_FIELD_ENCODE(132, 0, 0), 310 /* AMS_RX_VGA0_IBIAS:1:3 */ 311 PHYMOD_SYMBOL_FIELD_ENCODE(201, 3, 1), 312 /* AMS_RX_VGA1_IBIAS:4:6 */ 313 PHYMOD_SYMBOL_FIELD_ENCODE(203, 6, 4), 314 /* AMS_RX_VGA2_IBIAS:7:9 */ 315 PHYMOD_SYMBOL_FIELD_ENCODE(205, 9, 7), 316 /* AMS_RX_PF3_IBIAS:10:12 */ 317 PHYMOD_SYMBOL_FIELD_ENCODE(174, 12, 10), 318 /* AMS_RX_CM_VOLTAGE_IBIAS:13:15 */ 319 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(136, 15, 13) 320 }; 321 static uint32_t BCMI_BLACKHAWK_XGXS_AMS_RX_RX_CTL2r_fields[] = 322 { 323 /* AMS_RX_SIGDET_IBIAS:0:2 */ 324 PHYMOD_SYMBOL_FIELD_ENCODE(193, 2, 0), 325 /* AMS_RX_PHASE_INTERPOLATORS_IBIAS:3:5 */ 326 PHYMOD_SYMBOL_FIELD_ENCODE(180, 5, 3), 327 /* AMS_RX_DFE_TAP_WEIGHT_IBIAS:6:8 */ 328 PHYMOD_SYMBOL_FIELD_ENCODE(154, 8, 6), 329 /* AMS_RX_DFESUM_BW:9:10 */ 330 PHYMOD_SYMBOL_FIELD_ENCODE(148, 10, 9), 331 /* AMS_RX_SEL_TH4DFE:11:12 */ 332 PHYMOD_SYMBOL_FIELD_ENCODE(190, 12, 11), 333 /* AMS_RX_PD_CH_P1:13:13 */ 334 PHYMOD_SYMBOL_FIELD_ENCODE(168, 13, 13), 335 /* AMS_RX_VGA3_IND:14:14 */ 336 PHYMOD_SYMBOL_FIELD_ENCODE(207, 14, 14), 337 /* AMS_RX_PWRDN_FTAP:15:15 */ 338 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(181, 15, 15) 339 }; 340 static uint32_t BCMI_BLACKHAWK_XGXS_AMS_RX_RX_CTL3r_fields[] = 341 { 342 /* AMS_RX_MET_R_IBIAS:0:2 */ 343 PHYMOD_SYMBOL_FIELD_ENCODE(165, 2, 0), 344 /* AMS_RX_DLL_IBIAS:3:5 */ 345 PHYMOD_SYMBOL_FIELD_ENCODE(155, 5, 3), 346 /* AMS_RX_OFFSET_CORRECTION_IBIAS:6:8 */ 347 PHYMOD_SYMBOL_FIELD_ENCODE(166, 8, 6), 348 /* AMS_RX_DFE_SUM_BUF_IBIAS:9:11 */ 349 PHYMOD_SYMBOL_FIELD_ENCODE(153, 11, 9), 350 /* AMS_RX_DFE_SLICER_IBIAS:12:14 */ 351 PHYMOD_SYMBOL_FIELD_ENCODE(151, 14, 12), 352 /* AMS_RX_FFE_ENABLE:15:15 */ 353 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(160, 15, 15) 354 }; 355 static uint32_t BCMI_BLACKHAWK_XGXS_AMS_RX_RX_CTL4r_fields[] = 356 { 357 /* AMS_RX_FFE_SUMMER_TAP_IBIAS:0:2 */ 358 PHYMOD_SYMBOL_FIELD_ENCODE(162, 2, 0), 359 /* AMS_RX_FFE_SHA_IBIAS:3:5 */ 360 PHYMOD_SYMBOL_FIELD_ENCODE(161, 5, 3), 361 /* AMS_RX_VGA0_RESCAL_MUX:6:10 */ 362 PHYMOD_SYMBOL_FIELD_ENCODE(202, 10, 6), 363 /* AMS_RX_VGA1_RESCAL_MUX:11:15 */ 364 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(204, 15, 11) 365 }; 366 static uint32_t BCMI_BLACKHAWK_XGXS_AMS_RX_RX_CTL5r_fields[] = 367 { 368 /* AMS_RX_VGA2_RESCAL_MUX:0:4 */ 369 PHYMOD_SYMBOL_FIELD_ENCODE(206, 4, 0), 370 /* AMS_RX_SD_CAL_NEG:5:7 */ 371 PHYMOD_SYMBOL_FIELD_ENCODE(186, 7, 5), 372 /* AMS_RX_SD_CAL_POS:8:10 */ 373 PHYMOD_SYMBOL_FIELD_ENCODE(188, 10, 8), 374 /* AMS_RX_SD_CAL_POLARITY:11:11 */ 375 PHYMOD_SYMBOL_FIELD_ENCODE(187, 11, 11), 376 /* AMS_RX_TESTCLK_DIV:12:13 */ 377 PHYMOD_SYMBOL_FIELD_ENCODE(197, 13, 12), 378 /* AMS_RX_TESTCLK_MUX:14:14 */ 379 PHYMOD_SYMBOL_FIELD_ENCODE(198, 14, 14), 380 /* AMS_RX_SD_CAL_EN:15:15 */ 381 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(185, 15, 15) 382 }; 383 static uint32_t BCMI_BLACKHAWK_XGXS_AMS_RX_RX_CTL6r_fields[] = 384 { 385 /* AMS_RX_PEAKING_FILTER_RESCAL_MUX:0:3 */ 386 PHYMOD_SYMBOL_FIELD_ENCODE(171, 3, 0), 387 /* AMS_RX_OFFSET_CORRECTION_RESCAL_MUX:4:7 */ 388 PHYMOD_SYMBOL_FIELD_ENCODE(167, 7, 4), 389 /* AMS_RX_RXCLK32_EN:8:8 */ 390 PHYMOD_SYMBOL_FIELD_ENCODE(182, 8, 8), 391 /* AMS_RX_PD_PHS_SLR:9:9 */ 392 PHYMOD_SYMBOL_FIELD_ENCODE(169, 9, 9), 393 /* AMS_RX_DFESUM_LP:10:10 */ 394 PHYMOD_SYMBOL_FIELD_ENCODE(149, 10, 10), 395 /* AMS_RX_CML_LP:11:11 */ 396 PHYMOD_SYMBOL_FIELD_ENCODE(135, 11, 11), 397 /* AMS_RX_EN_TAP9DELAY:12:13 */ 398 PHYMOD_SYMBOL_FIELD_ENCODE(156, 13, 12), 399 /* AMS_RX_DFE_SUMMER_VCM:14:15 */ 400 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(152, 15, 14) 401 }; 402 static uint32_t BCMI_BLACKHAWK_XGXS_AMS_RX_RX_CTL7r_fields[] = 403 { 404 /* AMS_RX_DC_OFFSET:0:7 */ 405 PHYMOD_SYMBOL_FIELD_ENCODE(146, 7, 0), 406 /* AMS_RX_FORCE_DC_OFFSET:8:8 */ 407 PHYMOD_SYMBOL_FIELD_ENCODE(163, 8, 8), 408 /* AMS_RX_RX_OFFSET_PD:9:9 */ 409 PHYMOD_SYMBOL_FIELD_ENCODE(184, 9, 9), 410 /* AMS_RX_SHORT_VGA_OUTPUT:10:10 */ 411 PHYMOD_SYMBOL_FIELD_ENCODE(191, 10, 10), 412 /* AMS_RX_DC_OFFSET_HALF_RANGE:11:11 */ 413 PHYMOD_SYMBOL_FIELD_ENCODE(147, 11, 11), 414 /* AMS_RX_EQ_IND_DIS:12:12 */ 415 PHYMOD_SYMBOL_FIELD_ENCODE(157, 12, 12), 416 /* AMS_RX_EQ_PKCOMP_DIS:13:13 */ 417 PHYMOD_SYMBOL_FIELD_ENCODE(159, 13, 13), 418 /* AMS_RX_VGA_STEP_MODE:14:15 */ 419 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(211, 15, 14) 420 }; 421 static uint32_t BCMI_BLACKHAWK_XGXS_AMS_RX_RX_CTL8r_fields[] = 422 { 423 /* AMS_RX_DAC4CK_LMS_I:0:3 */ 424 PHYMOD_SYMBOL_FIELD_ENCODE(140, 3, 0), 425 /* AMS_RX_DAC4CK_LMS_Q:4:7 */ 426 PHYMOD_SYMBOL_FIELD_ENCODE(141, 7, 4), 427 /* AMS_RX_DAC4CK_PHS_I:8:11 */ 428 PHYMOD_SYMBOL_FIELD_ENCODE(142, 11, 8), 429 /* AMS_RX_DAC4CK_PHS_Q:12:15 */ 430 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(143, 15, 12) 431 }; 432 static uint32_t BCMI_BLACKHAWK_XGXS_AMS_RX_RX_CTL9r_fields[] = 433 { 434 /* AMS_RX_DAC4CK_DAT_I:0:3 */ 435 PHYMOD_SYMBOL_FIELD_ENCODE(138, 3, 0), 436 /* AMS_RX_DAC4CK_DAT_Q:4:7 */ 437 PHYMOD_SYMBOL_FIELD_ENCODE(139, 7, 4), 438 /* AMS_RX_CLK_BW_CTRL:8:9 */ 439 PHYMOD_SYMBOL_FIELD_ENCODE(133, 9, 8), 440 /* AMS_RX_SPARE_154:10:10 */ 441 PHYMOD_SYMBOL_FIELD_ENCODE(196, 10, 10), 442 /* AMS_RX_SEL_D2CLP:11:11 */ 443 PHYMOD_SYMBOL_FIELD_ENCODE(189, 11, 11), 444 /* AMS_RX_D2C_CLKBUF_IBIAS:12:14 */ 445 PHYMOD_SYMBOL_FIELD_ENCODE(137, 14, 12), 446 /* AMS_RX_CLOCK_CAL_EN:15:15 */ 447 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(134, 15, 15) 448 }; 449 static uint32_t BCMI_BLACKHAWK_XGXS_AMS_RX_RX_CTL_10r_fields[] = 450 { 451 /* AMS_RX_PF3_CTRL:0:3 */ 452 PHYMOD_SYMBOL_FIELD_ENCODE(173, 3, 0), 453 /* AMS_RX_PF3_RESCAL_MUX:4:7 */ 454 PHYMOD_SYMBOL_FIELD_ENCODE(179, 7, 4), 455 /* AMS_RX_PF3_MAX_BW:8:8 */ 456 PHYMOD_SYMBOL_FIELD_ENCODE(177, 8, 8), 457 /* AMS_RX_PF3_LZ_EN:9:9 */ 458 PHYMOD_SYMBOL_FIELD_ENCODE(176, 9, 9), 459 /* AMS_RX_PF3_IND_DIS:10:10 */ 460 PHYMOD_SYMBOL_FIELD_ENCODE(175, 10, 10), 461 /* AMS_RX_PF3_PKCOMP_DIS:11:11 */ 462 PHYMOD_SYMBOL_FIELD_ENCODE(178, 11, 11), 463 /* AMS_RX_VGA_BW_CTRL_CAP:12:13 */ 464 PHYMOD_SYMBOL_FIELD_ENCODE(209, 13, 12), 465 /* AMS_RX_VGA_BW_CTRL_IND:14:15 */ 466 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(210, 15, 14) 467 }; 468 static uint32_t BCMI_BLACKHAWK_XGXS_AMS_RX_RX_STSr_fields[] = 469 { 470 /* AMS_RX_VGA:0:4 */ 471 PHYMOD_SYMBOL_FIELD_ENCODE(200, 4, 0), 472 /* AMS_RX_DATA_THRESH_SEL:5:10 */ 473 PHYMOD_SYMBOL_FIELD_ENCODE(144, 10, 5), 474 /* AMS_RX_PF:11:14 */ 475 PHYMOD_SYMBOL_FIELD_ENCODE(172, 14, 11), 476 /* AMS_RX_SIGDET:15:15 */ 477 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(192, 15, 15) 478 }; 479 static uint32_t BCMI_BLACKHAWK_XGXS_AMS_TX_TX_CTL0r_fields[] = 480 { 481 /* AMS_TX_SKEW_PN:0:2 */ 482 PHYMOD_SYMBOL_FIELD_ENCODE(228, 2, 0), 483 /* AMS_TX_SKEW_POLARITY:3:3 */ 484 PHYMOD_SYMBOL_FIELD_ENCODE(229, 3, 3), 485 /* AMS_TX_SKEW_ENABLE:4:4 */ 486 PHYMOD_SYMBOL_FIELD_ENCODE(227, 4, 4), 487 /* AMS_TX_SPARE_5:5:5 */ 488 PHYMOD_SYMBOL_FIELD_ENCODE(235, 5, 5), 489 /* AMS_TX_TICKSEL:6:7 */ 490 PHYMOD_SYMBOL_FIELD_ENCODE(241, 7, 6), 491 /* AMS_TX_VDDR_BGB:8:8 */ 492 PHYMOD_SYMBOL_FIELD_ENCODE(244, 8, 8), 493 /* AMS_TX_SPARE_9:9:9 */ 494 PHYMOD_SYMBOL_FIELD_ENCODE(239, 9, 9), 495 /* AMS_TX_DCC_DIS:10:10 */ 496 PHYMOD_SYMBOL_FIELD_ENCODE(215, 10, 10), 497 /* AMS_TX_CAL_OFF:11:11 */ 498 PHYMOD_SYMBOL_FIELD_ENCODE(214, 11, 11), 499 /* AMS_TX_CAL_AUX:12:15 */ 500 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(213, 15, 12) 501 }; 502 static uint32_t BCMI_BLACKHAWK_XGXS_AMS_TX_TX_CTL1r_fields[] = 503 { 504 /* AMS_TX_IBIAS:0:2 */ 505 PHYMOD_SYMBOL_FIELD_ENCODE(220, 2, 0), 506 /* AMS_TX_IPHINT:3:5 */ 507 PHYMOD_SYMBOL_FIELD_ENCODE(222, 5, 3), 508 /* AMS_TX_SPARE_24_22:6:8 */ 509 PHYMOD_SYMBOL_FIELD_ENCODE(232, 8, 6), 510 /* AMS_TX_ILDO:9:11 */ 511 PHYMOD_SYMBOL_FIELD_ENCODE(221, 11, 9), 512 /* AMS_TX_LDO_VREF:12:13 */ 513 PHYMOD_SYMBOL_FIELD_ENCODE(224, 13, 12), 514 /* AMS_TX_TXCLK66_EN:14:14 */ 515 PHYMOD_SYMBOL_FIELD_ENCODE(243, 14, 14), 516 /* AMS_TX_TXCLK32_EN:15:15 */ 517 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(242, 15, 15) 518 }; 519 static uint32_t BCMI_BLACKHAWK_XGXS_AMS_TX_TX_CTL2r_fields[] = 520 { 521 /* AMS_TX_HPF_CTRL:0:1 */ 522 PHYMOD_SYMBOL_FIELD_ENCODE(219, 1, 0), 523 /* AMS_TX_SPARE_34:2:2 */ 524 PHYMOD_SYMBOL_FIELD_ENCODE(233, 2, 2), 525 /* AMS_TX_SLEW_RATE:3:3 */ 526 PHYMOD_SYMBOL_FIELD_ENCODE(230, 3, 3), 527 /* AMS_TX_TEST_DATA:4:5 */ 528 PHYMOD_SYMBOL_FIELD_ENCODE(240, 5, 4), 529 /* AMS_TX_DRIVER_RES_CAL:6:7 */ 530 PHYMOD_SYMBOL_FIELD_ENCODE(216, 7, 6), 531 /* AMS_TX_SPARE_46_40:8:14 */ 532 PHYMOD_SYMBOL_FIELD_ENCODE(234, 14, 8), 533 /* AMS_TX_ELEC_IDLE_AUX:15:15 */ 534 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(218, 15, 15) 535 }; 536 static uint32_t BCMI_BLACKHAWK_XGXS_AMS_TX_TX_CTL3r_fields[] = 537 { 538 /* AMS_TX_SPARE_52_48:0:4 */ 539 PHYMOD_SYMBOL_FIELD_ENCODE(236, 4, 0), 540 /* AMS_TX_PDET_MODE:5:5 */ 541 PHYMOD_SYMBOL_FIELD_ENCODE(225, 5, 5), 542 /* AMS_TX_SPARE_54:6:6 */ 543 PHYMOD_SYMBOL_FIELD_ENCODE(237, 6, 6), 544 /* AMS_TX_SEL_TXMASTER:7:7 */ 545 PHYMOD_SYMBOL_FIELD_ENCODE(226, 7, 7), 546 /* AMS_TX_SPARE_63_56:8:15 */ 547 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(238, 15, 8) 548 }; 549 static uint32_t BCMI_BLACKHAWK_XGXS_AMS_TX_TX_STSr_fields[] = 550 { 551 /* AMS_TX_VERSION_ID:0:7 */ 552 PHYMOD_SYMBOL_FIELD_ENCODE(245, 7, 0), 553 /* AMS_TX_ANA_RESCAL:8:11 */ 554 PHYMOD_SYMBOL_FIELD_ENCODE(212, 11, 8), 555 /* AMS_TX_DRV_HV_DISABLE:12:12 */ 556 PHYMOD_SYMBOL_FIELD_ENCODE(217, 12, 12), 557 /* AMS_TX_SPARE_13:13:13 */ 558 PHYMOD_SYMBOL_FIELD_ENCODE(231, 13, 13), 559 /* AMS_TX_LANE_ID:14:15 */ 560 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(223, 15, 14) 561 }; 562 static uint32_t BCMI_BLACKHAWK_XGXS_CORE_PLL_CORE_PLL_COM_STS2r_fields[] = 563 { 564 /* PLL_PWRDN_OR:0:0 */ 565 PHYMOD_SYMBOL_FIELD_ENCODE(830, 0, 0), 566 /* REFCLK_LOC:1:1 */ 567 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(909, 1, 1) 568 }; 569 static uint32_t BCMI_BLACKHAWK_XGXS_CORE_PLL_PLL_CFG_FWAPI_DATA0r_fields[] = 570 { 571 /* PLL_CFG_FWAPI_DATA0:0:15 */ 572 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(816, 15, 0) 573 }; 574 static uint32_t BCMI_BLACKHAWK_XGXS_CORE_PLL_PLL_CFG_FWAPI_DATA1r_fields[] = 575 { 576 /* PLL_CFG_FWAPI_DATA1:0:15 */ 577 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(817, 15, 0) 578 }; 579 static uint32_t BCMI_BLACKHAWK_XGXS_CORE_PLL_PLL_DP_RST_ST_STSr_fields[] = 580 { 581 /* CORE_DP_RESET_STATE:0:2 */ 582 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(376, 2, 0) 583 }; 584 static uint32_t BCMI_BLACKHAWK_XGXS_CORE_PLL_PMD_CORE_MODE_STSr_fields[] = 585 { 586 /* PMD_CORE_MODE:0:15 */ 587 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(838, 15, 0) 588 }; 589 static uint32_t BCMI_BLACKHAWK_XGXS_CORE_PLL_RST_CTL_PLL_DPr_fields[] = 590 { 591 /* PMD_CORE_DP_H_RSTB_PKILL:1:1 */ 592 PHYMOD_SYMBOL_FIELD_ENCODE(837, 1, 1), 593 /* REFCLK_LOC_MON_EN:2:2 */ 594 PHYMOD_SYMBOL_FIELD_ENCODE(910, 2, 2), 595 /* REFCLK_S_COMCLK_SEL:3:3 */ 596 PHYMOD_SYMBOL_FIELD_ENCODE(912, 3, 3), 597 /* REFCLK_S_COMCLK_FRC_ON:4:4 */ 598 PHYMOD_SYMBOL_FIELD_ENCODE(911, 4, 4), 599 /* VCOCLK4PCS_S_COMCLK_SEL:7:7 */ 600 PHYMOD_SYMBOL_FIELD_ENCODE(1496, 7, 7), 601 /* VCOCLK4PCS_S_COMCLK_FRC_ON:8:8 */ 602 PHYMOD_SYMBOL_FIELD_ENCODE(1495, 8, 8), 603 /* PMD_VCOCLK4PCS_VLD_FRC:9:9 */ 604 PHYMOD_SYMBOL_FIELD_ENCODE(858, 9, 9), 605 /* PMD_VCOCLK4PCS_VLD_FRC_VAL:10:10 */ 606 PHYMOD_SYMBOL_FIELD_ENCODE(859, 10, 10), 607 /* AFE_S_PLL_RESET_FRC_VAL:12:12 */ 608 PHYMOD_SYMBOL_FIELD_ENCODE(18, 12, 12), 609 /* AFE_S_PLL_RESET_FRC:13:13 */ 610 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(17, 13, 13) 611 }; 612 static uint32_t BCMI_BLACKHAWK_XGXS_CORE_PLL_TOP_USER_CTLr_fields[] = 613 { 614 /* CORE_DP_S_RSTB:13:13 */ 615 PHYMOD_SYMBOL_FIELD_ENCODE(377, 13, 13), 616 /* AFE_S_PLL_PWRDN:14:14 */ 617 PHYMOD_SYMBOL_FIELD_ENCODE(16, 14, 14), 618 /* CORE_HW_FW_HANDSHAKE_DISABLE:15:15 */ 619 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(378, 15, 15) 620 }; 621 static uint32_t BCMI_BLACKHAWK_XGXS_CORE_PLL_UC_ACK_CORE_CTLr_fields[] = 622 { 623 /* UC_ACK_CORE_CFG_DONE:0:0 */ 624 PHYMOD_SYMBOL_FIELD_ENCODE(1472, 0, 0), 625 /* UC_ACK_CORE_DP_RESET:1:1 */ 626 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1473, 1, 1) 627 }; 628 static uint32_t BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_DAC_TEST_CTLr_fields[] = 629 { 630 /* DAC_TEST_LANE_SEL_EN:0:7 */ 631 PHYMOD_SYMBOL_FIELD_ENCODE(381, 7, 0), 632 /* DAC_TEST_TEST_EN:8:8 */ 633 PHYMOD_SYMBOL_FIELD_ENCODE(396, 8, 8), 634 /* DAC_TEST_READ_EN:9:9 */ 635 PHYMOD_SYMBOL_FIELD_ENCODE(395, 9, 9), 636 /* DAC_TEST_READBACK_EN:10:10 */ 637 PHYMOD_SYMBOL_FIELD_ENCODE(394, 10, 10), 638 /* DAC_TEST_MEM_WRITE_PULSE:11:11 */ 639 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(383, 11, 11) 640 }; 641 static uint32_t BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_DAC_TEST_MEM_TESTr_fields[] = 642 { 643 /* DAC_TEST_MEM_TM:0:4 */ 644 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(382, 4, 0) 645 }; 646 static uint32_t BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_READBACK_ADDRr_fields[] = 647 { 648 /* DAC_TEST_READBACK_ADDRESS:0:5 */ 649 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(384, 5, 0) 650 }; 651 static uint32_t BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_READBACK_DATA0r_fields[] = 652 { 653 /* DAC_TEST_READBACK_DATA_0:0:15 */ 654 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(385, 15, 0) 655 }; 656 static uint32_t BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_READBACK_DATA1r_fields[] = 657 { 658 /* DAC_TEST_READBACK_DATA_1:0:15 */ 659 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(386, 15, 0) 660 }; 661 static uint32_t BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_READBACK_DATA2r_fields[] = 662 { 663 /* DAC_TEST_READBACK_DATA_2:0:15 */ 664 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(387, 15, 0) 665 }; 666 static uint32_t BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_READBACK_DATA3r_fields[] = 667 { 668 /* DAC_TEST_READBACK_DATA_3:0:15 */ 669 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(388, 15, 0) 670 }; 671 static uint32_t BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_READBACK_DATA4r_fields[] = 672 { 673 /* DAC_TEST_READBACK_DATA_4:0:15 */ 674 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(389, 15, 0) 675 }; 676 static uint32_t BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_READBACK_DATA5r_fields[] = 677 { 678 /* DAC_TEST_READBACK_DATA_5:0:15 */ 679 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(390, 15, 0) 680 }; 681 static uint32_t BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_READBACK_DATA6r_fields[] = 682 { 683 /* DAC_TEST_READBACK_DATA_6:0:15 */ 684 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(391, 15, 0) 685 }; 686 static uint32_t BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_READBACK_DATA7r_fields[] = 687 { 688 /* DAC_TEST_READBACK_DATA_7:0:15 */ 689 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(392, 15, 0) 690 }; 691 static uint32_t BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_READBACK_DATA8r_fields[] = 692 { 693 /* DAC_TEST_READBACK_DATA_8:0:11 */ 694 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(393, 11, 0) 695 }; 696 static uint32_t BCMI_BLACKHAWK_XGXS_DIG_COM_B_CTL_CLK4SYNC_DIV2_0r_fields[] = 697 { 698 /* CLK4SYNC_DIV2_EN:0:0 */ 699 PHYMOD_SYMBOL_FIELD_ENCODE(359, 0, 0), 700 /* CLK4SYNC_DIV2_VCO_SELECT:4:4 */ 701 PHYMOD_SYMBOL_FIELD_ENCODE(364, 4, 4), 702 /* CLK4SYNC_DIV2_LOC_MON_EN:5:5 */ 703 PHYMOD_SYMBOL_FIELD_ENCODE(361, 5, 5), 704 /* CLK4SYNC_DIV2_S_COMCLK_SEL:6:6 */ 705 PHYMOD_SYMBOL_FIELD_ENCODE(363, 6, 6), 706 /* CLK4SYNC_DIV2_S_COMCLK_FRC_ON:7:7 */ 707 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(362, 7, 7) 708 }; 709 static uint32_t BCMI_BLACKHAWK_XGXS_DIG_COM_B_CTL_UC_CLK0r_fields[] = 710 { 711 /* MICRO_CLK_VCO_DIV:0:2 */ 712 PHYMOD_SYMBOL_FIELD_ENCODE(633, 2, 0), 713 /* MICRO_CLK_VCO_SELECT:4:4 */ 714 PHYMOD_SYMBOL_FIELD_ENCODE(634, 4, 4), 715 /* MICRO_CLK_LOC_MON_EN:5:5 */ 716 PHYMOD_SYMBOL_FIELD_ENCODE(630, 5, 5), 717 /* MICRO_CLK_S_COMCLK_SEL:6:6 */ 718 PHYMOD_SYMBOL_FIELD_ENCODE(632, 6, 6), 719 /* MICRO_CLK_S_COMCLK_FRC_ON:7:7 */ 720 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(631, 7, 7) 721 }; 722 static uint32_t BCMI_BLACKHAWK_XGXS_DIG_COM_B_STS_CLK4SYNC_DIV2_0r_fields[] = 723 { 724 /* CLK4SYNC_DIV2_COMCLK_SEL:0:0 */ 725 PHYMOD_SYMBOL_FIELD_ENCODE(358, 0, 0), 726 /* CLK4SYNC_DIV2_LOC:1:1 */ 727 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(360, 1, 1) 728 }; 729 static uint32_t BCMI_BLACKHAWK_XGXS_DIG_COM_B_STS_UC_CLK0r_fields[] = 730 { 731 /* MICRO_CLK_COMCLK_SEL:0:0 */ 732 PHYMOD_SYMBOL_FIELD_ENCODE(628, 0, 0), 733 /* MICRO_CLK_LOC:1:1 */ 734 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(629, 1, 1) 735 }; 736 static uint32_t BCMI_BLACKHAWK_XGXS_DIG_CORE_DP_RST_ST_STSr_fields[] = 737 { 738 /* TX_LANE_RESET_RELEASED_INDEX:3:7 */ 739 PHYMOD_SYMBOL_FIELD_ENCODE(1404, 7, 3), 740 /* LANE_RESET_RELEASED_INDEX:8:12 */ 741 PHYMOD_SYMBOL_FIELD_ENCODE(484, 12, 8), 742 /* LANE_RESET_RELEASED:14:14 */ 743 PHYMOD_SYMBOL_FIELD_ENCODE(483, 14, 14), 744 /* TX_LANE_RESET_RELEASED:15:15 */ 745 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1403, 15, 15) 746 }; 747 static uint32_t BCMI_BLACKHAWK_XGXS_DIG_CORE_RST_OCC_CTLr_fields[] = 748 { 749 /* CORE_REG_RESET_OCCURRED:0:0 */ 750 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(379, 0, 0) 751 }; 752 static uint32_t BCMI_BLACKHAWK_XGXS_DIG_MASKDATAr_fields[] = 753 { 754 /* MASKDATA:0:15 */ 755 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(607, 15, 0) 756 }; 757 static uint32_t BCMI_BLACKHAWK_XGXS_DIG_REVID0r_fields[] = 758 { 759 /* REVID_MODEL:0:5 */ 760 PHYMOD_SYMBOL_FIELD_ENCODE(928, 5, 0), 761 /* REVID_PROCESS:6:8 */ 762 PHYMOD_SYMBOL_FIELD_ENCODE(931, 8, 6), 763 /* REVID_BONDING:9:10 */ 764 PHYMOD_SYMBOL_FIELD_ENCODE(922, 10, 9), 765 /* REVID_REV_NUMBER:11:13 */ 766 PHYMOD_SYMBOL_FIELD_ENCODE(933, 13, 11), 767 /* REVID_REV_LETTER:14:15 */ 768 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(932, 15, 14) 769 }; 770 static uint32_t BCMI_BLACKHAWK_XGXS_DIG_REVID1r_fields[] = 771 { 772 /* REVID_EEE:0:0 */ 773 PHYMOD_SYMBOL_FIELD_ENCODE(924, 0, 0), 774 /* REVID_LLP:1:1 */ 775 PHYMOD_SYMBOL_FIELD_ENCODE(925, 1, 1), 776 /* REVID_PIR:2:2 */ 777 PHYMOD_SYMBOL_FIELD_ENCODE(930, 2, 2), 778 /* REVID_CL72:3:3 */ 779 PHYMOD_SYMBOL_FIELD_ENCODE(923, 3, 3), 780 /* REVID_MICRO:4:4 */ 781 PHYMOD_SYMBOL_FIELD_ENCODE(927, 4, 4), 782 /* REVID_MDIO:5:5 */ 783 PHYMOD_SYMBOL_FIELD_ENCODE(926, 5, 5), 784 /* REVID_MULTIPLICITY:12:15 */ 785 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(929, 15, 12) 786 }; 787 static uint32_t BCMI_BLACKHAWK_XGXS_DIG_REVID2r_fields[] = 788 { 789 /* REVID2:0:3 */ 790 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(921, 3, 0) 791 }; 792 static uint32_t BCMI_BLACKHAWK_XGXS_DIG_RST_CTL_CORE_DPr_fields[] = 793 { 794 /* SUP_RST_SEQ_FRC_VAL:3:3 */ 795 PHYMOD_SYMBOL_FIELD_ENCODE(1252, 3, 3), 796 /* SUP_RST_SEQ_FRC:4:4 */ 797 PHYMOD_SYMBOL_FIELD_ENCODE(1251, 4, 4), 798 /* PMD_MDIO_TRANS_PKILL:5:5 */ 799 PHYMOD_SYMBOL_FIELD_ENCODE(847, 5, 5), 800 /* DISABLE_ACK_TIMEOUT:15:15 */ 801 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(426, 15, 15) 802 }; 803 static uint32_t BCMI_BLACKHAWK_XGXS_DIG_RST_CTL_PMDr_fields[] = 804 { 805 /* CORE_S_RSTB:0:0 */ 806 PHYMOD_SYMBOL_FIELD_ENCODE(380, 0, 0), 807 /* UC_ACTIVE:1:1 */ 808 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1479, 1, 1) 809 }; 810 static uint32_t BCMI_BLACKHAWK_XGXS_DIG_RST_SEQ_TMR_CTLr_fields[] = 811 { 812 /* RST_SEQ_TIMER:0:2 */ 813 PHYMOD_SYMBOL_FIELD_ENCODE(940, 2, 0), 814 /* PWRDN_SEQ_TIMER:8:10 */ 815 PHYMOD_SYMBOL_FIELD_ENCODE(906, 10, 8), 816 /* RST_SEQ_DIS_FLT_MODE:14:15 */ 817 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(939, 15, 14) 818 }; 819 static uint32_t BCMI_BLACKHAWK_XGXS_DIG_TOP_USER_CTL0r_fields[] = 820 { 821 /* HEARTBEAT_COUNT_1US:0:9 */ 822 PHYMOD_SYMBOL_FIELD_ENCODE(468, 9, 0), 823 /* MASKDATA_BUS_ASSIGN:10:10 */ 824 PHYMOD_SYMBOL_FIELD_ENCODE(608, 10, 10), 825 /* MDIO_FAST_MODE_FRC_VAL:11:11 */ 826 PHYMOD_SYMBOL_FIELD_ENCODE(620, 11, 11), 827 /* MDIO_FAST_MODE_FRC:12:12 */ 828 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(619, 12, 12) 829 }; 830 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_AUTO_DATA05_UPD_CTLr_fields[] = 831 { 832 /* RX_DATA05_NUMERATOR:0:5 */ 833 PHYMOD_SYMBOL_FIELD_ENCODE(1134, 5, 0), 834 /* RX_DATA05_THRESH_STEP_SIZE:6:10 */ 835 PHYMOD_SYMBOL_FIELD_ENCODE(1137, 10, 6), 836 /* RX_DATA05_INIT_PHASE:11:15 */ 837 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1132, 15, 11) 838 }; 839 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_AUTO_DATA14_UPD_CTLr_fields[] = 840 { 841 /* RX_DATA14_NUMERATOR:0:5 */ 842 PHYMOD_SYMBOL_FIELD_ENCODE(1140, 5, 0), 843 /* RX_DATA14_THRESH_STEP_SIZE:6:10 */ 844 PHYMOD_SYMBOL_FIELD_ENCODE(1143, 10, 6), 845 /* RX_DATA14_INIT_PHASE:11:15 */ 846 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1138, 15, 11) 847 }; 848 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_AUTO_DATA23_UPD_CTLr_fields[] = 849 { 850 /* RX_DATA23_NUMERATOR:0:5 */ 851 PHYMOD_SYMBOL_FIELD_ENCODE(1146, 5, 0), 852 /* RX_DATA23_THRESH_STEP_SIZE:6:10 */ 853 PHYMOD_SYMBOL_FIELD_ENCODE(1149, 10, 6), 854 /* RX_DATA23_INIT_PHASE:11:15 */ 855 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1144, 15, 11) 856 }; 857 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_AUTO_PHASE02_UPD_CTLr_fields[] = 858 { 859 /* RX_PHASE02_NUMERATOR:0:5 */ 860 PHYMOD_SYMBOL_FIELD_ENCODE(1186, 5, 0), 861 /* RX_PHASE02_THRESH_STEP_SIZE:6:10 */ 862 PHYMOD_SYMBOL_FIELD_ENCODE(1189, 10, 6), 863 /* RX_PHASE02_INIT_PHASE:11:15 */ 864 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1184, 15, 11) 865 }; 866 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_AUTO_PHASE1_UPD_CTLr_fields[] = 867 { 868 /* RX_PHASE1_NUMERATOR:0:5 */ 869 PHYMOD_SYMBOL_FIELD_ENCODE(1192, 5, 0), 870 /* RX_PHASE1_THRESH_STEP_SIZE:6:10 */ 871 PHYMOD_SYMBOL_FIELD_ENCODE(1195, 10, 6), 872 /* RX_PHASE1_INIT_PHASE:11:15 */ 873 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1190, 15, 11) 874 }; 875 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_AUTO_RXA_DFE_TAP2_UPD_CTLr_fields[] = 876 { 877 /* RXA_DFE_TAP2_NUMERATOR:0:5 */ 878 PHYMOD_SYMBOL_FIELD_ENCODE(953, 5, 0), 879 /* RXA_DFE_TAP2_THRESH_STEP_SIZE:6:10 */ 880 PHYMOD_SYMBOL_FIELD_ENCODE(956, 10, 6), 881 /* RXA_DFE_TAP2_INIT_PHASE:11:15 */ 882 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(951, 15, 11) 883 }; 884 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_AUTO_RXA_DFE_TAP3_UPD_CTLr_fields[] = 885 { 886 /* RXA_DFE_TAP3_NUMERATOR:0:5 */ 887 PHYMOD_SYMBOL_FIELD_ENCODE(961, 5, 0), 888 /* RXA_DFE_TAP3_THRESH_STEP_SIZE:6:10 */ 889 PHYMOD_SYMBOL_FIELD_ENCODE(964, 10, 6), 890 /* RXA_DFE_TAP3_INIT_PHASE:11:15 */ 891 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(959, 15, 11) 892 }; 893 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_AUTO_RXB_DFE_TAP2_UPD_CTLr_fields[] = 894 { 895 /* RXB_DFE_TAP2_NUMERATOR:0:5 */ 896 PHYMOD_SYMBOL_FIELD_ENCODE(1000, 5, 0), 897 /* RXB_DFE_TAP2_THRESH_STEP_SIZE:6:10 */ 898 PHYMOD_SYMBOL_FIELD_ENCODE(1003, 10, 6), 899 /* RXB_DFE_TAP2_INIT_PHASE:11:15 */ 900 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(998, 15, 11) 901 }; 902 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_AUTO_RXB_DFE_TAP3_UPD_CTLr_fields[] = 903 { 904 /* RXB_DFE_TAP3_NUMERATOR:0:5 */ 905 PHYMOD_SYMBOL_FIELD_ENCODE(1008, 5, 0), 906 /* RXB_DFE_TAP3_THRESH_STEP_SIZE:6:10 */ 907 PHYMOD_SYMBOL_FIELD_ENCODE(1011, 10, 6), 908 /* RXB_DFE_TAP3_INIT_PHASE:11:15 */ 909 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1006, 15, 11) 910 }; 911 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_AUTO_RXC_DFE_TAP2_UPD_CTLr_fields[] = 912 { 913 /* RXC_DFE_TAP2_NUMERATOR:0:5 */ 914 PHYMOD_SYMBOL_FIELD_ENCODE(1047, 5, 0), 915 /* RXC_DFE_TAP2_THRESH_STEP_SIZE:6:10 */ 916 PHYMOD_SYMBOL_FIELD_ENCODE(1050, 10, 6), 917 /* RXC_DFE_TAP2_INIT_PHASE:11:15 */ 918 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1045, 15, 11) 919 }; 920 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_AUTO_RXC_DFE_TAP3_UPD_CTLr_fields[] = 921 { 922 /* RXC_DFE_TAP3_NUMERATOR:0:5 */ 923 PHYMOD_SYMBOL_FIELD_ENCODE(1055, 5, 0), 924 /* RXC_DFE_TAP3_THRESH_STEP_SIZE:6:10 */ 925 PHYMOD_SYMBOL_FIELD_ENCODE(1058, 10, 6), 926 /* RXC_DFE_TAP3_INIT_PHASE:11:15 */ 927 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1053, 15, 11) 928 }; 929 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_AUTO_RXD_DFE_TAP2_UPD_CTLr_fields[] = 930 { 931 /* RXD_DFE_TAP2_NUMERATOR:0:5 */ 932 PHYMOD_SYMBOL_FIELD_ENCODE(1094, 5, 0), 933 /* RXD_DFE_TAP2_THRESH_STEP_SIZE:6:10 */ 934 PHYMOD_SYMBOL_FIELD_ENCODE(1097, 10, 6), 935 /* RXD_DFE_TAP2_INIT_PHASE:11:15 */ 936 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1092, 15, 11) 937 }; 938 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_AUTO_RXD_DFE_TAP3_UPD_CTLr_fields[] = 939 { 940 /* RXD_DFE_TAP3_NUMERATOR:0:5 */ 941 PHYMOD_SYMBOL_FIELD_ENCODE(1102, 5, 0), 942 /* RXD_DFE_TAP3_THRESH_STEP_SIZE:6:10 */ 943 PHYMOD_SYMBOL_FIELD_ENCODE(1105, 10, 6), 944 /* RXD_DFE_TAP3_INIT_PHASE:11:15 */ 945 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1100, 15, 11) 946 }; 947 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_BLW_CTL1r_fields[] = 948 { 949 /* BLW_LPF_COEF_MANT:0:5 */ 950 PHYMOD_SYMBOL_FIELD_ENCODE(300, 5, 0), 951 /* BLW_SPARE_CNTL_0:6:7 */ 952 PHYMOD_SYMBOL_FIELD_ENCODE(309, 7, 6), 953 /* BLW_LPF_COEF_EXP:8:9 */ 954 PHYMOD_SYMBOL_FIELD_ENCODE(299, 9, 8), 955 /* BLW_MAX_AMP_SEL:10:10 */ 956 PHYMOD_SYMBOL_FIELD_ENCODE(303, 10, 10), 957 /* BLW_RESET:11:11 */ 958 PHYMOD_SYMBOL_FIELD_ENCODE(308, 11, 11), 959 /* BLW_OUTPUT_INVERT:12:12 */ 960 PHYMOD_SYMBOL_FIELD_ENCODE(305, 12, 12), 961 /* BLW_PHASE_SLICER_INVERT:13:13 */ 962 PHYMOD_SYMBOL_FIELD_ENCODE(307, 13, 13), 963 /* BLW_GAIN_FRZ:14:14 */ 964 PHYMOD_SYMBOL_FIELD_ENCODE(294, 14, 14), 965 /* BLW_EN:15:15 */ 966 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(290, 15, 15) 967 }; 968 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_BLW_CTL2r_fields[] = 969 { 970 /* BLW_OUTPUT_SCALE:0:2 */ 971 PHYMOD_SYMBOL_FIELD_ENCODE(306, 2, 0), 972 /* DC_OFFS_INT_READ_EN:3:3 */ 973 PHYMOD_SYMBOL_FIELD_ENCODE(415, 3, 3), 974 /* BLW_TRNSUM_SEL:4:5 */ 975 PHYMOD_SYMBOL_FIELD_ENCODE(310, 5, 4), 976 /* BLW_MAX_AMP_CLR:6:6 */ 977 PHYMOD_SYMBOL_FIELD_ENCODE(302, 6, 6), 978 /* BLW_2X_MODE:7:7 */ 979 PHYMOD_SYMBOL_FIELD_ENCODE(289, 7, 7), 980 /* BLW_MU_DLY_MODE:8:9 */ 981 PHYMOD_SYMBOL_FIELD_ENCODE(304, 9, 8), 982 /* BLW_LMS_MU:10:11 */ 983 PHYMOD_SYMBOL_FIELD_ENCODE(298, 11, 10), 984 /* BLW_GAIN_SCALE:12:13 */ 985 PHYMOD_SYMBOL_FIELD_ENCODE(297, 13, 12), 986 /* DC_OFFS_DAC_INTEG_EN:14:14 */ 987 PHYMOD_SYMBOL_FIELD_ENCODE(409, 14, 14), 988 /* DC_OFFS_DAC_8B_EN:15:15 */ 989 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(408, 15, 15) 990 }; 991 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_BLW_CTL3r_fields[] = 992 { 993 /* BLW_GAIN_FRC_VAL:0:14 */ 994 PHYMOD_SYMBOL_FIELD_ENCODE(293, 14, 0), 995 /* BLW_GAIN_FRC:15:15 */ 996 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(292, 15, 15) 997 }; 998 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_BLW_CTL4r_fields[] = 999 { 1000 /* BLW_GAIN_SAT_HIGH:0:15 */ 1001 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(295, 15, 0) 1002 }; 1003 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_BLW_CTL5r_fields[] = 1004 { 1005 /* BLW_GAIN_SAT_LOW:0:15 */ 1006 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(296, 15, 0) 1007 }; 1008 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_BLW_STS_1_TYPEr_fields[] = 1009 { 1010 /* BLW_GAIN:0:14 */ 1011 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(291, 14, 0) 1012 }; 1013 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_BLW_STS_2_TYPEr_fields[] = 1014 { 1015 /* BLW_MAX_AMP:0:7 */ 1016 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(301, 7, 0) 1017 }; 1018 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_CDR_1G_STSr_fields[] = 1019 { 1020 /* CDR_1G_PHASE_POINTER:0:7 */ 1021 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(328, 7, 0) 1022 }; 1023 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_CDR_CTL0r_fields[] = 1024 { 1025 /* OS_ALL_EDGES:0:0 */ 1026 PHYMOD_SYMBOL_FIELD_ENCODE(779, 0, 0), 1027 /* OS_PATTERN_ENHANCED:1:1 */ 1028 PHYMOD_SYMBOL_FIELD_ENCODE(780, 1, 1), 1029 /* BR_PD_EN:2:2 */ 1030 PHYMOD_SYMBOL_FIELD_ENCODE(311, 2, 2), 1031 /* CDR_FREQ_EN:3:3 */ 1032 PHYMOD_SYMBOL_FIELD_ENCODE(336, 3, 3), 1033 /* CDR_HS_FREEZE:4:4 */ 1034 PHYMOD_SYMBOL_FIELD_ENCODE(341, 4, 4), 1035 /* CDR_INTEG_REG_CLR:5:5 */ 1036 PHYMOD_SYMBOL_FIELD_ENCODE(343, 5, 5), 1037 /* CDR_PHASE_ERR_FRZ:6:6 */ 1038 PHYMOD_SYMBOL_FIELD_ENCODE(348, 6, 6), 1039 /* CDR_INTEG_SAT_SEL:7:7 */ 1040 PHYMOD_SYMBOL_FIELD_ENCODE(344, 7, 7), 1041 /* CDR_FREQ_OVERRIDE_EN:8:8 */ 1042 PHYMOD_SYMBOL_FIELD_ENCODE(337, 8, 8), 1043 /* CDR_ZERO_POLARITY:9:9 */ 1044 PHYMOD_SYMBOL_FIELD_ENCODE(356, 9, 9), 1045 /* PAM4_CDR_PROP_BW_EXT:10:10 */ 1046 PHYMOD_SYMBOL_FIELD_ENCODE(781, 10, 10), 1047 /* PHASE_ERR_OFFSET_MULT2:11:11 */ 1048 PHYMOD_SYMBOL_FIELD_ENCODE(814, 11, 11), 1049 /* RX_PAM4ES_PREC_DISABLED:12:12 */ 1050 PHYMOD_SYMBOL_FIELD_ENCODE(1176, 12, 12), 1051 /* RX_NRZ_VSR_MODE:14:14 */ 1052 PHYMOD_SYMBOL_FIELD_ENCODE(1171, 14, 14), 1053 /* RX_PAM4_ES_MODE:15:15 */ 1054 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1177, 15, 15) 1055 }; 1056 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_CDR_CTL1r_fields[] = 1057 { 1058 /* CDR_PHASE_SEL:0:2 */ 1059 PHYMOD_SYMBOL_FIELD_ENCODE(351, 2, 0), 1060 /* CDR_POWER_OPT_CLOCK_GATE_EN:4:4 */ 1061 PHYMOD_SYMBOL_FIELD_ENCODE(352, 4, 4), 1062 /* CDR_FREQ_OVERRIDE_VAL:5:15 */ 1063 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(338, 15, 5) 1064 }; 1065 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_CDR_CTL2r_fields[] = 1066 { 1067 /* CDR_LM_THR_SEL:0:2 */ 1068 PHYMOD_SYMBOL_FIELD_ENCODE(346, 2, 0), 1069 /* CDR_1G_SWAP_PZ:4:4 */ 1070 PHYMOD_SYMBOL_FIELD_ENCODE(329, 4, 4), 1071 /* CDR_1G_FORCE_EN:5:5 */ 1072 PHYMOD_SYMBOL_FIELD_ENCODE(325, 5, 5), 1073 /* TX_PI_LOOP_TIMING_SRC_SEL:6:6 */ 1074 PHYMOD_SYMBOL_FIELD_ENCODE(1447, 6, 6), 1075 /* PHS_SUM_IGNORE_DSC_LOCK:7:7 */ 1076 PHYMOD_SYMBOL_FIELD_ENCODE(815, 7, 7), 1077 /* CDR_1G_MANUAL_MODE:8:8 */ 1078 PHYMOD_SYMBOL_FIELD_ENCODE(326, 8, 8), 1079 /* CDR_1G_MANUAL_STROBE:9:9 */ 1080 PHYMOD_SYMBOL_FIELD_ENCODE(327, 9, 9), 1081 /* CDR_PROP_BW_EXTEND:10:10 */ 1082 PHYMOD_SYMBOL_FIELD_ENCODE(353, 10, 10), 1083 /* RX_PHASE_SUM_ACC_MODE:11:13 */ 1084 PHYMOD_SYMBOL_FIELD_ENCODE(1196, 13, 11), 1085 /* CDR_PHASE_SAT_CTRL:14:14 */ 1086 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(350, 14, 14) 1087 }; 1088 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_CDR_STS_INTEGr_fields[] = 1089 { 1090 /* CDR_INTEG_REG:0:15 */ 1091 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(342, 15, 0) 1092 }; 1093 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_CDR_STS_PHASE_ERRr_fields[] = 1094 { 1095 /* CDR_PHASE_ERROR:0:5 */ 1096 PHYMOD_SYMBOL_FIELD_ENCODE(347, 5, 0), 1097 /* CDR_LM_OUTOFLOCK:8:8 */ 1098 PHYMOD_SYMBOL_FIELD_ENCODE(345, 8, 8), 1099 /* CDR_VCO_REG:12:15 */ 1100 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(355, 15, 12) 1101 }; 1102 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_DC_OFFS_CTLr_fields[] = 1103 { 1104 /* DC_OFFS_EN:0:0 */ 1105 PHYMOD_SYMBOL_FIELD_ENCODE(410, 0, 0), 1106 /* DC_OFFS_WRITE_FRC_EN:1:1 */ 1107 PHYMOD_SYMBOL_FIELD_ENCODE(417, 1, 1), 1108 /* DC_OFFS_HYS_EN:2:2 */ 1109 PHYMOD_SYMBOL_FIELD_ENCODE(413, 2, 2), 1110 /* DC_OFFS_HYS_MAG:3:3 */ 1111 PHYMOD_SYMBOL_FIELD_ENCODE(414, 3, 3), 1112 /* DC_OFFS_GRADIENT_INVERT:4:4 */ 1113 PHYMOD_SYMBOL_FIELD_ENCODE(412, 4, 4), 1114 /* DC_OFFS_GAIN:5:6 */ 1115 PHYMOD_SYMBOL_FIELD_ENCODE(411, 6, 5), 1116 /* DC_OFFS_ACC_CLR:7:7 */ 1117 PHYMOD_SYMBOL_FIELD_ENCODE(406, 7, 7), 1118 /* DC_OFFS_WRITE_VAL:8:15 */ 1119 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(418, 15, 8) 1120 }; 1121 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_DC_OFFS_STSr_fields[] = 1122 { 1123 /* DC_OFFSET_BIN:0:7 */ 1124 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(405, 7, 0) 1125 }; 1126 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_LMS_THR_CTLr_fields[] = 1127 { 1128 /* LMS_THRESH_EN:0:0 */ 1129 PHYMOD_SYMBOL_FIELD_ENCODE(584, 0, 0), 1130 /* LMS_THRESH_HYS_EN:2:2 */ 1131 PHYMOD_SYMBOL_FIELD_ENCODE(587, 2, 2), 1132 /* LMS_THRESH_HYS_MAG:3:3 */ 1133 PHYMOD_SYMBOL_FIELD_ENCODE(588, 3, 3), 1134 /* LMS_THRESH_GRADIENT_INVERT:4:4 */ 1135 PHYMOD_SYMBOL_FIELD_ENCODE(586, 4, 4), 1136 /* LMS_THRESH_GAIN:5:6 */ 1137 PHYMOD_SYMBOL_FIELD_ENCODE(585, 6, 5), 1138 /* LMS_THRESH_ACC_CLR:7:7 */ 1139 PHYMOD_SYMBOL_FIELD_ENCODE(582, 7, 7), 1140 /* DC_OFFS_BLW_PHASE_SEL:15:15 */ 1141 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(407, 15, 15) 1142 }; 1143 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_LMS_THR_OFFSr_fields[] = 1144 { 1145 /* LMS_THRESH_OFFS:0:13 */ 1146 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(589, 13, 0) 1147 }; 1148 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_LMS_THR_RANDOM1r_fields[] = 1149 { 1150 /* LMS_RND_THRESH1:0:7 */ 1151 PHYMOD_SYMBOL_FIELD_ENCODE(570, 7, 0), 1152 /* LMS_RND_THRESH2:8:15 */ 1153 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(574, 15, 8) 1154 }; 1155 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_LMS_THR_RANDOM2r_fields[] = 1156 { 1157 /* LMS_RND_THRESH3:0:7 */ 1158 PHYMOD_SYMBOL_FIELD_ENCODE(575, 7, 0), 1159 /* LMS_RND_THRESH4:8:15 */ 1160 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(576, 15, 8) 1161 }; 1162 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_LMS_THR_RANDOM3r_fields[] = 1163 { 1164 /* LMS_RND_THRESH5:0:7 */ 1165 PHYMOD_SYMBOL_FIELD_ENCODE(577, 7, 0), 1166 /* LMS_RND_THRESH6:8:15 */ 1167 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(578, 15, 8) 1168 }; 1169 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_LMS_THR_RANDOM4r_fields[] = 1170 { 1171 /* LMS_RND_THRESH7:0:7 */ 1172 PHYMOD_SYMBOL_FIELD_ENCODE(579, 7, 0), 1173 /* LMS_RND_THRESH8:8:15 */ 1174 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(580, 15, 8) 1175 }; 1176 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_LMS_THR_RANDOM5r_fields[] = 1177 { 1178 /* LMS_RND_THRESH9:0:7 */ 1179 PHYMOD_SYMBOL_FIELD_ENCODE(581, 7, 0), 1180 /* LMS_RND_THRESH10:8:15 */ 1181 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(571, 15, 8) 1182 }; 1183 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_LMS_THR_RANDOM6r_fields[] = 1184 { 1185 /* LMS_RND_THRESH11:0:7 */ 1186 PHYMOD_SYMBOL_FIELD_ENCODE(572, 7, 0), 1187 /* LMS_RND_THRESH12:8:15 */ 1188 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(573, 15, 8) 1189 }; 1190 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_LMS_THR_STSr_fields[] = 1191 { 1192 /* LMS_THRESH_BIN:0:9 */ 1193 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(583, 9, 0) 1194 }; 1195 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_LMS_THR_STS2r_fields[] = 1196 { 1197 /* AFE_LMS_THRESH_BIN:0:7 */ 1198 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1, 7, 0) 1199 }; 1200 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_LOAD_PRESETSr_fields[] = 1201 { 1202 /* PRESET_AFE:0:0 */ 1203 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(896, 0, 0) 1204 }; 1205 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_PRESETr_fields[] = 1206 { 1207 /* PRESET_C:0:0 */ 1208 PHYMOD_SYMBOL_FIELD_ENCODE(897, 0, 0), 1209 /* PRESET_D:1:1 */ 1210 PHYMOD_SYMBOL_FIELD_ENCODE(898, 1, 1), 1211 /* PRESET_A:2:2 */ 1212 PHYMOD_SYMBOL_FIELD_ENCODE(895, 2, 2), 1213 /* PRESET_F:3:3 */ 1214 PHYMOD_SYMBOL_FIELD_ENCODE(900, 3, 3), 1215 /* PRESET_G:4:4 */ 1216 PHYMOD_SYMBOL_FIELD_ENCODE(901, 4, 4), 1217 /* PRESET_H:5:5 */ 1218 PHYMOD_SYMBOL_FIELD_ENCODE(902, 5, 5), 1219 /* PRESET_I:6:6 */ 1220 PHYMOD_SYMBOL_FIELD_ENCODE(903, 6, 6), 1221 /* PRESET_SLICERS:7:7 */ 1222 PHYMOD_SYMBOL_FIELD_ENCODE(904, 7, 7), 1223 /* PRESET_DFE_TAPS_2_3:8:8 */ 1224 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(899, 8, 8) 1225 }; 1226 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RXA_FFE_TAPr_fields[] = 1227 { 1228 /* RXA_FFE_TAP2_VAL:0:6 */ 1229 PHYMOD_SYMBOL_FIELD_ENCODE(977, 6, 0), 1230 /* RXA_FFE_TAP1_VAL:7:13 */ 1231 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(976, 13, 7) 1232 }; 1233 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RXA_SLCR_OFFS_ADJ1r_fields[] = 1234 { 1235 /* RXA_SLICER_OFFSET_ADJ_CAL_D4:0:5 */ 1236 PHYMOD_SYMBOL_FIELD_ENCODE(982, 5, 0), 1237 /* RXA_SLICER_OFFSET_ADJ_CAL_D5:8:13 */ 1238 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(983, 13, 8) 1239 }; 1240 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RXA_SLCR_OFFS_ADJ2r_fields[] = 1241 { 1242 /* RXA_SLICER_OFFSET_ADJ_CAL_D2:0:5 */ 1243 PHYMOD_SYMBOL_FIELD_ENCODE(980, 5, 0), 1244 /* RXA_SLICER_OFFSET_ADJ_CAL_D3:8:13 */ 1245 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(981, 13, 8) 1246 }; 1247 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RXA_SLCR_OFFS_ADJ3r_fields[] = 1248 { 1249 /* RXA_SLICER_OFFSET_ADJ_CAL_D0:0:5 */ 1250 PHYMOD_SYMBOL_FIELD_ENCODE(978, 5, 0), 1251 /* RXA_SLICER_OFFSET_ADJ_CAL_D1:8:13 */ 1252 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(979, 13, 8) 1253 }; 1254 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RXA_SLCR_OFFS_ADJ4r_fields[] = 1255 { 1256 /* RXA_SLICER_OFFSET_ADJ_CAL_P1:0:5 */ 1257 PHYMOD_SYMBOL_FIELD_ENCODE(986, 5, 0), 1258 /* RXA_SLICER_OFFSET_ADJ_CAL_P2:8:13 */ 1259 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(987, 13, 8) 1260 }; 1261 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RXA_SLCR_OFFS_ADJ5r_fields[] = 1262 { 1263 /* RXA_SLICER_OFFSET_ADJ_CAL_LMS:0:5 */ 1264 PHYMOD_SYMBOL_FIELD_ENCODE(984, 5, 0), 1265 /* RXA_SLICER_OFFSET_ADJ_CAL_P0:8:13 */ 1266 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(985, 13, 8) 1267 }; 1268 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RXB_FFE_TAPr_fields[] = 1269 { 1270 /* RXB_FFE_TAP2_VAL:0:6 */ 1271 PHYMOD_SYMBOL_FIELD_ENCODE(1024, 6, 0), 1272 /* RXB_FFE_TAP1_VAL:7:13 */ 1273 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1023, 13, 7) 1274 }; 1275 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RXB_SLCR_OFFS_ADJ1r_fields[] = 1276 { 1277 /* RXB_SLICER_OFFSET_ADJ_CAL_D4:0:5 */ 1278 PHYMOD_SYMBOL_FIELD_ENCODE(1029, 5, 0), 1279 /* RXB_SLICER_OFFSET_ADJ_CAL_D5:8:13 */ 1280 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1030, 13, 8) 1281 }; 1282 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RXB_SLCR_OFFS_ADJ2r_fields[] = 1283 { 1284 /* RXB_SLICER_OFFSET_ADJ_CAL_D2:0:5 */ 1285 PHYMOD_SYMBOL_FIELD_ENCODE(1027, 5, 0), 1286 /* RXB_SLICER_OFFSET_ADJ_CAL_D3:8:13 */ 1287 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1028, 13, 8) 1288 }; 1289 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RXB_SLCR_OFFS_ADJ3r_fields[] = 1290 { 1291 /* RXB_SLICER_OFFSET_ADJ_CAL_D0:0:5 */ 1292 PHYMOD_SYMBOL_FIELD_ENCODE(1025, 5, 0), 1293 /* RXB_SLICER_OFFSET_ADJ_CAL_D1:8:13 */ 1294 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1026, 13, 8) 1295 }; 1296 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RXB_SLCR_OFFS_ADJ4r_fields[] = 1297 { 1298 /* RXB_SLICER_OFFSET_ADJ_CAL_P1:0:5 */ 1299 PHYMOD_SYMBOL_FIELD_ENCODE(1033, 5, 0), 1300 /* RXB_SLICER_OFFSET_ADJ_CAL_P2:8:13 */ 1301 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1034, 13, 8) 1302 }; 1303 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RXB_SLCR_OFFS_ADJ5r_fields[] = 1304 { 1305 /* RXB_SLICER_OFFSET_ADJ_CAL_LMS:0:5 */ 1306 PHYMOD_SYMBOL_FIELD_ENCODE(1031, 5, 0), 1307 /* RXB_SLICER_OFFSET_ADJ_CAL_P0:8:13 */ 1308 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1032, 13, 8) 1309 }; 1310 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RXC_FFE_TAPr_fields[] = 1311 { 1312 /* RXC_FFE_TAP2_VAL:0:6 */ 1313 PHYMOD_SYMBOL_FIELD_ENCODE(1071, 6, 0), 1314 /* RXC_FFE_TAP1_VAL:7:13 */ 1315 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1070, 13, 7) 1316 }; 1317 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RXC_SLCR_OFFS_ADJ1r_fields[] = 1318 { 1319 /* RXC_SLICER_OFFSET_ADJ_CAL_D4:0:5 */ 1320 PHYMOD_SYMBOL_FIELD_ENCODE(1076, 5, 0), 1321 /* RXC_SLICER_OFFSET_ADJ_CAL_D5:8:13 */ 1322 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1077, 13, 8) 1323 }; 1324 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RXC_SLCR_OFFS_ADJ2r_fields[] = 1325 { 1326 /* RXC_SLICER_OFFSET_ADJ_CAL_D2:0:5 */ 1327 PHYMOD_SYMBOL_FIELD_ENCODE(1074, 5, 0), 1328 /* RXC_SLICER_OFFSET_ADJ_CAL_D3:8:13 */ 1329 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1075, 13, 8) 1330 }; 1331 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RXC_SLCR_OFFS_ADJ3r_fields[] = 1332 { 1333 /* RXC_SLICER_OFFSET_ADJ_CAL_D0:0:5 */ 1334 PHYMOD_SYMBOL_FIELD_ENCODE(1072, 5, 0), 1335 /* RXC_SLICER_OFFSET_ADJ_CAL_D1:8:13 */ 1336 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1073, 13, 8) 1337 }; 1338 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RXC_SLCR_OFFS_ADJ4r_fields[] = 1339 { 1340 /* RXC_SLICER_OFFSET_ADJ_CAL_P1:0:5 */ 1341 PHYMOD_SYMBOL_FIELD_ENCODE(1080, 5, 0), 1342 /* RXC_SLICER_OFFSET_ADJ_CAL_P2:8:13 */ 1343 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1081, 13, 8) 1344 }; 1345 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RXC_SLCR_OFFS_ADJ5r_fields[] = 1346 { 1347 /* RXC_SLICER_OFFSET_ADJ_CAL_LMS:0:5 */ 1348 PHYMOD_SYMBOL_FIELD_ENCODE(1078, 5, 0), 1349 /* RXC_SLICER_OFFSET_ADJ_CAL_P0:8:13 */ 1350 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1079, 13, 8) 1351 }; 1352 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RXD_FFE_TAPr_fields[] = 1353 { 1354 /* RXD_FFE_TAP2_VAL:0:6 */ 1355 PHYMOD_SYMBOL_FIELD_ENCODE(1118, 6, 0), 1356 /* RXD_FFE_TAP1_VAL:7:13 */ 1357 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1117, 13, 7) 1358 }; 1359 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RXD_SLCR_OFFS_ADJ1r_fields[] = 1360 { 1361 /* RXD_SLICER_OFFSET_ADJ_CAL_D4:0:5 */ 1362 PHYMOD_SYMBOL_FIELD_ENCODE(1123, 5, 0), 1363 /* RXD_SLICER_OFFSET_ADJ_CAL_D5:8:13 */ 1364 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1124, 13, 8) 1365 }; 1366 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RXD_SLCR_OFFS_ADJ2r_fields[] = 1367 { 1368 /* RXD_SLICER_OFFSET_ADJ_CAL_D2:0:5 */ 1369 PHYMOD_SYMBOL_FIELD_ENCODE(1121, 5, 0), 1370 /* RXD_SLICER_OFFSET_ADJ_CAL_D3:8:13 */ 1371 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1122, 13, 8) 1372 }; 1373 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RXD_SLCR_OFFS_ADJ3r_fields[] = 1374 { 1375 /* RXD_SLICER_OFFSET_ADJ_CAL_D0:0:5 */ 1376 PHYMOD_SYMBOL_FIELD_ENCODE(1119, 5, 0), 1377 /* RXD_SLICER_OFFSET_ADJ_CAL_D1:8:13 */ 1378 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1120, 13, 8) 1379 }; 1380 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RXD_SLCR_OFFS_ADJ4r_fields[] = 1381 { 1382 /* RXD_SLICER_OFFSET_ADJ_CAL_P1:0:5 */ 1383 PHYMOD_SYMBOL_FIELD_ENCODE(1127, 5, 0), 1384 /* RXD_SLICER_OFFSET_ADJ_CAL_P2:8:13 */ 1385 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1128, 13, 8) 1386 }; 1387 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RXD_SLCR_OFFS_ADJ5r_fields[] = 1388 { 1389 /* RXD_SLICER_OFFSET_ADJ_CAL_LMS:0:5 */ 1390 PHYMOD_SYMBOL_FIELD_ENCODE(1125, 5, 0), 1391 /* RXD_SLICER_OFFSET_ADJ_CAL_P0:8:13 */ 1392 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1126, 13, 8) 1393 }; 1394 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_AUTO_RATE_MOD_DATA05r_fields[] = 1395 { 1396 /* RX_DATA05_NUMERATOR2:0:5 */ 1397 PHYMOD_SYMBOL_FIELD_ENCODE(1135, 5, 0), 1398 /* RX_DATA05_LEFT_NUM_CHANGE:6:6 */ 1399 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1133, 6, 6) 1400 }; 1401 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_AUTO_RATE_MOD_DATA23_14r_fields[] = 1402 { 1403 /* RX_DATA14_NUMERATOR2:0:5 */ 1404 PHYMOD_SYMBOL_FIELD_ENCODE(1141, 5, 0), 1405 /* RX_DATA14_LEFT_NUM_CHANGE:6:6 */ 1406 PHYMOD_SYMBOL_FIELD_ENCODE(1139, 6, 6), 1407 /* RX_DATA23_NUMERATOR2:7:12 */ 1408 PHYMOD_SYMBOL_FIELD_ENCODE(1147, 12, 7), 1409 /* RX_DATA23_LEFT_NUM_CHANGE:13:13 */ 1410 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1145, 13, 13) 1411 }; 1412 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_AUTO_RATE_MOD_DFE_TAP2_ABr_fields[] = 1413 { 1414 /* RXB_DFE_TAP2_NUMERATOR2:0:5 */ 1415 PHYMOD_SYMBOL_FIELD_ENCODE(1001, 5, 0), 1416 /* RXB_DFE_TAP2_LEFT_NUM_CHANGE:6:6 */ 1417 PHYMOD_SYMBOL_FIELD_ENCODE(999, 6, 6), 1418 /* RXA_DFE_TAP2_NUMERATOR2:7:12 */ 1419 PHYMOD_SYMBOL_FIELD_ENCODE(954, 12, 7), 1420 /* RXA_DFE_TAP2_LEFT_NUM_CHANGE:13:13 */ 1421 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(952, 13, 13) 1422 }; 1423 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_AUTO_RATE_MOD_DFE_TAP2_CDr_fields[] = 1424 { 1425 /* RXD_DFE_TAP2_NUMERATOR2:0:5 */ 1426 PHYMOD_SYMBOL_FIELD_ENCODE(1095, 5, 0), 1427 /* RXD_DFE_TAP2_LEFT_NUM_CHANGE:6:6 */ 1428 PHYMOD_SYMBOL_FIELD_ENCODE(1093, 6, 6), 1429 /* RXC_DFE_TAP2_NUMERATOR2:7:12 */ 1430 PHYMOD_SYMBOL_FIELD_ENCODE(1048, 12, 7), 1431 /* RXC_DFE_TAP2_LEFT_NUM_CHANGE:13:13 */ 1432 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1046, 13, 13) 1433 }; 1434 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_AUTO_RATE_MOD_DFE_TAP3_ABr_fields[] = 1435 { 1436 /* RXB_DFE_TAP3_NUMERATOR2:0:5 */ 1437 PHYMOD_SYMBOL_FIELD_ENCODE(1009, 5, 0), 1438 /* RXB_DFE_TAP3_LEFT_NUM_CHANGE:6:6 */ 1439 PHYMOD_SYMBOL_FIELD_ENCODE(1007, 6, 6), 1440 /* RXA_DFE_TAP3_NUMERATOR2:7:12 */ 1441 PHYMOD_SYMBOL_FIELD_ENCODE(962, 12, 7), 1442 /* RXA_DFE_TAP3_LEFT_NUM_CHANGE:13:13 */ 1443 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(960, 13, 13) 1444 }; 1445 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_AUTO_RATE_MOD_DFE_TAP3_CDr_fields[] = 1446 { 1447 /* RXD_DFE_TAP3_NUMERATOR2:0:5 */ 1448 PHYMOD_SYMBOL_FIELD_ENCODE(1103, 5, 0), 1449 /* RXD_DFE_TAP3_LEFT_NUM_CHANGE:6:6 */ 1450 PHYMOD_SYMBOL_FIELD_ENCODE(1101, 6, 6), 1451 /* RXC_DFE_TAP3_NUMERATOR2:7:12 */ 1452 PHYMOD_SYMBOL_FIELD_ENCODE(1056, 12, 7), 1453 /* RXC_DFE_TAP3_LEFT_NUM_CHANGE:13:13 */ 1454 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1054, 13, 13) 1455 }; 1456 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_AUTO_RATE_MOD_PHASE02_1r_fields[] = 1457 { 1458 /* RX_PHASE02_NUMERATOR2:0:5 */ 1459 PHYMOD_SYMBOL_FIELD_ENCODE(1187, 5, 0), 1460 /* RX_PHASE02_LEFT_NUM_CHANGE:6:6 */ 1461 PHYMOD_SYMBOL_FIELD_ENCODE(1185, 6, 6), 1462 /* RX_PHASE1_NUMERATOR2:7:12 */ 1463 PHYMOD_SYMBOL_FIELD_ENCODE(1193, 12, 7), 1464 /* RX_PHASE1_LEFT_NUM_CHANGE:13:13 */ 1465 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1191, 13, 13) 1466 }; 1467 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_DATA_15_TO0r_fields[] = 1468 { 1469 /* RX_DATA_15_TO_0:0:15 */ 1470 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1150, 15, 0) 1471 }; 1472 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_DATA_35_TO_20r_fields[] = 1473 { 1474 /* RX_DATA_35_TO_20:0:15 */ 1475 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1151, 15, 0) 1476 }; 1477 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP10_ABCDr_fields[] = 1478 { 1479 /* RXD_DFE_TAP10:0:3 */ 1480 PHYMOD_SYMBOL_FIELD_ENCODE(1082, 3, 0), 1481 /* RXC_DFE_TAP10:4:7 */ 1482 PHYMOD_SYMBOL_FIELD_ENCODE(1035, 7, 4), 1483 /* RXB_DFE_TAP10:8:11 */ 1484 PHYMOD_SYMBOL_FIELD_ENCODE(988, 11, 8), 1485 /* RXA_DFE_TAP10:12:15 */ 1486 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(941, 15, 12) 1487 }; 1488 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP11_12_MUX_ABCDr_fields[] = 1489 { 1490 /* RXD_DFE_TAP12_MUX:0:1 */ 1491 PHYMOD_SYMBOL_FIELD_ENCODE(1087, 1, 0), 1492 /* RXD_DFE_TAP11_MUX:2:3 */ 1493 PHYMOD_SYMBOL_FIELD_ENCODE(1085, 3, 2), 1494 /* RXC_DFE_TAP12_MUX:4:5 */ 1495 PHYMOD_SYMBOL_FIELD_ENCODE(1040, 5, 4), 1496 /* RXC_DFE_TAP11_MUX:6:7 */ 1497 PHYMOD_SYMBOL_FIELD_ENCODE(1038, 7, 6), 1498 /* RXB_DFE_TAP12_MUX:8:9 */ 1499 PHYMOD_SYMBOL_FIELD_ENCODE(993, 9, 8), 1500 /* RXB_DFE_TAP11_MUX:10:11 */ 1501 PHYMOD_SYMBOL_FIELD_ENCODE(991, 11, 10), 1502 /* RXA_DFE_TAP12_MUX:12:13 */ 1503 PHYMOD_SYMBOL_FIELD_ENCODE(946, 13, 12), 1504 /* RXA_DFE_TAP11_MUX:14:15 */ 1505 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(944, 15, 14) 1506 }; 1507 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP11_ABCDr_fields[] = 1508 { 1509 /* RXD_DFE_TAP11:0:3 */ 1510 PHYMOD_SYMBOL_FIELD_ENCODE(1084, 3, 0), 1511 /* RXC_DFE_TAP11:4:7 */ 1512 PHYMOD_SYMBOL_FIELD_ENCODE(1037, 7, 4), 1513 /* RXB_DFE_TAP11:8:11 */ 1514 PHYMOD_SYMBOL_FIELD_ENCODE(990, 11, 8), 1515 /* RXA_DFE_TAP11:12:15 */ 1516 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(943, 15, 12) 1517 }; 1518 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP12_ABCDr_fields[] = 1519 { 1520 /* RXD_DFE_TAP12:0:3 */ 1521 PHYMOD_SYMBOL_FIELD_ENCODE(1086, 3, 0), 1522 /* RXC_DFE_TAP12:4:7 */ 1523 PHYMOD_SYMBOL_FIELD_ENCODE(1039, 7, 4), 1524 /* RXB_DFE_TAP12:8:11 */ 1525 PHYMOD_SYMBOL_FIELD_ENCODE(992, 11, 8), 1526 /* RXA_DFE_TAP12:12:15 */ 1527 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(945, 15, 12) 1528 }; 1529 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP13_14_MUX_ABCDr_fields[] = 1530 { 1531 /* RXD_DFE_TAP14_MUX:0:1 */ 1532 PHYMOD_SYMBOL_FIELD_ENCODE(1091, 1, 0), 1533 /* RXD_DFE_TAP13_MUX:2:3 */ 1534 PHYMOD_SYMBOL_FIELD_ENCODE(1089, 3, 2), 1535 /* RXC_DFE_TAP14_MUX:4:5 */ 1536 PHYMOD_SYMBOL_FIELD_ENCODE(1044, 5, 4), 1537 /* RXC_DFE_TAP13_MUX:6:7 */ 1538 PHYMOD_SYMBOL_FIELD_ENCODE(1042, 7, 6), 1539 /* RXB_DFE_TAP14_MUX:8:9 */ 1540 PHYMOD_SYMBOL_FIELD_ENCODE(997, 9, 8), 1541 /* RXB_DFE_TAP13_MUX:10:11 */ 1542 PHYMOD_SYMBOL_FIELD_ENCODE(995, 11, 10), 1543 /* RXA_DFE_TAP14_MUX:12:13 */ 1544 PHYMOD_SYMBOL_FIELD_ENCODE(950, 13, 12), 1545 /* RXA_DFE_TAP13_MUX:14:15 */ 1546 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(948, 15, 14) 1547 }; 1548 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP13_ABCDr_fields[] = 1549 { 1550 /* RXD_DFE_TAP13:0:3 */ 1551 PHYMOD_SYMBOL_FIELD_ENCODE(1088, 3, 0), 1552 /* RXC_DFE_TAP13:4:7 */ 1553 PHYMOD_SYMBOL_FIELD_ENCODE(1041, 7, 4), 1554 /* RXB_DFE_TAP13:8:11 */ 1555 PHYMOD_SYMBOL_FIELD_ENCODE(994, 11, 8), 1556 /* RXA_DFE_TAP13:12:15 */ 1557 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(947, 15, 12) 1558 }; 1559 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP14_ABCDr_fields[] = 1560 { 1561 /* RXD_DFE_TAP14:0:3 */ 1562 PHYMOD_SYMBOL_FIELD_ENCODE(1090, 3, 0), 1563 /* RXC_DFE_TAP14:4:7 */ 1564 PHYMOD_SYMBOL_FIELD_ENCODE(1043, 7, 4), 1565 /* RXB_DFE_TAP14:8:11 */ 1566 PHYMOD_SYMBOL_FIELD_ENCODE(996, 11, 8), 1567 /* RXA_DFE_TAP14:12:15 */ 1568 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(949, 15, 12) 1569 }; 1570 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP2_3_CTLr_fields[] = 1571 { 1572 /* RXB_DFE_TAP3_VAL:0:4 */ 1573 PHYMOD_SYMBOL_FIELD_ENCODE(1012, 4, 0), 1574 /* RXA_DFE_TAP3_VAL:5:9 */ 1575 PHYMOD_SYMBOL_FIELD_ENCODE(965, 9, 5), 1576 /* RXD_DFE_TAP2_VAL:10:14 */ 1577 PHYMOD_SYMBOL_FIELD_ENCODE(1098, 14, 10), 1578 /* RXD_DFE_TAP2_WRITE:15:15 */ 1579 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1099, 15, 15) 1580 }; 1581 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP2_3_STSr_fields[] = 1582 { 1583 /* RXB_DFE_TAP3_STATUS:0:4 */ 1584 PHYMOD_SYMBOL_FIELD_ENCODE(1010, 4, 0), 1585 /* RXA_DFE_TAP3_STATUS:5:9 */ 1586 PHYMOD_SYMBOL_FIELD_ENCODE(963, 9, 5), 1587 /* RXD_DFE_TAP2_STATUS:10:14 */ 1588 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1096, 14, 10) 1589 }; 1590 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP2_CTLr_fields[] = 1591 { 1592 /* RXC_DFE_TAP2_VAL:0:4 */ 1593 PHYMOD_SYMBOL_FIELD_ENCODE(1051, 4, 0), 1594 /* RXB_DFE_TAP2_VAL:5:9 */ 1595 PHYMOD_SYMBOL_FIELD_ENCODE(1004, 9, 5), 1596 /* RXA_DFE_TAP2_VAL:10:14 */ 1597 PHYMOD_SYMBOL_FIELD_ENCODE(957, 14, 10), 1598 /* RXA_DFE_TAP2_WRITE:15:15 */ 1599 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(958, 15, 15) 1600 }; 1601 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP2_STSr_fields[] = 1602 { 1603 /* RXC_DFE_TAP2_STATUS:0:4 */ 1604 PHYMOD_SYMBOL_FIELD_ENCODE(1049, 4, 0), 1605 /* RXB_DFE_TAP2_STATUS:5:9 */ 1606 PHYMOD_SYMBOL_FIELD_ENCODE(1002, 9, 5), 1607 /* RXA_DFE_TAP2_STATUS:10:14 */ 1608 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(955, 14, 10) 1609 }; 1610 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP3_CTLr_fields[] = 1611 { 1612 /* RXD_DFE_TAP3_VAL:0:4 */ 1613 PHYMOD_SYMBOL_FIELD_ENCODE(1106, 4, 0), 1614 /* RXC_DFE_TAP3_VAL:5:9 */ 1615 PHYMOD_SYMBOL_FIELD_ENCODE(1059, 9, 5), 1616 /* RXD_DFE_TAP3_WRITE:10:10 */ 1617 PHYMOD_SYMBOL_FIELD_ENCODE(1107, 10, 10), 1618 /* RXC_DFE_TAP3_WRITE:11:11 */ 1619 PHYMOD_SYMBOL_FIELD_ENCODE(1060, 11, 11), 1620 /* RXB_DFE_TAP3_WRITE:12:12 */ 1621 PHYMOD_SYMBOL_FIELD_ENCODE(1013, 12, 12), 1622 /* RXA_DFE_TAP3_WRITE:13:13 */ 1623 PHYMOD_SYMBOL_FIELD_ENCODE(966, 13, 13), 1624 /* RXC_DFE_TAP2_WRITE:14:14 */ 1625 PHYMOD_SYMBOL_FIELD_ENCODE(1052, 14, 14), 1626 /* RXB_DFE_TAP2_WRITE:15:15 */ 1627 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1005, 15, 15) 1628 }; 1629 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP3_STSr_fields[] = 1630 { 1631 /* RXD_DFE_TAP3_STATUS:0:4 */ 1632 PHYMOD_SYMBOL_FIELD_ENCODE(1104, 4, 0), 1633 /* RXC_DFE_TAP3_STATUS:5:9 */ 1634 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1057, 9, 5) 1635 }; 1636 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP4_ABr_fields[] = 1637 { 1638 /* RXB_DFE_TAP4:0:4 */ 1639 PHYMOD_SYMBOL_FIELD_ENCODE(1014, 4, 0), 1640 /* RXA_DFE_TAP4:5:9 */ 1641 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(967, 9, 5) 1642 }; 1643 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP4_CDr_fields[] = 1644 { 1645 /* RXD_DFE_TAP4:0:4 */ 1646 PHYMOD_SYMBOL_FIELD_ENCODE(1108, 4, 0), 1647 /* RXC_DFE_TAP4:5:9 */ 1648 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1061, 9, 5) 1649 }; 1650 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP5_ABCDr_fields[] = 1651 { 1652 /* RXD_DFE_TAP5:0:3 */ 1653 PHYMOD_SYMBOL_FIELD_ENCODE(1109, 3, 0), 1654 /* RXC_DFE_TAP5:4:7 */ 1655 PHYMOD_SYMBOL_FIELD_ENCODE(1062, 7, 4), 1656 /* RXB_DFE_TAP5:8:11 */ 1657 PHYMOD_SYMBOL_FIELD_ENCODE(1015, 11, 8), 1658 /* RXA_DFE_TAP5:12:15 */ 1659 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(968, 15, 12) 1660 }; 1661 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP6_ABCDr_fields[] = 1662 { 1663 /* RXD_DFE_TAP6:0:3 */ 1664 PHYMOD_SYMBOL_FIELD_ENCODE(1110, 3, 0), 1665 /* RXC_DFE_TAP6:4:7 */ 1666 PHYMOD_SYMBOL_FIELD_ENCODE(1063, 7, 4), 1667 /* RXB_DFE_TAP6:8:11 */ 1668 PHYMOD_SYMBOL_FIELD_ENCODE(1016, 11, 8), 1669 /* RXA_DFE_TAP6:12:15 */ 1670 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(969, 15, 12) 1671 }; 1672 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP7_8_MUX_ABCDr_fields[] = 1673 { 1674 /* RXD_DFE_TAP8_MUX:0:1 */ 1675 PHYMOD_SYMBOL_FIELD_ENCODE(1114, 1, 0), 1676 /* RXD_DFE_TAP7_MUX:2:3 */ 1677 PHYMOD_SYMBOL_FIELD_ENCODE(1112, 3, 2), 1678 /* RXC_DFE_TAP8_MUX:4:5 */ 1679 PHYMOD_SYMBOL_FIELD_ENCODE(1067, 5, 4), 1680 /* RXC_DFE_TAP7_MUX:6:7 */ 1681 PHYMOD_SYMBOL_FIELD_ENCODE(1065, 7, 6), 1682 /* RXB_DFE_TAP8_MUX:8:9 */ 1683 PHYMOD_SYMBOL_FIELD_ENCODE(1020, 9, 8), 1684 /* RXB_DFE_TAP7_MUX:10:11 */ 1685 PHYMOD_SYMBOL_FIELD_ENCODE(1018, 11, 10), 1686 /* RXA_DFE_TAP8_MUX:12:13 */ 1687 PHYMOD_SYMBOL_FIELD_ENCODE(973, 13, 12), 1688 /* RXA_DFE_TAP7_MUX:14:15 */ 1689 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(971, 15, 14) 1690 }; 1691 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP7_ABCDr_fields[] = 1692 { 1693 /* RXD_DFE_TAP7:0:3 */ 1694 PHYMOD_SYMBOL_FIELD_ENCODE(1111, 3, 0), 1695 /* RXC_DFE_TAP7:4:7 */ 1696 PHYMOD_SYMBOL_FIELD_ENCODE(1064, 7, 4), 1697 /* RXB_DFE_TAP7:8:11 */ 1698 PHYMOD_SYMBOL_FIELD_ENCODE(1017, 11, 8), 1699 /* RXA_DFE_TAP7:12:15 */ 1700 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(970, 15, 12) 1701 }; 1702 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP8_ABCDr_fields[] = 1703 { 1704 /* RXD_DFE_TAP8:0:3 */ 1705 PHYMOD_SYMBOL_FIELD_ENCODE(1113, 3, 0), 1706 /* RXC_DFE_TAP8:4:7 */ 1707 PHYMOD_SYMBOL_FIELD_ENCODE(1066, 7, 4), 1708 /* RXB_DFE_TAP8:8:11 */ 1709 PHYMOD_SYMBOL_FIELD_ENCODE(1019, 11, 8), 1710 /* RXA_DFE_TAP8:12:15 */ 1711 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(972, 15, 12) 1712 }; 1713 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP9_10_MUX_ABCDr_fields[] = 1714 { 1715 /* RXD_DFE_TAP10_MUX:0:1 */ 1716 PHYMOD_SYMBOL_FIELD_ENCODE(1083, 1, 0), 1717 /* RXD_DFE_TAP9_MUX:2:3 */ 1718 PHYMOD_SYMBOL_FIELD_ENCODE(1116, 3, 2), 1719 /* RXC_DFE_TAP10_MUX:4:5 */ 1720 PHYMOD_SYMBOL_FIELD_ENCODE(1036, 5, 4), 1721 /* RXC_DFE_TAP9_MUX:6:7 */ 1722 PHYMOD_SYMBOL_FIELD_ENCODE(1069, 7, 6), 1723 /* RXB_DFE_TAP10_MUX:8:9 */ 1724 PHYMOD_SYMBOL_FIELD_ENCODE(989, 9, 8), 1725 /* RXB_DFE_TAP9_MUX:10:11 */ 1726 PHYMOD_SYMBOL_FIELD_ENCODE(1022, 11, 10), 1727 /* RXA_DFE_TAP10_MUX:12:13 */ 1728 PHYMOD_SYMBOL_FIELD_ENCODE(942, 13, 12), 1729 /* RXA_DFE_TAP9_MUX:14:15 */ 1730 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(975, 15, 14) 1731 }; 1732 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP9_ABCDr_fields[] = 1733 { 1734 /* RXD_DFE_TAP9:0:3 */ 1735 PHYMOD_SYMBOL_FIELD_ENCODE(1115, 3, 0), 1736 /* RXC_DFE_TAP9:4:7 */ 1737 PHYMOD_SYMBOL_FIELD_ENCODE(1068, 7, 4), 1738 /* RXB_DFE_TAP9:8:11 */ 1739 PHYMOD_SYMBOL_FIELD_ENCODE(1021, 11, 8), 1740 /* RXA_DFE_TAP9:12:15 */ 1741 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(974, 15, 12) 1742 }; 1743 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_HOFFS_JITGENr_fields[] = 1744 { 1745 /* HOFFS_JGEN_JIT_FREQ_IDX:0:5 */ 1746 PHYMOD_SYMBOL_FIELD_ENCODE(471, 5, 0), 1747 /* HOFFS_JGEN_EN:7:7 */ 1748 PHYMOD_SYMBOL_FIELD_ENCODE(469, 7, 7), 1749 /* HOFFS_JGEN_JIT_AMP:8:13 */ 1750 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(470, 13, 8) 1751 }; 1752 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_PF_CTL_DC_OFFS_AND_VGAr_fields[] = 1753 { 1754 /* RX_VGA_THRESH_SEL:0:6 */ 1755 PHYMOD_SYMBOL_FIELD_ENCODE(1235, 6, 0), 1756 /* RX_PF2_CTRL_VAL:7:9 */ 1757 PHYMOD_SYMBOL_FIELD_ENCODE(1182, 9, 7), 1758 /* RX_PF_CTRL_VAL:10:14 */ 1759 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1183, 14, 10) 1760 }; 1761 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_PI_B_CTL0r_fields[] = 1762 { 1763 /* RX_PI_INLC_LUT_0:0:4 */ 1764 PHYMOD_SYMBOL_FIELD_ENCODE(1200, 4, 0), 1765 /* RX_PI_INLC_LUT_1:8:12 */ 1766 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1201, 12, 8) 1767 }; 1768 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_PI_B_CTL1r_fields[] = 1769 { 1770 /* RX_PI_INLC_LUT_2:0:4 */ 1771 PHYMOD_SYMBOL_FIELD_ENCODE(1208, 4, 0), 1772 /* RX_PI_INLC_LUT_3:8:12 */ 1773 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1209, 12, 8) 1774 }; 1775 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_PI_B_CTL2r_fields[] = 1776 { 1777 /* RX_PI_INLC_LUT_4:0:4 */ 1778 PHYMOD_SYMBOL_FIELD_ENCODE(1210, 4, 0), 1779 /* RX_PI_INLC_LUT_5:8:12 */ 1780 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1211, 12, 8) 1781 }; 1782 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_PI_B_CTL3r_fields[] = 1783 { 1784 /* RX_PI_INLC_LUT_6:0:4 */ 1785 PHYMOD_SYMBOL_FIELD_ENCODE(1212, 4, 0), 1786 /* RX_PI_INLC_LUT_7:8:12 */ 1787 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1213, 12, 8) 1788 }; 1789 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_PI_B_CTL4r_fields[] = 1790 { 1791 /* RX_PI_INLC_LUT_8:0:4 */ 1792 PHYMOD_SYMBOL_FIELD_ENCODE(1214, 4, 0), 1793 /* RX_PI_INLC_LUT_9:8:12 */ 1794 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1215, 12, 8) 1795 }; 1796 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_PI_B_CTL5r_fields[] = 1797 { 1798 /* RX_PI_INLC_LUT_10:0:4 */ 1799 PHYMOD_SYMBOL_FIELD_ENCODE(1202, 4, 0), 1800 /* RX_PI_INLC_LUT_11:8:12 */ 1801 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1203, 12, 8) 1802 }; 1803 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_PI_B_CTL6r_fields[] = 1804 { 1805 /* RX_PI_INLC_LUT_12:0:4 */ 1806 PHYMOD_SYMBOL_FIELD_ENCODE(1204, 4, 0), 1807 /* RX_PI_INLC_LUT_13:8:12 */ 1808 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1205, 12, 8) 1809 }; 1810 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_PI_B_CTL7r_fields[] = 1811 { 1812 /* RX_PI_INLC_LUT_14:0:4 */ 1813 PHYMOD_SYMBOL_FIELD_ENCODE(1206, 4, 0), 1814 /* RX_PI_INLC_LUT_15:8:12 */ 1815 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1207, 12, 8) 1816 }; 1817 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_PI_B_CTL9r_fields[] = 1818 { 1819 /* RX_PI_INLC_OFFSET:8:14 */ 1820 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1216, 14, 8) 1821 }; 1822 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_PI_B_CTL_10r_fields[] = 1823 { 1824 /* RX_PI_INLC_EN:0:0 */ 1825 PHYMOD_SYMBOL_FIELD_ENCODE(1198, 0, 0), 1826 /* RX_PI_INLC_K:6:7 */ 1827 PHYMOD_SYMBOL_FIELD_ENCODE(1199, 7, 6), 1828 /* RX_PI_INLC_PHASE_DLY:8:9 */ 1829 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1218, 9, 8) 1830 }; 1831 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_PI_B_STS0r_fields[] = 1832 { 1833 /* RX_PI_INLC_OUT:0:3 */ 1834 PHYMOD_SYMBOL_FIELD_ENCODE(1217, 3, 0), 1835 /* RX_PI_INLC_RX_PHASE_POINTER:7:15 */ 1836 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1219, 15, 7) 1837 }; 1838 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_PI_CNT_BIN_Dr_fields[] = 1839 { 1840 /* CNT_BIN_D:0:7 */ 1841 PHYMOD_SYMBOL_FIELD_ENCODE(365, 7, 0), 1842 /* CNT_BIN_DQ:8:15 */ 1843 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(366, 15, 8) 1844 }; 1845 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_PI_CNT_BIN_Lr_fields[] = 1846 { 1847 /* CNT_BIN_L:0:7 */ 1848 PHYMOD_SYMBOL_FIELD_ENCODE(370, 7, 0), 1849 /* CNT_BIN_LQ:8:15 */ 1850 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(371, 15, 8) 1851 }; 1852 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_PI_CNT_BIN_LDr_fields[] = 1853 { 1854 /* CNT_BIN_L_LD:0:7 */ 1855 PHYMOD_SYMBOL_FIELD_ENCODE(372, 7, 0), 1856 /* CNT_BIN_D_LD:8:15 */ 1857 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(367, 15, 8) 1858 }; 1859 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_PI_CNT_BIN_Pr_fields[] = 1860 { 1861 /* CNT_BIN_P:0:7 */ 1862 PHYMOD_SYMBOL_FIELD_ENCODE(373, 7, 0), 1863 /* CNT_BIN_PQ:8:15 */ 1864 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(374, 15, 8) 1865 }; 1866 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_PI_CNT_BIN_PDr_fields[] = 1867 { 1868 /* CNT_BIN_P_PD:0:7 */ 1869 PHYMOD_SYMBOL_FIELD_ENCODE(375, 7, 0), 1870 /* CNT_BIN_D_PD:8:15 */ 1871 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(368, 15, 8) 1872 }; 1873 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_PI_CTLr_fields[] = 1874 { 1875 /* RX_PI_SLICERS_EN:0:5 */ 1876 PHYMOD_SYMBOL_FIELD_ENCODE(1224, 5, 0), 1877 /* RX_PI_PHASE_STEP_CNT:6:9 */ 1878 PHYMOD_SYMBOL_FIELD_ENCODE(1222, 9, 6), 1879 /* RX_PI_MANUAL_MODE:10:10 */ 1880 PHYMOD_SYMBOL_FIELD_ENCODE(1220, 10, 10), 1881 /* RX_PI_MANUAL_STROBE:11:11 */ 1882 PHYMOD_SYMBOL_FIELD_ENCODE(1221, 11, 11), 1883 /* RX_PI_STEP_SIZE:12:12 */ 1884 PHYMOD_SYMBOL_FIELD_ENCODE(1225, 12, 12), 1885 /* RX_PI_DISP_MSB_STATUS:13:13 */ 1886 PHYMOD_SYMBOL_FIELD_ENCODE(1197, 13, 13), 1887 /* RX_PI_PHASE_STEP_DIR:14:14 */ 1888 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1223, 14, 14) 1889 }; 1890 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_RX_PI_CTR_PHASE_ERRr_fields[] = 1891 { 1892 /* CDR_PHASE_ERR_PICNT:0:5 */ 1893 PHYMOD_SYMBOL_FIELD_ENCODE(349, 5, 0), 1894 /* CNT_BIN_D_PERR:7:15 */ 1895 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(369, 15, 7) 1896 }; 1897 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_SCRATCHr_fields[] = 1898 { 1899 /* UC_DSC_SCRATCH:0:15 */ 1900 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1485, 15, 0) 1901 }; 1902 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_SLCRS_WRITE_CTLr_fields[] = 1903 { 1904 /* RX_AFE_OVERRIDE_SEL:0:3 */ 1905 PHYMOD_SYMBOL_FIELD_ENCODE(1129, 3, 0), 1906 /* RX_AFE_OVERRIDE_VAL:7:14 */ 1907 PHYMOD_SYMBOL_FIELD_ENCODE(1130, 14, 7), 1908 /* RX_AFE_OVERRIDE_WRITE:15:15 */ 1909 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1131, 15, 15) 1910 }; 1911 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_SLCR_DFE_TAPS_CTLr_fields[] = 1912 { 1913 /* ANA_TIMER_T2:0:5 */ 1914 PHYMOD_SYMBOL_FIELD_ENCODE(246, 5, 0), 1915 /* RX_SLICER_DENOMINATOR:6:11 */ 1916 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1230, 11, 6) 1917 }; 1918 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_SM_CTL0r_fields[] = 1919 { 1920 /* EEE_MODE_EN:1:1 */ 1921 PHYMOD_SYMBOL_FIELD_ENCODE(444, 1, 1), 1922 /* EEE_QUIET_RX_AFE_PWRDWN_VAL:2:2 */ 1923 PHYMOD_SYMBOL_FIELD_ENCODE(448, 2, 2), 1924 /* IGNORE_RX_MODE:3:3 */ 1925 PHYMOD_SYMBOL_FIELD_ENCODE(478, 3, 3), 1926 /* CL72_TIMER_EN:4:4 */ 1927 PHYMOD_SYMBOL_FIELD_ENCODE(357, 4, 4), 1928 /* UC_TUNE_EN:5:5 */ 1929 PHYMOD_SYMBOL_FIELD_ENCODE(1494, 5, 5), 1930 /* HW_TUNE_EN:6:6 */ 1931 PHYMOD_SYMBOL_FIELD_ENCODE(475, 6, 6), 1932 /* EEE_MEASURE_EN:8:8 */ 1933 PHYMOD_SYMBOL_FIELD_ENCODE(443, 8, 8), 1934 /* UC_ACK_DSC_EEE_DONE:11:11 */ 1935 PHYMOD_SYMBOL_FIELD_ENCODE(1475, 11, 11), 1936 /* UC_ACK_DSC_RESTART:13:13 */ 1937 PHYMOD_SYMBOL_FIELD_ENCODE(1476, 13, 13), 1938 /* UC_ACK_DSC_CONFIG:14:14 */ 1939 PHYMOD_SYMBOL_FIELD_ENCODE(1474, 14, 14), 1940 /* SET_MEAS_INCOMPLETE:15:15 */ 1941 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1237, 15, 15) 1942 }; 1943 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_SM_CTL1r_fields[] = 1944 { 1945 /* RX_DSC_LOCK_FRC:0:0 */ 1946 PHYMOD_SYMBOL_FIELD_ENCODE(1154, 0, 0), 1947 /* RX_DSC_LOCK_FRC_VAL:1:1 */ 1948 PHYMOD_SYMBOL_FIELD_ENCODE(1155, 1, 1), 1949 /* DSC_CLR_FRC:2:2 */ 1950 PHYMOD_SYMBOL_FIELD_ENCODE(428, 2, 2), 1951 /* DSC_CLR_FRC_VAL:3:3 */ 1952 PHYMOD_SYMBOL_FIELD_ENCODE(429, 3, 3), 1953 /* TRNSUM_FRZ_FRC:4:4 */ 1954 PHYMOD_SYMBOL_FIELD_ENCODE(1331, 4, 4), 1955 /* TRNSUM_FRZ_FRC_VAL:5:5 */ 1956 PHYMOD_SYMBOL_FIELD_ENCODE(1332, 5, 5), 1957 /* TIMER_DONE_FRC:6:6 */ 1958 PHYMOD_SYMBOL_FIELD_ENCODE(1260, 6, 6), 1959 /* TIMER_DONE_FRC_VAL:7:7 */ 1960 PHYMOD_SYMBOL_FIELD_ENCODE(1261, 7, 7), 1961 /* FREQ_UPD_EN_FRC:8:8 */ 1962 PHYMOD_SYMBOL_FIELD_ENCODE(466, 8, 8), 1963 /* FREQ_UPD_EN_FRC_VAL:9:9 */ 1964 PHYMOD_SYMBOL_FIELD_ENCODE(467, 9, 9), 1965 /* CDR_FRZ_FRC:10:10 */ 1966 PHYMOD_SYMBOL_FIELD_ENCODE(339, 10, 10), 1967 /* CDR_FRZ_FRC_VAL:11:11 */ 1968 PHYMOD_SYMBOL_FIELD_ENCODE(340, 11, 11), 1969 /* TRNSUM_CLR_FRC:12:12 */ 1970 PHYMOD_SYMBOL_FIELD_ENCODE(1314, 12, 12), 1971 /* TRNSUM_CLR_FRC_VAL:13:13 */ 1972 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1315, 13, 13) 1973 }; 1974 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_SM_CTL2r_fields[] = 1975 { 1976 /* EEE_LFSR_CNT:0:12 */ 1977 PHYMOD_SYMBOL_FIELD_ENCODE(441, 12, 0), 1978 /* DSC_TIMEOUT_MULT:13:15 */ 1979 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(436, 15, 13) 1980 }; 1981 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_SM_CTL3r_fields[] = 1982 { 1983 /* MEASURE_LFSR_CNT:0:12 */ 1984 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(623, 12, 0) 1985 }; 1986 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_SM_CTL4r_fields[] = 1987 { 1988 /* ACQ_CDR_TIMEOUT:0:4 */ 1989 PHYMOD_SYMBOL_FIELD_ENCODE(0, 4, 0), 1990 /* CDR_SETTLE_TIMEOUT:5:9 */ 1991 PHYMOD_SYMBOL_FIELD_ENCODE(354, 9, 5), 1992 /* HW_TUNE_TIMEOUT:10:14 */ 1993 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(476, 14, 10) 1994 }; 1995 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_SM_CTL5r_fields[] = 1996 { 1997 /* MEASURE_TIMEOUT:0:4 */ 1998 PHYMOD_SYMBOL_FIELD_ENCODE(624, 4, 0), 1999 /* EEE_ACQ_CDR_TIMEOUT:5:9 */ 2000 PHYMOD_SYMBOL_FIELD_ENCODE(437, 9, 5), 2001 /* EEE_CDR_SETTLE_TIMEOUT:10:14 */ 2002 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(439, 14, 10) 2003 }; 2004 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_SM_CTL6r_fields[] = 2005 { 2006 /* EEE_HW_TUNE_TIMEOUT:0:4 */ 2007 PHYMOD_SYMBOL_FIELD_ENCODE(440, 4, 0), 2008 /* EEE_ANA_PWR_TIMEOUT:10:14 */ 2009 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(438, 14, 10) 2010 }; 2011 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_SM_CTL7r_fields[] = 2012 { 2013 /* CDR_BWSEL_INTEG_ACQCDR:0:3 */ 2014 PHYMOD_SYMBOL_FIELD_ENCODE(330, 3, 0), 2015 /* CDR_BWSEL_INTEG_EEE_ACQCDR:4:7 */ 2016 PHYMOD_SYMBOL_FIELD_ENCODE(331, 7, 4), 2017 /* CDR_BWSEL_INTEG_NORM:8:11 */ 2018 PHYMOD_SYMBOL_FIELD_ENCODE(332, 11, 8), 2019 /* CDR_BWSEL_PROP_ACQCDR:12:12 */ 2020 PHYMOD_SYMBOL_FIELD_ENCODE(333, 12, 12), 2021 /* CDR_BWSEL_PROP_NORM:14:14 */ 2022 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(335, 14, 14) 2023 }; 2024 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_SM_CTL8r_fields[] = 2025 { 2026 /* PHASE_ERR_OFFSET:0:3 */ 2027 PHYMOD_SYMBOL_FIELD_ENCODE(812, 3, 0), 2028 /* EEE_PHASE_ERR_OFFSET:4:7 */ 2029 PHYMOD_SYMBOL_FIELD_ENCODE(445, 7, 4), 2030 /* PHASE_ERR_OFFSET_EN:8:9 */ 2031 PHYMOD_SYMBOL_FIELD_ENCODE(813, 9, 8), 2032 /* EEE_PHASE_ERR_OFFSET_EN:10:11 */ 2033 PHYMOD_SYMBOL_FIELD_ENCODE(446, 11, 10), 2034 /* CDR_BWSEL_PROP_EEE_ACQCDR:14:14 */ 2035 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(334, 14, 14) 2036 }; 2037 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_SM_CTL9r_fields[] = 2038 { 2039 /* RX_RESTART_PMD:0:0 */ 2040 PHYMOD_SYMBOL_FIELD_ENCODE(1228, 0, 0), 2041 /* RX_RESTART_PMD_HOLD:1:1 */ 2042 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1229, 1, 1) 2043 }; 2044 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_SM_STS_DSC_LOCKr_fields[] = 2045 { 2046 /* RX_DSC_LOCK:0:0 */ 2047 PHYMOD_SYMBOL_FIELD_ENCODE(1153, 0, 0), 2048 /* MEAS_INCOMPLETE:1:1 */ 2049 PHYMOD_SYMBOL_FIELD_ENCODE(625, 1, 1), 2050 /* EEE_MEASURE_CNT:7:15 */ 2051 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(442, 15, 7) 2052 }; 2053 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_SM_STS_DSC_STr_fields[] = 2054 { 2055 /* DSC_SM_READY_FOR_CMD:0:0 */ 2056 PHYMOD_SYMBOL_FIELD_ENCODE(431, 0, 0), 2057 /* DSC_SM_GP_UC_REQ:1:6 */ 2058 PHYMOD_SYMBOL_FIELD_ENCODE(430, 6, 1), 2059 /* DSC_SM_SCRATCH:8:10 */ 2060 PHYMOD_SYMBOL_FIELD_ENCODE(432, 10, 8), 2061 /* DSC_STATE:11:15 */ 2062 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(433, 15, 11) 2063 }; 2064 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_SM_STS_DSC_ST_EEE_ONE_HOTr_fields[] = 2065 { 2066 /* DSC_STATE_EEE_ONE_HOT:0:6 */ 2067 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(434, 6, 0) 2068 }; 2069 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_SM_STS_DSC_ST_ONE_HOTr_fields[] = 2070 { 2071 /* DSC_STATE_ONE_HOT:0:9 */ 2072 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(435, 9, 0) 2073 }; 2074 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_SM_STS_RESTARTr_fields[] = 2075 { 2076 /* RESTART_PI_EXT_MODE:0:0 */ 2077 PHYMOD_SYMBOL_FIELD_ENCODE(916, 0, 0), 2078 /* RESTART_SIGDET:1:1 */ 2079 PHYMOD_SYMBOL_FIELD_ENCODE(918, 1, 1), 2080 /* RESTART_PMD_RESTART:2:2 */ 2081 PHYMOD_SYMBOL_FIELD_ENCODE(917, 2, 2), 2082 /* EEE_QUIET_FROM_EEE_STATES:3:3 */ 2083 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(447, 3, 3) 2084 }; 2085 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_SPARE_DSC_Ir_fields[] = 2086 { 2087 /* SPARE_DSC_I:0:0 */ 2088 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1249, 0, 0) 2089 }; 2090 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_TRNSUMr_fields[] = 2091 { 2092 /* TRNSUM:0:15 */ 2093 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1307, 15, 0) 2094 }; 2095 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_Ar_fields[] = 2096 { 2097 /* TRNSUM_A:0:15 */ 2098 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1308, 15, 0) 2099 }; 2100 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_A_LOr_fields[] = 2101 { 2102 /* TRNSUM_A_LOW:8:15 */ 2103 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1310, 15, 8) 2104 }; 2105 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_Br_fields[] = 2106 { 2107 /* TRNSUM_B:0:15 */ 2108 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1311, 15, 0) 2109 }; 2110 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_B_LOr_fields[] = 2111 { 2112 /* TRNSUM_B_LOW:8:15 */ 2113 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1312, 15, 8) 2114 }; 2115 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_Cr_fields[] = 2116 { 2117 /* TRNSUM_C:0:15 */ 2118 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1313, 15, 0) 2119 }; 2120 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_CTLr_fields[] = 2121 { 2122 /* TRNSUM_GAIN:0:1 */ 2123 PHYMOD_SYMBOL_FIELD_ENCODE(1333, 1, 0), 2124 /* TRNSUM_TAP_RANGE_SEL:4:6 */ 2125 PHYMOD_SYMBOL_FIELD_ENCODE(1357, 6, 4), 2126 /* TRNSUM_COR_SEL:8:9 */ 2127 PHYMOD_SYMBOL_FIELD_ENCODE(1317, 9, 8), 2128 /* TRNSUM_QPHASE_MULT_EN:12:12 */ 2129 PHYMOD_SYMBOL_FIELD_ENCODE(1353, 12, 12), 2130 /* TRNSUM_RANDOM_TAPSEL_DISABLE:13:13 */ 2131 PHYMOD_SYMBOL_FIELD_ENCODE(1354, 13, 13), 2132 /* TRNSUM_EYE_CLOSURE_EN:14:14 */ 2133 PHYMOD_SYMBOL_FIELD_ENCODE(1329, 14, 14), 2134 /* TRNSUM_EN:15:15 */ 2135 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1324, 15, 15) 2136 }; 2137 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_CTL2r_fields[] = 2138 { 2139 /* TRNSUM_CLR_SC:0:0 */ 2140 PHYMOD_SYMBOL_FIELD_ENCODE(1316, 0, 0), 2141 /* TRNSUM_DISABLE_SM_CLEAR:1:1 */ 2142 PHYMOD_SYMBOL_FIELD_ENCODE(1321, 1, 1), 2143 /* TRNSUM_PATTERN_MATCH_SEL:2:4 */ 2144 PHYMOD_SYMBOL_FIELD_ENCODE(1348, 4, 2), 2145 /* TRNSUM_EYE_CLOSE_PREV_EN:5:5 */ 2146 PHYMOD_SYMBOL_FIELD_ENCODE(1328, 5, 5), 2147 /* TRNSUM_EYE_CLOSURE_ERR_SEL:6:6 */ 2148 PHYMOD_SYMBOL_FIELD_ENCODE(1330, 6, 6), 2149 /* TRNSUM_PATTERN_7LVL_EN:7:7 */ 2150 PHYMOD_SYMBOL_FIELD_ENCODE(1346, 7, 7), 2151 /* TRNSUM_ALT_PATH_EN:8:9 */ 2152 PHYMOD_SYMBOL_FIELD_ENCODE(1309, 9, 8), 2153 /* TRNSUM_MODE_SEL:10:11 */ 2154 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1338, 11, 10) 2155 }; 2156 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_C_LOr_fields[] = 2157 { 2158 /* TRNSUM_C_LOW:8:15 */ 2159 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1318, 15, 8) 2160 }; 2161 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_Dr_fields[] = 2162 { 2163 /* TRNSUM_D:0:15 */ 2164 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1319, 15, 0) 2165 }; 2166 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_D_LOr_fields[] = 2167 { 2168 /* TRNSUM_D_LOW:8:15 */ 2169 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1322, 15, 8) 2170 }; 2171 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_INL_MEASr_fields[] = 2172 { 2173 /* TRNSUM_INL_MEAS_EN:0:0 */ 2174 PHYMOD_SYMBOL_FIELD_ENCODE(1334, 0, 0), 2175 /* TRNSUM_INL_PHS_PTR:1:7 */ 2176 PHYMOD_SYMBOL_FIELD_ENCODE(1335, 7, 1), 2177 /* TRNSUM_PRBS_DP_INVERT:12:12 */ 2178 PHYMOD_SYMBOL_FIELD_ENCODE(1349, 12, 12), 2179 /* TRNSUM_PRBS_PRECODER_LOAD_ZERO:13:13 */ 2180 PHYMOD_SYMBOL_FIELD_ENCODE(1352, 13, 13), 2181 /* TRNSUM_PRBS_PRECODER_AUTOSEED:14:14 */ 2182 PHYMOD_SYMBOL_FIELD_ENCODE(1350, 14, 14), 2183 /* TRNSUM_PRBS_PRECODER_LOAD_SEED:15:15 */ 2184 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1351, 15, 15) 2185 }; 2186 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_LOr_fields[] = 2187 { 2188 /* TRNSUM_LOW:6:15 */ 2189 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1337, 15, 6) 2190 }; 2191 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_MISCr_fields[] = 2192 { 2193 /* TDT_PRBS_SLIP:0:0 */ 2194 PHYMOD_SYMBOL_FIELD_ENCODE(1258, 0, 0), 2195 /* UC_TRNSUM_EN:1:1 */ 2196 PHYMOD_SYMBOL_FIELD_ENCODE(1493, 1, 1), 2197 /* TRNSUM_DATA_SEL:2:5 */ 2198 PHYMOD_SYMBOL_FIELD_ENCODE(1320, 5, 2), 2199 /* TRNSUM_RND_FREE_RUNNING:6:6 */ 2200 PHYMOD_SYMBOL_FIELD_ENCODE(1355, 6, 6), 2201 /* DC_OFFS_WRITE_EN:7:7 */ 2202 PHYMOD_SYMBOL_FIELD_ENCODE(416, 7, 7), 2203 /* TRNSUM_ERR_SEL:8:10 */ 2204 PHYMOD_SYMBOL_FIELD_ENCODE(1326, 10, 8), 2205 /* TRNSUM_MULTI_LEVEL_ISI:11:11 */ 2206 PHYMOD_SYMBOL_FIELD_ENCODE(1339, 11, 11), 2207 /* TRNSUM_EYEC_SEL:12:15 */ 2208 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1327, 15, 12) 2209 }; 2210 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_PAT_CTL_0Ar_fields[] = 2211 { 2212 /* TRNSUM_PATTERN_0:0:9 */ 2213 PHYMOD_SYMBOL_FIELD_ENCODE(1340, 9, 0), 2214 /* TRNSUM_PATTERN_FULL_CHECK_OFF:12:12 */ 2215 PHYMOD_SYMBOL_FIELD_ENCODE(1347, 12, 12), 2216 /* TRNSUM_EDGE_PATTERN_EN:14:14 */ 2217 PHYMOD_SYMBOL_FIELD_ENCODE(1323, 14, 14), 2218 /* TRNSUM_INV_PATTERN_EN:15:15 */ 2219 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1336, 15, 15) 2220 }; 2221 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_PAT_CTL_0Br_fields[] = 2222 { 2223 /* TRNSUM_PATTERN_0_BIT_EN:0:9 */ 2224 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1341, 9, 0) 2225 }; 2226 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_PAT_CTL_1Ar_fields[] = 2227 { 2228 /* TRNSUM_PATTERN_1:0:9 */ 2229 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1342, 9, 0) 2230 }; 2231 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_PAT_CTL_1Br_fields[] = 2232 { 2233 /* TRNSUM_PATTERN_1_BIT_EN:0:9 */ 2234 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1343, 9, 0) 2235 }; 2236 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_PAT_CTL_2Ar_fields[] = 2237 { 2238 /* TRNSUM_PATTERN_2:0:9 */ 2239 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1344, 9, 0) 2240 }; 2241 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_PAT_CTL_2Br_fields[] = 2242 { 2243 /* TRNSUM_PATTERN_2_BIT_EN:0:9 */ 2244 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1345, 9, 0) 2245 }; 2246 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_TAP_CTLr_fields[] = 2247 { 2248 /* TRNSUM_TAP_EN:0:7 */ 2249 PHYMOD_SYMBOL_FIELD_ENCODE(1356, 7, 0), 2250 /* TRNSUM_TAP_SIGN:8:15 */ 2251 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1358, 15, 8) 2252 }; 2253 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_TDT_CTLr_fields[] = 2254 { 2255 /* TDT_TRNSUM_EN:0:0 */ 2256 PHYMOD_SYMBOL_FIELD_ENCODE(1259, 0, 0), 2257 /* TRNSUM_TDT_COUNT:1:14 */ 2258 PHYMOD_SYMBOL_FIELD_ENCODE(1359, 14, 1), 2259 /* TRNSUM_TDT_SLIP:15:15 */ 2260 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1360, 15, 15) 2261 }; 2262 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_UC_CTLr_fields[] = 2263 { 2264 /* UC_DSC_GP_UC_REQ:0:5 */ 2265 PHYMOD_SYMBOL_FIELD_ENCODE(1483, 5, 0), 2266 /* UC_DSC_ERROR_FOUND:6:6 */ 2267 PHYMOD_SYMBOL_FIELD_ENCODE(1482, 6, 6), 2268 /* UC_DSC_READY_FOR_CMD:7:7 */ 2269 PHYMOD_SYMBOL_FIELD_ENCODE(1484, 7, 7), 2270 /* UC_DSC_SUPP_INFO:8:15 */ 2271 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1486, 15, 8) 2272 }; 2273 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_VGA_DATA_THR_STSr_fields[] = 2274 { 2275 /* RX_DATA05_STATUS:0:7 */ 2276 PHYMOD_SYMBOL_FIELD_ENCODE(1136, 7, 0), 2277 /* RX_DATA14_STATUS:8:15 */ 2278 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1142, 15, 8) 2279 }; 2280 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_VGA_D_THR_STSr_fields[] = 2281 { 2282 /* RX_DATA23_STATUS:0:7 */ 2283 PHYMOD_SYMBOL_FIELD_ENCODE(1148, 7, 0), 2284 /* RX_VGA_STATUS:8:14 */ 2285 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1234, 14, 8) 2286 }; 2287 static uint32_t BCMI_BLACKHAWK_XGXS_DSC_VGA_PHASE_THR_STSr_fields[] = 2288 { 2289 /* RX_PHASE02_STATUS:0:7 */ 2290 PHYMOD_SYMBOL_FIELD_ENCODE(1188, 7, 0), 2291 /* RX_PHASE1_STATUS:8:15 */ 2292 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1194, 15, 8) 2293 }; 2294 static uint32_t BCMI_BLACKHAWK_XGXS_LNKTRNIR_BASE_R_LP_COEFF_UPDr_fields[] = 2295 { 2296 /* LINKTRN_IEEE_LP_COEFF_UPDATE:0:15 */ 2297 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(502, 15, 0) 2298 }; 2299 static uint32_t BCMI_BLACKHAWK_XGXS_LNKTRNIR_BASE_R_LP_STS_REPr_fields[] = 2300 { 2301 /* LINKTRN_IEEE_LP_STATUS_REPORT:0:15 */ 2302 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(503, 15, 0) 2303 }; 2304 static uint32_t BCMI_BLACKHAWK_XGXS_LNKTRNIT_BASE_R_LD_COEFF_UPDr_fields[] = 2305 { 2306 /* LINKTRN_IEEE_LD_COEFF_UPDATE:0:15 */ 2307 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(500, 15, 0) 2308 }; 2309 static uint32_t BCMI_BLACKHAWK_XGXS_LNKTRNIT_BASE_R_LD_STS_REPr_fields[] = 2310 { 2311 /* LINKTRN_IEEE_LD_STATUS_REPORT:0:15 */ 2312 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(501, 15, 0) 2313 }; 2314 static uint32_t BCMI_BLACKHAWK_XGXS_LNKTRNIT_BASE_R_PMD_CTLr_fields[] = 2315 { 2316 /* LINKTRN_IEEE_RESTART_TRAINING:0:0 */ 2317 PHYMOD_SYMBOL_FIELD_ENCODE(505, 0, 0), 2318 /* LINKTRN_IEEE_TRAINING_ENABLE:1:1 */ 2319 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(506, 1, 1) 2320 }; 2321 static uint32_t BCMI_BLACKHAWK_XGXS_LNKTRNIT_BASE_R_PMD_STSr_fields[] = 2322 { 2323 /* LINKTRN_IEEE_RECEIVER_STATUS:0:0 */ 2324 PHYMOD_SYMBOL_FIELD_ENCODE(504, 0, 0), 2325 /* LINKTRN_IEEE_FRAME_LOCK:1:1 */ 2326 PHYMOD_SYMBOL_FIELD_ENCODE(499, 1, 1), 2327 /* LINKTRN_IEEE_TRAINING_STATUS:2:2 */ 2328 PHYMOD_SYMBOL_FIELD_ENCODE(508, 2, 2), 2329 /* LINKTRN_IEEE_TRAINING_FAILURE:3:3 */ 2330 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(507, 3, 3) 2331 }; 2332 static uint32_t BCMI_BLACKHAWK_XGXS_LNKTRNUR_CTL0r_fields[] = 2333 { 2334 /* LINKTRN_RX_TRAINING_EN:0:0 */ 2335 PHYMOD_SYMBOL_FIELD_ENCODE(552, 0, 0), 2336 /* LINKTRN_TR_COARSE_LOCK:1:1 */ 2337 PHYMOD_SYMBOL_FIELD_ENCODE(562, 1, 1), 2338 /* LINKTRN_RX_SIGNAL_OK:2:2 */ 2339 PHYMOD_SYMBOL_FIELD_ENCODE(550, 2, 2), 2340 /* LINKTRN_RX_TRN_MODE:3:3 */ 2341 PHYMOD_SYMBOL_FIELD_ENCODE(553, 3, 3), 2342 /* LINKTRN_RX_ACTIVE:4:4 */ 2343 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(541, 4, 4) 2344 }; 2345 static uint32_t BCMI_BLACKHAWK_XGXS_LNKTRNUR_CTL1r_fields[] = 2346 { 2347 /* LINKTRN_GOOD_MARKER_CNT:0:1 */ 2348 PHYMOD_SYMBOL_FIELD_ENCODE(498, 1, 0), 2349 /* LINKTRN_BAD_MARKER_CNT:4:6 */ 2350 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(486, 6, 4) 2351 }; 2352 static uint32_t BCMI_BLACKHAWK_XGXS_LNKTRNUR_CTL2r_fields[] = 2353 { 2354 /* LINKTRN_DME_CELL_BOUNDARY_CHK:4:4 */ 2355 PHYMOD_SYMBOL_FIELD_ENCODE(491, 4, 4), 2356 /* LINKTRN_STRICT_DME_CHK:5:5 */ 2357 PHYMOD_SYMBOL_FIELD_ENCODE(555, 5, 5), 2358 /* LINKTRN_STRICT_MARKER_CHK:6:6 */ 2359 PHYMOD_SYMBOL_FIELD_ENCODE(556, 6, 6), 2360 /* LINKTRN_PPM_OFFSET_EN:7:7 */ 2361 PHYMOD_SYMBOL_FIELD_ENCODE(532, 7, 7), 2362 /* LINKTRN_RX_DP_LN_CLK_EN:8:8 */ 2363 PHYMOD_SYMBOL_FIELD_ENCODE(542, 8, 8), 2364 /* LINKTRN_FRAME_CONSISTENCY_CHK_EN:9:9 */ 2365 PHYMOD_SYMBOL_FIELD_ENCODE(494, 9, 9), 2366 /* LINKTRN_BLOCK_LP_IEEE_UPDATES:10:10 */ 2367 PHYMOD_SYMBOL_FIELD_ENCODE(487, 10, 10), 2368 /* LINKTRN_USEDME_MARKER_CHK:11:11 */ 2369 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(566, 11, 11) 2370 }; 2371 static uint32_t BCMI_BLACKHAWK_XGXS_LNKTRNUR_CTL3r_fields[] = 2372 { 2373 /* LINKTRN_RX_SIGNDATA_SEL:0:0 */ 2374 PHYMOD_SYMBOL_FIELD_ENCODE(551, 0, 0), 2375 /* LINKTRN_ASYNC_PPM_ADJUST:2:2 */ 2376 PHYMOD_SYMBOL_FIELD_ENCODE(485, 2, 2), 2377 /* LINKTRN_RX_PAM4_TRN_FRAME_SIZE:3:3 */ 2378 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(543, 3, 3) 2379 }; 2380 static uint32_t BCMI_BLACKHAWK_XGXS_LNKTRNUR_CTL4r_fields[] = 2381 { 2382 /* LINKTRN_RX_PRBS_CHK_EN:0:0 */ 2383 PHYMOD_SYMBOL_FIELD_ENCODE(547, 0, 0), 2384 /* LINKTRN_RX_PRBS_CHK_AUTO_DETECT_EN:1:1 */ 2385 PHYMOD_SYMBOL_FIELD_ENCODE(544, 1, 1), 2386 /* LINKTRN_RX_PRBS_CHK_AUTO_DETECT_RELOCK_EN:2:2 */ 2387 PHYMOD_SYMBOL_FIELD_ENCODE(546, 2, 2), 2388 /* LINKTRN_RX_PRBS_CHK_MODE_SEL:4:5 */ 2389 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(548, 5, 4) 2390 }; 2391 static uint32_t BCMI_BLACKHAWK_XGXS_LNKTRNUR_CTL5r_fields[] = 2392 { 2393 /* LINKTRN_FFLOCK_DERR_CONSEC_FCNT:0:4 */ 2394 PHYMOD_SYMBOL_FIELD_ENCODE(492, 4, 0), 2395 /* LINKTRN_FFLOCK_DERR_PER_FCNT:8:10 */ 2396 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(493, 10, 8) 2397 }; 2398 static uint32_t BCMI_BLACKHAWK_XGXS_LNKTRNUR_STS0r_fields[] = 2399 { 2400 /* LINKTRN_FRAME_LOCK:0:0 */ 2401 PHYMOD_SYMBOL_FIELD_ENCODE(495, 0, 0), 2402 /* LINKTRN_REMOTE_RX_READY:1:1 */ 2403 PHYMOD_SYMBOL_FIELD_ENCODE(540, 1, 1), 2404 /* LINKTRN_FRAME_LOCK_LL:2:2 */ 2405 PHYMOD_SYMBOL_FIELD_ENCODE(497, 2, 2), 2406 /* LINKTRN_FRAME_LOCK_LH:3:3 */ 2407 PHYMOD_SYMBOL_FIELD_ENCODE(496, 3, 3), 2408 /* LINKTRN_RCV_COEFF_UPDATE_PARITY:4:4 */ 2409 PHYMOD_SYMBOL_FIELD_ENCODE(538, 4, 4), 2410 /* LINKTRN_RCV_STATUS_REPORT_PARITY:5:5 */ 2411 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(539, 5, 5) 2412 }; 2413 static uint32_t BCMI_BLACKHAWK_XGXS_LNKTRNUR_STS1r_fields[] = 2414 { 2415 /* LINKTRN_RX_PRBS_CHK_AUTO_DETECT_LOCK:0:0 */ 2416 PHYMOD_SYMBOL_FIELD_ENCODE(545, 0, 0), 2417 /* LINKTRN_RX_PRBS_CHK_MODE_SEL_AUTO_DETECT:4:5 */ 2418 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(549, 5, 4) 2419 }; 2420 static uint32_t BCMI_BLACKHAWK_XGXS_LNKTRNUR_UC_INTR_CTL0r_fields[] = 2421 { 2422 /* LINKTRN_MICRO_UPDATE_CHG_INT_EN:0:0 */ 2423 PHYMOD_SYMBOL_FIELD_ENCODE(522, 0, 0), 2424 /* LINKTRN_MICRO_STATUS_CHG_INT_EN:1:1 */ 2425 PHYMOD_SYMBOL_FIELD_ENCODE(518, 1, 1), 2426 /* LINKTRN_MICRO_FRAME_LOCK_INT_EN:2:2 */ 2427 PHYMOD_SYMBOL_FIELD_ENCODE(514, 2, 2), 2428 /* LINKTRN_MICRO_FFLOCK_INT_EN:3:3 */ 2429 PHYMOD_SYMBOL_FIELD_ENCODE(512, 3, 3), 2430 /* LINKTRN_MICRO_UPDATE_REQ_INT_FRC:8:8 */ 2431 PHYMOD_SYMBOL_FIELD_ENCODE(524, 8, 8), 2432 /* LINKTRN_MICRO_UPDATE_REQ_INT_FRC_VAL:9:9 */ 2433 PHYMOD_SYMBOL_FIELD_ENCODE(525, 9, 9), 2434 /* LINKTRN_MICRO_STATUS_RESP_INT_FRC:10:10 */ 2435 PHYMOD_SYMBOL_FIELD_ENCODE(520, 10, 10), 2436 /* LINKTRN_MICRO_STATUS_RESP_INT_FRC_VAL:11:11 */ 2437 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(521, 11, 11) 2438 }; 2439 static uint32_t BCMI_BLACKHAWK_XGXS_LNKTRNUR_UC_INTR_CTL1r_fields[] = 2440 { 2441 /* LINKTRN_MICRO_INTERRUPT_MASK_CONTROL_PAGE:0:15 */ 2442 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(516, 15, 0) 2443 }; 2444 static uint32_t BCMI_BLACKHAWK_XGXS_LNKTRNUR_UC_INTR_CTL2r_fields[] = 2445 { 2446 /* LINKTRN_MICRO_INTERRUPT_MASK_STATUS_PAGE:0:15 */ 2447 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(517, 15, 0) 2448 }; 2449 static uint32_t BCMI_BLACKHAWK_XGXS_LNKTRNUR_UC_STS0r_fields[] = 2450 { 2451 /* LINKTRN_MICRO_UPDATE_CHG_LSTATUS:0:0 */ 2452 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(523, 0, 0) 2453 }; 2454 static uint32_t BCMI_BLACKHAWK_XGXS_LNKTRNUR_UC_STS1r_fields[] = 2455 { 2456 /* LINKTRN_MICRO_STATUS_CHG_LSTATUS:0:0 */ 2457 PHYMOD_SYMBOL_FIELD_ENCODE(519, 0, 0), 2458 /* LINKTRN_MICRO_FRAME_LOCK_LSTATUS:1:1 */ 2459 PHYMOD_SYMBOL_FIELD_ENCODE(515, 1, 1), 2460 /* LINKTRN_MICRO_FFLOCK_LSTATUS:2:2 */ 2461 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(513, 2, 2) 2462 }; 2463 static uint32_t BCMI_BLACKHAWK_XGXS_LNKTRNUT_CTL0r_fields[] = 2464 { 2465 /* LINKTRN_SW_RX_TRAINED:0:0 */ 2466 PHYMOD_SYMBOL_FIELD_ENCODE(559, 0, 0), 2467 /* LINKTRN_SW_FRAME_LOCK:1:1 */ 2468 PHYMOD_SYMBOL_FIELD_ENCODE(557, 1, 1), 2469 /* LINKTRN_SW_REMOTE_RX_READY:2:2 */ 2470 PHYMOD_SYMBOL_FIELD_ENCODE(558, 2, 2), 2471 /* LINKTRN_IGNORE_XMT_REG_VALUE:3:3 */ 2472 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(509, 3, 3) 2473 }; 2474 static uint32_t BCMI_BLACKHAWK_XGXS_LNKTRNUT_CTL1r_fields[] = 2475 { 2476 /* LINKTRN_BRK_RING_OSC:0:0 */ 2477 PHYMOD_SYMBOL_FIELD_ENCODE(488, 0, 0), 2478 /* LINKTRN_DIS_MAX_WAIT_TIMER:1:1 */ 2479 PHYMOD_SYMBOL_FIELD_ENCODE(490, 1, 1), 2480 /* LINKTRN_TX_DP_LN_CLK_EN:2:2 */ 2481 PHYMOD_SYMBOL_FIELD_ENCODE(563, 2, 2), 2482 /* LINKTRN_TIMER_VALUE_SEL:15:15 */ 2483 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(560, 15, 15) 2484 }; 2485 static uint32_t BCMI_BLACKHAWK_XGXS_LNKTRNUT_CTL2r_fields[] = 2486 { 2487 /* LINKTRN_PRBS_MODE_SEL:0:1 */ 2488 PHYMOD_SYMBOL_FIELD_ENCODE(535, 1, 0), 2489 /* LINKTRN_TX_TRN_MODE:4:4 */ 2490 PHYMOD_SYMBOL_FIELD_ENCODE(565, 4, 4), 2491 /* LINKTRN_TX_PAM4_TRN_FRAME_SIZE:5:5 */ 2492 PHYMOD_SYMBOL_FIELD_ENCODE(564, 5, 5), 2493 /* LINKTRN_PAM4M_SYM_SEL:6:6 */ 2494 PHYMOD_SYMBOL_FIELD_ENCODE(530, 6, 6), 2495 /* LINKTRN_PAM4M_PRECODER_EN:8:8 */ 2496 PHYMOD_SYMBOL_FIELD_ENCODE(529, 8, 8), 2497 /* LINKTRN_PAM4_SYMBOL_BIT_SWAP:9:9 */ 2498 PHYMOD_SYMBOL_FIELD_ENCODE(531, 9, 9), 2499 /* LINKTRN_PAM4M_GRAYCODER_EN_FRC_VAL:10:10 */ 2500 PHYMOD_SYMBOL_FIELD_ENCODE(527, 10, 10), 2501 /* LINKTRN_PAM4M_GRAYCODER_EN_FRC:11:11 */ 2502 PHYMOD_SYMBOL_FIELD_ENCODE(526, 11, 11), 2503 /* LINKTRN_PAM4M_PRBS_REPL_MODE:12:13 */ 2504 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(528, 13, 12) 2505 }; 2506 static uint32_t BCMI_BLACKHAWK_XGXS_LNKTRNUT_CTL3r_fields[] = 2507 { 2508 /* LINKTRN_PRBS13_SEED_VAL:0:12 */ 2509 PHYMOD_SYMBOL_FIELD_ENCODE(534, 12, 0), 2510 /* LINKTRN_PRBS13_POLY_SEL:14:15 */ 2511 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(533, 15, 14) 2512 }; 2513 static uint32_t BCMI_BLACKHAWK_XGXS_LNKTRNUT_CTL4r_fields[] = 2514 { 2515 /* LINKTRN_PRBS_SEED_VAL:0:10 */ 2516 PHYMOD_SYMBOL_FIELD_ENCODE(537, 10, 0), 2517 /* LINKTRN_CL93PRBS_POLY_SEL:11:12 */ 2518 PHYMOD_SYMBOL_FIELD_ENCODE(489, 12, 11), 2519 /* LINKTRN_PRBS_SEED_SEL:14:15 */ 2520 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(536, 15, 14) 2521 }; 2522 static uint32_t BCMI_BLACKHAWK_XGXS_LNKTRNUT_LD_XMT_STS_PAGEr_fields[] = 2523 { 2524 /* LINKTRN_LD_XMT_STATUS_PAGE:0:15 */ 2525 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(510, 15, 0) 2526 }; 2527 static uint32_t BCMI_BLACKHAWK_XGXS_LNKTRNUT_STS0r_fields[] = 2528 { 2529 /* LINKTRN_LOCAL_RX_READY:0:0 */ 2530 PHYMOD_SYMBOL_FIELD_ENCODE(511, 0, 0), 2531 /* LINKTRN_TRAINING_FSM_SIGNAL_DETECT:1:1 */ 2532 PHYMOD_SYMBOL_FIELD_ENCODE(561, 1, 1), 2533 /* LINKTRN_XMT_COEFF_UPDATE_PARITY:4:4 */ 2534 PHYMOD_SYMBOL_FIELD_ENCODE(567, 4, 4), 2535 /* LINKTRN_XMT_STATUS_REPORT_PARITY:5:5 */ 2536 PHYMOD_SYMBOL_FIELD_ENCODE(568, 5, 5), 2537 /* LINKTRN_SM_CURRENT_STATE:12:14 */ 2538 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(554, 14, 12) 2539 }; 2540 static uint32_t BCMI_BLACKHAWK_XGXS_LNKTRNUT_XMT_UPD_PAGEr_fields[] = 2541 { 2542 /* LINKTRN_XMT_UPDATE_PAGE:0:15 */ 2543 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(569, 15, 0) 2544 }; 2545 static uint32_t BCMI_BLACKHAWK_XGXS_LN_ADDR0r_fields[] = 2546 { 2547 /* RX_LANE_ADDR_0:0:4 */ 2548 PHYMOD_SYMBOL_FIELD_ENCODE(1157, 4, 0), 2549 /* TX_LANE_ADDR_0:8:12 */ 2550 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1393, 12, 8) 2551 }; 2552 static uint32_t BCMI_BLACKHAWK_XGXS_LN_ADDR1r_fields[] = 2553 { 2554 /* RX_LANE_ADDR_1:0:4 */ 2555 PHYMOD_SYMBOL_FIELD_ENCODE(1158, 4, 0), 2556 /* TX_LANE_ADDR_1:8:12 */ 2557 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1394, 12, 8) 2558 }; 2559 static uint32_t BCMI_BLACKHAWK_XGXS_LN_ADDR2r_fields[] = 2560 { 2561 /* RX_LANE_ADDR_2:0:4 */ 2562 PHYMOD_SYMBOL_FIELD_ENCODE(1159, 4, 0), 2563 /* TX_LANE_ADDR_2:8:12 */ 2564 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1395, 12, 8) 2565 }; 2566 static uint32_t BCMI_BLACKHAWK_XGXS_LN_ADDR3r_fields[] = 2567 { 2568 /* RX_LANE_ADDR_3:0:4 */ 2569 PHYMOD_SYMBOL_FIELD_ENCODE(1160, 4, 0), 2570 /* TX_LANE_ADDR_3:8:12 */ 2571 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1396, 12, 8) 2572 }; 2573 static uint32_t BCMI_BLACKHAWK_XGXS_LN_ADDR4r_fields[] = 2574 { 2575 /* RX_LANE_ADDR_4:0:4 */ 2576 PHYMOD_SYMBOL_FIELD_ENCODE(1161, 4, 0), 2577 /* TX_LANE_ADDR_4:8:12 */ 2578 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1397, 12, 8) 2579 }; 2580 static uint32_t BCMI_BLACKHAWK_XGXS_LN_ADDR5r_fields[] = 2581 { 2582 /* RX_LANE_ADDR_5:0:4 */ 2583 PHYMOD_SYMBOL_FIELD_ENCODE(1162, 4, 0), 2584 /* TX_LANE_ADDR_5:8:12 */ 2585 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1398, 12, 8) 2586 }; 2587 static uint32_t BCMI_BLACKHAWK_XGXS_LN_ADDR6r_fields[] = 2588 { 2589 /* RX_LANE_ADDR_6:0:4 */ 2590 PHYMOD_SYMBOL_FIELD_ENCODE(1163, 4, 0), 2591 /* TX_LANE_ADDR_6:8:12 */ 2592 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1399, 12, 8) 2593 }; 2594 static uint32_t BCMI_BLACKHAWK_XGXS_LN_ADDR7r_fields[] = 2595 { 2596 /* RX_LANE_ADDR_7:0:4 */ 2597 PHYMOD_SYMBOL_FIELD_ENCODE(1164, 4, 0), 2598 /* TX_LANE_ADDR_7:8:12 */ 2599 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1400, 12, 8) 2600 }; 2601 static uint32_t BCMI_BLACKHAWK_XGXS_LN_CFG_FWAPI_DATA0r_fields[] = 2602 { 2603 /* LANE_CFG_FWAPI_DATA0:0:15 */ 2604 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(479, 15, 0) 2605 }; 2606 static uint32_t BCMI_BLACKHAWK_XGXS_LN_CFG_FWAPI_DATA1r_fields[] = 2607 { 2608 /* LANE_CFG_FWAPI_DATA1:0:15 */ 2609 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(480, 15, 0) 2610 }; 2611 static uint32_t BCMI_BLACKHAWK_XGXS_MDIO_AERr_fields[] = 2612 { 2613 /* MDIO_AER:0:10 */ 2614 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(610, 10, 0) 2615 }; 2616 static uint32_t BCMI_BLACKHAWK_XGXS_MDIO_BCST_PORT_ADDRr_fields[] = 2617 { 2618 /* MDIO_BRCST_PORT_ADDR:0:4 */ 2619 PHYMOD_SYMBOL_FIELD_ENCODE(611, 4, 0), 2620 /* MDIO_DRV_COMCLK:15:15 */ 2621 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(618, 15, 15) 2622 }; 2623 static uint32_t BCMI_BLACKHAWK_XGXS_MDIO_MMD_SELr_fields[] = 2624 { 2625 /* MDIO_DEV_ID0_EN:0:0 */ 2626 PHYMOD_SYMBOL_FIELD_ENCODE(614, 0, 0), 2627 /* MDIO_DEV_PMD_EN:2:2 */ 2628 PHYMOD_SYMBOL_FIELD_ENCODE(617, 2, 2), 2629 /* MDIO_DEV_AN_EN:3:3 */ 2630 PHYMOD_SYMBOL_FIELD_ENCODE(612, 3, 3), 2631 /* MDIO_DEV_PHY_EN:4:4 */ 2632 PHYMOD_SYMBOL_FIELD_ENCODE(616, 4, 4), 2633 /* MDIO_DEV_DTE_EN:5:5 */ 2634 PHYMOD_SYMBOL_FIELD_ENCODE(613, 5, 5), 2635 /* MDIO_DEV_PCS_EN:6:6 */ 2636 PHYMOD_SYMBOL_FIELD_ENCODE(615, 6, 6), 2637 /* MDIO_MULTI_MMDS_EN:14:14 */ 2638 PHYMOD_SYMBOL_FIELD_ENCODE(621, 14, 14), 2639 /* MDIO_MULTI_PRTS_EN:15:15 */ 2640 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(622, 15, 15) 2641 }; 2642 static uint32_t BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ0r_fields[] = 2643 { 2644 /* PATT_GEN_SEQ_0:0:15 */ 2645 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(795, 15, 0) 2646 }; 2647 static uint32_t BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ1r_fields[] = 2648 { 2649 /* PATT_GEN_SEQ_1:0:15 */ 2650 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(796, 15, 0) 2651 }; 2652 static uint32_t BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ2r_fields[] = 2653 { 2654 /* PATT_GEN_SEQ_2:0:15 */ 2655 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(802, 15, 0) 2656 }; 2657 static uint32_t BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ3r_fields[] = 2658 { 2659 /* PATT_GEN_SEQ_3:0:15 */ 2660 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(803, 15, 0) 2661 }; 2662 static uint32_t BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ4r_fields[] = 2663 { 2664 /* PATT_GEN_SEQ_4:0:15 */ 2665 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(804, 15, 0) 2666 }; 2667 static uint32_t BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ5r_fields[] = 2668 { 2669 /* PATT_GEN_SEQ_5:0:15 */ 2670 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(805, 15, 0) 2671 }; 2672 static uint32_t BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ6r_fields[] = 2673 { 2674 /* PATT_GEN_SEQ_6:0:15 */ 2675 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(806, 15, 0) 2676 }; 2677 static uint32_t BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ7r_fields[] = 2678 { 2679 /* PATT_GEN_SEQ_7:0:15 */ 2680 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(807, 15, 0) 2681 }; 2682 static uint32_t BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ8r_fields[] = 2683 { 2684 /* PATT_GEN_SEQ_8:0:15 */ 2685 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(808, 15, 0) 2686 }; 2687 static uint32_t BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ9r_fields[] = 2688 { 2689 /* PATT_GEN_SEQ_9:0:15 */ 2690 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(809, 15, 0) 2691 }; 2692 static uint32_t BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ_10r_fields[] = 2693 { 2694 /* PATT_GEN_SEQ_10:0:15 */ 2695 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(797, 15, 0) 2696 }; 2697 static uint32_t BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ_11r_fields[] = 2698 { 2699 /* PATT_GEN_SEQ_11:0:15 */ 2700 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(798, 15, 0) 2701 }; 2702 static uint32_t BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ_12r_fields[] = 2703 { 2704 /* PATT_GEN_SEQ_12:0:15 */ 2705 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(799, 15, 0) 2706 }; 2707 static uint32_t BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ_13r_fields[] = 2708 { 2709 /* PATT_GEN_SEQ_13:0:15 */ 2710 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(800, 15, 0) 2711 }; 2712 static uint32_t BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ_14r_fields[] = 2713 { 2714 /* PATT_GEN_SEQ_14:0:15 */ 2715 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(801, 15, 0) 2716 }; 2717 static uint32_t BCMI_BLACKHAWK_XGXS_PLL_CAL_CTL0r_fields[] = 2718 { 2719 /* VCO_STEP_TIME:0:7 */ 2720 PHYMOD_SYMBOL_FIELD_ENCODE(1502, 7, 0), 2721 /* VCO_START_TIME:8:15 */ 2722 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1501, 15, 8) 2723 }; 2724 static uint32_t BCMI_BLACKHAWK_XGXS_PLL_CAL_CTL1r_fields[] = 2725 { 2726 /* RETRY_TIME:0:7 */ 2727 PHYMOD_SYMBOL_FIELD_ENCODE(920, 7, 0), 2728 /* PRE_FREQ_DET_TIME:8:15 */ 2729 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(905, 15, 8) 2730 }; 2731 static uint32_t BCMI_BLACKHAWK_XGXS_PLL_CAL_CTL2r_fields[] = 2732 { 2733 /* WIN_CAL_CNTR:0:7 */ 2734 PHYMOD_SYMBOL_FIELD_ENCODE(1503, 7, 0), 2735 /* RES_CAL_CNTR:8:15 */ 2736 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(919, 15, 8) 2737 }; 2738 static uint32_t BCMI_BLACKHAWK_XGXS_PLL_CAL_CTL3r_fields[] = 2739 { 2740 /* FAST_SEARCH_MODE:0:0 */ 2741 PHYMOD_SYMBOL_FIELD_ENCODE(458, 0, 0), 2742 /* CAP_CNT_MASK_EN:1:1 */ 2743 PHYMOD_SYMBOL_FIELD_ENCODE(312, 1, 1), 2744 /* CAP_SEQ_CYA:2:2 */ 2745 PHYMOD_SYMBOL_FIELD_ENCODE(324, 2, 2), 2746 /* CAP_RESTART:3:3 */ 2747 PHYMOD_SYMBOL_FIELD_ENCODE(319, 3, 3), 2748 /* CAP_RETRY_EN:4:4 */ 2749 PHYMOD_SYMBOL_FIELD_ENCODE(320, 4, 4), 2750 /* CAP_FORCE_SLOWDOWN:5:5 */ 2751 PHYMOD_SYMBOL_FIELD_ENCODE(315, 5, 5), 2752 /* CAP_FORCE_SLOWDOWN_EN:6:6 */ 2753 PHYMOD_SYMBOL_FIELD_ENCODE(316, 6, 6), 2754 /* CAP_SELECT_M_EN:7:7 */ 2755 PHYMOD_SYMBOL_FIELD_ENCODE(323, 7, 7), 2756 /* CAP_SELECT_M:8:15 */ 2757 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(322, 15, 8) 2758 }; 2759 static uint32_t BCMI_BLACKHAWK_XGXS_PLL_CAL_CTL4r_fields[] = 2760 { 2761 /* PLL_LOCK_FRC_VAL:0:0 */ 2762 PHYMOD_SYMBOL_FIELD_ENCODE(827, 0, 0), 2763 /* PLL_LOCK_FRC:1:1 */ 2764 PHYMOD_SYMBOL_FIELD_ENCODE(826, 1, 1), 2765 /* PLL_FORCE_CAP_PASS:2:2 */ 2766 PHYMOD_SYMBOL_FIELD_ENCODE(820, 2, 2), 2767 /* PLL_FORCE_CAP_PASS_EN:3:3 */ 2768 PHYMOD_SYMBOL_FIELD_ENCODE(821, 3, 3), 2769 /* PLL_FORCE_CAP_DONE:4:4 */ 2770 PHYMOD_SYMBOL_FIELD_ENCODE(818, 4, 4), 2771 /* PLL_FORCE_CAP_DONE_EN:5:5 */ 2772 PHYMOD_SYMBOL_FIELD_ENCODE(819, 5, 5), 2773 /* PLL_FORCE_FPASS:6:6 */ 2774 PHYMOD_SYMBOL_FIELD_ENCODE(824, 6, 6), 2775 /* PLL_FORCE_FDONE:7:7 */ 2776 PHYMOD_SYMBOL_FIELD_ENCODE(822, 7, 7), 2777 /* PLL_FORCE_FDONE_EN:8:8 */ 2778 PHYMOD_SYMBOL_FIELD_ENCODE(823, 8, 8), 2779 /* VCO_RST_EN:9:9 */ 2780 PHYMOD_SYMBOL_FIELD_ENCODE(1500, 9, 9), 2781 /* SLOWDN_XOR:10:10 */ 2782 PHYMOD_SYMBOL_FIELD_ENCODE(1248, 10, 10), 2783 /* FREQ_MONITOR_EN:11:11 */ 2784 PHYMOD_SYMBOL_FIELD_ENCODE(463, 11, 11), 2785 /* FREQ_DET_RESTART_EN:12:12 */ 2786 PHYMOD_SYMBOL_FIELD_ENCODE(459, 12, 12), 2787 /* FREQ_DET_RETRY_EN:13:13 */ 2788 PHYMOD_SYMBOL_FIELD_ENCODE(460, 13, 13), 2789 /* VCO_DONE_EN:14:14 */ 2790 PHYMOD_SYMBOL_FIELD_ENCODE(1497, 14, 14), 2791 /* PLL_SEQ_START:15:15 */ 2792 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(836, 15, 15) 2793 }; 2794 static uint32_t BCMI_BLACKHAWK_XGXS_PLL_CAL_CTL5r_fields[] = 2795 { 2796 /* REFCLK_DIVCNT:0:13 */ 2797 PHYMOD_SYMBOL_FIELD_ENCODE(907, 13, 0), 2798 /* DEC_SEARCH_EN:15:15 */ 2799 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(419, 15, 15) 2800 }; 2801 static uint32_t BCMI_BLACKHAWK_XGXS_PLL_CAL_CTL6r_fields[] = 2802 { 2803 /* REFCLK_DIVCNT_SEL:0:2 */ 2804 PHYMOD_SYMBOL_FIELD_ENCODE(908, 2, 0), 2805 /* VCO_RANGE_ADJUST:8:13 */ 2806 PHYMOD_SYMBOL_FIELD_ENCODE(1498, 13, 8), 2807 /* VCO_RANGE_ADJUST_EN:15:15 */ 2808 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1499, 15, 15) 2809 }; 2810 static uint32_t BCMI_BLACKHAWK_XGXS_PLL_CAL_CTL7r_fields[] = 2811 { 2812 /* PLL_MODE:0:4 */ 2813 PHYMOD_SYMBOL_FIELD_ENCODE(829, 4, 0), 2814 /* RESCAL_FRC_VAL:6:9 */ 2815 PHYMOD_SYMBOL_FIELD_ENCODE(914, 9, 6), 2816 /* RESCAL_FRC:10:10 */ 2817 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(913, 10, 10) 2818 }; 2819 static uint32_t BCMI_BLACKHAWK_XGXS_PLL_CAL_CTL_STS0r_fields[] = 2820 { 2821 /* PLL_LOCK_LH_LL:0:0 */ 2822 PHYMOD_SYMBOL_FIELD_ENCODE(828, 0, 0), 2823 /* PLL_SEQ_PASS_LH_LL:1:1 */ 2824 PHYMOD_SYMBOL_FIELD_ENCODE(835, 1, 1), 2825 /* PLL_SEQ_DONE_LH_LL:2:2 */ 2826 PHYMOD_SYMBOL_FIELD_ENCODE(833, 2, 2), 2827 /* FREQ_PASS_SM_LH_LL:3:3 */ 2828 PHYMOD_SYMBOL_FIELD_ENCODE(465, 3, 3), 2829 /* FREQ_DONE_SM_LH_LL:4:4 */ 2830 PHYMOD_SYMBOL_FIELD_ENCODE(462, 4, 4), 2831 /* CAP_PASS_LH_LL:5:5 */ 2832 PHYMOD_SYMBOL_FIELD_ENCODE(318, 5, 5), 2833 /* CAP_DONE_LH_LL:6:6 */ 2834 PHYMOD_SYMBOL_FIELD_ENCODE(314, 6, 6), 2835 /* PLL_LOCK:8:8 */ 2836 PHYMOD_SYMBOL_FIELD_ENCODE(825, 8, 8), 2837 /* PLL_SEQ_PASS:9:9 */ 2838 PHYMOD_SYMBOL_FIELD_ENCODE(834, 9, 9), 2839 /* PLL_SEQ_DONE:10:10 */ 2840 PHYMOD_SYMBOL_FIELD_ENCODE(832, 10, 10), 2841 /* FREQ_PASS_SM:11:11 */ 2842 PHYMOD_SYMBOL_FIELD_ENCODE(464, 11, 11), 2843 /* FREQ_DONE_SM:12:12 */ 2844 PHYMOD_SYMBOL_FIELD_ENCODE(461, 12, 12), 2845 /* CAP_PASS:13:13 */ 2846 PHYMOD_SYMBOL_FIELD_ENCODE(317, 13, 13), 2847 /* CAP_DONE:14:14 */ 2848 PHYMOD_SYMBOL_FIELD_ENCODE(313, 14, 14), 2849 /* LOST_PLL_LOCK_SM:15:15 */ 2850 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(604, 15, 15) 2851 }; 2852 static uint32_t BCMI_BLACKHAWK_XGXS_PLL_CAL_CTL_STS1r_fields[] = 2853 { 2854 /* CAP_SELECT:0:7 */ 2855 PHYMOD_SYMBOL_FIELD_ENCODE(321, 7, 0), 2856 /* RESCAL_IN:8:11 */ 2857 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(915, 11, 8) 2858 }; 2859 static uint32_t BCMI_BLACKHAWK_XGXS_PLL_CAL_CTL_STS_DBGr_fields[] = 2860 { 2861 /* DBG_SLOWDN:0:0 */ 2862 PHYMOD_SYMBOL_FIELD_ENCODE(403, 0, 0), 2863 /* DBG_SLOWDN_CHANGE:1:1 */ 2864 PHYMOD_SYMBOL_FIELD_ENCODE(404, 1, 1), 2865 /* DBG_FDBCK:2:2 */ 2866 PHYMOD_SYMBOL_FIELD_ENCODE(398, 2, 2), 2867 /* DBG_CAP_STATE_ONE_HOT:3:7 */ 2868 PHYMOD_SYMBOL_FIELD_ENCODE(397, 7, 3), 2869 /* DBG_PLL_STATE_ONE_HOT:8:15 */ 2870 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(400, 15, 8) 2871 }; 2872 static uint32_t BCMI_BLACKHAWK_XGXS_RXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr_fields[] = 2873 { 2874 /* RX_OSR_MODE_PIN:0:3 */ 2875 PHYMOD_SYMBOL_FIELD_ENCODE(1175, 3, 0), 2876 /* RX_PAM4_MODE_PIN:4:6 */ 2877 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1181, 6, 4) 2878 }; 2879 static uint32_t BCMI_BLACKHAWK_XGXS_RXCOM_LN_CLK_RST_N_PWRDWN_CTLr_fields[] = 2880 { 2881 /* RX_LN_DP_S_RSTB:0:0 */ 2882 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1167, 0, 0) 2883 }; 2884 static uint32_t BCMI_BLACKHAWK_XGXS_RXCOM_LN_DP_RST_ST_STSr_fields[] = 2885 { 2886 /* RX_LANE_DP_RESET_STATE:0:2 */ 2887 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1165, 2, 0) 2888 }; 2889 static uint32_t BCMI_BLACKHAWK_XGXS_RXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields[] = 2890 { 2891 /* PMD_LN_RX_H_RSTB_PKILL:0:0 */ 2892 PHYMOD_SYMBOL_FIELD_ENCODE(843, 0, 0), 2893 /* PMD_LN_RX_DP_H_RSTB_PKILL:1:1 */ 2894 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(841, 1, 1) 2895 }; 2896 static uint32_t BCMI_BLACKHAWK_XGXS_RXCOM_LN_RST_OCC_CTLr_fields[] = 2897 { 2898 /* RX_LANE_REG_RESET_OCCURRED:0:0 */ 2899 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1166, 0, 0) 2900 }; 2901 static uint32_t BCMI_BLACKHAWK_XGXS_RXCOM_LN_S_RSTB_CTLr_fields[] = 2902 { 2903 /* RX_LN_S_RSTB:0:0 */ 2904 PHYMOD_SYMBOL_FIELD_ENCODE(1168, 0, 0), 2905 /* RX_HW_FW_HANDSHAKE_DISABLE:1:1 */ 2906 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1156, 1, 1) 2907 }; 2908 static uint32_t BCMI_BLACKHAWK_XGXS_RXCOM_MCST_MASK_CTLr_fields[] = 2909 { 2910 /* RX_MULTICAST_MASK_CONTROL:0:0 */ 2911 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1169, 0, 0) 2912 }; 2913 static uint32_t BCMI_BLACKHAWK_XGXS_RXCOM_OSR_MODE_CTLr_fields[] = 2914 { 2915 /* RX_OSR_MODE_FRC_VAL:0:3 */ 2916 PHYMOD_SYMBOL_FIELD_ENCODE(1174, 3, 0), 2917 /* RX_PAM4_MODE_FRC_VAL:4:6 */ 2918 PHYMOD_SYMBOL_FIELD_ENCODE(1180, 6, 4), 2919 /* RX_PAM4_MODE_FRC:14:14 */ 2920 PHYMOD_SYMBOL_FIELD_ENCODE(1179, 14, 14), 2921 /* RX_OSR_MODE_FRC:15:15 */ 2922 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1173, 15, 15) 2923 }; 2924 static uint32_t BCMI_BLACKHAWK_XGXS_RXCOM_OSR_MODE_STS_MC_MASKr_fields[] = 2925 { 2926 /* RX_OSR_MODE:0:3 */ 2927 PHYMOD_SYMBOL_FIELD_ENCODE(1172, 3, 0), 2928 /* RX_PAM4_MODE:4:6 */ 2929 PHYMOD_SYMBOL_FIELD_ENCODE(1178, 6, 4), 2930 /* RX_MULTICAST_MASK_CONTROL_STATUS:15:15 */ 2931 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1170, 15, 15) 2932 }; 2933 static uint32_t BCMI_BLACKHAWK_XGXS_RXCOM_PLL_SEL_CTLr_fields[] = 2934 { 2935 /* RX_PLL_SELECT:0:0 */ 2936 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1226, 0, 0) 2937 }; 2938 static uint32_t BCMI_BLACKHAWK_XGXS_RXCOM_UC_ACK_LN_CTLr_fields[] = 2939 { 2940 /* RX_UC_ACK_LANE_CFG_DONE:0:0 */ 2941 PHYMOD_SYMBOL_FIELD_ENCODE(1232, 0, 0), 2942 /* RX_UC_ACK_LANE_DP_RESET:1:1 */ 2943 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1233, 1, 1) 2944 }; 2945 static uint32_t BCMI_BLACKHAWK_XGXS_RXTXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr_fields[] = 2946 { 2947 /* OSR_MODE_PIN:0:3 */ 2948 PHYMOD_SYMBOL_FIELD_ENCODE(778, 3, 0), 2949 /* PAM4_MODE_PIN:4:6 */ 2950 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(788, 6, 4) 2951 }; 2952 static uint32_t BCMI_BLACKHAWK_XGXS_RXTXCOM_LN_CLK_RST_N_PWRDWN_CTLr_fields[] = 2953 { 2954 /* LN_DP_S_RSTB:0:0 */ 2955 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(590, 0, 0) 2956 }; 2957 static uint32_t BCMI_BLACKHAWK_XGXS_RXTXCOM_LN_DP_RST_ST_STSr_fields[] = 2958 { 2959 /* LANE_DP_RESET_STATE:0:2 */ 2960 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(481, 2, 0) 2961 }; 2962 static uint32_t BCMI_BLACKHAWK_XGXS_RXTXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields[] = 2963 { 2964 /* PMD_LN_H_RSTB_PKILL:0:0 */ 2965 PHYMOD_SYMBOL_FIELD_ENCODE(840, 0, 0), 2966 /* PMD_LN_DP_H_RSTB_PKILL:1:1 */ 2967 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(839, 1, 1) 2968 }; 2969 static uint32_t BCMI_BLACKHAWK_XGXS_RXTXCOM_LN_RST_OCC_CTLr_fields[] = 2970 { 2971 /* LANE_REG_RESET_OCCURRED:0:0 */ 2972 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(482, 0, 0) 2973 }; 2974 static uint32_t BCMI_BLACKHAWK_XGXS_RXTXCOM_LN_S_RSTB_CTLr_fields[] = 2975 { 2976 /* LN_S_RSTB:0:0 */ 2977 PHYMOD_SYMBOL_FIELD_ENCODE(597, 0, 0), 2978 /* HW_FW_HANDSHAKE_DISABLE:1:1 */ 2979 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(474, 1, 1) 2980 }; 2981 static uint32_t BCMI_BLACKHAWK_XGXS_RXTXCOM_MCST_MASK_CTLr_fields[] = 2982 { 2983 /* MULTICAST_MASK_CONTROL:0:0 */ 2984 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(773, 0, 0) 2985 }; 2986 static uint32_t BCMI_BLACKHAWK_XGXS_RXTXCOM_OSR_MODE_CTLr_fields[] = 2987 { 2988 /* OSR_MODE_FRC_VAL:0:3 */ 2989 PHYMOD_SYMBOL_FIELD_ENCODE(777, 3, 0), 2990 /* PAM4_MODE_FRC_VAL:4:6 */ 2991 PHYMOD_SYMBOL_FIELD_ENCODE(787, 6, 4), 2992 /* PAM4_MODE_FRC:14:14 */ 2993 PHYMOD_SYMBOL_FIELD_ENCODE(786, 14, 14), 2994 /* OSR_MODE_FRC:15:15 */ 2995 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(776, 15, 15) 2996 }; 2997 static uint32_t BCMI_BLACKHAWK_XGXS_RXTXCOM_OSR_MODE_STS_MC_MASKr_fields[] = 2998 { 2999 /* OSR_MODE:0:3 */ 3000 PHYMOD_SYMBOL_FIELD_ENCODE(775, 3, 0), 3001 /* PAM4_MODE:4:6 */ 3002 PHYMOD_SYMBOL_FIELD_ENCODE(785, 6, 4), 3003 /* MULTICAST_MASK_CONTROL_STATUS:15:15 */ 3004 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(774, 15, 15) 3005 }; 3006 static uint32_t BCMI_BLACKHAWK_XGXS_RXTXCOM_PLL_SEL_CTLr_fields[] = 3007 { 3008 /* PLL_SELECT:0:0 */ 3009 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(831, 0, 0) 3010 }; 3011 static uint32_t BCMI_BLACKHAWK_XGXS_RXTXCOM_UC_ACK_LN_CTLr_fields[] = 3012 { 3013 /* UC_ACK_LANE_CFG_DONE:0:0 */ 3014 PHYMOD_SYMBOL_FIELD_ENCODE(1477, 0, 0), 3015 /* UC_ACK_LANE_DP_RESET:1:1 */ 3016 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1478, 1, 1) 3017 }; 3018 static uint32_t BCMI_BLACKHAWK_XGXS_RX_AFE_RST_PWRDN_OSR_MODE_PIN_STSr_fields[] = 3019 { 3020 /* AFE_RX_PWRDN:0:0 */ 3021 PHYMOD_SYMBOL_FIELD_ENCODE(2, 0, 0), 3022 /* AFE_RX_RESET:1:1 */ 3023 PHYMOD_SYMBOL_FIELD_ENCODE(8, 1, 1), 3024 /* AFE_RX_RCLK20_PWRDN:2:2 */ 3025 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(5, 2, 2) 3026 }; 3027 static uint32_t BCMI_BLACKHAWK_XGXS_RX_CLK_N_RST_DBG_CTLr_fields[] = 3028 { 3029 /* LN_RX_S_CLKGATE_FRC_ON:0:0 */ 3030 PHYMOD_SYMBOL_FIELD_ENCODE(592, 0, 0), 3031 /* LN_RX_S_COMCLK_SEL:1:1 */ 3032 PHYMOD_SYMBOL_FIELD_ENCODE(594, 1, 1), 3033 /* LN_RX_S_COMCLK_FRC_ON:2:2 */ 3034 PHYMOD_SYMBOL_FIELD_ENCODE(593, 2, 2), 3035 /* PMD_RX_CLK_VLD_FRC:3:3 */ 3036 PHYMOD_SYMBOL_FIELD_ENCODE(848, 3, 3), 3037 /* PMD_RX_CLK_VLD_FRC_VAL:4:4 */ 3038 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(849, 4, 4) 3039 }; 3040 static uint32_t BCMI_BLACKHAWK_XGXS_RX_LN_AFE_RST_PWRDWN_CTL_CTLr_fields[] = 3041 { 3042 /* AFE_RX_PWRDN_FRC:0:0 */ 3043 PHYMOD_SYMBOL_FIELD_ENCODE(3, 0, 0), 3044 /* AFE_RX_PWRDN_FRC_VAL:1:1 */ 3045 PHYMOD_SYMBOL_FIELD_ENCODE(4, 1, 1), 3046 /* AFE_RX_RESET_FRC:2:2 */ 3047 PHYMOD_SYMBOL_FIELD_ENCODE(9, 2, 2), 3048 /* AFE_RX_RESET_FRC_VAL:3:3 */ 3049 PHYMOD_SYMBOL_FIELD_ENCODE(10, 3, 3), 3050 /* AFE_RX_RCLK20_PWRDN_FRC:4:4 */ 3051 PHYMOD_SYMBOL_FIELD_ENCODE(6, 4, 4), 3052 /* AFE_RX_RCLK20_PWRDN_FRC_VAL:5:5 */ 3053 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(7, 5, 5) 3054 }; 3055 static uint32_t BCMI_BLACKHAWK_XGXS_RX_LN_CLK_RST_N_PWRDWN_CTLr_fields[] = 3056 { 3057 /* LN_RX_S_PWRDN:0:0 */ 3058 PHYMOD_SYMBOL_FIELD_ENCODE(595, 0, 0), 3059 /* AFE_SIGDET_PWRDN:1:1 */ 3060 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(13, 1, 1) 3061 }; 3062 static uint32_t BCMI_BLACKHAWK_XGXS_RX_LN_DBG_RST_CTLr_fields[] = 3063 { 3064 /* LN_RX_S_RSTB:0:0 */ 3065 PHYMOD_SYMBOL_FIELD_ENCODE(596, 0, 0), 3066 /* LN_RX_DP_S_RSTB:1:1 */ 3067 PHYMOD_SYMBOL_FIELD_ENCODE(591, 1, 1), 3068 /* SIGDET_DP_RSTB_EN:2:2 */ 3069 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1238, 2, 2) 3070 }; 3071 static uint32_t BCMI_BLACKHAWK_XGXS_RX_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields[] = 3072 { 3073 /* PMD_LN_RX_H_PWRDN_PKILL:0:0 */ 3074 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(842, 0, 0) 3075 }; 3076 static uint32_t BCMI_BLACKHAWK_XGXS_RX_PMD_LN_MODE_STSr_fields[] = 3077 { 3078 /* PMD_RX_LANE_MODE:0:15 */ 3079 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(850, 15, 0) 3080 }; 3081 static uint32_t BCMI_BLACKHAWK_XGXS_SIGDET_CTL0r_fields[] = 3082 { 3083 /* SIGNAL_DETECT_FILTER_COUNT:0:4 */ 3084 PHYMOD_SYMBOL_FIELD_ENCODE(1242, 4, 0), 3085 /* LOS_FILTER_COUNT:8:12 */ 3086 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(605, 12, 8) 3087 }; 3088 static uint32_t BCMI_BLACKHAWK_XGXS_SIGDET_CTL1r_fields[] = 3089 { 3090 /* AFE_SIGNAL_DETECT_DIS:0:0 */ 3091 PHYMOD_SYMBOL_FIELD_ENCODE(15, 0, 0), 3092 /* EXT_LOS_EN:1:1 */ 3093 PHYMOD_SYMBOL_FIELD_ENCODE(454, 1, 1), 3094 /* EXT_LOS_INV:2:2 */ 3095 PHYMOD_SYMBOL_FIELD_ENCODE(455, 2, 2), 3096 /* IGNORE_LP_MODE:3:3 */ 3097 PHYMOD_SYMBOL_FIELD_ENCODE(477, 3, 3), 3098 /* SIGNAL_DETECT_FILTER_1US:4:4 */ 3099 PHYMOD_SYMBOL_FIELD_ENCODE(1241, 4, 4), 3100 /* ENERGY_DETECT_FRC:5:5 */ 3101 PHYMOD_SYMBOL_FIELD_ENCODE(451, 5, 5), 3102 /* ENERGY_DETECT_FRC_VAL:6:6 */ 3103 PHYMOD_SYMBOL_FIELD_ENCODE(452, 6, 6), 3104 /* SIGNAL_DETECT_FRC:7:7 */ 3105 PHYMOD_SYMBOL_FIELD_ENCODE(1243, 7, 7), 3106 /* SIGNAL_DETECT_FRC_VAL:8:8 */ 3107 PHYMOD_SYMBOL_FIELD_ENCODE(1244, 8, 8), 3108 /* ENERGY_DETECT_MASK_COUNT:11:15 */ 3109 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(453, 15, 11) 3110 }; 3111 static uint32_t BCMI_BLACKHAWK_XGXS_SIGDET_CTL2r_fields[] = 3112 { 3113 /* LOS_THRESH:0:2 */ 3114 PHYMOD_SYMBOL_FIELD_ENCODE(606, 2, 0), 3115 /* SIGNAL_DETECT_THRESH:4:6 */ 3116 PHYMOD_SYMBOL_FIELD_ENCODE(1247, 6, 4), 3117 /* HOLD_LOS_COUNT:8:10 */ 3118 PHYMOD_SYMBOL_FIELD_ENCODE(472, 10, 8), 3119 /* HOLD_SD_COUNT:11:13 */ 3120 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(473, 13, 11) 3121 }; 3122 static uint32_t BCMI_BLACKHAWK_XGXS_SIGDET_STS0r_fields[] = 3123 { 3124 /* SIGNAL_DETECT:0:0 */ 3125 PHYMOD_SYMBOL_FIELD_ENCODE(1239, 0, 0), 3126 /* SIGNAL_DETECT_CHANGE:1:1 */ 3127 PHYMOD_SYMBOL_FIELD_ENCODE(1240, 1, 1), 3128 /* SIGNAL_DETECT_RAW:4:4 */ 3129 PHYMOD_SYMBOL_FIELD_ENCODE(1245, 4, 4), 3130 /* SIGNAL_DETECT_RAW_CHANGE:5:5 */ 3131 PHYMOD_SYMBOL_FIELD_ENCODE(1246, 5, 5), 3132 /* EXT_SIGDET:6:6 */ 3133 PHYMOD_SYMBOL_FIELD_ENCODE(456, 6, 6), 3134 /* EXT_SIGDET_CHANGE:7:7 */ 3135 PHYMOD_SYMBOL_FIELD_ENCODE(457, 7, 7), 3136 /* AFE_SIGDET:8:8 */ 3137 PHYMOD_SYMBOL_FIELD_ENCODE(11, 8, 8), 3138 /* AFE_SIGDET_CHANGE:9:9 */ 3139 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(12, 9, 9) 3140 }; 3141 static uint32_t BCMI_BLACKHAWK_XGXS_SIGDET_STS1r_fields[] = 3142 { 3143 /* UC_SIGNAL_DETECT:0:0 */ 3144 PHYMOD_SYMBOL_FIELD_ENCODE(1491, 0, 0), 3145 /* UC_SIGNAL_DETECT_CHANGE:1:1 */ 3146 PHYMOD_SYMBOL_FIELD_ENCODE(1492, 1, 1), 3147 /* UC_EXT_SIGDET:6:6 */ 3148 PHYMOD_SYMBOL_FIELD_ENCODE(1487, 6, 6), 3149 /* UC_EXT_SIGDET_CHANGE:7:7 */ 3150 PHYMOD_SYMBOL_FIELD_ENCODE(1488, 7, 7), 3151 /* UC_AFE_SIGDET:8:8 */ 3152 PHYMOD_SYMBOL_FIELD_ENCODE(1480, 8, 8), 3153 /* UC_AFE_SIGDET_CHANGE:9:9 */ 3154 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1481, 9, 9) 3155 }; 3156 static uint32_t BCMI_BLACKHAWK_XGXS_SIGDET_STS2r_fields[] = 3157 { 3158 /* ENERGY_DETECT:0:0 */ 3159 PHYMOD_SYMBOL_FIELD_ENCODE(449, 0, 0), 3160 /* ENERGY_DETECT_CHANGE:1:1 */ 3161 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(450, 1, 1) 3162 }; 3163 static uint32_t BCMI_BLACKHAWK_XGXS_SIGDET_STS3r_fields[] = 3164 { 3165 /* PMD_SIGNAL_DETECT:0:0 */ 3166 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(853, 0, 0) 3167 }; 3168 static uint32_t BCMI_BLACKHAWK_XGXS_SIGDET_STS4r_fields[] = 3169 { 3170 /* AFE_SIGDET_THRESH:0:2 */ 3171 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(14, 2, 0) 3172 }; 3173 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS0r_fields[] = 3174 { 3175 /* TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_0:0:15 */ 3176 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1270, 15, 0) 3177 }; 3178 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS1r_fields[] = 3179 { 3180 /* TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_1:0:15 */ 3181 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1271, 15, 0) 3182 }; 3183 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS2r_fields[] = 3184 { 3185 /* TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_2:0:15 */ 3186 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1272, 15, 0) 3187 }; 3188 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS3r_fields[] = 3189 { 3190 /* TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_3:0:15 */ 3191 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1273, 15, 0) 3192 }; 3193 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS4r_fields[] = 3194 { 3195 /* TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_4:0:15 */ 3196 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1274, 15, 0) 3197 }; 3198 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS5r_fields[] = 3199 { 3200 /* TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_5:0:15 */ 3201 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1275, 15, 0) 3202 }; 3203 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS6r_fields[] = 3204 { 3205 /* TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_6:0:15 */ 3206 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1276, 15, 0) 3207 }; 3208 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS7r_fields[] = 3209 { 3210 /* TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_7:0:15 */ 3211 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1277, 15, 0) 3212 }; 3213 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_NUM_ERRS_IN_FEC_FRAMES_STS_HIr_fields[] = 3214 { 3215 /* TLB_ERR_AGGR_COUNT_ERROR_HI:0:3 */ 3216 PHYMOD_SYMBOL_FIELD_ENCODE(1268, 3, 0), 3217 /* TLB_ERR_AGGR_ACTIVE_STATUS:4:4 */ 3218 PHYMOD_SYMBOL_FIELD_ENCODE(1263, 4, 4), 3219 /* TLB_ERR_AGGR_CLKS_OUT_OF_SYNC_STATUS:5:5 */ 3220 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1266, 5, 5) 3221 }; 3222 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_NUM_ERRS_IN_FEC_FRAMES_STS_LOr_fields[] = 3223 { 3224 /* TLB_ERR_AGGR_COUNT_ERROR_LO:0:15 */ 3225 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1269, 15, 0) 3226 }; 3227 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_TLB_ERR_AGGR_CFG0r_fields[] = 3228 { 3229 /* TLB_ERR_AGGR_EN:0:0 */ 3230 PHYMOD_SYMBOL_FIELD_ENCODE(1279, 0, 0), 3231 /* TLB_ERR_AGGR_CLEAR_ERROR_ANALYZER_STATUS:1:1 */ 3232 PHYMOD_SYMBOL_FIELD_ENCODE(1264, 1, 1), 3233 /* TLB_ERR_AGGR_ERROR_COUNT_THRESH:2:5 */ 3234 PHYMOD_SYMBOL_FIELD_ENCODE(1281, 5, 2), 3235 /* TLB_ERR_AGGR_LANES_ACTIVE:6:13 */ 3236 PHYMOD_SYMBOL_FIELD_ENCODE(1284, 13, 6), 3237 /* TLB_ERR_AGGR_MODE:14:15 */ 3238 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1285, 15, 14) 3239 }; 3240 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_TLB_ERR_AGGR_CFG1r_fields[] = 3241 { 3242 /* TLB_ERR_AGGR_HISTOGRAM_ERROR_THRESH:0:3 */ 3243 PHYMOD_SYMBOL_FIELD_ENCODE(1283, 3, 0), 3244 /* TLB_ERR_AGGR_CLEAR_STATUS_ON_READ:4:4 */ 3245 PHYMOD_SYMBOL_FIELD_ENCODE(1265, 4, 4), 3246 /* TLB_ERR_AGGR_GCLK_DIV2_EN_IGNORE:5:5 */ 3247 PHYMOD_SYMBOL_FIELD_ENCODE(1282, 5, 5), 3248 /* TLB_ERR_AGGR_ACTIVE_PATTERN_DEPTH:6:8 */ 3249 PHYMOD_SYMBOL_FIELD_ENCODE(1262, 8, 6), 3250 /* TLB_ERR_AGGR_CLK_OUT_OF_SYNC_PATTERN_DEPTH:9:11 */ 3251 PHYMOD_SYMBOL_FIELD_ENCODE(1267, 11, 9), 3252 /* TLB_ERR_AGGR_DELAY_DATA_CAPTURE:12:13 */ 3253 PHYMOD_SYMBOL_FIELD_ENCODE(1278, 13, 12), 3254 /* TLB_ERR_AGGR_EN_FORCE:14:14 */ 3255 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1280, 14, 14) 3256 }; 3257 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_CFG0r_fields[] = 3258 { 3259 /* BC_DEC_EN:0:0 */ 3260 PHYMOD_SYMBOL_FIELD_ENCODE(251, 0, 0), 3261 /* BC_DEC_REFRAME_EN:3:3 */ 3262 PHYMOD_SYMBOL_FIELD_ENCODE(279, 3, 3), 3263 /* BC_DEC_LOCK_CNT:4:7 */ 3264 PHYMOD_SYMBOL_FIELD_ENCODE(268, 7, 4), 3265 /* BC_DEC_ALIGN_TIMER_CNT:8:12 */ 3266 PHYMOD_SYMBOL_FIELD_ENCODE(249, 12, 8), 3267 /* BC_DEC_ALIGN_CHECK_SEC_EN:13:13 */ 3268 PHYMOD_SYMBOL_FIELD_ENCODE(247, 13, 13), 3269 /* BC_DEC_ALIGN_TIMER_MODE:14:15 */ 3270 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(250, 15, 14) 3271 }; 3272 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_CFG1r_fields[] = 3273 { 3274 /* BC_DEC_FRM_PAT:0:15 */ 3275 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(253, 15, 0) 3276 }; 3277 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_CFG2r_fields[] = 3278 { 3279 /* BC_DEC_MSG_TYPE_MODE:1:2 */ 3280 PHYMOD_SYMBOL_FIELD_ENCODE(276, 2, 1), 3281 /* BC_DEC_MSG_CONS_CNT:4:6 */ 3282 PHYMOD_SYMBOL_FIELD_ENCODE(269, 6, 4), 3283 /* BC_DEC_OOL_CNT:7:11 */ 3284 PHYMOD_SYMBOL_FIELD_ENCODE(278, 11, 7), 3285 /* BC_DEC_FRM_LEN_SEL:12:14 */ 3286 PHYMOD_SYMBOL_FIELD_ENCODE(252, 14, 12), 3287 /* BC_DEC_ALIGN_SEARCH_MANUAL_TIMER_DONE:15:15 */ 3288 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(248, 15, 15) 3289 }; 3290 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_CFG3r_fields[] = 3291 { 3292 /* SYM_ROTATE_DLY_FRC_VAL:0:4 */ 3293 PHYMOD_SYMBOL_FIELD_ENCODE(1256, 4, 0), 3294 /* SYM_ROTATE_DLY_FRC:5:5 */ 3295 PHYMOD_SYMBOL_FIELD_ENCODE(1255, 5, 5), 3296 /* SYM_ROTATE_PRBS_AUTO_DETECT_EN:6:6 */ 3297 PHYMOD_SYMBOL_FIELD_ENCODE(1257, 6, 6), 3298 /* SYM_ROTATE_BC_DEC_EN:7:7 */ 3299 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1253, 7, 7) 3300 }; 3301 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_CFG4r_fields[] = 3302 { 3303 /* BC_DEC_INTR_MASK_LOCK:0:0 */ 3304 PHYMOD_SYMBOL_FIELD_ENCODE(260, 0, 0), 3305 /* BC_DEC_INTR_MASK_OOL:1:1 */ 3306 PHYMOD_SYMBOL_FIELD_ENCODE(263, 1, 1), 3307 /* BC_DEC_INTR_MASK_MSG_MSB_READY:2:2 */ 3308 PHYMOD_SYMBOL_FIELD_ENCODE(262, 2, 2), 3309 /* BC_DEC_INTR_MASK_MSG_LSB_READY:3:3 */ 3310 PHYMOD_SYMBOL_FIELD_ENCODE(261, 3, 3), 3311 /* BC_DEC_INTR_FRC_LOCK:8:8 */ 3312 PHYMOD_SYMBOL_FIELD_ENCODE(255, 8, 8), 3313 /* BC_DEC_INTR_FRC_OOL:9:9 */ 3314 PHYMOD_SYMBOL_FIELD_ENCODE(258, 9, 9), 3315 /* BC_DEC_INTR_FRC_MSG_MSB_READY:10:10 */ 3316 PHYMOD_SYMBOL_FIELD_ENCODE(257, 10, 10), 3317 /* BC_DEC_INTR_FRC_MSG_LSB_READY:11:11 */ 3318 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(256, 11, 11) 3319 }; 3320 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_STS0r_fields[] = 3321 { 3322 /* BC_DEC_LOCK:0:0 */ 3323 PHYMOD_SYMBOL_FIELD_ENCODE(267, 0, 0), 3324 /* BC_DEC_OOL:1:1 */ 3325 PHYMOD_SYMBOL_FIELD_ENCODE(277, 1, 1), 3326 /* BC_DEC_SM_STATE:4:5 */ 3327 PHYMOD_SYMBOL_FIELD_ENCODE(280, 5, 4), 3328 /* SYM_ROTATE_DLY:8:12 */ 3329 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1254, 12, 8) 3330 }; 3331 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_STS1r_fields[] = 3332 { 3333 /* BC_DEC_SM_STATE_ONE_HOT:0:3 */ 3334 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(281, 3, 0) 3335 }; 3336 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_STS2r_fields[] = 3337 { 3338 /* BC_DEC_MSG_MSB:0:15 */ 3339 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(272, 15, 0) 3340 }; 3341 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_STS3r_fields[] = 3342 { 3343 /* BC_DEC_MSG_LSB:0:15 */ 3344 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(270, 15, 0) 3345 }; 3346 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_STS4r_fields[] = 3347 { 3348 /* BC_DEC_MSG_LSB_READY:0:0 */ 3349 PHYMOD_SYMBOL_FIELD_ENCODE(271, 0, 0), 3350 /* BC_DEC_MSG_MSB_READY:1:1 */ 3351 PHYMOD_SYMBOL_FIELD_ENCODE(273, 1, 1), 3352 /* BC_DEC_MSG_TYPE_CNT_READY:2:2 */ 3353 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(275, 2, 2) 3354 }; 3355 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_STS5r_fields[] = 3356 { 3357 /* BC_DEC_MSG_TYPE_CNT:0:3 */ 3358 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(274, 3, 0) 3359 }; 3360 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_STS6r_fields[] = 3361 { 3362 /* BC_DEC_INTR:0:0 */ 3363 PHYMOD_SYMBOL_FIELD_ENCODE(254, 0, 0), 3364 /* BC_DEC_INTR_LOCK:1:1 */ 3365 PHYMOD_SYMBOL_FIELD_ENCODE(259, 1, 1), 3366 /* BC_DEC_INTR_OOL:2:2 */ 3367 PHYMOD_SYMBOL_FIELD_ENCODE(266, 2, 2), 3368 /* BC_DEC_INTR_MSG_MSB_READY:3:3 */ 3369 PHYMOD_SYMBOL_FIELD_ENCODE(265, 3, 3), 3370 /* BC_DEC_INTR_MSG_LSB_READY:4:4 */ 3371 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(264, 4, 4) 3372 }; 3373 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_STS7r_fields[] = 3374 { 3375 /* PRBS_CHK_AUTO_DETECT_STATE:8:9 */ 3376 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(866, 9, 8) 3377 }; 3378 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS0r_fields[] = 3379 { 3380 /* TLB_ERR_COUNT_HISTOGRAM_ERROR_OFFSET_0:0:15 */ 3381 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1290, 15, 0) 3382 }; 3383 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS1r_fields[] = 3384 { 3385 /* TLB_ERR_COUNT_HISTOGRAM_ERROR_OFFSET_1:0:15 */ 3386 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1291, 15, 0) 3387 }; 3388 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS2r_fields[] = 3389 { 3390 /* TLB_ERR_COUNT_HISTOGRAM_ERROR_OFFSET_2:0:15 */ 3391 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1292, 15, 0) 3392 }; 3393 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS3r_fields[] = 3394 { 3395 /* TLB_ERR_COUNT_HISTOGRAM_ERROR_OFFSET_3:0:15 */ 3396 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1293, 15, 0) 3397 }; 3398 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS4r_fields[] = 3399 { 3400 /* TLB_ERR_COUNT_HISTOGRAM_ERROR_OFFSET_4:0:15 */ 3401 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1294, 15, 0) 3402 }; 3403 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS5r_fields[] = 3404 { 3405 /* TLB_ERR_COUNT_HISTOGRAM_ERROR_OFFSET_5:0:15 */ 3406 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1295, 15, 0) 3407 }; 3408 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS6r_fields[] = 3409 { 3410 /* TLB_ERR_COUNT_HISTOGRAM_ERROR_OFFSET_6:0:15 */ 3411 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1296, 15, 0) 3412 }; 3413 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS7r_fields[] = 3414 { 3415 /* TLB_ERR_COUNT_HISTOGRAM_ERROR_OFFSET_7:0:15 */ 3416 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1297, 15, 0) 3417 }; 3418 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_C_NUM_ERRS_IN_FEC_FRAMES_STS_HIr_fields[] = 3419 { 3420 /* TLB_ERR_COUNT_ERROR_HI:0:3 */ 3421 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1288, 3, 0) 3422 }; 3423 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_C_NUM_ERRS_IN_FEC_FRAMES_STS_LOr_fields[] = 3424 { 3425 /* TLB_ERR_COUNT_ERROR_LO:0:15 */ 3426 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1289, 15, 0) 3427 }; 3428 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_C_TLB_RX_C_CFG0r_fields[] = 3429 { 3430 /* TLB_ERR_CLEAR_ERROR_ANALYZER_STATUS:1:1 */ 3431 PHYMOD_SYMBOL_FIELD_ENCODE(1286, 1, 1), 3432 /* TLB_ERR_ERROR_COUNT_THRESH:2:5 */ 3433 PHYMOD_SYMBOL_FIELD_ENCODE(1298, 5, 2), 3434 /* TLB_ERR_IGNORE_BACK_CHANNEL:6:6 */ 3435 PHYMOD_SYMBOL_FIELD_ENCODE(1303, 6, 6), 3436 /* TLB_ERR_FEC_L_EN:8:8 */ 3437 PHYMOD_SYMBOL_FIELD_ENCODE(1299, 8, 8), 3438 /* TLB_ERR_FEC_L_R_EN:9:9 */ 3439 PHYMOD_SYMBOL_FIELD_ENCODE(1300, 9, 9), 3440 /* TLB_ERR_FEC_SIZE:10:15 */ 3441 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1301, 15, 10) 3442 }; 3443 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_C_TLB_RX_C_CFG1r_fields[] = 3444 { 3445 /* TLB_ERR_HISTOGRAM_ERROR_THRESH:0:3 */ 3446 PHYMOD_SYMBOL_FIELD_ENCODE(1302, 3, 0), 3447 /* TLB_ERR_CLEAR_STATUS_ON_READ:4:4 */ 3448 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1287, 4, 4) 3449 }; 3450 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_DBG_PMD_RX_LOCK_STSr_fields[] = 3451 { 3452 /* DBG_PMD_RX_LOCK:0:0 */ 3453 PHYMOD_SYMBOL_FIELD_ENCODE(401, 0, 0), 3454 /* DBG_PMD_RX_LOCK_CHANGE:1:1 */ 3455 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(402, 1, 1) 3456 }; 3457 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_DIG_LPBK_CFGr_fields[] = 3458 { 3459 /* DIG_LPBK_EN:0:0 */ 3460 PHYMOD_SYMBOL_FIELD_ENCODE(420, 0, 0), 3461 /* DIG_LPBK_PD_MODE:1:1 */ 3462 PHYMOD_SYMBOL_FIELD_ENCODE(425, 1, 1), 3463 /* DIG_LPBK_PD_FLT_BYPASS:2:2 */ 3464 PHYMOD_SYMBOL_FIELD_ENCODE(423, 2, 2), 3465 /* DIG_LPBK_PD_BIAS_EN:3:3 */ 3466 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(421, 3, 3) 3467 }; 3468 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_DIG_LPBK_PD_STSr_fields[] = 3469 { 3470 /* DIG_LPBK_PD_LATE_IND:0:0 */ 3471 PHYMOD_SYMBOL_FIELD_ENCODE(424, 0, 0), 3472 /* DIG_LPBK_PD_EARLY_IND:1:1 */ 3473 PHYMOD_SYMBOL_FIELD_ENCODE(422, 1, 1), 3474 /* PRBS_CHK_AUTO_DETECT_LOCK:8:8 */ 3475 PHYMOD_SYMBOL_FIELD_ENCODE(864, 8, 8), 3476 /* PRBS_CHK_INV_AUTO_DETECT:9:9 */ 3477 PHYMOD_SYMBOL_FIELD_ENCODE(879, 9, 9), 3478 /* PRBS_CHK_MODE_SEL_AUTO_DETECT:10:12 */ 3479 PHYMOD_SYMBOL_FIELD_ENCODE(885, 12, 10), 3480 /* PRBS_CHK_MODE_SEL_MSB_AUTO_DETECT:13:13 */ 3481 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(887, 13, 13) 3482 }; 3483 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_MAX_PRBS_BURST_ERR_LEN_STSr_fields[] = 3484 { 3485 /* MAX_PRBS_BURST_ERR_LENGTH_STATUS:0:5 */ 3486 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(609, 5, 0) 3487 }; 3488 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_PMD_RX_LOCK_STSr_fields[] = 3489 { 3490 /* PMD_RX_LOCK:0:0 */ 3491 PHYMOD_SYMBOL_FIELD_ENCODE(851, 0, 0), 3492 /* PMD_RX_LOCK_CHANGE:1:1 */ 3493 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(852, 1, 1) 3494 }; 3495 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_PRBS_BURST_ERR_LEN_STSr_fields[] = 3496 { 3497 /* PRBS_BURST_ERR_LENGTH_STATUS:0:5 */ 3498 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(860, 5, 0) 3499 }; 3500 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_PRBS_CHK_BURST_ERR_CNT_STSr_fields[] = 3501 { 3502 /* PRBS_CHK_BURST_ERR_CNT:0:9 */ 3503 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(867, 9, 0) 3504 }; 3505 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_PRBS_CHK_CFGr_fields[] = 3506 { 3507 /* PRBS_CHK_EN:0:0 */ 3508 PHYMOD_SYMBOL_FIELD_ENCODE(870, 0, 0), 3509 /* PRBS_CHK_MODE_SEL:1:3 */ 3510 PHYMOD_SYMBOL_FIELD_ENCODE(884, 3, 1), 3511 /* PRBS_CHK_INV:4:4 */ 3512 PHYMOD_SYMBOL_FIELD_ENCODE(878, 4, 4), 3513 /* PRBS_CHK_MODE:5:6 */ 3514 PHYMOD_SYMBOL_FIELD_ENCODE(883, 6, 5), 3515 /* PRBS_CHK_EN_AUTO_MODE:7:7 */ 3516 PHYMOD_SYMBOL_FIELD_ENCODE(871, 7, 7), 3517 /* PRBS_BURST_LEN_CHK_EN:8:8 */ 3518 PHYMOD_SYMBOL_FIELD_ENCODE(861, 8, 8), 3519 /* PRBS_CHK_ERR_CNT_BURST_MODE:9:9 */ 3520 PHYMOD_SYMBOL_FIELD_ENCODE(874, 9, 9), 3521 /* TRNSUM_ERROR_COUNT_EN:10:10 */ 3522 PHYMOD_SYMBOL_FIELD_ENCODE(1325, 10, 10), 3523 /* PRBS_CHK_CLK_EN_FRC_ON:11:11 */ 3524 PHYMOD_SYMBOL_FIELD_ENCODE(869, 11, 11), 3525 /* PRBS_CHK_MODE_SEL_MSB:12:12 */ 3526 PHYMOD_SYMBOL_FIELD_ENCODE(886, 12, 12), 3527 /* PRBS_CHK_BURST_ERR_CNT_EN:15:15 */ 3528 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(868, 15, 15) 3529 }; 3530 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_PRBS_CHK_CNT_CFGr_fields[] = 3531 { 3532 /* PRBS_CHK_LOCK_CNT:0:4 */ 3533 PHYMOD_SYMBOL_FIELD_ENCODE(881, 4, 0), 3534 /* PRBS_CHK_OOL_CNT:8:12 */ 3535 PHYMOD_SYMBOL_FIELD_ENCODE(888, 12, 8), 3536 /* RX_TRN_ACTIVE_AUTO_MODE_EN:15:15 */ 3537 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1231, 15, 15) 3538 }; 3539 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_PRBS_CHK_EN_TMR_CTLr_fields[] = 3540 { 3541 /* PRBS_CHK_EN_TIMER_MODE:0:1 */ 3542 PHYMOD_SYMBOL_FIELD_ENCODE(873, 1, 0), 3543 /* PRBS_CHK_EN_TIMEOUT:8:12 */ 3544 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(872, 12, 8) 3545 }; 3546 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_PRBS_CHK_ERR_CNT_LSB_STSr_fields[] = 3547 { 3548 /* PRBS_CHK_ERR_CNT_LSB:0:15 */ 3549 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(875, 15, 0) 3550 }; 3551 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_PRBS_CHK_ERR_CNT_MSB_STSr_fields[] = 3552 { 3553 /* PRBS_CHK_ERR_CNT_MSB:0:14 */ 3554 PHYMOD_SYMBOL_FIELD_ENCODE(876, 14, 0), 3555 /* PRBS_CHK_LOCK_LOST_LH:15:15 */ 3556 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(882, 15, 15) 3557 }; 3558 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_PRBS_CHK_LOCK_STSr_fields[] = 3559 { 3560 /* PRBS_CHK_LOCK:0:0 */ 3561 PHYMOD_SYMBOL_FIELD_ENCODE(880, 0, 0), 3562 /* PRBS_CHK_ERR_CNT_NO_CLR:1:15 */ 3563 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(877, 15, 1) 3564 }; 3565 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_TLB_RX_MISC_CFGr_fields[] = 3566 { 3567 /* RX_PMD_DP_INVERT:0:0 */ 3568 PHYMOD_SYMBOL_FIELD_ENCODE(1227, 0, 0), 3569 /* RX_DESCRAMBLER_EN:1:1 */ 3570 PHYMOD_SYMBOL_FIELD_ENCODE(1152, 1, 1), 3571 /* DBG_MASK_DIG_LPBK_EN:2:2 */ 3572 PHYMOD_SYMBOL_FIELD_ENCODE(399, 2, 2), 3573 /* TLB_RX_DIFF_DEC_EN:3:3 */ 3574 PHYMOD_SYMBOL_FIELD_ENCODE(1304, 3, 3), 3575 /* TLB_RX_NRZ_LL_MODE_EN:4:4 */ 3576 PHYMOD_SYMBOL_FIELD_ENCODE(1305, 4, 4), 3577 /* PAM4_GRAY_DEC_EN:5:5 */ 3578 PHYMOD_SYMBOL_FIELD_ENCODE(783, 5, 5), 3579 /* PAM4_DECODER_EN:6:6 */ 3580 PHYMOD_SYMBOL_FIELD_ENCODE(782, 6, 6), 3581 /* PAM4_RX_SYMBOL_BIT_SWAP:7:7 */ 3582 PHYMOD_SYMBOL_FIELD_ENCODE(790, 7, 7), 3583 /* PRBS_CHK_AUTO_DETECT_CNT:8:12 */ 3584 PHYMOD_SYMBOL_FIELD_ENCODE(862, 12, 8), 3585 /* PRBS_CHK_AUTO_DETECT_EN:14:14 */ 3586 PHYMOD_SYMBOL_FIELD_ENCODE(863, 14, 14), 3587 /* PRBS_CHK_AUTO_DETECT_RELOCK_EN:15:15 */ 3588 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(865, 15, 15) 3589 }; 3590 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_RX_UC_PMD_RX_LOCK_STSr_fields[] = 3591 { 3592 /* UC_PMD_RX_LOCK:0:0 */ 3593 PHYMOD_SYMBOL_FIELD_ENCODE(1489, 0, 0), 3594 /* UC_PMD_RX_LOCK_CHANGE:1:1 */ 3595 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1490, 1, 1) 3596 }; 3597 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_TX_PATGEN_CFGr_fields[] = 3598 { 3599 /* PATT_GEN_EN:0:0 */ 3600 PHYMOD_SYMBOL_FIELD_ENCODE(794, 0, 0), 3601 /* PAM4_TX_LINEARITY_PATT_EN:6:6 */ 3602 PHYMOD_SYMBOL_FIELD_ENCODE(792, 6, 6), 3603 /* PAM4_TX_JP03B_PATT_EN:7:7 */ 3604 PHYMOD_SYMBOL_FIELD_ENCODE(791, 7, 7), 3605 /* PATT_GEN_STOP_POS:8:11 */ 3606 PHYMOD_SYMBOL_FIELD_ENCODE(811, 11, 8), 3607 /* PATT_GEN_START_POS:12:15 */ 3608 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(810, 15, 12) 3609 }; 3610 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_TX_PRBS_GEN_CFGr_fields[] = 3611 { 3612 /* PRBS_GEN_EN:0:0 */ 3613 PHYMOD_SYMBOL_FIELD_ENCODE(889, 0, 0), 3614 /* PRBS_GEN_MODE_SEL:1:3 */ 3615 PHYMOD_SYMBOL_FIELD_ENCODE(892, 3, 1), 3616 /* PRBS_GEN_INV:4:4 */ 3617 PHYMOD_SYMBOL_FIELD_ENCODE(891, 4, 4), 3618 /* PRBS_GEN_ERR_INS:5:5 */ 3619 PHYMOD_SYMBOL_FIELD_ENCODE(890, 5, 5), 3620 /* PRBS_GEN_MODE_SEL_MSB:12:12 */ 3621 PHYMOD_SYMBOL_FIELD_ENCODE(893, 12, 12), 3622 /* PRBS_GEN_PAUSE_STROBE:15:15 */ 3623 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(894, 15, 15) 3624 }; 3625 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_TX_RMT_LPBK_CFGr_fields[] = 3626 { 3627 /* RMT_LPBK_EN:0:0 */ 3628 PHYMOD_SYMBOL_FIELD_ENCODE(934, 0, 0), 3629 /* RMT_LPBK_PD_MODE:1:1 */ 3630 PHYMOD_SYMBOL_FIELD_ENCODE(938, 1, 1), 3631 /* RMT_LPBK_PD_FRC_ON:2:2 */ 3632 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(936, 2, 2) 3633 }; 3634 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_TX_RMT_LPBK_PD_STSr_fields[] = 3635 { 3636 /* RMT_LPBK_PD_LATE_IND:0:0 */ 3637 PHYMOD_SYMBOL_FIELD_ENCODE(937, 0, 0), 3638 /* RMT_LPBK_PD_EARLY_IND:1:1 */ 3639 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(935, 1, 1) 3640 }; 3641 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_TX_TLB_TX_BC_ENC_CFG0r_fields[] = 3642 { 3643 /* BC_ENC_EN:0:0 */ 3644 PHYMOD_SYMBOL_FIELD_ENCODE(285, 0, 0), 3645 /* BC_ENC_UPDATE:1:1 */ 3646 PHYMOD_SYMBOL_FIELD_ENCODE(288, 1, 1), 3647 /* BC_ENC_ERR_INS_EN:2:2 */ 3648 PHYMOD_SYMBOL_FIELD_ENCODE(286, 2, 2), 3649 /* BC_ENC_FRM_LEN_SEL:8:10 */ 3650 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(287, 10, 8) 3651 }; 3652 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_TX_TLB_TX_BC_ENC_CFG1r_fields[] = 3653 { 3654 /* BC_ENC_DATA_LSB:0:15 */ 3655 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(282, 15, 0) 3656 }; 3657 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_TX_TLB_TX_BC_ENC_CFG2r_fields[] = 3658 { 3659 /* BC_ENC_DATA_MSB:0:15 */ 3660 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(283, 15, 0) 3661 }; 3662 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_TX_TLB_TX_BC_ENC_STS0r_fields[] = 3663 { 3664 /* BC_ENC_DATA_SENT:0:0 */ 3665 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(284, 0, 0) 3666 }; 3667 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_TX_TLB_TX_MISC_CFGr_fields[] = 3668 { 3669 /* TX_PMD_DP_INVERT:0:0 */ 3670 PHYMOD_SYMBOL_FIELD_ENCODE(1467, 0, 0), 3671 /* TX_PCS_NATIVE_ANA_FRMT_EN:1:1 */ 3672 PHYMOD_SYMBOL_FIELD_ENCODE(1418, 1, 1), 3673 /* TX_MUX_SEL_ORDER:2:2 */ 3674 PHYMOD_SYMBOL_FIELD_ENCODE(1409, 2, 2), 3675 /* TLB_TX_DIFF_ENC_EN:3:3 */ 3676 PHYMOD_SYMBOL_FIELD_ENCODE(1306, 3, 3), 3677 /* TX_TRN_ACTIVE_AUTO_MODE_EN:4:4 */ 3678 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1469, 4, 4) 3679 }; 3680 static uint32_t BCMI_BLACKHAWK_XGXS_TLB_TX_TLB_TX_PAM4_CFG0r_fields[] = 3681 { 3682 /* PAM4_GRAY_ENC_EN:0:0 */ 3683 PHYMOD_SYMBOL_FIELD_ENCODE(784, 0, 0), 3684 /* PAM4_PRECODER_EN:1:1 */ 3685 PHYMOD_SYMBOL_FIELD_ENCODE(789, 1, 1), 3686 /* TX_SCRAMBLER_EN:2:2 */ 3687 PHYMOD_SYMBOL_FIELD_ENCODE(1468, 2, 2), 3688 /* PAM4_TX_SYMBOL_BIT_SWAP:3:3 */ 3689 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(793, 3, 3) 3690 }; 3691 static uint32_t BCMI_BLACKHAWK_XGXS_TXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr_fields[] = 3692 { 3693 /* TX_OSR_MODE_PIN:0:3 */ 3694 PHYMOD_SYMBOL_FIELD_ENCODE(1413, 3, 0), 3695 /* TX_PAM4_MODE_PIN:4:6 */ 3696 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1417, 6, 4) 3697 }; 3698 static uint32_t BCMI_BLACKHAWK_XGXS_TXCOM_CTL2r_fields[] = 3699 { 3700 /* TXCOM_LINKTRN_MAX_WAIT_TIMER_PERIOD:0:15 */ 3701 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1361, 15, 0) 3702 }; 3703 static uint32_t BCMI_BLACKHAWK_XGXS_TXCOM_CTL3r_fields[] = 3704 { 3705 /* TXCOM_LINKTRN_WAIT_CNTR_LIMIT:0:9 */ 3706 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1363, 9, 0) 3707 }; 3708 static uint32_t BCMI_BLACKHAWK_XGXS_TXCOM_CTL4r_fields[] = 3709 { 3710 /* TXCOM_LINKTRN_MAX_WAIT_TIMER_PERIOD_2NDSET:0:15 */ 3711 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1362, 15, 0) 3712 }; 3713 static uint32_t BCMI_BLACKHAWK_XGXS_TXCOM_CTL5r_fields[] = 3714 { 3715 /* TXCOM_LINKTRN_WAIT_CNTR_LIMIT_2NDSET:0:9 */ 3716 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1364, 9, 0) 3717 }; 3718 static uint32_t BCMI_BLACKHAWK_XGXS_TXCOM_LN_CLK_RST_N_PWRDWN_CTLr_fields[] = 3719 { 3720 /* TX_LN_DP_S_RSTB:0:0 */ 3721 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1405, 0, 0) 3722 }; 3723 static uint32_t BCMI_BLACKHAWK_XGXS_TXCOM_LN_DP_RST_ST_STSr_fields[] = 3724 { 3725 /* TX_LANE_DP_RESET_STATE:0:2 */ 3726 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1401, 2, 0) 3727 }; 3728 static uint32_t BCMI_BLACKHAWK_XGXS_TXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields[] = 3729 { 3730 /* PMD_LN_TX_H_RSTB_PKILL:0:0 */ 3731 PHYMOD_SYMBOL_FIELD_ENCODE(846, 0, 0), 3732 /* PMD_LN_TX_DP_H_RSTB_PKILL:1:1 */ 3733 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(844, 1, 1) 3734 }; 3735 static uint32_t BCMI_BLACKHAWK_XGXS_TXCOM_LN_RST_OCC_CTLr_fields[] = 3736 { 3737 /* TX_LANE_REG_RESET_OCCURRED:0:0 */ 3738 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1402, 0, 0) 3739 }; 3740 static uint32_t BCMI_BLACKHAWK_XGXS_TXCOM_LN_S_RSTB_CTLr_fields[] = 3741 { 3742 /* TX_LN_S_RSTB:0:0 */ 3743 PHYMOD_SYMBOL_FIELD_ENCODE(1406, 0, 0), 3744 /* TX_HW_FW_HANDSHAKE_DISABLE:1:1 */ 3745 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1392, 1, 1) 3746 }; 3747 static uint32_t BCMI_BLACKHAWK_XGXS_TXCOM_MCST_MASK_CTLr_fields[] = 3748 { 3749 /* TX_MULTICAST_MASK_CONTROL:0:0 */ 3750 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1407, 0, 0) 3751 }; 3752 static uint32_t BCMI_BLACKHAWK_XGXS_TXCOM_OSR_MODE_CTLr_fields[] = 3753 { 3754 /* TX_OSR_MODE_FRC_VAL:0:3 */ 3755 PHYMOD_SYMBOL_FIELD_ENCODE(1412, 3, 0), 3756 /* TX_PAM4_MODE_FRC_VAL:4:6 */ 3757 PHYMOD_SYMBOL_FIELD_ENCODE(1416, 6, 4), 3758 /* TX_PAM4_MODE_FRC:14:14 */ 3759 PHYMOD_SYMBOL_FIELD_ENCODE(1415, 14, 14), 3760 /* TX_OSR_MODE_FRC:15:15 */ 3761 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1411, 15, 15) 3762 }; 3763 static uint32_t BCMI_BLACKHAWK_XGXS_TXCOM_OSR_MODE_STS_MC_MASKr_fields[] = 3764 { 3765 /* TX_OSR_MODE:0:3 */ 3766 PHYMOD_SYMBOL_FIELD_ENCODE(1410, 3, 0), 3767 /* TX_PAM4_MODE:4:6 */ 3768 PHYMOD_SYMBOL_FIELD_ENCODE(1414, 6, 4), 3769 /* TX_MULTICAST_MASK_CONTROL_STATUS:15:15 */ 3770 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1408, 15, 15) 3771 }; 3772 static uint32_t BCMI_BLACKHAWK_XGXS_TXCOM_PLL_SEL_CTLr_fields[] = 3773 { 3774 /* TX_PLL_SELECT:0:0 */ 3775 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1466, 0, 0) 3776 }; 3777 static uint32_t BCMI_BLACKHAWK_XGXS_TXCOM_UC_ACK_LN_CTLr_fields[] = 3778 { 3779 /* TX_UC_ACK_LANE_CFG_DONE:0:0 */ 3780 PHYMOD_SYMBOL_FIELD_ENCODE(1470, 0, 0), 3781 /* TX_UC_ACK_LANE_DP_RESET:1:1 */ 3782 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1471, 1, 1) 3783 }; 3784 static uint32_t BCMI_BLACKHAWK_XGXS_TXFIR_MISC_CTL0r_fields[] = 3785 { 3786 /* SDK_TX_DISABLE:0:0 */ 3787 PHYMOD_SYMBOL_FIELD_ENCODE(1236, 0, 0), 3788 /* TX_DISABLE_OUTPUT_SEL:2:3 */ 3789 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1383, 3, 2) 3790 }; 3791 static uint32_t BCMI_BLACKHAWK_XGXS_TXFIR_MISC_STS0r_fields[] = 3792 { 3793 /* TX_DISABLE_STATUS:0:0 */ 3794 PHYMOD_SYMBOL_FIELD_ENCODE(1384, 0, 0), 3795 /* TX_ELEC_IDLE_STATUS:1:1 */ 3796 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1389, 1, 1) 3797 }; 3798 static uint32_t BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL0r_fields[] = 3799 { 3800 /* TXFIR_TAP0_COEFF:0:8 */ 3801 PHYMOD_SYMBOL_FIELD_ENCODE(1368, 8, 0), 3802 /* TXFIR_NRZ_TAP_RANGE_SEL:10:10 */ 3803 PHYMOD_SYMBOL_FIELD_ENCODE(1367, 10, 10), 3804 /* TXFIR_TAP_LOAD:11:11 */ 3805 PHYMOD_SYMBOL_FIELD_ENCODE(1381, 11, 11), 3806 /* TXFIR_TAP_EN:12:13 */ 3807 PHYMOD_SYMBOL_FIELD_ENCODE(1380, 13, 12), 3808 /* TXFIR_TEST_DATA_EN:15:15 */ 3809 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1382, 15, 15) 3810 }; 3811 static uint32_t BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL1r_fields[] = 3812 { 3813 /* TXFIR_TAP1_COEFF:0:8 */ 3814 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1371, 8, 0) 3815 }; 3816 static uint32_t BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL10r_fields[] = 3817 { 3818 /* TXFIR_TAP10_COEFF:0:6 */ 3819 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1369, 6, 0) 3820 }; 3821 static uint32_t BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL11r_fields[] = 3822 { 3823 /* TXFIR_TAP11_COEFF:0:6 */ 3824 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1370, 6, 0) 3825 }; 3826 static uint32_t BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL2r_fields[] = 3827 { 3828 /* TXFIR_TAP2_COEFF:0:8 */ 3829 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1372, 8, 0) 3830 }; 3831 static uint32_t BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL3r_fields[] = 3832 { 3833 /* TXFIR_TAP3_COEFF:0:8 */ 3834 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1373, 8, 0) 3835 }; 3836 static uint32_t BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL4r_fields[] = 3837 { 3838 /* TXFIR_TAP4_COEFF:0:8 */ 3839 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1374, 8, 0) 3840 }; 3841 static uint32_t BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL5r_fields[] = 3842 { 3843 /* TXFIR_TAP5_COEFF:0:8 */ 3844 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1375, 8, 0) 3845 }; 3846 static uint32_t BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL6r_fields[] = 3847 { 3848 /* TXFIR_TAP6_COEFF:0:6 */ 3849 PHYMOD_SYMBOL_FIELD_ENCODE(1376, 6, 0), 3850 /* TXFIR_DC_ADJUST:8:14 */ 3851 PHYMOD_SYMBOL_FIELD_ENCODE(1365, 14, 8), 3852 /* TXFIR_LEVEL_SHIFT_MODE_EN:15:15 */ 3853 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1366, 15, 15) 3854 }; 3855 static uint32_t BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL7r_fields[] = 3856 { 3857 /* TXFIR_TAP7_COEFF:0:6 */ 3858 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1377, 6, 0) 3859 }; 3860 static uint32_t BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL8r_fields[] = 3861 { 3862 /* TXFIR_TAP8_COEFF:0:6 */ 3863 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1378, 6, 0) 3864 }; 3865 static uint32_t BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL9r_fields[] = 3866 { 3867 /* TXFIR_TAP9_COEFF:0:6 */ 3868 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1379, 6, 0) 3869 }; 3870 static uint32_t BCMI_BLACKHAWK_XGXS_TXFIR_UC_CTL0r_fields[] = 3871 { 3872 /* MICRO_TX_DISABLE:0:0 */ 3873 PHYMOD_SYMBOL_FIELD_ENCODE(766, 0, 0), 3874 /* TX_DISABLE_TRIGGER:1:1 */ 3875 PHYMOD_SYMBOL_FIELD_ENCODE(1386, 1, 1), 3876 /* DP_RESET_TX_DISABLE_DIS:2:2 */ 3877 PHYMOD_SYMBOL_FIELD_ENCODE(427, 2, 2), 3878 /* PMD_TX_DISABLE_PKILL:3:3 */ 3879 PHYMOD_SYMBOL_FIELD_ENCODE(856, 3, 3), 3880 /* TX_DISABLE_TIMER_CTRL:4:9 */ 3881 PHYMOD_SYMBOL_FIELD_ENCODE(1385, 9, 4), 3882 /* TX_EEE_QUIET_EN:14:14 */ 3883 PHYMOD_SYMBOL_FIELD_ENCODE(1388, 14, 14), 3884 /* TX_EEE_ALERT_EN:15:15 */ 3885 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1387, 15, 15) 3886 }; 3887 static uint32_t BCMI_BLACKHAWK_XGXS_TX_AFE_RST_PWRDN_OSR_MODE_PIN_STSr_fields[] = 3888 { 3889 /* AFE_TX_PWRDN:0:0 */ 3890 PHYMOD_SYMBOL_FIELD_ENCODE(21, 0, 0), 3891 /* AFE_TX_RESET:1:1 */ 3892 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(24, 1, 1) 3893 }; 3894 static uint32_t BCMI_BLACKHAWK_XGXS_TX_CLK_N_RST_DBG_CTLr_fields[] = 3895 { 3896 /* LN_TX_S_CLKGATE_FRC_ON:0:0 */ 3897 PHYMOD_SYMBOL_FIELD_ENCODE(599, 0, 0), 3898 /* LN_TX_S_COMCLK_SEL:1:1 */ 3899 PHYMOD_SYMBOL_FIELD_ENCODE(601, 1, 1), 3900 /* LN_TX_S_COMCLK_FRC_ON:2:2 */ 3901 PHYMOD_SYMBOL_FIELD_ENCODE(600, 2, 2), 3902 /* PMD_TX_CLK_VLD_FRC:3:3 */ 3903 PHYMOD_SYMBOL_FIELD_ENCODE(854, 3, 3), 3904 /* PMD_TX_CLK_VLD_FRC_VAL:4:4 */ 3905 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(855, 4, 4) 3906 }; 3907 static uint32_t BCMI_BLACKHAWK_XGXS_TX_CLK_N_RST_MISC_CTLr_fields[] = 3908 { 3909 /* TX_PI_LOOP_FILTER_STABLE:0:0 */ 3910 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1446, 0, 0) 3911 }; 3912 static uint32_t BCMI_BLACKHAWK_XGXS_TX_LN_AFE_RST_PWRDWN_CTL_CTLr_fields[] = 3913 { 3914 /* AFE_TX_PWRDN_FRC:0:0 */ 3915 PHYMOD_SYMBOL_FIELD_ENCODE(22, 0, 0), 3916 /* AFE_TX_PWRDN_FRC_VAL:1:1 */ 3917 PHYMOD_SYMBOL_FIELD_ENCODE(23, 1, 1), 3918 /* AFE_TX_RESET_FRC:2:2 */ 3919 PHYMOD_SYMBOL_FIELD_ENCODE(26, 2, 2), 3920 /* AFE_TX_RESET_FRC_VAL:3:3 */ 3921 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(27, 3, 3) 3922 }; 3923 static uint32_t BCMI_BLACKHAWK_XGXS_TX_LN_CLK_RST_N_PWRDWN_CTLr_fields[] = 3924 { 3925 /* LN_TX_S_PWRDN:0:0 */ 3926 PHYMOD_SYMBOL_FIELD_ENCODE(602, 0, 0), 3927 /* AFE_TX_RESET_DEASSERT:15:15 */ 3928 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(25, 15, 15) 3929 }; 3930 static uint32_t BCMI_BLACKHAWK_XGXS_TX_LN_DBG_RST_CTLr_fields[] = 3931 { 3932 /* LN_TX_S_RSTB:0:0 */ 3933 PHYMOD_SYMBOL_FIELD_ENCODE(603, 0, 0), 3934 /* LN_TX_DP_S_RSTB:1:1 */ 3935 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(598, 1, 1) 3936 }; 3937 static uint32_t BCMI_BLACKHAWK_XGXS_TX_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields[] = 3938 { 3939 /* PMD_LN_TX_H_PWRDN_PKILL:0:0 */ 3940 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(845, 0, 0) 3941 }; 3942 static uint32_t BCMI_BLACKHAWK_XGXS_TX_PI_B_CTL_12r_fields[] = 3943 { 3944 /* TX_PI_JITTER_FILTER_EN_S1:0:0 */ 3945 PHYMOD_SYMBOL_FIELD_ENCODE(1442, 0, 0), 3946 /* TX_PI_FREQ_OVERRIDE_EN_S1:1:1 */ 3947 PHYMOD_SYMBOL_FIELD_ENCODE(1429, 1, 1), 3948 /* TX_PI_FIRST_ORDER_BWSEL_INTEG_S1:8:10 */ 3949 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1427, 10, 8) 3950 }; 3951 static uint32_t BCMI_BLACKHAWK_XGXS_TX_PI_CTL0r_fields[] = 3952 { 3953 /* TX_PI_EN:0:0 */ 3954 PHYMOD_SYMBOL_FIELD_ENCODE(1419, 0, 0), 3955 /* TX_PI_JITTER_FILTER_EN:1:1 */ 3956 PHYMOD_SYMBOL_FIELD_ENCODE(1441, 1, 1), 3957 /* TX_PI_EXT_CTRL_EN:2:2 */ 3958 PHYMOD_SYMBOL_FIELD_ENCODE(1420, 2, 2), 3959 /* TX_PI_FREQ_OVERRIDE_EN:3:3 */ 3960 PHYMOD_SYMBOL_FIELD_ENCODE(1428, 3, 3), 3961 /* TX_PI_SJ_GEN_EN:4:4 */ 3962 PHYMOD_SYMBOL_FIELD_ENCODE(1464, 4, 4), 3963 /* TX_PI_SSC_GEN_EN:5:5 */ 3964 PHYMOD_SYMBOL_FIELD_ENCODE(1465, 5, 5), 3965 /* TX_PI_JIT_SSC_FREQ_MODE:6:6 */ 3966 PHYMOD_SYMBOL_FIELD_ENCODE(1445, 6, 6), 3967 /* TX_PI_FIRST_ORDER_BWSEL_INTEG:7:9 */ 3968 PHYMOD_SYMBOL_FIELD_ENCODE(1426, 9, 7), 3969 /* TX_PI_SECOND_ORDER_BWSEL_INTEG:10:11 */ 3970 PHYMOD_SYMBOL_FIELD_ENCODE(1462, 11, 10), 3971 /* TX_PI_EXT_PHASE_BWSEL_INTEG:12:14 */ 3972 PHYMOD_SYMBOL_FIELD_ENCODE(1422, 14, 12), 3973 /* TX_PI_SECOND_ORDER_LOOP_EN:15:15 */ 3974 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1463, 15, 15) 3975 }; 3976 static uint32_t BCMI_BLACKHAWK_XGXS_TX_PI_CTL1r_fields[] = 3977 { 3978 /* TX_PI_FREQ_OVERRIDE_VAL:0:14 */ 3979 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1430, 14, 0) 3980 }; 3981 static uint32_t BCMI_BLACKHAWK_XGXS_TX_PI_CTL2r_fields[] = 3982 { 3983 /* TX_PI_JIT_FREQ_IDX:0:5 */ 3984 PHYMOD_SYMBOL_FIELD_ENCODE(1444, 5, 0), 3985 /* TX_PI_JIT_AMP:8:13 */ 3986 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1443, 13, 8) 3987 }; 3988 static uint32_t BCMI_BLACKHAWK_XGXS_TX_PI_CTL3r_fields[] = 3989 { 3990 /* TX_PI_PHASE_OVERRIDE:0:0 */ 3991 PHYMOD_SYMBOL_FIELD_ENCODE(1454, 0, 0), 3992 /* TX_PI_PHASE_STROBE:1:1 */ 3993 PHYMOD_SYMBOL_FIELD_ENCODE(1457, 1, 1), 3994 /* TX_PI_PHASE_STEP_DIR:2:2 */ 3995 PHYMOD_SYMBOL_FIELD_ENCODE(1455, 2, 2), 3996 /* TX_PI_PHASE_INVERT:4:4 */ 3997 PHYMOD_SYMBOL_FIELD_ENCODE(1453, 4, 4), 3998 /* TX_PI_PHASE_STEP_NUM:8:11 */ 3999 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1456, 11, 8) 4000 }; 4001 static uint32_t BCMI_BLACKHAWK_XGXS_TX_PI_CTL4r_fields[] = 4002 { 4003 /* TX_PI_FRZ_FRC:0:0 */ 4004 PHYMOD_SYMBOL_FIELD_ENCODE(1431, 0, 0), 4005 /* TX_PI_FRZ_FRC_VAL:1:1 */ 4006 PHYMOD_SYMBOL_FIELD_ENCODE(1432, 1, 1), 4007 /* TX_PI_FRZ_MODE:2:2 */ 4008 PHYMOD_SYMBOL_FIELD_ENCODE(1433, 2, 2), 4009 /* TX_PI_RESET_CODE_DBG:3:3 */ 4010 PHYMOD_SYMBOL_FIELD_ENCODE(1460, 3, 3), 4011 /* TX_PI_FRZ_MODE_S1:4:4 */ 4012 PHYMOD_SYMBOL_FIELD_ENCODE(1434, 4, 4), 4013 /* TX_PI_SAMPLER_MAX_CNT:8:11 */ 4014 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1461, 11, 8) 4015 }; 4016 static uint32_t BCMI_BLACKHAWK_XGXS_TX_PI_CTL5r_fields[] = 4017 { 4018 /* TX_PI_HS_FIFO_PHSERR_INVERT:1:1 */ 4019 PHYMOD_SYMBOL_FIELD_ENCODE(1436, 1, 1), 4020 /* TX_PI_REPEATER_MODE_EN:2:2 */ 4021 PHYMOD_SYMBOL_FIELD_ENCODE(1459, 2, 2), 4022 /* TX_PI_EXT_PD_SEL:3:3 */ 4023 PHYMOD_SYMBOL_FIELD_ENCODE(1421, 3, 3), 4024 /* TX_PI_HS_FIFO_PHSERR_SEL:4:4 */ 4025 PHYMOD_SYMBOL_FIELD_ENCODE(1437, 4, 4), 4026 /* TX_PI_EXT_PHASE_STEP_CNT_INVERT:5:5 */ 4027 PHYMOD_SYMBOL_FIELD_ENCODE(1424, 5, 5), 4028 /* TX_PI_EXT_PHASE_STEP_CNT_SEL:6:6 */ 4029 PHYMOD_SYMBOL_FIELD_ENCODE(1425, 6, 6), 4030 /* TX_PI_EXT_PHASE_STEP_CNT_FULL_BYPASS:7:7 */ 4031 PHYMOD_SYMBOL_FIELD_ENCODE(1423, 7, 7), 4032 /* AFE_TX_FIFO_RESETB:8:8 */ 4033 PHYMOD_SYMBOL_FIELD_ENCODE(19, 8, 8), 4034 /* AFE_TX_FIFO_RESETB_FRC:9:9 */ 4035 PHYMOD_SYMBOL_FIELD_ENCODE(20, 9, 9), 4036 /* TX_PI_PD_BYPASS_FLT:10:10 */ 4037 PHYMOD_SYMBOL_FIELD_ENCODE(1448, 10, 10), 4038 /* TX_PI_PD_BYPASS_VCO:11:11 */ 4039 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1449, 11, 11) 4040 }; 4041 static uint32_t BCMI_BLACKHAWK_XGXS_TX_PI_STS0r_fields[] = 4042 { 4043 /* TX_PI_PHASE_CNTR:0:7 */ 4044 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1450, 7, 0) 4045 }; 4046 static uint32_t BCMI_BLACKHAWK_XGXS_TX_PI_STS1r_fields[] = 4047 { 4048 /* TX_PI_INTEG1_REG:0:13 */ 4049 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1438, 13, 0) 4050 }; 4051 static uint32_t BCMI_BLACKHAWK_XGXS_TX_PI_STS2r_fields[] = 4052 { 4053 /* TX_PI_INTEG2_REG:0:14 */ 4054 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1439, 14, 0) 4055 }; 4056 static uint32_t BCMI_BLACKHAWK_XGXS_TX_PI_STS3r_fields[] = 4057 { 4058 /* TX_PI_PHASE_ERR:0:5 */ 4059 PHYMOD_SYMBOL_FIELD_ENCODE(1451, 5, 0), 4060 /* TX_PI_PHASE_ERR_S1:8:13 */ 4061 PHYMOD_SYMBOL_FIELD_ENCODE(1452, 13, 8), 4062 /* TX_PI_PHASE_SUM_CAPTURE_RESYNC_LH:15:15 */ 4063 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1458, 15, 15) 4064 }; 4065 static uint32_t BCMI_BLACKHAWK_XGXS_TX_PI_STS4r_fields[] = 4066 { 4067 /* TX_PI_HS_FIFO_PHSERR:0:0 */ 4068 PHYMOD_SYMBOL_FIELD_ENCODE(1435, 0, 0), 4069 /* ST_AFE_TX_FIFO_RESETB:1:1 */ 4070 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1250, 1, 1) 4071 }; 4072 static uint32_t BCMI_BLACKHAWK_XGXS_TX_PI_STS5r_fields[] = 4073 { 4074 /* TX_PI_INTEG2_REG_S1:0:14 */ 4075 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1440, 14, 0) 4076 }; 4077 static uint32_t BCMI_BLACKHAWK_XGXS_TX_PI_TX_FIFO_OVFB_STSr_fields[] = 4078 { 4079 /* TX_FIFO_OVFB:0:0 */ 4080 PHYMOD_SYMBOL_FIELD_ENCODE(1390, 0, 0), 4081 /* TX_FIFO_OVFB_FALL_EDGE_LH:1:1 */ 4082 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(1391, 1, 1) 4083 }; 4084 static uint32_t BCMI_BLACKHAWK_XGXS_TX_PMD_LN_MODE_STSr_fields[] = 4085 { 4086 /* PMD_TX_LANE_MODE:0:15 */ 4087 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(857, 15, 0) 4088 }; 4089 static uint32_t BCMI_BLACKHAWK_XGXS_UC_AHB_CTL0r_fields[] = 4090 { 4091 /* MICRO_RA_WRDATASIZE:0:1 */ 4092 PHYMOD_SYMBOL_FIELD_ENCODE(729, 1, 0), 4093 /* MICRO_RA_RDDATASIZE:4:5 */ 4094 PHYMOD_SYMBOL_FIELD_ENCODE(724, 5, 4), 4095 /* MICRO_RA_INIT:8:9 */ 4096 PHYMOD_SYMBOL_FIELD_ENCODE(720, 9, 8), 4097 /* MICRO_AUTOINC_WRADDR_EN:12:12 */ 4098 PHYMOD_SYMBOL_FIELD_ENCODE(627, 12, 12), 4099 /* MICRO_AUTOINC_RDADDR_EN:13:13 */ 4100 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(626, 13, 13) 4101 }; 4102 static uint32_t BCMI_BLACKHAWK_XGXS_UC_AHB_RDADDR_LSWr_fields[] = 4103 { 4104 /* MICRO_RA_RDADDR_LSW:0:15 */ 4105 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(722, 15, 0) 4106 }; 4107 static uint32_t BCMI_BLACKHAWK_XGXS_UC_AHB_RDADDR_MSWr_fields[] = 4108 { 4109 /* MICRO_RA_RDADDR_MSW:0:15 */ 4110 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(723, 15, 0) 4111 }; 4112 static uint32_t BCMI_BLACKHAWK_XGXS_UC_AHB_RDDATA_LSWr_fields[] = 4113 { 4114 /* MICRO_RA_RDDATA_LSW:0:15 */ 4115 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(725, 15, 0) 4116 }; 4117 static uint32_t BCMI_BLACKHAWK_XGXS_UC_AHB_RDDATA_MSWr_fields[] = 4118 { 4119 /* MICRO_RA_RDDATA_MSW:0:15 */ 4120 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(726, 15, 0) 4121 }; 4122 static uint32_t BCMI_BLACKHAWK_XGXS_UC_AHB_STS0r_fields[] = 4123 { 4124 /* MICRO_RA_INITDONE:0:0 */ 4125 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(721, 0, 0) 4126 }; 4127 static uint32_t BCMI_BLACKHAWK_XGXS_UC_AHB_WRADDR_LSWr_fields[] = 4128 { 4129 /* MICRO_RA_WRADDR_LSW:0:15 */ 4130 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(727, 15, 0) 4131 }; 4132 static uint32_t BCMI_BLACKHAWK_XGXS_UC_AHB_WRADDR_MSWr_fields[] = 4133 { 4134 /* MICRO_RA_WRADDR_MSW:0:15 */ 4135 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(728, 15, 0) 4136 }; 4137 static uint32_t BCMI_BLACKHAWK_XGXS_UC_AHB_WRDATA_LSWr_fields[] = 4138 { 4139 /* MICRO_RA_WRDATA_LSW:0:15 */ 4140 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(730, 15, 0) 4141 }; 4142 static uint32_t BCMI_BLACKHAWK_XGXS_UC_AHB_WRDATA_MSWr_fields[] = 4143 { 4144 /* MICRO_RA_WRDATA_MSW:0:15 */ 4145 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(731, 15, 0) 4146 }; 4147 static uint32_t BCMI_BLACKHAWK_XGXS_UC_CLK_CTL0r_fields[] = 4148 { 4149 /* MICRO_MASTER_CLK_EN:0:0 */ 4150 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(681, 0, 0) 4151 }; 4152 static uint32_t BCMI_BLACKHAWK_XGXS_UC_PRAMIF_AHB_WRADDR_LSWr_fields[] = 4153 { 4154 /* MICRO_PRAMIF_AHB_WRADDR_LSW:2:15 */ 4155 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(703, 15, 2) 4156 }; 4157 static uint32_t BCMI_BLACKHAWK_XGXS_UC_PRAMIF_AHB_WRADDR_MSWr_fields[] = 4158 { 4159 /* MICRO_PRAMIF_AHB_WRADDR_MSW:0:15 */ 4160 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(704, 15, 0) 4161 }; 4162 static uint32_t BCMI_BLACKHAWK_XGXS_UC_PRAMIF_CTL0r_fields[] = 4163 { 4164 /* MICRO_PRAMIF_EN:0:0 */ 4165 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(705, 0, 0) 4166 }; 4167 static uint32_t BCMI_BLACKHAWK_XGXS_UC_PVT_STS0r_fields[] = 4168 { 4169 /* MICRO_PVT_TEMPDATA_RMI:0:9 */ 4170 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(712, 9, 0) 4171 }; 4172 static uint32_t BCMI_BLACKHAWK_XGXS_UC_RAM_CTL0r_fields[] = 4173 { 4174 /* MICRO_CR_ACCESS_EN:0:0 */ 4175 PHYMOD_SYMBOL_FIELD_ENCODE(642, 0, 0), 4176 /* MICRO_CR_IGNORE_MICRO_CODE_WRITES:1:1 */ 4177 PHYMOD_SYMBOL_FIELD_ENCODE(652, 1, 1), 4178 /* MICRO_CR_RAIF_PRTSEL:2:2 */ 4179 PHYMOD_SYMBOL_FIELD_ENCODE(655, 2, 2), 4180 /* MICRO_CR_PRIF_PRTSEL:3:3 */ 4181 PHYMOD_SYMBOL_FIELD_ENCODE(654, 3, 3), 4182 /* MICRO_CR_LOWPOWER_EN:7:7 */ 4183 PHYMOD_SYMBOL_FIELD_ENCODE(653, 7, 7), 4184 /* MICRO_DR_ACCESS_EN:8:8 */ 4185 PHYMOD_SYMBOL_FIELD_ENCODE(664, 8, 8), 4186 /* MICRO_DR_IGNORE_MICRO_CODE_WRITES:9:9 */ 4187 PHYMOD_SYMBOL_FIELD_ENCODE(670, 9, 9), 4188 /* MICRO_DR_RAIF_PRTSEL:10:10 */ 4189 PHYMOD_SYMBOL_FIELD_ENCODE(673, 10, 10), 4190 /* MICRO_DR_PRIF_PRTSEL:11:11 */ 4191 PHYMOD_SYMBOL_FIELD_ENCODE(672, 11, 11), 4192 /* MICRO_DR_LOWPOWER_EN:15:15 */ 4193 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(671, 15, 15) 4194 }; 4195 static uint32_t BCMI_BLACKHAWK_XGXS_UC_RAM_CTL1r_fields[] = 4196 { 4197 /* MICRO_CR_DATA_SIZE:0:6 */ 4198 PHYMOD_SYMBOL_FIELD_ENCODE(647, 6, 0), 4199 /* MICRO_DR_CODE_SIZE:8:14 */ 4200 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(665, 14, 8) 4201 }; 4202 static uint32_t BCMI_BLACKHAWK_XGXS_UC_RAM_CTL2r_fields[] = 4203 { 4204 /* MICRO_CORE_STACK_SIZE:2:13 */ 4205 PHYMOD_SYMBOL_FIELD_ENCODE(641, 13, 2), 4206 /* MICRO_CORE_STACK_EN:15:15 */ 4207 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(640, 15, 15) 4208 }; 4209 static uint32_t BCMI_BLACKHAWK_XGXS_UC_RAM_ECCCTL0r_fields[] = 4210 { 4211 /* MICRO_CR_ECCG_MODE:0:0 */ 4212 PHYMOD_SYMBOL_FIELD_ENCODE(648, 0, 0), 4213 /* MICRO_CR_ECC_FRC_DISABLE:1:1 */ 4214 PHYMOD_SYMBOL_FIELD_ENCODE(651, 1, 1), 4215 /* MICRO_CR_ECC_CORRUPT:2:3 */ 4216 PHYMOD_SYMBOL_FIELD_ENCODE(649, 3, 2), 4217 /* MICRO_CR_ECC_DEBUG_PRTSEL:4:4 */ 4218 PHYMOD_SYMBOL_FIELD_ENCODE(650, 4, 4), 4219 /* MICRO_DR_ECCG_MODE:8:8 */ 4220 PHYMOD_SYMBOL_FIELD_ENCODE(666, 8, 8), 4221 /* MICRO_DR_ECC_FRC_DISABLE:9:9 */ 4222 PHYMOD_SYMBOL_FIELD_ENCODE(669, 9, 9), 4223 /* MICRO_DR_ECC_CORRUPT:10:11 */ 4224 PHYMOD_SYMBOL_FIELD_ENCODE(667, 11, 10), 4225 /* MICRO_DR_ECC_DEBUG_PRTSEL:12:12 */ 4226 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(668, 12, 12) 4227 }; 4228 static uint32_t BCMI_BLACKHAWK_XGXS_UC_RAM_ECCCTL1r_fields[] = 4229 { 4230 /* MICRO_RA_ECC_WRDATA:0:6 */ 4231 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(719, 6, 0) 4232 }; 4233 static uint32_t BCMI_BLACKHAWK_XGXS_UC_RAM_ECCSTS0r_fields[] = 4234 { 4235 /* MICRO_RMI_CR_ECC_ADDRESS_STATUS:2:15 */ 4236 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(732, 15, 2) 4237 }; 4238 static uint32_t BCMI_BLACKHAWK_XGXS_UC_RAM_ECCSTS1r_fields[] = 4239 { 4240 /* MICRO_RA_ECC_RDDATA:0:6 */ 4241 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(718, 6, 0) 4242 }; 4243 static uint32_t BCMI_BLACKHAWK_XGXS_UC_RAM_ECCSTS2r_fields[] = 4244 { 4245 /* MICRO_RMI_DR_ECC_ADDRESS_STATUS:2:14 */ 4246 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(740, 14, 2) 4247 }; 4248 static uint32_t BCMI_BLACKHAWK_XGXS_UC_RAM_TESTIFCTL0r_fields[] = 4249 { 4250 /* MICRO_CR_TM:0:8 */ 4251 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(656, 8, 0) 4252 }; 4253 static uint32_t BCMI_BLACKHAWK_XGXS_UC_RAM_TESTIFCTL1r_fields[] = 4254 { 4255 /* MICRO_DR_TM:0:8 */ 4256 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(674, 8, 0) 4257 }; 4258 static uint32_t BCMI_BLACKHAWK_XGXS_UC_RMI_AHB_CTL1r_fields[] = 4259 { 4260 /* MICRO_PMI_HP_ACK_TIMEOUT_DIS:0:0 */ 4261 PHYMOD_SYMBOL_FIELD_ENCODE(691, 0, 0), 4262 /* MICRO_RA_ARG_MICROBLK_SEL:4:6 */ 4263 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(713, 6, 4) 4264 }; 4265 static uint32_t BCMI_BLACKHAWK_XGXS_UC_RMI_AHB_STS1r_fields[] = 4266 { 4267 /* MICRO_RMI_DEFAULT_SLAVE_ERROR:0:0 */ 4268 PHYMOD_SYMBOL_FIELD_ENCODE(739, 0, 0), 4269 /* MICRO_PR_DEFAULT_SLAVE_ERROR:1:1 */ 4270 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(709, 1, 1) 4271 }; 4272 static uint32_t BCMI_BLACKHAWK_XGXS_UC_RMI_EXT_INTR_CTL0r_fields[] = 4273 { 4274 /* MICRO_RMI_CR_ECC_CORR_ERR_INTR_EN:0:0 */ 4275 PHYMOD_SYMBOL_FIELD_ENCODE(733, 0, 0), 4276 /* MICRO_RMI_CR_ECC_UNCORR_ERR_INTR_EN:1:1 */ 4277 PHYMOD_SYMBOL_FIELD_ENCODE(737, 1, 1), 4278 /* MICRO_RMI_CR_ECC_MULTIROW_ERR_INTR_EN:2:2 */ 4279 PHYMOD_SYMBOL_FIELD_ENCODE(735, 2, 2), 4280 /* MICRO_RMI_DR_ECC_CORR_ERR_INTR_EN:4:4 */ 4281 PHYMOD_SYMBOL_FIELD_ENCODE(741, 4, 4), 4282 /* MICRO_RMI_DR_ECC_UNCORR_ERR_INTR_EN:5:5 */ 4283 PHYMOD_SYMBOL_FIELD_ENCODE(745, 5, 5), 4284 /* MICRO_RMI_DR_ECC_MULTIROW_ERR_INTR_EN:6:6 */ 4285 PHYMOD_SYMBOL_FIELD_ENCODE(743, 6, 6), 4286 /* MICRO_RMI_M0P_LOCKUP_INTR_EN:8:8 */ 4287 PHYMOD_SYMBOL_FIELD_ENCODE(747, 8, 8), 4288 /* MICRO_RMI_M0P_SYSTEMRESETREQ_INTR_EN:9:9 */ 4289 PHYMOD_SYMBOL_FIELD_ENCODE(750, 9, 9), 4290 /* MICRO_RMI_MBOX_MSGOUT_INTR_EN:10:10 */ 4291 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(753, 10, 10) 4292 }; 4293 static uint32_t BCMI_BLACKHAWK_XGXS_UC_RMI_EXT_INTR_STS0r_fields[] = 4294 { 4295 /* MICRO_RMI_CR_ECC_CORR_ERR_STATUS:0:0 */ 4296 PHYMOD_SYMBOL_FIELD_ENCODE(734, 0, 0), 4297 /* MICRO_RMI_CR_ECC_UNCORR_ERR_STATUS:1:1 */ 4298 PHYMOD_SYMBOL_FIELD_ENCODE(738, 1, 1), 4299 /* MICRO_RMI_CR_ECC_MULTIROW_ERR_STATUS:2:2 */ 4300 PHYMOD_SYMBOL_FIELD_ENCODE(736, 2, 2), 4301 /* MICRO_RMI_DR_ECC_CORR_ERR_STATUS:4:4 */ 4302 PHYMOD_SYMBOL_FIELD_ENCODE(742, 4, 4), 4303 /* MICRO_RMI_DR_ECC_UNCORR_ERR_STATUS:5:5 */ 4304 PHYMOD_SYMBOL_FIELD_ENCODE(746, 5, 5), 4305 /* MICRO_RMI_DR_ECC_MULTIROW_ERR_STATUS:6:6 */ 4306 PHYMOD_SYMBOL_FIELD_ENCODE(744, 6, 6), 4307 /* MICRO_RMI_M0P_LOCKUP_STATUS_OR:8:8 */ 4308 PHYMOD_SYMBOL_FIELD_ENCODE(749, 8, 8), 4309 /* MICRO_RMI_M0P_SYSTEMRESETREQ_STATUS_OR:9:9 */ 4310 PHYMOD_SYMBOL_FIELD_ENCODE(752, 9, 9), 4311 /* MICRO_RMI_MBOX_MSGOUT_STATUS_OR:10:10 */ 4312 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(755, 10, 10) 4313 }; 4314 static uint32_t BCMI_BLACKHAWK_XGXS_UC_RMI_PMI_IF_CTL0r_fields[] = 4315 { 4316 /* MICRO_PMI_HP_FAST_READ_EN:0:0 */ 4317 PHYMOD_SYMBOL_FIELD_ENCODE(699, 0, 0), 4318 /* MICRO_PMI_HP_FAST_BKTOBK_EN:2:2 */ 4319 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(698, 2, 2) 4320 }; 4321 static uint32_t BCMI_BLACKHAWK_XGXS_UC_RMI_PR_AINC_NXT_WRADDR_LSWr_fields[] = 4322 { 4323 /* MICRO_PR_AUTOINC_NXT_WRADDR_LSW:0:15 */ 4324 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(707, 15, 0) 4325 }; 4326 static uint32_t BCMI_BLACKHAWK_XGXS_UC_RMI_PVT_CTL0r_fields[] = 4327 { 4328 /* MICRO_PVT_TEMPDATA_FRCVAL:0:9 */ 4329 PHYMOD_SYMBOL_FIELD_ENCODE(711, 9, 0), 4330 /* MICRO_PVT_TEMPDATA_FRC:12:12 */ 4331 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(710, 12, 12) 4332 }; 4333 static uint32_t BCMI_BLACKHAWK_XGXS_UC_RMI_RAM_CR_CRCCTL0r_fields[] = 4334 { 4335 /* MICRO_CR_CRC_CALC_EN:0:0 */ 4336 PHYMOD_SYMBOL_FIELD_ENCODE(643, 0, 0), 4337 /* MICRO_CR_CRC_INIT:1:1 */ 4338 PHYMOD_SYMBOL_FIELD_ENCODE(645, 1, 1), 4339 /* MICRO_CR_CRC_PRTSEL:2:2 */ 4340 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(646, 2, 2) 4341 }; 4342 static uint32_t BCMI_BLACKHAWK_XGXS_UC_RMI_RAM_CR_CRCSTS0r_fields[] = 4343 { 4344 /* MICRO_CR_CRC_CHECKSUM:0:15 */ 4345 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(644, 15, 0) 4346 }; 4347 static uint32_t BCMI_BLACKHAWK_XGXS_UC_RMI_RA_AINC_NXT_RDADDR_LSWr_fields[] = 4348 { 4349 /* MICRO_RA_AUTOINC_NXT_RDADDR_LSW:0:15 */ 4350 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(714, 15, 0) 4351 }; 4352 static uint32_t BCMI_BLACKHAWK_XGXS_UC_RMI_RA_AINC_NXT_WRADDR_LSWr_fields[] = 4353 { 4354 /* MICRO_RA_AUTOINC_NXT_WRADDR_LSW:0:15 */ 4355 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(716, 15, 0) 4356 }; 4357 static uint32_t BCMI_BLACKHAWK_XGXS_UC_RMI_SILICON_DBG_CTL0r_fields[] = 4358 { 4359 /* MICRO_SILICON_DEBUG_STATUS_MUX_SEL:0:2 */ 4360 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(757, 2, 0) 4361 }; 4362 static uint32_t BCMI_BLACKHAWK_XGXS_UC_RMI_SILICON_DBG_STS0r_fields[] = 4363 { 4364 /* MICRO_SILICON_DEBUG_STATUS_MUXED_DATA:0:15 */ 4365 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(756, 15, 0) 4366 }; 4367 static uint32_t BCMI_BLACKHAWK_XGXS_UC_RMI_UC_DBGGER_CTL0r_fields[] = 4368 { 4369 /* MICRO_DEBUGGER_ID_FRCVAL:0:7 */ 4370 PHYMOD_SYMBOL_FIELD_ENCODE(659, 7, 0), 4371 /* MICRO_DEBUGGER_ID_FRC:15:15 */ 4372 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(658, 15, 15) 4373 }; 4374 static uint32_t BCMI_BLACKHAWK_XGXS_UC_RMI_UC_DBGGER_ID_LSWr_fields[] = 4375 { 4376 /* MICRO_DEBUGGER_ID_LSW:0:15 */ 4377 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(660, 15, 0) 4378 }; 4379 static uint32_t BCMI_BLACKHAWK_XGXS_UC_RMI_UC_DBGGER_ID_MSWr_fields[] = 4380 { 4381 /* MICRO_DEBUGGER_ID_MSW:0:11 */ 4382 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(661, 11, 0) 4383 }; 4384 static uint32_t BCMI_BLACKHAWK_XGXS_UC_RMI_UC_HARDFAULT_CTL0r_fields[] = 4385 { 4386 /* MICRO_PMI_HP_ERROR_INTR_EN:0:0 */ 4387 PHYMOD_SYMBOL_FIELD_ENCODE(696, 0, 0), 4388 /* MICRO_PMI_HP_WORD_ACCESS_ERR_INTR_EN:1:1 */ 4389 PHYMOD_SYMBOL_FIELD_ENCODE(701, 1, 1), 4390 /* MICRO_PMI_HP_ACK_TIMEOUT_INTR_EN:2:2 */ 4391 PHYMOD_SYMBOL_FIELD_ENCODE(693, 2, 2), 4392 /* MICRO_M0P_DEFAULT_SLAVE_ERROR_INTR_EN:3:3 */ 4393 PHYMOD_SYMBOL_FIELD_ENCODE(676, 3, 3), 4394 /* MICRO_PMI_HP_ERROR_HRESP_EN:8:8 */ 4395 PHYMOD_SYMBOL_FIELD_ENCODE(695, 8, 8), 4396 /* MICRO_PMI_HP_WORD_ACCESS_ERR_HRESP_EN:9:9 */ 4397 PHYMOD_SYMBOL_FIELD_ENCODE(700, 9, 9), 4398 /* MICRO_PMI_HP_ACK_TIMEOUT_HRESP_EN:10:10 */ 4399 PHYMOD_SYMBOL_FIELD_ENCODE(692, 10, 10), 4400 /* MICRO_M0P_DEFAULT_SLAVE_ERROR_HRESP_EN:11:11 */ 4401 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(675, 11, 11) 4402 }; 4403 static uint32_t BCMI_BLACKHAWK_XGXS_UC_RMI_UC_MISC_STS0r_fields[] = 4404 { 4405 /* MICRO_RA_AUTOINC_NXT_WRADDR_MSB:0:0 */ 4406 PHYMOD_SYMBOL_FIELD_ENCODE(717, 0, 0), 4407 /* MICRO_RA_AUTOINC_NXT_RDADDR_MSB:2:2 */ 4408 PHYMOD_SYMBOL_FIELD_ENCODE(715, 2, 2), 4409 /* MICRO_PR_AUTOINC_NXT_WRADDR_MSB:4:4 */ 4410 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(708, 4, 4) 4411 }; 4412 static uint32_t BCMI_BLACKHAWK_XGXS_UC_RMI_UC_MSG_CTL0r_fields[] = 4413 { 4414 /* MICRO_MSG0:0:15 */ 4415 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(684, 15, 0) 4416 }; 4417 static uint32_t BCMI_BLACKHAWK_XGXS_UC_RMI_UC_MSG_CTL1r_fields[] = 4418 { 4419 /* MICRO_MSG1:0:15 */ 4420 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(685, 15, 0) 4421 }; 4422 static uint32_t BCMI_BLACKHAWK_XGXS_UC_RMI_UC_MSG_CTL2r_fields[] = 4423 { 4424 /* MICRO_MSG2:0:15 */ 4425 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(686, 15, 0) 4426 }; 4427 static uint32_t BCMI_BLACKHAWK_XGXS_UC_RMI_UC_MSG_CTL3r_fields[] = 4428 { 4429 /* MICRO_MSG3:0:15 */ 4430 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(687, 15, 0) 4431 }; 4432 static uint32_t BCMI_BLACKHAWK_XGXS_UC_RMI_UC_SDK_STS0r_fields[] = 4433 { 4434 /* MICRO_UC_ACTIVE_0:0:0 */ 4435 PHYMOD_SYMBOL_FIELD_ENCODE(767, 0, 0), 4436 /* MICRO_UC_ACTIVE_1:1:1 */ 4437 PHYMOD_SYMBOL_FIELD_ENCODE(768, 1, 1), 4438 /* MICRO_UC_ACTIVE_2:2:2 */ 4439 PHYMOD_SYMBOL_FIELD_ENCODE(769, 2, 2), 4440 /* MICRO_UC_ACTIVE_3:3:3 */ 4441 PHYMOD_SYMBOL_FIELD_ENCODE(770, 3, 3), 4442 /* MICRO_NUM_UC_CORES:12:15 */ 4443 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(688, 15, 12) 4444 }; 4445 static uint32_t BCMI_BLACKHAWK_XGXS_UC_RST_CTL0r_fields[] = 4446 { 4447 /* MICRO_MASTER_RSTB:0:0 */ 4448 PHYMOD_SYMBOL_FIELD_ENCODE(682, 0, 0), 4449 /* MICRO_SW_TIMESTAMP_TIMER_RSTB:14:14 */ 4450 PHYMOD_SYMBOL_FIELD_ENCODE(765, 14, 14), 4451 /* MICRO_PRAM_IF_RSTB:15:15 */ 4452 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(706, 15, 15) 4453 }; 4454 static uint32_t BCMI_BLACKHAWK_XGXS_UC_UC_CORE_CFG_FWAPI_DATA0r_fields[] = 4455 { 4456 /* MICRO_CORE_CFG_FWAPI_DATA0:0:15 */ 4457 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(635, 15, 0) 4458 }; 4459 static uint32_t BCMI_BLACKHAWK_XGXS_UC_UC_CORE_CFG_FW_API_DATA1r_fields[] = 4460 { 4461 /* MICRO_CORE_CFG_FWAPI_DATA1:0:15 */ 4462 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(636, 15, 0) 4463 }; 4464 static uint32_t BCMI_BLACKHAWK_XGXS_UC_UC_CORE_CLK_CTL0r_fields[] = 4465 { 4466 /* MICRO_CORE_CLK_EN:0:0 */ 4467 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(637, 0, 0) 4468 }; 4469 static uint32_t BCMI_BLACKHAWK_XGXS_UC_UC_CORE_CTL0r_fields[] = 4470 { 4471 /* MICRO_CORE_LN_SEL:0:7 */ 4472 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(638, 7, 0) 4473 }; 4474 static uint32_t BCMI_BLACKHAWK_XGXS_UC_UC_CORE_LOW_PWR_CTL0r_fields[] = 4475 { 4476 /* MICRO_WICENREQ:0:0 */ 4477 PHYMOD_SYMBOL_FIELD_ENCODE(772, 0, 0), 4478 /* MICRO_SLEEPHOLDREQ_N:1:1 */ 4479 PHYMOD_SYMBOL_FIELD_ENCODE(761, 1, 1), 4480 /* MICRO_M0P_GCLK_FRCVAL:2:2 */ 4481 PHYMOD_SYMBOL_FIELD_ENCODE(679, 2, 2), 4482 /* MICRO_M0P_GCLK_FRC:3:3 */ 4483 PHYMOD_SYMBOL_FIELD_ENCODE(678, 3, 3), 4484 /* MICRO_M0P_WAKEUP:4:4 */ 4485 PHYMOD_SYMBOL_FIELD_ENCODE(680, 4, 4), 4486 /* MICRO_DP_RCLK20_RST_WAKEUP_EN:5:5 */ 4487 PHYMOD_SYMBOL_FIELD_ENCODE(663, 5, 5), 4488 /* MICRO_PMD_SIGNAL_DETECT_WAKEUP_EN:6:6 */ 4489 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(690, 6, 6) 4490 }; 4491 static uint32_t BCMI_BLACKHAWK_XGXS_UC_UC_CORE_LOW_PWR_STS0r_fields[] = 4492 { 4493 /* MICRO_WICENACK:0:0 */ 4494 PHYMOD_SYMBOL_FIELD_ENCODE(771, 0, 0), 4495 /* MICRO_SLEEPHOLDACK_N:1:1 */ 4496 PHYMOD_SYMBOL_FIELD_ENCODE(760, 1, 1), 4497 /* MICRO_SLEEPING:2:2 */ 4498 PHYMOD_SYMBOL_FIELD_ENCODE(762, 2, 2), 4499 /* MICRO_SLEEPDEEP:3:3 */ 4500 PHYMOD_SYMBOL_FIELD_ENCODE(758, 3, 3), 4501 /* MICRO_SLEEPING_LH:4:4 */ 4502 PHYMOD_SYMBOL_FIELD_ENCODE(763, 4, 4), 4503 /* MICRO_SLEEPDEEP_LH:5:5 */ 4504 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(759, 5, 5) 4505 }; 4506 static uint32_t BCMI_BLACKHAWK_XGXS_UC_UC_CORE_MBOX_CTL0r_fields[] = 4507 { 4508 /* MICRO_MBOX_MSGIN_INTR:0:0 */ 4509 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(683, 0, 0) 4510 }; 4511 static uint32_t BCMI_BLACKHAWK_XGXS_UC_UC_CORE_RST_CTL0r_fields[] = 4512 { 4513 /* MICRO_CORE_RSTB:0:0 */ 4514 PHYMOD_SYMBOL_FIELD_ENCODE(639, 0, 0), 4515 /* MICRO_DAP_PORESET_S_RSTB:14:14 */ 4516 PHYMOD_SYMBOL_FIELD_ENCODE(657, 14, 14), 4517 /* MICRO_SW_PMI_HP_RSTB:15:15 */ 4518 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(764, 15, 15) 4519 }; 4520 static uint32_t BCMI_BLACKHAWK_XGXS_UC_UC_CORE_STS0r_fields[] = 4521 { 4522 /* MICRO_PMI_HP_ERROR_STATUS:0:0 */ 4523 PHYMOD_SYMBOL_FIELD_ENCODE(697, 0, 0), 4524 /* MICRO_PMI_HP_WORD_ACCESS_ERR_STATUS:1:1 */ 4525 PHYMOD_SYMBOL_FIELD_ENCODE(702, 1, 1), 4526 /* MICRO_PMI_HP_ACK_TIMEOUT_STATUS:2:2 */ 4527 PHYMOD_SYMBOL_FIELD_ENCODE(694, 2, 2), 4528 /* MICRO_M0P_DEFAULT_SLAVE_ERROR_STATUS:3:3 */ 4529 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(677, 3, 3) 4530 }; 4531 static uint32_t BCMI_BLACKHAWK_XGXS_UC_UC_CORE_STS1r_fields[] = 4532 { 4533 /* MICRO_RMI_M0P_LOCKUP_STATUS:0:0 */ 4534 PHYMOD_SYMBOL_FIELD_ENCODE(748, 0, 0), 4535 /* MICRO_RMI_M0P_SYSTEMRESETREQ_STATUS:1:1 */ 4536 PHYMOD_SYMBOL_FIELD_ENCODE(751, 1, 1), 4537 /* MICRO_RMI_MBOX_MSGOUT_STATUS:2:2 */ 4538 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(754, 2, 2) 4539 }; 4540 static uint32_t BCMI_BLACKHAWK_XGXS_UC_UC_CORE_STS2r_fields[] = 4541 { 4542 /* MICRO_DP_RCLK20_RST_STATUS_LH:0:7 */ 4543 PHYMOD_SYMBOL_FIELD_ENCODE(662, 7, 0), 4544 /* MICRO_PMD_SIGNAL_DETECT_STATUS_LH:8:15 */ 4545 PHYMOD_SYMBOL_FIELD_FLAG_LAST | PHYMOD_SYMBOL_FIELD_ENCODE(689, 15, 8) 4546 }; 4547 4548 4549 4550 /******************************************************************************* 4551 * 4552 * The following is the field name table. 4553 */ 4554 #if PHYMOD_CONFIG_INCLUDE_FIELD_NAMES == 1 4555 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_NAMES_BCMI_BLACKHAWK_XGXS 4556 const char* bcmi_blackhawk_xgxs_fields[] = 4557 { 4558 "ACQ_CDR_TIMEOUT", 4559 "AFE_LMS_THRESH_BIN", 4560 "AFE_RX_PWRDN", 4561 "AFE_RX_PWRDN_FRC", 4562 "AFE_RX_PWRDN_FRC_VAL", 4563 "AFE_RX_RCLK20_PWRDN", 4564 "AFE_RX_RCLK20_PWRDN_FRC", 4565 "AFE_RX_RCLK20_PWRDN_FRC_VAL", 4566 "AFE_RX_RESET", 4567 "AFE_RX_RESET_FRC", 4568 "AFE_RX_RESET_FRC_VAL", 4569 "AFE_SIGDET", 4570 "AFE_SIGDET_CHANGE", 4571 "AFE_SIGDET_PWRDN", 4572 "AFE_SIGDET_THRESH", 4573 "AFE_SIGNAL_DETECT_DIS", 4574 "AFE_S_PLL_PWRDN", 4575 "AFE_S_PLL_RESET_FRC", 4576 "AFE_S_PLL_RESET_FRC_VAL", 4577 "AFE_TX_FIFO_RESETB", 4578 "AFE_TX_FIFO_RESETB_FRC", 4579 "AFE_TX_PWRDN", 4580 "AFE_TX_PWRDN_FRC", 4581 "AFE_TX_PWRDN_FRC_VAL", 4582 "AFE_TX_RESET", 4583 "AFE_TX_RESET_DEASSERT", 4584 "AFE_TX_RESET_FRC", 4585 "AFE_TX_RESET_FRC_VAL", 4586 "AMS_PLL_BGINT", 4587 "AMS_PLL_BGIP", 4588 "AMS_PLL_BGR_CTATADJ", 4589 "AMS_PLL_BGR_PTATADJ", 4590 "AMS_PLL_CLK4SYNC_DIV", 4591 "AMS_PLL_CLK4SYNC_EN", 4592 "AMS_PLL_COMP_THRESH", 4593 "AMS_PLL_CP_CMFDBK_IADJ", 4594 "AMS_PLL_DITHEREN", 4595 "AMS_PLL_DIV2", 4596 "AMS_PLL_DIV4", 4597 "AMS_PLL_DIV4_2_SEL", 4598 "AMS_PLL_DOUBLER_CAP", 4599 "AMS_PLL_DOUBLER_RES", 4600 "AMS_PLL_DRV_HV_DISABLE", 4601 "AMS_PLL_ENABLE_FTUNE", 4602 "AMS_PLL_FORCE_KVH_BW", 4603 "AMS_PLL_FORCE_RESCAL", 4604 "AMS_PLL_FP3_CTRL", 4605 "AMS_PLL_FP3_RH", 4606 "AMS_PLL_FRACN_BYPASS", 4607 "AMS_PLL_FRACN_DIV", 4608 "AMS_PLL_FRACN_DIVRANGE", 4609 "AMS_PLL_FRACN_DIV_17_16", 4610 "AMS_PLL_FRACN_NDIV_INT", 4611 "AMS_PLL_FRACN_SEL", 4612 "AMS_PLL_IMAX_IBIAS", 4613 "AMS_PLL_IMAX_ICK", 4614 "AMS_PLL_IMAX_ICMLDIV", 4615 "AMS_PLL_IMAX_ICOMP", 4616 "AMS_PLL_IMAX_ICP", 4617 "AMS_PLL_IMAX_IOP", 4618 "AMS_PLL_IMAX_IRXCLKBUF", 4619 "AMS_PLL_IMIN_IBIAS", 4620 "AMS_PLL_IMIN_ICK", 4621 "AMS_PLL_IMIN_ICMLDIV", 4622 "AMS_PLL_IMIN_ICOMP", 4623 "AMS_PLL_IMIN_ICP", 4624 "AMS_PLL_IMIN_IOP", 4625 "AMS_PLL_IMIN_IRXCLKBUF", 4626 "AMS_PLL_IMODE_IBIAS", 4627 "AMS_PLL_IMODE_ICK", 4628 "AMS_PLL_IMODE_ICMLDIV", 4629 "AMS_PLL_IMODE_ICOMP", 4630 "AMS_PLL_IMODE_ICP", 4631 "AMS_PLL_IMODE_IOP", 4632 "AMS_PLL_IMODE_IRXCLKBUF", 4633 "AMS_PLL_IQP", 4634 "AMS_PLL_IVCO", 4635 "AMS_PLL_KVH", 4636 "AMS_PLL_KVH_FORCE", 4637 "AMS_PLL_LOW", 4638 "AMS_PLL_LPF_RZ", 4639 "AMS_PLL_MAX_TEST_PORT_AMPLITUDE", 4640 "AMS_PLL_MIX3P1CR_CTATADJ", 4641 "AMS_PLL_MIX3P1CR_PTATADJ", 4642 "AMS_PLL_MIX3P1C_CALR_CTATADJ", 4643 "AMS_PLL_MIX3P1C_CALR_PTATADJ", 4644 "AMS_PLL_MODE", 4645 "AMS_PLL_NDIV_FRAC_VALID", 4646 "AMS_PLL_PFD_FB_SKEW", 4647 "AMS_PLL_PFD_REF_SKEW", 4648 "AMS_PLL_PFD_SKEW_ENLARGE", 4649 "AMS_PLL_PLL2RX_CLKBW", 4650 "AMS_PLL_PWRDN", 4651 "AMS_PLL_RANGE", 4652 "AMS_PLL_REFCLK_DOUBLER", 4653 "AMS_PLL_REFH_PLL", 4654 "AMS_PLL_REFL_PLL", 4655 "AMS_PLL_RESCAL_AUX", 4656 "AMS_PLL_RESET", 4657 "AMS_PLL_RTERM200", 4658 "AMS_PLL_RTERM300", 4659 "AMS_PLL_RTERM400", 4660 "AMS_PLL_RTERMHIZ", 4661 "AMS_PLL_RTERM_SEL", 4662 "AMS_PLL_RX_CLKRPTR_BIAS", 4663 "AMS_PLL_RX_CLKRPTR_BW", 4664 "AMS_PLL_RX_CLK_RPTR_PD", 4665 "AMS_PLL_SET_CLK4PCS", 4666 "AMS_PLL_SET_CLK4PCS_MSB", 4667 "AMS_PLL_SPARE_11_11", 4668 "AMS_PLL_SPARE_167_166", 4669 "AMS_PLL_SPARE_175_174", 4670 "AMS_PLL_SPARE_20_20", 4671 "AMS_PLL_TEST_FRACN_EN", 4672 "AMS_PLL_TEST_PLL", 4673 "AMS_PLL_TEST_PNP", 4674 "AMS_PLL_TEST_RX", 4675 "AMS_PLL_TEST_VC", 4676 "AMS_PLL_TEST_VCO2_CSSW", 4677 "AMS_PLL_TEST_VDDR4BG", 4678 "AMS_PLL_TEST_VREF", 4679 "AMS_PLL_TX_CLKRPTR_BIAS", 4680 "AMS_PLL_TX_CLKRPTR_BW", 4681 "AMS_PLL_TX_CLK_RPTR_PD", 4682 "AMS_PLL_VBYPASS", 4683 "AMS_PLL_VCO2_15G", 4684 "AMS_PLL_VCODIV_REFOUT", 4685 "AMS_PLL_VCOICTRL", 4686 "AMS_PLL_VCO_AUTOGM", 4687 "AMS_PLL_VCO_RES_CS", 4688 "AMS_PLL_VDD88_EN", 4689 "AMS_PLL_VDDR_BGB", 4690 "AMS_RX_BYPASS_AC_CAP", 4691 "AMS_RX_CLK_BW_CTRL", 4692 "AMS_RX_CLOCK_CAL_EN", 4693 "AMS_RX_CML_LP", 4694 "AMS_RX_CM_VOLTAGE_IBIAS", 4695 "AMS_RX_D2C_CLKBUF_IBIAS", 4696 "AMS_RX_DAC4CK_DAT_I", 4697 "AMS_RX_DAC4CK_DAT_Q", 4698 "AMS_RX_DAC4CK_LMS_I", 4699 "AMS_RX_DAC4CK_LMS_Q", 4700 "AMS_RX_DAC4CK_PHS_I", 4701 "AMS_RX_DAC4CK_PHS_Q", 4702 "AMS_RX_DATA_THRESH_SEL", 4703 "AMS_RX_DC_COUPLE", 4704 "AMS_RX_DC_OFFSET", 4705 "AMS_RX_DC_OFFSET_HALF_RANGE", 4706 "AMS_RX_DFESUM_BW", 4707 "AMS_RX_DFESUM_LP", 4708 "AMS_RX_DFE_HGAIN_EN", 4709 "AMS_RX_DFE_SLICER_IBIAS", 4710 "AMS_RX_DFE_SUMMER_VCM", 4711 "AMS_RX_DFE_SUM_BUF_IBIAS", 4712 "AMS_RX_DFE_TAP_WEIGHT_IBIAS", 4713 "AMS_RX_DLL_IBIAS", 4714 "AMS_RX_EN_TAP9DELAY", 4715 "AMS_RX_EQ_IND_DIS", 4716 "AMS_RX_EQ_LZ_EN", 4717 "AMS_RX_EQ_PKCOMP_DIS", 4718 "AMS_RX_FFE_ENABLE", 4719 "AMS_RX_FFE_SHA_IBIAS", 4720 "AMS_RX_FFE_SUMMER_TAP_IBIAS", 4721 "AMS_RX_FORCE_DC_OFFSET", 4722 "AMS_RX_MASTER_DIODES_IBIAS", 4723 "AMS_RX_MET_R_IBIAS", 4724 "AMS_RX_OFFSET_CORRECTION_IBIAS", 4725 "AMS_RX_OFFSET_CORRECTION_RESCAL_MUX", 4726 "AMS_RX_PD_CH_P1", 4727 "AMS_RX_PD_PHS_SLR", 4728 "AMS_RX_PEAKING_FILTER_IBIAS", 4729 "AMS_RX_PEAKING_FILTER_RESCAL_MUX", 4730 "AMS_RX_PF", 4731 "AMS_RX_PF3_CTRL", 4732 "AMS_RX_PF3_IBIAS", 4733 "AMS_RX_PF3_IND_DIS", 4734 "AMS_RX_PF3_LZ_EN", 4735 "AMS_RX_PF3_MAX_BW", 4736 "AMS_RX_PF3_PKCOMP_DIS", 4737 "AMS_RX_PF3_RESCAL_MUX", 4738 "AMS_RX_PHASE_INTERPOLATORS_IBIAS", 4739 "AMS_RX_PWRDN_FTAP", 4740 "AMS_RX_RXCLK32_EN", 4741 "AMS_RX_RXCLK66_EN", 4742 "AMS_RX_RX_OFFSET_PD", 4743 "AMS_RX_SD_CAL_EN", 4744 "AMS_RX_SD_CAL_NEG", 4745 "AMS_RX_SD_CAL_POLARITY", 4746 "AMS_RX_SD_CAL_POS", 4747 "AMS_RX_SEL_D2CLP", 4748 "AMS_RX_SEL_TH4DFE", 4749 "AMS_RX_SHORT_VGA_OUTPUT", 4750 "AMS_RX_SIGDET", 4751 "AMS_RX_SIGDET_IBIAS", 4752 "AMS_RX_SIGDET_PWRDN", 4753 "AMS_RX_SIGDET_THRESHOLD", 4754 "AMS_RX_SPARE_154", 4755 "AMS_RX_TESTCLK_DIV", 4756 "AMS_RX_TESTCLK_MUX", 4757 "AMS_RX_TPORT_EN", 4758 "AMS_RX_VGA", 4759 "AMS_RX_VGA0_IBIAS", 4760 "AMS_RX_VGA0_RESCAL_MUX", 4761 "AMS_RX_VGA1_IBIAS", 4762 "AMS_RX_VGA1_RESCAL_MUX", 4763 "AMS_RX_VGA2_IBIAS", 4764 "AMS_RX_VGA2_RESCAL_MUX", 4765 "AMS_RX_VGA3_IND", 4766 "AMS_RX_VGA_10G_BW", 4767 "AMS_RX_VGA_BW_CTRL_CAP", 4768 "AMS_RX_VGA_BW_CTRL_IND", 4769 "AMS_RX_VGA_STEP_MODE", 4770 "AMS_TX_ANA_RESCAL", 4771 "AMS_TX_CAL_AUX", 4772 "AMS_TX_CAL_OFF", 4773 "AMS_TX_DCC_DIS", 4774 "AMS_TX_DRIVER_RES_CAL", 4775 "AMS_TX_DRV_HV_DISABLE", 4776 "AMS_TX_ELEC_IDLE_AUX", 4777 "AMS_TX_HPF_CTRL", 4778 "AMS_TX_IBIAS", 4779 "AMS_TX_ILDO", 4780 "AMS_TX_IPHINT", 4781 "AMS_TX_LANE_ID", 4782 "AMS_TX_LDO_VREF", 4783 "AMS_TX_PDET_MODE", 4784 "AMS_TX_SEL_TXMASTER", 4785 "AMS_TX_SKEW_ENABLE", 4786 "AMS_TX_SKEW_PN", 4787 "AMS_TX_SKEW_POLARITY", 4788 "AMS_TX_SLEW_RATE", 4789 "AMS_TX_SPARE_13", 4790 "AMS_TX_SPARE_24_22", 4791 "AMS_TX_SPARE_34", 4792 "AMS_TX_SPARE_46_40", 4793 "AMS_TX_SPARE_5", 4794 "AMS_TX_SPARE_52_48", 4795 "AMS_TX_SPARE_54", 4796 "AMS_TX_SPARE_63_56", 4797 "AMS_TX_SPARE_9", 4798 "AMS_TX_TEST_DATA", 4799 "AMS_TX_TICKSEL", 4800 "AMS_TX_TXCLK32_EN", 4801 "AMS_TX_TXCLK66_EN", 4802 "AMS_TX_VDDR_BGB", 4803 "AMS_TX_VERSION_ID", 4804 "ANA_TIMER_T2", 4805 "BC_DEC_ALIGN_CHECK_SEC_EN", 4806 "BC_DEC_ALIGN_SEARCH_MANUAL_TIMER_DONE", 4807 "BC_DEC_ALIGN_TIMER_CNT", 4808 "BC_DEC_ALIGN_TIMER_MODE", 4809 "BC_DEC_EN", 4810 "BC_DEC_FRM_LEN_SEL", 4811 "BC_DEC_FRM_PAT", 4812 "BC_DEC_INTR", 4813 "BC_DEC_INTR_FRC_LOCK", 4814 "BC_DEC_INTR_FRC_MSG_LSB_READY", 4815 "BC_DEC_INTR_FRC_MSG_MSB_READY", 4816 "BC_DEC_INTR_FRC_OOL", 4817 "BC_DEC_INTR_LOCK", 4818 "BC_DEC_INTR_MASK_LOCK", 4819 "BC_DEC_INTR_MASK_MSG_LSB_READY", 4820 "BC_DEC_INTR_MASK_MSG_MSB_READY", 4821 "BC_DEC_INTR_MASK_OOL", 4822 "BC_DEC_INTR_MSG_LSB_READY", 4823 "BC_DEC_INTR_MSG_MSB_READY", 4824 "BC_DEC_INTR_OOL", 4825 "BC_DEC_LOCK", 4826 "BC_DEC_LOCK_CNT", 4827 "BC_DEC_MSG_CONS_CNT", 4828 "BC_DEC_MSG_LSB", 4829 "BC_DEC_MSG_LSB_READY", 4830 "BC_DEC_MSG_MSB", 4831 "BC_DEC_MSG_MSB_READY", 4832 "BC_DEC_MSG_TYPE_CNT", 4833 "BC_DEC_MSG_TYPE_CNT_READY", 4834 "BC_DEC_MSG_TYPE_MODE", 4835 "BC_DEC_OOL", 4836 "BC_DEC_OOL_CNT", 4837 "BC_DEC_REFRAME_EN", 4838 "BC_DEC_SM_STATE", 4839 "BC_DEC_SM_STATE_ONE_HOT", 4840 "BC_ENC_DATA_LSB", 4841 "BC_ENC_DATA_MSB", 4842 "BC_ENC_DATA_SENT", 4843 "BC_ENC_EN", 4844 "BC_ENC_ERR_INS_EN", 4845 "BC_ENC_FRM_LEN_SEL", 4846 "BC_ENC_UPDATE", 4847 "BLW_2X_MODE", 4848 "BLW_EN", 4849 "BLW_GAIN", 4850 "BLW_GAIN_FRC", 4851 "BLW_GAIN_FRC_VAL", 4852 "BLW_GAIN_FRZ", 4853 "BLW_GAIN_SAT_HIGH", 4854 "BLW_GAIN_SAT_LOW", 4855 "BLW_GAIN_SCALE", 4856 "BLW_LMS_MU", 4857 "BLW_LPF_COEF_EXP", 4858 "BLW_LPF_COEF_MANT", 4859 "BLW_MAX_AMP", 4860 "BLW_MAX_AMP_CLR", 4861 "BLW_MAX_AMP_SEL", 4862 "BLW_MU_DLY_MODE", 4863 "BLW_OUTPUT_INVERT", 4864 "BLW_OUTPUT_SCALE", 4865 "BLW_PHASE_SLICER_INVERT", 4866 "BLW_RESET", 4867 "BLW_SPARE_CNTL_0", 4868 "BLW_TRNSUM_SEL", 4869 "BR_PD_EN", 4870 "CAP_CNT_MASK_EN", 4871 "CAP_DONE", 4872 "CAP_DONE_LH_LL", 4873 "CAP_FORCE_SLOWDOWN", 4874 "CAP_FORCE_SLOWDOWN_EN", 4875 "CAP_PASS", 4876 "CAP_PASS_LH_LL", 4877 "CAP_RESTART", 4878 "CAP_RETRY_EN", 4879 "CAP_SELECT", 4880 "CAP_SELECT_M", 4881 "CAP_SELECT_M_EN", 4882 "CAP_SEQ_CYA", 4883 "CDR_1G_FORCE_EN", 4884 "CDR_1G_MANUAL_MODE", 4885 "CDR_1G_MANUAL_STROBE", 4886 "CDR_1G_PHASE_POINTER", 4887 "CDR_1G_SWAP_PZ", 4888 "CDR_BWSEL_INTEG_ACQCDR", 4889 "CDR_BWSEL_INTEG_EEE_ACQCDR", 4890 "CDR_BWSEL_INTEG_NORM", 4891 "CDR_BWSEL_PROP_ACQCDR", 4892 "CDR_BWSEL_PROP_EEE_ACQCDR", 4893 "CDR_BWSEL_PROP_NORM", 4894 "CDR_FREQ_EN", 4895 "CDR_FREQ_OVERRIDE_EN", 4896 "CDR_FREQ_OVERRIDE_VAL", 4897 "CDR_FRZ_FRC", 4898 "CDR_FRZ_FRC_VAL", 4899 "CDR_HS_FREEZE", 4900 "CDR_INTEG_REG", 4901 "CDR_INTEG_REG_CLR", 4902 "CDR_INTEG_SAT_SEL", 4903 "CDR_LM_OUTOFLOCK", 4904 "CDR_LM_THR_SEL", 4905 "CDR_PHASE_ERROR", 4906 "CDR_PHASE_ERR_FRZ", 4907 "CDR_PHASE_ERR_PICNT", 4908 "CDR_PHASE_SAT_CTRL", 4909 "CDR_PHASE_SEL", 4910 "CDR_POWER_OPT_CLOCK_GATE_EN", 4911 "CDR_PROP_BW_EXTEND", 4912 "CDR_SETTLE_TIMEOUT", 4913 "CDR_VCO_REG", 4914 "CDR_ZERO_POLARITY", 4915 "CL72_TIMER_EN", 4916 "CLK4SYNC_DIV2_COMCLK_SEL", 4917 "CLK4SYNC_DIV2_EN", 4918 "CLK4SYNC_DIV2_LOC", 4919 "CLK4SYNC_DIV2_LOC_MON_EN", 4920 "CLK4SYNC_DIV2_S_COMCLK_FRC_ON", 4921 "CLK4SYNC_DIV2_S_COMCLK_SEL", 4922 "CLK4SYNC_DIV2_VCO_SELECT", 4923 "CNT_BIN_D", 4924 "CNT_BIN_DQ", 4925 "CNT_BIN_D_LD", 4926 "CNT_BIN_D_PD", 4927 "CNT_BIN_D_PERR", 4928 "CNT_BIN_L", 4929 "CNT_BIN_LQ", 4930 "CNT_BIN_L_LD", 4931 "CNT_BIN_P", 4932 "CNT_BIN_PQ", 4933 "CNT_BIN_P_PD", 4934 "CORE_DP_RESET_STATE", 4935 "CORE_DP_S_RSTB", 4936 "CORE_HW_FW_HANDSHAKE_DISABLE", 4937 "CORE_REG_RESET_OCCURRED", 4938 "CORE_S_RSTB", 4939 "DAC_TEST_LANE_SEL_EN", 4940 "DAC_TEST_MEM_TM", 4941 "DAC_TEST_MEM_WRITE_PULSE", 4942 "DAC_TEST_READBACK_ADDRESS", 4943 "DAC_TEST_READBACK_DATA_0", 4944 "DAC_TEST_READBACK_DATA_1", 4945 "DAC_TEST_READBACK_DATA_2", 4946 "DAC_TEST_READBACK_DATA_3", 4947 "DAC_TEST_READBACK_DATA_4", 4948 "DAC_TEST_READBACK_DATA_5", 4949 "DAC_TEST_READBACK_DATA_6", 4950 "DAC_TEST_READBACK_DATA_7", 4951 "DAC_TEST_READBACK_DATA_8", 4952 "DAC_TEST_READBACK_EN", 4953 "DAC_TEST_READ_EN", 4954 "DAC_TEST_TEST_EN", 4955 "DBG_CAP_STATE_ONE_HOT", 4956 "DBG_FDBCK", 4957 "DBG_MASK_DIG_LPBK_EN", 4958 "DBG_PLL_STATE_ONE_HOT", 4959 "DBG_PMD_RX_LOCK", 4960 "DBG_PMD_RX_LOCK_CHANGE", 4961 "DBG_SLOWDN", 4962 "DBG_SLOWDN_CHANGE", 4963 "DC_OFFSET_BIN", 4964 "DC_OFFS_ACC_CLR", 4965 "DC_OFFS_BLW_PHASE_SEL", 4966 "DC_OFFS_DAC_8B_EN", 4967 "DC_OFFS_DAC_INTEG_EN", 4968 "DC_OFFS_EN", 4969 "DC_OFFS_GAIN", 4970 "DC_OFFS_GRADIENT_INVERT", 4971 "DC_OFFS_HYS_EN", 4972 "DC_OFFS_HYS_MAG", 4973 "DC_OFFS_INT_READ_EN", 4974 "DC_OFFS_WRITE_EN", 4975 "DC_OFFS_WRITE_FRC_EN", 4976 "DC_OFFS_WRITE_VAL", 4977 "DEC_SEARCH_EN", 4978 "DIG_LPBK_EN", 4979 "DIG_LPBK_PD_BIAS_EN", 4980 "DIG_LPBK_PD_EARLY_IND", 4981 "DIG_LPBK_PD_FLT_BYPASS", 4982 "DIG_LPBK_PD_LATE_IND", 4983 "DIG_LPBK_PD_MODE", 4984 "DISABLE_ACK_TIMEOUT", 4985 "DP_RESET_TX_DISABLE_DIS", 4986 "DSC_CLR_FRC", 4987 "DSC_CLR_FRC_VAL", 4988 "DSC_SM_GP_UC_REQ", 4989 "DSC_SM_READY_FOR_CMD", 4990 "DSC_SM_SCRATCH", 4991 "DSC_STATE", 4992 "DSC_STATE_EEE_ONE_HOT", 4993 "DSC_STATE_ONE_HOT", 4994 "DSC_TIMEOUT_MULT", 4995 "EEE_ACQ_CDR_TIMEOUT", 4996 "EEE_ANA_PWR_TIMEOUT", 4997 "EEE_CDR_SETTLE_TIMEOUT", 4998 "EEE_HW_TUNE_TIMEOUT", 4999 "EEE_LFSR_CNT", 5000 "EEE_MEASURE_CNT", 5001 "EEE_MEASURE_EN", 5002 "EEE_MODE_EN", 5003 "EEE_PHASE_ERR_OFFSET", 5004 "EEE_PHASE_ERR_OFFSET_EN", 5005 "EEE_QUIET_FROM_EEE_STATES", 5006 "EEE_QUIET_RX_AFE_PWRDWN_VAL", 5007 "ENERGY_DETECT", 5008 "ENERGY_DETECT_CHANGE", 5009 "ENERGY_DETECT_FRC", 5010 "ENERGY_DETECT_FRC_VAL", 5011 "ENERGY_DETECT_MASK_COUNT", 5012 "EXT_LOS_EN", 5013 "EXT_LOS_INV", 5014 "EXT_SIGDET", 5015 "EXT_SIGDET_CHANGE", 5016 "FAST_SEARCH_MODE", 5017 "FREQ_DET_RESTART_EN", 5018 "FREQ_DET_RETRY_EN", 5019 "FREQ_DONE_SM", 5020 "FREQ_DONE_SM_LH_LL", 5021 "FREQ_MONITOR_EN", 5022 "FREQ_PASS_SM", 5023 "FREQ_PASS_SM_LH_LL", 5024 "FREQ_UPD_EN_FRC", 5025 "FREQ_UPD_EN_FRC_VAL", 5026 "HEARTBEAT_COUNT_1US", 5027 "HOFFS_JGEN_EN", 5028 "HOFFS_JGEN_JIT_AMP", 5029 "HOFFS_JGEN_JIT_FREQ_IDX", 5030 "HOLD_LOS_COUNT", 5031 "HOLD_SD_COUNT", 5032 "HW_FW_HANDSHAKE_DISABLE", 5033 "HW_TUNE_EN", 5034 "HW_TUNE_TIMEOUT", 5035 "IGNORE_LP_MODE", 5036 "IGNORE_RX_MODE", 5037 "LANE_CFG_FWAPI_DATA0", 5038 "LANE_CFG_FWAPI_DATA1", 5039 "LANE_DP_RESET_STATE", 5040 "LANE_REG_RESET_OCCURRED", 5041 "LANE_RESET_RELEASED", 5042 "LANE_RESET_RELEASED_INDEX", 5043 "LINKTRN_ASYNC_PPM_ADJUST", 5044 "LINKTRN_BAD_MARKER_CNT", 5045 "LINKTRN_BLOCK_LP_IEEE_UPDATES", 5046 "LINKTRN_BRK_RING_OSC", 5047 "LINKTRN_CL93PRBS_POLY_SEL", 5048 "LINKTRN_DIS_MAX_WAIT_TIMER", 5049 "LINKTRN_DME_CELL_BOUNDARY_CHK", 5050 "LINKTRN_FFLOCK_DERR_CONSEC_FCNT", 5051 "LINKTRN_FFLOCK_DERR_PER_FCNT", 5052 "LINKTRN_FRAME_CONSISTENCY_CHK_EN", 5053 "LINKTRN_FRAME_LOCK", 5054 "LINKTRN_FRAME_LOCK_LH", 5055 "LINKTRN_FRAME_LOCK_LL", 5056 "LINKTRN_GOOD_MARKER_CNT", 5057 "LINKTRN_IEEE_FRAME_LOCK", 5058 "LINKTRN_IEEE_LD_COEFF_UPDATE", 5059 "LINKTRN_IEEE_LD_STATUS_REPORT", 5060 "LINKTRN_IEEE_LP_COEFF_UPDATE", 5061 "LINKTRN_IEEE_LP_STATUS_REPORT", 5062 "LINKTRN_IEEE_RECEIVER_STATUS", 5063 "LINKTRN_IEEE_RESTART_TRAINING", 5064 "LINKTRN_IEEE_TRAINING_ENABLE", 5065 "LINKTRN_IEEE_TRAINING_FAILURE", 5066 "LINKTRN_IEEE_TRAINING_STATUS", 5067 "LINKTRN_IGNORE_XMT_REG_VALUE", 5068 "LINKTRN_LD_XMT_STATUS_PAGE", 5069 "LINKTRN_LOCAL_RX_READY", 5070 "LINKTRN_MICRO_FFLOCK_INT_EN", 5071 "LINKTRN_MICRO_FFLOCK_LSTATUS", 5072 "LINKTRN_MICRO_FRAME_LOCK_INT_EN", 5073 "LINKTRN_MICRO_FRAME_LOCK_LSTATUS", 5074 "LINKTRN_MICRO_INTERRUPT_MASK_CONTROL_PAGE", 5075 "LINKTRN_MICRO_INTERRUPT_MASK_STATUS_PAGE", 5076 "LINKTRN_MICRO_STATUS_CHG_INT_EN", 5077 "LINKTRN_MICRO_STATUS_CHG_LSTATUS", 5078 "LINKTRN_MICRO_STATUS_RESP_INT_FRC", 5079 "LINKTRN_MICRO_STATUS_RESP_INT_FRC_VAL", 5080 "LINKTRN_MICRO_UPDATE_CHG_INT_EN", 5081 "LINKTRN_MICRO_UPDATE_CHG_LSTATUS", 5082 "LINKTRN_MICRO_UPDATE_REQ_INT_FRC", 5083 "LINKTRN_MICRO_UPDATE_REQ_INT_FRC_VAL", 5084 "LINKTRN_PAM4M_GRAYCODER_EN_FRC", 5085 "LINKTRN_PAM4M_GRAYCODER_EN_FRC_VAL", 5086 "LINKTRN_PAM4M_PRBS_REPL_MODE", 5087 "LINKTRN_PAM4M_PRECODER_EN", 5088 "LINKTRN_PAM4M_SYM_SEL", 5089 "LINKTRN_PAM4_SYMBOL_BIT_SWAP", 5090 "LINKTRN_PPM_OFFSET_EN", 5091 "LINKTRN_PRBS13_POLY_SEL", 5092 "LINKTRN_PRBS13_SEED_VAL", 5093 "LINKTRN_PRBS_MODE_SEL", 5094 "LINKTRN_PRBS_SEED_SEL", 5095 "LINKTRN_PRBS_SEED_VAL", 5096 "LINKTRN_RCV_COEFF_UPDATE_PARITY", 5097 "LINKTRN_RCV_STATUS_REPORT_PARITY", 5098 "LINKTRN_REMOTE_RX_READY", 5099 "LINKTRN_RX_ACTIVE", 5100 "LINKTRN_RX_DP_LN_CLK_EN", 5101 "LINKTRN_RX_PAM4_TRN_FRAME_SIZE", 5102 "LINKTRN_RX_PRBS_CHK_AUTO_DETECT_EN", 5103 "LINKTRN_RX_PRBS_CHK_AUTO_DETECT_LOCK", 5104 "LINKTRN_RX_PRBS_CHK_AUTO_DETECT_RELOCK_EN", 5105 "LINKTRN_RX_PRBS_CHK_EN", 5106 "LINKTRN_RX_PRBS_CHK_MODE_SEL", 5107 "LINKTRN_RX_PRBS_CHK_MODE_SEL_AUTO_DETECT", 5108 "LINKTRN_RX_SIGNAL_OK", 5109 "LINKTRN_RX_SIGNDATA_SEL", 5110 "LINKTRN_RX_TRAINING_EN", 5111 "LINKTRN_RX_TRN_MODE", 5112 "LINKTRN_SM_CURRENT_STATE", 5113 "LINKTRN_STRICT_DME_CHK", 5114 "LINKTRN_STRICT_MARKER_CHK", 5115 "LINKTRN_SW_FRAME_LOCK", 5116 "LINKTRN_SW_REMOTE_RX_READY", 5117 "LINKTRN_SW_RX_TRAINED", 5118 "LINKTRN_TIMER_VALUE_SEL", 5119 "LINKTRN_TRAINING_FSM_SIGNAL_DETECT", 5120 "LINKTRN_TR_COARSE_LOCK", 5121 "LINKTRN_TX_DP_LN_CLK_EN", 5122 "LINKTRN_TX_PAM4_TRN_FRAME_SIZE", 5123 "LINKTRN_TX_TRN_MODE", 5124 "LINKTRN_USEDME_MARKER_CHK", 5125 "LINKTRN_XMT_COEFF_UPDATE_PARITY", 5126 "LINKTRN_XMT_STATUS_REPORT_PARITY", 5127 "LINKTRN_XMT_UPDATE_PAGE", 5128 "LMS_RND_THRESH1", 5129 "LMS_RND_THRESH10", 5130 "LMS_RND_THRESH11", 5131 "LMS_RND_THRESH12", 5132 "LMS_RND_THRESH2", 5133 "LMS_RND_THRESH3", 5134 "LMS_RND_THRESH4", 5135 "LMS_RND_THRESH5", 5136 "LMS_RND_THRESH6", 5137 "LMS_RND_THRESH7", 5138 "LMS_RND_THRESH8", 5139 "LMS_RND_THRESH9", 5140 "LMS_THRESH_ACC_CLR", 5141 "LMS_THRESH_BIN", 5142 "LMS_THRESH_EN", 5143 "LMS_THRESH_GAIN", 5144 "LMS_THRESH_GRADIENT_INVERT", 5145 "LMS_THRESH_HYS_EN", 5146 "LMS_THRESH_HYS_MAG", 5147 "LMS_THRESH_OFFS", 5148 "LN_DP_S_RSTB", 5149 "LN_RX_DP_S_RSTB", 5150 "LN_RX_S_CLKGATE_FRC_ON", 5151 "LN_RX_S_COMCLK_FRC_ON", 5152 "LN_RX_S_COMCLK_SEL", 5153 "LN_RX_S_PWRDN", 5154 "LN_RX_S_RSTB", 5155 "LN_S_RSTB", 5156 "LN_TX_DP_S_RSTB", 5157 "LN_TX_S_CLKGATE_FRC_ON", 5158 "LN_TX_S_COMCLK_FRC_ON", 5159 "LN_TX_S_COMCLK_SEL", 5160 "LN_TX_S_PWRDN", 5161 "LN_TX_S_RSTB", 5162 "LOST_PLL_LOCK_SM", 5163 "LOS_FILTER_COUNT", 5164 "LOS_THRESH", 5165 "MASKDATA", 5166 "MASKDATA_BUS_ASSIGN", 5167 "MAX_PRBS_BURST_ERR_LENGTH_STATUS", 5168 "MDIO_AER", 5169 "MDIO_BRCST_PORT_ADDR", 5170 "MDIO_DEV_AN_EN", 5171 "MDIO_DEV_DTE_EN", 5172 "MDIO_DEV_ID0_EN", 5173 "MDIO_DEV_PCS_EN", 5174 "MDIO_DEV_PHY_EN", 5175 "MDIO_DEV_PMD_EN", 5176 "MDIO_DRV_COMCLK", 5177 "MDIO_FAST_MODE_FRC", 5178 "MDIO_FAST_MODE_FRC_VAL", 5179 "MDIO_MULTI_MMDS_EN", 5180 "MDIO_MULTI_PRTS_EN", 5181 "MEASURE_LFSR_CNT", 5182 "MEASURE_TIMEOUT", 5183 "MEAS_INCOMPLETE", 5184 "MICRO_AUTOINC_RDADDR_EN", 5185 "MICRO_AUTOINC_WRADDR_EN", 5186 "MICRO_CLK_COMCLK_SEL", 5187 "MICRO_CLK_LOC", 5188 "MICRO_CLK_LOC_MON_EN", 5189 "MICRO_CLK_S_COMCLK_FRC_ON", 5190 "MICRO_CLK_S_COMCLK_SEL", 5191 "MICRO_CLK_VCO_DIV", 5192 "MICRO_CLK_VCO_SELECT", 5193 "MICRO_CORE_CFG_FWAPI_DATA0", 5194 "MICRO_CORE_CFG_FWAPI_DATA1", 5195 "MICRO_CORE_CLK_EN", 5196 "MICRO_CORE_LN_SEL", 5197 "MICRO_CORE_RSTB", 5198 "MICRO_CORE_STACK_EN", 5199 "MICRO_CORE_STACK_SIZE", 5200 "MICRO_CR_ACCESS_EN", 5201 "MICRO_CR_CRC_CALC_EN", 5202 "MICRO_CR_CRC_CHECKSUM", 5203 "MICRO_CR_CRC_INIT", 5204 "MICRO_CR_CRC_PRTSEL", 5205 "MICRO_CR_DATA_SIZE", 5206 "MICRO_CR_ECCG_MODE", 5207 "MICRO_CR_ECC_CORRUPT", 5208 "MICRO_CR_ECC_DEBUG_PRTSEL", 5209 "MICRO_CR_ECC_FRC_DISABLE", 5210 "MICRO_CR_IGNORE_MICRO_CODE_WRITES", 5211 "MICRO_CR_LOWPOWER_EN", 5212 "MICRO_CR_PRIF_PRTSEL", 5213 "MICRO_CR_RAIF_PRTSEL", 5214 "MICRO_CR_TM", 5215 "MICRO_DAP_PORESET_S_RSTB", 5216 "MICRO_DEBUGGER_ID_FRC", 5217 "MICRO_DEBUGGER_ID_FRCVAL", 5218 "MICRO_DEBUGGER_ID_LSW", 5219 "MICRO_DEBUGGER_ID_MSW", 5220 "MICRO_DP_RCLK20_RST_STATUS_LH", 5221 "MICRO_DP_RCLK20_RST_WAKEUP_EN", 5222 "MICRO_DR_ACCESS_EN", 5223 "MICRO_DR_CODE_SIZE", 5224 "MICRO_DR_ECCG_MODE", 5225 "MICRO_DR_ECC_CORRUPT", 5226 "MICRO_DR_ECC_DEBUG_PRTSEL", 5227 "MICRO_DR_ECC_FRC_DISABLE", 5228 "MICRO_DR_IGNORE_MICRO_CODE_WRITES", 5229 "MICRO_DR_LOWPOWER_EN", 5230 "MICRO_DR_PRIF_PRTSEL", 5231 "MICRO_DR_RAIF_PRTSEL", 5232 "MICRO_DR_TM", 5233 "MICRO_M0P_DEFAULT_SLAVE_ERROR_HRESP_EN", 5234 "MICRO_M0P_DEFAULT_SLAVE_ERROR_INTR_EN", 5235 "MICRO_M0P_DEFAULT_SLAVE_ERROR_STATUS", 5236 "MICRO_M0P_GCLK_FRC", 5237 "MICRO_M0P_GCLK_FRCVAL", 5238 "MICRO_M0P_WAKEUP", 5239 "MICRO_MASTER_CLK_EN", 5240 "MICRO_MASTER_RSTB", 5241 "MICRO_MBOX_MSGIN_INTR", 5242 "MICRO_MSG0", 5243 "MICRO_MSG1", 5244 "MICRO_MSG2", 5245 "MICRO_MSG3", 5246 "MICRO_NUM_UC_CORES", 5247 "MICRO_PMD_SIGNAL_DETECT_STATUS_LH", 5248 "MICRO_PMD_SIGNAL_DETECT_WAKEUP_EN", 5249 "MICRO_PMI_HP_ACK_TIMEOUT_DIS", 5250 "MICRO_PMI_HP_ACK_TIMEOUT_HRESP_EN", 5251 "MICRO_PMI_HP_ACK_TIMEOUT_INTR_EN", 5252 "MICRO_PMI_HP_ACK_TIMEOUT_STATUS", 5253 "MICRO_PMI_HP_ERROR_HRESP_EN", 5254 "MICRO_PMI_HP_ERROR_INTR_EN", 5255 "MICRO_PMI_HP_ERROR_STATUS", 5256 "MICRO_PMI_HP_FAST_BKTOBK_EN", 5257 "MICRO_PMI_HP_FAST_READ_EN", 5258 "MICRO_PMI_HP_WORD_ACCESS_ERR_HRESP_EN", 5259 "MICRO_PMI_HP_WORD_ACCESS_ERR_INTR_EN", 5260 "MICRO_PMI_HP_WORD_ACCESS_ERR_STATUS", 5261 "MICRO_PRAMIF_AHB_WRADDR_LSW", 5262 "MICRO_PRAMIF_AHB_WRADDR_MSW", 5263 "MICRO_PRAMIF_EN", 5264 "MICRO_PRAM_IF_RSTB", 5265 "MICRO_PR_AUTOINC_NXT_WRADDR_LSW", 5266 "MICRO_PR_AUTOINC_NXT_WRADDR_MSB", 5267 "MICRO_PR_DEFAULT_SLAVE_ERROR", 5268 "MICRO_PVT_TEMPDATA_FRC", 5269 "MICRO_PVT_TEMPDATA_FRCVAL", 5270 "MICRO_PVT_TEMPDATA_RMI", 5271 "MICRO_RA_ARG_MICROBLK_SEL", 5272 "MICRO_RA_AUTOINC_NXT_RDADDR_LSW", 5273 "MICRO_RA_AUTOINC_NXT_RDADDR_MSB", 5274 "MICRO_RA_AUTOINC_NXT_WRADDR_LSW", 5275 "MICRO_RA_AUTOINC_NXT_WRADDR_MSB", 5276 "MICRO_RA_ECC_RDDATA", 5277 "MICRO_RA_ECC_WRDATA", 5278 "MICRO_RA_INIT", 5279 "MICRO_RA_INITDONE", 5280 "MICRO_RA_RDADDR_LSW", 5281 "MICRO_RA_RDADDR_MSW", 5282 "MICRO_RA_RDDATASIZE", 5283 "MICRO_RA_RDDATA_LSW", 5284 "MICRO_RA_RDDATA_MSW", 5285 "MICRO_RA_WRADDR_LSW", 5286 "MICRO_RA_WRADDR_MSW", 5287 "MICRO_RA_WRDATASIZE", 5288 "MICRO_RA_WRDATA_LSW", 5289 "MICRO_RA_WRDATA_MSW", 5290 "MICRO_RMI_CR_ECC_ADDRESS_STATUS", 5291 "MICRO_RMI_CR_ECC_CORR_ERR_INTR_EN", 5292 "MICRO_RMI_CR_ECC_CORR_ERR_STATUS", 5293 "MICRO_RMI_CR_ECC_MULTIROW_ERR_INTR_EN", 5294 "MICRO_RMI_CR_ECC_MULTIROW_ERR_STATUS", 5295 "MICRO_RMI_CR_ECC_UNCORR_ERR_INTR_EN", 5296 "MICRO_RMI_CR_ECC_UNCORR_ERR_STATUS", 5297 "MICRO_RMI_DEFAULT_SLAVE_ERROR", 5298 "MICRO_RMI_DR_ECC_ADDRESS_STATUS", 5299 "MICRO_RMI_DR_ECC_CORR_ERR_INTR_EN", 5300 "MICRO_RMI_DR_ECC_CORR_ERR_STATUS", 5301 "MICRO_RMI_DR_ECC_MULTIROW_ERR_INTR_EN", 5302 "MICRO_RMI_DR_ECC_MULTIROW_ERR_STATUS", 5303 "MICRO_RMI_DR_ECC_UNCORR_ERR_INTR_EN", 5304 "MICRO_RMI_DR_ECC_UNCORR_ERR_STATUS", 5305 "MICRO_RMI_M0P_LOCKUP_INTR_EN", 5306 "MICRO_RMI_M0P_LOCKUP_STATUS", 5307 "MICRO_RMI_M0P_LOCKUP_STATUS_OR", 5308 "MICRO_RMI_M0P_SYSTEMRESETREQ_INTR_EN", 5309 "MICRO_RMI_M0P_SYSTEMRESETREQ_STATUS", 5310 "MICRO_RMI_M0P_SYSTEMRESETREQ_STATUS_OR", 5311 "MICRO_RMI_MBOX_MSGOUT_INTR_EN", 5312 "MICRO_RMI_MBOX_MSGOUT_STATUS", 5313 "MICRO_RMI_MBOX_MSGOUT_STATUS_OR", 5314 "MICRO_SILICON_DEBUG_STATUS_MUXED_DATA", 5315 "MICRO_SILICON_DEBUG_STATUS_MUX_SEL", 5316 "MICRO_SLEEPDEEP", 5317 "MICRO_SLEEPDEEP_LH", 5318 "MICRO_SLEEPHOLDACK_N", 5319 "MICRO_SLEEPHOLDREQ_N", 5320 "MICRO_SLEEPING", 5321 "MICRO_SLEEPING_LH", 5322 "MICRO_SW_PMI_HP_RSTB", 5323 "MICRO_SW_TIMESTAMP_TIMER_RSTB", 5324 "MICRO_TX_DISABLE", 5325 "MICRO_UC_ACTIVE_0", 5326 "MICRO_UC_ACTIVE_1", 5327 "MICRO_UC_ACTIVE_2", 5328 "MICRO_UC_ACTIVE_3", 5329 "MICRO_WICENACK", 5330 "MICRO_WICENREQ", 5331 "MULTICAST_MASK_CONTROL", 5332 "MULTICAST_MASK_CONTROL_STATUS", 5333 "OSR_MODE", 5334 "OSR_MODE_FRC", 5335 "OSR_MODE_FRC_VAL", 5336 "OSR_MODE_PIN", 5337 "OS_ALL_EDGES", 5338 "OS_PATTERN_ENHANCED", 5339 "PAM4_CDR_PROP_BW_EXT", 5340 "PAM4_DECODER_EN", 5341 "PAM4_GRAY_DEC_EN", 5342 "PAM4_GRAY_ENC_EN", 5343 "PAM4_MODE", 5344 "PAM4_MODE_FRC", 5345 "PAM4_MODE_FRC_VAL", 5346 "PAM4_MODE_PIN", 5347 "PAM4_PRECODER_EN", 5348 "PAM4_RX_SYMBOL_BIT_SWAP", 5349 "PAM4_TX_JP03B_PATT_EN", 5350 "PAM4_TX_LINEARITY_PATT_EN", 5351 "PAM4_TX_SYMBOL_BIT_SWAP", 5352 "PATT_GEN_EN", 5353 "PATT_GEN_SEQ_0", 5354 "PATT_GEN_SEQ_1", 5355 "PATT_GEN_SEQ_10", 5356 "PATT_GEN_SEQ_11", 5357 "PATT_GEN_SEQ_12", 5358 "PATT_GEN_SEQ_13", 5359 "PATT_GEN_SEQ_14", 5360 "PATT_GEN_SEQ_2", 5361 "PATT_GEN_SEQ_3", 5362 "PATT_GEN_SEQ_4", 5363 "PATT_GEN_SEQ_5", 5364 "PATT_GEN_SEQ_6", 5365 "PATT_GEN_SEQ_7", 5366 "PATT_GEN_SEQ_8", 5367 "PATT_GEN_SEQ_9", 5368 "PATT_GEN_START_POS", 5369 "PATT_GEN_STOP_POS", 5370 "PHASE_ERR_OFFSET", 5371 "PHASE_ERR_OFFSET_EN", 5372 "PHASE_ERR_OFFSET_MULT2", 5373 "PHS_SUM_IGNORE_DSC_LOCK", 5374 "PLL_CFG_FWAPI_DATA0", 5375 "PLL_CFG_FWAPI_DATA1", 5376 "PLL_FORCE_CAP_DONE", 5377 "PLL_FORCE_CAP_DONE_EN", 5378 "PLL_FORCE_CAP_PASS", 5379 "PLL_FORCE_CAP_PASS_EN", 5380 "PLL_FORCE_FDONE", 5381 "PLL_FORCE_FDONE_EN", 5382 "PLL_FORCE_FPASS", 5383 "PLL_LOCK", 5384 "PLL_LOCK_FRC", 5385 "PLL_LOCK_FRC_VAL", 5386 "PLL_LOCK_LH_LL", 5387 "PLL_MODE", 5388 "PLL_PWRDN_OR", 5389 "PLL_SELECT", 5390 "PLL_SEQ_DONE", 5391 "PLL_SEQ_DONE_LH_LL", 5392 "PLL_SEQ_PASS", 5393 "PLL_SEQ_PASS_LH_LL", 5394 "PLL_SEQ_START", 5395 "PMD_CORE_DP_H_RSTB_PKILL", 5396 "PMD_CORE_MODE", 5397 "PMD_LN_DP_H_RSTB_PKILL", 5398 "PMD_LN_H_RSTB_PKILL", 5399 "PMD_LN_RX_DP_H_RSTB_PKILL", 5400 "PMD_LN_RX_H_PWRDN_PKILL", 5401 "PMD_LN_RX_H_RSTB_PKILL", 5402 "PMD_LN_TX_DP_H_RSTB_PKILL", 5403 "PMD_LN_TX_H_PWRDN_PKILL", 5404 "PMD_LN_TX_H_RSTB_PKILL", 5405 "PMD_MDIO_TRANS_PKILL", 5406 "PMD_RX_CLK_VLD_FRC", 5407 "PMD_RX_CLK_VLD_FRC_VAL", 5408 "PMD_RX_LANE_MODE", 5409 "PMD_RX_LOCK", 5410 "PMD_RX_LOCK_CHANGE", 5411 "PMD_SIGNAL_DETECT", 5412 "PMD_TX_CLK_VLD_FRC", 5413 "PMD_TX_CLK_VLD_FRC_VAL", 5414 "PMD_TX_DISABLE_PKILL", 5415 "PMD_TX_LANE_MODE", 5416 "PMD_VCOCLK4PCS_VLD_FRC", 5417 "PMD_VCOCLK4PCS_VLD_FRC_VAL", 5418 "PRBS_BURST_ERR_LENGTH_STATUS", 5419 "PRBS_BURST_LEN_CHK_EN", 5420 "PRBS_CHK_AUTO_DETECT_CNT", 5421 "PRBS_CHK_AUTO_DETECT_EN", 5422 "PRBS_CHK_AUTO_DETECT_LOCK", 5423 "PRBS_CHK_AUTO_DETECT_RELOCK_EN", 5424 "PRBS_CHK_AUTO_DETECT_STATE", 5425 "PRBS_CHK_BURST_ERR_CNT", 5426 "PRBS_CHK_BURST_ERR_CNT_EN", 5427 "PRBS_CHK_CLK_EN_FRC_ON", 5428 "PRBS_CHK_EN", 5429 "PRBS_CHK_EN_AUTO_MODE", 5430 "PRBS_CHK_EN_TIMEOUT", 5431 "PRBS_CHK_EN_TIMER_MODE", 5432 "PRBS_CHK_ERR_CNT_BURST_MODE", 5433 "PRBS_CHK_ERR_CNT_LSB", 5434 "PRBS_CHK_ERR_CNT_MSB", 5435 "PRBS_CHK_ERR_CNT_NO_CLR", 5436 "PRBS_CHK_INV", 5437 "PRBS_CHK_INV_AUTO_DETECT", 5438 "PRBS_CHK_LOCK", 5439 "PRBS_CHK_LOCK_CNT", 5440 "PRBS_CHK_LOCK_LOST_LH", 5441 "PRBS_CHK_MODE", 5442 "PRBS_CHK_MODE_SEL", 5443 "PRBS_CHK_MODE_SEL_AUTO_DETECT", 5444 "PRBS_CHK_MODE_SEL_MSB", 5445 "PRBS_CHK_MODE_SEL_MSB_AUTO_DETECT", 5446 "PRBS_CHK_OOL_CNT", 5447 "PRBS_GEN_EN", 5448 "PRBS_GEN_ERR_INS", 5449 "PRBS_GEN_INV", 5450 "PRBS_GEN_MODE_SEL", 5451 "PRBS_GEN_MODE_SEL_MSB", 5452 "PRBS_GEN_PAUSE_STROBE", 5453 "PRESET_A", 5454 "PRESET_AFE", 5455 "PRESET_C", 5456 "PRESET_D", 5457 "PRESET_DFE_TAPS_2_3", 5458 "PRESET_F", 5459 "PRESET_G", 5460 "PRESET_H", 5461 "PRESET_I", 5462 "PRESET_SLICERS", 5463 "PRE_FREQ_DET_TIME", 5464 "PWRDN_SEQ_TIMER", 5465 "REFCLK_DIVCNT", 5466 "REFCLK_DIVCNT_SEL", 5467 "REFCLK_LOC", 5468 "REFCLK_LOC_MON_EN", 5469 "REFCLK_S_COMCLK_FRC_ON", 5470 "REFCLK_S_COMCLK_SEL", 5471 "RESCAL_FRC", 5472 "RESCAL_FRC_VAL", 5473 "RESCAL_IN", 5474 "RESTART_PI_EXT_MODE", 5475 "RESTART_PMD_RESTART", 5476 "RESTART_SIGDET", 5477 "RES_CAL_CNTR", 5478 "RETRY_TIME", 5479 "REVID2", 5480 "REVID_BONDING", 5481 "REVID_CL72", 5482 "REVID_EEE", 5483 "REVID_LLP", 5484 "REVID_MDIO", 5485 "REVID_MICRO", 5486 "REVID_MODEL", 5487 "REVID_MULTIPLICITY", 5488 "REVID_PIR", 5489 "REVID_PROCESS", 5490 "REVID_REV_LETTER", 5491 "REVID_REV_NUMBER", 5492 "RMT_LPBK_EN", 5493 "RMT_LPBK_PD_EARLY_IND", 5494 "RMT_LPBK_PD_FRC_ON", 5495 "RMT_LPBK_PD_LATE_IND", 5496 "RMT_LPBK_PD_MODE", 5497 "RST_SEQ_DIS_FLT_MODE", 5498 "RST_SEQ_TIMER", 5499 "RXA_DFE_TAP10", 5500 "RXA_DFE_TAP10_MUX", 5501 "RXA_DFE_TAP11", 5502 "RXA_DFE_TAP11_MUX", 5503 "RXA_DFE_TAP12", 5504 "RXA_DFE_TAP12_MUX", 5505 "RXA_DFE_TAP13", 5506 "RXA_DFE_TAP13_MUX", 5507 "RXA_DFE_TAP14", 5508 "RXA_DFE_TAP14_MUX", 5509 "RXA_DFE_TAP2_INIT_PHASE", 5510 "RXA_DFE_TAP2_LEFT_NUM_CHANGE", 5511 "RXA_DFE_TAP2_NUMERATOR", 5512 "RXA_DFE_TAP2_NUMERATOR2", 5513 "RXA_DFE_TAP2_STATUS", 5514 "RXA_DFE_TAP2_THRESH_STEP_SIZE", 5515 "RXA_DFE_TAP2_VAL", 5516 "RXA_DFE_TAP2_WRITE", 5517 "RXA_DFE_TAP3_INIT_PHASE", 5518 "RXA_DFE_TAP3_LEFT_NUM_CHANGE", 5519 "RXA_DFE_TAP3_NUMERATOR", 5520 "RXA_DFE_TAP3_NUMERATOR2", 5521 "RXA_DFE_TAP3_STATUS", 5522 "RXA_DFE_TAP3_THRESH_STEP_SIZE", 5523 "RXA_DFE_TAP3_VAL", 5524 "RXA_DFE_TAP3_WRITE", 5525 "RXA_DFE_TAP4", 5526 "RXA_DFE_TAP5", 5527 "RXA_DFE_TAP6", 5528 "RXA_DFE_TAP7", 5529 "RXA_DFE_TAP7_MUX", 5530 "RXA_DFE_TAP8", 5531 "RXA_DFE_TAP8_MUX", 5532 "RXA_DFE_TAP9", 5533 "RXA_DFE_TAP9_MUX", 5534 "RXA_FFE_TAP1_VAL", 5535 "RXA_FFE_TAP2_VAL", 5536 "RXA_SLICER_OFFSET_ADJ_CAL_D0", 5537 "RXA_SLICER_OFFSET_ADJ_CAL_D1", 5538 "RXA_SLICER_OFFSET_ADJ_CAL_D2", 5539 "RXA_SLICER_OFFSET_ADJ_CAL_D3", 5540 "RXA_SLICER_OFFSET_ADJ_CAL_D4", 5541 "RXA_SLICER_OFFSET_ADJ_CAL_D5", 5542 "RXA_SLICER_OFFSET_ADJ_CAL_LMS", 5543 "RXA_SLICER_OFFSET_ADJ_CAL_P0", 5544 "RXA_SLICER_OFFSET_ADJ_CAL_P1", 5545 "RXA_SLICER_OFFSET_ADJ_CAL_P2", 5546 "RXB_DFE_TAP10", 5547 "RXB_DFE_TAP10_MUX", 5548 "RXB_DFE_TAP11", 5549 "RXB_DFE_TAP11_MUX", 5550 "RXB_DFE_TAP12", 5551 "RXB_DFE_TAP12_MUX", 5552 "RXB_DFE_TAP13", 5553 "RXB_DFE_TAP13_MUX", 5554 "RXB_DFE_TAP14", 5555 "RXB_DFE_TAP14_MUX", 5556 "RXB_DFE_TAP2_INIT_PHASE", 5557 "RXB_DFE_TAP2_LEFT_NUM_CHANGE", 5558 "RXB_DFE_TAP2_NUMERATOR", 5559 "RXB_DFE_TAP2_NUMERATOR2", 5560 "RXB_DFE_TAP2_STATUS", 5561 "RXB_DFE_TAP2_THRESH_STEP_SIZE", 5562 "RXB_DFE_TAP2_VAL", 5563 "RXB_DFE_TAP2_WRITE", 5564 "RXB_DFE_TAP3_INIT_PHASE", 5565 "RXB_DFE_TAP3_LEFT_NUM_CHANGE", 5566 "RXB_DFE_TAP3_NUMERATOR", 5567 "RXB_DFE_TAP3_NUMERATOR2", 5568 "RXB_DFE_TAP3_STATUS", 5569 "RXB_DFE_TAP3_THRESH_STEP_SIZE", 5570 "RXB_DFE_TAP3_VAL", 5571 "RXB_DFE_TAP3_WRITE", 5572 "RXB_DFE_TAP4", 5573 "RXB_DFE_TAP5", 5574 "RXB_DFE_TAP6", 5575 "RXB_DFE_TAP7", 5576 "RXB_DFE_TAP7_MUX", 5577 "RXB_DFE_TAP8", 5578 "RXB_DFE_TAP8_MUX", 5579 "RXB_DFE_TAP9", 5580 "RXB_DFE_TAP9_MUX", 5581 "RXB_FFE_TAP1_VAL", 5582 "RXB_FFE_TAP2_VAL", 5583 "RXB_SLICER_OFFSET_ADJ_CAL_D0", 5584 "RXB_SLICER_OFFSET_ADJ_CAL_D1", 5585 "RXB_SLICER_OFFSET_ADJ_CAL_D2", 5586 "RXB_SLICER_OFFSET_ADJ_CAL_D3", 5587 "RXB_SLICER_OFFSET_ADJ_CAL_D4", 5588 "RXB_SLICER_OFFSET_ADJ_CAL_D5", 5589 "RXB_SLICER_OFFSET_ADJ_CAL_LMS", 5590 "RXB_SLICER_OFFSET_ADJ_CAL_P0", 5591 "RXB_SLICER_OFFSET_ADJ_CAL_P1", 5592 "RXB_SLICER_OFFSET_ADJ_CAL_P2", 5593 "RXC_DFE_TAP10", 5594 "RXC_DFE_TAP10_MUX", 5595 "RXC_DFE_TAP11", 5596 "RXC_DFE_TAP11_MUX", 5597 "RXC_DFE_TAP12", 5598 "RXC_DFE_TAP12_MUX", 5599 "RXC_DFE_TAP13", 5600 "RXC_DFE_TAP13_MUX", 5601 "RXC_DFE_TAP14", 5602 "RXC_DFE_TAP14_MUX", 5603 "RXC_DFE_TAP2_INIT_PHASE", 5604 "RXC_DFE_TAP2_LEFT_NUM_CHANGE", 5605 "RXC_DFE_TAP2_NUMERATOR", 5606 "RXC_DFE_TAP2_NUMERATOR2", 5607 "RXC_DFE_TAP2_STATUS", 5608 "RXC_DFE_TAP2_THRESH_STEP_SIZE", 5609 "RXC_DFE_TAP2_VAL", 5610 "RXC_DFE_TAP2_WRITE", 5611 "RXC_DFE_TAP3_INIT_PHASE", 5612 "RXC_DFE_TAP3_LEFT_NUM_CHANGE", 5613 "RXC_DFE_TAP3_NUMERATOR", 5614 "RXC_DFE_TAP3_NUMERATOR2", 5615 "RXC_DFE_TAP3_STATUS", 5616 "RXC_DFE_TAP3_THRESH_STEP_SIZE", 5617 "RXC_DFE_TAP3_VAL", 5618 "RXC_DFE_TAP3_WRITE", 5619 "RXC_DFE_TAP4", 5620 "RXC_DFE_TAP5", 5621 "RXC_DFE_TAP6", 5622 "RXC_DFE_TAP7", 5623 "RXC_DFE_TAP7_MUX", 5624 "RXC_DFE_TAP8", 5625 "RXC_DFE_TAP8_MUX", 5626 "RXC_DFE_TAP9", 5627 "RXC_DFE_TAP9_MUX", 5628 "RXC_FFE_TAP1_VAL", 5629 "RXC_FFE_TAP2_VAL", 5630 "RXC_SLICER_OFFSET_ADJ_CAL_D0", 5631 "RXC_SLICER_OFFSET_ADJ_CAL_D1", 5632 "RXC_SLICER_OFFSET_ADJ_CAL_D2", 5633 "RXC_SLICER_OFFSET_ADJ_CAL_D3", 5634 "RXC_SLICER_OFFSET_ADJ_CAL_D4", 5635 "RXC_SLICER_OFFSET_ADJ_CAL_D5", 5636 "RXC_SLICER_OFFSET_ADJ_CAL_LMS", 5637 "RXC_SLICER_OFFSET_ADJ_CAL_P0", 5638 "RXC_SLICER_OFFSET_ADJ_CAL_P1", 5639 "RXC_SLICER_OFFSET_ADJ_CAL_P2", 5640 "RXD_DFE_TAP10", 5641 "RXD_DFE_TAP10_MUX", 5642 "RXD_DFE_TAP11", 5643 "RXD_DFE_TAP11_MUX", 5644 "RXD_DFE_TAP12", 5645 "RXD_DFE_TAP12_MUX", 5646 "RXD_DFE_TAP13", 5647 "RXD_DFE_TAP13_MUX", 5648 "RXD_DFE_TAP14", 5649 "RXD_DFE_TAP14_MUX", 5650 "RXD_DFE_TAP2_INIT_PHASE", 5651 "RXD_DFE_TAP2_LEFT_NUM_CHANGE", 5652 "RXD_DFE_TAP2_NUMERATOR", 5653 "RXD_DFE_TAP2_NUMERATOR2", 5654 "RXD_DFE_TAP2_STATUS", 5655 "RXD_DFE_TAP2_THRESH_STEP_SIZE", 5656 "RXD_DFE_TAP2_VAL", 5657 "RXD_DFE_TAP2_WRITE", 5658 "RXD_DFE_TAP3_INIT_PHASE", 5659 "RXD_DFE_TAP3_LEFT_NUM_CHANGE", 5660 "RXD_DFE_TAP3_NUMERATOR", 5661 "RXD_DFE_TAP3_NUMERATOR2", 5662 "RXD_DFE_TAP3_STATUS", 5663 "RXD_DFE_TAP3_THRESH_STEP_SIZE", 5664 "RXD_DFE_TAP3_VAL", 5665 "RXD_DFE_TAP3_WRITE", 5666 "RXD_DFE_TAP4", 5667 "RXD_DFE_TAP5", 5668 "RXD_DFE_TAP6", 5669 "RXD_DFE_TAP7", 5670 "RXD_DFE_TAP7_MUX", 5671 "RXD_DFE_TAP8", 5672 "RXD_DFE_TAP8_MUX", 5673 "RXD_DFE_TAP9", 5674 "RXD_DFE_TAP9_MUX", 5675 "RXD_FFE_TAP1_VAL", 5676 "RXD_FFE_TAP2_VAL", 5677 "RXD_SLICER_OFFSET_ADJ_CAL_D0", 5678 "RXD_SLICER_OFFSET_ADJ_CAL_D1", 5679 "RXD_SLICER_OFFSET_ADJ_CAL_D2", 5680 "RXD_SLICER_OFFSET_ADJ_CAL_D3", 5681 "RXD_SLICER_OFFSET_ADJ_CAL_D4", 5682 "RXD_SLICER_OFFSET_ADJ_CAL_D5", 5683 "RXD_SLICER_OFFSET_ADJ_CAL_LMS", 5684 "RXD_SLICER_OFFSET_ADJ_CAL_P0", 5685 "RXD_SLICER_OFFSET_ADJ_CAL_P1", 5686 "RXD_SLICER_OFFSET_ADJ_CAL_P2", 5687 "RX_AFE_OVERRIDE_SEL", 5688 "RX_AFE_OVERRIDE_VAL", 5689 "RX_AFE_OVERRIDE_WRITE", 5690 "RX_DATA05_INIT_PHASE", 5691 "RX_DATA05_LEFT_NUM_CHANGE", 5692 "RX_DATA05_NUMERATOR", 5693 "RX_DATA05_NUMERATOR2", 5694 "RX_DATA05_STATUS", 5695 "RX_DATA05_THRESH_STEP_SIZE", 5696 "RX_DATA14_INIT_PHASE", 5697 "RX_DATA14_LEFT_NUM_CHANGE", 5698 "RX_DATA14_NUMERATOR", 5699 "RX_DATA14_NUMERATOR2", 5700 "RX_DATA14_STATUS", 5701 "RX_DATA14_THRESH_STEP_SIZE", 5702 "RX_DATA23_INIT_PHASE", 5703 "RX_DATA23_LEFT_NUM_CHANGE", 5704 "RX_DATA23_NUMERATOR", 5705 "RX_DATA23_NUMERATOR2", 5706 "RX_DATA23_STATUS", 5707 "RX_DATA23_THRESH_STEP_SIZE", 5708 "RX_DATA_15_TO_0", 5709 "RX_DATA_35_TO_20", 5710 "RX_DESCRAMBLER_EN", 5711 "RX_DSC_LOCK", 5712 "RX_DSC_LOCK_FRC", 5713 "RX_DSC_LOCK_FRC_VAL", 5714 "RX_HW_FW_HANDSHAKE_DISABLE", 5715 "RX_LANE_ADDR_0", 5716 "RX_LANE_ADDR_1", 5717 "RX_LANE_ADDR_2", 5718 "RX_LANE_ADDR_3", 5719 "RX_LANE_ADDR_4", 5720 "RX_LANE_ADDR_5", 5721 "RX_LANE_ADDR_6", 5722 "RX_LANE_ADDR_7", 5723 "RX_LANE_DP_RESET_STATE", 5724 "RX_LANE_REG_RESET_OCCURRED", 5725 "RX_LN_DP_S_RSTB", 5726 "RX_LN_S_RSTB", 5727 "RX_MULTICAST_MASK_CONTROL", 5728 "RX_MULTICAST_MASK_CONTROL_STATUS", 5729 "RX_NRZ_VSR_MODE", 5730 "RX_OSR_MODE", 5731 "RX_OSR_MODE_FRC", 5732 "RX_OSR_MODE_FRC_VAL", 5733 "RX_OSR_MODE_PIN", 5734 "RX_PAM4ES_PREC_DISABLED", 5735 "RX_PAM4_ES_MODE", 5736 "RX_PAM4_MODE", 5737 "RX_PAM4_MODE_FRC", 5738 "RX_PAM4_MODE_FRC_VAL", 5739 "RX_PAM4_MODE_PIN", 5740 "RX_PF2_CTRL_VAL", 5741 "RX_PF_CTRL_VAL", 5742 "RX_PHASE02_INIT_PHASE", 5743 "RX_PHASE02_LEFT_NUM_CHANGE", 5744 "RX_PHASE02_NUMERATOR", 5745 "RX_PHASE02_NUMERATOR2", 5746 "RX_PHASE02_STATUS", 5747 "RX_PHASE02_THRESH_STEP_SIZE", 5748 "RX_PHASE1_INIT_PHASE", 5749 "RX_PHASE1_LEFT_NUM_CHANGE", 5750 "RX_PHASE1_NUMERATOR", 5751 "RX_PHASE1_NUMERATOR2", 5752 "RX_PHASE1_STATUS", 5753 "RX_PHASE1_THRESH_STEP_SIZE", 5754 "RX_PHASE_SUM_ACC_MODE", 5755 "RX_PI_DISP_MSB_STATUS", 5756 "RX_PI_INLC_EN", 5757 "RX_PI_INLC_K", 5758 "RX_PI_INLC_LUT_0", 5759 "RX_PI_INLC_LUT_1", 5760 "RX_PI_INLC_LUT_10", 5761 "RX_PI_INLC_LUT_11", 5762 "RX_PI_INLC_LUT_12", 5763 "RX_PI_INLC_LUT_13", 5764 "RX_PI_INLC_LUT_14", 5765 "RX_PI_INLC_LUT_15", 5766 "RX_PI_INLC_LUT_2", 5767 "RX_PI_INLC_LUT_3", 5768 "RX_PI_INLC_LUT_4", 5769 "RX_PI_INLC_LUT_5", 5770 "RX_PI_INLC_LUT_6", 5771 "RX_PI_INLC_LUT_7", 5772 "RX_PI_INLC_LUT_8", 5773 "RX_PI_INLC_LUT_9", 5774 "RX_PI_INLC_OFFSET", 5775 "RX_PI_INLC_OUT", 5776 "RX_PI_INLC_PHASE_DLY", 5777 "RX_PI_INLC_RX_PHASE_POINTER", 5778 "RX_PI_MANUAL_MODE", 5779 "RX_PI_MANUAL_STROBE", 5780 "RX_PI_PHASE_STEP_CNT", 5781 "RX_PI_PHASE_STEP_DIR", 5782 "RX_PI_SLICERS_EN", 5783 "RX_PI_STEP_SIZE", 5784 "RX_PLL_SELECT", 5785 "RX_PMD_DP_INVERT", 5786 "RX_RESTART_PMD", 5787 "RX_RESTART_PMD_HOLD", 5788 "RX_SLICER_DENOMINATOR", 5789 "RX_TRN_ACTIVE_AUTO_MODE_EN", 5790 "RX_UC_ACK_LANE_CFG_DONE", 5791 "RX_UC_ACK_LANE_DP_RESET", 5792 "RX_VGA_STATUS", 5793 "RX_VGA_THRESH_SEL", 5794 "SDK_TX_DISABLE", 5795 "SET_MEAS_INCOMPLETE", 5796 "SIGDET_DP_RSTB_EN", 5797 "SIGNAL_DETECT", 5798 "SIGNAL_DETECT_CHANGE", 5799 "SIGNAL_DETECT_FILTER_1US", 5800 "SIGNAL_DETECT_FILTER_COUNT", 5801 "SIGNAL_DETECT_FRC", 5802 "SIGNAL_DETECT_FRC_VAL", 5803 "SIGNAL_DETECT_RAW", 5804 "SIGNAL_DETECT_RAW_CHANGE", 5805 "SIGNAL_DETECT_THRESH", 5806 "SLOWDN_XOR", 5807 "SPARE_DSC_I", 5808 "ST_AFE_TX_FIFO_RESETB", 5809 "SUP_RST_SEQ_FRC", 5810 "SUP_RST_SEQ_FRC_VAL", 5811 "SYM_ROTATE_BC_DEC_EN", 5812 "SYM_ROTATE_DLY", 5813 "SYM_ROTATE_DLY_FRC", 5814 "SYM_ROTATE_DLY_FRC_VAL", 5815 "SYM_ROTATE_PRBS_AUTO_DETECT_EN", 5816 "TDT_PRBS_SLIP", 5817 "TDT_TRNSUM_EN", 5818 "TIMER_DONE_FRC", 5819 "TIMER_DONE_FRC_VAL", 5820 "TLB_ERR_AGGR_ACTIVE_PATTERN_DEPTH", 5821 "TLB_ERR_AGGR_ACTIVE_STATUS", 5822 "TLB_ERR_AGGR_CLEAR_ERROR_ANALYZER_STATUS", 5823 "TLB_ERR_AGGR_CLEAR_STATUS_ON_READ", 5824 "TLB_ERR_AGGR_CLKS_OUT_OF_SYNC_STATUS", 5825 "TLB_ERR_AGGR_CLK_OUT_OF_SYNC_PATTERN_DEPTH", 5826 "TLB_ERR_AGGR_COUNT_ERROR_HI", 5827 "TLB_ERR_AGGR_COUNT_ERROR_LO", 5828 "TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_0", 5829 "TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_1", 5830 "TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_2", 5831 "TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_3", 5832 "TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_4", 5833 "TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_5", 5834 "TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_6", 5835 "TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_7", 5836 "TLB_ERR_AGGR_DELAY_DATA_CAPTURE", 5837 "TLB_ERR_AGGR_EN", 5838 "TLB_ERR_AGGR_EN_FORCE", 5839 "TLB_ERR_AGGR_ERROR_COUNT_THRESH", 5840 "TLB_ERR_AGGR_GCLK_DIV2_EN_IGNORE", 5841 "TLB_ERR_AGGR_HISTOGRAM_ERROR_THRESH", 5842 "TLB_ERR_AGGR_LANES_ACTIVE", 5843 "TLB_ERR_AGGR_MODE", 5844 "TLB_ERR_CLEAR_ERROR_ANALYZER_STATUS", 5845 "TLB_ERR_CLEAR_STATUS_ON_READ", 5846 "TLB_ERR_COUNT_ERROR_HI", 5847 "TLB_ERR_COUNT_ERROR_LO", 5848 "TLB_ERR_COUNT_HISTOGRAM_ERROR_OFFSET_0", 5849 "TLB_ERR_COUNT_HISTOGRAM_ERROR_OFFSET_1", 5850 "TLB_ERR_COUNT_HISTOGRAM_ERROR_OFFSET_2", 5851 "TLB_ERR_COUNT_HISTOGRAM_ERROR_OFFSET_3", 5852 "TLB_ERR_COUNT_HISTOGRAM_ERROR_OFFSET_4", 5853 "TLB_ERR_COUNT_HISTOGRAM_ERROR_OFFSET_5", 5854 "TLB_ERR_COUNT_HISTOGRAM_ERROR_OFFSET_6", 5855 "TLB_ERR_COUNT_HISTOGRAM_ERROR_OFFSET_7", 5856 "TLB_ERR_ERROR_COUNT_THRESH", 5857 "TLB_ERR_FEC_L_EN", 5858 "TLB_ERR_FEC_L_R_EN", 5859 "TLB_ERR_FEC_SIZE", 5860 "TLB_ERR_HISTOGRAM_ERROR_THRESH", 5861 "TLB_ERR_IGNORE_BACK_CHANNEL", 5862 "TLB_RX_DIFF_DEC_EN", 5863 "TLB_RX_NRZ_LL_MODE_EN", 5864 "TLB_TX_DIFF_ENC_EN", 5865 "TRNSUM", 5866 "TRNSUM_A", 5867 "TRNSUM_ALT_PATH_EN", 5868 "TRNSUM_A_LOW", 5869 "TRNSUM_B", 5870 "TRNSUM_B_LOW", 5871 "TRNSUM_C", 5872 "TRNSUM_CLR_FRC", 5873 "TRNSUM_CLR_FRC_VAL", 5874 "TRNSUM_CLR_SC", 5875 "TRNSUM_COR_SEL", 5876 "TRNSUM_C_LOW", 5877 "TRNSUM_D", 5878 "TRNSUM_DATA_SEL", 5879 "TRNSUM_DISABLE_SM_CLEAR", 5880 "TRNSUM_D_LOW", 5881 "TRNSUM_EDGE_PATTERN_EN", 5882 "TRNSUM_EN", 5883 "TRNSUM_ERROR_COUNT_EN", 5884 "TRNSUM_ERR_SEL", 5885 "TRNSUM_EYEC_SEL", 5886 "TRNSUM_EYE_CLOSE_PREV_EN", 5887 "TRNSUM_EYE_CLOSURE_EN", 5888 "TRNSUM_EYE_CLOSURE_ERR_SEL", 5889 "TRNSUM_FRZ_FRC", 5890 "TRNSUM_FRZ_FRC_VAL", 5891 "TRNSUM_GAIN", 5892 "TRNSUM_INL_MEAS_EN", 5893 "TRNSUM_INL_PHS_PTR", 5894 "TRNSUM_INV_PATTERN_EN", 5895 "TRNSUM_LOW", 5896 "TRNSUM_MODE_SEL", 5897 "TRNSUM_MULTI_LEVEL_ISI", 5898 "TRNSUM_PATTERN_0", 5899 "TRNSUM_PATTERN_0_BIT_EN", 5900 "TRNSUM_PATTERN_1", 5901 "TRNSUM_PATTERN_1_BIT_EN", 5902 "TRNSUM_PATTERN_2", 5903 "TRNSUM_PATTERN_2_BIT_EN", 5904 "TRNSUM_PATTERN_7LVL_EN", 5905 "TRNSUM_PATTERN_FULL_CHECK_OFF", 5906 "TRNSUM_PATTERN_MATCH_SEL", 5907 "TRNSUM_PRBS_DP_INVERT", 5908 "TRNSUM_PRBS_PRECODER_AUTOSEED", 5909 "TRNSUM_PRBS_PRECODER_LOAD_SEED", 5910 "TRNSUM_PRBS_PRECODER_LOAD_ZERO", 5911 "TRNSUM_QPHASE_MULT_EN", 5912 "TRNSUM_RANDOM_TAPSEL_DISABLE", 5913 "TRNSUM_RND_FREE_RUNNING", 5914 "TRNSUM_TAP_EN", 5915 "TRNSUM_TAP_RANGE_SEL", 5916 "TRNSUM_TAP_SIGN", 5917 "TRNSUM_TDT_COUNT", 5918 "TRNSUM_TDT_SLIP", 5919 "TXCOM_LINKTRN_MAX_WAIT_TIMER_PERIOD", 5920 "TXCOM_LINKTRN_MAX_WAIT_TIMER_PERIOD_2NDSET", 5921 "TXCOM_LINKTRN_WAIT_CNTR_LIMIT", 5922 "TXCOM_LINKTRN_WAIT_CNTR_LIMIT_2NDSET", 5923 "TXFIR_DC_ADJUST", 5924 "TXFIR_LEVEL_SHIFT_MODE_EN", 5925 "TXFIR_NRZ_TAP_RANGE_SEL", 5926 "TXFIR_TAP0_COEFF", 5927 "TXFIR_TAP10_COEFF", 5928 "TXFIR_TAP11_COEFF", 5929 "TXFIR_TAP1_COEFF", 5930 "TXFIR_TAP2_COEFF", 5931 "TXFIR_TAP3_COEFF", 5932 "TXFIR_TAP4_COEFF", 5933 "TXFIR_TAP5_COEFF", 5934 "TXFIR_TAP6_COEFF", 5935 "TXFIR_TAP7_COEFF", 5936 "TXFIR_TAP8_COEFF", 5937 "TXFIR_TAP9_COEFF", 5938 "TXFIR_TAP_EN", 5939 "TXFIR_TAP_LOAD", 5940 "TXFIR_TEST_DATA_EN", 5941 "TX_DISABLE_OUTPUT_SEL", 5942 "TX_DISABLE_STATUS", 5943 "TX_DISABLE_TIMER_CTRL", 5944 "TX_DISABLE_TRIGGER", 5945 "TX_EEE_ALERT_EN", 5946 "TX_EEE_QUIET_EN", 5947 "TX_ELEC_IDLE_STATUS", 5948 "TX_FIFO_OVFB", 5949 "TX_FIFO_OVFB_FALL_EDGE_LH", 5950 "TX_HW_FW_HANDSHAKE_DISABLE", 5951 "TX_LANE_ADDR_0", 5952 "TX_LANE_ADDR_1", 5953 "TX_LANE_ADDR_2", 5954 "TX_LANE_ADDR_3", 5955 "TX_LANE_ADDR_4", 5956 "TX_LANE_ADDR_5", 5957 "TX_LANE_ADDR_6", 5958 "TX_LANE_ADDR_7", 5959 "TX_LANE_DP_RESET_STATE", 5960 "TX_LANE_REG_RESET_OCCURRED", 5961 "TX_LANE_RESET_RELEASED", 5962 "TX_LANE_RESET_RELEASED_INDEX", 5963 "TX_LN_DP_S_RSTB", 5964 "TX_LN_S_RSTB", 5965 "TX_MULTICAST_MASK_CONTROL", 5966 "TX_MULTICAST_MASK_CONTROL_STATUS", 5967 "TX_MUX_SEL_ORDER", 5968 "TX_OSR_MODE", 5969 "TX_OSR_MODE_FRC", 5970 "TX_OSR_MODE_FRC_VAL", 5971 "TX_OSR_MODE_PIN", 5972 "TX_PAM4_MODE", 5973 "TX_PAM4_MODE_FRC", 5974 "TX_PAM4_MODE_FRC_VAL", 5975 "TX_PAM4_MODE_PIN", 5976 "TX_PCS_NATIVE_ANA_FRMT_EN", 5977 "TX_PI_EN", 5978 "TX_PI_EXT_CTRL_EN", 5979 "TX_PI_EXT_PD_SEL", 5980 "TX_PI_EXT_PHASE_BWSEL_INTEG", 5981 "TX_PI_EXT_PHASE_STEP_CNT_FULL_BYPASS", 5982 "TX_PI_EXT_PHASE_STEP_CNT_INVERT", 5983 "TX_PI_EXT_PHASE_STEP_CNT_SEL", 5984 "TX_PI_FIRST_ORDER_BWSEL_INTEG", 5985 "TX_PI_FIRST_ORDER_BWSEL_INTEG_S1", 5986 "TX_PI_FREQ_OVERRIDE_EN", 5987 "TX_PI_FREQ_OVERRIDE_EN_S1", 5988 "TX_PI_FREQ_OVERRIDE_VAL", 5989 "TX_PI_FRZ_FRC", 5990 "TX_PI_FRZ_FRC_VAL", 5991 "TX_PI_FRZ_MODE", 5992 "TX_PI_FRZ_MODE_S1", 5993 "TX_PI_HS_FIFO_PHSERR", 5994 "TX_PI_HS_FIFO_PHSERR_INVERT", 5995 "TX_PI_HS_FIFO_PHSERR_SEL", 5996 "TX_PI_INTEG1_REG", 5997 "TX_PI_INTEG2_REG", 5998 "TX_PI_INTEG2_REG_S1", 5999 "TX_PI_JITTER_FILTER_EN", 6000 "TX_PI_JITTER_FILTER_EN_S1", 6001 "TX_PI_JIT_AMP", 6002 "TX_PI_JIT_FREQ_IDX", 6003 "TX_PI_JIT_SSC_FREQ_MODE", 6004 "TX_PI_LOOP_FILTER_STABLE", 6005 "TX_PI_LOOP_TIMING_SRC_SEL", 6006 "TX_PI_PD_BYPASS_FLT", 6007 "TX_PI_PD_BYPASS_VCO", 6008 "TX_PI_PHASE_CNTR", 6009 "TX_PI_PHASE_ERR", 6010 "TX_PI_PHASE_ERR_S1", 6011 "TX_PI_PHASE_INVERT", 6012 "TX_PI_PHASE_OVERRIDE", 6013 "TX_PI_PHASE_STEP_DIR", 6014 "TX_PI_PHASE_STEP_NUM", 6015 "TX_PI_PHASE_STROBE", 6016 "TX_PI_PHASE_SUM_CAPTURE_RESYNC_LH", 6017 "TX_PI_REPEATER_MODE_EN", 6018 "TX_PI_RESET_CODE_DBG", 6019 "TX_PI_SAMPLER_MAX_CNT", 6020 "TX_PI_SECOND_ORDER_BWSEL_INTEG", 6021 "TX_PI_SECOND_ORDER_LOOP_EN", 6022 "TX_PI_SJ_GEN_EN", 6023 "TX_PI_SSC_GEN_EN", 6024 "TX_PLL_SELECT", 6025 "TX_PMD_DP_INVERT", 6026 "TX_SCRAMBLER_EN", 6027 "TX_TRN_ACTIVE_AUTO_MODE_EN", 6028 "TX_UC_ACK_LANE_CFG_DONE", 6029 "TX_UC_ACK_LANE_DP_RESET", 6030 "UC_ACK_CORE_CFG_DONE", 6031 "UC_ACK_CORE_DP_RESET", 6032 "UC_ACK_DSC_CONFIG", 6033 "UC_ACK_DSC_EEE_DONE", 6034 "UC_ACK_DSC_RESTART", 6035 "UC_ACK_LANE_CFG_DONE", 6036 "UC_ACK_LANE_DP_RESET", 6037 "UC_ACTIVE", 6038 "UC_AFE_SIGDET", 6039 "UC_AFE_SIGDET_CHANGE", 6040 "UC_DSC_ERROR_FOUND", 6041 "UC_DSC_GP_UC_REQ", 6042 "UC_DSC_READY_FOR_CMD", 6043 "UC_DSC_SCRATCH", 6044 "UC_DSC_SUPP_INFO", 6045 "UC_EXT_SIGDET", 6046 "UC_EXT_SIGDET_CHANGE", 6047 "UC_PMD_RX_LOCK", 6048 "UC_PMD_RX_LOCK_CHANGE", 6049 "UC_SIGNAL_DETECT", 6050 "UC_SIGNAL_DETECT_CHANGE", 6051 "UC_TRNSUM_EN", 6052 "UC_TUNE_EN", 6053 "VCOCLK4PCS_S_COMCLK_FRC_ON", 6054 "VCOCLK4PCS_S_COMCLK_SEL", 6055 "VCO_DONE_EN", 6056 "VCO_RANGE_ADJUST", 6057 "VCO_RANGE_ADJUST_EN", 6058 "VCO_RST_EN", 6059 "VCO_START_TIME", 6060 "VCO_STEP_TIME", 6061 "WIN_CAL_CNTR", 6062 }; 6063 6064 #endif 6065 #endif 6066 #endif 6067 #endif /* PHYMOD_CONFIG_INCLUDE_FIELD_INFO */ 6068 6069 6070 6071 /******************************************************************************* 6072 * 6073 * The following is the symbol table itself. 6074 * It defines the entries for all registers and memories. 6075 * It also incorporates the field information for each register and memory if 6076 * applicable. 6077 */ 6078 static const phymod_symbol_t bcmi_blackhawk_xgxs_syms[] = { 6079 #ifndef PHYMOD_CONFIG_EXCLUDE_CHIP_SYMBOLS_BCMI_BLACKHAWK_XGXS 6080 { 6081 BCMI_BLACKHAWK_XGXS_LNKTRNIT_BASE_R_PMD_CTLr, 6082 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6083 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6084 BCMI_BLACKHAWK_XGXS_LNKTRNIT_BASE_R_PMD_CTLr_fields, 6085 #else 6086 0, 6087 #endif 6088 #endif 6089 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6090 PHYMOD_SYMBOL_FLAG_REGISTER, 6091 "LNKTRNIT_BASE_R_PMD_CTLr", 6092 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6093 "LINKTRN_IEEE_TX_LINKTRNIT_BASE_R_PMD_CONTROL_REGISTER_150", 6094 NULL, 6095 #endif 6096 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6097 0x0, /* 0 */ 6098 0, 6099 #endif 6100 }, 6101 { 6102 BCMI_BLACKHAWK_XGXS_LNKTRNIT_BASE_R_PMD_STSr, 6103 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6104 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6105 BCMI_BLACKHAWK_XGXS_LNKTRNIT_BASE_R_PMD_STSr_fields, 6106 #else 6107 0, 6108 #endif 6109 #endif 6110 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6111 PHYMOD_SYMBOL_FLAG_REGISTER, 6112 "LNKTRNIT_BASE_R_PMD_STSr", 6113 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6114 "LINKTRN_IEEE_TX_LINKTRNIT_BASE_R_PMD_STATUS_REGISTER_151", 6115 NULL, 6116 #endif 6117 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6118 0x0, /* 0 */ 6119 0, 6120 #endif 6121 }, 6122 { 6123 BCMI_BLACKHAWK_XGXS_LNKTRNIR_BASE_R_LP_COEFF_UPDr, 6124 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6125 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6126 BCMI_BLACKHAWK_XGXS_LNKTRNIR_BASE_R_LP_COEFF_UPDr_fields, 6127 #else 6128 0, 6129 #endif 6130 #endif 6131 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6132 PHYMOD_SYMBOL_FLAG_REGISTER, 6133 "LNKTRNIR_BASE_R_LP_COEFF_UPDr", 6134 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6135 "LINKTRN_IEEE_RX_LINKTRNIR_BASE_R_LP_COEFF_UPDATE_REGISTER_152", 6136 NULL, 6137 #endif 6138 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6139 0x0, /* 0 */ 6140 0, 6141 #endif 6142 }, 6143 { 6144 BCMI_BLACKHAWK_XGXS_LNKTRNIR_BASE_R_LP_STS_REPr, 6145 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6146 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6147 BCMI_BLACKHAWK_XGXS_LNKTRNIR_BASE_R_LP_STS_REPr_fields, 6148 #else 6149 0, 6150 #endif 6151 #endif 6152 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6153 PHYMOD_SYMBOL_FLAG_REGISTER, 6154 "LNKTRNIR_BASE_R_LP_STS_REPr", 6155 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6156 "LINKTRN_IEEE_RX_LINKTRNIR_BASE_R_LP_STATUS_REPORT_REGISTER_153", 6157 NULL, 6158 #endif 6159 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6160 0x0, /* 0 */ 6161 0, 6162 #endif 6163 }, 6164 { 6165 BCMI_BLACKHAWK_XGXS_LNKTRNIT_BASE_R_LD_COEFF_UPDr, 6166 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6167 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6168 BCMI_BLACKHAWK_XGXS_LNKTRNIT_BASE_R_LD_COEFF_UPDr_fields, 6169 #else 6170 0, 6171 #endif 6172 #endif 6173 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6174 PHYMOD_SYMBOL_FLAG_REGISTER, 6175 "LNKTRNIT_BASE_R_LD_COEFF_UPDr", 6176 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6177 "LINKTRN_IEEE_TX_LINKTRNIT_BASE_R_LD_COEFF_UPDATE_REGISTER_154", 6178 NULL, 6179 #endif 6180 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6181 0x0, /* 0 */ 6182 0, 6183 #endif 6184 }, 6185 { 6186 BCMI_BLACKHAWK_XGXS_LNKTRNIT_BASE_R_LD_STS_REPr, 6187 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6188 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6189 BCMI_BLACKHAWK_XGXS_LNKTRNIT_BASE_R_LD_STS_REPr_fields, 6190 #else 6191 0, 6192 #endif 6193 #endif 6194 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6195 PHYMOD_SYMBOL_FLAG_REGISTER, 6196 "LNKTRNIT_BASE_R_LD_STS_REPr", 6197 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6198 "LINKTRN_IEEE_TX_LINKTRNIT_BASE_R_LD_STATUS_REPORT_REGISTER_155", 6199 NULL, 6200 #endif 6201 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6202 0x0, /* 0 */ 6203 0, 6204 #endif 6205 }, 6206 { 6207 BCMI_BLACKHAWK_XGXS_DSC_RXA_SLCR_OFFS_ADJ1r, 6208 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6209 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6210 BCMI_BLACKHAWK_XGXS_DSC_RXA_SLCR_OFFS_ADJ1r_fields, 6211 #else 6212 0, 6213 #endif 6214 #endif 6215 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6216 PHYMOD_SYMBOL_FLAG_REGISTER, 6217 "DSC_RXA_SLCR_OFFS_ADJ1r", 6218 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6219 "DSC_AFE1_RXA_SLICER_OFFSET_ADJ_1", 6220 NULL, 6221 #endif 6222 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6223 0x0, /* 0 */ 6224 0, 6225 #endif 6226 }, 6227 { 6228 BCMI_BLACKHAWK_XGXS_DSC_RXA_SLCR_OFFS_ADJ2r, 6229 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6230 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6231 BCMI_BLACKHAWK_XGXS_DSC_RXA_SLCR_OFFS_ADJ2r_fields, 6232 #else 6233 0, 6234 #endif 6235 #endif 6236 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6237 PHYMOD_SYMBOL_FLAG_REGISTER, 6238 "DSC_RXA_SLCR_OFFS_ADJ2r", 6239 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6240 "DSC_AFE1_RXA_SLICER_OFFSET_ADJ_2", 6241 NULL, 6242 #endif 6243 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6244 0x0, /* 0 */ 6245 0, 6246 #endif 6247 }, 6248 { 6249 BCMI_BLACKHAWK_XGXS_DSC_RXA_SLCR_OFFS_ADJ3r, 6250 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6251 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6252 BCMI_BLACKHAWK_XGXS_DSC_RXA_SLCR_OFFS_ADJ3r_fields, 6253 #else 6254 0, 6255 #endif 6256 #endif 6257 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6258 PHYMOD_SYMBOL_FLAG_REGISTER, 6259 "DSC_RXA_SLCR_OFFS_ADJ3r", 6260 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6261 "DSC_AFE1_RXA_SLICER_OFFSET_ADJ_3", 6262 NULL, 6263 #endif 6264 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6265 0x0, /* 0 */ 6266 0, 6267 #endif 6268 }, 6269 { 6270 BCMI_BLACKHAWK_XGXS_DSC_RXA_SLCR_OFFS_ADJ4r, 6271 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6272 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6273 BCMI_BLACKHAWK_XGXS_DSC_RXA_SLCR_OFFS_ADJ4r_fields, 6274 #else 6275 0, 6276 #endif 6277 #endif 6278 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6279 PHYMOD_SYMBOL_FLAG_REGISTER, 6280 "DSC_RXA_SLCR_OFFS_ADJ4r", 6281 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6282 "DSC_AFE1_RXA_SLICER_OFFSET_ADJ_4", 6283 NULL, 6284 #endif 6285 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6286 0x0, /* 0 */ 6287 0, 6288 #endif 6289 }, 6290 { 6291 BCMI_BLACKHAWK_XGXS_DSC_RXA_SLCR_OFFS_ADJ5r, 6292 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6293 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6294 BCMI_BLACKHAWK_XGXS_DSC_RXA_SLCR_OFFS_ADJ5r_fields, 6295 #else 6296 0, 6297 #endif 6298 #endif 6299 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6300 PHYMOD_SYMBOL_FLAG_REGISTER, 6301 "DSC_RXA_SLCR_OFFS_ADJ5r", 6302 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6303 "DSC_AFE1_RXA_SLICER_OFFSET_ADJ_5", 6304 NULL, 6305 #endif 6306 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6307 0x0, /* 0 */ 6308 0, 6309 #endif 6310 }, 6311 { 6312 BCMI_BLACKHAWK_XGXS_DSC_RXB_SLCR_OFFS_ADJ1r, 6313 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6314 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6315 BCMI_BLACKHAWK_XGXS_DSC_RXB_SLCR_OFFS_ADJ1r_fields, 6316 #else 6317 0, 6318 #endif 6319 #endif 6320 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6321 PHYMOD_SYMBOL_FLAG_REGISTER, 6322 "DSC_RXB_SLCR_OFFS_ADJ1r", 6323 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6324 "DSC_AFE1_RXB_SLICER_OFFSET_ADJ_1", 6325 NULL, 6326 #endif 6327 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6328 0x0, /* 0 */ 6329 0, 6330 #endif 6331 }, 6332 { 6333 BCMI_BLACKHAWK_XGXS_DSC_RXB_SLCR_OFFS_ADJ2r, 6334 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6335 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6336 BCMI_BLACKHAWK_XGXS_DSC_RXB_SLCR_OFFS_ADJ2r_fields, 6337 #else 6338 0, 6339 #endif 6340 #endif 6341 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6342 PHYMOD_SYMBOL_FLAG_REGISTER, 6343 "DSC_RXB_SLCR_OFFS_ADJ2r", 6344 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6345 "DSC_AFE1_RXB_SLICER_OFFSET_ADJ_2", 6346 NULL, 6347 #endif 6348 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6349 0x0, /* 0 */ 6350 0, 6351 #endif 6352 }, 6353 { 6354 BCMI_BLACKHAWK_XGXS_DSC_RXB_SLCR_OFFS_ADJ3r, 6355 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6356 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6357 BCMI_BLACKHAWK_XGXS_DSC_RXB_SLCR_OFFS_ADJ3r_fields, 6358 #else 6359 0, 6360 #endif 6361 #endif 6362 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6363 PHYMOD_SYMBOL_FLAG_REGISTER, 6364 "DSC_RXB_SLCR_OFFS_ADJ3r", 6365 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6366 "DSC_AFE1_RXB_SLICER_OFFSET_ADJ_3", 6367 NULL, 6368 #endif 6369 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6370 0x0, /* 0 */ 6371 0, 6372 #endif 6373 }, 6374 { 6375 BCMI_BLACKHAWK_XGXS_DSC_RXB_SLCR_OFFS_ADJ4r, 6376 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6377 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6378 BCMI_BLACKHAWK_XGXS_DSC_RXB_SLCR_OFFS_ADJ4r_fields, 6379 #else 6380 0, 6381 #endif 6382 #endif 6383 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6384 PHYMOD_SYMBOL_FLAG_REGISTER, 6385 "DSC_RXB_SLCR_OFFS_ADJ4r", 6386 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6387 "DSC_AFE1_RXB_SLICER_OFFSET_ADJ_4", 6388 NULL, 6389 #endif 6390 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6391 0x0, /* 0 */ 6392 0, 6393 #endif 6394 }, 6395 { 6396 BCMI_BLACKHAWK_XGXS_DSC_RXB_SLCR_OFFS_ADJ5r, 6397 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6398 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6399 BCMI_BLACKHAWK_XGXS_DSC_RXB_SLCR_OFFS_ADJ5r_fields, 6400 #else 6401 0, 6402 #endif 6403 #endif 6404 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6405 PHYMOD_SYMBOL_FLAG_REGISTER, 6406 "DSC_RXB_SLCR_OFFS_ADJ5r", 6407 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6408 "DSC_AFE1_RXB_SLICER_OFFSET_ADJ_5", 6409 NULL, 6410 #endif 6411 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6412 0x0, /* 0 */ 6413 0, 6414 #endif 6415 }, 6416 { 6417 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP4_ABr, 6418 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6419 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6420 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP4_ABr_fields, 6421 #else 6422 0, 6423 #endif 6424 #endif 6425 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6426 PHYMOD_SYMBOL_FLAG_REGISTER, 6427 "DSC_RX_DFE_TAP4_ABr", 6428 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6429 "DSC_AFE2_RX_DFE_TAP4_AB", 6430 NULL, 6431 #endif 6432 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6433 0x0, /* 0 */ 6434 0, 6435 #endif 6436 }, 6437 { 6438 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP4_CDr, 6439 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6440 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6441 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP4_CDr_fields, 6442 #else 6443 0, 6444 #endif 6445 #endif 6446 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6447 PHYMOD_SYMBOL_FLAG_REGISTER, 6448 "DSC_RX_DFE_TAP4_CDr", 6449 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6450 "DSC_AFE2_RX_DFE_TAP4_CD", 6451 NULL, 6452 #endif 6453 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6454 0x0, /* 0 */ 6455 0, 6456 #endif 6457 }, 6458 { 6459 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP5_ABCDr, 6460 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6461 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6462 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP5_ABCDr_fields, 6463 #else 6464 0, 6465 #endif 6466 #endif 6467 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6468 PHYMOD_SYMBOL_FLAG_REGISTER, 6469 "DSC_RX_DFE_TAP5_ABCDr", 6470 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6471 "DSC_AFE2_RX_DFE_TAP5_ABCD", 6472 NULL, 6473 #endif 6474 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6475 0x0, /* 0 */ 6476 0, 6477 #endif 6478 }, 6479 { 6480 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP6_ABCDr, 6481 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6482 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6483 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP6_ABCDr_fields, 6484 #else 6485 0, 6486 #endif 6487 #endif 6488 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6489 PHYMOD_SYMBOL_FLAG_REGISTER, 6490 "DSC_RX_DFE_TAP6_ABCDr", 6491 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6492 "DSC_AFE2_RX_DFE_TAP6_ABCD", 6493 NULL, 6494 #endif 6495 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6496 0x0, /* 0 */ 6497 0, 6498 #endif 6499 }, 6500 { 6501 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP7_ABCDr, 6502 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6503 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6504 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP7_ABCDr_fields, 6505 #else 6506 0, 6507 #endif 6508 #endif 6509 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6510 PHYMOD_SYMBOL_FLAG_REGISTER, 6511 "DSC_RX_DFE_TAP7_ABCDr", 6512 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6513 "DSC_AFE2_RX_DFE_TAP7_ABCD", 6514 NULL, 6515 #endif 6516 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6517 0x0, /* 0 */ 6518 0, 6519 #endif 6520 }, 6521 { 6522 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP8_ABCDr, 6523 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6524 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6525 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP8_ABCDr_fields, 6526 #else 6527 0, 6528 #endif 6529 #endif 6530 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6531 PHYMOD_SYMBOL_FLAG_REGISTER, 6532 "DSC_RX_DFE_TAP8_ABCDr", 6533 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6534 "DSC_AFE2_RX_DFE_TAP8_ABCD", 6535 NULL, 6536 #endif 6537 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6538 0x0, /* 0 */ 6539 0, 6540 #endif 6541 }, 6542 { 6543 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP9_ABCDr, 6544 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6545 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6546 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP9_ABCDr_fields, 6547 #else 6548 0, 6549 #endif 6550 #endif 6551 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6552 PHYMOD_SYMBOL_FLAG_REGISTER, 6553 "DSC_RX_DFE_TAP9_ABCDr", 6554 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6555 "DSC_AFE2_RX_DFE_TAP9_ABCD", 6556 NULL, 6557 #endif 6558 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6559 0x0, /* 0 */ 6560 0, 6561 #endif 6562 }, 6563 { 6564 BCMI_BLACKHAWK_XGXS_DSC_RXC_SLCR_OFFS_ADJ1r, 6565 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6566 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6567 BCMI_BLACKHAWK_XGXS_DSC_RXC_SLCR_OFFS_ADJ1r_fields, 6568 #else 6569 0, 6570 #endif 6571 #endif 6572 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6573 PHYMOD_SYMBOL_FLAG_REGISTER, 6574 "DSC_RXC_SLCR_OFFS_ADJ1r", 6575 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6576 "DSC_AFE2_RXC_SLICER_OFFSET_ADJ_1", 6577 NULL, 6578 #endif 6579 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6580 0x0, /* 0 */ 6581 0, 6582 #endif 6583 }, 6584 { 6585 BCMI_BLACKHAWK_XGXS_DSC_RXC_SLCR_OFFS_ADJ2r, 6586 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6587 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6588 BCMI_BLACKHAWK_XGXS_DSC_RXC_SLCR_OFFS_ADJ2r_fields, 6589 #else 6590 0, 6591 #endif 6592 #endif 6593 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6594 PHYMOD_SYMBOL_FLAG_REGISTER, 6595 "DSC_RXC_SLCR_OFFS_ADJ2r", 6596 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6597 "DSC_AFE2_RXC_SLICER_OFFSET_ADJ_2", 6598 NULL, 6599 #endif 6600 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6601 0x0, /* 0 */ 6602 0, 6603 #endif 6604 }, 6605 { 6606 BCMI_BLACKHAWK_XGXS_DSC_RXC_SLCR_OFFS_ADJ3r, 6607 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6608 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6609 BCMI_BLACKHAWK_XGXS_DSC_RXC_SLCR_OFFS_ADJ3r_fields, 6610 #else 6611 0, 6612 #endif 6613 #endif 6614 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6615 PHYMOD_SYMBOL_FLAG_REGISTER, 6616 "DSC_RXC_SLCR_OFFS_ADJ3r", 6617 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6618 "DSC_AFE2_RXC_SLICER_OFFSET_ADJ_3", 6619 NULL, 6620 #endif 6621 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6622 0x0, /* 0 */ 6623 0, 6624 #endif 6625 }, 6626 { 6627 BCMI_BLACKHAWK_XGXS_DSC_RXC_SLCR_OFFS_ADJ4r, 6628 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6629 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6630 BCMI_BLACKHAWK_XGXS_DSC_RXC_SLCR_OFFS_ADJ4r_fields, 6631 #else 6632 0, 6633 #endif 6634 #endif 6635 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6636 PHYMOD_SYMBOL_FLAG_REGISTER, 6637 "DSC_RXC_SLCR_OFFS_ADJ4r", 6638 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6639 "DSC_AFE2_RXC_SLICER_OFFSET_ADJ_4", 6640 NULL, 6641 #endif 6642 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6643 0x0, /* 0 */ 6644 0, 6645 #endif 6646 }, 6647 { 6648 BCMI_BLACKHAWK_XGXS_DSC_RXC_SLCR_OFFS_ADJ5r, 6649 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6650 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6651 BCMI_BLACKHAWK_XGXS_DSC_RXC_SLCR_OFFS_ADJ5r_fields, 6652 #else 6653 0, 6654 #endif 6655 #endif 6656 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6657 PHYMOD_SYMBOL_FLAG_REGISTER, 6658 "DSC_RXC_SLCR_OFFS_ADJ5r", 6659 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6660 "DSC_AFE2_RXC_SLICER_OFFSET_ADJ_5", 6661 NULL, 6662 #endif 6663 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6664 0x0, /* 0 */ 6665 0, 6666 #endif 6667 }, 6668 { 6669 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP10_ABCDr, 6670 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6671 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6672 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP10_ABCDr_fields, 6673 #else 6674 0, 6675 #endif 6676 #endif 6677 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6678 PHYMOD_SYMBOL_FLAG_REGISTER, 6679 "DSC_RX_DFE_TAP10_ABCDr", 6680 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6681 "DSC_AFE3_RX_DFE_TAP10_ABCD", 6682 NULL, 6683 #endif 6684 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6685 0x0, /* 0 */ 6686 0, 6687 #endif 6688 }, 6689 { 6690 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP11_ABCDr, 6691 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6692 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6693 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP11_ABCDr_fields, 6694 #else 6695 0, 6696 #endif 6697 #endif 6698 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6699 PHYMOD_SYMBOL_FLAG_REGISTER, 6700 "DSC_RX_DFE_TAP11_ABCDr", 6701 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6702 "DSC_AFE3_RX_DFE_TAP11_ABCD", 6703 NULL, 6704 #endif 6705 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6706 0x0, /* 0 */ 6707 0, 6708 #endif 6709 }, 6710 { 6711 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP12_ABCDr, 6712 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6713 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6714 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP12_ABCDr_fields, 6715 #else 6716 0, 6717 #endif 6718 #endif 6719 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6720 PHYMOD_SYMBOL_FLAG_REGISTER, 6721 "DSC_RX_DFE_TAP12_ABCDr", 6722 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6723 "DSC_AFE3_RX_DFE_TAP12_ABCD", 6724 NULL, 6725 #endif 6726 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6727 0x0, /* 0 */ 6728 0, 6729 #endif 6730 }, 6731 { 6732 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP13_ABCDr, 6733 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6734 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6735 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP13_ABCDr_fields, 6736 #else 6737 0, 6738 #endif 6739 #endif 6740 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6741 PHYMOD_SYMBOL_FLAG_REGISTER, 6742 "DSC_RX_DFE_TAP13_ABCDr", 6743 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6744 "DSC_AFE3_RX_DFE_TAP13_ABCD", 6745 NULL, 6746 #endif 6747 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6748 0x0, /* 0 */ 6749 0, 6750 #endif 6751 }, 6752 { 6753 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP14_ABCDr, 6754 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6755 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6756 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP14_ABCDr_fields, 6757 #else 6758 0, 6759 #endif 6760 #endif 6761 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6762 PHYMOD_SYMBOL_FLAG_REGISTER, 6763 "DSC_RX_DFE_TAP14_ABCDr", 6764 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6765 "DSC_AFE3_RX_DFE_TAP14_ABCD", 6766 NULL, 6767 #endif 6768 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6769 0x0, /* 0 */ 6770 0, 6771 #endif 6772 }, 6773 { 6774 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP7_8_MUX_ABCDr, 6775 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6776 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6777 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP7_8_MUX_ABCDr_fields, 6778 #else 6779 0, 6780 #endif 6781 #endif 6782 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6783 PHYMOD_SYMBOL_FLAG_REGISTER, 6784 "DSC_RX_DFE_TAP7_8_MUX_ABCDr", 6785 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6786 "DSC_AFE3_RX_DFE_TAP7_8_MUX_ABCD", 6787 NULL, 6788 #endif 6789 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6790 0x0, /* 0 */ 6791 0, 6792 #endif 6793 }, 6794 { 6795 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP9_10_MUX_ABCDr, 6796 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6797 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6798 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP9_10_MUX_ABCDr_fields, 6799 #else 6800 0, 6801 #endif 6802 #endif 6803 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6804 PHYMOD_SYMBOL_FLAG_REGISTER, 6805 "DSC_RX_DFE_TAP9_10_MUX_ABCDr", 6806 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6807 "DSC_AFE3_RX_DFE_TAP9_10_MUX_ABCD", 6808 NULL, 6809 #endif 6810 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6811 0x0, /* 0 */ 6812 0, 6813 #endif 6814 }, 6815 { 6816 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP11_12_MUX_ABCDr, 6817 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6818 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6819 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP11_12_MUX_ABCDr_fields, 6820 #else 6821 0, 6822 #endif 6823 #endif 6824 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6825 PHYMOD_SYMBOL_FLAG_REGISTER, 6826 "DSC_RX_DFE_TAP11_12_MUX_ABCDr", 6827 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6828 "DSC_AFE3_RX_DFE_TAP11_12_MUX_ABCD", 6829 NULL, 6830 #endif 6831 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6832 0x0, /* 0 */ 6833 0, 6834 #endif 6835 }, 6836 { 6837 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP13_14_MUX_ABCDr, 6838 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6839 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6840 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP13_14_MUX_ABCDr_fields, 6841 #else 6842 0, 6843 #endif 6844 #endif 6845 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6846 PHYMOD_SYMBOL_FLAG_REGISTER, 6847 "DSC_RX_DFE_TAP13_14_MUX_ABCDr", 6848 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6849 "DSC_AFE3_RX_DFE_TAP13_14_MUX_ABCD", 6850 NULL, 6851 #endif 6852 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6853 0x0, /* 0 */ 6854 0, 6855 #endif 6856 }, 6857 { 6858 BCMI_BLACKHAWK_XGXS_DSC_LOAD_PRESETSr, 6859 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6860 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6861 BCMI_BLACKHAWK_XGXS_DSC_LOAD_PRESETSr_fields, 6862 #else 6863 0, 6864 #endif 6865 #endif 6866 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6867 PHYMOD_SYMBOL_FLAG_REGISTER, 6868 "DSC_LOAD_PRESETSr", 6869 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6870 "DSC_AFE3_LOAD_PRESETS", 6871 NULL, 6872 #endif 6873 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6874 0x0, /* 0 */ 6875 0, 6876 #endif 6877 }, 6878 { 6879 BCMI_BLACKHAWK_XGXS_DSC_RXD_SLCR_OFFS_ADJ1r, 6880 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6881 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6882 BCMI_BLACKHAWK_XGXS_DSC_RXD_SLCR_OFFS_ADJ1r_fields, 6883 #else 6884 0, 6885 #endif 6886 #endif 6887 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6888 PHYMOD_SYMBOL_FLAG_REGISTER, 6889 "DSC_RXD_SLCR_OFFS_ADJ1r", 6890 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6891 "DSC_AFE3_RXD_SLICER_OFFSET_ADJ_1", 6892 NULL, 6893 #endif 6894 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6895 0x0, /* 0 */ 6896 0, 6897 #endif 6898 }, 6899 { 6900 BCMI_BLACKHAWK_XGXS_DSC_RXD_SLCR_OFFS_ADJ2r, 6901 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6902 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6903 BCMI_BLACKHAWK_XGXS_DSC_RXD_SLCR_OFFS_ADJ2r_fields, 6904 #else 6905 0, 6906 #endif 6907 #endif 6908 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6909 PHYMOD_SYMBOL_FLAG_REGISTER, 6910 "DSC_RXD_SLCR_OFFS_ADJ2r", 6911 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6912 "DSC_AFE3_RXD_SLICER_OFFSET_ADJ_2", 6913 NULL, 6914 #endif 6915 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6916 0x0, /* 0 */ 6917 0, 6918 #endif 6919 }, 6920 { 6921 BCMI_BLACKHAWK_XGXS_DSC_RXD_SLCR_OFFS_ADJ3r, 6922 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6923 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6924 BCMI_BLACKHAWK_XGXS_DSC_RXD_SLCR_OFFS_ADJ3r_fields, 6925 #else 6926 0, 6927 #endif 6928 #endif 6929 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6930 PHYMOD_SYMBOL_FLAG_REGISTER, 6931 "DSC_RXD_SLCR_OFFS_ADJ3r", 6932 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6933 "DSC_AFE3_RXD_SLICER_OFFSET_ADJ_3", 6934 NULL, 6935 #endif 6936 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6937 0x0, /* 0 */ 6938 0, 6939 #endif 6940 }, 6941 { 6942 BCMI_BLACKHAWK_XGXS_DSC_RXD_SLCR_OFFS_ADJ4r, 6943 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6944 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6945 BCMI_BLACKHAWK_XGXS_DSC_RXD_SLCR_OFFS_ADJ4r_fields, 6946 #else 6947 0, 6948 #endif 6949 #endif 6950 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6951 PHYMOD_SYMBOL_FLAG_REGISTER, 6952 "DSC_RXD_SLCR_OFFS_ADJ4r", 6953 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6954 "DSC_AFE3_RXD_SLICER_OFFSET_ADJ_4", 6955 NULL, 6956 #endif 6957 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6958 0x0, /* 0 */ 6959 0, 6960 #endif 6961 }, 6962 { 6963 BCMI_BLACKHAWK_XGXS_DSC_RXD_SLCR_OFFS_ADJ5r, 6964 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6965 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6966 BCMI_BLACKHAWK_XGXS_DSC_RXD_SLCR_OFFS_ADJ5r_fields, 6967 #else 6968 0, 6969 #endif 6970 #endif 6971 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6972 PHYMOD_SYMBOL_FLAG_REGISTER, 6973 "DSC_RXD_SLCR_OFFS_ADJ5r", 6974 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6975 "DSC_AFE3_RXD_SLICER_OFFSET_ADJ_5", 6976 NULL, 6977 #endif 6978 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 6979 0x0, /* 0 */ 6980 0, 6981 #endif 6982 }, 6983 { 6984 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_PAT_CTL_0Ar, 6985 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 6986 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 6987 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_PAT_CTL_0Ar_fields, 6988 #else 6989 0, 6990 #endif 6991 #endif 6992 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 6993 PHYMOD_SYMBOL_FLAG_REGISTER, 6994 "DSC_TRNSUM_PAT_CTL_0Ar", 6995 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 6996 "DSC_A_TRNSUM_PAT_CTRL_0A", 6997 NULL, 6998 #endif 6999 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7000 0x0, /* 0 */ 7001 0, 7002 #endif 7003 }, 7004 { 7005 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_PAT_CTL_0Br, 7006 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7007 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7008 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_PAT_CTL_0Br_fields, 7009 #else 7010 0, 7011 #endif 7012 #endif 7013 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7014 PHYMOD_SYMBOL_FLAG_REGISTER, 7015 "DSC_TRNSUM_PAT_CTL_0Br", 7016 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7017 "DSC_A_TRNSUM_PAT_CTRL_0B", 7018 NULL, 7019 #endif 7020 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7021 0x0, /* 0 */ 7022 0, 7023 #endif 7024 }, 7025 { 7026 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_PAT_CTL_1Ar, 7027 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7028 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7029 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_PAT_CTL_1Ar_fields, 7030 #else 7031 0, 7032 #endif 7033 #endif 7034 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7035 PHYMOD_SYMBOL_FLAG_REGISTER, 7036 "DSC_TRNSUM_PAT_CTL_1Ar", 7037 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7038 "DSC_A_TRNSUM_PAT_CTRL_1A", 7039 NULL, 7040 #endif 7041 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7042 0x0, /* 0 */ 7043 0, 7044 #endif 7045 }, 7046 { 7047 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_PAT_CTL_1Br, 7048 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7049 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7050 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_PAT_CTL_1Br_fields, 7051 #else 7052 0, 7053 #endif 7054 #endif 7055 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7056 PHYMOD_SYMBOL_FLAG_REGISTER, 7057 "DSC_TRNSUM_PAT_CTL_1Br", 7058 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7059 "DSC_A_TRNSUM_PAT_CTRL_1B", 7060 NULL, 7061 #endif 7062 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7063 0x0, /* 0 */ 7064 0, 7065 #endif 7066 }, 7067 { 7068 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_PAT_CTL_2Ar, 7069 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7070 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7071 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_PAT_CTL_2Ar_fields, 7072 #else 7073 0, 7074 #endif 7075 #endif 7076 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7077 PHYMOD_SYMBOL_FLAG_REGISTER, 7078 "DSC_TRNSUM_PAT_CTL_2Ar", 7079 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7080 "DSC_A_TRNSUM_PAT_CTRL_2A", 7081 NULL, 7082 #endif 7083 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7084 0x0, /* 0 */ 7085 0, 7086 #endif 7087 }, 7088 { 7089 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_PAT_CTL_2Br, 7090 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7091 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7092 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_PAT_CTL_2Br_fields, 7093 #else 7094 0, 7095 #endif 7096 #endif 7097 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7098 PHYMOD_SYMBOL_FLAG_REGISTER, 7099 "DSC_TRNSUM_PAT_CTL_2Br", 7100 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7101 "DSC_A_TRNSUM_PAT_CTRL_2B", 7102 NULL, 7103 #endif 7104 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7105 0x0, /* 0 */ 7106 0, 7107 #endif 7108 }, 7109 { 7110 BCMI_BLACKHAWK_XGXS_DSC_BLW_CTL1r, 7111 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7112 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7113 BCMI_BLACKHAWK_XGXS_DSC_BLW_CTL1r_fields, 7114 #else 7115 0, 7116 #endif 7117 #endif 7118 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7119 PHYMOD_SYMBOL_FLAG_REGISTER, 7120 "DSC_BLW_CTL1r", 7121 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7122 "DSC_A_BLW_CTRL_1", 7123 NULL, 7124 #endif 7125 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7126 0x4296, /* 17046 */ 7127 0, 7128 #endif 7129 }, 7130 { 7131 BCMI_BLACKHAWK_XGXS_DSC_BLW_CTL2r, 7132 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7133 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7134 BCMI_BLACKHAWK_XGXS_DSC_BLW_CTL2r_fields, 7135 #else 7136 0, 7137 #endif 7138 #endif 7139 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7140 PHYMOD_SYMBOL_FLAG_REGISTER, 7141 "DSC_BLW_CTL2r", 7142 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7143 "DSC_A_BLW_CTRL_2", 7144 NULL, 7145 #endif 7146 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7147 0x1002, /* 4098 */ 7148 0, 7149 #endif 7150 }, 7151 { 7152 BCMI_BLACKHAWK_XGXS_DSC_BLW_CTL3r, 7153 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7154 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7155 BCMI_BLACKHAWK_XGXS_DSC_BLW_CTL3r_fields, 7156 #else 7157 0, 7158 #endif 7159 #endif 7160 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7161 PHYMOD_SYMBOL_FLAG_REGISTER, 7162 "DSC_BLW_CTL3r", 7163 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7164 "DSC_A_BLW_CTRL_3", 7165 NULL, 7166 #endif 7167 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7168 0x0, /* 0 */ 7169 0, 7170 #endif 7171 }, 7172 { 7173 BCMI_BLACKHAWK_XGXS_DSC_BLW_CTL4r, 7174 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7175 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7176 BCMI_BLACKHAWK_XGXS_DSC_BLW_CTL4r_fields, 7177 #else 7178 0, 7179 #endif 7180 #endif 7181 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7182 PHYMOD_SYMBOL_FLAG_REGISTER, 7183 "DSC_BLW_CTL4r", 7184 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7185 "DSC_A_BLW_CTRL_4", 7186 NULL, 7187 #endif 7188 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7189 0x7fff, /* 32767 */ 7190 0, 7191 #endif 7192 }, 7193 { 7194 BCMI_BLACKHAWK_XGXS_DSC_BLW_CTL5r, 7195 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7196 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7197 BCMI_BLACKHAWK_XGXS_DSC_BLW_CTL5r_fields, 7198 #else 7199 0, 7200 #endif 7201 #endif 7202 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7203 PHYMOD_SYMBOL_FLAG_REGISTER, 7204 "DSC_BLW_CTL5r", 7205 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7206 "DSC_A_BLW_CTRL_5", 7207 NULL, 7208 #endif 7209 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7210 0x8000, /* 32768 */ 7211 0, 7212 #endif 7213 }, 7214 { 7215 BCMI_BLACKHAWK_XGXS_DSC_BLW_STS_1_TYPEr, 7216 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7217 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7218 BCMI_BLACKHAWK_XGXS_DSC_BLW_STS_1_TYPEr_fields, 7219 #else 7220 0, 7221 #endif 7222 #endif 7223 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7224 PHYMOD_SYMBOL_FLAG_REGISTER, 7225 "DSC_BLW_STS_1_TYPEr", 7226 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7227 "DSC_A_BLW_STATUS_1_TYPE", 7228 NULL, 7229 #endif 7230 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7231 0x20, /* 32 */ 7232 0, 7233 #endif 7234 }, 7235 { 7236 BCMI_BLACKHAWK_XGXS_DSC_BLW_STS_2_TYPEr, 7237 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7238 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7239 BCMI_BLACKHAWK_XGXS_DSC_BLW_STS_2_TYPEr_fields, 7240 #else 7241 0, 7242 #endif 7243 #endif 7244 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7245 PHYMOD_SYMBOL_FLAG_REGISTER, 7246 "DSC_BLW_STS_2_TYPEr", 7247 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7248 "DSC_A_BLW_STATUS_2_TYPE", 7249 NULL, 7250 #endif 7251 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7252 0x0, /* 0 */ 7253 0, 7254 #endif 7255 }, 7256 { 7257 BCMI_BLACKHAWK_XGXS_DSC_UC_CTLr, 7258 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7259 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7260 BCMI_BLACKHAWK_XGXS_DSC_UC_CTLr_fields, 7261 #else 7262 0, 7263 #endif 7264 #endif 7265 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7266 PHYMOD_SYMBOL_FLAG_REGISTER, 7267 "DSC_UC_CTLr", 7268 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7269 "DSC_A_DSC_UC_CTRL", 7270 NULL, 7271 #endif 7272 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7273 0x0, /* 0 */ 7274 0, 7275 #endif 7276 }, 7277 { 7278 BCMI_BLACKHAWK_XGXS_DSC_SCRATCHr, 7279 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7280 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7281 BCMI_BLACKHAWK_XGXS_DSC_SCRATCHr_fields, 7282 #else 7283 0, 7284 #endif 7285 #endif 7286 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7287 PHYMOD_SYMBOL_FLAG_REGISTER, 7288 "DSC_SCRATCHr", 7289 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7290 "DSC_A_DSC_SCRATCH", 7291 NULL, 7292 #endif 7293 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7294 0x0, /* 0 */ 7295 0, 7296 #endif 7297 }, 7298 { 7299 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_A_LOr, 7300 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7301 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7302 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_A_LOr_fields, 7303 #else 7304 0, 7305 #endif 7306 #endif 7307 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7308 PHYMOD_SYMBOL_FLAG_REGISTER, 7309 "DSC_TRNSUM_A_LOr", 7310 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7311 "DSC_B_TRNSUM_A_LOW", 7312 NULL, 7313 #endif 7314 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7315 0x0, /* 0 */ 7316 0, 7317 #endif 7318 }, 7319 { 7320 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_Ar, 7321 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7322 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7323 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_Ar_fields, 7324 #else 7325 0, 7326 #endif 7327 #endif 7328 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7329 PHYMOD_SYMBOL_FLAG_REGISTER, 7330 "DSC_TRNSUM_Ar", 7331 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7332 "DSC_B_TRNSUM_A", 7333 NULL, 7334 #endif 7335 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7336 0x0, /* 0 */ 7337 0, 7338 #endif 7339 }, 7340 { 7341 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_B_LOr, 7342 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7343 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7344 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_B_LOr_fields, 7345 #else 7346 0, 7347 #endif 7348 #endif 7349 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7350 PHYMOD_SYMBOL_FLAG_REGISTER, 7351 "DSC_TRNSUM_B_LOr", 7352 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7353 "DSC_B_TRNSUM_B_LOW", 7354 NULL, 7355 #endif 7356 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7357 0x0, /* 0 */ 7358 0, 7359 #endif 7360 }, 7361 { 7362 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_Br, 7363 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7364 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7365 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_Br_fields, 7366 #else 7367 0, 7368 #endif 7369 #endif 7370 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7371 PHYMOD_SYMBOL_FLAG_REGISTER, 7372 "DSC_TRNSUM_Br", 7373 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7374 "DSC_B_TRNSUM_B", 7375 NULL, 7376 #endif 7377 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7378 0x0, /* 0 */ 7379 0, 7380 #endif 7381 }, 7382 { 7383 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_C_LOr, 7384 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7385 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7386 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_C_LOr_fields, 7387 #else 7388 0, 7389 #endif 7390 #endif 7391 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7392 PHYMOD_SYMBOL_FLAG_REGISTER, 7393 "DSC_TRNSUM_C_LOr", 7394 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7395 "DSC_B_TRNSUM_C_LOW", 7396 NULL, 7397 #endif 7398 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7399 0x0, /* 0 */ 7400 0, 7401 #endif 7402 }, 7403 { 7404 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_Cr, 7405 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7406 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7407 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_Cr_fields, 7408 #else 7409 0, 7410 #endif 7411 #endif 7412 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7413 PHYMOD_SYMBOL_FLAG_REGISTER, 7414 "DSC_TRNSUM_Cr", 7415 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7416 "DSC_B_TRNSUM_C", 7417 NULL, 7418 #endif 7419 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7420 0x0, /* 0 */ 7421 0, 7422 #endif 7423 }, 7424 { 7425 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_D_LOr, 7426 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7427 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7428 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_D_LOr_fields, 7429 #else 7430 0, 7431 #endif 7432 #endif 7433 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7434 PHYMOD_SYMBOL_FLAG_REGISTER, 7435 "DSC_TRNSUM_D_LOr", 7436 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7437 "DSC_B_TRNSUM_D_LOW", 7438 NULL, 7439 #endif 7440 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7441 0x0, /* 0 */ 7442 0, 7443 #endif 7444 }, 7445 { 7446 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_Dr, 7447 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7448 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7449 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_Dr_fields, 7450 #else 7451 0, 7452 #endif 7453 #endif 7454 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7455 PHYMOD_SYMBOL_FLAG_REGISTER, 7456 "DSC_TRNSUM_Dr", 7457 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7458 "DSC_B_TRNSUM_D", 7459 NULL, 7460 #endif 7461 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7462 0x0, /* 0 */ 7463 0, 7464 #endif 7465 }, 7466 { 7467 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_LOr, 7468 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7469 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7470 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_LOr_fields, 7471 #else 7472 0, 7473 #endif 7474 #endif 7475 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7476 PHYMOD_SYMBOL_FLAG_REGISTER, 7477 "DSC_TRNSUM_LOr", 7478 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7479 "DSC_B_TRNSUM_LOW", 7480 NULL, 7481 #endif 7482 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7483 0x0, /* 0 */ 7484 0, 7485 #endif 7486 }, 7487 { 7488 BCMI_BLACKHAWK_XGXS_DSC_TRNSUMr, 7489 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7490 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7491 BCMI_BLACKHAWK_XGXS_DSC_TRNSUMr_fields, 7492 #else 7493 0, 7494 #endif 7495 #endif 7496 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7497 PHYMOD_SYMBOL_FLAG_REGISTER, 7498 "DSC_TRNSUMr", 7499 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7500 "DSC_B_TRNSUM", 7501 NULL, 7502 #endif 7503 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7504 0x0, /* 0 */ 7505 0, 7506 #endif 7507 }, 7508 { 7509 BCMI_BLACKHAWK_XGXS_DSC_VGA_PHASE_THR_STSr, 7510 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7511 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7512 BCMI_BLACKHAWK_XGXS_DSC_VGA_PHASE_THR_STSr_fields, 7513 #else 7514 0, 7515 #endif 7516 #endif 7517 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7518 PHYMOD_SYMBOL_FLAG_REGISTER, 7519 "DSC_VGA_PHASE_THR_STSr", 7520 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7521 "DSC_B_VGA_PHASE_THRESH_STATUS", 7522 NULL, 7523 #endif 7524 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7525 0x0, /* 0 */ 7526 0, 7527 #endif 7528 }, 7529 { 7530 BCMI_BLACKHAWK_XGXS_DSC_VGA_DATA_THR_STSr, 7531 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7532 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7533 BCMI_BLACKHAWK_XGXS_DSC_VGA_DATA_THR_STSr_fields, 7534 #else 7535 0, 7536 #endif 7537 #endif 7538 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7539 PHYMOD_SYMBOL_FLAG_REGISTER, 7540 "DSC_VGA_DATA_THR_STSr", 7541 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7542 "DSC_B_VGA_DATA_THRESH_STATUS", 7543 NULL, 7544 #endif 7545 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7546 0x0, /* 0 */ 7547 0, 7548 #endif 7549 }, 7550 { 7551 BCMI_BLACKHAWK_XGXS_DSC_DC_OFFS_STSr, 7552 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7553 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7554 BCMI_BLACKHAWK_XGXS_DSC_DC_OFFS_STSr_fields, 7555 #else 7556 0, 7557 #endif 7558 #endif 7559 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7560 PHYMOD_SYMBOL_FLAG_REGISTER, 7561 "DSC_DC_OFFS_STSr", 7562 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7563 "DSC_B_DC_OFFSET_STATUS", 7564 NULL, 7565 #endif 7566 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7567 0x0, /* 0 */ 7568 0, 7569 #endif 7570 }, 7571 { 7572 BCMI_BLACKHAWK_XGXS_DSC_VGA_D_THR_STSr, 7573 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7574 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7575 BCMI_BLACKHAWK_XGXS_DSC_VGA_D_THR_STSr_fields, 7576 #else 7577 0, 7578 #endif 7579 #endif 7580 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7581 PHYMOD_SYMBOL_FLAG_REGISTER, 7582 "DSC_VGA_D_THR_STSr", 7583 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7584 "DSC_B_VGA_D_THRESH_STATUS", 7585 NULL, 7586 #endif 7587 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7588 0x2700, /* 9984 */ 7589 0, 7590 #endif 7591 }, 7592 { 7593 BCMI_BLACKHAWK_XGXS_DSC_CDR_CTL0r, 7594 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7595 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7596 BCMI_BLACKHAWK_XGXS_DSC_CDR_CTL0r_fields, 7597 #else 7598 0, 7599 #endif 7600 #endif 7601 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7602 PHYMOD_SYMBOL_FLAG_REGISTER, 7603 "DSC_CDR_CTL0r", 7604 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7605 "DSC_C_CDR_CONTROL_0", 7606 NULL, 7607 #endif 7608 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7609 0x9, /* 9 */ 7610 0, 7611 #endif 7612 }, 7613 { 7614 BCMI_BLACKHAWK_XGXS_DSC_CDR_CTL1r, 7615 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7616 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7617 BCMI_BLACKHAWK_XGXS_DSC_CDR_CTL1r_fields, 7618 #else 7619 0, 7620 #endif 7621 #endif 7622 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7623 PHYMOD_SYMBOL_FLAG_REGISTER, 7624 "DSC_CDR_CTL1r", 7625 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7626 "DSC_C_CDR_CONTROL_1", 7627 NULL, 7628 #endif 7629 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7630 0x7, /* 7 */ 7631 0, 7632 #endif 7633 }, 7634 { 7635 BCMI_BLACKHAWK_XGXS_DSC_CDR_CTL2r, 7636 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7637 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7638 BCMI_BLACKHAWK_XGXS_DSC_CDR_CTL2r_fields, 7639 #else 7640 0, 7641 #endif 7642 #endif 7643 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7644 PHYMOD_SYMBOL_FLAG_REGISTER, 7645 "DSC_CDR_CTL2r", 7646 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7647 "DSC_C_CDR_CONTROL_2", 7648 NULL, 7649 #endif 7650 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7651 0x0, /* 0 */ 7652 0, 7653 #endif 7654 }, 7655 { 7656 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_CTLr, 7657 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7658 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7659 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_CTLr_fields, 7660 #else 7661 0, 7662 #endif 7663 #endif 7664 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7665 PHYMOD_SYMBOL_FLAG_REGISTER, 7666 "DSC_RX_PI_CTLr", 7667 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7668 "DSC_C_RX_PI_CONTROL", 7669 NULL, 7670 #endif 7671 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7672 0x1000, /* 4096 */ 7673 0, 7674 #endif 7675 }, 7676 { 7677 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_CTL2r, 7678 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7679 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7680 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_CTL2r_fields, 7681 #else 7682 0, 7683 #endif 7684 #endif 7685 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7686 PHYMOD_SYMBOL_FLAG_REGISTER, 7687 "DSC_TRNSUM_CTL2r", 7688 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7689 "DSC_C_TRNSUM_CONTROL2", 7690 NULL, 7691 #endif 7692 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7693 0x0, /* 0 */ 7694 0, 7695 #endif 7696 }, 7697 { 7698 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_CTLr, 7699 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7700 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7701 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_CTLr_fields, 7702 #else 7703 0, 7704 #endif 7705 #endif 7706 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7707 PHYMOD_SYMBOL_FLAG_REGISTER, 7708 "DSC_TRNSUM_CTLr", 7709 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7710 "DSC_C_TRNSUM_CONTROL", 7711 NULL, 7712 #endif 7713 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7714 0x0, /* 0 */ 7715 0, 7716 #endif 7717 }, 7718 { 7719 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_TAP_CTLr, 7720 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7721 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7722 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_TAP_CTLr_fields, 7723 #else 7724 0, 7725 #endif 7726 #endif 7727 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7728 PHYMOD_SYMBOL_FLAG_REGISTER, 7729 "DSC_TRNSUM_TAP_CTLr", 7730 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7731 "DSC_C_TRNSUM_TAP_CTRL", 7732 NULL, 7733 #endif 7734 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7735 0x0, /* 0 */ 7736 0, 7737 #endif 7738 }, 7739 { 7740 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_TDT_CTLr, 7741 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7742 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7743 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_TDT_CTLr_fields, 7744 #else 7745 0, 7746 #endif 7747 #endif 7748 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7749 PHYMOD_SYMBOL_FLAG_REGISTER, 7750 "DSC_TRNSUM_TDT_CTLr", 7751 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7752 "DSC_C_TRNSUM_TDT_CTL", 7753 NULL, 7754 #endif 7755 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7756 0x0, /* 0 */ 7757 0, 7758 #endif 7759 }, 7760 { 7761 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_MISCr, 7762 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7763 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7764 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_MISCr_fields, 7765 #else 7766 0, 7767 #endif 7768 #endif 7769 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7770 PHYMOD_SYMBOL_FLAG_REGISTER, 7771 "DSC_TRNSUM_MISCr", 7772 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7773 "DSC_C_TRNSUM_MISC", 7774 NULL, 7775 #endif 7776 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7777 0x0, /* 0 */ 7778 0, 7779 #endif 7780 }, 7781 { 7782 BCMI_BLACKHAWK_XGXS_DSC_SLCRS_WRITE_CTLr, 7783 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7784 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7785 BCMI_BLACKHAWK_XGXS_DSC_SLCRS_WRITE_CTLr_fields, 7786 #else 7787 0, 7788 #endif 7789 #endif 7790 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7791 PHYMOD_SYMBOL_FLAG_REGISTER, 7792 "DSC_SLCRS_WRITE_CTLr", 7793 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7794 "DSC_C_SLICERS_WRITE_CTRL", 7795 NULL, 7796 #endif 7797 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7798 0x0, /* 0 */ 7799 0, 7800 #endif 7801 }, 7802 { 7803 BCMI_BLACKHAWK_XGXS_DSC_LMS_THR_CTLr, 7804 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7805 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7806 BCMI_BLACKHAWK_XGXS_DSC_LMS_THR_CTLr_fields, 7807 #else 7808 0, 7809 #endif 7810 #endif 7811 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7812 PHYMOD_SYMBOL_FLAG_REGISTER, 7813 "DSC_LMS_THR_CTLr", 7814 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7815 "DSC_C_LMS_THRESH_CONTROL", 7816 NULL, 7817 #endif 7818 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7819 0x0, /* 0 */ 7820 0, 7821 #endif 7822 }, 7823 { 7824 BCMI_BLACKHAWK_XGXS_DSC_DC_OFFS_CTLr, 7825 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7826 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7827 BCMI_BLACKHAWK_XGXS_DSC_DC_OFFS_CTLr_fields, 7828 #else 7829 0, 7830 #endif 7831 #endif 7832 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7833 PHYMOD_SYMBOL_FLAG_REGISTER, 7834 "DSC_DC_OFFS_CTLr", 7835 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7836 "DSC_C_DC_OFFSET_CONTROL", 7837 NULL, 7838 #endif 7839 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7840 0x10, /* 16 */ 7841 0, 7842 #endif 7843 }, 7844 { 7845 BCMI_BLACKHAWK_XGXS_DSC_SM_CTL0r, 7846 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7847 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7848 BCMI_BLACKHAWK_XGXS_DSC_SM_CTL0r_fields, 7849 #else 7850 0, 7851 #endif 7852 #endif 7853 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7854 PHYMOD_SYMBOL_FLAG_REGISTER, 7855 "DSC_SM_CTL0r", 7856 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7857 "DSC_D_DSC_SM_CTRL_0", 7858 NULL, 7859 #endif 7860 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7861 0x8, /* 8 */ 7862 0, 7863 #endif 7864 }, 7865 { 7866 BCMI_BLACKHAWK_XGXS_DSC_SM_CTL1r, 7867 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7868 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7869 BCMI_BLACKHAWK_XGXS_DSC_SM_CTL1r_fields, 7870 #else 7871 0, 7872 #endif 7873 #endif 7874 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7875 PHYMOD_SYMBOL_FLAG_REGISTER, 7876 "DSC_SM_CTL1r", 7877 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7878 "DSC_D_DSC_SM_CTRL_1", 7879 NULL, 7880 #endif 7881 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7882 0x200, /* 512 */ 7883 0, 7884 #endif 7885 }, 7886 { 7887 BCMI_BLACKHAWK_XGXS_DSC_SM_CTL2r, 7888 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7889 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7890 BCMI_BLACKHAWK_XGXS_DSC_SM_CTL2r_fields, 7891 #else 7892 0, 7893 #endif 7894 #endif 7895 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7896 PHYMOD_SYMBOL_FLAG_REGISTER, 7897 "DSC_SM_CTL2r", 7898 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7899 "DSC_D_DSC_SM_CTRL_2", 7900 NULL, 7901 #endif 7902 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7903 0x87, /* 135 */ 7904 0, 7905 #endif 7906 }, 7907 { 7908 BCMI_BLACKHAWK_XGXS_DSC_SM_CTL3r, 7909 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7910 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7911 BCMI_BLACKHAWK_XGXS_DSC_SM_CTL3r_fields, 7912 #else 7913 0, 7914 #endif 7915 #endif 7916 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7917 PHYMOD_SYMBOL_FLAG_REGISTER, 7918 "DSC_SM_CTL3r", 7919 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7920 "DSC_D_DSC_SM_CTRL_3", 7921 NULL, 7922 #endif 7923 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7924 0x1c1e, /* 7198 */ 7925 0, 7926 #endif 7927 }, 7928 { 7929 BCMI_BLACKHAWK_XGXS_DSC_SM_CTL4r, 7930 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7931 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7932 BCMI_BLACKHAWK_XGXS_DSC_SM_CTL4r_fields, 7933 #else 7934 0, 7935 #endif 7936 #endif 7937 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7938 PHYMOD_SYMBOL_FLAG_REGISTER, 7939 "DSC_SM_CTL4r", 7940 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7941 "DSC_D_DSC_SM_CTRL_4", 7942 NULL, 7943 #endif 7944 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7945 0x0, /* 0 */ 7946 0, 7947 #endif 7948 }, 7949 { 7950 BCMI_BLACKHAWK_XGXS_DSC_SM_CTL5r, 7951 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7952 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7953 BCMI_BLACKHAWK_XGXS_DSC_SM_CTL5r_fields, 7954 #else 7955 0, 7956 #endif 7957 #endif 7958 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7959 PHYMOD_SYMBOL_FLAG_REGISTER, 7960 "DSC_SM_CTL5r", 7961 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7962 "DSC_D_DSC_SM_CTRL_5", 7963 NULL, 7964 #endif 7965 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7966 0x35ad, /* 13741 */ 7967 0, 7968 #endif 7969 }, 7970 { 7971 BCMI_BLACKHAWK_XGXS_DSC_SM_CTL6r, 7972 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7973 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7974 BCMI_BLACKHAWK_XGXS_DSC_SM_CTL6r_fields, 7975 #else 7976 0, 7977 #endif 7978 #endif 7979 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 7980 PHYMOD_SYMBOL_FLAG_REGISTER, 7981 "DSC_SM_CTL6r", 7982 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 7983 "DSC_D_DSC_SM_CTRL_6", 7984 NULL, 7985 #endif 7986 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 7987 0x340d, /* 13325 */ 7988 0, 7989 #endif 7990 }, 7991 { 7992 BCMI_BLACKHAWK_XGXS_DSC_SM_CTL7r, 7993 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 7994 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 7995 BCMI_BLACKHAWK_XGXS_DSC_SM_CTL7r_fields, 7996 #else 7997 0, 7998 #endif 7999 #endif 8000 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8001 PHYMOD_SYMBOL_FLAG_REGISTER, 8002 "DSC_SM_CTL7r", 8003 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8004 "DSC_D_DSC_SM_CTRL_7", 8005 NULL, 8006 #endif 8007 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8008 0x0, /* 0 */ 8009 0, 8010 #endif 8011 }, 8012 { 8013 BCMI_BLACKHAWK_XGXS_DSC_SM_CTL8r, 8014 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8015 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8016 BCMI_BLACKHAWK_XGXS_DSC_SM_CTL8r_fields, 8017 #else 8018 0, 8019 #endif 8020 #endif 8021 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8022 PHYMOD_SYMBOL_FLAG_REGISTER, 8023 "DSC_SM_CTL8r", 8024 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8025 "DSC_D_DSC_SM_CTRL_8", 8026 NULL, 8027 #endif 8028 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8029 0x11, /* 17 */ 8030 0, 8031 #endif 8032 }, 8033 { 8034 BCMI_BLACKHAWK_XGXS_DSC_SM_CTL9r, 8035 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8036 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8037 BCMI_BLACKHAWK_XGXS_DSC_SM_CTL9r_fields, 8038 #else 8039 0, 8040 #endif 8041 #endif 8042 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8043 PHYMOD_SYMBOL_FLAG_REGISTER, 8044 "DSC_SM_CTL9r", 8045 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8046 "DSC_D_DSC_SM_CTRL_9", 8047 NULL, 8048 #endif 8049 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8050 0x0, /* 0 */ 8051 0, 8052 #endif 8053 }, 8054 { 8055 BCMI_BLACKHAWK_XGXS_DSC_SM_STS_DSC_LOCKr, 8056 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8057 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8058 BCMI_BLACKHAWK_XGXS_DSC_SM_STS_DSC_LOCKr_fields, 8059 #else 8060 0, 8061 #endif 8062 #endif 8063 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8064 PHYMOD_SYMBOL_FLAG_REGISTER, 8065 "DSC_SM_STS_DSC_LOCKr", 8066 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8067 "DSC_D_DSC_SM_STATUS_DSC_LOCK", 8068 NULL, 8069 #endif 8070 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8071 0x0, /* 0 */ 8072 0, 8073 #endif 8074 }, 8075 { 8076 BCMI_BLACKHAWK_XGXS_DSC_SM_STS_DSC_ST_ONE_HOTr, 8077 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8078 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8079 BCMI_BLACKHAWK_XGXS_DSC_SM_STS_DSC_ST_ONE_HOTr_fields, 8080 #else 8081 0, 8082 #endif 8083 #endif 8084 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8085 PHYMOD_SYMBOL_FLAG_REGISTER, 8086 "DSC_SM_STS_DSC_ST_ONE_HOTr", 8087 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8088 "DSC_D_DSC_SM_STATUS_DSC_STATE_ONE_HOT", 8089 NULL, 8090 #endif 8091 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8092 0x0, /* 0 */ 8093 0, 8094 #endif 8095 }, 8096 { 8097 BCMI_BLACKHAWK_XGXS_DSC_SM_STS_DSC_ST_EEE_ONE_HOTr, 8098 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8099 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8100 BCMI_BLACKHAWK_XGXS_DSC_SM_STS_DSC_ST_EEE_ONE_HOTr_fields, 8101 #else 8102 0, 8103 #endif 8104 #endif 8105 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8106 PHYMOD_SYMBOL_FLAG_REGISTER, 8107 "DSC_SM_STS_DSC_ST_EEE_ONE_HOTr", 8108 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8109 "DSC_D_DSC_SM_STATUS_DSC_STATE_EEE_ONE_HOT", 8110 NULL, 8111 #endif 8112 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8113 0x0, /* 0 */ 8114 0, 8115 #endif 8116 }, 8117 { 8118 BCMI_BLACKHAWK_XGXS_DSC_SM_STS_RESTARTr, 8119 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8120 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8121 BCMI_BLACKHAWK_XGXS_DSC_SM_STS_RESTARTr_fields, 8122 #else 8123 0, 8124 #endif 8125 #endif 8126 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8127 PHYMOD_SYMBOL_FLAG_REGISTER, 8128 "DSC_SM_STS_RESTARTr", 8129 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8130 "DSC_D_DSC_SM_STATUS_RESTART", 8131 NULL, 8132 #endif 8133 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8134 0x0, /* 0 */ 8135 0, 8136 #endif 8137 }, 8138 { 8139 BCMI_BLACKHAWK_XGXS_DSC_SM_STS_DSC_STr, 8140 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8141 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8142 BCMI_BLACKHAWK_XGXS_DSC_SM_STS_DSC_STr_fields, 8143 #else 8144 0, 8145 #endif 8146 #endif 8147 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8148 PHYMOD_SYMBOL_FLAG_REGISTER, 8149 "DSC_SM_STS_DSC_STr", 8150 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8151 "DSC_D_DSC_SM_STATUS_DSC_STATE", 8152 NULL, 8153 #endif 8154 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8155 0x0, /* 0 */ 8156 0, 8157 #endif 8158 }, 8159 { 8160 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_CNT_BIN_PDr, 8161 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8162 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8163 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_CNT_BIN_PDr_fields, 8164 #else 8165 0, 8166 #endif 8167 #endif 8168 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8169 PHYMOD_SYMBOL_FLAG_REGISTER, 8170 "DSC_RX_PI_CNT_BIN_PDr", 8171 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8172 "DSC_E_RX_PI_CNT_BIN_PD", 8173 NULL, 8174 #endif 8175 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8176 0x0, /* 0 */ 8177 0, 8178 #endif 8179 }, 8180 { 8181 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_CNT_BIN_LDr, 8182 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8183 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8184 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_CNT_BIN_LDr_fields, 8185 #else 8186 0, 8187 #endif 8188 #endif 8189 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8190 PHYMOD_SYMBOL_FLAG_REGISTER, 8191 "DSC_RX_PI_CNT_BIN_LDr", 8192 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8193 "DSC_E_RX_PI_CNT_BIN_LD", 8194 NULL, 8195 #endif 8196 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8197 0x0, /* 0 */ 8198 0, 8199 #endif 8200 }, 8201 { 8202 BCMI_BLACKHAWK_XGXS_DSC_RX_DATA_15_TO0r, 8203 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8204 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8205 BCMI_BLACKHAWK_XGXS_DSC_RX_DATA_15_TO0r_fields, 8206 #else 8207 0, 8208 #endif 8209 #endif 8210 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8211 PHYMOD_SYMBOL_FLAG_REGISTER, 8212 "DSC_RX_DATA_15_TO0r", 8213 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8214 "DSC_E_RX_DATA_15_TO_0", 8215 NULL, 8216 #endif 8217 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8218 0x0, /* 0 */ 8219 0, 8220 #endif 8221 }, 8222 { 8223 BCMI_BLACKHAWK_XGXS_DSC_RX_DATA_35_TO_20r, 8224 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8225 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8226 BCMI_BLACKHAWK_XGXS_DSC_RX_DATA_35_TO_20r_fields, 8227 #else 8228 0, 8229 #endif 8230 #endif 8231 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8232 PHYMOD_SYMBOL_FLAG_REGISTER, 8233 "DSC_RX_DATA_35_TO_20r", 8234 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8235 "DSC_E_RX_DATA_35_TO_20", 8236 NULL, 8237 #endif 8238 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8239 0x0, /* 0 */ 8240 0, 8241 #endif 8242 }, 8243 { 8244 BCMI_BLACKHAWK_XGXS_DSC_CDR_STS_PHASE_ERRr, 8245 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8246 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8247 BCMI_BLACKHAWK_XGXS_DSC_CDR_STS_PHASE_ERRr_fields, 8248 #else 8249 0, 8250 #endif 8251 #endif 8252 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8253 PHYMOD_SYMBOL_FLAG_REGISTER, 8254 "DSC_CDR_STS_PHASE_ERRr", 8255 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8256 "DSC_E_CDR_STATUS_PHASE_ERROR", 8257 NULL, 8258 #endif 8259 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8260 0x100, /* 256 */ 8261 0, 8262 #endif 8263 }, 8264 { 8265 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_CNT_BIN_Dr, 8266 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8267 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8268 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_CNT_BIN_Dr_fields, 8269 #else 8270 0, 8271 #endif 8272 #endif 8273 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8274 PHYMOD_SYMBOL_FLAG_REGISTER, 8275 "DSC_RX_PI_CNT_BIN_Dr", 8276 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8277 "DSC_E_RX_PI_CNT_BIN_D", 8278 NULL, 8279 #endif 8280 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8281 0x0, /* 0 */ 8282 0, 8283 #endif 8284 }, 8285 { 8286 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_CNT_BIN_Pr, 8287 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8288 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8289 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_CNT_BIN_Pr_fields, 8290 #else 8291 0, 8292 #endif 8293 #endif 8294 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8295 PHYMOD_SYMBOL_FLAG_REGISTER, 8296 "DSC_RX_PI_CNT_BIN_Pr", 8297 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8298 "DSC_E_RX_PI_CNT_BIN_P", 8299 NULL, 8300 #endif 8301 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8302 0x0, /* 0 */ 8303 0, 8304 #endif 8305 }, 8306 { 8307 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_CNT_BIN_Lr, 8308 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8309 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8310 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_CNT_BIN_Lr_fields, 8311 #else 8312 0, 8313 #endif 8314 #endif 8315 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8316 PHYMOD_SYMBOL_FLAG_REGISTER, 8317 "DSC_RX_PI_CNT_BIN_Lr", 8318 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8319 "DSC_E_RX_PI_CNT_BIN_L", 8320 NULL, 8321 #endif 8322 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8323 0x0, /* 0 */ 8324 0, 8325 #endif 8326 }, 8327 { 8328 BCMI_BLACKHAWK_XGXS_DSC_CDR_STS_INTEGr, 8329 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8330 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8331 BCMI_BLACKHAWK_XGXS_DSC_CDR_STS_INTEGr_fields, 8332 #else 8333 0, 8334 #endif 8335 #endif 8336 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8337 PHYMOD_SYMBOL_FLAG_REGISTER, 8338 "DSC_CDR_STS_INTEGr", 8339 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8340 "DSC_E_CDR_STATUS_INTEG_REG", 8341 NULL, 8342 #endif 8343 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8344 0x0, /* 0 */ 8345 0, 8346 #endif 8347 }, 8348 { 8349 BCMI_BLACKHAWK_XGXS_DSC_CDR_1G_STSr, 8350 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8351 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8352 BCMI_BLACKHAWK_XGXS_DSC_CDR_1G_STSr_fields, 8353 #else 8354 0, 8355 #endif 8356 #endif 8357 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8358 PHYMOD_SYMBOL_FLAG_REGISTER, 8359 "DSC_CDR_1G_STSr", 8360 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8361 "DSC_E_CDR_1G_STATUS", 8362 NULL, 8363 #endif 8364 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8365 0x0, /* 0 */ 8366 0, 8367 #endif 8368 }, 8369 { 8370 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_CTR_PHASE_ERRr, 8371 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8372 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8373 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_CTR_PHASE_ERRr_fields, 8374 #else 8375 0, 8376 #endif 8377 #endif 8378 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8379 PHYMOD_SYMBOL_FLAG_REGISTER, 8380 "DSC_RX_PI_CTR_PHASE_ERRr", 8381 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8382 "DSC_E_RX_PI_CNTR_PHASE_ERR", 8383 NULL, 8384 #endif 8385 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8386 0x0, /* 0 */ 8387 0, 8388 #endif 8389 }, 8390 { 8391 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP2_STSr, 8392 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8393 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8394 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP2_STSr_fields, 8395 #else 8396 0, 8397 #endif 8398 #endif 8399 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8400 PHYMOD_SYMBOL_FLAG_REGISTER, 8401 "DSC_RX_DFE_TAP2_STSr", 8402 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8403 "DSC_E_RX_DFE_TAP2_STATUS", 8404 NULL, 8405 #endif 8406 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8407 0x0, /* 0 */ 8408 0, 8409 #endif 8410 }, 8411 { 8412 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP2_3_STSr, 8413 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8414 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8415 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP2_3_STSr_fields, 8416 #else 8417 0, 8418 #endif 8419 #endif 8420 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8421 PHYMOD_SYMBOL_FLAG_REGISTER, 8422 "DSC_RX_DFE_TAP2_3_STSr", 8423 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8424 "DSC_E_RX_DFE_TAP2_3_STATUS", 8425 NULL, 8426 #endif 8427 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8428 0x0, /* 0 */ 8429 0, 8430 #endif 8431 }, 8432 { 8433 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP3_STSr, 8434 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8435 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8436 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP3_STSr_fields, 8437 #else 8438 0, 8439 #endif 8440 #endif 8441 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8442 PHYMOD_SYMBOL_FLAG_REGISTER, 8443 "DSC_RX_DFE_TAP3_STSr", 8444 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8445 "DSC_E_RX_DFE_TAP3_STATUS", 8446 NULL, 8447 #endif 8448 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8449 0x0, /* 0 */ 8450 0, 8451 #endif 8452 }, 8453 { 8454 BCMI_BLACKHAWK_XGXS_DSC_PRESETr, 8455 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8456 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8457 BCMI_BLACKHAWK_XGXS_DSC_PRESETr_fields, 8458 #else 8459 0, 8460 #endif 8461 #endif 8462 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8463 PHYMOD_SYMBOL_FLAG_REGISTER, 8464 "DSC_PRESETr", 8465 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8466 "DSC_E_PRESET_REG", 8467 NULL, 8468 #endif 8469 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8470 0x0, /* 0 */ 8471 0, 8472 #endif 8473 }, 8474 { 8475 BCMI_BLACKHAWK_XGXS_LNKTRNUR_CTL0r, 8476 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8477 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8478 BCMI_BLACKHAWK_XGXS_LNKTRNUR_CTL0r_fields, 8479 #else 8480 0, 8481 #endif 8482 #endif 8483 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8484 PHYMOD_SYMBOL_FLAG_REGISTER, 8485 "LNKTRNUR_CTL0r", 8486 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8487 "LINKTRN_USER_RX_LINKTRNUR_CONTROL0_REGISTER", 8488 NULL, 8489 #endif 8490 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8491 0x4, /* 4 */ 8492 0, 8493 #endif 8494 }, 8495 { 8496 BCMI_BLACKHAWK_XGXS_LNKTRNUR_CTL1r, 8497 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8498 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8499 BCMI_BLACKHAWK_XGXS_LNKTRNUR_CTL1r_fields, 8500 #else 8501 0, 8502 #endif 8503 #endif 8504 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8505 PHYMOD_SYMBOL_FLAG_REGISTER, 8506 "LNKTRNUR_CTL1r", 8507 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8508 "LINKTRN_USER_RX_LINKTRNUR_CONTROL1_REGISTER", 8509 NULL, 8510 #endif 8511 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8512 0x52, /* 82 */ 8513 0, 8514 #endif 8515 }, 8516 { 8517 BCMI_BLACKHAWK_XGXS_LNKTRNUR_CTL2r, 8518 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8519 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8520 BCMI_BLACKHAWK_XGXS_LNKTRNUR_CTL2r_fields, 8521 #else 8522 0, 8523 #endif 8524 #endif 8525 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8526 PHYMOD_SYMBOL_FLAG_REGISTER, 8527 "LNKTRNUR_CTL2r", 8528 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8529 "LINKTRN_USER_RX_LINKTRNUR_CONTROL2_REGISTER", 8530 NULL, 8531 #endif 8532 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8533 0xb90, /* 2960 */ 8534 0, 8535 #endif 8536 }, 8537 { 8538 BCMI_BLACKHAWK_XGXS_LNKTRNUR_STS0r, 8539 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8540 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8541 BCMI_BLACKHAWK_XGXS_LNKTRNUR_STS0r_fields, 8542 #else 8543 0, 8544 #endif 8545 #endif 8546 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8547 PHYMOD_SYMBOL_FLAG_REGISTER, 8548 "LNKTRNUR_STS0r", 8549 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8550 "LINKTRN_USER_RX_LINKTRNUR_STATUS0_REGISTER", 8551 NULL, 8552 #endif 8553 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8554 0x0, /* 0 */ 8555 0, 8556 #endif 8557 }, 8558 { 8559 BCMI_BLACKHAWK_XGXS_LNKTRNUR_UC_INTR_CTL0r, 8560 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8561 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8562 BCMI_BLACKHAWK_XGXS_LNKTRNUR_UC_INTR_CTL0r_fields, 8563 #else 8564 0, 8565 #endif 8566 #endif 8567 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8568 PHYMOD_SYMBOL_FLAG_REGISTER, 8569 "LNKTRNUR_UC_INTR_CTL0r", 8570 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8571 "LINKTRN_USER_RX_LINKTRNUR_MICRO_INTERRUPT_CONTROL0_REGISTER", 8572 NULL, 8573 #endif 8574 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8575 0x0, /* 0 */ 8576 0, 8577 #endif 8578 }, 8579 { 8580 BCMI_BLACKHAWK_XGXS_LNKTRNUR_UC_STS0r, 8581 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8582 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8583 BCMI_BLACKHAWK_XGXS_LNKTRNUR_UC_STS0r_fields, 8584 #else 8585 0, 8586 #endif 8587 #endif 8588 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8589 PHYMOD_SYMBOL_FLAG_REGISTER, 8590 "LNKTRNUR_UC_STS0r", 8591 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8592 "LINKTRN_USER_RX_LINKTRNUR_MICRO_STATUS0_REGISTER", 8593 NULL, 8594 #endif 8595 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8596 0x0, /* 0 */ 8597 0, 8598 #endif 8599 }, 8600 { 8601 BCMI_BLACKHAWK_XGXS_LNKTRNUR_UC_STS1r, 8602 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8603 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8604 BCMI_BLACKHAWK_XGXS_LNKTRNUR_UC_STS1r_fields, 8605 #else 8606 0, 8607 #endif 8608 #endif 8609 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8610 PHYMOD_SYMBOL_FLAG_REGISTER, 8611 "LNKTRNUR_UC_STS1r", 8612 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8613 "LINKTRN_USER_RX_LINKTRNUR_MICRO_STATUS1_REGISTER", 8614 NULL, 8615 #endif 8616 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8617 0x0, /* 0 */ 8618 0, 8619 #endif 8620 }, 8621 { 8622 BCMI_BLACKHAWK_XGXS_LNKTRNUR_CTL3r, 8623 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8624 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8625 BCMI_BLACKHAWK_XGXS_LNKTRNUR_CTL3r_fields, 8626 #else 8627 0, 8628 #endif 8629 #endif 8630 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8631 PHYMOD_SYMBOL_FLAG_REGISTER, 8632 "LNKTRNUR_CTL3r", 8633 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8634 "LINKTRN_USER_RX_LINKTRNUR_CONTROL3_REGISTER", 8635 NULL, 8636 #endif 8637 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8638 0xd, /* 13 */ 8639 0, 8640 #endif 8641 }, 8642 { 8643 BCMI_BLACKHAWK_XGXS_LNKTRNUR_CTL4r, 8644 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8645 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8646 BCMI_BLACKHAWK_XGXS_LNKTRNUR_CTL4r_fields, 8647 #else 8648 0, 8649 #endif 8650 #endif 8651 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8652 PHYMOD_SYMBOL_FLAG_REGISTER, 8653 "LNKTRNUR_CTL4r", 8654 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8655 "LINKTRN_USER_RX_LINKTRNUR_CONTROL4_REGISTER", 8656 NULL, 8657 #endif 8658 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8659 0x0, /* 0 */ 8660 0, 8661 #endif 8662 }, 8663 { 8664 BCMI_BLACKHAWK_XGXS_LNKTRNUR_STS1r, 8665 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8666 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8667 BCMI_BLACKHAWK_XGXS_LNKTRNUR_STS1r_fields, 8668 #else 8669 0, 8670 #endif 8671 #endif 8672 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8673 PHYMOD_SYMBOL_FLAG_REGISTER, 8674 "LNKTRNUR_STS1r", 8675 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8676 "LINKTRN_USER_RX_LINKTRNUR_STATUS1_REGISTER", 8677 NULL, 8678 #endif 8679 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8680 0x0, /* 0 */ 8681 0, 8682 #endif 8683 }, 8684 { 8685 BCMI_BLACKHAWK_XGXS_LNKTRNUR_CTL5r, 8686 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8687 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8688 BCMI_BLACKHAWK_XGXS_LNKTRNUR_CTL5r_fields, 8689 #else 8690 0, 8691 #endif 8692 #endif 8693 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8694 PHYMOD_SYMBOL_FLAG_REGISTER, 8695 "LNKTRNUR_CTL5r", 8696 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8697 "LINKTRN_USER_RX_LINKTRNUR_CONTROL5_REGISTER", 8698 NULL, 8699 #endif 8700 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8701 0x510, /* 1296 */ 8702 0, 8703 #endif 8704 }, 8705 { 8706 BCMI_BLACKHAWK_XGXS_LNKTRNUR_UC_INTR_CTL1r, 8707 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8708 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8709 BCMI_BLACKHAWK_XGXS_LNKTRNUR_UC_INTR_CTL1r_fields, 8710 #else 8711 0, 8712 #endif 8713 #endif 8714 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8715 PHYMOD_SYMBOL_FLAG_REGISTER, 8716 "LNKTRNUR_UC_INTR_CTL1r", 8717 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8718 "LINKTRN_USER_RX_LINKTRNUR_MICRO_INTERRUPT_CONTROL1_REGISTER", 8719 NULL, 8720 #endif 8721 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8722 0x0, /* 0 */ 8723 0, 8724 #endif 8725 }, 8726 { 8727 BCMI_BLACKHAWK_XGXS_LNKTRNUR_UC_INTR_CTL2r, 8728 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8729 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8730 BCMI_BLACKHAWK_XGXS_LNKTRNUR_UC_INTR_CTL2r_fields, 8731 #else 8732 0, 8733 #endif 8734 #endif 8735 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8736 PHYMOD_SYMBOL_FLAG_REGISTER, 8737 "LNKTRNUR_UC_INTR_CTL2r", 8738 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8739 "LINKTRN_USER_RX_LINKTRNUR_MICRO_INTERRUPT_CONTROL2_REGISTER", 8740 NULL, 8741 #endif 8742 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8743 0x0, /* 0 */ 8744 0, 8745 #endif 8746 }, 8747 { 8748 BCMI_BLACKHAWK_XGXS_LNKTRNUT_XMT_UPD_PAGEr, 8749 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8750 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8751 BCMI_BLACKHAWK_XGXS_LNKTRNUT_XMT_UPD_PAGEr_fields, 8752 #else 8753 0, 8754 #endif 8755 #endif 8756 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8757 PHYMOD_SYMBOL_FLAG_REGISTER, 8758 "LNKTRNUT_XMT_UPD_PAGEr", 8759 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8760 "LINKTRN_USER_TX_LINKTRNUT_XMT_UPDATE_PAGE_REGISTER", 8761 NULL, 8762 #endif 8763 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8764 0x0, /* 0 */ 8765 0, 8766 #endif 8767 }, 8768 { 8769 BCMI_BLACKHAWK_XGXS_LNKTRNUT_LD_XMT_STS_PAGEr, 8770 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8771 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8772 BCMI_BLACKHAWK_XGXS_LNKTRNUT_LD_XMT_STS_PAGEr_fields, 8773 #else 8774 0, 8775 #endif 8776 #endif 8777 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8778 PHYMOD_SYMBOL_FLAG_REGISTER, 8779 "LNKTRNUT_LD_XMT_STS_PAGEr", 8780 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8781 "LINKTRN_USER_TX_LINKTRNUT_LD_XMT_STATUS_PAGE", 8782 NULL, 8783 #endif 8784 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8785 0x0, /* 0 */ 8786 0, 8787 #endif 8788 }, 8789 { 8790 BCMI_BLACKHAWK_XGXS_LNKTRNUT_CTL0r, 8791 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8792 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8793 BCMI_BLACKHAWK_XGXS_LNKTRNUT_CTL0r_fields, 8794 #else 8795 0, 8796 #endif 8797 #endif 8798 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8799 PHYMOD_SYMBOL_FLAG_REGISTER, 8800 "LNKTRNUT_CTL0r", 8801 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8802 "LINKTRN_USER_TX_LINKTRNUT_CONTROL0_REGISTER", 8803 NULL, 8804 #endif 8805 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8806 0x0, /* 0 */ 8807 0, 8808 #endif 8809 }, 8810 { 8811 BCMI_BLACKHAWK_XGXS_LNKTRNUT_CTL1r, 8812 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8813 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8814 BCMI_BLACKHAWK_XGXS_LNKTRNUT_CTL1r_fields, 8815 #else 8816 0, 8817 #endif 8818 #endif 8819 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8820 PHYMOD_SYMBOL_FLAG_REGISTER, 8821 "LNKTRNUT_CTL1r", 8822 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8823 "LINKTRN_USER_TX_LINKTRNUT_CONTROL1_REGISTER", 8824 NULL, 8825 #endif 8826 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8827 0x4, /* 4 */ 8828 0, 8829 #endif 8830 }, 8831 { 8832 BCMI_BLACKHAWK_XGXS_LNKTRNUT_CTL2r, 8833 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8834 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8835 BCMI_BLACKHAWK_XGXS_LNKTRNUT_CTL2r_fields, 8836 #else 8837 0, 8838 #endif 8839 #endif 8840 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8841 PHYMOD_SYMBOL_FLAG_REGISTER, 8842 "LNKTRNUT_CTL2r", 8843 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8844 "LINKTRN_USER_TX_LINKTRNUT_CONTROL2_REGISTER", 8845 NULL, 8846 #endif 8847 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8848 0x1021, /* 4129 */ 8849 0, 8850 #endif 8851 }, 8852 { 8853 BCMI_BLACKHAWK_XGXS_LNKTRNUT_CTL3r, 8854 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8855 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8856 BCMI_BLACKHAWK_XGXS_LNKTRNUT_CTL3r_fields, 8857 #else 8858 0, 8859 #endif 8860 #endif 8861 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8862 PHYMOD_SYMBOL_FLAG_REGISTER, 8863 "LNKTRNUT_CTL3r", 8864 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8865 "LINKTRN_USER_TX_LINKTRNUT_CONTROL3_REGISTER", 8866 NULL, 8867 #endif 8868 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8869 0x1aa0, /* 6816 */ 8870 0, 8871 #endif 8872 }, 8873 { 8874 BCMI_BLACKHAWK_XGXS_LNKTRNUT_STS0r, 8875 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8876 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8877 BCMI_BLACKHAWK_XGXS_LNKTRNUT_STS0r_fields, 8878 #else 8879 0, 8880 #endif 8881 #endif 8882 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8883 PHYMOD_SYMBOL_FLAG_REGISTER, 8884 "LNKTRNUT_STS0r", 8885 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8886 "LINKTRN_USER_TX_LINKTRNUT_STATUS0_REGISTER", 8887 NULL, 8888 #endif 8889 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8890 0x0, /* 0 */ 8891 0, 8892 #endif 8893 }, 8894 { 8895 BCMI_BLACKHAWK_XGXS_LNKTRNUT_CTL4r, 8896 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8897 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8898 BCMI_BLACKHAWK_XGXS_LNKTRNUT_CTL4r_fields, 8899 #else 8900 0, 8901 #endif 8902 #endif 8903 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8904 PHYMOD_SYMBOL_FLAG_REGISTER, 8905 "LNKTRNUT_CTL4r", 8906 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8907 "LINKTRN_USER_TX_LINKTRNUT_CONTROL4_REGISTER", 8908 NULL, 8909 #endif 8910 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8911 0x3f5, /* 1013 */ 8912 0, 8913 #endif 8914 }, 8915 { 8916 BCMI_BLACKHAWK_XGXS_TX_PI_CTL0r, 8917 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8918 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8919 BCMI_BLACKHAWK_XGXS_TX_PI_CTL0r_fields, 8920 #else 8921 0, 8922 #endif 8923 #endif 8924 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8925 PHYMOD_SYMBOL_FLAG_REGISTER, 8926 "TX_PI_CTL0r", 8927 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8928 "TX_PI_8X_PLL2X_V1P0_TX_PI_CONTROL_0", 8929 NULL, 8930 #endif 8931 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8932 0x7000, /* 28672 */ 8933 0, 8934 #endif 8935 }, 8936 { 8937 BCMI_BLACKHAWK_XGXS_TX_PI_CTL1r, 8938 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8939 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8940 BCMI_BLACKHAWK_XGXS_TX_PI_CTL1r_fields, 8941 #else 8942 0, 8943 #endif 8944 #endif 8945 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8946 PHYMOD_SYMBOL_FLAG_REGISTER, 8947 "TX_PI_CTL1r", 8948 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8949 "TX_PI_8X_PLL2X_V1P0_TX_PI_CONTROL_1", 8950 NULL, 8951 #endif 8952 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8953 0x0, /* 0 */ 8954 0, 8955 #endif 8956 }, 8957 { 8958 BCMI_BLACKHAWK_XGXS_TX_PI_CTL2r, 8959 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8960 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8961 BCMI_BLACKHAWK_XGXS_TX_PI_CTL2r_fields, 8962 #else 8963 0, 8964 #endif 8965 #endif 8966 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8967 PHYMOD_SYMBOL_FLAG_REGISTER, 8968 "TX_PI_CTL2r", 8969 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8970 "TX_PI_8X_PLL2X_V1P0_TX_PI_CONTROL_2", 8971 NULL, 8972 #endif 8973 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8974 0x0, /* 0 */ 8975 0, 8976 #endif 8977 }, 8978 { 8979 BCMI_BLACKHAWK_XGXS_TX_PI_CTL3r, 8980 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 8981 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 8982 BCMI_BLACKHAWK_XGXS_TX_PI_CTL3r_fields, 8983 #else 8984 0, 8985 #endif 8986 #endif 8987 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 8988 PHYMOD_SYMBOL_FLAG_REGISTER, 8989 "TX_PI_CTL3r", 8990 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 8991 "TX_PI_8X_PLL2X_V1P0_TX_PI_CONTROL_3", 8992 NULL, 8993 #endif 8994 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 8995 0x100, /* 256 */ 8996 0, 8997 #endif 8998 }, 8999 { 9000 BCMI_BLACKHAWK_XGXS_TX_PI_CTL4r, 9001 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9002 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9003 BCMI_BLACKHAWK_XGXS_TX_PI_CTL4r_fields, 9004 #else 9005 0, 9006 #endif 9007 #endif 9008 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9009 PHYMOD_SYMBOL_FLAG_REGISTER, 9010 "TX_PI_CTL4r", 9011 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9012 "TX_PI_8X_PLL2X_V1P0_TX_PI_CONTROL_4", 9013 NULL, 9014 #endif 9015 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9016 0x704, /* 1796 */ 9017 0, 9018 #endif 9019 }, 9020 { 9021 BCMI_BLACKHAWK_XGXS_TX_PI_CTL5r, 9022 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9023 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9024 BCMI_BLACKHAWK_XGXS_TX_PI_CTL5r_fields, 9025 #else 9026 0, 9027 #endif 9028 #endif 9029 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9030 PHYMOD_SYMBOL_FLAG_REGISTER, 9031 "TX_PI_CTL5r", 9032 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9033 "TX_PI_8X_PLL2X_V1P0_TX_PI_CONTROL_5", 9034 NULL, 9035 #endif 9036 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9037 0x84, /* 132 */ 9038 0, 9039 #endif 9040 }, 9041 { 9042 BCMI_BLACKHAWK_XGXS_TX_PI_STS0r, 9043 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9044 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9045 BCMI_BLACKHAWK_XGXS_TX_PI_STS0r_fields, 9046 #else 9047 0, 9048 #endif 9049 #endif 9050 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9051 PHYMOD_SYMBOL_FLAG_REGISTER, 9052 "TX_PI_STS0r", 9053 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9054 "TX_PI_8X_PLL2X_V1P0_TX_PI_STATUS_0", 9055 NULL, 9056 #endif 9057 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9058 0x0, /* 0 */ 9059 0, 9060 #endif 9061 }, 9062 { 9063 BCMI_BLACKHAWK_XGXS_TX_PI_STS1r, 9064 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9065 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9066 BCMI_BLACKHAWK_XGXS_TX_PI_STS1r_fields, 9067 #else 9068 0, 9069 #endif 9070 #endif 9071 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9072 PHYMOD_SYMBOL_FLAG_REGISTER, 9073 "TX_PI_STS1r", 9074 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9075 "TX_PI_8X_PLL2X_V1P0_TX_PI_STATUS_1", 9076 NULL, 9077 #endif 9078 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9079 0x0, /* 0 */ 9080 0, 9081 #endif 9082 }, 9083 { 9084 BCMI_BLACKHAWK_XGXS_TX_PI_STS2r, 9085 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9086 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9087 BCMI_BLACKHAWK_XGXS_TX_PI_STS2r_fields, 9088 #else 9089 0, 9090 #endif 9091 #endif 9092 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9093 PHYMOD_SYMBOL_FLAG_REGISTER, 9094 "TX_PI_STS2r", 9095 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9096 "TX_PI_8X_PLL2X_V1P0_TX_PI_STATUS_2", 9097 NULL, 9098 #endif 9099 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9100 0x0, /* 0 */ 9101 0, 9102 #endif 9103 }, 9104 { 9105 BCMI_BLACKHAWK_XGXS_TX_PI_STS3r, 9106 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9107 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9108 BCMI_BLACKHAWK_XGXS_TX_PI_STS3r_fields, 9109 #else 9110 0, 9111 #endif 9112 #endif 9113 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9114 PHYMOD_SYMBOL_FLAG_REGISTER, 9115 "TX_PI_STS3r", 9116 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9117 "TX_PI_8X_PLL2X_V1P0_TX_PI_STATUS_3", 9118 NULL, 9119 #endif 9120 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9121 0x0, /* 0 */ 9122 0, 9123 #endif 9124 }, 9125 { 9126 BCMI_BLACKHAWK_XGXS_TX_PI_STS4r, 9127 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9128 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9129 BCMI_BLACKHAWK_XGXS_TX_PI_STS4r_fields, 9130 #else 9131 0, 9132 #endif 9133 #endif 9134 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9135 PHYMOD_SYMBOL_FLAG_REGISTER, 9136 "TX_PI_STS4r", 9137 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9138 "TX_PI_8X_PLL2X_V1P0_TX_PI_STATUS_4", 9139 NULL, 9140 #endif 9141 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9142 0x0, /* 0 */ 9143 0, 9144 #endif 9145 }, 9146 { 9147 BCMI_BLACKHAWK_XGXS_TX_PI_TX_FIFO_OVFB_STSr, 9148 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9149 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9150 BCMI_BLACKHAWK_XGXS_TX_PI_TX_FIFO_OVFB_STSr_fields, 9151 #else 9152 0, 9153 #endif 9154 #endif 9155 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9156 PHYMOD_SYMBOL_FLAG_REGISTER, 9157 "TX_PI_TX_FIFO_OVFB_STSr", 9158 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9159 "TX_PI_8X_PLL2X_V1P0_TX_PI_TX_FIFO_OVFB_STATUS", 9160 NULL, 9161 #endif 9162 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9163 0x0, /* 0 */ 9164 0, 9165 #endif 9166 }, 9167 { 9168 BCMI_BLACKHAWK_XGXS_TX_PI_STS5r, 9169 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9170 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9171 BCMI_BLACKHAWK_XGXS_TX_PI_STS5r_fields, 9172 #else 9173 0, 9174 #endif 9175 #endif 9176 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9177 PHYMOD_SYMBOL_FLAG_REGISTER, 9178 "TX_PI_STS5r", 9179 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9180 "TX_PI_8X_PLL2X_V1P0_TX_PI_STATUS_5", 9181 NULL, 9182 #endif 9183 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9184 0x0, /* 0 */ 9185 0, 9186 #endif 9187 }, 9188 { 9189 BCMI_BLACKHAWK_XGXS_RXTXCOM_OSR_MODE_CTLr, 9190 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9191 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9192 BCMI_BLACKHAWK_XGXS_RXTXCOM_OSR_MODE_CTLr_fields, 9193 #else 9194 0, 9195 #endif 9196 #endif 9197 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9198 PHYMOD_SYMBOL_FLAG_REGISTER, 9199 "RXTXCOM_OSR_MODE_CTLr", 9200 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9201 "RXTXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXTXCOM_OSR_MODE_CONTROL", 9202 NULL, 9203 #endif 9204 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9205 0x0, /* 0 */ 9206 0, 9207 #endif 9208 }, 9209 { 9210 BCMI_BLACKHAWK_XGXS_RXTXCOM_LN_CLK_RST_N_PWRDWN_CTLr, 9211 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9212 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9213 BCMI_BLACKHAWK_XGXS_RXTXCOM_LN_CLK_RST_N_PWRDWN_CTLr_fields, 9214 #else 9215 0, 9216 #endif 9217 #endif 9218 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9219 PHYMOD_SYMBOL_FLAG_REGISTER, 9220 "RXTXCOM_LN_CLK_RST_N_PWRDWN_CTLr", 9221 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9222 "RXTXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXTXCOM_LANE_CLK_RESET_N_POWERDOWN_CONTROL", 9223 NULL, 9224 #endif 9225 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9226 0x0, /* 0 */ 9227 0, 9228 #endif 9229 }, 9230 { 9231 BCMI_BLACKHAWK_XGXS_RXTXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr, 9232 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9233 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9234 BCMI_BLACKHAWK_XGXS_RXTXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields, 9235 #else 9236 0, 9237 #endif 9238 #endif 9239 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9240 PHYMOD_SYMBOL_FLAG_REGISTER, 9241 "RXTXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr", 9242 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9243 "RXTXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXTXCOM_LANE_RESET_N_PWRDN_PIN_KILL_CONTROL", 9244 NULL, 9245 #endif 9246 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9247 0x0, /* 0 */ 9248 0, 9249 #endif 9250 }, 9251 { 9252 BCMI_BLACKHAWK_XGXS_RXTXCOM_UC_ACK_LN_CTLr, 9253 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9254 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9255 BCMI_BLACKHAWK_XGXS_RXTXCOM_UC_ACK_LN_CTLr_fields, 9256 #else 9257 0, 9258 #endif 9259 #endif 9260 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9261 PHYMOD_SYMBOL_FLAG_REGISTER, 9262 "RXTXCOM_UC_ACK_LN_CTLr", 9263 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9264 "RXTXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXTXCOM_UC_ACK_LANE_CONTROL", 9265 NULL, 9266 #endif 9267 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9268 0x0, /* 0 */ 9269 0, 9270 #endif 9271 }, 9272 { 9273 BCMI_BLACKHAWK_XGXS_RXTXCOM_LN_RST_OCC_CTLr, 9274 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9275 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9276 BCMI_BLACKHAWK_XGXS_RXTXCOM_LN_RST_OCC_CTLr_fields, 9277 #else 9278 0, 9279 #endif 9280 #endif 9281 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9282 PHYMOD_SYMBOL_FLAG_REGISTER, 9283 "RXTXCOM_LN_RST_OCC_CTLr", 9284 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9285 "RXTXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXTXCOM_LANE_REG_RESET_OCCURRED_CONTROL", 9286 NULL, 9287 #endif 9288 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9289 0x1, /* 1 */ 9290 0, 9291 #endif 9292 }, 9293 { 9294 BCMI_BLACKHAWK_XGXS_RXTXCOM_PLL_SEL_CTLr, 9295 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9296 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9297 BCMI_BLACKHAWK_XGXS_RXTXCOM_PLL_SEL_CTLr_fields, 9298 #else 9299 0, 9300 #endif 9301 #endif 9302 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9303 PHYMOD_SYMBOL_FLAG_REGISTER, 9304 "RXTXCOM_PLL_SEL_CTLr", 9305 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9306 "RXTXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXTXCOM_PLL_SELECT_CONTROL", 9307 NULL, 9308 #endif 9309 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9310 0x0, /* 0 */ 9311 0, 9312 #endif 9313 }, 9314 { 9315 BCMI_BLACKHAWK_XGXS_RXTXCOM_LN_DP_RST_ST_STSr, 9316 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9317 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9318 BCMI_BLACKHAWK_XGXS_RXTXCOM_LN_DP_RST_ST_STSr_fields, 9319 #else 9320 0, 9321 #endif 9322 #endif 9323 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9324 PHYMOD_SYMBOL_FLAG_REGISTER, 9325 "RXTXCOM_LN_DP_RST_ST_STSr", 9326 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9327 "RXTXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXTXCOM_LANE_DP_RESET_STATE_STATUS", 9328 NULL, 9329 #endif 9330 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9331 0x7, /* 7 */ 9332 0, 9333 #endif 9334 }, 9335 { 9336 BCMI_BLACKHAWK_XGXS_RXTXCOM_MCST_MASK_CTLr, 9337 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9338 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9339 BCMI_BLACKHAWK_XGXS_RXTXCOM_MCST_MASK_CTLr_fields, 9340 #else 9341 0, 9342 #endif 9343 #endif 9344 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9345 PHYMOD_SYMBOL_FLAG_REGISTER, 9346 "RXTXCOM_MCST_MASK_CTLr", 9347 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9348 "RXTXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXTXCOM_MULTICAST_MASK_CONTROL", 9349 NULL, 9350 #endif 9351 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9352 0x0, /* 0 */ 9353 0, 9354 #endif 9355 }, 9356 { 9357 BCMI_BLACKHAWK_XGXS_RXTXCOM_OSR_MODE_STS_MC_MASKr, 9358 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9359 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9360 BCMI_BLACKHAWK_XGXS_RXTXCOM_OSR_MODE_STS_MC_MASKr_fields, 9361 #else 9362 0, 9363 #endif 9364 #endif 9365 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9366 PHYMOD_SYMBOL_FLAG_REGISTER, 9367 "RXTXCOM_OSR_MODE_STS_MC_MASKr", 9368 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9369 "RXTXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXTXCOM_OSR_MODE_STATUS_MC_MASK", 9370 NULL, 9371 #endif 9372 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9373 0x0, /* 0 */ 9374 0, 9375 #endif 9376 }, 9377 { 9378 BCMI_BLACKHAWK_XGXS_RXTXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr, 9379 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9380 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9381 BCMI_BLACKHAWK_XGXS_RXTXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr_fields, 9382 #else 9383 0, 9384 #endif 9385 #endif 9386 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9387 PHYMOD_SYMBOL_FLAG_REGISTER, 9388 "RXTXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr", 9389 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9390 "RXTXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXTXCOM_AFE_RESET_PWRDN_OSR_MODE_PIN_STATUS", 9391 NULL, 9392 #endif 9393 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9394 0x0, /* 0 */ 9395 0, 9396 #endif 9397 }, 9398 { 9399 BCMI_BLACKHAWK_XGXS_RXTXCOM_LN_S_RSTB_CTLr, 9400 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9401 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9402 BCMI_BLACKHAWK_XGXS_RXTXCOM_LN_S_RSTB_CTLr_fields, 9403 #else 9404 0, 9405 #endif 9406 #endif 9407 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9408 PHYMOD_SYMBOL_FLAG_REGISTER, 9409 "RXTXCOM_LN_S_RSTB_CTLr", 9410 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9411 "RXTXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXTXCOM_LN_S_RSTB_CONTROL", 9412 NULL, 9413 #endif 9414 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9415 0x1, /* 1 */ 9416 0, 9417 #endif 9418 }, 9419 { 9420 BCMI_BLACKHAWK_XGXS_AMS_RX_RX_CTL0r, 9421 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9422 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9423 BCMI_BLACKHAWK_XGXS_AMS_RX_RX_CTL0r_fields, 9424 #else 9425 0, 9426 #endif 9427 #endif 9428 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9429 PHYMOD_SYMBOL_FLAG_REGISTER, 9430 "AMS_RX_RX_CTL0r", 9431 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9432 "AMS_RX_RX_CONTROL_0", 9433 NULL, 9434 #endif 9435 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9436 0x10, /* 16 */ 9437 0, 9438 #endif 9439 }, 9440 { 9441 BCMI_BLACKHAWK_XGXS_AMS_RX_RX_CTL1r, 9442 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9443 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9444 BCMI_BLACKHAWK_XGXS_AMS_RX_RX_CTL1r_fields, 9445 #else 9446 0, 9447 #endif 9448 #endif 9449 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9450 PHYMOD_SYMBOL_FLAG_REGISTER, 9451 "AMS_RX_RX_CTL1r", 9452 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9453 "AMS_RX_RX_CONTROL_1", 9454 NULL, 9455 #endif 9456 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9457 0x0, /* 0 */ 9458 0, 9459 #endif 9460 }, 9461 { 9462 BCMI_BLACKHAWK_XGXS_AMS_RX_RX_CTL2r, 9463 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9464 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9465 BCMI_BLACKHAWK_XGXS_AMS_RX_RX_CTL2r_fields, 9466 #else 9467 0, 9468 #endif 9469 #endif 9470 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9471 PHYMOD_SYMBOL_FLAG_REGISTER, 9472 "AMS_RX_RX_CTL2r", 9473 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9474 "AMS_RX_RX_CONTROL_2", 9475 NULL, 9476 #endif 9477 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9478 0xe00, /* 3584 */ 9479 0, 9480 #endif 9481 }, 9482 { 9483 BCMI_BLACKHAWK_XGXS_AMS_RX_RX_CTL3r, 9484 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9485 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9486 BCMI_BLACKHAWK_XGXS_AMS_RX_RX_CTL3r_fields, 9487 #else 9488 0, 9489 #endif 9490 #endif 9491 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9492 PHYMOD_SYMBOL_FLAG_REGISTER, 9493 "AMS_RX_RX_CTL3r", 9494 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9495 "AMS_RX_RX_CONTROL_3", 9496 NULL, 9497 #endif 9498 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9499 0x0, /* 0 */ 9500 0, 9501 #endif 9502 }, 9503 { 9504 BCMI_BLACKHAWK_XGXS_AMS_RX_RX_CTL4r, 9505 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9506 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9507 BCMI_BLACKHAWK_XGXS_AMS_RX_RX_CTL4r_fields, 9508 #else 9509 0, 9510 #endif 9511 #endif 9512 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9513 PHYMOD_SYMBOL_FLAG_REGISTER, 9514 "AMS_RX_RX_CTL4r", 9515 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9516 "AMS_RX_RX_CONTROL_4", 9517 NULL, 9518 #endif 9519 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9520 0x0, /* 0 */ 9521 0, 9522 #endif 9523 }, 9524 { 9525 BCMI_BLACKHAWK_XGXS_AMS_RX_RX_CTL5r, 9526 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9527 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9528 BCMI_BLACKHAWK_XGXS_AMS_RX_RX_CTL5r_fields, 9529 #else 9530 0, 9531 #endif 9532 #endif 9533 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9534 PHYMOD_SYMBOL_FLAG_REGISTER, 9535 "AMS_RX_RX_CTL5r", 9536 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9537 "AMS_RX_RX_CONTROL_5", 9538 NULL, 9539 #endif 9540 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9541 0x0, /* 0 */ 9542 0, 9543 #endif 9544 }, 9545 { 9546 BCMI_BLACKHAWK_XGXS_AMS_RX_RX_CTL6r, 9547 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9548 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9549 BCMI_BLACKHAWK_XGXS_AMS_RX_RX_CTL6r_fields, 9550 #else 9551 0, 9552 #endif 9553 #endif 9554 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9555 PHYMOD_SYMBOL_FLAG_REGISTER, 9556 "AMS_RX_RX_CTL6r", 9557 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9558 "AMS_RX_RX_CONTROL_6", 9559 NULL, 9560 #endif 9561 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9562 0x0, /* 0 */ 9563 0, 9564 #endif 9565 }, 9566 { 9567 BCMI_BLACKHAWK_XGXS_AMS_RX_RX_CTL7r, 9568 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9569 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9570 BCMI_BLACKHAWK_XGXS_AMS_RX_RX_CTL7r_fields, 9571 #else 9572 0, 9573 #endif 9574 #endif 9575 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9576 PHYMOD_SYMBOL_FLAG_REGISTER, 9577 "AMS_RX_RX_CTL7r", 9578 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9579 "AMS_RX_RX_CONTROL_7", 9580 NULL, 9581 #endif 9582 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9583 0x0, /* 0 */ 9584 0, 9585 #endif 9586 }, 9587 { 9588 BCMI_BLACKHAWK_XGXS_AMS_RX_RX_CTL8r, 9589 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9590 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9591 BCMI_BLACKHAWK_XGXS_AMS_RX_RX_CTL8r_fields, 9592 #else 9593 0, 9594 #endif 9595 #endif 9596 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9597 PHYMOD_SYMBOL_FLAG_REGISTER, 9598 "AMS_RX_RX_CTL8r", 9599 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9600 "AMS_RX_RX_CONTROL_8", 9601 NULL, 9602 #endif 9603 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9604 0x0, /* 0 */ 9605 0, 9606 #endif 9607 }, 9608 { 9609 BCMI_BLACKHAWK_XGXS_AMS_RX_RX_CTL9r, 9610 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9611 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9612 BCMI_BLACKHAWK_XGXS_AMS_RX_RX_CTL9r_fields, 9613 #else 9614 0, 9615 #endif 9616 #endif 9617 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9618 PHYMOD_SYMBOL_FLAG_REGISTER, 9619 "AMS_RX_RX_CTL9r", 9620 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9621 "AMS_RX_RX_CONTROL_9", 9622 NULL, 9623 #endif 9624 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9625 0x300, /* 768 */ 9626 0, 9627 #endif 9628 }, 9629 { 9630 BCMI_BLACKHAWK_XGXS_AMS_RX_RX_CTL_10r, 9631 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9632 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9633 BCMI_BLACKHAWK_XGXS_AMS_RX_RX_CTL_10r_fields, 9634 #else 9635 0, 9636 #endif 9637 #endif 9638 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9639 PHYMOD_SYMBOL_FLAG_REGISTER, 9640 "AMS_RX_RX_CTL_10r", 9641 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9642 "AMS_RX_RX_CONTROL_10", 9643 NULL, 9644 #endif 9645 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9646 0x0, /* 0 */ 9647 0, 9648 #endif 9649 }, 9650 { 9651 BCMI_BLACKHAWK_XGXS_AMS_RX_RX_STSr, 9652 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9653 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9654 BCMI_BLACKHAWK_XGXS_AMS_RX_RX_STSr_fields, 9655 #else 9656 0, 9657 #endif 9658 #endif 9659 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9660 PHYMOD_SYMBOL_FLAG_REGISTER, 9661 "AMS_RX_RX_STSr", 9662 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9663 "AMS_RX_RX_STATUS", 9664 NULL, 9665 #endif 9666 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9667 0x8000, /* 32768 */ 9668 0, 9669 #endif 9670 }, 9671 { 9672 BCMI_BLACKHAWK_XGXS_AMS_TX_TX_CTL0r, 9673 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9674 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9675 BCMI_BLACKHAWK_XGXS_AMS_TX_TX_CTL0r_fields, 9676 #else 9677 0, 9678 #endif 9679 #endif 9680 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9681 PHYMOD_SYMBOL_FLAG_REGISTER, 9682 "AMS_TX_TX_CTL0r", 9683 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9684 "AMS_TX_TX_CONTROL_0", 9685 NULL, 9686 #endif 9687 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9688 0x40, /* 64 */ 9689 0, 9690 #endif 9691 }, 9692 { 9693 BCMI_BLACKHAWK_XGXS_AMS_TX_TX_CTL1r, 9694 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9695 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9696 BCMI_BLACKHAWK_XGXS_AMS_TX_TX_CTL1r_fields, 9697 #else 9698 0, 9699 #endif 9700 #endif 9701 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9702 PHYMOD_SYMBOL_FLAG_REGISTER, 9703 "AMS_TX_TX_CTL1r", 9704 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9705 "AMS_TX_TX_CONTROL_1", 9706 NULL, 9707 #endif 9708 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9709 0x0, /* 0 */ 9710 0, 9711 #endif 9712 }, 9713 { 9714 BCMI_BLACKHAWK_XGXS_AMS_TX_TX_CTL2r, 9715 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9716 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9717 BCMI_BLACKHAWK_XGXS_AMS_TX_TX_CTL2r_fields, 9718 #else 9719 0, 9720 #endif 9721 #endif 9722 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9723 PHYMOD_SYMBOL_FLAG_REGISTER, 9724 "AMS_TX_TX_CTL2r", 9725 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9726 "AMS_TX_TX_CONTROL_2", 9727 NULL, 9728 #endif 9729 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9730 0x0, /* 0 */ 9731 0, 9732 #endif 9733 }, 9734 { 9735 BCMI_BLACKHAWK_XGXS_AMS_TX_TX_CTL3r, 9736 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9737 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9738 BCMI_BLACKHAWK_XGXS_AMS_TX_TX_CTL3r_fields, 9739 #else 9740 0, 9741 #endif 9742 #endif 9743 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9744 PHYMOD_SYMBOL_FLAG_REGISTER, 9745 "AMS_TX_TX_CTL3r", 9746 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9747 "AMS_TX_TX_CONTROL_3", 9748 NULL, 9749 #endif 9750 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9751 0x0, /* 0 */ 9752 0, 9753 #endif 9754 }, 9755 { 9756 BCMI_BLACKHAWK_XGXS_AMS_TX_TX_STSr, 9757 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9758 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9759 BCMI_BLACKHAWK_XGXS_AMS_TX_TX_STSr_fields, 9760 #else 9761 0, 9762 #endif 9763 #endif 9764 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9765 PHYMOD_SYMBOL_FLAG_REGISTER, 9766 "AMS_TX_TX_STSr", 9767 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9768 "AMS_TX_TX_STATUS", 9769 NULL, 9770 #endif 9771 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9772 0xa0, /* 160 */ 9773 0, 9774 #endif 9775 }, 9776 { 9777 BCMI_BLACKHAWK_XGXS_SIGDET_CTL0r, 9778 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9779 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9780 BCMI_BLACKHAWK_XGXS_SIGDET_CTL0r_fields, 9781 #else 9782 0, 9783 #endif 9784 #endif 9785 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9786 PHYMOD_SYMBOL_FLAG_REGISTER, 9787 "SIGDET_CTL0r", 9788 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9789 "SIGDET_SIGDET_CTRL_0", 9790 NULL, 9791 #endif 9792 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9793 0x1109, /* 4361 */ 9794 0, 9795 #endif 9796 }, 9797 { 9798 BCMI_BLACKHAWK_XGXS_SIGDET_CTL1r, 9799 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9800 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9801 BCMI_BLACKHAWK_XGXS_SIGDET_CTL1r_fields, 9802 #else 9803 0, 9804 #endif 9805 #endif 9806 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9807 PHYMOD_SYMBOL_FLAG_REGISTER, 9808 "SIGDET_CTL1r", 9809 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9810 "SIGDET_SIGDET_CTRL_1", 9811 NULL, 9812 #endif 9813 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9814 0xa008, /* 40968 */ 9815 0, 9816 #endif 9817 }, 9818 { 9819 BCMI_BLACKHAWK_XGXS_SIGDET_CTL2r, 9820 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9821 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9822 BCMI_BLACKHAWK_XGXS_SIGDET_CTL2r_fields, 9823 #else 9824 0, 9825 #endif 9826 #endif 9827 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9828 PHYMOD_SYMBOL_FLAG_REGISTER, 9829 "SIGDET_CTL2r", 9830 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9831 "SIGDET_SIGDET_CTRL_2", 9832 NULL, 9833 #endif 9834 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9835 0x3f22, /* 16162 */ 9836 0, 9837 #endif 9838 }, 9839 { 9840 BCMI_BLACKHAWK_XGXS_SIGDET_STS0r, 9841 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9842 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9843 BCMI_BLACKHAWK_XGXS_SIGDET_STS0r_fields, 9844 #else 9845 0, 9846 #endif 9847 #endif 9848 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9849 PHYMOD_SYMBOL_FLAG_REGISTER, 9850 "SIGDET_STS0r", 9851 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9852 "SIGDET_SIGDET_STATUS_0", 9853 NULL, 9854 #endif 9855 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9856 0x0, /* 0 */ 9857 0, 9858 #endif 9859 }, 9860 { 9861 BCMI_BLACKHAWK_XGXS_SIGDET_STS1r, 9862 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9863 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9864 BCMI_BLACKHAWK_XGXS_SIGDET_STS1r_fields, 9865 #else 9866 0, 9867 #endif 9868 #endif 9869 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9870 PHYMOD_SYMBOL_FLAG_REGISTER, 9871 "SIGDET_STS1r", 9872 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9873 "SIGDET_SIGDET_STATUS_1", 9874 NULL, 9875 #endif 9876 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9877 0x0, /* 0 */ 9878 0, 9879 #endif 9880 }, 9881 { 9882 BCMI_BLACKHAWK_XGXS_SIGDET_STS2r, 9883 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9884 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9885 BCMI_BLACKHAWK_XGXS_SIGDET_STS2r_fields, 9886 #else 9887 0, 9888 #endif 9889 #endif 9890 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9891 PHYMOD_SYMBOL_FLAG_REGISTER, 9892 "SIGDET_STS2r", 9893 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9894 "SIGDET_SIGDET_STATUS_2", 9895 NULL, 9896 #endif 9897 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9898 0x0, /* 0 */ 9899 0, 9900 #endif 9901 }, 9902 { 9903 BCMI_BLACKHAWK_XGXS_SIGDET_STS3r, 9904 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9905 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9906 BCMI_BLACKHAWK_XGXS_SIGDET_STS3r_fields, 9907 #else 9908 0, 9909 #endif 9910 #endif 9911 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9912 PHYMOD_SYMBOL_FLAG_REGISTER, 9913 "SIGDET_STS3r", 9914 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9915 "SIGDET_SIGDET_STATUS_3", 9916 NULL, 9917 #endif 9918 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9919 0x0, /* 0 */ 9920 0, 9921 #endif 9922 }, 9923 { 9924 BCMI_BLACKHAWK_XGXS_SIGDET_STS4r, 9925 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9926 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9927 BCMI_BLACKHAWK_XGXS_SIGDET_STS4r_fields, 9928 #else 9929 0, 9930 #endif 9931 #endif 9932 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9933 PHYMOD_SYMBOL_FLAG_REGISTER, 9934 "SIGDET_STS4r", 9935 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9936 "SIGDET_SIGDET_STATUS_4", 9937 NULL, 9938 #endif 9939 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9940 0x2, /* 2 */ 9941 0, 9942 #endif 9943 }, 9944 { 9945 BCMI_BLACKHAWK_XGXS_DSC_RX_HOFFS_JITGENr, 9946 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9947 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9948 BCMI_BLACKHAWK_XGXS_DSC_RX_HOFFS_JITGENr_fields, 9949 #else 9950 0, 9951 #endif 9952 #endif 9953 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9954 PHYMOD_SYMBOL_FLAG_REGISTER, 9955 "DSC_RX_HOFFS_JITGENr", 9956 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9957 "DSC_F_RX_HOFFS_JITGEN_REG", 9958 NULL, 9959 #endif 9960 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9961 0x0, /* 0 */ 9962 0, 9963 #endif 9964 }, 9965 { 9966 BCMI_BLACKHAWK_XGXS_DSC_LMS_THR_RANDOM1r, 9967 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9968 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9969 BCMI_BLACKHAWK_XGXS_DSC_LMS_THR_RANDOM1r_fields, 9970 #else 9971 0, 9972 #endif 9973 #endif 9974 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9975 PHYMOD_SYMBOL_FLAG_REGISTER, 9976 "DSC_LMS_THR_RANDOM1r", 9977 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9978 "DSC_F_LMS_THRESH_RANDOM1_REG", 9979 NULL, 9980 #endif 9981 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 9982 0x0, /* 0 */ 9983 0, 9984 #endif 9985 }, 9986 { 9987 BCMI_BLACKHAWK_XGXS_DSC_LMS_THR_RANDOM2r, 9988 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 9989 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 9990 BCMI_BLACKHAWK_XGXS_DSC_LMS_THR_RANDOM2r_fields, 9991 #else 9992 0, 9993 #endif 9994 #endif 9995 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 9996 PHYMOD_SYMBOL_FLAG_REGISTER, 9997 "DSC_LMS_THR_RANDOM2r", 9998 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 9999 "DSC_F_LMS_THRESH_RANDOM2_REG", 10000 NULL, 10001 #endif 10002 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10003 0x0, /* 0 */ 10004 0, 10005 #endif 10006 }, 10007 { 10008 BCMI_BLACKHAWK_XGXS_DSC_LMS_THR_RANDOM3r, 10009 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10010 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10011 BCMI_BLACKHAWK_XGXS_DSC_LMS_THR_RANDOM3r_fields, 10012 #else 10013 0, 10014 #endif 10015 #endif 10016 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10017 PHYMOD_SYMBOL_FLAG_REGISTER, 10018 "DSC_LMS_THR_RANDOM3r", 10019 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10020 "DSC_F_LMS_THRESH_RANDOM3_REG", 10021 NULL, 10022 #endif 10023 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10024 0x0, /* 0 */ 10025 0, 10026 #endif 10027 }, 10028 { 10029 BCMI_BLACKHAWK_XGXS_DSC_LMS_THR_RANDOM4r, 10030 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10031 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10032 BCMI_BLACKHAWK_XGXS_DSC_LMS_THR_RANDOM4r_fields, 10033 #else 10034 0, 10035 #endif 10036 #endif 10037 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10038 PHYMOD_SYMBOL_FLAG_REGISTER, 10039 "DSC_LMS_THR_RANDOM4r", 10040 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10041 "DSC_F_LMS_THRESH_RANDOM4_REG", 10042 NULL, 10043 #endif 10044 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10045 0x0, /* 0 */ 10046 0, 10047 #endif 10048 }, 10049 { 10050 BCMI_BLACKHAWK_XGXS_DSC_LMS_THR_RANDOM5r, 10051 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10052 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10053 BCMI_BLACKHAWK_XGXS_DSC_LMS_THR_RANDOM5r_fields, 10054 #else 10055 0, 10056 #endif 10057 #endif 10058 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10059 PHYMOD_SYMBOL_FLAG_REGISTER, 10060 "DSC_LMS_THR_RANDOM5r", 10061 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10062 "DSC_F_LMS_THRESH_RANDOM5_REG", 10063 NULL, 10064 #endif 10065 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10066 0x0, /* 0 */ 10067 0, 10068 #endif 10069 }, 10070 { 10071 BCMI_BLACKHAWK_XGXS_DSC_LMS_THR_RANDOM6r, 10072 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10073 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10074 BCMI_BLACKHAWK_XGXS_DSC_LMS_THR_RANDOM6r_fields, 10075 #else 10076 0, 10077 #endif 10078 #endif 10079 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10080 PHYMOD_SYMBOL_FLAG_REGISTER, 10081 "DSC_LMS_THR_RANDOM6r", 10082 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10083 "DSC_F_LMS_THRESH_RANDOM6_REG", 10084 NULL, 10085 #endif 10086 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10087 0x0, /* 0 */ 10088 0, 10089 #endif 10090 }, 10091 { 10092 BCMI_BLACKHAWK_XGXS_DSC_LMS_THR_OFFSr, 10093 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10094 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10095 BCMI_BLACKHAWK_XGXS_DSC_LMS_THR_OFFSr_fields, 10096 #else 10097 0, 10098 #endif 10099 #endif 10100 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10101 PHYMOD_SYMBOL_FLAG_REGISTER, 10102 "DSC_LMS_THR_OFFSr", 10103 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10104 "DSC_F_LMS_THRESHOLD_OFFS_REG", 10105 NULL, 10106 #endif 10107 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10108 0x0, /* 0 */ 10109 0, 10110 #endif 10111 }, 10112 { 10113 BCMI_BLACKHAWK_XGXS_DSC_LMS_THR_STSr, 10114 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10115 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10116 BCMI_BLACKHAWK_XGXS_DSC_LMS_THR_STSr_fields, 10117 #else 10118 0, 10119 #endif 10120 #endif 10121 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10122 PHYMOD_SYMBOL_FLAG_REGISTER, 10123 "DSC_LMS_THR_STSr", 10124 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10125 "DSC_F_LMS_THRESH_STS_REG", 10126 NULL, 10127 #endif 10128 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10129 0x0, /* 0 */ 10130 0, 10131 #endif 10132 }, 10133 { 10134 BCMI_BLACKHAWK_XGXS_DSC_LMS_THR_STS2r, 10135 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10136 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10137 BCMI_BLACKHAWK_XGXS_DSC_LMS_THR_STS2r_fields, 10138 #else 10139 0, 10140 #endif 10141 #endif 10142 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10143 PHYMOD_SYMBOL_FLAG_REGISTER, 10144 "DSC_LMS_THR_STS2r", 10145 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10146 "DSC_F_LMS_THRESH_STS2_REG", 10147 NULL, 10148 #endif 10149 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10150 0x0, /* 0 */ 10151 0, 10152 #endif 10153 }, 10154 { 10155 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_INL_MEASr, 10156 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10157 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10158 BCMI_BLACKHAWK_XGXS_DSC_TRNSUM_INL_MEASr_fields, 10159 #else 10160 0, 10161 #endif 10162 #endif 10163 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10164 PHYMOD_SYMBOL_FLAG_REGISTER, 10165 "DSC_TRNSUM_INL_MEASr", 10166 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10167 "DSC_F_TRNSUM_INL_MEAS_REG", 10168 NULL, 10169 #endif 10170 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10171 0x0, /* 0 */ 10172 0, 10173 #endif 10174 }, 10175 { 10176 BCMI_BLACKHAWK_XGXS_DIG_REVID0r, 10177 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10178 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10179 BCMI_BLACKHAWK_XGXS_DIG_REVID0r_fields, 10180 #else 10181 0, 10182 #endif 10183 #endif 10184 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10185 PHYMOD_SYMBOL_FLAG_REGISTER, 10186 "DIG_REVID0r", 10187 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10188 "DIG_COM_REVID0", 10189 NULL, 10190 #endif 10191 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10192 0x366, /* 870 */ 10193 0, 10194 #endif 10195 }, 10196 { 10197 BCMI_BLACKHAWK_XGXS_DIG_RST_CTL_PMDr, 10198 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10199 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10200 BCMI_BLACKHAWK_XGXS_DIG_RST_CTL_PMDr_fields, 10201 #else 10202 0, 10203 #endif 10204 #endif 10205 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10206 PHYMOD_SYMBOL_FLAG_REGISTER, 10207 "DIG_RST_CTL_PMDr", 10208 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10209 "DIG_COM_RESET_CONTROL_PMD", 10210 NULL, 10211 #endif 10212 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10213 0x1, /* 1 */ 10214 0, 10215 #endif 10216 }, 10217 { 10218 BCMI_BLACKHAWK_XGXS_DIG_RST_CTL_CORE_DPr, 10219 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10220 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10221 BCMI_BLACKHAWK_XGXS_DIG_RST_CTL_CORE_DPr_fields, 10222 #else 10223 0, 10224 #endif 10225 #endif 10226 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10227 PHYMOD_SYMBOL_FLAG_REGISTER, 10228 "DIG_RST_CTL_CORE_DPr", 10229 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10230 "DIG_COM_RESET_CONTROL_CORE_DP", 10231 NULL, 10232 #endif 10233 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10234 0x0, /* 0 */ 10235 0, 10236 #endif 10237 }, 10238 { 10239 BCMI_BLACKHAWK_XGXS_DIG_MASKDATAr, 10240 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10241 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10242 BCMI_BLACKHAWK_XGXS_DIG_MASKDATAr_fields, 10243 #else 10244 0, 10245 #endif 10246 #endif 10247 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10248 PHYMOD_SYMBOL_FLAG_REGISTER, 10249 "DIG_MASKDATAr", 10250 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10251 "DIG_COM_MASKDATA_REG", 10252 NULL, 10253 #endif 10254 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10255 0x0, /* 0 */ 10256 0, 10257 #endif 10258 }, 10259 { 10260 BCMI_BLACKHAWK_XGXS_DIG_TOP_USER_CTL0r, 10261 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10262 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10263 BCMI_BLACKHAWK_XGXS_DIG_TOP_USER_CTL0r_fields, 10264 #else 10265 0, 10266 #endif 10267 #endif 10268 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10269 PHYMOD_SYMBOL_FLAG_REGISTER, 10270 "DIG_TOP_USER_CTL0r", 10271 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10272 "DIG_COM_TOP_USER_CONTROL_0", 10273 NULL, 10274 #endif 10275 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10276 0x271, /* 625 */ 10277 0, 10278 #endif 10279 }, 10280 { 10281 BCMI_BLACKHAWK_XGXS_DIG_CORE_RST_OCC_CTLr, 10282 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10283 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10284 BCMI_BLACKHAWK_XGXS_DIG_CORE_RST_OCC_CTLr_fields, 10285 #else 10286 0, 10287 #endif 10288 #endif 10289 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10290 PHYMOD_SYMBOL_FLAG_REGISTER, 10291 "DIG_CORE_RST_OCC_CTLr", 10292 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10293 "DIG_COM_CORE_REG_RESET_OCCURRED_CONTROL", 10294 NULL, 10295 #endif 10296 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10297 0x1, /* 1 */ 10298 0, 10299 #endif 10300 }, 10301 { 10302 BCMI_BLACKHAWK_XGXS_DIG_RST_SEQ_TMR_CTLr, 10303 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10304 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10305 BCMI_BLACKHAWK_XGXS_DIG_RST_SEQ_TMR_CTLr_fields, 10306 #else 10307 0, 10308 #endif 10309 #endif 10310 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10311 PHYMOD_SYMBOL_FLAG_REGISTER, 10312 "DIG_RST_SEQ_TMR_CTLr", 10313 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10314 "DIG_COM_RST_SEQ_TIMER_CONTROL", 10315 NULL, 10316 #endif 10317 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10318 0x8304, /* 33540 */ 10319 0, 10320 #endif 10321 }, 10322 { 10323 BCMI_BLACKHAWK_XGXS_DIG_CORE_DP_RST_ST_STSr, 10324 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10325 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10326 BCMI_BLACKHAWK_XGXS_DIG_CORE_DP_RST_ST_STSr_fields, 10327 #else 10328 0, 10329 #endif 10330 #endif 10331 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10332 PHYMOD_SYMBOL_FLAG_REGISTER, 10333 "DIG_CORE_DP_RST_ST_STSr", 10334 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10335 "DIG_COM_CORE_DP_RESET_STATE_STATUS", 10336 NULL, 10337 #endif 10338 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10339 0x0, /* 0 */ 10340 0, 10341 #endif 10342 }, 10343 { 10344 BCMI_BLACKHAWK_XGXS_DIG_REVID1r, 10345 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10346 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10347 BCMI_BLACKHAWK_XGXS_DIG_REVID1r_fields, 10348 #else 10349 0, 10350 #endif 10351 #endif 10352 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10353 PHYMOD_SYMBOL_FLAG_REGISTER, 10354 "DIG_REVID1r", 10355 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10356 "DIG_COM_REVID1", 10357 NULL, 10358 #endif 10359 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10360 0x803c, /* 32828 */ 10361 0, 10362 #endif 10363 }, 10364 { 10365 BCMI_BLACKHAWK_XGXS_DIG_REVID2r, 10366 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10367 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10368 BCMI_BLACKHAWK_XGXS_DIG_REVID2r_fields, 10369 #else 10370 0, 10371 #endif 10372 #endif 10373 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10374 PHYMOD_SYMBOL_FLAG_REGISTER, 10375 "DIG_REVID2r", 10376 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10377 "DIG_COM_REVID2", 10378 NULL, 10379 #endif 10380 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10381 0x0, /* 0 */ 10382 0, 10383 #endif 10384 }, 10385 { 10386 BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_CTL0r, 10387 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10388 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10389 BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_CTL0r_fields, 10390 #else 10391 0, 10392 #endif 10393 #endif 10394 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10395 PHYMOD_SYMBOL_FLAG_REGISTER, 10396 "AMS_PLL_PLL_CTL0r", 10397 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10398 "AMS_PLL_COM_PLL_CONTROL_0", 10399 NULL, 10400 #endif 10401 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10402 0x200, /* 512 */ 10403 0, 10404 #endif 10405 }, 10406 { 10407 BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_CTL1r, 10408 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10409 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10410 BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_CTL1r_fields, 10411 #else 10412 0, 10413 #endif 10414 #endif 10415 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10416 PHYMOD_SYMBOL_FLAG_REGISTER, 10417 "AMS_PLL_PLL_CTL1r", 10418 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10419 "AMS_PLL_COM_PLL_CONTROL_1", 10420 NULL, 10421 #endif 10422 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10423 0x8001, /* 32769 */ 10424 0, 10425 #endif 10426 }, 10427 { 10428 BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_CTL2r, 10429 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10430 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10431 BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_CTL2r_fields, 10432 #else 10433 0, 10434 #endif 10435 #endif 10436 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10437 PHYMOD_SYMBOL_FLAG_REGISTER, 10438 "AMS_PLL_PLL_CTL2r", 10439 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10440 "AMS_PLL_COM_PLL_CONTROL_2", 10441 NULL, 10442 #endif 10443 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10444 0xf, /* 15 */ 10445 0, 10446 #endif 10447 }, 10448 { 10449 BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_CTL3r, 10450 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10451 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10452 BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_CTL3r_fields, 10453 #else 10454 0, 10455 #endif 10456 #endif 10457 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10458 PHYMOD_SYMBOL_FLAG_REGISTER, 10459 "AMS_PLL_PLL_CTL3r", 10460 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10461 "AMS_PLL_COM_PLL_CONTROL_3", 10462 NULL, 10463 #endif 10464 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10465 0x0, /* 0 */ 10466 0, 10467 #endif 10468 }, 10469 { 10470 BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_CTL4r, 10471 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10472 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10473 BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_CTL4r_fields, 10474 #else 10475 0, 10476 #endif 10477 #endif 10478 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10479 PHYMOD_SYMBOL_FLAG_REGISTER, 10480 "AMS_PLL_PLL_CTL4r", 10481 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10482 "AMS_PLL_COM_PLL_CONTROL_4", 10483 NULL, 10484 #endif 10485 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10486 0x77, /* 119 */ 10487 0, 10488 #endif 10489 }, 10490 { 10491 BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_CTL5r, 10492 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10493 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10494 BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_CTL5r_fields, 10495 #else 10496 0, 10497 #endif 10498 #endif 10499 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10500 PHYMOD_SYMBOL_FLAG_REGISTER, 10501 "AMS_PLL_PLL_CTL5r", 10502 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10503 "AMS_PLL_COM_PLL_CONTROL_5", 10504 NULL, 10505 #endif 10506 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10507 0x2700, /* 9984 */ 10508 0, 10509 #endif 10510 }, 10511 { 10512 BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_CTL6r, 10513 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10514 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10515 BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_CTL6r_fields, 10516 #else 10517 0, 10518 #endif 10519 #endif 10520 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10521 PHYMOD_SYMBOL_FLAG_REGISTER, 10522 "AMS_PLL_PLL_CTL6r", 10523 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10524 "AMS_PLL_COM_PLL_CONTROL_6", 10525 NULL, 10526 #endif 10527 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10528 0x0, /* 0 */ 10529 0, 10530 #endif 10531 }, 10532 { 10533 BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_CTL7r, 10534 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10535 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10536 BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_CTL7r_fields, 10537 #else 10538 0, 10539 #endif 10540 #endif 10541 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10542 PHYMOD_SYMBOL_FLAG_REGISTER, 10543 "AMS_PLL_PLL_CTL7r", 10544 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10545 "AMS_PLL_COM_PLL_CONTROL_7", 10546 NULL, 10547 #endif 10548 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10549 0x2700, /* 9984 */ 10550 0, 10551 #endif 10552 }, 10553 { 10554 BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_CTL8r, 10555 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10556 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10557 BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_CTL8r_fields, 10558 #else 10559 0, 10560 #endif 10561 #endif 10562 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10563 PHYMOD_SYMBOL_FLAG_REGISTER, 10564 "AMS_PLL_PLL_CTL8r", 10565 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10566 "AMS_PLL_COM_PLL_CONTROL_8", 10567 NULL, 10568 #endif 10569 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10570 0x0, /* 0 */ 10571 0, 10572 #endif 10573 }, 10574 { 10575 BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_CTL9r, 10576 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10577 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10578 BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_CTL9r_fields, 10579 #else 10580 0, 10581 #endif 10582 #endif 10583 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10584 PHYMOD_SYMBOL_FLAG_REGISTER, 10585 "AMS_PLL_PLL_CTL9r", 10586 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10587 "AMS_PLL_COM_PLL_CONTROL_9", 10588 NULL, 10589 #endif 10590 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10591 0x0, /* 0 */ 10592 0, 10593 #endif 10594 }, 10595 { 10596 BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_CTL_10r, 10597 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10598 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10599 BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_CTL_10r_fields, 10600 #else 10601 0, 10602 #endif 10603 #endif 10604 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10605 PHYMOD_SYMBOL_FLAG_REGISTER, 10606 "AMS_PLL_PLL_CTL_10r", 10607 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10608 "AMS_PLL_COM_PLL_CONTROL_10", 10609 NULL, 10610 #endif 10611 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10612 0x0, /* 0 */ 10613 0, 10614 #endif 10615 }, 10616 { 10617 BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_INTCTLr, 10618 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10619 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10620 BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_INTCTLr_fields, 10621 #else 10622 0, 10623 #endif 10624 #endif 10625 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10626 PHYMOD_SYMBOL_FLAG_REGISTER, 10627 "AMS_PLL_PLL_INTCTLr", 10628 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10629 "AMS_PLL_COM_PLL_INTCTRL", 10630 NULL, 10631 #endif 10632 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10633 0x4, /* 4 */ 10634 0, 10635 #endif 10636 }, 10637 { 10638 BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_STSr, 10639 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10640 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10641 BCMI_BLACKHAWK_XGXS_AMS_PLL_PLL_STSr_fields, 10642 #else 10643 0, 10644 #endif 10645 #endif 10646 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10647 PHYMOD_SYMBOL_FLAG_REGISTER, 10648 "AMS_PLL_PLL_STSr", 10649 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10650 "AMS_PLL_COM_PLL_STATUS", 10651 NULL, 10652 #endif 10653 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10654 0x27, /* 39 */ 10655 0, 10656 #endif 10657 }, 10658 { 10659 BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ0r, 10660 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10661 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10662 BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ0r_fields, 10663 #else 10664 0, 10665 #endif 10666 #endif 10667 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10668 PHYMOD_SYMBOL_FLAG_REGISTER, 10669 "PATGEN_PATGEN_SEQ0r", 10670 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10671 "PATT_GEN_COM_PATT_GEN_SEQ_0", 10672 NULL, 10673 #endif 10674 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10675 0xff00, /* 65280 */ 10676 0, 10677 #endif 10678 }, 10679 { 10680 BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ1r, 10681 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10682 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10683 BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ1r_fields, 10684 #else 10685 0, 10686 #endif 10687 #endif 10688 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10689 PHYMOD_SYMBOL_FLAG_REGISTER, 10690 "PATGEN_PATGEN_SEQ1r", 10691 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10692 "PATT_GEN_COM_PATT_GEN_SEQ_1", 10693 NULL, 10694 #endif 10695 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10696 0xff00, /* 65280 */ 10697 0, 10698 #endif 10699 }, 10700 { 10701 BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ2r, 10702 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10703 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10704 BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ2r_fields, 10705 #else 10706 0, 10707 #endif 10708 #endif 10709 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10710 PHYMOD_SYMBOL_FLAG_REGISTER, 10711 "PATGEN_PATGEN_SEQ2r", 10712 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10713 "PATT_GEN_COM_PATT_GEN_SEQ_2", 10714 NULL, 10715 #endif 10716 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10717 0xff00, /* 65280 */ 10718 0, 10719 #endif 10720 }, 10721 { 10722 BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ3r, 10723 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10724 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10725 BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ3r_fields, 10726 #else 10727 0, 10728 #endif 10729 #endif 10730 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10731 PHYMOD_SYMBOL_FLAG_REGISTER, 10732 "PATGEN_PATGEN_SEQ3r", 10733 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10734 "PATT_GEN_COM_PATT_GEN_SEQ_3", 10735 NULL, 10736 #endif 10737 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10738 0xff00, /* 65280 */ 10739 0, 10740 #endif 10741 }, 10742 { 10743 BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ4r, 10744 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10745 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10746 BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ4r_fields, 10747 #else 10748 0, 10749 #endif 10750 #endif 10751 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10752 PHYMOD_SYMBOL_FLAG_REGISTER, 10753 "PATGEN_PATGEN_SEQ4r", 10754 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10755 "PATT_GEN_COM_PATT_GEN_SEQ_4", 10756 NULL, 10757 #endif 10758 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10759 0xff00, /* 65280 */ 10760 0, 10761 #endif 10762 }, 10763 { 10764 BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ5r, 10765 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10766 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10767 BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ5r_fields, 10768 #else 10769 0, 10770 #endif 10771 #endif 10772 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10773 PHYMOD_SYMBOL_FLAG_REGISTER, 10774 "PATGEN_PATGEN_SEQ5r", 10775 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10776 "PATT_GEN_COM_PATT_GEN_SEQ_5", 10777 NULL, 10778 #endif 10779 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10780 0xff00, /* 65280 */ 10781 0, 10782 #endif 10783 }, 10784 { 10785 BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ6r, 10786 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10787 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10788 BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ6r_fields, 10789 #else 10790 0, 10791 #endif 10792 #endif 10793 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10794 PHYMOD_SYMBOL_FLAG_REGISTER, 10795 "PATGEN_PATGEN_SEQ6r", 10796 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10797 "PATT_GEN_COM_PATT_GEN_SEQ_6", 10798 NULL, 10799 #endif 10800 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10801 0xff00, /* 65280 */ 10802 0, 10803 #endif 10804 }, 10805 { 10806 BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ7r, 10807 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10808 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10809 BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ7r_fields, 10810 #else 10811 0, 10812 #endif 10813 #endif 10814 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10815 PHYMOD_SYMBOL_FLAG_REGISTER, 10816 "PATGEN_PATGEN_SEQ7r", 10817 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10818 "PATT_GEN_COM_PATT_GEN_SEQ_7", 10819 NULL, 10820 #endif 10821 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10822 0xff00, /* 65280 */ 10823 0, 10824 #endif 10825 }, 10826 { 10827 BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ8r, 10828 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10829 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10830 BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ8r_fields, 10831 #else 10832 0, 10833 #endif 10834 #endif 10835 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10836 PHYMOD_SYMBOL_FLAG_REGISTER, 10837 "PATGEN_PATGEN_SEQ8r", 10838 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10839 "PATT_GEN_COM_PATT_GEN_SEQ_8", 10840 NULL, 10841 #endif 10842 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10843 0xff00, /* 65280 */ 10844 0, 10845 #endif 10846 }, 10847 { 10848 BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ9r, 10849 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10850 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10851 BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ9r_fields, 10852 #else 10853 0, 10854 #endif 10855 #endif 10856 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10857 PHYMOD_SYMBOL_FLAG_REGISTER, 10858 "PATGEN_PATGEN_SEQ9r", 10859 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10860 "PATT_GEN_COM_PATT_GEN_SEQ_9", 10861 NULL, 10862 #endif 10863 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10864 0xff00, /* 65280 */ 10865 0, 10866 #endif 10867 }, 10868 { 10869 BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ_10r, 10870 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10871 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10872 BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ_10r_fields, 10873 #else 10874 0, 10875 #endif 10876 #endif 10877 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10878 PHYMOD_SYMBOL_FLAG_REGISTER, 10879 "PATGEN_PATGEN_SEQ_10r", 10880 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10881 "PATT_GEN_COM_PATT_GEN_SEQ_10", 10882 NULL, 10883 #endif 10884 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10885 0xff00, /* 65280 */ 10886 0, 10887 #endif 10888 }, 10889 { 10890 BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ_11r, 10891 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10892 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10893 BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ_11r_fields, 10894 #else 10895 0, 10896 #endif 10897 #endif 10898 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10899 PHYMOD_SYMBOL_FLAG_REGISTER, 10900 "PATGEN_PATGEN_SEQ_11r", 10901 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10902 "PATT_GEN_COM_PATT_GEN_SEQ_11", 10903 NULL, 10904 #endif 10905 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10906 0xff00, /* 65280 */ 10907 0, 10908 #endif 10909 }, 10910 { 10911 BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ_12r, 10912 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10913 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10914 BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ_12r_fields, 10915 #else 10916 0, 10917 #endif 10918 #endif 10919 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10920 PHYMOD_SYMBOL_FLAG_REGISTER, 10921 "PATGEN_PATGEN_SEQ_12r", 10922 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10923 "PATT_GEN_COM_PATT_GEN_SEQ_12", 10924 NULL, 10925 #endif 10926 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10927 0xff00, /* 65280 */ 10928 0, 10929 #endif 10930 }, 10931 { 10932 BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ_13r, 10933 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10934 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10935 BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ_13r_fields, 10936 #else 10937 0, 10938 #endif 10939 #endif 10940 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10941 PHYMOD_SYMBOL_FLAG_REGISTER, 10942 "PATGEN_PATGEN_SEQ_13r", 10943 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10944 "PATT_GEN_COM_PATT_GEN_SEQ_13", 10945 NULL, 10946 #endif 10947 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10948 0xff00, /* 65280 */ 10949 0, 10950 #endif 10951 }, 10952 { 10953 BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ_14r, 10954 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10955 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10956 BCMI_BLACKHAWK_XGXS_PATGEN_PATGEN_SEQ_14r_fields, 10957 #else 10958 0, 10959 #endif 10960 #endif 10961 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10962 PHYMOD_SYMBOL_FLAG_REGISTER, 10963 "PATGEN_PATGEN_SEQ_14r", 10964 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10965 "PATT_GEN_COM_PATT_GEN_SEQ_14", 10966 NULL, 10967 #endif 10968 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10969 0xff00, /* 65280 */ 10970 0, 10971 #endif 10972 }, 10973 { 10974 BCMI_BLACKHAWK_XGXS_TXFIR_UC_CTL0r, 10975 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10976 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10977 BCMI_BLACKHAWK_XGXS_TXFIR_UC_CTL0r_fields, 10978 #else 10979 0, 10980 #endif 10981 #endif 10982 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 10983 PHYMOD_SYMBOL_FLAG_REGISTER, 10984 "TXFIR_UC_CTL0r", 10985 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 10986 "TX_FED_TXFIR_MICRO_CONTROL0", 10987 NULL, 10988 #endif 10989 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 10990 0xc160, /* 49504 */ 10991 0, 10992 #endif 10993 }, 10994 { 10995 BCMI_BLACKHAWK_XGXS_TXFIR_MISC_CTL0r, 10996 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 10997 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 10998 BCMI_BLACKHAWK_XGXS_TXFIR_MISC_CTL0r_fields, 10999 #else 11000 0, 11001 #endif 11002 #endif 11003 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11004 PHYMOD_SYMBOL_FLAG_REGISTER, 11005 "TXFIR_MISC_CTL0r", 11006 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11007 "TX_FED_TXFIR_MISC_CONTROL0", 11008 NULL, 11009 #endif 11010 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11011 0x0, /* 0 */ 11012 0, 11013 #endif 11014 }, 11015 { 11016 BCMI_BLACKHAWK_XGXS_TXFIR_MISC_STS0r, 11017 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11018 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11019 BCMI_BLACKHAWK_XGXS_TXFIR_MISC_STS0r_fields, 11020 #else 11021 0, 11022 #endif 11023 #endif 11024 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11025 PHYMOD_SYMBOL_FLAG_REGISTER, 11026 "TXFIR_MISC_STS0r", 11027 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11028 "TX_FED_TXFIR_MISC_STATUS0", 11029 NULL, 11030 #endif 11031 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11032 0x3, /* 3 */ 11033 0, 11034 #endif 11035 }, 11036 { 11037 BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL0r, 11038 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11039 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11040 BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL0r_fields, 11041 #else 11042 0, 11043 #endif 11044 #endif 11045 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11046 PHYMOD_SYMBOL_FLAG_REGISTER, 11047 "TXFIR_TAP_CTL0r", 11048 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11049 "TX_FED_TXFIR_TAP_CONTROL0", 11050 NULL, 11051 #endif 11052 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11053 0x3000, /* 12288 */ 11054 0, 11055 #endif 11056 }, 11057 { 11058 BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL1r, 11059 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11060 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11061 BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL1r_fields, 11062 #else 11063 0, 11064 #endif 11065 #endif 11066 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11067 PHYMOD_SYMBOL_FLAG_REGISTER, 11068 "TXFIR_TAP_CTL1r", 11069 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11070 "TX_FED_TXFIR_TAP_CONTROL1", 11071 NULL, 11072 #endif 11073 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11074 0x0, /* 0 */ 11075 0, 11076 #endif 11077 }, 11078 { 11079 BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL2r, 11080 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11081 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11082 BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL2r_fields, 11083 #else 11084 0, 11085 #endif 11086 #endif 11087 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11088 PHYMOD_SYMBOL_FLAG_REGISTER, 11089 "TXFIR_TAP_CTL2r", 11090 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11091 "TX_FED_TXFIR_TAP_CONTROL2", 11092 NULL, 11093 #endif 11094 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11095 0xa8, /* 168 */ 11096 0, 11097 #endif 11098 }, 11099 { 11100 BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL3r, 11101 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11102 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11103 BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL3r_fields, 11104 #else 11105 0, 11106 #endif 11107 #endif 11108 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11109 PHYMOD_SYMBOL_FLAG_REGISTER, 11110 "TXFIR_TAP_CTL3r", 11111 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11112 "TX_FED_TXFIR_TAP_CONTROL3", 11113 NULL, 11114 #endif 11115 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11116 0x0, /* 0 */ 11117 0, 11118 #endif 11119 }, 11120 { 11121 BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL4r, 11122 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11123 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11124 BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL4r_fields, 11125 #else 11126 0, 11127 #endif 11128 #endif 11129 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11130 PHYMOD_SYMBOL_FLAG_REGISTER, 11131 "TXFIR_TAP_CTL4r", 11132 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11133 "TX_FED_TXFIR_TAP_CONTROL4", 11134 NULL, 11135 #endif 11136 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11137 0x0, /* 0 */ 11138 0, 11139 #endif 11140 }, 11141 { 11142 BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL5r, 11143 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11144 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11145 BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL5r_fields, 11146 #else 11147 0, 11148 #endif 11149 #endif 11150 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11151 PHYMOD_SYMBOL_FLAG_REGISTER, 11152 "TXFIR_TAP_CTL5r", 11153 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11154 "TX_FED_TXFIR_TAP_CONTROL5", 11155 NULL, 11156 #endif 11157 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11158 0x0, /* 0 */ 11159 0, 11160 #endif 11161 }, 11162 { 11163 BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL6r, 11164 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11165 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11166 BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL6r_fields, 11167 #else 11168 0, 11169 #endif 11170 #endif 11171 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11172 PHYMOD_SYMBOL_FLAG_REGISTER, 11173 "TXFIR_TAP_CTL6r", 11174 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11175 "TX_FED_TXFIR_TAP_CONTROL6", 11176 NULL, 11177 #endif 11178 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11179 0x0, /* 0 */ 11180 0, 11181 #endif 11182 }, 11183 { 11184 BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL7r, 11185 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11186 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11187 BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL7r_fields, 11188 #else 11189 0, 11190 #endif 11191 #endif 11192 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11193 PHYMOD_SYMBOL_FLAG_REGISTER, 11194 "TXFIR_TAP_CTL7r", 11195 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11196 "TX_FED_TXFIR_TAP_CONTROL7", 11197 NULL, 11198 #endif 11199 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11200 0x0, /* 0 */ 11201 0, 11202 #endif 11203 }, 11204 { 11205 BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL8r, 11206 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11207 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11208 BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL8r_fields, 11209 #else 11210 0, 11211 #endif 11212 #endif 11213 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11214 PHYMOD_SYMBOL_FLAG_REGISTER, 11215 "TXFIR_TAP_CTL8r", 11216 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11217 "TX_FED_TXFIR_TAP_CONTROL8", 11218 NULL, 11219 #endif 11220 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11221 0x0, /* 0 */ 11222 0, 11223 #endif 11224 }, 11225 { 11226 BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL9r, 11227 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11228 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11229 BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL9r_fields, 11230 #else 11231 0, 11232 #endif 11233 #endif 11234 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11235 PHYMOD_SYMBOL_FLAG_REGISTER, 11236 "TXFIR_TAP_CTL9r", 11237 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11238 "TX_FED_TXFIR_TAP_CONTROL9", 11239 NULL, 11240 #endif 11241 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11242 0x0, /* 0 */ 11243 0, 11244 #endif 11245 }, 11246 { 11247 BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL10r, 11248 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11249 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11250 BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL10r_fields, 11251 #else 11252 0, 11253 #endif 11254 #endif 11255 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11256 PHYMOD_SYMBOL_FLAG_REGISTER, 11257 "TXFIR_TAP_CTL10r", 11258 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11259 "TX_FED_TXFIR_TAP_CONTROL10", 11260 NULL, 11261 #endif 11262 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11263 0x0, /* 0 */ 11264 0, 11265 #endif 11266 }, 11267 { 11268 BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL11r, 11269 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11270 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11271 BCMI_BLACKHAWK_XGXS_TXFIR_TAP_CTL11r_fields, 11272 #else 11273 0, 11274 #endif 11275 #endif 11276 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11277 PHYMOD_SYMBOL_FLAG_REGISTER, 11278 "TXFIR_TAP_CTL11r", 11279 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11280 "TX_FED_TXFIR_TAP_CONTROL11", 11281 NULL, 11282 #endif 11283 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11284 0x0, /* 0 */ 11285 0, 11286 #endif 11287 }, 11288 { 11289 BCMI_BLACKHAWK_XGXS_PLL_CAL_CTL0r, 11290 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11291 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11292 BCMI_BLACKHAWK_XGXS_PLL_CAL_CTL0r_fields, 11293 #else 11294 0, 11295 #endif 11296 #endif 11297 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11298 PHYMOD_SYMBOL_FLAG_REGISTER, 11299 "PLL_CAL_CTL0r", 11300 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11301 "PLL_CAL_COM_CTL_0", 11302 NULL, 11303 #endif 11304 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11305 0xc803, /* 51203 */ 11306 0, 11307 #endif 11308 }, 11309 { 11310 BCMI_BLACKHAWK_XGXS_PLL_CAL_CTL1r, 11311 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11312 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11313 BCMI_BLACKHAWK_XGXS_PLL_CAL_CTL1r_fields, 11314 #else 11315 0, 11316 #endif 11317 #endif 11318 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11319 PHYMOD_SYMBOL_FLAG_REGISTER, 11320 "PLL_CAL_CTL1r", 11321 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11322 "PLL_CAL_COM_CTL_1", 11323 NULL, 11324 #endif 11325 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11326 0xc8ff, /* 51455 */ 11327 0, 11328 #endif 11329 }, 11330 { 11331 BCMI_BLACKHAWK_XGXS_PLL_CAL_CTL2r, 11332 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11333 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11334 BCMI_BLACKHAWK_XGXS_PLL_CAL_CTL2r_fields, 11335 #else 11336 0, 11337 #endif 11338 #endif 11339 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11340 PHYMOD_SYMBOL_FLAG_REGISTER, 11341 "PLL_CAL_CTL2r", 11342 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11343 "PLL_CAL_COM_CTL_2", 11344 NULL, 11345 #endif 11346 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11347 0xff01, /* 65281 */ 11348 0, 11349 #endif 11350 }, 11351 { 11352 BCMI_BLACKHAWK_XGXS_PLL_CAL_CTL3r, 11353 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11354 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11355 BCMI_BLACKHAWK_XGXS_PLL_CAL_CTL3r_fields, 11356 #else 11357 0, 11358 #endif 11359 #endif 11360 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11361 PHYMOD_SYMBOL_FLAG_REGISTER, 11362 "PLL_CAL_CTL3r", 11363 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11364 "PLL_CAL_COM_CTL_3", 11365 NULL, 11366 #endif 11367 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11368 0x0, /* 0 */ 11369 0, 11370 #endif 11371 }, 11372 { 11373 BCMI_BLACKHAWK_XGXS_PLL_CAL_CTL4r, 11374 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11375 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11376 BCMI_BLACKHAWK_XGXS_PLL_CAL_CTL4r_fields, 11377 #else 11378 0, 11379 #endif 11380 #endif 11381 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11382 PHYMOD_SYMBOL_FLAG_REGISTER, 11383 "PLL_CAL_CTL4r", 11384 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11385 "PLL_CAL_COM_CTL_4", 11386 NULL, 11387 #endif 11388 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11389 0xa80d, /* 43021 */ 11390 0, 11391 #endif 11392 }, 11393 { 11394 BCMI_BLACKHAWK_XGXS_PLL_CAL_CTL5r, 11395 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11396 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11397 BCMI_BLACKHAWK_XGXS_PLL_CAL_CTL5r_fields, 11398 #else 11399 0, 11400 #endif 11401 #endif 11402 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11403 PHYMOD_SYMBOL_FLAG_REGISTER, 11404 "PLL_CAL_CTL5r", 11405 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11406 "PLL_CAL_COM_CTL_5", 11407 NULL, 11408 #endif 11409 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11410 0x27, /* 39 */ 11411 0, 11412 #endif 11413 }, 11414 { 11415 BCMI_BLACKHAWK_XGXS_PLL_CAL_CTL6r, 11416 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11417 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11418 BCMI_BLACKHAWK_XGXS_PLL_CAL_CTL6r_fields, 11419 #else 11420 0, 11421 #endif 11422 #endif 11423 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11424 PHYMOD_SYMBOL_FLAG_REGISTER, 11425 "PLL_CAL_CTL6r", 11426 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11427 "PLL_CAL_COM_CTL_6", 11428 NULL, 11429 #endif 11430 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11431 0x7, /* 7 */ 11432 0, 11433 #endif 11434 }, 11435 { 11436 BCMI_BLACKHAWK_XGXS_PLL_CAL_CTL7r, 11437 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11438 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11439 BCMI_BLACKHAWK_XGXS_PLL_CAL_CTL7r_fields, 11440 #else 11441 0, 11442 #endif 11443 #endif 11444 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11445 PHYMOD_SYMBOL_FLAG_REGISTER, 11446 "PLL_CAL_CTL7r", 11447 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11448 "PLL_CAL_COM_CTL_7", 11449 NULL, 11450 #endif 11451 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11452 0x7, /* 7 */ 11453 0, 11454 #endif 11455 }, 11456 { 11457 BCMI_BLACKHAWK_XGXS_PLL_CAL_CTL_STS0r, 11458 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11459 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11460 BCMI_BLACKHAWK_XGXS_PLL_CAL_CTL_STS0r_fields, 11461 #else 11462 0, 11463 #endif 11464 #endif 11465 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11466 PHYMOD_SYMBOL_FLAG_REGISTER, 11467 "PLL_CAL_CTL_STS0r", 11468 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11469 "PLL_CAL_COM_CTL_STATUS_0", 11470 NULL, 11471 #endif 11472 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11473 0x0, /* 0 */ 11474 0, 11475 #endif 11476 }, 11477 { 11478 BCMI_BLACKHAWK_XGXS_PLL_CAL_CTL_STS1r, 11479 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11480 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11481 BCMI_BLACKHAWK_XGXS_PLL_CAL_CTL_STS1r_fields, 11482 #else 11483 0, 11484 #endif 11485 #endif 11486 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11487 PHYMOD_SYMBOL_FLAG_REGISTER, 11488 "PLL_CAL_CTL_STS1r", 11489 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11490 "PLL_CAL_COM_CTL_STATUS_1", 11491 NULL, 11492 #endif 11493 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11494 0x0, /* 0 */ 11495 0, 11496 #endif 11497 }, 11498 { 11499 BCMI_BLACKHAWK_XGXS_PLL_CAL_CTL_STS_DBGr, 11500 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11501 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11502 BCMI_BLACKHAWK_XGXS_PLL_CAL_CTL_STS_DBGr_fields, 11503 #else 11504 0, 11505 #endif 11506 #endif 11507 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11508 PHYMOD_SYMBOL_FLAG_REGISTER, 11509 "PLL_CAL_CTL_STS_DBGr", 11510 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11511 "PLL_CAL_COM_CTL_STATUS_DBG", 11512 NULL, 11513 #endif 11514 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11515 0x1, /* 1 */ 11516 0, 11517 #endif 11518 }, 11519 { 11520 BCMI_BLACKHAWK_XGXS_TXCOM_CTL2r, 11521 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11522 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11523 BCMI_BLACKHAWK_XGXS_TXCOM_CTL2r_fields, 11524 #else 11525 0, 11526 #endif 11527 #endif 11528 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11529 PHYMOD_SYMBOL_FLAG_REGISTER, 11530 "TXCOM_CTL2r", 11531 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11532 "TXCOM_TXCOM_CONTROL2_REGISTER", 11533 NULL, 11534 #endif 11535 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11536 0x1f4, /* 500 */ 11537 0, 11538 #endif 11539 }, 11540 { 11541 BCMI_BLACKHAWK_XGXS_TXCOM_CTL3r, 11542 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11543 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11544 BCMI_BLACKHAWK_XGXS_TXCOM_CTL3r_fields, 11545 #else 11546 0, 11547 #endif 11548 #endif 11549 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11550 PHYMOD_SYMBOL_FLAG_REGISTER, 11551 "TXCOM_CTL3r", 11552 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11553 "TXCOM_TXCOM_CONTROL3_REGISTER", 11554 NULL, 11555 #endif 11556 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11557 0xc8, /* 200 */ 11558 0, 11559 #endif 11560 }, 11561 { 11562 BCMI_BLACKHAWK_XGXS_TXCOM_CTL4r, 11563 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11564 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11565 BCMI_BLACKHAWK_XGXS_TXCOM_CTL4r_fields, 11566 #else 11567 0, 11568 #endif 11569 #endif 11570 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11571 PHYMOD_SYMBOL_FLAG_REGISTER, 11572 "TXCOM_CTL4r", 11573 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11574 "TXCOM_TXCOM_CONTROL4_REGISTER", 11575 NULL, 11576 #endif 11577 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11578 0x5dc, /* 1500 */ 11579 0, 11580 #endif 11581 }, 11582 { 11583 BCMI_BLACKHAWK_XGXS_TXCOM_CTL5r, 11584 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11585 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11586 BCMI_BLACKHAWK_XGXS_TXCOM_CTL5r_fields, 11587 #else 11588 0, 11589 #endif 11590 #endif 11591 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11592 PHYMOD_SYMBOL_FLAG_REGISTER, 11593 "TXCOM_CTL5r", 11594 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11595 "TXCOM_TXCOM_CONTROL5_REGISTER", 11596 NULL, 11597 #endif 11598 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11599 0x1b8, /* 440 */ 11600 0, 11601 #endif 11602 }, 11603 { 11604 BCMI_BLACKHAWK_XGXS_TLB_RX_PRBS_CHK_CNT_CFGr, 11605 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11606 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11607 BCMI_BLACKHAWK_XGXS_TLB_RX_PRBS_CHK_CNT_CFGr_fields, 11608 #else 11609 0, 11610 #endif 11611 #endif 11612 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11613 PHYMOD_SYMBOL_FLAG_REGISTER, 11614 "TLB_RX_PRBS_CHK_CNT_CFGr", 11615 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11616 "TLB_RX_PRBS_CHK_CNT_CONFIG", 11617 NULL, 11618 #endif 11619 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11620 0x8602, /* 34306 */ 11621 0, 11622 #endif 11623 }, 11624 { 11625 BCMI_BLACKHAWK_XGXS_TLB_RX_PRBS_CHK_CFGr, 11626 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11627 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11628 BCMI_BLACKHAWK_XGXS_TLB_RX_PRBS_CHK_CFGr_fields, 11629 #else 11630 0, 11631 #endif 11632 #endif 11633 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11634 PHYMOD_SYMBOL_FLAG_REGISTER, 11635 "TLB_RX_PRBS_CHK_CFGr", 11636 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11637 "TLB_RX_PRBS_CHK_CONFIG", 11638 NULL, 11639 #endif 11640 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11641 0x12a, /* 298 */ 11642 0, 11643 #endif 11644 }, 11645 { 11646 BCMI_BLACKHAWK_XGXS_TLB_RX_DIG_LPBK_CFGr, 11647 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11648 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11649 BCMI_BLACKHAWK_XGXS_TLB_RX_DIG_LPBK_CFGr_fields, 11650 #else 11651 0, 11652 #endif 11653 #endif 11654 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11655 PHYMOD_SYMBOL_FLAG_REGISTER, 11656 "TLB_RX_DIG_LPBK_CFGr", 11657 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11658 "TLB_RX_DIG_LPBK_CONFIG", 11659 NULL, 11660 #endif 11661 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11662 0xe, /* 14 */ 11663 0, 11664 #endif 11665 }, 11666 { 11667 BCMI_BLACKHAWK_XGXS_TLB_RX_TLB_RX_MISC_CFGr, 11668 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11669 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11670 BCMI_BLACKHAWK_XGXS_TLB_RX_TLB_RX_MISC_CFGr_fields, 11671 #else 11672 0, 11673 #endif 11674 #endif 11675 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11676 PHYMOD_SYMBOL_FLAG_REGISTER, 11677 "TLB_RX_TLB_RX_MISC_CFGr", 11678 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11679 "TLB_RX_TLB_RX_MISC_CONFIG", 11680 NULL, 11681 #endif 11682 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11683 0x700, /* 1792 */ 11684 0, 11685 #endif 11686 }, 11687 { 11688 BCMI_BLACKHAWK_XGXS_TLB_RX_PRBS_CHK_EN_TMR_CTLr, 11689 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11690 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11691 BCMI_BLACKHAWK_XGXS_TLB_RX_PRBS_CHK_EN_TMR_CTLr_fields, 11692 #else 11693 0, 11694 #endif 11695 #endif 11696 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11697 PHYMOD_SYMBOL_FLAG_REGISTER, 11698 "TLB_RX_PRBS_CHK_EN_TMR_CTLr", 11699 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11700 "TLB_RX_PRBS_CHK_EN_TIMER_CONTROL", 11701 NULL, 11702 #endif 11703 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11704 0x0, /* 0 */ 11705 0, 11706 #endif 11707 }, 11708 { 11709 BCMI_BLACKHAWK_XGXS_TLB_RX_PRBS_CHK_BURST_ERR_CNT_STSr, 11710 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11711 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11712 BCMI_BLACKHAWK_XGXS_TLB_RX_PRBS_CHK_BURST_ERR_CNT_STSr_fields, 11713 #else 11714 0, 11715 #endif 11716 #endif 11717 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11718 PHYMOD_SYMBOL_FLAG_REGISTER, 11719 "TLB_RX_PRBS_CHK_BURST_ERR_CNT_STSr", 11720 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11721 "TLB_RX_PRBS_CHK_BURST_ERR_CNT_STATUS", 11722 NULL, 11723 #endif 11724 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11725 0x0, /* 0 */ 11726 0, 11727 #endif 11728 }, 11729 { 11730 BCMI_BLACKHAWK_XGXS_TLB_RX_DBG_PMD_RX_LOCK_STSr, 11731 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11732 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11733 BCMI_BLACKHAWK_XGXS_TLB_RX_DBG_PMD_RX_LOCK_STSr_fields, 11734 #else 11735 0, 11736 #endif 11737 #endif 11738 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11739 PHYMOD_SYMBOL_FLAG_REGISTER, 11740 "TLB_RX_DBG_PMD_RX_LOCK_STSr", 11741 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11742 "TLB_RX_DBG_PMD_RX_LOCK_STATUS", 11743 NULL, 11744 #endif 11745 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11746 0x0, /* 0 */ 11747 0, 11748 #endif 11749 }, 11750 { 11751 BCMI_BLACKHAWK_XGXS_TLB_RX_UC_PMD_RX_LOCK_STSr, 11752 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11753 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11754 BCMI_BLACKHAWK_XGXS_TLB_RX_UC_PMD_RX_LOCK_STSr_fields, 11755 #else 11756 0, 11757 #endif 11758 #endif 11759 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11760 PHYMOD_SYMBOL_FLAG_REGISTER, 11761 "TLB_RX_UC_PMD_RX_LOCK_STSr", 11762 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11763 "TLB_RX_UC_PMD_RX_LOCK_STATUS", 11764 NULL, 11765 #endif 11766 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11767 0x0, /* 0 */ 11768 0, 11769 #endif 11770 }, 11771 { 11772 BCMI_BLACKHAWK_XGXS_TLB_RX_DIG_LPBK_PD_STSr, 11773 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11774 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11775 BCMI_BLACKHAWK_XGXS_TLB_RX_DIG_LPBK_PD_STSr_fields, 11776 #else 11777 0, 11778 #endif 11779 #endif 11780 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11781 PHYMOD_SYMBOL_FLAG_REGISTER, 11782 "TLB_RX_DIG_LPBK_PD_STSr", 11783 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11784 "TLB_RX_DIG_LPBK_PD_STATUS", 11785 NULL, 11786 #endif 11787 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11788 0x2, /* 2 */ 11789 0, 11790 #endif 11791 }, 11792 { 11793 BCMI_BLACKHAWK_XGXS_TLB_RX_PRBS_CHK_LOCK_STSr, 11794 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11795 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11796 BCMI_BLACKHAWK_XGXS_TLB_RX_PRBS_CHK_LOCK_STSr_fields, 11797 #else 11798 0, 11799 #endif 11800 #endif 11801 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11802 PHYMOD_SYMBOL_FLAG_REGISTER, 11803 "TLB_RX_PRBS_CHK_LOCK_STSr", 11804 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11805 "TLB_RX_PRBS_CHK_LOCK_STATUS", 11806 NULL, 11807 #endif 11808 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11809 0x0, /* 0 */ 11810 0, 11811 #endif 11812 }, 11813 { 11814 BCMI_BLACKHAWK_XGXS_TLB_RX_PRBS_CHK_ERR_CNT_MSB_STSr, 11815 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11816 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11817 BCMI_BLACKHAWK_XGXS_TLB_RX_PRBS_CHK_ERR_CNT_MSB_STSr_fields, 11818 #else 11819 0, 11820 #endif 11821 #endif 11822 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11823 PHYMOD_SYMBOL_FLAG_REGISTER, 11824 "TLB_RX_PRBS_CHK_ERR_CNT_MSB_STSr", 11825 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11826 "TLB_RX_PRBS_CHK_ERR_CNT_MSB_STATUS", 11827 NULL, 11828 #endif 11829 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11830 0x8000, /* 32768 */ 11831 0, 11832 #endif 11833 }, 11834 { 11835 BCMI_BLACKHAWK_XGXS_TLB_RX_PRBS_CHK_ERR_CNT_LSB_STSr, 11836 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11837 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11838 BCMI_BLACKHAWK_XGXS_TLB_RX_PRBS_CHK_ERR_CNT_LSB_STSr_fields, 11839 #else 11840 0, 11841 #endif 11842 #endif 11843 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11844 PHYMOD_SYMBOL_FLAG_REGISTER, 11845 "TLB_RX_PRBS_CHK_ERR_CNT_LSB_STSr", 11846 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11847 "TLB_RX_PRBS_CHK_ERR_CNT_LSB_STATUS", 11848 NULL, 11849 #endif 11850 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11851 0x0, /* 0 */ 11852 0, 11853 #endif 11854 }, 11855 { 11856 BCMI_BLACKHAWK_XGXS_TLB_RX_PMD_RX_LOCK_STSr, 11857 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11858 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11859 BCMI_BLACKHAWK_XGXS_TLB_RX_PMD_RX_LOCK_STSr_fields, 11860 #else 11861 0, 11862 #endif 11863 #endif 11864 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11865 PHYMOD_SYMBOL_FLAG_REGISTER, 11866 "TLB_RX_PMD_RX_LOCK_STSr", 11867 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11868 "TLB_RX_PMD_RX_LOCK_STATUS", 11869 NULL, 11870 #endif 11871 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11872 0x0, /* 0 */ 11873 0, 11874 #endif 11875 }, 11876 { 11877 BCMI_BLACKHAWK_XGXS_TLB_RX_PRBS_BURST_ERR_LEN_STSr, 11878 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11879 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11880 BCMI_BLACKHAWK_XGXS_TLB_RX_PRBS_BURST_ERR_LEN_STSr_fields, 11881 #else 11882 0, 11883 #endif 11884 #endif 11885 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11886 PHYMOD_SYMBOL_FLAG_REGISTER, 11887 "TLB_RX_PRBS_BURST_ERR_LEN_STSr", 11888 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11889 "TLB_RX_PRBS_BURST_ERR_LENGTH_STATUS", 11890 NULL, 11891 #endif 11892 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11893 0x0, /* 0 */ 11894 0, 11895 #endif 11896 }, 11897 { 11898 BCMI_BLACKHAWK_XGXS_TLB_RX_MAX_PRBS_BURST_ERR_LEN_STSr, 11899 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11900 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11901 BCMI_BLACKHAWK_XGXS_TLB_RX_MAX_PRBS_BURST_ERR_LEN_STSr_fields, 11902 #else 11903 0, 11904 #endif 11905 #endif 11906 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11907 PHYMOD_SYMBOL_FLAG_REGISTER, 11908 "TLB_RX_MAX_PRBS_BURST_ERR_LEN_STSr", 11909 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11910 "TLB_RX_MAX_PRBS_BURST_ERR_LENGTH_STATUS", 11911 NULL, 11912 #endif 11913 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11914 0x0, /* 0 */ 11915 0, 11916 #endif 11917 }, 11918 { 11919 BCMI_BLACKHAWK_XGXS_TLB_TX_PATGEN_CFGr, 11920 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11921 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11922 BCMI_BLACKHAWK_XGXS_TLB_TX_PATGEN_CFGr_fields, 11923 #else 11924 0, 11925 #endif 11926 #endif 11927 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11928 PHYMOD_SYMBOL_FLAG_REGISTER, 11929 "TLB_TX_PATGEN_CFGr", 11930 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11931 "TLB_TX_PATT_GEN_CONFIG", 11932 NULL, 11933 #endif 11934 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11935 0xb000, /* 45056 */ 11936 0, 11937 #endif 11938 }, 11939 { 11940 BCMI_BLACKHAWK_XGXS_TLB_TX_PRBS_GEN_CFGr, 11941 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11942 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11943 BCMI_BLACKHAWK_XGXS_TLB_TX_PRBS_GEN_CFGr_fields, 11944 #else 11945 0, 11946 #endif 11947 #endif 11948 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11949 PHYMOD_SYMBOL_FLAG_REGISTER, 11950 "TLB_TX_PRBS_GEN_CFGr", 11951 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11952 "TLB_TX_PRBS_GEN_CONFIG", 11953 NULL, 11954 #endif 11955 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11956 0xa, /* 10 */ 11957 0, 11958 #endif 11959 }, 11960 { 11961 BCMI_BLACKHAWK_XGXS_TLB_TX_RMT_LPBK_CFGr, 11962 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11963 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11964 BCMI_BLACKHAWK_XGXS_TLB_TX_RMT_LPBK_CFGr_fields, 11965 #else 11966 0, 11967 #endif 11968 #endif 11969 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11970 PHYMOD_SYMBOL_FLAG_REGISTER, 11971 "TLB_TX_RMT_LPBK_CFGr", 11972 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11973 "TLB_TX_RMT_LPBK_CONFIG", 11974 NULL, 11975 #endif 11976 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11977 0x2, /* 2 */ 11978 0, 11979 #endif 11980 }, 11981 { 11982 BCMI_BLACKHAWK_XGXS_TLB_TX_TLB_TX_MISC_CFGr, 11983 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 11984 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 11985 BCMI_BLACKHAWK_XGXS_TLB_TX_TLB_TX_MISC_CFGr_fields, 11986 #else 11987 0, 11988 #endif 11989 #endif 11990 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 11991 PHYMOD_SYMBOL_FLAG_REGISTER, 11992 "TLB_TX_TLB_TX_MISC_CFGr", 11993 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 11994 "TLB_TX_TLB_TX_MISC_CONFIG", 11995 NULL, 11996 #endif 11997 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 11998 0x10, /* 16 */ 11999 0, 12000 #endif 12001 }, 12002 { 12003 BCMI_BLACKHAWK_XGXS_TLB_TX_TLB_TX_PAM4_CFG0r, 12004 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12005 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12006 BCMI_BLACKHAWK_XGXS_TLB_TX_TLB_TX_PAM4_CFG0r_fields, 12007 #else 12008 0, 12009 #endif 12010 #endif 12011 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12012 PHYMOD_SYMBOL_FLAG_REGISTER, 12013 "TLB_TX_TLB_TX_PAM4_CFG0r", 12014 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12015 "TLB_TX_TLB_TX_PAM4_CONFIG_0", 12016 NULL, 12017 #endif 12018 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12019 0x0, /* 0 */ 12020 0, 12021 #endif 12022 }, 12023 { 12024 BCMI_BLACKHAWK_XGXS_TLB_TX_RMT_LPBK_PD_STSr, 12025 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12026 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12027 BCMI_BLACKHAWK_XGXS_TLB_TX_RMT_LPBK_PD_STSr_fields, 12028 #else 12029 0, 12030 #endif 12031 #endif 12032 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12033 PHYMOD_SYMBOL_FLAG_REGISTER, 12034 "TLB_TX_RMT_LPBK_PD_STSr", 12035 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12036 "TLB_TX_RMT_LPBK_PD_STATUS", 12037 NULL, 12038 #endif 12039 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12040 0x2, /* 2 */ 12041 0, 12042 #endif 12043 }, 12044 { 12045 BCMI_BLACKHAWK_XGXS_TLB_TX_TLB_TX_BC_ENC_CFG0r, 12046 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12047 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12048 BCMI_BLACKHAWK_XGXS_TLB_TX_TLB_TX_BC_ENC_CFG0r_fields, 12049 #else 12050 0, 12051 #endif 12052 #endif 12053 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12054 PHYMOD_SYMBOL_FLAG_REGISTER, 12055 "TLB_TX_TLB_TX_BC_ENC_CFG0r", 12056 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12057 "TLB_TX_TLB_TX_BC_ENC_CONFIG_0", 12058 NULL, 12059 #endif 12060 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12061 0x0, /* 0 */ 12062 0, 12063 #endif 12064 }, 12065 { 12066 BCMI_BLACKHAWK_XGXS_TLB_TX_TLB_TX_BC_ENC_CFG1r, 12067 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12068 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12069 BCMI_BLACKHAWK_XGXS_TLB_TX_TLB_TX_BC_ENC_CFG1r_fields, 12070 #else 12071 0, 12072 #endif 12073 #endif 12074 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12075 PHYMOD_SYMBOL_FLAG_REGISTER, 12076 "TLB_TX_TLB_TX_BC_ENC_CFG1r", 12077 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12078 "TLB_TX_TLB_TX_BC_ENC_CONFIG_1", 12079 NULL, 12080 #endif 12081 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12082 0xf628, /* 63016 */ 12083 0, 12084 #endif 12085 }, 12086 { 12087 BCMI_BLACKHAWK_XGXS_TLB_TX_TLB_TX_BC_ENC_CFG2r, 12088 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12089 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12090 BCMI_BLACKHAWK_XGXS_TLB_TX_TLB_TX_BC_ENC_CFG2r_fields, 12091 #else 12092 0, 12093 #endif 12094 #endif 12095 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12096 PHYMOD_SYMBOL_FLAG_REGISTER, 12097 "TLB_TX_TLB_TX_BC_ENC_CFG2r", 12098 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12099 "TLB_TX_TLB_TX_BC_ENC_CONFIG_2", 12100 NULL, 12101 #endif 12102 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12103 0x0, /* 0 */ 12104 0, 12105 #endif 12106 }, 12107 { 12108 BCMI_BLACKHAWK_XGXS_TLB_TX_TLB_TX_BC_ENC_STS0r, 12109 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12110 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12111 BCMI_BLACKHAWK_XGXS_TLB_TX_TLB_TX_BC_ENC_STS0r_fields, 12112 #else 12113 0, 12114 #endif 12115 #endif 12116 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12117 PHYMOD_SYMBOL_FLAG_REGISTER, 12118 "TLB_TX_TLB_TX_BC_ENC_STS0r", 12119 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12120 "TLB_TX_TLB_TX_BC_ENC_STATUS_0", 12121 NULL, 12122 #endif 12123 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12124 0x0, /* 0 */ 12125 0, 12126 #endif 12127 }, 12128 { 12129 BCMI_BLACKHAWK_XGXS_CORE_PLL_PMD_CORE_MODE_STSr, 12130 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12131 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12132 BCMI_BLACKHAWK_XGXS_CORE_PLL_PMD_CORE_MODE_STSr_fields, 12133 #else 12134 0, 12135 #endif 12136 #endif 12137 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12138 PHYMOD_SYMBOL_FLAG_REGISTER, 12139 "CORE_PLL_PMD_CORE_MODE_STSr", 12140 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12141 "CORE_PLL_COM_PMD_CORE_MODE_STATUS", 12142 NULL, 12143 #endif 12144 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12145 0x0, /* 0 */ 12146 0, 12147 #endif 12148 }, 12149 { 12150 BCMI_BLACKHAWK_XGXS_CORE_PLL_RST_CTL_PLL_DPr, 12151 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12152 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12153 BCMI_BLACKHAWK_XGXS_CORE_PLL_RST_CTL_PLL_DPr_fields, 12154 #else 12155 0, 12156 #endif 12157 #endif 12158 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12159 PHYMOD_SYMBOL_FLAG_REGISTER, 12160 "CORE_PLL_RST_CTL_PLL_DPr", 12161 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12162 "CORE_PLL_COM_RESET_CONTROL_PLL_DP", 12163 NULL, 12164 #endif 12165 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12166 0x0, /* 0 */ 12167 0, 12168 #endif 12169 }, 12170 { 12171 BCMI_BLACKHAWK_XGXS_CORE_PLL_TOP_USER_CTLr, 12172 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12173 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12174 BCMI_BLACKHAWK_XGXS_CORE_PLL_TOP_USER_CTLr_fields, 12175 #else 12176 0, 12177 #endif 12178 #endif 12179 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12180 PHYMOD_SYMBOL_FLAG_REGISTER, 12181 "CORE_PLL_TOP_USER_CTLr", 12182 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12183 "CORE_PLL_COM_TOP_USER_CONTROL", 12184 NULL, 12185 #endif 12186 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12187 0x0, /* 0 */ 12188 0, 12189 #endif 12190 }, 12191 { 12192 BCMI_BLACKHAWK_XGXS_CORE_PLL_UC_ACK_CORE_CTLr, 12193 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12194 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12195 BCMI_BLACKHAWK_XGXS_CORE_PLL_UC_ACK_CORE_CTLr_fields, 12196 #else 12197 0, 12198 #endif 12199 #endif 12200 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12201 PHYMOD_SYMBOL_FLAG_REGISTER, 12202 "CORE_PLL_UC_ACK_CORE_CTLr", 12203 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12204 "CORE_PLL_COM_UC_ACK_CORE_CONTROL", 12205 NULL, 12206 #endif 12207 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12208 0x0, /* 0 */ 12209 0, 12210 #endif 12211 }, 12212 { 12213 BCMI_BLACKHAWK_XGXS_CORE_PLL_PLL_DP_RST_ST_STSr, 12214 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12215 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12216 BCMI_BLACKHAWK_XGXS_CORE_PLL_PLL_DP_RST_ST_STSr_fields, 12217 #else 12218 0, 12219 #endif 12220 #endif 12221 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12222 PHYMOD_SYMBOL_FLAG_REGISTER, 12223 "CORE_PLL_PLL_DP_RST_ST_STSr", 12224 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12225 "CORE_PLL_COM_PLL_DP_RESET_STATE_STATUS", 12226 NULL, 12227 #endif 12228 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12229 0x7, /* 7 */ 12230 0, 12231 #endif 12232 }, 12233 { 12234 BCMI_BLACKHAWK_XGXS_CORE_PLL_CORE_PLL_COM_STS2r, 12235 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12236 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12237 BCMI_BLACKHAWK_XGXS_CORE_PLL_CORE_PLL_COM_STS2r_fields, 12238 #else 12239 0, 12240 #endif 12241 #endif 12242 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12243 PHYMOD_SYMBOL_FLAG_REGISTER, 12244 "CORE_PLL_CORE_PLL_COM_STS2r", 12245 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12246 "CORE_PLL_COM_CORE_PLL_COM_STATUS_2", 12247 NULL, 12248 #endif 12249 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12250 0x1, /* 1 */ 12251 0, 12252 #endif 12253 }, 12254 { 12255 BCMI_BLACKHAWK_XGXS_CORE_PLL_PLL_CFG_FWAPI_DATA0r, 12256 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12257 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12258 BCMI_BLACKHAWK_XGXS_CORE_PLL_PLL_CFG_FWAPI_DATA0r_fields, 12259 #else 12260 0, 12261 #endif 12262 #endif 12263 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12264 PHYMOD_SYMBOL_FLAG_REGISTER, 12265 "CORE_PLL_PLL_CFG_FWAPI_DATA0r", 12266 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12267 "CORE_PLL_COM_PLL_CFG_FWAPI_DATA0", 12268 NULL, 12269 #endif 12270 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12271 0x0, /* 0 */ 12272 0, 12273 #endif 12274 }, 12275 { 12276 BCMI_BLACKHAWK_XGXS_CORE_PLL_PLL_CFG_FWAPI_DATA1r, 12277 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12278 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12279 BCMI_BLACKHAWK_XGXS_CORE_PLL_PLL_CFG_FWAPI_DATA1r_fields, 12280 #else 12281 0, 12282 #endif 12283 #endif 12284 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12285 PHYMOD_SYMBOL_FLAG_REGISTER, 12286 "CORE_PLL_PLL_CFG_FWAPI_DATA1r", 12287 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12288 "CORE_PLL_COM_PLL_CFG_FWAPI_DATA1", 12289 NULL, 12290 #endif 12291 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12292 0x0, /* 0 */ 12293 0, 12294 #endif 12295 }, 12296 { 12297 BCMI_BLACKHAWK_XGXS_LN_ADDR0r, 12298 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12299 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12300 BCMI_BLACKHAWK_XGXS_LN_ADDR0r_fields, 12301 #else 12302 0, 12303 #endif 12304 #endif 12305 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12306 PHYMOD_SYMBOL_FLAG_REGISTER, 12307 "LN_ADDR0r", 12308 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12309 "DIG_COM_B_LANE_ADDR_0", 12310 NULL, 12311 #endif 12312 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12313 0x0, /* 0 */ 12314 0, 12315 #endif 12316 }, 12317 { 12318 BCMI_BLACKHAWK_XGXS_LN_ADDR1r, 12319 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12320 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12321 BCMI_BLACKHAWK_XGXS_LN_ADDR1r_fields, 12322 #else 12323 0, 12324 #endif 12325 #endif 12326 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12327 PHYMOD_SYMBOL_FLAG_REGISTER, 12328 "LN_ADDR1r", 12329 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12330 "DIG_COM_B_LANE_ADDR_1", 12331 NULL, 12332 #endif 12333 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12334 0x101, /* 257 */ 12335 0, 12336 #endif 12337 }, 12338 { 12339 BCMI_BLACKHAWK_XGXS_LN_ADDR2r, 12340 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12341 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12342 BCMI_BLACKHAWK_XGXS_LN_ADDR2r_fields, 12343 #else 12344 0, 12345 #endif 12346 #endif 12347 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12348 PHYMOD_SYMBOL_FLAG_REGISTER, 12349 "LN_ADDR2r", 12350 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12351 "DIG_COM_B_LANE_ADDR_2", 12352 NULL, 12353 #endif 12354 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12355 0x202, /* 514 */ 12356 0, 12357 #endif 12358 }, 12359 { 12360 BCMI_BLACKHAWK_XGXS_LN_ADDR3r, 12361 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12362 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12363 BCMI_BLACKHAWK_XGXS_LN_ADDR3r_fields, 12364 #else 12365 0, 12366 #endif 12367 #endif 12368 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12369 PHYMOD_SYMBOL_FLAG_REGISTER, 12370 "LN_ADDR3r", 12371 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12372 "DIG_COM_B_LANE_ADDR_3", 12373 NULL, 12374 #endif 12375 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12376 0x303, /* 771 */ 12377 0, 12378 #endif 12379 }, 12380 { 12381 BCMI_BLACKHAWK_XGXS_LN_ADDR4r, 12382 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12383 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12384 BCMI_BLACKHAWK_XGXS_LN_ADDR4r_fields, 12385 #else 12386 0, 12387 #endif 12388 #endif 12389 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12390 PHYMOD_SYMBOL_FLAG_REGISTER, 12391 "LN_ADDR4r", 12392 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12393 "DIG_COM_B_LANE_ADDR_4", 12394 NULL, 12395 #endif 12396 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12397 0x404, /* 1028 */ 12398 0, 12399 #endif 12400 }, 12401 { 12402 BCMI_BLACKHAWK_XGXS_LN_ADDR5r, 12403 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12404 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12405 BCMI_BLACKHAWK_XGXS_LN_ADDR5r_fields, 12406 #else 12407 0, 12408 #endif 12409 #endif 12410 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12411 PHYMOD_SYMBOL_FLAG_REGISTER, 12412 "LN_ADDR5r", 12413 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12414 "DIG_COM_B_LANE_ADDR_5", 12415 NULL, 12416 #endif 12417 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12418 0x505, /* 1285 */ 12419 0, 12420 #endif 12421 }, 12422 { 12423 BCMI_BLACKHAWK_XGXS_LN_ADDR6r, 12424 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12425 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12426 BCMI_BLACKHAWK_XGXS_LN_ADDR6r_fields, 12427 #else 12428 0, 12429 #endif 12430 #endif 12431 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12432 PHYMOD_SYMBOL_FLAG_REGISTER, 12433 "LN_ADDR6r", 12434 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12435 "DIG_COM_B_LANE_ADDR_6", 12436 NULL, 12437 #endif 12438 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12439 0x606, /* 1542 */ 12440 0, 12441 #endif 12442 }, 12443 { 12444 BCMI_BLACKHAWK_XGXS_LN_ADDR7r, 12445 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12446 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12447 BCMI_BLACKHAWK_XGXS_LN_ADDR7r_fields, 12448 #else 12449 0, 12450 #endif 12451 #endif 12452 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12453 PHYMOD_SYMBOL_FLAG_REGISTER, 12454 "LN_ADDR7r", 12455 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12456 "DIG_COM_B_LANE_ADDR_7", 12457 NULL, 12458 #endif 12459 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12460 0x707, /* 1799 */ 12461 0, 12462 #endif 12463 }, 12464 { 12465 BCMI_BLACKHAWK_XGXS_DIG_COM_B_CTL_CLK4SYNC_DIV2_0r, 12466 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12467 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12468 BCMI_BLACKHAWK_XGXS_DIG_COM_B_CTL_CLK4SYNC_DIV2_0r_fields, 12469 #else 12470 0, 12471 #endif 12472 #endif 12473 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12474 PHYMOD_SYMBOL_FLAG_REGISTER, 12475 "DIG_COM_B_CTL_CLK4SYNC_DIV2_0r", 12476 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12477 "DIG_COM_B_DIG_COM_B_CONTROL_CLK4SYNC_DIV2_0", 12478 NULL, 12479 #endif 12480 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12481 0x40, /* 64 */ 12482 0, 12483 #endif 12484 }, 12485 { 12486 BCMI_BLACKHAWK_XGXS_DIG_COM_B_STS_CLK4SYNC_DIV2_0r, 12487 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12488 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12489 BCMI_BLACKHAWK_XGXS_DIG_COM_B_STS_CLK4SYNC_DIV2_0r_fields, 12490 #else 12491 0, 12492 #endif 12493 #endif 12494 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12495 PHYMOD_SYMBOL_FLAG_REGISTER, 12496 "DIG_COM_B_STS_CLK4SYNC_DIV2_0r", 12497 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12498 "DIG_COM_B_DIG_COM_B_STATUS_CLK4SYNC_DIV2_0", 12499 NULL, 12500 #endif 12501 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12502 0x1, /* 1 */ 12503 0, 12504 #endif 12505 }, 12506 { 12507 BCMI_BLACKHAWK_XGXS_DIG_COM_B_CTL_UC_CLK0r, 12508 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12509 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12510 BCMI_BLACKHAWK_XGXS_DIG_COM_B_CTL_UC_CLK0r_fields, 12511 #else 12512 0, 12513 #endif 12514 #endif 12515 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12516 PHYMOD_SYMBOL_FLAG_REGISTER, 12517 "DIG_COM_B_CTL_UC_CLK0r", 12518 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12519 "DIG_COM_B_DIG_COM_B_CONTROL_MICRO_CLK_0", 12520 NULL, 12521 #endif 12522 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12523 0x47, /* 71 */ 12524 0, 12525 #endif 12526 }, 12527 { 12528 BCMI_BLACKHAWK_XGXS_DIG_COM_B_STS_UC_CLK0r, 12529 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12530 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12531 BCMI_BLACKHAWK_XGXS_DIG_COM_B_STS_UC_CLK0r_fields, 12532 #else 12533 0, 12534 #endif 12535 #endif 12536 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12537 PHYMOD_SYMBOL_FLAG_REGISTER, 12538 "DIG_COM_B_STS_UC_CLK0r", 12539 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12540 "DIG_COM_B_DIG_COM_B_STATUS_MICRO_CLK_0", 12541 NULL, 12542 #endif 12543 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12544 0x1, /* 1 */ 12545 0, 12546 #endif 12547 }, 12548 { 12549 BCMI_BLACKHAWK_XGXS_RX_LN_CLK_RST_N_PWRDWN_CTLr, 12550 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12551 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12552 BCMI_BLACKHAWK_XGXS_RX_LN_CLK_RST_N_PWRDWN_CTLr_fields, 12553 #else 12554 0, 12555 #endif 12556 #endif 12557 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12558 PHYMOD_SYMBOL_FLAG_REGISTER, 12559 "RX_LN_CLK_RST_N_PWRDWN_CTLr", 12560 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12561 "RX_CKRST_CTRL_8X_PLL2X_V1P0_RX_LANE_CLK_RESET_N_POWERDOWN_CONTROL", 12562 NULL, 12563 #endif 12564 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12565 0x0, /* 0 */ 12566 0, 12567 #endif 12568 }, 12569 { 12570 BCMI_BLACKHAWK_XGXS_RX_LN_AFE_RST_PWRDWN_CTL_CTLr, 12571 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12572 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12573 BCMI_BLACKHAWK_XGXS_RX_LN_AFE_RST_PWRDWN_CTL_CTLr_fields, 12574 #else 12575 0, 12576 #endif 12577 #endif 12578 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12579 PHYMOD_SYMBOL_FLAG_REGISTER, 12580 "RX_LN_AFE_RST_PWRDWN_CTL_CTLr", 12581 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12582 "RX_CKRST_CTRL_8X_PLL2X_V1P0_RX_LANE_AFE_RESET_PWRDWN_CONTROL_CONTROL", 12583 NULL, 12584 #endif 12585 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12586 0x0, /* 0 */ 12587 0, 12588 #endif 12589 }, 12590 { 12591 BCMI_BLACKHAWK_XGXS_RX_LN_RST_N_PWRDN_PIN_KILL_CTLr, 12592 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12593 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12594 BCMI_BLACKHAWK_XGXS_RX_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields, 12595 #else 12596 0, 12597 #endif 12598 #endif 12599 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12600 PHYMOD_SYMBOL_FLAG_REGISTER, 12601 "RX_LN_RST_N_PWRDN_PIN_KILL_CTLr", 12602 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12603 "RX_CKRST_CTRL_8X_PLL2X_V1P0_RX_LANE_RESET_N_PWRDN_PIN_KILL_CONTROL", 12604 NULL, 12605 #endif 12606 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12607 0x0, /* 0 */ 12608 0, 12609 #endif 12610 }, 12611 { 12612 BCMI_BLACKHAWK_XGXS_RX_LN_DBG_RST_CTLr, 12613 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12614 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12615 BCMI_BLACKHAWK_XGXS_RX_LN_DBG_RST_CTLr_fields, 12616 #else 12617 0, 12618 #endif 12619 #endif 12620 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12621 PHYMOD_SYMBOL_FLAG_REGISTER, 12622 "RX_LN_DBG_RST_CTLr", 12623 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12624 "RX_CKRST_CTRL_8X_PLL2X_V1P0_RX_LANE_DEBUG_RESET_CONTROL", 12625 NULL, 12626 #endif 12627 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12628 0x3, /* 3 */ 12629 0, 12630 #endif 12631 }, 12632 { 12633 BCMI_BLACKHAWK_XGXS_RX_CLK_N_RST_DBG_CTLr, 12634 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12635 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12636 BCMI_BLACKHAWK_XGXS_RX_CLK_N_RST_DBG_CTLr_fields, 12637 #else 12638 0, 12639 #endif 12640 #endif 12641 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12642 PHYMOD_SYMBOL_FLAG_REGISTER, 12643 "RX_CLK_N_RST_DBG_CTLr", 12644 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12645 "RX_CKRST_CTRL_8X_PLL2X_V1P0_RX_CLOCK_N_RESET_DEBUG_CONTROL", 12646 NULL, 12647 #endif 12648 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12649 0x0, /* 0 */ 12650 0, 12651 #endif 12652 }, 12653 { 12654 BCMI_BLACKHAWK_XGXS_RX_PMD_LN_MODE_STSr, 12655 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12656 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12657 BCMI_BLACKHAWK_XGXS_RX_PMD_LN_MODE_STSr_fields, 12658 #else 12659 0, 12660 #endif 12661 #endif 12662 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12663 PHYMOD_SYMBOL_FLAG_REGISTER, 12664 "RX_PMD_LN_MODE_STSr", 12665 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12666 "RX_CKRST_CTRL_8X_PLL2X_V1P0_RX_PMD_LANE_MODE_STATUS", 12667 NULL, 12668 #endif 12669 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12670 0x0, /* 0 */ 12671 0, 12672 #endif 12673 }, 12674 { 12675 BCMI_BLACKHAWK_XGXS_RX_AFE_RST_PWRDN_OSR_MODE_PIN_STSr, 12676 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12677 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12678 BCMI_BLACKHAWK_XGXS_RX_AFE_RST_PWRDN_OSR_MODE_PIN_STSr_fields, 12679 #else 12680 0, 12681 #endif 12682 #endif 12683 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12684 PHYMOD_SYMBOL_FLAG_REGISTER, 12685 "RX_AFE_RST_PWRDN_OSR_MODE_PIN_STSr", 12686 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12687 "RX_CKRST_CTRL_8X_PLL2X_V1P0_RX_AFE_RESET_PWRDN_OSR_MODE_PIN_STATUS", 12688 NULL, 12689 #endif 12690 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12691 0x7, /* 7 */ 12692 0, 12693 #endif 12694 }, 12695 { 12696 BCMI_BLACKHAWK_XGXS_LN_CFG_FWAPI_DATA0r, 12697 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12698 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12699 BCMI_BLACKHAWK_XGXS_LN_CFG_FWAPI_DATA0r_fields, 12700 #else 12701 0, 12702 #endif 12703 #endif 12704 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12705 PHYMOD_SYMBOL_FLAG_REGISTER, 12706 "LN_CFG_FWAPI_DATA0r", 12707 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12708 "RX_CKRST_CTRL_8X_PLL2X_V1P0_LANE_CFG_FWAPI_DATA0", 12709 NULL, 12710 #endif 12711 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12712 0x0, /* 0 */ 12713 0, 12714 #endif 12715 }, 12716 { 12717 BCMI_BLACKHAWK_XGXS_LN_CFG_FWAPI_DATA1r, 12718 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12719 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12720 BCMI_BLACKHAWK_XGXS_LN_CFG_FWAPI_DATA1r_fields, 12721 #else 12722 0, 12723 #endif 12724 #endif 12725 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12726 PHYMOD_SYMBOL_FLAG_REGISTER, 12727 "LN_CFG_FWAPI_DATA1r", 12728 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12729 "RX_CKRST_CTRL_8X_PLL2X_V1P0_LANE_CFG_FWAPI_DATA1", 12730 NULL, 12731 #endif 12732 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12733 0x0, /* 0 */ 12734 0, 12735 #endif 12736 }, 12737 { 12738 BCMI_BLACKHAWK_XGXS_TX_LN_CLK_RST_N_PWRDWN_CTLr, 12739 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12740 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12741 BCMI_BLACKHAWK_XGXS_TX_LN_CLK_RST_N_PWRDWN_CTLr_fields, 12742 #else 12743 0, 12744 #endif 12745 #endif 12746 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12747 PHYMOD_SYMBOL_FLAG_REGISTER, 12748 "TX_LN_CLK_RST_N_PWRDWN_CTLr", 12749 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12750 "TX_CKRST_CTRL_8X_PLL2X_V1P0_TX_LANE_CLK_RESET_N_POWERDOWN_CONTROL", 12751 NULL, 12752 #endif 12753 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12754 0x0, /* 0 */ 12755 0, 12756 #endif 12757 }, 12758 { 12759 BCMI_BLACKHAWK_XGXS_TX_LN_AFE_RST_PWRDWN_CTL_CTLr, 12760 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12761 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12762 BCMI_BLACKHAWK_XGXS_TX_LN_AFE_RST_PWRDWN_CTL_CTLr_fields, 12763 #else 12764 0, 12765 #endif 12766 #endif 12767 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12768 PHYMOD_SYMBOL_FLAG_REGISTER, 12769 "TX_LN_AFE_RST_PWRDWN_CTL_CTLr", 12770 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12771 "TX_CKRST_CTRL_8X_PLL2X_V1P0_TX_LANE_AFE_RESET_PWRDWN_CONTROL_CONTROL", 12772 NULL, 12773 #endif 12774 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12775 0x0, /* 0 */ 12776 0, 12777 #endif 12778 }, 12779 { 12780 BCMI_BLACKHAWK_XGXS_TX_LN_RST_N_PWRDN_PIN_KILL_CTLr, 12781 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12782 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12783 BCMI_BLACKHAWK_XGXS_TX_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields, 12784 #else 12785 0, 12786 #endif 12787 #endif 12788 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12789 PHYMOD_SYMBOL_FLAG_REGISTER, 12790 "TX_LN_RST_N_PWRDN_PIN_KILL_CTLr", 12791 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12792 "TX_CKRST_CTRL_8X_PLL2X_V1P0_TX_LANE_RESET_N_PWRDN_PIN_KILL_CONTROL", 12793 NULL, 12794 #endif 12795 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12796 0x0, /* 0 */ 12797 0, 12798 #endif 12799 }, 12800 { 12801 BCMI_BLACKHAWK_XGXS_TX_LN_DBG_RST_CTLr, 12802 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12803 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12804 BCMI_BLACKHAWK_XGXS_TX_LN_DBG_RST_CTLr_fields, 12805 #else 12806 0, 12807 #endif 12808 #endif 12809 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12810 PHYMOD_SYMBOL_FLAG_REGISTER, 12811 "TX_LN_DBG_RST_CTLr", 12812 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12813 "TX_CKRST_CTRL_8X_PLL2X_V1P0_TX_LANE_DEBUG_RESET_CONTROL", 12814 NULL, 12815 #endif 12816 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12817 0x3, /* 3 */ 12818 0, 12819 #endif 12820 }, 12821 { 12822 BCMI_BLACKHAWK_XGXS_TX_CLK_N_RST_DBG_CTLr, 12823 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12824 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12825 BCMI_BLACKHAWK_XGXS_TX_CLK_N_RST_DBG_CTLr_fields, 12826 #else 12827 0, 12828 #endif 12829 #endif 12830 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12831 PHYMOD_SYMBOL_FLAG_REGISTER, 12832 "TX_CLK_N_RST_DBG_CTLr", 12833 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12834 "TX_CKRST_CTRL_8X_PLL2X_V1P0_TX_CLOCK_N_RESET_DEBUG_CONTROL", 12835 NULL, 12836 #endif 12837 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12838 0x0, /* 0 */ 12839 0, 12840 #endif 12841 }, 12842 { 12843 BCMI_BLACKHAWK_XGXS_TX_PMD_LN_MODE_STSr, 12844 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12845 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12846 BCMI_BLACKHAWK_XGXS_TX_PMD_LN_MODE_STSr_fields, 12847 #else 12848 0, 12849 #endif 12850 #endif 12851 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12852 PHYMOD_SYMBOL_FLAG_REGISTER, 12853 "TX_PMD_LN_MODE_STSr", 12854 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12855 "TX_CKRST_CTRL_8X_PLL2X_V1P0_TX_PMD_LANE_MODE_STATUS", 12856 NULL, 12857 #endif 12858 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12859 0x0, /* 0 */ 12860 0, 12861 #endif 12862 }, 12863 { 12864 BCMI_BLACKHAWK_XGXS_TX_AFE_RST_PWRDN_OSR_MODE_PIN_STSr, 12865 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12866 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12867 BCMI_BLACKHAWK_XGXS_TX_AFE_RST_PWRDN_OSR_MODE_PIN_STSr_fields, 12868 #else 12869 0, 12870 #endif 12871 #endif 12872 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12873 PHYMOD_SYMBOL_FLAG_REGISTER, 12874 "TX_AFE_RST_PWRDN_OSR_MODE_PIN_STSr", 12875 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12876 "TX_CKRST_CTRL_8X_PLL2X_V1P0_TX_AFE_RESET_PWRDN_OSR_MODE_PIN_STATUS", 12877 NULL, 12878 #endif 12879 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12880 0x3, /* 3 */ 12881 0, 12882 #endif 12883 }, 12884 { 12885 BCMI_BLACKHAWK_XGXS_TX_CLK_N_RST_MISC_CTLr, 12886 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12887 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12888 BCMI_BLACKHAWK_XGXS_TX_CLK_N_RST_MISC_CTLr_fields, 12889 #else 12890 0, 12891 #endif 12892 #endif 12893 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12894 PHYMOD_SYMBOL_FLAG_REGISTER, 12895 "TX_CLK_N_RST_MISC_CTLr", 12896 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12897 "TX_CKRST_CTRL_8X_PLL2X_V1P0_TX_CLOCK_N_RESET_MISC_CONTROL", 12898 NULL, 12899 #endif 12900 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12901 0x1, /* 1 */ 12902 0, 12903 #endif 12904 }, 12905 { 12906 BCMI_BLACKHAWK_XGXS_RXCOM_OSR_MODE_CTLr, 12907 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12908 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12909 BCMI_BLACKHAWK_XGXS_RXCOM_OSR_MODE_CTLr_fields, 12910 #else 12911 0, 12912 #endif 12913 #endif 12914 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12915 PHYMOD_SYMBOL_FLAG_REGISTER, 12916 "RXCOM_OSR_MODE_CTLr", 12917 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12918 "RXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXCOM_OSR_MODE_CONTROL", 12919 NULL, 12920 #endif 12921 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12922 0x0, /* 0 */ 12923 0, 12924 #endif 12925 }, 12926 { 12927 BCMI_BLACKHAWK_XGXS_RXCOM_LN_CLK_RST_N_PWRDWN_CTLr, 12928 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12929 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12930 BCMI_BLACKHAWK_XGXS_RXCOM_LN_CLK_RST_N_PWRDWN_CTLr_fields, 12931 #else 12932 0, 12933 #endif 12934 #endif 12935 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12936 PHYMOD_SYMBOL_FLAG_REGISTER, 12937 "RXCOM_LN_CLK_RST_N_PWRDWN_CTLr", 12938 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12939 "RXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXCOM_LANE_CLK_RESET_N_POWERDOWN_CONTROL", 12940 NULL, 12941 #endif 12942 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12943 0x0, /* 0 */ 12944 0, 12945 #endif 12946 }, 12947 { 12948 BCMI_BLACKHAWK_XGXS_RXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr, 12949 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12950 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12951 BCMI_BLACKHAWK_XGXS_RXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields, 12952 #else 12953 0, 12954 #endif 12955 #endif 12956 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12957 PHYMOD_SYMBOL_FLAG_REGISTER, 12958 "RXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr", 12959 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12960 "RXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXCOM_LANE_RESET_N_PWRDN_PIN_KILL_CONTROL", 12961 NULL, 12962 #endif 12963 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12964 0x0, /* 0 */ 12965 0, 12966 #endif 12967 }, 12968 { 12969 BCMI_BLACKHAWK_XGXS_RXCOM_UC_ACK_LN_CTLr, 12970 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12971 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12972 BCMI_BLACKHAWK_XGXS_RXCOM_UC_ACK_LN_CTLr_fields, 12973 #else 12974 0, 12975 #endif 12976 #endif 12977 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12978 PHYMOD_SYMBOL_FLAG_REGISTER, 12979 "RXCOM_UC_ACK_LN_CTLr", 12980 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 12981 "RXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXCOM_UC_ACK_LANE_CONTROL", 12982 NULL, 12983 #endif 12984 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 12985 0x0, /* 0 */ 12986 0, 12987 #endif 12988 }, 12989 { 12990 BCMI_BLACKHAWK_XGXS_RXCOM_LN_RST_OCC_CTLr, 12991 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 12992 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 12993 BCMI_BLACKHAWK_XGXS_RXCOM_LN_RST_OCC_CTLr_fields, 12994 #else 12995 0, 12996 #endif 12997 #endif 12998 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 12999 PHYMOD_SYMBOL_FLAG_REGISTER, 13000 "RXCOM_LN_RST_OCC_CTLr", 13001 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13002 "RXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXCOM_LANE_REG_RESET_OCCURRED_CONTROL", 13003 NULL, 13004 #endif 13005 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13006 0x1, /* 1 */ 13007 0, 13008 #endif 13009 }, 13010 { 13011 BCMI_BLACKHAWK_XGXS_RXCOM_PLL_SEL_CTLr, 13012 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13013 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13014 BCMI_BLACKHAWK_XGXS_RXCOM_PLL_SEL_CTLr_fields, 13015 #else 13016 0, 13017 #endif 13018 #endif 13019 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13020 PHYMOD_SYMBOL_FLAG_REGISTER, 13021 "RXCOM_PLL_SEL_CTLr", 13022 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13023 "RXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXCOM_PLL_SELECT_CONTROL", 13024 NULL, 13025 #endif 13026 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13027 0x0, /* 0 */ 13028 0, 13029 #endif 13030 }, 13031 { 13032 BCMI_BLACKHAWK_XGXS_RXCOM_LN_DP_RST_ST_STSr, 13033 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13034 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13035 BCMI_BLACKHAWK_XGXS_RXCOM_LN_DP_RST_ST_STSr_fields, 13036 #else 13037 0, 13038 #endif 13039 #endif 13040 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13041 PHYMOD_SYMBOL_FLAG_REGISTER, 13042 "RXCOM_LN_DP_RST_ST_STSr", 13043 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13044 "RXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXCOM_LANE_DP_RESET_STATE_STATUS", 13045 NULL, 13046 #endif 13047 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13048 0x7, /* 7 */ 13049 0, 13050 #endif 13051 }, 13052 { 13053 BCMI_BLACKHAWK_XGXS_RXCOM_MCST_MASK_CTLr, 13054 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13055 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13056 BCMI_BLACKHAWK_XGXS_RXCOM_MCST_MASK_CTLr_fields, 13057 #else 13058 0, 13059 #endif 13060 #endif 13061 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13062 PHYMOD_SYMBOL_FLAG_REGISTER, 13063 "RXCOM_MCST_MASK_CTLr", 13064 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13065 "RXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXCOM_MULTICAST_MASK_CONTROL", 13066 NULL, 13067 #endif 13068 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13069 0x0, /* 0 */ 13070 0, 13071 #endif 13072 }, 13073 { 13074 BCMI_BLACKHAWK_XGXS_RXCOM_OSR_MODE_STS_MC_MASKr, 13075 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13076 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13077 BCMI_BLACKHAWK_XGXS_RXCOM_OSR_MODE_STS_MC_MASKr_fields, 13078 #else 13079 0, 13080 #endif 13081 #endif 13082 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13083 PHYMOD_SYMBOL_FLAG_REGISTER, 13084 "RXCOM_OSR_MODE_STS_MC_MASKr", 13085 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13086 "RXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXCOM_OSR_MODE_STATUS_MC_MASK", 13087 NULL, 13088 #endif 13089 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13090 0x0, /* 0 */ 13091 0, 13092 #endif 13093 }, 13094 { 13095 BCMI_BLACKHAWK_XGXS_RXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr, 13096 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13097 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13098 BCMI_BLACKHAWK_XGXS_RXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr_fields, 13099 #else 13100 0, 13101 #endif 13102 #endif 13103 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13104 PHYMOD_SYMBOL_FLAG_REGISTER, 13105 "RXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr", 13106 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13107 "RXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXCOM_AFE_RESET_PWRDN_OSR_MODE_PIN_STATUS", 13108 NULL, 13109 #endif 13110 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13111 0x0, /* 0 */ 13112 0, 13113 #endif 13114 }, 13115 { 13116 BCMI_BLACKHAWK_XGXS_RXCOM_LN_S_RSTB_CTLr, 13117 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13118 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13119 BCMI_BLACKHAWK_XGXS_RXCOM_LN_S_RSTB_CTLr_fields, 13120 #else 13121 0, 13122 #endif 13123 #endif 13124 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13125 PHYMOD_SYMBOL_FLAG_REGISTER, 13126 "RXCOM_LN_S_RSTB_CTLr", 13127 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13128 "RXCOM_CKRST_CTRL_8X_PLL2X_V1P0_RXCOM_LN_S_RSTB_CONTROL", 13129 NULL, 13130 #endif 13131 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13132 0x1, /* 1 */ 13133 0, 13134 #endif 13135 }, 13136 { 13137 BCMI_BLACKHAWK_XGXS_TXCOM_OSR_MODE_CTLr, 13138 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13139 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13140 BCMI_BLACKHAWK_XGXS_TXCOM_OSR_MODE_CTLr_fields, 13141 #else 13142 0, 13143 #endif 13144 #endif 13145 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13146 PHYMOD_SYMBOL_FLAG_REGISTER, 13147 "TXCOM_OSR_MODE_CTLr", 13148 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13149 "TXCOM_CKRST_CTRL_8X_PLL2X_V1P0_TXCOM_OSR_MODE_CONTROL", 13150 NULL, 13151 #endif 13152 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13153 0x0, /* 0 */ 13154 0, 13155 #endif 13156 }, 13157 { 13158 BCMI_BLACKHAWK_XGXS_TXCOM_LN_CLK_RST_N_PWRDWN_CTLr, 13159 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13160 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13161 BCMI_BLACKHAWK_XGXS_TXCOM_LN_CLK_RST_N_PWRDWN_CTLr_fields, 13162 #else 13163 0, 13164 #endif 13165 #endif 13166 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13167 PHYMOD_SYMBOL_FLAG_REGISTER, 13168 "TXCOM_LN_CLK_RST_N_PWRDWN_CTLr", 13169 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13170 "TXCOM_CKRST_CTRL_8X_PLL2X_V1P0_TXCOM_LANE_CLK_RESET_N_POWERDOWN_CONTROL", 13171 NULL, 13172 #endif 13173 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13174 0x0, /* 0 */ 13175 0, 13176 #endif 13177 }, 13178 { 13179 BCMI_BLACKHAWK_XGXS_TXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr, 13180 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13181 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13182 BCMI_BLACKHAWK_XGXS_TXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr_fields, 13183 #else 13184 0, 13185 #endif 13186 #endif 13187 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13188 PHYMOD_SYMBOL_FLAG_REGISTER, 13189 "TXCOM_LN_RST_N_PWRDN_PIN_KILL_CTLr", 13190 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13191 "TXCOM_CKRST_CTRL_8X_PLL2X_V1P0_TXCOM_LANE_RESET_N_PWRDN_PIN_KILL_CONTROL", 13192 NULL, 13193 #endif 13194 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13195 0x0, /* 0 */ 13196 0, 13197 #endif 13198 }, 13199 { 13200 BCMI_BLACKHAWK_XGXS_TXCOM_UC_ACK_LN_CTLr, 13201 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13202 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13203 BCMI_BLACKHAWK_XGXS_TXCOM_UC_ACK_LN_CTLr_fields, 13204 #else 13205 0, 13206 #endif 13207 #endif 13208 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13209 PHYMOD_SYMBOL_FLAG_REGISTER, 13210 "TXCOM_UC_ACK_LN_CTLr", 13211 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13212 "TXCOM_CKRST_CTRL_8X_PLL2X_V1P0_TXCOM_UC_ACK_LANE_CONTROL", 13213 NULL, 13214 #endif 13215 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13216 0x0, /* 0 */ 13217 0, 13218 #endif 13219 }, 13220 { 13221 BCMI_BLACKHAWK_XGXS_TXCOM_LN_RST_OCC_CTLr, 13222 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13223 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13224 BCMI_BLACKHAWK_XGXS_TXCOM_LN_RST_OCC_CTLr_fields, 13225 #else 13226 0, 13227 #endif 13228 #endif 13229 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13230 PHYMOD_SYMBOL_FLAG_REGISTER, 13231 "TXCOM_LN_RST_OCC_CTLr", 13232 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13233 "TXCOM_CKRST_CTRL_8X_PLL2X_V1P0_TXCOM_LANE_REG_RESET_OCCURRED_CONTROL", 13234 NULL, 13235 #endif 13236 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13237 0x1, /* 1 */ 13238 0, 13239 #endif 13240 }, 13241 { 13242 BCMI_BLACKHAWK_XGXS_TXCOM_PLL_SEL_CTLr, 13243 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13244 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13245 BCMI_BLACKHAWK_XGXS_TXCOM_PLL_SEL_CTLr_fields, 13246 #else 13247 0, 13248 #endif 13249 #endif 13250 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13251 PHYMOD_SYMBOL_FLAG_REGISTER, 13252 "TXCOM_PLL_SEL_CTLr", 13253 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13254 "TXCOM_CKRST_CTRL_8X_PLL2X_V1P0_TXCOM_PLL_SELECT_CONTROL", 13255 NULL, 13256 #endif 13257 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13258 0x0, /* 0 */ 13259 0, 13260 #endif 13261 }, 13262 { 13263 BCMI_BLACKHAWK_XGXS_TXCOM_LN_DP_RST_ST_STSr, 13264 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13265 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13266 BCMI_BLACKHAWK_XGXS_TXCOM_LN_DP_RST_ST_STSr_fields, 13267 #else 13268 0, 13269 #endif 13270 #endif 13271 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13272 PHYMOD_SYMBOL_FLAG_REGISTER, 13273 "TXCOM_LN_DP_RST_ST_STSr", 13274 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13275 "TXCOM_CKRST_CTRL_8X_PLL2X_V1P0_TXCOM_LANE_DP_RESET_STATE_STATUS", 13276 NULL, 13277 #endif 13278 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13279 0x7, /* 7 */ 13280 0, 13281 #endif 13282 }, 13283 { 13284 BCMI_BLACKHAWK_XGXS_TXCOM_MCST_MASK_CTLr, 13285 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13286 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13287 BCMI_BLACKHAWK_XGXS_TXCOM_MCST_MASK_CTLr_fields, 13288 #else 13289 0, 13290 #endif 13291 #endif 13292 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13293 PHYMOD_SYMBOL_FLAG_REGISTER, 13294 "TXCOM_MCST_MASK_CTLr", 13295 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13296 "TXCOM_CKRST_CTRL_8X_PLL2X_V1P0_TXCOM_MULTICAST_MASK_CONTROL", 13297 NULL, 13298 #endif 13299 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13300 0x0, /* 0 */ 13301 0, 13302 #endif 13303 }, 13304 { 13305 BCMI_BLACKHAWK_XGXS_TXCOM_OSR_MODE_STS_MC_MASKr, 13306 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13307 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13308 BCMI_BLACKHAWK_XGXS_TXCOM_OSR_MODE_STS_MC_MASKr_fields, 13309 #else 13310 0, 13311 #endif 13312 #endif 13313 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13314 PHYMOD_SYMBOL_FLAG_REGISTER, 13315 "TXCOM_OSR_MODE_STS_MC_MASKr", 13316 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13317 "TXCOM_CKRST_CTRL_8X_PLL2X_V1P0_TXCOM_OSR_MODE_STATUS_MC_MASK", 13318 NULL, 13319 #endif 13320 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13321 0x0, /* 0 */ 13322 0, 13323 #endif 13324 }, 13325 { 13326 BCMI_BLACKHAWK_XGXS_TXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr, 13327 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13328 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13329 BCMI_BLACKHAWK_XGXS_TXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr_fields, 13330 #else 13331 0, 13332 #endif 13333 #endif 13334 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13335 PHYMOD_SYMBOL_FLAG_REGISTER, 13336 "TXCOM_AFE_RST_PWRDN_OSR_MODE_PIN_STSr", 13337 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13338 "TXCOM_CKRST_CTRL_8X_PLL2X_V1P0_TXCOM_AFE_RESET_PWRDN_OSR_MODE_PIN_STATUS", 13339 NULL, 13340 #endif 13341 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13342 0x0, /* 0 */ 13343 0, 13344 #endif 13345 }, 13346 { 13347 BCMI_BLACKHAWK_XGXS_TXCOM_LN_S_RSTB_CTLr, 13348 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13349 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13350 BCMI_BLACKHAWK_XGXS_TXCOM_LN_S_RSTB_CTLr_fields, 13351 #else 13352 0, 13353 #endif 13354 #endif 13355 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13356 PHYMOD_SYMBOL_FLAG_REGISTER, 13357 "TXCOM_LN_S_RSTB_CTLr", 13358 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13359 "TXCOM_CKRST_CTRL_8X_PLL2X_V1P0_TXCOM_LN_S_RSTB_CONTROL", 13360 NULL, 13361 #endif 13362 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13363 0x1, /* 1 */ 13364 0, 13365 #endif 13366 }, 13367 { 13368 BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_CFG0r, 13369 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13370 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13371 BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_CFG0r_fields, 13372 #else 13373 0, 13374 #endif 13375 #endif 13376 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13377 PHYMOD_SYMBOL_FLAG_REGISTER, 13378 "TLB_RX_B_TLB_RX_B_CFG0r", 13379 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13380 "TLB_RX_B_TLB_RX_B_CONFIG_0", 13381 NULL, 13382 #endif 13383 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13384 0x2110, /* 8464 */ 13385 0, 13386 #endif 13387 }, 13388 { 13389 BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_CFG1r, 13390 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13391 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13392 BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_CFG1r_fields, 13393 #else 13394 0, 13395 #endif 13396 #endif 13397 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13398 PHYMOD_SYMBOL_FLAG_REGISTER, 13399 "TLB_RX_B_TLB_RX_B_CFG1r", 13400 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13401 "TLB_RX_B_TLB_RX_B_CONFIG_1", 13402 NULL, 13403 #endif 13404 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13405 0xf628, /* 63016 */ 13406 0, 13407 #endif 13408 }, 13409 { 13410 BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_CFG2r, 13411 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13412 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13413 BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_CFG2r_fields, 13414 #else 13415 0, 13416 #endif 13417 #endif 13418 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13419 PHYMOD_SYMBOL_FLAG_REGISTER, 13420 "TLB_RX_B_TLB_RX_B_CFG2r", 13421 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13422 "TLB_RX_B_TLB_RX_B_CONFIG_2", 13423 NULL, 13424 #endif 13425 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13426 0x3a0, /* 928 */ 13427 0, 13428 #endif 13429 }, 13430 { 13431 BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_CFG3r, 13432 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13433 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13434 BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_CFG3r_fields, 13435 #else 13436 0, 13437 #endif 13438 #endif 13439 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13440 PHYMOD_SYMBOL_FLAG_REGISTER, 13441 "TLB_RX_B_TLB_RX_B_CFG3r", 13442 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13443 "TLB_RX_B_TLB_RX_B_CONFIG_3", 13444 NULL, 13445 #endif 13446 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13447 0x80, /* 128 */ 13448 0, 13449 #endif 13450 }, 13451 { 13452 BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_CFG4r, 13453 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13454 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13455 BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_CFG4r_fields, 13456 #else 13457 0, 13458 #endif 13459 #endif 13460 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13461 PHYMOD_SYMBOL_FLAG_REGISTER, 13462 "TLB_RX_B_TLB_RX_B_CFG4r", 13463 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13464 "TLB_RX_B_TLB_RX_B_CONFIG_4", 13465 NULL, 13466 #endif 13467 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13468 0xf, /* 15 */ 13469 0, 13470 #endif 13471 }, 13472 { 13473 BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_STS7r, 13474 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13475 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13476 BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_STS7r_fields, 13477 #else 13478 0, 13479 #endif 13480 #endif 13481 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13482 PHYMOD_SYMBOL_FLAG_REGISTER, 13483 "TLB_RX_B_TLB_RX_B_STS7r", 13484 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13485 "TLB_RX_B_TLB_RX_B_STATUS_7", 13486 NULL, 13487 #endif 13488 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13489 0x0, /* 0 */ 13490 0, 13491 #endif 13492 }, 13493 { 13494 BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_STS6r, 13495 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13496 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13497 BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_STS6r_fields, 13498 #else 13499 0, 13500 #endif 13501 #endif 13502 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13503 PHYMOD_SYMBOL_FLAG_REGISTER, 13504 "TLB_RX_B_TLB_RX_B_STS6r", 13505 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13506 "TLB_RX_B_TLB_RX_B_STATUS_6", 13507 NULL, 13508 #endif 13509 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13510 0x0, /* 0 */ 13511 0, 13512 #endif 13513 }, 13514 { 13515 BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_STS5r, 13516 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13517 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13518 BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_STS5r_fields, 13519 #else 13520 0, 13521 #endif 13522 #endif 13523 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13524 PHYMOD_SYMBOL_FLAG_REGISTER, 13525 "TLB_RX_B_TLB_RX_B_STS5r", 13526 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13527 "TLB_RX_B_TLB_RX_B_STATUS_5", 13528 NULL, 13529 #endif 13530 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13531 0x0, /* 0 */ 13532 0, 13533 #endif 13534 }, 13535 { 13536 BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_STS4r, 13537 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13538 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13539 BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_STS4r_fields, 13540 #else 13541 0, 13542 #endif 13543 #endif 13544 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13545 PHYMOD_SYMBOL_FLAG_REGISTER, 13546 "TLB_RX_B_TLB_RX_B_STS4r", 13547 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13548 "TLB_RX_B_TLB_RX_B_STATUS_4", 13549 NULL, 13550 #endif 13551 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13552 0x0, /* 0 */ 13553 0, 13554 #endif 13555 }, 13556 { 13557 BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_STS3r, 13558 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13559 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13560 BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_STS3r_fields, 13561 #else 13562 0, 13563 #endif 13564 #endif 13565 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13566 PHYMOD_SYMBOL_FLAG_REGISTER, 13567 "TLB_RX_B_TLB_RX_B_STS3r", 13568 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13569 "TLB_RX_B_TLB_RX_B_STATUS_3", 13570 NULL, 13571 #endif 13572 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13573 0x0, /* 0 */ 13574 0, 13575 #endif 13576 }, 13577 { 13578 BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_STS2r, 13579 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13580 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13581 BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_STS2r_fields, 13582 #else 13583 0, 13584 #endif 13585 #endif 13586 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13587 PHYMOD_SYMBOL_FLAG_REGISTER, 13588 "TLB_RX_B_TLB_RX_B_STS2r", 13589 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13590 "TLB_RX_B_TLB_RX_B_STATUS_2", 13591 NULL, 13592 #endif 13593 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13594 0x0, /* 0 */ 13595 0, 13596 #endif 13597 }, 13598 { 13599 BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_STS1r, 13600 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13601 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13602 BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_STS1r_fields, 13603 #else 13604 0, 13605 #endif 13606 #endif 13607 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13608 PHYMOD_SYMBOL_FLAG_REGISTER, 13609 "TLB_RX_B_TLB_RX_B_STS1r", 13610 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13611 "TLB_RX_B_TLB_RX_B_STATUS_1", 13612 NULL, 13613 #endif 13614 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13615 0x0, /* 0 */ 13616 0, 13617 #endif 13618 }, 13619 { 13620 BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_STS0r, 13621 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13622 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13623 BCMI_BLACKHAWK_XGXS_TLB_RX_B_TLB_RX_B_STS0r_fields, 13624 #else 13625 0, 13626 #endif 13627 #endif 13628 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13629 PHYMOD_SYMBOL_FLAG_REGISTER, 13630 "TLB_RX_B_TLB_RX_B_STS0r", 13631 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13632 "TLB_RX_B_TLB_RX_B_STATUS_0", 13633 NULL, 13634 #endif 13635 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13636 0x0, /* 0 */ 13637 0, 13638 #endif 13639 }, 13640 { 13641 BCMI_BLACKHAWK_XGXS_TLB_RX_C_TLB_RX_C_CFG0r, 13642 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13643 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13644 BCMI_BLACKHAWK_XGXS_TLB_RX_C_TLB_RX_C_CFG0r_fields, 13645 #else 13646 0, 13647 #endif 13648 #endif 13649 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13650 PHYMOD_SYMBOL_FLAG_REGISTER, 13651 "TLB_RX_C_TLB_RX_C_CFG0r", 13652 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13653 "TLB_RX_C_TLB_RX_C_CONFIG_0", 13654 NULL, 13655 #endif 13656 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13657 0x440c, /* 17420 */ 13658 0, 13659 #endif 13660 }, 13661 { 13662 BCMI_BLACKHAWK_XGXS_TLB_RX_C_TLB_RX_C_CFG1r, 13663 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13664 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13665 BCMI_BLACKHAWK_XGXS_TLB_RX_C_TLB_RX_C_CFG1r_fields, 13666 #else 13667 0, 13668 #endif 13669 #endif 13670 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13671 PHYMOD_SYMBOL_FLAG_REGISTER, 13672 "TLB_RX_C_TLB_RX_C_CFG1r", 13673 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13674 "TLB_RX_C_TLB_RX_C_CONFIG_1", 13675 NULL, 13676 #endif 13677 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13678 0x3, /* 3 */ 13679 0, 13680 #endif 13681 }, 13682 { 13683 BCMI_BLACKHAWK_XGXS_TLB_RX_C_NUM_ERRS_IN_FEC_FRAMES_STS_HIr, 13684 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13685 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13686 BCMI_BLACKHAWK_XGXS_TLB_RX_C_NUM_ERRS_IN_FEC_FRAMES_STS_HIr_fields, 13687 #else 13688 0, 13689 #endif 13690 #endif 13691 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13692 PHYMOD_SYMBOL_FLAG_REGISTER, 13693 "TLB_RX_C_NUM_ERRS_IN_FEC_FRAMES_STS_HIr", 13694 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13695 "TLB_RX_C_NUM_ERRORS_IN_FEC_FRAMES_STATUS_HI", 13696 NULL, 13697 #endif 13698 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13699 0x0, /* 0 */ 13700 0, 13701 #endif 13702 }, 13703 { 13704 BCMI_BLACKHAWK_XGXS_TLB_RX_C_NUM_ERRS_IN_FEC_FRAMES_STS_LOr, 13705 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13706 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13707 BCMI_BLACKHAWK_XGXS_TLB_RX_C_NUM_ERRS_IN_FEC_FRAMES_STS_LOr_fields, 13708 #else 13709 0, 13710 #endif 13711 #endif 13712 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13713 PHYMOD_SYMBOL_FLAG_REGISTER, 13714 "TLB_RX_C_NUM_ERRS_IN_FEC_FRAMES_STS_LOr", 13715 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13716 "TLB_RX_C_NUM_ERRORS_IN_FEC_FRAMES_STATUS_LO", 13717 NULL, 13718 #endif 13719 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13720 0x0, /* 0 */ 13721 0, 13722 #endif 13723 }, 13724 { 13725 BCMI_BLACKHAWK_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS7r, 13726 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13727 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13728 BCMI_BLACKHAWK_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS7r_fields, 13729 #else 13730 0, 13731 #endif 13732 #endif 13733 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13734 PHYMOD_SYMBOL_FLAG_REGISTER, 13735 "TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS7r", 13736 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13737 "TLB_RX_C_COUNT_HISTOGRAM_ERROR_OFFSET_7", 13738 NULL, 13739 #endif 13740 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13741 0x0, /* 0 */ 13742 0, 13743 #endif 13744 }, 13745 { 13746 BCMI_BLACKHAWK_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS6r, 13747 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13748 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13749 BCMI_BLACKHAWK_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS6r_fields, 13750 #else 13751 0, 13752 #endif 13753 #endif 13754 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13755 PHYMOD_SYMBOL_FLAG_REGISTER, 13756 "TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS6r", 13757 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13758 "TLB_RX_C_COUNT_HISTOGRAM_ERROR_OFFSET_6", 13759 NULL, 13760 #endif 13761 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13762 0x0, /* 0 */ 13763 0, 13764 #endif 13765 }, 13766 { 13767 BCMI_BLACKHAWK_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS5r, 13768 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13769 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13770 BCMI_BLACKHAWK_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS5r_fields, 13771 #else 13772 0, 13773 #endif 13774 #endif 13775 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13776 PHYMOD_SYMBOL_FLAG_REGISTER, 13777 "TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS5r", 13778 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13779 "TLB_RX_C_COUNT_HISTOGRAM_ERROR_OFFSET_5", 13780 NULL, 13781 #endif 13782 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13783 0x0, /* 0 */ 13784 0, 13785 #endif 13786 }, 13787 { 13788 BCMI_BLACKHAWK_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS4r, 13789 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13790 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13791 BCMI_BLACKHAWK_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS4r_fields, 13792 #else 13793 0, 13794 #endif 13795 #endif 13796 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13797 PHYMOD_SYMBOL_FLAG_REGISTER, 13798 "TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS4r", 13799 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13800 "TLB_RX_C_COUNT_HISTOGRAM_ERROR_OFFSET_4", 13801 NULL, 13802 #endif 13803 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13804 0x0, /* 0 */ 13805 0, 13806 #endif 13807 }, 13808 { 13809 BCMI_BLACKHAWK_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS3r, 13810 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13811 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13812 BCMI_BLACKHAWK_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS3r_fields, 13813 #else 13814 0, 13815 #endif 13816 #endif 13817 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13818 PHYMOD_SYMBOL_FLAG_REGISTER, 13819 "TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS3r", 13820 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13821 "TLB_RX_C_COUNT_HISTOGRAM_ERROR_OFFSET_3", 13822 NULL, 13823 #endif 13824 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13825 0x0, /* 0 */ 13826 0, 13827 #endif 13828 }, 13829 { 13830 BCMI_BLACKHAWK_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS2r, 13831 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13832 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13833 BCMI_BLACKHAWK_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS2r_fields, 13834 #else 13835 0, 13836 #endif 13837 #endif 13838 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13839 PHYMOD_SYMBOL_FLAG_REGISTER, 13840 "TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS2r", 13841 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13842 "TLB_RX_C_COUNT_HISTOGRAM_ERROR_OFFSET_2", 13843 NULL, 13844 #endif 13845 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13846 0x0, /* 0 */ 13847 0, 13848 #endif 13849 }, 13850 { 13851 BCMI_BLACKHAWK_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS1r, 13852 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13853 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13854 BCMI_BLACKHAWK_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS1r_fields, 13855 #else 13856 0, 13857 #endif 13858 #endif 13859 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13860 PHYMOD_SYMBOL_FLAG_REGISTER, 13861 "TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS1r", 13862 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13863 "TLB_RX_C_COUNT_HISTOGRAM_ERROR_OFFSET_1", 13864 NULL, 13865 #endif 13866 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13867 0x0, /* 0 */ 13868 0, 13869 #endif 13870 }, 13871 { 13872 BCMI_BLACKHAWK_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS0r, 13873 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13874 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13875 BCMI_BLACKHAWK_XGXS_TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS0r_fields, 13876 #else 13877 0, 13878 #endif 13879 #endif 13880 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13881 PHYMOD_SYMBOL_FLAG_REGISTER, 13882 "TLB_RX_C_CNT_HISTOGRAM_ERR_OFFS0r", 13883 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13884 "TLB_RX_C_COUNT_HISTOGRAM_ERROR_OFFSET_0", 13885 NULL, 13886 #endif 13887 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13888 0x0, /* 0 */ 13889 0, 13890 #endif 13891 }, 13892 { 13893 BCMI_BLACKHAWK_XGXS_UC_CLK_CTL0r, 13894 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13895 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13896 BCMI_BLACKHAWK_XGXS_UC_CLK_CTL0r_fields, 13897 #else 13898 0, 13899 #endif 13900 #endif 13901 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13902 PHYMOD_SYMBOL_FLAG_REGISTER, 13903 "UC_CLK_CTL0r", 13904 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13905 "MICRO_A_CLOCK_CONTROL0", 13906 NULL, 13907 #endif 13908 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13909 0x0, /* 0 */ 13910 0, 13911 #endif 13912 }, 13913 { 13914 BCMI_BLACKHAWK_XGXS_UC_RST_CTL0r, 13915 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13916 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13917 BCMI_BLACKHAWK_XGXS_UC_RST_CTL0r_fields, 13918 #else 13919 0, 13920 #endif 13921 #endif 13922 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13923 PHYMOD_SYMBOL_FLAG_REGISTER, 13924 "UC_RST_CTL0r", 13925 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13926 "MICRO_A_RESET_CONTROL0", 13927 NULL, 13928 #endif 13929 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13930 0x4000, /* 16384 */ 13931 0, 13932 #endif 13933 }, 13934 { 13935 BCMI_BLACKHAWK_XGXS_UC_AHB_CTL0r, 13936 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13937 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13938 BCMI_BLACKHAWK_XGXS_UC_AHB_CTL0r_fields, 13939 #else 13940 0, 13941 #endif 13942 #endif 13943 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13944 PHYMOD_SYMBOL_FLAG_REGISTER, 13945 "UC_AHB_CTL0r", 13946 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13947 "MICRO_A_AHB_CONTROL0", 13948 NULL, 13949 #endif 13950 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13951 0x0, /* 0 */ 13952 0, 13953 #endif 13954 }, 13955 { 13956 BCMI_BLACKHAWK_XGXS_UC_AHB_STS0r, 13957 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13958 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13959 BCMI_BLACKHAWK_XGXS_UC_AHB_STS0r_fields, 13960 #else 13961 0, 13962 #endif 13963 #endif 13964 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13965 PHYMOD_SYMBOL_FLAG_REGISTER, 13966 "UC_AHB_STS0r", 13967 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13968 "MICRO_A_AHB_STATUS0", 13969 NULL, 13970 #endif 13971 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13972 0x0, /* 0 */ 13973 0, 13974 #endif 13975 }, 13976 { 13977 BCMI_BLACKHAWK_XGXS_UC_AHB_WRADDR_LSWr, 13978 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 13979 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 13980 BCMI_BLACKHAWK_XGXS_UC_AHB_WRADDR_LSWr_fields, 13981 #else 13982 0, 13983 #endif 13984 #endif 13985 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 13986 PHYMOD_SYMBOL_FLAG_REGISTER, 13987 "UC_AHB_WRADDR_LSWr", 13988 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 13989 "MICRO_A_AHB_WRADDR_LSW", 13990 NULL, 13991 #endif 13992 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 13993 0x0, /* 0 */ 13994 0, 13995 #endif 13996 }, 13997 { 13998 BCMI_BLACKHAWK_XGXS_UC_AHB_WRADDR_MSWr, 13999 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14000 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14001 BCMI_BLACKHAWK_XGXS_UC_AHB_WRADDR_MSWr_fields, 14002 #else 14003 0, 14004 #endif 14005 #endif 14006 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14007 PHYMOD_SYMBOL_FLAG_REGISTER, 14008 "UC_AHB_WRADDR_MSWr", 14009 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14010 "MICRO_A_AHB_WRADDR_MSW", 14011 NULL, 14012 #endif 14013 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14014 0x0, /* 0 */ 14015 0, 14016 #endif 14017 }, 14018 { 14019 BCMI_BLACKHAWK_XGXS_UC_AHB_WRDATA_LSWr, 14020 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14021 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14022 BCMI_BLACKHAWK_XGXS_UC_AHB_WRDATA_LSWr_fields, 14023 #else 14024 0, 14025 #endif 14026 #endif 14027 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14028 PHYMOD_SYMBOL_FLAG_REGISTER, 14029 "UC_AHB_WRDATA_LSWr", 14030 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14031 "MICRO_A_AHB_WRDATA_LSW", 14032 NULL, 14033 #endif 14034 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14035 0x0, /* 0 */ 14036 0, 14037 #endif 14038 }, 14039 { 14040 BCMI_BLACKHAWK_XGXS_UC_AHB_WRDATA_MSWr, 14041 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14042 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14043 BCMI_BLACKHAWK_XGXS_UC_AHB_WRDATA_MSWr_fields, 14044 #else 14045 0, 14046 #endif 14047 #endif 14048 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14049 PHYMOD_SYMBOL_FLAG_REGISTER, 14050 "UC_AHB_WRDATA_MSWr", 14051 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14052 "MICRO_A_AHB_WRDATA_MSW", 14053 NULL, 14054 #endif 14055 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14056 0x0, /* 0 */ 14057 0, 14058 #endif 14059 }, 14060 { 14061 BCMI_BLACKHAWK_XGXS_UC_AHB_RDADDR_LSWr, 14062 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14063 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14064 BCMI_BLACKHAWK_XGXS_UC_AHB_RDADDR_LSWr_fields, 14065 #else 14066 0, 14067 #endif 14068 #endif 14069 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14070 PHYMOD_SYMBOL_FLAG_REGISTER, 14071 "UC_AHB_RDADDR_LSWr", 14072 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14073 "MICRO_A_AHB_RDADDR_LSW", 14074 NULL, 14075 #endif 14076 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14077 0x0, /* 0 */ 14078 0, 14079 #endif 14080 }, 14081 { 14082 BCMI_BLACKHAWK_XGXS_UC_AHB_RDADDR_MSWr, 14083 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14084 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14085 BCMI_BLACKHAWK_XGXS_UC_AHB_RDADDR_MSWr_fields, 14086 #else 14087 0, 14088 #endif 14089 #endif 14090 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14091 PHYMOD_SYMBOL_FLAG_REGISTER, 14092 "UC_AHB_RDADDR_MSWr", 14093 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14094 "MICRO_A_AHB_RDADDR_MSW", 14095 NULL, 14096 #endif 14097 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14098 0x0, /* 0 */ 14099 0, 14100 #endif 14101 }, 14102 { 14103 BCMI_BLACKHAWK_XGXS_UC_AHB_RDDATA_LSWr, 14104 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14105 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14106 BCMI_BLACKHAWK_XGXS_UC_AHB_RDDATA_LSWr_fields, 14107 #else 14108 0, 14109 #endif 14110 #endif 14111 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14112 PHYMOD_SYMBOL_FLAG_REGISTER, 14113 "UC_AHB_RDDATA_LSWr", 14114 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14115 "MICRO_A_AHB_RDDATA_LSW", 14116 NULL, 14117 #endif 14118 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14119 0x0, /* 0 */ 14120 0, 14121 #endif 14122 }, 14123 { 14124 BCMI_BLACKHAWK_XGXS_UC_AHB_RDDATA_MSWr, 14125 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14126 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14127 BCMI_BLACKHAWK_XGXS_UC_AHB_RDDATA_MSWr_fields, 14128 #else 14129 0, 14130 #endif 14131 #endif 14132 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14133 PHYMOD_SYMBOL_FLAG_REGISTER, 14134 "UC_AHB_RDDATA_MSWr", 14135 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14136 "MICRO_A_AHB_RDDATA_MSW", 14137 NULL, 14138 #endif 14139 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14140 0x0, /* 0 */ 14141 0, 14142 #endif 14143 }, 14144 { 14145 BCMI_BLACKHAWK_XGXS_UC_PRAMIF_CTL0r, 14146 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14147 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14148 BCMI_BLACKHAWK_XGXS_UC_PRAMIF_CTL0r_fields, 14149 #else 14150 0, 14151 #endif 14152 #endif 14153 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14154 PHYMOD_SYMBOL_FLAG_REGISTER, 14155 "UC_PRAMIF_CTL0r", 14156 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14157 "MICRO_A_PRAMIF_CONTROL0", 14158 NULL, 14159 #endif 14160 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14161 0x0, /* 0 */ 14162 0, 14163 #endif 14164 }, 14165 { 14166 BCMI_BLACKHAWK_XGXS_UC_PRAMIF_AHB_WRADDR_LSWr, 14167 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14168 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14169 BCMI_BLACKHAWK_XGXS_UC_PRAMIF_AHB_WRADDR_LSWr_fields, 14170 #else 14171 0, 14172 #endif 14173 #endif 14174 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14175 PHYMOD_SYMBOL_FLAG_REGISTER, 14176 "UC_PRAMIF_AHB_WRADDR_LSWr", 14177 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14178 "MICRO_A_PRAMIF_AHB_WRADDR_LSW", 14179 NULL, 14180 #endif 14181 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14182 0x0, /* 0 */ 14183 0, 14184 #endif 14185 }, 14186 { 14187 BCMI_BLACKHAWK_XGXS_UC_PRAMIF_AHB_WRADDR_MSWr, 14188 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14189 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14190 BCMI_BLACKHAWK_XGXS_UC_PRAMIF_AHB_WRADDR_MSWr_fields, 14191 #else 14192 0, 14193 #endif 14194 #endif 14195 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14196 PHYMOD_SYMBOL_FLAG_REGISTER, 14197 "UC_PRAMIF_AHB_WRADDR_MSWr", 14198 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14199 "MICRO_A_PRAMIF_AHB_WRADDR_MSW", 14200 NULL, 14201 #endif 14202 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14203 0x0, /* 0 */ 14204 0, 14205 #endif 14206 }, 14207 { 14208 BCMI_BLACKHAWK_XGXS_UC_PVT_STS0r, 14209 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14210 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14211 BCMI_BLACKHAWK_XGXS_UC_PVT_STS0r_fields, 14212 #else 14213 0, 14214 #endif 14215 #endif 14216 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14217 PHYMOD_SYMBOL_FLAG_REGISTER, 14218 "UC_PVT_STS0r", 14219 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14220 "MICRO_B_PVT_STATUS0", 14221 NULL, 14222 #endif 14223 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14224 0x0, /* 0 */ 14225 0, 14226 #endif 14227 }, 14228 { 14229 BCMI_BLACKHAWK_XGXS_UC_RMI_AHB_CTL1r, 14230 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14231 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14232 BCMI_BLACKHAWK_XGXS_UC_RMI_AHB_CTL1r_fields, 14233 #else 14234 0, 14235 #endif 14236 #endif 14237 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14238 PHYMOD_SYMBOL_FLAG_REGISTER, 14239 "UC_RMI_AHB_CTL1r", 14240 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14241 "MICRO_B_RMI_AHB_CONTROL1", 14242 NULL, 14243 #endif 14244 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14245 0x0, /* 0 */ 14246 0, 14247 #endif 14248 }, 14249 { 14250 BCMI_BLACKHAWK_XGXS_UC_RMI_AHB_STS1r, 14251 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14252 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14253 BCMI_BLACKHAWK_XGXS_UC_RMI_AHB_STS1r_fields, 14254 #else 14255 0, 14256 #endif 14257 #endif 14258 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14259 PHYMOD_SYMBOL_FLAG_REGISTER, 14260 "UC_RMI_AHB_STS1r", 14261 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14262 "MICRO_B_RMI_AHB_STATUS1", 14263 NULL, 14264 #endif 14265 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14266 0x0, /* 0 */ 14267 0, 14268 #endif 14269 }, 14270 { 14271 BCMI_BLACKHAWK_XGXS_UC_RMI_RA_AINC_NXT_WRADDR_LSWr, 14272 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14273 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14274 BCMI_BLACKHAWK_XGXS_UC_RMI_RA_AINC_NXT_WRADDR_LSWr_fields, 14275 #else 14276 0, 14277 #endif 14278 #endif 14279 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14280 PHYMOD_SYMBOL_FLAG_REGISTER, 14281 "UC_RMI_RA_AINC_NXT_WRADDR_LSWr", 14282 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14283 "MICRO_B_RMI_RA_AUTOINC_NXT_WRADDR_LSW", 14284 NULL, 14285 #endif 14286 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14287 0x0, /* 0 */ 14288 0, 14289 #endif 14290 }, 14291 { 14292 BCMI_BLACKHAWK_XGXS_UC_RMI_RA_AINC_NXT_RDADDR_LSWr, 14293 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14294 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14295 BCMI_BLACKHAWK_XGXS_UC_RMI_RA_AINC_NXT_RDADDR_LSWr_fields, 14296 #else 14297 0, 14298 #endif 14299 #endif 14300 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14301 PHYMOD_SYMBOL_FLAG_REGISTER, 14302 "UC_RMI_RA_AINC_NXT_RDADDR_LSWr", 14303 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14304 "MICRO_B_RMI_RA_AUTOINC_NXT_RDADDR_LSW", 14305 NULL, 14306 #endif 14307 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14308 0x0, /* 0 */ 14309 0, 14310 #endif 14311 }, 14312 { 14313 BCMI_BLACKHAWK_XGXS_UC_RMI_PR_AINC_NXT_WRADDR_LSWr, 14314 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14315 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14316 BCMI_BLACKHAWK_XGXS_UC_RMI_PR_AINC_NXT_WRADDR_LSWr_fields, 14317 #else 14318 0, 14319 #endif 14320 #endif 14321 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14322 PHYMOD_SYMBOL_FLAG_REGISTER, 14323 "UC_RMI_PR_AINC_NXT_WRADDR_LSWr", 14324 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14325 "MICRO_B_RMI_PR_AUTOINC_NXT_WRADDR_LSW", 14326 NULL, 14327 #endif 14328 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14329 0x0, /* 0 */ 14330 0, 14331 #endif 14332 }, 14333 { 14334 BCMI_BLACKHAWK_XGXS_UC_RMI_PVT_CTL0r, 14335 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14336 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14337 BCMI_BLACKHAWK_XGXS_UC_RMI_PVT_CTL0r_fields, 14338 #else 14339 0, 14340 #endif 14341 #endif 14342 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14343 PHYMOD_SYMBOL_FLAG_REGISTER, 14344 "UC_RMI_PVT_CTL0r", 14345 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14346 "MICRO_B_RMI_PVT_CONTROL0", 14347 NULL, 14348 #endif 14349 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14350 0x0, /* 0 */ 14351 0, 14352 #endif 14353 }, 14354 { 14355 BCMI_BLACKHAWK_XGXS_UC_RMI_RAM_CR_CRCCTL0r, 14356 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14357 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14358 BCMI_BLACKHAWK_XGXS_UC_RMI_RAM_CR_CRCCTL0r_fields, 14359 #else 14360 0, 14361 #endif 14362 #endif 14363 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14364 PHYMOD_SYMBOL_FLAG_REGISTER, 14365 "UC_RMI_RAM_CR_CRCCTL0r", 14366 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14367 "MICRO_B_RMI_RAM_CR_CRCCONTROL0", 14368 NULL, 14369 #endif 14370 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14371 0x3, /* 3 */ 14372 0, 14373 #endif 14374 }, 14375 { 14376 BCMI_BLACKHAWK_XGXS_UC_RMI_RAM_CR_CRCSTS0r, 14377 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14378 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14379 BCMI_BLACKHAWK_XGXS_UC_RMI_RAM_CR_CRCSTS0r_fields, 14380 #else 14381 0, 14382 #endif 14383 #endif 14384 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14385 PHYMOD_SYMBOL_FLAG_REGISTER, 14386 "UC_RMI_RAM_CR_CRCSTS0r", 14387 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14388 "MICRO_B_RMI_RAM_CR_CRCSTATUS0", 14389 NULL, 14390 #endif 14391 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14392 0xffff, /* 65535 */ 14393 0, 14394 #endif 14395 }, 14396 { 14397 BCMI_BLACKHAWK_XGXS_UC_RMI_UC_HARDFAULT_CTL0r, 14398 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14399 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14400 BCMI_BLACKHAWK_XGXS_UC_RMI_UC_HARDFAULT_CTL0r_fields, 14401 #else 14402 0, 14403 #endif 14404 #endif 14405 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14406 PHYMOD_SYMBOL_FLAG_REGISTER, 14407 "UC_RMI_UC_HARDFAULT_CTL0r", 14408 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14409 "MICRO_B_RMI_MICRO_HARDFAULT_CONTROL0", 14410 NULL, 14411 #endif 14412 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14413 0xe01, /* 3585 */ 14414 0, 14415 #endif 14416 }, 14417 { 14418 BCMI_BLACKHAWK_XGXS_UC_RMI_UC_SDK_STS0r, 14419 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14420 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14421 BCMI_BLACKHAWK_XGXS_UC_RMI_UC_SDK_STS0r_fields, 14422 #else 14423 0, 14424 #endif 14425 #endif 14426 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14427 PHYMOD_SYMBOL_FLAG_REGISTER, 14428 "UC_RMI_UC_SDK_STS0r", 14429 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14430 "MICRO_B_RMI_MICRO_SDK_STATUS0", 14431 NULL, 14432 #endif 14433 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14434 0x4000, /* 16384 */ 14435 0, 14436 #endif 14437 }, 14438 { 14439 BCMI_BLACKHAWK_XGXS_UC_RMI_UC_DBGGER_ID_LSWr, 14440 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14441 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14442 BCMI_BLACKHAWK_XGXS_UC_RMI_UC_DBGGER_ID_LSWr_fields, 14443 #else 14444 0, 14445 #endif 14446 #endif 14447 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14448 PHYMOD_SYMBOL_FLAG_REGISTER, 14449 "UC_RMI_UC_DBGGER_ID_LSWr", 14450 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14451 "MICRO_B_RMI_MICRO_DEBUGGER_ID_LSW", 14452 NULL, 14453 #endif 14454 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14455 0x617f, /* 24959 */ 14456 0, 14457 #endif 14458 }, 14459 { 14460 BCMI_BLACKHAWK_XGXS_UC_RMI_UC_DBGGER_ID_MSWr, 14461 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14462 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14463 BCMI_BLACKHAWK_XGXS_UC_RMI_UC_DBGGER_ID_MSWr_fields, 14464 #else 14465 0, 14466 #endif 14467 #endif 14468 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14469 PHYMOD_SYMBOL_FLAG_REGISTER, 14470 "UC_RMI_UC_DBGGER_ID_MSWr", 14471 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14472 "MICRO_B_RMI_MICRO_DEBUGGER_ID_MSW", 14473 NULL, 14474 #endif 14475 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14476 0x36, /* 54 */ 14477 0, 14478 #endif 14479 }, 14480 { 14481 BCMI_BLACKHAWK_XGXS_UC_RMI_UC_MISC_STS0r, 14482 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14483 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14484 BCMI_BLACKHAWK_XGXS_UC_RMI_UC_MISC_STS0r_fields, 14485 #else 14486 0, 14487 #endif 14488 #endif 14489 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14490 PHYMOD_SYMBOL_FLAG_REGISTER, 14491 "UC_RMI_UC_MISC_STS0r", 14492 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14493 "MICRO_B_RMI_MICRO_MISC_STATUS0", 14494 NULL, 14495 #endif 14496 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14497 0x0, /* 0 */ 14498 0, 14499 #endif 14500 }, 14501 { 14502 BCMI_BLACKHAWK_XGXS_UC_RMI_UC_DBGGER_CTL0r, 14503 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14504 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14505 BCMI_BLACKHAWK_XGXS_UC_RMI_UC_DBGGER_CTL0r_fields, 14506 #else 14507 0, 14508 #endif 14509 #endif 14510 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14511 PHYMOD_SYMBOL_FLAG_REGISTER, 14512 "UC_RMI_UC_DBGGER_CTL0r", 14513 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14514 "MICRO_B_RMI_MICRO_DEBUGGER_CONTROL0", 14515 NULL, 14516 #endif 14517 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14518 0x0, /* 0 */ 14519 0, 14520 #endif 14521 }, 14522 { 14523 BCMI_BLACKHAWK_XGXS_UC_RAM_ECCCTL0r, 14524 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14525 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14526 BCMI_BLACKHAWK_XGXS_UC_RAM_ECCCTL0r_fields, 14527 #else 14528 0, 14529 #endif 14530 #endif 14531 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14532 PHYMOD_SYMBOL_FLAG_REGISTER, 14533 "UC_RAM_ECCCTL0r", 14534 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14535 "MICRO_C_RAM_ECCCONTROL0", 14536 NULL, 14537 #endif 14538 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14539 0x0, /* 0 */ 14540 0, 14541 #endif 14542 }, 14543 { 14544 BCMI_BLACKHAWK_XGXS_UC_RAM_ECCCTL1r, 14545 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14546 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14547 BCMI_BLACKHAWK_XGXS_UC_RAM_ECCCTL1r_fields, 14548 #else 14549 0, 14550 #endif 14551 #endif 14552 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14553 PHYMOD_SYMBOL_FLAG_REGISTER, 14554 "UC_RAM_ECCCTL1r", 14555 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14556 "MICRO_C_RAM_ECCCONTROL1", 14557 NULL, 14558 #endif 14559 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14560 0x0, /* 0 */ 14561 0, 14562 #endif 14563 }, 14564 { 14565 BCMI_BLACKHAWK_XGXS_UC_RAM_ECCSTS0r, 14566 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14567 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14568 BCMI_BLACKHAWK_XGXS_UC_RAM_ECCSTS0r_fields, 14569 #else 14570 0, 14571 #endif 14572 #endif 14573 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14574 PHYMOD_SYMBOL_FLAG_REGISTER, 14575 "UC_RAM_ECCSTS0r", 14576 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14577 "MICRO_C_RAM_ECCSTATUS0", 14578 NULL, 14579 #endif 14580 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14581 0x0, /* 0 */ 14582 0, 14583 #endif 14584 }, 14585 { 14586 BCMI_BLACKHAWK_XGXS_UC_RAM_ECCSTS1r, 14587 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14588 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14589 BCMI_BLACKHAWK_XGXS_UC_RAM_ECCSTS1r_fields, 14590 #else 14591 0, 14592 #endif 14593 #endif 14594 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14595 PHYMOD_SYMBOL_FLAG_REGISTER, 14596 "UC_RAM_ECCSTS1r", 14597 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14598 "MICRO_C_RAM_ECCSTATUS1", 14599 NULL, 14600 #endif 14601 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14602 0x0, /* 0 */ 14603 0, 14604 #endif 14605 }, 14606 { 14607 BCMI_BLACKHAWK_XGXS_UC_RAM_ECCSTS2r, 14608 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14609 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14610 BCMI_BLACKHAWK_XGXS_UC_RAM_ECCSTS2r_fields, 14611 #else 14612 0, 14613 #endif 14614 #endif 14615 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14616 PHYMOD_SYMBOL_FLAG_REGISTER, 14617 "UC_RAM_ECCSTS2r", 14618 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14619 "MICRO_C_RAM_ECCSTATUS2", 14620 NULL, 14621 #endif 14622 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14623 0x0, /* 0 */ 14624 0, 14625 #endif 14626 }, 14627 { 14628 BCMI_BLACKHAWK_XGXS_UC_RAM_TESTIFCTL0r, 14629 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14630 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14631 BCMI_BLACKHAWK_XGXS_UC_RAM_TESTIFCTL0r_fields, 14632 #else 14633 0, 14634 #endif 14635 #endif 14636 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14637 PHYMOD_SYMBOL_FLAG_REGISTER, 14638 "UC_RAM_TESTIFCTL0r", 14639 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14640 "MICRO_C_RAM_TESTIFCONTROL0", 14641 NULL, 14642 #endif 14643 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14644 0x0, /* 0 */ 14645 0, 14646 #endif 14647 }, 14648 { 14649 BCMI_BLACKHAWK_XGXS_UC_RAM_TESTIFCTL1r, 14650 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14651 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14652 BCMI_BLACKHAWK_XGXS_UC_RAM_TESTIFCTL1r_fields, 14653 #else 14654 0, 14655 #endif 14656 #endif 14657 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14658 PHYMOD_SYMBOL_FLAG_REGISTER, 14659 "UC_RAM_TESTIFCTL1r", 14660 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14661 "MICRO_C_RAM_TESTIFCONTROL1", 14662 NULL, 14663 #endif 14664 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14665 0x0, /* 0 */ 14666 0, 14667 #endif 14668 }, 14669 { 14670 BCMI_BLACKHAWK_XGXS_UC_RAM_CTL0r, 14671 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14672 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14673 BCMI_BLACKHAWK_XGXS_UC_RAM_CTL0r_fields, 14674 #else 14675 0, 14676 #endif 14677 #endif 14678 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14679 PHYMOD_SYMBOL_FLAG_REGISTER, 14680 "UC_RAM_CTL0r", 14681 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14682 "MICRO_C_RAM_CONTROL0", 14683 NULL, 14684 #endif 14685 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14686 0x8382, /* 33666 */ 14687 0, 14688 #endif 14689 }, 14690 { 14691 BCMI_BLACKHAWK_XGXS_UC_RAM_CTL1r, 14692 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14693 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14694 BCMI_BLACKHAWK_XGXS_UC_RAM_CTL1r_fields, 14695 #else 14696 0, 14697 #endif 14698 #endif 14699 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14700 PHYMOD_SYMBOL_FLAG_REGISTER, 14701 "UC_RAM_CTL1r", 14702 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14703 "MICRO_C_RAM_CONTROL1", 14704 NULL, 14705 #endif 14706 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14707 0x0, /* 0 */ 14708 0, 14709 #endif 14710 }, 14711 { 14712 BCMI_BLACKHAWK_XGXS_UC_RMI_EXT_INTR_CTL0r, 14713 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14714 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14715 BCMI_BLACKHAWK_XGXS_UC_RMI_EXT_INTR_CTL0r_fields, 14716 #else 14717 0, 14718 #endif 14719 #endif 14720 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14721 PHYMOD_SYMBOL_FLAG_REGISTER, 14722 "UC_RMI_EXT_INTR_CTL0r", 14723 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14724 "MICRO_C_RMI_EXT_INTR_CONTROL0", 14725 NULL, 14726 #endif 14727 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14728 0x0, /* 0 */ 14729 0, 14730 #endif 14731 }, 14732 { 14733 BCMI_BLACKHAWK_XGXS_UC_RMI_EXT_INTR_STS0r, 14734 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14735 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14736 BCMI_BLACKHAWK_XGXS_UC_RMI_EXT_INTR_STS0r_fields, 14737 #else 14738 0, 14739 #endif 14740 #endif 14741 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14742 PHYMOD_SYMBOL_FLAG_REGISTER, 14743 "UC_RMI_EXT_INTR_STS0r", 14744 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14745 "MICRO_C_RMI_EXT_INTR_STATUS0", 14746 NULL, 14747 #endif 14748 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14749 0x0, /* 0 */ 14750 0, 14751 #endif 14752 }, 14753 { 14754 BCMI_BLACKHAWK_XGXS_UC_RMI_PMI_IF_CTL0r, 14755 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14756 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14757 BCMI_BLACKHAWK_XGXS_UC_RMI_PMI_IF_CTL0r_fields, 14758 #else 14759 0, 14760 #endif 14761 #endif 14762 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14763 PHYMOD_SYMBOL_FLAG_REGISTER, 14764 "UC_RMI_PMI_IF_CTL0r", 14765 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14766 "MICRO_C_RMI_PMI_IF_CONTROL0", 14767 NULL, 14768 #endif 14769 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14770 0x1, /* 1 */ 14771 0, 14772 #endif 14773 }, 14774 { 14775 BCMI_BLACKHAWK_XGXS_UC_RMI_SILICON_DBG_CTL0r, 14776 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14777 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14778 BCMI_BLACKHAWK_XGXS_UC_RMI_SILICON_DBG_CTL0r_fields, 14779 #else 14780 0, 14781 #endif 14782 #endif 14783 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14784 PHYMOD_SYMBOL_FLAG_REGISTER, 14785 "UC_RMI_SILICON_DBG_CTL0r", 14786 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14787 "MICRO_C_RMI_SILICON_DEBUG_CONTROL0", 14788 NULL, 14789 #endif 14790 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14791 0x0, /* 0 */ 14792 0, 14793 #endif 14794 }, 14795 { 14796 BCMI_BLACKHAWK_XGXS_UC_RMI_SILICON_DBG_STS0r, 14797 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14798 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14799 BCMI_BLACKHAWK_XGXS_UC_RMI_SILICON_DBG_STS0r_fields, 14800 #else 14801 0, 14802 #endif 14803 #endif 14804 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14805 PHYMOD_SYMBOL_FLAG_REGISTER, 14806 "UC_RMI_SILICON_DBG_STS0r", 14807 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14808 "MICRO_C_RMI_SILICON_DEBUG_STATUS0", 14809 NULL, 14810 #endif 14811 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14812 0x0, /* 0 */ 14813 0, 14814 #endif 14815 }, 14816 { 14817 BCMI_BLACKHAWK_XGXS_UC_RAM_CTL2r, 14818 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14819 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14820 BCMI_BLACKHAWK_XGXS_UC_RAM_CTL2r_fields, 14821 #else 14822 0, 14823 #endif 14824 #endif 14825 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14826 PHYMOD_SYMBOL_FLAG_REGISTER, 14827 "UC_RAM_CTL2r", 14828 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14829 "MICRO_C_RAM_CONTROL2", 14830 NULL, 14831 #endif 14832 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14833 0x8400, /* 33792 */ 14834 0, 14835 #endif 14836 }, 14837 { 14838 BCMI_BLACKHAWK_XGXS_UC_RMI_UC_MSG_CTL0r, 14839 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14840 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14841 BCMI_BLACKHAWK_XGXS_UC_RMI_UC_MSG_CTL0r_fields, 14842 #else 14843 0, 14844 #endif 14845 #endif 14846 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14847 PHYMOD_SYMBOL_FLAG_REGISTER, 14848 "UC_RMI_UC_MSG_CTL0r", 14849 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14850 "MICRO_D_RMI_MICRO_MSG_CONTROL0", 14851 NULL, 14852 #endif 14853 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14854 0x0, /* 0 */ 14855 0, 14856 #endif 14857 }, 14858 { 14859 BCMI_BLACKHAWK_XGXS_UC_RMI_UC_MSG_CTL1r, 14860 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14861 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14862 BCMI_BLACKHAWK_XGXS_UC_RMI_UC_MSG_CTL1r_fields, 14863 #else 14864 0, 14865 #endif 14866 #endif 14867 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14868 PHYMOD_SYMBOL_FLAG_REGISTER, 14869 "UC_RMI_UC_MSG_CTL1r", 14870 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14871 "MICRO_D_RMI_MICRO_MSG_CONTROL1", 14872 NULL, 14873 #endif 14874 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14875 0x0, /* 0 */ 14876 0, 14877 #endif 14878 }, 14879 { 14880 BCMI_BLACKHAWK_XGXS_UC_RMI_UC_MSG_CTL2r, 14881 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14882 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14883 BCMI_BLACKHAWK_XGXS_UC_RMI_UC_MSG_CTL2r_fields, 14884 #else 14885 0, 14886 #endif 14887 #endif 14888 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14889 PHYMOD_SYMBOL_FLAG_REGISTER, 14890 "UC_RMI_UC_MSG_CTL2r", 14891 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14892 "MICRO_D_RMI_MICRO_MSG_CONTROL2", 14893 NULL, 14894 #endif 14895 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14896 0x0, /* 0 */ 14897 0, 14898 #endif 14899 }, 14900 { 14901 BCMI_BLACKHAWK_XGXS_UC_RMI_UC_MSG_CTL3r, 14902 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14903 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14904 BCMI_BLACKHAWK_XGXS_UC_RMI_UC_MSG_CTL3r_fields, 14905 #else 14906 0, 14907 #endif 14908 #endif 14909 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14910 PHYMOD_SYMBOL_FLAG_REGISTER, 14911 "UC_RMI_UC_MSG_CTL3r", 14912 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14913 "MICRO_D_RMI_MICRO_MSG_CONTROL3", 14914 NULL, 14915 #endif 14916 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14917 0x0, /* 0 */ 14918 0, 14919 #endif 14920 }, 14921 { 14922 BCMI_BLACKHAWK_XGXS_UC_UC_CORE_CLK_CTL0r, 14923 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14924 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14925 BCMI_BLACKHAWK_XGXS_UC_UC_CORE_CLK_CTL0r_fields, 14926 #else 14927 0, 14928 #endif 14929 #endif 14930 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14931 PHYMOD_SYMBOL_FLAG_REGISTER, 14932 "UC_UC_CORE_CLK_CTL0r", 14933 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14934 "MICRO_E_MICRO_CORE_CLOCK_CONTROL0", 14935 NULL, 14936 #endif 14937 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14938 0x0, /* 0 */ 14939 0, 14940 #endif 14941 }, 14942 { 14943 BCMI_BLACKHAWK_XGXS_UC_UC_CORE_RST_CTL0r, 14944 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14945 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14946 BCMI_BLACKHAWK_XGXS_UC_UC_CORE_RST_CTL0r_fields, 14947 #else 14948 0, 14949 #endif 14950 #endif 14951 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14952 PHYMOD_SYMBOL_FLAG_REGISTER, 14953 "UC_UC_CORE_RST_CTL0r", 14954 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14955 "MICRO_E_MICRO_CORE_RESET_CONTROL0", 14956 NULL, 14957 #endif 14958 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14959 0xc000, /* 49152 */ 14960 0, 14961 #endif 14962 }, 14963 { 14964 BCMI_BLACKHAWK_XGXS_UC_UC_CORE_STS0r, 14965 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14966 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14967 BCMI_BLACKHAWK_XGXS_UC_UC_CORE_STS0r_fields, 14968 #else 14969 0, 14970 #endif 14971 #endif 14972 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14973 PHYMOD_SYMBOL_FLAG_REGISTER, 14974 "UC_UC_CORE_STS0r", 14975 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14976 "MICRO_E_MICRO_CORE_STATUS0", 14977 NULL, 14978 #endif 14979 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 14980 0x0, /* 0 */ 14981 0, 14982 #endif 14983 }, 14984 { 14985 BCMI_BLACKHAWK_XGXS_UC_UC_CORE_CTL0r, 14986 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 14987 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 14988 BCMI_BLACKHAWK_XGXS_UC_UC_CORE_CTL0r_fields, 14989 #else 14990 0, 14991 #endif 14992 #endif 14993 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 14994 PHYMOD_SYMBOL_FLAG_REGISTER, 14995 "UC_UC_CORE_CTL0r", 14996 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 14997 "MICRO_E_MICRO_CORE_CONTROL0", 14998 NULL, 14999 #endif 15000 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15001 0x3, /* 3 */ 15002 0, 15003 #endif 15004 }, 15005 { 15006 BCMI_BLACKHAWK_XGXS_UC_UC_CORE_MBOX_CTL0r, 15007 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15008 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15009 BCMI_BLACKHAWK_XGXS_UC_UC_CORE_MBOX_CTL0r_fields, 15010 #else 15011 0, 15012 #endif 15013 #endif 15014 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15015 PHYMOD_SYMBOL_FLAG_REGISTER, 15016 "UC_UC_CORE_MBOX_CTL0r", 15017 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15018 "MICRO_E_MICRO_CORE_MBOX_CONTROL0", 15019 NULL, 15020 #endif 15021 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15022 0x0, /* 0 */ 15023 0, 15024 #endif 15025 }, 15026 { 15027 BCMI_BLACKHAWK_XGXS_UC_UC_CORE_LOW_PWR_CTL0r, 15028 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15029 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15030 BCMI_BLACKHAWK_XGXS_UC_UC_CORE_LOW_PWR_CTL0r_fields, 15031 #else 15032 0, 15033 #endif 15034 #endif 15035 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15036 PHYMOD_SYMBOL_FLAG_REGISTER, 15037 "UC_UC_CORE_LOW_PWR_CTL0r", 15038 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15039 "MICRO_E_MICRO_CORE_LOW_POWER_CONTROL0", 15040 NULL, 15041 #endif 15042 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15043 0xe, /* 14 */ 15044 0, 15045 #endif 15046 }, 15047 { 15048 BCMI_BLACKHAWK_XGXS_UC_UC_CORE_LOW_PWR_STS0r, 15049 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15050 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15051 BCMI_BLACKHAWK_XGXS_UC_UC_CORE_LOW_PWR_STS0r_fields, 15052 #else 15053 0, 15054 #endif 15055 #endif 15056 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15057 PHYMOD_SYMBOL_FLAG_REGISTER, 15058 "UC_UC_CORE_LOW_PWR_STS0r", 15059 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15060 "MICRO_E_MICRO_CORE_LOW_POWER_STATUS0", 15061 NULL, 15062 #endif 15063 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15064 0x2, /* 2 */ 15065 0, 15066 #endif 15067 }, 15068 { 15069 BCMI_BLACKHAWK_XGXS_UC_UC_CORE_STS1r, 15070 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15071 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15072 BCMI_BLACKHAWK_XGXS_UC_UC_CORE_STS1r_fields, 15073 #else 15074 0, 15075 #endif 15076 #endif 15077 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15078 PHYMOD_SYMBOL_FLAG_REGISTER, 15079 "UC_UC_CORE_STS1r", 15080 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15081 "MICRO_E_MICRO_CORE_STATUS1", 15082 NULL, 15083 #endif 15084 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15085 0x0, /* 0 */ 15086 0, 15087 #endif 15088 }, 15089 { 15090 BCMI_BLACKHAWK_XGXS_UC_UC_CORE_STS2r, 15091 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15092 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15093 BCMI_BLACKHAWK_XGXS_UC_UC_CORE_STS2r_fields, 15094 #else 15095 0, 15096 #endif 15097 #endif 15098 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15099 PHYMOD_SYMBOL_FLAG_REGISTER, 15100 "UC_UC_CORE_STS2r", 15101 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15102 "MICRO_E_MICRO_CORE_STATUS2", 15103 NULL, 15104 #endif 15105 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15106 0x0, /* 0 */ 15107 0, 15108 #endif 15109 }, 15110 { 15111 BCMI_BLACKHAWK_XGXS_UC_UC_CORE_CFG_FWAPI_DATA0r, 15112 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15113 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15114 BCMI_BLACKHAWK_XGXS_UC_UC_CORE_CFG_FWAPI_DATA0r_fields, 15115 #else 15116 0, 15117 #endif 15118 #endif 15119 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15120 PHYMOD_SYMBOL_FLAG_REGISTER, 15121 "UC_UC_CORE_CFG_FWAPI_DATA0r", 15122 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15123 "MICRO_E_MICRO_CORE_CFG_FWAPI_DATA0", 15124 NULL, 15125 #endif 15126 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15127 0x0, /* 0 */ 15128 0, 15129 #endif 15130 }, 15131 { 15132 BCMI_BLACKHAWK_XGXS_UC_UC_CORE_CFG_FW_API_DATA1r, 15133 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15134 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15135 BCMI_BLACKHAWK_XGXS_UC_UC_CORE_CFG_FW_API_DATA1r_fields, 15136 #else 15137 0, 15138 #endif 15139 #endif 15140 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15141 PHYMOD_SYMBOL_FLAG_REGISTER, 15142 "UC_UC_CORE_CFG_FW_API_DATA1r", 15143 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15144 "MICRO_E_MICRO_CORE_CFG_FW_API_DATA1", 15145 NULL, 15146 #endif 15147 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15148 0x0, /* 0 */ 15149 0, 15150 #endif 15151 }, 15152 { 15153 BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_READBACK_DATA0r, 15154 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15155 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15156 BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_READBACK_DATA0r_fields, 15157 #else 15158 0, 15159 #endif 15160 #endif 15161 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15162 PHYMOD_SYMBOL_FLAG_REGISTER, 15163 "DAC_TEST_COM_READBACK_DATA0r", 15164 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15165 "DAC_TEST_COM_READBACK_DATA_0", 15166 NULL, 15167 #endif 15168 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15169 0x0, /* 0 */ 15170 0, 15171 #endif 15172 }, 15173 { 15174 BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_READBACK_DATA1r, 15175 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15176 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15177 BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_READBACK_DATA1r_fields, 15178 #else 15179 0, 15180 #endif 15181 #endif 15182 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15183 PHYMOD_SYMBOL_FLAG_REGISTER, 15184 "DAC_TEST_COM_READBACK_DATA1r", 15185 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15186 "DAC_TEST_COM_READBACK_DATA_1", 15187 NULL, 15188 #endif 15189 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15190 0x0, /* 0 */ 15191 0, 15192 #endif 15193 }, 15194 { 15195 BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_READBACK_DATA2r, 15196 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15197 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15198 BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_READBACK_DATA2r_fields, 15199 #else 15200 0, 15201 #endif 15202 #endif 15203 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15204 PHYMOD_SYMBOL_FLAG_REGISTER, 15205 "DAC_TEST_COM_READBACK_DATA2r", 15206 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15207 "DAC_TEST_COM_READBACK_DATA_2", 15208 NULL, 15209 #endif 15210 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15211 0x0, /* 0 */ 15212 0, 15213 #endif 15214 }, 15215 { 15216 BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_READBACK_DATA3r, 15217 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15218 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15219 BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_READBACK_DATA3r_fields, 15220 #else 15221 0, 15222 #endif 15223 #endif 15224 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15225 PHYMOD_SYMBOL_FLAG_REGISTER, 15226 "DAC_TEST_COM_READBACK_DATA3r", 15227 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15228 "DAC_TEST_COM_READBACK_DATA_3", 15229 NULL, 15230 #endif 15231 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15232 0x0, /* 0 */ 15233 0, 15234 #endif 15235 }, 15236 { 15237 BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_READBACK_DATA4r, 15238 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15239 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15240 BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_READBACK_DATA4r_fields, 15241 #else 15242 0, 15243 #endif 15244 #endif 15245 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15246 PHYMOD_SYMBOL_FLAG_REGISTER, 15247 "DAC_TEST_COM_READBACK_DATA4r", 15248 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15249 "DAC_TEST_COM_READBACK_DATA_4", 15250 NULL, 15251 #endif 15252 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15253 0x0, /* 0 */ 15254 0, 15255 #endif 15256 }, 15257 { 15258 BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_READBACK_DATA5r, 15259 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15260 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15261 BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_READBACK_DATA5r_fields, 15262 #else 15263 0, 15264 #endif 15265 #endif 15266 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15267 PHYMOD_SYMBOL_FLAG_REGISTER, 15268 "DAC_TEST_COM_READBACK_DATA5r", 15269 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15270 "DAC_TEST_COM_READBACK_DATA_5", 15271 NULL, 15272 #endif 15273 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15274 0x0, /* 0 */ 15275 0, 15276 #endif 15277 }, 15278 { 15279 BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_READBACK_DATA6r, 15280 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15281 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15282 BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_READBACK_DATA6r_fields, 15283 #else 15284 0, 15285 #endif 15286 #endif 15287 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15288 PHYMOD_SYMBOL_FLAG_REGISTER, 15289 "DAC_TEST_COM_READBACK_DATA6r", 15290 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15291 "DAC_TEST_COM_READBACK_DATA_6", 15292 NULL, 15293 #endif 15294 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15295 0x0, /* 0 */ 15296 0, 15297 #endif 15298 }, 15299 { 15300 BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_READBACK_DATA7r, 15301 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15302 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15303 BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_READBACK_DATA7r_fields, 15304 #else 15305 0, 15306 #endif 15307 #endif 15308 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15309 PHYMOD_SYMBOL_FLAG_REGISTER, 15310 "DAC_TEST_COM_READBACK_DATA7r", 15311 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15312 "DAC_TEST_COM_READBACK_DATA_7", 15313 NULL, 15314 #endif 15315 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15316 0x0, /* 0 */ 15317 0, 15318 #endif 15319 }, 15320 { 15321 BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_READBACK_DATA8r, 15322 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15323 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15324 BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_READBACK_DATA8r_fields, 15325 #else 15326 0, 15327 #endif 15328 #endif 15329 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15330 PHYMOD_SYMBOL_FLAG_REGISTER, 15331 "DAC_TEST_COM_READBACK_DATA8r", 15332 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15333 "DAC_TEST_COM_READBACK_DATA_8", 15334 NULL, 15335 #endif 15336 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15337 0x0, /* 0 */ 15338 0, 15339 #endif 15340 }, 15341 { 15342 BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_READBACK_ADDRr, 15343 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15344 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15345 BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_READBACK_ADDRr_fields, 15346 #else 15347 0, 15348 #endif 15349 #endif 15350 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15351 PHYMOD_SYMBOL_FLAG_REGISTER, 15352 "DAC_TEST_COM_READBACK_ADDRr", 15353 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15354 "DAC_TEST_COM_READBACK_ADDRESS", 15355 NULL, 15356 #endif 15357 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15358 0x0, /* 0 */ 15359 0, 15360 #endif 15361 }, 15362 { 15363 BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_DAC_TEST_CTLr, 15364 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15365 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15366 BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_DAC_TEST_CTLr_fields, 15367 #else 15368 0, 15369 #endif 15370 #endif 15371 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15372 PHYMOD_SYMBOL_FLAG_REGISTER, 15373 "DAC_TEST_COM_DAC_TEST_CTLr", 15374 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15375 "DAC_TEST_COM_DAC_TEST_CONTROL", 15376 NULL, 15377 #endif 15378 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15379 0x0, /* 0 */ 15380 0, 15381 #endif 15382 }, 15383 { 15384 BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_DAC_TEST_MEM_TESTr, 15385 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15386 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15387 BCMI_BLACKHAWK_XGXS_DAC_TEST_COM_DAC_TEST_MEM_TESTr_fields, 15388 #else 15389 0, 15390 #endif 15391 #endif 15392 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15393 PHYMOD_SYMBOL_FLAG_REGISTER, 15394 "DAC_TEST_COM_DAC_TEST_MEM_TESTr", 15395 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15396 NULL, 15397 NULL, 15398 #endif 15399 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15400 0x0, /* 0 */ 15401 0, 15402 #endif 15403 }, 15404 { 15405 BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_TLB_ERR_AGGR_CFG0r, 15406 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15407 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15408 BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_TLB_ERR_AGGR_CFG0r_fields, 15409 #else 15410 0, 15411 #endif 15412 #endif 15413 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15414 PHYMOD_SYMBOL_FLAG_REGISTER, 15415 "TLB_ERR_AGGR_TLB_ERR_AGGR_CFG0r", 15416 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15417 "TLB_ERR_AGGR_TLB_ERR_AGGR_CONFIG_0", 15418 NULL, 15419 #endif 15420 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15421 0xc, /* 12 */ 15422 0, 15423 #endif 15424 }, 15425 { 15426 BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_TLB_ERR_AGGR_CFG1r, 15427 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15428 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15429 BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_TLB_ERR_AGGR_CFG1r_fields, 15430 #else 15431 0, 15432 #endif 15433 #endif 15434 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15435 PHYMOD_SYMBOL_FLAG_REGISTER, 15436 "TLB_ERR_AGGR_TLB_ERR_AGGR_CFG1r", 15437 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15438 "TLB_ERR_AGGR_TLB_ERR_AGGR_CONFIG_1", 15439 NULL, 15440 #endif 15441 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15442 0xa3, /* 163 */ 15443 0, 15444 #endif 15445 }, 15446 { 15447 BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_NUM_ERRS_IN_FEC_FRAMES_STS_HIr, 15448 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15449 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15450 BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_NUM_ERRS_IN_FEC_FRAMES_STS_HIr_fields, 15451 #else 15452 0, 15453 #endif 15454 #endif 15455 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15456 PHYMOD_SYMBOL_FLAG_REGISTER, 15457 "TLB_ERR_AGGR_NUM_ERRS_IN_FEC_FRAMES_STS_HIr", 15458 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15459 "TLB_ERR_AGGR_NUM_ERRORS_IN_FEC_FRAMES_STATUS_HI", 15460 NULL, 15461 #endif 15462 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15463 0x0, /* 0 */ 15464 0, 15465 #endif 15466 }, 15467 { 15468 BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_NUM_ERRS_IN_FEC_FRAMES_STS_LOr, 15469 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15470 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15471 BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_NUM_ERRS_IN_FEC_FRAMES_STS_LOr_fields, 15472 #else 15473 0, 15474 #endif 15475 #endif 15476 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15477 PHYMOD_SYMBOL_FLAG_REGISTER, 15478 "TLB_ERR_AGGR_NUM_ERRS_IN_FEC_FRAMES_STS_LOr", 15479 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15480 "TLB_ERR_AGGR_NUM_ERRORS_IN_FEC_FRAMES_STATUS_LO", 15481 NULL, 15482 #endif 15483 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15484 0x0, /* 0 */ 15485 0, 15486 #endif 15487 }, 15488 { 15489 BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS7r, 15490 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15491 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15492 BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS7r_fields, 15493 #else 15494 0, 15495 #endif 15496 #endif 15497 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15498 PHYMOD_SYMBOL_FLAG_REGISTER, 15499 "TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS7r", 15500 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15501 "TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_7", 15502 NULL, 15503 #endif 15504 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15505 0x0, /* 0 */ 15506 0, 15507 #endif 15508 }, 15509 { 15510 BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS6r, 15511 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15512 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15513 BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS6r_fields, 15514 #else 15515 0, 15516 #endif 15517 #endif 15518 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15519 PHYMOD_SYMBOL_FLAG_REGISTER, 15520 "TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS6r", 15521 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15522 "TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_6", 15523 NULL, 15524 #endif 15525 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15526 0x0, /* 0 */ 15527 0, 15528 #endif 15529 }, 15530 { 15531 BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS5r, 15532 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15533 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15534 BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS5r_fields, 15535 #else 15536 0, 15537 #endif 15538 #endif 15539 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15540 PHYMOD_SYMBOL_FLAG_REGISTER, 15541 "TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS5r", 15542 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15543 "TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_5", 15544 NULL, 15545 #endif 15546 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15547 0x0, /* 0 */ 15548 0, 15549 #endif 15550 }, 15551 { 15552 BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS4r, 15553 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15554 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15555 BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS4r_fields, 15556 #else 15557 0, 15558 #endif 15559 #endif 15560 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15561 PHYMOD_SYMBOL_FLAG_REGISTER, 15562 "TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS4r", 15563 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15564 "TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_4", 15565 NULL, 15566 #endif 15567 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15568 0x0, /* 0 */ 15569 0, 15570 #endif 15571 }, 15572 { 15573 BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS3r, 15574 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15575 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15576 BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS3r_fields, 15577 #else 15578 0, 15579 #endif 15580 #endif 15581 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15582 PHYMOD_SYMBOL_FLAG_REGISTER, 15583 "TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS3r", 15584 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15585 "TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_3", 15586 NULL, 15587 #endif 15588 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15589 0x0, /* 0 */ 15590 0, 15591 #endif 15592 }, 15593 { 15594 BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS2r, 15595 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15596 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15597 BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS2r_fields, 15598 #else 15599 0, 15600 #endif 15601 #endif 15602 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15603 PHYMOD_SYMBOL_FLAG_REGISTER, 15604 "TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS2r", 15605 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15606 "TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_2", 15607 NULL, 15608 #endif 15609 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15610 0x0, /* 0 */ 15611 0, 15612 #endif 15613 }, 15614 { 15615 BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS1r, 15616 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15617 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15618 BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS1r_fields, 15619 #else 15620 0, 15621 #endif 15622 #endif 15623 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15624 PHYMOD_SYMBOL_FLAG_REGISTER, 15625 "TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS1r", 15626 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15627 "TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_1", 15628 NULL, 15629 #endif 15630 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15631 0x0, /* 0 */ 15632 0, 15633 #endif 15634 }, 15635 { 15636 BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS0r, 15637 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15638 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15639 BCMI_BLACKHAWK_XGXS_TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS0r_fields, 15640 #else 15641 0, 15642 #endif 15643 #endif 15644 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15645 PHYMOD_SYMBOL_FLAG_REGISTER, 15646 "TLB_ERR_AGGR_CNT_HISTOGRAM_ERR_OFFS0r", 15647 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15648 "TLB_ERR_AGGR_COUNT_HISTOGRAM_ERROR_OFFSET_0", 15649 NULL, 15650 #endif 15651 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15652 0x0, /* 0 */ 15653 0, 15654 #endif 15655 }, 15656 { 15657 BCMI_BLACKHAWK_XGXS_DSC_RXA_FFE_TAPr, 15658 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15659 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15660 BCMI_BLACKHAWK_XGXS_DSC_RXA_FFE_TAPr_fields, 15661 #else 15662 0, 15663 #endif 15664 #endif 15665 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15666 PHYMOD_SYMBOL_FLAG_REGISTER, 15667 "DSC_RXA_FFE_TAPr", 15668 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15669 "DSC_G_RXA_FFE_TAP", 15670 NULL, 15671 #endif 15672 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15673 0x0, /* 0 */ 15674 0, 15675 #endif 15676 }, 15677 { 15678 BCMI_BLACKHAWK_XGXS_DSC_RXB_FFE_TAPr, 15679 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15680 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15681 BCMI_BLACKHAWK_XGXS_DSC_RXB_FFE_TAPr_fields, 15682 #else 15683 0, 15684 #endif 15685 #endif 15686 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15687 PHYMOD_SYMBOL_FLAG_REGISTER, 15688 "DSC_RXB_FFE_TAPr", 15689 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15690 "DSC_G_RXB_FFE_TAP", 15691 NULL, 15692 #endif 15693 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15694 0x0, /* 0 */ 15695 0, 15696 #endif 15697 }, 15698 { 15699 BCMI_BLACKHAWK_XGXS_DSC_RXC_FFE_TAPr, 15700 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15701 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15702 BCMI_BLACKHAWK_XGXS_DSC_RXC_FFE_TAPr_fields, 15703 #else 15704 0, 15705 #endif 15706 #endif 15707 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15708 PHYMOD_SYMBOL_FLAG_REGISTER, 15709 "DSC_RXC_FFE_TAPr", 15710 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15711 "DSC_G_RXC_FFE_TAP", 15712 NULL, 15713 #endif 15714 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15715 0x0, /* 0 */ 15716 0, 15717 #endif 15718 }, 15719 { 15720 BCMI_BLACKHAWK_XGXS_DSC_RXD_FFE_TAPr, 15721 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15722 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15723 BCMI_BLACKHAWK_XGXS_DSC_RXD_FFE_TAPr_fields, 15724 #else 15725 0, 15726 #endif 15727 #endif 15728 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15729 PHYMOD_SYMBOL_FLAG_REGISTER, 15730 "DSC_RXD_FFE_TAPr", 15731 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15732 "DSC_G_RXD_FFE_TAP", 15733 NULL, 15734 #endif 15735 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15736 0x0, /* 0 */ 15737 0, 15738 #endif 15739 }, 15740 { 15741 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP2_CTLr, 15742 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15743 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15744 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP2_CTLr_fields, 15745 #else 15746 0, 15747 #endif 15748 #endif 15749 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15750 PHYMOD_SYMBOL_FLAG_REGISTER, 15751 "DSC_RX_DFE_TAP2_CTLr", 15752 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15753 "DSC_G_RX_DFE_TAP2_CTRL", 15754 NULL, 15755 #endif 15756 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15757 0x0, /* 0 */ 15758 0, 15759 #endif 15760 }, 15761 { 15762 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP2_3_CTLr, 15763 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15764 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15765 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP2_3_CTLr_fields, 15766 #else 15767 0, 15768 #endif 15769 #endif 15770 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15771 PHYMOD_SYMBOL_FLAG_REGISTER, 15772 "DSC_RX_DFE_TAP2_3_CTLr", 15773 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15774 "DSC_G_RX_DFE_TAP2_3_CTRL", 15775 NULL, 15776 #endif 15777 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15778 0x0, /* 0 */ 15779 0, 15780 #endif 15781 }, 15782 { 15783 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP3_CTLr, 15784 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15785 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15786 BCMI_BLACKHAWK_XGXS_DSC_RX_DFE_TAP3_CTLr_fields, 15787 #else 15788 0, 15789 #endif 15790 #endif 15791 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15792 PHYMOD_SYMBOL_FLAG_REGISTER, 15793 "DSC_RX_DFE_TAP3_CTLr", 15794 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15795 "DSC_G_RX_DFE_TAP3_CTRL", 15796 NULL, 15797 #endif 15798 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15799 0x0, /* 0 */ 15800 0, 15801 #endif 15802 }, 15803 { 15804 BCMI_BLACKHAWK_XGXS_DSC_RX_AUTO_RATE_MOD_DFE_TAP2_ABr, 15805 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15806 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15807 BCMI_BLACKHAWK_XGXS_DSC_RX_AUTO_RATE_MOD_DFE_TAP2_ABr_fields, 15808 #else 15809 0, 15810 #endif 15811 #endif 15812 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15813 PHYMOD_SYMBOL_FLAG_REGISTER, 15814 "DSC_RX_AUTO_RATE_MOD_DFE_TAP2_ABr", 15815 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15816 "DSC_G_RX_AUTO_RATE_MOD_DFE_TAP2_AB", 15817 NULL, 15818 #endif 15819 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15820 0x0, /* 0 */ 15821 0, 15822 #endif 15823 }, 15824 { 15825 BCMI_BLACKHAWK_XGXS_DSC_RX_AUTO_RATE_MOD_DFE_TAP2_CDr, 15826 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15827 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15828 BCMI_BLACKHAWK_XGXS_DSC_RX_AUTO_RATE_MOD_DFE_TAP2_CDr_fields, 15829 #else 15830 0, 15831 #endif 15832 #endif 15833 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15834 PHYMOD_SYMBOL_FLAG_REGISTER, 15835 "DSC_RX_AUTO_RATE_MOD_DFE_TAP2_CDr", 15836 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15837 "DSC_G_RX_AUTO_RATE_MOD_DFE_TAP2_CD", 15838 NULL, 15839 #endif 15840 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15841 0x0, /* 0 */ 15842 0, 15843 #endif 15844 }, 15845 { 15846 BCMI_BLACKHAWK_XGXS_DSC_RX_AUTO_RATE_MOD_DFE_TAP3_ABr, 15847 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15848 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15849 BCMI_BLACKHAWK_XGXS_DSC_RX_AUTO_RATE_MOD_DFE_TAP3_ABr_fields, 15850 #else 15851 0, 15852 #endif 15853 #endif 15854 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15855 PHYMOD_SYMBOL_FLAG_REGISTER, 15856 "DSC_RX_AUTO_RATE_MOD_DFE_TAP3_ABr", 15857 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15858 "DSC_G_RX_AUTO_RATE_MOD_DFE_TAP3_AB", 15859 NULL, 15860 #endif 15861 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15862 0x0, /* 0 */ 15863 0, 15864 #endif 15865 }, 15866 { 15867 BCMI_BLACKHAWK_XGXS_DSC_RX_AUTO_RATE_MOD_DFE_TAP3_CDr, 15868 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15869 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15870 BCMI_BLACKHAWK_XGXS_DSC_RX_AUTO_RATE_MOD_DFE_TAP3_CDr_fields, 15871 #else 15872 0, 15873 #endif 15874 #endif 15875 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15876 PHYMOD_SYMBOL_FLAG_REGISTER, 15877 "DSC_RX_AUTO_RATE_MOD_DFE_TAP3_CDr", 15878 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15879 "DSC_G_RX_AUTO_RATE_MOD_DFE_TAP3_CD", 15880 NULL, 15881 #endif 15882 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15883 0x0, /* 0 */ 15884 0, 15885 #endif 15886 }, 15887 { 15888 BCMI_BLACKHAWK_XGXS_DSC_RX_AUTO_RATE_MOD_DATA23_14r, 15889 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15890 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15891 BCMI_BLACKHAWK_XGXS_DSC_RX_AUTO_RATE_MOD_DATA23_14r_fields, 15892 #else 15893 0, 15894 #endif 15895 #endif 15896 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15897 PHYMOD_SYMBOL_FLAG_REGISTER, 15898 "DSC_RX_AUTO_RATE_MOD_DATA23_14r", 15899 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15900 "DSC_G_RX_AUTO_RATE_MOD_DATA23_14", 15901 NULL, 15902 #endif 15903 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15904 0x0, /* 0 */ 15905 0, 15906 #endif 15907 }, 15908 { 15909 BCMI_BLACKHAWK_XGXS_DSC_RX_AUTO_RATE_MOD_PHASE02_1r, 15910 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15911 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15912 BCMI_BLACKHAWK_XGXS_DSC_RX_AUTO_RATE_MOD_PHASE02_1r_fields, 15913 #else 15914 0, 15915 #endif 15916 #endif 15917 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15918 PHYMOD_SYMBOL_FLAG_REGISTER, 15919 "DSC_RX_AUTO_RATE_MOD_PHASE02_1r", 15920 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15921 "DSC_G_RX_AUTO_RATE_MOD_PHASE02_1", 15922 NULL, 15923 #endif 15924 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15925 0x0, /* 0 */ 15926 0, 15927 #endif 15928 }, 15929 { 15930 BCMI_BLACKHAWK_XGXS_DSC_RX_AUTO_RATE_MOD_DATA05r, 15931 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15932 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15933 BCMI_BLACKHAWK_XGXS_DSC_RX_AUTO_RATE_MOD_DATA05r_fields, 15934 #else 15935 0, 15936 #endif 15937 #endif 15938 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15939 PHYMOD_SYMBOL_FLAG_REGISTER, 15940 "DSC_RX_AUTO_RATE_MOD_DATA05r", 15941 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15942 "DSC_G_RX_AUTO_RATE_MOD_DATA05", 15943 NULL, 15944 #endif 15945 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15946 0x0, /* 0 */ 15947 0, 15948 #endif 15949 }, 15950 { 15951 BCMI_BLACKHAWK_XGXS_DSC_AUTO_DATA23_UPD_CTLr, 15952 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15953 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15954 BCMI_BLACKHAWK_XGXS_DSC_AUTO_DATA23_UPD_CTLr_fields, 15955 #else 15956 0, 15957 #endif 15958 #endif 15959 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15960 PHYMOD_SYMBOL_FLAG_REGISTER, 15961 "DSC_AUTO_DATA23_UPD_CTLr", 15962 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15963 "DSC_H_AUTO_DATA23_UPDATE_CTRL", 15964 NULL, 15965 #endif 15966 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15967 0x0, /* 0 */ 15968 0, 15969 #endif 15970 }, 15971 { 15972 BCMI_BLACKHAWK_XGXS_DSC_AUTO_DATA14_UPD_CTLr, 15973 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15974 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15975 BCMI_BLACKHAWK_XGXS_DSC_AUTO_DATA14_UPD_CTLr_fields, 15976 #else 15977 0, 15978 #endif 15979 #endif 15980 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 15981 PHYMOD_SYMBOL_FLAG_REGISTER, 15982 "DSC_AUTO_DATA14_UPD_CTLr", 15983 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 15984 "DSC_H_AUTO_DATA14_UPDATE_CTRL", 15985 NULL, 15986 #endif 15987 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 15988 0x0, /* 0 */ 15989 0, 15990 #endif 15991 }, 15992 { 15993 BCMI_BLACKHAWK_XGXS_DSC_AUTO_DATA05_UPD_CTLr, 15994 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 15995 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 15996 BCMI_BLACKHAWK_XGXS_DSC_AUTO_DATA05_UPD_CTLr_fields, 15997 #else 15998 0, 15999 #endif 16000 #endif 16001 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16002 PHYMOD_SYMBOL_FLAG_REGISTER, 16003 "DSC_AUTO_DATA05_UPD_CTLr", 16004 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16005 "DSC_H_AUTO_DATA05_UPDATE_CTRL", 16006 NULL, 16007 #endif 16008 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16009 0x0, /* 0 */ 16010 0, 16011 #endif 16012 }, 16013 { 16014 BCMI_BLACKHAWK_XGXS_DSC_AUTO_PHASE1_UPD_CTLr, 16015 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16016 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 16017 BCMI_BLACKHAWK_XGXS_DSC_AUTO_PHASE1_UPD_CTLr_fields, 16018 #else 16019 0, 16020 #endif 16021 #endif 16022 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16023 PHYMOD_SYMBOL_FLAG_REGISTER, 16024 "DSC_AUTO_PHASE1_UPD_CTLr", 16025 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16026 "DSC_H_AUTO_PHASE1_UPDATE_CTRL", 16027 NULL, 16028 #endif 16029 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16030 0x0, /* 0 */ 16031 0, 16032 #endif 16033 }, 16034 { 16035 BCMI_BLACKHAWK_XGXS_DSC_AUTO_PHASE02_UPD_CTLr, 16036 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16037 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 16038 BCMI_BLACKHAWK_XGXS_DSC_AUTO_PHASE02_UPD_CTLr_fields, 16039 #else 16040 0, 16041 #endif 16042 #endif 16043 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16044 PHYMOD_SYMBOL_FLAG_REGISTER, 16045 "DSC_AUTO_PHASE02_UPD_CTLr", 16046 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16047 "DSC_H_AUTO_PHASE02_UPDATE_CTRL", 16048 NULL, 16049 #endif 16050 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16051 0x0, /* 0 */ 16052 0, 16053 #endif 16054 }, 16055 { 16056 BCMI_BLACKHAWK_XGXS_DSC_AUTO_RXA_DFE_TAP2_UPD_CTLr, 16057 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16058 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 16059 BCMI_BLACKHAWK_XGXS_DSC_AUTO_RXA_DFE_TAP2_UPD_CTLr_fields, 16060 #else 16061 0, 16062 #endif 16063 #endif 16064 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16065 PHYMOD_SYMBOL_FLAG_REGISTER, 16066 "DSC_AUTO_RXA_DFE_TAP2_UPD_CTLr", 16067 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16068 "DSC_H_AUTO_RXA_DFE_TAP2_UPDATE_CTRL", 16069 NULL, 16070 #endif 16071 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16072 0x0, /* 0 */ 16073 0, 16074 #endif 16075 }, 16076 { 16077 BCMI_BLACKHAWK_XGXS_DSC_AUTO_RXB_DFE_TAP2_UPD_CTLr, 16078 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16079 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 16080 BCMI_BLACKHAWK_XGXS_DSC_AUTO_RXB_DFE_TAP2_UPD_CTLr_fields, 16081 #else 16082 0, 16083 #endif 16084 #endif 16085 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16086 PHYMOD_SYMBOL_FLAG_REGISTER, 16087 "DSC_AUTO_RXB_DFE_TAP2_UPD_CTLr", 16088 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16089 "DSC_H_AUTO_RXB_DFE_TAP2_UPDATE_CTRL", 16090 NULL, 16091 #endif 16092 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16093 0x0, /* 0 */ 16094 0, 16095 #endif 16096 }, 16097 { 16098 BCMI_BLACKHAWK_XGXS_DSC_AUTO_RXC_DFE_TAP2_UPD_CTLr, 16099 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16100 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 16101 BCMI_BLACKHAWK_XGXS_DSC_AUTO_RXC_DFE_TAP2_UPD_CTLr_fields, 16102 #else 16103 0, 16104 #endif 16105 #endif 16106 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16107 PHYMOD_SYMBOL_FLAG_REGISTER, 16108 "DSC_AUTO_RXC_DFE_TAP2_UPD_CTLr", 16109 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16110 "DSC_H_AUTO_RXC_DFE_TAP2_UPDATE_CTRL", 16111 NULL, 16112 #endif 16113 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16114 0x0, /* 0 */ 16115 0, 16116 #endif 16117 }, 16118 { 16119 BCMI_BLACKHAWK_XGXS_DSC_AUTO_RXD_DFE_TAP2_UPD_CTLr, 16120 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16121 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 16122 BCMI_BLACKHAWK_XGXS_DSC_AUTO_RXD_DFE_TAP2_UPD_CTLr_fields, 16123 #else 16124 0, 16125 #endif 16126 #endif 16127 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16128 PHYMOD_SYMBOL_FLAG_REGISTER, 16129 "DSC_AUTO_RXD_DFE_TAP2_UPD_CTLr", 16130 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16131 "DSC_H_AUTO_RXD_DFE_TAP2_UPDATE_CTRL", 16132 NULL, 16133 #endif 16134 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16135 0x0, /* 0 */ 16136 0, 16137 #endif 16138 }, 16139 { 16140 BCMI_BLACKHAWK_XGXS_DSC_AUTO_RXA_DFE_TAP3_UPD_CTLr, 16141 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16142 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 16143 BCMI_BLACKHAWK_XGXS_DSC_AUTO_RXA_DFE_TAP3_UPD_CTLr_fields, 16144 #else 16145 0, 16146 #endif 16147 #endif 16148 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16149 PHYMOD_SYMBOL_FLAG_REGISTER, 16150 "DSC_AUTO_RXA_DFE_TAP3_UPD_CTLr", 16151 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16152 "DSC_H_AUTO_RXA_DFE_TAP3_UPDATE_CTRL", 16153 NULL, 16154 #endif 16155 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16156 0x0, /* 0 */ 16157 0, 16158 #endif 16159 }, 16160 { 16161 BCMI_BLACKHAWK_XGXS_DSC_AUTO_RXB_DFE_TAP3_UPD_CTLr, 16162 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16163 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 16164 BCMI_BLACKHAWK_XGXS_DSC_AUTO_RXB_DFE_TAP3_UPD_CTLr_fields, 16165 #else 16166 0, 16167 #endif 16168 #endif 16169 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16170 PHYMOD_SYMBOL_FLAG_REGISTER, 16171 "DSC_AUTO_RXB_DFE_TAP3_UPD_CTLr", 16172 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16173 "DSC_H_AUTO_RXB_DFE_TAP3_UPDATE_CTRL", 16174 NULL, 16175 #endif 16176 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16177 0x0, /* 0 */ 16178 0, 16179 #endif 16180 }, 16181 { 16182 BCMI_BLACKHAWK_XGXS_DSC_AUTO_RXC_DFE_TAP3_UPD_CTLr, 16183 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16184 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 16185 BCMI_BLACKHAWK_XGXS_DSC_AUTO_RXC_DFE_TAP3_UPD_CTLr_fields, 16186 #else 16187 0, 16188 #endif 16189 #endif 16190 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16191 PHYMOD_SYMBOL_FLAG_REGISTER, 16192 "DSC_AUTO_RXC_DFE_TAP3_UPD_CTLr", 16193 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16194 "DSC_H_AUTO_RXC_DFE_TAP3_UPDATE_CTRL", 16195 NULL, 16196 #endif 16197 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16198 0x0, /* 0 */ 16199 0, 16200 #endif 16201 }, 16202 { 16203 BCMI_BLACKHAWK_XGXS_DSC_AUTO_RXD_DFE_TAP3_UPD_CTLr, 16204 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16205 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 16206 BCMI_BLACKHAWK_XGXS_DSC_AUTO_RXD_DFE_TAP3_UPD_CTLr_fields, 16207 #else 16208 0, 16209 #endif 16210 #endif 16211 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16212 PHYMOD_SYMBOL_FLAG_REGISTER, 16213 "DSC_AUTO_RXD_DFE_TAP3_UPD_CTLr", 16214 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16215 "DSC_H_AUTO_RXD_DFE_TAP3_UPDATE_CTRL", 16216 NULL, 16217 #endif 16218 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16219 0x0, /* 0 */ 16220 0, 16221 #endif 16222 }, 16223 { 16224 BCMI_BLACKHAWK_XGXS_DSC_SLCR_DFE_TAPS_CTLr, 16225 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16226 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 16227 BCMI_BLACKHAWK_XGXS_DSC_SLCR_DFE_TAPS_CTLr_fields, 16228 #else 16229 0, 16230 #endif 16231 #endif 16232 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16233 PHYMOD_SYMBOL_FLAG_REGISTER, 16234 "DSC_SLCR_DFE_TAPS_CTLr", 16235 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16236 "DSC_H_SLICER_DFE_TAPS_CTRL", 16237 NULL, 16238 #endif 16239 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16240 0x0, /* 0 */ 16241 0, 16242 #endif 16243 }, 16244 { 16245 BCMI_BLACKHAWK_XGXS_DSC_RX_PF_CTL_DC_OFFS_AND_VGAr, 16246 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16247 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 16248 BCMI_BLACKHAWK_XGXS_DSC_RX_PF_CTL_DC_OFFS_AND_VGAr_fields, 16249 #else 16250 0, 16251 #endif 16252 #endif 16253 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16254 PHYMOD_SYMBOL_FLAG_REGISTER, 16255 "DSC_RX_PF_CTL_DC_OFFS_AND_VGAr", 16256 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16257 "DSC_H_RX_PF_CTRL_DC_OFFSET_AND_VGA", 16258 NULL, 16259 #endif 16260 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16261 0x27, /* 39 */ 16262 0, 16263 #endif 16264 }, 16265 { 16266 BCMI_BLACKHAWK_XGXS_TX_PI_B_CTL_12r, 16267 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16268 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 16269 BCMI_BLACKHAWK_XGXS_TX_PI_B_CTL_12r_fields, 16270 #else 16271 0, 16272 #endif 16273 #endif 16274 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16275 PHYMOD_SYMBOL_FLAG_REGISTER, 16276 "TX_PI_B_CTL_12r", 16277 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16278 "TX_PI_B_8X_PLL2X_V1P0_TX_PI_B_CONTROL_12", 16279 NULL, 16280 #endif 16281 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16282 0x0, /* 0 */ 16283 0, 16284 #endif 16285 }, 16286 { 16287 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_B_CTL0r, 16288 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16289 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 16290 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_B_CTL0r_fields, 16291 #else 16292 0, 16293 #endif 16294 #endif 16295 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16296 PHYMOD_SYMBOL_FLAG_REGISTER, 16297 "DSC_RX_PI_B_CTL0r", 16298 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16299 "DSC_I_RX_PI_B_CONTROL_0", 16300 NULL, 16301 #endif 16302 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16303 0x0, /* 0 */ 16304 0, 16305 #endif 16306 }, 16307 { 16308 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_B_CTL1r, 16309 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16310 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 16311 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_B_CTL1r_fields, 16312 #else 16313 0, 16314 #endif 16315 #endif 16316 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16317 PHYMOD_SYMBOL_FLAG_REGISTER, 16318 "DSC_RX_PI_B_CTL1r", 16319 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16320 "DSC_I_RX_PI_B_CONTROL_1", 16321 NULL, 16322 #endif 16323 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16324 0x0, /* 0 */ 16325 0, 16326 #endif 16327 }, 16328 { 16329 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_B_CTL2r, 16330 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16331 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 16332 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_B_CTL2r_fields, 16333 #else 16334 0, 16335 #endif 16336 #endif 16337 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16338 PHYMOD_SYMBOL_FLAG_REGISTER, 16339 "DSC_RX_PI_B_CTL2r", 16340 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16341 "DSC_I_RX_PI_B_CONTROL_2", 16342 NULL, 16343 #endif 16344 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16345 0x0, /* 0 */ 16346 0, 16347 #endif 16348 }, 16349 { 16350 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_B_CTL3r, 16351 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16352 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 16353 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_B_CTL3r_fields, 16354 #else 16355 0, 16356 #endif 16357 #endif 16358 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16359 PHYMOD_SYMBOL_FLAG_REGISTER, 16360 "DSC_RX_PI_B_CTL3r", 16361 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16362 "DSC_I_RX_PI_B_CONTROL_3", 16363 NULL, 16364 #endif 16365 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16366 0x0, /* 0 */ 16367 0, 16368 #endif 16369 }, 16370 { 16371 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_B_CTL4r, 16372 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16373 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 16374 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_B_CTL4r_fields, 16375 #else 16376 0, 16377 #endif 16378 #endif 16379 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16380 PHYMOD_SYMBOL_FLAG_REGISTER, 16381 "DSC_RX_PI_B_CTL4r", 16382 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16383 "DSC_I_RX_PI_B_CONTROL_4", 16384 NULL, 16385 #endif 16386 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16387 0x0, /* 0 */ 16388 0, 16389 #endif 16390 }, 16391 { 16392 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_B_CTL5r, 16393 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16394 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 16395 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_B_CTL5r_fields, 16396 #else 16397 0, 16398 #endif 16399 #endif 16400 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16401 PHYMOD_SYMBOL_FLAG_REGISTER, 16402 "DSC_RX_PI_B_CTL5r", 16403 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16404 "DSC_I_RX_PI_B_CONTROL_5", 16405 NULL, 16406 #endif 16407 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16408 0x0, /* 0 */ 16409 0, 16410 #endif 16411 }, 16412 { 16413 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_B_CTL6r, 16414 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16415 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 16416 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_B_CTL6r_fields, 16417 #else 16418 0, 16419 #endif 16420 #endif 16421 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16422 PHYMOD_SYMBOL_FLAG_REGISTER, 16423 "DSC_RX_PI_B_CTL6r", 16424 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16425 "DSC_I_RX_PI_B_CONTROL_6", 16426 NULL, 16427 #endif 16428 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16429 0x0, /* 0 */ 16430 0, 16431 #endif 16432 }, 16433 { 16434 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_B_CTL7r, 16435 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16436 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 16437 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_B_CTL7r_fields, 16438 #else 16439 0, 16440 #endif 16441 #endif 16442 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16443 PHYMOD_SYMBOL_FLAG_REGISTER, 16444 "DSC_RX_PI_B_CTL7r", 16445 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16446 "DSC_I_RX_PI_B_CONTROL_7", 16447 NULL, 16448 #endif 16449 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16450 0x0, /* 0 */ 16451 0, 16452 #endif 16453 }, 16454 { 16455 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_B_CTL9r, 16456 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16457 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 16458 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_B_CTL9r_fields, 16459 #else 16460 0, 16461 #endif 16462 #endif 16463 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16464 PHYMOD_SYMBOL_FLAG_REGISTER, 16465 "DSC_RX_PI_B_CTL9r", 16466 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16467 "DSC_I_RX_PI_B_CONTROL_9", 16468 NULL, 16469 #endif 16470 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16471 0x0, /* 0 */ 16472 0, 16473 #endif 16474 }, 16475 { 16476 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_B_CTL_10r, 16477 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16478 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 16479 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_B_CTL_10r_fields, 16480 #else 16481 0, 16482 #endif 16483 #endif 16484 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16485 PHYMOD_SYMBOL_FLAG_REGISTER, 16486 "DSC_RX_PI_B_CTL_10r", 16487 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16488 "DSC_I_RX_PI_B_CONTROL_10", 16489 NULL, 16490 #endif 16491 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16492 0x200, /* 512 */ 16493 0, 16494 #endif 16495 }, 16496 { 16497 BCMI_BLACKHAWK_XGXS_DSC_SPARE_DSC_Ir, 16498 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16499 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 16500 BCMI_BLACKHAWK_XGXS_DSC_SPARE_DSC_Ir_fields, 16501 #else 16502 0, 16503 #endif 16504 #endif 16505 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16506 PHYMOD_SYMBOL_FLAG_REGISTER, 16507 "DSC_SPARE_DSC_Ir", 16508 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16509 "DSC_I_SPARE_REG_DSC_I", 16510 NULL, 16511 #endif 16512 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16513 0x0, /* 0 */ 16514 0, 16515 #endif 16516 }, 16517 { 16518 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_B_STS0r, 16519 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16520 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 16521 BCMI_BLACKHAWK_XGXS_DSC_RX_PI_B_STS0r_fields, 16522 #else 16523 0, 16524 #endif 16525 #endif 16526 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16527 PHYMOD_SYMBOL_FLAG_REGISTER, 16528 "DSC_RX_PI_B_STS0r", 16529 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16530 "DSC_I_RX_PI_B_STATUS_0", 16531 NULL, 16532 #endif 16533 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16534 0x0, /* 0 */ 16535 0, 16536 #endif 16537 }, 16538 { 16539 BCMI_BLACKHAWK_XGXS_MDIO_BCST_PORT_ADDRr, 16540 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16541 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 16542 BCMI_BLACKHAWK_XGXS_MDIO_BCST_PORT_ADDRr_fields, 16543 #else 16544 0, 16545 #endif 16546 #endif 16547 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16548 PHYMOD_SYMBOL_FLAG_REGISTER, 16549 "MDIO_BCST_PORT_ADDRr", 16550 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16551 "MDIO_MMDSEL_AER_COM_MDIO_BRCST_PORT_ADDR", 16552 NULL, 16553 #endif 16554 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16555 0x1f, /* 31 */ 16556 0, 16557 #endif 16558 }, 16559 { 16560 BCMI_BLACKHAWK_XGXS_MDIO_MMD_SELr, 16561 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16562 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 16563 BCMI_BLACKHAWK_XGXS_MDIO_MMD_SELr_fields, 16564 #else 16565 0, 16566 #endif 16567 #endif 16568 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16569 PHYMOD_SYMBOL_FLAG_REGISTER, 16570 "MDIO_MMD_SELr", 16571 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16572 "MDIO_MMDSEL_AER_COM_MDIO_MMD_SELECT", 16573 NULL, 16574 #endif 16575 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16576 0x404d, /* 16461 */ 16577 0, 16578 #endif 16579 }, 16580 { 16581 BCMI_BLACKHAWK_XGXS_MDIO_AERr, 16582 #if PHYMOD_CONFIG_INCLUDE_FIELD_INFO == 1 16583 #ifndef PHYMOD_CONFIG_EXCLUDE_FIELD_INFO_BCMI_BLACKHAWK_XGXS 16584 BCMI_BLACKHAWK_XGXS_MDIO_AERr_fields, 16585 #else 16586 0, 16587 #endif 16588 #endif 16589 PHYMOD_SYMBOL_INDEX_SIZE_ENCODE(1), 16590 PHYMOD_SYMBOL_FLAG_REGISTER, 16591 "MDIO_AERr", 16592 #if PHYMOD_CONFIG_INCLUDE_ALIAS_NAMES == 1 16593 "MDIO_MMDSEL_AER_COM_MDIO_AER", 16594 NULL, 16595 #endif 16596 #if PHYMOD_CONFIG_INCLUDE_RESET_VALUES == 1 16597 0x0, /* 0 */ 16598 0, 16599 #endif 16600 }, 16601 #endif 16602 }; 16603 16604 16605 phymod_symbols_t bcmi_blackhawk_xgxs_symbols = 16606 { 16607 bcmi_blackhawk_xgxs_syms, sizeof(bcmi_blackhawk_xgxs_syms)/sizeof(bcmi_blackhawk_xgxs_syms[0]), 16608 #if PHYMOD_CONFIG_INCLUDE_FIELD_NAMES == 1 16609 bcmi_blackhawk_xgxs_fields 16610 #else 16611 NULL 16612 #endif 16613 /* END OF SYMBOL FILE */ 16614 }; 16615 16616 #endif /* PHYMOD_CONFIG_INCLUDE_CHIP_SYMBOLS */