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parallel_detect.soc (2199B)


      1 #/*----------------------------------------------------------------------
      2 #* 
      3 #* This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file.
      4 #* 
      5 #* Copyright 2007-2019 Broadcom Inc. All rights reserved.
      6 #*
      7 #* Broadcom Corporation
      8 #* Proprietary and Confidential information
      9 #* All rights reserved
     10 #* This source file is the property of Broadcom Corporation, and
     11 #* may not be copied or distributed in any isomorphic form without the
     12 #* prior written consent of Broadcom Corporation.
     13 #*---------------------------------------------------------------------
     14 #* File       : parallel_detect.soc
     15 #* Description: parallel detect testing soc script
     16 #*---------------------------------------------------------------------*/
     17 
     18 #09.03
     19 #BCM.0> config
     20 #   serdes_fiber_pref_xe4=1
     21 #   serdes_fiber_pref_xe5=1
     22 #   serdes_1000x_at_6250_vco_xe=1
     23 #   pbmp_xport_xe=0x3fc4444
     24 #   pci_delay_val13=0x83000000
     25 #   os=unix
     26 #   pci_override_dev=0x8406
     27 #   pci_delay_val=0x0f00d711
     28 #   parity_enable=0
     29 #   pci_delay_val0=0x840601
     30 #   pci_delay_val1=0x478180a
     31 #   pci_delay_val2=0x6064d0
     32 #   serdes_fiber_pref=0
     33 #   pci_delay_val3=0x600650
     34 #   pci_delay_val4=0x101fe1
     35 #   pci_delay_val6=0xff0
     36 #   pci_delay_val7=0x54400000
     37 #   bcm53400_init_port_config=2
     38 #   pci_delay_val8=0x4
     39 
     40 
     41 #working PD to 1G
     42 init all
     43 phy xe4 0x6c050 0x001c
     44 phy xe8 0x6c050 0x001c
     45 phy xe4 0x0c188 0x2
     46 port xe8 speed=1000
     47 port xe4 an=t adv=10g
     48 phy xe4 0x0c1ac 
     49 
     50 
     51 #working PD to 1G-cl37
     52 config add phy_an_c37_xe8=1
     53 config add phy_an_c73_xe8=0
     54 init all
     55 phy xe4 0x6c050 0x001c
     56 phy xe8 0x6c050 0x001c
     57 port xe8 an=t adv=1000full
     58 port xe4 an=t adv=10g
     59 phy xe4 0x0c188 0x2
     60 phy xe4 0x0c181 0x1c16
     61 phy xe4 0x0c180 0x0
     62 phy xe4 0x0c180 0x101
     63 #check PD status bit 07: PD Done, bit 01: PD in progress
     64 phy xe4 0x0c1ac
     65 #bit 8 should be set to indicate pc_cl37_completed
     66 phy xe4 0x0c1ac
     67 
     68 #Working PD to 10GXAUI
     69 #xe0/xe1 are both xaui ports
     70 init all
     71 phy xe0 0x6c050 0x001c
     72 phy xe1 0x6c050 0x001c
     73 phy xe0 0x0c188 0x3
     74 port xe1 speed=10000
     75 port xe0 an=t adv=10g
     76 phy xe0 0x9000 0x6008
     77 phy xe0 0x0c180 0x0
     78 phy xe0 0x0c180 0x101
     79 #check PD status bit 07: PD Done, bit 01: PD in progress
     80 phy xe0 0x0c1ac
     81 
     82 
     83