1g_6p25.soc (2885B)
1 #/*---------------------------------------------------------------------- 2 # * 3 # * 4 # * 5 # * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 6 # * 7 # * Copyright 2007-2019 Broadcom Inc. All rights reserved. 8 # * 9 # * Broadcom Corporation 10 # * Proprietary and Confidential information 11 # * All rights reserved 12 # * This source file is the property of Broadcom Corporation, and 13 # * may not be copied or distributed in any isomorphic form without the 14 # * prior written consent of Broadcom Corporation. 15 # *--------------------------------------------------------------------- 16 # * File : 1g_6p25.soc 17 # * Description: 1g_6p25 cfg 18 # *---------------------------------------------------------------------*/ 19 20 # reg_name=Reg_tsc_pmd_x1_control, dev_adr=0, reg_adr=0x1089010, reg_width=0x10, reg_data=0x3 21 #core/dp and core power release 22 local port 0xb1 23 phy raw sbus $port 0.0 0x9010 0x0000 24 sleep 1; 25 26 phy raw sbus $port 0.0 0x9010 0x0003 27 phy raw sbus $port 0.0 0x9010 28 29 # reg_name=Reg_tsc_pmd_x4_control, dev_adr=0, reg_adr=0x108c010, reg_width=0x10, reg_data=0x0 30 #x4 reset release 31 32 phy raw sbus $port 0.0 0xc010 0x0000 33 phy raw sbus $port 0.0 0xc010 0x0003 34 phy raw sbus $port 0.0 0xc010 35 36 37 38 # pll_mode = a, reg_adr=0x908d127 reg_data=0xa 39 phy raw sbus $port 1.0 0xd127 0x0002 40 phy raw sbus $port 1.0 0xd127 41 42 # core_dp_s_rstb = 1, heartbeat_count_1us = 0x271, reg_adr=0x908d0f4 reg_data=0x2000 43 phy raw sbus $port 1.0 0xd0f4 0x2271 44 phy raw sbus $port 1.0 0xd0f4 45 46 # 0xr_mode_frc = 1, reg_adr=0x908d080 reg_data=0x8000 47 phy raw sbus $port 1.0 0xd080 0x8005 48 phy raw sbus $port 1.0 0xd080 49 50 # ln_dp_s_rstb release, reg_adr=0x908d081 reg_data=0x2 51 phy raw sbus $port 1.0 0xd081 0x0002 52 phy raw sbus $port 1.0 0xd081 53 54 55 # reg_name=Reg_tsc_main0_setup, dev_adr=0, reg_adr=0x1089000, reg_width=0x10, reg_data=0x6400 56 phy raw sbus $port 0.0 0x9000 0x6400 57 phy raw sbus $port 0.0 0x9000 58 59 60 # release RXP reset ??, reg_name=Reg_tsc_rx_x4_control0_pma_control_0, dev_adr=0, reg_adr=0x108c137, reg_width=0x10, reg_data=0x1 61 62 phy raw sbus $port 0.0 0xc137 0x0001 63 phy raw sbus $port 0.0 0xc137 64 65 66 # release TXP reset, reg_name=Reg_tsc_tx_x4_control0_misc, dev_adr=0, reg_adr=0x108c113, reg_width=0x10, reg_data=0x2 67 68 phy raw sbus $port 0.0 0xc113 0x01ca 69 phy raw sbus $port 0.0 0xc113 70 71 72 # reg_name=Reg_tsc_tx_x4_control0_misc, dev_adr=0, reg_adr=0x108c113, reg_width=0x10, reg_data=0x1 73 74 phy raw sbus $port 0.0 0xc113 0x01cb 75 phy raw sbus $port 0.0 0xc113 76 77 78 # Reg_tsc_sc_x4_control_control, dev_adr=0, reg_adr=0x108c050, reg_width=0x10, reg_data=0x1c 79 80 phy raw sbus $port 0.0 0xc050 0x0003 81 phy raw sbus $port 0.0 0xc050 82 83 phy raw sbus $port 0.0 0xc050 0x0103 84 phy raw sbus $port 0.0 0xc050 85 86 # PMD LOOPBACK 87 #phy raw sbus $port 1.0 0xd0d2 0x7 88 #phy raw sbus $port 1.0 0xd0d2 89 90 sleep 2; 91 92 phy raw sbus $port 0.0 0xc154 # pcs live link status 93 94