phymod_enums.c (26086B)
1 /* 2 * 3 * 4 * 5 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 6 * 7 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 8 * 9 * 10 * DO NOT EDIT THIS FILE! 11 */ 12 13 #include <phymod/phymod.h> 14 #include <phymod/phymod_system.h> 15 #include <phymod/phymod.h> 16 #include <phymod/phymod_dispatch.h> 17 18 #ifdef PHYMOD_DIAG 19 20 enum_mapping_t phymod_dispatch_type_t_mapping[] = { 21 #ifdef PHYMOD_EAGLE_SUPPORT 22 {"Eagle", phymodDispatchTypeEagle}, 23 #endif /*PHYMOD_EAGLE_SUPPORT */ 24 #ifdef PHYMOD_FALCON_SUPPORT 25 {"Falcon", phymodDispatchTypeFalcon}, 26 #endif /*PHYMOD_FALCON_SUPPORT */ 27 #ifdef PHYMOD_QSGMIIE_SUPPORT 28 {"Qsgmiie", phymodDispatchTypeQsgmiie}, 29 #endif /*PHYMOD_QSGMIIE_SUPPORT */ 30 #ifdef PHYMOD_TSCE_SUPPORT 31 {"Tsce", phymodDispatchTypeTsce}, 32 #endif /*PHYMOD_TSCE_SUPPORT */ 33 #ifdef PHYMOD_TSCF_SUPPORT 34 {"Tscf", phymodDispatchTypeTscf}, 35 #endif /*PHYMOD_TSCF_SUPPORT */ 36 #ifdef PHYMOD_PHY8806X_SUPPORT 37 {"Phy8806x", phymodDispatchTypePhy8806x}, 38 #endif /*PHYMOD_PHY8806X_SUPPORT */ 39 #ifdef PHYMOD_FURIA_SUPPORT 40 {"Furia", phymodDispatchTypeFuria}, 41 #endif /*PHYMOD_FURIA_SUPPORT */ 42 #ifdef PHYMOD_VIPER_SUPPORT 43 {"Viper", phymodDispatchTypeViper}, 44 #endif /*PHYMOD_VIPER_SUPPORT */ 45 #ifdef PHYMOD_SESTO_SUPPORT 46 {"Sesto", phymodDispatchTypeSesto}, 47 #endif /*PHYMOD_SESTO_SUPPORT */ 48 #ifdef PHYMOD_QUADRA28_SUPPORT 49 {"Quadra28", phymodDispatchTypeQuadra28}, 50 #endif /*PHYMOD_QUADRA28_SUPPORT */ 51 #ifdef PHYMOD_QTCE_SUPPORT 52 {"Qtce", phymodDispatchTypeQtce}, 53 #endif /*PHYMOD_QTCE_SUPPORT */ 54 #ifdef PHYMOD_HURACAN_SUPPORT 55 {"Huracan", phymodDispatchTypeHuracan}, 56 #endif /*PHYMOD_HURACAN_SUPPORT */ 57 #ifdef PHYMOD_MADURA_SUPPORT 58 {"Madura", phymodDispatchTypeMadura}, 59 #endif /*PHYMOD_MADURA_SUPPORT */ 60 #ifdef PHYMOD_FURIA_SUPPORT 61 {"Furia_82212", phymodDispatchTypeFuria_82212}, 62 #endif /*PHYMOD_FURIA_SUPPORT */ 63 #ifdef PHYMOD_DINO_SUPPORT 64 {"Dino", phymodDispatchTypeDino}, 65 #endif /*PHYMOD_DINO_SUPPORT */ 66 #ifdef PHYMOD_TSCE_DPLL_SUPPORT 67 {"Tsce_dpll", phymodDispatchTypeTsce_dpll}, 68 #endif /*PHYMOD_TSCE_DPLL_SUPPORT */ 69 #ifdef PHYMOD_EAGLE_DPLL_SUPPORT 70 {"Eagle_dpll", phymodDispatchTypeEagle_dpll}, 71 #endif /*PHYMOD_EAGLE_DPLL_SUPPORT */ 72 #ifdef PHYMOD_TSCF16_SUPPORT 73 {"Tscf16", phymodDispatchTypeTscf16}, 74 #endif /*PHYMOD_TSCF16_SUPPORT */ 75 #ifdef PHYMOD_FALCON16_SUPPORT 76 {"Falcon16", phymodDispatchTypeFalcon16}, 77 #endif /*PHYMOD_FALCON16_SUPPORT */ 78 #ifdef PHYMOD_MERLIN16_SUPPORT 79 {"Merlin16", phymodDispatchTypeMerlin16}, 80 #endif /*PHYMOD_MERLIN16_SUPPORT */ 81 #ifdef PHYMOD_TSCE16_SUPPORT 82 {"Tsce16", phymodDispatchTypeTsce16}, 83 #endif /*PHYMOD_TSCE16_SUPPORT */ 84 #ifdef PHYMOD_TSCF_GEN3_SUPPORT 85 {"Tscf_gen3", phymodDispatchTypeTscf_gen3}, 86 #endif /*PHYMOD_TSCF_GEN3_SUPPORT */ 87 #ifdef PHYMOD_FALCON_DPLL_SUPPORT 88 {"Falcon_dpll", phymodDispatchTypeFalcon_dpll}, 89 #endif /*PHYMOD_FALCON_DPLL_SUPPORT */ 90 #ifdef PHYMOD_BLACKHAWK_SUPPORT 91 {"Blackhawk", phymodDispatchTypeBlackhawk}, 92 #endif /*PHYMOD_BLACKHAWK_SUPPORT */ 93 #ifdef PHYMOD_TSCBH_SUPPORT 94 {"Tscbh", phymodDispatchTypeTscbh}, 95 #endif /*PHYMOD_TSCBH_SUPPORT */ 96 #ifdef PHYMOD_QTCE16_SUPPORT 97 {"Qtce16", phymodDispatchTypeQtce16}, 98 #endif /*PHYMOD_QTCE16_SUPPORT */ 99 #ifdef PHYMOD_NULL_SUPPORT 100 {"Null", phymodDispatchTypeNull}, 101 #endif /*PHYMOD_NULL_SUPPORT */ 102 {"Invalid", phymodDispatchTypeInvalid}, 103 #ifdef PHYMOD_BLACKHAWK7_V1L8P2_SUPPORT 104 {"Blackhawk7_v1l8p2", phymodDispatchTypeBlackhawk7_v1l8p2}, 105 #endif /*PHYMOD_BLACKHAWK7_V1L8P2_SUPPORT */ 106 #ifdef PHYMOD_TSCBH_GEN2_SUPPORT 107 {"Tscbh_gen2", phymodDispatchTypeTscbh_gen2}, 108 #endif /*PHYMOD_TSCBH_GEN2_SUPPORT */ 109 #ifdef PHYMOD_MERLIN7_SUPPORT 110 {"Merlin7", phymodDispatchTypeMerlin7}, 111 #endif /*PHYMOD_MERLIN7_SUPPORT */ 112 #ifdef PHYMOD_TSCE7_SUPPORT 113 {"Tsce7", phymodDispatchTypeTsce7}, 114 #endif /*PHYMOD_TSCE7_SUPPORT */ 115 {NULL, 0} 116 }; 117 118 enum_mapping_t phymod_mem_type_t_mapping[] = { 119 {"SpeedIdTable", phymodMemSpeedIdTable}, 120 {"AMTable", phymodMemAMTable}, 121 {"UMTable", phymodMemUMTable}, 122 {"TxLkup1588Mpp0", phymodMemTxLkup1588Mpp0}, 123 {"TxLkup1588Mpp1", phymodMemTxLkup1588Mpp1}, 124 {"TxLkup1588400G", phymodMemTxLkup1588400G}, 125 {"RxLkup1588Mpp0", phymodMemRxLkup1588Mpp0}, 126 {"RxLkup1588Mpp1", phymodMemRxLkup1588Mpp1}, 127 {"RxLkup1588400G", phymodMemRxLkup1588400G}, 128 {"SpeedPriorityMapTable", phymodMemSpeedPriorityMapTable}, 129 {NULL, 0} 130 }; 131 132 enum_mapping_t phymod_port_loc_t_mapping[] = { 133 {"LocDC", phymodPortLocDC}, 134 {"LocLine", phymodPortLocLine}, 135 {"LocSys", phymodPortLocSys}, 136 {NULL, 0} 137 }; 138 139 enum_mapping_t phymod_core_version_t_mapping[] = { 140 {"FalconA0", phymodCoreVersionFalconA0}, 141 {"EagleA0", phymodCoreVersionEagleA0}, 142 {"QsgmiieA0", phymodCoreVersionQsgmiieA0}, 143 {"Tsce4A0", phymodCoreVersionTsce4A0}, 144 {"Tsce12A0", phymodCoreVersionTsce12A0}, 145 {"TscfA0", phymodCoreVersionTscfA0}, 146 {"TscfB0", phymodCoreVersionTscfB0}, 147 {"Phy8806x", phymodCoreVersionPhy8806x}, 148 {"FuriaA2", phymodCoreVersionFuriaA2}, 149 {"ViperXA0", phymodCoreVersionViperXA0}, 150 {"ViperGA0", phymodCoreVersionViperGA0}, 151 {"SestoA0", phymodCoreVersionSestoA0}, 152 {"Quadra28", phymodCoreVersionQuadra28}, 153 {"Huracan", phymodCoreVersionHuracan}, 154 {"Madura", phymodCoreVersionMadura}, 155 {"SestoB0", phymodCoreVersionSestoB0}, 156 {"Dino", phymodCoreVersionDino}, 157 {"TsceDpll", phymodCoreVersionTsceDpll}, 158 {"Falcon16", phymodCoreVersionFalcon16}, 159 {"Tscf16", phymodCoreVersionTscf16}, 160 {"Merlin16", phymodCoreVersionMerlin16}, 161 {"TscfB1", phymodCoreVersionTscfB1}, 162 {"Tsce16", phymodCoreVersionTsce16}, 163 {"falconDpll", phymodCoreVersionfalconDpll}, 164 {"TscfGen3", phymodCoreVersionTscfGen3}, 165 {"Blackhawk16", phymodCoreVersionBlackhawk16}, 166 {"Tscbh16", phymodCoreVersionTscbh16}, 167 {"QtceA0", phymodCoreVersionQtceA0}, 168 {"Qtce16", phymodCoreVersionQtce16}, 169 {"Blackhawk7_v1l8p2", phymodCoreVersionBlackhawk7_v1l8p2}, 170 {"TscbhGen2", phymodCoreVersionTscbhGen2}, 171 {"Merlin7", phymodCoreVersionMerlin7}, 172 {"Tsce7", phymodCoreVersionTsce7}, 173 {NULL, 0} 174 }; 175 176 enum_mapping_t phymod_reset_mode_t_mapping[] = { 177 {"Hard", phymodResetModeHard}, 178 {"Soft", phymodResetModeSoft}, 179 {NULL, 0} 180 }; 181 182 enum_mapping_t phymod_reset_direction_t_mapping[] = { 183 {"In", phymodResetDirectionIn}, 184 {"Out", phymodResetDirectionOut}, 185 {"InOut", phymodResetDirectionInOut}, 186 {NULL, 0} 187 }; 188 189 enum_mapping_t phymod_firmware_media_type_t_mapping[] = { 190 {"PcbTraceBackPlane", phymodFirmwareMediaTypePcbTraceBackPlane}, 191 {"CopperCable", phymodFirmwareMediaTypeCopperCable}, 192 {"Optics", phymodFirmwareMediaTypeOptics}, 193 {NULL, 0} 194 }; 195 196 enum_mapping_t phymod_sequencer_operation_t_mapping[] = { 197 {"Stop", phymodSeqOpStop}, 198 {"Start", phymodSeqOpStart}, 199 {"Restart", phymodSeqOpRestart}, 200 {NULL, 0} 201 }; 202 203 enum_mapping_t phymod_core_event_t_mapping[] = { 204 {"PllLock", phymodCoreEventPllLock}, 205 {NULL, 0} 206 }; 207 208 enum_mapping_t phymod_drivermode_t_mapping[] = { 209 {"Default", phymodTxDriverModeDefault}, 210 {"NotSupported", phymodTxDriverModeNotSupported}, 211 {"HalfAmp", phymodTxDriverModeHalfAmp}, 212 {"HalfAmpHiImped", phymodTxDriverModeHalfAmpHiImped}, 213 {NULL, 0} 214 }; 215 216 enum_mapping_t phymod_tx_tap_mode_t_mapping[] = { 217 {"Default", phymodTxTapModeDefault}, 218 {"6Tap", phymodTxTapMode6Tap}, 219 {"3Tap", phymodTxTapMode3Tap}, 220 {NULL, 0} 221 }; 222 223 enum_mapping_t phymod_phy_signalling_method_t_mapping[] = { 224 {"NRZ", phymodSignallingMethodNRZ}, 225 {"PAM4", phymodSignallingMethodPAM4}, 226 {NULL, 0} 227 }; 228 229 enum_mapping_t phymod_media_typed_t_mapping[] = { 230 {"ChipToChip", phymodMediaTypeChipToChip}, 231 {"Short", phymodMediaTypeShort}, 232 {"Mid", phymodMediaTypeMid}, 233 {"Long", phymodMediaTypeLong}, 234 {NULL, 0} 235 }; 236 237 enum_mapping_t phymod_power_t_mapping[] = { 238 {"Off", phymodPowerOff}, 239 {"On", phymodPowerOn}, 240 {"OffOn", phymodPowerOffOn}, 241 {"NoChange", phymodPowerNoChange}, 242 {NULL, 0} 243 }; 244 245 enum_mapping_t phymod_phy_hg2_codec_t_mapping[] = { 246 {"Off", phymodBcmHG2CodecOff}, 247 {"OnWith8ByteIPG", phymodBcmHG2CodecOnWith8ByteIPG}, 248 {"OnWith9ByteIPG", phymodBcmHG2CodecOnWith9ByteIPG}, 249 {NULL, 0} 250 }; 251 252 enum_mapping_t phymod_phy_tx_lane_control_t_mapping[] = { 253 {"TrafficDisable", phymodTxTrafficDisable}, 254 {"TrafficEnable", phymodTxTrafficEnable}, 255 {"Reset", phymodTxReset}, 256 {"SquelchOn", phymodTxSquelchOn}, 257 {"SquelchOff", phymodTxSquelchOff}, 258 {"ElectricalIdleEnable", phymodTxElectricalIdleEnable}, 259 {"ElectricalIdleDisable", phymodTxElectricalIdleDisable}, 260 {NULL, 0} 261 }; 262 263 enum_mapping_t phymod_phy_rx_lane_control_t_mapping[] = { 264 {"Reset", phymodRxReset}, 265 {"SquelchOn", phymodRxSquelchOn}, 266 {"SquelchOff", phymodRxSquelchOff}, 267 {"Disable", phymodRxDisable}, 268 {NULL, 0} 269 }; 270 271 enum_mapping_t phymod_interface_t_mapping[] = { 272 {"Bypass", phymodInterfaceBypass}, 273 {"SR", phymodInterfaceSR}, 274 {"SR4", phymodInterfaceSR4}, 275 {"KX", phymodInterfaceKX}, 276 {"KX4", phymodInterfaceKX4}, 277 {"KR", phymodInterfaceKR}, 278 {"KR2", phymodInterfaceKR2}, 279 {"KR4", phymodInterfaceKR4}, 280 {"CX", phymodInterfaceCX}, 281 {"CX2", phymodInterfaceCX2}, 282 {"CX4", phymodInterfaceCX4}, 283 {"CR", phymodInterfaceCR}, 284 {"CR2", phymodInterfaceCR2}, 285 {"CR4", phymodInterfaceCR4}, 286 {"CR10", phymodInterfaceCR10}, 287 {"XFI", phymodInterfaceXFI}, 288 {"SFI", phymodInterfaceSFI}, 289 {"SFPDAC", phymodInterfaceSFPDAC}, 290 {"XGMII", phymodInterfaceXGMII}, 291 {"1000X", phymodInterface1000X}, 292 {"SGMII", phymodInterfaceSGMII}, 293 {"XAUI", phymodInterfaceXAUI}, 294 {"RXAUI", phymodInterfaceRXAUI}, 295 {"X2", phymodInterfaceX2}, 296 {"XLAUI", phymodInterfaceXLAUI}, 297 {"XLAUI2", phymodInterfaceXLAUI2}, 298 {"CAUI", phymodInterfaceCAUI}, 299 {"QSGMII", phymodInterfaceQSGMII}, 300 {"LR4", phymodInterfaceLR4}, 301 {"LR", phymodInterfaceLR}, 302 {"LR2", phymodInterfaceLR2}, 303 {"ER", phymodInterfaceER}, 304 {"ER2", phymodInterfaceER2}, 305 {"ER4", phymodInterfaceER4}, 306 {"SR2", phymodInterfaceSR2}, 307 {"SR10", phymodInterfaceSR10}, 308 {"CAUI4", phymodInterfaceCAUI4}, 309 {"VSR", phymodInterfaceVSR}, 310 {"LR10", phymodInterfaceLR10}, 311 {"KR10", phymodInterfaceKR10}, 312 {"CAUI4_C2C", phymodInterfaceCAUI4_C2C}, 313 {"CAUI4_C2M", phymodInterfaceCAUI4_C2M}, 314 {"ZR", phymodInterfaceZR}, 315 {"LRM", phymodInterfaceLRM}, 316 {"XLPPI", phymodInterfaceXLPPI}, 317 {"OTN", phymodInterfaceOTN}, 318 {NULL, 0} 319 }; 320 321 enum_mapping_t phymod_ref_clk_t_mapping[] = { 322 {"156Mhz", phymodRefClk156Mhz}, 323 {"125Mhz", phymodRefClk125Mhz}, 324 {"106Mhz", phymodRefClk106Mhz}, 325 {"161Mhz", phymodRefClk161Mhz}, 326 {"174Mhz", phymodRefClk174Mhz}, 327 {"312Mhz", phymodRefClk312Mhz}, 328 {"322Mhz", phymodRefClk322Mhz}, 329 {"349Mhz", phymodRefClk349Mhz}, 330 {"644Mhz", phymodRefClk644Mhz}, 331 {"698Mhz", phymodRefClk698Mhz}, 332 {"155Mhz", phymodRefClk155Mhz}, 333 {"156P6Mhz", phymodRefClk156P6Mhz}, 334 {"157Mhz", phymodRefClk157Mhz}, 335 {"158Mhz", phymodRefClk158Mhz}, 336 {"159Mhz", phymodRefClk159Mhz}, 337 {"168Mhz", phymodRefClk168Mhz}, 338 {"172Mhz", phymodRefClk172Mhz}, 339 {"173Mhz", phymodRefClk173Mhz}, 340 {"169P409Mhz", phymodRefClk169P409Mhz}, 341 {"348P125Mhz", phymodRefClk348P125Mhz}, 342 {"162P948Mhz", phymodRefClk162P948Mhz}, 343 {"336P094Mhz", phymodRefClk336P094Mhz}, 344 {"168P12Mhz", phymodRefClk168P12Mhz}, 345 {"346P74Mhz", phymodRefClk346P74Mhz}, 346 {"167P41Mhz", phymodRefClk167P41Mhz}, 347 {"345P28Mhz", phymodRefClk345P28Mhz}, 348 {"162P26Mhz", phymodRefClk162P26Mhz}, 349 {"334P66Mhz", phymodRefClk334P66Mhz}, 350 {NULL, 0} 351 }; 352 353 enum_mapping_t phymod_triple_core_t_mapping[] = { 354 {"444", phymodTripleCore444}, 355 {"343", phymodTripleCore343}, 356 {"442", phymodTripleCore442}, 357 {"244", phymodTripleCore244}, 358 {NULL, 0} 359 }; 360 361 enum_mapping_t phymod_otn_type_t_mapping[] = { 362 {"OTU1", phymodOTNOTU1}, 363 {"OTU1e", phymodOTNOTU1e}, 364 {"OTU2", phymodOTNOTU2}, 365 {"OTU2e", phymodOTNOTU2e}, 366 {"OTU2f", phymodOTNOTU2f}, 367 {"OTU3", phymodOTNOTU3}, 368 {"OTU3e2", phymodOTNOTU3e2}, 369 {"OTU4", phymodOTNOTU4}, 370 {"OTU4p10", phymodOTNOTU4p10}, 371 {NULL, 0} 372 }; 373 374 enum_mapping_t phymod_an_mode_type_t_mapping[] = { 375 {"NONE", phymod_AN_MODE_NONE}, 376 {"CL73", phymod_AN_MODE_CL73}, 377 {"CL37", phymod_AN_MODE_CL37}, 378 {"CL73BAM", phymod_AN_MODE_CL73BAM}, 379 {"CL37BAM", phymod_AN_MODE_CL37BAM}, 380 {"HPAM", phymod_AN_MODE_HPAM}, 381 {"SGMII", phymod_AN_MODE_SGMII}, 382 {"CL37BAM_10P9375G_VCO", phymod_AN_MODE_CL37BAM_10P9375G_VCO}, 383 {"CL37_SGMII", phymod_AN_MODE_CL37_SGMII}, 384 {"CL73_MSA", phymod_AN_MODE_CL73_MSA}, 385 {"MSA", phymod_AN_MODE_MSA}, 386 {NULL, 0} 387 }; 388 389 enum_mapping_t phymod_cl37_sgmii_speed_t_mapping[] = { 390 {"10M", phymod_CL37_SGMII_10M}, 391 {"100M", phymod_CL37_SGMII_100M}, 392 {"1000M", phymod_CL37_SGMII_1000M}, 393 {"2500M", phymod_CL37_SGMII_2500M}, 394 {NULL, 0} 395 }; 396 397 enum_mapping_t phymod_firmware_load_force_t_mapping[] = { 398 {"Skip", phymodFirmwareLoadSkip}, 399 {"Force", phymodFirmwareLoadForce}, 400 {"Auto", phymodFirmwareLoadAuto}, 401 {NULL, 0} 402 }; 403 404 enum_mapping_t phymod_firmware_load_method_t_mapping[] = { 405 {"None", phymodFirmwareLoadMethodNone}, 406 {"Internal", phymodFirmwareLoadMethodInternal}, 407 {"External", phymodFirmwareLoadMethodExternal}, 408 {"ProgEEPROM", phymodFirmwareLoadMethodProgEEPROM}, 409 {NULL, 0} 410 }; 411 412 enum_mapping_t phymod_datapath_t_mapping[] = { 413 {"Normal", phymodDatapathNormal}, 414 {"Ull", phymodDatapathUll}, 415 {NULL, 0} 416 }; 417 418 enum_mapping_t phymod_tx_input_voltage_t_mapping[] = { 419 {"Default", phymodTxInputVoltageDefault}, 420 {"1p00", phymodTxInputVoltage1p00}, 421 {"1p25", phymodTxInputVoltage1p25}, 422 {NULL, 0} 423 }; 424 425 enum_mapping_t phymod_operation_mode_t_mapping[] = { 426 {"Retimer", phymodOperationModeRetimer}, 427 {"Repeater", phymodOperationModeRepeater}, 428 {"Passthru", phymodOperationModePassthru}, 429 {NULL, 0} 430 }; 431 432 enum_mapping_t phymod_autoneg_link_qualifier_t_mapping[] = { 433 {"RegisterWrite", phymodAutonegLinkQualifierRegisterWrite}, 434 {"KRBlockLock", phymodAutonegLinkQualifierKRBlockLock}, 435 {"KR4BlockLock", phymodAutonegLinkQualifierKR4BlockLock}, 436 {"KR4PMDLock", phymodAutonegLinkQualifierKR4PMDLock}, 437 {"ExternalPCS", phymodAutonegLinkQualifierExternalPCS}, 438 {"Default", phymodAutonegLinkQualifierDefault}, 439 {NULL, 0} 440 }; 441 442 enum_mapping_t phymod_loopback_mode_t_mapping[] = { 443 {"Global", phymodLoopbackGlobal}, 444 {"GlobalPMD", phymodLoopbackGlobalPMD}, 445 {"GlobalPCS", phymodLoopbackGlobalPCS}, 446 {"RemotePMD", phymodLoopbackRemotePMD}, 447 {"RemotePCS", phymodLoopbackRemotePCS}, 448 {"SysGlobal", phymodLoopbackSysGlobal}, 449 {"SysGlobalPMD", phymodLoopbackSysGlobalPMD}, 450 {"SysGlobalPCS", phymodLoopbackSysGlobalPCS}, 451 {"SysRemotePMD", phymodLoopbackSysRemotePMD}, 452 {"SysRemotePCS", phymodLoopbackSysRemotePCS}, 453 {NULL, 0} 454 }; 455 456 enum_mapping_t phymod_pcs_userspeed_mode_t_mapping[] = { 457 {"ST", phymodPcsUserSpeedModeST}, 458 {"HTO", phymodPcsUserSpeedModeHTO}, 459 {NULL, 0} 460 }; 461 462 enum_mapping_t phymod_pcs_userspeed_param_t_mapping[] = { 463 {"Entry", phymodPcsUserSpeedParamEntry}, 464 {"HCD", phymodPcsUserSpeedParamHCD}, 465 {"Clear", phymodPcsUserSpeedParamClear}, 466 {"PllDiv", phymodPcsUserSpeedParamPllDiv}, 467 {"PmaOS", phymodPcsUserSpeedParamPmaOS}, 468 {"Scramble", phymodPcsUserSpeedParamScramble}, 469 {"Encode", phymodPcsUserSpeedParamEncode}, 470 {"Cl48CheckEnd", phymodPcsUserSpeedParamCl48CheckEnd}, 471 {"BlkSync", phymodPcsUserSpeedParamBlkSync}, 472 {"Reorder", phymodPcsUserSpeedParamReorder}, 473 {"Cl36Enable", phymodPcsUserSpeedParamCl36Enable}, 474 {"Descr1", phymodPcsUserSpeedParamDescr1}, 475 {"Decode1", phymodPcsUserSpeedParamDecode1}, 476 {"Deskew", phymodPcsUserSpeedParamDeskew}, 477 {"Descr2", phymodPcsUserSpeedParamDescr2}, 478 {"Descr2ByteDel", phymodPcsUserSpeedParamDescr2ByteDel}, 479 {"Brcm64B66", phymodPcsUserSpeedParamBrcm64B66}, 480 {"Sgmii", phymodPcsUserSpeedParamSgmii}, 481 {"Clkcnt0", phymodPcsUserSpeedParamClkcnt0}, 482 {"Clkcnt1", phymodPcsUserSpeedParamClkcnt1}, 483 {"Lpcnt0", phymodPcsUserSpeedParamLpcnt0}, 484 {"Lpcnt1", phymodPcsUserSpeedParamLpcnt1}, 485 {"MacCGC", phymodPcsUserSpeedParamMacCGC}, 486 {"Repcnt", phymodPcsUserSpeedParamRepcnt}, 487 {"CrdtEn", phymodPcsUserSpeedParamCrdtEn}, 488 {"PcsClkcnt", phymodPcsUserSpeedParamPcsClkcnt}, 489 {"PcsCGC", phymodPcsUserSpeedParamPcsCGC}, 490 {"Cl72En", phymodPcsUserSpeedParamCl72En}, 491 {"NumOfLanes", phymodPcsUserSpeedParamNumOfLanes}, 492 {NULL, 0} 493 }; 494 495 enum_mapping_t phymod_gpio_mode_t_mapping[] = { 496 {"Disabled", phymodGpioModeDisabled}, 497 {"Output", phymodGpioModeOutput}, 498 {"Input", phymodGpioModeInput}, 499 {NULL, 0} 500 }; 501 502 enum_mapping_t phymod_osr_mode_t_mapping[] = { 503 {"1", phymodOversampleMode1}, 504 {"2", phymodOversampleMode2}, 505 {"3", phymodOversampleMode3}, 506 {"3P3", phymodOversampleMode3P3}, 507 {"4", phymodOversampleMode4}, 508 {"5", phymodOversampleMode5}, 509 {"7P5", phymodOversampleMode7P5}, 510 {"8", phymodOversampleMode8}, 511 {"8P25", phymodOversampleMode8P25}, 512 {"10", phymodOversampleMode10}, 513 {"16P5", phymodOversampleMode16P5}, 514 {"20P625", phymodOversampleMode20P625}, 515 {NULL, 0} 516 }; 517 518 enum_mapping_t phymod_timesync_timer_mode_t_mapping[] = { 519 {"None", phymodTimesyncTimerModeNone}, 520 {"Default", phymodTimesyncTimerModeDefault}, 521 {"32Bit", phymodTimesyncTimerMode32Bit}, 522 {"48Bit", phymodTimesyncTimerMode48Bit}, 523 {"64Bit", phymodTimesyncTimerMode64Bit}, 524 {"80Bit", phymodTimesyncTimerMode80Bit}, 525 {NULL, 0} 526 }; 527 528 enum_mapping_t phymod_timesync_global_mode_t_mapping[] = { 529 {"Free", phymodTimesyncGLobalModeFree}, 530 {"SyncIn", phymodTimesyncGLobalModeSyncIn}, 531 {"Cpu", phymodTimesyncGLobalModeCpu}, 532 {NULL, 0} 533 }; 534 535 enum_mapping_t phymod_timesync_framesync_mode_t_mapping[] = { 536 {"None", phymodTimesyncFramsyncModeNone}, 537 {"SyncIn0", phymodTimesyncFramsyncModeSyncIn0}, 538 {"SyncIn1", phymodTimesyncFramsyncModeSyncIn1}, 539 {"SyncOut", phymodTimesyncFramsyncModeSyncOut}, 540 {"Cpu", phymodTimesyncFramsyncModeCpu}, 541 {NULL, 0} 542 }; 543 544 enum_mapping_t phymod_timesync_syncout_mode_t_mapping[] = { 545 {"Disable", phymodTimesyncSyncoutModeDisable}, 546 {"OneTime", phymodTimesyncSyncoutModeOneTime}, 547 {"PulseTrain", phymodTimesyncSyncoutModePulseTrain}, 548 {"PulseTrainWithSync", phymodTimesyncSyncoutModePulseTrainWithSync}, 549 {NULL, 0} 550 }; 551 552 enum_mapping_t phymod_timesync_event_msg_action_t_mapping[] = { 553 {"None", phymodTimesyncEventMsgActionNone}, 554 {"EgrModeUpdateCorrectionField", phymodTimesyncEventMsgActionEgrModeUpdateCorrectionField}, 555 {"EgrModeReplaceCorrectionFieldOrigin", phymodTimesyncEventMsgActionEgrModeReplaceCorrectionFieldOrigin}, 556 {"EgrModeCaptureTimestamp", phymodTimesyncEventMsgActionEgrModeCaptureTimestamp}, 557 {"IngModeUpdateCorrectionField", phymodTimesyncEventMsgActionIngModeUpdateCorrectionField}, 558 {"IngModeInsertTimestamp", phymodTimesyncEventMsgActionIngModeInsertTimestamp}, 559 {"IngModeInsertDelaytime", phymodTimesyncEventMsgActionIngModeInsertDelaytime}, 560 {NULL, 0} 561 }; 562 563 enum_mapping_t phymod_timesync_compensation_mode_t_mapping[] = { 564 {"None", phymodTimesyncCompensationModeNone}, 565 {"EarliestLane", phymodTimesyncCompensationModeEarliestLane}, 566 {"Latestlane", phymodTimesyncCompensationModeLatestlane}, 567 {NULL, 0} 568 }; 569 570 enum_mapping_t phymod_edc_config_method_t_mapping[] = { 571 {"None", phymodEdcConfigMethodNone}, 572 {"Hardware", phymodEdcConfigMethodHardware}, 573 {"Software", phymodEdcConfigMethodSoftware}, 574 {NULL, 0} 575 }; 576 577 enum_mapping_t phymod_core_mode_t_mapping[] = { 578 {"Default", phymodCoreModeDefault}, 579 {"Single", phymodCoreModeSingle}, 580 {"Dual", phymodCoreModeDual}, 581 {"IndepLane", phymodCoreModeIndepLane}, 582 {"Split012", phymodCoreModeSplit012}, 583 {"Split023", phymodCoreModeSplit023}, 584 {"Triple244", phymodCoreModeTriple244}, 585 {"Triple343", phymodCoreModeTriple343}, 586 {"Triple442", phymodCoreModeTriple442}, 587 {NULL, 0} 588 }; 589 590 enum_mapping_t phymod_failover_mode_t_mapping[] = { 591 {"None", phymodFailovermodeNone}, 592 {"Enable", phymodFailovermodeEnable}, 593 {NULL, 0} 594 }; 595 596 enum_mapping_t phymod_eye_margin_mode_t_mapping[] = { 597 {"HZ_L", phymod_eye_marign_HZ_L}, 598 {"HZ_R", phymod_eye_marign_HZ_R}, 599 {"VT_U", phymod_eye_marign_VT_U}, 600 {"VT_D", phymod_eye_marign_VT_D}, 601 {NULL, 0} 602 }; 603 604 enum_mapping_t phymod_tsce_pll_multiplier_t_mapping[] = { 605 {"DIV46", phymod_TSCE_PLL_DIV46}, 606 {"DIV72", phymod_TSCE_PLL_DIV72}, 607 {"DIV40", phymod_TSCE_PLL_DIV40}, 608 {"DIV42", phymod_TSCE_PLL_DIV42}, 609 {"DIV48", phymod_TSCE_PLL_DIV48}, 610 {"DIV50", phymod_TSCE_PLL_DIV50}, 611 {"DIV52", phymod_TSCE_PLL_DIV52}, 612 {"DIV54", phymod_TSCE_PLL_DIV54}, 613 {"DIV60", phymod_TSCE_PLL_DIV60}, 614 {"DIV64", phymod_TSCE_PLL_DIV64}, 615 {"DIV66", phymod_TSCE_PLL_DIV66}, 616 {"DIV68", phymod_TSCE_PLL_DIV68}, 617 {"DIV70", phymod_TSCE_PLL_DIV70}, 618 {"DIV80", phymod_TSCE_PLL_DIV80}, 619 {"DIV92", phymod_TSCE_PLL_DIV92}, 620 {"DIV100", phymod_TSCE_PLL_DIV100}, 621 {"DIV82P5", phymod_TSCE_PLL_DIV82P5}, 622 {"DIV87P5", phymod_TSCE_PLL_DIV87P5}, 623 {NULL, 0} 624 }; 625 626 enum_mapping_t phymod_tscf_pll_multiplier_t_mapping[] = { 627 {"DIV64", phymod_TSCF_PLL_DIV64}, 628 {"DIV66", phymod_TSCF_PLL_DIV66}, 629 {"DIV80", phymod_TSCF_PLL_DIV80}, 630 {"DIV128", phymod_TSCF_PLL_DIV128}, 631 {"DIV132", phymod_TSCF_PLL_DIV132}, 632 {"DIV140", phymod_TSCF_PLL_DIV140}, 633 {"DIV160", phymod_TSCF_PLL_DIV160}, 634 {"DIV165", phymod_TSCF_PLL_DIV165}, 635 {"DIV168", phymod_TSCF_PLL_DIV168}, 636 {"DIV170", phymod_TSCF_PLL_DIV170}, 637 {"DIV175", phymod_TSCF_PLL_DIV175}, 638 {"DIV180", phymod_TSCF_PLL_DIV180}, 639 {"DIV184", phymod_TSCF_PLL_DIV184}, 640 {"DIV200", phymod_TSCF_PLL_DIV200}, 641 {"DIV224", phymod_TSCF_PLL_DIV224}, 642 {"DIV264", phymod_TSCF_PLL_DIV264}, 643 {"DIV96", phymod_TSCF_PLL_DIV96}, 644 {"DIV120", phymod_TSCF_PLL_DIV120}, 645 {"DIV144", phymod_TSCF_PLL_DIV144}, 646 {"DIV198", phymod_TSCF_PLL_DIV198}, 647 {NULL, 0} 648 }; 649 650 enum_mapping_t phymod_tscbh_pll_multiplier_t_mapping[] = { 651 {"DIVNONE", phymod_TSCBH_PLL_DIVNONE}, 652 {"DIV66", phymod_TSCBH_PLL_DIV66}, 653 {"DIV67", phymod_TSCBH_PLL_DIV67}, 654 {"DIV70", phymod_TSCBH_PLL_DIV70}, 655 {"DIV72", phymod_TSCBH_PLL_DIV72}, 656 {"DIV73P6", phymod_TSCBH_PLL_DIV73P6}, 657 {"DIV79P2", phymod_TSCBH_PLL_DIV79P2}, 658 {"DIV80", phymod_TSCBH_PLL_DIV80}, 659 {"DIV82P5", phymod_TSCBH_PLL_DIV82P5}, 660 {"DIV84", phymod_TSCBH_PLL_DIV84}, 661 {"DIV85", phymod_TSCBH_PLL_DIV85}, 662 {"DIV87P5", phymod_TSCBH_PLL_DIV87P5}, 663 {"DIV89P6", phymod_TSCBH_PLL_DIV89P6}, 664 {"DIV90", phymod_TSCBH_PLL_DIV90}, 665 {"DIV96", phymod_TSCBH_PLL_DIV96}, 666 {"DIV100", phymod_TSCBH_PLL_DIV100}, 667 {"DIV120", phymod_TSCBH_PLL_DIV120}, 668 {"DIV127P4", phymod_TSCBH_PLL_DIV127P4}, 669 {"DIV128", phymod_TSCBH_PLL_DIV128}, 670 {"DIV132", phymod_TSCBH_PLL_DIV132}, 671 {"DIV140", phymod_TSCBH_PLL_DIV140}, 672 {"DIV144", phymod_TSCBH_PLL_DIV144}, 673 {"DIV147P2", phymod_TSCBH_PLL_DIV147P2}, 674 {"DIV158P4", phymod_TSCBH_PLL_DIV158P4}, 675 {"DIV160", phymod_TSCBH_PLL_DIV160}, 676 {"DIV165", phymod_TSCBH_PLL_DIV165}, 677 {"DIV168", phymod_TSCBH_PLL_DIV168}, 678 {"DIV170", phymod_TSCBH_PLL_DIV170}, 679 {"DIV175", phymod_TSCBH_PLL_DIV175}, 680 {"DIV180", phymod_TSCBH_PLL_DIV180}, 681 {"DIV184", phymod_TSCBH_PLL_DIV184}, 682 {"DIV192", phymod_TSCBH_PLL_DIV192}, 683 {"DIV198", phymod_TSCBH_PLL_DIV198}, 684 {"DIV200", phymod_TSCBH_PLL_DIV200}, 685 {"DIV224", phymod_TSCBH_PLL_DIV224}, 686 {"DIV240", phymod_TSCBH_PLL_DIV240}, 687 {"DIV264", phymod_TSCBH_PLL_DIV264}, 688 {"DIV280", phymod_TSCBH_PLL_DIV280}, 689 {NULL, 0} 690 }; 691 692 enum_mapping_t phymod_fec_type_t_mapping[] = { 693 {"None", phymod_fec_None}, 694 {"CL74", phymod_fec_CL74}, 695 {"CL91", phymod_fec_CL91}, 696 {"RS544", phymod_fec_RS544}, 697 {"RS272", phymod_fec_RS272}, 698 {"RS544_2XN", phymod_fec_RS544_2XN}, 699 {"RS272_2XN", phymod_fec_RS272_2XN}, 700 {NULL, 0} 701 }; 702 703 enum_mapping_t phymod_dfe_mode_t_mapping[] = { 704 {"off", phymod_dfe_off}, 705 {"on", phymod_dfe_on}, 706 {"lp_on", phymod_dfe_lp_on}, 707 {NULL, 0} 708 }; 709 710 enum_mapping_t phymod_pause_type_t_mapping[] = { 711 {"none", phymod_pause_none}, 712 {"symm", phymod_pause_symm}, 713 {"asym", phymod_pause_asym}, 714 {"asym_symm", phymod_pause_asym_symm}, 715 {NULL, 0} 716 }; 717 718 enum_mapping_t phymod_channel_type_t_mapping[] = { 719 {"long", phymod_channel_long}, 720 {"short", phymod_channel_short}, 721 {NULL, 0} 722 }; 723 724 enum_mapping_t phymod_interrupt_type_t_mapping[] = { 725 {"None", phymodIntrNone}, 726 {"EccRx1588400g", phymodIntrEccRx1588400g}, 727 {"EccRx1588Mpp1", phymodIntrEccRx1588Mpp1}, 728 {"EccRx1588Mpp0", phymodIntrEccRx1588Mpp0}, 729 {"EccTx1588400g", phymodIntrEccTx1588400g}, 730 {"EccTx1588Mpp1", phymodIntrEccTx1588Mpp1}, 731 {"EccTx1588Mpp0", phymodIntrEccTx1588Mpp0}, 732 {"EccUMTable", phymodIntrEccUMTable}, 733 {"EccAMTable", phymodIntrEccAMTable}, 734 {"EccSpeedTable", phymodIntrEccSpeedTable}, 735 {"EccDeskew", phymodIntrEccDeskew}, 736 {"EccRsFECRs400gMpp1", phymodIntrEccRsFECRs400gMpp1}, 737 {"EccRsFECRs400gMpp0", phymodIntrEccRsFECRs400gMpp0}, 738 {"EccRsFECRbufMpp1", phymodIntrEccRsFECRbufMpp1}, 739 {"EccRsFECRbufMpp0", phymodIntrEccRsFECRbufMpp0}, 740 {"EccBaseRFEC", phymodIntrEccBaseRFEC}, 741 {NULL, 0} 742 }; 743 744 enum_mapping_t phymod_master_mode_t_mapping[] = { 745 {"None", phymodMSNone}, 746 {"Slave", phymodMSSlave}, 747 {"Master", phymodMSMaster}, 748 {"Auto", phymodMSAuto}, 749 {NULL, 0} 750 }; 751 752 enum_mapping_t phymod_override_type_t_mapping[] = { 753 {"RxLock ", phymodPMDRxLock }, 754 {"SignalDetect", phymodPMDSignalDetect}, 755 {"RxClkValid", phymodPMDRxClkValid}, 756 {"LaneMode", phymodPMDLaneMode}, 757 {"OsrMode", phymodPMDOsrMode}, 758 {"TxDisable", phymodPMDTxDisable}, 759 {"LaneReset", phymodPMDLaneReset}, 760 {"TxClkValid", phymodPMDTxClkValid}, 761 {NULL, 0} 762 }; 763 764 enum_mapping_t phymod_duplex_mode_t_mapping[] = { 765 {"Half", phymodDuplexHalf}, 766 {"Full", phymodDuplexFull}, 767 {NULL, 0} 768 }; 769 770 #endif /*PHYMOD_DIAG*/