temod16_enum_defines.c (18730B)
1 /*---------------------------------------------------------------------- 2 * : temod16_enum_defines.h, 3 * : n * 4 * Broadcom Corporation 5 * Proprietary and Confidential information 6 * All rights reserved 7 * This source file is the property of Broadcom Corporation, and 8 * may not be copied or distributed in any isomorphic form without the 9 * prior written consent of Broadcom Corporation. 10 *--------------------------------------------------------------------- 11 *--------------------------------------------------------------------- 12 ############### THIS FILE IS AUTOMATICALLY GENERATED. ############### 13 ############### DO !! NOT !! MANUALLY EDIT THIS FILE. ############### 14 *--------------------------------------------------------------------- 15 * Description: This file contains enums, elems, and doxygen comments 16 * needed for SerDes Configuration programs. 17 *--------------------------------------------------------------------- 18 * CVS INFORMATION: 19 * Please see inc/enum_desc.txt for CVS information. 20 *---------------------------------------------------------------------- 21 */ 22 /* 23 * 24 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 25 * 26 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 27 */ 28 /* This file is automatically generated. Do not modify it. Modify the 29 * inc/enum_desc.txt to change enums, elems, or comments. For issues about 30 * the process that creates this file contact the temod16 development team. 31 */ 32 33 #include "temod16_enum_defines.h" 34 35 char* e2s_temod16_core_select [CNT_temod16_core_select] = { 36 "TEMOD16_CORE_0_0_1" , 37 "TEMOD16_CORE_0_1_0" , 38 "TEMOD16_CORE_1_0_0" , 39 "TEMOD16_CORE_0_1_1" , 40 "TEMOD16_CORE_1_0_1" , 41 "TEMOD16_CORE_1_1_1" , 42 "TEMOD16_CORE_ILLEGAL" 43 }; /* e2s_temod16_core_select */ 44 45 int e2n_temod16_core_select [CNT_temod16_core_select] = { 46 1 , 47 2 , 48 4 , 49 3 , 50 5 , 51 7 , 52 0 53 }; /* e2n_temod16_core_select */ 54 55 char* e2s_temod16_lane_select [CNT_temod16_lane_select] = { 56 "TEMOD16_LANE_0_0_0_1" , 57 "TEMOD16_LANE_0_0_1_0" , 58 "TEMOD16_LANE_0_0_1_1" , 59 "TEMOD16_LANE_0_1_0_0" , 60 "TEMOD16_LANE_0_1_0_1" , 61 "TEMOD16_LANE_0_1_1_0" , 62 "TEMOD16_LANE_0_1_1_1" , 63 "TEMOD16_LANE_1_0_0_0" , 64 "TEMOD16_LANE_1_0_0_1" , 65 "TEMOD16_LANE_1_0_1_0" , 66 "TEMOD16_LANE_1_0_1_1" , 67 "TEMOD16_LANE_1_1_0_0" , 68 "TEMOD16_LANE_1_1_0_1" , 69 "TEMOD16_LANE_1_1_1_0" , 70 "TEMOD16_LANE_1_1_1_1" , 71 "TEMOD16_LANE_BCST" , 72 "TEMOD16_LANE_ILLEGAL" 73 }; /* e2s_temod16_lane_select */ 74 75 int e2n_temod16_lane_select [CNT_temod16_lane_select] = { 76 1 , 77 2 , 78 3 , 79 4 , 80 5 , 81 6 , 82 7 , 83 8 , 84 9 , 85 10 , 86 11 , 87 12 , 88 13 , 89 14 , 90 15 , 91 15 , 92 0 93 }; /* e2n_temod16_lane_select */ 94 95 char* e2s_temod16_spd_intfc_type [CNT_temod16_spd_intfc_type] = { 96 "TEMOD16_SPD_ZERO" , 97 "TEMOD16_SPD_10_X1_SGMII" , 98 "TEMOD16_SPD_100_X1_SGMII" , 99 "TEMOD16_SPD_1000_X1_SGMII" , 100 "TEMOD16_SPD_2500_X1" , 101 "TEMOD16_SPD_10_SGMII" , 102 "TEMOD16_SPD_100_SGMII" , 103 "TEMOD16_SPD_1000_SGMII" , 104 "TEMOD16_SPD_2500" , 105 "TEMOD16_SPD_5000" , 106 "TEMOD16_SPD_1000_XFI" , 107 "TEMOD16_SPD_5000_XFI" , 108 "TEMOD16_SPD_10000_XFI" , 109 "TEMOD16_SPD_10600_XFI_HG" , 110 "TEMOD16_SPD_10000_HI" , 111 "TEMOD16_SPD_10000" , 112 "TEMOD16_SPD_12000_HI" , 113 "TEMOD16_SPD_13000" , 114 "TEMOD16_SPD_15000" , 115 "TEMOD16_SPD_16000" , 116 "TEMOD16_SPD_20000" , 117 "TEMOD16_SPD_20000_SCR" , 118 "TEMOD16_SPD_21000" , 119 "TEMOD16_SPD_25455" , 120 "TEMOD16_SPD_31500" , 121 "TEMOD16_SPD_31500_MLD" , 122 "TEMOD16_SPD_40G_X4" , 123 "TEMOD16_SPD_42G_X4" , 124 "TEMOD16_SPD_40G_XLAUI" , 125 "TEMOD16_SPD_42G_XLAUI" , 126 "TEMOD16_SPD_10000_X2" , 127 "TEMOD16_SPD_10000_HI_DXGXS" , 128 "TEMOD16_SPD_10000_DXGXS" , 129 "TEMOD16_SPD_10000_HI_DXGXS_SCR" , 130 "TEMOD16_SPD_10000_DXGXS_SCR" , 131 "TEMOD16_SPD_10500_HI" , 132 "TEMOD16_SPD_10500_HI_DXGXS" , 133 "TEMOD16_SPD_12773_HI_DXGXS" , 134 "TEMOD16_SPD_12773_DXGXS" , 135 "TEMOD16_SPD_15750_HI_DXGXS" , 136 "TEMOD16_SPD_20G_MLD_DXGXS" , 137 "TEMOD16_SPD_21G_HI_MLD_DXGXS" , 138 "TEMOD16_SPD_20G_DXGXS" , 139 "TEMOD16_SPD_21G_HI_DXGXS" , 140 "TEMOD16_SPD_100G_CR10" , 141 "TEMOD16_SPD_107G_HG_CR10" , 142 "TEMOD16_SPD_120G_CR12" , 143 "TEMOD16_SPD_127G_HG_CR12" , 144 "TEMOD16_SPD_4000" , 145 "TEMOD16_SPD_10000_X4_10P3" , 146 "TEMOD16_SPD_10000_CX4_10P3" , 147 "TEMOD16_SPD_10000_KX4_10P3" , 148 "TEMOD16_SPD_12P12_XFI" , 149 "TEMOD16_SPD_24P24_MLD_DXGXS" , 150 "TEMOD16_SPD_48P48_MLD" , 151 "TEMOD16_SPD_ILLEGAL" 152 }; /* e2s_temod16_spd_intfc_type */ 153 154 int e2n_temod16_spd_intfc_type [CNT_temod16_spd_intfc_type] = { 155 0 , 156 10 , 157 100 , 158 1000 , 159 2500 , 160 10 , 161 100 , 162 1000 , 163 2500 , 164 5000 , 165 5000 , 166 5000 , 167 10000 , 168 10560 , 169 10000 , 170 10000 , 171 12000 , 172 13000 , 173 15000 , 174 16000 , 175 20000 , 176 20000 , 177 21000 , 178 25000 , 179 31500 , 180 31500 , 181 40000 , 182 40000 , 183 40000 , 184 42000 , 185 10000 , 186 10000 , 187 10000 , 188 10000 , 189 10000 , 190 10500 , 191 10500 , 192 12773 , 193 12773 , 194 15750 , 195 20000 , 196 20000 , 197 20000 , 198 21000 , 199 100000 , 200 107000 , 201 120000 , 202 127000 , 203 4000 , 204 10000 , 205 10000 , 206 10000 , 207 12120 , 208 24240 , 209 48480 , 210 0 211 }; /* e2n_temod16_spd_intfc_type */ 212 213 char* e2s_temod16_regacc_type [CNT_temod16_regacc_type] = { 214 "TEMOD16_REGACC_CL22" , 215 "TEMOD16_REGACC_CL45" , 216 "TEMOD16_REGACC_TOTSC" , 217 "TEMOD16_REGACC_SBUS_FD" , 218 "TEMOD16_REGACC_SBUS_BD" , 219 "TEMOD16_REGACC_ILLEGAL" 220 }; /* e2s_temod16_regacc_type */ 221 222 char* e2s_temod16_port_type [CNT_temod16_port_type] = { 223 "TEMOD16_SINGLE_PORT" , 224 "TEMOD16_MULTI_PORT" , 225 "TEMOD16_DXGXS" , 226 "TEMOD16_TRI1_PORT" , 227 "TEMOD16_TRI2_PORT" , 228 "TEMOD16_PORT_MODE_ILLEGAL" 229 }; /* e2s_temod16_port_type */ 230 231 char* e2s_temod16_diag_type [CNT_temod16_diag_type] = { 232 "TEMOD16_DIAG_GENERAL" , 233 "TEMOD16_DIAG_TOPOLOGY" , 234 "TEMOD16_DIAG_LINK" , 235 "TEMOD16_DIAG_SPEED" , 236 "TEMOD16_DIAG_ANEG" , 237 "TEMOD16_DIAG_TFC" , 238 "TEMOD16_DIAG_AN_TIMERS" , 239 "TEMOD16_DIAG_STATE" , 240 "TEMOD16_DIAG_DEBUG" , 241 "TEMOD16_DIAG_IEEE" , 242 "TEMOD16_DIAG_EEE" , 243 "TEMOD16_DIAG_BER" , 244 "TEMOD16_DIAG_CFG" , 245 "TEMOD16_DIAG_CL72" , 246 "TEMOD16_SERDES_DIAG" , 247 "TEMOD16_DIAG_ALL" , 248 "TEMOD16_DIAG_ILLEGAL" 249 }; /* e2s_temod16_diag_type */ 250 251 char* e2s_temod16_pmd_diag_type [CNT_temod16_pmd_diag_type] = { 252 "TEMOD16_SERDES_DIAG_CORE_CONFIG" , 253 "TEMOD16_SERDES_DIAG_CORE_STATE" , 254 "TEMOD16_SERDES_DIAG_LANE_CONFIG" , 255 "TEMOD16_SERDES_DIAG_LANE_DEBUG_STATUS" , 256 "TEMOD16_SERDES_DIAG_LANE_STATE" , 257 "TEMOD16_SERDES_DIAG_LANE_STATE_HDR" , 258 "TEMOD16_SERDES_DIAG_LANE_STATE_LEGEND" , 259 "TEMOD16_SERDES_DIAG_CL72_STATUS" , 260 "TEMOD16_SERDES_DIAG_EYE_DENSITY" , 261 "TEMOD16_SERDES_DIAG_EYE_SCAN" , 262 "TEMOD16_SERDES_DIAG_MEAS_EYE_DENSITY_DATA" , 263 "TEMOD16_SERDES_DIAG_MEAS_EYE_SCAN_DONE" , 264 "TEMOD16_SERDES_DIAG_MEAS_LOWBER_EYE" , 265 "TEMOD16_SERDES_DIAG_READ_EYE_SCAN_STRIPE" , 266 "TEMOD16_SERDES_DIAG_EYE_DENSITY_DATA" , 267 "TEMOD16_SERDES_DIAG_LOWBER_EYE" , 268 "TEMOD16_SERDES_DIAG_EYE_SCAN_VERTICAL" , 269 "TEMOD16_SERDES_DIAG_EYE_SCAN_STRIPE" , 270 "TEMOD16_SERDES_DIAG_EYE_SCAN_HEADER" , 271 "TEMOD16_SERDES_DIAG_EYE_SCAN_FOOTER" , 272 "TEMOD16_SERDES_DIAG_BER_SCAN_TEST" , 273 "TEMOD16_SERDES_DIAG_READ_BER_SCAN_DATA" , 274 "TEMOD16_SERDES_DIAG_EYE_MARGIN_PROJ" , 275 "TEMOD16_SERDES_DIAG_DIG_LPBK" , 276 "TEMOD16_SERDES_DIAG_MEAS_EYE_SCAN_START" , 277 "TEMOD16_SERDES_DIAG_ILLEGAL" 278 }; /* e2s_temod16_pmd_diag_type */ 279 280 char* e2s_temod16_an_type [CNT_temod16_an_type] = { 281 "TEMOD16_CL73" , 282 "TEMOD16_CL37" , 283 "TEMOD16_CL73_BAM" , 284 "TEMOD16_CL37_BAM" , 285 "TEMOD16_CL37_SGMII" , 286 "TEMOD16_HPAM" , 287 "TEMOD16_AN_TYPE_ILLEGAL" 288 }; /* e2s_temod16_an_type */ 289 290 char* e2s_temod16_eye_direction [CNT_temod16_eye_direction] = { 291 "TEMOD16_EYE_VU" , 292 "TEMOD16_EYE_VD" , 293 "TEMOD16_EYE_HL" , 294 "TEMOD16_EYE_HR" , 295 "TEMOD16_EYE_ILLEGAL" 296 }; /* e2s_temod16_eye_direction */ 297 298 char* e2s_temod16_tech_ability [CNT_temod16_tech_ability] = { 299 "TEMOD16_ABILITY_1G_KX" , 300 "TEMOD16_ABILITY_10G_KX4" , 301 "TEMOD16_ABILITY_10G_KR" , 302 "TEMOD16_ABILITY_40G_KR4" , 303 "TEMOD16_ABILITY_40G_CR4" , 304 "TEMOD16_ABILITY_100G_CR10" , 305 "TEMOD16_ABILITY_20G_KR2" , 306 "TEMOD16_ABILITY_20G_CR2" , 307 "TEMOD16_ABILITY_ILLEGAL" 308 }; /* e2s_temod16_tech_ability */ 309 310 int e2n_temod16_tech_ability [CNT_temod16_tech_ability] = { 311 0x5 , 312 0x6 , 313 0x7 , 314 0x8 , 315 0x9 , 316 0xa , 317 0x100 , 318 0x101 , 319 0x102 320 }; /* e2n_temod16_tech_ability */ 321 322 char* e2s_temod16_cl37bam_ability [CNT_temod16_cl37bam_ability] = { 323 "TEMOD16_BAM37ABL_2P5G" , 324 "TEMOD16_BAM37ABL_5G_X4" , 325 "TEMOD16_BAM37ABL_6G_X4" , 326 "TEMOD16_BAM37ABL_10G_HIGIG" , 327 "TEMOD16_BAM37ABL_10G_CX4" , 328 "TEMOD16_BAM37ABL_12G_X4" , 329 "TEMOD16_BAM37ABL_12P5_X4" , 330 "TEMOD16_BAM37ABL_13G_X4" , 331 "TEMOD16_BAM37ABL_15G_X4" , 332 "TEMOD16_BAM37ABL_16G_X4" , 333 "TEMOD16_BAM37ABL_20G_X4_CX4" , 334 "TEMOD16_BAM37ABL_20G_X4" , 335 "TEMOD16_BAM37ABL_21G_X4" , 336 "TEMOD16_BAM37ABL_25P455G" , 337 "TEMOD16_BAM37ABL_31P5G" , 338 "TEMOD16_BAM37ABL_32P7G" , 339 "TEMOD16_BAM37ABL_40G" , 340 "TEMOD16_BAM37ABL_10G_X2_CX4" , 341 "TEMOD16_BAM37ABL_10G_DXGXS" , 342 "TEMOD16_BAM37ABL_10P5G_DXGXS" , 343 "TEMOD16_BAM37ABL_12P7_DXGXS" , 344 "TEMOD16_BAM37ABL_15P75G_R2" , 345 "TEMOD16_BAM37ABL_20G_X2_CX4" , 346 "TEMOD16_BAM37ABL_20G_X2" , 347 "TEMOD16_BAM37ABL_ILLEGAL" 348 }; /* e2s_temod16_cl37bam_ability */ 349 350 char* e2s_temod16_diag_an_type [CNT_temod16_diag_an_type] = { 351 "TEMOD16_DIAG_AN_DONE" , 352 "TEMOD16_DIAG_AN_HCD" , 353 "TEMOD16_DIAG_AN_TYPE_ILLEGAL" 354 }; /* e2s_temod16_diag_an_type */ 355 356 char* e2s_temod16_tier1_function_type [CNT_temod16_tier1_function_type] = { 357 "PCS_BYPASS_CTL" , 358 "INIT_PCS" , 359 "INIT_PMD_SW" , 360 "INIT_PMD" , 361 "PMD_RESET_SEQ" , 362 "PMD_X4_RESET" , 363 "WAIT_SC_DONE" , 364 "ENABLE_SET" , 365 "FECMODE_SET" , 366 "GET_PCS_LINK_STATUS" , 367 "OVERRIDE_SET" , 368 "CREDIT_OVERRIDE_SET" , 369 "ENCODE_SET" , 370 "DECODE_SET" , 371 "CREDIT_CONTROL" , 372 "TX_LANE_CONTROL" , 373 "RX_LANE_CONTROL" , 374 "TX_LANE_DISABLE" , 375 "POWER_CONTROL" , 376 "AUTONEG_SET" , 377 "AUTONEG_GET" , 378 "AUTONEG_CONTROL" , 379 "TSC12_CONTROL" , 380 "CHECK_SC_STATS" , 381 "REG_READ" , 382 "REG_WRITE" , 383 "PRBS_CHECK" , 384 "CJPAT_CRPAT_MODE_SET" , 385 "CJPAT_CRPAT_CHECK" , 386 "TEMOD16_DIAG" , 387 "PCS_LANE_SWAP" , 388 "PMD_LANE_SWAP" , 389 "PMD_LANE_SWAP_TX" , 390 "PARALLEL_DETECT_CONTROL" , 391 "REVID_READ" , 392 "SOFT_RESET" , 393 "SET_SPD_INTF" , 394 "SET_PORT_MODE" , 395 "EEE_PASSTHRU_SET" , 396 "EEE_PASSTHRU_GET" , 397 "FEC_CONTROL" , 398 "HIGIG2_CONTROL" , 399 "LF_RF_CONTROL" , 400 "RX_FAST_LOCK_CONTROL" , 401 "PMD_CORE_RESET" , 402 "PMD_LANE_RESET" , 403 "AFE_SPEED_UP_DSC_VGA" , 404 "CLAUSE_72_CONTROL" , 405 "PLL_SEQUENCER_CONTROL" , 406 "PLL_LOCK_WAIT" , 407 "PROG_DATA" , 408 "RX_SEQ_CONTROL" , 409 "SET_POLARITY" , 410 "PRBS_CONTROL" , 411 "PRBS_MODE" , 412 "RX_PF_CONTROL" , 413 "RX_VGA_CONTROL" , 414 "CJPAT_CRPAT_CONTROL" , 415 "TX_LOOPBACK_CONTROL" , 416 "TX_PMD_LOOPBACK_CONTROL" , 417 "RX_LOOPBACK_CONTROL" , 418 "RX_P1_SLICER_CONTROL" , 419 "RX_M1_SLICER_CONTROL" , 420 "RX_D_SLICER_CONTROL" , 421 "WAIT_PMD_LOCK" , 422 "FIRMWARE_SET" , 423 "INIT_PMD_QSGMII" , 424 "INIT_PCS_ILKN" , 425 "PMD_RESET_BYPASS" , 426 "PMD_OVERRIDE_CONTROL" , 427 "TIER1_FUNCTION_ILLEGAL" 428 }; /* e2s_temod16_tier1_function_type */ 429 430 char* e2s_temod16_sc_mode_type [CNT_sc_mode_type] = { 431 "TEMOD16_SC_MODE_HT_WITH_BASIC_OVERRIDE" , 432 "TEMOD16_SC_MODE_HT_OVERRIDE" , 433 "TEMOD16_SC_MODE_ST" , 434 "TEMOD16_SC_MODE_ST_OVERRIDE" , 435 "TEMOD16_SC_MODE_AN_CL37" , 436 "TEMOD16_SC_MODE_AN_CL73" , 437 "TEMOD16_SC_MODE_BYPASS" , 438 "TEMOD16_SC_MODE_ILLEGAL" 439 }; /* e2s_temod16_sc_mode_type */ 440 441 int e2n_temod16_sc_mode_type [CNT_sc_mode_type] = { 442 0 , 443 1 , 444 2 , 445 3 , 446 4 , 447 5 , 448 6 , 449 7 450 }; /* e2n_temod16_sc_mode_type */ 451 452 char* e2s_temod16_pll_mode_type [CNT_temod16_pll_mode_type] = { 453 "TEMOD16_PLL_MODE_DIV_ZERO" , 454 "TEMOD16_PLL_MODE_DIV_40" , 455 "TEMOD16_PLL_MODE_DIV_42" , 456 "TEMOD16_PLL_MODE_DIV_48" , 457 "TEMOD16_PLL_MODE_DIV_52" , 458 "TEMOD16_PLL_MODE_DIV_54" , 459 "TEMOD16_PLL_MODE_DIV_60" , 460 "TEMOD16_PLL_MODE_DIV_64" , 461 "TEMOD16_PLL_MODE_DIV_66" , 462 "TEMOD16_PLL_MODE_DIV_70" , 463 "TEMOD16_PLL_MODE_DIV_80" , 464 "TEMOD16_PLL_MODE_DIV_92" , 465 "TEMOD16_PLL_MODE_DIV_ILLEGAL" 466 }; /* e2s_temod16_pll_mode_type */ 467 468 int e2n_temod16_pll_mode_type [CNT_temod16_pll_mode_type] = { 469 0 , 470 40 , 471 42 , 472 48 , 473 52 , 474 54 , 475 60 , 476 64 , 477 66 , 478 70 , 479 80 , 480 92 , 481 0 482 }; /* e2n_temod16_pll_mode_type */ 483 484 char* e2s_temod16_os_mode_type [CNT_temod16_os_mode_type] = { 485 "TEMOD16_PMA_OS_MODE_1" , 486 "TEMOD16_PMA_OS_MODE_2" , 487 "TEMOD16_PMA_OS_MODE_3" , 488 "TEMOD16_PMA_OS_MODE_3_3" , 489 "TEMOD16_PMA_OS_MODE_4" , 490 "TEMOD16_PMA_OS_MODE_5" , 491 "TEMOD16_PMA_OS_MODE_7_25" , 492 "TEMOD16_PMA_OS_MODE_8" , 493 "TEMOD16_PMA_OS_MODE_8_25" , 494 "TEMOD16_PMA_OS_MODE_10" , 495 "TEMOD16_PMA_OS_MODE_ILLEGAL" 496 }; /* e2s_temod16_os_mode_type */ 497 498 int e2n_temod16_os_mode_type [CNT_temod16_os_mode_type] = { 499 1 , 500 2 , 501 3 , 502 33 , 503 4 , 504 5 , 505 725 , 506 8 , 507 825 , 508 9 , 509 0 510 }; /* e2n_temod16_os_mode_type */ 511 512 char* e2s_temod16_scr_mode [CNT_temod16_scr_mode] = { 513 "TEMOD16_SCR_MODE_BYPASS" , 514 "TEMOD16_SCR_MODE_66B" , 515 "TEMOD16_SCR_MODE_80B" , 516 "TEMOD16_SCR_MODE_64B" 517 }; /* e2s_temod16_scr_mode */ 518 519 int e2n_temod16_scr_mode [CNT_temod16_scr_mode] = { 520 0 , 521 1 , 522 2 , 523 3 524 }; /* e2n_temod16_scr_mode */ 525 526 char* e2s_temod16_encode_mode [CNT_temod16_encode_mode] = { 527 "TEMOD16_ENCODE_MODE_NONE" , 528 "TEMOD16_ENCODE_MODE_CL48" , 529 "TEMOD16_ENCODE_MODE_CL48_2_LANE" , 530 "TEMOD16_ENCODE_MODE_CL36" , 531 "TEMOD16_ENCODE_MODE_CL82" , 532 "TEMOD16_ENCODE_MODE_CL49" , 533 "TEMOD16_ENCODE_MODE_BRCM" , 534 "TEMOD16_ENCODE_MODE_ILLEGAL" 535 }; /* e2s_temod16_encode_mode */ 536 537 int e2n_temod16_encode_mode [CNT_temod16_encode_mode] = { 538 0 , 539 1 , 540 2 , 541 3 , 542 4 , 543 5 , 544 6 , 545 7 546 }; /* e2n_temod16_encode_mode */ 547 548 char* e2s_temod16_check_end_mode [CNT_temod16_check_end_mode] = { 549 "TEMOD16_CL48_CHECK_END_OFF" , 550 "TEMOD16_CL48_CHECK_END_ON" 551 }; /* e2s_temod16_check_end_mode */ 552 553 char* e2s_temod16_sigdet_filter [CNT_temod16_sigdet_filter] = { 554 "TEMOD16_SIGDET_FILTER_NONCX4" , 555 "TEMOD16_SIGDET_FILTER_CX4" 556 }; /* e2s_temod16_sigdet_filter */ 557 558 char* e2s_temod16_blocksync_mode [CNT_temod16_blocksync_mode] = { 559 "TEMOD16_BLOCKSYNC_MODE_NONE" , 560 "TEMOD16_BLOCKSYNC_MODE_CL49" , 561 "TEMOD16_BLOCKSYNC_MODE_CL82" , 562 "TEMOD16_BLOCKSYNC_MODE_8B10B" , 563 "TEMOD16_BLOCKSYNC_MODE_FEC" , 564 "TEMOD16_BLOCKSYNC_MODE_BRCM" , 565 "TEMOD16_BLOCKSYNC_MODE_ILLEGAL" 566 }; /* e2s_temod16_blocksync_mode */ 567 568 char* e2s_temod16_reorder_mode [CNT_temod16_reorder_mode] = { 569 "TEMOD16_R_REORDER_MODE_NONE" , 570 "TEMOD16_R_REORDER_MODE_CL48" , 571 "TEMOD16_R_REORDER_MODE_CL36" , 572 "TEMOD16_R_REORDER_MODE_CL36_CL48" 573 }; /* e2s_temod16_reorder_mode */ 574 575 char* e2s_temod16_cl36_mode [CNT_temod16_cl36_mode] = { 576 "TEMOD16_CL36_DISABLE" , 577 "TEMOD16_CL36_ENABLE" 578 }; /* e2s_temod16_cl36_mode */ 579 580 char* e2s_temod16_descrambler_mode [CNT_temod16_descrambler_mode] = { 581 "TEMOD16_R_DESCR1_MODE_BYPASS" , 582 "TEMOD16_R_DESCR1_MODE_66B" , 583 "TEMOD16_R_DESCR1_MODE_10B" , 584 "TEMOD16_R_DESCR1_MODE_ILLEGAL" 585 }; /* e2s_temod16_descrambler_mode */ 586 587 char* e2s_temod16_decoder_mode [CNT_temod16_decoder_mode] = { 588 "TEMOD16_DECODER_MODE_NONE" , 589 "TEMOD16_DECODER_MODE_CL49" , 590 "TEMOD16_DECODER_MODE_BRCM" , 591 "TEMOD16_DECODER_MODE_ALU" , 592 "TEMOD16_DECODER_MODE_CL48" , 593 "TEMOD16_DECODER_MODE_CL36" , 594 "TEMOD16_DECODER_MODE_CL82" , 595 "TEMOD16_DECODER_MODE_ILLEGAL" 596 }; /* e2s_temod16_decoder_mode */ 597 598 char* e2s_temod16_deskew_mode [CNT_temod16_deskew_mode] = { 599 "TEMOD16_R_DESKEW_MODE_BYPASS" , 600 "TEMOD16_R_DESKEW_MODE_8B_10B" , 601 "TEMOD16_R_DESKEW_MODE_BRCM_66B" , 602 "TEMOD16_R_DESKEW_MODE_CL82_66B" , 603 "TEMOD16_R_DESKEW_MODE_CL36_10B" , 604 "TEMOD16_R_DESKEW_MODE_ILLEGAL" 605 }; /* e2s_temod16_deskew_mode */ 606 607 char* e2s_temod16_descrambler2_mode [CNT_temod16_descrambler2_mode] = { 608 "TEMOD16_DESC2_MODE_NONE" , 609 "TEMOD16_DESC2_MODE_CL49" , 610 "TEMOD16_DESC2_MODE_BRCM" , 611 "TEMOD16_DESC2_MODE_ALU" , 612 "TEMOD16_DESC2_MODE_CL48" , 613 "TEMOD16_DESC2_MODE_CL36" , 614 "TEMOD16_DESC2_MODE_CL82" , 615 "TEMOD16_DESC2_MODE_ILLEGAL" 616 }; /* e2s_temod16_descrambler2_mode */ 617 618 char* e2s_temod16_byte_del_mode [CNT_temod16_byte_del_mode] = { 619 "TEMOD16_R_DESC2_BYTE_DELETION_100M" , 620 "TEMOD16_R_DESC2_BYTE_DELETION_10M" , 621 "TEMOD16_R_DESC2_BYTE_DELETION_NONE" 622 }; /* e2s_temod16_byte_del_mode */ 623 624 char* e2s_temod16_decode_descr_mode [CNT_temod16_decode_descr_mode] = { 625 "TEMOD16_R_DEC1_DESCR_MODE_NONE" , 626 "TEMOD16_R_DEC1_DESCR_MODE_BRCM64B66B" 627 }; /* e2s_temod16_decode_descr_mode */ 628 629 char* e2s_temod16_an_property_enable [CNT_an_property_enable] = { 630 "TEMOD16_AN_PROPERTY_ENABLE_NONE" , 631 "TEMOD16_AN_PROPERTY_ENABLE_SGMII_MASTER_MODE" , 632 "TEMOD16_AN_PROPERTY_ENABLE_AN_PD_TO_CL37" , 633 "TEMOD16_AN_PROPERTY_ENABLE_SGMII_TO_CL37_AUTO" , 634 "TEMOD16_AN_PROPERTY_ENABLE_CL37_BAM_to_SGMII_AUTO" , 635 "TEMOD16_AN_PROPERTY_ENABLE_HPAM_TO_CL73_AUTO" , 636 "TEMOD16_AN_PROPERTY_ENABLE_CL73_BAM_TO_HPAM_AUTO" , 637 "TEMOD16_AN_PROPERTY_ENABLE_ILLEGAL" 638 }; /* e2s_temod16_an_property_enable */ 639 640 char* e2s_temod16_credit_type_t [CNT_credit_type_t] = { 641 "TEMOD16_CREDIT_RESET" , 642 "TEMOD16_CREDIT_TABLE" , 643 "TEMOD16_CREDIT_CLOCK_COUNT_0" , 644 "TEMOD16_CREDIT_CLOCK_COUNT_1" , 645 "TEMOD16_CREDIT_LOOP_COUNT_0" , 646 "TEMOD16_CREDIT_LOOP_COUNT_1" , 647 "TEMOD16_CREDIT_MAC" , 648 "TEMOD16_CREDIT_PCS_CLOCK_COUNT_0" , 649 "TEMOD16_CREDIT_PCS_GEN_COUNT" , 650 "TEMOD16_CREDIT_EN" , 651 "TEMOD16_CREDIT_PCS_REPCNT" , 652 "TEMOD16_CREDIT_SGMII_SPD" , 653 "TEMOD16_CREDIT_ILLEGAL" 654 }; /* e2s_temod16_credit_type_t */ 655 656 char* e2s_temod16_override_type_t [CNT_override_type_t] = { 657 "TEMOD16_OVERRIDE_RESET" , 658 "TEMOD16_OVERRIDE_CL72" , 659 "TEMOD16_OVERRIDE_SPDID" , 660 "TEMOD16_OVERRIDE_NUM_LANES" , 661 "TEMOD16_OVERRIDE_OS_MODE" , 662 "TEMOD16_OVERRIDE_FEC_EN" , 663 "TEMOD16_OVERRIDE_DESKEW_MODE" , 664 "TEMOD16_OVERRIDE_DESC2_MODE" , 665 "TEMOD16_OVERRIDE_CL36BYTEDEL_MODE" , 666 "TEMOD16_OVERRIDE_BRCM64B66_DESCR_MODE" , 667 "TEMOD16_OVERRIDE_CHKEND_EN" , 668 "TEMOD16_OVERRIDE_BLKSYNC_MODE" , 669 "TEMOD16_OVERRIDE_DECODE_MODE" , 670 "TEMOD16_OVERRIDE_REORDER_EN" , 671 "TEMOD16_OVERRIDE_CL36_EN" , 672 "TEMOD16_OVERRIDE_SCR_MODE" , 673 "TEMOD16_OVERRIDE_DESCR_MODE" , 674 "TEMOD16_OVERRIDE_ENCODE_MODE" , 675 "TEMOD16_OVERRIDE_ALL" 676 }; /* e2s_temod16_override_type_t */ 677 678 char* e2s_temod16_ref_clk_t [CNT_temod16_ref_clk_t] = { 679 "TEMOD16REFCLK156MHZ" , 680 "TEMOD16REFCLK125MHZ" , 681 "TEMOD16REFCLKCOUNT" 682 }; /* e2s_temod16_ref_clk_t */ 683