temod_enum_defines.h (52814B)
1 /*---------------------------------------------------------------------- 2 * : temod_enum_defines.h, 3 * : n * 4 * Broadcom Corporation 5 * Proprietary and Confidential information 6 * All rights reserved 7 * This source file is the property of Broadcom Corporation, and 8 * may not be copied or distributed in any isomorphic form without the 9 * prior written consent of Broadcom Corporation. 10 *--------------------------------------------------------------------- 11 *--------------------------------------------------------------------- 12 ############### THIS FILE IS AUTOMATICALLY GENERATED. ############### 13 ############### DO !! NOT !! MANUALLY EDIT THIS FILE. ############### 14 *--------------------------------------------------------------------- 15 * Description: This file contains enums, elems, and doxygen comments 16 * needed for SerDes Configuration programs. 17 *--------------------------------------------------------------------- 18 * CVS INFORMATION: 19 * Please see inc/enum_desc.txt for CVS information. 20 *---------------------------------------------------------------------- 21 */ 22 /* 23 * 24 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 25 * 26 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 27 */ 28 /* This file is automatically generated. Do not modify it. Modify the 29 * inc/enum_desc.txt to change enums, elems, or comments. For issues about 30 * the process that creates this file contact the temod development team. 31 */ 32 33 #ifndef _TSCMOD_ENUM_DEFINES_H 34 #define _TSCMOD_ENUM_DEFINES_H 35 36 /*! \enum temod_core_select 37 38 temod_core_select selects for programming, any combination of 3 core of the PHY. 39 This is only applicable to the 12x10 version of the TSCE core. 40 A '1' in the latter part of the enum selects the core. 41 42 43 */ 44 45 typedef enum { 46 TEMOD_CORE_0_0_1 = 0 , /*!< Core number 0 selected */ 47 TEMOD_CORE_0_1_0 , /*!< Core number 1 selected */ 48 TEMOD_CORE_1_0_0 , /*!< Core number 2 selected */ 49 TEMOD_CORE_0_1_1 , /*!< Core number 0 & 1 selected */ 50 TEMOD_CORE_1_0_1 , /*!< Core number 0 & 2 selected */ 51 TEMOD_CORE_1_1_1 , /*!< Core number 0,1,& 2 selected */ 52 TEMOD_CORE_ILLEGAL /*!< Illegal (programmatic boundary) */ 53 } temod_core_select; 54 55 /*! \def CNT_temod_core_select Types of enum temod_core_select */ 56 #define CNT_temod_core_select 7 57 58 /*! 59 \brief 60 This array returns the string version of the enum #temod_core_select when 61 indexed by the enum var. 62 63 */ 64 extern char* e2s_temod_core_select [CNT_temod_core_select]; 65 /*! 66 \brief 67 This array associates the enum #temod_core_select enum with a bit mask. 68 The index is the #temod_core_select enum value. The value for each entry is 69 interpreted as follows. If bit [n] is 1, then core [n] is addressed; if bit [n] 70 is 0, then core [n] is addressed. 71 72 */ 73 extern int e2n_temod_core_select [CNT_temod_core_select]; 74 /*! \enum temod_lane_select 75 76 temod_lane_select selects for programming, any combination of 4 lanes of PHY. A 77 '1' in the latter part of the enum name selects the lane. Other parameters will 78 decide what to do with the selected lane(s). In most cases we enable/disable a 79 feature on the selected lanes. 80 81 If lane_select is set to TEMOD_LANE_BCST for writes we broadcast to all lanes. 82 You cannot read in broadcast mode. 83 84 85 */ 86 87 typedef enum { 88 TEMOD_LANE_0_0_0_1 = 0 , /*!< lane number 0 selected */ 89 TEMOD_LANE_0_0_1_0 , /*!< lane number 1 selected */ 90 TEMOD_LANE_0_0_1_1 , /*!< lane numbers 0,1 selected */ 91 TEMOD_LANE_0_1_0_0 , /*!< lane number 2 selected */ 92 TEMOD_LANE_0_1_0_1 , /*!< lane numbers 2,0 selected */ 93 TEMOD_LANE_0_1_1_0 , /*!< lane numbers 2,1 selected */ 94 TEMOD_LANE_0_1_1_1 , /*!< lane numbers 2,1,0 selected */ 95 TEMOD_LANE_1_0_0_0 , /*!< lane number 3 selected */ 96 TEMOD_LANE_1_0_0_1 , /*!< lane numbers 3,0 selected */ 97 TEMOD_LANE_1_0_1_0 , /*!< lane numbers 3,1 selected */ 98 TEMOD_LANE_1_0_1_1 , /*!< lane numbers 3,1,0 selected */ 99 TEMOD_LANE_1_1_0_0 , /*!< lane numbers 3,2 selected */ 100 TEMOD_LANE_1_1_0_1 , /*!< lane numbers 3,2,0 selected */ 101 TEMOD_LANE_1_1_1_0 , /*!< lane numbers 3,2,1 selected */ 102 TEMOD_LANE_1_1_1_1 , /*!< lane numbers 3,2,1,0 selected */ 103 TEMOD_LANE_BCST , /*!< lane numbers 3,2,1,0 BCST */ 104 TEMOD_LANE_ILLEGAL /*!< Illegal (programmatic boundary) */ 105 } temod_lane_select; 106 107 /*! \def CNT_temod_lane_select Types of enum temod_lane_select */ 108 #define CNT_temod_lane_select 17 109 110 /*! 111 \brief 112 This array returns the string version of the enum #temod_lane_select when 113 indexed by the enum var. 114 115 */ 116 extern char* e2s_temod_lane_select [CNT_temod_lane_select]; 117 /*! 118 \brief 119 This array associates the enum #temod_lane_select enum with a bit mask. 120 The index is the #temod_lane_select enum value. The value for each entry is 121 interpreted as follows. If bit [n] is 1, then lane [n] is enabled; if bit [n] 122 is 0, then lane [n] is disabled. By enabled, we mean that such-and-such 123 function is to be called for a lane; by disabled, we mean that such-and-such 124 function is not to be called for a lane. So a value of 0xF indicates that all 125 lanes or enabled, while 0x5 indicates that only lanes 0 and 2 are enabled. 126 127 */ 128 extern int e2n_temod_lane_select [CNT_temod_lane_select]; 129 /*! \enum temod_spd_intfc_type 130 131 All legal speed-interface combination are encapsulated in this enum 132 133 There are several speed and interface combinations allowed for a logical PHY 134 port. Names and speeds are self explanatory. 135 136 Speed and interface selection is combined because we don't want the speeds 137 to be incompatible with interface. 138 139 */ 140 141 typedef enum { 142 TEMOD_SPD_ZERO = 0 , /*!< Illegal value (enum boundary) */ 143 TEMOD_SPD_10_X1_SGMII , /*!< 10Mb SGMII (serial) */ 144 TEMOD_SPD_100_X1_SGMII , /*!< 100Mb SGMII (serial) */ 145 TEMOD_SPD_1000_X1_SGMII , /*!< 1Gb SGMII (serial) */ 146 TEMOD_SPD_2500_X1 , /*!< 2.5Gb based on 1000BASE-X */ 147 TEMOD_SPD_10_SGMII , /*!< 10Mb SGMII (serial) */ 148 TEMOD_SPD_100_SGMII , /*!< 100Mb SGMII (serial) */ 149 TEMOD_SPD_1000_SGMII , /*!< 1Gb SGMII (serial) */ 150 TEMOD_SPD_2500 , /*!< 2.5Gb based on 1000BASE-X */ 151 TEMOD_SPD_5000 , /*!< 5Gb CL36 */ 152 TEMOD_SPD_1000_XFI , /*!< 1Gb */ 153 TEMOD_SPD_5000_XFI , /*!< 5Gb CL49 */ 154 TEMOD_SPD_10000_XFI , /*!< 10Gb serial XFI */ 155 TEMOD_SPD_10600_XFI_HG , /*!< 10.5Gb serial XFI (HgSOLO) */ 156 TEMOD_SPD_10000_HI , /*!< 10Gb XAUI HiG */ 157 TEMOD_SPD_10000 , /*!< 10Gb XAUI */ 158 TEMOD_SPD_12000_HI , /*!< 12Gb XAUI HiG */ 159 TEMOD_SPD_13000 , /*!< 13Gb XAUI */ 160 TEMOD_SPD_15000 , /*!< 15Gb XAUI */ 161 TEMOD_SPD_16000 , /*!< 16Gb XAUI */ 162 TEMOD_SPD_20000 , /*!< 20Gb XAUI */ 163 TEMOD_SPD_20000_SCR , /*!< 20Gb XAUI scrambled */ 164 TEMOD_SPD_21000 , /*!< 21Gb XAUI */ 165 TEMOD_SPD_25455 , /*!< 25Gb XAUI 64/66 codec */ 166 TEMOD_SPD_31500 , /*!< 31.5Gb quad lane XAUI */ 167 TEMOD_SPD_31500_MLD , /*!< 31.5Gb quad lane MLD */ 168 TEMOD_SPD_40G_X4 , /*!< 40Gb quad lane XAUI */ 169 TEMOD_SPD_42G_X4 , /*!< 40Gb quad lane XAUI HiG */ 170 TEMOD_SPD_40G_XLAUI , /*!< 40Gb quad lane MLD */ 171 TEMOD_SPD_42G_XLAUI , /*!< 42Gb quad lane MLD */ 172 TEMOD_SPD_10000_X2 , /*!< 10Gb dual lane */ 173 TEMOD_SPD_10000_HI_DXGXS , /*!< 10Gb dual lane XGXS HiG */ 174 TEMOD_SPD_10000_DXGXS , /*!< 10Gb dual lane XGXS */ 175 TEMOD_SPD_10000_HI_DXGXS_SCR , /*!< 10Gb dual lane,scrambled,HiG */ 176 TEMOD_SPD_10000_DXGXS_SCR , /*!< 10Gb dual lane scrambled */ 177 TEMOD_SPD_10500_HI , /*!< 10.5Gb XAUI lane XGXS HiG */ 178 TEMOD_SPD_10500_HI_DXGXS , /*!< 10.5Gb dual lane XGXS HiG */ 179 TEMOD_SPD_12773_HI_DXGXS , /*!< 12.73Gb dual lane XGXS HiG */ 180 TEMOD_SPD_12773_DXGXS , /*!< 12.73Gb dual lane XGXS */ 181 TEMOD_SPD_15750_HI_DXGXS , /*!< 15.75Gb scrambled dual lane HiG */ 182 TEMOD_SPD_20G_MLD_DXGXS , /*!< 20Gb dual lane MLD */ 183 TEMOD_SPD_21G_HI_MLD_DXGXS , /*!< 20Gb dual lane HiG MLD */ 184 TEMOD_SPD_20G_DXGXS , /*!< 20Gb dual lane BRCM */ 185 TEMOD_SPD_21G_HI_DXGXS , /*!< 21.2Gb dual HiG(20+plldiv=70) */ 186 TEMOD_SPD_100G_CR10 , /*!< 100G */ 187 TEMOD_SPD_107G_HG_CR10 , /*!< 107G */ 188 TEMOD_SPD_120G_CR12 , /*!< 120G */ 189 TEMOD_SPD_127G_HG_CR12 , /*!< 127G */ 190 TEMOD_SPD_4000 , /*!< 4G QSGMII */ 191 TEMOD_SPD_ILLEGAL /*!< Illegal value (enum boundary) */ 192 } temod_spd_intfc_type; 193 194 /*! \def CNT_temod_spd_intfc_type Types of enum temod_spd_intfc_type */ 195 #define CNT_temod_spd_intfc_type 50 196 197 /*! 198 \brief 199 This array returns the string version of the enum #temod_lane_select when 200 indexed by the enum var. 201 202 */ 203 extern char* e2s_temod_spd_intfc_type [CNT_temod_spd_intfc_type]; 204 /*! 205 \brief 206 This array associates the enum #temod_lane_select enum with a bit mask. 207 The index is the #temod_lane_select enum value. The value for each entry is 208 interpreted as follows. If bit [n] is 1, then lane [n] is enabled; if bit [n] 209 is 0, then lane [n] is disabled. By enabled, we mean that such-and-such 210 function is to be called for a lane; by disabled, we mean that such-and-such 211 function is not to be called for a lane. So a value of 0xF indicates that all 212 lanes or enabled, while 0x5 indicates that only lanes 0 and 2 are enabled. 213 214 */ 215 extern int e2n_temod_spd_intfc_type [CNT_temod_spd_intfc_type]; 216 /*! \enum temod_regacc_type 217 218 Types of MDIO to access PHY registers. IEEE clause 22 and clause 45 are 219 supported. The 8 bit parallel TOTSC bus can be used. We may use 220 221 */ 222 223 typedef enum { 224 TEMOD_REGACC_CL22 = 0 , /*!< IEEE clause 22 based MDIO (for PMD only) */ 225 TEMOD_REGACC_CL45 , /*!< IEEE clause 45 based MDIO (for PMD only) */ 226 TEMOD_REGACC_TOTSC , /*!< Mission Mode. */ 227 TEMOD_REGACC_SBUS_FD , /*!< Probably used in PM testbenches. */ 228 TEMOD_REGACC_SBUS_BD , /*!< Probably used in PM testbenches. */ 229 TEMOD_REGACC_ILLEGAL /*!< Illegal value (enum boundary) */ 230 } temod_regacc_type; 231 232 /*! \def CNT_temod_regacc_type Types of enum temod_regacc_type */ 233 #define CNT_temod_regacc_type 6 234 235 /*! 236 \brief 237 This array returns the string version of the enum #temod_regacc_type when indexed 238 by the enum var. 239 240 */ 241 extern char* e2s_temod_regacc_type [CNT_temod_regacc_type]; 242 /*! \enum temod_port_type 243 244 This is the port mode type enumeration. 245 246 WC can be configured in combo mode (i.e. entire WC is a single port) or 247 independent mode (i.e. WC has more than one port (2, 3, or 4) that are 248 controlled individually. 249 250 */ 251 252 typedef enum { 253 TEMOD_SINGLE_PORT = 0 , /*!< single port mode: 4 channels as one logical port */ 254 TEMOD_MULTI_PORT , /*!< Each channel is one logical port */ 255 TEMOD_DXGXS , /*!< Each paired channel(0-1, 2-3) is one logical port */ 256 TEMOD_TRI1_PORT , /*!< 3 ports, one of them paird as follows (0,1,2-3) */ 257 TEMOD_TRI2_PORT , /*!< 3 ports, one of them paird as follows (0-1,2,3) */ 258 TEMOD_PORT_MODE_ILLEGAL /*!< Illegal value (enum boundary) */ 259 } temod_port_type; 260 261 /*! \def CNT_temod_port_type Types of enum temod_port_type */ 262 #define CNT_temod_port_type 6 263 264 /*! 265 \brief 266 This array returns the string version of the enum #temod_port_type when indexed 267 by the enum var. 268 269 */ 270 extern char* e2s_temod_port_type [CNT_temod_port_type]; 271 /*! \enum temod_diag_type 272 273 temod_diag_type enumerates categories of diagnostic data. 274 has many intermediate stages between down and up. This enum is work in progress 275 276 277 <table cellspacing=0> 278 <tr><td colspan=3><B>'per_lane_control' bit-mappings</B></td></tr> 279 280 <tr><td><B>Type</B></td><td><B>Description</B></td><td><B>Scope</B></td></tr> 281 282 <tr><td>General</td> 283 <td> Combo/independent, Device and Revision Id, VCO settings, Firmware state 284 and version, active/passive lanes, MDIO type. PLL info, Oversampling Info</td> 285 <td>Device</td></tr> 286 287 <tr><td>Link</td> 288 <td> Speeds, oversampling, interface, forced/Autoneg, link status, sync 289 status, RX sequencer on/off </td> 290 <td>Lane</td></tr> 291 292 <tr><td>Autoneg</td> 293 <td> Local and remote advertisement, link status, cl73/37/BAM info </td> 294 <td>Lane</td></tr> 295 296 <tr><td>Internal Traffic</td> 297 <td> PRBS type, CJPat Type, Prog_data value, Any associated recorded errors, 298 and misc. info (IPG etc.)</td> 299 <td>Lane </td></tr> 300 301 <tr> 302 <td>DFE</td> 303 <td>Equalization info, Tap settings. (pre/post/overrides), peaking filter values </td> 304 <td>Lane</td></tr> 305 306 <tr><td>IEEE info</td> 307 <td>Clause 72, FEC</td> 308 <td>Lane</td></tr> 309 310 <tr><td>Topology</td> 311 <td>Looping info (Gloop/rloop), lane swapping, polarity swap info</td> 312 <td>Device</td></tr> 313 314 <tr><td>EEE</td> 315 <td>EEE full, passthru modes, some window values?</td> 316 <td>Lane</td></tr> 317 318 <tr><td>Eye Margin</td> 319 <td>Eye margin measurement (readout only)</td> 320 <td>Lane</td></tr> 321 322 <tr><td>All</td> 323 <td>All of the above. Except eye margin.</td> 324 <td>Device</td></tr> 325 326 </table> 327 328 329 */ 330 331 typedef enum { 332 TEMOD_DIAG_GENERAL = 0x00000001 , /*!< General device wide information. */ 333 TEMOD_DIAG_TOPOLOGY = 0x00000002 , /*!< Loopbacks etc. */ 334 TEMOD_DIAG_LINK = 0x00000004 , /*!< Link specific info. */ 335 TEMOD_DIAG_SPEED = 0x00000008 , /*!< sub-category of TEMOD_DIAG_LINK(for SDK) */ 336 TEMOD_DIAG_ANEG = 0x00000010 , /*!< Autoneg specific info. */ 337 TEMOD_DIAG_TFC = 0x00000020 , /*!< State of tx/rx internal tfc */ 338 TEMOD_DIAG_AN_TIMERS = 0x00000040 , /*!< AN timers */ 339 TEMOD_DIAG_STATE = 0x00000080 , /*!< Debug state registers */ 340 TEMOD_DIAG_DEBUG = 0x00000100 , /*!< Debug */ 341 TEMOD_DIAG_IEEE = 0x00000200 , /*!< IEEE related info */ 342 TEMOD_DIAG_EEE = 0x00000400 , /*!< EEE */ 343 TEMOD_DIAG_BER = 0x00000800 , /*!< BER - PMD bit error rate */ 344 TEMOD_DIAG_CFG = 0x00001000 , /*!< CFG - PMD Lane/Core Config */ 345 TEMOD_DIAG_CL72 = 0x00002000 , /*!< CL72 - Status */ 346 TEMOD_DIAG_DSC = 0x00004000 , /*!< DSC dump */ 347 TEMOD_DIAG_DSC_STD = 0x00010000 , /*!< DSC dump */ 348 #if 0 349 TEMOD_SERDES_DIAG = 0x80000000UL , /*!< PMD Triage */ 350 TEMOD_DIAG_ALL = 0xffffffffUL , /*!< Everything but eye margin */ 351 #else 352 TEMOD_SERDES_DIAG = 0x00008000 , /*!< PMD Triage */ 353 TEMOD_DIAG_ALL = 0x0000ffff , /*!< Everything but eye margin */ 354 #endif 355 TEMOD_DIAG_ILLEGAL = 0x00000000 /*!< Illegal value. programmatic boundary. */ 356 } temod_diag_type; 357 358 /*! \def CNT_temod_diag_type Types of enum temod_diag_type */ 359 #define CNT_temod_diag_type 18 360 361 /*! 362 \brief 363 This array returns the string version of the enum #temod_port_type when indexed 364 by the enum var. 365 366 */ 367 extern char* e2s_temod_diag_type [CNT_temod_diag_type]; 368 /*! \enum temod_pmd_diag_type 369 370 temod_pmd_diag_type enumerates categories of pmd diagnostic data. 371 has many intermediate stages between down and up. This enum is work in progress 372 373 */ 374 375 typedef enum { 376 TEMOD_SERDES_DIAG_CORE_CONFIG = 0x00000001 , /*!< SERDES DIAG */ 377 TEMOD_SERDES_DIAG_CORE_STATE = 0x00000002 , /*!< SERDES DIAG */ 378 TEMOD_SERDES_DIAG_LANE_CONFIG = 0x00000004 , /*!< SERDES DIAG */ 379 TEMOD_SERDES_DIAG_LANE_DEBUG_STATUS = 0x00000008 , /*!< SERDES DIAG */ 380 TEMOD_SERDES_DIAG_LANE_STATE = 0x00000010 , /*!< SERDES DIAG */ 381 TEMOD_SERDES_DIAG_LANE_STATE_HDR = 0x00000020 , /*!< SERDES DIAG */ 382 TEMOD_SERDES_DIAG_LANE_STATE_LEGEND = 0x00000040 , /*!< SERDES DIAG */ 383 TEMOD_SERDES_DIAG_CL72_STATUS = 0x00000080 , /*!< SERDES DIAG */ 384 TEMOD_SERDES_DIAG_EYE_DENSITY = 0x00000100 , /*!< SERDES DIAG */ 385 TEMOD_SERDES_DIAG_EYE_SCAN = 0x00000200 , /*!< SERDES DIAG */ 386 TEMOD_SERDES_DIAG_MEAS_EYE_DENSITY_DATA = 0x00000400 , /*!< SERDES DIAG */ 387 TEMOD_SERDES_DIAG_MEAS_EYE_SCAN_DONE = 0x00000800 , /*!< SERDES DIAG */ 388 TEMOD_SERDES_DIAG_MEAS_LOWBER_EYE = 0x00001000 , /*!< SERDES DIAG */ 389 TEMOD_SERDES_DIAG_READ_EYE_SCAN_STRIPE = 0x00002000 , /*!< SERDES DIAG */ 390 TEMOD_SERDES_DIAG_EYE_DENSITY_DATA = 0x00004000 , /*!< SERDES DIAG */ 391 TEMOD_SERDES_DIAG_LOWBER_EYE = 0x00008000 , /*!< SERDES DIAG */ 392 TEMOD_SERDES_DIAG_EYE_SCAN_VERTICAL = 0x00010000 , /*!< SERDES DIAG */ 393 TEMOD_SERDES_DIAG_EYE_SCAN_STRIPE = 0x00020000 , /*!< SERDES DIAG */ 394 TEMOD_SERDES_DIAG_EYE_SCAN_HEADER = 0x00040000 , /*!< SERDES DIAG */ 395 TEMOD_SERDES_DIAG_EYE_SCAN_FOOTER = 0x00080000 , /*!< SERDES DIAG */ 396 TEMOD_SERDES_DIAG_BER_SCAN_TEST = 0x00100000 , /*!< SERDES DIAG */ 397 TEMOD_SERDES_DIAG_READ_BER_SCAN_DATA = 0x00200000 , /*!< SERDES DIAG */ 398 TEMOD_SERDES_DIAG_EYE_MARGIN_PROJ = 0x00400000 , /*!< SERDES DIAG */ 399 TEMOD_SERDES_DIAG_DIG_LPBK = 0x00800000 , /*!< SERDES DIAG */ 400 TEMOD_SERDES_DIAG_MEAS_EYE_SCAN_START = 0x01000000 , /*!< SERDES DIAG */ 401 TEMOD_SERDES_DIAG_ILLEGAL = 0x00000000 /*!< Illegal value (enum boundary) */ 402 } temod_pmd_diag_type; 403 404 /*! \def CNT_temod_pmd_diag_type Types of enum temod_pmd_diag_type */ 405 #define CNT_temod_pmd_diag_type 26 406 407 /*! 408 \brief 409 This array returns the string version of the enum #temod_pmd_diag_type when indexed 410 by the enum var. 411 412 */ 413 extern char* e2s_temod_pmd_diag_type [CNT_temod_pmd_diag_type]; 414 /*! \enum temod_eye_direction 415 416 The direction of slicer changing always moves from the middle of the eye. 417 Currently all speeds have the following bit positions in temod_st 418 419 \li TEMOD_EYE_VU: Vertical, Upward direction 420 \li TEMOD_EYE_VD: Vertical, Downward direction 421 \li TEMOD_EYE_HL: Horizontal, Left direction 422 \li TEMOD_EYE_HR: Horizontal, Right direction 423 424 425 */ 426 427 typedef enum { 428 TEMOD_EYE_VU = 0 , /*!< Vertical, Upward direction */ 429 TEMOD_EYE_VD , /*!< Vertical, Downward direction */ 430 TEMOD_EYE_HL , /*!< Horizontal, Left direction */ 431 TEMOD_EYE_HR , /*!< Horizontal, Right direction */ 432 TEMOD_EYE_ILLEGAL /*!< Programmatic illegal boundary. */ 433 } temod_eye_direction; 434 435 /*! \def CNT_temod_eye_direction Types of enum temod_eye_direction */ 436 #define CNT_temod_eye_direction 5 437 438 /*! 439 \brief 440 This array returns the string version of the enum #temod_pmd_diag_type when indexed 441 by the enum var. 442 443 */ 444 extern char* e2s_temod_eye_direction [CNT_temod_eye_direction]; 445 446 447 typedef enum { 448 TEMOD_ABILITY_1G_KX = 0 , /*!< CL73 speed 1G_KX ease */ 449 TEMOD_ABILITY_10G_KX4 , /*!< please write comments */ 450 TEMOD_ABILITY_10G_KR , /*!< please write comments */ 451 TEMOD_ABILITY_40G_KR4 , /*!< please write comments */ 452 TEMOD_ABILITY_40G_CR4 , /*!< please write comments */ 453 TEMOD_ABILITY_100G_CR10 , /*!< please write comments */ 454 TEMOD_ABILITY_20G_KR2 , /*!< please write comments */ 455 TEMOD_ABILITY_20G_CR2 , /*!< please write comments */ 456 TEMOD_ABILITY_ILLEGAL /*!< please write comments */ 457 } temod_tech_ability; 458 459 /*! \def CNT_temod_tech_ability Types of enum temod_tech_ability */ 460 #define CNT_temod_tech_ability 9 461 462 /*! 463 \brief 464 This array returns the string version of the enum #temod_pmd_diag_type when indexed 465 by the enum var. 466 467 */ 468 extern char* e2s_temod_tech_ability [CNT_temod_tech_ability]; 469 /*! 470 \brief 471 This array associates the enum #temod_lane_select enum with a bit mask. 472 The index is the #temod_lane_select enum value. The value for each entry is 473 interpreted as follows. If bit [n] is 1, then lane [n] is enabled; if bit [n] 474 is 0, then lane [n] is disabled. By enabled, we mean that such-and-such 475 function is to be called for a lane; by disabled, we mean that such-and-such 476 function is not to be called for a lane. So a value of 0xF indicates that all 477 lanes or enabled, while 0x5 indicates that only lanes 0 and 2 are enabled. 478 479 */ 480 extern int e2n_temod_tech_ability [CNT_temod_tech_ability]; 481 /*! \enum temod_cl37bam_ability 482 483 This array associates the enum #temod_lane_select enum with a bit mask. 484 The index is the #temod_lane_select enum value. The value for each entry is 485 interpreted as follows. If bit [n] is 1, then lane [n] is enabled; if bit [n] 486 is 0, then lane [n] is disabled. Enabled implies the function under 487 consideration be enebled for the lane. Disabled means the opposite. So a value 488 of 0xF indicates that all lanes or enabled, while 0x5 indicates that only lanes 489 0 and 2 are enabled. 490 491 temod_cl37bam_ability enumerates different types of speed advertisements in the 492 basic autoneg page for CL37BAM only. 493 494 Currently all speeds have the following bit positions in temod_st 495 496 \li TEMOD_BAM37ABL_2P5G Bit Pos: 0 497 \li TEMOD_BAM37ABL_5G_X4 Bit Pos: 1 498 \li TEMOD_BAM37ABL_6G_X4 Bit Pos: 2 499 \li TEMOD_BAM37ABL_10G_HIGIG Bit Pos: 3 500 \li TEMOD_BAM37ABL_10G_CX4 Bit Pos: 4 501 \li TEMOD_BAM37ABL_12G_X4 Bit Pos: 5 502 \li TEMOD_BAM37ABL_12P5_X4 Bit Pos: 6 503 \li TEMOD_BAM37ABL_13G_X4 Bit Pos: 7 504 \li TEMOD_BAM37ABL_15G_X4 Bit Pos: 8 505 \li TEMOD_BAM37ABL_16G_X4 Bit Pos: 9 506 \li TEMOD_BAM37ABL_20G_X4_CX4 Bit Pos: 10 507 \li TEMOD_BAM37ABL_20G_X4 Bit Pos: 11 508 \li TEMOD_BAM37ABL_21G_X4 Bit Pos: 12 509 \li TEMOD_BAM37ABL_25P455G Bit Pos: 13 510 \li TEMOD_BAM37ABL_31P5G Bit Pos: 14 511 \li TEMOD_BAM37ABL_32P7G Bit Pos: 15 512 \li TEMOD_BAM37ABL_40G Bit Pos: 16 513 \li TEMOD_BAM37ABL_10G_X2_CX4 Bit Pos: 17 514 \li TEMOD_BAM37ABL_10G_DXGXS Bit Pos: 18 515 \li TEMOD_BAM37ABL_10P5G_DXGXS Bit Pos: 19 516 \li TEMOD_BAM37ABL_12P7_DXGXS Bit Pos: 20 517 \li TEMOD_BAM37ABL_15P75G_R2 Bit Pos: 21 518 \li TEMOD_BAM37ABL_20G_X2_CX4 Bit Pos: 22 519 \li TEMOD_BAM37ABL_20G_X2 Bit Pos: 23 520 521 522 */ 523 524 typedef enum { 525 TEMOD_BAM37ABL_2P5G = 0 , /*!< X1 BRCM */ 526 TEMOD_BAM37ABL_5G_X4 , /*!< BRCM */ 527 TEMOD_BAM37ABL_6G_X4 , /*!< BRCM */ 528 TEMOD_BAM37ABL_10G_HIGIG , /*!< HG (10G_X4) */ 529 TEMOD_BAM37ABL_10G_CX4 , /*!< (10G_X4_CX4) */ 530 TEMOD_BAM37ABL_12G_X4 , /*!< HG */ 531 TEMOD_BAM37ABL_12P5_X4 , /*!< HG */ 532 TEMOD_BAM37ABL_13G_X4 , /*!< HG */ 533 TEMOD_BAM37ABL_15G_X4 , /*!< HG */ 534 TEMOD_BAM37ABL_16G_X4 , /*!< HG */ 535 TEMOD_BAM37ABL_20G_X4_CX4 , /*!< XAUI 8b10b scram(20G_X4S) */ 536 TEMOD_BAM37ABL_20G_X4 , /*!< HG */ 537 TEMOD_BAM37ABL_21G_X4 , /*!< HG */ 538 TEMOD_BAM37ABL_25P455G , /*!< X4 HG */ 539 TEMOD_BAM37ABL_31P5G , /*!< X4 HG */ 540 TEMOD_BAM37ABL_32P7G , /*!< X4 HG */ 541 TEMOD_BAM37ABL_40G , /*!< X4 BRCM HG (40G_X4) */ 542 TEMOD_BAM37ABL_10G_X2_CX4 , /*!< 10G_X2_CX4 */ 543 TEMOD_BAM37ABL_10G_DXGXS , /*!< 10G_X2 */ 544 TEMOD_BAM37ABL_10P5G_DXGXS , /*!< 10P5_X2 */ 545 TEMOD_BAM37ABL_12P7_DXGXS , /*!< 12P7_X2 */ 546 TEMOD_BAM37ABL_15P75G_R2 , /*!< 15P75_X2 */ 547 TEMOD_BAM37ABL_20G_X2_CX4 , /*!< 20G_X2_CX4 */ 548 TEMOD_BAM37ABL_20G_X2 , /*!< 20G_X2 */ 549 TEMOD_BAM37ABL_ILLEGAL /*!< Illegal. Programmatic boundary */ 550 } temod_cl37bam_ability; 551 552 /*! \def CNT_temod_cl37bam_ability Types of enum temod_cl37bam_ability */ 553 #define CNT_temod_cl37bam_ability 25 554 555 /*! 556 \brief 557 This array returns the string version of the enum #temod_pmd_diag_type when indexed 558 by the enum var. 559 560 */ 561 extern char* e2s_temod_cl37bam_ability [CNT_temod_cl37bam_ability]; 562 /*! \enum temod_diag_an_type 563 564 This array associates the enum #temod_lane_select enum with a bit mask. 565 The index is the #temod_lane_select enum value. The value for each entry is 566 interpreted as follows. If bit [n] is 1, then lane [n] is enabled; if bit [n] 567 is 0, then lane [n] is disabled. By enabled, we mean that such-and-such 568 function is to be called for a lane; by disabled, we mean that such-and-such 569 function is not to be called for a lane. So a value of 0xF indicates that all 570 lanes or enabled, while 0x5 indicates that only lanes 0 and 2 are enabled. 571 572 */ 573 574 typedef enum { 575 TEMOD_DIAG_AN_DONE = 0 , /*!< AN completion check */ 576 TEMOD_DIAG_AN_HCD , /*!< AN HCD speed check */ 577 TEMOD_DIAG_AN_TYPE_ILLEGAL /*!< Illegal value. programmatic boundary */ 578 } temod_diag_an_type; 579 580 /*! \def CNT_temod_diag_an_type Types of enum temod_diag_an_type */ 581 #define CNT_temod_diag_an_type 3 582 583 /*! 584 \brief 585 This array returns the string version of the enum #temod_pmd_diag_type when indexed 586 by the enum var. 587 588 */ 589 extern char* e2s_temod_diag_an_type [CNT_temod_diag_an_type]; 590 /*! \enum temod_tier1_function_type 591 592 This array associates the enum #temod_lane_select enum with a bit mask. 593 The index is the #temod_lane_select enum value. The value for each entry is 594 interpreted as follows. If bit [n] is 1, then lane [n] is enabled; if bit [n] 595 is 0, then lane [n] is disabled. By enabled, we mean that such-and-such 596 function is to be called for a lane; by disabled, we mean that such-and-such 597 function is not to be called for a lane. So a value of 0xF indicates that all 598 lanes or enabled, while 0x5 indicates that only lanes 0 and 2 are enabled. 599 600 */ 601 602 typedef enum { 603 PCS_BYPASS_CTL = 0 , /*!< temod_pcs_bypass_ctl */ 604 INIT_PCS , /*!< temod_init_pcs */ 605 INIT_PMD_SW , /*!< temod_init_pmd_sw */ 606 INIT_PMD , /*!< temod_init_pmd */ 607 PMD_RESET_SEQ , /*!< temod_pmd_reset_seq */ 608 PMD_X4_RESET , /*!< temod_pmd_x4_reset */ 609 WAIT_SC_DONE , /*!< temod_wait_sc_done */ 610 ENABLE_SET , /*!< temod_enable_set */ 611 FECMODE_SET , /*!< temod_fecmode_set */ 612 GET_PCS_LINK_STATUS , /*!< temod_get_pcs_link_status */ 613 OVERRIDE_SET , /*!< temod_override_set */ 614 CREDIT_OVERRIDE_SET , /*!< temod_credit_override_set */ 615 ENCODE_SET , /*!< temod_encode_set */ 616 DECODE_SET , /*!< temod_decode_set */ 617 CREDIT_CONTROL , /*!< temod_credit_control */ 618 TX_LANE_CONTROL , /*!< temod_tx_lane_control */ 619 RX_LANE_CONTROL , /*!< temod_rx_lane_control */ 620 TX_LANE_DISABLE , /*!< temod_tx_lane_disable */ 621 POWER_CONTROL , /*!< temod_power_control */ 622 AUTONEG_SET , /*!< temod_autoneg_set */ 623 AUTONEG_GET , /*!< temod_autoneg_get */ 624 AUTONEG_CONTROL , /*!< temod_autoneg_control */ 625 TSC12_CONTROL , /*!< temod_tsc12_control */ 626 CHECK_SC_STATS , /*!< temod_check_sc_stats */ 627 REG_READ , /*!< temod_reg_read */ 628 REG_WRITE , /*!< temod_reg_write */ 629 PRBS_CHECK , /*!< temod_prbs_check */ 630 CJPAT_CRPAT_MODE_SET , /*!< temod_cjpat_crpat_mode_set */ 631 CJPAT_CRPAT_CHECK , /*!< temod_cjpat_crpat_check */ 632 TEMOD_DIAG , /*!< temod_diag */ 633 PCS_LANE_SWAP , /*!< temod_pcs_lane_swap */ 634 PMD_LANE_SWAP , /*!< temod_pmd_lane_swap */ 635 PMD_LANE_SWAP_TX , /*!< temod_pmd_lane_swap_tx */ 636 PARALLEL_DETECT_CONTROL , /*!< temod_parallel_detect_control */ 637 REVID_READ , /*!< temod_revid_read */ 638 SOFT_RESET , /*!< temod_soft_reset */ 639 SET_SPD_INTF , /*!< temod_set_spd_intf */ 640 SET_PORT_MODE , /*!< temod_set_port_mode */ 641 EEE_PASSTHRU_SET , /*!< temod_EEE_pass_thru_set */ 642 EEE_PASSTHRU_GET , /*!< temod_EEE_pass_thru_get */ 643 FEC_CONTROL , /*!< temod_FEC_control */ 644 HIGIG2_CONTROL , /*!< temod_HIGIG2_control */ 645 LF_RF_CONTROL , /*!< temod_LF_RF_control */ 646 RX_FAST_LOCK_CONTROL , /*!< temod_rx_fast_lock_control */ 647 PMD_CORE_RESET , /*!< temod_pmd_core_reset */ 648 PMD_LANE_RESET , /*!< temod_pmd_lane_reset */ 649 AFE_SPEED_UP_DSC_VGA , /*!< temod_afe_speed_up_dsc_vga */ 650 CLAUSE_72_CONTROL , /*!< temod_clause72_control */ 651 PLL_SEQUENCER_CONTROL , /*!< temod_pll_sequencer_control */ 652 PLL_LOCK_WAIT , /*!< temod_pll_lock_wait */ 653 PROG_DATA , /*!< temod_prog_data */ 654 RX_SEQ_CONTROL , /*!< temod_rx_seq_control */ 655 SET_POLARITY , /*!< temod_tx_rx_polarity */ 656 PRBS_CONTROL , /*!< temod_prbs_control */ 657 PRBS_MODE , /*!< temod_prbs_mode */ 658 RX_PF_CONTROL , /*!< temod_rx_PF_control */ 659 RX_VGA_CONTROL , /*!< temod_rx_VGA_control */ 660 CJPAT_CRPAT_CONTROL , /*!< temod_cjpat_crpat_control */ 661 TX_LOOPBACK_CONTROL , /*!< temod_tx_loopback_control */ 662 TX_PMD_LOOPBACK_CONTROL , /*!< temod_tx_pmd_loopback_control */ 663 RX_LOOPBACK_CONTROL , /*!< temod_rx_loopback_control */ 664 RX_P1_SLICER_CONTROL , /*!< temod_rx_p1_slicer_control */ 665 RX_M1_SLICER_CONTROL , /*!< temod_rx_m1_slicer_control */ 666 RX_D_SLICER_CONTROL , /*!< temod_rx_d_slicer_control */ 667 WAIT_PMD_LOCK , /*!< temod_wait_pmd_lock */ 668 FIRMWARE_SET , /*!< temod_firmware_set */ 669 INIT_PMD_QSGMII , /*!< temod_init_pmd_qsgmii */ 670 INIT_PCS_ILKN , /*!< temod_init_pcs_ilkn */ 671 PMD_RESET_BYPASS , /*!< temod_pmd_reset_bypass */ 672 PMD_OVERRIDE_CONTROL , /*!< temod_pmd_override_control */ 673 TIER1_FUNCTION_ILLEGAL /*!< always last */ 674 } temod_tier1_function_type; 675 676 /*! \def CNT_temod_tier1_function_type Types of enum temod_tier1_function_type */ 677 #define CNT_temod_tier1_function_type 71 678 679 /*! 680 \brief 681 This array returns the string version of the enum #temod_pmd_diag_type when indexed 682 by the enum var. 683 684 */ 685 extern char* e2s_temod_tier1_function_type [CNT_temod_tier1_function_type]; 686 /*! \enum sc_mode_type 687 688 temod_core_select selects for programming, any combination of 3 689 core of the PHY. 690 This is only applicable to the 12x10 version of the TSCE core. 691 A '1' in the latter part of the enum selects the core. 692 693 694 */ 695 696 typedef enum { 697 TEMOD_SC_MODE_HT_WITH_BASIC_OVERRIDE = 0 , /*!< TEMOD_SC_MODE_HT_WITH_BASIC_OVERRIDE */ 698 TEMOD_SC_MODE_HT_OVERRIDE , /*!< TEMOD_SC_MODE_HT_OVERRIDE */ 699 TEMOD_SC_MODE_ST , /*!< TEMOD_SC_MODE_ST */ 700 TEMOD_SC_MODE_ST_OVERRIDE , /*!< TEMOD_SC_MODE_ST_OVERRIDE */ 701 TEMOD_SC_MODE_AN_CL37 , /*!< TEMOD_SC_MODE_AN_CL37 */ 702 TEMOD_SC_MODE_AN_CL73 , /*!< TEMOD_SC_MODE_AN_CL73 */ 703 TEMOD_SC_MODE_BYPASS , /*!< TEMOD_SC_MODE_BYPASS */ 704 TEMOD_SC_MODE_ILLEGAL /*!< TEMOD_SC_MODE_ILLEGAL */ 705 } sc_mode_type; 706 707 /*! \def CNT_sc_mode_type Types of enum sc_mode_type */ 708 #define CNT_sc_mode_type 8 709 710 /*! 711 \brief 712 This array returns the string version of the enum 713 #temod_core_select when 714 indexed by the enum var. 715 716 */ 717 extern char* e2s_sc_mode_type [CNT_sc_mode_type]; 718 /*! 719 \brief 720 This array associates the enum #temod_core_select enum with a 721 bit mask. 722 The index is the #temod_core_select enum value. The value for 723 each entry is 724 interpreted as follows. If bit [n] is 1, then core [n] is 725 addressed; if bit [n] 726 is 0, then core [n] is addressed. 727 728 */ 729 extern int e2n_sc_mode_type [CNT_sc_mode_type]; 730 /*! \enum temod_pll_mode_type 731 732 temod_pll_mode_type divides the PLL to get a clock which is a multiple of the 733 refernce clock. This clock runs all the digital logic in the MAC and PHY layers 734 and is referred to as TSC_CLK. To get the TSC_CLK, you simply multiply the 735 reference clock by the pll divider value (not the reg. bit location) 736 737 */ 738 739 typedef enum { 740 TEMOD_PLL_MODE_DIV_ZERO = 0 , /*!< Illegal PLL Divider Number */ 741 TEMOD_PLL_MODE_DIV_72 = 1 , /*!< Multiply ref. clk by 40 */ 742 TEMOD_PLL_MODE_DIV_40 = 2 , /*!< Multiply ref. clk by 40 */ 743 TEMOD_PLL_MODE_DIV_42 = 3 , /*!< Multiply ref. clk by 42 */ 744 TEMOD_PLL_MODE_DIV_48 = 4 , /*!< Multiply ref. clk by 48 */ 745 TEMOD_PLL_MODE_DIV_50 = 5 , /*!< Multiply ref. clk by 50 */ 746 TEMOD_PLL_MODE_DIV_52 = 6 , /*!< Multiply ref. clk by 52 */ 747 TEMOD_PLL_MODE_DIV_54 = 7 , /*!< Multiply ref. clk by 54 */ 748 TEMOD_PLL_MODE_DIV_60 = 8 , /*!< Multiply ref. clk by 60 */ 749 TEMOD_PLL_MODE_DIV_64 = 9 , /*!< Multiply ref. clk by 64 */ 750 TEMOD_PLL_MODE_DIV_66 = 10 , /*!< Multiply ref. clk by 66 */ 751 TEMOD_PLL_MODE_DIV_68 = 11 , /*!< Multiply ref. clk by 66 */ 752 TEMOD_PLL_MODE_DIV_70 = 12 , /*!< Multiply ref. clk by 70 */ 753 TEMOD_PLL_MODE_DIV_80 = 13 , /*!< Multiply ref. clk by 80 */ 754 TEMOD_PLL_MODE_DIV_92 = 14 , /*!< Multiply ref. clk by 92 */ 755 TEMOD_PLL_MODE_DIV_100 = 15 , /*!< Multiply ref. clk by 10 */ 756 TEMOD_PLL_MODE_DIV_82P5 = 16 , /*!< Multiply ref. clk by 82.5 */ 757 TEMOD_PLL_MODE_DIV_87P5 = 17 , /*!< Multiply ref. clk by 87.5 */ 758 TEMOD_PLL_MODE_DIV_ILLEGAL /*!< Illegal (programmatic boundary) */ 759 } temod_pll_mode_type; 760 761 /*! \def CNT_temod_pll_mode_type Types of enum temod_pll_mode_type */ 762 #define CNT_temod_pll_mode_type 19 763 764 /*! 765 \brief 766 This array returns the string of #temod_pll_mode_type when indexed by the enum. 767 768 */ 769 extern char* e2s_temod_pll_mode_type [CNT_temod_pll_mode_type]; 770 /*! 771 \brief 772 This array returns the clock multiplier of #temod_pll_mode_type when indexed by the enum. 773 774 */ 775 extern int e2n_temod_pll_mode_type [CNT_temod_pll_mode_type]; 776 /*! \enum temod_os_mode_type 777 778 779 The oversampling mode means that bits are sent out more than once to reduce 780 the effective frequency of data transfer. For example you can send 5G bits 781 over a 10G bit lane by sending every bit twice, or OS=2. When the OS is 3.3 782 it's a bit tricky, we send bits 3 or 4 times in a pattern like so 783 3,3,3,4,3,3,3,4,... Similarly for OS = 8, we send 8,8,8,9,8,8,8,9,... 784 785 786 */ 787 788 typedef enum { 789 TEMOD_PMA_OS_MODE_1 = 0 , /*!< Over sampling Mode 1 */ 790 TEMOD_PMA_OS_MODE_2 = 1 , /*!< Over sampling Mode 2 */ 791 TEMOD_PMA_OS_MODE_3 = 2 , /*!< Over sampling Mode 3 */ 792 TEMOD_PMA_OS_MODE_3_3 = 3 , /*!< Over sampling Mode 3.3 */ 793 TEMOD_PMA_OS_MODE_4 = 4 , /*!< Over sampling Mode 4 */ 794 TEMOD_PMA_OS_MODE_5 = 5 , /*!< Over sampling Mode 5 */ 795 TEMOD_PMA_OS_MODE_7_25 = 6 , /*!< Over sampling Mode 7.25 */ 796 TEMOD_PMA_OS_MODE_8 = 7 , /*!< Over sampling Mode 8 */ 797 TEMOD_PMA_OS_MODE_8_25 = 8 , /*!< Over sampling Mode 8.25 */ 798 TEMOD_PMA_OS_MODE_10 = 9 , /*!< Over sampling Mode 10 */ 799 TEMOD_PMA_OS_MODE_ILLEGAL = 15 /*!< Over sampling Mode Illegal */ 800 } temod_os_mode_type; 801 802 /*! \def CNT_temod_os_mode_type Types of enum temod_os_mode_type */ 803 #define CNT_temod_os_mode_type 11 804 805 /*! 806 \brief 807 This array returns the string of #temod_os_mode_type when indexed by the enum. 808 809 */ 810 extern char* e2s_temod_os_mode_type [CNT_temod_os_mode_type]; 811 /*! 812 \brief 813 This array returns the over sampling value of #temod_os_mode_type when indexed by 814 the enum. For floating values 3.3 and 8.25 it returns 33 and 825. 815 816 */ 817 extern int e2n_temod_os_mode_type [CNT_temod_os_mode_type]; 818 /*! \enum temod_scr_mode 819 820 This mode indicates how many bits of a 'frame' will be scrambled. We have either 821 66 or 80 bits per frame (depending on 8b10b or 64b66b encoding). Normally 822 scrambling is 823 824 \li bypassed for baud rates under 6.25G (0). 825 \li we scramble all 66 bits (1) 826 \li all 80 bits(2) 827 \li only 64 of the 66b (3). i.e we don't scramble the 'sync' bits. 828 829 */ 830 831 typedef enum { 832 TEMOD_SCR_MODE_BYPASS = 0 , /*!< Scrambling Mode bypassed */ 833 TEMOD_SCR_MODE_66B = 1 , /*!< Scrambling Mode 66B */ 834 TEMOD_SCR_MODE_80B = 2 , /*!< Scrambling Mode 80B */ 835 TEMOD_SCR_MODE_64B = 3 /*!< Scrambling Mode 64B */ 836 } temod_scr_mode; 837 838 /*! \def CNT_temod_scr_mode Types of enum temod_scr_mode */ 839 #define CNT_temod_scr_mode 4 840 841 /*! 842 \brief 843 This array returns the string of #temod_scr_mode when indexed by the enum. 844 845 */ 846 extern char* e2s_temod_scr_mode [CNT_temod_scr_mode]; 847 /*! 848 \brief 849 This array returns the scrambling mode of #temod_scr_mode when indexed by 850 the enum. 851 852 */ 853 extern int e2n_temod_scr_mode [CNT_temod_scr_mode]; 854 /*! \enum temod_encode_mode 855 856 Serial bits are encoded when transmitted. The encoding depends on the baud rate 857 and the link type 858 \li 000 All encoding functions disabled for lane 859 \li 001 8b10b (cl48 ) 860 \li 010 8b10b (cl48 rxaui) 861 \li 011 8b10b (cl36 ) 862 \li 100 64b66b (cl82 ) 863 \li 101 64b66b (cl49 ) 864 \li 110 64b66b (brcm ) 865 866 */ 867 868 typedef enum { 869 TEMOD_ENCODE_MODE_NONE = 0 , /*!< Encoding Mode NONE */ 870 TEMOD_ENCODE_MODE_CL48 = 1 , /*!< Encoding Mode CL48 */ 871 TEMOD_ENCODE_MODE_CL48_2_LANE = 2 , /*!< Encoding Mode CL48 */ 872 TEMOD_ENCODE_MODE_CL36 = 3 , /*!< Encoding Mode CL36 */ 873 TEMOD_ENCODE_MODE_CL82 = 4 , /*!< Encoding Mode CL82 */ 874 TEMOD_ENCODE_MODE_CL49 = 5 , /*!< Encoding Mode CL49 */ 875 TEMOD_ENCODE_MODE_BRCM = 6 , /*!< Encoding Mode BRCM */ 876 TEMOD_ENCODE_MODE_ILLEGAL = 7 /*!< Encoding Mode Illegal */ 877 } temod_encode_mode; 878 879 /*! \def CNT_temod_encode_mode Types of enum temod_encode_mode */ 880 #define CNT_temod_encode_mode 8 881 882 /*! 883 \brief 884 This array returns the string of #temod_encode_mode when indexed by the enum. 885 886 */ 887 extern char* e2s_temod_encode_mode [CNT_temod_encode_mode]; 888 /*! 889 \brief 890 This array returns the encoding mode of #temod_encode_mode when indexed by 891 the enum. 892 893 */ 894 extern int e2n_temod_encode_mode [CNT_temod_encode_mode]; 895 /*! \enum temod_check_end_mode 896 897 Check end is a disparity based error bit set by the PCS for CL48. The generation 898 of this error bit depends on the speed. 899 900 */ 901 902 typedef enum { 903 TEMOD_CL48_CHECK_END_OFF = 0 , /*!< Don't generate checkend error bit */ 904 TEMOD_CL48_CHECK_END_ON = 1 /*!< generate checkend error bit */ 905 } temod_check_end_mode; 906 907 /*! \def CNT_temod_check_end_mode Types of enum temod_check_end_mode */ 908 #define CNT_temod_check_end_mode 2 909 910 /*! 911 \brief 912 This array returns the string of #temod_check_end_mode when indexed by the enum. 913 914 */ 915 extern char* e2s_temod_check_end_mode [CNT_temod_check_end_mode]; 916 /*! \enum temod_sigdet_filter 917 918 No documentation available 919 920 */ 921 922 typedef enum { 923 TEMOD_SIGDET_FILTER_NONCX4 = 0 , /*!< No description available */ 924 TEMOD_SIGDET_FILTER_CX4 = 1 /*!< No description available */ 925 } temod_sigdet_filter; 926 927 /*! \def CNT_temod_sigdet_filter Types of enum temod_sigdet_filter */ 928 #define CNT_temod_sigdet_filter 2 929 930 /*! 931 \brief 932 This array returns the string of #temod_sigdet_filter when indexed by the enum. 933 934 */ 935 extern char* e2s_temod_sigdet_filter [CNT_temod_sigdet_filter]; 936 /*! \enum temod_blocksync_mode 937 938 A block is detected in ports with multiple lanes. PCS has to recognize blocks 939 since the bits may come in skewed in time over lanes. This feature identifies 940 the block type, which is a feature of the speed. 941 942 000 none 943 001 cl49 mode - enables func_cl49cl82_sync block 944 010 cl82 mode - enables func_cl49cl82_sync block 945 011 8b10b mode - enables the func_8b10b_sync block 946 100 fec mode - enables the func_fec_sync block 947 101 brcm 64b66b mode 948 949 */ 950 951 typedef enum { 952 TEMOD_BLOCKSYNC_MODE_NONE = 0 , /*!< Block sync mode none */ 953 TEMOD_BLOCKSYNC_MODE_CL49 = 1 , /*!< Block sync mode CL49 type */ 954 TEMOD_BLOCKSYNC_MODE_CL82 = 2 , /*!< Block sync mode CL82 type */ 955 TEMOD_BLOCKSYNC_MODE_8B10B = 3 , /*!< Block sync mode 8B10B type */ 956 TEMOD_BLOCKSYNC_MODE_FEC = 4 , /*!< Block sync mode FEC type */ 957 TEMOD_BLOCKSYNC_MODE_BRCM = 5 , /*!< Block sync mode BRCM type */ 958 TEMOD_BLOCKSYNC_MODE_ILLEGAL = 7 /*!< Block sync mode illegal */ 959 } temod_blocksync_mode; 960 961 /*! \def CNT_temod_blocksync_mode Types of enum temod_blocksync_mode */ 962 #define CNT_temod_blocksync_mode 7 963 964 /*! 965 \brief 966 This array returns the string of #temod_blocksync_mode when indexed by the enum. 967 968 */ 969 extern char* e2s_temod_blocksync_mode [CNT_temod_blocksync_mode]; 970 /*! \enum temod_reorder_mode 971 972 Depending on aggregation mode we have various types of reordering of serial 973 bits. 974 975 */ 976 977 typedef enum { 978 TEMOD_R_REORDER_MODE_NONE = 0 , /*!< Reorder mode NONE type */ 979 TEMOD_R_REORDER_MODE_CL48 = 1 , /*!< Reorder mode CL48 type */ 980 TEMOD_R_REORDER_MODE_CL36 = 2 , /*!< Reorder mode CL36 type */ 981 TEMOD_R_REORDER_MODE_CL36_CL48 = 3 /*!< Reorder mode CL36_CL48 type */ 982 } temod_reorder_mode; 983 984 /*! \def CNT_temod_reorder_mode Types of enum temod_reorder_mode */ 985 #define CNT_temod_reorder_mode 4 986 987 /*! 988 \brief 989 This array returns the string of #temod_reorder_mode when indexed by the enum. 990 991 */ 992 extern char* e2s_temod_reorder_mode [CNT_temod_reorder_mode]; 993 /*! \enum temod_cl36_mode 994 995 Cl36 mode control 996 997 */ 998 999 typedef enum { 1000 TEMOD_CL36_DISABLE = 0 , /*!< */ 1001 TEMOD_CL36_ENABLE = 1 /*!< */ 1002 } temod_cl36_mode; 1003 1004 /*! \def CNT_temod_cl36_mode Types of enum temod_cl36_mode */ 1005 #define CNT_temod_cl36_mode 2 1006 1007 /*! 1008 \brief 1009 This array returns the string of #temod_cl36_mode when indexed by the enum. 1010 1011 */ 1012 extern char* e2s_temod_cl36_mode [CNT_temod_cl36_mode]; 1013 /*! \enum temod_descrambler_mode 1014 1015 The descrambling must match the scrambling done at the transmitting port. 1016 1017 */ 1018 1019 typedef enum { 1020 TEMOD_R_DESCR1_MODE_BYPASS = 0 , /*!< No descrambling */ 1021 TEMOD_R_DESCR1_MODE_66B = 1 , /*!< 66b descrambling */ 1022 TEMOD_R_DESCR1_MODE_10B = 2 , /*!< 10b descrambling */ 1023 TEMOD_R_DESCR1_MODE_ILLEGAL = 3 /*!< */ 1024 } temod_descrambler_mode; 1025 1026 /*! \def CNT_temod_descrambler_mode Types of enum temod_descrambler_mode */ 1027 #define CNT_temod_descrambler_mode 4 1028 1029 /*! 1030 \brief 1031 This array returns the string of #temod_descrambler_mode when indexed by the enum. 1032 1033 */ 1034 extern char* e2s_temod_descrambler_mode [CNT_temod_descrambler_mode]; 1035 /*! \enum temod_decoder_mode 1036 1037 The descrambling must match the scrambling done at the transmitting port. 1038 1039 */ 1040 1041 typedef enum { 1042 TEMOD_DECODER_MODE_NONE = 0 , /*!< decoder mode NONE */ 1043 TEMOD_DECODER_MODE_CL49 = 1 , /*!< decoder mode CL49 */ 1044 TEMOD_DECODER_MODE_BRCM = 2 , /*!< decoder mode BRCM */ 1045 TEMOD_DECODER_MODE_ALU = 3 , /*!< decoder mode ALU */ 1046 TEMOD_DECODER_MODE_CL48 = 4 , /*!< decoder mode CL48 */ 1047 TEMOD_DECODER_MODE_CL36 = 5 , /*!< decoder mode CL36 */ 1048 TEMOD_DECODER_MODE_CL82 = 6 , /*!< decoder mode CL82 */ 1049 TEMOD_DECODER_MODE_ILLEGAL = 7 /*!< decoder mode ILLEGAL */ 1050 } temod_decoder_mode; 1051 1052 /*! \def CNT_temod_decoder_mode Types of enum temod_decoder_mode */ 1053 #define CNT_temod_decoder_mode 8 1054 1055 /*! 1056 \brief 1057 This array returns the string of #temod_decoder_mode when indexed by the enum. 1058 1059 */ 1060 extern char* e2s_temod_decoder_mode [CNT_temod_decoder_mode]; 1061 /*! \enum temod_deskew_mode 1062 1063 Deskew Mode is a function of speed. 1064 1065 */ 1066 1067 typedef enum { 1068 TEMOD_R_DESKEW_MODE_BYPASS = 0 , /*!< deskew mode BYPASS */ 1069 TEMOD_R_DESKEW_MODE_8B_10B = 1 , /*!< deskew mode 8B_10B */ 1070 TEMOD_R_DESKEW_MODE_BRCM_66B = 2 , /*!< deskew mode BRCM_66B */ 1071 TEMOD_R_DESKEW_MODE_CL82_66B = 3 , /*!< deskew mode CL82_66B */ 1072 TEMOD_R_DESKEW_MODE_CL36_10B = 4 , /*!< deskew mode CL36_10B */ 1073 TEMOD_R_DESKEW_MODE_ILLEGAL = 7 /*!< deskew mode ILLEGAL */ 1074 } temod_deskew_mode; 1075 1076 /*! \def CNT_temod_deskew_mode Types of enum temod_deskew_mode */ 1077 #define CNT_temod_deskew_mode 6 1078 1079 /*! 1080 \brief 1081 This array returns the string of #temod_deskew_mode when indexed by the enum. 1082 1083 */ 1084 extern char* e2s_temod_deskew_mode [CNT_temod_deskew_mode]; 1085 /*! \enum temod_descrambler2_mode 1086 1087 No description 1088 1089 */ 1090 1091 typedef enum { 1092 TEMOD_DESC2_MODE_NONE = 0 , /*!< Descrambler2 mode NONE */ 1093 TEMOD_DESC2_MODE_CL49 = 1 , /*!< Descrambler2 mode CL49 */ 1094 TEMOD_DESC2_MODE_BRCM = 2 , /*!< Descrambler2 mode BRCM */ 1095 TEMOD_DESC2_MODE_ALU = 3 , /*!< Descrambler2 mode ALU */ 1096 TEMOD_DESC2_MODE_CL48 = 4 , /*!< Descrambler2 mode CL48 */ 1097 TEMOD_DESC2_MODE_CL36 = 5 , /*!< Descrambler2 mode CL36 */ 1098 TEMOD_DESC2_MODE_CL82 = 6 , /*!< Descrambler2 mode CL82 */ 1099 TEMOD_DESC2_MODE_ILLEGAL = 7 /*!< Descrambler2 mode ILLEGAL */ 1100 } temod_descrambler2_mode; 1101 1102 /*! \def CNT_temod_descrambler2_mode Types of enum temod_descrambler2_mode */ 1103 #define CNT_temod_descrambler2_mode 8 1104 1105 /*! 1106 \brief 1107 This array returns the string of #temod_descrambler2_mode when indexed by the enum. 1108 1109 */ 1110 extern char* e2s_temod_descrambler2_mode [CNT_temod_descrambler2_mode]; 1111 /*! \enum temod_byte_del_mode 1112 1113 For low speeds, data is duplicted 10 or 100 times to run at higher bauds. For 1114 example in a 10G lane, we duplicate 100M data 100 times. On the receive side 1115 these duplicate bits must be deleted. 1116 \li 0 - 100M mode (Delete 9 out of every 10 bytes) 1117 \li 1 - 10M mode (Delete 99 out of every 100 bytes) 1118 \li 2 - Passthrough (No deletion) 1119 1120 1121 */ 1122 1123 typedef enum { 1124 TEMOD_R_DESC2_BYTE_DELETION_100M = 0 , /*!< 100M type Byte deletion */ 1125 TEMOD_R_DESC2_BYTE_DELETION_10M = 1 , /*!< 10M type Byte deletion */ 1126 TEMOD_R_DESC2_BYTE_DELETION_NONE = 2 /*!< No Byte deletion */ 1127 } temod_byte_del_mode; 1128 1129 /*! \def CNT_temod_byte_del_mode Types of enum temod_byte_del_mode */ 1130 #define CNT_temod_byte_del_mode 3 1131 1132 /*! 1133 \brief 1134 This array returns the string of #temod_blocksync_mode when indexed by the enum. 1135 1136 */ 1137 extern char* e2s_temod_byte_del_mode [CNT_temod_byte_del_mode]; 1138 /*! \enum temod_decode_descr_mode 1139 1140 No description 1141 1142 */ 1143 1144 typedef enum { 1145 TEMOD_R_DEC1_DESCR_MODE_NONE = 0 , /*!< */ 1146 TEMOD_R_DEC1_DESCR_MODE_BRCM64B66B = 1 /*!< */ 1147 } temod_decode_descr_mode; 1148 1149 /*! \def CNT_temod_decode_descr_mode Types of enum temod_decode_descr_mode */ 1150 #define CNT_temod_decode_descr_mode 2 1151 1152 /*! 1153 \brief 1154 This array returns the string of #temod_decode_descr_mode when indexed by the enum. 1155 1156 */ 1157 extern char* e2s_temod_decode_descr_mode [CNT_temod_decode_descr_mode]; 1158 /*! \enum an_property_enable 1159 1160 No description 1161 1162 */ 1163 1164 typedef enum { 1165 TEMOD_AN_PROPERTY_ENABLE_NONE = 0x00000000 , /*!< */ 1166 TEMOD_AN_PROPERTY_ENABLE_SGMII_MASTER_MODE = 0x00000001 , /*!< */ 1167 TEMOD_AN_PROPERTY_ENABLE_AN_PD_TO_CL37 = 0x00000002 , /*!< */ 1168 TEMOD_AN_PROPERTY_ENABLE_SGMII_TO_CL37_AUTO = 0x00000004 , /*!< */ 1169 TEMOD_AN_PROPERTY_ENABLE_CL37_BAM_to_SGMII_AUTO = 0x00000008 , /*!< */ 1170 TEMOD_AN_PROPERTY_ENABLE_HPAM_TO_CL73_AUTO = 0x00000010 , /*!< */ 1171 TEMOD_AN_PROPERTY_ENABLE_CL73_BAM_TO_HPAM_AUTO = 0x00000020 , /*!< */ 1172 TEMOD_AN_PROPERTY_ENABLE_ILLEGAL = 0x00000040 /*!< */ 1173 } an_property_enable; 1174 1175 /*! \def CNT_an_property_enable Types of enum an_property_enable */ 1176 #define CNT_an_property_enable 8 1177 1178 /*! 1179 \brief 1180 This array returns the string of #an_property_enable when indexed by the enum. 1181 1182 */ 1183 extern char* e2s_an_property_enable [CNT_an_property_enable]; 1184 /*! \enum credit_type_t 1185 1186 No description 1187 1188 */ 1189 1190 typedef enum { 1191 TEMOD_CREDIT_RESET = 0x00000000 , /*!< */ 1192 TEMOD_CREDIT_TABLE = 0x00000001 , /*!< */ 1193 TEMOD_CREDIT_CLOCK_COUNT_0 = 0x00000002 , /*!< */ 1194 TEMOD_CREDIT_CLOCK_COUNT_1 = 0x00000004 , /*!< */ 1195 TEMOD_CREDIT_LOOP_COUNT_0 = 0x00000008 , /*!< */ 1196 TEMOD_CREDIT_LOOP_COUNT_1 = 0x00000010 , /*!< */ 1197 TEMOD_CREDIT_MAC = 0x00000020 , /*!< */ 1198 TEMOD_CREDIT_PCS_CLOCK_COUNT_0 = 0x00000040 , /*!< */ 1199 TEMOD_CREDIT_PCS_GEN_COUNT = 0x00000080 , /*!< */ 1200 TEMOD_CREDIT_EN = 0x00000100 , /*!< */ 1201 TEMOD_CREDIT_PCS_REPCNT = 0x00000200 , /*!< */ 1202 TEMOD_CREDIT_SGMII_SPD = 0x00000400 , /*!< */ 1203 TEMOD_CREDIT_ILLEGAL = 0x00000800 /*!< */ 1204 } credit_type_t; 1205 1206 /*! \def CNT_credit_type_t Types of enum credit_type_t */ 1207 #define CNT_credit_type_t 13 1208 1209 /*! 1210 \brief 1211 This array returns the string of #an_property_enable when indexed by the enum. 1212 1213 */ 1214 extern char* e2s_credit_type_t [CNT_credit_type_t]; 1215 /*! \enum override_type_t 1216 1217 No description 1218 1219 */ 1220 1221 typedef enum { 1222 TEMOD_OVERRIDE_RESET = 0x00000000 , /*!< */ 1223 TEMOD_OVERRIDE_CL72 = 0x00000003 , /*!< */ 1224 TEMOD_OVERRIDE_SPDID = 0x00000007 , /*!< */ 1225 TEMOD_OVERRIDE_NUM_LANES = 0x00000001 , /*!< */ 1226 TEMOD_OVERRIDE_OS_MODE = 0x00000002 , /*!< */ 1227 TEMOD_OVERRIDE_FEC_EN = 0x00000004 , /*!< */ 1228 TEMOD_OVERRIDE_DESKEW_MODE = 0x00000008 , /*!< */ 1229 TEMOD_OVERRIDE_DESC2_MODE = 0x00000010 , /*!< */ 1230 TEMOD_OVERRIDE_CL36BYTEDEL_MODE = 0x00000020 , /*!< */ 1231 TEMOD_OVERRIDE_BRCM64B66_DESCR_MODE = 0x00000040 , /*!< */ 1232 TEMOD_OVERRIDE_CHKEND_EN = 0x00000080 , /*!< */ 1233 TEMOD_OVERRIDE_BLKSYNC_MODE = 0x00000100 , /*!< */ 1234 TEMOD_OVERRIDE_DECODE_MODE = 0x00000200 , /*!< */ 1235 TEMOD_OVERRIDE_REORDER_EN = 0x00000400 , /*!< */ 1236 TEMOD_OVERRIDE_CL36_EN = 0x00000800 , /*!< */ 1237 TEMOD_OVERRIDE_SCR_MODE = 0x00001000 , /*!< */ 1238 TEMOD_OVERRIDE_DESCR_MODE = 0x00002000 , /*!< */ 1239 TEMOD_OVERRIDE_ENCODE_MODE = 0x00004000 , /*!< */ 1240 TEMOD_OVERRIDE_ALL = 0x00008000 /*!< */ 1241 } override_type_t; 1242 1243 /*! \def CNT_override_type_t Types of enum override_type_t */ 1244 #define CNT_override_type_t 19 1245 1246 /*! 1247 \brief 1248 This array returns the string of #an_property_enable when indexed by the enum. 1249 1250 */ 1251 extern char* e2s_override_type_t [CNT_override_type_t]; 1252 /*! \enum temod_ref_clk_t 1253 1254 No description 1255 1256 */ 1257 1258 typedef enum { 1259 TEMODREFCLK156MHZ = 0x00000000 , /*!< 156p25MHz */ 1260 TEMODREFCLK125MHZ = 0x00000001 , /*!< 125MHz */ 1261 TEMODREFCLKCOUNT = 0x00000002 /*!< */ 1262 } temod_ref_clk_t; 1263 1264 /*! \def CNT_temod_ref_clk_t Types of enum temod_ref_clk_t */ 1265 #define CNT_temod_ref_clk_t 3 1266 1267 /*! 1268 \brief 1269 This array returns the string of #an_property_enable when indexed by the enum. 1270 1271 */ 1272 extern char* e2s_temod_ref_clk_t [CNT_temod_ref_clk_t]; 1273 #endif /* _TSCMOD_ENUM_DEFINES_H */