tbhmod_enum_defines.h (61096B)
1 /**************************************************************************** 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * 7 * This source file is the property of Broadcom Corporation, and 8 * may not be copied or distributed in any isomorphic form without the 9 * prior written consent of Broadcom Corporation. 10 *--------------------------------------------------------------------- 11 ############### THIS FILE IS AUTOMATICALLY GENERATED. ############### 12 ############### DO !! NOT !! MANUALLY EDIT THIS FILE. ############### 13 *--------------------------------------------------------------------- 14 * Description: This file contains enums, elems and doxyten comments 15 * needed for SerDes Configuration programs. 16 *--------------------------------------------------------------------- 17 * CVS INFORMATION: 18 * Please see inc/enum_desc.txt for CVS information. 19 *---------------------------------------------------------------------- 20 */ 21 22 /* This file is automatically generated. Do not modify it. Modify the 23 * inc/enum_desc.txt to change enums, elems, or comments. For issues about 24 * the process that creates this file contact the tbhmod development team. 25 */ 26 27 #ifndef _TSCBHMOD_ENUM_DEFINES_H 28 #define _TSCBHMOD_ENUM_DEFINES_H 29 30 /*! \enum tbhmod_lane_select_t 31 32 tbhmod_lane_select_t selects for programming, any combination of 4 lanes of PHY. 33 A '1' in the latter part of the enum name selects the lane. Other parameters 34 will decide what to do with the selected lane(s). In most cases we 35 enable/disable a feature on the selected lanes 36 37 If lane_select is set to TBHMOD_LANE_BCST for writes we broadcast to all lanes. 38 39 Note that you cannot read in broadcast mode. 40 41 */ 42 43 typedef enum { 44 TBHMOD_LANE_0_0_0_0 = 0 , /*!< No lane selected */ 45 TBHMOD_LANE_0_0_0_1 , /*!< lane number 0 selected */ 46 TBHMOD_LANE_0_0_1_0 , /*!< lane number 1 selected */ 47 TBHMOD_LANE_0_0_1_1 , /*!< lane numbers 0,1 selected */ 48 TBHMOD_LANE_0_1_0_0 , /*!< lane number 2 selected */ 49 TBHMOD_LANE_0_1_0_1 , /*!< lane numbers 2,0 selected */ 50 TBHMOD_LANE_0_1_1_0 , /*!< lane numbers 2,1 selected */ 51 TBHMOD_LANE_0_1_1_1 , /*!< lane numbers 2,1,0 selected */ 52 TBHMOD_LANE_1_0_0_0 , /*!< lane number 3 selected */ 53 TBHMOD_LANE_1_0_0_1 , /*!< lane numbers 3,0 selected */ 54 TBHMOD_LANE_1_0_1_0 , /*!< lane numbers 3,1 selected */ 55 TBHMOD_LANE_1_0_1_1 , /*!< lane numbers 3,1,0 selected */ 56 TBHMOD_LANE_1_1_0_0 , /*!< lane numbers 3,2 selected */ 57 TBHMOD_LANE_1_1_0_1 , /*!< lane numbers 3,2,0 selected */ 58 TBHMOD_LANE_1_1_1_0 , /*!< lane numbers 3,2,1 selected */ 59 TBHMOD_LANE_1_1_1_1 , /*!< lane numbers 3,2,1,0 selected */ 60 TBHMOD_LANE_BCST , /*!< lane numbers 3,2,1,0 BCST */ 61 TBHMOD_LANE_ILLEGAL /*!< Illegal (programmatic boundary) */ 62 } tbhmod_lane_select_t; 63 64 /*! \def CNT_tbhmod_lane_select_t Types of enum tbhmod_lane_select_t */ 65 #define CNT_tbhmod_lane_select_t 18 66 67 /*! 68 \brief 69 This array returns the string version of the enum #tbhmod_lane_select_t when 70 indexed by the enum var. 71 72 */ 73 extern char* e2s_tbhmod_lane_select_t [CNT_tbhmod_lane_select_t]; 74 /*! 75 \brief 76 This array associates the enum #tbhmod_lane_select_t enum with a bit mask. 77 The index is the #tbhmod_lane_select_t enum value. The value for each entry is 78 interpreted as follows. If bit [n] is 1, then lane [n] is enabled; if bit [n] 79 is 0, then lane [n] is disabled. By enabled, we mean that such-and-such 80 function is to be called for a lane; by disabled, we mean that such-and-such 81 function is not to be called for a lane. So a value of 0xF indicates that all 82 lanes or enabled, while 0x5 indicates that only lanes 0 and 2 are enabled. 83 84 */ 85 extern int e2n_tbhmod_lane_select_t [CNT_tbhmod_lane_select_t]; 86 /*! \enum tbhmod_spd_intfc_type_t 87 88 All legal speed-interface combination are encapsulated in this enum 89 90 There are several speed and interface combinations allowed for a logical PHY 91 port. Names and speeds are self explanatory. 92 93 Speed and interface selection is combined because we don't want the speeds 94 to be incompatible with interface. 95 96 */ 97 98 typedef enum { 99 100 TBHMOD_SPD_ZERO = 0 , /*!< Illegal value (enum boundary) */ 101 TBHMOD_SPD_10000_XFI , /*!< 10Gb serial XFI */ 102 TBHMOD_SPD_20000_XFI , /*!< 20Gb serial XFI */ 103 TBHMOD_SPD_25000_XFI , /*!< 25Gb serial XFI */ 104 TBHMOD_SPD_40G_MLD_X2 , /*!< 40Gb serial XFI */ 105 TBHMOD_SPD_40G_MLD_X4 , /*!< 40Gb serial XFI */ 106 TBHMOD_SPD_50G_MLD_X2 , /*!< 50Gb serial XFI */ 107 TBHMOD_SPD_50G_MLD_FEC_528_X2 , /*!< 50Gb serial XFI FEC RS528 */ 108 TBHMOD_SPD_100G_MLD_X4 , /*!< 100Gb serial XFI FEC RS528 */ 109 TBHMOD_SPD_100G_MLD_NO_FEC_X4 , /*!< 100Gb serial XFI */ 110 TBHMOD_SPD_CL73_20G , /*!< 1G CL73 Auto-neg */ 111 TBHMOD_SPD_CL73_25G , /*!< 1G CL73 Auto-neg */ 112 TBHMOD_SPD_CL73_26G , /*!< 1G CL73 Auto-neg */ 113 TBHMOD_SPD_200G_BRCM_NO_FEC_KR4_CR4 , /*!< 200G KR4/CR4 */ 114 TBHMOD_SPD_200G_IEEE_FEC_544_2XN_KR4_CR4 , /*!< 200G KR4/CR4 IEEE FEC RS544 2xN */ 115 TBHMOD_SPD_200G_BRCM_FEC_544_1XN_KR4_CR4 , /*!< 200G KR4/CR4 BRCM FEC RS544 1xN */ 116 TBHMOD_SPD_50G_BRCM_NOFEC_KR1_CR1 , /*!< 50G KR1/CR1 BRCM */ 117 TBHMOD_SPD_100G_BRCM_NOFEC_KR2_CR2 , /*!< 100G KR2/CR2 BRCM */ 118 TBHMOD_SPD_50G_BRCM_FEC_544_CR2_KR2 , /*!< 50G KR2/CR2 BRCM FEC RS544 1xN */ 119 TBHMOD_SPD_50G_IEEE_KR1_CR1 , /*!< 50G KR1/CR1 IEEE FEC RS544 1xN */ 120 TBHMOD_SPD_50G_BRCM_FEC_528_CR1_KR1 , /*!< 50G KR1/CR1 BRCM FEC RS528 */ 121 TBHMOD_SPD_100G_IEEE_KR2_CR2 , /*!< 100G KR2/CR2 IEEE FEC RS544 2xN */ 122 TBHMOD_SPD_100G_BRCM_FEC_544_1XN_KR4_CR4 , /*!< 100G KR4/CR4 BRCM FEC RS544 1xN */ 123 TBHMOD_SPD_100G_BRCM_FEC_528_KR2_CR2 , /*!< 100G KR2/CR2 BRCM FEC RS528 */ 124 TBHMOD_SPD_400G_IEEE_FEC_544_2XN_X8 , /*!< 400G X8 IEEE FEC RS544 2xN */ 125 TBHMOD_SPD_CUSTOM_ENTRY_56 , /*!< Custom Entry at 56 */ 126 TBHMOD_SPD_CUSTOM_ENTRY_57 , /*!< Custom Entry at 57 */ 127 TBHMOD_SPD_CUSTOM_ENTRY_58 , /*!< Custom Entry at 58 */ 128 TBHMOD_SPD_CUSTOM_ENTRY_59 , /*!< Custom Entry at 59 */ 129 TBHMOD_SPD_CUSTOM_ENTRY_60 , /*!< Custom Entry at 60 */ 130 TBHMOD_SPD_CUSTOM_ENTRY_61 , /*!< Custom Entry at 61 */ 131 TBHMOD_SPD_CUSTOM_ENTRY_62 , /*!< Custom Entry at 62 */ 132 TBHMOD_SPD_CUSTOM_ENTRY_63 , /*!< Custom Entry at 63 */ 133 TBHMOD_SPD_10G_FEC_BASE_R_KR1_CR1 , /*!< 10G XFI FEC BASE_R */ 134 TBHMOD_SPD_20G_FEC_BASE_R_KR1_CR1 , /*!< 20G KR1/CR1 FEC BASE_R */ 135 TBHMOD_SPD_25G_FEC_BASE_R_KR1_CR1 , /*!< 25G KR1/CR1 FEC BASE R */ 136 TBHMOD_SPD_25G_FEC_RS_FEC_KR1_CR1 , /*!< 25G KR1/CR1 FEC RS528 */ 137 TBHMOD_SPD_40G_FEC_BASE_R_KR4_CR4 , /*!< 40G KR4/CR4 FEC BASE R */ 138 TBHMOD_SPD_50G_BRCM_FEC_272_KR1_CR1 , /*!< 50G KR1/CR1 FEC RS272 1xN */ 139 TBHMOD_SPD_100G_BRCM_FEC_272_KR2_CR2 , /*!< 100G KR2/CR2 FEC RS272 2xN */ 140 TBHMOD_SPD_200G_BRCM_FEC_272_2XN_KR4_CR4 , /*!< 200G KR4/CR4 FEC RS272 2xN */ 141 TBHMOD_SPD_200G_BRCM_FEC_272_1XN_KR4_CR4 , /*!< 200G KR4/CR4 FEC RS272 1xN */ 142 TBHMOD_SPD_400G_BRCM_FEC_544_2XN_X8 , /*!< 400G BRCM X8 FEC RS544 2xN */ 143 TBHMOD_SPD_400G_BRCM_FEC_272_2XN_X8 , /*!< 400G BRCM X8 FEC RS272 2xN */ 144 TBHMOD_SPD_150G_FEC_544_2XN_N3 , /*!< RLM 150G N3 FEC RS544 2xN */ 145 TBHMOD_SPD_300G_FEC_544_2XN_N6 , /*!< RLM 300G N6 FEC RS544 2xN */ 146 TBHMOD_SPD_350G_FEC_544_2XN_N7 , /*!< RLM 350G N7 FEC RS544 2xN */ 147 TBHMOD_SPD_12P5G_BRCM_KR1 , /*!< 12G KR1 */ 148 TBHMOD_SPD_ILLEGAL /*!< Illegal value (enum boundary)*/ 149 } tbhmod_spd_intfc_type_t; 150 151 /*! \def CNT_tbhmod_spd_intfc_type_t Types of enum tbhmod_spd_intfc_type_t */ 152 #define CNT_tbhmod_spd_intfc_type_t 48 153 154 155 /*! 156 \brief 157 This array returns the string version of the enum #tbhmod_lane_select_t when 158 indexed by the enum var. 159 160 */ 161 extern char* e2s_tbhmod_spd_intfc_type_t [CNT_tbhmod_spd_intfc_type_t]; 162 /*! 163 \brief 164 This array associates the enum #tbhmod_lane_select_t enum with a bit mask. 165 The index is the #tbhmod_lane_select_t enum value. The value for each entry is 166 interpreted as follows. If bit [n] is 1, then lane [n] is enabled; if bit [n] 167 is 0, then lane [n] is disabled. By enabled, we mean that such-and-such 168 function is to be called for a lane; by disabled, we mean that such-and-such 169 function is not to be called for a lane. So a value of 0xF indicates that all 170 lanes or enabled, while 0x5 indicates that only lanes 0 and 2 are enabled. 171 172 */ 173 extern int e2n_tbhmod_spd_intfc_type_t [CNT_tbhmod_spd_intfc_type_t]; 174 /*! \enum tbhmod_regacc_type_t 175 176 MDIO access to PHY registers are no longer supported. 177 178 */ 179 180 typedef enum { 181 TBHMOD_REGACC_CL22 = 0 , /*!< IEEE clause 22 based MDIO (for PMD only) */ 182 TBHMOD_REGACC_CL45 , /*!< IEEE clause 45 based MDIO (for PMD only) */ 183 TBHMOD_REGACC_TOTSC , /*!< Mission mode */ 184 TBHMOD_REGACC_SBUS_FD , /*!< Probably used in PM testbenches */ 185 TBHMOD_REGACC_SBUS_BD , /*!< Probably used in PM testbenches */ 186 TBHMOD_REGACC_ILLEGAL /*!< Illegal value (enum boundary) */ 187 } tbhmod_regacc_type_t; 188 189 /*! \def CNT_tbhmod_regacc_type_t Types of enum tbhmod_regacc_type_t */ 190 #define CNT_tbhmod_regacc_type_t 6 191 192 /*! 193 \brief 194 This array returns the string version of the enum #e2s_tbhmod_regacc_type_t when indexed 195 by the enum var. 196 197 */ 198 extern char* e2s_tbhmod_regacc_type_t [CNT_tbhmod_regacc_type_t]; 199 /*! \enum tbhmod_port_type_t 200 201 This is the port mode type enumeration. 202 203 WC can be configured in combo mode (i.e. entire WC is a single port) or 204 independent mode (i.e. WC has more than one port (2, 3, or 4) that are 205 controlled individually. 206 207 */ 208 209 typedef enum { 210 TBHMOD_MULTI_PORT = 0 , /*!< Each channel is one logical port */ 211 TBHMOD_TRI1_PORT , /*!< 3 ports, one of them paird as follows (0,1,2-3) */ 212 TBHMOD_TRI2_PORT , /*!< 3 ports, one of them paird as follows (0-1,2,3) */ 213 TBHMOD_DXGXS , /*!< Each paired channel(0-1, 2-3) is one logical port */ 214 TBHMOD_SINGLE_PORT , /*!< single port mode: 4 channels as one logical port */ 215 TBHMOD_SINGLE_OCTAL_PORT , /*!< single port mode: 8 channels as one logical port */ 216 TBHMOD_PORT_MODE_ILLEGAL /*!< Illegal value (enum boundary) */ 217 } tbhmod_port_type_t; 218 219 /*! \def CNT_tbhmod_port_type_t Types of enum tbhmod_port_type_t */ 220 #define CNT_tbhmod_port_type_t 7 221 222 /*! 223 \brief 224 This array returns the string version of the enum #tbhmod_port_type_t when indexed 225 by the enum var. 226 227 */ 228 extern char* e2s_tbhmod_port_type_t [CNT_tbhmod_port_type_t]; 229 /*! \enum tbhmod_sc_mode_type_t 230 231 This is the sc mode type enumeration. 232 233 234 235 */ 236 237 typedef enum { 238 TBHMOD_SC_MODE_HT_WITH_BASIC_OVERRIDE = 0 , /*!< TBHMOD_SC_MODE_HT_WITH_BASIC_OVERRIDE */ 239 TBHMOD_SC_MODE_HT_OVERRIDE , /*!< TBHMOD_SC_MODE_ST_OVERRIDE */ 240 TBHMOD_SC_MODE_ST , /*!< TBHMOD_SC_MODE_ST */ 241 TBHMOD_SC_MODE_ST_OVERRIDE , /*!< TBHMOD_SC_MODE_ST */ 242 TBHMOD_SC_MODE_AN_CL37 , /*!< TBHMOD_SC_MODE_AN_CL73 */ 243 TBHMOD_SC_MODE_AN_CL73 , /*!< TBHMOD_SC_MODE_AN_CL73 */ 244 TBHMOD_SC_MODE_BYPASS , /*!< TBHMOD_SC_MODE_BYPASS */ 245 TBHMOD_SC_MODE_ILLEGAL /*!< Illegal value (enum boundary) */ 246 } tbhmod_sc_mode_type_t; 247 248 /*! \def CNT_tbhmod_sc_mode_type_t Types of enum tbhmod_sc_mode_type_t */ 249 #define CNT_tbhmod_sc_mode_type_t 8 250 251 /*! 252 \brief 253 This array returns the string version of the enum #tbhmod_port_type_t when indexed 254 by the enum var. 255 256 */ 257 extern char* e2s_tbhmod_sc_mode_type_t [CNT_tbhmod_sc_mode_type_t]; 258 /*! \enum tbhmod_diag_type_t 259 260 tbhmod_diag_type_t enumerates categories of diagnostic data. 261 has many intermediate stages between down and up. This enum is work in progress 262 263 264 <table cellspacing=0> 265 <tr><td colspan=3><B>'per_lane_control' bit-mappings</B></td></tr> 266 267 <tr><td><B>Type</B></td><td><B>Description</B></td><td><B>Scope</B></td></tr> 268 269 <tr><td>General</td> 270 <td> Combo/independent, Device and Revision Id, VCO settings, Firmware state 271 and version, active/passive lanes, MDIO type. PLL info, Oversampling Info</td> 272 <td>Device</td></tr> 273 274 <tr><td>Link</td> 275 <td> Speeds, oversampling, interface, forced/Autoneg, link status, sync 276 status, RX sequencer on/off </td> 277 <td>Lane</td></tr> 278 279 <tr><td>Autoneg</td> 280 <td> Local and remote advertisement, link status, cl73/37/BAM info </td> 281 <td>Lane</td></tr> 282 283 <tr><td>Internal Traffic</td> 284 <td> PRBS type, CJPat Type, Prog_data value, Any associated recorded errors, 285 and misc. info (IPG etc.)</td> 286 <td>Lane </td></tr> 287 288 <tr> 289 <td>DFE</td> 290 <td>Equalization info, Tap settings. (pre/post/overrides), peaking filter values </td> 291 <td>Lane</td></tr> 292 293 <tr><td>IEEE info</td> 294 <td>Clause 72, FEC</td> 295 <td>Lane</td></tr> 296 297 <tr><td>Topology</td> 298 <td>Looping info (Gloop/rloop), lane swapping, polarity swap info</td> 299 <td>Device</td></tr> 300 301 <tr><td>EEE</td> 302 <td>EEE full, passthru modes, some window values?</td> 303 <td>Lane</td></tr> 304 305 <tr><td>Eye Margin</td> 306 <td>Eye margin measurement (readout only)</td> 307 <td>Lane</td></tr> 308 309 <tr><td>All</td> 310 <td>All of the above. Except eye margin.</td> 311 <td>Device</td></tr> 312 313 </table> 314 315 316 */ 317 318 typedef enum { 319 TBHMOD_DIAG_GENERAL = 0x00000001 , /*!< General device wide information. */ 320 TBHMOD_DIAG_TOPOLOGY = 0x00000002 , /*!< Loopbacks etc. */ 321 TBHMOD_DIAG_LINK = 0x00000004 , /*!< Link specific info. */ 322 TBHMOD_DIAG_SPEED = 0x00000008 , /*!< sub-category of TBHMOD_DIAG_LINK(for SDK) */ 323 TBHMOD_DIAG_ANEG = 0x00000010 , /*!< Autoneg specific info. */ 324 TBHMOD_DIAG_TFC = 0x00000020 , /*!< State of tx/rx internal tfc */ 325 TBHMOD_DIAG_AN_TIMERS = 0x00000040 , /*!< AN timers */ 326 TBHMOD_DIAG_STATE = 0x00000080 , /*!< Debug state registers */ 327 TBHMOD_DIAG_DEBUG = 0x00000100 , /*!< Debug */ 328 TBHMOD_DIAG_IEEE = 0x00000200 , /*!< IEEE related info */ 329 TBHMOD_DIAG_EEE = 0x00000400 , /*!< EEE */ 330 TBHMOD_SERDES_DIAG = 0x00000800 , /*!< PMD Triage */ 331 TBHMOD_DIAG_ALL = 0x00000fff , /*!< Everything but eye margin */ 332 TBHMOD_DIAG_ILLEGAL = 0x00000000 /*!< Illegal value. programmatic boundary. */ 333 } tbhmod_diag_type_t; 334 335 /*! \def CNT_tbhmod_diag_type_t Types of enum tbhmod_diag_type_t */ 336 #define CNT_tbhmod_diag_type_t 14 337 338 /*! 339 \brief 340 This array returns the string version of the enum #tbhmod_port_type_t when indexed 341 by the enum var. 342 343 */ 344 extern char* e2s_tbhmod_diag_type_t [CNT_tbhmod_diag_type_t]; 345 /*! \enum tbhmod_model_type_t 346 347 tbhmod_model_type_t enumerates different generations and revisions of PHY. 348 Note that we pretty much only look at different versions of PHY. 349 350 We rely on all the information being in the SERDES_ID register. 351 352 353 */ 354 355 typedef enum { 356 TBHMOD_WC = 0 , /*!< Generic PHY (any model) */ 357 TBHMOD_WC_A0 , /*!< PHY Version A0 */ 358 TBHMOD_WC_A1 , /*!< PHY Version A1 */ 359 TBHMOD_WC_A2 , /*!< PHY Version A2 */ 360 TBHMOD_WC_B0 , /*!< PHY Version B0 */ 361 TBHMOD_WC_B1 , /*!< PHY Version B1 */ 362 TBHMOD_WC_B2 , /*!< PHY Version B2 */ 363 TBHMOD_WC_C0 , /*!< PHY Version C0, model no. differs from other WCs */ 364 TBHMOD_WC_C1 , /*!< PHY Version C1, model no. differs from other WCs */ 365 TBHMOD_WC_C2 , /*!< PHY Version C2, model no. differs from other WCs */ 366 TBHMOD_WC_D0 , /*!< PHY Version D0 */ 367 TBHMOD_WC_D1 , /*!< PHY Version D1 */ 368 TBHMOD_WC_D2 , /*!< PHY Version D2 */ 369 TBHMOD_XN , /*!< Generic Xenia Core (any model) */ 370 TBHMOD_WL , /*!< Generic PHY Lite (any model) */ 371 TBHMOD_WL_A0 , /*!< WarpLite Core */ 372 TBHMOD_QS , /*!< Generic QSGMII core (any model) */ 373 TBHMOD_QS_A0 , /*!< QSGMII core Version A0 */ 374 TBHMOD_QS_B0 , /*!< QSGMII core Version B0 */ 375 TBHMOD_MODEL_TYPE_ILLEGAL /*!< Illegal value. programmatic boundary. */ 376 } tbhmod_model_type_t; 377 378 /*! \def CNT_tbhmod_model_type_t Types of enum tbhmod_model_type_t */ 379 #define CNT_tbhmod_model_type_t 20 380 381 /*! 382 \brief 383 This array returns the string version of the enum #tbhmod_port_type_t when indexed 384 by the enum var. 385 386 */ 387 extern char* e2s_tbhmod_model_type_t [CNT_tbhmod_model_type_t]; 388 389 /*! \def CNT_tbhmod_an_type_t Types of enum tbhmod_an_type_t */ 390 #define CNT_tbhmod_an_type_t 7 391 392 /*! 393 \brief 394 This array returns the string version of the enum #tbhmod_port_type_t when indexed 395 by the enum var. 396 397 */ 398 extern char* e2s_tbhmod_an_type_t [CNT_tbhmod_an_type_t]; 399 /*! \enum tbhmod_eye_direction_t 400 401 The direction of slicer changing always moves from the middle of the eye. 402 Currently all speeds have the following bit positions. 403 404 405 \li TBHMOD_EYE_VU: Vertical, Upward direction 406 \li TBHMOD_EYE_VD: Vertical, Downward direction 407 \li TBHMOD_EYE_HL: Horizontal, Left direction 408 \li TBHMOD_EYE_HR: Horizontal, Right direction 409 410 411 */ 412 413 typedef enum { 414 TBHMOD_EYE_VU = 0 , /*!< Vertical, Upward direction */ 415 TBHMOD_EYE_VD , /*!< Vertical, Downward direction */ 416 TBHMOD_EYE_HL , /*!< Horizontal, Left direction */ 417 TBHMOD_EYE_HR , /*!< Horizontal, Right direction */ 418 TBHMOD_EYE_ILLEGAL /*!< Programmatic illegal boundary. */ 419 } tbhmod_eye_direction_t; 420 421 /*! \def CNT_tbhmod_eye_direction_t Types of enum tbhmod_eye_direction_t */ 422 #define CNT_tbhmod_eye_direction_t 5 423 424 /*! 425 \brief 426 This array returns the string version of the enum #tbhmod_port_type_t when indexed 427 by the enum var. 428 429 */ 430 extern char* e2s_tbhmod_eye_direction_t [CNT_tbhmod_eye_direction_t]; 431 432 433 typedef enum { 434 TBHMOD_ASPD_10M = 0 , /*!< No documentation */ 435 TBHMOD_ASPD_100M , /*!< No documentation */ 436 TBHMOD_ASPD_1000M , /*!< No documentation */ 437 TBHMOD_ASPD_2p5G_X1 , /*!< No documentation */ 438 TBHMOD_ASPD_5G_X4 , /*!< No documentation */ 439 TBHMOD_ASPD_6G_X4 , /*!< No documentation */ 440 TBHMOD_ASPD_10G_X4 , /*!< No documentation */ 441 TBHMOD_ASPD_10G_CX4 , /*!< No documentation */ 442 TBHMOD_ASPD_12G_X4 , /*!< No documentation */ 443 TBHMOD_ASPD_12p5G_X4 , /*!< No documentation */ 444 TBHMOD_ASPD_13G_X4 , /*!< No documentation */ 445 TBHMOD_ASPD_15G_X4 , /*!< No documentation */ 446 TBHMOD_ASPD_16G_X4 , /*!< No documentation */ 447 TBHMOD_ASPD_1G_KX1 , /*!< No documentation */ 448 TBHMOD_ASPD_10G_KX4 , /*!< No documentation */ 449 TBHMOD_ASPD_10G_KR1 , /*!< No documentation */ 450 TBHMOD_ASPD_5G_X1 , /*!< No documentation */ 451 TBHMOD_ASPD_6p36G_X1 , /*!< No documentation */ 452 TBHMOD_ASPD_20G_CX4 , /*!< No documentation */ 453 TBHMOD_ASPD_21G_X4 , /*!< No documentation */ 454 TBHMOD_ASPD_25p45G_X4 , /*!< No documentation */ 455 TBHMOD_ASPD_10G_X2_NOSCRAMBLE , /*!< No documentation */ 456 TBHMOD_ASPD_10G_CX2_NOSCRAMBLE , /*!< No documentation */ 457 TBHMOD_ASPD_10p5G_X2 , /*!< No documentation */ 458 TBHMOD_ASPD_10p5G_CX2_NOSCRAMBLE , /*!< No documentation */ 459 TBHMOD_ASPD_12p7G_X2 , /*!< No documentation */ 460 TBHMOD_ASPD_12p7G_CX2 , /*!< No documentation */ 461 TBHMOD_ASPD_10G_X1 , /*!< No documentation */ 462 TBHMOD_ASPD_40G_X4 , /*!< No documentation */ 463 TBHMOD_ASPD_20G_X2 , /*!< No documentation */ 464 TBHMOD_ASPD_20G_CX2 , /*!< No documentation */ 465 TBHMOD_ASPD_10G_SFI , /*!< No documentation */ 466 TBHMOD_ASPD_31p5G_X4 , /*!< No documentation */ 467 TBHMOD_ASPD_32p7G_X4 , /*!< No documentation */ 468 TBHMOD_ASPD_20G_X4 , /*!< No documentation */ 469 TBHMOD_ASPD_10G_X2 , /*!< No documentation */ 470 TBHMOD_ASPD_10G_CX2 , /*!< No documentation */ 471 TBHMOD_ASPD_12G_SCO_R2 , /*!< No documentation */ 472 TBHMOD_ASPD_10G_SCO_X2 , /*!< No documentation */ 473 TBHMOD_ASPD_40G_KR4 , /*!< No documentation */ 474 TBHMOD_ASPD_40G_CR4 , /*!< No documentation */ 475 TBHMOD_ASPD_100G_CR10 , /*!< No documentation */ 476 TBHMOD_ASPD_5G_X2 , /*!< No documentation */ 477 TBHMOD_ASPD_15p75G_X2 , /*!< No documentation */ 478 TBHMOD_ASPD_2G_FC , /*!< No documentation */ 479 TBHMOD_ASPD_4G_FC , /*!< No documentation */ 480 TBHMOD_ASPD_8G_FC , /*!< No documentation */ 481 TBHMOD_ASPD_10G_CX1 , /*!< No documentation */ 482 TBHMOD_ASPD_1G_CX1 , /*!< No documentation */ 483 TBHMOD_ASPD_20G_KR2 , /*!< No documentation */ 484 TBHMOD_ASPD_20G_CR2 , /*!< No documentation */ 485 TBHMOD_ASPD_TYPE_ILLEGAL /*!< Programmatic illegal boundary. */ 486 } tbhmod_aspd_type_t; 487 488 /*! \def CNT_tbhmod_aspd_type_t Types of enum tbhmod_aspd_type_t */ 489 #define CNT_tbhmod_aspd_type_t 52 490 491 /*! 492 \brief 493 This array returns the string version of the enum #tbhmod_port_type_t when indexed 494 by the enum var. 495 496 */ 497 extern char* e2s_tbhmod_aspd_type_t [CNT_tbhmod_aspd_type_t]; 498 /*! 499 \brief 500 This array associates the enum #tbhmod_lane_select_t enum with a bit mask. 501 The index is the #tbhmod_lane_select_t enum value. The value for each entry is 502 interpreted as follows. If bit [n] is 1, then lane [n] is enabled; if bit [n] 503 is 0, then lane [n] is disabled. By enabled, we mean that such-and-such 504 function is to be called for a lane; by disabled, we mean that such-and-such 505 function is not to be called for a lane. So a value of 0xF indicates that all 506 lanes or enabled, while 0x5 indicates that only lanes 0 and 2 are enabled. 507 508 */ 509 extern int e2n_tbhmod_aspd_type_t [CNT_tbhmod_aspd_type_t]; 510 /*! \enum tbhmod_ieee_tech_ability_t 511 512 tbhmod_ieee_tech_ability_t enumerates different types of speed advertisements in the 513 basic autoneg page. Currently for CL73 only. 514 515 Currently all speeds have the following bit positions in tbhmod_st 516 517 \li TBHMOD_IEEE_ABILITY_1G Bit Pos: 0 518 \li TBHMOD_IEEE_ABILITY_10G_KX4 Bit Pos: 1 519 \li TBHMOD_IEEE_ABILITY_10G_KR Bit Pos: 1 520 \li TBHMOD_IEEE_ABILITY_40G_KR4 Bit Pos: 2 521 \li TBHMOD_IEEE_ABILITY_40G_CR4 Bit Pos: 3 522 \li TBHMOD_IEEE_ABILITY_100G_CR10 Bit Pos: 4 523 \li TBHMOD_IEEE_ABILITY_100G_KP4 Bit Pos: 7 524 \li TBHMOD_IEEE_ABILITY_100G_KR4 Bit Pos: 5 525 \li TBHMOD_IEEE_ABILITY_100G_CR4 Bit Pos: 7 526 \li TBHMOD_IEEE_ABILITY_25G_KS1_CS1 Bit Pos: 9 527 \li TBHMOD_IEEE_ABILITY_25G_KR1_CR1 Bit Pos: 10 528 529 530 */ 531 532 typedef enum { 533 TBHMOD_IEEE_ABILITY_1G = 0 , /*!< please write comments */ 534 TBHMOD_IEEE_ABILITY_10G_KX4 , /*!< please write comments */ 535 TBHMOD_IEEE_ABILITY_10G_KR , /*!< please write comments */ 536 TBHMOD_IEEE_ABILITY_40G_KR4 , /*!< please write comments */ 537 TBHMOD_IEEE_ABILITY_40G_CR4 , /*!< please write comments */ 538 TBHMOD_IEEE_ABILITY_100G_CR10 , /*!< please write comments */ 539 TBHMOD_IEEE_ABILITY_100G_KP4 , /*!< please write comments */ 540 TBHMOD_IEEE_ABILITY_100G_KR4 , /*!< please write comments */ 541 TBHMOD_IEEE_ABILITY_100G_CR4 , /*!< please write comments */ 542 TBHMOD_IEEE_ABILITY_25G_KS1_CS1 , /*!< please write comments */ 543 TBHMOD_IEEE_ABILITY_25G_KR1_CR1 /*!< please write comments */ 544 } tbhmod_ieee_tech_ability_t; 545 546 /*! \def CNT_tbhmod_ieee_tech_ability_t Types of enum tbhmod_ieee_tech_ability_t */ 547 #define CNT_tbhmod_ieee_tech_ability_t 9 548 549 /*! 550 \brief 551 This array returns the string version of the enum #tbhmod_port_type_t when indexed 552 by the enum var. 553 554 */ 555 extern char* e2s_tbhmod_ieee_tech_ability_t [CNT_tbhmod_ieee_tech_ability_t]; 556 /*! 557 \brief 558 This array associates the enum #tbhmod_lane_select_t enum with a bit mask. 559 The index is the #tbhmod_lane_select_t enum value. The value for each entry is 560 interpreted as follows. If bit [n] is 1, then lane [n] is enabled; if bit [n] 561 is 0, then lane [n] is disabled. By enabled, we mean that such-and-such 562 function is to be called for a lane; by disabled, we mean that such-and-such 563 function is not to be called for a lane. So a value of 0xF indicates that all 564 lanes or enabled, while 0x5 indicates that only lanes 0 and 2 are enabled. 565 566 */ 567 extern int e2n_tbhmod_ieee_tech_ability_t [CNT_tbhmod_ieee_tech_ability_t]; 568 /*! \enum tbhmod_cl73_bam_up1_tech_ability0_t 569 570 tbhmod_cl73_bam_up1_tech_ability0_t enumerates different types of speed advertisements in the 571 bam up1 ability0 autoneg page 572 573 Currently all speeds have the following bit positions in tbhmod_st 574 575 \li TBHMOD_BAM_UP0_ABILITY0_20G_KR2 Bit Pos: 0 576 \li TBHMOD_BAM_UP0_ABILITY0_20G_CR2 Bit Pos: 1 577 \li TBHMOD_BAM_UP0_ABILITY0_40G_KR2 Bit Pos: 2 578 \li TBHMOD_BAM_UP0_ABILITY0_40G_CR2 Bit Pos: 3 579 \li TBHMOD_BAM_UP0_ABILITY0_400G_FEC_KR8_CR8 Bit Pos: 4 580 \li TBHMOD_BAM_UP0_ABILITY0_400G_NO_FEC_KR8_CR8 Bit Pos: 5 581 \li TBHMOD_BAM_UP0_ABILITY0_50G_KR2 Bit Pos: 6 582 \li TBHMOD_BAM_UP0_ABILITY0_50G_CR2 Bit Pos: 7 583 \li TBHMOD_BAM_UP0_ABILITY0_50G_KR4 Bit Pos: 8 584 \li TBHMOD_BAM_UP0_ABILITY0_50G_CR4 Bit Pos: 9 585 \li TBHMOD_BAM_UP0_ABILITY0_50G_FEC_528_CR1_KR1 Bit Pos: 10 586 \li TBHMOD_BAM_UP0_ABILITY0_50G_NO_FEC_CR1_KR1 Bit Pos: 11 587 \li TBHMOD_BAM_UP0_ABILITY0_50G_FEC_544_CR1_KR1 Bit Pos: 12 588 \li TBHMOD_BAM_UP0_ABILITY0_RSVD_22 Bit Pos: 13 589 \li TBHMOD_BAM_UP0_ABILITY0_RSVD_19 Bit Pos: 14 590 \li TBHMOD_BAM_UP0_ABILITY0_50G_FEC_544_CR2_KR2 Bit Pos: 15 591 592 593 */ 594 595 typedef enum { 596 TBHMOD_BAM_UP0_ABILITY0_20G_KR2 = 0 , /*!< please write comments */ 597 TBHMOD_BAM_UP0_ABILITY0_20G_CR2 , /*!< please write comments */ 598 TBHMOD_BAM_UP0_ABILITY0_40G_KR2 , /*!< please write comments */ 599 TBHMOD_BAM_UP0_ABILITY0_40G_CR2 , /*!< please write comments */ 600 TBHMOD_BAM_UP0_ABILITY0_400G_FEC_KR8_CR8 , /*!< please write comments */ 601 TBHMOD_BAM_UP0_ABILITY0_400G_NO_FEC_KR8_CR8 , /*!< please write comments */ 602 TBHMOD_BAM_UP0_ABILITY0_50G_KR2 , /*!< please write comments */ 603 TBHMOD_BAM_UP0_ABILITY0_50G_CR2 , /*!< please write comments */ 604 TBHMOD_BAM_UP0_ABILITY0_50G_KR4 , /*!< please write comments */ 605 TBHMOD_BAM_UP0_ABILITY0_50G_CR4 , /*!< please write comments */ 606 TBHMOD_BAM_UP0_ABILITY0_50G_FEC_528_CR1_KR1 , /*!< please write comments */ 607 TBHMOD_BAM_UP0_ABILITY0_50G_NO_FEC_CR1_KR1 , /*!< please write comments */ 608 TBHMOD_BAM_UP0_ABILITY0_50G_FEC_544_CR1_KR1 , /*!< please write comments */ 609 TBHMOD_BAM_UP0_ABILITY0_RSVD_22 , /*!< please write comments */ 610 TBHMOD_BAM_UP0_ABILITY0_RSVD_19 , /*!< please write comments */ 611 TBHMOD_BAM_UP0_ABILITY0_50G_FEC_544_CR2_KR2 /*!< please write comments */ 612 } tbhmod_cl73_bam_up1_tech_ability0_t; 613 614 /*! \def CNT_tbhmod_cl73_bam_up1_tech_ability0_t Types of enum tbhmod_cl73_bam_up1_tech_ability0_t */ 615 #define CNT_tbhmod_cl73_bam_up1_tech_ability0_t 16 616 617 /*! 618 \brief 619 This array returns the string version of the enum #tbhmod_port_type_t when indexed 620 by the enum var. 621 622 */ 623 extern char* e2s_tbhmod_cl73_bam_up1_tech_ability0_t [CNT_tbhmod_cl73_bam_up1_tech_ability0_t]; 624 /*! 625 \brief 626 This array associates the enum #tbhmod_lane_select_t enum with a bit mask. 627 The index is the #tbhmod_lane_select_t enum value. The value for each entry is 628 interpreted as follows. If bit [n] is 1, then lane [n] is enabled; if bit [n] 629 is 0, then lane [n] is disabled. By enabled, we mean that such-and-such 630 function is to be called for a lane; by disabled, we mean that such-and-such 631 function is not to be called for a lane. So a value of 0xF indicates that all 632 lanes or enabled, while 0x5 indicates that only lanes 0 and 2 are enabled. 633 634 */ 635 extern int e2n_tbhmod_cl73_bam_up1_tech_ability0_t [CNT_tbhmod_cl73_bam_up1_tech_ability0_t]; 636 /*! \enum tbhmod_cl73_bam_up1_tech_ability1_t 637 638 tbhmod_cl73_bam_up1_tech_ability1_t enumerates different types of speed advertisements in the 639 bam up1 ability0 autoneg page 640 641 Currently all speeds have the following bit positions in tbhmod_st 642 643 \li TBHMOD_BAM_UP0_ABILITY1_RSVD Bit Pos: 0 644 \li TBHMOD_BAM_UP0_ABILITY1_20G_KR1 Bit Pos: 1 645 \li TBHMOD_BAM_UP0_ABILITY1_20G_CR1 Bit Pos: 2 646 \li TBHMOD_BAM_UP0_ABILITY1_25G_KR1 Bit Pos: 3 647 \li TBHMOD_BAM_UP0_ABILITY1_25G_CR1 Bit Pos: 4 648 \li TBHMOD_BAM_UP0_ABILITY1_100G_NO_FEC_X4 Bit Pos: 5 649 \li TBHMOD_BAM_UP0_ABILITY1_100G_NO_FEC_KR2_CR2 Bit Pos: 6 650 \li TBHMOD_BAM_UP0_ABILITY1_100G_FEC_528_KR2_CR2 Bit Pos: 7 651 \li TBHMOD_BAM_UP0_ABILITY1_100G_KR4_CR4 Bit Pos: 8 652 \li TBHMOD_BAM_UP0_ABILITY1_200G_KR4_CR4 Bit Pos: 9 653 \li TBHMOD_BAM_UP0_ABILITY1_200G_NO_FEC_KR4_CR4 Bit Pos: 10 654 \li TBHMOD_BAM_UP0_ABILITY1_RSVD_11 Bit Pos: 11 655 \li TBHMOD_BAM_UP0_ABILITY1_RS_FEC_REQ Bit Pos: 12 656 \li TBHMOD_BAM_UP0_ABILITY1_RS_FEC_REQ_DUMMY Bit Pos: 13 657 \li TBHMOD_BAM_UP0_ABILITY1_CL74C_REQ Bit Pos: 14 658 \li TBHMOD_BAM_UP0_ABILITY1_CL74C_REQ_DUMMY Bit Pos: 15 659 660 661 */ 662 663 typedef enum { 664 TBHMOD_BAM_UP0_ABILITY1_RSVD = 0 , /*!< please write comments */ 665 TBHMOD_BAM_UP0_ABILITY1_20G_KR1 , /*!< please write comments */ 666 TBHMOD_BAM_UP0_ABILITY1_20G_CR1 , /*!< please write comments */ 667 TBHMOD_BAM_UP0_ABILITY1_25G_KR1 , /*!< please write comments */ 668 TBHMOD_BAM_UP0_ABILITY1_25G_CR1 , /*!< please write comments */ 669 TBHMOD_BAM_UP0_ABILITY1_100G_NO_FEC_X4 , /*!< please write comments */ 670 TBHMOD_BAM_UP0_ABILITY1_100G_NO_FEC_KR2_CR2 , /*!< please write comments */ 671 TBHMOD_BAM_UP0_ABILITY1_100G_FEC_528_KR2_CR2 , /*!< please write comments */ 672 TBHMOD_BAM_UP0_ABILITY1_100G_KR4_CR4 , /*!< please write comments */ 673 TBHMOD_BAM_UP0_ABILITY1_200G_KR4_CR4 , /*!< please write comments */ 674 TBHMOD_BAM_UP0_ABILITY1_200G_NO_FEC_KR4_CR4 , /*!< please write comments */ 675 TBHMOD_BAM_UP0_ABILITY1_RSVD_11 , /*!< please write comments */ 676 TBHMOD_BAM_UP0_ABILITY1_RS_FEC_REQ , /*!< please write comments */ 677 TBHMOD_BAM_UP0_ABILITY1_RS_FEC_REQ_DUMMY , /*!< please write comments */ 678 TBHMOD_BAM_UP0_ABILITY1_CL74C_REQ , /*!< please write comments */ 679 TBHMOD_BAM_UP0_ABILITY1_CL74C_REQ_DUMMY /*!< please write comments */ 680 } tbhmod_cl73_bam_up1_tech_ability1_t; 681 682 /*! \def CNT_tbhmod_cl73_bam_up1_tech_ability1_t Types of enum tbhmod_cl73_bam_up1_tech_ability1_t */ 683 #define CNT_tbhmod_cl73_bam_up1_tech_ability1_t 16 684 685 /*! 686 \brief 687 This array returns the string version of the enum #tbhmod_port_type_t when indexed 688 by the enum var. 689 690 */ 691 extern char* e2s_tbhmod_cl73_bam_up1_tech_ability1_t [CNT_tbhmod_cl73_bam_up1_tech_ability1_t]; 692 /*! 693 \brief 694 This array associates the enum #tbhmod_lane_select_t enum with a bit mask. 695 The index is the #tbhmod_lane_select_t enum value. The value for each entry is 696 interpreted as follows. If bit [n] is 1, then lane [n] is enabled; if bit [n] 697 is 0, then lane [n] is disabled. By enabled, we mean that such-and-such 698 function is to be called for a lane; by disabled, we mean that such-and-such 699 function is not to be called for a lane. So a value of 0xF indicates that all 700 lanes or enabled, while 0x5 indicates that only lanes 0 and 2 are enabled. 701 702 */ 703 extern int e2n_tbhmod_cl73_bam_up1_tech_ability1_t [CNT_tbhmod_cl73_bam_up1_tech_ability1_t]; 704 /*! \enum tbhmod_tech_ability_t 705 706 tbhmod_tech_ability_t enumerates different types of speed advertisements in the 707 basic autoneg page. Currently for CL73 only. 708 709 Currently all speeds have the following bit positions in tbhmod_st 710 711 \li TBHMOD_ABILITY_1G Bit Pos: 0 712 \li TBHMOD_ABILITY_10G_KR Bit Pos: 1 713 \li TBHMOD_ABILITY_40G_KR4 Bit Pos: 2 714 \li TBHMOD_ABILITY_40G_CR4 Bit Pos: 3 715 \li TBHMOD_ABILITY_100G_CR10 Bit Pos: 4 716 \li TBHMOD_ABILITY_10G_HIGIG Bit Pos: 5 717 \li TBHMOD_ABILITY_10G_CX4 Bit Pos: 6 718 \li TBHMOD_ABILITY_20G_X4 Bit Pos: 7 719 \li TBHMOD_ABILITY_40G Bit Pos: 8 720 \li TBHMOD_ABILITY_25P455G Bit Pos: 9 721 \li TBHMOD_ABILITY_21G_X4 Bit Pos: 10 722 \li TBHMOD_ABILITY_20G_X4S Bit Pos: 11 723 \li TBHMOD_ABILITY_10G_DXGXS_HIGIG Bit Pos: 12 724 \li TBHMOD_ABILITY_10G_DXGXS Bit Pos: 13 725 \li TBHMOD_ABILITY_10P5G_DXGXS Bit Pos: 14 726 \li TBHMOD_ABILITY_12P5_DXGXS Bit Pos: 15 727 \li TBHMOD_ABILITY_20G_KR2_HIGIG Bit Pos: 16 728 \li TBHMOD_ABILITY_20G_KR2 Bit Pos: 17 729 \li TBHMOD_ABILITY_20G_CR2 Bit Pos: 18 730 \li TBHMOD_ABILITY_15P75G_R2 Bit Pos: 19 731 \li TBHMOD_ABILITY_100G_KR4 Bit Pos: 20 732 \li TBHMOD_ABILITY_100G_CR4 Bit Pos: 21 733 \li TBHMOD_ABILITY_40G_KR2 Bit Pos: 22 734 \li TBHMOD_ABILITY_40G_CR2 Bit Pos: 23 735 \li TBHMOD_ABILITY_50G_KR2 Bit Pos: 24 736 \li TBHMOD_ABILITY_50G_CR2 Bit Pos: 25 737 \li TBHMOD_ABILITY_50G_KR4 Bit Pos: 26 738 \li TBHMOD_ABILITY_50G_CR4 Bit Pos: 27 739 \li TBHMOD_ABILITY_20G_KR1 Bit Pos: 28 740 \li TBHMOD_ABILITY_20G_CR1 Bit Pos: 29 741 \li TBHMOD_ABILITY_25G_KR1 Bit Pos: 30 742 \li TBHMOD_ABILITY_25G_CR1 Bit Pos: 31 743 744 745 */ 746 747 typedef enum { 748 TBHMOD_ABILITY_1G = 0 , /*!< please write comments */ 749 TBHMOD_ABILITY_10G_KR , /*!< please write comments */ 750 TBHMOD_ABILITY_40G_KR4 , /*!< please write comments */ 751 TBHMOD_ABILITY_40G_CR4 , /*!< please write comments */ 752 TBHMOD_ABILITY_100G_CR10 , /*!< please write comments */ 753 TBHMOD_ABILITY_10G_HIGIG , /*!< please write comments */ 754 TBHMOD_ABILITY_10G_CX4 , /*!< please write comments */ 755 TBHMOD_ABILITY_20G_X4 , /*!< please write comments */ 756 TBHMOD_ABILITY_40G , /*!< please write comments */ 757 TBHMOD_ABILITY_25P455G , /*!< please write comments */ 758 TBHMOD_ABILITY_21G_X4 , /*!< please write comments */ 759 TBHMOD_ABILITY_20G_X4S , /*!< XAUI 8b10b scrambled data */ 760 TBHMOD_ABILITY_10G_DXGXS_HIGIG , /*!< please write comments */ 761 TBHMOD_ABILITY_10G_DXGXS , /*!< please write comments */ 762 TBHMOD_ABILITY_10P5G_DXGXS , /*!< please write comments */ 763 TBHMOD_ABILITY_12P5_DXGXS , /*!< please write comments */ 764 TBHMOD_ABILITY_20G_KR2_HIGIG , /*!< please write comments */ 765 TBHMOD_ABILITY_20G_KR2 , /*!< please write comments */ 766 TBHMOD_ABILITY_20G_CR2 , /*!< please write comments */ 767 TBHMOD_ABILITY_15P75G_R2 , /*!< please write comments */ 768 TBHMOD_ABILITY_100G_KR4 , /*!< please write comments */ 769 TBHMOD_ABILITY_100G_CR4 , /*!< please write comments */ 770 TBHMOD_ABILITY_40G_KR2 , /*!< please write comments */ 771 TBHMOD_ABILITY_40G_CR2 , /*!< please write comments */ 772 TBHMOD_ABILITY_50G_KR2 , /*!< please write comments */ 773 TBHMOD_ABILITY_50G_CR2 , /*!< please write comments */ 774 TBHMOD_ABILITY_50G_KR4 , /*!< please write comments */ 775 TBHMOD_ABILITY_50G_CR4 , /*!< please write comments */ 776 TBHMOD_ABILITY_20G_KR1 , /*!< please write comments */ 777 TBHMOD_ABILITY_20G_CR1 , /*!< please write comments */ 778 TBHMOD_ABILITY_25G_KR1 , /*!< please write comments */ 779 TBHMOD_ABILITY_25G_CR1 , /*!< please write comments */ 780 TBHMOD_ABILITY_ILLEGAL /*!< Illegal. Programmatic boundary */ 781 } tbhmod_tech_ability_t; 782 783 /*! \def CNT_tbhmod_tech_ability_t Types of enum tbhmod_tech_ability_t */ 784 #define CNT_tbhmod_tech_ability_t 33 785 786 /*! 787 \brief 788 This array returns the string version of the enum #tbhmod_port_type_t when indexed 789 by the enum var. 790 791 */ 792 extern char* e2s_tbhmod_tech_ability_t [CNT_tbhmod_tech_ability_t]; 793 /*! 794 \brief 795 This array associates the enum #tbhmod_lane_select_t enum with a bit mask. 796 The index is the #tbhmod_lane_select_t enum value. The value for each entry is 797 interpreted as follows. If bit [n] is 1, then lane [n] is enabled; if bit [n] 798 is 0, then lane [n] is disabled. By enabled, we mean that such-and-such 799 function is to be called for a lane; by disabled, we mean that such-and-such 800 function is not to be called for a lane. So a value of 0xF indicates that all 801 lanes or enabled, while 0x5 indicates that only lanes 0 and 2 are enabled. 802 803 */ 804 extern int e2n_tbhmod_tech_ability_t [CNT_tbhmod_tech_ability_t]; 805 /*! \enum tbhmod_cl37bam_ability_t 806 807 This array associates the enum #tbhmod_lane_select_t enum with a bit mask. 808 The index is the #tbhmod_lane_select_t enum value. The value for each entry is 809 interpreted as follows. If bit [n] is 1, then lane [n] is enabled; if bit [n] 810 is 0, then lane [n] is disabled. Enabled implies the function under 811 consideration be enebled for the lane. Disabled means the opposite. So a value 812 of 0xF indicates that all lanes or enabled, while 0x5 indicates that only lanes 813 0 and 2 are enabled. 814 815 tbhmod_cl37bam_ability_t enumerates different types of speed advertisements in the 816 basic autoneg page for CL37BAM only. 817 818 Currently all speeds have the following bit positions in tbhmod_st 819 820 \li TBHMOD_BAM37ABL_2P5G Bit Pos: 0 821 \li TBHMOD_BAM37ABL_5G_X4 Bit Pos: 1 822 \li TBHMOD_BAM37ABL_6G_X4 Bit Pos: 2 823 \li TBHMOD_BAM37ABL_10G_HIGIG Bit Pos: 3 824 \li TBHMOD_BAM37ABL_10G_CX4 Bit Pos: 4 825 \li TBHMOD_BAM37ABL_12G_X4 Bit Pos: 5 826 \li TBHMOD_BAM37ABL_12P5_X4 Bit Pos: 6 827 \li TBHMOD_BAM37ABL_13G_X4 Bit Pos: 7 828 \li TBHMOD_BAM37ABL_15G_X4 Bit Pos: 8 829 \li TBHMOD_BAM37ABL_16G_X4 Bit Pos: 9 830 \li TBHMOD_BAM37ABL_20G_X4_CX4 Bit Pos: 10 831 \li TBHMOD_BAM37ABL_20G_X4 Bit Pos: 11 832 \li TBHMOD_BAM37ABL_21G_X4 Bit Pos: 12 833 \li TBHMOD_BAM37ABL_25P455G Bit Pos: 13 834 \li TBHMOD_BAM37ABL_31P5G Bit Pos: 14 835 \li TBHMOD_BAM37ABL_32P7G Bit Pos: 15 836 \li TBHMOD_BAM37ABL_40G Bit Pos: 16 837 \li TBHMOD_BAM37ABL_10G_X2_CX4 Bit Pos: 17 838 \li TBHMOD_BAM37ABL_10G_DXGXS Bit Pos: 18 839 \li TBHMOD_BAM37ABL_10P5G_DXGXS Bit Pos: 19 840 \li TBHMOD_BAM37ABL_12P7_DXGXS Bit Pos: 20 841 \li TBHMOD_BAM37ABL_15P75G_R2 Bit Pos: 21 842 \li TBHMOD_BAM37ABL_20G_X2_CX4 Bit Pos: 22 843 \li TBHMOD_BAM37ABL_20G_X2 Bit Pos: 23 844 845 846 */ 847 848 typedef enum { 849 TBHMOD_BAM37ABL_2P5G = 0 , /*!< X1 BRCM */ 850 TBHMOD_BAM37ABL_5G_X4 , /*!< BRCM */ 851 TBHMOD_BAM37ABL_6G_X4 , /*!< BRCM */ 852 TBHMOD_BAM37ABL_10G_HIGIG , /*!< HG (10G_X4) */ 853 TBHMOD_BAM37ABL_10G_CX4 , /*!< (10G_X4_CX4) */ 854 TBHMOD_BAM37ABL_12G_X4 , /*!< HG */ 855 TBHMOD_BAM37ABL_12P5_X4 , /*!< HG */ 856 TBHMOD_BAM37ABL_13G_X4 , /*!< HG */ 857 TBHMOD_BAM37ABL_15G_X4 , /*!< HG */ 858 TBHMOD_BAM37ABL_16G_X4 , /*!< HG */ 859 TBHMOD_BAM37ABL_20G_X4_CX4 , /*!< XAUI 8b10b scram(20G_X4S) */ 860 TBHMOD_BAM37ABL_20G_X4 , /*!< HG */ 861 TBHMOD_BAM37ABL_21G_X4 , /*!< HG */ 862 TBHMOD_BAM37ABL_25P455G , /*!< X4 HG */ 863 TBHMOD_BAM37ABL_31P5G , /*!< X4 HG */ 864 TBHMOD_BAM37ABL_32P7G , /*!< X4 HG */ 865 TBHMOD_BAM37ABL_40G , /*!< X4 BRCM HG (40G_X4) */ 866 TBHMOD_BAM37ABL_10G_X2_CX4 , /*!< 10G_X2_CX4 */ 867 TBHMOD_BAM37ABL_10G_DXGXS , /*!< 10G_X2 */ 868 TBHMOD_BAM37ABL_10P5G_DXGXS , /*!< 10P5_X2 */ 869 TBHMOD_BAM37ABL_12P7_DXGXS , /*!< 12P7_X2 */ 870 TBHMOD_BAM37ABL_15P75G_R2 , /*!< 15P75_X2 */ 871 TBHMOD_BAM37ABL_20G_X2_CX4 , /*!< 20G_X2_CX4 */ 872 TBHMOD_BAM37ABL_20G_X2 , /*!< 20G_X2 */ 873 TBHMOD_BAM37ABL_ILLEGAL /*!< Illegal. Programmatic boundary */ 874 } tbhmod_cl37bam_ability_t; 875 876 /*! \def CNT_tbhmod_cl37bam_ability_t Types of enum tbhmod_cl37bam_ability_t */ 877 #define CNT_tbhmod_cl37bam_ability_t 25 878 879 /*! 880 \brief 881 This array returns the string version of the enum #tbhmod_port_type_t when indexed 882 by the enum var. 883 884 */ 885 extern char* e2s_tbhmod_cl37bam_ability_t [CNT_tbhmod_cl37bam_ability_t]; 886 /*! \enum tbhmod_diag_an_type_t 887 888 This array associates the enum #tbhmod_lane_select_t enum with a bit mask. 889 The index is the #tbhmod_lane_select_t enum value. The value for each entry is 890 interpreted as follows. If bit [n] is 1, then lane [n] is enabled; if bit [n] 891 is 0, then lane [n] is disabled. By enabled, we mean that such-and-such 892 function is to be called for a lane; by disabled, we mean that such-and-such 893 function is not to be called for a lane. So a value of 0xF indicates that all 894 lanes or enabled, while 0x5 indicates that only lanes 0 and 2 are enabled. 895 896 */ 897 898 typedef enum { 899 TBHMOD_DIAG_AN_DONE = 0 , /*!< AN completion check */ 900 TBHMOD_DIAG_AN_HCD , /*!< AN HCD speed check */ 901 TBHMOD_DIAG_AN_TYPE_ILLEGAL /*!< Illegal value. programmatic boundary */ 902 } tbhmod_diag_an_type_t; 903 904 /*! \def CNT_tbhmod_diag_an_type_t Types of enum tbhmod_diag_an_type_t */ 905 #define CNT_tbhmod_diag_an_type_t 3 906 907 /*! 908 \brief 909 This array returns the string version of the enum #tbhmod_port_type_t when indexed 910 by the enum var. 911 912 */ 913 extern char* e2s_tbhmod_diag_an_type_t [CNT_tbhmod_diag_an_type_t]; 914 /*! \enum tbhmod_tier1_function_type_t 915 916 This array associates the enum #tbhmod_lane_select_t enum with a bit mask. 917 The index is the #tbhmod_lane_select_t enum value. The value for each entry is 918 interpreted as follows. If bit [n] is 1, then lane [n] is enabled; if bit [n] 919 is 0, then lane [n] is disabled. By enabled, we mean that such-and-such 920 function is to be called for a lane; by disabled, we mean that such-and-such 921 function is not to be called for a lane. So a value of 0xF indicates that all 922 lanes or enabled, while 0x5 indicates that only lanes 0 and 2 are enabled. 923 924 */ 925 926 typedef enum { 927 PCS_BYPASS_CTL = 0 , /*!< tbhmod_pcs_bypass_ctl */ 928 AFE_SPEED_UP_DSC_VGA , /*!< tbhmod_afe_speed_up_dsc_vga */ 929 TX_LANE_DISABLE , /*!< tbhmod_tx_lane_disable */ 930 RX_LOCK_OVRD , /*!< tbhmod_rx_lock_ovrd */ 931 RX_SIGDET_OVRD , /*!< tbhmod_rx_sigdet_ovrd */ 932 POWER_CONTROL , /*!< tbhmod_power_control */ 933 AUTONEG_SET , /*!< tbhmod_autoneg_set */ 934 AUTONEG_GET , /*!< tbhmod_autoneg_get */ 935 AUTONEG_CONTROL , /*!< tbhmod_autoneg_control */ 936 SW_AN_CONTROL , /*!< tbhmod_sw_an_control */ 937 AUTONEG_PAGE_SET , /*!< tbhmod_autoneg_page_set */ 938 REG_READ , /*!< tbhmod_reg_read */ 939 REG_WRITE , /*!< tbhmod_reg_write */ 940 PRBS_CHECK , /*!< tbhmod_prbs_check */ 941 TBHMOD_DIAG , /*!< tbhmod_diag */ 942 PARALLEL_DETECT_CONTROL , /*!< tbhmod_parallel_detect_control */ 943 CLAUSE_72_CONTROL , /*!< tbhmod_clause72_control */ 944 PLL_SEQUENCER_CONTROL , /*!< tbhmod_pll_sequencer_control */ 945 PLL_LOCK_WAIT , /*!< tbhmod_pll_lock_wait */ 946 REVID_READ , /*!< tbhmod_revid_read */ 947 SET_AN_PORT_MODE , /*!< tbhmod_set_an_port_mode */ 948 PRBS_CONTROL , /*!< tbhmod_prbs_control */ 949 PRBS_MODE , /*!< tbhmod_prbs_mode */ 950 SOFT_RESET , /*!< tbhmod_soft_reset */ 951 TX_PMD_LOOPBACK_CONTROL , /*!< tbhmod_tx_pmd_loopback_control */ 952 CORE_RESET , /*!< tbhmod_core_reset */ 953 REFCLK_SET , /*!< tbhmod_refclk_set */ 954 WAIT_PMD_LOCK , /*!< tbhmod_wait_pmd_lock */ 955 FIRMWARE_SET , /*!< tbhmod_firmware_set */ 956 INIT_PCS_BLACKHAWK , /*!< tbhmod_init_pcs_balckhawk */ 957 DISABLE_PCS_BLACKHAWK , /*!< tbhmod_disable_pcs_blackhawk */ 958 INIT_PMD_BLACKHAWK , /*!< tbhmod_init_pmd_falcon */ 959 INIT_CORE_PMD_BLACKHAWK , /*!< tbhmod_init_pmd_falcon */ 960 PMD_LANE_SWAP_TX , /*!< tbhmod_pmd_lane_swap_tx */ 961 PMD_LANE_SWAP , /*!< tbhmod_pmd_lane_swap */ 962 PCS_RX_LANE_SWAP , /*!< tbhmod_pcs_rx_lane_swap */ 963 PCS_TX_LANE_SWAP , /*!< tbhmod_pcs_tx_lane_swap */ 964 CHECK_SC_STATS , /*!< tbhmod_check_status */ 965 PMD_RESET_REMOVE , /*!< tbhmod_pmd_reset_remove */ 966 PMD_CLOCK_GATE , /*!< tbhmod_pmd_clock_gate */ 967 PMD_LANE_RESET_BYPASS , /*!< tbhmod_pmd_lane_reset_bypass */ 968 INIT_PCS_ILKN , /*!< tbhmod_init_pcs_ilkn */ 969 PCS_SET_ILKN_WM , /*!< tbhmod_pcs_set_ilkn_wm */ 970 SW_AN_LD_PAGE_LOAD , /*!< tbhmod_sw_an_ld_page_load */ 971 SW_AN_LP_PAGE_READ , /*!< tbhmod_sw_an_lp_page_read */ 972 SW_AN_SET_ACK , /*!< tbhmod_sw_an_set_ack */ 973 PMD_TX_SETUP , /*!< tbhmod_pmd_tx_setup */ 974 PMD_RX_SETUP , /*!< tbhmod_pmd_rx_setup */ 975 READ_AN_GOOD_CHK_INT , /*!< tbhmod_an_good_chk_int_get */ 976 READ_SW_AN_INT , /*!< tbhmod_sw_an_int_get */ 977 READ_SW_AN_GLB_INT , /*!< tbhmod_get_sw_mgmt_glb_int */ 978 READ_SW_AN_CTL_STS , /*!< tbhmod_sw_an_ctl_sts_get */ 979 AN_RESTART , /*!< tbhmod_autoneg_restart */ 980 PCS_RX_TS_EN , /*!< tbhmod_pcs_rx_ts_en */ 981 PCS_SET_1588_UI , /*!< tbhmod_pcs_set_1588_ui */ 982 PCS_MOD_RX_1588_TBL , /*!< tbhmod_pcs_mod_rx_1588_tbl */ 983 PCS_TS_DESKEW_VALID , /*!< tbhmod_pcs_ts_deskew_valid */ 984 PCS_SET_1588_XGMII , /*!< tbhmod_pcs_set_1588_xgmii */ 985 PMD_TX_LN_DP_S_RSTB , /*!< tbhmod_pmd_tx_ln_dp_s_rstb */ 986 PMD_RX_LN_DP_S_RSTB , /*!< tbhmod_pmd_rx_ln_dp_s_rstb */ 987 PMD_RXTX_LN_DP_S_RSTB , /*!< tbhmod_pmd_rxtx_ln_dp_s_rstb */ 988 SET_SW_AN_SPEED , /*!< tbhmod_pcs_set_sw_an_speed */ 989 TIER1_FUNCTION_ILLEGAL /*!< illegal */ 990 } tbhmod_tier1_function_type_t; 991 992 /*! \def CNT_tbhmod_tier1_function_type_t Types of enum tbhmod_tier1_function_type_t */ 993 #define CNT_tbhmod_tier1_function_type_t 100 994 995 /*! 996 \brief 997 This array returns the string version of the enum #tbhmod_port_type_t when indexed 998 by the enum var. 999 1000 */ 1001 extern char* e2s_tbhmod_tier1_function_type_t [CNT_tbhmod_tier1_function_type_t]; 1002 /*! \enum tbhmod_fec_en_parm_t 1003 1004 For passing parameters to tbhmod_FEC_control. 1005 1006 */ 1007 1008 typedef enum { 1009 TBHMOD_CL91_TX_EN_DIS = 0x01 , /*!< Enable / Disable CL91 TX */ 1010 TBHMOD_CL91_RX_EN_DIS = 0x02 , /*!< Enable / Disable CL91 RX */ 1011 TBHMOD_CL91_IND_ONLY_EN_DIS = 0x04 , /*!< Enable / Disable CL91 indication only */ 1012 TBHMOD_CL91_COR_ONLY_EN_DIS = 0x08 , /*!< Enable / Disable CL91 correction only */ 1013 TBHMOD_CL74_TX_EN_DIS = 0x10 , /*!< Enable / Disable CL74 TX */ 1014 TBHMOD_CL74_RX_EN_DIS = 0x20 , /*!< Enable / Disable CL74 RX */ 1015 TBHMOD_CL74_CL91_EN_DIS = 0x40 /*!< Enable / Disable CL74CL91 for autoneg */ 1016 } tbhmod_fec_en_parm_t; 1017 1018 /*! \def CNT_tbhmod_fec_en_parm_t Types of enum tbhmod_fec_en_parm_t */ 1019 #define CNT_tbhmod_fec_en_parm_t 7 1020 1021 /*! 1022 \brief 1023 This array returns the string version of the enum #tbhmod_port_type_t when indexed 1024 by the enum var. 1025 1026 */ 1027 extern char* e2s_tbhmod_fec_en_parm_t [CNT_tbhmod_fec_en_parm_t]; 1028 /*! \enum tbhmod_tx_disable_enum_t 1029 1030 For various tx disable condition use this enum. 1031 1032 */ 1033 1034 typedef enum { 1035 TBHMOD_TX_LANE_RESET = 0x20 , /*!< TX lane Reset */ 1036 TBHMOD_TX_LANE_TRAFFIC_ENABLE = 0x1 , /*!< TX lane Traffic enable */ 1037 TBHMOD_TX_LANE_TRAFFIC_DISABLE = 0x2 , /*!< TX lane Traffic disable */ 1038 TBHMOD_TX_LANE_RESET_TRAFFIC_ENABLE = 0x3 , /*!< TX lane Reset/Traffic enable */ 1039 TBHMOD_TX_LANE_RESET_TRAFFIC_DISABLE = 0x4 , /*!< TX lane Reset/Traffic disable */ 1040 TBHMOD_TX_LANE_ILLEGAL = 0x5 /*!< TX lane Illegal */ 1041 } tbhmod_tx_disable_enum_t; 1042 1043 /*! \def CNT_tbhmod_tx_disable_enum_t Types of enum tbhmod_tx_disable_enum_t */ 1044 #define CNT_tbhmod_tx_disable_enum_t 6 1045 1046 /*! 1047 \brief 1048 This array returns the string version of the enum #tbhmod_port_type_t when indexed 1049 by the enum var. 1050 1051 */ 1052 extern char* e2s_tbhmod_tx_disable_enum_t [CNT_tbhmod_tx_disable_enum_t]; 1053 /*! \enum tbhmod_os_mode_type 1054 1055 1056 The oversampling mode means that bits are sent out more than once to reduce 1057 the effective frequency of data transfer. For example you can send 5G bits 1058 over a 10G bit lane by sending every bit twice, or OS=2. When the OS is 3.3 1059 it's a bit tricky, we send bits 3 or 4 times in a pattern like so 1060 3,3,3,4,3,3,3,4,... Similarly for OS = 8, we send 8,8,8,9,8,8,8,9,... 1061 1062 1063 */ 1064 1065 typedef enum { 1066 TBHMOD_PMA_OS_MODE_1 = 0 , /*!< Over sampling Mode 1 */ 1067 TBHMOD_PMA_OS_MODE_2 = 1 , /*!< Over sampling Mode 2 */ 1068 TBHMOD_PMA_OS_MODE_4 = 2 , /*!< Over sampling Mode 4 */ 1069 TBHMOD_PMA_OS_MODE_16_25 = 8 , /*!< Over sampling Mode 8.25 */ 1070 TBHMOD_PMA_OS_MODE_20_625 = 12 , /*!< Over sampling Mode 10 */ 1071 TBHMOD_PMA_OS_MODE_ILLEGAL = 15 /*!< Over sampling Mode Illegal */ 1072 } tbhmod_os_mode_type; 1073 1074 /*! \def CNT_tbhmod_os_mode_type Types of enum tbhmod_os_mode_type */ 1075 #define CNT_tbhmod_os_mode_type 6 1076 1077 /*! 1078 \brief 1079 This array returns the string of #tbhmod_os_mode type when indexed by the enum. 1080 1081 */ 1082 extern char* e2s_tbhmod_os_mode_type [CNT_tbhmod_os_mode_type]; 1083 /*! 1084 \brief 1085 This array returns the over sampling value of #tbhmod_os_mode type when indexed by 1086 the enum. For floating values 3.3 and 8.25 it returns 33 and 825. 1087 1088 */ 1089 extern int e2n_tbhmod_os_mode_type [CNT_tbhmod_os_mode_type]; 1090 /*! \enum tbhmod_scr_mode 1091 1092 This mode indicates how many bits of a 'frame' will be scrambled. We have either 1093 66 or 80 bits per frame (depending on 8b10b or 64b66b encoding). Normally 1094 scrambling is 1095 1096 \li bypassed for baud rates under 6.25G (0). 1097 \li we scramble all 66 bits (1) 1098 \li all 80 bits(2) 1099 \li only 64 of the 66b (3). i.e we don't scramble the 'sync' bits. 1100 1101 */ 1102 1103 typedef enum { 1104 TBHMOD_SCR_MODE_BYPASS = 0 , /*!< Scrambling Mode bypassed */ 1105 TBHMOD_SCR_MODE_CL49 = 1 , /*!< Scrambling Mode 66B */ 1106 TBHMOD_SCR_MODE_40G_2_LANE = 2 , /*!< Scrambling Mode 80B */ 1107 TBHMOD_SCR_MODE_100G = 3 , /*!< Scrambling Mode 64B */ 1108 TBHMOD_SCR_MODE_20G = 4 , /*!< Scrambling Mode 64B */ 1109 TBHMOD_SCR_MODE_40G_4_LANE = 5 , /*!< Scrambling Mode 64B */ 1110 TBHMOD_SCR_MODE_ILLEGAL = 15 /*!< SCR Mode Mode Illegal */ 1111 } tbhmod_scr_mode; 1112 1113 /*! \def CNT_tbhmod_scr_mode Types of enum tbhmod_scr_mode */ 1114 #define CNT_tbhmod_scr_mode 7 1115 1116 /*! 1117 \brief 1118 This array returns the string of #tbhmod_scr_mode when indexed by the enum. 1119 1120 */ 1121 extern char* e2s_tbhmod_scr_mode [CNT_tbhmod_scr_mode]; 1122 /*! 1123 \brief 1124 This array returns the scrambling mode of #tbhmod_scr_mode when indexed by 1125 the enum. 1126 1127 */ 1128 extern int e2n_tbhmod_scr_mode [CNT_tbhmod_scr_mode]; 1129 /*! \enum tbhmod_encode_mode 1130 1131 Serial bits are encoded when transmitted. The encoding depends on the baud rate 1132 and the link type 1133 \li 000 All encoding functions disabled for lane 1134 \li 001 8b10b (cl48 ) 1135 \li 010 8b10b (cl48 rxaui) 1136 \li 011 8b10b (cl36 ) 1137 \li 100 64b66b (cl82 ) 1138 \li 101 64b66b (cl49 ) 1139 \li 110 64b66b (brcm ) 1140 1141 */ 1142 1143 typedef enum { 1144 TBHMOD_ENCODE_MODE_NONE = 0 , /*!< Encoding Mode NONE */ 1145 TBHMOD_ENCODE_MODE_CL49 = 1 , /*!< Encoding Mode CL49 */ 1146 TBHMOD_ENCODE_MODE_CL82 = 2 , /*!< Encoding Mode CL82 */ 1147 TBHMOD_ENCODE_MODE_ILLEGAL = 15 /*!< Encoding Mode Illegal */ 1148 } tbhmod_encode_mode; 1149 1150 /*! \def CNT_tbhmod_encode_mode Types of enum tbhmod_encode_mode */ 1151 #define CNT_tbhmod_encode_mode 4 1152 1153 /*! 1154 \brief 1155 This array returns the string of #tbhmod_encode_mode when indexed by the enum. 1156 1157 */ 1158 extern char* e2s_tbhmod_encode_mode [CNT_tbhmod_encode_mode]; 1159 /*! 1160 \brief 1161 This array returns the encoding mode of #tbhmod_encode_mode when indexed by 1162 the enum. 1163 1164 */ 1165 extern int e2n_tbhmod_encode_mode [CNT_tbhmod_encode_mode]; 1166 /*! \enum tbhmod_descrambler_mode 1167 1168 The descrambling must match the scrambling done at the transmitting port. 1169 1170 */ 1171 1172 typedef enum { 1173 TBHMOD_R_DESCR_MODE_BYPASS = 0 , /*!< No descrambling */ 1174 TBHMOD_R_DESCR_MODE_CL49 = 1 , /*!< CL49 */ 1175 TBHMOD_R_DESCR_MODE_CL82 = 2 , /*!< CL82 */ 1176 TBHMOD_R_DESCR_MODE_ILLEGAL = 3 /*!< Illegal */ 1177 } tbhmod_descrambler_mode; 1178 1179 /*! \def CNT_tbhmod_descrambler_mode Types of enum tbhmod_descrambler_mode */ 1180 #define CNT_tbhmod_descrambler_mode 4 1181 1182 /*! 1183 \brief 1184 This array returns the string of #tbhmod_descrambler_mode when indexed by the enum. 1185 1186 */ 1187 extern char* e2s_tbhmod_descrambler_mode [CNT_tbhmod_descrambler_mode]; 1188 /*! \enum tbhmod_dec_tl_mode 1189 1190 The descrambling must match the scrambling done at the transmitting port. 1191 1192 */ 1193 1194 typedef enum { 1195 TBHMOD_DEC_TL_MODE_NONE = 0 , /*!< decoder mode NONE */ 1196 TBHMOD_DEC_TL_MODE_CL49 = 1 , /*!< decoder mode CL49 */ 1197 TBHMOD_DEC_TL_MODE_CL82 = 2 , /*!< decoder mode CL82 */ 1198 TBHMOD_DEC_TL_MODE_ILLEGAL = 7 /*!< decoder mode ILLEGAL */ 1199 } tbhmod_dec_tl_mode; 1200 1201 /*! \def CNT_tbhmod_dec_tl_mode Types of enum tbhmod_dec_tl_mode */ 1202 #define CNT_tbhmod_dec_tl_mode 4 1203 1204 /*! 1205 \brief 1206 This array returns the string of #tbhmod_dec_tl_mode when indexed by the enum. 1207 1208 */ 1209 extern char* e2s_tbhmod_dec_tl_mode [CNT_tbhmod_dec_tl_mode]; 1210 /*! \enum tbhmod_dec_fsm_mode 1211 1212 The descrambling must match the scrambling done at the transmitting port. 1213 1214 */ 1215 1216 typedef enum { 1217 TBHMOD_DEC_FSM_MODE_NONE = 0 , /*!< decoder mode NONE */ 1218 TBHMOD_DEC_FSM_MODE_CL49 = 1 , /*!< decoder mode CL49 */ 1219 TBHMOD_DEC_FSM_MODE_CL82 = 2 , /*!< decoder mode CL82 */ 1220 TBHMOD_DEC_FSM_MODE_ILLEGAL = 7 /*!< decoder mode ILLEGAL */ 1221 } tbhmod_dec_fsm_mode; 1222 1223 /*! \def CNT_tbhmod_dec_fsm_mode Types of enum tbhmod_dec_fsm_mode */ 1224 #define CNT_tbhmod_dec_fsm_mode 4 1225 1226 /*! 1227 \brief 1228 This array returns the string of #tbhmod_dec_fsm_mode when indexed by the enum. 1229 1230 */ 1231 extern char* e2s_tbhmod_dec_fsm_mode [CNT_tbhmod_dec_fsm_mode]; 1232 /*! \enum tbhmod_deskew_mode 1233 1234 Deskew Mode is a function of speed. 1235 1236 */ 1237 1238 typedef enum { 1239 TBHMOD_R_DESKEW_MODE_BYPASSi = 0 , /*!< deskew mode BYPASS */ 1240 TBHMOD_R_DESKEW_MODE_10G = 1 , /*!< deskew mode 10G */ 1241 TBHMOD_R_DESKEW_MODE_40G_4_LANE = 2 , /*!< deskew mode 40G_4_LANE */ 1242 TBHMOD_R_DESKEW_MODE_40G_2_LANE = 3 , /*!< deskew mode 40G_2_LANE */ 1243 TBHMOD_R_DESKEW_MODE_100G = 4 , /*!< deskew mode 100G */ 1244 TBHMOD_R_DESKEW_MODE_CL49 = 5 , /*!< deskew mode CL49 */ 1245 TBHMOD_R_DESKEW_MODE_CL91 = 6 , /*!< deskew mode CL91 */ 1246 TBHMOD_R_DESKEW_MODE_ILLEGAL = 7 /*!< deskew mode ILLEGAL */ 1247 } tbhmod_deskew_mode; 1248 1249 /*! \def CNT_tbhmod_deskew_mode Types of enum tbhmod_deskew_mode */ 1250 #define CNT_tbhmod_deskew_mode 8 1251 1252 /*! 1253 \brief 1254 This array returns the string of #tbhmod_deskew_mode when indexed by the enum. 1255 1256 */ 1257 extern char* e2s_tbhmod_deskew_mode [CNT_tbhmod_deskew_mode]; 1258 /*! \enum tbhmod_t_fifo_mode 1259 1260 1261 */ 1262 1263 typedef enum { 1264 TBHMOD_T_FIFO_MODE_NONE = 0 , /*!< t_fifo mode NONE */ 1265 TBHMOD_T_FIFO_MODE_40G = 1 , /*!< t_fifo mode 40G */ 1266 TBHMOD_T_FIFO_MODE_100G = 2 , /*!< t_fifo mode 100G */ 1267 TBHMOD_T_FIFO_MODE_20G = 3 , /*!< t_fifo mode 20G */ 1268 TBHMOD_T_FIFO_MODE_ILLEGAL = 7 /*!< t_fifo mode ILLEGAL */ 1269 } tbhmod_t_fifo_mode; 1270 1271 /*! \def CNT_tbhmod_t_fifo_mode Types of enum tbhmod_t_fifo_mode */ 1272 #define CNT_tbhmod_t_fifo_mode 5 1273 1274 /*! 1275 \brief 1276 This array returns the string of #tbhmod_t_fifo_mode when indexed by the enum. 1277 1278 */ 1279 extern char* e2s_tbhmod_t_fifo_mode [CNT_tbhmod_t_fifo_mode]; 1280 /*! \enum tbhmod_bs_btmx_mode 1281 1282 1283 */ 1284 1285 typedef enum { 1286 TBHMOD_BS_BTMX_MODE_NONE = 0 , /*!< bs_btmx mode NONE */ 1287 TBHMOD_BS_BTMX_MODE_1to1 = 1 , /*!< bs_btmx mode 1to1 */ 1288 TBHMOD_BS_BTMX_MODE_2to1 = 2 , /*!< bs_btmx mode 2to1 */ 1289 TBHMOD_BS_BTMX_MODE_5to1 = 3 , /*!< bs_btmx mode 5to1 */ 1290 TBHMOD_BS_BTMX_MODE_ILLEGAL = 7 /*!< bs_btmx mode ILLEGAL */ 1291 } tbhmod_bs_btmx_mode; 1292 1293 /*! \def CNT_tbhmod_bs_btmx_mode Types of enum tbhmod_bs_btmx_mode */ 1294 #define CNT_tbhmod_bs_btmx_mode 5 1295 1296 /*! 1297 \brief 1298 This array returns the string of #tbhmod_bs_btmx_mode when indexed by the enum. 1299 1300 */ 1301 extern char* e2s_tbhmod_bs_btmx_mode [CNT_tbhmod_bs_btmx_mode]; 1302 /*! \enum tbhmod_bs_dist_mode 1303 1304 1305 */ 1306 1307 typedef enum { 1308 TBHMOD_BS_DIST_MODE_5_LANE_TDM = 0 , /*!< bs_dist mode 5LN_TDM */ 1309 TBHMOD_BS_DIST_MODE_2_LANE_TDM_2_VLANE = 1 , /*!< bs_dist mode 2LN_TDM_2VLN */ 1310 TBHMOD_BS_DIST_MODE_2_LANE_TDM_1_VLANE = 2 , /*!< bs_dist mode 2LN_TDM_1VLN */ 1311 TBHMOD_BS_DIST_MODE_NO_TDM = 3 , /*!< bs_dist mode NO_TDM */ 1312 TBHMOD_BS_DIST_MODE_ILLEGAL = 7 /*!< bs_dist mode ILLEGAL */ 1313 } tbhmod_bs_dist_mode; 1314 1315 /*! \def CNT_tbhmod_bs_dist_mode Types of enum tbhmod_bs_dist_mode */ 1316 #define CNT_tbhmod_bs_dist_mode 5 1317 1318 /*! 1319 \brief 1320 This array returns the string of #tbhmod_bs_dist_mode when indexed by the enum. 1321 1322 */ 1323 extern char* e2s_tbhmod_bs_dist_mode [CNT_tbhmod_bs_dist_mode]; 1324 /*! \enum tbhmod_an_property_enable 1325 1326 1327 */ 1328 1329 typedef enum { 1330 TBHMOD_AN_PROPERTY_ENABLE_NONE = 0 , /*!< an_enabled_none mode 5LN_TDM */ 1331 TBHMOD_AN_PROPERTY_ENABLE_HPAM_TO_CL73_AUTO = 1 , /*!< an_enabled_hpam_to_cl73_auto */ 1332 TBHMOD_AN_PROPERTY_ENABLE_CL73_BAM_TO_HPAM_AUTO = 2 , /*!< an_enabled_cl73_bam_to_hpam_auto */ 1333 TBHMOD_AN_PROPERTY_ENABLE_ILLEGAL = 4 /*!< bs_dist mode NO_TDM */ 1334 } tbhmod_an_property_enable; 1335 1336 /*! \def CNT_tbhmod_an_property_enable Types of enum tbhmod_an_property_enable */ 1337 #define CNT_tbhmod_an_property_enable 4 1338 1339 /*! 1340 \brief 1341 This array returns the string of #an_property_enable when indexed by the enum. 1342 1343 */ 1344 extern char* e2s_tbhmod_an_property_enable [CNT_tbhmod_an_property_enable]; 1345 1346 typedef enum { 1347 /* Temp fix for VCO enum change UC */ 1348 TSC_VCO_6PT25 = 0, 1349 TSC_VCO_20PT6250 = 1, 1350 TSC_VCO_21PT8750 = 2, 1351 TSC_VCO_25PT78125 = 3, 1352 TSC_VCO_27PT34375 = 4, 1353 TSC_VCO_28PT05 = 5, 1354 TSC_VCO_26PT56250 = 6 1355 } tsc_vco_rate_e; 1356 1357 typedef enum { 1358 TBHMOD_PLL_MODE_DIV_ZERO = 0, /* Divide value to be determined by API. */ 1359 TBHMOD_PLL_MODE_DIV_66 = (int)0x00000042, /* Divide by 66 */ 1360 TBHMOD_PLL_MODE_DIV_80 = (int)0x00000050, /* Divide by 80 */ 1361 TBHMOD_PLL_MODE_DIV_82P5 = (int)0x80000052, /* Divide by 82.5 */ 1362 TBHMOD_PLL_MODE_DIV_85 = (int)0x00000055, /* Divide by 85 */ 1363 TBHMOD_PLL_MODE_DIV_132 = (int)0x00000084, /* Divide by 132 */ 1364 TBHMOD_PLL_MODE_DIV_160 = (int)0x000000A0, /* Divide by 160 */ 1365 TBHMOD_PLL_MODE_DIV_165 = (int)0x000000A5, /* Divide by 165 */ 1366 TBHMOD_PLL_MODE_DIV_170 = (int)0x000000AA /* Divide by 170 */ 1367 } tbhmod_pll_mode_type; 1368 #endif /* _TSCBHMOD_ENUM_DEFINES_H */