qmod16_enum_defines.h (53594B)
1 /* 2 * 3 * 4 * 5 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 6 * 7 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 8 */ 9 /*---------------------------------------------------------------------- 10 * : qmod_enum_defines.h, 11 * : n * 12 * Broadcom Corporation 13 * Proprietary and Confidential information 14 * All rights reserved 15 * This source file is the property of Broadcom Corporation, and 16 * may not be copied or distributed in any isomorphic form without the 17 * prior written consent of Broadcom Corporation. 18 *--------------------------------------------------------------------- 19 * Description: This file contains enums, elems, and doxygen comments 20 * needed for SerDes Configuration programs. 21 *--------------------------------------------------------------------- 22 * CVS INFORMATION: 23 * Please see inc/enum_desc.txt for CVS information. 24 *---------------------------------------------------------------------- 25 */ 26 27 /* This file is automatically generated. Do not modify it. Modify the 28 * inc/enum_desc.txt to change enums, elems, or comments. For issues about 29 * the process that creates this file contact the qmod development team. 30 */ 31 32 #ifndef _QMOD16_ENUM_DEFINES_H 33 #define _QMOD16_ENUM_DEFINES_H 34 35 /*! \enum qmod16_core_select 36 37 qmod16_core_select selects for programming, any combination of 3 core of the PHY. 38 This is only applicable to the 12x10 version of the TSCE core. 39 A '1' in the latter part of the enum selects the core. 40 41 42 */ 43 44 typedef enum { 45 QMOD16_CORE_0_0_1 = 0 , /*!< Core number 0 selected */ 46 QMOD16_CORE_0_1_0 , /*!< Core number 1 selected */ 47 QMOD16_CORE_1_0_0 , /*!< Core number 2 selected */ 48 QMOD16_CORE_0_1_1 , /*!< Core number 0 & 1 selected */ 49 QMOD16_CORE_1_0_1 , /*!< Core number 0 & 2 selected */ 50 QMOD16_CORE_1_1_1 , /*!< Core number 0,1,& 2 selected */ 51 QMOD16_CORE_ILLEGAL /*!< Illegal (programmatic boundary) */ 52 } qmod16_core_select; 53 54 /*! \def CNT_qmod16_core_select Types of enum qmod16_core_select */ 55 #define CNT_qmod16_core_select 7 56 57 /*! 58 \brief 59 This array returns the string version of the enum #qmod16_core_select when 60 indexed by the enum var. 61 62 */ 63 extern char* e2s_qmod16_core_select [CNT_qmod16_core_select]; 64 /*! 65 \brief 66 This array associates the enum #qmod16_core_select enum with a bit mask. 67 The index is the #qmod16_core_select enum value. The value for each entry is 68 interpreted as follows. If bit [n] is 1, then core [n] is addressed; if bit [n] 69 is 0, then core [n] is addressed. 70 71 */ 72 extern int e2n_qmod16_core_select [CNT_qmod16_core_select]; 73 /*! \enum qmod16_lane_select 74 75 qmod16_lane_select selects for programming, any combination of 4 lanes of PHY. 76 A '1' in the latter part of the enum name selects the lane. Other parameters in 77 the #qmod16_st will decide what to do with the selected lane(s). In most cases 78 we enable/disable a feature on the selected lanes. 79 80 If lane_select is set to QMOD16_LANE_BCST for writes we broadcast to all lanes. 81 You cannot read in broadcast mode. 82 83 84 */ 85 86 typedef enum { 87 QMOD16_LANE_0_0_0_1 = 0 , /*!< lane number 0 selected */ 88 QMOD16_LANE_0_0_1_0 , /*!< lane number 1 selected */ 89 QMOD16_LANE_0_0_1_1 , /*!< lane numbers 0,1 selected */ 90 QMOD16_LANE_0_1_0_0 , /*!< lane number 2 selected */ 91 QMOD16_LANE_0_1_0_1 , /*!< lane numbers 2,0 selected */ 92 QMOD16_LANE_0_1_1_0 , /*!< lane numbers 2,1 selected */ 93 QMOD16_LANE_0_1_1_1 , /*!< lane numbers 2,1,0 selected */ 94 QMOD16_LANE_1_0_0_0 , /*!< lane number 3 selected */ 95 QMOD16_LANE_1_0_0_1 , /*!< lane numbers 3,0 selected */ 96 QMOD16_LANE_1_0_1_0 , /*!< lane numbers 3,1 selected */ 97 QMOD16_LANE_1_0_1_1 , /*!< lane numbers 3,1,0 selected */ 98 QMOD16_LANE_1_1_0_0 , /*!< lane numbers 3,2 selected */ 99 QMOD16_LANE_1_1_0_1 , /*!< lane numbers 3,2,0 selected */ 100 QMOD16_LANE_1_1_1_0 , /*!< lane numbers 3,2,1 selected */ 101 QMOD16_LANE_1_1_1_1 , /*!< lane numbers 3,2,1,0 selected */ 102 QMOD16_LANE_BCST , /*!< lane numbers 3,2,1,0 BCST */ 103 QMOD16_LANE_ILLEGAL /*!< Illegal (programmatic boundary) */ 104 } qmod16_lane_select; 105 106 /*! \def CNT_qmod16_lane_select Types of enum qmod16_lane_select */ 107 #define CNT_qmod16_lane_select 17 108 109 /*! 110 \brief 111 This array returns the string version of the enum #qmod16_lane_select when 112 indexed by the enum var. 113 114 */ 115 extern char* e2s_qmod16_lane_select [CNT_qmod16_lane_select]; 116 /*! 117 \brief 118 This array associates the enum #qmod16_lane_select enum with a bit mask. 119 The index is the #qmod16_lane_select enum value. The value for each entry is 120 interpreted as follows. If bit [n] is 1, then lane [n] is enabled; if bit [n] 121 is 0, then lane [n] is disabled. By enabled, we mean that such-and-such 122 function is to be called for a lane; by disabled, we mean that such-and-such 123 function is not to be called for a lane. So a value of 0xF indicates that all 124 lanes or enabled, while 0x5 indicates that only lanes 0 and 2 are enabled. 125 126 */ 127 extern int e2n_qmod16_lane_select [CNT_qmod16_lane_select]; 128 /*! \enum qmod16_spd_intfc_type 129 130 All legal speed-interface combination are encapsulated in this enum 131 132 There are several speed and interface combinations allowed for a logical PHY 133 port. Names and speeds are self explanatory. 134 135 Speed and interface selection is combined because we don't want the speeds 136 to be incompatible with interface. 137 138 */ 139 140 typedef enum { 141 QMOD16_SPD_ZERO = 0 , /*!< Illegal value (enum boundary) */ 142 QMOD16_SPD_10_X1_SGMII , /*!< 10Mb SGMII (serial) */ 143 QMOD16_SPD_100_X1_SGMII , /*!< 100Mb SGMII (serial) */ 144 QMOD16_SPD_1000_X1_SGMII , /*!< 1Gb SGMII (serial) */ 145 QMOD16_SPD_2500_X1 , /*!< 2.5Gb based on 1000BASE-X */ 146 QMOD16_SPD_10_SGMII , /*!< 10Mb SGMII (serial) */ 147 QMOD16_SPD_100_SGMII , /*!< 100Mb SGMII (serial) */ 148 QMOD16_SPD_1000_SGMII , /*!< 1Gb SGMII (serial) */ 149 QMOD16_SPD_2500 , /*!< 2.5Gb based on 1000BASE-X */ 150 QMOD16_SPD_5000 , /*!< 5Gb CL36 */ 151 QMOD16_SPD_1000_XFI , /*!< 1Gb */ 152 QMOD16_SPD_5000_XFI , /*!< 5Gb CL49 */ 153 QMOD16_SPD_10000_XFI , /*!< 10Gb serial XFI */ 154 QMOD16_SPD_10600_XFI_HG , /*!< 10.5Gb serial XFI (HgSOLO) */ 155 QMOD16_SPD_10000_HI , /*!< 10Gb XAUI HiG */ 156 QMOD16_SPD_10000 , /*!< 10Gb XAUI */ 157 QMOD16_SPD_12000_HI , /*!< 12Gb XAUI HiG */ 158 QMOD16_SPD_13000 , /*!< 13Gb XAUI */ 159 QMOD16_SPD_15000 , /*!< 15Gb XAUI */ 160 QMOD16_SPD_16000 , /*!< 16Gb XAUI */ 161 QMOD16_SPD_20000 , /*!< 20Gb XAUI */ 162 QMOD16_SPD_20000_SCR , /*!< 20Gb XAUI scrambled */ 163 QMOD16_SPD_21000 , /*!< 21Gb XAUI */ 164 QMOD16_SPD_25455 , /*!< 25Gb XAUI 64/66 codec */ 165 QMOD16_SPD_31500 , /*!< 31.5Gb quad lane XAUI */ 166 QMOD16_SPD_31500_MLD , /*!< 31.5Gb quad lane MLD */ 167 QMOD16_SPD_40G_X4 , /*!< 40Gb quad lane XAUI */ 168 QMOD16_SPD_42G_X4 , /*!< 40Gb quad lane XAUI HiG */ 169 QMOD16_SPD_40G_XLAUI , /*!< 40Gb quad lane MLD */ 170 QMOD16_SPD_42G_XLAUI , /*!< 42Gb quad lane MLD */ 171 QMOD16_SPD_10000_X2 , /*!< 10Gb dual lane */ 172 QMOD16_SPD_10000_HI_DXGXS , /*!< 10Gb dual lane XGXS HiG */ 173 QMOD16_SPD_10000_DXGXS , /*!< 10Gb dual lane XGXS */ 174 QMOD16_SPD_10000_HI_DXGXS_SCR , /*!< 10Gb dual lane,scrambled,HiG */ 175 QMOD16_SPD_10000_DXGXS_SCR , /*!< 10Gb dual lane scrambled */ 176 QMOD16_SPD_10500_HI , /*!< 10.5Gb XAUI lane XGXS HiG */ 177 QMOD16_SPD_10500_HI_DXGXS , /*!< 10.5Gb dual lane XGXS HiG */ 178 QMOD16_SPD_12773_HI_DXGXS , /*!< 12.73Gb dual lane XGXS HiG */ 179 QMOD16_SPD_12773_DXGXS , /*!< 12.73Gb dual lane XGXS */ 180 QMOD16_SPD_15750_HI_DXGXS , /*!< 15.75Gb scrambled dual lane HiG */ 181 QMOD16_SPD_20G_MLD_DXGXS , /*!< 20Gb dual lane MLD */ 182 QMOD16_SPD_21G_HI_MLD_DXGXS , /*!< 20Gb dual lane HiG MLD */ 183 QMOD16_SPD_20G_DXGXS , /*!< 20Gb dual lane BRCM */ 184 QMOD16_SPD_21G_HI_DXGXS , /*!< 21.2Gb dual HiG(20+plldiv=70) */ 185 QMOD16_SPD_100G_CR10 , /*!< 100G */ 186 QMOD16_SPD_107G_HG_CR10 , /*!< 107G */ 187 QMOD16_SPD_120G_CR12 , /*!< 120G */ 188 QMOD16_SPD_127G_HG_CR12 , /*!< 127G */ 189 QMOD16_SPD_4000 , /*!< 4G QSGMII */ 190 QMOD16_SPD_10_X1_10 , /*!< 10Mb SGMII (serial) vco 10 */ 191 QMOD16_SPD_100_X1_10 , /*!< 100Mb SGMII (serial) vco 10 */ 192 QMOD16_SPD_1000_X1_10 , /*!< 1Gb SGMII (serial) vco 10 */ 193 QMOD16_SPD_10_X1_12P5 , /*!< 10Mb SGMII (serial) vco 12p5 */ 194 QMOD16_SPD_100_X1_12P5 , /*!< 100Mb SGMII (serial) vco 12p5 */ 195 QMOD16_SPD_1000_X1_12P5 , /*!< 1Gb SGMII (serial) vco 12p5 */ 196 QMOD16_SPD_2500_X1_12P5 , /*!< 2.5Gb SGMII vco 12p5 */ 197 QMOD16_SPD_10G_X1_USXGMII , /*!< 4x2.5G USXGMII vco 10p3125G */ 198 QMOD16_SPD_2500_USXGMII , /*!< 2.5 USGMII vco 10p3125 */ 199 QMOD16_SPD_ILLEGAL /*!< Illegal value (enum boundary) */ 200 } qmod16_spd_intfc_type; 201 202 /*! \def CNT_qmod16_spd_intfc_type Types of enum qmod16_spd_intfc_type */ 203 #define CNT_qmod16_spd_intfc_type 59 204 205 /*! 206 \brief 207 This array returns the string version of the enum #qmod16_lane_select when 208 indexed by the enum var. 209 210 */ 211 extern char* e2s_qmod16_spd_intfc_type [CNT_qmod16_spd_intfc_type]; 212 /*! 213 \brief 214 This array associates the enum #qmod16_lane_select enum with a bit mask. 215 The index is the #qmod16_lane_select enum value. The value for each entry is 216 interpreted as follows. If bit [n] is 1, then lane [n] is enabled; if bit [n] 217 is 0, then lane [n] is disabled. By enabled, we mean that such-and-such 218 function is to be called for a lane; by disabled, we mean that such-and-such 219 function is not to be called for a lane. So a value of 0xF indicates that all 220 lanes or enabled, while 0x5 indicates that only lanes 0 and 2 are enabled. 221 222 */ 223 extern int e2n_qmod16_spd_intfc_type [CNT_qmod16_spd_intfc_type]; 224 /*! \enum qmod16_regacc_type 225 226 Types of MDIO to access PHY registers. IEEE clause 22 and clause 45 are 227 supported. The 8 bit parallel TOTSC bus can be used. We may use 228 229 */ 230 231 typedef enum { 232 QMOD16_REGACC_CL22 = 0 , /*!< IEEE clause 22 based MDIO (for PMD only) */ 233 QMOD16_REGACC_CL45 , /*!< IEEE clause 45 based MDIO (for PMD only) */ 234 QMOD16_REGACC_TOTSC , /*!< Mission Mode. */ 235 QMOD16_REGACC_SBUS_FD , /*!< Probably used in PM testbenches. */ 236 QMOD16_REGACC_SBUS_BD , /*!< Probably used in PM testbenches. */ 237 QMOD16_REGACC_ILLEGAL /*!< Illegal value (enum boundary) */ 238 } qmod16_regacc_type; 239 240 /*! \def CNT_qmod16_regacc_type Types of enum qmod16_regacc_type */ 241 #define CNT_qmod16_regacc_type 6 242 243 /*! 244 \brief 245 This array returns the string version of the enum #qmod16_regacc_type when indexed 246 by the enum var. 247 248 */ 249 extern char* e2s_qmod16_regacc_type [CNT_qmod16_regacc_type]; 250 /*! \enum qmod16_port_type 251 252 This is the port mode type enumeration. 253 254 WC can be configured in combo mode (i.e. entire WC is a single port) or 255 independent mode (i.e. WC has more than one port (2, 3, or 4) that are 256 controlled individually. 257 258 */ 259 260 typedef enum { 261 QMOD16_SINGLE_PORT = 0 , /*!< single port mode: 4 channels as one logical port */ 262 QMOD16_MULTI_PORT , /*!< Each channel is one logical port */ 263 QMOD16_DXGXS , /*!< Each paired channel(0-1, 2-3) is one logical port */ 264 QMOD16_TRI1_PORT , /*!< 3 ports, one of them paird as follows (0,1,2-3) */ 265 QMOD16_TRI2_PORT , /*!< 3 ports, one of them paird as follows (0-1,2,3) */ 266 QMOD16_PORT_MODE_ILLEGAL /*!< Illegal value (enum boundary) */ 267 } qmod16_port_type; 268 269 /*! \def CNT_qmod16_port_type Types of enum qmod16_port_type */ 270 #define CNT_qmod16_port_type 6 271 272 /*! 273 \brief 274 This array returns the string version of the enum #qmod16_port_type when indexed 275 by the enum var. 276 277 */ 278 extern char* e2s_qmod16_port_type [CNT_qmod16_port_type]; 279 /*! \enum qmod16_diag_type 280 281 qmod16_diag_type enumerates categories of diagnostic data. 282 has many intermediate stages between down and up. This enum is work in progress 283 284 285 <table cellspacing=0> 286 <tr><td colspan=3><B>'per_lane_control' bit-mappings</B></td></tr> 287 288 <tr><td><B>Type</B></td><td><B>Description</B></td><td><B>Scope</B></td></tr> 289 290 <tr><td>General</td> 291 <td> Combo/independent, Device and Revision Id, VCO settings, Firmware state 292 and version, active/passive lanes, MDIO type. PLL info, Oversampling Info</td> 293 <td>Device</td></tr> 294 295 <tr><td>Link</td> 296 <td> Speeds, oversampling, interface, forced/Autoneg, link status, sync 297 status, RX sequencer on/off </td> 298 <td>Lane</td></tr> 299 300 <tr><td>Autoneg</td> 301 <td> Local and remote advertisement, link status, cl73/37/BAM info </td> 302 <td>Lane</td></tr> 303 304 <tr><td>Internal Traffic</td> 305 <td> PRBS type, CJPat Type, Prog_data value, Any associated recorded errors, 306 and misc. info (IPG etc.)</td> 307 <td>Lane </td></tr> 308 309 <tr> 310 <td>DFE</td> 311 <td>Equalization info, Tap settings. (pre/post/overrides), peaking filter values </td> 312 <td>Lane</td></tr> 313 314 <tr><td>IEEE info</td> 315 <td>Clause 72, FEC</td> 316 <td>Lane</td></tr> 317 318 <tr><td>Topology</td> 319 <td>Looping info (Gloop/rloop), lane swapping, polarity swap info</td> 320 <td>Device</td></tr> 321 322 <tr><td>EEE</td> 323 <td>EEE full, passthru modes, some window values?</td> 324 <td>Lane</td></tr> 325 326 <tr><td>Eye Margin</td> 327 <td>Eye margin measurement (readout only)</td> 328 <td>Lane</td></tr> 329 330 <tr><td>All</td> 331 <td>All of the above. Except eye margin.</td> 332 <td>Device</td></tr> 333 334 </table> 335 336 337 */ 338 339 typedef enum { 340 QMOD16_DIAG_GENERAL = 0x00000001 , /*!< General device wide information. */ 341 QMOD16_DIAG_TOPOLOGY = 0x00000002 , /*!< Loopbacks etc. */ 342 QMOD16_DIAG_LINK = 0x00000004 , /*!< Link specific info. */ 343 QMOD16_DIAG_SPEED = 0x00000008 , /*!< sub-category of QMOD16_DIAG_LINK(for SDK) */ 344 QMOD16_DIAG_ANEG = 0x00000010 , /*!< Autoneg specific info. */ 345 QMOD16_DIAG_TFC = 0x00000020 , /*!< State of tx/rx internal tfc */ 346 QMOD16_DIAG_AN_TIMERS = 0x00000040 , /*!< AN timers */ 347 QMOD16_DIAG_STATE = 0x00000080 , /*!< Debug state registers */ 348 QMOD16_DIAG_DEBUG = 0x00000100 , /*!< Debug */ 349 QMOD16_DIAG_IEEE = 0x00000200 , /*!< IEEE related info */ 350 QMOD16_DIAG_EEE = 0x00000400 , /*!< EEE */ 351 QMOD16_SERDES_DIAG = 0x00008000 , /*!< PMD Triage */ 352 QMOD16_DIAG_BER = 0x00000800 , /*!< BER - PMD bit error rate */ 353 QMOD16_DIAG_CFG = 0x00001000 , /*!< CFG - PMD Lane/Core Config */ 354 QMOD16_DIAG_CL72 = 0x00002000 , /*!< CL72 - Status */ 355 QMOD16_DIAG_DSC = 0x00004000 , /*!< CL72 - Status */ 356 QMOD16_DIAG_ALL = 0x0000ffff , /*!< Everything but eye margin */ 357 QMOD16_DIAG_ILLEGAL = 0x00000000 /*!< Illegal value. programmatic boundary. */ 358 } qmod16_diag_type; 359 360 /*! \def CNT_qmod16_diag_type Types of enum qmod16_diag_type */ 361 #define CNT_qmod16_diag_type 14 362 363 /*! 364 \brief 365 This array returns the string version of the enum #qmod16_port_type when indexed 366 by the enum var. 367 368 */ 369 extern char* e2s_qmod16_diag_type [CNT_qmod16_diag_type]; 370 /*! \enum qmod16_pmd_diag_type 371 372 qmod16_pmd_diag_type enumerates categories of pmd diagnostic data. 373 has many intermediate stages between down and up. This enum is work in progress 374 375 */ 376 377 typedef enum { 378 QMOD16_SERDES_DIAG_CORE_CONFIG = 0x00000001 , /*!< SERDES DIAG */ 379 QMOD16_SERDES_DIAG_CORE_STATE = 0x00000002 , /*!< SERDES DIAG */ 380 QMOD16_SERDES_DIAG_LANE_CONFIG = 0x00000004 , /*!< SERDES DIAG */ 381 QMOD16_SERDES_DIAG_LANE_DEBUG_STATUS = 0x00000008 , /*!< SERDES DIAG */ 382 QMOD16_SERDES_DIAG_LANE_STATE = 0x00000010 , /*!< SERDES DIAG */ 383 QMOD16_SERDES_DIAG_LANE_STATE_HDR = 0x00000020 , /*!< SERDES DIAG */ 384 QMOD16_SERDES_DIAG_LANE_STATE_LEGEND = 0x00000040 , /*!< SERDES DIAG */ 385 QMOD16_SERDES_DIAG_CL72_STATUS = 0x00000080 , /*!< SERDES DIAG */ 386 QMOD16_SERDES_DIAG_EYE_DENSITY = 0x00000100 , /*!< SERDES DIAG */ 387 QMOD16_SERDES_DIAG_EYE_SCAN = 0x00000200 , /*!< SERDES DIAG */ 388 QMOD16_SERDES_DIAG_MEAS_EYE_DENSITY_DATA = 0x00000400 , /*!< SERDES DIAG */ 389 QMOD16_SERDES_DIAG_MEAS_EYE_SCAN_DONE = 0x00000800 , /*!< SERDES DIAG */ 390 QMOD16_SERDES_DIAG_MEAS_LOWBER_EYE = 0x00001000 , /*!< SERDES DIAG */ 391 QMOD16_SERDES_DIAG_READ_EYE_SCAN_STRIPE = 0x00002000 , /*!< SERDES DIAG */ 392 QMOD16_SERDES_DIAG_EYE_DENSITY_DATA = 0x00004000 , /*!< SERDES DIAG */ 393 QMOD16_SERDES_DIAG_LOWBER_EYE = 0x00008000 , /*!< SERDES DIAG */ 394 QMOD16_SERDES_DIAG_EYE_SCAN_VERTICAL = 0x00010000 , /*!< SERDES DIAG */ 395 QMOD16_SERDES_DIAG_EYE_SCAN_STRIPE = 0x00020000 , /*!< SERDES DIAG */ 396 QMOD16_SERDES_DIAG_EYE_SCAN_HEADER = 0x00040000 , /*!< SERDES DIAG */ 397 QMOD16_SERDES_DIAG_EYE_SCAN_FOOTER = 0x00080000 , /*!< SERDES DIAG */ 398 QMOD16_SERDES_DIAG_BER_SCAN_TEST = 0x00100000 , /*!< SERDES DIAG */ 399 QMOD16_SERDES_DIAG_READ_BER_SCAN_DATA = 0x00200000 , /*!< SERDES DIAG */ 400 QMOD16_SERDES_DIAG_EYE_MARGIN_PROJ = 0x00400000 , /*!< SERDES DIAG */ 401 QMOD16_SERDES_DIAG_DIG_LPBK = 0x00800000 , /*!< SERDES DIAG */ 402 QMOD16_SERDES_DIAG_MEAS_EYE_SCAN_START = 0x01000000 , /*!< SERDES DIAG */ 403 QMOD16_SERDES_DIAG_ILLEGAL = 0x00000000 /*!< Illegal value (enum boundary) */ 404 } qmod16_pmd_diag_type; 405 406 /*! \def CNT_qmod16_pmd_diag_type Types of enum qmod16_pmd_diag_type */ 407 #define CNT_qmod16_pmd_diag_type 26 408 409 /*! 410 \brief 411 This array returns the string version of the enum #qmod16_pmd_diag_type when indexed 412 by the enum var. 413 414 */ 415 extern char* e2s_qmod16_pmd_diag_type [CNT_qmod16_pmd_diag_type]; 416 /*! \enum qmod16_an_type 417 418 qmod16_an_type enumerates different types of autoneg modes in the PHY. 419 420 */ 421 422 typedef enum { 423 QMOD16_CL73 = 0 , /*!< PHY autoneg CL73 enable */ 424 QMOD16_CL37 , /*!< PHY autoneg CL37 enable */ 425 QMOD16_CL73_BAM , /*!< PHY autoneg CL73 enable with Brcm Aneg Mode */ 426 QMOD16_CL37_BAM , /*!< PHY autoneg CL37 enable with Brcm Aneg Mode */ 427 QMOD16_CL37_SGMII , /*!< PHY autoneg for SGMII */ 428 QMOD16_HPAM , /*!< PHY autoneg for HP aneg */ 429 QMOD16_AN_TYPE_ILLEGAL /*!< Illegal value. programmatic boundary. */ 430 } qmod16_an_type; 431 432 /*! \def CNT_qmod16_an_type Types of enum qmod16_an_type */ 433 #define CNT_qmod16_an_type 7 434 435 /*! 436 \brief 437 This array returns the string version of the enum #qmod16_pmd_diag_type when indexed 438 by the enum var. 439 440 */ 441 extern char* e2s_qmod16_an_type [CNT_qmod16_an_type]; 442 /*! \enum qmod16_eye_direction 443 444 The direction of slicer changing always moves from the middle of the eye. 445 Currently all speeds have the following bit positions in qmod16_st 446 447 \li QMOD16_EYE_VU: Vertical, Upward direction 448 \li QMOD16_EYE_VD: Vertical, Downward direction 449 \li QMOD16_EYE_HL: Horizontal, Left direction 450 \li QMOD16_EYE_HR: Horizontal, Right direction 451 452 453 */ 454 455 typedef enum { 456 QMOD16_EYE_VU = 0 , /*!< Vertical, Upward direction */ 457 QMOD16_EYE_VD , /*!< Vertical, Downward direction */ 458 QMOD16_EYE_HL , /*!< Horizontal, Left direction */ 459 QMOD16_EYE_HR , /*!< Horizontal, Right direction */ 460 QMOD16_EYE_ILLEGAL /*!< Programmatic illegal boundary. */ 461 } qmod16_eye_direction; 462 463 /*! \def CNT_qmod16_eye_direction Types of enum qmod16_eye_direction */ 464 #define CNT_qmod16_eye_direction 5 465 466 /*! 467 \brief 468 This array returns the string version of the enum #qmod16_pmd_diag_type when indexed 469 by the enum var. 470 471 */ 472 extern char* e2s_qmod16_eye_direction [CNT_qmod16_eye_direction]; 473 474 475 typedef enum { 476 QMOD16_ABILITY_1G_KX = 0 , /*!< CL73 speed 1G_KX ease */ 477 QMOD16_ABILITY_10G_KX4 , /*!< please write comments */ 478 QMOD16_ABILITY_10G_KR , /*!< please write comments */ 479 QMOD16_ABILITY_40G_KR4 , /*!< please write comments */ 480 QMOD16_ABILITY_40G_CR4 , /*!< please write comments */ 481 QMOD16_ABILITY_100G_CR10 , /*!< please write comments */ 482 QMOD16_ABILITY_20G_KR2 , /*!< please write comments */ 483 QMOD16_ABILITY_20G_CR2 , /*!< please write comments */ 484 QMOD16_ABILITY_ILLEGAL /*!< please write comments */ 485 } qmod16_tech_ability; 486 487 /*! \def CNT_qmod16_tech_ability Types of enum qmod16_tech_ability */ 488 #define CNT_qmod16_tech_ability 9 489 490 /*! 491 \brief 492 This array returns the string version of the enum #qmod16_pmd_diag_type when indexed 493 by the enum var. 494 495 */ 496 extern char* e2s_qmod16_tech_ability [CNT_qmod16_tech_ability]; 497 /*! 498 \brief 499 This array associates the enum #qmod16_lane_select enum with a bit mask. 500 The index is the #qmod16_lane_select enum value. The value for each entry is 501 interpreted as follows. If bit [n] is 1, then lane [n] is enabled; if bit [n] 502 is 0, then lane [n] is disabled. By enabled, we mean that such-and-such 503 function is to be called for a lane; by disabled, we mean that such-and-such 504 function is not to be called for a lane. So a value of 0xF indicates that all 505 lanes or enabled, while 0x5 indicates that only lanes 0 and 2 are enabled. 506 507 */ 508 extern int e2n_qmod16_tech_ability [CNT_qmod16_tech_ability]; 509 /*! \enum qmod16_cl37bam_ability 510 511 This array associates the enum #qmod16_lane_select enum with a bit mask. 512 The index is the #qmod16_lane_select enum value. The value for each entry is 513 interpreted as follows. If bit [n] is 1, then lane [n] is enabled; if bit [n] 514 is 0, then lane [n] is disabled. Enabled implies the function under 515 consideration be enebled for the lane. Disabled means the opposite. So a value 516 of 0xF indicates that all lanes or enabled, while 0x5 indicates that only lanes 517 0 and 2 are enabled. 518 519 qmod16_cl37bam_ability enumerates different types of speed advertisements in the 520 basic autoneg page for CL37BAM only. 521 522 Currently all speeds have the following bit positions in qmod16_st 523 524 \li QMOD16_BAM37ABL_2P5G Bit Pos: 0 525 \li QMOD16_BAM37ABL_5G_X4 Bit Pos: 1 526 \li QMOD16_BAM37ABL_6G_X4 Bit Pos: 2 527 \li QMOD16_BAM37ABL_10G_HIGIG Bit Pos: 3 528 \li QMOD16_BAM37ABL_10G_CX4 Bit Pos: 4 529 \li QMOD16_BAM37ABL_12G_X4 Bit Pos: 5 530 \li QMOD16_BAM37ABL_12P5_X4 Bit Pos: 6 531 \li QMOD16_BAM37ABL_13G_X4 Bit Pos: 7 532 \li QMOD16_BAM37ABL_15G_X4 Bit Pos: 8 533 \li QMOD16_BAM37ABL_16G_X4 Bit Pos: 9 534 \li QMOD16_BAM37ABL_20G_X4_CX4 Bit Pos: 10 535 \li QMOD16_BAM37ABL_20G_X4 Bit Pos: 11 536 \li QMOD16_BAM37ABL_21G_X4 Bit Pos: 12 537 \li QMOD16_BAM37ABL_25P455G Bit Pos: 13 538 \li QMOD16_BAM37ABL_31P5G Bit Pos: 14 539 \li QMOD16_BAM37ABL_32P7G Bit Pos: 15 540 \li QMOD16_BAM37ABL_40G Bit Pos: 16 541 \li QMOD16_BAM37ABL_10G_X2_CX4 Bit Pos: 17 542 \li QMOD16_BAM37ABL_10G_DXGXS Bit Pos: 18 543 \li QMOD16_BAM37ABL_10P5G_DXGXS Bit Pos: 19 544 \li QMOD16_BAM37ABL_12P7_DXGXS Bit Pos: 20 545 \li QMOD16_BAM37ABL_15P75G_R2 Bit Pos: 21 546 \li QMOD16_BAM37ABL_20G_X2_CX4 Bit Pos: 22 547 \li QMOD16_BAM37ABL_20G_X2 Bit Pos: 23 548 549 550 */ 551 552 typedef enum { 553 QMOD16_BAM37ABL_2P5G = 0 , /*!< X1 BRCM */ 554 QMOD16_BAM37ABL_5G_X4 , /*!< BRCM */ 555 QMOD16_BAM37ABL_6G_X4 , /*!< BRCM */ 556 QMOD16_BAM37ABL_10G_HIGIG , /*!< HG (10G_X4) */ 557 QMOD16_BAM37ABL_10G_CX4 , /*!< (10G_X4_CX4) */ 558 QMOD16_BAM37ABL_12G_X4 , /*!< HG */ 559 QMOD16_BAM37ABL_12P5_X4 , /*!< HG */ 560 QMOD16_BAM37ABL_13G_X4 , /*!< HG */ 561 QMOD16_BAM37ABL_15G_X4 , /*!< HG */ 562 QMOD16_BAM37ABL_16G_X4 , /*!< HG */ 563 QMOD16_BAM37ABL_20G_X4_CX4 , /*!< XAUI 8b10b scram(20G_X4S) */ 564 QMOD16_BAM37ABL_20G_X4 , /*!< HG */ 565 QMOD16_BAM37ABL_21G_X4 , /*!< HG */ 566 QMOD16_BAM37ABL_25P455G , /*!< X4 HG */ 567 QMOD16_BAM37ABL_31P5G , /*!< X4 HG */ 568 QMOD16_BAM37ABL_32P7G , /*!< X4 HG */ 569 QMOD16_BAM37ABL_40G , /*!< X4 BRCM HG (40G_X4) */ 570 QMOD16_BAM37ABL_10G_X2_CX4 , /*!< 10G_X2_CX4 */ 571 QMOD16_BAM37ABL_10G_DXGXS , /*!< 10G_X2 */ 572 QMOD16_BAM37ABL_10P5G_DXGXS , /*!< 10P5_X2 */ 573 QMOD16_BAM37ABL_12P7_DXGXS , /*!< 12P7_X2 */ 574 QMOD16_BAM37ABL_15P75G_R2 , /*!< 15P75_X2 */ 575 QMOD16_BAM37ABL_20G_X2_CX4 , /*!< 20G_X2_CX4 */ 576 QMOD16_BAM37ABL_20G_X2 , /*!< 20G_X2 */ 577 QMOD16_BAM37ABL_ILLEGAL /*!< Illegal. Programmatic boundary */ 578 } qmod16_cl37bam_ability; 579 580 /*! \def CNT_qmod16_cl37bam_ability Types of enum qmod16_cl37bam_ability */ 581 #define CNT_qmod16_cl37bam_ability 25 582 583 /*! 584 \brief 585 This array returns the string version of the enum #qmod16_pmd_diag_type when indexed 586 by the enum var. 587 588 */ 589 extern char* e2s_qmod16_cl37bam_ability [CNT_qmod16_cl37bam_ability]; 590 /*! \enum qmod16_diag_an_type 591 592 This array associates the enum #qmod16_lane_select enum with a bit mask. 593 The index is the #qmod16_lane_select enum value. The value for each entry is 594 interpreted as follows. If bit [n] is 1, then lane [n] is enabled; if bit [n] 595 is 0, then lane [n] is disabled. By enabled, we mean that such-and-such 596 function is to be called for a lane; by disabled, we mean that such-and-such 597 function is not to be called for a lane. So a value of 0xF indicates that all 598 lanes or enabled, while 0x5 indicates that only lanes 0 and 2 are enabled. 599 600 */ 601 602 typedef enum { 603 QMOD16_DIAG_AN_DONE = 0 , /*!< AN completion check */ 604 QMOD16_DIAG_AN_HCD , /*!< AN HCD speed check */ 605 QMOD16_DIAG_AN_TYPE_ILLEGAL /*!< Illegal value. programmatic boundary */ 606 } qmod16_diag_an_type; 607 608 /*! \def CNT_qmod16_diag_an_type Types of enum qmod16_diag_an_type */ 609 #define CNT_qmod16_diag_an_type 3 610 611 /*! 612 \brief 613 This array returns the string version of the enum #qmod16_pmd_diag_type when indexed 614 by the enum var. 615 616 */ 617 extern char* e2s_qmod16_diag_an_type [CNT_qmod16_diag_an_type]; 618 /*! \enum qmod16_tier1_function_type 619 620 This array associates the enum #qmod16_lane_select enum with a bit mask. 621 The index is the #qmod16_lane_select enum value. The value for each entry is 622 interpreted as follows. If bit [n] is 1, then lane [n] is enabled; if bit [n] 623 is 0, then lane [n] is disabled. By enabled, we mean that such-and-such 624 function is to be called for a lane; by disabled, we mean that such-and-such 625 function is not to be called for a lane. So a value of 0xF indicates that all 626 lanes or enabled, while 0x5 indicates that only lanes 0 and 2 are enabled. 627 628 */ 629 630 typedef enum { 631 PCS_BYPASS_CTL = 0 , /*!< qmod16_pcs_bypass_ctl */ 632 INIT_PCS , /*!< qmod16_init_pcs */ 633 INIT_PMD_SW , /*!< qmod16_init_pmd_sw */ 634 INIT_PMD , /*!< qmod16_init_pmd */ 635 PMD_RESET_SEQ , /*!< qmod16_pmd_reset_seq */ 636 PMD_X4_RESET , /*!< qmod16_pmd_x4_reset */ 637 WAIT_SC_DONE , /*!< qmod16_wait_sc_done */ 638 ENABLE_SET , /*!< qmod16_enable_set */ 639 FECMODE_SET , /*!< qmod16_fecmode_set */ 640 GET_PCS_LINK_STATUS , /*!< qmod16_get_pcs_link_status */ 641 OVERRIDE_SET , /*!< qmod16_override_set */ 642 CREDIT_OVERRIDE_SET , /*!< qmod16_credit_override_set */ 643 ENCODE_SET , /*!< qmod16_encode_set */ 644 DECODE_SET , /*!< qmod16_decode_set */ 645 CREDIT_CONTROL , /*!< qmod16_credit_control */ 646 TX_LANE_CONTROL , /*!< qmod16_tx_lane_control */ 647 RX_LANE_CONTROL , /*!< qmod16_rx_lane_control */ 648 TX_LANE_DISABLE , /*!< qmod16_tx_lane_disable */ 649 POWER_CONTROL , /*!< qmod16_power_control */ 650 AUTONEG_SET , /*!< qmod16_autoneg_set */ 651 AUTONEG_GET , /*!< qmod16_autoneg_get */ 652 AUTONEG_CONTROL , /*!< qmod16_autoneg_control */ 653 TSC12_CONTROL , /*!< qmod16_tsc12_control */ 654 CHECK_SC_STATS , /*!< qmod16_check_sc_stats */ 655 REG_READ , /*!< qmod16_reg_read */ 656 REG_WRITE , /*!< qmod16_reg_write */ 657 PRBS_CHECK , /*!< qmod16_prbs_check */ 658 CJPAT_CRPAT_MODE_SET , /*!< qmod16_cjpat_crpat_mode_set */ 659 CJPAT_CRPAT_CHECK , /*!< qmod16_cjpat_crpat_check */ 660 QMOD16_DIAG , /*!< qmod16_diag */ 661 PCS_LANE_SWAP , /*!< qmod16_pcs_lane_swap */ 662 PMD_LANE_SWAP , /*!< qmod16_pmd_lane_swap */ 663 PMD_LANE_SWAP_TX , /*!< qmod16_pmd_lane_swap_tx */ 664 PARALLEL_DETECT_CONTROL , /*!< qmod16_parallel_detect_control */ 665 REVID_READ , /*!< qmod16_revid_read */ 666 SOFT_RESET , /*!< qmod16_soft_reset */ 667 SET_SPD_INTF , /*!< qmod16_set_spd_intf */ 668 SET_PORT_MODE , /*!< qmod16_set_port_mode */ 669 EEE_PASSTHRU_SET , /*!< qmod16_EEE_pass_thru_set */ 670 EEE_PASSTHRU_GET , /*!< qmod16_EEE_pass_thru_get */ 671 FEC_CONTROL , /*!< qmod16_FEC_control */ 672 HIGIG2_CONTROL , /*!< qmod16_HIGIG2_control */ 673 LF_RF_CONTROL , /*!< qmod16_LF_RF_control */ 674 RX_FAST_LOCK_CONTROL , /*!< qmod16_rx_fast_lock_control */ 675 PMD_CORE_RESET , /*!< qmod16_pmd_core_reset */ 676 PMD_LANE_RESET , /*!< qmod16_pmd_lane_reset */ 677 AFE_SPEED_UP_DSC_VGA , /*!< qmod16_afe_speed_up_dsc_vga */ 678 CLAUSE_72_CONTROL , /*!< qmod16_clause72_control */ 679 PLL_SEQUENCER_CONTROL , /*!< qmod16_pll_sequencer_control */ 680 PLL_LOCK_WAIT , /*!< qmod16_pll_lock_wait */ 681 PROG_DATA , /*!< qmod16_prog_data */ 682 RX_SEQ_CONTROL , /*!< qmod16_rx_seq_control */ 683 SET_POLARITY , /*!< qmod16_tx_rx_polarity */ 684 PRBS_CONTROL , /*!< qmod16_prbs_control */ 685 PRBS_MODE , /*!< qmod16_prbs_mode */ 686 RX_PF_CONTROL , /*!< qmod16_rx_PF_control */ 687 RX_VGA_CONTROL , /*!< qmod16_rx_VGA_control */ 688 CJPAT_CRPAT_CONTROL , /*!< qmod16_cjpat_crpat_control */ 689 TX_LOOPBACK_CONTROL , /*!< qmod16_tx_loopback_control */ 690 TX_PMD_LOOPBACK_CONTROL , /*!< qmod16_tx_pmd_loopback_control */ 691 RX_LOOPBACK_CONTROL , /*!< qmod16_rx_loopback_control */ 692 RX_P1_SLICER_CONTROL , /*!< qmod16_rx_p1_slicer_control */ 693 RX_M1_SLICER_CONTROL , /*!< qmod16_rx_m1_slicer_control */ 694 RX_D_SLICER_CONTROL , /*!< qmod16_rx_d_slicer_control */ 695 WAIT_PMD_LOCK , /*!< qmod16_wait_pmd_lock */ 696 FIRMWARE_SET , /*!< qmod16_firmware_set */ 697 PMD_RESET_BYPASS , /*!< qmod16_pmd_reset_bypass */ 698 PMD_OVERRIDE_CONTROL , /*!< qmod16_pmd_override_control */ 699 SET_QPORT_SPD , /*!< qmod16_set_qport_spd */ 700 SET_QSGMII_EN , /*!< qmod16_set_qsgmii_en */ 701 QMOD16E_DISABLE_SET , /*!< qmod16_disable_set */ 702 PLL_LOCK_GET , /*!< qmod16_pll_lock_get */ 703 PMD_LOCK_GET , /*!< qmod16_pmd_lock_get */ 704 AUTONEG_SET_INIT , /*!< qmod16_autonet_set_init */ 705 AUTONEG_ABILITIES_CONTROL , /*!< qmod16_autonet_abilities_controls */ 706 AUTONEG_CL37_BASE_ABILITIES , /*!< qmod16_autoneg_cl37_base_abilities */ 707 AUTONEG_CL37_BAM_OVER1G_ABILITIES , /*!< qmod16_autoneg_cl37_bam_over1g_abilities */ 708 AUTONEG_AUTONEG_CONTROL_GET , /*!< qmod16_autoneg_control_get */ 709 AUTONEG_AUTONEG_LOCAL_ABILITY_GET , /*!< qmod16_autoneg_local_ability_get */ 710 AUTONEG_AUTONEG_REMOTE_ABILITY_GET , /*!< qmod16_autoneg_remote_ability_get */ 711 AUTONEG_AN_ABILITIES_ENABLES , /*!< qmod16_an_abilities_enables */ 712 AUTONEG_GET_HT_ENTRIES , /*!< qmod16_get_ht_entries */ 713 UPDATE_PORT_MODE_SELECT , /*!< qmod16_update_port_mode_select */ 714 TX_RX_POLARITY_SET , /*!< qmod16_tx_rx_polarity_set */ 715 TX_RX_POLARITY_GET , /*!< qmod16_tx_rx_polarity_get */ 716 TX_PI_CONTROL_GET , /*!< qmod16_tx_pi_control_get */ 717 TX_LANE_DISABLE_SET , /*!< qmod16_tx_lane_disable_set */ 718 TX_LANE_DISABLE_GET , /*!< qmod16_tx_lane_disable_get */ 719 SPEED_ID_GET , /*!< qmod16_speed_id_get */ 720 PMD_LANE_SWAP_TX_GET , /*!< qmod16_pmd_lane_swap_tx_get */ 721 PLL_RESET_ENABLE_SET , /*!< qmod16_pll_reset_enable_set */ 722 PLL_MODE_SET , /*!< qmod16_pll_mode_set */ 723 PCS_LANE_SWAP_GET , /*!< qmod16_pcs_lane_swap_get */ 724 OSMODE_SET , /*!< qmod16_osmode_set */ 725 MASTER_PORT_NUM_SET , /*!< qmod16_master_port_num_set */ 726 GET_PLLDIV , /*!< qmod16_get_plldiv */ 727 DISABLE_GET , /*!< qmod16_disable_get */ 728 FIRMWARE_LOAD , /*!< qmod16_firmware_load */ 729 PRBS_RX_POLYNOMIAL_SET , /*!< qmod16_prbs_rx_polynomial_set */ 730 RX_LANE_CONTROL_SET , /*!< qmod16_rx_lane_control_set */ 731 RX_LANE_CONTROL_GET , /*!< qmod16_rx_lane_control_get */ 732 TRIGGER_SPEED_CHANGE , /*!< qmod16_trigger_speed_change */ 733 TIER1_FUNCTION_ILLEGAL /*!< always last */ 734 } qmod16_tier1_function_type; 735 736 /*! \def CNT_qmod16_tier1_function_type Types of enum qmod16_tier1_function_type */ 737 #define CNT_qmod16_tier1_function_type 103 738 739 /*! 740 \brief 741 This array returns the string version of the enum #qmod16_pmd_diag_type when indexed 742 by the enum var. 743 744 */ 745 extern char* e2s_qmod16_tier1_function_type [CNT_qmod16_tier1_function_type]; 746 747 /*! \def CNT_sc_mode_type Types of enum sc_mode_type */ 748 #define CNT_sc_mode_type 8 749 750 /*! 751 \brief 752 This array returns the string version of the enum 753 #qmod16_core_select when 754 indexed by the enum var. 755 756 */ 757 extern char* e2s_sc_mode_type [CNT_sc_mode_type]; 758 759 /*! \enum qmod16_pll_mode_type 760 qmod16_pll_mode_type divides the PLL to get a clock which is a multiple of the 761 refernce clock. This clock runs all the digital logic in the MAC and PHY layers 762 and is referred to as TSC_CLK. To get the TSC_CLK, you simply multiply the 763 reference clock by the pll divider value (not the reg. bit location) 764 765 */ 766 767 typedef enum { 768 QMOD16_PLL_MODE_DIV_ZERO = 0 , /*!< Illegal PLL Divider Number */ 769 QMOD16_PLL_MODE_DIV_40 = 2 , /*!< Multiply ref. clk by 40 */ 770 QMOD16_PLL_MODE_DIV_42 = 3 , /*!< Multiply ref. clk by 42 */ 771 QMOD16_PLL_MODE_DIV_48 = 4 , /*!< Multiply ref. clk by 48 */ 772 QMOD16_PLL_MODE_DIV_52 = 6 , /*!< Multiply ref. clk by 52 */ 773 QMOD16_PLL_MODE_DIV_54 = 7 , /*!< Multiply ref. clk by 54 */ 774 QMOD16_PLL_MODE_DIV_60 = 8 , /*!< Multiply ref. clk by 60 */ 775 QMOD16_PLL_MODE_DIV_64 = 9 , /*!< Multiply ref. clk by 64 */ 776 QMOD16_PLL_MODE_DIV_66 = 10 , /*!< Multiply ref. clk by 66 */ 777 QMOD16_PLL_MODE_DIV_70 = 12 , /*!< Multiply ref. clk by 70 */ 778 QMOD16_PLL_MODE_DIV_80 = 13 , /*!< Multiply ref. clk by 80 */ 779 QMOD16_PLL_MODE_DIV_92 = 14 , /*!< Multiply ref. clk by 92 */ 780 QMOD16_PLL_MODE_DIV_ILLEGAL /*!< Illegal (programmatic boundary) */ 781 } qmod16_pll_mode_type; 782 783 /*! \def CNT_qmod16_pll_mode_type Types of enum qmod16_pll_mode_type */ 784 #define CNT_qmod16_pll_mode_type 13 785 786 /*! 787 \brief 788 This array returns the string of #qmod16_pll_mode_type when indexed by the enum. 789 790 */ 791 extern char* e2s_qmod16_pll_mode_type [CNT_qmod16_pll_mode_type]; 792 /*! 793 \brief 794 This array returns the clock multiplier of #qmod16_pll_mode_type when indexed by the enum. 795 796 */ 797 extern int e2n_qmod16_pll_mode_type [CNT_qmod16_pll_mode_type]; 798 /*! \enum qmod16_os_mode_type 799 800 801 The oversampling mode means that bits are sent out more than once to reduce 802 the effective frequency of data transfer. For example you can send 5G bits 803 over a 10G bit lane by sending every bit twice, or OS=2. When the OS is 3.3 804 it's a bit tricky, we send bits 3 or 4 times in a pattern like so 805 3,3,3,4,3,3,3,4,... Similarly for OS = 8, we send 8,8,8,9,8,8,8,9,... 806 807 808 */ 809 810 typedef enum { 811 QMOD16_PMA_OS_MODE_1 = 0 , /*!< Over sampling Mode 1 */ 812 QMOD16_PMA_OS_MODE_2 = 1 , /*!< Over sampling Mode 2 */ 813 QMOD16_PMA_OS_MODE_3 = 2 , /*!< Over sampling Mode 3 */ 814 QMOD16_PMA_OS_MODE_3_3 = 3 , /*!< Over sampling Mode 3.3 */ 815 QMOD16_PMA_OS_MODE_4 = 4 , /*!< Over sampling Mode 4 */ 816 QMOD16_PMA_OS_MODE_5 = 5 , /*!< Over sampling Mode 5 */ 817 QMOD16_PMA_OS_MODE_7_25 = 6 , /*!< Over sampling Mode 7.25 */ 818 QMOD16_PMA_OS_MODE_8 = 7 , /*!< Over sampling Mode 8 */ 819 QMOD16_PMA_OS_MODE_8_25 = 8 , /*!< Over sampling Mode 8.25 */ 820 QMOD16_PMA_OS_MODE_10 = 9 , /*!< Over sampling Mode 10 */ 821 QMOD16_PMA_OS_MODE_ILLEGAL = 15 /*!< Over sampling Mode Illegal */ 822 } qmod16_os_mode_type; 823 824 /*! \def CNT_qmod16_os_mode_type Types of enum qmod16_os_mode_type */ 825 #define CNT_qmod16_os_mode_type 11 826 827 /*! 828 \brief 829 This array returns the string of #qmod16_os_mode when indexed by the enum. 830 831 */ 832 extern char* e2s_qmod16_os_mode_type [CNT_qmod16_os_mode_type]; 833 /*! 834 \brief 835 This array returns the over sampling value of #qmod16_os_mode when indexed by 836 the enum. For floating values 3.3 and 8.25 it returns 33 and 825. 837 838 */ 839 extern int e2n_qmod16_os_mode_type [CNT_qmod16_os_mode_type]; 840 /*! \enum qmod16_scr_mode 841 842 This mode indicates how many bits of a 'frame' will be scrambled. We have either 843 66 or 80 bits per frame (depending on 8b10b or 64b66b encoding). Normally 844 scrambling is 845 846 \li bypassed for baud rates under 6.25G (0). 847 \li we scramble all 66 bits (1) 848 \li all 80 bits(2) 849 \li only 64 of the 66b (3). i.e we don't scramble the 'sync' bits. 850 851 */ 852 853 typedef enum { 854 QMOD16_SCR_MODE_BYPASS = 0 , /*!< Scrambling Mode bypassed */ 855 QMOD16_SCR_MODE_66B = 1 , /*!< Scrambling Mode 66B */ 856 QMOD16_SCR_MODE_80B = 2 , /*!< Scrambling Mode 80B */ 857 QMOD16_SCR_MODE_64B = 3 /*!< Scrambling Mode 64B */ 858 } qmod16_scr_mode; 859 860 /*! \def CNT_qmod16_scr_mode Types of enum qmod16_scr_mode */ 861 #define CNT_qmod16_scr_mode 4 862 863 /*! 864 \brief 865 This array returns the string of #qmod16_scr_mode when indexed by the enum. 866 867 */ 868 extern char* e2s_qmod16_scr_mode [CNT_qmod16_scr_mode]; 869 /*! 870 \brief 871 This array returns the scrambling mode of #qmod16_scr_mode when indexed by 872 the enum. 873 874 */ 875 extern int e2n_qmod16_scr_mode [CNT_qmod16_scr_mode]; 876 /*! \enum qmod16_encode_mode 877 878 Serial bits are encoded when transmitted. The encoding depends on the baud rate 879 and the link type 880 \li 000 All encoding functions disabled for lane 881 \li 001 8b10b (cl48 ) 882 \li 010 8b10b (cl48 rxaui) 883 \li 011 8b10b (cl36 ) 884 \li 100 64b66b (cl82 ) 885 \li 101 64b66b (cl49 ) 886 \li 110 64b66b (brcm ) 887 888 */ 889 890 typedef enum { 891 QMOD16_ENCODE_MODE_NONE = 0 , /*!< Encoding Mode NONE */ 892 QMOD16_ENCODE_MODE_CL48 = 1 , /*!< Encoding Mode CL48 */ 893 QMOD16_ENCODE_MODE_CL48_2_LANE = 2 , /*!< Encoding Mode CL48 */ 894 QMOD16_ENCODE_MODE_CL36 = 3 , /*!< Encoding Mode CL36 */ 895 QMOD16_ENCODE_MODE_CL82 = 4 , /*!< Encoding Mode CL82 */ 896 QMOD16_ENCODE_MODE_CL49 = 5 , /*!< Encoding Mode CL49 */ 897 QMOD16_ENCODE_MODE_BRCM = 6 , /*!< Encoding Mode BRCM */ 898 QMOD16_ENCODE_MODE_ILLEGAL = 7 /*!< Encoding Mode Illegal */ 899 } qmod16_encode_mode; 900 901 /*! \def CNT_qmod16_encode_mode Types of enum qmod16_encode_mode */ 902 #define CNT_qmod16_encode_mode 8 903 904 /*! 905 \brief 906 This array returns the string of #qmod16_encode_mode when indexed by the enum. 907 908 */ 909 extern char* e2s_qmod16_encode_mode [CNT_qmod16_encode_mode]; 910 /*! 911 \brief 912 This array returns the encoding mode of #qmod16_encode_mode when indexed by 913 the enum. 914 915 */ 916 extern int e2n_qmod16_encode_mode [CNT_qmod16_encode_mode]; 917 /*! \enum qmod16_check_end_mode 918 919 Check end is a disparity based error bit set by the PCS for CL48. The generation 920 of this error bit depends on the speed. 921 922 */ 923 924 typedef enum { 925 QMOD16_CL48_CHECK_END_OFF = 0 , /*!< Don't generate checkend error bit */ 926 QMOD16_CL48_CHECK_END_ON = 1 /*!< generate checkend error bit */ 927 } qmod16_check_end_mode; 928 929 /*! \def CNT_qmod16_check_end_mode Types of enum qmod16_check_end_mode */ 930 #define CNT_qmod16_check_end_mode 2 931 932 /*! 933 \brief 934 This array returns the string of #qmod16_check_end_mode when indexed by the enum. 935 936 */ 937 extern char* e2s_qmod16_check_end_mode [CNT_qmod16_check_end_mode]; 938 /*! \enum qmod16_sigdet_filter 939 940 No documentation available 941 942 */ 943 944 typedef enum { 945 QMOD16_SIGDET_FILTER_NONCX4 = 0 , /*!< No description available */ 946 QMOD16_SIGDET_FILTER_CX4 = 1 /*!< No description available */ 947 } qmod16_sigdet_filter; 948 949 /*! \def CNT_qmod16_sigdet_filter Types of enum qmod16_sigdet_filter */ 950 #define CNT_qmod16_sigdet_filter 2 951 952 /*! 953 \brief 954 This array returns the string of #qmod16_sigdet_filter when indexed by the enum. 955 956 */ 957 extern char* e2s_qmod16_sigdet_filter [CNT_qmod16_sigdet_filter]; 958 /*! \enum qmod16_blocksync_mode 959 960 A block is detected in ports with multiple lanes. PCS has to recognize blocks 961 since the bits may come in skewed in time over lanes. This feature identifies 962 the block type, which is a feature of the speed. 963 964 000 none 965 001 cl49 mode - enables func_cl49cl82_sync block 966 010 cl82 mode - enables func_cl49cl82_sync block 967 011 8b10b mode - enables the func_8b10b_sync block 968 100 fec mode - enables the func_fec_sync block 969 101 brcm 64b66b mode 970 971 */ 972 973 typedef enum { 974 QMOD16_BLOCKSYNC_MODE_NONE = 0 , /*!< Block sync mode none */ 975 QMOD16_BLOCKSYNC_MODE_CL49 = 1 , /*!< Block sync mode CL49 type */ 976 QMOD16_BLOCKSYNC_MODE_CL82 = 2 , /*!< Block sync mode CL82 type */ 977 QMOD16_BLOCKSYNC_MODE_8B10B = 3 , /*!< Block sync mode 8B10B type */ 978 QMOD16_BLOCKSYNC_MODE_FEC = 4 , /*!< Block sync mode FEC type */ 979 QMOD16_BLOCKSYNC_MODE_BRCM = 5 , /*!< Block sync mode BRCM type */ 980 QMOD16_BLOCKSYNC_MODE_ILLEGAL = 7 /*!< Block sync mode illegal */ 981 } qmod16_blocksync_mode; 982 983 /*! \def CNT_qmod16_blocksync_mode Types of enum qmod16_blocksync_mode */ 984 #define CNT_qmod16_blocksync_mode 7 985 986 /*! 987 \brief 988 This array returns the string of #qmod16_blocksync_mode when indexed by the enum. 989 990 */ 991 extern char* e2s_qmod16_blocksync_mode [CNT_qmod16_blocksync_mode]; 992 /*! \enum qmod16_reorder_mode 993 994 Depending on aggregation mode we have various types of reordering of serial 995 bits. 996 997 */ 998 999 typedef enum { 1000 QMOD16_R_REORDER_MODE_NONE = 0 , /*!< Reorder mode NONE type */ 1001 QMOD16_R_REORDER_MODE_CL48 = 1 , /*!< Reorder mode CL48 type */ 1002 QMOD16_R_REORDER_MODE_CL36 = 2 , /*!< Reorder mode CL36 type */ 1003 QMOD16_R_REORDER_MODE_CL36_CL48 = 3 /*!< Reorder mode CL36_CL48 type */ 1004 } qmod16_reorder_mode; 1005 1006 /*! \def CNT_qmod16_reorder_mode Types of enum qmod16_reorder_mode */ 1007 #define CNT_qmod16_reorder_mode 4 1008 1009 /*! 1010 \brief 1011 This array returns the string of #qmod16_reorder_mode when indexed by the enum. 1012 1013 */ 1014 extern char* e2s_qmod16_reorder_mode [CNT_qmod16_reorder_mode]; 1015 /*! \enum qmod16_cl36_mode 1016 1017 Cl36 mode control 1018 1019 */ 1020 1021 typedef enum { 1022 QMOD16_CL36_DISABLE = 0 , /*!< */ 1023 QMOD16_CL36_ENABLE = 1 /*!< */ 1024 } qmod16_cl36_mode; 1025 1026 /*! \def CNT_qmod16_cl36_mode Types of enum qmod16_cl36_mode */ 1027 #define CNT_qmod16_cl36_mode 2 1028 1029 /*! 1030 \brief 1031 This array returns the string of #qmod16_cl36_mode when indexed by the enum. 1032 1033 */ 1034 extern char* e2s_qmod16_cl36_mode [CNT_qmod16_cl36_mode]; 1035 /*! \enum qmod16_descrambler_mode 1036 1037 The descrambling must match the scrambling done at the transmitting port. 1038 1039 */ 1040 1041 typedef enum { 1042 QMOD16_R_DESCR1_MODE_BYPASS = 0 , /*!< No descrambling */ 1043 QMOD16_R_DESCR1_MODE_66B = 1 , /*!< 66b descrambling */ 1044 QMOD16_R_DESCR1_MODE_10B = 2 , /*!< 10b descrambling */ 1045 QMOD16_R_DESCR1_MODE_ILLEGAL = 3 /*!< */ 1046 } qmod16_descrambler_mode; 1047 1048 /*! \def CNT_qmod16_descrambler_mode Types of enum qmod16_descrambler_mode */ 1049 #define CNT_qmod16_descrambler_mode 4 1050 1051 /*! 1052 \brief 1053 This array returns the string of #qmod16_descrambler_mode when indexed by the enum. 1054 1055 */ 1056 extern char* e2s_qmod16_descrambler_mode [CNT_qmod16_descrambler_mode]; 1057 /*! \enum qmod16_decoder_mode 1058 1059 The descrambling must match the scrambling done at the transmitting port. 1060 1061 */ 1062 1063 typedef enum { 1064 QMOD16_DECODER_MODE_NONE = 0 , /*!< decoder mode NONE */ 1065 QMOD16_DECODER_MODE_CL49 = 1 , /*!< decoder mode CL49 */ 1066 QMOD16_DECODER_MODE_BRCM = 2 , /*!< decoder mode BRCM */ 1067 QMOD16_DECODER_MODE_ALU = 3 , /*!< decoder mode ALU */ 1068 QMOD16_DECODER_MODE_CL48 = 4 , /*!< decoder mode CL48 */ 1069 QMOD16_DECODER_MODE_CL36 = 5 , /*!< decoder mode CL36 */ 1070 QMOD16_DECODER_MODE_CL82 = 6 , /*!< decoder mode CL82 */ 1071 QMOD16_DECODER_MODE_ILLEGAL = 7 /*!< decoder mode ILLEGAL */ 1072 } qmod16_decoder_mode; 1073 1074 /*! \def CNT_qmod16_decoder_mode Types of enum qmod16_decoder_mode */ 1075 #define CNT_qmod16_decoder_mode 8 1076 1077 /*! 1078 \brief 1079 This array returns the string of #qmod16_decoder_mode when indexed by the enum. 1080 1081 */ 1082 extern char* e2s_qmod16_decoder_mode [CNT_qmod16_decoder_mode]; 1083 /*! \enum qmod16_deskew_mode 1084 1085 Deskew Mode is a function of speed. 1086 1087 */ 1088 1089 typedef enum { 1090 QMOD16_R_DESKEW_MODE_BYPASS = 0 , /*!< deskew mode BYPASS */ 1091 QMOD16_R_DESKEW_MODE_8B_10B = 1 , /*!< deskew mode 8B_10B */ 1092 QMOD16_R_DESKEW_MODE_BRCM_66B = 2 , /*!< deskew mode BRCM_66B */ 1093 QMOD16_R_DESKEW_MODE_CL82_66B = 3 , /*!< deskew mode CL82_66B */ 1094 QMOD16_R_DESKEW_MODE_CL36_10B = 4 , /*!< deskew mode CL36_10B */ 1095 QMOD16_R_DESKEW_MODE_ILLEGAL = 7 /*!< deskew mode ILLEGAL */ 1096 } qmod16_deskew_mode; 1097 1098 /*! \def CNT_qmod16_deskew_mode Types of enum qmod16_deskew_mode */ 1099 #define CNT_qmod16_deskew_mode 6 1100 1101 /*! 1102 \brief 1103 This array returns the string of #qmod16_deskew_mode when indexed by the enum. 1104 1105 */ 1106 extern char* e2s_qmod16_deskew_mode [CNT_qmod16_deskew_mode]; 1107 /*! \enum qmod16_descrambler2_mode 1108 1109 No description 1110 1111 */ 1112 1113 typedef enum { 1114 QMOD16_DESC2_MODE_NONE = 0 , /*!< Descrambler2 mode NONE */ 1115 QMOD16_DESC2_MODE_CL49 = 1 , /*!< Descrambler2 mode CL49 */ 1116 QMOD16_DESC2_MODE_BRCM = 2 , /*!< Descrambler2 mode BRCM */ 1117 QMOD16_DESC2_MODE_ALU = 3 , /*!< Descrambler2 mode ALU */ 1118 QMOD16_DESC2_MODE_CL48 = 4 , /*!< Descrambler2 mode CL48 */ 1119 QMOD16_DESC2_MODE_CL36 = 5 , /*!< Descrambler2 mode CL36 */ 1120 QMOD16_DESC2_MODE_CL82 = 6 , /*!< Descrambler2 mode CL82 */ 1121 QMOD16_DESC2_MODE_ILLEGAL = 7 /*!< Descrambler2 mode ILLEGAL */ 1122 } qmod16_descrambler2_mode; 1123 1124 /*! \def CNT_qmod16_descrambler2_mode Types of enum qmod16_descrambler2_mode */ 1125 #define CNT_qmod16_descrambler2_mode 8 1126 1127 /*! 1128 \brief 1129 This array returns the string of #qmod16_descrambler2_mode when indexed by the enum. 1130 1131 */ 1132 extern char* e2s_qmod16_descrambler2_mode [CNT_qmod16_descrambler2_mode]; 1133 /*! \enum qmod16_byte_del_mode 1134 1135 For low speeds, data is duplicted 10 or 100 times to run at higher bauds. For 1136 example in a 10G lane, we duplicate 100M data 100 times. On the receive side 1137 these duplicate bits must be deleted. 1138 \li 0 - 100M mode (Delete 9 out of every 10 bytes) 1139 \li 1 - 10M mode (Delete 99 out of every 100 bytes) 1140 \li 2 - Passthrough (No deletion) 1141 1142 1143 */ 1144 1145 typedef enum { 1146 QMOD16_R_DESC2_BYTE_DELETION_100M = 0 , /*!< 100M type Byte deletion */ 1147 QMOD16_R_DESC2_BYTE_DELETION_10M = 1 , /*!< 10M type Byte deletion */ 1148 QMOD16_R_DESC2_BYTE_DELETION_NONE = 2 /*!< No Byte deletion */ 1149 } qmod16_byte_del_mode; 1150 1151 /*! \def CNT_qmod16_byte_del_mode Types of enum qmod16_byte_del_mode */ 1152 #define CNT_qmod16_byte_del_mode 3 1153 1154 /*! 1155 \brief 1156 This array returns the string of #qmod16_blocksync_mode when indexed by the enum. 1157 1158 */ 1159 extern char* e2s_qmod16_byte_del_mode [CNT_qmod16_byte_del_mode]; 1160 /*! \enum qmod16_decode_descr_mode 1161 1162 No description 1163 1164 */ 1165 1166 typedef enum { 1167 QMOD16_R_DEC1_DESCR_MODE_NONE = 0 , /*!< */ 1168 QMOD16_R_DEC1_DESCR_MODE_BRCM64B66B = 1 /*!< */ 1169 } qmod16_decode_descr_mode; 1170 1171 /*! \def CNT_qmod16_decode_descr_mode Types of enum qmod16_decode_descr_mode */ 1172 #define CNT_qmod16_decode_descr_mode 2 1173 1174 /*! 1175 \brief 1176 This array returns the string of #qmod16_decode_descr_mode when indexed by the enum. 1177 1178 */ 1179 extern char* e2s_qmod16_decode_descr_mode [CNT_qmod16_decode_descr_mode]; 1180 /*! \enum an_property_enable 1181 1182 No description 1183 1184 */ 1185 1186 typedef enum { 1187 QMOD16_AN_PROPERTY_ENABLE_NONE = 0x00000000 , /*!< */ 1188 QMOD16_AN_PROPERTY_ENABLE_SGMII_MASTER_MODE = 0x00000001 , /*!< */ 1189 QMOD16_AN_PROPERTY_ENABLE_AN_PD_TO_CL37 = 0x00000002 , /*!< */ 1190 QMOD16_AN_PROPERTY_ENABLE_SGMII_TO_CL37_AUTO = 0x00000004 , /*!< */ 1191 QMOD16_AN_PROPERTY_ENABLE_CL37_BAM_to_SGMII_AUTO = 0x00000008 , /*!< */ 1192 QMOD16_AN_PROPERTY_ENABLE_HPAM_TO_CL73_AUTO = 0x00000010 , /*!< */ 1193 QMOD16_AN_PROPERTY_ENABLE_CL73_BAM_TO_HPAM_AUTO = 0x00000020 , /*!< */ 1194 QMOD16_AN_PROPERTY_ENABLE_ILLEGAL = 0x00000040 /*!< */ 1195 } an_property_enable; 1196 1197 /*! \def CNT_an_property_enable Types of enum an_property_enable */ 1198 #define CNT_an_property_enable 8 1199 1200 /*! \enum credit_type_t 1201 1202 No description 1203 1204 */ 1205 1206 typedef enum { 1207 QMOD16_CREDIT_RESET = 0x00000000 , /*!< */ 1208 QMOD16_CREDIT_TABLE = 0x00000001 , /*!< */ 1209 QMOD16_CREDIT_CLOCK_COUNT_0 = 0x00000002 , /*!< */ 1210 QMOD16_CREDIT_CLOCK_COUNT_1 = 0x00000004 , /*!< */ 1211 QMOD16_CREDIT_LOOP_COUNT_0 = 0x00000008 , /*!< */ 1212 QMOD16_CREDIT_LOOP_COUNT_1 = 0x00000010 , /*!< */ 1213 QMOD16_CREDIT_MAC = 0x00000020 , /*!< */ 1214 QMOD16_CREDIT_PCS_CLOCK_COUNT_0 = 0x00000040 , /*!< */ 1215 QMOD16_CREDIT_PCS_GEN_COUNT = 0x00000080 , /*!< */ 1216 QMOD16_CREDIT_EN = 0x00000100 , /*!< */ 1217 QMOD16_CREDIT_PCS_REPCNT = 0x00000200 , /*!< */ 1218 QMOD16_CREDIT_SGMII_SPD = 0x00000400 , /*!< */ 1219 QMOD16_CREDIT_ILLEGAL = 0x00000800 /*!< */ 1220 } credit_type_t; 1221 1222 /*! \def CNT_credit_type_t Types of enum credit_type_t */ 1223 #define CNT_credit_type_t 13 1224 1225 /*! \enum override_type_t 1226 1227 No description 1228 1229 */ 1230 1231 typedef enum { 1232 QMOD16_OVERRIDE_RESET = 0x00000000 , /*!< */ 1233 QMOD16_OVERRIDE_QSGMII_EN = 0x00000003 , /*!< */ 1234 QMOD16_OVERRIDE_CL36BYTEDEL_MODE = 0x00000001 , /*!< */ 1235 QMOD16_OVERRIDE_OS_MODE = 0x00000002 , /*!< */ 1236 QMOD16_OVERRIDE_CREDIT_EN = 0x00000008 , /*!< */ 1237 QMOD16_OVERRIDE_ALL = 0x00008000 /*!< */ 1238 } override_type_t; 1239 1240 /*! \def CNT_override_type_t Types of enum override_type_t */ 1241 #define CNT_override_type_t 18 1242 1243 /*! \enum qmod16_ref_clk_t 1244 1245 No description 1246 1247 */ 1248 1249 typedef enum { 1250 QMOD16REFCLK156MHZ = 0x00000000 , /*!< 156p25MHz */ 1251 QMOD16REFCLK125MHZ = 0x00000001 , /*!< 125MHz */ 1252 QMOD16REFCLKCOUNT = 0x00000002 /*!< */ 1253 } qmod16_ref_clk_t; 1254 1255 /*! \def CNT_qmod16_ref_clk_t Types of enum qmod16_ref_clk_t */ 1256 #define CNT_qmod16_ref_clk_t 3 1257 1258 /*! 1259 \brief 1260 This array returns the string of #an_property_enable when indexed by the enum. 1261 1262 */ 1263 extern char* e2s_qmod16_ref_clk_t [CNT_qmod16_ref_clk_t]; 1264 #endif /* _TSCMOD_ENUM_DEFINES_H */