qmod16_enum_defines.c (15153B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 */ 7 8 /* This file is automatically generated. Do not modify it. Modify the 9 * inc/enum_desc.txt to change enums, elems, or comments. For issues about 10 * the process that creates this file contact the qmod development team. 11 */ 12 13 #include "qmod16_enum_defines.h" 14 15 char* e2s_qmod16_core_select [CNT_qmod16_core_select] = { 16 "QMOD16_CORE_0_0_1" , 17 "QMOD16_CORE_0_1_0" , 18 "QMOD16_CORE_1_0_0" , 19 "QMOD16_CORE_0_1_1" , 20 "QMOD16_CORE_1_0_1" , 21 "QMOD16_CORE_1_1_1" , 22 "QMOD16_CORE_ILLEGAL" 23 }; /* e2s_qmod16_core_select */ 24 25 int e2n_qmod16_core_select [CNT_qmod16_core_select] = { 26 1 , 27 2 , 28 4 , 29 3 , 30 5 , 31 7 , 32 0 33 }; /* e2n_qmod16_core_select */ 34 35 char* e2s_qmod16_lane_select [CNT_qmod16_lane_select] = { 36 "QMOD16_LANE_0_0_0_1" , 37 "QMOD16_LANE_0_0_1_0" , 38 "QMOD16_LANE_0_0_1_1" , 39 "QMOD16_LANE_0_1_0_0" , 40 "QMOD16_LANE_0_1_0_1" , 41 "QMOD16_LANE_0_1_1_0" , 42 "QMOD16_LANE_0_1_1_1" , 43 "QMOD16_LANE_1_0_0_0" , 44 "QMOD16_LANE_1_0_0_1" , 45 "QMOD16_LANE_1_0_1_0" , 46 "QMOD16_LANE_1_0_1_1" , 47 "QMOD16_LANE_1_1_0_0" , 48 "QMOD16_LANE_1_1_0_1" , 49 "QMOD16_LANE_1_1_1_0" , 50 "QMOD16_LANE_1_1_1_1" , 51 "QMOD16_LANE_BCST" , 52 "QMOD16_LANE_ILLEGAL" 53 }; /* e2s_qmod16_lane_select */ 54 55 int e2n_qmod16_lane_select [CNT_qmod16_lane_select] = { 56 1 , 57 2 , 58 3 , 59 4 , 60 5 , 61 6 , 62 7 , 63 8 , 64 9 , 65 10 , 66 11 , 67 12 , 68 13 , 69 14 , 70 15 , 71 15 , 72 0 73 }; /* e2n_qmod16_lane_select */ 74 75 char* e2s_qmod16_spd_intfc_type [CNT_qmod16_spd_intfc_type] = { 76 "QMOD16_SPD_ZERO" , 77 "QMOD16_SPD_10_X1_SGMII" , 78 "QMOD16_SPD_100_X1_SGMII" , 79 "QMOD16_SPD_1000_X1_SGMII" , 80 "QMOD16_SPD_2500_X1" , 81 "QMOD16_SPD_10_SGMII" , 82 "QMOD16_SPD_100_SGMII" , 83 "QMOD16_SPD_1000_SGMII" , 84 "QMOD16_SPD_2500" , 85 "QMOD16_SPD_5000" , 86 "QMOD16_SPD_1000_XFI" , 87 "QMOD16_SPD_5000_XFI" , 88 "QMOD16_SPD_10000_XFI" , 89 "QMOD16_SPD_10600_XFI_HG" , 90 "QMOD16_SPD_10000_HI" , 91 "QMOD16_SPD_10000" , 92 "QMOD16_SPD_12000_HI" , 93 "QMOD16_SPD_13000" , 94 "QMOD16_SPD_15000" , 95 "QMOD16_SPD_16000" , 96 "QMOD16_SPD_20000" , 97 "QMOD16_SPD_20000_SCR" , 98 "QMOD16_SPD_21000" , 99 "QMOD16_SPD_25455" , 100 "QMOD16_SPD_31500" , 101 "QMOD16_SPD_31500_MLD" , 102 "QMOD16_SPD_40G_X4" , 103 "QMOD16_SPD_42G_X4" , 104 "QMOD16_SPD_40G_XLAUI" , 105 "QMOD16_SPD_42G_XLAUI" , 106 "QMOD16_SPD_10000_X2" , 107 "QMOD16_SPD_10000_HI_DXGXS" , 108 "QMOD16_SPD_10000_DXGXS" , 109 "QMOD16_SPD_10000_HI_DXGXS_SCR" , 110 "QMOD16_SPD_10000_DXGXS_SCR" , 111 "QMOD16_SPD_10500_HI" , 112 "QMOD16_SPD_10500_HI_DXGXS" , 113 "QMOD16_SPD_12773_HI_DXGXS" , 114 "QMOD16_SPD_12773_DXGXS" , 115 "QMOD16_SPD_15750_HI_DXGXS" , 116 "QMOD16_SPD_20G_MLD_DXGXS" , 117 "QMOD16_SPD_21G_HI_MLD_DXGXS" , 118 "QMOD16_SPD_20G_DXGXS" , 119 "QMOD16_SPD_21G_HI_DXGXS" , 120 "QMOD16_SPD_100G_CR10" , 121 "QMOD16_SPD_107G_HG_CR10" , 122 "QMOD16_SPD_120G_CR12" , 123 "QMOD16_SPD_127G_HG_CR12" , 124 "QMOD16_SPD_4000" , 125 "QMOD16_SPD_10_X1_10" , 126 "QMOD16_SPD_100_X1_10" , 127 "QMOD16_SPD_1000_X1_10" , 128 "QMOD16_SPD_10_X1_12P5" , 129 "QMOD16_SPD_100_X1_12P5" , 130 "QMOD16_SPD_1000_X1_12P5" , 131 "QMOD16_SPD_2500_X1_12P5" , 132 "QMOD16_SPD_ILLEGAL" 133 }; /* e2s_qmod16_spd_intfc_type */ 134 135 int e2n_qmod16_spd_intfc_type [CNT_qmod16_spd_intfc_type] = { 136 0 , 137 10 , 138 100 , 139 1000 , 140 2500 , 141 10 , 142 100 , 143 1000 , 144 2500 , 145 5000 , 146 5000 , 147 5000 , 148 10000 , 149 10560 , 150 10000 , 151 10000 , 152 12000 , 153 13000 , 154 15000 , 155 16000 , 156 20000 , 157 20000 , 158 21000 , 159 25000 , 160 31500 , 161 31500 , 162 40000 , 163 40000 , 164 40000 , 165 42000 , 166 10000 , 167 10000 , 168 10000 , 169 10000 , 170 10000 , 171 10500 , 172 10500 , 173 12773 , 174 12773 , 175 15750 , 176 20000 , 177 20000 , 178 20000 , 179 21000 , 180 100000 , 181 107000 , 182 120000 , 183 127000 , 184 4000 , 185 10 , 186 100 , 187 1000 , 188 10 , 189 100 , 190 1000 , 191 2500 , 192 0 193 }; /* e2n_qmod16_spd_intfc_type */ 194 195 char* e2s_qmod16_regacc_type [CNT_qmod16_regacc_type] = { 196 "QMOD16_REGACC_CL22" , 197 "QMOD16_REGACC_CL45" , 198 "QMOD16_REGACC_TOTSC" , 199 "QMOD16_REGACC_SBUS_FD" , 200 "QMOD16_REGACC_SBUS_BD" , 201 "QMOD16_REGACC_ILLEGAL" 202 }; /* e2s_qmod16_regacc_type */ 203 204 char* e2s_qmod16_port_type [CNT_qmod16_port_type] = { 205 "QMOD16_SINGLE_PORT" , 206 "QMOD16_MULTI_PORT" , 207 "QMOD16_DXGXS" , 208 "QMOD16_TRI1_PORT" , 209 "QMOD16_TRI2_PORT" , 210 "QMOD16_PORT_MODE_ILLEGAL" 211 }; /* e2s_qmod16_port_type */ 212 213 char* e2s_qmod16_diag_type [CNT_qmod16_diag_type] = { 214 "QMOD16_DIAG_GENERAL" , 215 "QMOD16_DIAG_TOPOLOGY" , 216 "QMOD16_DIAG_LINK" , 217 "QMOD16_DIAG_SPEED" , 218 "QMOD16_DIAG_ANEG" , 219 "QMOD16_DIAG_TFC" , 220 "QMOD16_DIAG_AN_TIMERS" , 221 "QMOD16_DIAG_STATE" , 222 "QMOD16_DIAG_DEBUG" , 223 "QMOD16_DIAG_IEEE" , 224 "QMOD16_DIAG_EEE" , 225 "QMOD16_SERDES_DIAG" , 226 "QMOD16_DIAG_ALL" , 227 "QMOD16_DIAG_ILLEGAL" 228 }; /* e2s_qmod16_diag_type */ 229 230 char* e2s_qmod16_pmd_diag_type [CNT_qmod16_pmd_diag_type] = { 231 "QMOD16_SERDES_DIAG_CORE_CONFIG" , 232 "QMOD16_SERDES_DIAG_CORE_STATE" , 233 "QMOD16_SERDES_DIAG_LANE_CONFIG" , 234 "QMOD16_SERDES_DIAG_LANE_DEBUG_STATUS" , 235 "QMOD16_SERDES_DIAG_LANE_STATE" , 236 "QMOD16_SERDES_DIAG_LANE_STATE_HDR" , 237 "QMOD16_SERDES_DIAG_LANE_STATE_LEGEND" , 238 "QMOD16_SERDES_DIAG_CL72_STATUS" , 239 "QMOD16_SERDES_DIAG_EYE_DENSITY" , 240 "QMOD16_SERDES_DIAG_EYE_SCAN" , 241 "QMOD16_SERDES_DIAG_MEAS_EYE_DENSITY_DATA" , 242 "QMOD16_SERDES_DIAG_MEAS_EYE_SCAN_DONE" , 243 "QMOD16_SERDES_DIAG_MEAS_LOWBER_EYE" , 244 "QMOD16_SERDES_DIAG_READ_EYE_SCAN_STRIPE" , 245 "QMOD16_SERDES_DIAG_EYE_DENSITY_DATA" , 246 "QMOD16_SERDES_DIAG_LOWBER_EYE" , 247 "QMOD16_SERDES_DIAG_EYE_SCAN_VERTICAL" , 248 "QMOD16_SERDES_DIAG_EYE_SCAN_STRIPE" , 249 "QMOD16_SERDES_DIAG_EYE_SCAN_HEADER" , 250 "QMOD16_SERDES_DIAG_EYE_SCAN_FOOTER" , 251 "QMOD16_SERDES_DIAG_BER_SCAN_TEST" , 252 "QMOD16_SERDES_DIAG_READ_BER_SCAN_DATA" , 253 "QMOD16_SERDES_DIAG_EYE_MARGIN_PROJ" , 254 "QMOD16_SERDES_DIAG_DIG_LPBK" , 255 "QMOD16_SERDES_DIAG_MEAS_EYE_SCAN_START" , 256 "QMOD16_SERDES_DIAG_ILLEGAL" 257 }; /* e2s_qmod16_pmd_diag_type */ 258 259 char* e2s_qmod16_an_type [CNT_qmod16_an_type] = { 260 "QMOD16_CL73" , 261 "QMOD16_CL37" , 262 "QMOD16_CL73_BAM" , 263 "QMOD16_CL37_BAM" , 264 "QMOD16_CL37_SGMII" , 265 "QMOD16_HPAM" , 266 "QMOD16_AN_TYPE_ILLEGAL" 267 }; /* e2s_qmod16_an_type */ 268 269 char* e2s_qmod16_eye_direction [CNT_qmod16_eye_direction] = { 270 "QMOD16_EYE_VU" , 271 "QMOD16_EYE_VD" , 272 "QMOD16_EYE_HL" , 273 "QMOD16_EYE_HR" , 274 "QMOD16_EYE_ILLEGAL" 275 }; /* e2s_qmod16_eye_direction */ 276 277 char* e2s_qmod16_tech_ability [CNT_qmod16_tech_ability] = { 278 "QMOD16_ABILITY_1G_KX" , 279 "QMOD16_ABILITY_10G_KX4" , 280 "QMOD16_ABILITY_10G_KR" , 281 "QMOD16_ABILITY_40G_KR4" , 282 "QMOD16_ABILITY_40G_CR4" , 283 "QMOD16_ABILITY_100G_CR10" , 284 "QMOD16_ABILITY_20G_KR2" , 285 "QMOD16_ABILITY_20G_CR2" , 286 "QMOD16_ABILITY_ILLEGAL" 287 }; /* e2s_qmod16_tech_ability */ 288 289 int e2n_qmod16_tech_ability [CNT_qmod16_tech_ability] = { 290 0x5 , 291 0x6 , 292 0x7 , 293 0x8 , 294 0x9 , 295 0xa , 296 0x100 , 297 0x101 , 298 0x102 299 }; /* e2n_qmod16_tech_ability */ 300 301 char* e2s_qmod16_cl37bam_ability [CNT_qmod16_cl37bam_ability] = { 302 "QMOD16_BAM37ABL_2P5G" , 303 "QMOD16_BAM37ABL_5G_X4" , 304 "QMOD16_BAM37ABL_6G_X4" , 305 "QMOD16_BAM37ABL_10G_HIGIG" , 306 "QMOD16_BAM37ABL_10G_CX4" , 307 "QMOD16_BAM37ABL_12G_X4" , 308 "QMOD16_BAM37ABL_12P5_X4" , 309 "QMOD16_BAM37ABL_13G_X4" , 310 "QMOD16_BAM37ABL_15G_X4" , 311 "QMOD16_BAM37ABL_16G_X4" , 312 "QMOD16_BAM37ABL_20G_X4_CX4" , 313 "QMOD16_BAM37ABL_20G_X4" , 314 "QMOD16_BAM37ABL_21G_X4" , 315 "QMOD16_BAM37ABL_25P455G" , 316 "QMOD16_BAM37ABL_31P5G" , 317 "QMOD16_BAM37ABL_32P7G" , 318 "QMOD16_BAM37ABL_40G" , 319 "QMOD16_BAM37ABL_10G_X2_CX4" , 320 "QMOD16_BAM37ABL_10G_DXGXS" , 321 "QMOD16_BAM37ABL_10P5G_DXGXS" , 322 "QMOD16_BAM37ABL_12P7_DXGXS" , 323 "QMOD16_BAM37ABL_15P75G_R2" , 324 "QMOD16_BAM37ABL_20G_X2_CX4" , 325 "QMOD16_BAM37ABL_20G_X2" , 326 "QMOD16_BAM37ABL_ILLEGAL" 327 }; /* e2s_qmod16_cl37bam_ability */ 328 329 char* e2s_qmod16_diag_an_type [CNT_qmod16_diag_an_type] = { 330 "QMOD16_DIAG_AN_DONE" , 331 "QMOD16_DIAG_AN_HCD" , 332 "QMOD16_DIAG_AN_TYPE_ILLEGAL" 333 }; /* e2s_qmod16_diag_an_type */ 334 335 char* e2s_qmod16_tier1_function_type [CNT_qmod16_tier1_function_type] = { 336 "PCS_BYPASS_CTL" , 337 "INIT_PCS" , 338 "INIT_PMD_SW" , 339 "INIT_PMD" , 340 "PMD_RESET_SEQ" , 341 "PMD_X4_RESET" , 342 "WAIT_SC_DONE" , 343 "ENABLE_SET" , 344 "FECMODE_SET" , 345 "GET_PCS_LINK_STATUS" , 346 "OVERRIDE_SET" , 347 "CREDIT_OVERRIDE_SET" , 348 "ENCODE_SET" , 349 "DECODE_SET" , 350 "CREDIT_CONTROL" , 351 "TX_LANE_CONTROL" , 352 "RX_LANE_CONTROL" , 353 "TX_LANE_DISABLE" , 354 "POWER_CONTROL" , 355 "AUTONEG_SET" , 356 "AUTONEG_GET" , 357 "AUTONEG_CONTROL" , 358 "TSC12_CONTROL" , 359 "CHECK_SC_STATS" , 360 "REG_READ" , 361 "REG_WRITE" , 362 "PRBS_CHECK" , 363 "CJPAT_CRPAT_MODE_SET" , 364 "CJPAT_CRPAT_CHECK" , 365 "QMOD16_DIAG" , 366 "PCS_LANE_SWAP" , 367 "PMD_LANE_SWAP" , 368 "PMD_LANE_SWAP_TX" , 369 "PARALLEL_DETECT_CONTROL" , 370 "REVID_READ" , 371 "SOFT_RESET" , 372 "SET_SPD_INTF" , 373 "SET_PORT_MODE" , 374 "EEE_PASSTHRU_SET" , 375 "EEE_PASSTHRU_GET" , 376 "FEC_CONTROL" , 377 "HIGIG2_CONTROL" , 378 "LF_RF_CONTROL" , 379 "RX_FAST_LOCK_CONTROL" , 380 "PMD_CORE_RESET" , 381 "PMD_LANE_RESET" , 382 "AFE_SPEED_UP_DSC_VGA" , 383 "CLAUSE_72_CONTROL" , 384 "PLL_SEQUENCER_CONTROL" , 385 "PLL_LOCK_WAIT" , 386 "PROG_DATA" , 387 "RX_SEQ_CONTROL" , 388 "SET_POLARITY" , 389 "PRBS_CONTROL" , 390 "PRBS_MODE" , 391 "RX_PF_CONTROL" , 392 "RX_VGA_CONTROL" , 393 "CJPAT_CRPAT_CONTROL" , 394 "TX_LOOPBACK_CONTROL" , 395 "TX_PMD_LOOPBACK_CONTROL" , 396 "RX_LOOPBACK_CONTROL" , 397 "RX_P1_SLICER_CONTROL" , 398 "RX_M1_SLICER_CONTROL" , 399 "RX_D_SLICER_CONTROL" , 400 "WAIT_PMD_LOCK" , 401 "FIRMWARE_SET" , 402 "PMD_RESET_BYPASS" , 403 "PMD_OVERRIDE_CONTROL" , 404 "SET_QPORT_SPD" , 405 "SET_QSGMII_EN" , 406 "QMOD16E_DISABLE_SET" , 407 "PLL_LOCK_GET" , 408 "PMD_LOCK_GET" , 409 "AUTONEG_SET_INIT" , 410 "AUTONEG_ABILITIES_CONTROL" , 411 "AUTONEG_CL37_BASE_ABILITIES" , 412 "AUTONEG_CL37_BAM_OVER1G_ABILITIES" , 413 "AUTONEG_AUTONEG_CONTROL_GET" , 414 "AUTONEG_AUTONEG_LOCAL_ABILITY_GET" , 415 "AUTONEG_AUTONEG_REMOTE_ABILITY_GET" , 416 "AUTONEG_AN_ABILITIES_ENABLES" , 417 "AUTONEG_GET_HT_ENTRIES" , 418 "UPDATE_PORT_MODE_SELECT" , 419 "TX_RX_POLARITY_SET" , 420 "TX_RX_POLARITY_GET" , 421 "TX_PI_CONTROL_GET" , 422 "TX_LANE_DISABLE_SET" , 423 "TX_LANE_DISABLE_GET" , 424 "SPEED_ID_GET" , 425 "PMD_LANE_SWAP_TX_GET" , 426 "PLL_RESET_ENABLE_SET" , 427 "PLL_MODE_SET" , 428 "PCS_LANE_SWAP_GET" , 429 "OSMODE_SET" , 430 "MASTER_PORT_NUM_SET" , 431 "GET_PLLDIV" , 432 "DISABLE_GET" , 433 "FIRMWARE_LOAD" , 434 "PRBS_RX_POLYNOMIAL_SET" , 435 "RX_LANE_CONTROL_SET" , 436 "RX_LANE_CONTROL_GET" , 437 "TRIGGER_SPEED_CHANGE" , 438 "TIER1_FUNCTION_ILLEGAL" 439 }; /* e2s_qmod16_tier1_function_type */ 440 441 442 char* e2s_qmod16_pll_mode_type [CNT_qmod16_pll_mode_type] = { 443 "QMOD16_PLL_MODE_DIV_ZERO" , 444 "QMOD16_PLL_MODE_DIV_40" , 445 "QMOD16_PLL_MODE_DIV_42" , 446 "QMOD16_PLL_MODE_DIV_48" , 447 "QMOD16_PLL_MODE_DIV_52" , 448 "QMOD16_PLL_MODE_DIV_54" , 449 "QMOD16_PLL_MODE_DIV_60" , 450 "QMOD16_PLL_MODE_DIV_64" , 451 "QMOD16_PLL_MODE_DIV_66" , 452 "QMOD16_PLL_MODE_DIV_70" , 453 "QMOD16_PLL_MODE_DIV_80" , 454 "QMOD16_PLL_MODE_DIV_92" , 455 "QMOD16_PLL_MODE_DIV_ILLEGAL" 456 }; /* e2s_qmod16_pll_mode_type */ 457 458 int e2n_qmod16_pll_mode_type [CNT_qmod16_pll_mode_type] = { 459 0 , 460 40 , 461 42 , 462 48 , 463 52 , 464 54 , 465 60 , 466 64 , 467 66 , 468 70 , 469 80 , 470 92 , 471 0 472 }; /* e2n_qmod16_pll_mode_type */ 473 474 char* e2s_qmod16_os_mode_type [CNT_qmod16_os_mode_type] = { 475 "QMOD16_PMA_OS_MODE_1" , 476 "QMOD16_PMA_OS_MODE_2" , 477 "QMOD16_PMA_OS_MODE_3" , 478 "QMOD16_PMA_OS_MODE_3_3" , 479 "QMOD16_PMA_OS_MODE_4" , 480 "QMOD16_PMA_OS_MODE_5" , 481 "QMOD16_PMA_OS_MODE_7_25" , 482 "QMOD16_PMA_OS_MODE_8" , 483 "QMOD16_PMA_OS_MODE_8_25" , 484 "QMOD16_PMA_OS_MODE_10" , 485 "QMOD16_PMA_OS_MODE_ILLEGAL" 486 }; /* e2s_qmod16_os_mode_type */ 487 488 int e2n_qmod16_os_mode_type [CNT_qmod16_os_mode_type] = { 489 1 , 490 2 , 491 3 , 492 33 , 493 4 , 494 5 , 495 725 , 496 8 , 497 825 , 498 9 , 499 0 500 }; /* e2n_qmod16_os_mode_type */ 501 502 char* e2s_qmod16_scr_mode [CNT_qmod16_scr_mode] = { 503 "QMOD16_SCR_MODE_BYPASS" , 504 "QMOD16_SCR_MODE_66B" , 505 "QMOD16_SCR_MODE_80B" , 506 "QMOD16_SCR_MODE_64B" 507 }; /* e2s_qmod16_scr_mode */ 508 509 int e2n_qmod16_scr_mode [CNT_qmod16_scr_mode] = { 510 0 , 511 1 , 512 2 , 513 3 514 }; /* e2n_qmod16_scr_mode */ 515 516 char* e2s_qmod16_encode_mode [CNT_qmod16_encode_mode] = { 517 "QMOD16_ENCODE_MODE_NONE" , 518 "QMOD16_ENCODE_MODE_CL48" , 519 "QMOD16_ENCODE_MODE_CL48_2_LANE" , 520 "QMOD16_ENCODE_MODE_CL36" , 521 "QMOD16_ENCODE_MODE_CL82" , 522 "QMOD16_ENCODE_MODE_CL49" , 523 "QMOD16_ENCODE_MODE_BRCM" , 524 "QMOD16_ENCODE_MODE_ILLEGAL" 525 }; /* e2s_qmod16_encode_mode */ 526 527 int e2n_qmod16_encode_mode [CNT_qmod16_encode_mode] = { 528 0 , 529 1 , 530 2 , 531 3 , 532 4 , 533 5 , 534 6 , 535 7 536 }; /* e2n_qmod16_encode_mode */ 537 538 char* e2s_qmod16_check_end_mode [CNT_qmod16_check_end_mode] = { 539 "QMOD16_CL48_CHECK_END_OFF" , 540 "QMOD16_CL48_CHECK_END_ON" 541 }; /* e2s_qmod16_check_end_mode */ 542 543 char* e2s_qmod16_sigdet_filter [CNT_qmod16_sigdet_filter] = { 544 "QMOD16_SIGDET_FILTER_NONCX4" , 545 "QMOD16_SIGDET_FILTER_CX4" 546 }; /* e2s_qmod16_sigdet_filter */ 547 548 char* e2s_qmod16_blocksync_mode [CNT_qmod16_blocksync_mode] = { 549 "QMOD16_BLOCKSYNC_MODE_NONE" , 550 "QMOD16_BLOCKSYNC_MODE_CL49" , 551 "QMOD16_BLOCKSYNC_MODE_CL82" , 552 "QMOD16_BLOCKSYNC_MODE_8B10B" , 553 "QMOD16_BLOCKSYNC_MODE_FEC" , 554 "QMOD16_BLOCKSYNC_MODE_BRCM" , 555 "QMOD16_BLOCKSYNC_MODE_ILLEGAL" 556 }; /* e2s_qmod16_blocksync_mode */ 557 558 char* e2s_qmod16_reorder_mode [CNT_qmod16_reorder_mode] = { 559 "QMOD16_R_REORDER_MODE_NONE" , 560 "QMOD16_R_REORDER_MODE_CL48" , 561 "QMOD16_R_REORDER_MODE_CL36" , 562 "QMOD16_R_REORDER_MODE_CL36_CL48" 563 }; /* e2s_qmod16_reorder_mode */ 564 565 char* e2s_qmod16_cl36_mode [CNT_qmod16_cl36_mode] = { 566 "QMOD16_CL36_DISABLE" , 567 "QMOD16_CL36_ENABLE" 568 }; /* e2s_qmod16_cl36_mode */ 569 570 char* e2s_qmod16_descrambler_mode [CNT_qmod16_descrambler_mode] = { 571 "QMOD16_R_DESCR1_MODE_BYPASS" , 572 "QMOD16_R_DESCR1_MODE_66B" , 573 "QMOD16_R_DESCR1_MODE_10B" , 574 "QMOD16_R_DESCR1_MODE_ILLEGAL" 575 }; /* e2s_qmod16_descrambler_mode */ 576 577 char* e2s_qmod16_decoder_mode [CNT_qmod16_decoder_mode] = { 578 "QMOD16_DECODER_MODE_NONE" , 579 "QMOD16_DECODER_MODE_CL49" , 580 "QMOD16_DECODER_MODE_BRCM" , 581 "QMOD16_DECODER_MODE_ALU" , 582 "QMOD16_DECODER_MODE_CL48" , 583 "QMOD16_DECODER_MODE_CL36" , 584 "QMOD16_DECODER_MODE_CL82" , 585 "QMOD16_DECODER_MODE_ILLEGAL" 586 }; /* e2s_qmod16_decoder_mode */ 587 588 char* e2s_qmod16_deskew_mode [CNT_qmod16_deskew_mode] = { 589 "QMOD16_R_DESKEW_MODE_BYPASS" , 590 "QMOD16_R_DESKEW_MODE_8B_10B" , 591 "QMOD16_R_DESKEW_MODE_BRCM_66B" , 592 "QMOD16_R_DESKEW_MODE_CL82_66B" , 593 "QMOD16_R_DESKEW_MODE_CL36_10B" , 594 "QMOD16_R_DESKEW_MODE_ILLEGAL" 595 }; /* e2s_qmod16_deskew_mode */ 596 597 char* e2s_qmod16_descrambler2_mode [CNT_qmod16_descrambler2_mode] = { 598 "QMOD16_DESC2_MODE_NONE" , 599 "QMOD16_DESC2_MODE_CL49" , 600 "QMOD16_DESC2_MODE_BRCM" , 601 "QMOD16_DESC2_MODE_ALU" , 602 "QMOD16_DESC2_MODE_CL48" , 603 "QMOD16_DESC2_MODE_CL36" , 604 "QMOD16_DESC2_MODE_CL82" , 605 "QMOD16_DESC2_MODE_ILLEGAL" 606 }; /* e2s_qmod16_descrambler2_mode */ 607 608 char* e2s_qmod16_byte_del_mode [CNT_qmod16_byte_del_mode] = { 609 "QMOD16_R_DESC2_BYTE_DELETION_100M" , 610 "QMOD16_R_DESC2_BYTE_DELETION_10M" , 611 "QMOD16_R_DESC2_BYTE_DELETION_NONE" 612 }; /* e2s_qmod16_byte_del_mode */ 613 614 char* e2s_qmod16_decode_descr_mode [CNT_qmod16_decode_descr_mode] = { 615 "QMOD16_R_DEC1_DESCR_MODE_NONE" , 616 "QMOD16_R_DEC1_DESCR_MODE_BRCM64B66B" 617 }; /* e2s_qmod16_decode_descr_mode */ 618 619 char* e2s_qmod16_ref_clk_t [CNT_qmod16_ref_clk_t] = { 620 "QMOD16REFCLK156MHZ" , 621 "QMOD16REFCLK125MHZ" , 622 "QMOD16REFCLKCOUNT" 623 }; /* e2s_qmod16_ref_clk_t */ 624