phy8806x_tsc_internal.h (30148B)
1 /********************************************************************************** 2 ********************************************************************************** 3 * * 4 * * 5 * Description : Internal API functions * 6 * * 7 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 8 * 9 * Copyright 2007-2019 Broadcom Inc. All rights reserved. * 10 * No portions of this material may be reproduced in any form without * 11 * the written permission of: * 12 * Broadcom Corporation * 13 * 5300 California Avenue * 14 * Irvine, CA 92617 * 15 * * 16 * All information contained in this document is Broadcom Corporation * 17 * company private proprietary, and trade secret. * 18 */ 19 20 /** @file phy8806x_tsc_internal.h 21 * Internal API functions 22 */ 23 24 #ifndef PHY8806X_TSC_API_INTERNAL_H 25 #define PHY8806X_TSC_API_INTERNAL_H 26 27 #define SDK_STATIC static 28 29 30 #include "phy8806x_tsc_functions.h" 31 #include "phy8806x_tsc_common.h" 32 #include "phy8806x_tsc_field_access.h" 33 #include "phy8806x_tsc_ipconfig.h" 34 #include "phy8806x_tsc_common_err_code.h" 35 #include "phy8806x_tsc_interface.h" 36 #include "phy8806x_tsc_debug_functions.h" 37 38 /*------------------------------*/ 39 /** Serdes OSR Mode Structure */ 40 /*------------------------------*/ 41 typedef struct { 42 /** TX OSR Mode */ 43 uint8_t tx; 44 /** RX OSR Mode */ 45 uint8_t rx; 46 /** OSR Mode for TX and RX (used when both TX and RX should have same OSR Mode) */ 47 uint8_t tx_rx; 48 }phy8806x_tsc_osr_mode_st; 49 50 /*------------------------------*/ 51 /** Serdes Lane State Structure */ 52 /*------------------------------*/ 53 typedef struct { 54 /** uC lane configuration */ 55 uint16_t ucv_config; 56 /** Frequency offset of local reference clock with respect to RX data in ppm */ 57 int16_t rx_ppm; 58 /** Vertical threshold voltage of p1 slicer (mV) */ 59 int16_t p1_lvl; 60 /** Vertical threshold voltage of m1 slicer (mV) */ 61 int16_t m1_lvl; 62 /** Link time in milliseconds */ 63 uint16_t link_time; 64 /** OSR Mode */ 65 phy8806x_tsc_osr_mode_st osr_mode; 66 /** Signal Detect */ 67 uint8_t sig_det; 68 /** Signal Detect Change */ 69 uint8_t sig_det_chg; 70 /** PMD RX Lock */ 71 uint8_t rx_lock; 72 /** PMD RX Lock Change */ 73 uint8_t rx_lock_chg; 74 /** Delay of zero crossing slicer, m1, wrt to data in PI codes */ 75 int8_t clk90; 76 /** Delay of diagnostic/lms slicer, p1, wrt to data in PI codes */ 77 int8_t clkp1; 78 /** Peaking Filter Main Settings */ 79 int8_t pf_main; 80 /** Peaking Filter Hiz mode enable */ 81 int8_t pf_hiz; 82 /** Peaking Filter DC gain adjustment for CTLE */ 83 int8_t pf_bst; 84 /** Low Frequency Peaking filter control */ 85 int8_t pf2_ctrl; 86 /** Variable Gain Amplifier settings */ 87 int8_t vga; 88 /** DC offset DAC control value */ 89 int8_t dc_offset; 90 /** P1 eyediag status */ 91 int8_t p1_lvl_ctrl; 92 /** DFE tap 1 value */ 93 int8_t dfe1; 94 /** DFE tap 2 value */ 95 int8_t dfe2; 96 /** DFE tap 3 value */ 97 int8_t dfe3; 98 /** DFE tap 4 value */ 99 int8_t dfe4; 100 /** DFE tap 5 value */ 101 int8_t dfe5; 102 /** DFE tap 6 value */ 103 int8_t dfe6; 104 /** DFE tap 1 Duty Cycle Distortion */ 105 int8_t dfe1_dcd; 106 /** DFE tap 2 Duty Cycle Distortion */ 107 int8_t dfe2_dcd; 108 /** Slicer calibration control codes (p1 even) */ 109 int8_t pe; 110 /** Slicer calibration control codes (data even) */ 111 int8_t ze; 112 /** Slicer calibration control codes (m1 even) */ 113 int8_t me; 114 /** Slicer calibration control codes (p1 odd) */ 115 int8_t po; 116 /** Slicer calibration control codes (data odd) */ 117 int8_t zo; 118 /** Slicer calibration control codes (m1 odd) */ 119 int8_t mo; 120 /** Frequency offset of local reference clock with respect to TX data in ppm */ 121 int16_t tx_ppm; 122 /** TX equalization FIR pre tap weight */ 123 int8_t txfir_pre; 124 /** TX equalization FIR main tap weight */ 125 int8_t txfir_main; 126 /** TX equalization FIR post1 tap weight */ 127 int8_t txfir_post1; 128 /** TX equalization FIR post2 tap weight */ 129 int8_t txfir_post2; 130 /** TX equalization FIR post3 tap weight */ 131 int8_t txfir_post3; 132 /** Horizontal left eye margin @ 1e-5 as seen by internal diagnostic slicer in mUI and mV */ 133 uint16_t heye_left; 134 /** Horizontal right eye margin @ 1e-5 as seen by internal diagnostic slicer in mUI and mV */ 135 uint16_t heye_right; 136 /** Vertical upper eye margin @ 1e-5 as seen by internal diagnostic slicer in mUI and mV */ 137 uint16_t veye_upper; 138 /** Vertical lower eye margin @ 1e-5 as seen by internal diagnostic slicer in mUI and mV */ 139 uint16_t veye_lower; 140 /** Baud Rate Phase Detector enable */ 141 uint8_t br_pd_en; 142 /** lane_reset_state **/ 143 uint8_t reset_state; 144 /** lane_tx_reset_state **/ 145 uint8_t tx_reset_state; 146 /** uC stopped state **/ 147 uint8_t stop_state; 148 /** TX_AMP **/ 149 int8_t tx_amp; 150 /** TX_Drivermode **/ 151 uint8_t drivermode; 152 /** TX pll select */ 153 uint8_t tx_pll_select; 154 /** RX pll select */ 155 uint8_t rx_pll_select; 156 } phy8806x_tsc_lane_state_st; 157 158 /*------------------------------*/ 159 /** Serdes Core State Structure */ 160 /*------------------------------*/ 161 typedef struct { 162 /** Core DP Reset State */ 163 uint8_t core_reset; 164 /** PLL Powerdown enable */ 165 uint8_t pll_pwrdn; 166 /** Micro active enable */ 167 uint8_t uc_active; 168 /** Comclk Frequency in Mhz */ 169 uint16_t comclk_mhz; 170 /** uCode Major Version number */ 171 uint16_t ucode_version; 172 /** uCode Minor Version number */ 173 uint8_t ucode_minor_version; 174 /** AFE Hardware version */ 175 uint8_t afe_hardware_version; 176 /** uC Die Temperature Index */ 177 uint8_t temp_idx; 178 /** Average Die Temperature (13-bit format) */ 179 uint16_t avg_tmon; 180 /** Analog Resistor Calibration value */ 181 uint8_t rescal; 182 /** VCO Rate in MHz */ 183 uint16_t vco_rate_mhz; 184 /** Analog VCO Range */ 185 uint8_t analog_vco_range; 186 /** PLL Divider value */ 187 uint8_t pll_div; 188 /** PLL Lock */ 189 uint8_t pll_lock; 190 /** PLL Lock Change */ 191 uint8_t pll_lock_chg; 192 /** Live die temperature in Celsius */ 193 int16_t die_temp; 194 /** Core Status Variable */ 195 uint8_t core_status; 196 } phy8806x_tsc_core_state_st; 197 198 /** Print Error messages to screen before returning. 199 * @param pa phymod_access_t struct 200 * @param err_code Error Code input which is returned as well 201 * @return Error Code 202 */ 203 SDK_STATIC err_code_t _print_err_msg (const phymod_access_t *pa, uint16_t err_code); 204 205 /** Print Convert Error code to String. 206 * @param pa phymod_access_t struct 207 * @param err_code Error Code input which is converted to string 208 * @return String containing Error code information. 209 */ 210 SDK_STATIC char* _e2s_err_code (const phymod_access_t *pa, err_code_t err_code); 211 212 213 214 /** Check if the micro's operations on that lane are stopped. 215 * @param pa phymod_access_t struct 216 * @return err_code Error Code "ERR_CODE_UC_NOT_STOPPED" returned if micro NOT stopped 217 */ 218 SDK_STATIC err_code_t _check_uc_lane_stopped (const phymod_access_t *pa); 219 220 /** Calculate the mode_sel parameter for tx pattern generator. 221 * @param pa phymod_access_t struct 222 * @param *mode_sel Mode select to be used for generating required pattern 223 * @param *zero_pad_len Length of zero padding to be used for generating required pattern 224 * @param patt_length Desired Pattern length 225 * @return Error Code, if generated (returns ERR_CODE_NONE if no errors) 226 */ 227 SDK_STATIC err_code_t _calc_patt_gen_mode_sel (const phymod_access_t *pa, uint8_t *mode_sel, uint8_t *zero_pad_len, uint8_t patt_length); 228 229 /** Convert the PLL_mode to actual PLL divider value and display 230 * as part of phy8806x_tsc_display_core_state_line() 231 * @param pa phymod_access_t struct 232 * @param val PLL_DIV register value 233 * @return Error Code, if generated (returns ERR_CODE_NONE if no errors) 234 */ 235 static err_code_t _phy8806x_tsc_display_pll_to_divider (const phymod_access_t *pa, uint8_t val); 236 237 238 239 /*-------------------*/ 240 /* Ladder controls */ 241 /*-------------------*/ 242 /** Converts a ladder setting to mV, given the range. 243 * @param pa phymod_access_t struct 244 * @param ctrl is the threshold control (-31..31) maps to -RANGE to RANGE in non-uniform steps 245 * @param range_250 determines the range 0 = +/-150mV, 1 = +/-250mV 246 * @return ladder threshold voltage in mV 247 */ 248 SDK_STATIC int16_t _ladder_setting_to_mV (const phymod_access_t *pa, int8_t ctrl, uint8_t range_250); 249 250 251 252 /*-----------------------*/ 253 /* TX_PI and ULL Setup */ 254 /*-----------------------*/ 255 /** Setup the Ultra low latency clk and datapath for TX. 256 * @param pa phymod_access_t struct 257 * @param enable Enable/Disable (1 = Enable; 0 = Disable) 258 * @return Error Code, if generated (returns ERR_CODE_NONE if no errors) 259 */ 260 static err_code_t _ull_tx_mode_setup (const phymod_access_t *pa, uint8_t enable); 261 262 /** Setup the Ultra low latency for RX. 263 * @param pa phymod_access_t struct 264 * @param enable Enable/Disable (1 = Enable; 0 = Disable) 265 * @return Error Code, if generated (returns ERR_CODE_NONE if no errors) 266 */ 267 static err_code_t _ull_rx_mode_setup (const phymod_access_t *pa, uint8_t enable); 268 269 /** Safe multiply - multiplies 2 numbers and checks for overflow. 270 * @param pa phymod_access_t struct 271 * @param a First input 272 * @param b Second input 273 * @param *of Pointer to overflow indicator 274 * @return value of a * b 275 */ 276 static uint32_t _mult_with_overflow_check (const phymod_access_t *pa, uint32_t a, uint32_t b, uint8_t *of); 277 278 279 /*-----------------------------------------*/ 280 /* APIs used in Config Shared TX Pattern */ 281 /*-----------------------------------------*/ 282 /** Compute Binary string for a Hex value ['0' to 'F']. 283 * @param pa phymod_access_t struct 284 * @param var Hex value to be converted to Binary (eg: '6', 'A', ...) 285 * @param bin Binary string returned by API (eg: '0110', '1010', ...) 286 * @return Error Code generated by invalid hex variable (returns ERR_CODE_NONE if no errors) 287 */ 288 static err_code_t _compute_bin (const phymod_access_t *pa, char var, char bin[]); 289 290 /** Compute Hex value for a Binary string ['0000' to '1111']. 291 * @param pa phymod_access_t struct 292 * @param bin Binary string to be coverted (eg: '0110', '1010', ...) 293 * @param *hex Hex value calculated from the input Binary string 294 * @return Error Code generated by invalid Binary string (returns ERR_CODE_NONE if no errors) 295 */ 296 static err_code_t _compute_hex (const phymod_access_t *pa, char bin[], uint8_t * hex); 297 298 299 /*-----------------------------------*/ 300 /* APIs used in Read Event Logger */ 301 /*-----------------------------------*/ 302 303 /** Interpret error event code. 304 * @param pa phymod_access_t struct 305 * @param val Event code error value to be interpreted 306 * @return Char string to be displayed in event log 307 */ 308 static char* _error_val_2_str (const phymod_access_t *pa, uint8_t val); 309 310 /** Display event information. 311 * @param pa phymod_access_t struct 312 * @param event_id Event id to be displayed 313 * @param entry_len Length of the event entry 314 * @param prev_cursor CL72 prev cursor value 315 * @param curr_cursor CL72 curr cursor value 316 * @param post_cursor CL72 post cursor value 317 * @param *supp_info Supplement information 318 */ 319 static err_code_t _display_event (const phymod_access_t *pa, uint8_t event_id, uint8_t entry_len, uint8_t prev_cursor, uint8_t curr_cursor, uint8_t post_cursor, uint8_t *supp_info); 320 321 322 /** Convert float8 to usigned int32. 323 * uint32 = 1.XXX * 2^Y where float8 bits are XXXYYYYY 324 * @param pa phymod_access_t struct 325 * @param input Float8 number 326 * @return Usigned 32bit number 327 */ 328 static uint32_t _float8_to_int32 (const phymod_access_t *pa, float8_t input); 329 330 331 #ifdef TO_FLOATS 332 /*-----------------------------------*/ 333 /* APIs used in uC data conversion */ 334 /*-----------------------------------*/ 335 336 /** Convert usigned int32 to float8. 337 * uint32 = 1.XXX * 2^Y where float8 bits are XXXYYYYY 338 * @param pa phymod_access_t struct 339 * @param input Unsigned int 340 * @return Float8 8 bit representations of 32bit number 341 */ 342 static float8_t _int32_to_float8 (const phymod_access_t *pa, uint32_t input); 343 #endif 344 345 346 /*-----------------------------*/ 347 /* Read / Display Core state */ 348 /*-----------------------------*/ 349 /** Read current phy8806x_tsc core status. 350 * @param pa phymod_access_t struct 351 * @param *istate Current phy8806x_tsc core status read back and populated by the API 352 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 353 */ 354 SDK_STATIC err_code_t _phy8806x_tsc_read_core_state (const phymod_access_t *pa, phy8806x_tsc_core_state_st *istate); 355 356 /** Display current core state. 357 * Reads and displays all important core state values. 358 * @param pa phymod_access_t struct 359 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 360 */ 361 static err_code_t _phy8806x_tsc_display_core_state_no_newline (const phymod_access_t *pa); 362 363 /*-----------------------------*/ 364 /* Read / Display Lane state */ 365 /*-----------------------------*/ 366 /** Read current phy8806x_tsc lane status. 367 * @param pa phymod_access_t struct 368 * @param *istate Current phy8806x_tsc lane status read back and populated by the API 369 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 370 */ 371 SDK_STATIC err_code_t _phy8806x_tsc_read_lane_state (const phymod_access_t *pa, phy8806x_tsc_lane_state_st *istate); 372 373 374 /*-----------------------------------*/ 375 /* Pll_lock/Sigdet/Pmd_lock status */ 376 /*-----------------------------------*/ 377 /** Read current PLL Lock and PLL Lock change status of a lane. 378 * @param pa phymod_access_t struct 379 * @param *pll_lock Current phy8806x_tsc lane pll_lock status read back and populated by the API 380 * @param *pll_lock_chg Current phy8806x_tsc lane pll_lock_change status read back and populated by the API 381 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 382 */ 383 SDK_STATIC err_code_t _phy8806x_tsc_pll_lock_status (const phymod_access_t *pa, uint8_t *pll_lock, uint8_t *pll_lock_chg); 384 385 /** Read current PMD Lock and PMD Lock change status of a lane. 386 * @param pa phymod_access_t struct 387 * @param *pmd_lock Current phy8806x_tsc lane pmd_rx_lock status read back and populated by the API 388 * @param *pmd_lock_chg Current phy8806x_tsc lane pmd_rx_lock_change status read back and populated by the API 389 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 390 */ 391 SDK_STATIC err_code_t _phy8806x_tsc_pmd_lock_status (const phymod_access_t *pa, uint8_t *pmd_lock, uint8_t *pmd_lock_chg); 392 393 /** Read current Signal_detect and Signal_detect change status of a lane. 394 * @param pa phymod_access_t struct 395 * @param *sig_det Current phy8806x_tsc lane signal_detect status read back and populated by the API 396 * @param *sig_det_chg Current phy8806x_tsc lane signal_detect_change status read back and populated by the API 397 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 398 */ 399 SDK_STATIC err_code_t _phy8806x_tsc_sigdet_status (const phymod_access_t *pa, uint8_t *sig_det, uint8_t *sig_det_chg); 400 401 402 403 404 /*-----------------*/ 405 /* Get OSR mode */ 406 /*-----------------*/ 407 /** Read current phy8806x_tsc lane status. 408 * @param pa phymod_access_t struct 409 * @param *mode Returns with the osr mode structure 410 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 411 */ 412 SDK_STATIC err_code_t _phy8806x_tsc_get_osr_mode (const phymod_access_t *pa, phy8806x_tsc_osr_mode_st *mode); 413 414 /** Display current lane state. 415 * Reads and displays all important lane state values. 416 * @param pa phymod_access_t struct 417 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 418 */ 419 static err_code_t _phy8806x_tsc_display_lane_state_no_newline (const phymod_access_t *pa); 420 421 422 423 /** Convert eye margin to mV. 424 * Takes in the ladder setting with 3 fractional bits and converts to mV. 425 * @param pa phymod_access_t struct 426 * @param var Ladder setting with 3 fractional bits 427 * @param ladder_range Specified if ladder is configured for 150mV or 250mV range 428 * @return Eye opening in mV 429 */ 430 SDK_STATIC uint16_t _eye_to_mV (const phymod_access_t *pa, uint8_t var, uint8_t ladder_range); 431 432 /** Convert eye margin to mUI. 433 * Takes in a horizontal margin in Phase Interpolator codes and converts it to mUI. 434 * @param pa phymod_access_t struct 435 * @param var Horizontal margin in Phase Interpolator codes with 3 fractional bits 436 * @return Eye opening in mV 437 */ 438 SDK_STATIC uint16_t _eye_to_mUI (const phymod_access_t *pa, uint8_t var); 439 440 441 /** Serdes Core ClockGate. 442 * Along with phy8806x_tsc_core_clkgate(), all lanes should also be clock gated using phy8806x_tsc_lane_clkgate() to complete a Core Clockgate 443 * @param pa phymod_access_t struct 444 * @param enable Enable clockgate (1 = Enable clokgate; 0 = Disable clockgate) 445 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 446 */ 447 static err_code_t _phy8806x_tsc_core_clkgate (const phymod_access_t *pa, uint8_t enable); 448 449 /** Serdes Lane ClockGate. 450 * @param pa phymod_access_t struct 451 * @param enable Enable lane clockgate (1 = Enable clockgate; 0 = Disable clockgate) 452 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 453 */ 454 static err_code_t _phy8806x_tsc_lane_clkgate (const phymod_access_t *pa, uint8_t enable); 455 456 457 /** Set function for PF. 458 * @param pa phymod_access_t struct 459 * @param val Signed input value 460 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 461 */ 462 static err_code_t _set_rx_pf_main (const phymod_access_t *pa, uint8_t val); 463 464 /** Get function for PF 465 * @param pa phymod_access_t struct 466 * @param *val PF read value 467 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 468 */ 469 static err_code_t _get_rx_pf_main (const phymod_access_t *pa, int8_t *val); 470 471 /** Set function for PF2. 472 * @param pa phymod_access_t struct 473 * @param val signed input value 474 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 475 */ 476 static err_code_t _set_rx_pf2 (const phymod_access_t *pa, uint8_t val); 477 478 /** Get function for PF2. 479 * @param pa phymod_access_t struct 480 * @param *val PF2 read value 481 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 482 */ 483 static err_code_t _get_rx_pf2 (const phymod_access_t *pa, int8_t *val); 484 485 /** Set function for VGA. 486 * @param pa phymod_access_t struct 487 * @param val signed input value 488 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 489 */ 490 static err_code_t _set_rx_vga (const phymod_access_t *pa, uint8_t val); 491 492 /** Get function for VGA. 493 * @param pa phymod_access_t struct 494 * @param *val VGA read value 495 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 496 */ 497 static err_code_t _get_rx_vga (const phymod_access_t *pa, int8_t *val); 498 499 500 /** Set function for DFE Tap1. 501 * @param pa phymod_access_t struct 502 * @param val signed input value 503 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 504 */ 505 SDK_STATIC err_code_t _set_rx_dfe1 (const phymod_access_t *pa, int8_t val); 506 507 /** Get function for DFE Tap1. 508 * @param pa phymod_access_t struct 509 * @param *val DFE1 read value 510 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 511 */ 512 SDK_STATIC err_code_t _get_rx_dfe1 (const phymod_access_t *pa, int8_t *val); 513 514 /** Set function for DFE Tap2. 515 * @param pa phymod_access_t struct 516 * @param val signed input value 517 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 518 */ 519 SDK_STATIC err_code_t _set_rx_dfe2 (const phymod_access_t *pa, int8_t val); 520 521 /** Get function for DFE Tap2. 522 * @param pa phymod_access_t struct 523 * @param *val DFE2 read value 524 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 525 */ 526 SDK_STATIC err_code_t _get_rx_dfe2 (const phymod_access_t *pa, int8_t *val); 527 528 /** Set function for DFE Tap3. 529 * @param pa phymod_access_t struct 530 * @param val signed input value 531 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 532 */ 533 static err_code_t _set_rx_dfe3 (const phymod_access_t *pa, int8_t val); 534 535 /** Get function for DFE Tap3. 536 * @param pa phymod_access_t struct 537 * @param *val DFE3 read value 538 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 539 */ 540 static err_code_t _get_rx_dfe3 (const phymod_access_t *pa, int8_t *val); 541 542 /** Set function for DFE Tap4. 543 * @param pa phymod_access_t struct 544 * @param val signed input value 545 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 546 */ 547 static err_code_t _set_rx_dfe4 (const phymod_access_t *pa, int8_t val); 548 549 /** Get function for DFE Tap4. 550 * @param pa phymod_access_t struct 551 * @param *val DFE4 read value 552 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 553 */ 554 static err_code_t _get_rx_dfe4 (const phymod_access_t *pa, int8_t *val); 555 556 /** Set function for DFE Tap5. 557 * @param pa phymod_access_t struct 558 * @param val signed input value 559 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 560 */ 561 static err_code_t _set_rx_dfe5 (const phymod_access_t *pa, int8_t val); 562 563 /** Get function for DFE Tap5 564 * @param pa phymod_access_t struct 565 * @param *val DFE5 read value 566 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 567 */ 568 static err_code_t _get_rx_dfe5 (const phymod_access_t *pa, int8_t *val); 569 570 /* Set/Get DFE tap values */ 571 static err_code_t _set_rx_dfe6 (const phymod_access_t *pa, int8_t val); 572 static err_code_t _get_rx_dfe6 (const phymod_access_t *pa, int8_t *val); 573 static err_code_t _set_rx_dfe7 (const phymod_access_t *pa, int8_t val); 574 static err_code_t _get_rx_dfe7 (const phymod_access_t *pa, int8_t *val); 575 static err_code_t _set_rx_dfe8 (const phymod_access_t *pa, int8_t val); 576 static err_code_t _get_rx_dfe8 (const phymod_access_t *pa, int8_t *val); 577 static err_code_t _set_rx_dfe9 (const phymod_access_t *pa, int8_t val); 578 static err_code_t _get_rx_dfe9 (const phymod_access_t *pa, int8_t *val); 579 static err_code_t _set_rx_dfe10 (const phymod_access_t *pa, int8_t val); 580 static err_code_t _get_rx_dfe10 (const phymod_access_t *pa, int8_t *val); 581 static err_code_t _set_rx_dfe11 (const phymod_access_t *pa, int8_t val); 582 static err_code_t _get_rx_dfe11 (const phymod_access_t *pa, int8_t *val); 583 static err_code_t _set_rx_dfe12 (const phymod_access_t *pa, int8_t val); 584 static err_code_t _get_rx_dfe12 (const phymod_access_t *pa, int8_t *val); 585 static err_code_t _set_rx_dfe13 (const phymod_access_t *pa, int8_t val); 586 static err_code_t _get_rx_dfe13 (const phymod_access_t *pa, int8_t *val); 587 static err_code_t _set_rx_dfe14 (const phymod_access_t *pa, int8_t val); 588 static err_code_t _get_rx_dfe14 (const phymod_access_t *pa, int8_t *val); 589 590 /* Set/Get TX Tap values */ 591 static err_code_t _set_tx_pre (const phymod_access_t *pa, uint8_t val); 592 static err_code_t _set_tx_amp (const phymod_access_t *pa, int8_t val); 593 static err_code_t _get_tx_amp (const phymod_access_t *pa, int8_t *val); 594 static err_code_t _set_tx_main (const phymod_access_t *pa, uint8_t val); 595 static err_code_t _set_tx_post1 (const phymod_access_t *pa, uint8_t val); 596 static err_code_t _set_tx_post2 (const phymod_access_t *pa, int8_t val); 597 static err_code_t _set_tx_post3 (const phymod_access_t *pa, int8_t val); 598 static err_code_t _get_tx_post3 (const phymod_access_t *pa, int8_t *val); 599 600 /* Lane Config Struct */ 601 static err_code_t _update_uc_lane_config_st (const phymod_access_t *pa, struct phy8806x_tsc_uc_lane_config_st *st); 602 static err_code_t _update_uc_lane_config_word (const phymod_access_t *pa, struct phy8806x_tsc_uc_lane_config_st *st); 603 604 /* Lane User Control Disable Startup Function Struct */ 605 static err_code_t _update_usr_ctrl_disable_functions_st (const phymod_access_t *pa, struct phy8806x_tsc_usr_ctrl_disable_functions_st *st); 606 static err_code_t _update_usr_ctrl_disable_functions_byte (const phymod_access_t *pa, struct phy8806x_tsc_usr_ctrl_disable_functions_st *st); 607 608 /* Lane User Control Disable Startup DFE Function Struct */ 609 static err_code_t _update_usr_ctrl_disable_dfe_functions_st (const phymod_access_t *pa, struct phy8806x_tsc_usr_ctrl_disable_dfe_functions_st *st); 610 static err_code_t _update_usr_ctrl_disable_dfe_functions_byte (const phymod_access_t *pa, struct phy8806x_tsc_usr_ctrl_disable_dfe_functions_st *st); 611 612 /* Core Config Struct */ 613 static err_code_t _update_uc_core_config_st (const phymod_access_t *pa, struct phy8806x_tsc_uc_core_config_st *st); 614 static err_code_t _update_uc_core_config_word (const phymod_access_t *pa, struct phy8806x_tsc_uc_core_config_st *st); 615 616 static uint8_t _phy8806x_tsc_rdb_uc_var (const phymod_access_t *pa, err_code_t *err_code_p, uint16_t addr); 617 static uint16_t _phy8806x_tsc_rdw_uc_var (const phymod_access_t *pa, err_code_t *err_code_p, uint16_t addr); 618 static err_code_t _phy8806x_tsc_wrb_uc_var (const phymod_access_t *pa, uint16_t addr, uint8_t wr_val); 619 static err_code_t _phy8806x_tsc_wrw_uc_var (const phymod_access_t *pa, uint16_t addr, uint16_t wr_val); 620 static err_code_t _phy8806x_tsc_display_ber_scan_data (const phymod_access_t *pa, uint8_t ber_scan_mode, uint8_t timer_control, uint8_t max_error_control); 621 622 623 /*--------------------------*/ 624 /* Register field polling */ 625 /*--------------------------*/ 626 627 /** Polls lane variable "usr_diag_status" to verify data is available in uC diag buffer. 628 * It then reads a WORD of data wich is 2 float8_t samples, it converts them to uint32_t 629 * and returns them in the memory pointed to by *data. 630 * Define macro CUSTOM_REG_POLLING to replace the default implementation provided in phy8806x_tsc_functions.c. 631 * 632 * @param pa phymod_access_t struct 633 * @param *data is pointer to 2 element array of uint32_tpassed from uC through dsc_data 634 * @param *status returns a status byte \n 635 * bit 15 - indicates the ey scan is complete \n 636 * bit 14 - indicates uC is slower than read access \n 637 * bit 13 - indicates uC is faster than read access \n 638 * bit 7-0 - indicates amount of data in the uC buffer 639 * 640 * @param pa phymod_access_t struct 641 * @param timeout_ms Maximum time interval in milliseconds for which the polling is done 642 * @return Error code generated by polling function (returns ERR_CODE_NONE if no errors) 643 */ 644 err_code_t phy8806x_tsc_poll_diag_eye_data (const phymod_access_t *pa, uint32_t *data, uint16_t *status, uint32_t timeout_ms); 645 646 /** Polls lane variable "usr_diag_status" to verify data is available in uC diag buffer. 647 * Define macro CUSTOM_REG_POLLING to replace the default implementation provided in phy8806x_tsc_functions.c. 648 * 649 * @param pa phymod_access_t struct 650 * @param *status returns a status byte \n 651 * bit 15 - indicates the ey scan is complete \n 652 * bit 14-0 - reserved for debug 653 * 654 * @param pa phymod_access_t struct 655 * @param timeout_ms Maximum time interval in milliseconds for which the polling is done 656 * @return Error code generated by polling function (returns ERR_CODE_NONE if no errors) 657 */ 658 err_code_t phy8806x_tsc_poll_diag_done (const phymod_access_t *pa, uint16_t *status, uint32_t timeout_ms); 659 660 /** Polls for register field "uc_dsc_ready_for_cmd" to be 1 within the time interval specified by timeout_ms. 661 * Function returns 0 if polling passes, else it returns error code. 662 * Define macro CUSTOM_REG_POLLING to replace the default implementation provided in phy8806x_tsc_functions.c. 663 * @param pa phymod_access_t struct 664 * @param timeout_ms Maximum time interval in milliseconds for which the polling is done 665 * @return Error code generated by polling function (returns ERR_CODE_NONE if no errors) 666 */ 667 err_code_t phy8806x_tsc_poll_uc_dsc_ready_for_cmd_equals_1 (const phymod_access_t *pa, uint32_t timeout_ms); 668 669 /** Polls for register field "dsc_state" to be "DSC_STATE_UC_TUNE" 670 * within the time interval specified by timeout_ms. 671 * Function returns 0 if polling passes, else it returns error code. 672 * Define macro CUSTOM_REG_POLLING to replace the default implementation provided in 673 * phy8806x_tsc_functions.c. 674 * @param pa phymod_access_t struct 675 * @param timeout_ms Maximum time interval in milliseconds for which the polling is done 676 * @return Error code generated by polling function (returns ERR_CODE_NONE if no errors) 677 */ 678 err_code_t phy8806x_tsc_poll_dsc_state_equals_uc_tune (const phymod_access_t *pa, uint32_t timeout_ms); 679 680 /** Polls for register field "st_afe_tx_fifo_resetb" to be 1 within the time interval specified by timeout_ms. 681 * Function returns 0 if polling passes, else it returns error code. 682 * Define macro CUSTOM_REG_POLLING to replace the default implementation provided in phy8806x_tsc_functions.c. 683 * @param pa phymod_access_t struct 684 * @param timeout_ms Maximum time interval in milliseconds for which the polling is done 685 * @return Error code generated by polling function (returns ERR_CODE_NONE if no errors) 686 */ 687 err_code_t phy8806x_tsc_poll_st_afe_tx_fifo_resetb_equals_1 (const phymod_access_t *pa, uint32_t timeout_ms); 688 689 /** Polls for register field "micro_ra_initdone" to be 1 within the time interval specified by timeout_ms. 690 * Function returns 0 if polling passes, else it returns error code. 691 * Define macro CUSTOM_REG_POLLING to replace the default implementation provided in phy8806x_tsc_functions.c. 692 * @param pa phymod_access_t struct 693 * @param timeout_ms Maximum time interval in milliseconds for which the polling is done 694 * @return Error code generated by polling function (returns ERR_CODE_NONE if no errors) 695 */ 696 err_code_t phy8806x_tsc_poll_micro_ra_initdone (const phymod_access_t *pa, uint32_t timeout_ms); 697 698 /** Polls for register field "cl93n72_fctts_sn_to_trn_req" to be 0 within the time interval specified by timeout_ms. 699 * Function returns 0 if polling passes, else it returns error code. 700 * Define macro CUSTOM_REG_POLLING to replace the default implementation provided in phy8806x_tsc_functions.c. 701 * @param pa phymod_access_t struct 702 * @param timeout_ms Maximum time interval in milliseconds for which the polling is done 703 * @return Error code generated by polling function (returns ERR_CODE_NONE if no errors) 704 */ 705 err_code_t phy8806x_tsc_poll_fctts_sn_to_trn_req (const phymod_access_t *pa, uint32_t timeout_ms); 706 707 #endif