phy8806x_tsc_interface.h (59482B)
1 /*********************************************************************************** 2 *********************************************************************************** 3 * * 4 * * 5 * Description : Interface functions targeted to IP user * 6 * * 7 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 8 * 9 * Copyright 2007-2019 Broadcom Inc. All rights reserved. * 10 * No portions of this material may be reproduced in any form without * 11 * the written permission of: * 12 * Broadcom Corporation * 13 * 5300 California Avenue * 14 * Irvine, CA 92617 * 15 * * 16 * All information contained in this document is Broadcom Corporation * 17 * company private proprietary, and trade secret. * 18 */ 19 20 /*! \mainpage 21 * 22 * \section intro_sec Introduction 23 * 24 * This documentation files are intended to guide a developer in using the 25 * Broadcom SerDes core within a larger ecosystem by providing specific API 26 * function calls which can be used to perform all necessary operations. 27 * 28 * The detailed description about the API directory structure, API overview, 29 * release procedure, and check out process can be found in the Serdes API User Guide 30 * (http://ingbu.broadcom.com/hsip/phy8806x_tsc/SerDes%20Documents/PMD_Methodology/Serdes%20External%20Micro%20User%20Guide.docx) 31 * \n \n 32 * 33 * \section API_sec Important API Files 34 * 35 * phy8806x_tsc_interface.h - provides the primary functionality. 36 * 37 * phy8806x_tsc_dependencies.h - defines the functions to be provided by the IP user 38 * 39 * \n \n 40 * Copyright 2014 Broadcom Corporation all rights reserved 41 */ 42 43 /** @file phy8806x_tsc_interface.h 44 * Main interface functions provided to IP User 45 */ 46 47 #ifndef PHY8806X_TSC_API_INTERFACE_H 48 #define PHY8806X_TSC_API_INTERFACE_H 49 50 #include "phy8806x_tsc_usr_includes.h" 51 52 #include "phy8806x_tsc_ipconfig.h" 53 #include "phy8806x_tsc_enum.h" 54 #include "phy8806x_tsc_common_err_code.h" 55 56 57 /*----------------------------------------*/ 58 /* Lane/Core structs (without bitfields) */ 59 /*----------------------------------------*/ 60 61 /** Lane Config Variable Structure in Microcode */ 62 struct phy8806x_tsc_uc_lane_config_field_st { 63 uint8_t lane_cfg_from_pcs; 64 uint8_t an_enabled; 65 uint8_t dfe_on; 66 uint8_t dfe_lp_mode; 67 uint8_t force_brdfe_on; 68 uint8_t media_type; 69 uint8_t unreliable_los; 70 uint8_t scrambling_dis; 71 uint8_t cl72_auto_polarity_en; 72 uint8_t cl72_restart_timeout_en; 73 uint8_t en_short_chn_osx1; 74 uint8_t reserved; 75 }; 76 77 /** Core Config Variable Structure in Microcode */ 78 struct phy8806x_tsc_uc_core_config_field_st { 79 uint8_t vco_rate; 80 uint8_t core_cfg_from_pcs; 81 uint8_t disable_write_pll_iqp; 82 uint8_t reserved; 83 }; 84 85 /** Lane Config Struct */ 86 struct phy8806x_tsc_uc_lane_config_st { 87 struct phy8806x_tsc_uc_lane_config_field_st field; 88 uint16_t word; 89 }; 90 91 /** Core Config Struct */ 92 struct phy8806x_tsc_uc_core_config_st { 93 struct phy8806x_tsc_uc_core_config_field_st field; 94 uint16_t word; 95 int vco_rate_in_Mhz; /* if >0 then will get converted and replace field.vco_rate when update is called */ 96 }; 97 98 /** Eyescan Options Struct */ 99 struct phy8806x_tsc_eyescan_options_st { 100 uint32_t linerate_in_khz; 101 uint16_t timeout_in_milliseconds; 102 int8_t horz_max; 103 int8_t horz_min; 104 int8_t hstep; 105 int8_t vert_max; 106 int8_t vert_min; 107 int8_t vstep; 108 int8_t mode; 109 }; 110 111 112 /****************************************************/ 113 /* CORE Based APIs - Required to be used per Core */ 114 /****************************************************/ 115 /* Returns API Version Number */ 116 /** API Version Number. 117 * @param pa phymod_access_t struct 118 * @param *api_version API Version Number returned by the API 119 * @return Error Code, if generated (returns ERR_CODE_NONE if no errors) 120 */ 121 err_code_t phy8806x_tsc_version (const phymod_access_t *pa, uint32_t *api_version); 122 123 /*------------------------------------------------------*/ 124 /* APIs to Read/Write Core Config variables in uC RAM */ 125 /*------------------------------------------------------*/ 126 /** Write to core_config uC RAM variable. 127 * @param pa phymod_access_t struct 128 * @param struct_val Value to be written into core_config RAM variable. 129 * (Note that struct_val.word must be = 0, only the fields are used) 130 * @param pa phymod_access_t struct 131 * @return Error Code, if generated (returns ERR_CODE_NONE if no errors) 132 */ 133 err_code_t phy8806x_tsc_set_uc_core_config (const phymod_access_t *pa, struct phy8806x_tsc_uc_core_config_st struct_val); 134 135 /** Read value of core_config uC RAM variable. 136 * @param pa phymod_access_t struct 137 * @param *struct_val Value to be written into core_config RAM variable 138 * @return Error Code, if generated (returns ERR_CODE_NONE if no errors) 139 */ 140 err_code_t phy8806x_tsc_get_uc_core_config (const phymod_access_t *pa, struct phy8806x_tsc_uc_core_config_st *struct_val); 141 142 /*----------------------------------------*/ 143 /* Display Core Config and Debug Status */ 144 /*----------------------------------------*/ 145 /** Display Core configurations (RAM config variables and config register fields). 146 * @param pa phymod_access_t struct 147 * @return Error Code, if generated (returns ERR_CODE_NONE if no errors) 148 */ 149 err_code_t phy8806x_tsc_display_core_config (const phymod_access_t *pa); 150 151 /** Display current Core state. Read and displays core status variables and fields. 152 * @param pa phymod_access_t struct 153 * @return Error Code, if generated (returns ERR_CODE_NONE if no errors) 154 */ 155 err_code_t phy8806x_tsc_display_core_state (const phymod_access_t *pa); 156 157 /** Column definition header for phy8806x_tsc_display_core_state() API output. 158 * To be called before phy8806x_tsc_display_core_state_line() API. 159 * @param pa phymod_access_t struct 160 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 161 */ 162 err_code_t phy8806x_tsc_display_core_state_hdr (const phymod_access_t *pa); 163 164 /** Display current Core state in single line. Read and displays core status variables and fields. 165 * Call phy8806x_tsc_display_core_state_hdr() API before and phy8806x_tsc_display_core_state_legend() after 166 * calling this API to get a formatted core state display with legend. 167 * @param pa phymod_access_t struct 168 * @return Error Code, if generated (returns ERR_CODE_NONE if no errors) 169 */ 170 err_code_t phy8806x_tsc_display_core_state_line (const phymod_access_t *pa); 171 172 /** Detailed description of each column in phy8806x_tsc_display_core_state_line() API output. 173 * To be called after phy8806x_tsc_display_core_state_line() API to display the legends. 174 * @param pa phymod_access_t struct 175 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 176 */ 177 err_code_t phy8806x_tsc_display_core_state_legend (const phymod_access_t *pa); 178 179 /*----------------------------------------*/ 180 /* Temperature forcing and reading */ 181 /*----------------------------------------*/ 182 /** Forces die temperature in degrees Ceisius (as integer). 183 * @param pa phymod_access_t struct 184 * @param die_temp Die temperature in degrees Celsius. 185 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 186 */ 187 err_code_t phy8806x_tsc_force_die_temperature (const phymod_access_t *pa, int16_t die_temp); 188 189 /** Read die temperature in degrees Ceisius (as integer) 190 * @param pa phymod_access_t struct 191 * @param *die_temp Die temperature in degrees Celsius 192 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 193 */ 194 err_code_t phy8806x_tsc_read_die_temperature (const phymod_access_t *pa, int16_t *die_temp); 195 196 /** Read die temperature in degrees Ceisius (as double) 197 * @param pa phymod_access_t struct 198 * @param *die_temp Die temperature in degrees Celsius (as double) 199 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 200 */ 201 err_code_t phy8806x_tsc_read_die_temperature_double (const phymod_access_t *pa, USR_DOUBLE *die_temp); 202 203 204 205 /** Set the uC active mode. 206 * uC active bit should be set by the user to ensure the ucode loaded into the micro is executed. See Programmers Guide for more details. 207 * @param pa phymod_access_t struct 208 * @param enable Enable/Disable uC Active (1 = Enable; 0 = Disable) 209 * @return Error Code generated by invalid access (returns ERR_CODE_NONE if no errors) 210 */ 211 err_code_t phy8806x_tsc_uc_active_enable (const phymod_access_t *pa, uint8_t enable); 212 213 /*-----------------------------------*/ 214 /* Microcode Load/Verify Functions */ 215 /*-----------------------------------*/ 216 217 /** Load Microcode into Micro through Register (MDIO) Interface. 218 * Once the microcode is loaded, de-assert reset to 8051 to start executing microcode "wrc_micro_mdio_dw8051_reset_n(0x1)". 219 * \n Note: Micro should be loaded only after issuing a phy8806x_tsc_uc_reset(1) followed by asserting and de-asserting 220 * core_s_reset. See relevant Programmers guide for more details. 221 * @param pa phymod_access_t struct 222 * @param *ucode_image pointer to the Microcode image organized in bytes 223 * @param ucode_len Length of Microcode Image (number of bytes) 224 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 225 */ 226 err_code_t phy8806x_tsc_ucode_mdio_load (const phymod_access_t *pa, uint8_t *ucode_image, uint16_t ucode_len); 227 228 /** To verify the Microcode image loaded in the Micro. 229 * Read back the microcode from Micro and check against expected microcode image. 230 * @param pa phymod_access_t struct 231 * @param *ucode_image pointer to the expeted Microcode image organized in bytes 232 * @param ucode_len Length of Microcode Image (number of bytes) 233 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 234 */ 235 err_code_t phy8806x_tsc_ucode_load_verify (const phymod_access_t *pa, uint8_t *ucode_image, uint16_t ucode_len); 236 237 /** To verify the CRC of the microcode loaded in the Micro. 238 * Instruct uC to read image and calculate CRC and check against expected CRC. 239 * @param pa phymod_access_t struct 240 * @param ucode_len Length of Microcode Image (number of bytes) 241 * @param expected_crc_value Expected CRC value of the microcode 242 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 243 */ 244 err_code_t phy8806x_tsc_ucode_crc_verify (const phymod_access_t *pa, uint16_t ucode_len, uint16_t expected_crc_value); 245 246 /** To instruct the micro to start calculating the CRC of the microcode. 247 * Instruct uC to read image and calculate CRC. 248 * Control is returned after triggering start of CRC calculation (does NOT wait for completion of CRC calculation). \n \n 249 * NOTE: No uC commands should be executed between starting the CRC calculaion [phy8806x_tsc_ucode_crc_verify()] and verifying the CRC value [phy8806x_tsc_start_ucode_crc_calc()]. 250 * @param pa phymod_access_t struct 251 * @param ucode_len Length of Microcode Image (number of bytes) 252 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 253 */ 254 err_code_t phy8806x_tsc_start_ucode_crc_calc (const phymod_access_t *pa, uint16_t ucode_len); 255 256 /** To check the expected CRC against the CRC calulated by the micro. 257 * NOTE: No uC commands should be executed between starting the CRC calculation [phy8806x_tsc_ucode_crc_verify()] and verifying the CRC value [phy8806x_tsc_start_ucode_crc_calc()]. 258 * @param pa phymod_access_t struct 259 * @param expected_crc_value Expected CRC value of the microcode 260 * @param timeout_ms Time interval in milliseconds inside which the previous command (calculate CRC) should be completed 261 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 262 */ 263 err_code_t phy8806x_tsc_check_ucode_crc (const phymod_access_t *pa, uint16_t expected_crc_value, uint32_t timeout_ms); 264 265 /** To setup the pram bus for Micro load. 266 * When using the pram interface to program the micro, the pram bus must first be setup. 267 * @param pa phymod_access_t struct 268 * @param ucode_len Length of Microcode Image (number of bytes) the value will be padded to 32bit boundary 269 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 270 */ 271 err_code_t phy8806x_tsc_init_pram_for_uc_load (const phymod_access_t *pa, uint16_t ucode_len); 272 273 /** To disable the pram bus after Micro load. 274 * After using the pram interface to program the micro, the pram bus must then be diabled. 275 * @param pa phymod_access_t struct 276 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 277 */ 278 err_code_t phy8806x_tsc_finish_pram_load (const phymod_access_t *pa); 279 280 /** Enable or Disable the uC reset. 281 * Note: Micro should be reset using the API everytime before reloading the microcode 282 * @param pa phymod_access_t struct 283 * @param enable Enable/Disable uC reset (1 = Enable; 0 = Disable) 284 * @return Error Code generated by invalid access (returns ERR_CODE_NONE if no errors) 285 */ 286 err_code_t phy8806x_tsc_uc_reset (const phymod_access_t *pa, uint8_t enable); 287 288 /*----------------*/ 289 /* Lane Mapping */ 290 /*----------------*/ 291 292 /** Configure the lane address mapping. 293 * Note: Micro must not be active when this function is called. 294 * @param pa phymod_access_t struct 295 * @param num_lanes The number of entries in tx_lane_map and rx_lane_map. 296 * This must match the number of lanes associated with the core. 297 * @param pa phymod_access_t struct 298 * @param *tx_lane_map A num_lanes-sized array of lane indexes to map to the TX lanes. 299 * Each entry must be from 0 to num_lanes-1, and each entry must be unique. 300 * @param pa phymod_access_t struct 301 * @param *rx_lane_map A num_lanes-sized array of lane indexes to map to the RX lanes. 302 * Each entry must be from 0 to num_lanes-1, and each entry must be unique. 303 * If independent TX / RX lane mapping is not enabled for a core, then this must match tx_lane_map. 304 * @param pa phymod_access_t struct 305 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 306 */ 307 err_code_t phy8806x_tsc_map_lanes (const phymod_access_t *pa, uint8_t num_lanes, uint8_t const *tx_lane_map, uint8_t const *rx_lane_map); 308 309 /*------------------------------*/ 310 /* Shared TX Pattern Generator */ 311 /*------------------------------*/ 312 /** Configure Shared TX Pattern API. 313 * An input string (hex or binary) and pattern length are taken in as inputs, based on which the Pattern Generator registers 314 * are programmed to the required values to generate that pattern. 315 * Note: phy8806x_tsc_tx_shared_patt_gen_en() API should be called to enable the Pattern generator for that particular lane. 316 * @param pa phymod_access_t struct 317 * @param patt_length Pattern length 318 * @param pattern Input Pattern - Can be in hex (eg: "0xB055") or in binary (eg: "011011") 319 * @return Error Code generated by invalid input pattern or pattern length (returns ERR_CODE_NONE if no errors) 320 */ 321 err_code_t phy8806x_tsc_config_shared_tx_pattern (const phymod_access_t *pa, uint8_t patt_length, const char pattern[]); 322 323 324 /*-----------------------*/ 325 /* IDDQ / Clkgate APIs */ 326 /*-----------------------*/ 327 /** Core configuration for IDDQ. 328 * Note: User also needs to configure all lanes through phy8806x_tsc_lane_config_for_iddq() 329 * before enabling IDDQ by asserting IDDQ pin. 330 * @param pa phymod_access_t struct 331 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 332 */ 333 err_code_t phy8806x_tsc_core_config_for_iddq (const phymod_access_t *pa); 334 335 /** Serdes Core Powerdown. 336 * Along with phy8806x_tsc_core_pwrdn(), all lanes powerdowns should also be issued using 337 * phy8806x_tsc_lane_pwrdn() to complete a Core Powerdown. 338 * @param pa phymod_access_t struct 339 * @param mode based on enum #srds_core_pwrdn_mode_enum select from ON, CORE, DEEP power down modes 340 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 341 */ 342 err_code_t phy8806x_tsc_core_pwrdn (const phymod_access_t *pa, enum srds_core_pwrdn_mode_enum mode); 343 344 345 /**************************************************/ 346 /* MISC reg access */ 347 /**************************************************/ 348 349 /** Masked Register Write to the currently selected Serdes IP core/lane through MDIO. 350 * If using MDIO interface to access the registers, use this API to implement phy8806x_tsc_pmd_mwr_reg(). 351 * @param pa phymod_access_t struct 352 * @param addr Address of register to be written 353 * @param mask 16-bit mask indicating the position of the field with bits of 1s 354 * @param lsb LSB of the field 355 * @param val 16bit value to be written 356 */ 357 err_code_t phy8806x_tsc_pmd_mdio_mwr_reg (const phymod_access_t *pa, uint16_t addr, uint16_t mask, uint8_t lsb, uint16_t val); 358 359 360 /**************************************************/ 361 /* LANE Based APIs - Required to be used per Lane */ 362 /**************************************************/ 363 364 /*------------------------------------------------------------*/ 365 /* APIs to Write Lane Config and User variables into uC RAM */ 366 /*------------------------------------------------------------*/ 367 /** Write to lane_config uC RAM variable. 368 * Note: This API should be used only during configuration under dp_reset. 369 * @param pa phymod_access_t struct 370 * @param struct_val Value to be written into lane_config RAM variable 371 * @return Error Code, if generated (returns ERR_CODE_NONE if no errors) 372 */ 373 err_code_t phy8806x_tsc_set_uc_lane_cfg (const phymod_access_t *pa, struct phy8806x_tsc_uc_lane_config_st struct_val); 374 375 /*-----------------------------------------------------------*/ 376 /* APIs to Read Lane Config and User variables from uC RAM */ 377 /*-----------------------------------------------------------*/ 378 /** Read value of lane_config uC RAM variable. 379 * @param pa phymod_access_t struct 380 * @param *struct_val Value read from lane_config RAM variable 381 * @return Error Code, if generated (returns ERR_CODE_NONE if no errors) 382 */ 383 err_code_t phy8806x_tsc_get_uc_lane_cfg (const phymod_access_t *pa, struct phy8806x_tsc_uc_lane_config_st *struct_val); 384 385 386 /*-----------------*/ 387 /* Configure PLL */ 388 /*-----------------*/ 389 /** Configure PLL. 390 * 391 * Use core_s_rstb to re-initialize all registers to default before calling this function. 392 * 393 * Configures PLL registers to obtain the required VCO frequency. 394 * @param pa phymod_access_t struct 395 * @param pll_cfg Required PLL configuration 396 * @return Error Code, if generated (returns ERR_CODE_NONE if no errors) 397 */ 398 err_code_t phy8806x_tsc_configure_pll (const phymod_access_t *pa, enum phy8806x_tsc_pll_enum pll_cfg); 399 400 401 /*-------------------------*/ 402 /* Merlin TX Analog APIs */ 403 /*-------------------------*/ 404 405 406 /*-------------------------------*/ 407 /* Falcon/Eagle TX Analog APIs */ 408 /*-------------------------------*/ 409 410 /** Write TX AFE parameters. 411 * @param pa phymod_access_t struct 412 * @param param selects the parameter to write based on #srds_tx_afe_settings_enum 413 * @param val is the signed input value to the parameter 414 * @return Error Code generated by invalid tap settings (returns ERR_CODE_NONE if no errors) 415 */ 416 err_code_t phy8806x_tsc_write_tx_afe (const phymod_access_t *pa, enum srds_tx_afe_settings_enum param, int8_t val); 417 418 /** Read TX AFE parameters. 419 * @param pa phymod_access_t struct 420 * @param param selects the parameter to read based on #srds_tx_afe_settings_enum 421 * @param *val is the returned signed value of the parameter 422 * @return Error Code generated by invalid tap settings (returns ERR_CODE_NONE if no errors) 423 */ 424 err_code_t phy8806x_tsc_read_tx_afe (const phymod_access_t *pa, enum srds_tx_afe_settings_enum param, int8_t *val); 425 426 /** Validates Eagle/Falcon TXFIR tap settings. 427 * Returns failcodes if TXFIR settings are invalid. 428 * @param pa phymod_access_t struct 429 * @param pre TXFIR pre tap value (0..31) 430 * @param main TXFIR main tap value (40..112) 431 * @param post1 TXFIR post tap value (0..63) 432 * @param post2 TXFIR post2 tap value (-15..15) 433 * @param post3 TXFIR post3 tap value (-15..15) 434 * @return Error Code generated by invalid tap settings (returns ERR_CODE_NONE if no errors) 435 */ 436 err_code_t phy8806x_tsc_validate_txfir_cfg (const phymod_access_t *pa, int8_t pre, int8_t main, int8_t post1, int8_t post2, int8_t post3); 437 438 439 /*-------------------*/ 440 /* Display Eye Scan */ 441 /*-------------------*/ 442 443 /** Displays Passive Eye Scan from -0.5 UI to 0.5UI to BER 1e-7. 444 * Function uses uC to acquire data. 445 * It also retrieves the data and displays it in ASCII-art style, where number N corresponds to 1e-N 446 * 447 * This function retrieves the data from uC in horizontal stripe fashion 448 * 449 * @param pa phymod_access_t struct 450 * @return Error Code during data collection (returns ERR_CODE_NONE if no errors) 451 */ 452 err_code_t phy8806x_tsc_display_eye_scan (const phymod_access_t *pa); 453 454 /** Displays Passive Eye Scan Data. 455 * This function can be used to display data from meas_lowber_eye_scan() function. 456 * 457 * eyescan_options.horz_max = 31; \n 458 * eyescan_options.horz_min = -31; \n 459 * eyescan_options.vert_max = 31; \n 460 * eyescan_options.vert_min = -31; \n 461 * eyescan_options.hstep = 1; \n 462 * eyescan_options.vstep = 1; \n 463 * eyescan_options.timeout_in_milliseconds = between 4 and 255 464 * (larger numbers will greatly increase test time!) 465 * @param pa phymod_access_t struct 466 * @param eyescan_options is structure of options which control min, max, step, time, and linerate 467 * @param *buffer is pointer to array which contains all samples. 468 * @return Error Code during data collection (returns ERR_CODE_NONE if no errors) 469 */ 470 err_code_t phy8806x_tsc_display_lowber_eye (const phymod_access_t *pa, const struct phy8806x_tsc_eyescan_options_st eyescan_options, uint32_t *buffer); 471 472 /** Measure Passive Eye Scan based on eyescan_options provided and return data in buffer. 473 * It relies on the accuracy of phy8806x_tsc_delay_us() function. \n\n 474 * The recommend settings are: \n 475 * eyescan_options.horz_max = 31; \n 476 * eyescan_options.horz_min = -31; \n 477 * eyescan_options.vert_max = 31; \n 478 * eyescan_options.vert_min = -31; \n 479 * eyescan_options.hstep = 1; \n 480 * eyescan_options.vstep = 1; \n 481 * eyescan_options.timeout_in_milliseconds = between 4 and 255 482 * (larger numbers will greatly increase test time!) \n 483 * @param pa phymod_access_t struct 484 * @param eyescan_options is structure of options which control min, max, step, time, and linerate 485 * @param *buffer is pointer to array which is large enough to store all samples. 486 * @return Error Code during data collection (returns ERR_CODE_NONE if no errors) 487 */ 488 err_code_t phy8806x_tsc_meas_lowber_eye (const phymod_access_t *pa, const struct phy8806x_tsc_eyescan_options_st eyescan_options, uint32_t *buffer); 489 490 /** Start uC controller eye scan Function. 491 * Eye scan function provides a stripe of data at a time either vertical or horizontal. 492 * This function only initiates the processor actions. User must use phy8806x_tsc_read_eye_scan_stripe() function 493 * to get the data from uC. 494 * @param pa phymod_access_t struct 495 * @param direction specifies either EYE_SCAN_VERTICAL or EYE_SCAN_HORIZ striping 496 * @return Error Code during data collection (returns ERR_CODE_NONE if no errors) 497 */ 498 err_code_t phy8806x_tsc_meas_eye_scan_start (const phymod_access_t *pa, uint8_t direction); 499 500 /** Read a Stripe of eye scan data from uC. 501 * @param pa phymod_access_t struct 502 * @param *buffer must be of size 64 503 * @param *status returns a status word \n 504 * bit 15 - indicates the ey scan is complete \n 505 * bit 14 - indicates uC is slower than read access \n 506 * bit 13 - indicates uC is faster than read access \n 507 * bit 12-8 - reserved \n 508 * bit 7-0 - indicates amount of data in the uC buffer 509 * 510 * @param pa phymod_access_t struct 511 * @return Error Code during data collection (returns ERR_CODE_NONE if no errors) 512 */ 513 err_code_t phy8806x_tsc_read_eye_scan_stripe (const phymod_access_t *pa, uint32_t *buffer, uint16_t *status); 514 515 /** Display Stripe of eye scan data to stdout and log. 516 * @param pa phymod_access_t struct 517 * @param y is the vertical step 31 to -31 (Eagle) 124 to -124(Falcon) 518 * @param *buffer must be of size 64 519 * @return Error Code during data collection (returns ERR_CODE_NONE if no errors) 520 */ 521 err_code_t phy8806x_tsc_display_eye_scan_stripe (const phymod_access_t *pa, int8_t y, uint32_t *buffer); 522 523 /** Display Eye scan header to stdout and log. 524 * @param pa phymod_access_t struct 525 * @param i indicates the number of headers to display for parallel eye scan 526 * @return Error Code during data collection (returns ERR_CODE_NONE if no errors) 527 */ 528 err_code_t phy8806x_tsc_display_eye_scan_header (const phymod_access_t *pa, int8_t i); 529 530 /** Display Eye scan footer to stdout and log. 531 * @param pa phymod_access_t struct 532 * @param i indicates the number of footers to display for parallel eye scan 533 * @return Error Code during data collection (returns ERR_CODE_NONE if no errors) 534 */ 535 err_code_t phy8806x_tsc_display_eye_scan_footer (const phymod_access_t *pa, int8_t i); 536 537 /** Check status of eye scan operation in uC. 538 * @param pa phymod_access_t struct 539 * @param *status returns a status word \n 540 * bit 15 - indicates the eye scan is complete \n 541 * bit 14 - indicates uC is slower than read access \n 542 * bit 13 - indicates uC is faster than read access \n 543 * bit 12-8 reserved \n 544 * bit 7-0 - indicates amount of data in the uC buffer 545 * 546 * @param pa phymod_access_t struct 547 * @return Error Code during data collection (returns ERR_CODE_NONE if no errors) 548 */ 549 err_code_t phy8806x_tsc_read_eye_scan_status (const phymod_access_t *pa, uint16_t *status); 550 551 /** Restores uC after running diagnostic eye scans. 552 * @param pa phymod_access_t struct 553 * @return Error Code during data collection (returns ERR_CODE_NONE if no errors) 554 */ 555 err_code_t phy8806x_tsc_meas_eye_scan_done (const phymod_access_t *pa); 556 557 /** Start a uC controlled BER scan function. 558 * This will tell the uC to make a number of BER measurements at different offsets 559 * and provide data back to API as a block of data. Several types of tests can be 560 * made including Passive (which can be run on any data pattern and does not affect 561 * datapath) or Intrusive (which can be run only when PRBS pattern is being used 562 * and will cause errors to occur). Intrusive test has a limited vertical range! 563 * 564 * @param pa phymod_access_t struct 565 * @param ber_scan_mode configures the type of test (use #srds_diag_ber_mode_enum) \n 566 * \verbatim 567 bit 7 : reserved 568 bit 6 : 1 = BER FAST scan mode (reduce minimum sample time from 0.1sec to 0.02sec 569 bit 5-4 : used for vertical intrusive test only (not recommended) 570 00=move 1 slicer in direction bit0 (slicer selected for max range) 571 11=move both, independent direction(not depend on bit0) legacy 40nm mode 572 01=move only odd(depends on bit0) 573 10=move only even(depends on bit0) 574 bit 3 : 1 = set passive scan to narrow vertical range(150mV); 0 = full range(250mV) 575 bit 2 : 1 = intrusive eye scan; 0 = passive 576 bit 1 : 1 = scan horizontal direction; 0 = scan vertical 577 bit 0 : 1 = scan negative portion of eye to center; 1 = scan positive \endverbatim 578 * @param pa phymod_access_t struct 579 * @param timer_control sets the total test time in units of ~1.31 seconds 580 * @param max_error_control sets the error threshold for test in units of 16.(4=64 error threshold) 581 * @return Error Code during data collection (returns ERR_CODE_NONE if no errors) 582 */ 583 err_code_t phy8806x_tsc_start_ber_scan_test (const phymod_access_t *pa, uint8_t ber_scan_mode, uint8_t timer_control, uint8_t max_error_control); 584 585 /** Reads the BER scan data from uC after test has completed. 586 * @param pa phymod_access_t struct 587 * @param *errors is pointer to 32 element array of uint32 which will contain error data 588 * @param *timer_values is pointer to 32 element array of uint32 which will contain time data 589 * @param *cnt returns the number of samples 590 * @param timeout for polling data from uC (typically 2000) 591 * @return Error Code during data collection (returns ERR_CODE_NONE if no errors) 592 */ 593 err_code_t phy8806x_tsc_read_ber_scan_data (const phymod_access_t *pa, uint32_t *errors, uint32_t *timer_values, uint8_t *cnt, uint32_t timeout); 594 595 /** Extrapolate BER and display margin information 596 * @param pa phymod_access_t struct 597 * @param rate specifies the data rate in Hz 598 * @param ber_scan_mode the type of test used to take the data(use #srds_diag_ber_mode_enum) 599 * @param *total_errs is pointer to 32 element array of uint32 containing the error data 600 * @param *total_time is pointer to 32 element array of uint32 containing the time data 601 * @param max_offset is the maximum offset setting which is present in data (usually 31) 602 * @return Error Code during data collection (returns ERR_CODE_NONE if no errors) 603 */ 604 err_code_t phy8806x_tsc_display_ber_scan_data (const phymod_access_t *pa, USR_DOUBLE rate, uint8_t ber_scan_mode, uint32_t *total_errs, uint32_t *total_time, uint8_t max_offset); 605 606 /** Example eye margin projection API. 607 * This is an example function which uses the following API's to measure and display BER margin projections 608 * phy8806x_tsc_start_ber_scan_test(), phy8806x_tsc_read_ber_scan_data(), phy8806x_tsc_display_ber_scan_data(). 609 * 610 * @param pa phymod_access_t struct 611 * @param rate specifies the data rate in Hz 612 * @param ber_scan_mode the type of test used to take the data(use #srds_diag_ber_mode_enum) 613 * @param timer_control sets the total test time in units of ~1.31 seconds 614 * @param max_error_control sets the error threshold for test in units of 16.(4=64 errors) 615 * @return Error Code during data collection (returns ERR_CODE_NONE if no errors) 616 */ 617 err_code_t phy8806x_tsc_eye_margin_proj (const phymod_access_t *pa, USR_DOUBLE rate, uint8_t ber_scan_mode, uint8_t timer_control, uint8_t max_error_control); 618 619 /*-----------------------------------------------*/ 620 /* Get dynamic eye margin estimation values */ 621 /*-----------------------------------------------*/ 622 /** Get dynamic eye estimation values 623 * Reads and converts the Eye margin estimation from the uC. 624 * @param pa phymod_access_t struct 625 * @param *left_eye_mUI a pointer to integer with return value of eye margin in units of mUI 626 * @param *right_eye_mUI a pointer to integer with return value of eye margin in units of mUI 627 * @param *upper_eye_mV a pointer to integer with return value of eye margin in units of mV 628 * @param *lower_eye_mV a pointer to integer with return value of eye margin in units of mV 629 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 630 */ 631 err_code_t phy8806x_tsc_get_eye_margin_est (const phymod_access_t *pa, int *left_eye_mUI, int *right_eye_mUI, int *upper_eye_mV, int *lower_eye_mV); 632 633 /*-----------------------------------------------*/ 634 /* Display Serdes Lane Config and Debug Status */ 635 /*-----------------------------------------------*/ 636 /** Display current lane configuration. 637 * Reads and displays all important lane configuration RAM variables and register fields. 638 * @param pa phymod_access_t struct 639 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 640 */ 641 err_code_t phy8806x_tsc_display_lane_config (const phymod_access_t *pa); 642 643 /** Display current lane debug status. 644 * Reads and displays all vital lane user status and debug status. 645 * @param pa phymod_access_t struct 646 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 647 */ 648 err_code_t phy8806x_tsc_display_lane_debug_status (const phymod_access_t *pa); 649 650 651 /*-----------------------------*/ 652 /* Display Serdes Lane State */ 653 /*-----------------------------*/ 654 /** Display current lane state. 655 * Reads and displays all important lane state values in a single line. 656 * \n Note: Call functions phy8806x_tsc_display_lane_state_hdr() before and phy8806x_tsc_display_lane_state_legend() after 657 * to get a formatted lane state display with legend 658 * @param pa phymod_access_t struct 659 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 660 */ 661 err_code_t phy8806x_tsc_display_lane_state (const phymod_access_t *pa); 662 663 /** Column definition header for phy8806x_tsc display state. 664 * To be called before phy8806x_tsc_display_lane_state() function. 665 * @param pa phymod_access_t struct 666 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 667 */ 668 err_code_t phy8806x_tsc_display_lane_state_hdr (const phymod_access_t *pa); 669 670 /** Detailed explanation of each column in phy8806x_tsc display state. 671 * To be called after phy8806x_tsc_display_lane_state() function to display the legends. 672 * @param pa phymod_access_t struct 673 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 674 */ 675 err_code_t phy8806x_tsc_display_lane_state_legend (const phymod_access_t *pa); 676 677 /*---------------------------------------*/ 678 /* Required Serdes Diag/Debug routines */ 679 /*---------------------------------------*/ 680 /** Parameterized diagnostic function which provides comprehensive diagnostic and debug information 681 * This function is required to be implemented by upper level software to enable phy8806x_tsc support. 682 * @param pa phymod_access_t struct 683 * @param diag_level is a MASK style parameter to enable variable level of display 684 * enum #srds_diag_level_enum can be used to help set the diag_level 685 * bit 0 : 1 = display extended lane state similar to existing falcon ext lane state. 686 * 0 = standard display lane state 687 * bit 1 = display core state 688 * bit 2 = event log 689 * bit 3 = display fast eye scan 690 * bit 4 = dump reg_dump 1 (core level registers) 691 * bit 5 = dump reg_dump 2 (lane level registers) 692 * bit 6 = dump core uC vars 693 * bit 7 = dump lane uC vars 694 * bit 8 = display lane debug state 695 * bit 9 = display data for ber projection vertical 696 * bit 10 = display data for ber projection horzontal 697 * 698 * @param pa phymod_access_t struct 699 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 700 */ 701 err_code_t phy8806x_tsc_display_diag_data (const phymod_access_t *pa, uint16_t diag_level); 702 703 #ifdef TDT_CHARACTERIZATION 704 /** Parameterized diagnostic function which access to all phy8806x_tsc control and status bits 705 * This function is required to be implemented by upper level software to enable phy8806x_tsc support. 706 * @param pa phymod_access_t struct 707 * @param type controls the type of access requested specified through enum #srds_diag_access_enum 708 * type = 0 : Register Read (param becomes count) 709 * type = 1 : Register Read-Modify-Write (param becomes mask) 710 * type = 2 : CORE RAM Read byte (data becomes count) 711 * type = 3 : CORE RAM Read-Modify-Write byte (param becomes mask) 712 * type = 4 : CORE RAM Read word (data becomes count) 713 * type = 5 : CORE RAM Read-Modify-Write word (param becomes mask) 714 * type = 6 : LANE RAM Read byte (data becomes count) 715 * type = 7 : LANE RAM Read-Modify-Write byte (param becomes mask) 716 * type = 8 : LANE RAM Read word (data becomes count) 717 * type = 9 : LANE RAM Read-Modify-Write word (param becomes mask) 718 * type = 10 : Global RAM Read byte (data becomes count) 719 * type = 11 : Global RAM Read-Modify-Write byte (param becomes mask) 720 * type = 12 : Global RAM Read word (data becomes count) 721 * type = 13 : Global RAM Read-Modify-Write word (param becomes mask) 722 * type = 14 : uC Command (addr becomes command; param becomes supp_info) 723 * See microcode for available commands and further information. 724 * type = 15 : Enable Breakboint 725 * type = 16 : Next or Goto Breakpoint (addr becomes breakpoint #) 726 * type = 17 : Read Breakpoint 727 * type = 18 : Disable Breakpoint 728 * type = 19 : Gather BER projection data (addr becomes ber_mode;data becomes max time;param becomes error threshold) 729 * type = 20 : Gather TDT characterization data (addr becomes tdt_pattern;data becomes tdt_mode;param becomes tdt_stepsize_shift 730 * 731 * Global RAM access will ONLY WORK on Cores with direct RAM access 732 * 733 * @param pa phymod_access_t struct 734 * @param addr in most cases is the address of the register or RAM location 735 * @param data in most cases is the data to be written 736 * @param param is the multipurpose parameter and can be mask or other data 737 */ 738 #else 739 /** Parameterized diagnostic function which access to all phy8806x_tsc control and status bits 740 * This function is required to be implemented by upper level software to enable phy8806x_tsc support. 741 * @param pa phymod_access_t struct 742 * @param type controls the type of access requested specified through enum #srds_diag_access_enum 743 * type = 0 : Register Read (param becomes count) 744 * type = 1 : Register Read-Modify-Write (param becomes mask) 745 * type = 2 : CORE RAM Read byte (data becomes count) 746 * type = 3 : CORE RAM Read-Modify-Write byte (param becomes mask) 747 * type = 4 : CORE RAM Read word (data becomes count) 748 * type = 5 : CORE RAM Read-Modify-Write word (param becomes mask) 749 * type = 6 : LANE RAM Read byte (data becomes count) 750 * type = 7 : LANE RAM Read-Modify-Write byte (param becomes mask) 751 * type = 8 : LANE RAM Read word (data becomes count) 752 * type = 9 : LANE RAM Read-Modify-Write word (param becomes mask) 753 * type = 10 : Global RAM Read byte (data becomes count) 754 * type = 11 : Global RAM Read-Modify-Write byte (param becomes mask) 755 * type = 12 : Global RAM Read word (data becomes count) 756 * type = 13 : Global RAM Read-Modify-Write word (param becomes mask) 757 * type = 14 : uC Command (addr becomes command; param becomes supp_info) 758 * See microcode for available commands and further information. 759 * type = 15 : Enable Breakboint 760 * type = 16 : Next or Goto Breakpoint (addr becomes breakpoint #) 761 * type = 17 : Read Breakpoint 762 * type = 18 : Disable Breakpoint 763 * type = 19 : Gather BER projection data (addr becomes ber_mode;data becomes max time;param becomes error threshold) 764 * 765 * Global RAM access will ONLY WORK on Cores with direct RAM access 766 * 767 * @param pa phymod_access_t struct 768 * @param addr in most cases is the address of the register or RAM location 769 * @param data in most cases is the data to be written 770 * @param param is the multipurpose parameter and can be mask or other data 771 */ 772 #endif 773 err_code_t phy8806x_tsc_diag_access (const phymod_access_t *pa, enum srds_diag_access_enum type, uint16_t addr, uint16_t data, uint16_t param); 774 775 /*-------------------------------------*/ 776 /* PMD_RX_LOCK and CL72/CL93 Status */ 777 /*-------------------------------------*/ 778 779 /** PMD rx lock status of current lane. 780 * @param pa phymod_access_t struct 781 * @param *pmd_rx_lock PMD_RX_LOCK status of current lane returned by API 782 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 783 */ 784 err_code_t phy8806x_tsc_pmd_lock_status (const phymod_access_t *pa, uint8_t *pmd_rx_lock); 785 786 /** Display CL93n72 Status of current lane. 787 * @param pa phymod_access_t struct 788 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 789 */ 790 err_code_t phy8806x_tsc_display_cl93n72_status (const phymod_access_t *pa); 791 792 793 794 /*--------------------------------*/ 795 /* Serdes TX disable/RX Restart */ 796 /*--------------------------------*/ 797 /** TX Disable. 798 * @param pa phymod_access_t struct 799 * @param enable Enable/Disable TX disable (1 = TX Disable asserted; 0 = TX Disable removed) 800 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 801 */ 802 err_code_t phy8806x_tsc_tx_disable (const phymod_access_t *pa, uint8_t enable); 803 804 /** Enable/disable Restart RX and hold. 805 * (Reset DSC state machine into RESTART State and hold it till disabled) 806 * @param pa phymod_access_t struct 807 * @param enable Enable/Disable Restart RX and hold (1 = RX restart and hold; 0 = Release hold in restart state) 808 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 809 */ 810 err_code_t phy8806x_tsc_rx_restart (const phymod_access_t *pa, uint8_t enable); 811 812 813 /*-----------------------------*/ 814 /* Stop/Resume RX Adaptation */ 815 /*-----------------------------*/ 816 /** Stop RX Adaptation on a Lane. Control is returned only after attempting to stop adaptation. 817 * RX Adaptation needs to be stopped before modifying any of the VGA, PF or DFE taps. 818 * @param pa phymod_access_t struct 819 * @param enable Enable RX Adaptation stop (1 = Stop RX Adaptation on lane; 0 = Resume RX Adaptation on lane) 820 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 821 */ 822 err_code_t phy8806x_tsc_stop_rx_adaptation (const phymod_access_t *pa, uint8_t enable); 823 824 /** Request to stop RX Adaptation on a Lane. 825 * Control will be returned immediately before adaptaion is completely stopped. 826 * RX Adaptation needs to be stopped before modifying any of the VGA, PF or DFE taps. 827 * To resume RX adaptation, use the phy8806x_tsc_stop_rx_adaptation() API. 828 * @param pa phymod_access_t struct 829 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 830 */ 831 err_code_t phy8806x_tsc_request_stop_rx_adaptation (const phymod_access_t *pa); 832 833 /*------------------------------------*/ 834 /* Read/Write all RX AFE parameters */ 835 /*------------------------------------*/ 836 837 /** Write to RX AFE settings. 838 * Note: RX Adaptation needs to be stopped before modifying any of the VGA, PF or DFE taps. 839 * @param pa phymod_access_t struct 840 * @param param Enum (#srds_rx_afe_settings_enum) to select the required RX AFE setting to be modified 841 * @param val Value to be written to the selected AFE setting 842 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 843 */ 844 err_code_t phy8806x_tsc_write_rx_afe (const phymod_access_t *pa, enum srds_rx_afe_settings_enum param, int8_t val); 845 846 /** Read from RX AFE settings. 847 * @param pa phymod_access_t struct 848 * @param param Enum (#srds_rx_afe_settings_enum) to select the required RX AFE setting to be read 849 * @param *val Value to be written to the selected AFE setting 850 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 851 */ 852 err_code_t phy8806x_tsc_read_rx_afe (const phymod_access_t *pa, enum srds_rx_afe_settings_enum param, int8_t *val); 853 854 /*----------------------------*/ 855 /* Enable Pattern Generator */ 856 /*----------------------------*/ 857 /** Enable/Disable Shared TX pattern generator. 858 * Note: The patt_length input to the function should be the value sent to the phy8806x_tsc_config_shared_tx_pattern() function 859 * @param pa phymod_access_t struct 860 * @param enable Enable shared fixed pattern generator (1 = Enable; 0 = Disable) 861 * @param patt_length length of the pattern used in phy8806x_tsc_config_shared_tx_pattern() 862 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 863 */ 864 err_code_t phy8806x_tsc_tx_shared_patt_gen_en (const phymod_access_t *pa, uint8_t enable, uint8_t patt_length); 865 866 867 /*----------------------------*/ 868 /* Configure PRBS Functions */ 869 /*----------------------------*/ 870 /** Configure PRBS Generator. 871 * Once the PRBS generator is configured, to enable PRBS use the phy8806x_tsc_tx_prbs_en() API. 872 * @param pa phymod_access_t struct 873 * @param prbs_poly_mode PRBS generator mode select (selects required PRBS polynomial) 874 * @param prbs_inv PRBS invert enable 875 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 876 */ 877 err_code_t phy8806x_tsc_config_tx_prbs (const phymod_access_t *pa, enum srds_prbs_polynomial_enum prbs_poly_mode, uint8_t prbs_inv); 878 879 /** Get PRBS Generator Configuration. 880 * @param pa phymod_access_t struct 881 * @param *prbs_poly_mode PRBS generator mode select (selects required PRBS polynomial) 882 * @param *prbs_inv PRBS invert enable 883 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 884 */ 885 err_code_t phy8806x_tsc_get_tx_prbs_config (const phymod_access_t *pa, enum srds_prbs_polynomial_enum *prbs_poly_mode, uint8_t *prbs_inv); 886 887 /** PRBS Generator Enable/Disable. 888 * @param pa phymod_access_t struct 889 * @param enable Enable PRBS Generator (1 = Enable; 0 = Disable) 890 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 891 */ 892 err_code_t phy8806x_tsc_tx_prbs_en (const phymod_access_t *pa, uint8_t enable); 893 894 /** Get PRBS Generator Enable/Disable. 895 * @param pa phymod_access_t struct 896 * @param *enable returns the value of Enable PRBS Generator (1 = Enable; 0 = Disable) 897 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 898 */ 899 err_code_t phy8806x_tsc_get_tx_prbs_en (const phymod_access_t *pa, uint8_t *enable); 900 901 /** PRBS Generator Single Bit Error Injection. 902 * @param pa phymod_access_t struct 903 * @param enable (1 = error is injected; 0 = no error is injected) 904 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 905 */ 906 err_code_t phy8806x_tsc_tx_prbs_err_inject (const phymod_access_t *pa, uint8_t enable); 907 908 /** Configure PRBS Checker. 909 * Once the PRBS checker is configured, use the phy8806x_tsc_rx_prbs_en() API to enable the checker. 910 * @param pa phymod_access_t struct 911 * @param prbs_poly_mode PRBS checker mode select (selects required PRBS polynomial) 912 * @param prbs_checker_mode Checker Mode to select PRBS LOCK state machine 913 * @param prbs_inv PRBS invert enable 914 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 915 */ 916 err_code_t phy8806x_tsc_config_rx_prbs (const phymod_access_t *pa, enum srds_prbs_polynomial_enum prbs_poly_mode, enum srds_prbs_checker_mode_enum prbs_checker_mode, uint8_t prbs_inv); 917 918 /** Get PRBS Checker congifuration. 919 * @param pa phymod_access_t struct 920 * @param *prbs_poly_mode PRBS checker mode select (selects required PRBS polynomial) 921 * @param *prbs_checker_mode Checker Mode to select PRBS LOCK state machine 922 * @param *prbs_inv PRBS invert enable 923 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 924 */ 925 err_code_t phy8806x_tsc_get_rx_prbs_config (const phymod_access_t *pa, enum srds_prbs_polynomial_enum *prbs_poly_mode, enum srds_prbs_checker_mode_enum *prbs_checker_mode, uint8_t *prbs_inv); 926 927 /** PRBS Checker Enable/Disable. 928 * @param pa phymod_access_t struct 929 * @param enable Enable PRBS Checker (1 = Enable; 0 = Disable) 930 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 931 */ 932 err_code_t phy8806x_tsc_rx_prbs_en (const phymod_access_t *pa, uint8_t enable); 933 934 /** Get PRBS Checker Enable/Disable. 935 * @param pa phymod_access_t struct 936 * @param *enable returns with the value of Enable PRBS Checker (1 = Enable; 0 = Disable) 937 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 938 */ 939 err_code_t phy8806x_tsc_get_rx_prbs_en (const phymod_access_t *pa, uint8_t *enable); 940 941 /** PRBS Checker LOCK status (live status). 942 * @param pa phymod_access_t struct 943 * @param *chk_lock Live lock status read by API 944 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 945 */ 946 err_code_t phy8806x_tsc_prbs_chk_lock_state (const phymod_access_t *pa, uint8_t *chk_lock); 947 948 /** PRBS Error Count and Lock Lost status. 949 * Error count and lock lost read back as a single 32bit value. Bit 31 is lock lost and [30:0] is error count. 950 * @param pa phymod_access_t struct 951 * @param *prbs_err_cnt 32bit value returned by API ([30:0] = Error Count; [31] = Lock lost) 952 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 953 */ 954 err_code_t phy8806x_tsc_prbs_err_count_ll (const phymod_access_t *pa, uint32_t *prbs_err_cnt); 955 956 /** PRBS Error Count and Lock Lost status. 957 * Error count and lock lost read back on separate variables 958 * @param pa phymod_access_t struct 959 * @param *prbs_err_cnt 32bit Error count value 960 * @param *lock_lost Lock Lost status (1 = if lock was ever lost) 961 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 962 */ 963 err_code_t phy8806x_tsc_prbs_err_count_state (const phymod_access_t *pa, uint32_t *prbs_err_cnt, uint8_t *lock_lost); 964 965 966 /** Header display for detailed PRBS display function 967 * This can be displayed once and then several cores and lanes after each showing one line 968 * @param pa phymod_access_t struct 969 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 970 */ 971 err_code_t phy8806x_tsc_display_detailed_prbs_state_hdr (const phymod_access_t *pa); 972 973 /** Display detailed PRBS data per lane including Burst Error 974 * 975 * @param pa phymod_access_t struct 976 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 977 */ 978 err_code_t phy8806x_tsc_display_detailed_prbs_state (const phymod_access_t *pa); 979 /*--------------------------------------------------------------*/ 980 /* IDDQ / Powerdown / Deep Powerdown / Isolate Pins */ 981 /*--------------------------------------------------------------*/ 982 /** Lane configurations for IDDQ. 983 * Note: User needs to configure all lanes through phy8806x_tsc_lane_config_for_iddq() and also call phy8806x_tsc_core_config_for_iddq() 984 * before enabling IDDQ by asserting IDDQ pin. 985 * @param pa phymod_access_t struct 986 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 987 */ 988 err_code_t phy8806x_tsc_lane_config_for_iddq (const phymod_access_t *pa); 989 990 /** Serdes Lane Powerdown. 991 * Powers down option available - TX only, RX only, complete LANE, complete lane DEEP, PWR_ON 992 * Note: To wake up from lane DEEP powerdown, first call PWR_ON and then de-assert lane_dp_reset [wr_ln_dp_s_rstb(0x1)]. 993 * @param pa phymod_access_t struct 994 * @param mode Enable/Disable lane powerdown based on #srds_core_pwrdn_mode_enum 995 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 996 */ 997 err_code_t phy8806x_tsc_lane_pwrdn (const phymod_access_t *pa, enum srds_core_pwrdn_mode_enum mode); 998 999 /** TX_PI Fixed Frequency Mode. 1000 * @param pa phymod_access_t struct 1001 * @param enable Enable/Disable TX_PI (1 = Enable; 0 = Disable) 1002 * @param freq_override_val Fixed Frequency Override value (freq_override_val = desired_ppm*8192/781.25; Range: -8192 to + 8192); 1003 * @return Error Code generated by invalid TX_PI settings (returns ERR_CODE_NONE if no errors) 1004 */ 1005 err_code_t phy8806x_tsc_tx_pi_freq_override (const phymod_access_t *pa, uint8_t enable, int16_t freq_override_val); 1006 1007 1008 /*--------------------------------------------*/ 1009 /* Loopback and Ultra-Low Latency Functions */ 1010 /*--------------------------------------------*/ 1011 /** Switch to Remote Loopback from Ultra-Low Latency Mode. 1012 * This function does not enable Loop Timing. 1013 * If you want loop timing use phy8806x_tsc_rmt_lpbk() 1014 * @param pa phymod_access_t struct 1015 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 1016 */ 1017 err_code_t phy8806x_tsc_rmt_lpbk_from_ull (const phymod_access_t *pa); 1018 1019 /** Configure Ultra-Low Latency Mode for TX. 1020 * The RX side function must be called prior to calling this function. 1021 * @param pa phymod_access_t struct 1022 * @param enable Enable/Disable (1 = Enable; 0 = Disable) 1023 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 1024 */ 1025 err_code_t phy8806x_tsc_tx_ull_config (const phymod_access_t *pa, uint8_t enable); 1026 1027 /** Configure Ultra-Low Latency Mode for RX. 1028 * This function should be called before the TX side function. 1029 * @param pa phymod_access_t struct 1030 * @param enable Enable/Disable (1 = Enable; 0 = Disable) 1031 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 1032 */ 1033 err_code_t phy8806x_tsc_rx_ull_config (const phymod_access_t *pa, uint8_t enable); 1034 1035 /** TX PI setup for Repeater Mode. 1036 * @param pa phymod_access_t struct 1037 * @param enable Enable/Disable (1 = Enable; 0 = Disable) 1038 * @return Error Code, if generated (returns ERR_CODE_NONE if no errors) 1039 */ 1040 err_code_t phy8806x_tsc_tx_rptr_mode_timing (const phymod_access_t *pa, uint8_t enable); 1041 1042 /** RX setup for Repeater Mode timing 1043 * This function should be called prior to phy8806x_tsc_rptr_mode_timing(); 1044 * @param pa phymod_access_t struct 1045 * @param enable Enable/Disable (1 = Enable; 0 = Disable) 1046 * @return Error Code, if generated (returns ERR_CODE_NONE if no errors) 1047 */ 1048 err_code_t phy8806x_tsc_rx_rptr_mode_timing (const phymod_access_t *pa, uint8_t enable); 1049 1050 1051 /** Switch to Remote Loopback from Normal Loopback. 1052 * This function does not enable Loop Timing. 1053 * If you want loop timing use phy8806x_tsc_rmt_lpbk() 1054 * @param pa phymod_access_t struct 1055 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 1056 */ 1057 err_code_t phy8806x_tsc_rmt_lpbk_from_nl (const phymod_access_t *pa); 1058 1059 1060 /** Switch to Ultra-Low Latency from Remote Loopback. 1061 * This function should be called twice; once on DATA_IN_SIDE core and once on RMT_LPBK_SIDE core. 1062 * @param pa phymod_access_t struct 1063 * @param mode Appropriate Repeater mode (DATA_IN_SIDE - side where data is fed into , RMT_LPBK_SIDE - side where data is looped back) 1064 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 1065 */ 1066 err_code_t phy8806x_tsc_ull_from_rmt_lpbk (const phymod_access_t *pa, enum srds_rptr_mode_enum mode); 1067 1068 1069 /** Switch to Normal Loopback from Remote Loopback. 1070 * This function should be called twice; once on DATA_IN_SIDE core and once on RMT_LPBK_SIDE core. 1071 * @param pa phymod_access_t struct 1072 * @param mode Appropriate Repeater mode (DATA_IN_SIDE - side where data is fed into , RMT_LPBK_SIDE - side where data is looped back) 1073 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 1074 */ 1075 err_code_t phy8806x_tsc_nl_from_rmt_lpbk (const phymod_access_t *pa, enum srds_rptr_mode_enum mode); 1076 1077 /** Locks TX_PI to Loop timing. 1078 * @param pa phymod_access_t struct 1079 * @param enable Enable TX_PI lock to loop timing (1 = Enable Lock; 0 = Disable Lock) 1080 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 1081 */ 1082 err_code_t phy8806x_tsc_loop_timing (const phymod_access_t *pa, uint8_t enable); 1083 1084 /** Enable/Disable Digital Loopback. 1085 * @param pa phymod_access_t struct 1086 * @param enable Enable Digital Loopback (1 = Enable dig_lpbk; 0 = Disable dig_lpbk) 1087 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 1088 */ 1089 err_code_t phy8806x_tsc_dig_lpbk (const phymod_access_t *pa, uint8_t enable); 1090 1091 1092 /** Enable/Disable Digital Loopback in Repeater mode. 1093 * @param pa phymod_access_t struct 1094 * @param enable Enable Digital Loopback (1 = Enable dig_lpbk; 0 = Disable dig_lpbk) 1095 * @param mode Appropriate Repeater mode (DATA_IN_SIDE - side where data is fed into , DIG_LPBK_SIDE - side where data is looped back) 1096 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 1097 */ 1098 err_code_t phy8806x_tsc_dig_lpbk_rptr (const phymod_access_t *pa, uint8_t enable, enum srds_rptr_mode_enum mode); 1099 1100 /** Disable Digital Loopback in Repeater mode and enter ULL mode. 1101 * This function should be called twice; once on DATA_IN_SIDE core and once on DIG_LPBK_SIDE core. 1102 * @param pa phymod_access_t struct 1103 * @param mode Appropriate Repeater mode (DATA_IN_SIDE - side where data is fed into , DIG_LPBK_SIDE - side where data is looped back) 1104 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 1105 */ 1106 err_code_t phy8806x_tsc_ull_from_dig_lpbk (const phymod_access_t *pa, enum srds_rptr_mode_enum mode); 1107 1108 /** Disable Digital Loopback in Repeater mode and enter Normal datapath. 1109 * This function should be called twice; once on DATA_IN_SIDE core and once on DIG_LPBK_SIDE core. 1110 * @param pa phymod_access_t struct 1111 * @param mode Appropriate Repeater mode (DATA_IN_SIDE - side where data is fed into , DIG_LPBK_SIDE - side where data is looped back) 1112 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 1113 */ 1114 err_code_t phy8806x_tsc_nl_from_dig_lpbk (const phymod_access_t *pa, enum srds_rptr_mode_enum mode); 1115 1116 1117 /** Enable/Disable Remote Loopback. 1118 * @param pa phymod_access_t struct 1119 * @param enable Enable Remote Loopback (1 = Enable rmt_lpbk; 0 = Disable rmt_lpbk) 1120 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 1121 */ 1122 err_code_t phy8806x_tsc_rmt_lpbk (const phymod_access_t *pa, uint8_t enable); 1123 1124 1125 /** Configures FC TTS for speed negotiation on TX lane. 1126 * Returns failcodes for invalid configurations or configuration failure. 1127 * @param pa phymod_access_t struct 1128 * @param tx_pll_sel Selection of the PLL0 or PLL1 as clock source for the tx lane 1129 * 0 - Select PLL0 as clock for tx_ lane 1130 * 1 - Select PLL1 as clock for tx_ lane 1131 * @param pa phymod_access_t struct 1132 * @param tx_osr_mode TX oversample(OS) mode 1133 * 0 - OSR1 1134 * 1 - OSR2 1135 * 2 - OSR4 1136 * @param pa phymod_access_t struct 1137 * @param tx_fctts_update_page Contains correction information from the local receiver 1138 * to the link partner transmit equalizer 1139 * @param pa phymod_access_t struct 1140 * @param tx_fctts_status_page Local device's transmit status page 1141 * @return Error Code generated by invalid configuration (returns ERR_CODE_NONE if no errors) 1142 */ 1143 err_code_t phy8806x_tsc_config_tx_fctts (const phymod_access_t *pa, uint16_t tx_pll_sel, uint16_t tx_osr_mode, uint16_t tx_fctts_update_page, uint16_t tx_fctts_status_page); 1144 1145 /** Configures FC TTS for speed negotiation on RX lane. 1146 * Returns failcodes for invalid configurations or configuration failure. 1147 * @param pa phymod_access_t struct 1148 * @param rx_pll_sel Selection of the PLL0 or PLL1 as clock source for the rx lane 1149 * 0 - Select PLL0 as clock for rx lane 1150 * 1 - Select PLL1 as clock for rx lane 1151 * @param pa phymod_access_t struct 1152 * @param rx_osr_mode RX oversample(OS) mode 1153 * 0 - OSR1 1154 * 1 - OSR2 1155 * 2 - OSR4 1156 * @param pa phymod_access_t struct 1157 * @param rx_fctts_sync_count_chkval Specify the number of consective valid frame markers 1158 * to be detected to assert sync_test_pass, from 0 to 2047 1159 * @param pa phymod_access_t struct 1160 * @param rx_fctts_ext_marker_chk_en Enable/disable extended marker check when detecting 1161 * 32GFC/16GFC TTS frames 1162 * 1 - check for 32GFC format extended marker 1163 * 2 - check for 16GFC format extended marker 1164 * 0,3 - check for normal standard marker 1165 * @param pa phymod_access_t struct 1166 * @return Error Code generated by invalid configuration (returns ERR_CODE_NONE if no errors) 1167 */ 1168 err_code_t phy8806x_tsc_config_rx_fctts (const phymod_access_t *pa, uint16_t rx_pll_sel, uint16_t rx_osr_mode, uint16_t rx_fctts_sync_count_chkval, uint16_t rx_fctts_ext_marker_chk_en); 1169 1170 /**Transitioning from TTS for FC speed negotiation to TTS for FC training. 1171 * Returns failcodes if transition fails. 1172 * @param pa phymod_access_t struct 1173 * @param xmt_update_page Contains correction information from the local receiver 1174 * to the link partner transmit equalizer 1175 * @param pa phymod_access_t struct 1176 * @param xmt_status_page Local device's transmit status page 1177 * @param tts_prbs_sel Specify the type of traffic to be sent after FC training is complete 1178 * 0 - send TTS after FC training is complete 1179 * 1 - send PRBS after FC training is complete 1180 * @param pa phymod_access_t struct 1181 * @return Error Code generated by transition failure (returns ERR_CODE_NONE if no errors) 1182 */ 1183 err_code_t phy8806x_tsc_fctts_sn_to_trn (const phymod_access_t *pa, uint16_t xmt_update_page, uint16_t xmt_status_page, uint8_t tts_prbs_sel); 1184 1185 #endif