phy8806x_xmod_api.h (75176B)
1 /* 2 * 3 * 4 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 5 * 6 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 7 * 8 * This file contains the XMOD API prototypes, structres and defines. 9 * This file is intended to be used by both the host software and device fw. 10 */ 11 12 #ifndef __PHY8806X_XMOD_API_H__ 13 #define __PHY8806X_XMOD_API_H__ 14 15 #include <phymod/phymod.h> 16 #include <phymod/phymod_system.h> 17 #include <phymod/phymod_debug.h> 18 #include <phymod/phymod_util.h> 19 20 21 /* XMOD API parameter types */ 22 #define IN /* SDK to FW */ 23 #define OUT /* FW to SDK */ 24 #define INOUT /* SDK to FW to SDK */ 25 26 #define XMOD_IN_BUFFER_AREA 0x7FD00 27 #define XMOD_OUT_BUFFER_AREA 0x7FE00 28 #define XMOD_BUFFER_MAX_LEN 256 29 30 #ifndef COMPILER_ATTRIBUTE 31 #define COMPILER_ATTRIBUTE(_a) __attribute__ (_a) 32 #endif /* COMPILER_ATTRIBUTE */ 33 34 #define PORT_LINE_SIDE_CTRL (0) 35 #define PORT_SYS_SIDE_CTRL (0x100) 36 37 typedef enum xmod_error_e { 38 XMOD_E_NONE_PROCESSING = 1, 39 XMOD_E_NONE = 0, 40 XMOD_E_INTERNAL = -1, 41 XMOD_E_MEMORY = -2, 42 XMOD_E_IO = -3, 43 XMOD_E_PARAM = -4, 44 XMOD_E_CORE = -5, 45 XMOD_E_PHY = -6, 46 XMOD_E_BUSY = -7, 47 XMOD_E_FAIL = -8, 48 XMOD_E_TIMEOUT = -9, 49 XMOD_E_RESOURCE = -10, 50 XMOD_E_CONFIG = -11, 51 XMOD_E_UNAVAIL = -12, 52 XMOD_E_INIT = -13, 53 XMOD_E_LIMIT = -14 /* Must come last */ 54 } xmod_error_t; 55 56 /* XMOD category and command list */ 57 #define XMOD_CORE_CMDS 0 58 #define XMOD_CORE_IDENTIFY 0x00 59 #define XMOD_CORE_INFO_GET 0x02 60 #define XMOD_CORE_LANE_MAP_GET 0x04 61 #define XMOD_CORE_LANE_MAP_SET 0x05 62 #define XMOD_CORE_RESET_GET 0x06 63 #define XMOD_CORE_RESET_SET 0x07 64 #define XMOD_CORE_FIRMWARE_INFO_GET 0x08 65 #define XMOD_PHY_FIRMWARE_CORE_CONFIG_GET 0x0A 66 #define XMOD_PHY_FIRMWARE_CORE_CONFIG_SET 0x0B 67 #define XMOD_CORE_INIT 0x0D 68 #define XMOD_CORE_PLL_SEQUENCER_RESTART 0x0F 69 #define XMOD_CORE_WAIT_EVENT 0x10 70 #define XMOD_DEV_REG_GET 0x12 71 #define XMOD_DEV_REG_SET 0x13 72 #define XMOD_DEV_DEBUG_BUF_GET 0x14 73 #define XMOD_CMD_ACKNOWLEDGE 0x17 74 #define XMOD_CMD_ABORT 0x19 75 #define XMOD_DEV_DEBUG_CMD 0x1b 76 #define XMOD_DEV_CTR_INTERVAL_SET 0x1d 77 #define XMOD_DEV_DEBUG_ETHER_CMD 0x1e 78 #define XMOD_DEV_I2C_GET 0x20 79 #define XMOD_DEV_I2C_SET 0x21 80 #define XMOD_CORE_CMDS_COUNT 0x22 /* LAST ENTRY */ 81 82 #define XMOD_ETHERNET_CMDS 1 83 #define XMOD_PHY_FIRMWARE_LANE_CONFIG_GET 0x00 84 #define XMOD_PHY_FIRMWARE_LANE_CONFIG_SET 0x01 85 #define XMOD_PHY_INIT 0x03 86 #define XMOD_PHY_RX_RESTART 0x05 87 #define XMOD_PHY_POLARITY_GET 0x06 88 #define XMOD_PHY_POLARITY_SET 0x07 89 #define XMOD_PHY_TX_GET 0x08 90 #define XMOD_PHY_TX_SET 0x09 91 #define XMOD_PHY_MEDIA_TYPE_TX_GET 0x0A 92 #define XMOD_PHY_TX_OVERRIDE_GET 0x0C 93 #define XMOD_PHY_TX_OVERRIDE_SET 0x0D 94 #define XMOD_PHY_RX_GET 0x10 95 #define XMOD_PHY_RX_SET 0x11 96 #define XMOD_PHY_RESET_GET 0x12 97 #define XMOD_PHY_RESET_SET 0x13 98 #define XMOD_PHY_POWER_GET 0x14 99 #define XMOD_PHY_POWER_SET 0x15 100 #define XMOD_PHY_TX_LANE_CONTROL_GET 0x16 101 #define XMOD_PHY_TX_LANE_CONTROL_SET 0x17 102 #define XMOD_PHY_RX_LANE_CONTROL_GET 0x18 103 #define XMOD_PHY_RX_LANE_CONTROL_SET 0x19 104 #define XMOD_PHY_FEC_ENABLE_GET 0x1A 105 #define XMOD_PHY_FEC_ENABLE_SET 0x1B 106 #define XMOD_PHY_INTERFACE_CONFIG_GET 0x1C 107 #define XMOD_PHY_INTERFACE_CONFIG_SET 0x1D 108 #define XMOD_PHY_CL72_GET 0x1E 109 #define XMOD_PHY_CL72_SET 0x1F 110 #define XMOD_PHY_CL72_STATUS_GET 0x20 111 #define XMOD_PHY_AUTONEG_ABILITY_GET 0x22 112 #define XMOD_PHY_AUTONEG_ABILITY_SET 0x23 113 #define XMOD_PHY_AUTONEG_REMOTE_ABILITY_GET 0x24 114 #define XMOD_PHY_AUTONEG_GET 0x26 115 #define XMOD_PHY_AUTONEG_SET 0x27 116 #define XMOD_PHY_AUTONEG_STATUS_GET 0x28 117 #define XMOD_PHY_LOOPBACK_GET 0x2A 118 #define XMOD_PHY_LOOPBACK_SET 0x2B 119 #define XMOD_PHY_RX_PMD_LOCKED_GET 0x2C 120 #define XMOD_PHY_LINK_STATUS_GET 0x2E 121 #define XMOD_PHY_STATUS_DUMP 0x30 122 #define XMOD_PHY_PCS_USERSPEED_GET 0x32 123 #define XMOD_PHY_PCS_USERSPEED_SET 0x33 124 #define XMOD_PORT_INIT 0x35 125 #define XMOD_PHY_AN_TRY_ENABLE 0x37 126 #define XMOD_PE_INIT 0x39 127 #define XMOD_PE_STATUS_GET 0x3a 128 #define XMOD_PE_PORT_STATS_GET 0x3c 129 #define XMOD_PE_PCID_SET 0x3f 130 #define XMOD_PE_FW_VER_GET 0x40 131 #define XMOD_PORT_ENABLE_GET 0x42 132 #define XMOD_PORT_ENABLE_SET 0x43 133 #define XMOD_PHY_FORCED_SPEED_LINE_SIDE_GET 0x44 134 #define XMOD_PHY_FORCED_SPEED_LINE_SIDE_SET 0x45 135 #define XMOD_PHY_FLOW_CONTROL_MODE_GET 0x46 136 #define XMOD_PHY_FLOW_CONTROL_MODE_SET 0x47 137 /* In EBE mode, this is used to get the USE_IP_COS setting in case of PFE*/ 138 #define XMOD_PHY_PSM_COS_BMP_GET 0x48 139 /* In EBE mode, this is used to set the USE_IP_COS in case of PFE */ 140 #define XMOD_PHY_PSM_COS_BMP_SET 0x49 141 #define XMOD_PHY_AUTONEG_LINE_SIDE_GET 0x4a 142 #define XMOD_PHY_AUTONEG_LINE_SIDE_SET 0x4b 143 #define XMOD_PHY_RESET_INTF 0x4d 144 #define XMOD_PHY_FW_LANE_CFG_GET 0x4e 145 #define XMOD_PHY_FW_LANE_CFG_SET 0x4f 146 #define XMOD_ETHERNET_CMDS_COUNT 0x50 /* LAST ENTRY */ 147 148 #define XMOD_FC_CMDS 2 149 #define XMOD_BFCMAP_PORT_CONFIG_GET 0x00 150 #define XMOD_BFCMAP_PORT_CONFIG_SET 0x01 151 #define XMOD_BFCMAP_PORT_CMD_SET 0x03 152 #define XMOD_BFCMAP_PORT_SPEED_SET 0x05 153 #define XMOD_BFCMAP_PORT_LINK_FAULT_TRIGGER_RC_GET 0x06 154 #define XMOD_BFCMAP_PORT_DIAG_GET 0x08 155 #define XMOD_BFCMAP_PORT_ABIL_GET 0x0A 156 #define XMOD_BFCMAP_PORT_ABIL_SET 0x0B 157 #define XMOD_BFCMAP_VLAN_MAP_GET 0x0C 158 #define XMOD_BFCMAP_VLAN_MAP_ADD 0x0D 159 #define XMOD_BFCMAP_VLAN_MAP_DELETE 0x0F 160 #define XMOD_BFCMAP_PORT_INIT 0x11 161 #define XMOD_FC_CMDS_COUNT 0x12 /* LAST ENTRY */ 162 163 164 #define XMOD_CPRI_CMDS 3 165 #define XMOD_CPRI_CMDS_COUNT 0x00 /* LAST ENTRY */ 166 167 #define XMOD_MAX_LANES_PER_CORE 8 168 #define XMOD_NUM_DFE_TAPS 5 /* MAX num of DFE TAPS */ 169 170 #define WRITE_XMOD_ARG_BUFF(_xmodbuf, _argbuff, _arglen) \ 171 { \ 172 PHYMOD_MEMCPY((void*)_xmodbuf, (void*)_argbuff, _arglen); \ 173 _xmodbuf+=_arglen; \ 174 } 175 #define READ_XMOD_ARG_BUFF(_xmodbuf, _argbuff, _arglen) \ 176 { \ 177 PHYMOD_MEMCPY((void*)_argbuff, (void*)_xmodbuf, _arglen); \ 178 _xmodbuf+=_arglen; \ 179 } 180 #define XMOD_ARG_BUFF_ADJUST(_xmodbuf, _arglen) \ 181 { \ 182 _xmodbuf+=_arglen; \ 183 } 184 185 #define XMOD_CMD_MODE_CORE(cmd) (cmd) 186 #define XMOD_CMD_MODE_ETH(cmd) (0x100 | cmd) 187 #define XMOD_CMD_MODE_FC(cmd) (0x200 | cmd) 188 #define XMOD_CMD_MODE_CPRI(cmd) (0x300 | cmd) 189 190 #define XMOD_FLAGS_SHIFT 11 191 #define XMOD_FLAGS_MASK 0xf 192 #define XMOD_SYS_FLAG 1 193 #define XMOD_LINE_FLAG 2 194 195 /*! 196 * @enum xmod_loopback_mode_e 197 * @brief loopback mode 198 */ 199 typedef enum xmod_loopback_mode_e { 200 xmodLoopbackGlobal = 0, 201 xmodLoopbackGlobalPMD, 202 xmodLoopbackGlobalPCS, 203 xmodLoopbackRemotePMD, 204 xmodLoopbackRemotePCS, 205 xmodLoopbackSysGlobal, 206 xmodLoopbackSysGlobalPMD, 207 xmodLoopbackSysGlobalPCS, 208 xmodLoopbackSysRemotePMD, 209 xmodLoopbackSysRemotePCS, 210 xmodLoopbackCount 211 } xmod_loopback_mode_td; 212 typedef uint8_t xmod_loopback_mode_t; 213 214 /*! 215 * @enum xmod_core_version_e 216 * @brief core version 217 */ 218 typedef enum xmod_core_version_e { 219 xmodCoreVersionFalconA0 = 0, 220 xmodCoreVersionEagleA0, 221 xmodCoreVersionQsgmiieA0, 222 xmodCoreVersionTsce4A0, 223 xmodCoreVersionTsce12A0, 224 xmodCoreVersionTscfA0, 225 xmodCoreVersionTscfB0, 226 xmodCoreVersionMT2A0, 227 xmodCoreVersionCount 228 } xmod_core_version_td; 229 typedef uint8_t xmod_core_version_t; 230 231 /*! 232 * @enum xmod_reset_mode_e 233 * @brief Reset modes 234 */ 235 typedef enum xmod_reset_mode_e { 236 xmodResetModeHard = 0, /* Hard Reset */ 237 xmodResetModeSoft, /* Soft Reset */ 238 xmodResetModeCount 239 } xmod_reset_mode_td; 240 typedef uint8_t xmod_reset_mode_t; 241 242 /*! 243 * @enum xmod_reset_direction_e 244 * @brief Reset modes 245 */ 246 typedef enum xmod_reset_direction_e { 247 xmodResetDirectionIn = 0, /* In Reset */ 248 xmodResetDirectionOut, /* Out of Reset */ 249 xmodResetDirectionInOut, /* Toggle Reset */ 250 xmodResetDirectionCount 251 } xmod_reset_direction_td; 252 typedef uint8_t xmod_reset_direction_t; 253 254 /*! 255 * @enum xmod_firmware_media_type_e 256 * @brief media_type for firmware 257 */ 258 typedef enum xmod_firmware_media_type_e { 259 xmodFirmwareMediaTypePcbTraceBackPlane = 0, /* back plane */ 260 xmodFirmwareMediaTypeCopperCable, /* copper cable */ 261 xmodFirmwareMediaTypeOptics, /* optical */ 262 xmodFirmwareMediaTypeCount 263 } xmod_firmware_media_type_td; 264 typedef uint8_t xmod_firmware_media_type_t; 265 266 /*! 267 * @enum xmod_media_typed_e 268 * @brief media types 269 */ 270 typedef enum xmod_media_typed_e { 271 xmodMediaTypeChipToChip = 0, 272 xmodMediaTypeShort, 273 xmodMediaTypeMid, 274 xmodMediaTypeLong, 275 xmodMediaTypeCount 276 } xmod_media_typed_td; 277 typedef uint8_t xmod_media_typed_t; 278 279 /*! 280 * @enum xmod_sequencer_operation_e 281 * @brief Sequencer operations 282 */ 283 typedef enum xmod_sequencer_operation_e { 284 xmodSeqOpStop = 0, /* Stop Sequencer */ 285 xmodSeqOpStart, /* Start Sequencer */ 286 xmodSeqOpRestart, /* Toggle Sequencer */ 287 xmodSeqOpCount 288 } xmod_sequencer_operation_td; 289 typedef uint8_t xmod_sequencer_operation_t; 290 291 /*! 292 * @enum xmod_core_event_e 293 * @brief core event 294 */ 295 typedef enum xmod_core_event_e { 296 xmodCoreEventPllLock = 0, /* PLL locked */ 297 xmodCoreEventCount 298 } xmod_core_event_td; 299 typedef uint8_t xmod_core_event_t; 300 301 /*! 302 * @enum xmod_power_e 303 * @brief power modes 304 */ 305 typedef enum xmod_power_e { 306 xmodPowerOff = 0, /* turn off power */ 307 xmodPowerOn, /* turn on power */ 308 xmodPowerOffOn, /* toggle power */ 309 xmodPowerNoChange, /* stay where you are */ 310 xmodPowerCount 311 } xmod_power_td; 312 typedef uint8_t xmod_power_t; 313 314 /*! 315 * @enum xmod_interface_e 316 * @brief phy interface 317 */ 318 typedef enum xmod_interface_e { 319 xmodInterfaceBypass = 0, 320 xmodInterfaceSR, 321 xmodInterfaceSR4, 322 xmodInterfaceKX, 323 xmodInterfaceKX4, 324 xmodInterfaceKR, 325 xmodInterfaceKR2, 326 xmodInterfaceKR4, 327 xmodInterfaceCX, 328 xmodInterfaceCX2, 329 xmodInterfaceCX4, 330 xmodInterfaceCR, 331 xmodInterfaceCR2, 332 xmodInterfaceCR4, 333 xmodInterfaceCR10, 334 xmodInterfaceXFI, 335 xmodInterfaceSFI, 336 xmodInterfaceSFPDAC, 337 xmodInterfaceXGMII, 338 xmodInterface1000X, 339 xmodInterfaceSGMII, 340 xmodInterfaceRXAUI, 341 xmodInterfaceX2, 342 xmodInterfaceXLAUI, 343 xmodInterfaceXLAUI2, 344 xmodInterfaceCAUI, 345 xmodInterfaceQSGMII, 346 xmodInterfaceCount 347 } xmod_interface_td; 348 typedef uint8_t xmod_interface_t; 349 350 /*! 351 * @enum xmod_ref_clk_e 352 * @brief Reference Clock 353 */ 354 typedef enum xmod_ref_clk_e { 355 xmodRefClk156Mhz = 0, /* 156.25MHz */ 356 xmodRefClk125Mhz, /* 125MHz */ 357 xmodRefClkCount 358 } xmod_ref_clk_td; 359 typedef uint8_t xmod_ref_clk_t; 360 361 /*! 362 * @enum xmod_an_mode_type_e 363 * @brief an mode type 364 */ 365 typedef enum xmod_an_mode_type_e { 366 xmod_AN_MODE_NONE = 0, 367 xmod_AN_MODE_CL73, 368 xmod_AN_MODE_CL37, 369 xmod_AN_MODE_CL73BAM, 370 xmod_AN_MODE_CL37BAM, 371 xmod_AN_MODE_HPAM, 372 xmod_AN_MODE_SGMII, 373 xmod_AN_MODE_Count 374 } xmod_an_mode_type_td; 375 typedef uint8_t xmod_an_mode_type_t; 376 377 /*! 378 * @enum xmod_cl37_sgmii_speed_e 379 * @brief cl37 sgmii speed type 380 */ 381 typedef enum xmod_cl37_sgmii_speed_e { 382 xmod_CL37_SGMII_10M = 0, 383 xmod_CL37_SGMII_100M, 384 xmod_CL37_SGMII_1000M, 385 xmod_CL37_SGMII_Count 386 } xmod_cl37_sgmii_speed_td; 387 typedef uint8_t xmod_cl37_sgmii_speed_t; 388 389 /*! 390 * @enum xmod_pcs_userspeed_mode_e 391 * @brief modes for xmod_phy_pcs_userspeed API 392 */ 393 typedef enum xmod_pcs_userspeed_mode_e { 394 xmodPcsUserSpeedModeST = 0, /* PCS Sw Table */ 395 xmodPcsUserSpeedModeHTO, /* PCS Hw Table Override */ 396 xmodPcsUserSpeedModeCount 397 } xmod_pcs_userspeed_mode_td; 398 typedef uint8_t xmod_pcs_userspeed_mode_t; 399 400 /*! 401 * @enum xmod_pcs_userspeed_param_e 402 * @brief parameters for xmod_phy_pcs_userspeed API 403 */ 404 typedef enum xmod_pcs_userspeed_param_e { 405 xmodPcsUserSpeedParamEntry = 0, /* ST current entry */ 406 xmodPcsUserSpeedParamHCD, /* ST HCD */ 407 xmodPcsUserSpeedParamClear, /* HTO Clear */ 408 xmodPcsUserSpeedParamPllDiv, /* ST/HTO PLL DIV */ 409 xmodPcsUserSpeedParamPmaOS, /* ST/HTO PMA OS */ 410 xmodPcsUserSpeedParamScramble, /* Scramble mode */ 411 xmodPcsUserSpeedParamEncode, /* Encode mode */ 412 xmodPcsUserSpeedParamCl48CheckEnd, /* CL48 Check end */ 413 xmodPcsUserSpeedParamBlkSync, /* Block sync mode */ 414 xmodPcsUserSpeedParamReorder, /* Reorder mode */ 415 xmodPcsUserSpeedParamCl36Enable, /* CL36 enable */ 416 xmodPcsUserSpeedParamDescr1, /* Descramble1 mode */ 417 xmodPcsUserSpeedParamDecode1, /* Decode1 mode */ 418 xmodPcsUserSpeedParamDeskew, /* Deskew mode */ 419 xmodPcsUserSpeedParamDescr2, /* Descramble2 mode */ 420 xmodPcsUserSpeedParamDescr2ByteDel, 421 xmodPcsUserSpeedParamBrcm64B66, /* Drcm64/66 descramble */ 422 xmodPcsUserSpeedParamSgmii, /* SGMII mode */ 423 xmodPcsUserSpeedParamClkcnt0, /* clock count0 */ 424 xmodPcsUserSpeedParamClkcnt1, /* clock count1 */ 425 xmodPcsUserSpeedParamLpcnt0, /* Loop count0 */ 426 xmodPcsUserSpeedParamLpcnt1, /* Loop count1 */ 427 xmodPcsUserSpeedParamMacCGC, /* Mac CGC */ 428 xmodPcsUserSpeedParamRepcnt, /* Repeat Count */ 429 xmodPcsUserSpeedParamCrdtEn, /* Credit Enable */ 430 xmodPcsUserSpeedParamPcsClkcnt, /* PCS clock count */ 431 xmodPcsUserSpeedParamPcsCGC, /* PCS CGC */ 432 xmodPcsUserSpeedParamCl72En, /* Cl72 enable */ 433 xmodPcsUserSpeedParamNumOfLanes, /* Num of lanes */ 434 xmodPcsUserSpeedParamCount 435 } xmod_pcs_userspeed_param_td; 436 typedef uint8_t xmod_pcs_userspeed_param_t; 437 438 /*! 439 * @enum xmod_bfcmap_port_cmd_e 440 * @brief bfcmap port cmds 441 */ 442 typedef enum xmod_bfcmap_port_cmd_e { 443 XMOD_BFCMAP_PORT_UNINIT, /* uninitialize port */ 444 XMOD_BFCMAP_DEV_INIT, /* initialize device */ 445 XMOD_BFCMAP_DEV_UNINIT, /* uninitialize device */ 446 XMOD_BFCMAP_PORT_RESET, /* reset port */ 447 XMOD_BFCMAP_PORT_SHUTDOWN, /* shutdown port */ 448 XMOD_BFCMAP_PORT_LINK_ENABLE, /* enable link on port */ 449 XMOD_BFCMAP_PORT_BOUNCE, /* bounce link on port */ 450 XMOD_BFCMAP_PORT_STAT_CLEAR /* clear all stats on port */ 451 } xmod_bfcmap_port_cmd_td; 452 typedef uint8_t xmod_bfcmap_port_cmd_t; 453 454 /*! 455 * @enum xmod_bfcmap_port_mode_e 456 * @brief bfcmap port mode 457 */ 458 typedef enum xmod_bfcmap_port_mode_e { 459 XMOD_BFCMAP_FCOE_TO_FC_MODE, 460 XMOD_BFCMAP_FCOE_TO_FCOE_MODE 461 } xmod_bfcmap_port_mode_td; 462 typedef uint8_t xmod_bfcmap_port_mode_t; 463 464 /*! 465 * @enum xmod_bfcmap_port_speed_e 466 * @brief bfcmap port speed 467 */ 468 typedef enum xmod_bfcmap_port_speed_e { 469 XMOD_BFCMAP_PORT_SPEED_AN, 470 XMOD_BFCMAP_PORT_SPEED_2GBPS, 471 XMOD_BFCMAP_PORT_SPEED_4GBPS, 472 XMOD_BFCMAP_PORT_SPEED_8GBPS, 473 XMOD_BFCMAP_PORT_SPEED_16GBPS, 474 XMOD_BFCMAP_PORT_SPEED_32GBPS, 475 XMOD_BFCMAP_PORT_SPEED_AN_2GBPS, 476 XMOD_BFCMAP_PORT_SPEED_AN_4GBPS, 477 XMOD_BFCMAP_PORT_SPEED_AN_8GBPS, 478 XMOD_BFCMAP_PORT_SPEED_AN_16GBPS, 479 XMOD_BFCMAP_PORT_SPEED_AN_32GBPS, 480 XMOD_BFCMAP_PORT_SPEED_MAX_COUNT 481 } xmod_bfcmap_port_speed_td; 482 typedef uint8_t xmod_bfcmap_port_speed_t; 483 484 /*! 485 * @enum xmod_bfcmap_port_state_e 486 * @brief bfcmap port state 487 */ 488 typedef enum xmod_bfcmap_port_state_e { 489 XMOD_BFCMAP_PORT_STATE_INIT, /* INITIALIZATION STATE */ 490 XMOD_BFCMAP_PORT_STATE_RESET, /* PORT IN RESETING STATE */ 491 XMOD_BFCMAP_PORT_STATE_ACTIVE, /* PORT IN ACTIVE(LINK UP) STATE */ 492 XMOD_BFCMAP_PORT_STATE_LINKDOWN, /* PORT IN LINK DOWN STATE */ 493 XMOD_BFCMAP_PORT_STATE_DISABLE, /* PORT IN DISABLED STATE */ 494 XMOD_BFCMAP_PORT_STATE_MAX_COUNT 495 } xmod_bfcmap_port_state_td; 496 typedef uint8_t xmod_bfcmap_port_state_t; 497 498 /*! 499 * @enum xmod_bfcmap_8g_fw_on_active_e 500 * @brief bfcmap 8G fw on active 501 */ 502 typedef enum xmod_bfcmap_8g_fw_on_active_e { 503 XMOD_BFCMAP_8G_FW_ON_ACTIVE_ARBFF, /* Use ARBFF as fillword on 8G Active state */ 504 XMOD_BFCMAP_8G_FW_ON_ACTIVE_IDLE /* Use IDLE as fillword on 8G Active state */ 505 } xmod_bfcmap_8g_fw_on_active_td; 506 typedef uint8_t xmod_bfcmap_8g_fw_on_active_t; 507 508 /*! 509 * @enum xmod_bfcmap_encap_mac_address_e 510 * @brief bfcmap enc pack addr 511 */ 512 typedef enum xmod_bfcmap_encap_mac_address_e { 513 XMOD_BFCMAP_ENCAP_FCOE_FPMA, /* FPMA, use prefix and Node 514 ID to construct FCoE MAC Address */ 515 XMOD_BFCMAP_ENCAP_FCOE_ETH_ADDRESS_NULL,/* Null address for FCOE MAC */ 516 XMOD_BFCMAP_ENCAP_FCOE_ETH_ADDRESS_USER /* User Provided Address */ 517 } xmod_bfcmap_encap_mac_address_td; 518 typedef uint8_t xmod_bfcmap_encap_mac_address_t; 519 520 /*! 521 * @enum xmod_bfcmap_map_table_input_e 522 * @brief bfcmap map table input 523 */ 524 typedef enum xmod_bfcmap_map_table_input_e { 525 XMOD_BFCMAP_MAP_TABLE_INPUT_VID, /* Use VID as input for FCMAPPER */ 526 XMOD_BFCMAP_MAP_TABLE_INPUT_VFID /* Use VFID as input for FCMAPPER */ 527 } xmod_bfcmap_map_table_input_td; 528 typedef uint8_t xmod_bfcmap_map_table_input_t; 529 530 /*! 531 * @enum xmod_bfcmap_fc_crc_mode_e 532 * @brief fc crc mode 533 */ 534 typedef enum xmod_bfcmap_fc_crc_mode_e { 535 XMOD_BFCMAP_FC_CRC_MODE_NORMAL, /* normal mode */ 536 XMOD_BFCMAP_FC_CRC_MODE_NO_CRC_CHECK /* no CRC check mode */ 537 } xmod_bfcmap_fc_crc_mode_td; 538 typedef uint8_t xmod_bfcmap_fc_crc_mode_t; 539 540 /*! 541 * @enum xmod_bfcmap_vfthdr_proc_mode_e 542 * @brief bfcmap vfthdr proc mode 543 */ 544 typedef enum xmod_bfcmap_vfthdr_proc_mode_e { 545 XMOD_BFCMAP_VFTHDR_PRESERVE, /* preserve vfthdr */ 546 XMOD_BFCMAP_VFTHDR_INSERT, /* insert vfthdr */ 547 XMOD_BFCMAP_VFTHDR_DELETE /* delete vfthdr */ 548 } xmod_bfcmap_vfthdr_proc_mode_td; 549 typedef uint8_t xmod_bfcmap_vfthdr_proc_mode_t; 550 551 /*! 552 * @enum xmod_bfcmap_vlantag_proc_mode_e 553 * @brief bfcmap vlantag proc mode 554 */ 555 typedef enum xmod_bfcmap_vlantag_proc_mode_e { 556 XMOD_BFCMAP_VLANTAG_PRESERVE, /* preserve vlantag */ 557 XMOD_BFCMAP_VLANTAG_INSERT, /* insert vlantag */ 558 XMOD_BFCMAP_VLANTAG_DELETE /* delete vlantag */ 559 } xmod_bfcmap_vlantag_proc_mode_td; 560 typedef uint8_t xmod_bfcmap_vlantag_proc_mode_t; 561 562 /*! 563 * @enum xmod_bfcmap_vfid_mapsrc_e 564 * @brief bfcmap vfid mapsrc 565 */ 566 typedef enum xmod_bfcmap_vfid_mapsrc_e { 567 XMOD_BFCMAP_VFID_MACSRC_PASSTHRU, /* passthru the vfid */ 568 XMOD_BFCMAP_VFID_MACSRC_PORT_DEFAULT, /* use port default vfid */ 569 XMOD_BFCMAP_VFID_MACSRC_VID, /* use vid if exists*/ 570 XMOD_BFCMAP_VFID_MACSRC_MAPPER, /* use FCMAPER ouput if exists */ 571 XMOD_BFCMAP_VFID_MACSRC_DISABLE /* disable VFID processing */ 572 } xmod_bfcmap_vfid_mapsrc_td; 573 typedef uint8_t xmod_bfcmap_vfid_mapsrc_t; 574 575 /*! 576 * @enum xmod_bfcmap_vid_mapsrc_e 577 * @brief bfcmap vid mapsrc 578 */ 579 typedef enum xmod_bfcmap_vid_mapsrc_e { 580 XMOD_BFCMAP_VID_MACSRC_VFID, /* use vfid if exists*/ 581 XMOD_BFCMAP_VID_MACSRC_PASSTHRU, /* passthru the vid */ 582 XMOD_BFCMAP_VID_MACSRC_PORT_DEFAULT, /* use port default vid */ 583 XMOD_BFCMAP_VID_MACSRC_MAPPER /* use FCMAPER ouput if exists */ 584 } xmod_bfcmap_vid_mapsrc_td; 585 typedef uint8_t xmod_bfcmap_vid_mapsrc_t; 586 587 /*! 588 * @enum xmod_bfcmap_vlan_pri_map_mode_e 589 * @brief bfcmap vlan pri map mode 590 */ 591 typedef enum xmod_bfcmap_vlan_pri_map_mode_e { 592 XMOD_BFCMAP_VLAN_PRI_MAP_MODE_PORT_DEFAULT, /* use port default priority */ 593 XMOD_BFCMAP_VLAN_PRI_MAP_MODE_PASSTHRU /* passthru if exists, else use port default priority */ 594 } xmod_bfcmap_vlan_pri_map_mode_td; 595 typedef uint8_t xmod_bfcmap_vlan_pri_map_mode_t; 596 597 /*! 598 * @enum xmod_bfcmap_hopcnt_check_mode_e 599 * @brief bfcmap hopcnt check mode 600 */ 601 typedef enum xmod_bfcmap_hopcnt_check_mode_e { 602 XMOD_BFCMAP_HOPCNT_CHECK_MODE_NO_CHK, /* no check on hop count at ingress */ 603 XMOD_BFCMAP_HOPCNT_CHECK_MODE_FAIL_DROP, /* discard on hop count == 1 */ 604 XMOD_BFCMAP_HOPCNT_CHECK_MODE_FAIL_EOFNI /* EOFni on hop count == 1 */ 605 } xmod_bfcmap_hopcnt_check_mode_td; 606 typedef uint8_t xmod_bfcmap_hopcnt_check_mode_t; 607 608 /*! 609 * @enum xmod_bfcmap_lf_tr_e 610 * @brief bfcmap lf tr 611 */ 612 typedef enum xmod_bfcmap_lf_tr_e { 613 XMOD_BFCMAP_LF_TR_NONE, 614 XMOD_BFCMAP_LF_TR_PORT_INIT, 615 XMOD_BFCMAP_LF_TR_OPEN_LINK, 616 XMOD_BFCMAP_LF_TR_LINK_FAILURE, 617 XMOD_BFCMAP_LF_TR_OLS_RCVD, 618 XMOD_BFCMAP_LF_TR_NOS_RCVD, 619 XMOD_BFCMAP_LF_TR_SYNC_LOSS, 620 XMOD_BFCMAP_LF_TR_BOUCELINK_FROM_ADMIN, 621 XMOD_BFCMAP_LF_TR_CHGSPEED_FROM_ADMIN, 622 XMOD_BFCMAP_LF_TR_DISABLE_FROM_ADMIN, 623 XMOD_BFCMAP_LF_TR_RESET_FROM_ADMIN, 624 XMOD_BFCMAP_LF_TR_LR_RCVD, 625 XMOD_BFCMAP_LF_TR_LRR_RCVD, 626 XMOD_BFCMAP_LF_TR_ED_TOV 627 } xmod_bfcmap_lf_tr_td; 628 typedef uint8_t xmod_bfcmap_lf_tr_t; 629 630 /*! 631 * @enum xmod_bfcmap_lf_rc_e 632 * @brief bfcmap lf rc 633 */ 634 typedef enum xmod_bfcmap_lf_rc_e { 635 XMOD_BFCMAP_LF_RC_NONE, 636 XMOD_BFCMAP_LF_RC_PORT_INIT, 637 XMOD_BFCMAP_LF_RC_OPEN_LINK, 638 XMOD_BFCMAP_LF_RC_LINK_FAILURE, 639 XMOD_BFCMAP_LF_RC_OLS_RCVD, 640 XMOD_BFCMAP_LF_RC_NOS_RCVD, 641 XMOD_BFCMAP_LF_RC_SYNC_LOSS, 642 XMOD_BFCMAP_LF_RC_BOUCELINK_FROM_ADMIN, 643 XMOD_BFCMAP_LF_RC_CHGSPEED_FROM_ADMIN, 644 XMOD_BFCMAP_LF_RC_DISABLE_FROM_ADMIN, 645 XMOD_BFCMAP_LF_RC_RESET_FAILURE 646 } xmod_bfcmap_lf_rc_td; 647 typedef uint8_t xmod_bfcmap_lf_rc_t; 648 649 /*! 650 * @enum xmod_bfcmap_diag_code_e 651 * @brief bfcmap diag code 652 */ 653 typedef enum xmod_bfcmap_diag_code_e { 654 XMOD_BFCMAP_DIAG_OK, 655 XMOD_BFCMAP_DIAG_PORT_INIT, 656 XMOD_BFCMAP_DIAG_OPEN_LINK, 657 XMOD_BFCMAP_DIAG_LINK_FAILURE, 658 XMOD_BFCMAP_DIAG_OLS_RCVD, 659 XMOD_BFCMAP_DIAG_NOS_RCVD, 660 XMOD_BFCMAP_DIAG_SYNC_LOSS, 661 XMOD_BFCMAP_DIAG_BOUCELINK_FROM_ADMIN, 662 XMOD_BFCMAP_DIAG_CHGSPEED_FROM_ADMIN, 663 XMOD_BFCMAP_DIAG_DISABLE_FROM_ADMIN, 664 XMOD_BFCMAP_DIAG_AN_NO_SIGNAL, 665 XMOD_BFCMAP_DIAG_AN_TIMEOUT, 666 XMOD_BFCMAP_DIAG_PROTO_TIMEOUT 667 } xmod_bfcmap_diag_code_td; 668 typedef uint8_t xmod_bfcmap_diag_code_t; 669 670 /*! 671 * @enum xmod_pe_mode_e 672 * @brief port extender mode types 673 */ 674 typedef enum xmod_pe_mode_e { 675 XMOD_PE_MODE_4_PORTS = 1, 676 XMOD_PE_MODE_2_PORTS = 2 677 } xmod_pe_mode_td; 678 typedef uint8_t xmod_pe_mode_t; 679 680 /*! 681 * @enum xmod_pe_tag_e 682 * @brief port extender tag types 683 */ 684 typedef enum xmod_pe_tag_e { 685 XMOD_PE_TAG_BR = 1, 686 XMOD_PE_TAG_VLAN = 2 687 } xmod_pe_tag_td; 688 typedef uint8_t xmod_pe_tag_t; 689 690 /*! 691 * @enum xmod_port_if_e 692 * @brief port media type 693 */ 694 typedef enum xmod_port_if_e { 695 XMOD_PORT_IF_NOCXN, /* No physical connection */ 696 XMOD_PORT_IF_NULL, /* Pass-through connection without PHY */ 697 XMOD_PORT_IF_MII, 698 XMOD_PORT_IF_GMII, 699 XMOD_PORT_IF_SGMII, 700 XMOD_PORT_IF_TBI, 701 XMOD_PORT_IF_XGMII, 702 XMOD_PORT_IF_RGMII, 703 XMOD_PORT_IF_RvMII, 704 XMOD_PORT_IF_SFI, 705 XMOD_PORT_IF_XFI, 706 XMOD_PORT_IF_KR, 707 XMOD_PORT_IF_KR4, 708 XMOD_PORT_IF_CR, 709 XMOD_PORT_IF_CR4, 710 XMOD_PORT_IF_XLAUI, 711 XMOD_PORT_IF_SR, 712 XMOD_PORT_IF_RXAUI, 713 XMOD_PORT_IF_XAUI, 714 XMOD_PORT_IF_SPAUI, 715 XMOD_PORT_IF_QSGMII, 716 XMOD_PORT_IF_ILKN, 717 XMOD_PORT_IF_RCY, 718 XMOD_PORT_IF_FAT_PIPE, 719 XMOD_PORT_IF_CGMII, 720 XMOD_PORT_IF_CAUI, 721 XMOD_PORT_IF_LR, 722 XMOD_PORT_IF_LR4, 723 XMOD_PORT_IF_SR4, 724 XMOD_PORT_IF_KX, 725 XMOD_PORT_IF_ZR, 726 XMOD_PORT_IF_SR10, 727 XMOD_PORT_IF_OTL, 728 XMOD_PORT_IF_CPU, 729 XMOD_PORT_IF_OLP, 730 XMOD_PORT_IF_OAMP, 731 XMOD_PORT_IF_ERP, 732 XMOD_PORT_IF_TM_INTERNAL_PKT, 733 XMOD_PORT_IF_SR2, 734 XMOD_PORT_IF_KR2, 735 XMOD_PORT_IF_CR2, 736 XMOD_PORT_IF_XFI2, 737 XMOD_PORT_IF_XLAUI2, 738 XMOD_PORT_IF_COUNT /* last, please */ 739 } xmod_port_if_td; 740 typedef uint8_t xmod_port_if_t; 741 742 /*! 743 * @struct xmod_lane_map_s 744 * @brief Core information 745 */ 746 typedef struct xmod_lane_map_s { 747 uint32_t num_of_lanes; /**< Number of elements in lane_map_rx/tx arrays */ 748 uint32_t lane_map_rx[XMOD_MAX_LANES_PER_CORE]; /**< lane_map_rx[x]=y means that rx lane x is mapped to rx lane y */ 749 uint32_t lane_map_tx[XMOD_MAX_LANES_PER_CORE]; /**< lane_map_tx[x]=y means that tx lane x is mapped to tx lane y */ 750 } COMPILER_ATTRIBUTE((packed)) xmod_lane_map_t; 751 752 /*! 753 * @struct xmod_core_init_config_s 754 * @brief Core configuration 755 */ 756 typedef struct xmod_core_init_config_s { 757 uint32_t num_of_lanes; /**< Number of elements in lane_map_rx/tx arrays */ 758 uint32_t lane_map_rx[XMOD_MAX_LANES_PER_CORE]; /**< lane_map_rx[x]=y means that rx lane x is mapped to rx lane y */ 759 uint32_t lane_map_tx[XMOD_MAX_LANES_PER_CORE]; /**< lane_map_tx[x]=y means that tx lane x is mapped to tx lane y */ 760 uint32_t tx_polarity; 761 uint32_t rx_polarity; 762 uint32_t ref_clock; 763 uint8_t core_mode; 764 uint8_t trcvr_host_managed; 765 } COMPILER_ATTRIBUTE((packed)) xmod_core_init_config_t; 766 767 /*! 768 * @struct xmod_port_config_s 769 * @brief Port configuration 770 */ 771 typedef struct xmod_port_config_s { 772 uint32_t speed; 773 uint8_t interface; 774 uint8_t sys_lane_count; 775 uint8_t ln_lane_count; 776 uint8_t an_mode; 777 uint8_t an_cl72; 778 uint8_t fs_cl72; 779 uint8_t fs_cl72_sys; 780 uint8_t an_fec; 781 uint8_t port_is_higig; 782 uint8_t fiber_pref; /* line side */ 783 uint8_t fiber_pref_sys; /* Sys side */ 784 uint8_t port_mode; 785 uint8_t is_bootmaster; 786 uint8_t fs_fec; 787 uint8_t fs_fec_sys; 788 uint8_t is_flex; 789 uint8_t is_strip_crc; 790 uint8_t quad_mode; 791 } COMPILER_ATTRIBUTE((packed)) xmod_port_config_t; 792 793 /*! 794 * @struct phymod_core_info_s 795 * @brief Core information 796 */ 797 typedef struct xmod_core_info_s { 798 xmod_core_version_t core_version; /**< core version */ 799 uint32_t serdes_id; /**< serdes_id */ 800 uint32_t phy_id0; /**< phy_id0 */ 801 uint32_t phy_id1; /**< phy_id1 */ 802 char name[30]; 803 } COMPILER_ATTRIBUTE((packed)) xmod_core_info_t; 804 805 /*! 806 * @struct xmod_core_i2c_s 807 * @brief I2C access 808 */ 809 typedef struct xmod_core_i2c_s { 810 uint8_t dev_addr; 811 uint8_t offset; 812 uint8_t size; 813 } COMPILER_ATTRIBUTE((packed)) xmod_core_i2c_t; 814 815 /*! 816 * @struct xmod_core_firmware_info_s 817 * @brief Firmware information 818 */ 819 typedef struct xmod_core_firmware_info_s { 820 uint32_t fw_version; 821 uint32_t fw_crc; 822 } COMPILER_ATTRIBUTE((packed)) xmod_core_firmware_info_t; 823 824 /*! 825 * @struct xmod_firmware_core_config_s 826 * @brief Firmware core config 827 */ 828 typedef struct xmod_firmware_core_config_s { 829 uint32_t CoreConfigFromPCS; 830 uint32_t VcoRate; /* vco rate */ 831 } COMPILER_ATTRIBUTE((packed)) xmod_firmware_core_config_t; 832 833 /*! 834 * @struct xmod_polarity_s 835 * @brief polarity config 836 */ 837 typedef struct xmod_polarity_s { 838 uint32_t rx_polarity; 839 uint32_t tx_polarity; 840 } COMPILER_ATTRIBUTE((packed)) xmod_polarity_t; 841 842 /*! 843 * @struct xmod_tx_s 844 * @brief TX Parameters 845 */ 846 typedef struct xmod_tx_s { 847 int8_t pre; 848 int8_t main; 849 int8_t post; 850 int8_t post2; 851 int8_t post3; 852 int8_t amp; 853 uint8_t sys_side; 854 } COMPILER_ATTRIBUTE((packed)) xmod_tx_t; 855 856 /*! 857 * @struct xmod_phy_init_config_s 858 * @brief phy init config 859 */ 860 typedef struct xmod_phy_init_config_s { 861 xmod_polarity_t polarity; 862 xmod_tx_t tx[XMOD_MAX_LANES_PER_CORE]; 863 uint32_t cl72_en; 864 uint32_t an_en; 865 } COMPILER_ATTRIBUTE((packed)) xmod_phy_init_config_t; 866 867 /*! 868 * @struct xmod_value_override_s 869 * @brief The value_override structure is used for values which can be auto-set (enable=0) or override (enable=1 + value) 870 */ 871 typedef struct xmod_value_override_s { 872 uint32_t enable; 873 int32_t value; 874 } COMPILER_ATTRIBUTE((packed)) xmod_value_override_t; 875 876 /*! 877 * @struct xmod_tx_override_s 878 * @brief TX parameters which can be auto-set or override 879 */ 880 typedef struct xmod_tx_override_s { 881 xmod_value_override_t phase_interpolator; 882 } COMPILER_ATTRIBUTE((packed)) xmod_tx_override_t; 883 884 /*! 885 * @struct xmod_rx_s 886 * @brief RX Parameters 887 */ 888 typedef struct xmod_rx_s { 889 xmod_value_override_t vga; 890 uint32_t num_of_dfe_taps; /* number of elements in DFE array */ 891 xmod_value_override_t dfe[XMOD_NUM_DFE_TAPS]; 892 xmod_value_override_t peaking_filter; 893 xmod_value_override_t low_freq_peaking_filter; 894 uint32_t rx_adaptation_on; 895 uint8_t sys_side; 896 } COMPILER_ATTRIBUTE((packed)) xmod_rx_t; 897 898 /*! 899 * @struct xmod_phy_reset_s 900 * @brief Direction (In,Out,inOut) for RX/TX to reset 901 */ 902 typedef struct xmod_phy_reset_s { 903 xmod_reset_direction_t rx; 904 xmod_reset_direction_t tx; 905 } COMPILER_ATTRIBUTE((packed)) xmod_phy_reset_t; 906 907 /*! 908 * @struct xmod_phy_power_s 909 * @brief Power operation (On,Off,Off and On) for RX/TX 910 */ 911 typedef struct xmod_phy_power_s { 912 xmod_power_t rx; 913 xmod_power_t tx; 914 } COMPILER_ATTRIBUTE((packed)) xmod_phy_power_t; 915 916 /*! 917 * @struct xmod_phy_inf_config_s 918 * @brief Direction (In,Out,inOut) for RX/TX to reset 919 */ 920 typedef struct xmod_phy_inf_config_s { 921 xmod_interface_t interface_type; 922 uint32_t data_rate; 923 uint32_t interface_modes; 924 xmod_ref_clk_t ref_clock; /* Core reference clock. */ 925 uint16_t pll_divider_req; /* Core pll divider request. */ 926 void* device_aux_modes; /* Device auxiliary modes. */ 927 } COMPILER_ATTRIBUTE((packed)) xmod_phy_inf_config_t; 928 929 /*! 930 * @struct xmod_cl72_status_s 931 * @brief cl72 status 932 */ 933 typedef struct xmod_cl72_status_s { 934 uint32_t enabled; 935 uint32_t locked; 936 } COMPILER_ATTRIBUTE((packed)) xmod_cl72_status_t; 937 938 /*! 939 * @struct xmod_autoneg_ability_s 940 * @brief autoneg ability 941 */ 942 typedef struct xmod_autoneg_ability_s { 943 uint32_t an_cap; 944 uint32_t cl73bam_cap; 945 uint32_t cl37bam_cap; 946 uint32_t an_fec; 947 uint32_t an_cl72; 948 uint32_t an_hg2; 949 uint32_t capabilities; 950 xmod_cl37_sgmii_speed_t sgmii_speed; 951 } COMPILER_ATTRIBUTE((packed)) xmod_autoneg_ability_t; 952 953 /*! 954 * @struct xmod_autoneg_control_s 955 * @brief autoneg control 956 */ 957 typedef struct xmod_autoneg_control_s { 958 xmod_an_mode_type_t an_mode; 959 uint32_t num_lane_adv; /* The number of lanes the autoneg advert */ 960 uint32_t flags; /* see AN_F */ 961 uint32_t enable; 962 uint8_t an_done; 963 } COMPILER_ATTRIBUTE((packed)) xmod_autoneg_control_t; 964 965 /*! 966 * @struct xmod_autoneg_status_s 967 * @brief autoneg status 968 */ 969 typedef struct xmod_autoneg_status_s { 970 uint32_t enabled; 971 uint32_t locked; 972 uint32_t data_rate; 973 xmod_interface_t interface; 974 } COMPILER_ATTRIBUTE((packed)) xmod_autoneg_status_t; 975 976 /*! 977 * @struct xmod_pcs_userspeed_config_s 978 * @brief userspeed config 979 */ 980 typedef struct xmod_pcs_userspeed_config_s { 981 xmod_pcs_userspeed_mode_t mode; 982 xmod_pcs_userspeed_param_t param; 983 uint32_t value; 984 uint16_t current_entry; 985 } COMPILER_ATTRIBUTE((packed)) xmod_pcs_userspeed_config_t; 986 987 /*! 988 * @struct xmod_port_enable_control_s 989 * @brief port enable/disable 990 */ 991 typedef struct xmod_port_enable_control_s { 992 uint32_t enable; 993 } COMPILER_ATTRIBUTE((packed)) xmod_port_enable_control_t; 994 995 typedef struct xmod_firmware_lane_config_s { 996 uint32_t LaneConfigFromPCS; 997 uint32_t AnEnabled; /**< Autoneg */ 998 uint32_t DfeOn; /**< Enable DFE */ 999 uint32_t ForceBrDfe; /**< Force Baud rate DFE */ 1000 uint32_t LpDfeOn; /**< Enable low power DFE */ 1001 phymod_firmware_media_type_t MediaType; /**< Media Type */ 1002 uint32_t UnreliableLos; /**< For optical use */ 1003 uint32_t ScramblingDisable; /**< disable scrambling */ 1004 uint32_t Cl72AutoPolEn; /**< Forced CL72 */ 1005 uint32_t Cl72RestTO; /**< Forced CL72 */ 1006 uint32_t ForceExtenedReach; /**< Forced extened reach mode */ 1007 uint32_t ForceNormalReach; /**< Forced normal reach mode */ 1008 uint32_t LpPrecoderEnabled; /**< linker partner has pre-coder on */ 1009 uint32_t ForcePAM4Mode; /**< Force PAM4 mode */ 1010 uint32_t ForceNRZMode; /**< Forced CL72 */ 1011 uint32_t SystemSide; /**< System side port */ 1012 } COMPILER_ATTRIBUTE((packed)) xmod_firmware_lane_config_t; 1013 1014 1015 typedef uint8_t xmod_bmac_addr_t[6]; 1016 1017 typedef struct xmod_debug_ether_s { 1018 uint8_t link_state_ln_side; 1019 uint32_t link_speed_ln_side; 1020 uint8_t link_state_sys_side; 1021 uint32_t link_speed_sys_side; 1022 uint8_t link_cl72_sys_side; 1023 uint8_t link_cl72_ln_side; 1024 uint8_t link_fec_sys_side; 1025 uint8_t link_fec_ln_side; 1026 }COMPILER_ATTRIBUTE((packed)) xmod_debug_ether_t; 1027 1028 /*! 1029 * @struct xmod_cos_to_pri_t 1030 * @brief Cos to Vlan priority mapping information 1031 */ 1032 typedef struct xmod_bfcmap_cos_to_pri_s { 1033 uint16_t cos; /* ingress */ 1034 uint16_t pri; /* FCoE vlan Priority */ 1035 } COMPILER_ATTRIBUTE((packed)) xmod_bfcmap_cos_to_pri_t; 1036 1037 /*! 1038 * @struct xmod_bfcmap_port_config_s 1039 * @brief bfcmap port configuration 1040 */ 1041 typedef struct xmod_bfcmap_port_config_s { 1042 uint32_t action_mask; /* XMOD_FCMAP_ATTR_xxx. */ 1043 uint32_t action_mask2; /* XMOD_FCMAP_ATTR2_xxx. */ 1044 xmod_bfcmap_port_mode_t port_mode; /* FC port Mode, FCoE mode */ 1045 xmod_bfcmap_port_speed_t speed; /* Speed, 2/4/8/16G */ 1046 uint32_t tx_buffer_to_buffer_credits; /* Transit B2B credits */ 1047 uint32_t rx_buffer_to_buffer_credits; /* Receive B2B Credits (read only), computed based on max_frame_length */ 1048 uint32_t max_frame_length; /* maximum FC frame length for ingress and egress (in unit of 32-bit word) */ 1049 uint32_t bb_sc_n; /* bb credit recovery parameter */ 1050 xmod_bfcmap_port_state_t port_state; /* Port state, INIT, Reset, Link Up, Link down (read only) */ 1051 uint32_t r_t_tov; /* Receive, transmit Timeout, default 100ms */ 1052 uint32_t interrupt_enable; /* Interrupt enable */ 1053 xmod_bfcmap_8g_fw_on_active_t fw_on_active_8g; /* fillword on 8G active state */ 1054 1055 /* The following three fields should be valid when XMOD_FCMAP_ATTR_SRC_MAC_CONSTRUCT_MASK is set */ 1056 xmod_bfcmap_encap_mac_address_t src_mac_construct; /* Encap Source MAC construct mode */ 1057 xmod_bmac_addr_t src_mac_addr; /* Src MAC Addr for encapsulated frame */ 1058 uint32_t src_fcmap_prefix; /* Source FCMAP prefix for the FPMA */ 1059 1060 /* The following three fields should be valid when XMOD_FCMAP_ATTR_DST_MAC_CONSTRUCT_MASK is set */ 1061 xmod_bfcmap_encap_mac_address_t dst_mac_construct; /* Encap Dest MAC construct mode */ 1062 xmod_bmac_addr_t dst_mac_addr; /* Dest MAC Addr for encapsulated frame */ 1063 uint32_t dst_fcmap_prefix; /* Destination FCMAP prefix for the FPMA */ 1064 1065 /* FC Mapper Configuration */ 1066 uint32_t vlan_tag; /* default vlan for the mapper */ 1067 uint32_t vft_tag; /* default VFT tag for the mapper */ 1068 uint32_t mapper_len; /* Size of VLAN-VSAN Mapper table (read only) */ 1069 uint32_t ingress_mapper_bypass; /* Bypass Mapper */ 1070 uint32_t egress_mapper_bypass; /* Bypass Mapper */ 1071 xmod_bfcmap_map_table_input_t ingress_map_table_input; /* VID or VFID */ 1072 xmod_bfcmap_map_table_input_t egress_map_table_input; /* VID or VFID */ 1073 xmod_bfcmap_fc_crc_mode_t ingress_fc_crc_mode; /* Mapper FC-CRC handling */ 1074 xmod_bfcmap_fc_crc_mode_t egress_fc_crc_mode; /* Mapper FC-CRC handling */ 1075 xmod_bfcmap_vfthdr_proc_mode_t ingress_vfthdr_proc_mode; /* VFT header processing mode */ 1076 xmod_bfcmap_vfthdr_proc_mode_t egress_vfthdr_proc_mode; /* VFT header processing mode */ 1077 xmod_bfcmap_vlantag_proc_mode_t ingress_vlantag_proc_mode; /* VLAN header processing mode */ 1078 xmod_bfcmap_vlantag_proc_mode_t egress_vlantag_proc_mode; /* VLAN header processing mode */ 1079 xmod_bfcmap_vfid_mapsrc_t ingress_vfid_mapsrc; /* source of VFID */ 1080 xmod_bfcmap_vfid_mapsrc_t egress_vfid_mapsrc; /* source of VFID */ 1081 xmod_bfcmap_vid_mapsrc_t ingress_vid_mapsrc; /* source of VID */ 1082 xmod_bfcmap_vid_mapsrc_t egress_vid_mapsrc; /* source of VID */ 1083 xmod_bfcmap_vlan_pri_map_mode_t ingress_vlan_pri_map_mode; /* processing mode for priority field of vlan tag */ 1084 xmod_bfcmap_vlan_pri_map_mode_t egress_vlan_pri_map_mode; /* processing mode for priority field of vlan tag */ 1085 xmod_bfcmap_hopcnt_check_mode_t ingress_hopCnt_check_mode; /* mode of VFT hopCnt check on ingress */ 1086 uint32_t egress_hopCnt_dec_enable; /* enable VFT hopCnt decrement on egress */ 1087 1088 uint32_t use_tts_pcs_16G; /* during 16G speed negotiation, 0 -- Use TTS, 1 -- Use PCS */ 1089 uint32_t use_tts_pcs_32G; /* during 32G speed negotiation, 0 -- Use TTS, 1 -- Use PCS */ 1090 uint32_t training_enable_16G; /* enable/disable link training for 16G */ 1091 uint32_t training_enable_32G; /* enable/disable link training for 32G */ 1092 uint32_t fec_enable_16G; /* enable/disable FEC for 16G */ 1093 uint32_t fec_enable_32G; /* enable/disable FEC for 32G */ 1094 1095 /* Config Parameters for FC Mapper */ 1096 uint32_t ingress_fcs_crrpt_eof_enable; /* Enable FCS corruption on if FCoE pkt has EOFni or EOFa on ingress */ 1097 uint32_t ingress_vlantag_presence_enable; /* VLAN header insert enable */ 1098 xmod_bfcmap_hopcnt_check_mode_t egress_hopcnt_check_mode; /* mode of VFT hopCnt check on egress */ 1099 uint32_t ingress_hopcnt_dec_enable; /* enable VFT hopCnt decrement on ingress */ 1100 uint32_t egress_pass_ctrl_frame_enable; /* enable passing control frame on egress when mapper is in bypass mode */ 1101 uint32_t egress_pass_pfc_frame_enable; /* enable passing pfc frame on egress when mapper is in bypass mode */ 1102 uint32_t egress_pass_pause_frame_enable; /* enable passing pause frame on egress when mapper is in bypass mode */ 1103 uint32_t egress_fcoe_version_chk_disable; /* disable FCOE header version field check on egress */ 1104 uint32_t egress_default_cos_value; /* specify default CoS value to use on egress */ 1105 uint32_t egress_use_ip_cos_map; /* use IP CoS map values on egress */ 1106 uint32_t scrambling_enable_mask; /* bitmap to enable/disable scrambling for 2/4/8/16/32G FC speed */ 1107 uint32_t scrambling_enable_value; /* 0 - disable, 1 - enable: bitmap value for corresponding speed */ 1108 uint32_t egress_pause_enable; /* 0 - disable, 1 - enable; legacy pause on egress */ 1109 uint32_t egress_pfc_enable; /* 0 - disable, 1 - enable; PFC on egress */ 1110 uint32_t stat_interval; /* stats collection interval in milliseconds */ 1111 uint32_t trcm_attribs; /* Tranceiver module configured attributes */ 1112 xmod_bfcmap_cos_to_pri_t cos_to_pri; /* Specifies the vlan priority the cos maps to. */ 1113 1114 } COMPILER_ATTRIBUTE((packed)) xmod_bfcmap_port_config_t; 1115 1116 #define XMOD_BFCMAP_ATTR_PORT_MODE_MASK (0x1 << 0) 1117 #define XMOD_BFCMAP_ATTR_SPEED_MASK (0x1 << 1) 1118 #define XMOD_BFCMAP_ATTR_TX_BB_CREDITS_MASK (0x1 << 2) 1119 #define XMOD_BFCMAP_ATTR_RX_BB_CREDITS_MASK (0x1 << 3) 1120 #define XMOD_BFCMAP_ATTR_MAX_FRAME_LENGTH_MASK (0x1 << 4) 1121 #define XMOD_BFCMAP_ATTR_BB_SC_N_MASK (0x1 << 5) 1122 #define XMOD_BFCMAP_ATTR_PORT_STATE_MASK (0x1 << 6) 1123 #define XMOD_BFCMAP_ATTR_R_T_TOV_MASK (0x1 << 7) 1124 #define XMOD_BFCMAP_ATTR_INTERRUPT_ENABLE_MASK (0x1 << 8) 1125 #define XMOD_BFCMAP_ATTR_FW_ON_ACTIVE_8G_MASK (0x1 << 9) 1126 #define XMOD_BFCMAP_ATTR_SRC_MAC_CONSTRUCT_MASK (0x1 << 10) 1127 #define XMOD_BFCMAP_ATTR_DST_MAC_CONSTRUCT_MASK (0x1 << 11) 1128 #define XMOD_BFCMAP_ATTR_VLAN_TAG_MASK (0x1 << 12) 1129 #define XMOD_BFCMAP_ATTR_VFT_TAG_MASK (0x1 << 13) 1130 #define XMOD_BFCMAP_ATTR_MAPPER_LEN_MASK (0x1 << 14) 1131 #define XMOD_BFCMAP_ATTR_INGRESS_MAPPER_BYPASS_MASK (0x1 << 15) 1132 #define XMOD_BFCMAP_ATTR_EGRESS_MAPPER_BYPASS_MASK (0x1 << 16) 1133 #define XMOD_BFCMAP_ATTR_INGRESS_MAP_TABLE_INPUT_MASK (0x1 << 17) 1134 #define XMOD_BFCMAP_ATTR_EGRESS_MAP_TABLE_INPUT_MASK (0x1 << 18) 1135 #define XMOD_BFCMAP_ATTR_INGRESS_FC_CRC_MODE_MASK (0x1 << 19) 1136 #define XMOD_BFCMAP_ATTR_EGRESS_FC_CRC_MODE_MASK (0x1 << 20) 1137 #define XMOD_BFCMAP_ATTR_INGRESS_VFTHDR_PROC_MODE_MASK (0x1 << 21) 1138 #define XMOD_BFCMAP_ATTR_EGRESS_VFTHDR_PROC_MODE_MASK (0x1 << 22) 1139 #define XMOD_BFCMAP_ATTR_INGRESS_VLANTAG_PROC_MODE_MASK (0x1 << 23) 1140 #define XMOD_BFCMAP_ATTR_EGRESS_VLANTAG_PROC_MODE_MASK (0x1 << 24) 1141 #define XMOD_BFCMAP_ATTR_INGRESS_VFID_MAPSRC_MASK (0x1 << 25) 1142 #define XMOD_BFCMAP_ATTR_EGRESS_VFID_MAPSRC_MASK (0x1 << 26) 1143 #define XMOD_BFCMAP_ATTR_INGRESS_VID_MAPSRC_MASK (0x1 << 27) 1144 #define XMOD_BFCMAP_ATTR_EGRESS_VID_MAPSRC_MASK (0x1 << 28) 1145 #define XMOD_BFCMAP_ATTR_INGRESS_VLAN_PRI_MAP_MODE_MASK (0x1 << 29) 1146 #define XMOD_BFCMAP_ATTR_EGRESS_VLAN_PRI_MAP_MODE_MASK (0x1 << 30) 1147 #define XMOD_BFCMAP_ATTR_INGRESS_HOPCNT_CHECK_MODE_MASK (0x1 << 31) 1148 #define XMOD_BFCMAP_ATTR2_EGRESS_HOPCNT_DEC_ENABLE_MASK (0x1 << 0) 1149 #define XMOD_BFCMAP_ATTR2_USE_TTS_PCS_16G_MASK (0x1 << 1) 1150 #define XMOD_BFCMAP_ATTR2_USE_TTS_PCS_32G_MASK (0x1 << 2) 1151 #define XMOD_BFCMAP_ATTR2_TRAINING_ENABLE_16G_MASK (0x1 << 3) 1152 #define XMOD_BFCMAP_ATTR2_TRAINING_ENABLE_32G_MASK (0x1 << 4) 1153 #define XMOD_BFCMAP_ATTR2_FEC_ENABLE_16G_MASK (0x1 << 5) 1154 #define XMOD_BFCMAP_ATTR2_FEC_ENABLE_32G_MASK (0x1 << 6) 1155 #define XMOD_BFCMAP_ATTR2_INGRESS_FCS_CRRPT_EOF_ENABLE_MASK (0x1 << 7) 1156 #define XMOD_BFCMAP_ATTR2_INGRESS_VLANTAG_PRESENCE_ENABLE_MASK (0x1 << 8) 1157 #define XMOD_BFCMAP_ATTR2_EGRESS_HOPCNT_CHECK_MODE_MASK (0x1 << 9) 1158 #define XMOD_BFCMAP_ATTR2_EGRESS_PASS_CTRL_FRAME_ENABLE_MASK (0x1 << 10) 1159 #define XMOD_BFCMAP_ATTR2_EGRESS_PASS_PFC_FRAME_ENABLE_MASK (0x1 << 11) 1160 #define XMOD_BFCMAP_ATTR2_EGRESS_PASS_PAUSE_FRAME_ENABLE_MASK (0x1 << 12) 1161 #define XMOD_BFCMAP_ATTR2_EGRESS_FCOE_VER_CHK_DISABLE_MASK (0x1 << 13) 1162 #define XMOD_BFCMAP_ATTR2_EGRESS_DEFAULT_COS_VALUE_MASK (0x1 << 14) 1163 #define XMOD_BFCMAP_ATTR2_EGRESS_USE_IP_COS_MAP_MASK (0x1 << 15) 1164 #define XMOD_BFCMAP_ATTR2_INGRESS_HOPCNT_DEC_ENABLE_MASK (0x1 << 16) 1165 #define XMOD_BFCMAP_ATTR2_SCRAMBLING_ENABLE_MASK (0x1 << 17) 1166 #define XMOD_BFCMAP_ATTR2_EGRESS_PAUSE_ENABLE_MASK (0x1 << 18) 1167 #define XMOD_BFCMAP_ATTR2_EGRESS_PFC_ENABLE_MASK (0x1 << 19) 1168 #define XMOD_BFCMAP_ATTR2_STAT_INTERVAL_MASK (0x1 << 20) 1169 #define XMOD_BFCMAP_ATTR2_TRCM_ATTRIBS_MASK (0x1 << 21) 1170 #define XMOD_BFCMAP_ATTR2_COS_TO_PRI_MASK (0x1 << 22) 1171 1172 #define XMOD_BFCMAP_ATTR_ALL_MASK 0xFFFFFFFF 1173 #define XMOD_BFCMAP_ATTR2_ALL_MASK 0xFFFFFFFF 1174 1175 typedef uint32_t xmod_bfcmap_pa_speed_t; 1176 1177 /*! 1178 * @struct xmod_bfcmap_port_ability_t 1179 * @brief bfcmap port ability bitmap 1180 */ 1181 typedef struct xmod_bfcmap_port_ability_s { 1182 xmod_bfcmap_pa_speed_t port_ability_speed; 1183 } xmod_bfcmap_port_ability_t; 1184 1185 #define XMOD_BFCMAP_PORT_ABILITY_SPEED_AN (0x1 << 0) 1186 #define XMOD_BFCMAP_PORT_ABILITY_SPEED_2GBPS (0x1 << 1) 1187 #define XMOD_BFCMAP_PORT_ABILITY_SPEED_4GBPS (0x1 << 2) 1188 #define XMOD_BFCMAP_PORT_ABILITY_SPEED_8GBPS (0x1 << 3) 1189 #define XMOD_BFCMAP_PORT_ABILITY_SPEED_16GBPS (0x1 << 4) 1190 #define XMOD_BFCMAP_PORT_ABILITY_SPEED_32GBPS (0x1 << 5) 1191 1192 #define XMOD_FCMAP_PORT_SCRAMBLING_SPEED_2GBPS (0x1 << 0) 1193 #define XMOD_FCMAP_PORT_SCRAMBLING_SPEED_4GBPS (0x1 << 1) 1194 #define XMOD_FCMAP_PORT_SCRAMBLING_SPEED_8GBPS (0x1 << 2) 1195 #define XMOD_FCMAP_PORT_SCRAMBLING_SPEED_16GBPS (0x1 << 3) 1196 #define XMOD_FCMAP_PORT_SCRAMBLING_SPEED_32GBPS (0x1 << 4) 1197 1198 #define XMOD_FCMAP_PORT_MODULE_NO_FW_I2C (0x1 << 0) 1199 #define XMOD_FCMAP_PORT_MODULE_IS_COPPER (0x1 << 1) 1200 #define XMOD_FCMAP_PORT_MODULE_SPEED_CAP32G (0x1 << 2) 1201 #define XMOD_FCMAP_PORT_MODULE_SPEED_CAP16G (0x1 << 3) 1202 #define XMOD_FCMAP_PORT_MODULE_SPEED_CAP8G (0x1 << 4) 1203 #define XMOD_FCMAP_PORT_MODULE_SPEED_CAP4G (0x1 << 5) 1204 #define XMOD_FCMAP_PORT_MODULE_FEC_CAP32G (0x1 << 6) 1205 #define XMOD_FCMAP_PORT_MODULE_FEC_CAP16G (0x1 << 7) 1206 #define XMOD_FCMAP_PORT_MODULE_IS_QSFP (0x1 << 8) 1207 #define XMOD_FCMAP_PORT_MODULE_SUPP_RS (0x1 << 9) 1208 #define XMOD_FCMAP_PORT_MODULE_RS_HRD_RX_CUTOFF (0x3 << 10) 1209 #define XMOD_FCMAP_PORT_MODULE_RS_HRD_TX_CUTOFF (0x3 << 12) 1210 1211 #define XMOD_USE_IP_COS_SHIFT 16 1212 #define XMOD_USE_IP_COS_CMD 0x1 1213 1214 /*! 1215 * @struct xmod_bfcmap_vlan_vsan_map_t 1216 * @brief bfcmap vlan to vsan mapping 1217 */ 1218 typedef struct xmod_bfcmap_vlan_vsan_map_s { 1219 uint16_t vlan_vid; 1220 uint16_t vsan_vfid; 1221 } xmod_bfcmap_vlan_vsan_map_t; 1222 1223 /*! 1224 * @struct xmod_an_status_s 1225 * @brief Autoneg result 1226 */ 1227 typedef struct xmod_an_status_s { 1228 uint32_t hcd_speed; /**< negotiated speed */ 1229 uint8_t result; /**< Autoneg result. */ 1230 } COMPILER_ATTRIBUTE((packed)) xmod_an_status_t; 1231 1232 typedef struct xmod_an_try_enable_control_s { 1233 xmod_an_mode_type_t an_mode; 1234 uint32_t num_lane_adv; /* The number of lanes the autoneg advert */ 1235 uint32_t flags; /* see AN_F */ 1236 uint32_t enable; 1237 uint32_t speed; 1238 } COMPILER_ATTRIBUTE((packed)) xmod_an_try_enable_control_t; 1239 1240 /*! 1241 * @struct xmod_pe_config_s 1242 * @brief PE initial configuration information 1243 */ 1244 typedef struct xmod_pe_config_s { 1245 xmod_pe_mode_t mode; 1246 xmod_pe_tag_t tag; 1247 uint8_t pfc; 1248 uint8_t res; 1249 uint16_t pcid[4]; 1250 } COMPILER_ATTRIBUTE((packed)) xmod_pe_config_t; 1251 1252 /*! 1253 * @struct xmod_pe_port_status_s 1254 * @brief PE port status information 1255 */ 1256 typedef struct xmod_pe_port_status_s { 1257 uint8_t res; /* reserved */ 1258 uint8_t link_up; /* link_up */ 1259 } COMPILER_ATTRIBUTE((packed)) xmod_pe_port_status_t; 1260 1261 /*! 1262 * @struct xmod_pe_status_s 1263 * @brief PE port status information 1264 */ 1265 typedef struct xmod_pe_status_s { 1266 xmod_pe_port_status_t up_port; /* up stream port */ 1267 xmod_pe_port_status_t pe_port0; /* port 0 extender */ 1268 xmod_pe_port_status_t pe_port1; /* port 1 extender */ 1269 xmod_pe_port_status_t pe_port2; /* port 2 extender */ 1270 xmod_pe_port_status_t pe_port3; /* port 3 extender */ 1271 xmod_port_if_t up_port_mod; /* up stream port module type */ 1272 } COMPILER_ATTRIBUTE((packed)) xmod_pe_status_t; 1273 1274 /*! 1275 * @struct xmod_pe_port_stats_s 1276 * @brief PE port statistics information 1277 */ 1278 typedef struct xmod_pe_port_stats_s { 1279 uint32_t port_dn_cnt; /* port down counter */ 1280 1281 uint64_t rpkt; /* Receive frame/packet Counter */ 1282 uint64_t rbyt; /* Receive Byte Counter */ 1283 uint64_t tpkt; /* Transmit Packet/Frame Counter */ 1284 uint64_t tbyt; /* Transmit Byte Counter */ 1285 1286 uint64_t rfcs; /* Receive FCS Error Frame Counter */ 1287 uint64_t rfrg; /* Receive Fragment Counter */ 1288 uint64_t rjbr; /* Receive Jabber Frame Counter */ 1289 uint64_t rovr; /* Receive Oversized Frame Counter */ 1290 uint64_t rrpkt; /* Receive RUNT Frame Counter */ 1291 uint64_t raln; /* Receive Alignment Error Frame Counter */ 1292 uint64_t rerpkt; /* Receive Code Error Frame Counter */ 1293 uint64_t rmtue; /* Receive MTU Check Error Frame Counter */ 1294 uint64_t rprm; /* Receive Promiscuous Frame Counter */ 1295 uint64_t rschcrc; /* Receive SCH CRC Error */ 1296 uint64_t rtrfu; /* Receive Truncated Frame Counter (due to RX FIFO full) */ 1297 uint64_t rfcr; /* Receive False Carrier Counter */ 1298 uint64_t rxpf; /* Receive PAUSE Frame Counter */ 1299 uint64_t rflr; /* Receive Length Out of Range Frame Counter */ 1300 1301 uint64_t tfcs; /* Transmit FCS Error Counter */ 1302 uint64_t tfrg; /* Transmit Fragment Counter */ 1303 uint64_t tjbr; /* Transmit Jabber Counter */ 1304 uint64_t tncl; /* Transmit Total Collision Counter */ 1305 uint64_t tovr; /* Transmit Oversize Packet Counter */ 1306 uint64_t trpkt; /* Transmit RUNT Frame Counter */ 1307 uint64_t txpf; /* Transmit Pause Control Frame Counter */ 1308 1309 } COMPILER_ATTRIBUTE((packed)) xmod_pe_port_stats_t; 1310 1311 /*! 1312 * @struct xmod_pe_pcid_s 1313 * @brief PE port E-channel ID information 1314 */ 1315 typedef struct xmod_pe_pcid_s { 1316 uint16_t pcid0; /* port 0 extender channel id */ 1317 uint16_t pcid1; /* port 1 extender channel id */ 1318 uint16_t pcid2; /* port 2 extender channel id */ 1319 uint16_t pcid3; /* port 3 extender channel id */ 1320 } COMPILER_ATTRIBUTE((packed)) xmod_pe_pcid_t; 1321 1322 /*! 1323 * @struct xmod_pe_fw_ver_s 1324 * @brief FW ver information 1325 */ 1326 typedef struct xmod_pe_fw_ver_s { 1327 uint16_t major; /* major version */ 1328 uint16_t minor; /* minor version */ 1329 uint16_t build; /* build version */ 1330 } COMPILER_ATTRIBUTE((packed)) xmod_pe_fw_ver_t; 1331 1332 /*! 1333 * @struct xmod_cl72_t 1334 * @brief CL72 training information 1335 */ 1336 typedef struct xmod_cl72_s { 1337 uint8_t enable; /* enable or disable */ 1338 uint8_t sys_side; /* system side or line side */ 1339 } COMPILER_ATTRIBUTE((packed)) xmod_cl72_t; 1340 1341 /*! 1342 * @struct xmod_fec_t 1343 * @brief FEC training information 1344 */ 1345 typedef struct xmod_fec_s { 1346 uint8_t enable; /* enable or disable */ 1347 uint8_t sys_side; /* system side or line side */ 1348 } COMPILER_ATTRIBUTE((packed)) xmod_fec_t; 1349 1350 /*! 1351 * @struct xmod_flow_ctrl_t 1352 * @brief Flow control information 1353 */ 1354 typedef struct xmod_flow_ctrl_s { 1355 uint8_t ingress; /* ingress or egress */ 1356 uint8_t mode; /* Flow Control modes */ 1357 } COMPILER_ATTRIBUTE((packed)) xmod_flow_ctrl_t; 1358 1359 /* XMOD_CORE_CMDS & LENGTHS */ 1360 /* XMOD_CORE_IDENTIFY */ 1361 extern int xmod_core_identify(OUT uint8_t is_identified); 1362 #define XMOD_CORE_IDENTIFY_IN_LEN (0) 1363 #define XMOD_CORE_IDENTIFY_OUT_LEN (sizeof(uint8_t)) 1364 /* XMOD_CORE_INFO_GET */ 1365 extern int xmod_core_info_get(OUT xmod_core_info_t info); 1366 #define XMOD_CORE_INFO_GET_IN_LEN (0) 1367 #define XMOD_CORE_INFO_GET_OUT_LEN (sizeof(xmod_core_info_t)) 1368 /* XMOD_CORE_LANE_MAP_GET */ 1369 extern int xmod_core_lane_map_get(OUT xmod_lane_map_t lane_map); 1370 #define XMOD_CORE_LANE_MAP_GET_IN_LEN (0) 1371 #define XMOD_CORE_LANE_MAP_GET_OUT_LEN (sizeof(xmod_lane_map_t)) 1372 /* XMOD_CORE_LANE_MAP_SET */ 1373 extern int xmod_core_lane_map_set(IN xmod_lane_map_t lane_map); 1374 #define XMOD_CORE_LANE_MAP_SET_IN_LEN (sizeof(xmod_lane_map_t)) 1375 #define XMOD_CORE_LANE_MAP_SET_OUT_LEN (0) 1376 /* XMOD_CORE_RESET_GET */ 1377 extern int xmod_core_reset_get(IN xmod_reset_mode_t reset_mode, OUT xmod_reset_direction_t direction); 1378 #define XMOD_CORE_RESET_GET_IN_LEN (sizeof(xmod_reset_mode_t)) 1379 #define XMOD_CORE_RESET_GET_OUT_LEN (sizeof(xmod_reset_direction_t)) 1380 /* XMOD_CORE_RESET_SET */ 1381 extern int xmod_core_reset_set(IN xmod_reset_mode_t reset_mode, IN xmod_reset_direction_t direction); 1382 #define XMOD_CORE_RESET_SET_IN_LEN (sizeof(xmod_reset_mode_t) + sizeof(xmod_reset_direction_t)) 1383 #define XMOD_CORE_RESET_SET_OUT_LEN (0) 1384 /* XMOD_CORE_FIRMWARE_INFO_GET */ 1385 extern int xmod_core_firmware_info_get(OUT xmod_core_firmware_info_t fw_info); 1386 #define XMOD_CORE_FIRMWARE_INFO_GET_IN_LEN (0) 1387 #define XMOD_CORE_FIRMWARE_INFO_GET_OUT_LEN (sizeof(xmod_core_firmware_info_t)) 1388 /* XMOD_PHY_FIRMWARE_CORE_CONFIG_GET */ 1389 extern int xmod_phy_firmware_core_config_get(OUT xmod_firmware_core_config_t fw_core_config); 1390 #define XMOD_PHY_FIRMWARE_CORE_CONFIG_GET_IN_LEN (0) 1391 #define XMOD_PHY_FIRMWARE_CORE_CONFIG_GET_OUT_LEN (sizeof(xmod_firmware_core_config_t)) 1392 /* XMOD_PHY_FIRMWARE_CORE_CONFIG_SET */ 1393 extern int xmod_phy_firmware_core_config_set(IN xmod_firmware_core_config_t fw_core_config); 1394 #define XMOD_PHY_FIRMWARE_CORE_CONFIG_SET_IN_LEN (sizeof(xmod_firmware_core_config_t)) 1395 #define XMOD_PHY_FIRMWARE_CORE_CONFIG_SET_OUT_LEN (0) 1396 /* XMOD_CORE_INIT */ 1397 extern int xmod_core_init(IN xmod_core_init_config_t init_config); 1398 #define XMOD_CORE_INIT_IN_LEN (sizeof(xmod_core_init_config_t)) 1399 #define XMOD_CORE_INIT_OUT_LEN (0) 1400 /* XMOD_CORE_PLL_SEQUENCER_RESTART */ 1401 extern int xmod_core_pll_sequencer_restart(IN xmod_sequencer_operation_t operation); 1402 #define XMOD_CORE_PLL_SEQUENCER_RESTART_IN_LEN (sizeof(xmod_sequencer_operation_t)) 1403 #define XMOD_CORE_PLL_SEQUENCER_RESTART_OUT_LEN (0) 1404 /* XMOD_CORE_WAIT_EVENT */ 1405 extern int xmod_core_wait_event(IN xmod_core_event_t event, IN uint32_t timeout); 1406 #define XMOD_CORE_WAIT_EVENT_IN_LEN (sizeof(xmod_core_event_t) + sizeof(uint32_t)) 1407 #define XMOD_CORE_WAIT_EVENT_OUT_LEN (0) 1408 /* XMOD_DEV_REG_GET */ 1409 extern int xmod_dev_reg_get(IN uint32_t reg_addr, OUT uint32_t val); 1410 #define XMOD_DEV_REG_GET_IN_LEN (sizeof(uint32_t)) 1411 #define XMOD_DEV_REG_GET_OUT_LEN (sizeof(uint32_t)) 1412 /* XMOD_DEV_REG_SET */ 1413 extern int xmod_dev_reg_set(IN uint32_t reg_addr, IN uint32_t val); 1414 #define XMOD_DEV_REG_SET_IN_LEN (sizeof(uint32_t) + sizeof(uint32_t)) 1415 #define XMOD_DEV_REG_SET_OUT_LEN (0) 1416 /* XMOD_DEV_DEBUG_BUF_GET */ 1417 extern int xmod_dev_debug_buf_get(IN uint32_t buf_size, OUT uint8_t buf); 1418 #define XMOD_DEV_DEBUG_BUF_GET_IN_LEN (sizeof(uint32_t)) 1419 #define XMOD_DEV_DEBUG_BUF_GET_OUT_LEN (XMOD_BUFFER_MAX_LEN) 1420 /* XMOD_CMD_ACKNOWLEDGE */ 1421 #define XMOD_CMD_ACKNOWLEDGE_IN_LEN (0) 1422 #define XMOD_CMD_ACKNOWLEDGE_OUT_LEN (0) 1423 /* XMOD_CMD_ABORT */ 1424 #define XMOD_CMD_ABORT_IN_LEN (0) 1425 #define XMOD_CMD_ABORT_OUT_LEN (0) 1426 /* XMOD_DEV_DEBUG_CMD */ 1427 extern int xmod_dev_debug_cmd(IN uint32_t cmd, OUT uint32_t response); 1428 #define XMOD_DEV_DEBUG_CMD_IN_LEN (XMOD_BUFFER_MAX_LEN) 1429 #define XMOD_DEV_DEBUG_CMD_OUT_LEN (XMOD_BUFFER_MAX_LEN) 1430 /* XMOD_DEV_CTR_INTERVAL_SET */ 1431 extern int xmod_dev_ctr_interval_set(IN uint32_t int_ms); 1432 #define XMOD_DEV_CTR_INTERVAL_SET_IN_LEN (sizeof(uint32_t)) 1433 #define XMOD_DEV_CTR_INTERVAL_SET_OUT_LEN (0) 1434 #define XMOD_DEV_DEBUG_ETHER_CMD_IN_LEN (0) 1435 #define XMOD_DEV_DEBUG_ETHER_CMD_OUT_LEN (sizeof(xmod_debug_ether_t)) 1436 /* XMOD_DEV_I2C_GET */ 1437 #define XMOD_DEV_I2C_GET_IN_LEN (sizeof(xmod_core_i2c_t)) 1438 #define I2C_GET_OUT_DATA_WORDS 4 1439 #define XMOD_DEV_I2C_GET_OUT_LEN (sizeof(uint32_t) + sizeof(uint32_t) * I2C_GET_OUT_DATA_WORDS) 1440 /* XMOD_DEV_I2C_SET */ 1441 #define XMOD_DEV_I2C_SET_IN_LEN (sizeof(xmod_core_i2c_t) + sizeof(uint32_t)) 1442 #define XMOD_DEV_I2C_SET_OUT_LEN (sizeof(uint32_t)) 1443 1444 /* XMOD_ETHERNET_CMDS & LENGTHS */ 1445 /* XMOD_PHY_FIRMWARE_LANE_CONFIG_GET */ 1446 extern int xmod_phy_firmware_lane_config_get(OUT xmod_firmware_lane_config_t fw_lane_config); 1447 #define XMOD_PHY_FIRMWARE_LANE_CONFIG_GET_IN_LEN (0) 1448 #define XMOD_PHY_FIRMWARE_LANE_CONFIG_GET_OUT_LEN (sizeof(xmod_firmware_lane_config_t)) 1449 /* XMOD_PHY_FIRMWARE_LANE_CONFIG_SET */ 1450 extern int xmod_phy_firmware_lane_config_set(IN xmod_firmware_lane_config_t fw_lane_config); 1451 #define XMOD_PHY_FIRMWARE_LANE_CONFIG_SET_IN_LEN (sizeof(xmod_firmware_lane_config_t)) 1452 #define XMOD_PHY_FIRMWARE_LANE_CONFIG_SET_OUT_LEN (0) 1453 /* XMOD_PHY_INIT */ 1454 extern int xmod_phy_init(IN xmod_phy_init_config_t init_config); 1455 #define XMOD_PHY_INIT_IN_LEN (sizeof(xmod_phy_init_config_t)) 1456 #define XMOD_PHY_INIT_OUT_LEN (0) 1457 /* XMOD_PHY_RX_RESTART */ 1458 extern int xmod_phy_rx_restart(void); 1459 #define XMOD_PHY_RX_RESTART_IN_LEN (0) 1460 #define XMOD_PHY_RX_RESTART_OUT_LEN (0) 1461 /* XMOD_PHY_POLARITY_GET */ 1462 extern int xmod_phy_polarity_get(OUT xmod_polarity_t polarity); 1463 #define XMOD_PHY_POLARITY_GET_IN_LEN (0) 1464 #define XMOD_PHY_POLARITY_GET_OUT_LEN (sizeof(xmod_polarity_t)) 1465 /* XMOD_PHY_POLARITY_SET */ 1466 extern int xmod_phy_polarity_set(IN xmod_polarity_t polarity); 1467 #define XMOD_PHY_POLARITY_SET_IN_LEN (sizeof(xmod_polarity_t)) 1468 #define XMOD_PHY_POLARITY_SET_OUT_LEN (0) 1469 /* XMOD_PHY_TX_GET */ 1470 extern int xmod_phy_tx_get(IN xmod_tx_t txi, OUT xmod_tx_t txo); 1471 #define XMOD_PHY_TX_GET_IN_LEN (sizeof(xmod_tx_t)) 1472 #define XMOD_PHY_TX_GET_OUT_LEN (sizeof(xmod_tx_t)) 1473 /* XMOD_PHY_TX_SET */ 1474 extern int xmod_phy_tx_set(IN xmod_tx_t tx); 1475 #define XMOD_PHY_TX_SET_IN_LEN (sizeof(xmod_tx_t)) 1476 #define XMOD_PHY_TX_SET_OUT_LEN (0) 1477 /* XMOD_PHY_MEDIA_TYPE_TX_GET */ 1478 extern int xmod_phy_media_type_tx_get(IN xmod_media_typed_t media, OUT xmod_tx_t tx); 1479 #define XMOD_PHY_MEDIA_TYPE_TX_GET_IN_LEN (sizeof(xmod_media_typed_t)) 1480 #define XMOD_PHY_MEDIA_TYPE_TX_GET_OUT_LEN (sizeof(xmod_tx_t)) 1481 /* XMOD_PHY_TX_OVERRIDE_GET */ 1482 extern int xmod_phy_tx_override_get(OUT xmod_tx_override_t tx_override); 1483 #define XMOD_PHY_TX_OVERRIDE_GET_IN_LEN (0) 1484 #define XMOD_PHY_TX_OVERRIDE_GET_OUT_LEN (sizeof(xmod_tx_override_t)) 1485 /* XMOD_PHY_TX_OVERRIDE_SET */ 1486 extern int xmod_phy_tx_override_set(IN xmod_tx_override_t tx_override); 1487 #define XMOD_PHY_TX_OVERRIDE_SET_IN_LEN (sizeof(xmod_tx_override_t)) 1488 #define XMOD_PHY_TX_OVERRIDE_SET_OUT_LEN (0) 1489 /* XMOD_PHY_RX_GET */ 1490 extern int xmod_phy_rx_get(IN xmod_rx_t rxi, OUT xmod_rx_t rxo); 1491 #define XMOD_PHY_RX_GET_IN_LEN (sizeof(xmod_rx_t)) 1492 #define XMOD_PHY_RX_GET_OUT_LEN (sizeof(xmod_rx_t)) 1493 /* XMOD_PHY_RX_SET */ 1494 extern int xmod_phy_rx_set(IN xmod_rx_t rx); 1495 #define XMOD_PHY_RX_SET_IN_LEN (sizeof(xmod_rx_t)) 1496 #define XMOD_PHY_RX_SET_OUT_LEN (0) 1497 /* XMOD_PHY_RESET_GET */ 1498 extern int xmod_phy_reset_get(OUT xmod_phy_reset_t reset); 1499 #define XMOD_PHY_RESET_GET_IN_LEN (0) 1500 #define XMOD_PHY_RESET_GET_OUT_LEN (sizeof(xmod_phy_reset_t)) 1501 /* XMOD_PHY_RESET_SET */ 1502 extern int xmod_phy_reset_set(IN xmod_phy_reset_t reset); 1503 #define XMOD_PHY_RESET_SET_IN_LEN (sizeof(xmod_phy_reset_t)) 1504 #define XMOD_PHY_RESET_SET_OUT_LEN (0) 1505 /* XMOD_PHY_POWER_GET */ 1506 extern int xmod_phy_power_get(OUT xmod_phy_power_t power); 1507 #define XMOD_PHY_POWER_GET_IN_LEN (0) 1508 #define XMOD_PHY_POWER_GET_OUT_LEN (sizeof(xmod_phy_power_t)) 1509 /* XMOD_PHY_POWER_SET */ 1510 extern int xmod_phy_power_set(IN xmod_phy_power_t power); 1511 #define XMOD_PHY_POWER_SET_IN_LEN (sizeof(xmod_phy_power_t)) 1512 #define XMOD_PHY_POWER_SET_OUT_LEN (0) 1513 /* XMOD_PHY_TX_LANE_CONTROL_GET */ 1514 extern int xmod_phy_tx_lane_control_get(OUT uint8_t enable); 1515 #define XMOD_PHY_TX_LANE_CONTROL_GET_IN_LEN (0) 1516 #define XMOD_PHY_TX_LANE_CONTROL_GET_OUT_LEN (sizeof(uint8_t)) 1517 /* XMOD_PHY_TX_LANE_CONTROL_SET */ 1518 extern int xmod_phy_tx_lane_control_set(IN uint8_t enable); 1519 #define XMOD_PHY_TX_LANE_CONTROL_SET_IN_LEN (sizeof(uint8_t)) 1520 #define XMOD_PHY_TX_LANE_CONTROL_SET_OUT_LEN (0) 1521 /* XMOD_PHY_RX_LANE_CONTROL_GET */ 1522 extern int xmod_phy_rx_lane_control_get(OUT uint8_t enable); 1523 #define XMOD_PHY_RX_LANE_CONTROL_GET_IN_LEN (0) 1524 #define XMOD_PHY_RX_LANE_CONTROL_GET_OUT_LEN (sizeof(uint8_t)) 1525 /* XMOD_PHY_RX_LANE_CONTROL_SET */ 1526 extern int xmod_phy_rx_lane_control_set(IN uint8_t enable); 1527 #define XMOD_PHY_RX_LANE_CONTROL_SET_IN_LEN (sizeof(uint8_t)) 1528 #define XMOD_PHY_RX_LANE_CONTROL_SET_OUT_LEN (0) 1529 /* XMOD_PHY_FEC_ENABLE_GET */ 1530 extern int xmod_phy_fec_enable_get(OUT uint32_t enable); 1531 #define XMOD_PHY_FEC_ENABLE_GET_IN_LEN (sizeof(uint32_t)) 1532 #define XMOD_PHY_FEC_ENABLE_GET_OUT_LEN (sizeof(uint32_t)) 1533 /* XMOD_PHY_FEC_ENABLE_SET */ 1534 extern int xmod_phy_fec_enable_set(IN uint32_t enable); 1535 #define XMOD_PHY_FEC_ENABLE_SET_IN_LEN (sizeof(xmod_fec_t)) 1536 #define XMOD_PHY_FEC_ENABLE_SET_OUT_LEN (0) 1537 /* XMOD_PHY_INTERFACE_CONFIG_GET */ 1538 extern int xmod_phy_interface_config_get(IN uint8_t flags, OUT xmod_phy_inf_config_t config); 1539 #define XMOD_PHY_INTERFACE_CONFIG_GET_IN_LEN (sizeof(uint8_t)) 1540 #define XMOD_PHY_INTERFACE_CONFIG_GET_OUT_LEN (sizeof(xmod_phy_inf_config_t)) 1541 /* XMOD_PHY_INTERFACE_CONFIG_SET */ 1542 extern int xmod_phy_interface_config_set(IN uint8_t flags, IN xmod_phy_inf_config_t config); 1543 #define XMOD_PHY_INTERFACE_CONFIG_SET_IN_LEN (sizeof(uint8_t) + sizeof(xmod_phy_inf_config_t)) 1544 #define XMOD_PHY_INTERFACE_CONFIG_SET_OUT_LEN (0) 1545 /* XMOD_PHY_CL72_GET */ 1546 extern int xmod_phy_cl72_get(OUT uint32_t cl72_en); 1547 #define XMOD_PHY_CL72_GET_IN_LEN (sizeof(uint32_t)) 1548 #define XMOD_PHY_CL72_GET_OUT_LEN (sizeof(uint32_t)) 1549 /* XMOD_PHY_CL72_SET */ 1550 extern int xmod_phy_cl72_set(IN uint32_t cl72_en); 1551 #define XMOD_PHY_CL72_SET_IN_LEN (sizeof(xmod_cl72_t)) 1552 #define XMOD_PHY_CL72_SET_OUT_LEN (0) 1553 /* XMOD_PHY_CL72_STATUS_GET */ 1554 extern int xmod_phy_cl72_status_get(OUT xmod_cl72_status_t status); 1555 #define XMOD_PHY_CL72_STATUS_GET_IN_LEN (sizeof(uint32_t)) 1556 #define XMOD_PHY_CL72_STATUS_GET_OUT_LEN (sizeof(xmod_cl72_status_t)) 1557 /* XMOD_PHY_AUTONEG_ABILITY_GET */ 1558 extern int xmod_phy_autoneg_ability_get(OUT xmod_autoneg_ability_t an_ability_get_type); 1559 #define XMOD_PHY_AUTONEG_ABILITY_GET_IN_LEN (0) 1560 #define XMOD_PHY_AUTONEG_ABILITY_GET_OUT_LEN (sizeof(xmod_autoneg_ability_t)) 1561 /* XMOD_PHY_AUTONEG_ABILITY_SET */ 1562 extern int xmod_phy_autoneg_ability_set(IN xmod_autoneg_ability_t an_ability_set_type); 1563 #define XMOD_PHY_AUTONEG_ABILITY_SET_IN_LEN (sizeof(xmod_autoneg_ability_t)) 1564 #define XMOD_PHY_AUTONEG_ABILITY_SET_OUT_LEN (0) 1565 /* XMOD_PHY_AUTONEG_REMOTE_ABILITY_GET */ 1566 extern int xmod_phy_autoneg_remote_ability_get(OUT xmod_autoneg_ability_t an_ability_get_type); 1567 #define XMOD_PHY_AUTONEG_REMOTE_ABILITY_GET_IN_LEN (0) 1568 #define XMOD_PHY_AUTONEG_REMOTE_ABILITY_GET_OUT_LEN (sizeof(xmod_autoneg_ability_t)) 1569 /* XMOD_PHY_AUTONEG_GET */ 1570 extern int xmod_phy_autoneg_get(OUT xmod_autoneg_control_t an, OUT uint8_t an_done); 1571 #define XMOD_PHY_AUTONEG_GET_IN_LEN (0) 1572 #define XMOD_PHY_AUTONEG_GET_OUT_LEN (sizeof(xmod_autoneg_control_t) + sizeof(uint8_t)) 1573 /* XMOD_PHY_AUTONEG_SET */ 1574 extern int xmod_phy_autoneg_set(IN xmod_autoneg_control_t an); 1575 #define XMOD_PHY_AUTONEG_SET_IN_LEN (sizeof(xmod_autoneg_control_t)) 1576 #define XMOD_PHY_AUTONEG_SET_OUT_LEN (0) 1577 /* XMOD_PHY_AUTONEG_STATUS_GET */ 1578 extern int xmod_phy_autoneg_status_get(OUT xmod_autoneg_status_t status); 1579 #define XMOD_PHY_AUTONEG_STATUS_GET_IN_LEN (0) 1580 #define XMOD_PHY_AUTONEG_STATUS_GET_OUT_LEN (sizeof(xmod_autoneg_status_t)) 1581 /* XMOD_PHY_LOOPBACK_GET */ 1582 extern int xmod_phy_loopback_get(IN xmod_loopback_mode_t loopback_type, OUT uint8_t enable); 1583 #define XMOD_PHY_LOOPBACK_GET_IN_LEN (sizeof(xmod_loopback_mode_t)) 1584 #define XMOD_PHY_LOOPBACK_GET_OUT_LEN (sizeof(uint8_t)) 1585 /* XMOD_PHY_LOOPBACK_SET */ 1586 extern int xmod_phy_loopback_set(IN xmod_loopback_mode_t loopback_type, IN uint8_t enable); 1587 #define XMOD_PHY_LOOPBACK_SET_IN_LEN (sizeof(xmod_loopback_mode_t) + sizeof(uint8_t)) 1588 #define XMOD_PHY_LOOPBACK_SET_OUT_LEN (0) 1589 /* XMOD_PHY_RX_PMD_LOCKED_GET */ 1590 extern int xmod_phy_rx_pmd_locked_get(OUT uint8_t rx_pmd_locked); 1591 #define XMOD_PHY_RX_PMD_LOCKED_GET_IN_LEN (0) 1592 #define XMOD_PHY_RX_PMD_LOCKED_GET_OUT_LEN (sizeof(uint8_t)) 1593 /* XMOD_PHY_LINK_STATUS_GET */ 1594 extern int xmod_phy_link_status_get(OUT uint8_t link_status); 1595 #define XMOD_PHY_LINK_STATUS_GET_IN_LEN (0) 1596 #define XMOD_PHY_LINK_STATUS_GET_OUT_LEN (sizeof(uint8_t)) 1597 /* XMOD_PHY_STATUS_DUMP */ 1598 extern int xmod_phy_status_dump(void); 1599 #define XMOD_PHY_STATUS_DUMP_IN_LEN (0) 1600 #define XMOD_PHY_STATUS_DUMP_OUT_LEN (0) 1601 /* XMOD_PHY_PCS_USERSPEED_GET */ 1602 extern int xmod_phy_pcs_userspeed_get(OUT xmod_pcs_userspeed_config_t config); 1603 #define XMOD_PHY_PCS_USERSPEED_GET_IN_LEN (0) 1604 #define XMOD_PHY_PCS_USERSPEED_GET_OUT_LEN (sizeof(xmod_pcs_userspeed_config_t)) 1605 /* XMOD_PHY_PCS_USERSPEED_SET */ 1606 extern int xmod_phy_pcs_userspeed_set(IN xmod_pcs_userspeed_config_t config); 1607 #define XMOD_PHY_PCS_USERSPEED_SET_IN_LEN (sizeof(xmod_pcs_userspeed_config_t)) 1608 #define XMOD_PHY_PCS_USERSPEED_SET_OUT_LEN (0) 1609 /* XMOD_PORT_INIT */ 1610 extern int xmod_port_init(IN xmod_port_config_t port_config); 1611 #define XMOD_PORT_INIT_IN_LEN (sizeof(xmod_port_config_t)) 1612 #define XMOD_PORT_INIT_OUT_LEN (0) 1613 /* XMOD_PHY_AN_TRY_ENABLE */ 1614 extern int xmod_phy_an_try_enable(IN xmod_an_try_enable_control_t an_config, OUT xmod_an_status_t an_status); 1615 #define XMOD_PHY_AN_TRY_ENABLE_IN_LEN (sizeof(xmod_an_try_enable_control_t)) 1616 #define XMOD_PHY_AN_TRY_ENABLE_OUT_LEN (sizeof(xmod_an_status_t)) 1617 /* XMOD_PE_INIT */ 1618 extern int xmod_pe_init(IN xmod_pe_config_t config); 1619 #define XMOD_PE_INIT_IN_LEN (sizeof(xmod_pe_config_t)) 1620 #define XMOD_PE_INIT_OUT_LEN (0) 1621 /* XMOD_PE_STATUS_GET */ 1622 extern int xmod_pe_status_get(OUT xmod_pe_status_t status); 1623 #define XMOD_PE_STATUS_GET_IN_LEN (0) 1624 #define XMOD_PE_STATUS_GET_OUT_LEN (sizeof(xmod_pe_status_t)) 1625 /* XMOD_PE_PORT_STATS_GET */ 1626 extern int xmod_pe_port_stats_get(IN uint8_t port, OUT xmod_pe_port_stats_t stats, IN uint8_t reset); 1627 #define XMOD_PE_PORT_STATS_GET_IN_LEN (sizeof(uint8_t)+sizeof(uint8_t)) 1628 #define XMOD_PE_PORT_STATS_GET_OUT_LEN (sizeof(xmod_pe_port_stats_t)) 1629 /* XMOD_PE_PCID_SET */ 1630 extern int xmod_pe_pcid_set(IN xmod_pe_pcid_t pcid); 1631 #define XMOD_PE_PCID_SET_IN_LEN (sizeof(xmod_pe_pcid_t)) 1632 #define XMOD_PE_PCID_SET_OUT_LEN (0) 1633 /* XMOD_PE_FW_VER_GET */ 1634 extern int xmod_pe_fw_ver_get(OUT xmod_pe_fw_ver_t fw_ver); 1635 #define XMOD_PE_FW_VER_GET_IN_LEN (0) 1636 #define XMOD_PE_FW_VER_GET_OUT_LEN (sizeof(xmod_pe_fw_ver_t)) 1637 extern int xmod_port_enable_set(IN xmod_port_enable_control_t); 1638 #define XMOD_PORT_ENABLE_SET_OUT_LEN (0) 1639 #define XMOD_PORT_ENABLE_SET_IN_LEN (sizeof(xmod_port_enable_control_t)) 1640 extern int xmod_port_enable_get(OUT xmod_port_enable_control_t); 1641 #define XMOD_PORT_ENABLE_GET_OUT_LEN (sizeof(xmod_port_enable_control_t)) 1642 #define XMOD_PORT_ENABLE_GET_IN_LEN (0) 1643 extern int xmod_port_forced_speed_line_side_set(IN uint32_t enable); 1644 #define XMOD_PHY_FORCED_SPEED_LINE_SIDE_SET_OUT_LEN (0) 1645 #define XMOD_PHY_FORCED_SPEED_LINE_SIDE_SET_IN_LEN (sizeof(uint32_t)) 1646 extern int xmod_port_forced_speed_line_side_get(IN uint32_t enable); 1647 #define XMOD_PHY_FORCED_SPEED_LINE_SIDE_GET_OUT_LEN (sizeof(uint32_t)) 1648 #define XMOD_PHY_FORCED_SPEED_LINE_SIDE_GET_IN_LEN (0) 1649 #define XMOD_PHY_FLOW_CONTROL_MODE_SET_OUT_LEN (0) 1650 #define XMOD_PHY_FLOW_CONTROL_MODE_SET_IN_LEN (sizeof(xmod_flow_ctrl_t)) 1651 #define XMOD_PHY_FLOW_CONTROL_MODE_GET_OUT_LEN (sizeof(uint32_t)) 1652 #define XMOD_PHY_FLOW_CONTROL_MODE_GET_IN_LEN (sizeof(uint32_t)) 1653 #define XMOD_PHY_PSM_COS_BMP_SET_OUT_LEN (0) 1654 #define XMOD_PHY_PSM_COS_BMP_SET_IN_LEN (sizeof(uint32_t)) 1655 #define XMOD_PHY_PSM_COS_BMP_GET_OUT_LEN (sizeof(uint32_t)) 1656 #define XMOD_PHY_PSM_COS_BMP_GET_IN_LEN (0) 1657 extern int xmod_port_autoneg_line_side_set(IN uint32_t enable); 1658 #define XMOD_PHY_AUTONEG_LINE_SIDE_SET_OUT_LEN (0) 1659 #define XMOD_PHY_AUTONEG_LINE_SIDE_SET_IN_LEN (sizeof(uint32_t)) 1660 extern int xmod_port_autoneg_line_side_get(IN uint32_t enable); 1661 #define XMOD_PHY_AUTONEG_LINE_SIDE_GET_OUT_LEN (sizeof(uint32_t)) 1662 #define XMOD_PHY_AUTONEG_LINE_SIDE_GET_IN_LEN (0) 1663 #define XMOD_PHY_RESET_INTF_OUT_LEN (0) 1664 #define XMOD_PHY_RESET_INTF_IN_LEN (0) 1665 #define XMOD_PHY_FW_LANE_CFG_GET_OUT_LEN (sizeof(xmod_firmware_lane_config_t)) 1666 #define XMOD_PHY_FW_LANE_CFG_GET_IN_LEN (sizeof(uint32_t)) 1667 #define XMOD_PHY_FW_LANE_CFG_SET_OUT_LEN (0) 1668 #define XMOD_PHY_FW_LANE_CFG_SET_IN_LEN (sizeof(xmod_firmware_lane_config_t)) 1669 1670 /* XMOD_FC_CMDS & LENGTHS */ 1671 /* XMOD_BFCMAP_PORT_CONFIG_GET */ 1672 extern int xmod_bfcmap_port_config_get(OUT xmod_bfcmap_port_config_t port_conf); 1673 #define XMOD_BFCMAP_PORT_CONFIG_GET_IN_LEN (sizeof(uint32_t) + sizeof(uint32_t) + sizeof(uint32_t) + sizeof(uint32_t)) 1674 #define XMOD_BFCMAP_PORT_CONFIG_GET_OUT_LEN (sizeof(xmod_bfcmap_port_config_t)) 1675 /* XMOD_BFCMAP_PORT_CONFIG_SET */ 1676 extern int xmod_bfcmap_port_config_set(IN xmod_bfcmap_port_config_t port_conf); 1677 #define XMOD_BFCMAP_PORT_CONFIG_SET_IN_LEN (sizeof(xmod_bfcmap_port_config_t)) 1678 #define XMOD_BFCMAP_PORT_CONFIG_SET_OUT_LEN (0) 1679 /* XMOD_BFCMAP_PORT_CMD_SET */ 1680 extern int xmod_bfcmap_port_cmd_set(IN xmod_bfcmap_port_cmd_t cmd); 1681 #define XMOD_BFCMAP_PORT_CMD_SET_IN_LEN (sizeof(xmod_bfcmap_port_cmd_t)) 1682 #define XMOD_BFCMAP_PORT_CMD_SET_OUT_LEN (0) 1683 /* XMOD_BFCMAP_PORT_SPEED_SET */ 1684 extern int xmod_bfcmap_port_speed_set(IN xmod_bfcmap_port_speed_t port_speed); 1685 #define XMOD_BFCMAP_PORT_SPEED_SET_IN_LEN (sizeof(xmod_bfcmap_port_speed_t)) 1686 #define XMOD_BFCMAP_PORT_SPEED_SET_OUT_LEN (0) 1687 /* XMOD_BFCMAP_PORT_LINK_FAULT_TRIGGER_RC_GET */ 1688 extern int xmod_bfcmap_port_link_fault_trigger_rc_get(OUT xmod_bfcmap_lf_tr_t lf_trigger, OUT xmod_bfcmap_lf_rc_t lf_rc); 1689 #define XMOD_BFCMAP_PORT_LINK_FAULT_TRIGGER_RC_GET_IN_LEN (0) 1690 #define XMOD_BFCMAP_PORT_LINK_FAULT_TRIGGER_RC_GET_OUT_LEN (sizeof(xmod_bfcmap_lf_tr_t) + sizeof(xmod_bfcmap_lf_rc_t)) 1691 /* XMOD_BFCMAP_PORT_DIAG_GET */ 1692 extern int xmod_bfcmap_port_diag_get(OUT xmod_bfcmap_diag_code_t diag_code); 1693 #define XMOD_BFCMAP_PORT_DIAG_GET_IN_LEN (0) 1694 #define XMOD_BFCMAP_PORT_DIAG_GET_OUT_LEN (sizeof(xmod_bfcmap_diag_code_t)) 1695 /* XMOD_BFCMAP_PORT_ABIL_GET */ 1696 extern int xmod_bfcmap_port_abil_get(OUT xmod_bfcmap_port_ability_t abil_mask); 1697 #define XMOD_BFCMAP_PORT_ABIL_GET_IN_LEN (0) 1698 #define XMOD_BFCMAP_PORT_ABIL_GET_OUT_LEN (sizeof(xmod_bfcmap_port_ability_t)) 1699 /* XMOD_BFCMAP_PORT_ABIL_SET */ 1700 extern int xmod_bfcmap_port_abil_set(IN xmod_bfcmap_port_ability_t abil_mask); 1701 #define XMOD_BFCMAP_PORT_ABIL_SET_IN_LEN (sizeof(xmod_bfcmap_port_ability_t)) 1702 #define XMOD_BFCMAP_PORT_ABIL_SET_OUT_LEN (0) 1703 /* XMOD_BFCMAP_VLAN_MAP_GET */ 1704 extern int xmod_bfcmap_vlan_map_get(OUT xmod_bfcmap_vlan_vsan_map_t vlan); 1705 #define XMOD_BFCMAP_VLAN_MAP_GET_IN_LEN (sizeof(xmod_bfcmap_vlan_vsan_map_t)) 1706 #define XMOD_BFCMAP_VLAN_MAP_GET_OUT_LEN (sizeof(xmod_bfcmap_vlan_vsan_map_t)) 1707 /* XMOD_BFCMAP_VLAN_MAP_ADD */ 1708 extern int xmod_bfcmap_vlan_map_add(IN xmod_bfcmap_vlan_vsan_map_t vlan); 1709 #define XMOD_BFCMAP_VLAN_MAP_ADD_IN_LEN (sizeof(xmod_bfcmap_vlan_vsan_map_t)) 1710 #define XMOD_BFCMAP_VLAN_MAP_ADD_OUT_LEN (0) 1711 /* XMOD_BFCMAP_VLAN_MAP_DELETE */ 1712 extern int xmod_bfcmap_vlan_map_delete(IN xmod_bfcmap_vlan_vsan_map_t vlan); 1713 #define XMOD_BFCMAP_VLAN_MAP_DELETE_IN_LEN (sizeof(xmod_bfcmap_vlan_vsan_map_t)) 1714 #define XMOD_BFCMAP_VLAN_MAP_DELETE_OUT_LEN (0) 1715 /* XMOD_BFCMAP_PORT_INIT */ 1716 extern int xmod_bfcmap_port_init(IN xmod_port_config_t port_cfg); 1717 #define XMOD_BFCMAP_PORT_INIT_IN_LEN (sizeof(xmod_port_config_t)) 1718 #define XMOD_BFCMAP_PORT_INIT_OUT_LEN (0) 1719 1720 typedef struct xmod_api_length_s 1721 { 1722 int in_len; 1723 int out_len; 1724 } xmod_api_length_t; 1725 1726 extern const xmod_api_length_t xmod_core_cmds_arg_len_tbl[]; 1727 #define GET_XMOD_CORE_CMD_IN_LEN(idx) (xmod_core_cmds_arg_len_tbl[idx].in_len) 1728 #define GET_XMOD_CORE_CMD_OUT_LEN(idx) (xmod_core_cmds_arg_len_tbl[idx].out_len) 1729 1730 extern const xmod_api_length_t xmod_ethernet_cmds_arg_len_tbl[]; 1731 #define GET_XMOD_ETHERNET_CMD_IN_LEN(idx) (xmod_ethernet_cmds_arg_len_tbl[idx].in_len) 1732 #define GET_XMOD_ETHERNET_CMD_OUT_LEN(idx) (xmod_ethernet_cmds_arg_len_tbl[idx].out_len) 1733 1734 extern const xmod_api_length_t xmod_fc_cmds_arg_len_tbl[]; 1735 #define GET_XMOD_FC_CMD_IN_LEN(idx) (xmod_fc_cmds_arg_len_tbl[idx].in_len) 1736 #define GET_XMOD_FC_CMD_OUT_LEN(idx) (xmod_fc_cmds_arg_len_tbl[idx].out_len) 1737 1738 #define GET_XMOD_BUF_WORD_LEN(len) ((len+3)>>2) 1739 1740 1741 /************************************************************************* 1742 * fw_stat is the alternate to xmod to speed up things..where some operations 1743 * are done by the FW periodically and stored in a fixed buffer, which the 1744 * SDK can read via AXI access. 1745 * Note : This is Word offset. Max 63 (256 bytes per core) 1746 */ 1747 #define FWSTAT_PHY_AUTONEG_GET_OFFSET 0 1748 #define FWSTAT_PHY_INTERFACE_CONFIG_GET_OFFSET 4 1749 1750 /* xmod desc */ 1751 typedef struct _xmod_buf_desc { 1752 const phymod_access_t *pa; 1753 int mode_opcode; 1754 uint32_t *xmodtxbuff; 1755 int xmodtxlen; 1756 uint32_t *xmodrxbuff; 1757 int xmodrxlen; 1758 } xmod_buf_desc; 1759 1760 #endif /* __PHY8806X_XMOD_API_H__ */