merlin16_cfg_seq.h (4781B)
1 /*---------------------------------------------------------------------- 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * 7 * Broadcom Corporation 8 * Proprietary and Confidential information 9 * All rights reserved 10 * This source file is the property of Broadcom Corporation, and 11 * may not be copied or distributed in any isomorphic form without the 12 * prior written consent of Broadcom Corporation. 13 *--------------------------------------------------------------------- 14 * File : merlin16_cfg_seq.h 15 * Description: c functions implementing Tier1s for TEMod Serdes Driver 16 *---------------------------------------------------------------------*/ 17 /* 18 * $Copyright: (c) 2014 Broadcom Corporation All Rights Reserved.$ 19 * 20 */ 21 22 23 #ifndef MERLIN16_CFG_SEQ_H 24 #define MERLIN16_CFG_SEQ_H 25 26 #include "common/srds_api_err_code.h" 27 #include "merlin16_enum.h" 28 29 typedef struct { 30 int8_t pll_pwrdn; 31 int8_t tx_s_pwrdn; 32 int8_t rx_s_pwrdn; 33 } power_status_t; 34 35 typedef struct { 36 int8_t revid_model; 37 int8_t revid_process; 38 int8_t revid_bonding; 39 int8_t revid_rev_number; 40 int8_t revid_rev_letter; 41 } merlin16_rev_id0_t; 42 43 typedef struct { 44 int8_t revid_eee; 45 int8_t revid_llp; 46 int8_t revid_pir; 47 int8_t revid_cl72; 48 int8_t revid_micro; 49 int8_t revid_mdio; 50 int8_t revid_multiplicity; 51 } merlin16_rev_id1_t; 52 53 54 err_code_t merlin16_uc_active_set(const phymod_access_t *pa, uint32_t enable); /* set microcontroller active or not */ 55 err_code_t merlin16_uc_active_get(const phymod_access_t *pa, uint32_t *enable); /* get microcontroller active or not */ 56 err_code_t merlin16_pmd_ln_h_rstb_pkill_override( const phymod_access_t *pa, uint16_t val); 57 err_code_t merlin16_core_soft_reset_release(const phymod_access_t *pa, uint32_t enable); /* release the pmd core soft reset */ 58 err_code_t merlin16_lane_soft_reset_release(const phymod_access_t *pa, uint32_t enable); /* release the pmd lane soft reset */ 59 err_code_t merlin16_pmd_tx_disable_pin_dis_set(const phymod_access_t *pa, uint32_t enable); 60 err_code_t merlin16_pmd_loopback_set(const phymod_access_t *pa, uint32_t enable); 61 err_code_t merlin16_pmd_loopback_get(const phymod_access_t *pa, uint32_t *enable); 62 err_code_t merlin16_rmt_lpbk_get(const phymod_access_t *pa, uint32_t *lpbk); 63 err_code_t merlin16_osr_mode_get(const phymod_access_t *pa, int *osr_mode); 64 int merlin16_osr_mode_to_enum(int osr_mode, phymod_osr_mode_t* osr_mode_en); 65 err_code_t merlin16_pmd_cl72_enable_get(const phymod_access_t* sa__, uint32_t* cl72_en); 66 err_code_t merlin16_pmd_cl72_receiver_status(const phymod_access_t* sa__, uint32_t* status); 67 err_code_t merlin16_polarity_set(const phymod_access_t *sa__, uint32_t tx_polarity, uint32_t rx_polarity); 68 err_code_t merlin16_polarity_get(const phymod_access_t *sa__, uint32_t* tx_polarity, uint32_t* rx_polarity); 69 err_code_t merlin16_ucode_pram_load_pre(const phymod_access_t *sa__); 70 err_code_t merlin16_ucode_pram_load_post(const phymod_access_t *sa__); 71 err_code_t merlin16_identify(const phymod_access_t *sa__, merlin16_rev_id0_t *rev_id0, merlin16_rev_id1_t *rev_id1); 72 err_code_t merlin16_rx_lane_soft_reset_release(const phymod_access_t *sa__, uint32_t enable); 73 err_code_t merlin16_tx_lane_soft_reset_release(const phymod_access_t *sa__, uint32_t enable); 74 err_code_t merlin16_rx_lane_soft_reset_release_get(const phymod_access_t *sa__, uint32_t *enable) ; 75 err_code_t merlin16_tx_lane_soft_reset_release_get(const phymod_access_t *sa__, uint32_t *enable) ; 76 err_code_t merlin16_lane_soft_reset_release_get(const phymod_access_t *sa__, uint32_t *enable); 77 err_code_t merlin16_pwrdn_set(const phymod_access_t *sa__, int tx_rx, int pwrdn); 78 err_code_t merlin16_pwrdn_get(const phymod_access_t *sa__, power_status_t *pwrdn); 79 err_code_t merlin16_tx_disable_get(const phymod_access_t *sa__, uint32_t* en); 80 err_code_t merlin16_rx_lane_control_set(const phymod_access_t *sa__, uint32_t en); 81 err_code_t merlin16_rx_lane_control_get(const phymod_access_t *sa__, uint32_t* en); 82 err_code_t merlin16_clause72_control(const phymod_access_t* sa__, int cl72_en); 83 err_code_t merlin16_get_pll_vco_osmode (const phymod_phy_inf_config_t* config, uint32_t *new_pll_div, int16_t *new_os_mode); 84 err_code_t merlin16_osmode_set(const phymod_access_t* sa__, int16_t os_mode); 85 err_code_t merlin16_pmd_reset_seq(const phymod_access_t *sa__, int pmd_touched); 86 err_code_t merlin16_refclk_set(const phymod_access_t *sa__, phymod_ref_clk_t ref_clock); 87 err_code_t merlin16_lane_hard_soft_reset_release(const phymod_access_t *sa__, uint32_t enable) ; 88 err_code_t merlin16_tsc_rx_ppm(const phymod_access_t *sa__, int16_t *rx_ppm); 89 #endif /* MERLIN16_CFG_SEQ_H */