huracan_cfg_seq.h (6635B)
1 /* This source file is the property of Broadcom Corporation, and 2 * may not be copied or distributed in any isomorphic form without the 3 * prior written consent of Broadcom Corporation. 4 *--------------------------------------------------------------------- 5 * File : huracan_cfg_seq.h 6 * Description: c functions implementing Tier1 7 *---------------------------------------------------------------------*/ 8 /* 9 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 10 * 11 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 12 * 13 */ 14 #ifndef HURACAN_CFG_SEQ_H 15 #define HURACAN_CFG_SEQ_H 16 #include <phymod/phymod_acc.h> 17 #include <phymod/phymod.h> 18 #include <phymod/phymod_diagnostics.h> 19 20 /* 21 * Macros 22 */ 23 24 #define HURACAN_GET_SW_ID(HW_ID) (HW_ID | (0x8 <<16)) 25 #define GET_SUPPORTED_LANES(__devid,__L) do { \ 26 switch(__devid) { \ 27 case HURACAN_82109_SW_ID: \ 28 case HURACAN_82181_SW_ID: \ 29 __L=EIGHT; \ 30 break; \ 31 default: \ 32 __L=FOUR; \ 33 }\ 34 }while(0) 35 36 #define MAX_NUM_PACKAGES 3 37 #define HURACAN_82181_HW_ID 0x2181 38 #define HURACAN_82109_HW_ID 0x2109 39 #define HURACAN_82109_SW_ID HURACAN_GET_SW_ID(HURACAN_82109_HW_ID) 40 #define HURACAN_82181_SW_ID HURACAN_GET_SW_ID(HURACAN_82181_HW_ID) 41 #define LANE_NUM_MASK 0x3 /* four lanes per quad*/ 42 #define CORE_ID_POS_SHIFT 12 43 #define CORE_ID_MASK 0x3 /* four quads*/ 44 #define LANE_NUM_POS_SHIFT 8 45 #define LANE_REG_ADDR_MASK 0xf 46 47 enum { 48 ZERO, 49 ONE, 50 TWO, 51 FOUR=4, 52 EIGHT=8 53 }; 54 #define HURACAN_GET_IF_SIDE(_FLAGS, _SIDE) \ 55 { \ 56 if(((_FLAGS >> PHYMOD_INTERFACE_SIDE_SHIFT) & 0x1) == 0x1) { \ 57 _SIDE = SIDE_B; \ 58 } else { \ 59 _SIDE = SIDE_A; \ 60 } \ 61 } 62 #define HURACAN_IF_TX_SIDE(chip_id, pkg_side) \ 63 ( ((HURACAN_IS_SIMPLEX(chip_id)) && (pkg_side == SIDE_A)) || \ 64 (HURACAN_IS_DUPLEX(chip_id)) \ 65 ) 66 67 68 #define HURACAN_IF_RX_SIDE(chip_id, pkg_side) \ 69 ( (HURACAN_IS_SIMPLEX(chip_id) && (pkg_side == SIDE_B)) || \ 70 (HURACAN_IS_DUPLEX(chip_id)) \ 71 ) 72 #define HURACAN_IS_SIMPLEX(devid)\ 73 ((devid) == HURACAN_82109_SW_ID) 74 75 #define HURACAN_IS_DUPLEX(devid)\ 76 ((devid) == HURACAN_82181_SW_ID) 77 78 79 typedef enum { 80 LINE=0, 81 SYS=1, 82 MAX_SIDES 83 } CHIP_SYSEN_E; 84 85 enum { 86 TX, 87 RX 88 }; 89 90 /* Huracan Transmiter/Receiver Types. */ 91 typedef enum { 92 DUPLEX_XCVR, /* Duplex transceiver */ 93 SIMPLEX_TX, /* Simplex transmitter */ 94 SIMPLEX_RX /* Simplex Receiver */ 95 } HURACAN_XCVR_TYPE_E; 96 97 /* Huracan Physical Lane Descriptor 98 * Port configuration set by package. 99 */ 100 typedef struct tx_rx_lane_info_t { 101 uint16_t die_num; /* on which die*/ 102 uint16_t lane_num; /* physical lane number*/ 103 } tx_rx_lane_info; 104 105 typedef struct lane_info_t { 106 tx_rx_lane_info tx_rx_l_info[MAX_SIDES]; /*0->tx,1->rx*/ 107 } lane_info; 108 109 typedef struct _HURACAN_PKG_LANE_CFG_S { 110 uint32_t chip_id; /* Chip id lane belongs to */ 111 uint16_t pkg_lane_num; /* Package lane number. */ 112 HURACAN_XCVR_TYPE_E xcvr_type; 113 lane_info intf_l_info[MAX_SIDES]; /* 0->line,1->system*/ 114 } HURACAN_PKG_LANE_CFG_t; 115 typedef struct chip_id_quad_info_t { 116 uint32_t chip_id; 117 uint32_t num_of_quads; 118 uint8_t quads_in_this_chip[8]; 119 } chip_id_quad_info; 120 /** Huracan Package Sides Type. 121 * Package side is defined as: 122 * For Duplex Chips: 123 * Side A = Line Side 124 * Side B = System Side 125 * For Simplex Chips: 126 * Side A = TX Side 127 * Side B = RX Side 128 */ 129 typedef enum { 130 SIDE_A = 0, 131 SIDE_B = 1, 132 ALL_SIDES = 10 133 } HURACAN_PKG_SIDE_E; 134 extern const chip_id_quad_info chipid_quad_info[MAX_NUM_PACKAGES-1]; 135 extern const HURACAN_PKG_LANE_CFG_t* const glb_pkg_array[MAX_NUM_PACKAGES]; 136 137 /* 138 * Functions 139 */ 140 141 142 /** Get Chip ID 143 * This function retrieves Chip ID from PHY chip 144 * 145 * @param pa Pointer to phymod access structure 146 * 147 * @param rev_id Pointer to Revision ID retrieved from the chip 148 * 149 * @return PHYMOD_E_NONE successful function execution 150 */ 151 int huracan_rev_id(const phymod_access_t *pa, uint32_t *rev_id); 152 153 /** Get Chip ID 154 * This function retrieves Chip ID from PHY chip 155 * 156 * @param pa Pointer to phymod access structure 157 * 158 * @return chip_id Chip id retrieved from the chip 159 */ 160 uint32_t _huracan_get_chip_id(const phymod_access_t *pa); 161 162 /** Get link status of PHY 163 * This function is used to retrieve the link status of PHY chip 164 * 165 * @param pa Pointer to phymod access structure 166 * 167 * @param link_status link status of the PHY 168 * 1 - Up 169 * 0 - Down 170 * 171 * @return PHYMOD_E_NONE successful function execution 172 */ 173 int huracan_link_status(const phymod_access_t *pa, uint32_t *link_status); 174 175 int huracan_reg_read(const phymod_access_t *pa, uint32_t addr, uint32_t *val); 176 177 int huracan_reg_write(const phymod_access_t *pa, uint32_t addr, uint32_t val); 178 179 180 181 int huracan_tx_lane_control_set(const phymod_access_t *pa, 182 phymod_phy_tx_lane_control_t tx_control); 183 184 int huracan_tx_squelch_get(const phymod_access_t *pa, 185 int *tx_squelch); 186 187 int huracan_rx_lane_control_set(const phymod_access_t *pa, 188 phymod_phy_rx_lane_control_t rx_control); 189 190 191 int huracan_rx_squelch_get(const phymod_access_t *pa, int *rx_squelch); 192 193 int _huracan_phy_status_dump(const phymod_access_t *pa); 194 195 196 int huracan_hard_reset(const phymod_access_t* pa, phymod_reset_mode_t reset_mode, phymod_reset_direction_t direction); 197 198 int _huracan_phy_power_set(const phymod_access_t* pa, const phymod_phy_power_t* power); 199 200 int _huracan_phy_power_get(const phymod_access_t* pa, phymod_phy_power_t* power); 201 202 int huracan_gpio_config_set(const phymod_access_t *pa, int pin_no, phymod_gpio_mode_t gpio_mode); 203 204 int huracan_gpio_config_get(const phymod_access_t *pa, int pin_no, phymod_gpio_mode_t* gpio_mode); 205 206 int huracan_gpio_pin_value_set(const phymod_access_t *pa, int pin_no, int value); 207 208 int huracan_gpio_pin_value_get(const phymod_access_t *pa, int pin_no, int* value); 209 210 211 #endif /* HURACAN_CFG_SEQ_H */