falcon_dpll_dispatch.c (8347B)
1 /* 2 * 3 * 4 * 5 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 6 * 7 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 8 * 9 * 10 * DO NOT EDIT THIS FILE! 11 */ 12 13 #include <phymod/phymod.h> 14 #include <phymod/phymod_system.h> 15 #include <phymod/phymod.h> 16 #include <phymod/phymod_dispatch.h> 17 18 #ifdef PHYMOD_FALCON_DPLL_SUPPORT 19 20 #include <phymod/chip/falcon_dpll.h> 21 22 23 __phymod__dispatch__t__ phymod_falcon_dpll_driver = { 24 25 NULL, /* phymod_core_identify */ 26 NULL, /* phymod_core_info_get */ 27 NULL, /* phymod_core_lane_map_set */ 28 NULL, /* phymod_core_lane_map_get */ 29 NULL, /* phymod_core_reset_set */ 30 NULL, /* phymod_core_reset_get */ 31 NULL, /* phymod_core_firmware_info_get */ 32 NULL, /* phymod_phy_firmware_core_config_set */ 33 NULL, /* phymod_phy_firmware_core_config_get */ 34 NULL, /* phymod_phy_firmware_lane_config_set */ 35 NULL, /* phymod_phy_firmware_lane_config_get */ 36 NULL, /* phymod_core_pll_sequencer_restart */ 37 NULL, /* phymod_core_wait_event */ 38 NULL, /* phymod_phy_rx_restart */ 39 NULL, /* phymod_phy_polarity_set */ 40 NULL, /* phymod_phy_polarity_get */ 41 falcon_dpll_phy_tx_set, 42 falcon_dpll_phy_tx_get, 43 NULL, /* phymod_phy_training_tx_fir_post_set */ 44 falcon_dpll_phy_media_type_tx_get, 45 NULL, /* phymod_phy_tx_override_set */ 46 NULL, /* phymod_phy_tx_override_get */ 47 falcon_dpll_phy_txpi_config_set, 48 falcon_dpll_phy_txpi_config_get, 49 NULL, /* phymod_phy_rx_set */ 50 NULL, /* phymod_phy_rx_get */ 51 NULL, /* phymod_phy_rx_adaptation_resume */ 52 NULL, /* phymod_phy_reset_set */ 53 NULL, /* phymod_phy_reset_get */ 54 NULL, /* phymod_phy_power_set */ 55 NULL, /* phymod_phy_power_get */ 56 NULL, /* phymod_phy_hg2_codec_control_set */ 57 NULL, /* phymod_phy_hg2_codec_control_get */ 58 NULL, /* phymod_phy_tx_lane_control_set */ 59 NULL, /* phymod_phy_tx_lane_control_get */ 60 NULL, /* phymod_phy_rx_lane_control_set */ 61 NULL, /* phymod_phy_rx_lane_control_get */ 62 NULL, /* phymod_phy_fec_enable_set */ 63 NULL, /* phymod_phy_fec_enable_get */ 64 NULL, /* phymod_phy_fec_override_set */ 65 NULL, /* phymod_phy_fec_override_get */ 66 NULL, /* phymod_phy_forced_speed_line_side_set */ 67 NULL, /* phymod_phy_forced_speed_line_side_get */ 68 NULL, /* phymod_phy_autoneg_line_side_set */ 69 NULL, /* phymod_phy_autoneg_line_side_get */ 70 NULL, /* phymod_phy_flow_control_mode_set */ 71 NULL, /* phymod_phy_flow_control_mode_get */ 72 NULL, /* phymod_phy_psm_cos_bmp_set */ 73 NULL, /* phymod_phy_psm_cos_bmp_get */ 74 NULL, /* phymod_phy_pfc_use_ip_cos_set */ 75 NULL, /* phymod_phy_pfc_use_ip_cos_get */ 76 NULL, /* phymod_phy_autoneg_oui_set */ 77 NULL, /* phymod_phy_autoneg_oui_get */ 78 NULL, /* phymod_phy_eee_set */ 79 NULL, /* phymod_phy_eee_get */ 80 NULL, /* phymod_phy_interface_config_set */ 81 NULL, /* phymod_phy_interface_config_get */ 82 NULL, /* phymod_phy_cl72_set */ 83 NULL, /* phymod_phy_cl72_get */ 84 NULL, /* phymod_phy_cl72_status_get */ 85 NULL, /* phymod_phy_autoneg_ability_set */ 86 NULL, /* phymod_phy_autoneg_ability_get */ 87 NULL, /* phymod_phy_autoneg_remote_ability_get */ 88 NULL, /* phymod_phy_autoneg_set */ 89 NULL, /* phymod_phy_autoneg_get */ 90 NULL, /* phymod_phy_autoneg_restart_set */ 91 NULL, /* phymod_phy_autoneg_status_get */ 92 NULL, /* phymod_core_init */ 93 NULL, /* phymod_phy_pll_multiplier_get */ 94 NULL, /* phymod_phy_init */ 95 NULL, /* phymod_phy_loopback_set */ 96 NULL, /* phymod_phy_loopback_get */ 97 NULL, /* phymod_phy_rx_pmd_locked_get */ 98 NULL, /* phymod_phy_rx_signal_detect_get */ 99 NULL, /* phymod_phy_link_status_get */ 100 NULL, /* phymod_phy_status_dump */ 101 NULL, /* phymod_phy_pcs_userspeed_set */ 102 NULL, /* phymod_phy_pcs_userspeed_get */ 103 NULL, /* phymod_phy_reg_read */ 104 NULL, /* phymod_phy_reg_write */ 105 NULL, /* phymod_phy_private_read */ 106 NULL, /* phymod_phy_private_write */ 107 NULL, /* phymod_phy_rev_id */ 108 NULL, /* phymod_phy_lane_cross_switch_map_set */ 109 NULL, /* phymod_phy_lane_cross_switch_map_get */ 110 NULL, /* phymod_phy_intr_enable_set */ 111 NULL, /* phymod_phy_intr_enable_get */ 112 NULL, /* phymod_phy_intr_status_get */ 113 NULL, /* phymod_phy_intr_status_clear */ 114 NULL, /* phymod_phy_i2c_read */ 115 NULL, /* phymod_phy_i2c_write */ 116 NULL, /* phymod_phy_gpio_config_set */ 117 NULL, /* phymod_phy_gpio_config_get */ 118 NULL, /* phymod_phy_gpio_pin_value_set */ 119 NULL, /* phymod_phy_gpio_pin_value_get */ 120 NULL, /* phymod_timesync_config_set */ 121 NULL, /* phymod_timesync_config_get */ 122 NULL, /* phymod_timesync_enable_set */ 123 NULL, /* phymod_timesync_enable_get */ 124 NULL, /* phymod_timesync_nco_addend_set */ 125 NULL, /* phymod_timesync_nco_addend_get */ 126 NULL, /* phymod_timesync_framesync_mode_set */ 127 NULL, /* phymod_timesync_framesync_mode_get */ 128 NULL, /* phymod_timesync_local_time_set */ 129 NULL, /* phymod_timesync_local_time_get */ 130 NULL, /* phymod_timesync_load_ctrl_set */ 131 NULL, /* phymod_timesync_load_ctrl_get */ 132 NULL, /* phymod_timesync_tx_timestamp_offset_set */ 133 NULL, /* phymod_timesync_tx_timestamp_offset_get */ 134 NULL, /* phymod_timesync_rx_timestamp_offset_set */ 135 NULL, /* phymod_timesync_rx_timestamp_offset_get */ 136 NULL, /* phymod_timesync_capture_timestamp_get */ 137 NULL, /* phymod_timesync_heartbeat_timestamp_get */ 138 NULL, /* phymod_timesync_do_sync */ 139 NULL, /* phymod_timesync_offset_set */ 140 NULL, /* phymod_timesync_adjust_set */ 141 NULL, /* phymod_edc_config_set */ 142 NULL, /* phymod_edc_config_get */ 143 NULL, /* phymod_phy_core_mode_set */ 144 NULL, /* phymod_phy_core_mode_get */ 145 NULL, /* phymod_failover_mode_set */ 146 NULL, /* phymod_failover_mode_get */ 147 NULL, /* phymod_port_init */ 148 NULL, /* phymod_phy_autoneg_try_enable */ 149 NULL, /* phymod_debug_ether */ 150 NULL, /* phymod_reset_interface */ 151 NULL, /* phymod_phy_short_chn_mode_enable_set */ 152 NULL, /* phymod_phy_short_chn_mode_enable_get */ 153 NULL, /* phymod_port_enable_set */ 154 NULL, /* phymod_port_enable_get */ 155 NULL, /* phymod_phy_eye_margin_est_get */ 156 NULL, /* phymod_phy_multi_get */ 157 NULL, /* phymod_phy_rescal_set */ 158 NULL, /* phymod_phy_rescal_get */ 159 NULL, /* phymod_phy_sw_an_control_status_get */ 160 NULL, /* phymod_phy_sw_an_base_page_exchange_handler */ 161 NULL, /* phymod_phy_sw_an_lp_page_rdy_handler */ 162 NULL, /* phymod_phy_sw_an_advert_set */ 163 NULL, /* phymod_phy_sw_autoneg_enable */ 164 NULL, /* phymod_phy_speed_config_set */ 165 NULL, /* phymod_phy_speed_config_get */ 166 NULL, /* phymod_phy_op_mode_get */ 167 NULL, /* phymod_phy_tx_taps_default_get */ 168 NULL, /* phymod_phy_lane_config_default_get */ 169 NULL, /* phymod_phy_firmware_load_info_get */ 170 NULL, /* phymod_phy_autoneg_advert_ability_set */ 171 NULL, /* phymod_phy_autoneg_advert_ability_get */ 172 NULL, /* phymod_phy_autoneg_remote_advert_ability_get */ 173 NULL, /* phymod_phy_bond_in_pwrdn_override */ 174 NULL, /* phymod_phy_tx_pam4_precoder_enable_set */ 175 NULL, /* phymod_phy_tx_pam4_precoder_enable_get */ 176 NULL, /* phymod_phy_tx_phase_lock_set */ 177 NULL, /* phymod_phy_pll_reconfig */ 178 NULL, /* phymod_phy_pll_pwrdn */ 179 NULL, /* phymod_phy_linkdown_transmit_set */ 180 NULL, /* phymod_phy_linkdown_transmit_get */ 181 NULL, /* phymod_phy_synce_clk_ctrl_set */ 182 NULL, /* phymod_phy_synce_clk_ctrl_get */ 183 NULL, /* phymod_phy_pcs_enable_set */ 184 NULL, /* phymod_phy_rx_ppm_get */ 185 NULL, /* phymod_phy_channel_loss_hint_set */ 186 NULL, /* phymod_phy_channel_loss_hint_get */ 187 NULL, /* phymod_intr_handler */ 188 NULL, /* phymod_timesync_tx_info_get */ 189 NULL, /* phymod_phy_master_set */ 190 NULL, /* phymod_phy_master_get */ 191 NULL, /* phymod_phy_pcs_lane_swap_adjust */ 192 NULL, /* phymod_phy_load_speed_id_entry */ 193 NULL, /* phymod_phy_pmd_override_enable_set */ 194 NULL, /* phymod_phy_duplex_set */ 195 NULL, /* phymod_phy_duplex_get */ 196 NULL, /* phymod_phy_pmd_info_init */ 197 NULL, /* phymod_phy_pll_powerdown_get */ 198 NULL, /* phymod_phy_pmd_info_size_get */ 199 NULL, /* phymod_phy_fec_bypass_indication_set */ 200 NULL, /* phymod_phy_fec_bypass_indication_get */ 201 }; 202 203 #endif /* PHYMOD_FALCON_DPLL_SUPPORT */