eagle_tsc_internal.h (27683B)
1 /********************************************************************************** 2 ********************************************************************************** 3 * * 4 * * 5 * Description : Internal API functions * 6 * * 7 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 8 * 9 * Copyright 2007-2019 Broadcom Inc. All rights reserved. * 10 * No portions of this material may be reproduced in any form without * 11 * the written permission of: * 12 * Broadcom Corporation * 13 * 5300 California Avenue * 14 * Irvine, CA 92617 * 15 * * 16 * All information contained in this document is Broadcom Corporation * 17 * company private proprietary, and trade secret. * 18 */ 19 20 /** @file eagle_tsc_internal.h 21 * Internal API functions 22 */ 23 24 #ifndef EAGLE_TSC_API_INTERNAL_H 25 #define EAGLE_TSC_API_INTERNAL_H 26 27 #define SDK_STATIC static 28 29 30 #include "eagle_tsc_common.h" 31 #include "eagle_tsc_field_access.h" 32 #include "eagle_tsc_ipconfig.h" 33 #include "common/srds_api_err_code.h" 34 #include "eagle_tsc_interface.h" 35 #include "eagle_tsc_debug_functions.h" 36 37 /*------------------------------*/ 38 /** Serdes OSR Mode Structure */ 39 /*------------------------------*/ 40 typedef struct { 41 /** TX OSR Mode */ 42 uint8_t tx; 43 /** RX OSR Mode */ 44 uint8_t rx; 45 /** OSR Mode for TX and RX (used when both TX and RX should have same OSR Mode) */ 46 uint8_t tx_rx; 47 }eagle_tsc_osr_mode_st; 48 49 /*------------------------------*/ 50 /** Serdes Lane State Structure */ 51 /*------------------------------*/ 52 typedef struct { 53 /** uC lane configuration */ 54 uint16_t ucv_config; 55 /** Frequency offset of local reference clock with respect to RX data in ppm */ 56 int16_t rx_ppm; 57 /** Vertical threshold voltage of p1 slicer (mV) */ 58 int16_t p1_lvl; 59 /** Vertical threshold voltage of m1 slicer (mV) */ 60 int16_t m1_lvl; 61 /** Link time in milliseconds */ 62 uint16_t link_time; 63 /** OSR Mode */ 64 eagle_tsc_osr_mode_st osr_mode; 65 /** Signal Detect */ 66 uint8_t sig_det; 67 /** Signal Detect Change */ 68 uint8_t sig_det_chg; 69 /** PMD RX Lock */ 70 uint8_t rx_lock; 71 /** PMD RX Lock Change */ 72 uint8_t rx_lock_chg; 73 /** Delay of zero crossing slicer, m1, wrt to data in PI codes */ 74 int8_t clk90; 75 /** Delay of diagnostic/lms slicer, p1, wrt to data in PI codes */ 76 int8_t clkp1; 77 /** Peaking Filter Main Settings */ 78 int8_t pf_main; 79 /** Peaking Filter Hiz mode enable */ 80 int8_t pf_hiz; 81 /** Peaking Filter DC gain adjustment for CTLE */ 82 int8_t pf_bst; 83 /** Low Frequency Peaking filter control */ 84 int8_t pf2_ctrl; 85 /** Variable Gain Amplifier settings */ 86 int8_t vga; 87 /** DC offset DAC control value */ 88 int8_t dc_offset; 89 /** P1 eyediag status */ 90 int8_t p1_lvl_ctrl; 91 /** DFE tap 1 value */ 92 int8_t dfe1; 93 /** DFE tap 2 value */ 94 int8_t dfe2; 95 /** DFE tap 3 value */ 96 int8_t dfe3; 97 /** DFE tap 4 value */ 98 int8_t dfe4; 99 /** DFE tap 5 value */ 100 int8_t dfe5; 101 /** DFE tap 6 value */ 102 int8_t dfe6; 103 /** DFE tap 1 Duty Cycle Distortion */ 104 int8_t dfe1_dcd; 105 /** DFE tap 2 Duty Cycle Distortion */ 106 int8_t dfe2_dcd; 107 /** Slicer calibration control codes (p1 even) */ 108 int8_t pe; 109 /** Slicer calibration control codes (data even) */ 110 int8_t ze; 111 /** Slicer calibration control codes (m1 even) */ 112 int8_t me; 113 /** Slicer calibration control codes (p1 odd) */ 114 int8_t po; 115 /** Slicer calibration control codes (data odd) */ 116 int8_t zo; 117 /** Slicer calibration control codes (m1 odd) */ 118 int8_t mo; 119 /** Frequency offset of local reference clock with respect to TX data in ppm */ 120 int16_t tx_ppm; 121 /** TX equalization FIR pre tap weight */ 122 int8_t txfir_pre; 123 /** TX equalization FIR main tap weight */ 124 int8_t txfir_main; 125 /** TX equalization FIR post1 tap weight */ 126 int8_t txfir_post1; 127 /** TX equalization FIR post2 tap weight */ 128 int8_t txfir_post2; 129 /** TX equalization FIR post3 tap weight */ 130 int8_t txfir_post3; 131 /** Horizontal left eye margin @ 1e-5 as seen by internal diagnostic slicer in mUI and mV */ 132 uint16_t heye_left; 133 /** Horizontal right eye margin @ 1e-5 as seen by internal diagnostic slicer in mUI and mV */ 134 uint16_t heye_right; 135 /** Vertical upper eye margin @ 1e-5 as seen by internal diagnostic slicer in mUI and mV */ 136 uint16_t veye_upper; 137 /** Vertical lower eye margin @ 1e-5 as seen by internal diagnostic slicer in mUI and mV */ 138 uint16_t veye_lower; 139 /** Baud Rate Phase Detector enable */ 140 uint8_t br_pd_en; 141 /** lane_reset_state **/ 142 uint8_t reset_state; 143 /** uC stopped state **/ 144 uint8_t stop_state; 145 /** TX_AMP **/ 146 int8_t tx_amp; 147 /** TX_Drivermode **/ 148 uint8_t drivermode; 149 /** TX pll select */ 150 uint8_t tx_pll_select; 151 /** RX pll select */ 152 uint8_t rx_pll_select; 153 } eagle_tsc_lane_state_st; 154 155 /*------------------------------*/ 156 /** Serdes Core State Structure */ 157 /*------------------------------*/ 158 typedef struct { 159 /** Core DP Reset State */ 160 uint8_t core_reset; 161 /** PLL Powerdown enable */ 162 uint8_t pll_pwrdn; 163 /** Micro active enable */ 164 uint8_t uc_active; 165 /** Comclk Frequency in Mhz */ 166 uint16_t comclk_mhz; 167 /** uCode Major Version number */ 168 uint16_t ucode_version; 169 /** uCode Minor Version number */ 170 uint8_t ucode_minor_version; 171 /** AFE Hardware version */ 172 uint8_t afe_hardware_version; 173 /** uC Die Temperature Index */ 174 uint8_t temp_idx; 175 /** Average Die Temperature (13-bit format) */ 176 uint16_t avg_tmon; 177 /** Analog Resistor Calibration value */ 178 uint8_t rescal; 179 /** VCO Rate in MHz */ 180 uint16_t vco_rate_mhz; 181 /** Analog VCO Range */ 182 uint8_t analog_vco_range; 183 /** PLL Divider value */ 184 uint8_t pll_div; 185 /** PLL Lock */ 186 uint8_t pll_lock; 187 /** PLL Lock Change */ 188 uint8_t pll_lock_chg; 189 /** Live die temperature in Celsius */ 190 int16_t die_temp; 191 /** Core Status Variable */ 192 uint8_t core_status; 193 } eagle_tsc_core_state_st; 194 195 /** Print Error messages to screen before returning. 196 * @param pa phymod_access_t struct 197 * @param err_code Error Code input which is returned as well 198 * @return Error Code 199 */ 200 SDK_STATIC err_code_t _print_err_msg( uint16_t err_code); 201 202 /** Print Convert Error code to String. 203 * @param pa phymod_access_t struct 204 * @param err_code Error Code input which is converted to string 205 * @return String containing Error code information. 206 */ 207 SDK_STATIC char* _e2s_err_code(err_code_t err_code); 208 209 210 211 /** Check if the micro's operations on that lane are stopped. 212 * @param pa phymod_access_t struct 213 * @return err_code Error Code "ERR_CODE_UC_NOT_STOPPED" returned if micro NOT stopped 214 */ 215 SDK_STATIC err_code_t _check_uc_lane_stopped( const phymod_access_t *pa ); 216 217 /** Calculate the mode_sel parameter for tx pattern generator. 218 * @param pa phymod_access_t struct 219 * @param *mode_sel Mode select to be used for generating required pattern 220 * @param *zero_pad_len Length of zero padding to be used for generating required pattern 221 * @param patt_length Desired Pattern length 222 * @return Error Code, if generated (returns ERR_CODE_NONE if no errors) 223 */ 224 SDK_STATIC err_code_t _calc_patt_gen_mode_sel( const phymod_access_t *pa, uint8_t *mode_sel, uint8_t *zero_pad_len, uint8_t patt_length); 225 226 /** Convert the PLL_mode to actual PLL divider value and display 227 * as part of eagle_tsc_display_core_state_line() 228 * @param pa phymod_access_t struct 229 * @param val PLL_DIV register value 230 * @return Error Code, if generated (returns ERR_CODE_NONE if no errors) 231 */ 232 static err_code_t _eagle_tsc_display_pll_to_divider( const phymod_access_t *pa, uint8_t val); 233 234 235 /*---------*/ 236 /* RX_PI */ 237 /*---------*/ 238 239 /** Restart TrainingSum 240 */ 241 SDK_STATIC err_code_t _trnsum_clear_and_enable( const phymod_access_t *pa ); 242 243 /** Move P1 Slicer (RX_PI) by desired increments/decrements. 244 * @param pa phymod_access_t struct 245 * @param delta Delta change required in P1 slicer 246 * @return Error Code, if generated (returns ERR_CODE_NONE if no errors) 247 */ 248 SDK_STATIC err_code_t _move_clkp1_offset( const phymod_access_t *pa, int8_t delta); 249 250 251 252 253 /*-------------------*/ 254 /* Ladder controls */ 255 /*-------------------*/ 256 /** Converts a ladder setting to mV, given the range. 257 * @param pa phymod_access_t struct 258 * @param ctrl is the threshold control (-31..31) maps to -RANGE to RANGE in non-uniform steps 259 * @param range_250 determines the range 0 = +/-150mV, 1 = +/-250mV 260 * @return ladder threshold voltage in mV 261 */ 262 SDK_STATIC int16_t _ladder_setting_to_mV(int8_t ctrl, uint8_t range_250); 263 264 /** Setup the P1 slicer vertical level. 265 * @param pa phymod_access_t struct 266 * @param threshold Desired threshold level 267 * @return Error Code, if generated (returns ERR_CODE_NONE if no errors) 268 */ 269 SDK_STATIC err_code_t _set_p1_threshold( const phymod_access_t *pa, int8_t threshold); 270 271 /** Get the P1 slicer vertical level. 272 * @param pa phymod_access_t struct 273 * @param *val 8 bit signed value 274 * @return Error Code, if generated (returns ERR_CODE_NONE if no errors) 275 */ 276 SDK_STATIC err_code_t _get_p1_threshold( const phymod_access_t *pa, int8_t *val); 277 278 279 /*-----------------------*/ 280 /* TX_PI and ULL Setup */ 281 /*-----------------------*/ 282 283 /** Safe multiply - multiplies 2 numbers and checks for overflow. 284 * @param pa phymod_access_t struct 285 * @param a First input 286 * @param b Second input 287 * @param *of Pointer to overflow indicator 288 * @return value of a * b 289 */ 290 static uint32_t _mult_with_overflow_check(uint32_t a, uint32_t b, uint8_t *of); 291 292 293 /*-----------------------------------------*/ 294 /* APIs used in Config Shared TX Pattern */ 295 /*-----------------------------------------*/ 296 /** Compute Binary string for a Hex value ['0' to 'F']. 297 * @param pa phymod_access_t struct 298 * @param var Hex value to be converted to Binary (eg: '6', 'A', ...) 299 * @param bin Binary string returned by API (eg: '0110', '1010', ...) 300 * @return Error Code generated by invalid hex variable (returns ERR_CODE_NONE if no errors) 301 */ 302 static err_code_t _compute_bin( const phymod_access_t *pa, char var, char bin[]); 303 304 /** Compute Hex value for a Binary string ['0000' to '1111']. 305 * @param pa phymod_access_t struct 306 * @param bin Binary string to be coverted (eg: '0110', '1010', ...) 307 * @param *hex Hex value calculated from the input Binary string 308 * @return Error Code generated by invalid Binary string (returns ERR_CODE_NONE if no errors) 309 */ 310 static err_code_t _compute_hex( const phymod_access_t *pa, char bin[], uint8_t * hex); 311 312 313 /*-----------------------------------*/ 314 /* APIs used in Read Event Logger */ 315 /*-----------------------------------*/ 316 317 /** Interpret error event code. 318 * @param pa phymod_access_t struct 319 * @param val Event code error value to be interpreted 320 * @return Char string to be displayed in event log 321 */ 322 static char* _error_val_2_str( const phymod_access_t *pa, uint8_t val); 323 324 /** Display event information. 325 * @param pa phymod_access_t struct 326 * @param event_id Event id to be displayed 327 * @param entry_len Length of the event entry 328 * @param prev_cursor CL72 prev cursor value 329 * @param curr_cursor CL72 curr cursor value 330 * @param post_cursor CL72 post cursor value 331 * @param *supp_info Supplement information 332 */ 333 static err_code_t _display_event( const phymod_access_t *pa, uint8_t event_id, uint8_t entry_len, uint8_t prev_cursor, uint8_t curr_cursor, uint8_t post_cursor, uint8_t *supp_info); 334 335 336 /** Convert float8 to usigned int32. 337 * uint32 = 1.XXX * 2^Y where float8 bits are XXXYYYYY 338 * @param pa phymod_access_t struct 339 * @param input Float8 number 340 * @return Usigned 32bit number 341 */ 342 static uint32_t _float8_to_int32(float8_t input); 343 344 345 #ifdef TO_FLOATS 346 /*-----------------------------------*/ 347 /* APIs used in uC data conversion */ 348 /*-----------------------------------*/ 349 350 /** Convert usigned int32 to float8. 351 * uint32 = 1.XXX * 2^Y where float8 bits are XXXYYYYY 352 * @param pa phymod_access_t struct 353 * @param input Unsigned int 354 * @return Float8 8 bit representations of 32bit number 355 */ 356 static float8_t _int32_to_float8(uint32_t input); 357 #endif 358 359 /** Convert float12 to usigned int32. 360 * uint32 = XXXXXXXX * 2^YYYY where float12 bits X=byte and Y=multi 361 * @param pa phymod_access_t struct 362 * @param byte Float8 8bit 363 * @param multi 4 bit multipier 364 * @return Usigned 32bit number 365 */ 366 static uint32_t _float12_to_uint32( const phymod_access_t *pa, uint8_t byte, uint8_t multi); 367 368 #ifdef TO_FLOATS 369 /** Convert usigned int32 to float12. 370 * uint32 = XXXXXXXX * 2^YYYY where float12 bits X=byte and Y=multi 371 * @param pa phymod_access_t struct 372 * @param input Unsigned int32 373 * @param *multi Pointer to byte and the multiplier is returned 374 * @return Float12 8 bit representations of 32bit number 375 */ 376 static uint8_t _uint32_to_float12( const phymod_access_t *pa, uint32_t input, uint8_t *multi); 377 #endif 378 379 /*-----------------------------*/ 380 /* Read / Display Core state */ 381 /*-----------------------------*/ 382 /** Read current eagle_tsc core status. 383 * @param pa phymod_access_t struct 384 * @param *istate Current eagle_tsc core status read back and populated by the API 385 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 386 */ 387 SDK_STATIC err_code_t _eagle_tsc_read_core_state( const phymod_access_t *pa, eagle_tsc_core_state_st *istate); 388 389 /** Display current core state. 390 * Reads and displays all important core state values. 391 * @param pa phymod_access_t struct 392 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 393 */ 394 static err_code_t _eagle_tsc_display_core_state_no_newline( const phymod_access_t *pa ); 395 396 /*-----------------------------*/ 397 /* Read / Display Lane state */ 398 /*-----------------------------*/ 399 /** Read current eagle_tsc lane status. 400 * @param pa phymod_access_t struct 401 * @param *istate Current eagle_tsc lane status read back and populated by the API 402 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 403 */ 404 SDK_STATIC err_code_t _eagle_tsc_read_lane_state( const phymod_access_t *pa, eagle_tsc_lane_state_st *istate); 405 406 407 /*-----------------------------------*/ 408 /* Pll_lock/Sigdet/Pmd_lock status */ 409 /*-----------------------------------*/ 410 /** Read current PLL Lock and PLL Lock change status of a lane. 411 * @param pa phymod_access_t struct 412 * @param *pll_lock Current eagle_tsc lane pll_lock status read back and populated by the API 413 * @param *pll_lock_chg Current eagle_tsc lane pll_lock_change status read back and populated by the API 414 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 415 */ 416 SDK_STATIC err_code_t _eagle_tsc_pll_lock_status( const phymod_access_t *pa, uint8_t *pll_lock, uint8_t *pll_lock_chg); 417 418 /** Read current PMD Lock and PMD Lock change status of a lane. 419 * @param pa phymod_access_t struct 420 * @param *pmd_lock Current eagle_tsc lane pmd_rx_lock status read back and populated by the API 421 * @param *pmd_lock_chg Current eagle_tsc lane pmd_rx_lock_change status read back and populated by the API 422 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 423 */ 424 SDK_STATIC err_code_t _eagle_tsc_pmd_lock_status( const phymod_access_t *pa, uint8_t *pmd_lock, uint8_t *pmd_lock_chg); 425 426 /** Read current Signal_detect and Signal_detect change status of a lane. 427 * @param pa phymod_access_t struct 428 * @param *sig_det Current eagle_tsc lane signal_detect status read back and populated by the API 429 * @param *sig_det_chg Current eagle_tsc lane signal_detect_change status read back and populated by the API 430 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 431 */ 432 SDK_STATIC err_code_t _eagle_tsc_sigdet_status( const phymod_access_t *pa, uint8_t *sig_det, uint8_t *sig_det_chg); 433 434 435 436 437 /*-----------------*/ 438 /* Get OSR mode */ 439 /*-----------------*/ 440 /** Read current eagle_tsc lane status. 441 * @param pa phymod_access_t struct 442 * @param *mode Returns with the osr mode structure 443 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 444 */ 445 SDK_STATIC err_code_t _eagle_tsc_get_osr_mode( const phymod_access_t *pa, eagle_tsc_osr_mode_st *mode); 446 447 /** Display current lane state. 448 * Reads and displays all important lane state values. 449 * @param pa phymod_access_t struct 450 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 451 */ 452 static err_code_t _eagle_tsc_display_lane_state_no_newline( const phymod_access_t *pa ); 453 454 455 456 /** Convert eye margin to mV. 457 * Takes in the ladder setting with 3 fractional bits and converts to mV. 458 * @param pa phymod_access_t struct 459 * @param var Ladder setting with 3 fractional bits 460 * @param ladder_range Specified if ladder is configured for 150mV or 250mV range 461 * @return Eye opening in mV 462 */ 463 SDK_STATIC uint16_t _eye_to_mV(const phymod_access_t *pa, uint8_t var, uint8_t ladder_range); 464 465 /** Convert eye margin to mUI. 466 * Takes in a horizontal margin in Phase Interpolator codes and converts it to mUI. 467 * @param pa phymod_access_t struct 468 * @param var Horizontal margin in Phase Interpolator codes with 3 fractional bits 469 * @return Eye opening in mV 470 */ 471 SDK_STATIC uint16_t _eye_to_mUI(const phymod_access_t *pa,uint8_t var); 472 473 474 /** Serdes Core ClockGate. 475 * Along with eagle_tsc_core_clkgate(), all lanes should also be clock gated using eagle_tsc_lane_clkgate() to complete a Core Clockgate 476 * @param pa phymod_access_t struct 477 * @param enable Enable clockgate (1 = Enable clokgate; 0 = Disable clockgate) 478 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 479 */ 480 static err_code_t _eagle_tsc_core_clkgate( const phymod_access_t *pa, uint8_t enable); 481 482 /** Serdes Lane ClockGate. 483 * @param pa phymod_access_t struct 484 * @param enable Enable lane clockgate (1 = Enable clockgate; 0 = Disable clockgate) 485 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 486 */ 487 static err_code_t _eagle_tsc_lane_clkgate( const phymod_access_t *pa, uint8_t enable); 488 489 490 /** Set function for PF. 491 * @param pa phymod_access_t struct 492 * @param val Signed input value 493 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 494 */ 495 static err_code_t _set_rx_pf_main( const phymod_access_t *pa, uint8_t val); 496 497 /** Get function for PF 498 * @param pa phymod_access_t struct 499 * @param *val PF read value 500 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 501 */ 502 static err_code_t _get_rx_pf_main( const phymod_access_t *pa, int8_t *val); 503 504 /** Set function for PF2. 505 * @param pa phymod_access_t struct 506 * @param val signed input value 507 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 508 */ 509 static err_code_t _set_rx_pf2( const phymod_access_t *pa, uint8_t val); 510 511 /** Get function for PF2. 512 * @param pa phymod_access_t struct 513 * @param *val PF2 read value 514 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 515 */ 516 static err_code_t _get_rx_pf2( const phymod_access_t *pa, int8_t *val); 517 518 /** Set function for VGA. 519 * @param pa phymod_access_t struct 520 * @param val signed input value 521 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 522 */ 523 static err_code_t _set_rx_vga( const phymod_access_t *pa, uint8_t val); 524 525 /** Get function for VGA. 526 * @param pa phymod_access_t struct 527 * @param *val VGA read value 528 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 529 */ 530 static err_code_t _get_rx_vga( const phymod_access_t *pa, int8_t *val); 531 532 533 /** Set function for DFE Tap1. 534 * @param pa phymod_access_t struct 535 * @param val signed input value 536 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 537 */ 538 SDK_STATIC err_code_t _set_rx_dfe1( const phymod_access_t *pa, int8_t val); 539 540 /** Get function for DFE Tap1. 541 * @param pa phymod_access_t struct 542 * @param *val DFE1 read value 543 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 544 */ 545 SDK_STATIC err_code_t _get_rx_dfe1( const phymod_access_t *pa, int8_t *val); 546 547 /** Set function for DFE Tap2. 548 * @param pa phymod_access_t struct 549 * @param val signed input value 550 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 551 */ 552 SDK_STATIC err_code_t _set_rx_dfe2( const phymod_access_t *pa, int8_t val); 553 554 /** Get function for DFE Tap2. 555 * @param pa phymod_access_t struct 556 * @param *val DFE2 read value 557 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 558 */ 559 SDK_STATIC err_code_t _get_rx_dfe2( const phymod_access_t *pa, int8_t *val); 560 561 /** Set function for DFE Tap3. 562 * @param pa phymod_access_t struct 563 * @param val signed input value 564 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 565 */ 566 static err_code_t _set_rx_dfe3( const phymod_access_t *pa, int8_t val); 567 568 /** Get function for DFE Tap3. 569 * @param pa phymod_access_t struct 570 * @param *val DFE3 read value 571 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 572 */ 573 static err_code_t _get_rx_dfe3( const phymod_access_t *pa, int8_t *val); 574 575 /** Set function for DFE Tap4. 576 * @param pa phymod_access_t struct 577 * @param val signed input value 578 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 579 */ 580 static err_code_t _set_rx_dfe4( const phymod_access_t *pa, int8_t val); 581 582 /** Get function for DFE Tap4. 583 * @param pa phymod_access_t struct 584 * @param *val DFE4 read value 585 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 586 */ 587 static err_code_t _get_rx_dfe4( const phymod_access_t *pa, int8_t *val); 588 589 /** Set function for DFE Tap5. 590 * @param pa phymod_access_t struct 591 * @param val signed input value 592 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 593 */ 594 static err_code_t _set_rx_dfe5( const phymod_access_t *pa, int8_t val); 595 596 /** Get function for DFE Tap5 597 * @param pa phymod_access_t struct 598 * @param *val DFE5 read value 599 * @return Error Code generated by API (returns ERR_CODE_NONE if no errors) 600 */ 601 static err_code_t _get_rx_dfe5( const phymod_access_t *pa, int8_t *val); 602 603 604 /* Set/Get TX Tap values */ 605 static err_code_t _set_tx_pre( const phymod_access_t *pa, uint8_t val); 606 static err_code_t _set_tx_amp( const phymod_access_t *pa, int8_t val); 607 static err_code_t _get_tx_amp( const phymod_access_t *pa, int8_t *val); 608 static err_code_t _set_tx_main( const phymod_access_t *pa, uint8_t val); 609 static err_code_t _set_tx_post1( const phymod_access_t *pa, uint8_t val); 610 static err_code_t _set_tx_post2( const phymod_access_t *pa, int8_t val); 611 static err_code_t _set_tx_post3( const phymod_access_t *pa, int8_t val); 612 static err_code_t _get_tx_post3( const phymod_access_t *pa, int8_t *val); 613 614 /* Lane Config Struct */ 615 static err_code_t _update_uc_lane_config_st( const phymod_access_t *pa, struct eagle_tsc_uc_lane_config_st *st); 616 static err_code_t _update_uc_lane_config_word( const phymod_access_t *pa, struct eagle_tsc_uc_lane_config_st *st); 617 618 /* Lane User Control Disable Startup Function Struct */ 619 static err_code_t _update_usr_ctrl_disable_functions_st( const phymod_access_t *pa, struct eagle_tsc_usr_ctrl_disable_functions_st *st); 620 static err_code_t _update_usr_ctrl_disable_functions_byte( const phymod_access_t *pa, struct eagle_tsc_usr_ctrl_disable_functions_st *st); 621 622 /* Lane User Control Disable Startup DFE Function Struct */ 623 static err_code_t _update_usr_ctrl_disable_dfe_functions_st( const phymod_access_t *pa, struct eagle_tsc_usr_ctrl_disable_dfe_functions_st *st); 624 static err_code_t _update_usr_ctrl_disable_dfe_functions_byte( const phymod_access_t *pa, struct eagle_tsc_usr_ctrl_disable_dfe_functions_st *st); 625 626 /* Core Config Struct */ 627 static err_code_t _update_uc_core_config_st( const phymod_access_t *pa, struct eagle_tsc_uc_core_config_st *st); 628 static err_code_t _update_uc_core_config_word( const phymod_access_t *pa, struct eagle_tsc_uc_core_config_st *st); 629 630 static uint8_t _eagle_tsc_rdb_uc_var( const phymod_access_t *pa, err_code_t *err_code_p, uint16_t addr); 631 static uint16_t _eagle_tsc_rdw_uc_var( const phymod_access_t *pa, err_code_t *err_code_p, uint16_t addr); 632 static err_code_t _eagle_tsc_wrb_uc_var( const phymod_access_t *pa, uint16_t addr, uint8_t wr_val); 633 static err_code_t _eagle_tsc_wrw_uc_var( const phymod_access_t *pa, uint16_t addr, uint16_t wr_val); 634 static err_code_t _eagle_tsc_display_ber_scan_data( const phymod_access_t *pa, uint8_t ber_scan_mode, uint8_t timer_control, uint8_t max_error_control); 635 636 637 /*--------------------------*/ 638 /* Register field polling */ 639 /*--------------------------*/ 640 641 /** Polls lane variable "usr_diag_status" to verify data is available in uC diag buffer. 642 * It then reads a WORD of data wich is 2 float8_t samples, it converts them to uint32_t 643 * and returns them in the memory pointed to by *data. 644 * Define macro CUSTOM_REG_POLLING to replace the default implementation provided in eagle_tsc_functions.c. 645 * 646 * @param pa phymod_access_t struct 647 * @param *data is pointer to 2 element array of uint32_tpassed from uC through dsc_data 648 * @param *status returns a status byte \n 649 * bit 15 - indicates the ey scan is complete \n 650 * bit 14 - indicates uC is slower than read access \n 651 * bit 13 - indicates uC is faster than read access \n 652 * bit 7-0 - indicates amount of data in the uC buffer 653 * 654 * @param pa phymod_access_t struct 655 * @param timeout_ms Maximum time interval in milliseconds for which the polling is done 656 * @return Error code generated by polling function (returns ERR_CODE_NONE if no errors) 657 */ 658 err_code_t eagle_tsc_poll_diag_eye_data(const phymod_access_t *pa, uint32_t *data, uint16_t *status, uint32_t timeout_ms); 659 660 /** Polls lane variable "usr_diag_status" to verify data is available in uC diag buffer. 661 * Define macro CUSTOM_REG_POLLING to replace the default implementation provided in eagle_tsc_functions.c. 662 * 663 * @param pa phymod_access_t struct 664 * @param *status returns a status byte \n 665 * bit 15 - indicates the ey scan is complete \n 666 * bit 14-0 - reserved for debug 667 * 668 * @param pa phymod_access_t struct 669 * @param timeout_ms Maximum time interval in milliseconds for which the polling is done 670 * @return Error code generated by polling function (returns ERR_CODE_NONE if no errors) 671 */ 672 err_code_t eagle_tsc_poll_diag_done( const phymod_access_t *pa, uint16_t *status, uint32_t timeout_ms); 673 674 /** Polls for register field "uc_dsc_ready_for_cmd" to be 1 within the time interval specified by timeout_ms. 675 * Function returns 0 if polling passes, else it returns error code. 676 * Define macro CUSTOM_REG_POLLING to replace the default implementation provided in eagle_tsc_functions.c. 677 * @param pa phymod_access_t struct 678 * @param timeout_ms Maximum time interval in milliseconds for which the polling is done 679 * @return Error code generated by polling function (returns ERR_CODE_NONE if no errors) 680 */ 681 err_code_t eagle_tsc_poll_uc_dsc_ready_for_cmd_equals_1( const phymod_access_t *pa, uint32_t timeout_ms); 682 683 /** Polls for register field "dsc_state" to be "DSC_STATE_UC_TUNE" 684 * within the time interval specified by timeout_ms. 685 * Function returns 0 if polling passes, else it returns error code. 686 * Define macro CUSTOM_REG_POLLING to replace the default implementation provided in 687 * eagle_tsc_functions.c. 688 * @param pa phymod_access_t struct 689 * @param timeout_ms Maximum time interval in milliseconds for which the polling is done 690 * @return Error code generated by polling function (returns ERR_CODE_NONE if no errors) 691 */ 692 err_code_t eagle_tsc_poll_dsc_state_equals_uc_tune( const phymod_access_t *pa, uint32_t timeout_ms); 693 694 695 696 697 #endif