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merlin16_pcieg3_select_defns.h (1834B)

      1 /*********************************************************************************
      2  *********************************************************************************
      3  *  File Name  :  merlin16_pcieg3_select_defns.h
      4  *  Created On :  29 Sep 2015
      5  *  Created By :  Brent Roberts
      6  *  Description:  Select header files for IP-specific definitions
      7  *  Revision   :  
      8  *  
      9  * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file.
     10  * 
     11  * Copyright 2007-2019 Broadcom Inc. All rights reserved.
     12  *  No portions of this material may be reproduced in any form without
     13  *  the written permission of:
     14  *  
     15  *      Broadcom Corporation
     16  *      5300 California Avenue
     17  *      Irvine, CA  92617
     18  *  
     19  *  All information contained in this document is Broadcom Corporation
     20  *  company private proprietary, and trade secret.
     21  */
     22 
     23  /** @file
     24  * Select IP files to include for API
     25  */
     26 
     27 #ifndef MERLIN16_PCIEG3_API_SELECT_DEFNS_H
     28 #define MERLIN16_PCIEG3_API_SELECT_DEFNS_H
     29 
     30 #include "merlin16_pcieg3_ipconfig.h"
     31 #include "merlin16_pcieg3_field_access.h"
     32 
     33 #   include "merlin16_api_uc_common.h"
     34 
     35 /****************************************************************************
     36  * @name Register Access Macro Inclusions
     37  *
     38  * All cores provide access to hardware control/status registers.
     39  */
     40 /**@{*/
     41 
     42 /**
     43  * This build includes register access macros for the MERLIN16_PCIEG3 core.
     44  */
     45 #include "merlin16_pcieg3_fields.h"
     46 
     47 /**@}*/
     48 
     49 
     50 /****************************************************************************
     51  * @name RAM Access Macro Inclusions
     52  *
     53  * Some cores also provide access to firmware control/status RAM variables.
     54  */
     55 /**@{*/
     56 
     57 /**
     58  * This build includes macros to access Merlin16 microcode RAM variables.
     59  */
     60 #include "merlin16_api_uc_vars_rdwr_defns.h"
     61 /**@}*/
     62 
     63 #endif