tdm_th2_top.h (5685B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * All Rights Reserved.$ 7 * 8 * TDM top header for BCM56970 9 */ 10 11 #ifndef TDM_TH2_PREPROCESSOR_DIRECTIVES_H 12 #define TDM_TH2_PREPROCESSOR_DIRECTIVES_H 13 14 #ifdef _TDM_STANDALONE 15 #include <tdm_th2_defines.h> 16 #else 17 #include <soc/tdm/tomahawk2/tdm_th2_defines.h> 18 #endif 19 20 #define TH2_TOKEN_CHECK(a) \ 21 if (a!=TH2_NUM_EXT_PORTS && \ 22 a!=TH2_OVSB_TOKEN && \ 23 a!=TH2_NULL_TOKEN && \ 24 a!=TH2_RSVD_TOKEN && \ 25 a!=TH2_MGM1_TOKEN && \ 26 a!=TH2_LPB1_TOKEN && \ 27 a!=TH2_MGM2_TOKEN && \ 28 a!=TH2_LPB2_TOKEN && \ 29 a!=TH2_LPB3_TOKEN && \ 30 a!=TH2_CMIC_TOKEN && \ 31 a!=TH2_ANCL_TOKEN && \ 32 a!=TH2_IDL1_TOKEN && \ 33 a!=TH2_IDL2_TOKEN && \ 34 a!=TH2_LPB0_TOKEN) \ 35 36 #define TH2_CMIC(a,b) { \ 37 b[a]=TH2_CMIC_TOKEN; \ 38 TDM_PRINT0("CMIC/CPU\n"); \ 39 break; \ 40 } 41 #define TH2_LPB0(a,b) { \ 42 b[a]=TH2_LPB0_TOKEN; \ 43 TDM_PRINT0("LOOPBACK\n"); \ 44 break; \ 45 } 46 #define TH2_MGM1(a,b) { \ 47 b[a]=TH2_MGM1_TOKEN; \ 48 TDM_PRINT0("MANAGEMENT\n"); \ 49 break; \ 50 } 51 #define TH2_LPB1(a,b) { \ 52 b[a]=TH2_LPB1_TOKEN; \ 53 TDM_PRINT0("TILE 1 LOOPBACK\n"); \ 54 break; \ 55 } 56 #define TH2_MGM2(a,b) { \ 57 b[a]=TH2_MGM2_TOKEN; \ 58 TDM_PRINT0("IDB 2 MANAGEMENT\n"); \ 59 break; \ 60 } 61 #define TH2_LPB2(a,b) { \ 62 b[a]=TH2_LPB2_TOKEN; \ 63 TDM_PRINT0("TILE 2 LOOPBACK\n"); \ 64 break; \ 65 } 66 #define TH2_OPRT(a,b) { \ 67 b[a]=TH2_IDL2_TOKEN; \ 68 TDM_PRINT0("PURGE\n"); \ 69 break; \ 70 } 71 #define TH2_SBUS(a,b) { \ 72 b[a]=TH2_IDL1_TOKEN; \ 73 TDM_PRINT0("SBUS\n"); \ 74 break; \ 75 } 76 #define TH2_NULL(a,b) { \ 77 b[a]=TH2_NULL_TOKEN; \ 78 TDM_PRINT0("NULL\n"); \ 79 break; \ 80 } 81 #define TH2_LPB3(a,b) { \ 82 b[a]=TH2_LPB3_TOKEN; \ 83 TDM_PRINT0("TILE 3 LOOPBACK\n"); \ 84 break; \ 85 } 86 #define TH2_OPT1(a,b) { \ 87 b[a]=TH2_IDL1_TOKEN; \ 88 TDM_PRINT0("OPPORTUNISTIC 1\n"); \ 89 break; \ 90 } 91 #define TH2_IDLE(a,b) { \ 92 b[a]=TH2_IDL2_TOKEN; \ 93 TDM_PRINT0("IDLE\n"); \ 94 break; \ 95 } 96 #define TH2_DOT0(a,b) { \ 97 for (i=0; i<256; i++) { \ 98 if (b[i]==TH2_OVSB_TOKEN) { \ 99 b[a]=TH2_OVSB_TOKEN; \ 100 break; \ 101 } \ 102 else { \ 103 b[a]=TH2_CMIC_TOKEN; \ 104 } \ 105 } \ 106 if (b[a]==TH2_OVSB_TOKEN) { \ 107 TDM_PRINT0("DOT OVERSUB\n"); \ 108 } \ 109 else { \ 110 TDM_PRINT0("DOT CMIC/CPU\n"); \ 111 } \ 112 break; \ 113 } 114 #define TH2_DOT1(a,b) { \ 115 for (i=0; i<256; i++) { \ 116 if (b[i]==TH2_OVSB_TOKEN) { \ 117 b[a]=TH2_OVSB_TOKEN; \ 118 break; \ 119 } \ 120 else { \ 121 b[a]=TH2_MGM1_TOKEN; \ 122 } \ 123 } \ 124 if (b[a]==TH2_OVSB_TOKEN) { \ 125 TDM_PRINT0("DOT OVERSUB\n"); \ 126 } \ 127 else { \ 128 TDM_PRINT0("DOT IDB 1 MANAGEMENT\n"); \ 129 } \ 130 break; \ 131 } 132 #define TH2_DOT2(a,b) { \ 133 for (i=0; i<256; i++) { \ 134 if (b[i]==TH2_OVSB_TOKEN) { \ 135 b[a]=TH2_OVSB_TOKEN; \ 136 break; \ 137 } \ 138 else { \ 139 b[a]=TH2_MGM2_TOKEN; \ 140 } \ 141 } \ 142 if (b[a]==TH2_OVSB_TOKEN) { \ 143 TDM_PRINT0("DOT OVERSUB\n"); \ 144 } \ 145 else { \ 146 TDM_PRINT0("DOT IDB 2 MANAGEMENT\n"); \ 147 } \ 148 break; \ 149 } 150 #define TH2_DOT3(a,b) { \ 151 for (i=0; i<256; i++) { \ 152 if (b[i]==TH2_OVSB_TOKEN) { \ 153 b[a]=TH2_OVSB_TOKEN; \ 154 break; \ 155 } \ 156 else { \ 157 b[a]=TH2_IDL2_TOKEN; \ 158 } \ 159 } \ 160 if (b[a]==TH2_OVSB_TOKEN) { \ 161 TDM_PRINT0("DOT OVERSUB\n"); \ 162 } \ 163 else { \ 164 TDM_PRINT0("DOT PURGE\n"); \ 165 } \ 166 break; \ 167 } 168 169 #ifdef _TDM_STANDALONE 170 #include <tdm_th2_methods.h> 171 #else 172 #include <soc/tdm/tomahawk2/tdm_th2_methods.h> 173 #endif 174 175 /* API shim layer */ 176 LINKER_DECL tdm_mod_t* tdm_chip_th2_shim__which_tsc( int port, int tsc[TH2_NUM_PHY_PM][TH2_NUM_PM_LNS] ); 177 LINKER_DECL tdm_mod_t* tdm_chip_th2_shim__check_ethernet_d( int port, enum port_speed_e speed[TH2_NUM_EXT_PORTS], enum port_state_e state[TH2_NUM_EXT_PORTS], int **tsc, int traffic[TH2_NUM_PM_MOD] ); 178 LINKER_DECL int tdm_chip_th2_shim__core_vbs_scheduler_ovs( tdm_mod_t *_tdm ); 179 180 #endif /* TDM_TH2_PREPROCESSOR_DIRECTIVES_H */