tdm_mn_vec.h (10849B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * All Rights Reserved.$ 7 * 8 * TDM vector library for BCM56860 9 */ 10 11 #ifndef TDM_MN_VECTOR_LIBRARY_H 12 #define TDM_MN_VECTOR_LIBRARY_H 13 /** 14 @name: tdm_mn_vector_load 15 @param: 16 17 Generate vector at index in TDM vector map 18 */ 19 int 20 tdm_mn_vec_load(unsigned short **map, int bw, int port_speed, int yy, int len, int num_ext_ports) 21 { 22 int i, n=0; 23 24 switch (bw) 25 { 26 /* ################################################################################################################## */ 27 case 933: /*NAK AP*/ 28 switch (port_speed) 29 { 30 case 1: 31 map[yy][0] = TOKEN_1G; 32 break; 33 case 10: 34 case 11: 35 /* n=0; 36 for (i=0; i<len; i+=(len/4)) { 37 map[yy][i] = TOKEN_10G; 38 if ((++n)==4) { 39 break; 40 } 41 }*/ 42 map[yy][0] = TOKEN_10G; 43 map[yy][58] = TOKEN_10G; 44 map[yy][116] = TOKEN_10G; 45 map[yy][175] = TOKEN_10G; 46 break; 47 case 12: 48 n=0; 49 for (i=0; i<len; i+=(len/5)) { 50 map[yy][i] = TOKEN_12G; 51 if ((++n)==5) { 52 break; 53 } 54 } 55 break; 56 case 20: 57 case 21: 58 n=0; 59 for (i=0; i<len; i+=(len/8)) { 60 map[yy][i] = TOKEN_20G; 61 if ((++n)==8) { 62 break; 63 } 64 } 65 break; 66 case 40: 67 case 41: 68 case 42: 69 /* n=0; 70 for (i=0; i<len; i+=(len/16)) { 71 map[yy][i] = TOKEN_40G; 72 if ((++n)==16) { 73 break; 74 } 75 }*/ 76 map[yy][0] = TOKEN_40G; 77 map[yy][15] = TOKEN_40G; 78 map[yy][29] = TOKEN_40G; 79 map[yy][44] = TOKEN_40G; 80 map[yy][58] = TOKEN_40G; 81 map[yy][73] = TOKEN_40G; 82 map[yy][87] = TOKEN_40G; 83 map[yy][102] = TOKEN_40G; 84 map[yy][116] = TOKEN_40G; 85 map[yy][131] = TOKEN_40G; 86 map[yy][145] = TOKEN_40G; 87 map[yy][160] = TOKEN_40G; 88 map[yy][174] = TOKEN_40G; 89 map[yy][189] = TOKEN_40G; 90 map[yy][203] = TOKEN_40G; 91 map[yy][218] = TOKEN_40G; 92 break; 93 case 100: 94 case 106: 95 case 107: 96 n=0; 97 for (i=0; i<len; i+=(len/40)) { 98 map[yy][i] = TOKEN_100G; 99 if ((++n)==40) { 100 break; 101 } 102 } 103 break; 104 case 120: 105 n=0; 106 for (i=0; i<len; i+=(len/48)) { 107 map[yy][i] = TOKEN_120G; 108 if ((++n)==48) { 109 break; 110 } 111 } 112 break; 113 case 150: /* for ancl slots*/ 114 map[yy][0] = MN_ANCL_TOKEN; 115 map[yy][26] = MN_ANCL_TOKEN; 116 map[yy][52] = MN_ANCL_TOKEN; 117 map[yy][78] = MN_ANCL_TOKEN; 118 map[yy][104] = MN_ANCL_TOKEN; 119 map[yy][129] = MN_ANCL_TOKEN; 120 map[yy][155] = MN_ANCL_TOKEN; 121 map[yy][181] = MN_ANCL_TOKEN; 122 map[yy][207] = MN_ANCL_TOKEN; 123 break; 124 default: 125 return 0; 126 break; 127 } 128 break; 129 case 793: /* TD2/+ */ 130 case 794: 131 switch (port_speed) 132 { 133 case 1: 134 map[yy][0] = TOKEN_1G; 135 break; 136 case 10: 137 case 11: 138 map[yy][0] = TOKEN_10G; 139 map[yy][50] = TOKEN_10G; 140 map[yy][100] = TOKEN_10G; 141 map[yy][150] = TOKEN_10G; 142 break; 143 case 12: 144 map[yy][0] = TOKEN_12G; 145 map[yy][36] = TOKEN_12G; 146 map[yy][72] = TOKEN_12G; 147 map[yy][120] = TOKEN_12G; 148 map[yy][156] = TOKEN_12G; 149 break; 150 case 20: 151 case 21: 152 for (i=0; i<len; i+=(VECTOR_QUANTA_S*6)) { 153 map[yy][i] = TOKEN_20G; 154 } 155 break; 156 case 25: 157 map[yy][0] = TOKEN_25G; 158 map[yy][20] = TOKEN_25G; 159 map[yy][40] = TOKEN_25G; 160 map[yy][60] = TOKEN_25G; 161 map[yy][80] = TOKEN_25G; 162 map[yy][100] = TOKEN_25G; 163 map[yy][120] = TOKEN_25G; 164 map[yy][140] = TOKEN_25G; 165 map[yy][160] = TOKEN_25G; 166 map[yy][180] = TOKEN_25G; 167 break; 168 case 40: 169 case 41: 170 case 42: 171 /* for (i=0; i<len; i+=(VECTOR_QUANTA_S*3)) { 172 map[yy][i] = TOKEN_40G; 173 }*/ 174 map[yy][0] = TOKEN_40G; 175 map[yy][12] = TOKEN_40G; 176 map[yy][25] = TOKEN_40G; 177 map[yy][37] = TOKEN_40G; 178 map[yy][50] = TOKEN_40G; 179 map[yy][62] = TOKEN_40G; 180 map[yy][75] = TOKEN_40G; 181 map[yy][87] = TOKEN_40G; 182 map[yy][100] = TOKEN_40G; 183 map[yy][112] = TOKEN_40G; 184 map[yy][125] = TOKEN_40G; 185 map[yy][137] = TOKEN_40G; 186 map[yy][150] = TOKEN_40G; 187 map[yy][162] = TOKEN_40G; 188 map[yy][175] = TOKEN_40G; 189 map[yy][187] = TOKEN_40G; 190 break; 191 case 100: 192 case 106: 193 case 107: 194 /*for (i=0; i<len; i+=(VECTOR_QUANTA_S*6)) { 195 map[yy][i] = TOKEN_100G; 196 map[yy][i+5] = TOKEN_100G; 197 map[yy][i+10] = TOKEN_100G; 198 map[yy][i+15] = TOKEN_100G; 199 map[yy][i+19] = TOKEN_100G; 200 } 201 break;*/ 202 n=0; 203 for (i=0; i<len; i+=(len/40)) { 204 map[yy][i] = TOKEN_100G; 205 if ((++n)==40) { 206 break; 207 } 208 } 209 break; 210 case 108: 211 for (i=0; i<len; i+=(VECTOR_QUANTA_S)) { 212 map[yy][i] = TOKEN_100G; 213 } 214 break; 215 case 109: 216 for (i=0; i<len; i+=(VECTOR_QUANTA_S)) { 217 map[yy][i] = TOKEN_100G; 218 } 219 for (i=(VECTOR_QUANTA_S*5); i<len; i+=(VECTOR_QUANTA_S*6)) { 220 map[yy][i] = num_ext_ports; 221 } 222 break; 223 case 120: 224 for (i=0; i<len; i+=(VECTOR_QUANTA_S)) { 225 map[yy][i] = TOKEN_120G; 226 } 227 break; 228 case 150: /* for ancl slots*/ 229 map[yy][0] = MN_ANCL_TOKEN; 230 map[yy][25] = MN_ANCL_TOKEN; 231 map[yy][50] = MN_ANCL_TOKEN; 232 map[yy][75] = MN_ANCL_TOKEN; 233 map[yy][100] = MN_ANCL_TOKEN; 234 map[yy][150] = MN_ANCL_TOKEN; 235 map[yy][175] = MN_ANCL_TOKEN; 236 map[yy][199] = MN_ANCL_TOKEN; 237 break; 238 default: 239 return 0; 240 break; 241 } 242 break; 243 case 575: 244 switch (port_speed) 245 { 246 case 1: 247 map[yy][0] = TOKEN_1G; 248 break; 249 case 10: 250 case 11: 251 map[yy][0] = TOKEN_10G; 252 map[yy][36] = TOKEN_10G; 253 map[yy][72] = TOKEN_10G; 254 map[yy][108] = TOKEN_10G; 255 break; 256 case 12: 257 n=0; 258 for (i=0; i<len; i+=(len/5)) { 259 map[yy][i] = TOKEN_40G; 260 if ((++n)==5) { 261 break; 262 } 263 } 264 break; 265 case 20: 266 case 21: 267 map[yy][0] = TOKEN_20G; 268 map[yy][36] = TOKEN_20G; 269 map[yy][72] = TOKEN_20G; 270 map[yy][109] = TOKEN_20G; 271 map[yy][18] = TOKEN_20G; 272 map[yy][54] = TOKEN_20G; 273 map[yy][90] = TOKEN_20G; 274 map[yy][127] = TOKEN_20G; 275 break; 276 case 40: 277 case 41: 278 case 42: 279 /*n=0; 280 for (i=0; i<len; i+=(len/16)) { 281 map[yy][i] = TOKEN_40G; 282 if ((++n)==16) { 283 break; 284 } 285 }*/ 286 map[yy][0] = TOKEN_40G; /*use 9 and 10*/ 287 map[yy][9] = TOKEN_40G; 288 map[yy][18] = TOKEN_40G; 289 map[yy][27] = TOKEN_40G; 290 map[yy][36] = TOKEN_40G; 291 map[yy][45] = TOKEN_40G; 292 map[yy][54] = TOKEN_40G; 293 map[yy][63] = TOKEN_40G; 294 map[yy][72] = TOKEN_40G; 295 map[yy][81] = TOKEN_40G; 296 map[yy][90] = TOKEN_40G; 297 map[yy][99] = TOKEN_40G; 298 map[yy][108] = TOKEN_40G; 299 map[yy][117] = TOKEN_40G; 300 map[yy][126] = TOKEN_40G; 301 map[yy][135] = TOKEN_40G; 302 break; 303 case 100: 304 n=0; 305 for (i=0; i<len; i+=(len/40)) { 306 map[yy][i] = TOKEN_100G; 307 if ((++n)==40) { 308 break; 309 } 310 } 311 break; 312 case 120: 313 n=0; 314 for (i=0; i<len; i+=(len/48)) { 315 map[yy][i] = TOKEN_120G; 316 if ((++n)==48) { 317 break; 318 } 319 } 320 break; 321 case 150: /* for ancl slots*/ 322 map[yy][17] = MN_ANCL_TOKEN; 323 map[yy][26] = MN_ANCL_TOKEN; 324 map[yy][53] = MN_ANCL_TOKEN; 325 map[yy][62] = MN_ANCL_TOKEN; 326 map[yy][89] = MN_ANCL_TOKEN; 327 map[yy][98] = MN_ANCL_TOKEN; 328 map[yy][125] = MN_ANCL_TOKEN; 329 map[yy][134] = MN_ANCL_TOKEN; 330 map[yy][144] = MN_ANCL_TOKEN; 331 break; 332 default: 333 return 0; 334 break; 335 } 336 break; 337 case 510: 338 switch (port_speed) 339 { 340 case 1: 341 map[yy][0] = TOKEN_1G; 342 break; 343 case 10: 344 case 11: 345 n=0; 346 for (i=0; i<len; i+=(len/4)) { 347 map[yy][i] = TOKEN_10G; 348 if ((++n)==4) { 349 break; 350 } 351 } 352 break; 353 case 12: 354 n=0; 355 for (i=0; i<len; i+=(len/5)) { 356 map[yy][i] = TOKEN_12G; 357 if ((++n)==5) { 358 break; 359 } 360 } 361 break; 362 case 20: 363 case 21: 364 n=0; 365 for (i=0; i<len; i+=(len/8)) { 366 map[yy][i] = TOKEN_20G; 367 if ((++n)==8) { 368 break; 369 } 370 } 371 break; 372 case 40: 373 case 41: 374 case 42: 375 case 43: 376 case 44: 377 case 45: 378 n=0; 379 for (i=0; i<len; i+=(len/16)) { 380 map[yy][i] = TOKEN_40G; 381 if ((++n)==16) { 382 break; 383 } 384 } 385 break; 386 default: 387 return 0; 388 break; 389 } 390 break; 391 case 435: 392 switch (port_speed) 393 { 394 case 1: 395 map[yy][0] = TOKEN_1G; 396 break; 397 case 10: 398 case 11: 399 map[yy][0] = TOKEN_10G; 400 map[yy][27] = TOKEN_10G; 401 map[yy][55] = TOKEN_10G; 402 map[yy][82] = TOKEN_10G; 403 break; 404 case 12: 405 map[yy][0] = TOKEN_12G; 406 map[yy][19] = TOKEN_12G; 407 map[yy][39] = TOKEN_12G; 408 map[yy][58] = TOKEN_12G; 409 map[yy][78] = TOKEN_12G; 410 break; 411 case 20: 412 case 21: 413 map[yy][0] = TOKEN_20G; 414 map[yy][14] = TOKEN_20G; 415 map[yy][28] = TOKEN_20G; 416 map[yy][41] = TOKEN_20G; 417 map[yy][55] = TOKEN_20G; 418 map[yy][69] = TOKEN_20G; 419 map[yy][82] = TOKEN_20G; 420 map[yy][96] = TOKEN_20G; 421 break; 422 case 40: 423 case 41: 424 case 42: 425 map[yy][0] = TOKEN_40G; /*use 7 and 5*/ 426 map[yy][7] = TOKEN_40G; 427 map[yy][14] = TOKEN_40G; 428 map[yy][21] = TOKEN_40G; 429 map[yy][28] = TOKEN_40G; 430 map[yy][35] = TOKEN_40G; 431 map[yy][42] = TOKEN_40G; 432 map[yy][49] = TOKEN_40G; 433 map[yy][56] = TOKEN_40G; 434 map[yy][63] = TOKEN_40G; 435 map[yy][70] = TOKEN_40G; 436 map[yy][77] = TOKEN_40G; 437 map[yy][82] = TOKEN_40G; 438 map[yy][89] = TOKEN_40G; 439 map[yy][96] = TOKEN_40G; 440 map[yy][103] = TOKEN_40G; 441 break; 442 case 150: /* for ancl slots*/ 443 map[yy][6] = MN_ANCL_TOKEN; 444 map[yy][13] = MN_ANCL_TOKEN; 445 map[yy][33] = MN_ANCL_TOKEN; 446 map[yy][40] = MN_ANCL_TOKEN; 447 map[yy][54] = MN_ANCL_TOKEN; 448 map[yy][61] = MN_ANCL_TOKEN; 449 map[yy][68] = MN_ANCL_TOKEN; 450 map[yy][88] = MN_ANCL_TOKEN; 451 map[yy][95] = MN_ANCL_TOKEN; 452 map[yy][109] = MN_ANCL_TOKEN; 453 break; 454 default: 455 return 0; 456 break; 457 } 458 break; 459 default: 460 switch (port_speed) 461 { 462 default: 463 return 0; 464 break; 465 } 466 } 467 468 return 1; 469 470 } 471 #endif /* TDM_MN_VECTOR_LIBRARY_H */