tdm_mn_top.h (4832B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * All Rights Reserved.$ 7 * 8 * TDM top header for BCM56860 9 */ 10 11 #ifndef TDM_MN_PREPROCESSOR_DIRECTIVES_H 12 #define TDM_MN_PREPROCESSOR_DIRECTIVES_H 13 14 #ifdef _TDM_STANDALONE 15 #include <tdm_mn_defines.h> 16 #else 17 #include <soc/tdm/monterey/tdm_mn_defines.h> 18 #endif 19 20 21 /* Excludes all tokenized port numbers */ 22 #define MN_TOKEN_CHECK(a) \ 23 if (a!=MN_NUM_EXT_PORTS && \ 24 a!=MN_OVSB_TOKEN && \ 25 a!=MN_IDL1_TOKEN && \ 26 a!=MN_AUX_TOKEN && \ 27 a!=MN_IDL2_TOKEN && \ 28 a!=MN_ANCL_TOKEN && \ 29 a!=MN_SBUS_TOKEN && \ 30 a!=MN_MGMT_TOKEN && \ 31 a!=MN_US1G_TOKEN && \ 32 a!=MN_LOOPBACK_PORT && \ 33 a!=MN_MACSEC_PORT && \ 34 a!=MN_CPU_PORT) \ 35 36 /* Excludes all tokenized port numbers except OVS */ 37 #define MN_OVS_TOKEN_CHECK(a) \ 38 if (a!=MN_NUM_EXT_PORTS && \ 39 a!=MN_IDL1_TOKEN && \ 40 a!=MN_AUX_TOKEN && \ 41 a!=MN_IDL2_TOKEN && \ 42 a!=MN_ANCL_TOKEN && \ 43 a!=MN_MGMT_TOKEN && \ 44 a!=MN_US1G_TOKEN && \ 45 a!=MN_LOOPBACK_PORT && \ 46 a!=MN_CPU_PORT) \ 47 48 #define MN_CMIC(a) { \ 49 mmu_tdm_tbl[a]=MN_CPU_PORT; \ 50 TDM_PRINT0("CMIC\n"); \ 51 break; \ 52 } 53 #define MN_LPBK(a) { \ 54 mmu_tdm_tbl[a]=MN_LOOPBACK_PORT; \ 55 TDM_PRINT0("LOOPBACK\n"); \ 56 break; \ 57 } 58 #define MN_IDLE(a) { \ 59 mmu_tdm_tbl[a]=MN_NUM_EXT_PORTS; \ 60 TDM_PRINT0("IDLE\n"); \ 61 break; \ 62 } 63 #define MN_MACSEC(a) { \ 64 mmu_tdm_tbl[a]=MN_MACSEC_PORT; \ 65 TDM_PRINT0("MACSEC\n"); \ 66 break; \ 67 } 68 #define MN_ANCL(a) { \ 69 mmu_tdm_tbl[a]=MN_AUX_TOKEN; \ 70 TDM_PRINT0("AUXILLARY\n"); \ 71 break; \ 72 } 73 #define MN_SBUS(a) { \ 74 mmu_tdm_tbl[a]=MN_SBUS_TOKEN; \ 75 TDM_PRINT0("SBUS\n"); \ 76 break; \ 77 } 78 #define MN_REFR(a) { \ 79 mmu_tdm_tbl[a]=MN_IDL2_TOKEN; \ 80 TDM_PRINT0("REFRESH\n"); \ 81 break; \ 82 } 83 84 #define IARB_MAIN_TDM__TDM_SLOT_PGW_0 0 85 #define IARB_MAIN_TDM__TDM_SLOT_PGW_1 1 86 #define IARB_MAIN_TDM__TDM_SLOT_CMIC_PORT 2 87 #define IARB_MAIN_TDM__TDM_SLOT_EP_LOOPBACK 3 88 #define IARB_MAIN_TDM__TDM_SLOT_RDB_PORT 4 89 #define IARB_MAIN_TDM__TDM_SLOT_RESERVED 6 90 #define IARB_MAIN_TDM__TDM_SLOT_AUX_OPS_SLOT 7 91 92 typedef struct mn_ll_node { 93 unsigned short port; 94 struct mn_ll_node *next; 95 } mn_ll_node; 96 97 typedef struct { 98 int pgw_tdm_tbl_x0[MN_LR_LLS_LEN]; 99 int ovs_tdm_tbl_x0[MN_OS_LLS_GRP_LEN]; 100 int ovs_spacing_x0[MN_OS_LLS_GRP_LEN]; 101 int pgw_tdm_tbl_x1[MN_LR_LLS_LEN]; 102 int ovs_tdm_tbl_x1[MN_OS_LLS_GRP_LEN]; 103 int ovs_spacing_x1[MN_OS_LLS_GRP_LEN]; 104 int iarb_tdm_tbl_x[MN_LR_IARB_STATIC_LEN]; 105 int op_flags_x[NUM_OP_FLAGS]; 106 } mn_tdm_pgw_t; 107 108 typedef struct { 109 int tdm_pipe_main[MN_LR_VBS_LEN]; 110 int tdm_ovs_grp_0[MN_OS_VBS_GRP_LEN]; 111 int tdm_ovs_grp_1[MN_OS_VBS_GRP_LEN]; 112 int tdm_ovs_grp_2[MN_OS_VBS_GRP_LEN]; 113 int tdm_ovs_grp_3[MN_OS_VBS_GRP_LEN]; 114 int tdm_ovs_grp_4[MN_OS_VBS_GRP_LEN]; 115 int tdm_ovs_grp_5[MN_OS_VBS_GRP_LEN]; 116 int tdm_ovs_grp_6[MN_OS_VBS_GRP_LEN]; 117 int tdm_ovs_grp_7[MN_OS_VBS_GRP_LEN]; 118 } mn_tdm_pipe_t; 119 120 typedef struct { 121 enum port_speed_e speed[MN_NUM_EXT_PORTS]; 122 int clk_freq; 123 enum port_state_e port_rates_array[MN_NUM_EXT_PORTS]; 124 int pm_encap_type[MN_NUM_PM_MOD]; 125 int cl_flag; 126 int num_1g; 127 } mn_tdm_globals_t; 128 129 typedef struct { 130 int pmap[MN_NUM_PHY_PM][MN_NUM_PM_LNS]; 131 mn_tdm_pipe_t tdm_pipe_table_x; 132 mn_tdm_globals_t tdm_globals; 133 mn_tdm_pgw_t tdm_pgw; 134 } tdm_mn_chip_legacy_t; 135 typedef enum { 136 MN_PGW_OS_FALCN_800G =0x0, 137 MN_PGW_OS_FALCN_1000G =0x1, 138 MN_PGW_OS_1000G =0x2 /* New OS Support */ 139 } mn_pgw_os_tdm_sel_e; 140 141 142 #ifdef _TDM_STANDALONE 143 #include <tdm_mn_methods.h> 144 #else 145 #include <soc/tdm/monterey/tdm_mn_methods.h> 146 #endif 147 148 /* API shim layer */ 149 LINKER_DECL int tdm_chip_mn_shim_core( tdm_mod_t *_tdm, tdm_mn_chip_legacy_t *_tdm_mn ); 150 LINKER_DECL int tdm_chip_mn_shim__ing_wrap( tdm_mod_t *_tdm, tdm_mn_chip_legacy_t *_tdm_mn ); 151 LINKER_DECL int tdm_chip_mn_shim__egr_wrap( tdm_mod_t *_tdm, tdm_mn_chip_legacy_t *_tdm_mn ); 152 LINKER_DECL tdm_mod_t* tdm_chip_mn_shim__which_tsc_alloc( int port, int tsc[MN_NUM_PHY_PM][MN_NUM_PM_LNS] ); 153 LINKER_DECL int tdm_chip_mn_shim__which_tsc_free( tdm_mod_t *_tdm ); 154 LINKER_DECL tdm_mod_t* tdm_chip_mn_shim__check_ethernet( int port, enum port_speed_e speed[MN_NUM_EXT_PORTS], int tsc[MN_NUM_PHY_PM][MN_NUM_PM_LNS], int traffic[MN_NUM_PM_MOD] ); 155 LINKER_DECL tdm_mod_t* tdm_chip_mn_shim__check_ethernet_d( int port, enum port_speed_e speed[MN_NUM_EXT_PORTS], enum port_state_e state[MN_NUM_EXT_PORTS], int **tsc, int traffic[MN_NUM_PM_MOD] ); 156 LINKER_DECL int tdm_chip_mn_shim__core_vbs_scheduler_ovs( tdm_mod_t *_tdm ); 157 158 159 #endif /* TDM_MN_PREPROCESSOR_DIRECTIVES_H */