sbusdma.h (11307B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * 7 * File: sbusdma.h 8 * Purpose: Maps out structures used for SBUSDMA operations and 9 * exports routines. 10 */ 11 12 #ifndef _SOC_SBUSDMA_H 13 #define _SOC_SBUSDMA_H 14 15 #include <soc/defs.h> 16 #include <soc/types.h> 17 #include <sal/types.h> 18 #include <sal/core/time.h> 19 #include <sal/core/sync.h> 20 #include <sal/core/thread.h> 21 22 #define SOC_SBUSDMA_TYPE_TDMA 0 23 #define SOC_SBUSDMA_TYPE_SLAM 1 24 #define SOC_SBUSDMA_TYPE_DESC 2 25 26 /* The following define to be used to create software structures only, 27 it doesn't represent actual number of channels in CMC hardware. 28 This should be the greater of number of channels per CMC in all 29 CMIC versions. As of now CMICX has 4 channels vs 3 channels in 30 prior CMIC versions, so this is set to 4 */ 31 #define SOC_SBUSDMA_CH_PER_CMC (4) 32 33 /***** Register mode stuff *****/ 34 typedef struct soc_sbusdma_reg_param_s { 35 soc_mem_t mem; 36 int array_id_start; 37 int array_id_end; 38 int index_begin; 39 int index_end; 40 int data_beats; 41 int copyno; 42 int flags; 43 uint8 mem_clear; 44 void *buffer; 45 int vchan; 46 }soc_sbusdma_reg_param_t; 47 48 extern int 49 _soc_mem_array_sbusdma_read(int unit, soc_mem_t mem, unsigned array_index, 50 int copyno, int index_min, int index_max, 51 uint32 ser_flags, void *buffer, int vchan); 52 extern int 53 _soc_mem_sbusdma_read(int unit, soc_mem_t mem, int copyno, 54 int index_min, int index_max, 55 uint32 ser_flags, void *buffer); 56 extern int 57 _soc_mem_array_sbusdma_write(int unit, int flags, soc_mem_t mem, 58 unsigned array_index_start, 59 unsigned array_index_end, int copyno, 60 int index_begin, int index_end, 61 void *buffer, uint8 mem_clear, 62 int clear_buf_ent, int vchan); 63 extern int 64 _soc_mem_sbusdma_write(int unit, soc_mem_t mem, int copyno, 65 int index_begin, int index_end, 66 void *buffer, uint8 mem_clear, int clear_buf_ent); 67 extern int 68 _soc_mem_sbusdma_clear(int unit, soc_mem_t mem, int copyno, void *null_entry); 69 70 extern int 71 _soc_mem_sbusdma_clear_specific(int unit, soc_mem_t mem, 72 unsigned array_index_min, unsigned array_index_max, 73 int copyno, 74 int index_min, int index_max, 75 void *null_entry); 76 77 /***** Descriptor mode stuff *****/ 78 #define SOC_SBUSDMA_CTRL_LAST (1<<31) 79 #define SOC_SBUSDMA_CTRL_NOT_LAST ~(1<<31) 80 #define SOC_SBUSDMA_CTRL_SKIP (1<<30) 81 #define SOC_SBUSDMA_CTRL_NOT_SKIP ~(1<<30) 82 #define SOC_SBUSDMA_CTRL_JUMP (1<<29) 83 #define SOC_SBUSDMA_CTRL_NOT_JUMP ~(1<<29) 84 #define SOC_SBUSDMA_CTRL_APND (1<<28) 85 #define SOC_SBUSDMA_CTRL_NOT_APND ~(1<<28) 86 #define SOC_SBUSDMA_CTRL_DSEC_REMAIN_SHIFT (24) 87 #define SOC_SBUSDMA_CTRL_DSEC_REMAIN_MASK (0x0F << 24) 88 89 90 /* Public structures and routines */ 91 92 typedef int sbusdma_desc_handle_t; 93 /* status: Non-zero value indicates an error */ 94 typedef void (*soc_sbd_dm_cb_f)(int unit, int status, 95 sbusdma_desc_handle_t handle, void *data); 96 typedef void (*soc_sbd_dm_pc_f)(int unit, sbusdma_desc_handle_t handle, void *data); 97 98 typedef struct { 99 /* Used to indicate that the supplied h/w descriptor info should be used 100 and not generated internally by the create routine */ 101 #define SOC_SBUSDMA_CFG_USE_SUPPLIED_DESC 0x001 102 /* Used to indicate that this is a h/w managed descriptor */ 103 #define SOC_SBUSDMA_CFG_DESC_HW_MANAGED 0x002 104 /* Used to indicate that the flags provided in desc_cfg should be used 105 instead of the flags in desc_ctrl, this allows having register and memory writes 106 in the same descriptor chain. */ 107 #define SOC_SBUSDMA_CFG_USE_FLAGS 0x004 108 /* Indicates that the opcode in the descriptor contains a write command */ 109 #define SOC_SBUSDMA_WRITE_CMD_MSG 0x010 110 /* Indicates that the opcode in the descriptor contains a memory read/write */ 111 #define SOC_SBUSDMA_MEMORY_CMD_MSG 0x100 112 /* Indicates that the counter is implemented as a memory in the h/w */ 113 #define SOC_SBUSDMA_CFG_COUNTER_IS_MEM 0x100 114 /* Indicates dma to floor */ 115 #define SOC_SBUSDMA_CFG_NO_BUFF 0x200 116 /* Indicates if prefetch enable is set */ 117 #define SOC_SBUSDMA_CFG_PREFETCH_ENB 0x400 118 /* Indicates that MOR dma is used */ 119 #define SOC_SBUSDMA_CFG_MOR 0x1000 120 uint32 flags; 121 char name[16]; /* Descriptor name */ 122 uint32 cfg_count; /* Number of items in descriptor chain (1: single descriptor mode) */ 123 void *hw_desc; /* Custom hw descriptor info (Optional). 124 Valid only when SOC_SBUSDMA_CFG_USE_SUPPLIED_DESC is set */ 125 void *buff; /* Common/contiguous host memory buffer for the complete chain */ 126 soc_sbd_dm_cb_f cb; /* Callback function for completion */ 127 void *data; /* Caller's data transparently returned in callback */ 128 soc_sbd_dm_pc_f pc; /* Preconfig function for specific DMA mode */ 129 void *pc_data; /* Caller's data transparently returned in preconfig function */ 130 } soc_sbusdma_desc_ctrl_t; 131 132 typedef struct { 133 /* NOTE: If hw_desc is used from desc_ctrl then the following 134 are ignored: blk, acc_type, addr, width, count, addr_shift */ 135 int acc_type; /* access type */ 136 uint32 blk; /* Schan block number */ 137 uint32 addr; /* Schan addr */ 138 uint32 width; /* Counter width */ 139 uint32 count; /* Number of counter entries */ 140 uint32 addr_shift; /* Gap between individual counters (refer h/w spec for details). 141 NOTE: this value should be the same for all counters in a descriptor */ 142 void *buff; /* Specific host memory buffer for each descriptor. 143 NOTE: 'buff' is used only if the supplied common/continuous 144 buffer in desc_ctrl is NULL */ 145 uint32 flags; /* Used instead of desc_ctrl flags if the SOC_SBUSDMA_CFG_USE_FLAGS is provided */ 146 uint32 mem_clear; /* indicate a mem clear (init full tables with a single entry) */ 147 } soc_sbusdma_desc_cfg_t; 148 149 extern int 150 soc_sbusdma_desc_create(int unit, soc_sbusdma_desc_ctrl_t *ctrl, 151 soc_sbusdma_desc_cfg_t *cfg, 152 sbusdma_desc_handle_t *desc_handle); 153 /* Note: cfg should point to an array with an allocation of at least ctrl->cfg_count entries */ 154 extern int 155 soc_sbusdma_desc_get(int unit, sbusdma_desc_handle_t desc_handle, 156 soc_sbusdma_desc_ctrl_t *ctrl, 157 soc_sbusdma_desc_cfg_t *cfg); 158 extern int 159 soc_sbusdma_desc_get_state(int unit, sbusdma_desc_handle_t desc_handle, 160 uint8 *state); 161 /* NOTE: cfg_index only applies to multiple descriptors */ 162 extern int 163 soc_sbusdma_desc_skip(int unit, sbusdma_desc_handle_t desc_handle, 164 uint16 cfg_index); 165 extern int 166 soc_sbusdma_desc_delete(int unit, sbusdma_desc_handle_t desc_handle); 167 /* NOTE: cfg_index only applies to multiple descriptors */ 168 extern int 169 soc_sbusdma_desc_update(int unit, sbusdma_desc_handle_t desc_handle, 170 uint16 cfg_index, 171 soc_sbusdma_desc_ctrl_t *ctrl, 172 soc_sbusdma_desc_cfg_t *cfg); 173 extern int 174 soc_sbusdma_desc_extend(int unit, sbusdma_desc_handle_t desc_handle, 175 soc_sbusdma_desc_ctrl_t *ctrl, 176 soc_sbusdma_desc_cfg_t *cfg); 177 extern int 178 soc_sbusdma_desc_run(int unit, sbusdma_desc_handle_t desc_handle); 179 extern int 180 soc_sbusdma_desc_start(int unit, sbusdma_desc_handle_t desc_handle); 181 extern int 182 soc_sbusdma_ch_endian_set(int unit, int cmc, int ch, int be); 183 extern uint32 184 soc_sbusdma_cmc_max_num_ch_get(int unit); 185 186 /******************************************* 187 * @function soc_sbusdma_ch_try_get 188 * purpose get idle channel on cmc 189 * 190 * @param unit [in] unit # 191 * @param cmc [out] cmc number 192 * @param ch [out] channel number 193 * 194 * @returns SOC_E_BUSY 195 * @returns SOC_E_NONE 196 * 197 * @end 198 */ 199 extern int 200 soc_sbusdma_ch_try_get(int unit, int cmc, int ch); 201 202 /******************************************* 203 * @function soc_sbusdma_ch_put 204 * purpose put back the freed channel on cmc 205 * 206 * @param cmc [in] cmc number 207 * @param ch [in] channel number 208 * 209 * @returns SOC_E_PARAM 210 * @returns SOC_E_NONE 211 * 212 * @end 213 */ 214 extern int 215 soc_sbusdma_ch_put(int unit, int cmc, int ch); 216 217 218 /* Private structures and routines */ 219 #define SOC_SBUSDMA_MAX_DESC 600 220 typedef struct _soc_sbusdma_state_s { /* s/w state maintenance structure */ 221 sbusdma_desc_handle_t handle; 222 soc_sbusdma_desc_ctrl_t ctrl; 223 soc_sbusdma_desc_cfg_t *cfg; 224 void *desc; 225 uint8 status; 226 } _soc_sbusdma_state_t; 227 228 typedef struct { 229 sal_mutex_t lock; 230 sal_usecs_t timeout; 231 sal_sem_t intr; 232 int intrEnb; 233 char name[16]; 234 VOL sal_thread_t pid; 235 uint32 count; 236 uint8 init; 237 uint8 active; 238 _soc_sbusdma_state_t *working; 239 uint32 _working; 240 _soc_sbusdma_state_t *handles[SOC_SBUSDMA_MAX_DESC+1]; 241 } soc_sbusdma_desc_info_t; 242 243 #define SOC_SBUSDMA_DM_INFO(unit) \ 244 SOC_SBUSDMA_INFO(unit) 245 #define SOC_SBUSDMA_DM_MUTEX(unit) \ 246 SOC_SBUSDMA_DM_INFO(unit)->lock 247 #define SOC_SBUSDMA_DM_TO(unit) \ 248 SOC_SBUSDMA_DM_INFO(unit)->timeout 249 #define SOC_SBUSDMA_DM_INTR(unit) \ 250 SOC_SBUSDMA_DM_INFO(unit)->intr 251 #define SOC_SBUSDMA_DM_INTRENB(unit) \ 252 SOC_SBUSDMA_DM_INFO(unit)->intrEnb 253 #define SOC_SBUSDMA_DM_NAME(unit) \ 254 SOC_SBUSDMA_DM_INFO(unit)->name 255 #define SOC_SBUSDMA_DM_PID(unit) \ 256 SOC_SBUSDMA_DM_INFO(unit)->pid 257 #define SOC_SBUSDMA_DM_START(unit) \ 258 SOC_SBUSDMA_DM_INFO(unit)->start 259 #define SOC_SBUSDMA_DM_LAST(unit) \ 260 SOC_SBUSDMA_DM_INFO(unit)->last 261 #define SOC_SBUSDMA_DM_COUNT(unit) \ 262 SOC_SBUSDMA_DM_INFO(unit)->count 263 #define SOC_SBUSDMA_DM_INIT(unit) \ 264 SOC_SBUSDMA_DM_INFO(unit)->init 265 #define SOC_SBUSDMA_DM_ACTIVE(unit) \ 266 SOC_SBUSDMA_DM_INFO(unit)->active 267 #define SOC_SBUSDMA_DM_WORKING(unit) \ 268 SOC_SBUSDMA_DM_INFO(unit)->working 269 #define SOC_SBUSDMA_DM_HANDLES(unit) \ 270 SOC_SBUSDMA_DM_INFO(unit)->handles 271 272 extern int soc_sbusdma_reg_init(int unit); 273 extern int soc_sbusdma_init(int unit, int interval, uint8 intrEnb); 274 extern int soc_sbusdma_desc_detach(int unit); 275 276 extern int _soc_l2mod_start(int unit, uint32 flags, sal_usecs_t interval); 277 extern int _soc_l2mod_stop(int unit); 278 279 extern int _soc_l2mod_sbus_fifo_field_set(int unit, soc_field_t field, int enable); 280 extern int _soc_l2mod_sbus_fifo_field_get(int unit, soc_field_t field, int *enable); 281 282 extern int _soc_cmicx_l2mod_start(int unit, uint32 flags, sal_usecs_t interval); 283 extern int _soc_cmicx_l2mod_stop(int unit); 284 285 extern int _soc_cmicx_l2mod_sbus_fifo_field_set(int unit, soc_field_t field, int enable); 286 extern int _soc_cmicx_l2mod_sbus_fifo_field_get(int unit, soc_field_t field, int *enable); 287 288 extern void _soc_sbusdma_curr_op_details(int unit, int cmc, int ch); 289 290 #endif /* !_SOC_SBUSDMA_H */