portmod_chain.h (38620B)
1 /* 2 * 3 * 4 * 5 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 6 * 7 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 8 */ 9 10 #ifndef _PORTMOD_CHAIN_H_ 11 #define _PORTMOD_CHAIN_H_ 12 13 #define MAX_VARS_PER_XPHY_BUFFER 13 14 15 int portmod_phychain_ext_phy_info_set(int unit, int phyn, int core_index, const portmod_ext_phy_core_info_t* core_info); 16 int portmod_phychain_ext_phy_info_get(int unit, int phyn, int core_index, portmod_ext_phy_core_info_t* core_info); 17 18 19 int portmod_ext_phy_core_info_t_init(int unit, portmod_ext_phy_core_info_t* portmod_ext_phy_core_info); 20 21 int portmod_chain_xphy_add_by_index(int unit, int xphy_idx, int xphy_addr, const phymod_core_access_t* core_access); 22 int portmod_chain_xphy_add(int unit, int xphy_addr, const phymod_core_access_t* core_access, int *xphy_idx_out); 23 int portmod_chain_xphy_user_access_store(int unit, int xphy_idx, void* user_acc); 24 void portmod_chain_xphy_user_access_release (int unit); 25 26 int portmod_chain_xphy_delete(int unit, int xphy_addr); 27 int portmod_chain_xphy_delete_all(int unit); 28 int portmod_xphy_core_access_set(int unit, uint32 xphy_addr, phymod_core_access_t *core_access, int is_legacy_phy); 29 int portmod_xphy_core_access_get(int unit, uint32 xphy_addr, phymod_core_access_t *core_access, int *is_legacy_phy); 30 int portmod_xphy_core_config_set(int unit, uint32 xphy_addr, phymod_core_init_config_t* core_config); 31 int portmod_xphy_core_config_get(int unit, uint32 xphy_addr, phymod_core_init_config_t* core_config); 32 int portmod_xphy_is_initialized_set(int unit, uint32 xphy_addr, int is_initialized); 33 int portmod_xphy_is_initialized_get(int unit, uint32 xphy_addr, int* is_initialized); 34 int portmod_xphy_phy_type_set(int unit, uint32 xphy_addr, phymod_dispatch_type_t phy_type); 35 int portmod_xphy_phy_type_get(int unit, uint32 xphy_addr, phymod_dispatch_type_t* phy_type); 36 int portmod_xphy_is_legacy_phy_set(int unit, uint32 xphy_addr, int is_legacy_phy); 37 int portmod_xphy_is_legacy_phy_get(int unit, uint32 xphy_addr, int* is_legacy_phy); 38 int portmod_xphy_ref_clk_set(int unit, uint32 xphy_addr, phymod_ref_clk_t ref_clk); 39 int portmod_xphy_ref_clk_get(int unit, uint32 xphy_addr, phymod_ref_clk_t* ref_clk); 40 int portmod_xphy_fw_load_method_set(int unit, uint32 xphy_addr, phymod_firmware_load_method_t fw_load_method); 41 int portmod_xphy_fw_load_method_get(int unit, uint32 xphy_addr, phymod_firmware_load_method_t* fw_load_method); 42 int portmod_xphy_force_fw_load_set(int unit, uint32 xphy_addr, int force_fw_load); 43 int portmod_xphy_force_fw_load_get(int unit, uint32 xphy_addr, int* force_fw_load); 44 int portmod_xphy_polarity_set(int unit, uint32 xphy_addr, phymod_polarity_t polarity); 45 int portmod_xphy_polarity_get(int unit, uint32 xphy_addr, phymod_polarity_t* polarity); 46 int portmod_xphy_lane_map_set(int unit, uint32 xphy_addr, phymod_lane_map_t lane_map); 47 int portmod_xphy_lane_map_get(int unit, uint32 xphy_addr, phymod_lane_map_t* lane_map); 48 int portmod_xphy_gearbox_enable_set(int unit, uint32 xphy_addr, uint8 gearbox_enable); 49 int portmod_xphy_gearbox_enable_get(int unit, uint32 xphy_addr, uint8* gearbox_enable); 50 int portmod_xphy_pin_compatibility_enable_set(int unit, uint32 xphy_addr, uint8 pin_compatibility_enable); 51 int portmod_xphy_pin_compatibility_enable_get(int unit, uint32 xphy_addr, uint8* pin_compatibility_enable); 52 int portmod_xphy_phy_mode_reverse_set(int unit, uint32 xphy_addr, uint8 phy_mode_reverse); 53 int portmod_xphy_phy_mode_reverse_get(int unit, uint32 xphy_addr, uint8* phy_mode_reverse); 54 int portmod_xphy_primary_core_num_set(int unit, uint32 xphy_addr, uint32 primary_core_num); 55 int portmod_xphy_primary_core_num_get(int unit, uint32 xphy_addr, uint32* primary_core_num); 56 int portmod_xphy_core_probed_set(int unit, uint32 xphy_addr, int core_probed); 57 int portmod_xphy_core_probed_get(int unit, uint32 xphy_addr, int* core_probed); 58 int portmod_xphy_active_lane_set(int unit, uint32 xphy_addr, uint32 active_lanes); 59 int portmod_xphy_active_lane_get(int unit, uint32 xphy_addr, uint32 *active_lanes); 60 61 62 int portmod_port_phychain_core_access_set(int unit, int phyn, int core_index, const phymod_core_access_t* core_access); 63 int portmod_port_phychain_core_access_get(int unit, int port, const int chain_length, int max_cores, phymod_core_access_t* core_access); 64 int portmod_port_phychain_core_probe (int unit, int port, phymod_core_access_t* core, 65 const int chain_length); 66 int portmod_port_phychain_core_identify (int unit, phymod_core_access_t* core, 67 const int chain_length, 68 uint32_t core_id, 69 uint32_t* identified); 70 int portmod_port_phychain_core_lane_map_get(int unit, const phymod_core_access_t* core, 71 const int chain_length, 72 phymod_lane_map_t* lane_map); 73 int portmod_port_phychain_core_reset_set(int unit, const phymod_core_access_t* core, 74 const int chain_length, 75 phymod_reset_mode_t reset_mode, 76 phymod_reset_direction_t direction); 77 int portmod_port_phychain_core_reset_get(int unit, const phymod_core_access_t* core, 78 const int chain_length, 79 phymod_reset_mode_t reset_mode, 80 phymod_reset_direction_t* direction ); 81 int portmod_port_phychain_core_firmware_info_get(int unit, const phymod_core_access_t* core, 82 const int chain_length, 83 phymod_core_firmware_info_t* fw_info); 84 int portmod_port_phychain_loopback_get(int unit, int port, const phymod_phy_access_t* phy_access, 85 const int chain_length, 86 phymod_loopback_mode_t loopback, 87 uint32_t *enable); 88 int portmod_port_phychain_loopback_set(int unit, int port, const phymod_phy_access_t* phy_access, 89 const int chain_length, 90 phymod_loopback_mode_t loopback, 91 uint32_t enable); 92 int portmod_port_phychain_firmware_core_config_set(int unit, const phymod_phy_access_t* phy_access, 93 const int chain_length, 94 phymod_firmware_core_config_t fw_core_config); 95 int phymod_chain_phy_firmware_core_config_get(int unit, const phymod_phy_access_t* phy_access, 96 const int chain_length, 97 phymod_firmware_core_config_t *fw_core_config); 98 int portmod_port_phychain_firmware_lane_config_set(int unit, const phymod_phy_access_t* phy_access, 99 const int chain_length, 100 phymod_firmware_lane_config_t fw_lane_config); 101 int portmod_port_phychain_firmware_lane_config_get(int unit, const phymod_phy_access_t* phy_access, 102 const int chain_length, 103 phymod_firmware_lane_config_t *fw_lane_config); 104 int portmod_port_phychain_core_pll_sequencer_restart(int unit, const phymod_core_access_t* core, 105 const int chain_length, 106 uint32_t flags, 107 phymod_sequencer_operation_t operation); 108 int phymod_chain_core_wait_event(int unit, const phymod_core_access_t* phy_access, 109 const int chain_length, 110 phymod_core_event_t event, 111 uint32_t timeout); 112 int portmod_port_phychain_rx_restart(int unit, const phymod_phy_access_t* phy_access, 113 const int chain_length); 114 int portmod_port_phychain_polarity_set(int unit, const phymod_phy_access_t* phy_access, 115 const int chain_length, 116 const phymod_polarity_t* polarity); 117 int portmod_port_phychain_polarity_get(int unit, const phymod_phy_access_t* phy_access, 118 const int chain_length, 119 phymod_polarity_t* polarity); 120 int portmod_port_phychain_tx_set(int unit, const phymod_phy_access_t* phy_access, 121 const int chain_length, 122 const phymod_tx_t* tx); 123 int portmod_port_phychain_tx_get(int unit, const phymod_phy_access_t* phy_access, 124 const int chain_length, 125 phymod_tx_t* tx); 126 int portmod_port_phychain_media_type_tx_get(int unit, const phymod_phy_access_t* phy_access, 127 const int chain_length, 128 phymod_media_typed_t media, 129 phymod_tx_t* tx); 130 int portmod_port_phychain_tx_override_set(int unit, const phymod_phy_access_t* phy_access, 131 const int chain_length, 132 const phymod_tx_override_t* tx_override); 133 int portmod_port_phychain_tx_override_get(int unit, const phymod_phy_access_t* phy_access, 134 const int chain_length, 135 phymod_tx_override_t* tx_override); 136 int portmod_port_phychain_txpi_config_set(int unit, const phymod_phy_access_t* phy_access, 137 const int chain_length, 138 const phymod_txpi_config_t *config); 139 int portmod_port_phychain_txpi_config_get(int unit, const phymod_phy_access_t* phy_access, 140 const int chain_length, 141 phymod_txpi_config_t *config); 142 int portmod_port_phychain_rx_set(int unit, const phymod_phy_access_t* phy_access, 143 const int chain_length, 144 const phymod_rx_t* rx); 145 int portmod_port_phychain_rx_get(int unit, const phymod_phy_access_t* phy_access, 146 const int chain_length, 147 phymod_rx_t* rx); 148 int portmod_port_phychain_reset_set(int unit, int port, const phymod_phy_access_t* phy_access, 149 const int chain_length, 150 const phymod_phy_reset_t* reset); 151 int portmod_port_phychain_reset_get(int unit, const phymod_phy_access_t* phy_access, 152 const int chain_length, 153 phymod_phy_reset_t* reset); 154 int portmod_port_phychain_power_set(int unit, int port, const phymod_phy_access_t* phy_access, 155 const int chain_length, uint32 flags, 156 const phymod_phy_power_t* power); 157 int portmod_port_phychain_power_get(int unit, int port, const phymod_phy_access_t* phy_access, 158 const int chain_length, uint32 flags, 159 phymod_phy_power_t* power); 160 int portmod_port_phychain_tx_lane_control_set(int unit, int port, const phymod_phy_access_t* phy_access, 161 const int chain_length, uint32 flags, 162 phymod_phy_tx_lane_control_t tx_control); 163 int portmod_port_phychain_tx_lane_control_get(int unit, int port, const phymod_phy_access_t* phy_access, 164 const int chain_length, uint32 flags, 165 phymod_phy_tx_lane_control_t *tx_control); 166 int portmod_port_phychain_rx_lane_control_set(int unit, int port, const phymod_phy_access_t* phy_access, 167 const int chain_length, uint32 flags, 168 phymod_phy_rx_lane_control_t rx_control); 169 int portmod_port_phychain_rx_lane_control_get(int unit, int port, const phymod_phy_access_t* phy_access, 170 const int chain_length, uint32 flags, 171 phymod_phy_rx_lane_control_t *rx_control); 172 int portmod_port_phychain_fec_enable_set(int unit, int port, const phymod_phy_access_t* phy_access, 173 const int chain_length, uint32 flags, 174 uint32_t enable); 175 int portmod_port_phychain_fec_enable_get(int unit, int port, const phymod_phy_access_t* phy_access, 176 const int chain_length, uint32 flags, 177 uint32_t *enable); 178 int portmod_port_phychain_eee_set(int unit, int port, const phymod_phy_access_t* phy_access, 179 const int chain_length, 180 uint32_t enable); 181 int portmod_port_phychain_eee_get(int unit, int port, const phymod_phy_access_t* phy_access, 182 const int chain_length, 183 uint32_t *enable); 184 int portmod_port_phychain_interface_config_set(int unit, int port, const phymod_phy_access_t* phy_access, 185 const int chain_length, 186 uint32_t flags, 187 const phymod_phy_inf_config_t* config, 188 phymod_interface_t line_intf, 189 int ref_clk, 190 const uint32 phy_init_flags); 191 int portmod_port_phychain_interface_config_get(int unit, int port, const phymod_phy_access_t* phy_access, 192 const int chain_length, 193 uint32_t flags, 194 phymod_ref_clk_t ref_clock, 195 phymod_phy_inf_config_t* config, 196 const uint32 phy_init_flags); 197 int portmod_port_phychain_cl72_set(int unit, int port, const phymod_phy_access_t* phy_access, 198 const int chain_length, 199 uint32_t cl72_en); 200 int portmod_port_phychain_cl72_get(int unit, const phymod_phy_access_t* phy_access, 201 const int chain_length, 202 uint32_t *cl72_en); 203 int portmod_port_phychain_cl72_status_get(int unit, const phymod_phy_access_t* phy_access, 204 const int chain_length, 205 phymod_cl72_status_t *status); 206 int portmod_port_phychain_autoneg_ability_set(int unit, int port, const phymod_phy_access_t* phy_access, 207 const int chain_length, uint32 flags, 208 const phymod_autoneg_ability_t* an_ability, 209 const portmod_port_ability_t * port_ability); 210 int portmod_port_phychain_autoneg_ability_get(int unit, int port, const phymod_phy_access_t* phy_access, 211 const int chain_length, uint32 flags, 212 phymod_autoneg_ability_t* an_ability, 213 portmod_port_ability_t * port_ability); 214 int portmod_port_phychain_local_ability_get(int unit, int port, const phymod_phy_access_t* phy_access, 215 const int chain_length, 216 portmod_port_ability_t* port_ability); 217 int portmod_port_phychain_autoneg_restart_set(int unit, const phymod_phy_access_t* phy_access, 218 const int chain_length); 219 220 int portmod_port_phychain_autoneg_remote_ability_get(int unit, int port, const phymod_phy_access_t* phy_access, 221 const int chain_length, uint32 flags, 222 phymod_autoneg_ability_t* an_ability, 223 portmod_port_ability_t * port_ability); 224 int portmod_port_phychain_autoneg_set(int unit, int port, const phymod_phy_access_t* phy_access, 225 const int chain_length, uint32 flags, 226 const phymod_autoneg_control_t *an_config); 227 int portmod_port_phychain_autoneg_get(int unit, int port, const phymod_phy_access_t* phy_access, 228 const int chain_length, uint32 flags, 229 phymod_autoneg_control_t *an_config, 230 uint32_t * an_done); 231 int portmod_port_phychain_autoneg_status_get(int unit, int port, const phymod_phy_access_t* phy_access, 232 const int chain_length, 233 phymod_autoneg_status_t *status); 234 int portmod_port_phychain_core_init(int unit, const phymod_core_access_t* core, 235 const int chain_length, 236 const phymod_core_init_config_t* init_config, 237 const phymod_core_status_t* core_status); 238 int portmod_port_phychain_pll_multiplier_get(int unit, const phymod_phy_access_t* phy_access, 239 const int chain_length, 240 uint32_t *core_vco_pll_multiplier); 241 int portmod_port_phychain_phy_init(int unit, const phymod_phy_access_t* phy_access, 242 const int chain_length, 243 const phymod_phy_init_config_t* init_config); 244 int portmod_port_phychain_rx_pmd_locked_get(int unit, const phymod_phy_access_t* phy_access, 245 const int chain_length, 246 uint32_t *rx_pmd_locked); 247 int portmod_port_phychain_link_status_get(int unit, int port, const phymod_phy_access_t* phy_access, 248 const int chain_length, uint32 flags, 249 uint32_t *link_status); 250 int portmod_port_phychain_pcs_userspeed_set(int unit, const phymod_phy_access_t* phy_access, 251 const int chain_length, 252 const phymod_pcs_userspeed_config_t* config); 253 int portmod_port_phychain_pcs_userspeed_get(int unit, const phymod_phy_access_t* phy_access, 254 const int chain_length, 255 phymod_pcs_userspeed_config_t* config); 256 int portmod_port_phychain_reg_write(int unit, int port, const phymod_phy_access_t* phy_access, 257 const int chain_length, 258 int lane, 259 uint32_t flags, 260 uint32_t reg_addr, 261 uint32_t reg_val); 262 int portmod_port_phychain_reg_read(int unit, int port, const phymod_phy_access_t* phy_access, 263 const int chain_length, 264 int lane, 265 uint32_t flags, 266 uint32_t reg_addr, 267 uint32_t *reg_val); 268 269 int portmod_port_phychain_rx_slicer_position_set(int unit, const phymod_phy_access_t* phy_access, 270 const int chain_length, 271 uint32_t flags, 272 const phymod_slicer_position_t* position); 273 int portmod_port_phychain_rx_slicer_position_get(int unit, const phymod_phy_access_t* phy_access, 274 const int chain_length, 275 uint32_t flags, 276 phymod_slicer_position_t* position); 277 int portmod_port_phychain_rx_slicer_position_max_get(int unit, const phymod_phy_access_t* phy_access, 278 const int chain_length, 279 uint32_t flags, 280 phymod_slicer_position_t* position_min, 281 phymod_slicer_position_t* position_max); 282 int portmod_port_phychain_prbs_config_set(int unit, const phymod_phy_access_t* phy_access, 283 const int chain_length, 284 uint32_t flags, 285 const phymod_prbs_t* prbs); 286 int portmod_port_phychain_prbs_config_get(int unit, const phymod_phy_access_t* phy_access, 287 const int chain_length, 288 uint32_t flags, 289 phymod_prbs_t* prbs); 290 int portmod_port_phychain_prbs_enable_set(int unit, const phymod_phy_access_t* phy_access, 291 const int chain_length, 292 uint32_t flags, 293 uint32_t enable); 294 int portmod_port_phychain_prbs_enable_get(int unit, const phymod_phy_access_t* phy_access, 295 const int chain_length, 296 uint32_t flags, 297 uint32_t *enable); 298 int portmod_port_phychain_prbs_status_get(int unit, const phymod_phy_access_t* phy_access, 299 const int chain_length, 300 uint32_t flags, 301 phymod_prbs_status_t *prbs_status); 302 int portmod_port_phychain_pattern_config_set(int unit, const phymod_phy_access_t* phy_access, 303 const int chain_length, 304 const phymod_pattern_t* pattern); 305 int portmod_port_phychain_pattern_config_get(int unit, const phymod_phy_access_t* phy_access, 306 const int chain_length, 307 phymod_pattern_t* pattern); 308 int portmod_port_phychain_pattern_enable_set(int unit, const phymod_phy_access_t* phy_access, 309 const int chain_length, 310 uint32_t enable, 311 phymod_pattern_t* pattern); 312 int portmod_port_phychain_pattern_enable_get(int unit, const phymod_phy_access_t* phy_access, 313 const int chain_length, 314 uint32_t *enable); 315 int portmod_port_phychain_core_diagnostics_get(int unit, const phymod_core_access_t* core, 316 const int chain_length, 317 phymod_core_diagnostics_t* diag); 318 int portmod_port_phychain_phy_diagnostics_get(int unit, const phymod_phy_access_t* phy_access, 319 const int chain_length, 320 phymod_phy_diagnostics_t *diag); 321 int portmod_port_phychain_pmd_info_dump(int unit, const phymod_phy_access_t* phy_access, 322 const int chain_length, 323 char *type); 324 int portmod_port_phychain_pcs_info_dump(int unit, const phymod_phy_access_t* phy_access, 325 const int chain_length, 326 char *type); 327 int portmod_port_phychain_meas_lowber_eye(int unit, const phymod_phy_access_t* phy_access, 328 const int chain_length, 329 phymod_phy_eyescan_options_t eyescan_options, 330 uint32_t *buffer); 331 int portmod_port_phychain_display_lowber_eye(int unit, const phymod_phy_access_t* phy_access, 332 const int chain_length, 333 phymod_phy_eyescan_options_t eyescan_options, 334 uint32_t *buffer); 335 int portmod_port_phychain_pmd_ber_end_cmd(int unit, const phymod_phy_access_t* phy_access, 336 const int chain_length, 337 uint8_t supp_info, 338 uint32_t timeout_ms); 339 int portmod_port_phychain_meas_eye_scan_start(int unit, const phymod_phy_access_t* phy_access, 340 const int chain_length, 341 uint8_t direction); 342 int portmod_port_phychain_meas_eye_scan_done(int unit, const phymod_phy_access_t* phy_access, 343 const int chain_length); 344 int portmod_port_phychain_read_eye_scan_stripe(int unit, const phymod_phy_access_t* phy_access, 345 const int chain_length, 346 uint32_t *buffer, 347 uint16_t *status); 348 int portmod_port_phychain_display_eye_scan_header(int unit, const phymod_phy_access_t* phy_access, 349 const int chain_length, 350 uint8_t index); 351 int portmod_port_phychain_display_eye_scan_footer(int unit, const phymod_phy_access_t* phy_access, 352 const int chain_length, 353 uint8_t index); 354 int portmod_port_phychain_display_eye_scan_stripe(int unit, const phymod_phy_access_t* phy_access, 355 const int chain_length, 356 uint8_t index, 357 uint32_t *buffer); 358 int portmod_port_phychain_eye_scan_debug_info_dump(int unit, const phymod_phy_access_t* phy_access, 359 const int chain_length); 360 361 int portmod_port_phychain_timesync_config_set(int unit, int port, const phymod_phy_access_t* phy_access, 362 const int chain_length, 363 const portmod_phy_timesync_config_t* config); 364 365 int portmod_port_phychain_timesync_config_get(int unit, int port, const phymod_phy_access_t* phy_access, 366 const int chain_length, 367 portmod_phy_timesync_config_t* config); 368 369 int portmod_port_phychain_timesync_enable_set(int unit, const phymod_phy_access_t* phy_access, 370 const int chain_length, uint32 enable); 371 int portmod_port_phychain_timesync_enable_get(int unit, const phymod_phy_access_t* phy_access, 372 const int chain_length, uint32* enable); 373 int portmod_port_phychain_timesync_nco_addend_set(int unit, const phymod_phy_access_t* phy_access, 374 const int chain_length, uint32 freq_step); 375 int portmod_port_phychain_timesync_nco_addend_get(int unit, const phymod_phy_access_t* phy_access, 376 const int chain_length, 377 uint32* freq_step); 378 int portmod_port_phychain_timesync_framesync_mode_set(int unit, const phymod_phy_access_t* phy_access, 379 const int chain_length, 380 const phymod_timesync_framesync_t* framesync); 381 int portmod_port_phychain_timesync_framesync_mode_get(int unit, const phymod_phy_access_t* phy_access, 382 const int chain_length, 383 phymod_timesync_framesync_t* framesync); 384 int portmod_port_phychain_timesync_local_time_set(int unit, const phymod_phy_access_t* phy_access, 385 const int chain_length, 386 const uint64 local_time); 387 int portmod_port_phychain_timesync_local_time_get(int unit, const phymod_phy_access_t* phy_access, 388 const int chain_length, 389 uint64* local_time); 390 int portmod_port_phychain_timesync_load_ctrl_set(int unit, const phymod_phy_access_t* phy_access, 391 const int chain_length, 392 uint32 load_once, 393 uint32 load_always); 394 395 int portmod_port_phychain_timesync_load_ctrl_get(int unit, const phymod_phy_access_t* phy_access, 396 const int chain_length, 397 uint32* load_once, 398 uint32* load_always); 399 400 int portmod_port_phychain_timesync_tx_timestamp_offset_set(int unit, const phymod_phy_access_t* phy_access, 401 const int chain_length, 402 uint32 ts_offset); 403 int portmod_port_phychain_timesync_tx_timestamp_offset_get(int unit, const phymod_phy_access_t* phy_access, 404 const int chain_length, 405 uint32* ts_offset); 406 int portmod_port_phychain_timesync_rx_timestamp_offset_set(int unit, const phymod_phy_access_t* phy_access, 407 const int chain_length, 408 uint32 ts_offset); 409 int portmod_port_phychain_timesync_rx_timestamp_offset_get(int unit, const phymod_phy_access_t* phy_access, 410 const int chain_length, 411 uint32* ts_offset); 412 int portmod_port_phychain_phy_intr_enable_set(int unit, const phymod_phy_access_t* phy_access, 413 const int chain_length, 414 uint32_t enable); 415 int portmod_port_phychain_phy_intr_enable_get(int unit, const phymod_phy_access_t* phy_access, 416 const int chain_length, 417 uint32_t* enable); 418 int portmod_port_phychain_phy_intr_status_get(int unit, const phymod_phy_access_t* phy_access, 419 const int chain_length, 420 uint32_t* enable); 421 422 int portmod_port_phychain_phy_intr_status_clear(int unit, const phymod_phy_access_t* phy_access, 423 const int chain_length); 424 int portmod_port_phychain_phy_timesync_do_sync(int unit, const phymod_phy_access_t* phy_access, 425 const int chain_length ); 426 int portmod_port_phychain_timesync_capture_timestamp_get(int unit, const phymod_phy_access_t* phy_access, 427 const int chain_length, uint64* cap_ts); 428 int portmod_port_phychain_timesync_heartbeat_timestamp_get(int unit, const phymod_phy_access_t* phy_access, 429 const int chain_length, uint64* hb_ts); 430 int portmod_port_phychain_edc_config_set(int unit, const phymod_phy_access_t* phy_access, 431 const int chain_length, 432 const phymod_edc_config_t* config); 433 int portmod_port_phychain_edc_config_get(int unit, const phymod_phy_access_t* phy_access, 434 const int chain_length, 435 phymod_edc_config_t* config); 436 437 int portmod_port_phychain_failover_mode_get(int unit, const phymod_phy_access_t *phy_access, 438 int nof_phys, phymod_failover_mode_t *failover); 439 int portmod_port_phychain_failover_mode_set(int unit, const phymod_phy_access_t *phy_access, 440 int nof_phys, phymod_failover_mode_t failover); 441 442 int portmod_port_phychain_multi_get(int unit, int port, const phymod_phy_access_t* phy_access, 443 const int chain_length, 444 portmod_multi_get_t* multi_get); 445 446 /* common routines between pm4x10 and pm4x25 */ 447 int portmod_phy_port_diag_ctrl (int unit, soc_port_t port, 448 phymod_phy_access_t *phy_access, 449 int nof_phys, uint32 inst, int op_type, 450 int op_cmd, const void *arg); 451 452 int portmod_phy_port_reset_get (int unit, int port, pm_info_t pm_info, 453 int reset_mode, int opcode, int* direction); 454 455 int portmod_phy_port_reset_set (int unit, int port, pm_info_t pm_info, 456 int reset_mode, int opcode, int direction); 457 458 int portmod_phy_port_prbs_config_set (int unit, int port, pm_info_t pm_info, 459 portmod_prbs_mode_t mode, int flags, 460 const phymod_prbs_t* config); 461 462 int portmod_phy_port_prbs_config_get (int unit, int port, pm_info_t pm_info, 463 portmod_prbs_mode_t mode, int flags, 464 phymod_prbs_t* config); 465 466 int portmod_phy_port_prbs_enable_set(int unit, int port, pm_info_t pm_info, 467 portmod_prbs_mode_t mode, int flags, int enable); 468 469 int portmod_phy_port_prbs_enable_get(int unit, int port, pm_info_t pm_info, 470 portmod_prbs_mode_t mode, int flags, int* enable); 471 472 int portmod_phy_port_prbs_status_get(int unit, int port, pm_info_t pm_info, 473 portmod_prbs_mode_t mode, int flags, 474 phymod_prbs_status_t* status); 475 476 int portmod_phy_port_link_get(int unit, int port, pm_info_t pm_info, int* link); 477 int portmod_port_phychain_phy_link_up_event(int unit, int port, const phymod_phy_access_t* phy_access, 478 const int chain_length); 479 int portmod_port_phychain_phy_link_down_event(int unit, int port, const phymod_phy_access_t* phy_access, 480 const int chain_length); 481 482 int portmod_phy_port_autoneg_status_get (int unit, int port, pm_info_t pm_info, 483 phymod_autoneg_status_t* an_status); 484 485 int portmod_port_phychain_control_phy_timesync_set(int unit, int port, const phymod_phy_access_t* phy_access, 486 const int chain_length, 487 const portmod_port_control_phy_timesync_t type, 488 uint64_t value); 489 490 int portmod_port_phychain_control_phy_timesync_get(int unit, int port, const phymod_phy_access_t* phy_access, 491 const int chain_length, 492 const portmod_port_control_phy_timesync_t type, 493 uint64_t* value); 494 495 int 496 portmod_port_line_to_sys_intf_map(int unit, const phymod_phy_access_t* line_phy_acc, const phymod_phy_access_t* sys_phy_acc, 497 soc_port_t port, const phymod_phy_inf_config_t *config, int ref_clk, 498 const uint32 phy_init_flags, phymod_interface_t line_intf, 499 phymod_interface_t *sys_intf); 500 int 501 portmod_port_line_interface_is_valid(int unit, const phymod_phy_access_t* phy_acc, soc_port_t port, int data_rate, 502 phymod_interface_t line_intf, int num_lanes, uint32_t intf_mode, int *is_valid); 503 504 int 505 portmod_port_line_interface_map_for_xphy(int unit, const phymod_phy_access_t* phy_acc, soc_port_t port, 506 soc_port_if_t line_intf, soc_port_if_t *mapped_line_intf); 507 508 int portmod_port_phymod_xphy_default_interface_get(int unit, const phymod_phy_access_t* phy_acc, 509 const portmod_port_interface_config_t* config, 510 soc_port_if_t* interface); 511 512 int portmod_port_phychain_medium_config_set(int unit, int port, soc_port_medium_t medium, 513 soc_phy_config_t* config); 514 int portmod_port_phychain_medium_config_get(int unit, int port, soc_port_medium_t medium, 515 soc_phy_config_t* config); 516 int portmod_port_phychain_medium_get(int unit, int port, soc_port_medium_t* medium); 517 int portmod_port_phychain_master_set(int unit, int port, pm_info_t pm_info, int master_mode); 518 int portmod_port_phychain_master_get(int unit, int port, pm_info_t pm_info, int* master_mode); 519 int portmod_port_phychain_operation_mode_get(int unit, int port, const phymod_phy_access_t* phy_access, 520 const int chain_length, phymod_operation_mode_t* phy_op_mode); 521 int portmod_port_phychain_timesync_tx_info_get(int unit, int port, const phymod_phy_access_t* phy_access, 522 const int chain_length, phymod_ts_fifo_status_t* ts_tx_info); 523 524 #endif /*_PORTMOD_CHAIN_H_*/