pm8x50.h (25999B)
1 /* 2 * 3 * 4 * 5 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 6 * 7 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 8 * 9 * 10 * DO NOT EDIT THIS FILE! 11 */ 12 13 #ifndef _PM8X50_H__H_ 14 #define _PM8X50_H__H_ 15 16 #include <phymod/phymod.h> 17 #include <phymod/phymod_diagnostics.h> 18 #include <phymod/phymod_reg.h> 19 #include <soc/cprimod/cprimod.h> 20 #include <soc/portmod/portmod_defs.h> 21 /**/ 22 int pm8x50_port_speed_ability_local_get(int unit, int port, pm_info_t pm_info, int max_num_abilities, portmod_port_speed_ability_t* abilities, int* num_abilities); 23 24 /*Get whether the inerface type is supported by PM */ 25 int pm8x50_pm_interface_type_is_supported(int unit, soc_port_if_t interface, int* is_supported); 26 27 /*Add new pm.*/ 28 int pm8x50_pm_init(int unit, const portmod_pm_create_info_internal_t* pm_add_info, int wb_buffer_index, pm_info_t pm_info); 29 30 /*Release PM resources*/ 31 int pm8x50_pm_destroy(int unit, pm_info_t pm_info); 32 33 /*Add new port*/ 34 int pm8x50_port_attach(int unit, int port, pm_info_t pm_info, const portmod_port_add_info_t* add_info); 35 36 /*get port cores' phymod access*/ 37 int pm8x50_pm_core_info_get(int unit, pm_info_t pm_info, int phyn, portmod_pm_core_info_t* core_info); 38 39 /*Get PM phys.*/ 40 int pm8x50_pm_phys_get(int unit, pm_info_t pm_info, portmod_pbmp_t* phys); 41 42 /*Port remove in PM level*/ 43 int pm8x50_port_detach(int unit, int port, pm_info_t pm_info); 44 45 /*Port replace in PM level*/ 46 int pm8x50_port_replace(int unit, int port, pm_info_t pm_info, int new_port); 47 48 /*Port enable*/ 49 int pm8x50_port_enable_set(int unit, int port, pm_info_t pm_info, int flags, int enable); 50 int pm8x50_port_enable_get(int unit, int port, pm_info_t pm_info, int flags, int* enable); 51 52 /*Port cl72 set\get*/ 53 int pm8x50_port_cl72_set(int unit, int port, pm_info_t pm_info, uint32 enable); 54 int pm8x50_port_cl72_get(int unit, int port, pm_info_t pm_info, uint32* enable); 55 56 /*Get port cl72 status*/ 57 int pm8x50_port_cl72_status_get(int unit, int port, pm_info_t pm_info, phymod_cl72_status_t* status); 58 59 /*Port speed set\get*/ 60 int pm8x50_port_loopback_set(int unit, int port, pm_info_t pm_info, portmod_loopback_mode_t loopback_type, int enable); 61 int pm8x50_port_loopback_get(int unit, int port, pm_info_t pm_info, portmod_loopback_mode_t loopback_type, int* enable); 62 63 /*Port RX MAC ENABLE set\get*/ 64 int pm8x50_port_rx_mac_enable_set(int unit, int port, pm_info_t pm_info, int enable); 65 int pm8x50_port_rx_mac_enable_get(int unit, int port, pm_info_t pm_info, int* enable); 66 67 /*Port TX MAC ENABLE set\get*/ 68 int pm8x50_port_tx_mac_enable_set(int unit, int port, pm_info_t pm_info, int enable); 69 int pm8x50_port_tx_mac_enable_get(int unit, int port, pm_info_t pm_info, int* enable); 70 71 /*Set\Get autoneg*/ 72 int pm8x50_port_autoneg_set(int unit, int port, pm_info_t pm_info, uint32 phy_flags, const phymod_autoneg_control_t* an); 73 int pm8x50_port_autoneg_get(int unit, int port, pm_info_t pm_info, uint32 phy_flags, phymod_autoneg_control_t* an); 74 75 /*Get autoneg status*/ 76 int pm8x50_port_autoneg_status_get(int unit, int port, pm_info_t pm_info, phymod_autoneg_status_t* an_status); 77 78 /*get link status*/ 79 int pm8x50_port_link_get(int unit, int port, pm_info_t pm_info, int flags, int* link); 80 81 /*get latch down link status (whether link was ever down since last clear)*/ 82 int pm8x50_port_link_latch_down_get(int unit, int port, pm_info_t pm_info, uint32 flags, int* link); 83 84 /* link up event */ 85 int pm8x50_port_phy_link_up_event(int unit, int port, pm_info_t pm_info); 86 87 /* link down event */ 88 int pm8x50_port_phy_link_down_event(int unit, int port, pm_info_t pm_info); 89 90 /*PRBS configuration set/get*/ 91 int pm8x50_port_prbs_config_set(int unit, int port, pm_info_t pm_info, portmod_prbs_mode_t mode, int flags, const phymod_prbs_t* config); 92 int pm8x50_port_prbs_config_get(int unit, int port, pm_info_t pm_info, portmod_prbs_mode_t mode, int flags, phymod_prbs_t* config); 93 94 /*PRBS enable set/get*/ 95 int pm8x50_port_prbs_enable_set(int unit, int port, pm_info_t pm_info, portmod_prbs_mode_t mode, int flags, int enable); 96 int pm8x50_port_prbs_enable_get(int unit, int port, pm_info_t pm_info, portmod_prbs_mode_t mode, int flags, int* enable); 97 98 /*PRBS status get*/ 99 int pm8x50_port_prbs_status_get(int unit, int port, pm_info_t pm_info, portmod_prbs_mode_t mode, int flags, phymod_prbs_status_t* status); 100 101 /*Number of lanes get*/ 102 int pm8x50_port_nof_lanes_get(int unit, int port, pm_info_t pm_info, int* nof_lanes); 103 104 /*Set port PHYs' firmware mode*/ 105 int pm8x50_port_firmware_mode_set(int unit, int port, pm_info_t pm_info, phymod_firmware_mode_t fw_mode); 106 int pm8x50_port_firmware_mode_get(int unit, int port, pm_info_t pm_info, phymod_firmware_mode_t* fw_mode); 107 108 /*Filter packets smaller than the specified threshold*/ 109 int pm8x50_port_runt_threshold_set(int unit, int port, pm_info_t pm_info, int value); 110 int pm8x50_port_runt_threshold_get(int unit, int port, pm_info_t pm_info, int* value); 111 112 /*Filter packets bigger than the specified value*/ 113 int pm8x50_port_max_packet_size_set(int unit, int port, pm_info_t pm_info, int value); 114 int pm8x50_port_max_packet_size_get(int unit, int port, pm_info_t pm_info, int* value); 115 116 /*TX pad packets to the specified size. values smaller than 17 means pad is disabled.*/ 117 int pm8x50_port_pad_size_set(int unit, int port, pm_info_t pm_info, int value); 118 int pm8x50_port_pad_size_get(int unit, int port, pm_info_t pm_info, int* value); 119 120 /*set/get the MAC source address that will be sent in case of Pause/LLFC*/ 121 int pm8x50_port_tx_mac_sa_set(int unit, int port, pm_info_t pm_info, sal_mac_addr_t mac_sa); 122 int pm8x50_port_tx_mac_sa_get(int unit, int port, pm_info_t pm_info, sal_mac_addr_t mac_sa); 123 124 /*set/get SA recognized for MAC control packets in addition to the standard 0x0180C2000001*/ 125 int pm8x50_port_rx_mac_sa_set(int unit, int port, pm_info_t pm_info, sal_mac_addr_t mac_sa); 126 int pm8x50_port_rx_mac_sa_get(int unit, int port, pm_info_t pm_info, sal_mac_addr_t mac_sa); 127 128 /*set/get Average inter-packet gap*/ 129 int pm8x50_port_tx_average_ipg_set(int unit, int port, pm_info_t pm_info, int value); 130 int pm8x50_port_tx_average_ipg_get(int unit, int port, pm_info_t pm_info, int* value); 131 132 /*local fault set/get*/ 133 int pm8x50_port_local_fault_control_set(int unit, int port, pm_info_t pm_info, const portmod_local_fault_control_t* control); 134 int pm8x50_port_local_fault_control_get(int unit, int port, pm_info_t pm_info, portmod_local_fault_control_t* control); 135 136 /*remote fault set/get*/ 137 int pm8x50_port_remote_fault_control_set(int unit, int port, pm_info_t pm_info, const portmod_remote_fault_control_t* control); 138 int pm8x50_port_remote_fault_control_get(int unit, int port, pm_info_t pm_info, portmod_remote_fault_control_t* control); 139 140 /*local fault steatus get*/ 141 int pm8x50_port_local_fault_status_get(int unit, int port, pm_info_t pm_info, int* value); 142 143 /*remote fault status get*/ 144 int pm8x50_port_remote_fault_status_get(int unit, int port, pm_info_t pm_info, int* value); 145 146 /*local fault steatus clear*/ 147 int pm8x50_port_local_fault_status_clear(int unit, int port, pm_info_t pm_info); 148 149 /*remote fault status clear*/ 150 int pm8x50_port_remote_fault_status_clear(int unit, int port, pm_info_t pm_info); 151 152 /*set/get Pause FC configuration*/ 153 int pm8x50_port_pause_control_set(int unit, int port, pm_info_t pm_info, const portmod_pause_control_t* control); 154 int pm8x50_port_pause_control_get(int unit, int port, pm_info_t pm_info, portmod_pause_control_t* control); 155 156 /*set/get PFC FC configuration*/ 157 int pm8x50_port_pfc_control_set(int unit, int port, pm_info_t pm_info, const portmod_pfc_control_t* control); 158 int pm8x50_port_pfc_control_get(int unit, int port, pm_info_t pm_info, portmod_pfc_control_t* control); 159 160 /*Routine for MAC\PHY sync.*/ 161 int pm8x50_port_update(int unit, int port, pm_info_t pm_info, const portmod_port_update_control_t* update_control); 162 163 /*get port cores' phymod access*/ 164 int pm8x50_port_core_access_get(int unit, int port, pm_info_t pm_info, int phyn, int max_cores, phymod_core_access_t* core_access_arr, int* nof_cores, int* is_most_ext); 165 166 /*Get lane phymod access structure. can be used for per lane operations*/ 167 int pm8x50_port_phy_lane_access_get(int unit, int port, pm_info_t pm_info, const portmod_access_get_params_t* params, int max_phys, phymod_phy_access_t* access, int* nof_phys, int* is_most_ext); 168 169 /*Get lane phymod access structure via pm id. can be used for per lane operations*/ 170 int pm8x50_pm_phy_lane_access_get(int unit, int pm_id, pm_info_t pm_info, const portmod_access_get_params_t* params, int max_phys, phymod_phy_access_t* access, int* nof_phys, int* is_most_ext); 171 172 /*Port duplex set\get*/ 173 int pm8x50_port_duplex_set(int unit, int port, pm_info_t pm_info, int enable); 174 int pm8x50_port_duplex_get(int unit, int port, pm_info_t pm_info, int* enable); 175 176 /*Port PHY Control register read*/ 177 int pm8x50_port_phy_reg_read(int unit, int port, pm_info_t pm_info, int lane, int flags, int reg_addr, uint32* value); 178 179 /*Port PHY Control register write*/ 180 int pm8x50_port_phy_reg_write(int unit, int port, pm_info_t pm_info, int lane, int flags, int reg_addr, uint32 value); 181 182 /*Port Reset set\get*/ 183 int pm8x50_port_reset_set(int unit, int port, pm_info_t pm_info, int mode, int opcode, int value); 184 int pm8x50_port_reset_get(int unit, int port, pm_info_t pm_info, int mode, int opcode, int* value); 185 186 /*Drv Name Get*/ 187 int pm8x50_port_drv_name_get(int unit, int port, pm_info_t pm_info, char* name, int len); 188 189 /*set/get port fec enable according to local/remote FEC ability*/ 190 int pm8x50_port_fec_enable_set(int unit, int port, pm_info_t pm_info, uint32 phy_flags, uint32_t enable); 191 int pm8x50_port_fec_enable_get(int unit, int port, pm_info_t pm_info, uint32 phy_flags, uint32_t* enable); 192 193 /*get port auto negotiation local ability*/ 194 int pm8x50_port_ability_advert_set(int unit, int port, pm_info_t pm_info, uint32 phy_flags, portmod_port_ability_t* ability); 195 int pm8x50_port_ability_advert_get(int unit, int port, pm_info_t pm_info, uint32 phy_flags, portmod_port_ability_t* ability); 196 197 /*Port ability remote Adv get*/ 198 int pm8x50_port_ability_remote_get(int unit, int port, pm_info_t pm_info, uint32 phy_flags, portmod_port_ability_t* ability); 199 200 /*Port Mac Control Spacing Stretch*/ 201 int pm8x50_port_frame_spacing_stretch_set(int unit, int port, pm_info_t pm_info, int spacing); 202 int pm8x50_port_frame_spacing_stretch_get(int unit, int port, pm_info_t pm_info, const int* spacing); 203 204 /*get port timestamps in fifo*/ 205 int pm8x50_port_diag_fifo_status_get(int unit, int port, pm_info_t pm_info, const portmod_fifo_status_t* diag_info); 206 207 /*set/get pass control frames.*/ 208 int pm8x50_port_rx_control_set(int unit, int port, pm_info_t pm_info, const portmod_rx_control_t* rx_ctrl); 209 int pm8x50_port_rx_control_get(int unit, int port, pm_info_t pm_info, portmod_rx_control_t* rx_ctrl); 210 211 /*set PFC config registers.*/ 212 int pm8x50_port_pfc_config_set(int unit, int port, pm_info_t pm_info, const portmod_pfc_config_t* pfc_cfg); 213 int pm8x50_port_pfc_config_get(int unit, int port, pm_info_t pm_info, portmod_pfc_config_t* pfc_cfg); 214 215 /*set EEE Config.*/ 216 int pm8x50_port_eee_set(int unit, int port, pm_info_t pm_info, const portmod_eee_t* eee); 217 int pm8x50_port_eee_get(int unit, int port, pm_info_t pm_info, portmod_eee_t* eee); 218 219 /*set EEE Config.*/ 220 int pm8x50_port_eee_clock_set(int unit, int port, pm_info_t pm_info, const portmod_eee_clock_t* eee_clk); 221 int pm8x50_port_eee_clock_get(int unit, int port, pm_info_t pm_info, portmod_eee_clock_t* eee_clk); 222 223 /*set Vlan Inner/Outer tag.*/ 224 int pm8x50_port_vlan_tag_set(int unit, int port, pm_info_t pm_info, const portmod_vlan_tag_t* vlan_tag); 225 int pm8x50_port_vlan_tag_get(int unit, int port, pm_info_t pm_info, portmod_vlan_tag_t* vlan_tag); 226 227 /*set modid field.*/ 228 int pm8x50_port_modid_set(int unit, int port, pm_info_t pm_info, int value); 229 230 /*set modid field.*/ 231 int pm8x50_port_led_chain_config(int unit, int port, pm_info_t pm_info, int value); 232 233 /*set modid field.*/ 234 int pm8x50_port_clear_rx_lss_status_set(int unit, int port, pm_info_t pm_info, int lcl_fault, int rmt_fault); 235 int pm8x50_port_clear_rx_lss_status_get(int unit, int port, pm_info_t pm_info, int* lcl_fault, int* rmt_fault); 236 237 /*Attaches an external phy lane to a specific port macro*/ 238 int pm8x50_xphy_lane_attach_to_pm(int unit, pm_info_t pm_info, int iphy, int phyn, const portmod_xphy_lane_connection_t* lane_connection); 239 240 /*Attaches an external phy lane to a specific port macro*/ 241 int pm8x50_xphy_lane_detach_from_pm(int unit, pm_info_t pm_info, int iphy, int phyn, portmod_xphy_lane_connection_t* lane_connection); 242 243 /*Toggle Lag Failover Status.*/ 244 int pm8x50_port_lag_failover_status_toggle(int unit, int port, pm_info_t pm_info); 245 246 /*Toggle Lag Failover loopback set / get.*/ 247 int pm8x50_port_lag_failover_loopback_set(int unit, int port, pm_info_t pm_info, int value); 248 int pm8x50_port_lag_failover_loopback_get(int unit, int port, pm_info_t pm_info, int* value); 249 250 /*set port mode.*/ 251 int pm8x50_port_mode_set(int unit, int port, pm_info_t pm_info, const portmod_port_mode_info_t* mode); 252 int pm8x50_port_mode_get(int unit, int port, pm_info_t pm_info, portmod_port_mode_info_t* mode); 253 254 /*set port encap.*/ 255 int pm8x50_port_encap_set(int unit, int port, pm_info_t pm_info, int flags, portmod_encap_t encap); 256 int pm8x50_port_encap_get(int unit, int port, pm_info_t pm_info, int* flags, portmod_encap_t* encap); 257 258 /*set port register higig field.*/ 259 int pm8x50_port_higig_mode_set(int unit, int port, pm_info_t pm_info, int mode); 260 int pm8x50_port_higig_mode_get(int unit, int port, pm_info_t pm_info, int* mode); 261 262 /*set port register higig field.*/ 263 int pm8x50_port_higig2_mode_set(int unit, int port, pm_info_t pm_info, int mode); 264 int pm8x50_port_higig2_mode_get(int unit, int port, pm_info_t pm_info, int* mode); 265 266 /*set port register port type field.*/ 267 int pm8x50_port_config_port_type_set(int unit, int port, pm_info_t pm_info, int type); 268 int pm8x50_port_config_port_type_get(int unit, int port, pm_info_t pm_info, int* type); 269 270 /*set/get hwfailover for trident.*/ 271 int pm8x50_port_trunk_hwfailover_config_set(int unit, int port, pm_info_t pm_info, int hw_count); 272 int pm8x50_port_trunk_hwfailover_config_get(int unit, int port, pm_info_t pm_info, int* enable); 273 274 /*set/get hwfailover for trident.*/ 275 int pm8x50_port_trunk_hwfailover_status_get(int unit, int port, pm_info_t pm_info, int* loopback); 276 277 /*port diagnostics control.*/ 278 int pm8x50_port_diag_ctrl(int unit, int port, pm_info_t pm_info, uint32 inst, int op_type, int op_cmd, const void* arg); 279 280 /*Get the reference clock value 156 or 125.*/ 281 int pm8x50_port_ref_clk_get(int unit, int port, pm_info_t pm_info, int* ref_clk); 282 283 /*Disable lag failover.*/ 284 int pm8x50_port_lag_failover_disable(int unit, int port, pm_info_t pm_info); 285 286 /*Disable lag failover.*/ 287 int pm8x50_port_lag_remove_failover_lpbk_set(int unit, int port, pm_info_t pm_info, int val); 288 int pm8x50_port_lag_remove_failover_lpbk_get(int unit, int port, pm_info_t pm_info, int* val); 289 290 /*Disable lag failover.*/ 291 int pm8x50_port_cntmaxsize_set(int unit, int port, pm_info_t pm_info, int val); 292 int pm8x50_port_cntmaxsize_get(int unit, int port, pm_info_t pm_info, int* val); 293 294 /*Get Info needed to restore after drain cells.*/ 295 int pm8x50_port_drain_cell_get(int unit, int port, pm_info_t pm_info, portmod_drain_cells_t* drain_cells); 296 297 /*Restore informaation after drain cells.*/ 298 int pm8x50_port_drain_cell_stop(int unit, int port, pm_info_t pm_info, const portmod_drain_cells_t* drain_cells); 299 300 /*Restore informaation after drain cells.*/ 301 int pm8x50_port_drain_cell_start(int unit, int port, pm_info_t pm_info); 302 303 /**/ 304 int pm8x50_port_drain_cells_rx_enable(int unit, int port, pm_info_t pm_info, int rx_en); 305 306 /**/ 307 int pm8x50_port_egress_queue_drain_rx_en(int unit, int port, pm_info_t pm_info, int rx_en); 308 309 /**/ 310 int pm8x50_port_mac_ctrl_set(int unit, int port, pm_info_t pm_info, uint64 ctrl); 311 312 /**/ 313 int pm8x50_port_txfifo_cell_cnt_get(int unit, int port, pm_info_t pm_info, uint32* cnt); 314 315 /**/ 316 int pm8x50_port_egress_queue_drain_get(int unit, int port, pm_info_t pm_info, uint64* ctrl, int* rxen); 317 318 /*Set/get port mac reset */ 319 int pm8x50_port_mac_reset_set(int unit, int port, pm_info_t pm_info, int val); 320 int pm8x50_port_mac_reset_get(int unit, int port, pm_info_t pm_info, int* val); 321 322 /**/ 323 int pm8x50_port_soft_reset_toggle(int unit, int port, pm_info_t pm_info, int idx); 324 325 /*Check if MAC needs to be reset.*/ 326 int pm8x50_port_mac_reset_check(int unit, int port, pm_info_t pm_info, int enable, int* reset); 327 328 /**/ 329 int pm8x50_port_core_num_get(int unit, int port, pm_info_t pm_info, int* core_num); 330 331 /**/ 332 int pm8x50_port_e2ecc_hdr_set(int unit, int port, pm_info_t pm_info, const portmod_port_higig_e2ecc_hdr_t* e2ecc_hdr); 333 int pm8x50_port_e2ecc_hdr_get(int unit, int port, pm_info_t pm_info, portmod_port_higig_e2ecc_hdr_t* e2ecc_hdr); 334 335 /**/ 336 int pm8x50_port_e2e_enable_set(int unit, int port, pm_info_t pm_info, int enable); 337 int pm8x50_port_e2e_enable_get(int unit, int port, pm_info_t pm_info, int* enable); 338 339 /*get the speed for the specified port*/ 340 int pm8x50_port_speed_get(int unit, int port, pm_info_t pm_info, int* speed); 341 342 /*TSC refere clock input and output set/get*/ 343 int pm8x50_port_tsc_refclock_set(int unit, int port, pm_info_t pm_info, int ref_in, int ref_out); 344 int pm8x50_port_tsc_refclock_get(int unit, int port, pm_info_t pm_info, int* ref_in, int* ref_out); 345 346 /*Port discard set*/ 347 int pm8x50_port_discard_set(int unit, int port, pm_info_t pm_info, int discard); 348 349 /*Port soft reset set set*/ 350 int pm8x50_port_soft_reset_set(int unit, int port, pm_info_t pm_info, int idx, int val, int flags); 351 352 /*Port tx_en=0 and softreset mac*/ 353 int pm8x50_port_tx_down(int unit, int port, pm_info_t pm_info); 354 355 /*reconfig pgw.*/ 356 int pm8x50_port_pgw_reconfig(int unit, int port, pm_info_t pm_info, const portmod_port_mode_info_t* pmode, int phy_port, int flags); 357 358 /*Routine to notify internal phy of external phy link state.*/ 359 int pm8x50_port_notify(int unit, int port, pm_info_t pm_info, int link); 360 361 /*"port control phy timesync config set/get"*/ 362 int pm8x50_port_control_phy_timesync_set(int unit, int port, pm_info_t pm_info, portmod_port_control_phy_timesync_t config, uint64 value); 363 int pm8x50_port_control_phy_timesync_get(int unit, int port, pm_info_t pm_info, portmod_port_control_phy_timesync_t config, uint64* value); 364 365 /*"port timesync config set/get"*/ 366 int pm8x50_port_timesync_config_set(int unit, int port, pm_info_t pm_info, const portmod_phy_timesync_config_t* config); 367 int pm8x50_port_timesync_config_get(int unit, int port, pm_info_t pm_info, portmod_phy_timesync_config_t* config); 368 369 /*"port timesync enable set/get"*/ 370 int pm8x50_port_timesync_enable_set(int unit, int port, pm_info_t pm_info, uint32 enable); 371 int pm8x50_port_timesync_enable_get(int unit, int port, pm_info_t pm_info, uint32* enable); 372 373 /*"port timesync nco addend set/get"*/ 374 int pm8x50_port_timesync_nco_addend_set(int unit, int port, pm_info_t pm_info, uint32 freq_step); 375 int pm8x50_port_timesync_nco_addend_get(int unit, int port, pm_info_t pm_info, uint32* freq_step); 376 377 /*"port timesync framesync info set/get"*/ 378 int pm8x50_port_timesync_framesync_mode_set(int unit, int port, pm_info_t pm_info, const portmod_timesync_framesync_t* framesync); 379 int pm8x50_port_timesync_framesync_mode_get(int unit, int port, pm_info_t pm_info, portmod_timesync_framesync_t* framesync); 380 381 /*"port timesync local time set/get"*/ 382 int pm8x50_port_timesync_local_time_set(int unit, int port, pm_info_t pm_info, uint64 local_time); 383 int pm8x50_port_timesync_local_time_get(int unit, int port, pm_info_t pm_info, uint64* local_time); 384 385 /*"port timesync framesync info set/get"*/ 386 int pm8x50_port_timesync_load_ctrl_set(int unit, int port, pm_info_t pm_info, uint32 load_once, uint32 load_always); 387 int pm8x50_port_timesync_load_ctrl_get(int unit, int port, pm_info_t pm_info, uint32* load_once, uint32* load_always); 388 389 /*"port timesync tx timestamp offset set/get"*/ 390 int pm8x50_port_timesync_tx_timestamp_offset_set(int unit, int port, pm_info_t pm_info, uint32 ts_offset); 391 int pm8x50_port_timesync_tx_timestamp_offset_get(int unit, int port, pm_info_t pm_info, uint32* ts_offset); 392 393 /*"port timesync rx timestamp offset set/get"*/ 394 int pm8x50_port_timesync_rx_timestamp_offset_set(int unit, int port, pm_info_t pm_info, uint32 ts_offset); 395 int pm8x50_port_timesync_rx_timestamp_offset_get(int unit, int port, pm_info_t pm_info, uint32* ts_offset); 396 397 /*set/get interrupt enable value. */ 398 int pm8x50_port_interrupt_enable_set(int unit, int port, pm_info_t pm_info, int intr_type, uint32 val); 399 int pm8x50_port_interrupt_enable_get(int unit, int port, pm_info_t pm_info, int intr_type, uint32* val); 400 401 /*get interrupt status value. */ 402 int pm8x50_port_interrupt_get(int unit, int port, pm_info_t pm_info, int intr_type, uint32* val); 403 404 /*get interrupt value array. */ 405 int pm8x50_port_interrupts_get(int unit, int port, pm_info_t pm_info, int arr_max_size, uint32* intr_arr, uint32* size); 406 407 /* portmod check if external phy is legacy*/ 408 int pm8x50_port_check_legacy_phy(int unit, int port, pm_info_t pm_info, int* legacy_phy); 409 410 /* portmod phy failover mode*/ 411 int pm8x50_port_failover_mode_set(int unit, int port, pm_info_t pm_info, phymod_failover_mode_t failover); 412 int pm8x50_port_failover_mode_get(int unit, int port, pm_info_t pm_info, phymod_failover_mode_t* failover); 413 414 /* portmod port rsv mask set*/ 415 int pm8x50_port_mac_rsv_mask_set(int unit, int port, pm_info_t pm_info, uint32 rsv_mask); 416 417 /* portmod restore information after warmboot*/ 418 int pm8x50_port_warmboot_db_restore(int unit, int port, pm_info_t pm_info, const portmod_port_interface_config_t* intf_config, const portmod_port_init_config_t* init_config, phymod_operation_mode_t phy_op_mode); 419 420 /* portmod port flow control config*/ 421 int pm8x50_port_flow_control_set(int unit, int port, pm_info_t pm_info, int merge_mode_en, int parallel_fc_en); 422 423 /*Portmod state for any logical port dynamixc settings*/ 424 int pm8x50_port_update_dynamic_state(int unit, int port, pm_info_t pm_info, uint32_t port_dynamic_state); 425 426 /*get phy operation mode. */ 427 int pm8x50_port_phy_op_mode_get(int unit, int port, pm_info_t pm_info, phymod_operation_mode_t* val); 428 429 /*override function for board lane swap. */ 430 int pm8x50_port_lane_map_set(int unit, int port, pm_info_t pm_info, uint32 flags, const phymod_lane_map_t* lane_map); 431 int pm8x50_port_lane_map_get(int unit, int port, pm_info_t pm_info, uint32 flags, phymod_lane_map_t* lane_map); 432 433 /*Get timestamp and sequence id of tx 1588 packet.*/ 434 int pm8x50_port_timesync_tx_info_get(int unit, int port, pm_info_t pm_info, portmod_fifo_status_t* tx_info); 435 436 /*PM Core init routine for DNX devices; XGS does not call this API but calls portmod_pm_serdes_core_init() directly*/ 437 int pm8x50_core_add(int unit, int pm_id, pm_info_t pm_info, const portmod_port_add_info_t* add_info); 438 439 /*PM Core init routine*/ 440 int pm8x50_pm_serdes_core_init(int unit, int pm_id, pm_info_t pm_info, const portmod_port_add_info_t* add_info); 441 442 /*Returns if the PortMacro associated with the port is initialized or not*/ 443 int pm8x50_pm_is_initialized(int unit, int pm_id, pm_info_t pm_info, int* is_initialized); 444 445 /*Port speed validation.*/ 446 int pm8x50_port_speed_config_validate(int unit, int port, pm_info_t pm_info, const portmod_speed_config_t* speed_config, portmod_pbmp_t* affected_pbmp); 447 448 /*Enable port macro.*/ 449 int pm8x50_pm_enable(int unit, int pm_id, pm_info_t pm_info, int enable); 450 451 /*Get the logical port bitmap based on the input PM ID*/ 452 int pm8x50_pm_logical_pbmp_get(int unit, int pm_id, pm_info_t pm_info, portmod_pbmp_t* logical_pbmp); 453 454 /*Reconfigure the vco rate for pm core.*/ 455 int pm8x50_pm_vco_reconfig(int unit, int pm_id, pm_info_t pm_info, const portmod_vco_type_t* vco); 456 457 /* set/get the speed config for the specified port.*/ 458 int pm8x50_port_speed_config_set(int unit, int port, pm_info_t pm_info, const portmod_speed_config_t* speed_config); 459 int pm8x50_port_speed_config_get(int unit, int port, pm_info_t pm_info, portmod_speed_config_t* speed_config); 460 461 /*Validate a set of speed config within a port macro.*/ 462 int pm8x50_pm_speed_config_validate(int unit, int pm_id, pm_info_t pm_info, const portmod_pbmp_t* ports, int flag, portmod_pm_vco_setting_t* vco_setting); 463 464 /*Get the suggested VCO values based on the speed config list of a PM*/ 465 int pm8x50_pm_vcos_get(int unit, portmod_dispatch_type_t pm_type, uint32 flags, portmod_pm_vco_setting_t* vco_select); 466 467 /*Set/get port auto negotiation ability*/ 468 int pm8x50_port_autoneg_ability_advert_set(int unit, int port, pm_info_t pm_info, int num_abilities, const portmod_port_speed_ability_t* abilities); 469 int pm8x50_port_autoneg_ability_advert_get(int unit, int port, pm_info_t pm_info, int max_num_abilities, portmod_port_speed_ability_t* abilities, int* actual_num_abilities); 470 471 /*Port ability remote Adv get*/ 472 int pm8x50_port_autoneg_ability_remote_get(int unit, int port, pm_info_t pm_info, int max_num_abilities, portmod_port_speed_ability_t* abilities, int* actual_num_abilities); 473 474 /*Port tx taps set\get*/ 475 int pm8x50_port_tx_set(int unit, int port, pm_info_t pm_info, const phymod_tx_t* tx); 476 int pm8x50_port_tx_get(int unit, int port, pm_info_t pm_info, phymod_tx_t* tx); 477 478 /*Port SyncE clock control config*/ 479 int pm8x50_port_synce_clk_ctrl_set(int unit, int port, pm_info_t pm_info, const portmod_port_synce_clk_ctrl_t* cfg); 480 int pm8x50_port_synce_clk_ctrl_get(int unit, int port, pm_info_t pm_info, portmod_port_synce_clk_ctrl_t* cfg); 481 482 /*Process PM interrupts.*/ 483 int pm8x50_pm_interrupt_process(int unit, int pm_id, pm_info_t pm_info, portmod_ecc_intr_info_t* ecc_err_info); 484 485 /**/ 486 int pm8x50_pm_core_num_get(int unit, pm_info_t pm_info, int* core_num); 487 488 /*RLM config set */ 489 int pm8x50_port_rlm_config_set(int unit, int port, pm_info_t pm_info, int enable, const portmod_port_rlm_config_t* rlm_config); 490 491 /*RLM status get */ 492 int pm8x50_port_rlm_config_get(int unit, int port, pm_info_t pm_info, int* enable, portmod_port_rlm_config_t* rlm_status); 493 494 /*RLM status get */ 495 int pm8x50_port_rlm_status_get(int unit, int port, pm_info_t pm_info, portmod_port_rlm_status_t* rlm_status); 496 497 #endif /*_PM8X50_H_*/