pm4x10_qtc.h (29103B)
1 /* 2 * 3 * 4 * 5 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 6 * 7 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 8 * 9 * 10 * DO NOT EDIT THIS FILE! 11 */ 12 13 #ifndef _PM4X10_QTC_H__H_ 14 #define _PM4X10_QTC_H__H_ 15 16 #include <phymod/phymod.h> 17 #include <phymod/phymod_diagnostics.h> 18 #include <phymod/phymod_reg.h> 19 #include <soc/cprimod/cprimod.h> 20 #include <soc/portmod/portmod_defs.h> 21 /*Get whether the inerface type is supported by PM */ 22 int pm4x10_qtc_pm_interface_type_is_supported(int unit, soc_port_if_t interface, int* is_supported); 23 24 /*Add new pm.*/ 25 int pm4x10_qtc_pm_init(int unit, const portmod_pm_create_info_internal_t* pm_add_info, int wb_buffer_index, pm_info_t pm_info); 26 27 /*Release PM resources*/ 28 int pm4x10_qtc_pm_destroy(int unit, pm_info_t pm_info); 29 30 /*Add new port*/ 31 int pm4x10_qtc_port_attach(int unit, int port, pm_info_t pm_info, const portmod_port_add_info_t* add_info); 32 33 /*Set PM in bypass mode. should be called in the aggregator code.*/ 34 int pm4x10_qtc_pm_bypass_set(int unit, pm_info_t pm_info, int enable); 35 36 /*get port cores' phymod access*/ 37 int pm4x10_qtc_pm_core_info_get(int unit, pm_info_t pm_info, int phyn, portmod_pm_core_info_t* core_info); 38 39 /*Get PM phys.*/ 40 int pm4x10_qtc_pm_phys_get(int unit, pm_info_t pm_info, portmod_pbmp_t* phys); 41 42 /*Port remove in PM level*/ 43 int pm4x10_qtc_port_detach(int unit, int port, pm_info_t pm_info); 44 45 /*Port replace in PM level*/ 46 int pm4x10_qtc_port_replace(int unit, int port, pm_info_t pm_info, int new_port); 47 48 /*Port enable*/ 49 int pm4x10_qtc_port_enable_set(int unit, int port, pm_info_t pm_info, int flags, int enable); 50 int pm4x10_qtc_port_enable_get(int unit, int port, pm_info_t pm_info, int flags, int* enable); 51 52 /* set/get the interface, speed and encapsulation for the specified port. 53 For the First port within core this function initialize the PM, MAC and PHY before configure the port.*/ 54 int pm4x10_qtc_port_interface_config_set(int unit, int port, pm_info_t pm_info, const portmod_port_interface_config_t* config, int phy_init_flags); 55 int pm4x10_qtc_port_interface_config_get(int unit, int port, pm_info_t pm_info, portmod_port_interface_config_t* config, int phy_init_flags); 56 57 /* get the default line-side (outmost) interface type of a port based on its speed, encap, number of lanes, etc, when there is or there is not an ext PHY*/ 58 int pm4x10_qtc_port_default_interface_get(int unit, int port, pm_info_t pm_info, const portmod_port_interface_config_t* config, soc_port_if_t* interface); 59 60 /* check whether the interface type is valid based on the port speed, #lanes, etc*/ 61 int pm4x10_qtc_port_interface_check(int unit, int port, pm_info_t pm_info, const portmod_port_interface_config_t* config, int is_ext_phy, soc_port_if_t interface, int* is_valid); 62 63 /*Port cl72 set\get*/ 64 int pm4x10_qtc_port_cl72_set(int unit, int port, pm_info_t pm_info, uint32 enable); 65 int pm4x10_qtc_port_cl72_get(int unit, int port, pm_info_t pm_info, uint32* enable); 66 67 /*Get port cl72 status*/ 68 int pm4x10_qtc_port_cl72_status_get(int unit, int port, pm_info_t pm_info, phymod_cl72_status_t* status); 69 70 /*Port speed set\get*/ 71 int pm4x10_qtc_port_loopback_set(int unit, int port, pm_info_t pm_info, portmod_loopback_mode_t loopback_type, int enable); 72 int pm4x10_qtc_port_loopback_get(int unit, int port, pm_info_t pm_info, portmod_loopback_mode_t loopback_type, int* enable); 73 74 /*Port RX MAC ENABLE set\get*/ 75 int pm4x10_qtc_port_rx_mac_enable_set(int unit, int port, pm_info_t pm_info, int enable); 76 int pm4x10_qtc_port_rx_mac_enable_get(int unit, int port, pm_info_t pm_info, int* enable); 77 78 /*Port TX MAC ENABLE set\get*/ 79 int pm4x10_qtc_port_tx_mac_enable_set(int unit, int port, pm_info_t pm_info, int enable); 80 int pm4x10_qtc_port_tx_mac_enable_get(int unit, int port, pm_info_t pm_info, int* enable); 81 82 /*get port auto negotiation local ability*/ 83 int pm4x10_qtc_port_ability_local_get(int unit, int port, pm_info_t pm_info, uint32 phy_flags, portmod_port_ability_t* ability); 84 85 /*Set\Get autoneg*/ 86 int pm4x10_qtc_port_autoneg_set(int unit, int port, pm_info_t pm_info, uint32 phy_flags, const phymod_autoneg_control_t* an); 87 int pm4x10_qtc_port_autoneg_get(int unit, int port, pm_info_t pm_info, uint32 phy_flags, phymod_autoneg_control_t* an); 88 89 /*Get autoneg status*/ 90 int pm4x10_qtc_port_autoneg_status_get(int unit, int port, pm_info_t pm_info, phymod_autoneg_status_t* an_status); 91 92 /*get link status*/ 93 int pm4x10_qtc_port_link_get(int unit, int port, pm_info_t pm_info, int flags, int* link); 94 95 /*get latch down link status (whether link was ever down since last clear)*/ 96 int pm4x10_qtc_port_link_latch_down_get(int unit, int port, pm_info_t pm_info, uint32 flags, int* link); 97 98 /* link up event */ 99 int pm4x10_qtc_port_phy_link_up_event(int unit, int port, pm_info_t pm_info); 100 101 /* link down event */ 102 int pm4x10_qtc_port_phy_link_down_event(int unit, int port, pm_info_t pm_info); 103 104 /*PRBS configuration set/get*/ 105 int pm4x10_qtc_port_prbs_config_set(int unit, int port, pm_info_t pm_info, portmod_prbs_mode_t mode, int flags, const phymod_prbs_t* config); 106 int pm4x10_qtc_port_prbs_config_get(int unit, int port, pm_info_t pm_info, portmod_prbs_mode_t mode, int flags, phymod_prbs_t* config); 107 108 /*PRBS enable set/get*/ 109 int pm4x10_qtc_port_prbs_enable_set(int unit, int port, pm_info_t pm_info, portmod_prbs_mode_t mode, int flags, int enable); 110 int pm4x10_qtc_port_prbs_enable_get(int unit, int port, pm_info_t pm_info, portmod_prbs_mode_t mode, int flags, int* enable); 111 112 /*PRBS status get*/ 113 int pm4x10_qtc_port_prbs_status_get(int unit, int port, pm_info_t pm_info, portmod_prbs_mode_t mode, int flags, phymod_prbs_status_t* status); 114 115 /*Number of lanes get*/ 116 int pm4x10_qtc_port_nof_lanes_get(int unit, int port, pm_info_t pm_info, int* nof_lanes); 117 118 /*Set port PHYs' firmware mode*/ 119 int pm4x10_qtc_port_firmware_mode_set(int unit, int port, pm_info_t pm_info, phymod_firmware_mode_t fw_mode); 120 int pm4x10_qtc_port_firmware_mode_get(int unit, int port, pm_info_t pm_info, phymod_firmware_mode_t* fw_mode); 121 122 /*Filter packets smaller than the specified threshold*/ 123 int pm4x10_qtc_port_runt_threshold_set(int unit, int port, pm_info_t pm_info, int value); 124 int pm4x10_qtc_port_runt_threshold_get(int unit, int port, pm_info_t pm_info, int* value); 125 126 /*Filter packets bigger than the specified value*/ 127 int pm4x10_qtc_port_max_packet_size_set(int unit, int port, pm_info_t pm_info, int value); 128 int pm4x10_qtc_port_max_packet_size_get(int unit, int port, pm_info_t pm_info, int* value); 129 130 /*TX pad packets to the specified size. values smaller than 17 means pad is disabled.*/ 131 int pm4x10_qtc_port_pad_size_set(int unit, int port, pm_info_t pm_info, int value); 132 int pm4x10_qtc_port_pad_size_get(int unit, int port, pm_info_t pm_info, int* value); 133 134 /*set/get the MAC source address that will be sent in case of Pause/LLFC*/ 135 int pm4x10_qtc_port_tx_mac_sa_set(int unit, int port, pm_info_t pm_info, sal_mac_addr_t mac_sa); 136 int pm4x10_qtc_port_tx_mac_sa_get(int unit, int port, pm_info_t pm_info, sal_mac_addr_t mac_sa); 137 138 /*set/get SA recognized for MAC control packets in addition to the standard 0x0180C2000001*/ 139 int pm4x10_qtc_port_rx_mac_sa_set(int unit, int port, pm_info_t pm_info, sal_mac_addr_t mac_sa); 140 int pm4x10_qtc_port_rx_mac_sa_get(int unit, int port, pm_info_t pm_info, sal_mac_addr_t mac_sa); 141 142 /*set/get Average inter-packet gap*/ 143 int pm4x10_qtc_port_tx_average_ipg_set(int unit, int port, pm_info_t pm_info, int value); 144 int pm4x10_qtc_port_tx_average_ipg_get(int unit, int port, pm_info_t pm_info, int* value); 145 146 /*local fault set/get*/ 147 int pm4x10_qtc_port_local_fault_control_set(int unit, int port, pm_info_t pm_info, const portmod_local_fault_control_t* control); 148 int pm4x10_qtc_port_local_fault_control_get(int unit, int port, pm_info_t pm_info, portmod_local_fault_control_t* control); 149 150 /*remote fault set/get*/ 151 int pm4x10_qtc_port_remote_fault_control_set(int unit, int port, pm_info_t pm_info, const portmod_remote_fault_control_t* control); 152 int pm4x10_qtc_port_remote_fault_control_get(int unit, int port, pm_info_t pm_info, portmod_remote_fault_control_t* control); 153 154 /*local fault steatus get*/ 155 int pm4x10_qtc_port_local_fault_status_get(int unit, int port, pm_info_t pm_info, int* value); 156 157 /*remote fault status get*/ 158 int pm4x10_qtc_port_remote_fault_status_get(int unit, int port, pm_info_t pm_info, int* value); 159 160 /*local fault steatus clear*/ 161 int pm4x10_qtc_port_local_fault_status_clear(int unit, int port, pm_info_t pm_info); 162 163 /*remote fault status clear*/ 164 int pm4x10_qtc_port_remote_fault_status_clear(int unit, int port, pm_info_t pm_info); 165 166 /*set/get Pause FC configuration*/ 167 int pm4x10_qtc_port_pause_control_set(int unit, int port, pm_info_t pm_info, const portmod_pause_control_t* control); 168 int pm4x10_qtc_port_pause_control_get(int unit, int port, pm_info_t pm_info, portmod_pause_control_t* control); 169 170 /*set/get PFC FC configuration*/ 171 int pm4x10_qtc_port_pfc_control_set(int unit, int port, pm_info_t pm_info, const portmod_pfc_control_t* control); 172 int pm4x10_qtc_port_pfc_control_get(int unit, int port, pm_info_t pm_info, portmod_pfc_control_t* control); 173 174 /*set/get LLFC FC configuration*/ 175 int pm4x10_qtc_port_llfc_control_set(int unit, int port, pm_info_t pm_info, const portmod_llfc_control_t* control); 176 int pm4x10_qtc_port_llfc_control_get(int unit, int port, pm_info_t pm_info, portmod_llfc_control_t* control); 177 178 /*Routine for MAC\PHY sync.*/ 179 int pm4x10_qtc_port_update(int unit, int port, pm_info_t pm_info, const portmod_port_update_control_t* update_control); 180 181 /*get port cores' phymod access*/ 182 int pm4x10_qtc_port_core_access_get(int unit, int port, pm_info_t pm_info, int phyn, int max_cores, phymod_core_access_t* core_access_arr, int* nof_cores, int* is_most_ext); 183 184 /*Get lane phymod access structure. can be used for per lane operations*/ 185 int pm4x10_qtc_port_phy_lane_access_get(int unit, int port, pm_info_t pm_info, const portmod_access_get_params_t* params, int max_phys, phymod_phy_access_t* access, int* nof_phys, int* is_most_ext); 186 187 /*Port duplex set\get*/ 188 int pm4x10_qtc_port_duplex_set(int unit, int port, pm_info_t pm_info, int enable); 189 int pm4x10_qtc_port_duplex_get(int unit, int port, pm_info_t pm_info, int* enable); 190 191 /*Port PHY Control register read*/ 192 int pm4x10_qtc_port_phy_reg_read(int unit, int port, pm_info_t pm_info, int lane, int flags, int reg_addr, uint32* value); 193 194 /*Port PHY Control register write*/ 195 int pm4x10_qtc_port_phy_reg_write(int unit, int port, pm_info_t pm_info, int lane, int flags, int reg_addr, uint32 value); 196 197 /*Port Reset set\get*/ 198 int pm4x10_qtc_port_reset_set(int unit, int port, pm_info_t pm_info, int mode, int opcode, int value); 199 int pm4x10_qtc_port_reset_get(int unit, int port, pm_info_t pm_info, int mode, int opcode, int* value); 200 201 /*Port remote Adv get*/ 202 int pm4x10_qtc_port_adv_remote_get(int unit, int port, pm_info_t pm_info, int* value); 203 204 /*Drv Name Get*/ 205 int pm4x10_qtc_port_drv_name_get(int unit, int port, pm_info_t pm_info, char* name, int len); 206 207 /*get port auto negotiation local ability*/ 208 int pm4x10_qtc_port_ability_advert_set(int unit, int port, pm_info_t pm_info, uint32 phy_flags, portmod_port_ability_t* ability); 209 int pm4x10_qtc_port_ability_advert_get(int unit, int port, pm_info_t pm_info, uint32 phy_flags, portmod_port_ability_t* ability); 210 211 /*Port ability remote Adv get*/ 212 int pm4x10_qtc_port_ability_remote_get(int unit, int port, pm_info_t pm_info, uint32 phy_flags, portmod_port_ability_t* ability); 213 214 /*Port Mac Control Spacing Stretch*/ 215 int pm4x10_qtc_port_frame_spacing_stretch_set(int unit, int port, pm_info_t pm_info, int spacing); 216 int pm4x10_qtc_port_frame_spacing_stretch_get(int unit, int port, pm_info_t pm_info, const int* spacing); 217 218 /*get port timestamps in fifo*/ 219 int pm4x10_qtc_port_diag_fifo_status_get(int unit, int port, pm_info_t pm_info, const portmod_fifo_status_t* diag_info); 220 221 /*set/get pass control frames.*/ 222 int pm4x10_qtc_port_rx_control_set(int unit, int port, pm_info_t pm_info, const portmod_rx_control_t* rx_ctrl); 223 int pm4x10_qtc_port_rx_control_get(int unit, int port, pm_info_t pm_info, portmod_rx_control_t* rx_ctrl); 224 225 /*set PFC config registers.*/ 226 int pm4x10_qtc_port_pfc_config_set(int unit, int port, pm_info_t pm_info, const portmod_pfc_config_t* pfc_cfg); 227 int pm4x10_qtc_port_pfc_config_get(int unit, int port, pm_info_t pm_info, portmod_pfc_config_t* pfc_cfg); 228 229 /*set EEE Config.*/ 230 int pm4x10_qtc_port_eee_set(int unit, int port, pm_info_t pm_info, const portmod_eee_t* eee); 231 int pm4x10_qtc_port_eee_get(int unit, int port, pm_info_t pm_info, portmod_eee_t* eee); 232 233 /*set EEE Config.*/ 234 int pm4x10_qtc_port_eee_clock_set(int unit, int port, pm_info_t pm_info, const portmod_eee_clock_t* eee_clk); 235 int pm4x10_qtc_port_eee_clock_get(int unit, int port, pm_info_t pm_info, portmod_eee_clock_t* eee_clk); 236 237 /*set Vlan Inner/Outer tag.*/ 238 int pm4x10_qtc_port_vlan_tag_set(int unit, int port, pm_info_t pm_info, const portmod_vlan_tag_t* vlan_tag); 239 int pm4x10_qtc_port_vlan_tag_get(int unit, int port, pm_info_t pm_info, portmod_vlan_tag_t* vlan_tag); 240 241 /*set modid field.*/ 242 int pm4x10_qtc_port_modid_set(int unit, int port, pm_info_t pm_info, int value); 243 244 /*set modid field.*/ 245 int pm4x10_qtc_port_clear_rx_lss_status_set(int unit, int port, pm_info_t pm_info, int lcl_fault, int rmt_fault); 246 int pm4x10_qtc_port_clear_rx_lss_status_get(int unit, int port, pm_info_t pm_info, int* lcl_fault, int* rmt_fault); 247 248 /*Attaches an external phy lane to a specific port macro*/ 249 int pm4x10_qtc_xphy_lane_attach_to_pm(int unit, pm_info_t pm_info, int iphy, int phyn, const portmod_xphy_lane_connection_t* lane_connection); 250 251 /*Attaches an external phy lane to a specific port macro*/ 252 int pm4x10_qtc_xphy_lane_detach_from_pm(int unit, pm_info_t pm_info, int iphy, int phyn, portmod_xphy_lane_connection_t* lane_connection); 253 254 /*Toggle Lag Failover Status.*/ 255 int pm4x10_qtc_port_lag_failover_status_toggle(int unit, int port, pm_info_t pm_info); 256 257 /*Toggle Lag Failover loopback set / get.*/ 258 int pm4x10_qtc_port_lag_failover_loopback_set(int unit, int port, pm_info_t pm_info, int value); 259 int pm4x10_qtc_port_lag_failover_loopback_get(int unit, int port, pm_info_t pm_info, int* value); 260 261 /*set port mode.*/ 262 int pm4x10_qtc_port_mode_set(int unit, int port, pm_info_t pm_info, const portmod_port_mode_info_t* mode); 263 int pm4x10_qtc_port_mode_get(int unit, int port, pm_info_t pm_info, portmod_port_mode_info_t* mode); 264 265 /*set port encap.*/ 266 int pm4x10_qtc_port_encap_set(int unit, int port, pm_info_t pm_info, int flags, portmod_encap_t encap); 267 int pm4x10_qtc_port_encap_get(int unit, int port, pm_info_t pm_info, int* flags, portmod_encap_t* encap); 268 269 /*set port register higig field.*/ 270 int pm4x10_qtc_port_higig_mode_set(int unit, int port, pm_info_t pm_info, int mode); 271 int pm4x10_qtc_port_higig_mode_get(int unit, int port, pm_info_t pm_info, int* mode); 272 273 /*set port register higig field.*/ 274 int pm4x10_qtc_port_higig2_mode_set(int unit, int port, pm_info_t pm_info, int mode); 275 int pm4x10_qtc_port_higig2_mode_get(int unit, int port, pm_info_t pm_info, int* mode); 276 277 /*set port register port type field.*/ 278 int pm4x10_qtc_port_config_port_type_set(int unit, int port, pm_info_t pm_info, int type); 279 int pm4x10_qtc_port_config_port_type_get(int unit, int port, pm_info_t pm_info, int* type); 280 281 /*set/get hwfailover for trident.*/ 282 int pm4x10_qtc_port_trunk_hwfailover_config_set(int unit, int port, pm_info_t pm_info, int hw_count); 283 int pm4x10_qtc_port_trunk_hwfailover_config_get(int unit, int port, pm_info_t pm_info, int* enable); 284 285 /*set/get hwfailover for trident.*/ 286 int pm4x10_qtc_port_trunk_hwfailover_status_get(int unit, int port, pm_info_t pm_info, int* loopback); 287 288 /*port diagnostics control.*/ 289 int pm4x10_qtc_port_diag_ctrl(int unit, int port, pm_info_t pm_info, uint32 inst, int op_type, int op_cmd, const void* arg); 290 291 /*Get the reference clock value 156 or 125.*/ 292 int pm4x10_qtc_port_ref_clk_get(int unit, int port, pm_info_t pm_info, int* ref_clk); 293 294 /*Disable lag failover.*/ 295 int pm4x10_qtc_port_lag_failover_disable(int unit, int port, pm_info_t pm_info); 296 297 /*Disable lag failover.*/ 298 int pm4x10_qtc_port_lag_remove_failover_lpbk_set(int unit, int port, pm_info_t pm_info, int val); 299 int pm4x10_qtc_port_lag_remove_failover_lpbk_get(int unit, int port, pm_info_t pm_info, int* val); 300 301 /*Disable lag failover.*/ 302 int pm4x10_qtc_port_cntmaxsize_set(int unit, int port, pm_info_t pm_info, int val); 303 int pm4x10_qtc_port_cntmaxsize_get(int unit, int port, pm_info_t pm_info, int* val); 304 305 /*Read multiple bytes get.*/ 306 int pm4x10_qtc_port_multi_get(int unit, int port, pm_info_t pm_info, portmod_multi_get_t* multi_get); 307 308 /*Get Info needed to restore after drain cells.*/ 309 int pm4x10_qtc_port_drain_cell_get(int unit, int port, pm_info_t pm_info, portmod_drain_cells_t* drain_cells); 310 311 /*Restore informaation after drain cells.*/ 312 int pm4x10_qtc_port_drain_cell_stop(int unit, int port, pm_info_t pm_info, const portmod_drain_cells_t* drain_cells); 313 314 /*Restore informaation after drain cells.*/ 315 int pm4x10_qtc_port_drain_cell_start(int unit, int port, pm_info_t pm_info); 316 317 /**/ 318 int pm4x10_qtc_port_drain_cells_rx_enable(int unit, int port, pm_info_t pm_info, int rx_en); 319 320 /**/ 321 int pm4x10_qtc_port_egress_queue_drain_rx_en(int unit, int port, pm_info_t pm_info, int rx_en); 322 323 /**/ 324 int pm4x10_qtc_port_mac_ctrl_set(int unit, int port, pm_info_t pm_info, uint64 ctrl); 325 326 /**/ 327 int pm4x10_qtc_port_txfifo_cell_cnt_get(int unit, int port, pm_info_t pm_info, uint32* cnt); 328 329 /**/ 330 int pm4x10_qtc_port_egress_queue_drain_get(int unit, int port, pm_info_t pm_info, uint64* ctrl, int* rxen); 331 332 /*Set/get port mac reset */ 333 int pm4x10_qtc_port_mac_reset_set(int unit, int port, pm_info_t pm_info, int val); 334 int pm4x10_qtc_port_mac_reset_get(int unit, int port, pm_info_t pm_info, int* val); 335 336 /**/ 337 int pm4x10_qtc_port_soft_reset_toggle(int unit, int port, pm_info_t pm_info, int idx); 338 339 /*Check if MAC needs to be reset.*/ 340 int pm4x10_qtc_port_mac_reset_check(int unit, int port, pm_info_t pm_info, int enable, int* reset); 341 342 /**/ 343 int pm4x10_qtc_port_core_num_get(int unit, int port, pm_info_t pm_info, int* core_num); 344 345 /**/ 346 int pm4x10_qtc_port_e2ecc_hdr_set(int unit, int port, pm_info_t pm_info, const portmod_port_higig_e2ecc_hdr_t* e2ecc_hdr); 347 int pm4x10_qtc_port_e2ecc_hdr_get(int unit, int port, pm_info_t pm_info, portmod_port_higig_e2ecc_hdr_t* e2ecc_hdr); 348 349 /**/ 350 int pm4x10_qtc_port_e2e_enable_set(int unit, int port, pm_info_t pm_info, int enable); 351 int pm4x10_qtc_port_e2e_enable_get(int unit, int port, pm_info_t pm_info, int* enable); 352 353 /**/ 354 int pm4x10_qtc_port_fallback_lane_get(int unit, int port, pm_info_t pm_info, int* fallback_lane); 355 356 /*get the speed for the specified port*/ 357 int pm4x10_qtc_port_speed_get(int unit, int port, pm_info_t pm_info, int* speed); 358 359 /*Port discard set*/ 360 int pm4x10_qtc_port_discard_set(int unit, int port, pm_info_t pm_info, int discard); 361 362 /*Port soft reset set set*/ 363 int pm4x10_qtc_port_soft_reset_set(int unit, int port, pm_info_t pm_info, int idx, int val, int flags); 364 365 /*Port tx_en=0 and softreset mac*/ 366 int pm4x10_qtc_port_tx_down(int unit, int port, pm_info_t pm_info); 367 368 /*reconfig pgw.*/ 369 int pm4x10_qtc_port_pgw_reconfig(int unit, int port, pm_info_t pm_info, const portmod_port_mode_info_t* pmode, int phy_port, int flags); 370 371 /*Routine to notify internal phy of external phy link state.*/ 372 int pm4x10_qtc_port_notify(int unit, int port, pm_info_t pm_info, int link); 373 374 /*"port control phy timesync config set/get"*/ 375 int pm4x10_qtc_port_control_phy_timesync_set(int unit, int port, pm_info_t pm_info, portmod_port_control_phy_timesync_t config, uint64 value); 376 int pm4x10_qtc_port_control_phy_timesync_get(int unit, int port, pm_info_t pm_info, portmod_port_control_phy_timesync_t config, uint64* value); 377 378 /*"port timesync config set/get"*/ 379 int pm4x10_qtc_port_timesync_config_set(int unit, int port, pm_info_t pm_info, const portmod_phy_timesync_config_t* config); 380 int pm4x10_qtc_port_timesync_config_get(int unit, int port, pm_info_t pm_info, portmod_phy_timesync_config_t* config); 381 382 /*"port timesync enable set/get"*/ 383 int pm4x10_qtc_port_timesync_enable_set(int unit, int port, pm_info_t pm_info, uint32 enable); 384 int pm4x10_qtc_port_timesync_enable_get(int unit, int port, pm_info_t pm_info, uint32* enable); 385 386 /*"port timesync nco addend set/get"*/ 387 int pm4x10_qtc_port_timesync_nco_addend_set(int unit, int port, pm_info_t pm_info, uint32 freq_step); 388 int pm4x10_qtc_port_timesync_nco_addend_get(int unit, int port, pm_info_t pm_info, uint32* freq_step); 389 390 /*"port timesync framesync info set/get"*/ 391 int pm4x10_qtc_port_timesync_framesync_mode_set(int unit, int port, pm_info_t pm_info, const portmod_timesync_framesync_t* framesync); 392 int pm4x10_qtc_port_timesync_framesync_mode_get(int unit, int port, pm_info_t pm_info, portmod_timesync_framesync_t* framesync); 393 394 /*"port timesync local time set/get"*/ 395 int pm4x10_qtc_port_timesync_local_time_set(int unit, int port, pm_info_t pm_info, uint64 local_time); 396 int pm4x10_qtc_port_timesync_local_time_get(int unit, int port, pm_info_t pm_info, uint64* local_time); 397 398 /*"port timesync framesync info set/get"*/ 399 int pm4x10_qtc_port_timesync_load_ctrl_set(int unit, int port, pm_info_t pm_info, uint32 load_once, uint32 load_always); 400 int pm4x10_qtc_port_timesync_load_ctrl_get(int unit, int port, pm_info_t pm_info, uint32* load_once, uint32* load_always); 401 402 /*"port timesync tx timestamp offset set/get"*/ 403 int pm4x10_qtc_port_timesync_tx_timestamp_offset_set(int unit, int port, pm_info_t pm_info, uint32 ts_offset); 404 int pm4x10_qtc_port_timesync_tx_timestamp_offset_get(int unit, int port, pm_info_t pm_info, uint32* ts_offset); 405 406 /*"port timesync rx timestamp offset set/get"*/ 407 int pm4x10_qtc_port_timesync_rx_timestamp_offset_set(int unit, int port, pm_info_t pm_info, uint32 ts_offset); 408 int pm4x10_qtc_port_timesync_rx_timestamp_offset_get(int unit, int port, pm_info_t pm_info, uint32* ts_offset); 409 410 /*"port timesync interrupt mask set/get"*/ 411 int pm4x10_qtc_port_phy_intr_enable_set(int unit, int port, pm_info_t pm_info, uint32 intr_enable); 412 int pm4x10_qtc_port_phy_intr_enable_get(int unit, int port, pm_info_t pm_info, uint32* intr_enable); 413 414 /*"port phy interrupt status get"*/ 415 int pm4x10_qtc_port_phy_intr_status_get(int unit, int port, pm_info_t pm_info, uint32* intr_status); 416 417 /*"port phy interrupt status clear"*/ 418 int pm4x10_qtc_port_phy_intr_status_clear(int unit, int port, pm_info_t pm_info); 419 420 /*"port timesync force frame sync."*/ 421 int pm4x10_qtc_port_phy_timesync_do_sync(int unit, int port, pm_info_t pm_info); 422 423 /*"port timesync capture timestamp get"*/ 424 int pm4x10_qtc_port_timesync_capture_timestamp_get(int unit, int port, pm_info_t pm_info, uint64* cap_ts); 425 426 /*"port timesync heartbeat timestamp get"*/ 427 int pm4x10_qtc_port_timesync_heartbeat_timestamp_get(int unit, int port, pm_info_t pm_info, uint64* hb_ts); 428 429 /*"port timesync tx timestamp offset set/get"*/ 430 int pm4x10_qtc_port_edc_config_set(int unit, int port, pm_info_t pm_info, const portmod_edc_config_t* config); 431 int pm4x10_qtc_port_edc_config_get(int unit, int port, pm_info_t pm_info, portmod_edc_config_t* config); 432 433 /*set/get interrupt enable value. */ 434 int pm4x10_qtc_port_interrupt_enable_set(int unit, int port, pm_info_t pm_info, int intr_type, uint32 val); 435 int pm4x10_qtc_port_interrupt_enable_get(int unit, int port, pm_info_t pm_info, int intr_type, uint32* val); 436 437 /*get interrupt status value. */ 438 int pm4x10_qtc_port_interrupt_get(int unit, int port, pm_info_t pm_info, int intr_type, uint32* val); 439 440 /*get interrupt value array. */ 441 int pm4x10_qtc_port_interrupts_get(int unit, int port, pm_info_t pm_info, int arr_max_size, uint32* intr_arr, uint32* size); 442 443 /* portmod check if external phy is legacy*/ 444 int pm4x10_qtc_port_check_legacy_phy(int unit, int port, pm_info_t pm_info, int* legacy_phy); 445 446 /* portmod phy failover mode*/ 447 int pm4x10_qtc_port_failover_mode_set(int unit, int port, pm_info_t pm_info, phymod_failover_mode_t failover); 448 int pm4x10_qtc_port_failover_mode_get(int unit, int port, pm_info_t pm_info, phymod_failover_mode_t* failover); 449 450 /* portmod port rsv mask set*/ 451 int pm4x10_qtc_port_mac_rsv_mask_set(int unit, int port, pm_info_t pm_info, uint32 rsv_mask); 452 453 /* portmod port mib reset toggle*/ 454 int pm4x10_qtc_port_mib_reset_toggle(int unit, int port, pm_info_t pm_info, int port_index); 455 456 /* portmod restore information after warmboot*/ 457 int pm4x10_qtc_port_warmboot_db_restore(int unit, int port, pm_info_t pm_info, const portmod_port_interface_config_t* intf_config, const portmod_port_init_config_t* init_config, phymod_operation_mode_t phy_op_mode); 458 459 /* portmod port flow control config*/ 460 int pm4x10_qtc_port_flow_control_set(int unit, int port, pm_info_t pm_info, int merge_mode_en, int parallel_fc_en); 461 462 /*Portmod state for any logical port dynamixc settings*/ 463 int pm4x10_qtc_port_update_dynamic_state(int unit, int port, pm_info_t pm_info, uint32_t port_dynamic_state); 464 465 /*get phy operation mode. */ 466 int pm4x10_qtc_port_phy_op_mode_get(int unit, int port, pm_info_t pm_info, phymod_operation_mode_t* val); 467 468 /*override function for board lane swap. */ 469 int pm4x10_qtc_port_lane_map_set(int unit, int port, pm_info_t pm_info, uint32 flags, const phymod_lane_map_t* lane_map); 470 int pm4x10_qtc_port_lane_map_get(int unit, int port, pm_info_t pm_info, uint32 flags, phymod_lane_map_t* lane_map); 471 472 /*override function for board lane swap. */ 473 int pm4x10_qtc_port_polarity_set(int unit, int port, pm_info_t pm_info, const phymod_polarity_t* polarity); 474 int pm4x10_qtc_port_polarity_get(int unit, int port, pm_info_t pm_info, phymod_polarity_t* polarity); 475 476 /*set/get port medium type config. */ 477 int pm4x10_qtc_port_medium_config_set(int unit, int port, pm_info_t pm_info, soc_port_medium_t medium, soc_phy_config_t* config); 478 int pm4x10_qtc_port_medium_config_get(int unit, int port, pm_info_t pm_info, soc_port_medium_t medium, soc_phy_config_t* config); 479 480 /*get port medium type. */ 481 int pm4x10_qtc_port_medium_get(int unit, int port, pm_info_t pm_info, soc_port_medium_t* medium); 482 483 /*Get whether the Port Macro is part of PM12x10*/ 484 int pm4x10_qtc_pm_is_in_pm12x10(int unit, pm_info_t pm_info, int* in_pm12x10); 485 486 /*get pll multiplier*/ 487 int pm4x10_qtc_port_pll_div_get(int unit, int port, pm_info_t pm_info, const portmod_port_resources_t* port_resource, uint32_t* pll_div); 488 489 /*set/get the port master mode if the port is running SGMII AN*/ 490 int pm4x10_qtc_port_master_set(int unit, int port, pm_info_t pm_info, int master_mode); 491 int pm4x10_qtc_port_master_get(int unit, int port, pm_info_t pm_info, int* master_mode); 492 493 /*Port preemption configuration set\get*/ 494 int pm4x10_qtc_preemption_control_set(int unit, int port, pm_info_t pm_info, portmod_preemption_control_t type, uint32 value); 495 int pm4x10_qtc_preemption_control_get(int unit, int port, pm_info_t pm_info, portmod_preemption_control_t type, uint32* value); 496 497 /*Get the preemption status on the transmit side*/ 498 int pm4x10_qtc_preemption_tx_status_get(int unit, int port, pm_info_t pm_info, uint32* value); 499 500 /*Get the preemption verification status or status on number of verify attempts/messages if verification is not complete(failed/succeed)*/ 501 int pm4x10_qtc_preemption_verify_status_get(int unit, int port, pm_info_t pm_info, portmod_preemption_verify_status_type_t type, uint32* value); 502 503 /*Set/Get specified preemption rx timeout and timeout count. This API is not exposed to end user, and needs to be called only during device init.*/ 504 int pm4x10_qtc_preemption_rx_timeout_set(int unit, int port, pm_info_t pm_info, uint32 enable, uint32 timeout_cnt); 505 int pm4x10_qtc_preemption_rx_timeout_get(int unit, int port, pm_info_t pm_info, uint32* enable, uint32* timeout_cnt); 506 507 /*Get the number of lanes belong to a logical port.*/ 508 int pm4x10_qtc_port_lane_count_get(int unit, int port, pm_info_t pm_info, int line_side, int* num_lanes); 509 510 /*Get timestamp and sequence id of tx 1588 packet.*/ 511 int pm4x10_qtc_port_timesync_tx_info_get(int unit, int port, pm_info_t pm_info, portmod_fifo_status_t* tx_info); 512 513 /*Get the lane mask belong to a logical port.*/ 514 int pm4x10_qtc_port_lane_mask_get(int unit, int port, pm_info_t pm_info, const portmod_access_get_params_t* params, int* lane_mask, int* xphy_id); 515 516 /*Port mac timestamp enable set/get*/ 517 int pm4x10_qtc_port_mac_timestamp_enable_set(int unit, int port, pm_info_t pm_info, int enable); 518 int pm4x10_qtc_port_mac_timestamp_enable_get(int unit, int port, pm_info_t pm_info, int* enable); 519 520 /*"Set/get Portmacro TXPI SDM override configuration. This function is for debug."*/ 521 int pm4x10_qtc_port_txpi_override_set(int unit, int port, pm_info_t pm_info, const portmod_txpi_override_t* override); 522 int pm4x10_qtc_port_txpi_override_get(int unit, int port, pm_info_t pm_info, portmod_txpi_override_t* override); 523 524 /*"Get Portmacro TXPI SDM value. This funciont is for debug"*/ 525 int pm4x10_qtc_port_txpi_sdm_data_get(int unit, int port, pm_info_t pm_info, int* value); 526 527 /*Port SyncE clock control config*/ 528 int pm4x10_qtc_port_synce_clk_ctrl_set(int unit, int port, pm_info_t pm_info, const portmod_port_synce_clk_ctrl_t* cfg); 529 int pm4x10_qtc_port_synce_clk_ctrl_get(int unit, int port, pm_info_t pm_info, portmod_port_synce_clk_ctrl_t* cfg); 530 531 #endif /*_PM4X10_QTC_H_*/