pm4x10.h (29124B)
1 /* 2 * 3 * 4 * 5 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 6 * 7 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 8 * 9 * 10 * DO NOT EDIT THIS FILE! 11 */ 12 13 #ifndef _PM4X10_H__H_ 14 #define _PM4X10_H__H_ 15 16 #include <phymod/phymod.h> 17 #include <phymod/phymod_diagnostics.h> 18 #include <phymod/phymod_reg.h> 19 #include <soc/cprimod/cprimod.h> 20 #include <soc/portmod/portmod_defs.h> 21 /*Get whether the inerface type is supported by PM */ 22 int pm4x10_pm_interface_type_is_supported(int unit, soc_port_if_t interface, int* is_supported); 23 24 /*Add new pm.*/ 25 int pm4x10_pm_init(int unit, const portmod_pm_create_info_internal_t* pm_add_info, int wb_buffer_index, pm_info_t pm_info); 26 27 /*Release PM resources*/ 28 int pm4x10_pm_destroy(int unit, pm_info_t pm_info); 29 30 /*Add new port*/ 31 int pm4x10_port_attach(int unit, int port, pm_info_t pm_info, const portmod_port_add_info_t* add_info); 32 33 /*Replace the default bus and FW load method*/ 34 int pm4x10_default_bus_update(int unit, pm_info_t pm_info, const portmod_bus_update_t* update); 35 36 /*Set PM in bypass mode. should be called in the aggregator code.*/ 37 int pm4x10_pm_bypass_set(int unit, pm_info_t pm_info, int enable); 38 39 /*get port cores' phymod access*/ 40 int pm4x10_pm_core_info_get(int unit, pm_info_t pm_info, int phyn, portmod_pm_core_info_t* core_info); 41 42 /*Get PM phys.*/ 43 int pm4x10_pm_phys_get(int unit, pm_info_t pm_info, portmod_pbmp_t* phys); 44 45 /*Port remove in PM level*/ 46 int pm4x10_port_detach(int unit, int port, pm_info_t pm_info); 47 48 /*Port replace in PM level*/ 49 int pm4x10_port_replace(int unit, int port, pm_info_t pm_info, int new_port); 50 51 /*Port enable*/ 52 int pm4x10_port_enable_set(int unit, int port, pm_info_t pm_info, int flags, int enable); 53 int pm4x10_port_enable_get(int unit, int port, pm_info_t pm_info, int flags, int* enable); 54 55 /* set/get the interface, speed and encapsulation for the specified port. 56 For the First port within core this function initialize the PM, MAC and PHY before configure the port.*/ 57 int pm4x10_port_interface_config_set(int unit, int port, pm_info_t pm_info, const portmod_port_interface_config_t* config, int phy_init_flags); 58 int pm4x10_port_interface_config_get(int unit, int port, pm_info_t pm_info, portmod_port_interface_config_t* config, int phy_init_flags); 59 60 /* get the default line-side (outmost) interface type of a port based on its speed, encap, number of lanes, etc, when there is or there is not an ext PHY*/ 61 int pm4x10_port_default_interface_get(int unit, int port, pm_info_t pm_info, const portmod_port_interface_config_t* config, soc_port_if_t* interface); 62 63 /* check whether the interface type is valid based on the port speed, #lanes, etc*/ 64 int pm4x10_port_interface_check(int unit, int port, pm_info_t pm_info, const portmod_port_interface_config_t* config, int is_ext_phy, soc_port_if_t interface, int* is_valid); 65 66 /*Port cl72 set\get*/ 67 int pm4x10_port_cl72_set(int unit, int port, pm_info_t pm_info, uint32 enable); 68 int pm4x10_port_cl72_get(int unit, int port, pm_info_t pm_info, uint32* enable); 69 70 /*Get port cl72 status*/ 71 int pm4x10_port_cl72_status_get(int unit, int port, pm_info_t pm_info, phymod_cl72_status_t* status); 72 73 /*Port speed set\get*/ 74 int pm4x10_port_loopback_set(int unit, int port, pm_info_t pm_info, portmod_loopback_mode_t loopback_type, int enable); 75 int pm4x10_port_loopback_get(int unit, int port, pm_info_t pm_info, portmod_loopback_mode_t loopback_type, int* enable); 76 77 /*Port RX MAC ENABLE set\get*/ 78 int pm4x10_port_rx_mac_enable_set(int unit, int port, pm_info_t pm_info, int enable); 79 int pm4x10_port_rx_mac_enable_get(int unit, int port, pm_info_t pm_info, int* enable); 80 81 /*Port TX MAC ENABLE set\get*/ 82 int pm4x10_port_tx_mac_enable_set(int unit, int port, pm_info_t pm_info, int enable); 83 int pm4x10_port_tx_mac_enable_get(int unit, int port, pm_info_t pm_info, int* enable); 84 85 /*get port auto negotiation local ability*/ 86 int pm4x10_port_ability_local_get(int unit, int port, pm_info_t pm_info, uint32 phy_flags, portmod_port_ability_t* ability); 87 88 /*Set\Get autoneg*/ 89 int pm4x10_port_autoneg_set(int unit, int port, pm_info_t pm_info, uint32 phy_flags, const phymod_autoneg_control_t* an); 90 int pm4x10_port_autoneg_get(int unit, int port, pm_info_t pm_info, uint32 phy_flags, phymod_autoneg_control_t* an); 91 92 /*Get autoneg status*/ 93 int pm4x10_port_autoneg_status_get(int unit, int port, pm_info_t pm_info, phymod_autoneg_status_t* an_status); 94 95 /*get link status*/ 96 int pm4x10_port_link_get(int unit, int port, pm_info_t pm_info, int flags, int* link); 97 98 /*get latch down link status (whether link was ever down since last clear)*/ 99 int pm4x10_port_link_latch_down_get(int unit, int port, pm_info_t pm_info, uint32 flags, int* link); 100 101 /* link up event */ 102 int pm4x10_port_phy_link_up_event(int unit, int port, pm_info_t pm_info); 103 104 /* link down event */ 105 int pm4x10_port_phy_link_down_event(int unit, int port, pm_info_t pm_info); 106 107 /*PRBS configuration set/get*/ 108 int pm4x10_port_prbs_config_set(int unit, int port, pm_info_t pm_info, portmod_prbs_mode_t mode, int flags, const phymod_prbs_t* config); 109 int pm4x10_port_prbs_config_get(int unit, int port, pm_info_t pm_info, portmod_prbs_mode_t mode, int flags, phymod_prbs_t* config); 110 111 /*PRBS enable set/get*/ 112 int pm4x10_port_prbs_enable_set(int unit, int port, pm_info_t pm_info, portmod_prbs_mode_t mode, int flags, int enable); 113 int pm4x10_port_prbs_enable_get(int unit, int port, pm_info_t pm_info, portmod_prbs_mode_t mode, int flags, int* enable); 114 115 /*PRBS status get*/ 116 int pm4x10_port_prbs_status_get(int unit, int port, pm_info_t pm_info, portmod_prbs_mode_t mode, int flags, phymod_prbs_status_t* status); 117 118 /*Number of lanes get*/ 119 int pm4x10_port_nof_lanes_get(int unit, int port, pm_info_t pm_info, int* nof_lanes); 120 121 /*Set port PHYs' firmware mode*/ 122 int pm4x10_port_firmware_mode_set(int unit, int port, pm_info_t pm_info, phymod_firmware_mode_t fw_mode); 123 int pm4x10_port_firmware_mode_get(int unit, int port, pm_info_t pm_info, phymod_firmware_mode_t* fw_mode); 124 125 /*Filter packets smaller than the specified threshold*/ 126 int pm4x10_port_runt_threshold_set(int unit, int port, pm_info_t pm_info, int value); 127 int pm4x10_port_runt_threshold_get(int unit, int port, pm_info_t pm_info, int* value); 128 129 /*Filter packets bigger than the specified value*/ 130 int pm4x10_port_max_packet_size_set(int unit, int port, pm_info_t pm_info, int value); 131 int pm4x10_port_max_packet_size_get(int unit, int port, pm_info_t pm_info, int* value); 132 133 /*TX pad packets to the specified size. values smaller than 17 means pad is disabled.*/ 134 int pm4x10_port_pad_size_set(int unit, int port, pm_info_t pm_info, int value); 135 int pm4x10_port_pad_size_get(int unit, int port, pm_info_t pm_info, int* value); 136 137 /*set/get the MAC source address that will be sent in case of Pause/LLFC*/ 138 int pm4x10_port_tx_mac_sa_set(int unit, int port, pm_info_t pm_info, sal_mac_addr_t mac_sa); 139 int pm4x10_port_tx_mac_sa_get(int unit, int port, pm_info_t pm_info, sal_mac_addr_t mac_sa); 140 141 /*set/get SA recognized for MAC control packets in addition to the standard 0x0180C2000001*/ 142 int pm4x10_port_rx_mac_sa_set(int unit, int port, pm_info_t pm_info, sal_mac_addr_t mac_sa); 143 int pm4x10_port_rx_mac_sa_get(int unit, int port, pm_info_t pm_info, sal_mac_addr_t mac_sa); 144 145 /*set/get Average inter-packet gap*/ 146 int pm4x10_port_tx_average_ipg_set(int unit, int port, pm_info_t pm_info, int value); 147 int pm4x10_port_tx_average_ipg_get(int unit, int port, pm_info_t pm_info, int* value); 148 149 /*local fault set/get*/ 150 int pm4x10_port_local_fault_control_set(int unit, int port, pm_info_t pm_info, const portmod_local_fault_control_t* control); 151 int pm4x10_port_local_fault_control_get(int unit, int port, pm_info_t pm_info, portmod_local_fault_control_t* control); 152 153 /*remote fault set/get*/ 154 int pm4x10_port_remote_fault_control_set(int unit, int port, pm_info_t pm_info, const portmod_remote_fault_control_t* control); 155 int pm4x10_port_remote_fault_control_get(int unit, int port, pm_info_t pm_info, portmod_remote_fault_control_t* control); 156 157 /*local fault steatus get*/ 158 int pm4x10_port_local_fault_status_get(int unit, int port, pm_info_t pm_info, int* value); 159 160 /*remote fault status get*/ 161 int pm4x10_port_remote_fault_status_get(int unit, int port, pm_info_t pm_info, int* value); 162 163 /*local fault steatus clear*/ 164 int pm4x10_port_local_fault_status_clear(int unit, int port, pm_info_t pm_info); 165 166 /*remote fault status clear*/ 167 int pm4x10_port_remote_fault_status_clear(int unit, int port, pm_info_t pm_info); 168 169 /*set/get Pause FC configuration*/ 170 int pm4x10_port_pause_control_set(int unit, int port, pm_info_t pm_info, const portmod_pause_control_t* control); 171 int pm4x10_port_pause_control_get(int unit, int port, pm_info_t pm_info, portmod_pause_control_t* control); 172 173 /*set/get PFC FC configuration*/ 174 int pm4x10_port_pfc_control_set(int unit, int port, pm_info_t pm_info, const portmod_pfc_control_t* control); 175 int pm4x10_port_pfc_control_get(int unit, int port, pm_info_t pm_info, portmod_pfc_control_t* control); 176 177 /*set/get LLFC FC configuration*/ 178 int pm4x10_port_llfc_control_set(int unit, int port, pm_info_t pm_info, const portmod_llfc_control_t* control); 179 int pm4x10_port_llfc_control_get(int unit, int port, pm_info_t pm_info, portmod_llfc_control_t* control); 180 181 /*Routine for MAC\PHY sync.*/ 182 int pm4x10_port_update(int unit, int port, pm_info_t pm_info, const portmod_port_update_control_t* update_control); 183 184 /*get port cores' phymod access*/ 185 int pm4x10_port_core_access_get(int unit, int port, pm_info_t pm_info, int phyn, int max_cores, phymod_core_access_t* core_access_arr, int* nof_cores, int* is_most_ext); 186 187 /*Get lane phymod access structure. can be used for per lane operations*/ 188 int pm4x10_port_phy_lane_access_get(int unit, int port, pm_info_t pm_info, const portmod_access_get_params_t* params, int max_phys, phymod_phy_access_t* access, int* nof_phys, int* is_most_ext); 189 190 /*Port duplex set\get*/ 191 int pm4x10_port_duplex_set(int unit, int port, pm_info_t pm_info, int enable); 192 int pm4x10_port_duplex_get(int unit, int port, pm_info_t pm_info, int* enable); 193 194 /*Port PHY Control register read*/ 195 int pm4x10_port_phy_reg_read(int unit, int port, pm_info_t pm_info, int lane, int flags, int reg_addr, uint32* value); 196 197 /*Port PHY Control register write*/ 198 int pm4x10_port_phy_reg_write(int unit, int port, pm_info_t pm_info, int lane, int flags, int reg_addr, uint32 value); 199 200 /*Port Reset set\get*/ 201 int pm4x10_port_reset_set(int unit, int port, pm_info_t pm_info, int mode, int opcode, int value); 202 int pm4x10_port_reset_get(int unit, int port, pm_info_t pm_info, int mode, int opcode, int* value); 203 204 /*Port remote Adv get*/ 205 int pm4x10_port_adv_remote_get(int unit, int port, pm_info_t pm_info, int* value); 206 207 /*Drv Name Get*/ 208 int pm4x10_port_drv_name_get(int unit, int port, pm_info_t pm_info, char* name, int len); 209 210 /*set/get port fec enable according to local/remote FEC ability*/ 211 int pm4x10_port_fec_enable_set(int unit, int port, pm_info_t pm_info, uint32 phy_flags, uint32_t enable); 212 int pm4x10_port_fec_enable_get(int unit, int port, pm_info_t pm_info, uint32 phy_flags, uint32_t* enable); 213 214 /*get port auto negotiation local ability*/ 215 int pm4x10_port_ability_advert_set(int unit, int port, pm_info_t pm_info, uint32 phy_flags, portmod_port_ability_t* ability); 216 int pm4x10_port_ability_advert_get(int unit, int port, pm_info_t pm_info, uint32 phy_flags, portmod_port_ability_t* ability); 217 218 /*Port ability remote Adv get*/ 219 int pm4x10_port_ability_remote_get(int unit, int port, pm_info_t pm_info, uint32 phy_flags, portmod_port_ability_t* ability); 220 221 /*Port Mac Control Spacing Stretch*/ 222 int pm4x10_port_frame_spacing_stretch_set(int unit, int port, pm_info_t pm_info, int spacing); 223 int pm4x10_port_frame_spacing_stretch_get(int unit, int port, pm_info_t pm_info, const int* spacing); 224 225 /*get port timestamps in fifo*/ 226 int pm4x10_port_diag_fifo_status_get(int unit, int port, pm_info_t pm_info, const portmod_fifo_status_t* diag_info); 227 228 /*set/get pass control frames.*/ 229 int pm4x10_port_rx_control_set(int unit, int port, pm_info_t pm_info, const portmod_rx_control_t* rx_ctrl); 230 int pm4x10_port_rx_control_get(int unit, int port, pm_info_t pm_info, portmod_rx_control_t* rx_ctrl); 231 232 /*set PFC config registers.*/ 233 int pm4x10_port_pfc_config_set(int unit, int port, pm_info_t pm_info, const portmod_pfc_config_t* pfc_cfg); 234 int pm4x10_port_pfc_config_get(int unit, int port, pm_info_t pm_info, portmod_pfc_config_t* pfc_cfg); 235 236 /*set EEE Config.*/ 237 int pm4x10_port_eee_set(int unit, int port, pm_info_t pm_info, const portmod_eee_t* eee); 238 int pm4x10_port_eee_get(int unit, int port, pm_info_t pm_info, portmod_eee_t* eee); 239 240 /*set EEE Config.*/ 241 int pm4x10_port_eee_clock_set(int unit, int port, pm_info_t pm_info, const portmod_eee_clock_t* eee_clk); 242 int pm4x10_port_eee_clock_get(int unit, int port, pm_info_t pm_info, portmod_eee_clock_t* eee_clk); 243 244 /*set Vlan Inner/Outer tag.*/ 245 int pm4x10_port_vlan_tag_set(int unit, int port, pm_info_t pm_info, const portmod_vlan_tag_t* vlan_tag); 246 int pm4x10_port_vlan_tag_get(int unit, int port, pm_info_t pm_info, portmod_vlan_tag_t* vlan_tag); 247 248 /*set modid field.*/ 249 int pm4x10_port_modid_set(int unit, int port, pm_info_t pm_info, int value); 250 251 /*set modid field.*/ 252 int pm4x10_port_clear_rx_lss_status_set(int unit, int port, pm_info_t pm_info, int lcl_fault, int rmt_fault); 253 int pm4x10_port_clear_rx_lss_status_get(int unit, int port, pm_info_t pm_info, int* lcl_fault, int* rmt_fault); 254 255 /*Attaches an external phy lane to a specific port macro*/ 256 int pm4x10_xphy_lane_attach_to_pm(int unit, pm_info_t pm_info, int iphy, int phyn, const portmod_xphy_lane_connection_t* lane_connection); 257 258 /*Attaches an external phy lane to a specific port macro*/ 259 int pm4x10_xphy_lane_detach_from_pm(int unit, pm_info_t pm_info, int iphy, int phyn, portmod_xphy_lane_connection_t* lane_connection); 260 261 /*Toggle Lag Failover Status.*/ 262 int pm4x10_port_lag_failover_status_toggle(int unit, int port, pm_info_t pm_info); 263 264 /*Toggle Lag Failover loopback set / get.*/ 265 int pm4x10_port_lag_failover_loopback_set(int unit, int port, pm_info_t pm_info, int value); 266 int pm4x10_port_lag_failover_loopback_get(int unit, int port, pm_info_t pm_info, int* value); 267 268 /*set port mode.*/ 269 int pm4x10_port_mode_set(int unit, int port, pm_info_t pm_info, const portmod_port_mode_info_t* mode); 270 int pm4x10_port_mode_get(int unit, int port, pm_info_t pm_info, portmod_port_mode_info_t* mode); 271 272 /*set port encap.*/ 273 int pm4x10_port_encap_set(int unit, int port, pm_info_t pm_info, int flags, portmod_encap_t encap); 274 int pm4x10_port_encap_get(int unit, int port, pm_info_t pm_info, int* flags, portmod_encap_t* encap); 275 276 /*set port register higig field.*/ 277 int pm4x10_port_higig_mode_set(int unit, int port, pm_info_t pm_info, int mode); 278 int pm4x10_port_higig_mode_get(int unit, int port, pm_info_t pm_info, int* mode); 279 280 /*set port register higig field.*/ 281 int pm4x10_port_higig2_mode_set(int unit, int port, pm_info_t pm_info, int mode); 282 int pm4x10_port_higig2_mode_get(int unit, int port, pm_info_t pm_info, int* mode); 283 284 /*set port register port type field.*/ 285 int pm4x10_port_config_port_type_set(int unit, int port, pm_info_t pm_info, int type); 286 int pm4x10_port_config_port_type_get(int unit, int port, pm_info_t pm_info, int* type); 287 288 /*set/get hwfailover for trident.*/ 289 int pm4x10_port_trunk_hwfailover_config_set(int unit, int port, pm_info_t pm_info, int hw_count); 290 int pm4x10_port_trunk_hwfailover_config_get(int unit, int port, pm_info_t pm_info, int* enable); 291 292 /*set/get hwfailover for trident.*/ 293 int pm4x10_port_trunk_hwfailover_status_get(int unit, int port, pm_info_t pm_info, int* loopback); 294 295 /*port diagnostics control.*/ 296 int pm4x10_port_diag_ctrl(int unit, int port, pm_info_t pm_info, uint32 inst, int op_type, int op_cmd, const void* arg); 297 298 /*Get the reference clock value 156 or 125.*/ 299 int pm4x10_port_ref_clk_get(int unit, int port, pm_info_t pm_info, int* ref_clk); 300 301 /*Disable lag failover.*/ 302 int pm4x10_port_lag_failover_disable(int unit, int port, pm_info_t pm_info); 303 304 /*Disable lag failover.*/ 305 int pm4x10_port_lag_remove_failover_lpbk_set(int unit, int port, pm_info_t pm_info, int val); 306 int pm4x10_port_lag_remove_failover_lpbk_get(int unit, int port, pm_info_t pm_info, int* val); 307 308 /*Disable lag failover.*/ 309 int pm4x10_port_cntmaxsize_set(int unit, int port, pm_info_t pm_info, int val); 310 int pm4x10_port_cntmaxsize_get(int unit, int port, pm_info_t pm_info, int* val); 311 312 /*Read multiple bytes get.*/ 313 int pm4x10_port_multi_get(int unit, int port, pm_info_t pm_info, portmod_multi_get_t* multi_get); 314 315 /*Get Info needed to restore after drain cells.*/ 316 int pm4x10_port_drain_cell_get(int unit, int port, pm_info_t pm_info, portmod_drain_cells_t* drain_cells); 317 318 /*Restore informaation after drain cells.*/ 319 int pm4x10_port_drain_cell_stop(int unit, int port, pm_info_t pm_info, const portmod_drain_cells_t* drain_cells); 320 321 /*Restore informaation after drain cells.*/ 322 int pm4x10_port_drain_cell_start(int unit, int port, pm_info_t pm_info); 323 324 /**/ 325 int pm4x10_port_drain_cells_rx_enable(int unit, int port, pm_info_t pm_info, int rx_en); 326 327 /**/ 328 int pm4x10_port_egress_queue_drain_rx_en(int unit, int port, pm_info_t pm_info, int rx_en); 329 330 /**/ 331 int pm4x10_port_mac_ctrl_set(int unit, int port, pm_info_t pm_info, uint64 ctrl); 332 333 /**/ 334 int pm4x10_port_txfifo_cell_cnt_get(int unit, int port, pm_info_t pm_info, uint32* cnt); 335 336 /**/ 337 int pm4x10_port_egress_queue_drain_get(int unit, int port, pm_info_t pm_info, uint64* ctrl, int* rxen); 338 339 /*Set/get port mac reset */ 340 int pm4x10_port_mac_reset_set(int unit, int port, pm_info_t pm_info, int val); 341 int pm4x10_port_mac_reset_get(int unit, int port, pm_info_t pm_info, int* val); 342 343 /**/ 344 int pm4x10_port_soft_reset_toggle(int unit, int port, pm_info_t pm_info, int idx); 345 346 /*Check if MAC needs to be reset.*/ 347 int pm4x10_port_mac_reset_check(int unit, int port, pm_info_t pm_info, int enable, int* reset); 348 349 /**/ 350 int pm4x10_port_core_num_get(int unit, int port, pm_info_t pm_info, int* core_num); 351 352 /**/ 353 int pm4x10_port_e2ecc_hdr_set(int unit, int port, pm_info_t pm_info, const portmod_port_higig_e2ecc_hdr_t* e2ecc_hdr); 354 int pm4x10_port_e2ecc_hdr_get(int unit, int port, pm_info_t pm_info, portmod_port_higig_e2ecc_hdr_t* e2ecc_hdr); 355 356 /**/ 357 int pm4x10_port_e2e_enable_set(int unit, int port, pm_info_t pm_info, int enable); 358 int pm4x10_port_e2e_enable_get(int unit, int port, pm_info_t pm_info, int* enable); 359 360 /**/ 361 int pm4x10_port_fallback_lane_get(int unit, int port, pm_info_t pm_info, int* fallback_lane); 362 363 /*get the speed for the specified port*/ 364 int pm4x10_port_speed_get(int unit, int port, pm_info_t pm_info, int* speed); 365 366 /*Port discard set*/ 367 int pm4x10_port_discard_set(int unit, int port, pm_info_t pm_info, int discard); 368 369 /*Port soft reset set set*/ 370 int pm4x10_port_soft_reset_set(int unit, int port, pm_info_t pm_info, int idx, int val, int flags); 371 372 /*Port tx_en=0 and softreset mac*/ 373 int pm4x10_port_tx_down(int unit, int port, pm_info_t pm_info); 374 375 /*reconfig pgw.*/ 376 int pm4x10_port_pgw_reconfig(int unit, int port, pm_info_t pm_info, const portmod_port_mode_info_t* pmode, int phy_port, int flags); 377 378 /*Routine to notify internal phy of external phy link state.*/ 379 int pm4x10_port_notify(int unit, int port, pm_info_t pm_info, int link); 380 381 /*"port control phy timesync config set/get"*/ 382 int pm4x10_port_control_phy_timesync_set(int unit, int port, pm_info_t pm_info, portmod_port_control_phy_timesync_t config, uint64 value); 383 int pm4x10_port_control_phy_timesync_get(int unit, int port, pm_info_t pm_info, portmod_port_control_phy_timesync_t config, uint64* value); 384 385 /*"port timesync config set/get"*/ 386 int pm4x10_port_timesync_config_set(int unit, int port, pm_info_t pm_info, const portmod_phy_timesync_config_t* config); 387 int pm4x10_port_timesync_config_get(int unit, int port, pm_info_t pm_info, portmod_phy_timesync_config_t* config); 388 389 /*"port timesync enable set/get"*/ 390 int pm4x10_port_timesync_enable_set(int unit, int port, pm_info_t pm_info, uint32 enable); 391 int pm4x10_port_timesync_enable_get(int unit, int port, pm_info_t pm_info, uint32* enable); 392 393 /*"port timesync nco addend set/get"*/ 394 int pm4x10_port_timesync_nco_addend_set(int unit, int port, pm_info_t pm_info, uint32 freq_step); 395 int pm4x10_port_timesync_nco_addend_get(int unit, int port, pm_info_t pm_info, uint32* freq_step); 396 397 /*"port timesync framesync info set/get"*/ 398 int pm4x10_port_timesync_framesync_mode_set(int unit, int port, pm_info_t pm_info, const portmod_timesync_framesync_t* framesync); 399 int pm4x10_port_timesync_framesync_mode_get(int unit, int port, pm_info_t pm_info, portmod_timesync_framesync_t* framesync); 400 401 /*"port timesync local time set/get"*/ 402 int pm4x10_port_timesync_local_time_set(int unit, int port, pm_info_t pm_info, uint64 local_time); 403 int pm4x10_port_timesync_local_time_get(int unit, int port, pm_info_t pm_info, uint64* local_time); 404 405 /*"port timesync framesync info set/get"*/ 406 int pm4x10_port_timesync_load_ctrl_set(int unit, int port, pm_info_t pm_info, uint32 load_once, uint32 load_always); 407 int pm4x10_port_timesync_load_ctrl_get(int unit, int port, pm_info_t pm_info, uint32* load_once, uint32* load_always); 408 409 /*"port timesync tx timestamp offset set/get"*/ 410 int pm4x10_port_timesync_tx_timestamp_offset_set(int unit, int port, pm_info_t pm_info, uint32 ts_offset); 411 int pm4x10_port_timesync_tx_timestamp_offset_get(int unit, int port, pm_info_t pm_info, uint32* ts_offset); 412 413 /*"port timesync rx timestamp offset set/get"*/ 414 int pm4x10_port_timesync_rx_timestamp_offset_set(int unit, int port, pm_info_t pm_info, uint32 ts_offset); 415 int pm4x10_port_timesync_rx_timestamp_offset_get(int unit, int port, pm_info_t pm_info, uint32* ts_offset); 416 417 /*"port timestamp adjust set/get"*/ 418 int pm4x10_port_timestamp_adjust_set(int unit, int port, pm_info_t pm_info, const soc_port_timestamp_adjust_t* ts_adjust); 419 int pm4x10_port_timestamp_adjust_get(int unit, int port, pm_info_t pm_info, soc_port_timestamp_adjust_t* ts_adjust); 420 421 /*"port timesync interrupt mask set/get"*/ 422 int pm4x10_port_phy_intr_enable_set(int unit, int port, pm_info_t pm_info, uint32 intr_enable); 423 int pm4x10_port_phy_intr_enable_get(int unit, int port, pm_info_t pm_info, uint32* intr_enable); 424 425 /*"port phy interrupt status get"*/ 426 int pm4x10_port_phy_intr_status_get(int unit, int port, pm_info_t pm_info, uint32* intr_status); 427 428 /*"port phy interrupt status clear"*/ 429 int pm4x10_port_phy_intr_status_clear(int unit, int port, pm_info_t pm_info); 430 431 /*"port timesync force frame sync."*/ 432 int pm4x10_port_phy_timesync_do_sync(int unit, int port, pm_info_t pm_info); 433 434 /*"port timesync capture timestamp get"*/ 435 int pm4x10_port_timesync_capture_timestamp_get(int unit, int port, pm_info_t pm_info, uint64* cap_ts); 436 437 /*"port timesync heartbeat timestamp get"*/ 438 int pm4x10_port_timesync_heartbeat_timestamp_get(int unit, int port, pm_info_t pm_info, uint64* hb_ts); 439 440 /*"port timesync tx timestamp offset set/get"*/ 441 int pm4x10_port_edc_config_set(int unit, int port, pm_info_t pm_info, const portmod_edc_config_t* config); 442 int pm4x10_port_edc_config_get(int unit, int port, pm_info_t pm_info, portmod_edc_config_t* config); 443 444 /*set/get interrupt enable value. */ 445 int pm4x10_port_interrupt_enable_set(int unit, int port, pm_info_t pm_info, int intr_type, uint32 val); 446 int pm4x10_port_interrupt_enable_get(int unit, int port, pm_info_t pm_info, int intr_type, uint32* val); 447 448 /*get interrupt status value. */ 449 int pm4x10_port_interrupt_get(int unit, int port, pm_info_t pm_info, int intr_type, uint32* val); 450 451 /*get interrupt value array. */ 452 int pm4x10_port_interrupts_get(int unit, int port, pm_info_t pm_info, int arr_max_size, uint32* intr_arr, uint32* size); 453 454 /* portmod check if external phy is legacy*/ 455 int pm4x10_port_check_legacy_phy(int unit, int port, pm_info_t pm_info, int* legacy_phy); 456 457 /* portmod phy failover mode*/ 458 int pm4x10_port_failover_mode_set(int unit, int port, pm_info_t pm_info, phymod_failover_mode_t failover); 459 int pm4x10_port_failover_mode_get(int unit, int port, pm_info_t pm_info, phymod_failover_mode_t* failover); 460 461 /* portmod port rsv mask set*/ 462 int pm4x10_port_mac_rsv_mask_set(int unit, int port, pm_info_t pm_info, uint32 rsv_mask); 463 464 /* portmod port mib reset toggle*/ 465 int pm4x10_port_mib_reset_toggle(int unit, int port, pm_info_t pm_info, int port_index); 466 467 /* portmod restore information after warmboot*/ 468 int pm4x10_port_warmboot_db_restore(int unit, int port, pm_info_t pm_info, const portmod_port_interface_config_t* intf_config, const portmod_port_init_config_t* init_config, phymod_operation_mode_t phy_op_mode); 469 470 /* portmod port flow control config*/ 471 int pm4x10_port_flow_control_set(int unit, int port, pm_info_t pm_info, int merge_mode_en, int parallel_fc_en); 472 473 /*Portmod state for any logical port dynamixc settings*/ 474 int pm4x10_port_update_dynamic_state(int unit, int port, pm_info_t pm_info, uint32_t port_dynamic_state); 475 476 /*get phy operation mode. */ 477 int pm4x10_port_phy_op_mode_get(int unit, int port, pm_info_t pm_info, phymod_operation_mode_t* val); 478 479 /*override function for board lane swap. */ 480 int pm4x10_port_lane_map_set(int unit, int port, pm_info_t pm_info, uint32 flags, const phymod_lane_map_t* lane_map); 481 int pm4x10_port_lane_map_get(int unit, int port, pm_info_t pm_info, uint32 flags, phymod_lane_map_t* lane_map); 482 483 /*override function for board lane swap. */ 484 int pm4x10_port_polarity_set(int unit, int port, pm_info_t pm_info, const phymod_polarity_t* polarity); 485 int pm4x10_port_polarity_get(int unit, int port, pm_info_t pm_info, phymod_polarity_t* polarity); 486 487 /*set/get port medium type config. */ 488 int pm4x10_port_medium_config_set(int unit, int port, pm_info_t pm_info, soc_port_medium_t medium, soc_phy_config_t* config); 489 int pm4x10_port_medium_config_get(int unit, int port, pm_info_t pm_info, soc_port_medium_t medium, soc_phy_config_t* config); 490 491 /*get port medium type. */ 492 int pm4x10_port_medium_get(int unit, int port, pm_info_t pm_info, soc_port_medium_t* medium); 493 494 /*Get whether the Port Macro is part of PM12x10*/ 495 int pm4x10_pm_is_in_pm12x10(int unit, pm_info_t pm_info, int* in_pm12x10); 496 497 /*get pll multiplier*/ 498 int pm4x10_port_pll_div_get(int unit, int port, pm_info_t pm_info, const portmod_port_resources_t* port_resource, uint32_t* pll_div); 499 500 /*set/get the port master mode if the port is running SGMII AN*/ 501 int pm4x10_port_master_set(int unit, int port, pm_info_t pm_info, int master_mode); 502 int pm4x10_port_master_get(int unit, int port, pm_info_t pm_info, int* master_mode); 503 504 /*Port preemption configuration set\get*/ 505 int pm4x10_preemption_control_set(int unit, int port, pm_info_t pm_info, portmod_preemption_control_t type, uint32 value); 506 int pm4x10_preemption_control_get(int unit, int port, pm_info_t pm_info, portmod_preemption_control_t type, uint32* value); 507 508 /*Get the preemption status on the transmit side*/ 509 int pm4x10_preemption_tx_status_get(int unit, int port, pm_info_t pm_info, uint32* value); 510 511 /*Get the preemption verification status or status on number of verify attempts/messages if verification is not complete(failed/succeed)*/ 512 int pm4x10_preemption_verify_status_get(int unit, int port, pm_info_t pm_info, portmod_preemption_verify_status_type_t type, uint32* value); 513 514 /*Set/Get specified preemption rx timeout and timeout count. This API is not exposed to end user, and needs to be called only during device init.*/ 515 int pm4x10_preemption_rx_timeout_set(int unit, int port, pm_info_t pm_info, uint32 enable, uint32 timeout_cnt); 516 int pm4x10_preemption_rx_timeout_get(int unit, int port, pm_info_t pm_info, uint32* enable, uint32* timeout_cnt); 517 518 /*Get the number of lanes belong to a logical port.*/ 519 int pm4x10_port_lane_count_get(int unit, int port, pm_info_t pm_info, int line_side, int* num_lanes); 520 521 /*Get timestamp and sequence id of tx 1588 packet.*/ 522 int pm4x10_port_timesync_tx_info_get(int unit, int port, pm_info_t pm_info, portmod_fifo_status_t* tx_info); 523 524 /*Get the lane mask belong to a logical port.*/ 525 int pm4x10_port_lane_mask_get(int unit, int port, pm_info_t pm_info, const portmod_access_get_params_t* params, int* lane_mask, int* xphy_id); 526 527 /*Get supported VCOs*/ 528 int pm4x10_port_vcos_get(int unit, int port, pm_info_t pm_info, const portmod_vcos_speed_config_t* speed_config_list, int size, portmod_dual_vcos_t* dual_vco); 529 530 /*Port mac timestamp enable set/get*/ 531 int pm4x10_port_mac_timestamp_enable_set(int unit, int port, pm_info_t pm_info, int enable); 532 int pm4x10_port_mac_timestamp_enable_get(int unit, int port, pm_info_t pm_info, int* enable); 533 534 /*"Set/get Portmacro TXPI SDM override configuration. This function is for debug."*/ 535 int pm4x10_port_txpi_override_set(int unit, int port, pm_info_t pm_info, const portmod_txpi_override_t* override); 536 int pm4x10_port_txpi_override_get(int unit, int port, pm_info_t pm_info, portmod_txpi_override_t* override); 537 538 /*"Get Portmacro TXPI SDM value. This funciont is for debug"*/ 539 int pm4x10_port_txpi_sdm_data_get(int unit, int port, pm_info_t pm_info, int* value); 540 541 /*Port SyncE clock control config*/ 542 int pm4x10_port_synce_clk_ctrl_set(int unit, int port, pm_info_t pm_info, const portmod_port_synce_clk_ctrl_t* cfg); 543 int pm4x10_port_synce_clk_ctrl_get(int unit, int port, pm_info_t pm_info, portmod_port_synce_clk_ctrl_t* cfg); 544 545 #endif /*_PM4X10_H_*/