phyreg.h (2636B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * 7 * This file defines common PHY register definition. 8 * 9 * Its contents are not used directly by applications; it is used only 10 * by header files of parent APIs which need to define PHY register definition. 11 */ 12 13 #ifndef _PHYREG_H 14 #define _PHYREG_H 15 16 #include <shared/phyreg.h> 17 18 #define SOC_PHY_PHYMOD_IBLK_FORCE_LANE _SHR_PORT_PHY_PHYMOD_IBLK_FORCE_LANE 19 #define SOC_PHY_PHYMOD_ACCESS_FLAGS_SHIFT _SHR_PORT_PHY_PHYMOD_ACCESS_FLAGS_SHIFT 20 #define SOC_PHY_PHYMOD_FORCE_LANE_SET(_addr, _lane) \ 21 _SHR_PORT_PHT_PHYMOD_FORCE_LANE_SET(_addr, _lane) 22 23 #define SOC_PHY_SHAD_RETRY_CNT _SHR_PORT_PHY_SHAD_RETRY_CNT 24 25 #define SOC_PHY_INTERNAL _SHR_PORT_PHY_INTERNAL 26 #define SOC_PHY_NOMAP _SHR_PORT_PHY_NOMAP 27 #define SOC_PHY_CLAUSE45 _SHR_PORT_PHY_CLAUSE45 28 #define SOC_PHY_I2C_DATA8 _SHR_PORT_PHY_I2C_DATA8 29 #define SOC_PHY_I2C_DATA16 _SHR_PORT_PHY_I2C_DATA16 30 #define SOC_PHY_PVT_DATA _SHR_PORT_PHY_PVT_DATA 31 #define SOC_PHY_REG_RDB _SHR_PORT_PHY_REG_RDB 32 #define SOC_PHY_REG_MECSEC _SHR_PORT_PHY_REG_MACSEC 33 #define SOC_PHY_REG64_DATA_HI32 _SHR_PORT_PHY_REG64_DATA_HI32 34 35 #define SOC_PHY_CLAUSE45_ADDR(_devad, _regad) \ 36 _SHR_PORT_PHY_CLAUSE45_ADDR(_devad, _regad) 37 #define SOC_PHY_CLAUSE45_DEVAD(_reg_addr) \ 38 _SHR_PORT_PHY_CLAUSE45_DEVAD(_reg_addr) 39 #define SOC_PHY_CLAUSE45_REGAD(_reg_addr) \ 40 _SHR_PORT_PHY_CLAUSE45_REGAD(_reg_addr) 41 #define SOC_PHY_I2C_ADDR(_devad, _regad) \ 42 _SHR_PORT_PHY_I2C_ADDR(_devad, _regad) 43 #define SOC_PHY_I2C_DEVAD(_reg_addr) \ 44 _SHR_PORT_PHY_I2C_DEVAD(_reg_addr) 45 #define SOC_PHY_I2C_REGAD(_reg_addr) \ 46 _SHR_PORT_PHY_I2C_REGAD(_reg_addr) 47 48 /* Indirect PHY register address flags */ 49 #define SOC_PHY_REG_NO_RETRY_ACCESS _SHR_PORT_PHY_REG_NO_RETRY_ACCESS 50 #define SOC_PHY_REG_RESERVE_ACCESS _SHR_PORT_PHY_REG_RESERVE_ACCESS 51 #define SOC_PHY_REG_1000X _SHR_PORT_PHY_REG_1000X 52 #define SOC_PHY_REG_INDIRECT _SHR_PORT_PHY_REG_INDIRECT 53 #define SOC_PHY_REG_DUMMY_ACCESS _SHR_PORT_PHY_REG_DUMMY_ACCESS 54 55 #define SOC_PHY_REG_INDIRECT_ADDR(_flags, _reg_type, _reg_selector) \ 56 _SHR_PORT_PHY_REG_INDIRECT_ADDR(_flags, _reg_type, _reg_selector) 57 #define SOC_PHY_REG_BANK(_reg_addr) _SHR_PORT_PHY_REG_BANK(_reg_addr) 58 #define SOC_PHY_REG_ADDR(_reg_addr) _SHR_PORT_PHY_REG_ADDR(_reg_addr) 59 #define SOC_PHY_REG_FLAGS(_reg_addr) _SHR_PORT_PHY_REG_FLAGS(_reg_addr) 60 61 #endif /* !_PHYREG_H */