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oam.h (4997B)

      1 /*
      2  * 
      3  * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file.
      4  * 
      5  * Copyright 2007-2019 Broadcom Inc. All rights reserved.
      6  *
      7  *
      8  * Its contents are not used directly by applications; it is used only
      9  * by header files of parent APIs which need to define port modes.
     10  */
     11 
     12 #ifndef _SOC_OAM_H
     13 #define _SOC_OAM_H
     14 
     15 #include <shared/port.h>
     16 
     17 
     18 #define SOC_PORT_PHY_OAM_DM_MAC_CHECK_ENABLE _SHR_PORT_PHY_OAM_MAC_CHECK_ENABLE /* Enable MAC check for
     19                                                           Delay Measurement */
     20 #define SOC_PORT_PHY_OAM_DM_CONTROL_WORD_ENABLE _SHR_PORT_PHY_OAM_CONTROL_WORD_ENABLE /* Enable Control Word
     21                                                           for Delay Measurement */
     22 
     23 #define SOC_PORT_PHY_OAM_DM_ENTROPY_ENABLE  _SHR_PORT_PHY_OAM_DM_ENTROPY_ENABLE /* Enable entropy for
     24                                                           Delay Measurement */
     25 #define SOC_PORT_PHY_OAM_DM_TS_FORMAT       _SHR_PORT_PHY_OAM_DM_TS_FORMAT /* Select timestamp
     26                                                           format PTP(0)/NTP(1)
     27                                                           for Delay Measurement */
     28 
     29 /* Port controls for phy OAM */
     30 typedef _shr_port_control_phy_oam_t soc_port_control_phy_oam_t;
     31 #define SOC_PORT_CONTROL_PHY_OAM_DM_TX_ETHERTYPE _SHR_PORT_CONTROL_PHY_OAM_DM_TX_ETHERTYPE /* OAM Delay measurement Tx Ethertype */
     32 #define SOC_PORT_CONTROL_PHY_OAM_DM_RX_ETHERTYPE _SHR_PORT_CONTROL_PHY_OAM_DM_RX_ETHERTYPE /* OAM Delay measurement Rx Ethertype */
     33 #define SOC_PORT_CONTROL_PHY_OAM_DM_TX_PORT_MAC_ADDRESS_INDEX _SHR_PORT_CONTROL_PHY_OAM_DM_TX_PORT_MAC_ADDRESS_INDEX /* Index to select the MAC address. Use
     34                                            index of 1 to select MacAddress1,
     35                                            index of 2 for MacAddress2 and so
     36                                            forth. */
     37 #define SOC_PORT_CONTROL_PHY_OAM_DM_RX_PORT_MAC_ADDRESS_INDEX _SHR_PORT_CONTROL_PHY_OAM_DM_RX_PORT_MAC_ADDRESS_INDEX /* Index to select the MAC address. Use
     38                                            index of 1 to select MacAddress1,
     39                                            index of 2 for MacAddress2 and so
     40                                            forth. */
     41 #define SOC_PORT_CONTROL_PHY_OAM_DM_MAC_ADDRESS_1 _SHR_PORT_CONTROL_PHY_OAM_DM_MAC_ADDRESS_1 /* OAM Delay measurement MAC address 1.
     42                                            There can be multiple MAC address to
     43                                            choose from in a PHY depending upon
     44                                            the design */
     45 #define SOC_PORT_CONTROL_PHY_OAM_DM_MAC_ADDRESS_2 _SHR_PORT_CONTROL_PHY_OAM_DM_MAC_ADDRESS_2 /* OAM Delay measurement MAC address 2.
     46                                            There can be multiple MAC address to
     47                                            choose from in a PHY depending upon
     48                                            the design */
     49 #define SOC_PORT_CONTROL_PHY_OAM_DM_MAC_ADDRESS_3 _SHR_PORT_CONTROL_PHY_OAM_DM_MAC_ADDRESS_3 /* OAM Delay measurement MAC address 3.
     50                                            There can be multiple MAC address to
     51                                            choose from in a PHY depending upon
     52                                            the design */
     53 
     54 /* Phy OAM Delay Measurement Modes */
     55 typedef  _shr_port_config_phy_oam_dm_mode_t soc_port_config_phy_oam_dm_mode_t;
     56 #define SOC_PORT_CONFIG_PHY_OAM_DM_Y1731 _SHR_PORT_CONFIG_PHY_OAM_DM_Y1731
     57 #define SOC_PORT_CONFIG_PHY_OAM_DM_BHH _SHR_PORT_CONFIG_PHY_OAM_DM_BHH
     58 #define SOC_PORT_CONFIG_PHY_OAM_DM_IETF _SHR_PORT_CONFIG_PHY_OAM_DM_IETF
     59 
     60 /* Phy OAM Delay measurement config type. */
     61 typedef struct soc_port_config_phy_oam_dm_s {
     62     uint32 flags;                    /* OAM Delay Measurement config flags */
     63     soc_port_config_phy_oam_dm_mode_t mode; /* OAM Delay Measurement mode Y.1731,
     64                                            BHH or IETF */
     65 } soc_port_config_phy_oam_dm_t;
     66 
     67 /* Phy OAM config type. */
     68 typedef struct soc_port_config_phy_oam_s {
     69     soc_port_config_phy_oam_dm_t tx_dm_config; /* OAM delay measurement config for Tx */
     70     soc_port_config_phy_oam_dm_t rx_dm_config; /* OAM delay measurement config for Rx */
     71 } soc_port_config_phy_oam_t;
     72 
     73 /* soc_port_config_phy_oam_set */
     74 extern int soc_port_config_phy_oam_set(
     75     int unit, 
     76     soc_port_t port, 
     77     soc_port_config_phy_oam_t *conf);
     78 
     79 /* soc_port_config_phy_oam_get */
     80 extern int soc_port_config_phy_oam_get(
     81     int unit, 
     82     soc_port_t port, 
     83     soc_port_config_phy_oam_t *conf);
     84 
     85 /* soc_port_control_phy_oam_set */
     86 extern int soc_port_control_phy_oam_set(
     87     int unit, 
     88     soc_port_t port, 
     89     soc_port_control_phy_oam_t type, 
     90     uint64 value);
     91 
     92 /* soc_port_control_phy_oam_get */
     93 extern int soc_port_control_phy_oam_get(
     94     int unit, 
     95     soc_port_t port, 
     96     soc_port_control_phy_oam_t type, 
     97     uint64 *value);
     98 
     99 #endif  /* !_SOC_OAM_H */
    100