monterey.h (33387B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * 7 * File: monterey.h 8 */ 9 10 #ifndef _SOC_MONTEREY_H_ 11 #define _SOC_MONTEREY_H_ 12 13 #include <soc/drv.h> 14 #include <soc/mem.h> 15 #include <soc/error.h> 16 #include <soc/esw/port.h> 17 #include <include/bcm/cosq.h> 18 #define MONTEREY_PORTS_PER_TSC 4 19 #define MONTEREY_TSCS_PER_PGW 8 20 #define MONTEREY_NUM_XLP_PER_PGW 3 21 #define MONTEREY_NUM_CLP_PER_PGW 5 22 23 #define MONTEREY_PGWS_PER_DEV 2 24 #define MONTEREY_PGW0 0 25 #define MONTEREY_PGW1 1 26 27 #define MONTEREY_PORTS_PER_PGW (MONTEREY_PORTS_PER_TSC * MONTEREY_TSCS_PER_PGW) 28 #define MONTEREY_PORTS_PER_PIPE (MONTEREY_PORTS_PER_PGW * MONTEREY_PGWS_PER_DEV) 29 30 #define SOC_MONTEREY_NUM_EL_L2 1 31 #define SOC_MONTEREY_NUM_EL_SHARED 0 32 #define SOC_MONTEREY_NUM_EL_ALPM 0 33 #define SOC_MONTEREY_NUM_EL_VLAN_XLATE 4 34 #define SOC_MONTEREY_NUM_EL_EGR_VLAN_XLATE 4 35 #define SOC_MONTEREY_NUM_EL_ING_L3_NEXT_HOP 1 36 #define SOC_MONTEREY_NUM_EL_L3_IPMC 4 37 #define SOC_MONTEREY_NUM_EL_L2MC 4 38 39 #define SOC_MONTEREY_RAM_OFFSET_L2_BANK 32768 40 #define SOC_MONTEREY_RAM_OFFSET_L2_SHARED_BANK 0 41 42 #define SOC_MONTEREY_RAM_OFFSET_L3_NARROW 8192 43 #define SOC_MONTEREY_RAM_OFFSET_L3_WIDE 4096 44 #define SOC_MONTEREY_RAM_OFFSET_L3_DOUBLE_WIDE 2048 45 46 #define SOC_MONTEREY_RAM_OFFSET_ING_L3_NEXT_HOP 5120 47 #define SOC_MONTEREY_RAM_OFFSET_L3_IPMC 1024 48 #define SOC_MONTEREY_RAM_OFFSET_L2MC 1024 49 50 #define SOC_MONTEREY_L3_DEFIP_ALPM_PER_BKT_COUNT 1 51 #define SOC_MONTEREY_L3_DEFIP_ALPM_IPV6_128_PER_BKT_COUNT 2 52 #define SOC_MONTEREY_L3_DEFIP_ALPM_IPV6_64_1_PER_BKT_COUNT 3 53 #define SOC_MONTEREY_L3_DEFIP_ALPM_IPV6_64_PER_BKT_COUNT 4 54 #define SOC_MONTEREY_L3_DEFIP_ALPM_IPV4_1_PER_BKT_COUNT 4 55 #define SOC_MONTEREY_L3_DEFIP_ALPM_IPV4_PER_BKT_COUNT 6 56 57 #define SOC_MONTEREY_NUM_ENTRIES_PER_L2_BANK 32768 58 #define SOC_MONTEREY_NUM_ENTRIES_L2_BANK 32768 59 #define SOC_MONTEREY_NUM_ENTRIES_L3_BANK 8192 60 #define SOC_MONTEREY_NUM_ENTRIES_L3_BANK_WIDE 4096 61 #define SOC_MONTEREY_NUM_ENTRIES_L3_BANK_DOUBLE_WIDE 2048 62 63 #define SOC_MONTEREY_ALPM_MAX_BKTS 16384 64 #define SOC_MONTEREY_ALPM_BKT_OFFFSET 2048 65 #define SOC_MONTEREY_ALPM_BKT_MASK 0x3FFF 66 67 #define _SOC_MONTEREY_L2LU_INTR_MASK 0x01000 68 #define _SOC_MONTEREY_FUNC_INTR_MASK _SOC_MONTEREY_L2LU_INTR_MASK 69 #define SOC_MONTEREY_TS_PLL_N1 768 70 #define SOC_MONTEREY_TS_PLL_N2 768 71 #define SOC_MONTEREY_TS_PLL_M1 6544 72 #define SOC_MONTEREY_TS_PLL_M2 6545 73 #define SOC_MONTEREY_TS_PLL_PMAX1 768 74 #define SOC_MONTEREY_TS_PLL_PMAX2 768 75 76 typedef enum soc_monterey_port_ct_speed_e { 77 SOC_MONTEREY_PORT_CT_SPEED_NONE = 0, /* Always First */ 78 SOC_MONTEREY_PORT_CT_SPEED_10M_FULL, 79 SOC_MONTEREY_PORT_CT_SPEED_100M_FULL, 80 SOC_MONTEREY_PORT_CT_SPEED_1000M_FULL, 81 SOC_MONTEREY_PORT_CT_SPEED_2500M_FULL, 82 SOC_MONTEREY_PORT_CT_SPEED_5000M_FULL, 83 SOC_MONTEREY_PORT_CT_SPEED_10000M_FULL, 84 SOC_MONTEREY_PORT_CT_SPEED_11000M_FULL, 85 SOC_MONTEREY_PORT_CT_SPEED_20000M_FULL, 86 SOC_MONTEREY_PORT_CT_SPEED_21000M_FULL, 87 SOC_MONTEREY_PORT_CT_SPEED_25000M_FULL, 88 SOC_MONTEREY_PORT_CT_SPEED_27000M_FULL, 89 SOC_MONTEREY_PORT_CT_SPEED_40000M_FULL, 90 SOC_MONTEREY_PORT_CT_SPEED_42000M_FULL, 91 SOC_MONTEREY_PORT_CT_SPEED_50000M_FULL, 92 SOC_MONTEREY_PORT_CT_SPEED_53000M_FULL, 93 SOC_MONTEREY_PORT_CT_SPEED_100000M_FULL, 94 SOC_MONTEREY_PORT_CT_SPEED_106000M_FULL 95 } soc_monterey_port_ct_speed_t; 96 97 #define SOC_MONTEREY_NUM_MMU_PORTS_PER_PIPE 67 98 99 #define _MONTEREY_MMU_NUM_POOL 4 100 #define _MONTEREY_MMU_NUM_RQE_QUEUES 11 101 102 #define _MN_PORTS_PER_TSC 4 103 #define _MN_TSCS_PER_PGW 8 104 #define _MN_PORTS_PER_PGW (_MN_PORTS_PER_TSC * _MN_TSCS_PER_PGW) 105 106 #define MN_PHY_PORT_CPU 0 107 #define MN_PHY_PORT_LB 65 108 #define MN_PHY_PORT_MACSEC 66 109 typedef enum { 110 SOC_MONTEREY_SCHED_MODE_UNKNOWN = 0, 111 SOC_MONTEREY_SCHED_MODE_STRICT, 112 SOC_MONTEREY_SCHED_MODE_WRR, 113 SOC_MONTEREY_SCHED_MODE_WDRR 114 } soc_monterey_sched_mode_e; 115 116 typedef enum { 117 SOC_MONTEREY_NODE_LVL_ROOT = 0, 118 SOC_MONTEREY_NODE_LVL_S1, 119 SOC_MONTEREY_NODE_LVL_L0, 120 SOC_MONTEREY_NODE_LVL_L1, 121 SOC_MONTEREY_NODE_LVL_L2, 122 SOC_MONTEREY_NODE_LVL_MAX 123 } soc_monterey_node_lvl_e; 124 125 typedef enum { 126 _SOC_MONTEREY_INDEX_STYLE_BUCKET, 127 _SOC_MONTEREY_INDEX_STYLE_BUCKET_MODE, 128 _SOC_MONTEREY_INDEX_STYLE_WRED, 129 _SOC_MONTEREY_INDEX_STYLE_WRED_DROP_THRESH, 130 _SOC_MONTEREY_INDEX_STYLE_SCHEDULER, 131 _SOC_MONTEREY_INDEX_STYLE_PERQ_XMT, 132 _SOC_MONTEREY_INDEX_STYLE_UCAST_DROP, 133 _SOC_MONTEREY_INDEX_STYLE_UCAST_QUEUE, 134 _SOC_MONTEREY_INDEX_STYLE_MCAST_QUEUE, 135 _SOC_MONTEREY_INDEX_STYLE_EXT_UCAST_QUEUE, 136 _SOC_MONTEREY_INDEX_STYLE_EGR_POOL, 137 _SOC_MONTEREY_INDEX_STYLE_COUNT 138 } soc_monterey_index_style_t; 139 140 typedef enum soc_monterey_drop_limit_alpha_value_e { 141 SOC_MONTEREY_COSQ_DROP_LIMIT_ALPHA_1_128, /* Use 1/128 as the alpha value for 142 dynamic threshold */ 143 SOC_MONTEREY_COSQ_DROP_LIMIT_ALPHA_1_64, /* Use 1/64 as the alpha value for 144 dynamic threshold */ 145 SOC_MONTEREY_COSQ_DROP_LIMIT_ALPHA_1_32, /* Use 1/32 as the alpha value for 146 dynamic threshold */ 147 SOC_MONTEREY_COSQ_DROP_LIMIT_ALPHA_1_16, /* Use 1/16 as the alpha value for 148 dynamic threshold */ 149 SOC_MONTEREY_COSQ_DROP_LIMIT_ALPHA_1_8, /* Use 1/8 as the alpha value for 150 dynamic threshold */ 151 SOC_MONTEREY_COSQ_DROP_LIMIT_ALPHA_1_4, /* Use 1/4 as the alpha value for 152 dynamic threshold */ 153 SOC_MONTEREY_COSQ_DROP_LIMIT_ALPHA_1_2, /* Use 1/2 as the alpha value for 154 dynamic threshold */ 155 SOC_MONTEREY_COSQ_DROP_LIMIT_ALPHA_1, /* Use 1 as the alpha value for dynamic 156 threshold */ 157 SOC_MONTEREY_COSQ_DROP_LIMIT_ALPHA_2, /* Use 2 as the alpha value for dynamic 158 threshold */ 159 SOC_MONTEREY_COSQ_DROP_LIMIT_ALPHA_4, /* Use 4 as the alpha value for dynamic 160 threshold */ 161 SOC_MONTEREY_COSQ_DROP_LIMIT_ALPHA_8, /* Use 8 as the alpha value for dynamic 162 threshold */ 163 SOC_MONTEREY_COSQ_DROP_LIMIT_ALPHA_COUNT /* Must be the last entry! */ 164 } soc_monterey_drop_limit_alpha_value_t; 165 int _soc_monterey_obm_interrupt_cb(int unit); 166 int 167 _soc_monterey_obm_cb_unregister(int unit , bcm_obm_callback_fn fn , void *fn_data); 168 int 169 _soc_monterey_obm_cb_register(int unit , bcm_obm_callback_fn fn , void *fn_data); 170 extern int 171 soc_mn_port_ovs_speed_group_validate(int unit); 172 extern soc_functions_t soc_monterey_drv_funs; 173 extern soc_functions_t soc_monterey_drv_funs; 174 extern void soc_monterey_ser_set_long_delay(int delay); 175 extern int _soc_monterey_mem_ser_control(int unit, soc_mem_t mem, 176 int copyno, int enable); 177 extern int _soc_monterey_mem_cpu_write_control(int unit, soc_mem_t mem, 178 int copyno, int enable, 179 int *orig_enable); 180 extern int soc_monterey_ser_mem_clear(int unit, soc_mem_t mem); 181 extern void _soc_monterey_alpm_bkt_view_set(int unit, int index, soc_mem_t view); 182 extern soc_mem_t _soc_monterey_alpm_bkt_view_get(int unit, int index); 183 extern void soc_monterey_sbus_ring_map_config(int unit); 184 extern int soc_monterey_mem_config(int unit); 185 extern int _soc_monterey_mem_sram_info_get(int unit, soc_mem_t mem, int index, 186 _soc_ser_sram_info_t *sram_info); 187 extern int soc_monterey_pipe_select(int unit, int egress, int pipe); 188 extern int soc_monterey_num_cosq_init(int unit); 189 extern int soc_monterey_tsc_map_get(int unit, uint32 *tsc_map, uint32 *force_hg); 190 extern int soc_monterey_port_config_init(int unit, uint16 dev_id, uint8 rev_id); 191 extern int soc_monterey_port_config_bandwidth_check(int unit); 192 extern soc_error_t 193 soc_monterey_port_reg_blk_index_get(int unit ,int port, soc_block_type_t blktype, int *block); 194 extern int soc_monterey_lls_bmap_alloc(int unit); 195 extern int soc_monterey_chip_reset(int unit); 196 extern int soc_monterey_tsc_reset(int unit); 197 extern int soc_monterey_l3_defip_index_map(int unit, soc_mem_t mem, int index); 198 extern int soc_monterey_l3_defip_index_remap(int unit, soc_mem_t mem, int index); 199 extern int soc_monterey_l3_defip_mem_index_get(int unit, int pindex, soc_mem_t *mem); 200 extern int soc_monterey_mem_is_eligible_for_scan(int unit, soc_mem_t mem); 201 extern int soc_monterey_ser_test_skip_check(int unit, soc_mem_t mem); 202 extern int soc_mn_is_skip_default_lls_creation(int unit); 203 extern soc_error_t soc_monterey_gatingconfig_init(int unit) ; 204 205 extern void 206 soc_monterey_top_intr(void *unit_vp, void *d1, void *d2, 207 void *d3, void *d4); 208 #ifdef INCLUDE_GDPLL 209 extern void soc_nanosync_intr(void *unit_vp, void *d1, void *d2, 210 void *d3, void *d4); 211 extern void soc_nanosync_debug_intr(void *unit_vp, void *d1, void *d2, 212 void *d3, void *d4); 213 #endif 214 215 extern int soc_monterey_temperature_monitor_get(int unit, 216 int temperature_max, 217 soc_switch_temperature_monitor_t *temperature_array, 218 int *temperature_count); 219 extern int soc_monterey_show_material_process(int unit); 220 extern int soc_monterey_show_ring_osc(int unit); 221 extern int soc_monterey_show_voltage(int unit); 222 223 extern int soc_monterey_bond_info_init(int unit); 224 225 enum soc_monterey_port_mode_e { 226 /* WARNING: values given match hardware register; do not modify */ 227 SOC_MONTEREY_PORT_MODE_QUAD = 0, 228 SOC_MONTEREY_PORT_MODE_TRI_012 = 1, 229 SOC_MONTEREY_PORT_MODE_TRI_023 = 2, 230 SOC_MONTEREY_PORT_MODE_DUAL = 3, 231 SOC_MONTEREY_PORT_MODE_SINGLE = 4 232 }; 233 234 extern int soc_monterey_hash_bank_count_get(int unit, soc_mem_t mem, 235 int *num_banks); 236 extern int soc_monterey_hash_bank_phy_bitmap_get(int unit, soc_mem_t mem, 237 uint32 *bitmap); 238 extern int soc_monterey_hash_bank_number_get(int unit, soc_mem_t mem, 239 int seq_num, int *bank_num); 240 extern int soc_monterey_hash_seq_number_get(int unit, soc_mem_t mem, 241 int bank_num, int *seq_num); 242 extern int soc_monterey_hash_bank_info_get(int unit, soc_mem_t mem, 243 int bank, 244 int *entries_per_bank, 245 int *entries_per_row, 246 int *entries_per_bucket, 247 int *bank_base, 248 int *bucket_offset); 249 extern int soc_mn_hash_offset_get(int unit, soc_mem_t mem, int bank, 250 int *hash_offset, int *use_lsb); 251 extern int soc_mn_hash_offset_set(int unit, soc_mem_t mem, int bank, 252 int hash_offset, int use_lsb); 253 extern uint32 soc_mn_l2x_hash(int unit, int bank, int hash_offset, 254 int use_lsb, int key_nbits, void *base_entry, 255 uint8 *key); 256 extern int soc_mn_l2x_base_entry_to_key(int unit, uint32 *entry, 257 uint8 *key); 258 extern uint32 soc_mn_l2x_entry_hash(int unit, int bank, int hash_offset, 259 int use_lsb, uint32 *entry); 260 extern uint32 soc_mn_l2x_bank_entry_hash(int unit, int bank, uint32 *entry); 261 extern uint32 soc_mn_l3x_hash(int unit, int bank, int hash_offset, 262 int use_lsb, int key_nbits, void *base_entry, 263 uint8 *key); 264 extern int soc_mn_l3x_base_entry_to_key(int unit, uint32 *entry, 265 uint8 *key); 266 extern uint32 soc_mn_l3x_entry_hash(int unit, int bank, int hash_offset, 267 int use_lsb, uint32 *entry); 268 extern uint32 soc_mn_l3x_bank_entry_hash(int unit, int bank, uint32 *entry); 269 extern uint32 soc_mn_mpls_hash(int unit, int hash_sel, int key_nbits, 270 void *base_entry, uint8 *key); 271 extern int soc_mn_mpls_base_entry_to_key(int unit, void *entry, 272 uint8 *key); 273 extern uint32 soc_mn_mpls_entry_hash(int unit, int hash_sel, int bank, 274 uint32 *entry); 275 extern uint32 soc_mn_mpls_bank_entry_hash(int unit, int bank, uint32 *entry); 276 extern uint32 soc_mn_vlan_xlate_hash(int unit, int hash_sel, int key_nbits, 277 void *base_entry, uint8 *key); 278 extern int soc_mn_vlan_xlate_base_entry_to_key(int unit, void *entry, 279 uint8 *key); 280 extern uint32 soc_mn_vlan_xlate_entry_hash(int unit, int hash_sel, int bank, 281 uint32 *entry); 282 extern uint32 soc_mn_vlan_xlate_bank_entry_hash(int unit, int bank, 283 uint32 *entry); 284 extern uint32 soc_mn_egr_vlan_xlate_hash(int unit, int hash_sel, 285 int key_nbits, void *base_entry, 286 uint8 *key); 287 extern int soc_mn_egr_vlan_xlate_base_entry_to_key(int unit, void *entry, 288 uint8 *key); 289 extern uint32 soc_mn_egr_vlan_xlate_entry_hash(int unit, int hash_sel, 290 int bank, uint32 *entry); 291 extern uint32 soc_mn_egr_vlan_xlate_bank_entry_hash(int unit, int bank, 292 uint32 *entry); 293 extern uint32 soc_mn_ing_vp_vlan_member_hash(int unit, int hash_sel, 294 int key_nbits, 295 void *base_entry, uint8 *key); 296 extern int soc_mn_ing_vp_vlan_member_base_entry_to_key(int unit, 297 void *entry, 298 uint8 *key); 299 extern uint32 soc_mn_ing_vp_vlan_member_entry_hash(int unit, int hash_sel, 300 int bank, uint32 *entry); 301 extern uint32 soc_mn_egr_vp_vlan_member_hash(int unit, int hash_sel, 302 int key_nbits, 303 void *base_entry, uint8 *key); 304 extern int soc_mn_egr_vp_vlan_member_base_entry_to_key(int unit, 305 void *entry, 306 uint8 *key); 307 extern uint32 soc_mn_egr_vp_vlan_member_entry_hash(int unit, int hash_sel, 308 int bank, uint32 *entry); 309 extern uint32 soc_mn_ing_dnat_address_type_hash(int unit, int hash_sel, 310 int key_nbits, 311 void *base_entry, 312 uint8 *key); 313 extern int soc_mn_ing_dnat_address_type_base_entry_to_key(int unit, 314 void *entry, 315 uint8 *key); 316 extern uint32 soc_mn_ing_dnat_address_type_entry_hash(int unit, 317 int hash_sel, 318 int bank, 319 uint32 *entry); 320 extern uint32 soc_mn_l2_endpoint_id_hash(int unit, int hash_sel, 321 int key_nbits, void *base_entry, 322 uint8 *key); 323 extern int soc_mn_l2_endpoint_id_base_entry_to_key(int unit, void *entry, 324 uint8 *key); 325 extern uint32 soc_mn_l2_endpoint_id_entry_hash(int unit, int hash_sel, 326 int bank, 327 uint32 *entry); 328 extern uint32 soc_mn_endpoint_queue_map_hash(int unit, int hash_sel, 329 int key_nbits, 330 void *base_entry, 331 uint8 *key); 332 extern int soc_mn_endpoint_queue_map_base_entry_to_key(int unit, 333 void *entry, 334 uint8 *key); 335 extern uint32 soc_mn_endpoint_queue_map_entry_hash(int unit, int hash_sel, 336 int bank, 337 uint32 *entry); 338 extern int soc_mn_hash_bucket_get(int unit, int mem, int bank, 339 uint32 *entry, uint32 *bucket); 340 extern int soc_mn_hash_index_get(int unit, int mem, int bank, int bucket); 341 342 extern int 343 soc_monterey_get_def_qbase(int unit, soc_port_t inport, int qtype, 344 int *pbase, int *pnumq); 345 346 #define SOC_MONTEREY_PORT_PIPE(u, p) 0 347 348 extern uint32 _soc_monterey_mmu_port(int unit, int port); 349 350 #define SOC_MONTEREY_MMU_PORT(u, p) _soc_monterey_mmu_port((u),(p)) 351 352 extern uint32 _soc_monterey_piped_mem_index(int unit, soc_port_t port, 353 soc_mem_t mem, int arr_off); 354 355 #define SOC_MONTEREY_MMU_PIPED_MEM_INDEX(u,p,m,off) \ 356 _soc_monterey_piped_mem_index((u),(p),(m),(off)) 357 358 #define _SOC_MONTEREY_NODE_CONFIG_MEM(u,p,n) \ 359 (((n) == SOC_MONTEREY_NODE_LVL_S1) ? LLS_S1_CONFIGm : \ 360 (((n) == SOC_MONTEREY_NODE_LVL_L0) ? LLS_L0_CONFIGm : \ 361 ((n) == SOC_MONTEREY_NODE_LVL_L1 ? LLS_L1_CONFIGm : -1 ))) 362 363 #define _SOC_MONTEREY_NODE_CONFIG_MEM2(u,p,n) _SOC_MONTEREY_NODE_CONFIG_MEM(u, p, n) 364 365 #define _SOC_MONTEREY_NODE_PARENT_MEM(u,p,n) \ 366 (((n)==SOC_MONTEREY_NODE_LVL_L2) ? LLS_L2_PARENTm : \ 367 (((n) == SOC_MONTEREY_NODE_LVL_L1) ? LLS_L1_PARENTm : \ 368 (((n) == SOC_MONTEREY_NODE_LVL_L0) ? LLS_L0_PARENTm : \ 369 (((n) == SOC_MONTEREY_NODE_LVL_S1) ? LLS_S1_PARENTm : -1 )))) 370 371 #define _SOC_MONTEREY_NODE_WIEGHT_MEM(u,p,n) \ 372 (((n)==SOC_MONTEREY_NODE_LVL_S1) ? LLS_S1_CHILD_WEIGHT_CFG_CNTm : \ 373 (((n)==SOC_MONTEREY_NODE_LVL_L0) ? LLS_L0_CHILD_WEIGHT_CFG_CNTm : \ 374 (((n) == SOC_MONTEREY_NODE_LVL_L1) ? LLS_L1_CHILD_WEIGHT_CFG_CNTm : \ 375 (((n) == SOC_MONTEREY_NODE_LVL_L2) ? LLS_L2_CHILD_WEIGHT_CFG_CNTm : -1 )))) 376 377 378 typedef enum { 379 SOC_MONTEREY_SCHED_UNKNOWN = 0, 380 SOC_MONTEREY_SCHED_LLS, 381 SOC_MONTEREY_SCHED_HSP 382 } soc_monterey_sched_type_t; 383 384 extern soc_monterey_sched_type_t 385 _soc_monterey_port_sched_type_get(int unit, soc_port_t port); 386 387 extern int 388 _soc_monterey_invalid_parent_index(int unit, int level); 389 390 extern int 391 soc_monterey_sched_hw_index_get(int unit, int port, int lvl, int offset, 392 int *hw_index); 393 394 extern int soc_monterey_l2_hw_index(int unit, int qnum, int uc); 395 extern int soc_monterey_hw_index_logical_num(int unit, int port, 396 int index, int uc); 397 extern int 398 soc_monterey_cosq_set_sched_mode(int unit, soc_port_t port, 399 int level, int index, 400 soc_monterey_sched_mode_e mode, int weight); 401 402 extern int 403 soc_monterey_cosq_set_sched_config(int unit, soc_port_t port, 404 int level, int index, int child_index, 405 int num_psri, int first_sp_child, 406 int first_sp_mc_child, uint32 ucmap, uint32 spmap, 407 soc_monterey_sched_mode_e mode, int weight); 408 409 extern int 410 soc_monterey_cosq_get_sched_child_config(int unit, soc_port_t port, 411 int level, int index, 412 int *pnum_spri, int *pfirst_sp_child, 413 int *pfirst_sp_mc_child, uint32 *pucmap, uint32 *spmap); 414 415 extern int 416 soc_monterey_cosq_get_sched_mode(int unit, soc_port_t port, int level, 417 int index, soc_monterey_sched_mode_e *pmode, int *weight); 418 419 extern int _soc_monterey_root_scheduler_index(int unit, int port); 420 extern int 421 soc_monterey_cosq_get_sched_config(int unit, soc_port_t port, 422 int level, int index, int child_index, 423 int *num_spri, int *first_sp_child, 424 int *first_sp_mc_child, uint32 *ucmap, uint32 *spmap, 425 soc_monterey_sched_mode_e *mode, int *weight); 426 427 extern int 428 soc_monterey_get_child_type(int unit, soc_port_t port, int level, int *child_type); 429 430 extern int soc_monterey_get_pipe_queue_count(int unit, int uc, int xpipe); 431 432 extern int soc_monterey_dump_port_lls(int unit, int port); 433 434 extern int soc_monterey_dump_port_hsp(int unit, int port); 435 436 extern int soc_monterey_lls_init(int unit); 437 438 extern int soc_monterey_lb_lls_init(int unit); 439 440 extern int soc_monterey_cosq_set_sched_parent(int unit, soc_port_t port, 441 int level, int hw_index, 442 int parent_hw_idx, int add); 443 444 extern int soc_monterey_logical_qnum_hw_qnum(int unit, int port, int lqnum, int uc); 445 446 extern int soc_monterey_mmu_get_shared_size(int unit, int *shared_size); 447 extern int soc_monterey_mmu_config_shared_buf_recalc(int unit, 448 uint32 spid, 449 int shared_size, 450 int flags); 451 extern int soc_monterey_mmu_config_res_limits_update(int unit, 452 uint32 spid, 453 uint32 shared_size, 454 int flags); 455 456 extern void soc_monterey_process_func_intr(void *unit_vp, void *d1, void *d2, 457 void *d3, void *d4); 458 459 extern 460 void soc_monterey_process_pm_intr(void *unit_vp, void *d1, void *d2, 461 void *d3, void *d4); 462 #ifdef INCLUDE_XFLOW_MACSEC 463 extern 464 void soc_monterey_process_macsec_intr(void *unit_vp, void *d1, void *d2, 465 void *d3, void *d4); 466 #endif 467 typedef int (*_soc_monterey_bst_hw_cb)(int unit); 468 extern int soc_monterey_set_bst_callback(int unit, _soc_monterey_bst_hw_cb cb); 469 extern int soc_monterey_port_asf_para_set(int unit, soc_port_t port, int speed, 470 int enable); 471 extern int soc_monterey_port_speed_update(int unit, soc_port_t port, 472 int speed); 473 extern int soc_monterey_port_thdo_rx_enable_set(int unit, soc_port_t port, 474 int enable); 475 extern int 476 soc_monterey_idb_buf_reset(int unit, soc_port_t port, int reset); 477 478 extern int 479 soc_monterey_edb_buf_reset(int unit, soc_port_t port, int reset); 480 481 extern int soc_monterey_shadow_create(int unit); 482 extern void soc_monterey_shadow_free(int unit); 483 extern int 484 soc_monterey_shadow_entry_set (int unit, soc_mem_t mem, int index, 485 void* entry_data); 486 extern int 487 soc_monterey_shadow_entry_get (int unit, soc_mem_t mem, int index, 488 void* entry_data); 489 int soc_monterey_shadow_clear (int unit, soc_mem_t mem); 490 extern int soc_monterey_port_traffic_egr_enable_set(int unit, int port, int enable); 491 extern int soc_monterey_port_mmu_tx_enable_set(int unit, int port, int enable); 492 extern int soc_monterey_qcn_counter_hw_index_get(int unit, soc_port_t port, 493 int index, int *qindex); 494 extern int soc_monterey_port_edb_reset(int unit, int port ); 495 extern int 496 soc_monterey_setup_hsp_port(int unit, int port); 497 extern int 498 soc_monterey_delete_hsp_port(int unit, int port); 499 extern int 500 soc_monterey_mmu_config_init(int unit, int test_only, soc_port_t port); 501 extern int 502 soc_monterey_cosq_enable_hsp_sched(int unit, soc_port_t port); 503 extern soc_error_t 504 soc_monterey_cosq_disable_hsp_sched(int unit, soc_port_t port); 505 extern int 506 bcm_monterey_send_packetport(int unit , int port , int cos , int num ); 507 #ifdef BCM_WARM_BOOT_SUPPORT 508 extern int soc_monterey_shadow_size_get (int unit, uint32* size); 509 extern int soc_monterey_shadow_sync(int unit, uint32 **sync_addr); 510 extern int soc_monterey_shadow_load(int unit, uint32 **load_addr); 511 #endif 512 513 #if defined(SER_TR_TEST_SUPPORT) 514 extern soc_error_t soc_monterey_ser_inject_error(int unit, uint32 flags, 515 soc_mem_t mem, int pipe_target, 516 int block, int index); 517 extern soc_error_t soc_monterey_ser_test_mem(int unit, soc_mem_t mem, 518 _soc_ser_test_t test_type, int cmd); 519 extern soc_error_t soc_monterey_ser_test(int unit, _soc_ser_test_t test_type); 520 extern soc_error_t soc_monterey_ser_error_injection_support(int unit, 521 soc_mem_t mem, int pipe); 522 extern int soc_monterey_ser_test_overlay (int unit, _soc_ser_test_t test_type); 523 extern int soc_monterey_cosq_max_bucket_set(int unit, int port, 524 int index, uint32 level); 525 extern int ser_test_monterey_mem_index_remap(int unit, 526 ser_test_data_t *test_data, 527 int *mem_has_ecc); 528 #endif /*#if defined(SER_TR_TEST_SUPPORT)*/ 529 530 /* 531 * Data structure use for storing part of the SOC data information 532 * which is needed during later phases of a FlexPort operation. 533 */ 534 typedef struct soc_mn_info_s { 535 int port_l2p_mapping[SOC_MAX_NUM_PORTS]; /* Logic to physical */ 536 int port_p2l_mapping[SOC_MAX_NUM_PORTS]; /* Physical to logic */ 537 int port_p2m_mapping[SOC_MAX_NUM_PORTS]; /* Physical to MMU */ 538 int port_m2p_mapping[SOC_MAX_NUM_MMU_PORTS]; /* MMU to physical */ 539 int port_group[SOC_MAX_NUM_PORTS]; /* Group number */ 540 int port_speed_max[SOC_MAX_NUM_PORTS]; /* Max port speed */ 541 int port_init_speed[SOC_MAX_NUM_PORTS]; /* Init port speed */ 542 int port_num_lanes[SOC_MAX_NUM_PORTS]; /* Number of lanes */ 543 pbmp_t xpipe_pbm; /* Ports in X-pipe */ 544 pbmp_t ypipe_pbm; /* Ports in Y-pipe */ 545 pbmp_t oversub_pbm; /* Oversubscription ports */ 546 } soc_mn_info_t; 547 548 extern int 549 soc_monterey_port_mode_get(int unit, int logical_port, int *mode); 550 551 extern int 552 soc_monterey_is_cut_thru_enabled(int unit, soc_port_t port, int *enable); 553 554 extern int 555 soc_mn_cut_thru_enable_disable(int unit, soc_port_t port, int enable); 556 557 558 extern int 559 soc_mn_phy_info_init(int unit); 560 extern int 561 soc_mn_phy_info_deinit(int unit); 562 563 extern int 564 soc_mn_port_lanes_valid(int unit, soc_port_t port, int lanes); 565 566 extern int 567 soc_mn_port_resource_speed_max_get(int unit, int *speed); 568 569 extern int 570 soc_mn_port_addressable(int unit, soc_port_t port); 571 572 extern int 573 soc_mn_phy_port_addressable(int unit, int phy_port); 574 575 extern int 576 soc_mn_edb_buf_reset(int unit, soc_port_t port, int reset); 577 578 extern int 579 soc_mn_port_resource_validate(int unit, int nport, 580 soc_port_resource_t *resource); 581 extern int 582 soc_mn_port_resource_configure(int unit, int nport, 583 soc_port_resource_t *resource, int flag); 584 585 extern int 586 soc_mn_port_resource_tdm_set(int unit, int curr_port_info_size, 587 soc_port_resource_t *curr_port_info, 588 int new_port_info_size, 589 soc_port_resource_t *new_port_info, 590 soc_mn_info_t *si, int lossless); 591 592 extern int 593 soc_mn_port_resource_pgw_set(int unit, 594 int pre_num_res, soc_port_resource_t *pre_res, 595 int post_num_res, soc_port_resource_t *post_res, 596 int lossless); 597 598 extern int 599 soc_mn_port_resource_ip_set(int unit, int curr_port_info_size, 600 soc_port_resource_t *curr_port_info, 601 int new_port_info_size, 602 soc_port_resource_t *new_port_info, 603 soc_mn_info_t *si); 604 605 extern int 606 soc_mn_port_resource_ep_set(int unit, int curr_port_info_size, 607 soc_port_resource_t *curr_port_info, 608 int new_port_info_size, 609 soc_port_resource_t *new_port_info, 610 soc_mn_info_t *si); 611 extern int 612 soc_mn_port_resource_mmu_mapping_set(int unit, int nport, 613 soc_port_resource_t *resource); 614 615 extern int 616 soc_mn_port_resource_mmu_set(int unit, int nport, 617 soc_port_resource_t * flexport_data); 618 619 extern int 620 soc_monterey_port_asf_set(int unit, soc_port_t port, int speed); 621 extern int 622 soc_monterey_port_asf_speed_set(int unit, soc_port_t port, int speed); 623 624 extern int 625 soc_monterey_port_lane_config_get(int unit, int phy_port, int *mode_lane, 626 int *found); 627 extern int 628 soc_monterey_port_autoneg_core_get(int unit, int phy_port, int *an_core, 629 int *found); 630 extern int 631 soc_monterey_mmu_hsp_port_reserve(int unit, int port, int speed_max); 632 extern soc_error_t 633 _soc_monterey_mmu_ovs_speed_class_map_get(int unit, int *speed, int *spg, uint32 *sp_spacing); 634 extern int 635 soc_mn_port_mixed_sister_speed_validate(int unit); 636 extern int 637 soc_monterey_tsc_disable(int unit); 638 639 /* 640 * FlexPort Functions 641 */ 642 643 extern int soc_monterey_is_flex_enable(int unit); 644 extern soc_error_t 645 soc_monterey_subsidiary_ports_get(int unit, soc_port_t port, soc_pbmp_t *pbmp); 646 647 extern int 648 soc_monterey_mmu_port_resource_set(int unit, soc_port_t port, int speed); 649 int 650 bcm_mn_obm_interrupt_port_control_set(int unit, 651 bcm_port_t port, 652 bcm_port_control_t type, 653 int value); 654 int 655 bcm_mn_obm_interrupt_port_control_get(int unit, 656 bcm_port_t port, 657 bcm_port_control_t type, 658 int *value); 659 #ifdef BCM_WARM_BOOT_SUPPORT 660 extern int soc_monterey_flexport_scache_allocate(int unit); 661 extern int soc_monterey_flexport_scache_sync(int unit); 662 extern int soc_monterey_flexport_scache_recovery(int unit); 663 #endif 664 665 666 667 #ifdef PORTMOD_SUPPORT 668 extern int soc_mn_portctrl_pm_portmod_init(int unit); 669 extern int soc_mn_portctrl_pm_portmod_deinit(int unit); 670 extern int soc_mn_portctrl_pm_port_config_get(int unit, soc_port_t port, void *port_config_info); 671 extern int soc_mn_portctrl_pm_port_phyaddr_get(int unit, soc_port_t port); 672 extern int soc_mn_portctrl_port_ability_update(int unit, soc_port_t port, soc_port_ability_t *ability); 673 extern int soc_mn_portctrl_pm_type_get(int unit, soc_port_t phy_port, int* pm_type); 674 #endif 675 676 extern int soc_monterey_alpm_mode_get(int unit); 677 extern int soc_monterey_get_alpm_banks(int unit); 678 extern int soc_monterey_l3_defip_index_map(int unit, soc_mem_t mem, int index); 679 extern int soc_monterey_l3_defip_index_remap(int unit, soc_mem_t mem, int index); 680 681 typedef int (*_soc_monterey_lls_traverse_cb)(int unit, int port, int level, 682 int hw_index, void *cookie); 683 684 #define MONTEREY_PORT_IS_PM4x25_PORT_PHY(unit, phy_port) \ 685 (((phy_port <=20 ) && (phy_port >= 13)) || \ 686 ((phy_port <= 52 ) && (phy_port >= 45))) 687 688 #define MONTEREY_PORT_IS_CPM4x25_PORT_PHY(unit, phy_port) \ 689 (((phy_port <= 12 ) && (phy_port >= 1)) || \ 690 ((phy_port <= 64 ) && (phy_port >= 53))) 691 #define MONTEREY_PORT_IS_PM4x25_PORT(unit, lport) \ 692 MONTEREY_PORT_IS_PM4x25_PORT_PHY(unit, (SOC_INFO(unit).port_l2p_mapping[lport])) 693 694 #define MONTEREY_PORT_IS_CPM4x25_PORT(unit, lport) \ 695 MONTEREY_PORT_IS_CPM4x25_PORT_PHY(unit, (SOC_INFO(unit).port_l2p_mapping[lport])) 696 #endif /* !_SOC_MONTEREY_H_ */ 697 698 /*test*/