mem.h (60832B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * 7 * socregs.c is missing some information about tables, including the 8 * minimum and maximum indices, a user-friendly names for the tables, 9 * and table descriptions. socmem_info_t is a parallel structure 10 * indexed by soc_mem_t that contains this information. 11 * 12 * CBP memory consists of the tables MMU_MEMORIES1_xx, which are of 13 * varying lengths and widths, and the transaction queue memories 14 * MMU_MEMORIES2_xx. 15 */ 16 17 #ifndef _SOC_MEM_H 18 #define _SOC_MEM_H 19 20 #include <sal/core/time.h> 21 #include <soc/defs.h> 22 #include <soc/memory.h> 23 #include <soc/error.h> 24 #include <soc/chip.h> 25 #if defined(BCM_ESW_SUPPORT) || defined(BCM_SAND_SUPPORT) || defined(PORTMOD_SUPPORT) 26 #include <soc/mcm/memacc.h> 27 #endif 28 29 /* Backdoor for mem tuner to update system configuration */ 30 extern int (*soc_mem_config_set)(char *name, char *value); 31 32 #define MEM_BLOCK_ANY SOC_BLOCK_ANY /* for reading */ 33 #define MEM_BLOCK_ALL SOC_BLOCK_ALL /* for writing */ 34 #define COPYNO_ALL SOC_BLOCK_ALL /* historical */ 35 36 37 /* Memory read/write flags. These are used for the following functions: 38 * soc_mem_array_read, soc_mem_array_write_range, soc_mem_write_extended 39 * soc_mem_read_extended 40 */ 41 #define SOC_MEM_NO_FLAGS 0x0 42 #define SOC_MEM_DONT_USE_CACHE 0x1 43 #define SOC_MEM_SCHAN_ERR_RETURN 0x2 44 #define SOC_MEM_DONT_CONVERT_XY2DM 0x4 45 #define SOC_MEM_DONT_MAP_INDEX 0x8 46 #define SOC_MEM_DONT_CHECK_INDEX 0x10 47 48 /* Register read/set flags*/ 49 #define SOC_REG_NO_FLAGS 0x0 50 #define SOC_REG_DONT_USE_CACHE 0x1 51 52 /* soc_mem_array_write_range, flags definition: */ 53 #define SOC_MEM_WRITE_SET_ONLY 0x1 54 #define SOC_MEM_WRITE_COMMIT_ONLY 0x2 55 #define SOC_MEM_WRITE_STATUS_ONLY 0x4 56 #define SOC_MEM_WRITE_BCAST_OP 0x10 57 58 #define soc_mem_flags(unit, mem) SOC_MEM_INFO(unit, mem).flags 59 #define soc_mem_cmp_fn(unit, mem) SOC_MEM_INFO(unit, mem).cmp_fn 60 #define soc_mem_base(unit, mem) SOC_MEM_INFO(unit, mem).base 61 62 #ifdef BCM_56870 63 #define soc_mem_index_count(unit, mem) soc_mem_view_index_count(unit, mem) 64 #define soc_mem_index_min(unit, mem) soc_mem_view_index_min(unit, mem) 65 #define soc_mem_index_max(unit, mem) soc_mem_view_index_max(unit, mem) 66 #else 67 #define soc_mem_index_count(unit, mem) \ 68 (soc_mem_index_max(unit, mem) - \ 69 soc_mem_index_min(unit, mem) + 1) 70 #define soc_mem_index_min(unit, mem) SOC_MEM_INFO(unit, mem).index_min 71 #define soc_mem_index_max(unit, mem) (SOC_PERSIST(unit) ? SOP_MEM_STATE(unit, mem).index_max : SOC_MEM_INFO(unit, mem).index_max) 72 #endif 73 74 /* returns the maximum possible index for any dynamically extendible mem */ 75 extern int soc_mem_index_limit(int unit, soc_mem_t mem); 76 #define soc_mem_index_valid(unit, mem, index) \ 77 ((index >= soc_mem_index_min(unit, mem)) && \ 78 (index <= soc_mem_index_max(unit, mem))) 79 #define soc_r2p_defip_mem_index_valid(unit, mem, index) \ 80 ((index >= soc_mem_index_min(unit, mem)) && \ 81 (index <= (soc_mem_index_max(unit, mem) + \ 82 SOC_DEFIP_HOLE_OFFSET(unit, mem)))) 83 84 /* soc_mem_index_last returns the last 'used' entry in sorted tables */ 85 extern int soc_mem_index_last(int unit, soc_mem_t mem, int copyno); 86 87 #define soc_mem_entry_null(unit, mem) \ 88 SOC_MEM_INFO(unit, mem).null_entry 89 #define soc_mem_entry_bytes(unit, mem) \ 90 SOC_MEM_INFO(unit, mem).bytes 91 #define soc_mem_entry_words(unit, mem) \ 92 BYTES2WORDS(soc_mem_entry_bytes(unit, mem)) 93 /* Macro for indexing tables DMA'd out from H/W */ 94 #define soc_mem_table_idx_to_pointer(unit, mem, cast, table, index) \ 95 ((cast)(&(((uint32 *)(table))[soc_mem_entry_words(unit, mem) * (index)]))) 96 #define soc_mem_entry_zeroes(unit, mem) \ 97 _soc_mem_entry_null_zeroes 98 extern int soc_mem_entry_bits(int unit, soc_mem_t mem); 99 100 #define __smck(unit, mem, flag) \ 101 ((soc_mem_flags(unit, mem) & (flag)) != 0) 102 103 104 #define ENET_CMP_MACADDR(a, b) \ 105 sal_memcmp((a), (b), sizeof(sal_mac_addr_t)) 106 107 #define soc_mem_is_readonly(unit, mem) __smck(unit, mem, SOC_MEM_FLAG_READONLY) 108 #define soc_mem_is_writeonly(unit, mem) __smck(unit, mem, SOC_MEM_FLAG_WRITEONLY) 109 #define soc_mem_is_signal(unit, mem) __smck(unit, mem, SOC_MEM_FLAG_SIGNAL) 110 #define soc_mem_is_valid(unit, mem) \ 111 (SOC_MEM_IS_VALID(unit, mem) && __smck(unit, mem, SOC_MEM_FLAG_VALID)) 112 #define soc_mem_is_debug(unit, mem) __smck(unit, mem, SOC_MEM_FLAG_DEBUG) 113 #define soc_mem_is_sorted(unit, mem) __smck(unit, mem, SOC_MEM_FLAG_SORTED) 114 #define soc_mem_is_cbp(unit, mem) __smck(unit, mem, SOC_MEM_FLAG_CBP) 115 #define soc_mem_is_cachable(unit, mem) __smck(unit, mem, SOC_MEM_FLAG_CACHABLE) 116 #define soc_mem_is_bistepic(unit, mem) __smck(unit, mem, SOC_MEM_FLAG_BISTEPIC) 117 #define soc_mem_is_bistcbp(unit, mem) __smck(unit, mem, SOC_MEM_FLAG_BISTCBP) 118 #define soc_mem_is_bistffp(unit, mem) __smck(unit, mem, SOC_MEM_FLAG_BISTFFP) 119 #define soc_mem_is_unified(unit, mem) __smck(unit, mem, SOC_MEM_FLAG_UNIFIED) 120 #define soc_mem_is_hashed(unit, mem) __smck(unit, mem, SOC_MEM_FLAG_HASHED) 121 #define soc_mem_is_cam(unit, mem) __smck(unit, mem, SOC_MEM_FLAG_CAM) 122 #define soc_mem_is_aggr(unit, mem) __smck(unit, mem, SOC_MEM_FLAG_AGGR) 123 #define soc_mem_is_cmd(unit, mem) __smck(unit, mem, SOC_MEM_FLAG_CMD) 124 #define soc_mem_is_mview(unit, mem) __smck(unit, mem, SOC_MEM_FLAG_MULTIVIEW) 125 126 #define soc_mem_bist_bit(unit, mem) ((soc_mem_flags(unit, mem) & \ 127 SOC_MEM_FLAG_BISTBIT) >> \ 128 SOC_MEM_FLAG_BISTBSHFT) 129 130 extern void soc_mem_entry_dump_fields(int unit, soc_mem_t mem, void *buf, 131 char *field_names); 132 extern void soc_mem_entry_dump(int unit, soc_mem_t mem, void *buf, uint32 bsl_flags); 133 extern void soc_mem_entry_dump_vertical(int unit, soc_mem_t mem, void *buf); 134 extern void soc_mem_entry_dump_if_changed_fields(int unit, soc_mem_t mem, 135 void *buf, char *prefix, 136 char *field_names); 137 extern void soc_mem_entry_dump_if_changed(int unit, soc_mem_t mem, 138 void *buf, char *prefix); 139 140 #define soc_mem_compare_key(unit, mem, a, b) \ 141 ((*(SOC_MEM_INFO(unit, mem).cmp_fn))((unit), (a), (b))) 142 143 #define soc_mem_compare_entry(unit, mem, a, b) \ 144 (sal_memcmp((a), (b), (soc_mem_entry_words((unit), (mem)) * 4))) 145 146 #if defined(BCM_PETRA_SUPPORT) || defined(BCM_SAND_SUPPORT) 147 /* In case the memory is an alias or a format table, re-direct to the original memory */ 148 soc_mem_t petra_mem_alias_to_orig(int unit, soc_mem_t mem); 149 #define SOC_MEM_ALIAS_TO_ORIG(unit,mem) (mem = petra_mem_alias_to_orig(unit, mem)) 150 #define SOC_MEM_IS_ALIAS(unit, mem) (mem != petra_mem_alias_to_orig(unit, mem)) 151 #else 152 #define SOC_MEM_ALIAS_TO_ORIG(unit,mem) 153 #define SOC_MEM_IS_ALIAS(unit, mem) (0) 154 #endif 155 156 #define SOC_MEM_IS_INTERNAL(unit,_mem) (sal_strcmp(SOC_MEM_DESC(unit, _mem), "INTERNAL") == 0) 157 158 #define JER_MRPS_REG_FORMAT_BY_CHIP(_unit, _name) \ 159 ((SOC_IS_QAX(unit)) ? IMP_##_name##r : MRPS_##_name##r) 160 161 #define JER_MRPS_MEM_FORMAT_BY_CHIP(_unit, _name) \ 162 ((SOC_IS_QAX(unit)) ? IMP_##_name##m : MRPS_##_name##m) 163 164 #define JER_MRPS_EM_REG_FORMAT_BY_CHIP(_unit, _name) \ 165 ((SOC_IS_QAX(unit)) ? IEP_##_name##r : MTRPS_EM_##_name##r) 166 167 #define JER_MRPS_EM_MEM_FORMAT_BY_CHIP(_unit, _name) \ 168 ((SOC_IS_QAX(unit)) ? IEP_##_name##m : MTRPS_EM_##_name##m) 169 170 /* 171 * Memory Test Module 172 * 173 * Streamlined module designed for inclusion in the SOC driver for 174 * performing power-on memory tests. 175 * 176 * This module is also used by the main SOC diagnostics memory tests, 177 * fronted by user interface code. 178 */ 179 180 /* Values miscompare_cb may return */ 181 182 #define MT_MISCOMPARE_STOP 0 /* Stop and fail memory test */ 183 #define MT_MISCOMPARE_CONT 1 /* Continue test */ 184 185 /* Values for patterns input */ 186 187 #define MT_PAT_ZEROES (1 << 0) /* All zeroes pattern */ 188 #define MT_PAT_ONES (1 << 1) /* All ones pattern */ 189 #define MT_PAT_FIVES (1 << 2) /* All 5s pattern */ 190 #define MT_PAT_AS (1 << 3) /* All As pattern */ 191 #define MT_PAT_CHECKER (1 << 4) /* Checkerboard pattern */ 192 #define MT_PAT_ICHECKER (1 << 5) /* Inverted checkerboard */ 193 #define MT_PAT_ADDR (1 << 6) /* Data=Address pattern */ 194 #define MT_PAT_RANDOM (1 << 7) /* Pseudo-random pattern */ 195 #define MT_PAT_HEX (1 << 8) /* Write specific hex byte */ 196 197 /* 198 * Memory test input parameters 199 * Must be completely filled in when calling soc_mem_test(). 200 */ 201 202 typedef struct soc_mem_test_s { 203 int unit; /* Unit number under test */ 204 205 void *userdata; /* Ignored by soc_mem_test */ 206 207 uint32 patterns; /* Logical OR of MT_PAT_xx (above) */ 208 uint8 hex_byte; /* Specified byte pattern */ 209 210 soc_mem_t mem; /* Memory under test */ 211 212 int copyno; /* Memory to test or COPYNO_ALL */ 213 214 int test_by_entry; /* Test each memory line, not fill */ 215 int reverify_count; /* Fill mode: Repeat reads N times */ 216 int reverify_delay; /* Was n sec between read sets */ 217 int continue_on_error; /* Do not abort test due to errors */ 218 int error_count; /* Running total of errors */ 219 int error_max; /* Abort test after N errors */ 220 221 int index_start; /* First index to test */ 222 int index_end; /* Last index to test */ 223 int index_total; /* Size of index range (max-min+1-holes) */ 224 int frag_index_start[10]; 225 int frag_index_end[10]; 226 int frag_count; 227 unsigned int array_index_start; /* First array index to test (if this is a memory array) */ 228 unsigned int array_index_end; /* Last array index to test */ 229 int index_step; /* Index increment (could be neg.) */ 230 231 int read_count; /* # reads to issue */ 232 int err_count; /* Count of miscompares so far */ 233 int ecc_as_data; /* treat ecc field as regular field */ 234 int report_progress; 235 int inc_port_macros; /* if flag set include port macro blocks*/ 236 void (*status_cb)(struct soc_mem_test_s *parm, char *status_str); 237 /* Callback to report test status */ 238 239 int (*write_cb)(struct soc_mem_test_s *parm, 240 /* Callback to write a table entry */ 241 /* Returns -1 on error, 0 on success */ 242 unsigned array_index, 243 int copyno, 244 int index, 245 uint32 *entry_data); 246 247 int (*read_cb)(struct soc_mem_test_s *parm, 248 /* Callback to read a table entry */ 249 /* Returns -1 on error, 0 on success */ 250 unsigned array_index, 251 int copyno, 252 int index, 253 uint32 *entry_data); 254 255 int (*miscompare_cb)(struct soc_mem_test_s *parm, 256 /* Callback when a miscompare occurs */ 257 /* Returns MT_MISCOMPARE_xx (above) */ 258 unsigned array_index, 259 int copyno, 260 int index, 261 uint32 *read_data, 262 uint32 *wrote_data, 263 uint32 *mask_data); 264 } soc_mem_test_t; 265 266 #if defined(BCM_SAND_SUPPORT) 267 typedef struct 268 { 269 uint32 enable_skip; 270 uint32 show_compare; 271 uint8 include_port_macros; /* when set 1: test include port macros(nbih,nbil) other skipping port macros*/ 272 uint32 start_from; 273 uint32 count; 274 } tr7_dbase_t; 275 #endif 276 277 #if defined(BCM_FIREBOLT2_SUPPORT) || defined(BCM_TRX_SUPPORT) \ 278 || defined(BCM_RAPTOR_SUPPORT) 279 typedef struct dual_hash_info_s { 280 int hash_sel0; 281 int hash_sel1; 282 int bucket_size; 283 soc_mem_t base_mem; 284 } dual_hash_info_t; 285 #endif /* BCM_FIREBOLT2_SUPPORT || BCM_TRX_SUPPORT || BCM_RAPTOR_SUPPORT */ 286 287 #ifdef SOC_ROBUST_HASH 288 #define ROBUST_HASH_KEY_SPACE_WIDTH 16 289 #define ROBUST_HASH_NUM_MODULES 2 290 #define ROBUST_HASH_REMAP_TABLE_SIZE 256 291 #define ROBUST_HASH_ACTION_TABLE_SIZE 256 292 #define ROBUST_HASH_ACTION_TABLE_WIDTH 64 293 #define ROBUST_HASH_ACTION_TABLE_DEPTH 4 294 295 typedef struct soc_robust_hash_config_s { 296 uint32 enable; /* Robust hash Enabled/disabled */ 297 soc_mem_t remap_tab[ROBUST_HASH_NUM_MODULES]; /* Remap table memories */ 298 soc_mem_t action_tab[ROBUST_HASH_NUM_MODULES]; /* Action table memories */ 299 uint32 remap_data_A[ROBUST_HASH_REMAP_TABLE_SIZE]; /* Remap Table bank 0 SW cache */ 300 uint32 remap_data_B[ROBUST_HASH_REMAP_TABLE_SIZE]; /* Remap Table bank 1 SW cache */ 301 uint64 action_data_A[ROBUST_HASH_ACTION_TABLE_DEPTH]; /* Action Table bank 0 SW cache */ 302 uint64 action_data_B[ROBUST_HASH_ACTION_TABLE_DEPTH]; /* Action Table bank 1 SW cache */ 303 } soc_robust_hash_config_t; 304 305 typedef struct robust_hash_db_s { 306 #if defined(BCM_TRIDENT3_SUPPORT) || defined(BCM_TOMAHAWK3_SUPPORT) 307 soc_robust_hash_config_t l2; 308 soc_robust_hash_config_t l3; 309 soc_robust_hash_config_t exact_match; 310 #endif /* BCM_TRIDENT3_SUPPORT or BCM_TOMAHAWK3_SUPPORT */ 311 #ifdef BCM_TRIDENT3_SUPPORT 312 soc_robust_hash_config_t ing_xlate_1; 313 soc_robust_hash_config_t ing_xlate_2; 314 soc_robust_hash_config_t egr_xlate_1; 315 soc_robust_hash_config_t egr_xlate_2; 316 soc_robust_hash_config_t subport_id_sgpp_map; 317 soc_robust_hash_config_t ing_dnat_address; 318 #endif 319 #ifdef BCM_TOMAHAWK_SUPPORT 320 soc_robust_hash_config_t ing_xlate; 321 soc_robust_hash_config_t egr_xlate; 322 soc_robust_hash_config_t mpls_entry; 323 #ifdef BCM_TOMAHAWK3_SUPPORT 324 soc_robust_hash_config_t tunnel; 325 #endif /* BCM_TOMAHAWK_SUPPORT3 */ 326 #endif /* BCM_TOMAHAWK_SUPPORT */ 327 #if defined (BCM_TRIDENT2PLUS_SUPPORT) || defined (BCM_TRIDENT3_SUPPORT) 328 soc_robust_hash_config_t ing_vp_vlan_member; 329 soc_robust_hash_config_t egr_vp_vlan_member; 330 #endif /* BCM_TRIDENT2PLUS_SUPPORT */ 331 } soc_robust_hash_db_t; 332 #endif /* SOC_ROBUST_HASH */ 333 334 #ifdef BCM_TRIDENT_SUPPORT 335 #define SOC_MEM_CP_MAX_NUM 4 336 /* Structure for mem which owns multi physical copies */ 337 typedef struct soc_multi_cp_mem_s { 338 soc_mem_t mem; 339 soc_mem_t mem_cp[SOC_MEM_CP_MAX_NUM]; 340 } soc_multi_cp_mem_t; 341 #endif /* BCM_TRIDENT_SUPPORT */ 342 343 extern int soc_mem_test_skip(int unit, soc_mem_t mem, int index); 344 extern int soc_mem_test(soc_mem_test_t *m); /* Returns 0 on pass, -1 on fail */ 345 extern int soc_mem_parity_control(int unit, soc_mem_t mem, 346 int copyno, int enable); 347 extern int soc_mem_cpu_write_control(int unit, soc_mem_t mem, int copyno, 348 int enable, int *orig_enable); 349 extern int soc_mem_parity_clean(int unit, soc_mem_t mem, int copyno); 350 extern int soc_mem_parity_restore(int unit, soc_mem_t mem, int copyno); 351 extern void soc_mem_datamask_memtest(int unit, soc_mem_t mem, uint32 *buf); 352 353 /* _SOC_ACC_TYPE_PIPE_ANY maps to the first pipe where applicable */ 354 typedef enum { 355 _SOC_ACC_TYPE_PIPE_ALL = -2, 356 _SOC_ACC_TYPE_PIPE_ANY = -1, 357 _SOC_ACC_TYPE_PIPE_GROUP = 0, 358 _SOC_ACC_TYPE_PIPE_X = 1, 359 _SOC_ACC_TYPE_PIPE_Y = 2, 360 _SOC_ACC_TYPE_PIPE_BCAST = 3, 361 _SOC_ACC_TYPE_PIPE_SBS = 6, 362 363 _SOC_UNIQUE_ACC_TYPE_PIPE_0 = 0, 364 _SOC_UNIQUE_ACC_TYPE_PIPE_1 = 1, 365 _SOC_UNIQUE_ACC_TYPE_PIPE_2 = 2, 366 _SOC_UNIQUE_ACC_TYPE_PIPE_3 = 3, 367 _SOC_UNIQUE_ACC_TYPE_PIPE_4 = 4, 368 _SOC_UNIQUE_ACC_TYPE_PIPE_5 = 5, 369 _SOC_UNIQUE_ACC_TYPE_PIPE_6 = 6, 370 _SOC_UNIQUE_ACC_TYPE_PIPE_7 = 7 371 } soc_acc_type_t; 372 373 typedef enum { 374 SOC_PIPE_SELECT_ANY = -1, 375 SOC_PIPE_SELECT_ALL = -1, 376 SOC_PIPE_SELECT_X_COMMON = 0, 377 SOC_PIPE_SELECT_0 = 0, 378 SOC_PIPE_SELECT_Y_COMMON = 1, 379 SOC_PIPE_SELECT_1 = 1, 380 SOC_PIPE_SELECT_2 = 2, 381 SOC_PIPE_SELECT_3 = 3, 382 SOC_PIPE_SELECT_4 = 4, 383 SOC_PIPE_SELECT_5 = 5, 384 SOC_PIPE_SELECT_6 = 6, 385 SOC_PIPE_SELECT_7 = 7 386 } soc_pipe_select_t; 387 388 /* SBUS acc type bits for pre-extended SBUS address format */ 389 #define _SOC_MEM_ADDR_ACC_TYPE_MASK 0x7 390 #define _SOC_MEM_ADDR_ACC_TYPE_SHIFT 17 391 #define _SOC_MEM_ADDR_ACC_TYPE_PIPE_X 1 392 #define _SOC_MEM_ADDR_ACC_TYPE_PIPE_Y 2 393 #define _SOC_MEM_ADDR_ACC_TYPE_PIPE_0 0 394 #define _SOC_MEM_ADDR_ACC_TYPE_PIPE_1 1 395 #define _SOC_MEM_ADDR_ACC_TYPE_PIPE_2 2 396 #define _SOC_MEM_ADDR_ACC_TYPE_PIPE_3 3 397 #define _SOC_MEM_ADDR_ACC_TYPE_PIPE_4 4 398 #define _SOC_MEM_ADDR_ACC_TYPE_PIPE_5 5 399 #define _SOC_MEM_ADDR_ACC_TYPE_PIPE_6 6 400 #define _SOC_MEM_ADDR_ACC_TYPE_PIPE_7 7 401 #define _SOC_MEM_ADDR_ACC_TYPE_PIPE_SBS 6 402 403 extern void _soc_mem_tcam_xy_to_dm(int unit, soc_mem_t mem, int count, 404 uint32 *xy_entry, uint32 *dm_entry); 405 extern void _soc_mem_tcam_dm_to_xy(int unit, soc_mem_t mem, int count, 406 uint32 *dm_entry, uint32 *xy_entry, 407 uint32 *cache_entry); 408 /* 409 * Comparison functions for memory tables. 410 */ 411 412 #define SOC_MEM_INIT_FLD(table, mem, buf, fld, fldbuf) \ 413 (soc_meminfo_field_set(mem, (table)[mem], (uint32 *)(buf), \ 414 fld, (uint32 *)(fldbuf))) 415 416 #define SOC_MEM_INIT_FLD_FORCE(table, mem, buf, fld, value) \ 417 (soc_meminfo_field32_force(mem, (table)[mem], (uint32 *)(buf), \ 418 fld, value)) 419 420 #define SOC_MEM_INIT_FLD_MACADDR(table, mem, buf, fld, mac) \ 421 (soc_meminfo_mac_addr_set(mem, (table)[mem], (uint32 *)(buf), \ 422 fld, mac)) 423 424 /* Disabled */ 425 #define SOC_MEM_VALIDATE(_table, _mem_name) 426 427 extern int _soc_mem_cmp_gm(int, void *, void *); 428 extern int _soc_mem_cmp_arl(int, void *, void *); 429 extern int _soc_mem_cmp_marl(int, void *, void *); 430 extern int _soc_mem_cmp_rule(int, void *, void *); 431 extern int _soc_mem_cmp_rule_5665(int, void *, void *); 432 extern int _soc_mem_cmp_word0(int, void *, void *); 433 extern int _soc_mem_cmp_vtable(int, void *, void *); 434 extern int _soc_mem_cmp_ipmc(int, void *, void *); 435 extern int _soc_mem_cmp_undef(int, void *, void *); 436 extern int _soc_mem_cmp_subport_id_to_sgpp_map(int, void *, void *); 437 438 439 #ifdef BCM_XGS_SWITCH_SUPPORT 440 extern int _soc_mem_cmp_l2x(int, void *, void *); 441 extern int _soc_mem_cmp_l2x_sync(int, void *, void *, int, uint8); 442 extern int _soc_mem_cmp_l3x(int, void *, void *); 443 extern int _soc_mem_cmp_l3x_sync(int unit); 444 extern int _soc_mem_cmp_l3x_set(int unit, uint32 ipmc_config); 445 #endif /* BCM_XGS_SWITCH_SUPPORT */ 446 447 #ifdef BCM_TRIUMPH3_SUPPORT 448 extern int _soc_mem_cmp_tr3_l2x(int, void *, void *); 449 extern int _soc_mem_cmp_tr3_l2x_sync(int, void *, void *, uint8); 450 extern int _soc_mem_cmp_tr3_ext_l2x(int, void *, void *); 451 extern int _soc_mem_cmp_tr3_ext_l2x_1_sync(int, void *, void *, uint8); 452 extern int _soc_mem_cmp_tr3_ext_l2x_2_sync(int, void *, void *, uint8); 453 #endif /* BCM_TRIUMPH3_SUPPORT */ 454 455 #if defined(BCM_FIREBOLT_SUPPORT) || defined(BCM_BRADLEY_SUPPORT) 456 extern int _soc_mem_cmp_l2x2(int, void *, void *); 457 extern int _soc_mem_cmp_l3x2(int, void *ent_a, void *ent_b); 458 extern int _soc_mem_cmp_l3x2_ip4ucast(int unit, void *ent_a, void *ent_b); 459 extern int _soc_mem_cmp_l3x2_ip4mcast(int unit, void *ent_a, void *ent_b); 460 extern int _soc_mem_cmp_l3x2_ip6ucast(int unit, void *ent_a, void *ent_b); 461 extern int _soc_mem_cmp_l3x2_ip6mcast(int u, void *e_a, void *e_b); 462 extern int _soc_mem_cmp_lpm(int u, void *e_a, void *e_b); 463 #endif /* BCM_FIREBOLT_SUPPORT || BCM_BRADLEY_SUPPORT */ 464 465 #ifdef BCM_XGS3_SWITCH_SUPPORT 466 extern int _soc_mem_cmp_vlan_mac(int unit, void *ent_a, void *ent_b); 467 #endif /* BCM_XGS3_SWITCH_SUPPORT */ 468 469 #ifdef BCM_TRX_SUPPORT 470 extern int _soc_mem_cmp_vlan_mac_tr(int unit, void *ent_a, void *ent_b); 471 extern int _soc_mem_cmp_vlan_xlate_tr(int unit, void *ent_a, void *ent_b); 472 extern int _soc_mem_cmp_egr_vlan_xlate_tr(int unit, void *ent_a, void *ent_b); 473 #ifdef BCM_TRIUMPH_SUPPORT 474 extern int _soc_mem_cmp_mpls_entry_tr(int unit, void *ent_a, void *ent_b); 475 #endif /* BCM_TRIUMPH_SUPPORT */ 476 #ifdef BCM_TRIDENT2_SUPPORT 477 extern int _soc_mem_cmp_ing_vp_vlan_membership(int unit, void *ent_a, void *ent_b); 478 extern int _soc_mem_cmp_egr_vp_vlan_membership(int unit, void *ent_a, void *ent_b); 479 extern int _soc_mem_cmp_ing_dnat_address_type(int unit, void *ent_a, void *ent_b); 480 extern int _soc_mem_cmp_l2_endpoint_id(int unit, void *ent_a, void *ent_b); 481 extern int _soc_mem_cmp_endpoint_queue_map(int unit, void *ent_a, void *ent_b); 482 #endif /* BCM_TRIDENT2_SUPPORT */ 483 #ifdef BCM_TOMAHAWK_SUPPORT 484 extern int _soc_mem_cmp_exact_match(int unit, void *ent_a, void *ent_b); 485 #endif /* BCM_TOMAHAWK_SUPPORT */ 486 extern int _soc_mem_cmp_ft_key_double(int unit, void *ent_a, void *ent_b); 487 extern int _soc_mem_cmp_ft_key_single(int unit, void *ent_a, void *ent_b); 488 #ifdef BCM_TOMAHAWK3_SUPPORT 489 extern int _soc_mem_cmp_l3_tunnel(int unit, void *ent_a, void *ent_b); 490 #endif /* BCM_TOMAHAWK3_SUPPORT */ 491 #endif /* BCM_TRX_SUPPORT */ 492 493 #ifdef BCM_EASYRIDER_SUPPORT 494 extern int _soc_mem_cmp_l2er(int, void *, void *); 495 extern int _soc_mem_cmp_l3v4er(int, void *, void *); 496 extern int _soc_mem_cmp_l3v6er(int, void *, void *); 497 extern int _soc_mem_cmp_l3_defip_alg(int, void *, void *); 498 #endif /* BCM_EASYRIDER_SUPPORT */ 499 500 extern void 501 soc_mem_dst_blk_update(int unit, int copyno, int maddr, int *dst_blk); 502 extern void * 503 soc_mem_write_tcam_to_hw_format(int unit, soc_mem_t mem, void *entry_data, 504 uint32 *cache_entry_data, 505 uint32 *converted_entry_data); 506 507 extern int 508 soc_mem_write_copyno_update(int unit, soc_mem_t mem, int *copyno, 509 int *copyno_override); 510 511 #if defined(BCM_FIREBOLT2_SUPPORT) || defined(BCM_TRX_SUPPORT) \ 512 || defined(BCM_RAPTOR_SUPPORT) 513 extern int _soc_mem_dual_hash_insert(int unit, soc_mem_t mem, int copyno, 514 void *entry_data, void *old_entry_data, 515 int recurse_depth); 516 #endif /* BCM_FIREBOLT2_SUPPORT || BCM_TRX_SUPPORT || BCM_RAPTOR_SUPPORT */ 517 518 /* Initialize Slot Free Address Pool and Cell Free Address Pool */ 519 extern int soc_mem_cfap_init(int unit); 520 521 /* Lock a memory to allow for atomic manipulations by multiple tasks */ 522 #define soc_mem_lock(_u, _m) MEM_LOCK(_u, _m) 523 #define soc_mem_unlock(_u, _m) MEM_UNLOCK(_u, _m) 524 525 /* Add an entry to field-value array for multiple fields write */ 526 #define soc_mem_set_field_value_array(_fa, _f, _va, _v, _p) \ 527 do { \ 528 _fa[_p] = _f; \ 529 _va[_p] = _v; \ 530 _p++; \ 531 } while (0); \ 532 533 #ifdef BCM_CMICM_SUPPORT 534 extern int 535 soc_host_ccm_copy(int unit, void *srcbuf, void *dstbuf, 536 int count, int endian); 537 538 extern int 539 soc_host_ccm_copy_multi_cmc(int unit, void *srcbuf, void *dstbuf, 540 int count, int endian, int cmc); 541 #endif 542 543 /* 544 * Write internal memories 545 * NOTE: GBP/CBP memory is only accessible when in DEBUG mode. 546 */ 547 extern int soc_mem_write(int unit, 548 soc_mem_t mem, 549 int copyno, /* COPYNO_ALL allowed */ 550 int index, 551 void *entry_data); 552 553 extern int soc_mem_write_extended(int unit, uint32 flags, 554 soc_mem_t mem, 555 int copyno, /* COPYNO_ALL allowed */ 556 int index, 557 void *entry_data); 558 /* 559 * Write internal memory arrays 560 * NOTE: GBP/CBP memory is only accessible when in DEBUG mode. 561 */ 562 extern int soc_mem_array_write(int unit, 563 soc_mem_t mem, 564 unsigned array_index, /* index/element in the array */ 565 int copyno, /* COPYNO_ALL allowed */ 566 int index, 567 void *entry_data); 568 extern int soc_mem_array_write_extended(int unit, uint32 flags, 569 soc_mem_t mem, 570 unsigned array_index, /* index/element in the array */ 571 int copyno, /* COPYNO_ALL allowed */ 572 int index, 573 void *entry_data); 574 575 extern int soc_mem_write_range(int unit, /* DMA-accelerated on XGS3 chips */ 576 soc_mem_t mem, 577 int copyno, 578 int index_min, 579 int index_max, 580 void *entry_array); 581 582 extern int soc_mem_write_range_multi_cmc(int unit, /* DMA-accelerated on XGS3 chips */ 583 soc_mem_t mem, 584 int copyno, 585 int index_min, 586 int index_max, 587 void *entry_array, 588 int vchan); 589 590 extern int soc_mem_array_write_range(int unit, /* DMA-accelerated on XGS3 chips */ 591 uint32 flags, 592 soc_mem_t mem, 593 unsigned array_index, 594 int copyno, 595 int index_min, 596 int index_max, 597 void *entry_array); 598 599 extern int soc_mem_array_write_range_multi_cmc(int unit, /* DMA-accelerated on XGS3 chips */ 600 uint32 flags, 601 soc_mem_t mem, 602 unsigned array_index, 603 int copyno, 604 int index_min, 605 int index_max, 606 void *entry_array, 607 int vchan); 608 609 /* 610 * Efficiently write a range of chip's memory with the same memory entry. 611 * When SLAM DMA is available, it is used, and the buffer must be allocated using soc_cm_salloc(). 612 */ 613 614 extern int soc_mem_array_fill_range( 615 int unit, /* unit of the memory */ 616 uint32 flags, /* flags */ 617 soc_mem_t mem, /* Memory to be written to */ 618 unsigned min_ar_index, /* min array index to be written to, not used in memories which are not arrays */ 619 unsigned max_ar_index, /* max array index to be written to, not used in memories which are not arrays */ 620 int copyno, /* Memory block to write to */ 621 int index_min, /* first memory index to write to */ 622 int index_max, /* last memory index to write to */ 623 const void *buffer); /* buffer of the entry to write. If the memory can be written to by SLAM DMA, 624 then the buffer must be allocated using soc_cm_salloc(). */ 625 /* 626 * Efficiently write to a whole memory with a repeating entry. 627 * When SLAM DMA is available, it is used, and the buffer must be allocated using soc_cm_salloc(). 628 */ 629 extern int soc_mem_fill( 630 int unit, /* unit of the memory */ 631 soc_mem_t mem, /* Memory to be written to */ 632 int copyno, /* Memory block to write to */ 633 const void *buffer); /* buffer of the entry to repeatedly write. If the memory can be written to by SLAM DMA, 634 then the buffer must be allocated using soc_cm_salloc(). */ 635 636 637 /* Validate if memory field is valid.*/ 638 extern int soc_mem_field_valid(int unit, soc_mem_t mem, soc_field_t field); 639 #define SOC_MEM_FIELD_VALID(_u_,_mem_,_fld_) \ 640 soc_mem_field_valid(_u_, _mem_, _fld_) 641 642 /* 643 * Read internal memories 644 * NOTE: GBP/CBP memory is only accessible when in DEBUG mode. 645 */ 646 extern int soc_mem_read(int unit, 647 soc_mem_t mem, 648 int copyno, 649 int index, 650 void *entry_data); 651 652 extern int soc_mem_read_physical_index(int unit, 653 uint32 flags, 654 soc_mem_t mem, 655 int copyno, 656 int index, 657 void *entry_data); 658 659 extern int soc_mem_read_no_cache(int unit, 660 uint32 flags, 661 soc_mem_t mem, 662 unsigned array_index, 663 int copyno, 664 int index, 665 void *entry_data); 666 /* 667 * Read internal memories and pass required flags 668 */ 669 extern int soc_mem_read_extended(int unit, uint32 flags, 670 soc_mem_t mem, 671 unsigned array_index, /* index/element in the array */ 672 int copyno, 673 int index, 674 void *entry_data); 675 676 /* 677 * Read internal memory arrays 678 * NOTE: GBP/CBP memory is only accessible when in DEBUG mode. 679 */ 680 extern int soc_mem_array_read(int unit, 681 soc_mem_t mem, 682 unsigned array_index, /* index/element in the array */ 683 int copyno, 684 int index, 685 void *entry_data); 686 687 extern int soc_mem_read_range(int unit, /* DMA-accelerated on XGS chips */ 688 soc_mem_t mem, 689 int copyno, 690 int index_min, 691 int index_max, 692 void *entry_array); 693 694 extern int soc_mem_read_range_multi_cmc(int unit, /* DMA-accelerated on XGS chips */ 695 soc_mem_t mem, 696 int copyno, 697 int index_min, 698 int index_max, 699 void *entry_array, 700 int vchan); 701 702 extern int soc_mem_ser_read_range(int unit, 703 soc_mem_t mem, 704 int copyno, 705 int index_min, 706 int index_max, 707 uint32 ser_flags, 708 void *entry_array); 709 710 extern int soc_mem_array_read_range(int unit, /* DMA-accelerated on XGS chips */ 711 soc_mem_t mem, 712 unsigned array_index, 713 int copyno, 714 int index_min, 715 int index_max, 716 void *entry_array); 717 718 extern int soc_mem_array_read_range_multi_cmc(int unit, /* DMA-accelerated on XGS chips */ 719 soc_mem_t mem, 720 unsigned array_index, 721 int copyno, 722 int index_min, 723 int index_max, 724 void *entry_array, 725 int vchan); 726 727 extern int soc_mem_array_read_flags(int unit, 728 soc_mem_t mem, 729 unsigned array_index, /* index/element in the array */ 730 int copyno, 731 int index, 732 void *entry_data, 733 int flags); 734 735 /* 736 * Write internal memories while overriding pipe selection 737 */ 738 extern int soc_mem_pipe_select_write(int unit, uint32 flags, 739 soc_mem_t mem, 740 int copyno, /* COPYNO_ALL allowed */ 741 int acc_type, 742 int index, 743 void *entry_data); 744 745 /* 746 * Read internal memories while overriding pipe selection 747 */ 748 extern int soc_mem_pipe_select_read(int unit, 749 uint32 flags, 750 soc_mem_t mem, 751 int copyno, /* COPYNO_ALL allowed */ 752 int acc_type, 753 int index, 754 void *entry_data); 755 756 extern int soc_mem_dmaable(int unit, soc_mem_t mem, int copyno); 757 extern int soc_mem_slamable(int unit, soc_mem_t mem, int copyno); 758 759 extern int soc_mem_clearable_on_reset(int unit, soc_mem_t mem, int copyno); 760 /* Routines for tables that are maintained in sorted order */ 761 extern int soc_mem_clear(int unit, 762 soc_mem_t mem, 763 int copyno, /* COPYNO_ALL allowed */ 764 int force_all); 765 766 extern int soc_mem_field_clear_all(int unit, 767 soc_mem_t mem, 768 soc_field_t field, 769 int copyno, /* COPYNO_ALL allowed */ 770 int force_all); 771 772 extern int soc_mem_search(int unit, 773 soc_mem_t mem, 774 int copyno, 775 int *index_ptr, 776 void *key_data, 777 void *entry_data, 778 int lowest_match); 779 780 extern int soc_mem_field32_modify(int unit, soc_mem_t mem, int index, 781 soc_field_t field, uint32 value); 782 extern int soc_mem_fields32_modify(int unit, soc_mem_t mem, int index, 783 int field_count, soc_field_t *fields, 784 uint32 *values); 785 extern int soc_mem_field32_fit(int unit, soc_mem_t mem, 786 soc_field_t field, uint32 value); 787 788 /* Return code that may be returned by soc_mem_search (filters only) */ 789 #define SOC_MEM_PARTIAL_MATCH 1 790 791 extern int soc_mem_insert(int unit, 792 soc_mem_t mem, 793 int copyno, /* COPYNO_ALL allowed */ 794 void *entry_data); 795 796 extern int soc_mem_bank_insert(int unit, 797 soc_mem_t mem, 798 int32 banks, 799 int copyno, 800 void *entry_data, 801 void *old_entry_data); 802 803 extern int soc_mem_insert_return_old(int unit, 804 soc_mem_t mem, 805 int copyno, 806 void *entry_data, 807 void *old_entry_data); 808 809 extern int soc_mem_delete_index(int unit, 810 soc_mem_t mem, 811 int copyno, /* COPYNO_ALL allowed */ 812 int index); 813 814 extern int soc_mem_delete(int unit, 815 soc_mem_t mem, 816 int copyno, /* COPYNO_ALL allowed */ 817 void *key_data); 818 819 extern int soc_mem_delete_return_old(int unit, 820 soc_mem_t mem, 821 int copyno, 822 void *key_data, 823 void *old_entry_data); 824 825 extern int soc_mem_pop(int unit, 826 soc_mem_t mem, 827 int copyno, /* COPYNO_ALL allowed */ 828 void *entry_data); 829 830 extern int soc_mem_push(int unit, 831 soc_mem_t mem, 832 int copyno, /* COPYNO_ALL allowed */ 833 void *entry_data); 834 835 #define SOC_MEM_FIFO_DMA_CHANNEL_0 0x0 836 #define SOC_MEM_FIFO_DMA_CHANNEL_1 0x1 837 #define SOC_MEM_FIFO_DMA_CHANNEL_2 0x2 838 #define SOC_MEM_FIFO_DMA_CHANNEL_3 0x3 839 840 extern int soc_mem_fifo_dma_start(int unit, int chan, 841 soc_mem_t mem, int copyno, 842 int host_entries, void *host_buf); 843 844 extern int soc_mem_fifo_dma_stop(int unit, int chan); 845 846 extern int soc_mem_fifo_dma_get_read_ptr(int unit, int chan, void **host_ptr, 847 int *count); 848 849 extern int soc_mem_fifo_dma_advance_read_ptr(int unit, int chan, int count); 850 851 #ifdef BCM_CMICM_SUPPORT 852 extern int soc_mem_fifo_dma_get_num_entries(int unit, int chan, int *count); 853 854 extern int soc_mem_fifo_dma_set_entries_read(int unit, int chan, uint32 num); 855 #endif /* BCM_CMICM_SUPPORT */ 856 857 #if defined(BCM_TRIDENT2_SUPPORT) || defined(BCM_TRIDENT_SUPPORT) 858 #ifdef BCM_WARM_BOOT_SUPPORT 859 extern int soc_control_overlay_tcam_scache_sync(int unit); 860 #endif 861 #endif 862 863 extern int soc_mem_cache_set(int unit, 864 soc_mem_t mem, 865 int copyno, /* COPYNO_ALL allowed */ 866 int enable); 867 extern int soc_mem_cache_invalidate(int unit, 868 soc_mem_t mem, 869 int copyno, 870 int index); 871 872 extern int soc_mem_cache_get(int unit, 873 soc_mem_t mem, 874 int copyno); 875 876 int soc_mem_cache_block_move(int unit, 877 uint32 flags, 878 soc_mem_t mem, 879 unsigned src_arr_index, 880 unsigned dest_arr_index, 881 int copyno, 882 int src_index_start, 883 int dest_index_start, 884 int entries_count); 885 886 extern int soc_mem_cache_scache_init(int unit); 887 extern int soc_mem_cache_scache_sync(int unit); 888 extern int soc_mem_cache_scache_get(int unit); 889 extern int soc_mem_cache_scache_load(int unit, soc_mem_t mem, int *offset); 890 891 extern int soc_control_defip_scache_init(int unit); 892 extern int soc_control_defip_scache_sync(int unit); 893 extern int soc_control_defip_scache_get(int unit); 894 extern int soc_control_defip_scache_load(int unit, int *num_ipv6_128b_entries); 895 896 extern int soc_mem_entries(int unit, 897 soc_mem_t mem, 898 int copyno); 899 900 #define SOC_MEM_HASH_BANK0_BIT 0x1 901 #define SOC_MEM_HASH_BANK1_BIT 0x2 902 #define SOC_MEM_HASH_BANK0_ONLY 0x2 903 #define SOC_MEM_HASH_BANK1_ONLY 0x1 904 #define SOC_MEM_HASH_BANK_BOTH 0 905 #define SOC_MEM_HASH_BANK_ALL -1 906 #define SOC_MEM_DUAL_HASH_RECURSE_DEPTH 0 907 #define SOC_MEM_MULTI_HASH_RECURSE_DEPTH 0 908 909 extern int soc_mem_generic_lookup(int unit, 910 soc_mem_t mem, 911 int copyno, 912 int32 banks, 913 void *key, 914 void *result, 915 int *index_ptr); 916 917 extern int soc_mem_generic_insert(int unit, 918 soc_mem_t mem, 919 int copyno, 920 int32 banks, 921 void *entry, 922 void *old_entry, 923 int *index_ptr); 924 925 extern int soc_mem_generic_delete(int unit, 926 soc_mem_t mem, 927 int copyno, 928 int32 banks, 929 void *entry, 930 void *old_entry, 931 int *index_ptr); 932 933 /* ALPM Memory functions */ 934 extern int soc_mem_alpm_lookup(int unit, 935 soc_mem_t mem, 936 int bucket_index, 937 int copyno, 938 uint32 banks_disable, 939 void *key, 940 void *result, 941 int *index_ptr); 942 943 extern int soc_mem_alpm_insert(int unit, 944 soc_mem_t mem, 945 int bucket_pointer, 946 int copyno, 947 int32 banks_disable, 948 void *entry, 949 void *old_entry, 950 int *index_ptr); 951 extern int soc_mem_alpm_delete(int unit, 952 soc_mem_t mem, 953 int bucket, 954 int copyno, 955 int32 banks_disable, 956 void *entry, 957 void *old_entry, 958 int *index_ptr); 959 960 extern int soc_mem_alpm_read(int unit, 961 soc_mem_t mem, 962 int copyno, 963 int bank, 964 int index, 965 int entry, 966 void *entry_data); 967 968 extern int soc_mem_alpm_write(int unit, 969 soc_mem_t mem, 970 int copyno, /* Use COPYNO_ALL for all */ 971 int bank, 972 int index, 973 int entry, 974 void *entry_data); 975 976 extern void 977 _soc_mem_alpm_write_cache(int unit, soc_mem_t mem, int copyno, 978 int index, void *entry_data); 979 980 extern int 981 _soc_mem_alpm_read_cache(int unit, soc_mem_t mem, int copyno, 982 int index, void *entry_data); 983 984 /* 985 * Putting the MMU in debug mode quiesces packet activity in and out of 986 * the MMU, so it is safe to read/write GBP/CBP memory. 987 */ 988 extern int soc_mem_debug_set(int unit, int enable); 989 extern int soc_mem_debug_get(int unit, int *enable); 990 991 #ifdef SOC_MEM_L3_DEFIP_WAR 992 extern int soc_fb_l3_defip_index_map(int unit, int index); 993 #endif 994 /* 995 * Map an index in L3_DEFIP to the real h/w index 996 */ 997 998 extern int soc_tr2_l3_defip_index_map(int unit, int index); 999 1000 #ifdef INCLUDE_MEM_SCAN 1001 /* 1002 * Memory error scan thread management 1003 */ 1004 #define SOC_MEMSCAN_INTERVAL_DEFAULT 10000000 1005 #define SOC_MEMSCAN_INTERVAL_SIM_DEFAULT 100000000 1006 #define SOC_MEMSCAN_RATE_DEFAULT 4096 1007 1008 extern int soc_mem_scan_running(int unit, int *rate, sal_usecs_t *interval); 1009 extern int soc_mem_scan_start(int unit, int rate, sal_usecs_t interval); 1010 extern int soc_mem_scan_stop(int unit); 1011 extern void soc_mem_scan_ser_list_register(int unit, int generic, 1012 void *ser_info); 1013 extern void soc_mem_scan_tcam_cache_update(int unit, soc_mem_t mem, 1014 int index_begin, int index_end, 1015 uint32 *xy_entries); 1016 #if defined(BCM_TRIDENT_SUPPORT) 1017 extern void soc_mem_scan_mask_get(int unit, soc_mem_t mem, int copyno, 1018 int acc_type, uint32 *mask, uint32 mask_length); 1019 #endif /* BCM_TRIDENT_SUPPORT */ 1020 1021 #endif /* INCLUDE_MEM_SCAN */ 1022 1023 #ifdef BCM_SRAM_SCAN_SUPPORT 1024 #define SOC_SRAMSCAN_INTERVAL_DEFAULT 100000000 1025 #define SOC_SRAMSCAN_INTERVAL_SIM_DEFAULT 1000000000 1026 #define SOC_SRAMSCAN_RATE_DEFAULT 4096 1027 1028 extern int soc_sram_scan_running(int unit, int *rate, sal_usecs_t *interval); 1029 extern int soc_sram_scan_start(int unit, int rate, sal_usecs_t interval); 1030 extern int soc_sram_scan_stop(int unit); 1031 #endif 1032 1033 /* Function for memory iteration. */ 1034 typedef int (*soc_mem_iter_f)(int unit, soc_mem_t mem, void *data); 1035 extern int soc_mem_iterate(int unit, soc_mem_iter_f do_it, void *data); 1036 #define MEM_RW_CTRL_ADDR drv_reg_addr(unit, GENMEM_CTLr, 0, 0) 1037 #define MEM_RW_DATA_ADDR drv_reg_addr(unit, GENMEM_DATAr, 0, 0) 1038 #define MEM_RW_ADDR_ADDR drv_reg_addr(unit, GENMEM_ADDRr, 0, 0) 1039 1040 1041 #define SEC_MAC_READ_ADDR soc_reg_addr(unit, I3E1Q_VLAN_TAB_READr, 0, 0) 1042 #define VLAN_TABLE_READ_ADDR soc_reg_addr(unit, I3E1Q_VLAN_TAB_READr, 0, 0) 1043 1044 #define VLAN_TABLE_WRITE_ADDR soc_reg_addr(unit, I3E1Q_VLAN_TAB_WRITEr, 0, 0) 1045 1046 #define MEM_TABLE_READ 1 /* For Memory Read Operation */ 1047 #define MEM_TABLE_WRITE 0 /* For Memory Write Operation */ 1048 #define ADDR_TBL_MEM_ADDR_ADDR \ 1049 soc_reg_addr(unit, GMEM_ACES_ADDRTBL_MEMADDRr, 0, 0) 1050 #define ADDR_TBL_MEM_DATA_ADDR \ 1051 soc_reg_addr(unit, GMEM_ACES_ADDRTBL_MEMDATAr, 0, 0) 1052 1053 #if defined(SER_TR_TEST_SUPPORT) 1054 #define SOC_INVALID_TCAM_PARITY_BIT -1 1055 #define SOC_MAX_NAME_LEN 400 1056 1057 #define SOC_MEM_PIPE_GROUP 0 1058 #define SOC_MEM_PIPE_X 1 1059 #define SOC_MEM_PIPE_Y 2 1060 #define SOC_MEM_PIPE_ANY -1 1061 /*Flags for soc_ser_test_inject_full*/ 1062 #define SOC_INJECT_ERROR_NO_FLAGS 0 1063 #define SOC_INJECT_ERROR_TCAM_FLAG 1 1064 #define SOC_INJECT_ERROR_2BIT_ECC 0x2 1065 #define SOC_INJECT_ERROR_DONT_MAP_INDEX 0x4 1066 #define SOC_INJECT_ERROR_XOR_BANK 0x8 1067 1068 1069 #define SER_TEST_MEM_F_READ_FUNC_VIEW 0x1 1070 #define SER_TEST_MEM_F_DONT_MAP_INDEX 0x2 1071 1072 /*Flags for soc_ser_test_overlays*/ 1073 #define SOC_SER_OVERLAY_TEST_NO_FLAG 0 1074 #define SOC_SER_OVERLAY_TEST_YPIPE 1 1075 typedef enum { 1076 SER_SINGLE_INDEX, 1077 SER_FIRST_MID_LAST_INDEX, 1078 SER_ALL_INDEXES, 1079 SER_FIRST_HALF_PIPES, /* only used for sanity test */ 1080 SER_SECOND_HALF_PIPES /* only used for sanity test */ 1081 } _soc_ser_test_t; 1082 typedef struct soc_ser_overlay_test_s { 1083 soc_mem_t mem; 1084 soc_reg_t parity_enable_reg; 1085 soc_field_t parity_enable_field; 1086 soc_mem_t base_mem; 1087 soc_acc_type_t acc_type; 1088 } soc_ser_overlay_test_t; 1089 typedef struct ser_test_data_s { 1090 soc_mem_t mem; /* mem for error inject */ 1091 soc_mem_t mem_fv; /* funct_view_mem: mem for final read */ 1092 soc_reg_t parity_enable_reg; 1093 soc_mem_t parity_enable_mem; 1094 soc_field_t parity_enable_field; 1095 int parity_enable_field_position; 1096 int tcam_parity_bit; 1097 soc_block_t mem_block; 1098 soc_port_t port; 1099 soc_mem_info_t *mem_info; 1100 soc_field_t test_field; 1101 soc_acc_type_t acc_type; 1102 int index; /* index for error inject */ 1103 int index_fv; /* funct_view_index: index for final read */ 1104 uint32 *entry_buf; 1105 uint32 *field_buf; 1106 char mem_name[SOC_MAX_NAME_LEN]; 1107 char field_name[SOC_MAX_NAME_LEN]; 1108 uint32 badData; 1109 #ifdef BCM_TRIDENT_SUPPORT 1110 int(*pipe_select)(int, int, int); /* routine for pipe selection */ 1111 #endif 1112 } ser_test_data_t; 1113 1114 typedef struct ser_correction_info_s { 1115 soc_mem_t inject_mem; 1116 int compare_mem; 1117 int compare_index; 1118 } ser_correction_info_t; 1119 1120 typedef struct soc_ser_test_functions_s { 1121 soc_error_t (*inject_error_f)(int, uint32, soc_mem_t, int, int, int); 1122 soc_error_t (*test_mem)(int, soc_mem_t, _soc_ser_test_t, int); 1123 soc_error_t (*test)(int, _soc_ser_test_t); 1124 soc_error_t (*parity_control)(int, ser_test_data_t *, int); 1125 soc_error_t (*injection_support)(int, soc_mem_t, int); 1126 soc_error_t (*correction_info_get)(int, ser_correction_info_t *); 1127 } soc_ser_test_functions_t; 1128 1129 extern int soc_ser_test_long_sleep; 1130 extern int soc_ser_test_long_sleep_time_us; 1131 extern void soc_ser_test_functions_register(int unit, 1132 soc_ser_test_functions_t *fun); 1133 extern soc_error_t soc_ser_inject_error(int unit, uint32 flags,soc_mem_t mem, 1134 int pipe, int blk, int index); 1135 extern soc_error_t soc_ser_inject_support(int unit, soc_mem_t mem, int pipe); 1136 extern soc_error_t soc_ser_test(int unit, _soc_ser_test_t testType); 1137 extern soc_error_t soc_ser_test_mem(int unit, soc_mem_t mem, 1138 _soc_ser_test_t testType, int cmd); 1139 extern soc_error_t soc_ser_test_reg_parity_control_check(int unit, _soc_reg_ser_en_info_t *info); 1140 extern soc_error_t soc_ser_test_mem_parity_control_check(int unit, _soc_mem_ser_en_info_t *info); 1141 extern soc_error_t soc_ser_test_bus_parity_control_check(int unit, _soc_bus_ser_en_info_t *info); 1142 extern soc_error_t soc_ser_test_buf_parity_control_check(int unit, _soc_buffer_ser_en_info_t *info); 1143 extern soc_error_t soc_ser_test_parity_control_check(int unit, int type, void *info); 1144 extern soc_error_t ser_test_mem_write(int unit, uint32 flags, ser_test_data_t *test_data); 1145 extern soc_error_t ser_test_mem_read(int unit, uint32 read_flags, ser_test_data_t *test_data); 1146 extern soc_error_t soc_ser_test_inject_full(int unit, uint32 flags, 1147 ser_test_data_t *test_data); 1148 extern soc_error_t soc_ser_test_inject_error(int unit, 1149 ser_test_data_t *test_data, uint32 flags); 1150 extern void ser_test_cmd_generate(int unit, ser_test_data_t *test_data); 1151 extern void soc_ser_create_test_data(int unit, uint32 *tmp_entry, 1152 uint32 *field_data, soc_reg_t parity_enable_reg, 1153 int tcam_parity_bit, soc_field_t hw_parity_field, 1154 soc_mem_t mem, soc_field_t test_field, 1155 soc_block_t mem_block, soc_port_t port, 1156 soc_acc_type_t acc_type, int index, 1157 ser_test_data_t *test_data); 1158 extern void soc_ser_create_test_data_with_new_format(int unit, 1159 uint32 *tmp_entry, uint32 *field_data, 1160 soc_reg_t parity_enable_reg, soc_mem_t parity_enable_mem, 1161 int tcam_parity_bit, soc_field_t hw_parity_field, 1162 int parity_field_position, soc_mem_t mem, 1163 soc_field_t test_field, soc_block_t mem_block, 1164 soc_port_t port, soc_acc_type_t acc_type, 1165 int index, ser_test_data_t *test_data); 1166 extern soc_error_t ser_test_mem(int unit, uint32 flags, 1167 ser_test_data_t *test_data, 1168 _soc_ser_test_t test_type, int *error_count); 1169 extern int soc_ser_test_overlays(int unit, _soc_ser_test_t test_type, 1170 const soc_ser_overlay_test_t *overlays, 1171 int(*pipe_select)(int,int,int) ); 1172 extern soc_error_t ser_test_mem_pipe(int unit, soc_reg_t parity_enable_reg, 1173 int tcam_parity_bit, soc_field_t hw_parity_field, 1174 soc_mem_t mem, soc_field_t test_field, 1175 _soc_ser_test_t test_type, soc_block_t mem_block, 1176 soc_port_t port, int pipe, int * error_count); 1177 extern int ser_test_mem_index_remap(int unit, ser_test_data_t *test_data, int *mem_ecc); 1178 extern soc_error_t _ser_test_parity_control(int unit,ser_test_data_t *test_data, 1179 int enable); 1180 extern soc_error_t _ser_test_parity_control_reg_set(int unit, 1181 ser_test_data_t *test_data, int enable); 1182 extern soc_error_t _ser_test_parity_control_pci_write(int unit, 1183 ser_test_data_t *test_data, int enable); 1184 #endif /*defined(SER_TR_TEST_SUPPORT)*/ 1185 1186 extern int soc_l3_defip_index_map(int unit, int wide, int index); 1187 extern int soc_l3_defip_urpf_index_map(int unit, int wide, int index); 1188 extern int soc_l3_defip_alpm_urpf_index_map(int unit, int wide, int index); 1189 extern int soc_l3_defip_index_remap(int unit, int wide, int index); 1190 extern int soc_l3_defip_urpf_index_remap(int unit, int wide, int index); 1191 extern int soc_l3_defip_alpm_urpf_index_remap(int unit, int wide, int index); 1192 extern int soc_l3_defip_index_mem_map(int unit, int index, soc_mem_t* mem); 1193 extern int soc_l3_defip_indexes_init(int unit, int val); 1194 extern int soc_l3_defip_indexes_deinit(int unit); 1195 extern int soc_defip_tables_resize(int unit, int num_ipv6_128b_entries); 1196 extern void soc_mem_config_save(int unit, char *config_str, char *config_value); 1197 extern int soc_mem_is_dynamic(int unit, soc_mem_t mem); 1198 extern int soc_mem_is_mapped_mem(int unit, soc_mem_t mem); 1199 extern int soc_mem_is_shared_mem(int unit, soc_mem_t mem); 1200 #ifdef SOC_L3_ECMP_PROTECTED_ACCESS_SUPPORT 1201 extern int soc_mem_is_cache_only(int unit, soc_mem_t mem); 1202 #endif /* SOC_L3_ECMP_PROTECTED_ACCESS_SUPPORT */ 1203 #if defined(BCM_TOMAHAWK_SUPPORT) 1204 extern int soc_mem_field_nw_tcam_prio_order_index_get(int unit, 1205 soc_mem_t mem, int *tcam_idx); 1206 #endif /*BCM_TOMAHAWK_SUPPORT */ 1207 1208 #define SOC_MEM_FIF_DEST_INVALID 0 1209 #define SOC_MEM_FIF_DEST_NEXTHOP 1 1210 #define SOC_MEM_FIF_DEST_DGPP 2 1211 #define SOC_MEM_FIF_DEST_DVP 3 1212 #define SOC_MEM_FIF_DEST_IPMC 4 1213 #define SOC_MEM_FIF_DEST_L2MC 5 1214 #define SOC_MEM_FIF_DEST_ECMP 6 1215 #define SOC_MEM_FIF_DEST_LAG 7 1216 #define SOC_MEM_FIF_DEST_MYSTA 8 1217 #define SOC_MEM_FIF_DEST_DISC_CP2CPU 9 1218 #define SOC_MEM_FIF_DEST_DISC 10 1219 1220 #define SOC_MEM_FIF_DGPP_MOD_ID_MASK 0xff00 1221 #define SOC_MEM_FIF_DGPP_PORT_MASK 0xff 1222 #define SOC_MEM_FIF_DGPP_MOD_ID_SHIFT_BITS 8 1223 #define SOC_MEM_FIF_DGPP_RT_SHIFT_BITS 12 1224 #define SOC_MEM_FIF_DGPP_TGID_MASK 0x7ff 1225 1226 extern uint32 _soc_mem_dest_value_construct(int unit, uint32 dest_type, uint32 value); 1227 extern void _soc_mem_dest_value_resolve(int unit, uint32 dest_value, uint32 *dest_type, 1228 uint32 *value); 1229 extern void 1230 soc_mem_field32_dest_set(int unit, soc_mem_t mem, void *entbuf, 1231 soc_field_t fld, uint32 dest_type, uint32 value); 1232 extern uint32 1233 soc_mem_field32_dest_get(int unit, soc_mem_t mem, const void *entbuf, 1234 soc_field_t fld, uint32 *dest_type); 1235 extern void soc_mem_parity_field_clear(int unit, int mem, 1236 void* entry_data, void *entry_data_cache); 1237 1238 void 1239 _soc_mem_write_cache_update(int unit, soc_mem_t mem, int blk, int no_cache, 1240 int index, int array_index, void *entry_data, 1241 void *entry_data_ptr, uint32 *cache_entry_data, 1242 uint32 *converted_entry_data); 1243 int 1244 _soc_mem_read_cache_attempt(int unit, uint32 flags, soc_mem_t mem, int copyno, 1245 int index, int array_index, void *entry_data, 1246 uint32 *entry_data_cache, 1247 uint32 *cache_consistency_check); 1248 1249 #if defined(BCM_HURRICANE3_SUPPORT) 1250 extern int _soc_hr3_l3iif_hw_mem_init(int unit, int force_init_all); 1251 #endif /* BCM_HURRICANE3_SUPPORT */ 1252 1253 #if defined(BCM_TRIDENT3_SUPPORT) 1254 typedef struct { 1255 int width; /* user field width */ 1256 int num_fld; /* number of entires of fld array */ 1257 struct { 1258 uint16 v_offset; /* virtual user field offset for each split field */ 1259 soc_field_info_t field; /* hardware split field info */ 1260 } fld[6]; 1261 } soc_mem_view_split_field_info_t; 1262 1263 extern int soc_mem_view_index_count(int unit, soc_mem_t mem); 1264 extern int soc_mem_view_index_min(int unit, soc_mem_t mem_view); 1265 extern int soc_mem_view_index_max(int unit, soc_mem_t mem_view); 1266 1267 extern int soc_mem_view_split_field_info_get(int unit, 1268 soc_mem_t view, 1269 soc_field_t field, 1270 soc_mem_view_split_field_info_t *sf_info); 1271 1272 extern int soc_mem_view_phy_mem_get(int unit, 1273 soc_mem_t view, 1274 soc_mem_t *mem); 1275 1276 extern int soc_mem_view_fieldinfo_get(int unit, 1277 soc_mem_t view, 1278 soc_field_t field, 1279 soc_field_info_t *fieldinfo); 1280 extern int soc_mem_view_field_valid(int unit, 1281 soc_mem_t view, 1282 soc_field_t field); 1283 #endif 1284 1285 #if defined(BCM_TRIDENT2_SUPPORT) 1286 extern void soc_mem_fp_global_mask_tcam_cache_update_set(int unit, int update); 1287 extern int soc_mem_fp_global_mask_tcam_cache_update_get(int unit); 1288 #endif 1289 #ifdef BCM_TRIDENT_SUPPORT 1290 int soc_trident_mem_cp_get(int unit, soc_mem_t mem, 1291 soc_mem_t *mem_cp_array); 1292 #endif /* BCM_TRIDENT_SUPPORT */ 1293 #ifdef BCM_SAND_SUPPORT 1294 int soc_mem_broadcast_block_get(int unit, soc_mem_t mem); 1295 int soc_broadcast_block_get_from_type(int unit, int block_type); 1296 #endif 1297 1298 /* 1299 * last 4 tcams are used for RPF lookup. 1300 * The offset for start is 4 * 1024. 1301 */ 1302 #define SOC_DEFIP_HOLE_RPF_OFFSET 4096 1303 1304 /* Start offset after the hole */ 1305 #define SOC_DEFIP_HOLE_OFFSET(_u, mem) \ 1306 ((SOC_IS_DEFIP_HOLE_MEM(_u, mem)) ? 4096 : 0) 1307 1308 /* 1309 * Index start for invalid space for hole. 1310 * index Excluded. 1311 */ 1312 #define SOC_DEFIP_HOLE_START(_u) \ 1313 ((soc_feature \ 1314 (_u, soc_feature_defip_2_tcams_with_separate_rpf)) ? 2047 : -1) 1315 1316 /* 1317 * Index End for invalid space for hole. 1318 * Index Excluded. 1319 */ 1320 #define SOC_DEFIP_HOLE_END(_u) \ 1321 ((soc_feature \ 1322 (_u, soc_feature_defip_2_tcams_with_separate_rpf)) ? 4096 : -1) 1323 1324 /* 1325 * Index start for valid space after hole. 1326 */ 1327 #define SOC_DEFIP_HOLE_VALID_RANGE_MIN(_u) \ 1328 ((soc_feature \ 1329 (_u, soc_feature_defip_2_tcams_with_separate_rpf)) ? 4095 : -1) 1330 /* 1331 * Index end for valid space after hole. 1332 */ 1333 #define SOC_DEFIP_HOLE_VALID_RANGE_MAX(_u) \ 1334 ((soc_feature \ 1335 (_u, soc_feature_defip_2_tcams_with_separate_rpf)) ? 6144 : -1) 1336 1337 /* 1338 * Applicable memories for defip hole. 1339 */ 1340 #define SOC_IS_DEFIP_HOLE_MEM(_u, _mem) \ 1341 ((soc_feature(_u, soc_feature_defip_2_tcams_with_separate_rpf)) && \ 1342 ((mem == L3_DEFIPm) || (mem == L3_DEFIP_DATA_ONLYm) || \ 1343 (mem == L3_DEFIP_HIT_ONLYm))) 1344 /* 1345 * After the initial indexes, the indexes falling in the 1346 * this range are also valid indexes. 1347 * we should be able to read/write in the below 1348 * indexes also. 1349 */ 1350 #define SOC_DEFIP_HOLE_RANGE_CHECK(_u, mem, _index) \ 1351 ((SOC_IS_DEFIP_HOLE_MEM(_u, mem) && \ 1352 (_index > SOC_DEFIP_HOLE_VALID_RANGE_MIN(_u)) && \ 1353 (_index < SOC_DEFIP_HOLE_VALID_RANGE_MAX(_u))) ? 1 : 0) 1354 1355 /* 1356 * Macro to check invalid index range. 1357 */ 1358 #define SOC_DEFIP_HOLE_INDEX_RANGE(_u, mem, _index) \ 1359 ((SOC_IS_DEFIP_HOLE_MEM(_u, mem) && \ 1360 (_index > SOC_DEFIP_HOLE_START(_u)) && \ 1361 (_index < SOC_DEFIP_HOLE_END(_u))) ? 1 : 0) 1362 1363 /* 1364 * last 4 tcams are used for RPF lookup. 1365 * The offset for start is 4 * 1024. 1366 */ 1367 #define SOC_DEFIP_HOLE_RPF_OFFSET 4096 1368 1369 /* Start offset after the hole */ 1370 #define SOC_DEFIP_HOLE_OFFSET(_u, mem) \ 1371 ((SOC_IS_DEFIP_HOLE_MEM(_u, mem)) ? 4096 : 0) 1372 1373 /* 1374 * Index start for invalid space for hole. 1375 * index Excluded. 1376 */ 1377 #define SOC_DEFIP_HOLE_START(_u) \ 1378 ((soc_feature \ 1379 (_u, soc_feature_defip_2_tcams_with_separate_rpf)) ? 2047 : -1) 1380 1381 /* 1382 * Index End for invalid space for hole. 1383 * Index Excluded. 1384 */ 1385 #define SOC_DEFIP_HOLE_END(_u) \ 1386 ((soc_feature \ 1387 (_u, soc_feature_defip_2_tcams_with_separate_rpf)) ? 4096 : -1) 1388 1389 /* 1390 * Index start for valid space after hole. 1391 */ 1392 #define SOC_DEFIP_HOLE_VALID_RANGE_MIN(_u) \ 1393 ((soc_feature \ 1394 (_u, soc_feature_defip_2_tcams_with_separate_rpf)) ? 4095 : -1) 1395 /* 1396 * Index end for valid space after hole. 1397 */ 1398 #define SOC_DEFIP_HOLE_VALID_RANGE_MAX(_u) \ 1399 ((soc_feature \ 1400 (_u, soc_feature_defip_2_tcams_with_separate_rpf)) ? 6144 : -1) 1401 1402 /* 1403 * Applicable memories for defip hole. 1404 */ 1405 #define SOC_IS_DEFIP_HOLE_MEM(_u, _mem) \ 1406 ((soc_feature(_u, soc_feature_defip_2_tcams_with_separate_rpf)) && \ 1407 ((mem == L3_DEFIPm) || (mem == L3_DEFIP_DATA_ONLYm) || \ 1408 (mem == L3_DEFIP_HIT_ONLYm))) 1409 /* 1410 * After the initial indexes, the indexes falling in the 1411 * this range are also valid indexes. 1412 * we should be able to read/write in the below 1413 * indexes also. 1414 */ 1415 #define SOC_DEFIP_HOLE_RANGE_CHECK(_u, mem, _index) \ 1416 ((SOC_IS_DEFIP_HOLE_MEM(_u, mem) && \ 1417 (_index > SOC_DEFIP_HOLE_VALID_RANGE_MIN(_u)) && \ 1418 (_index < SOC_DEFIP_HOLE_VALID_RANGE_MAX(_u))) ? 1 : 0) 1419 1420 /* 1421 * Macro to check invalid index range. 1422 */ 1423 #define SOC_DEFIP_HOLE_INDEX_RANGE(_u, mem, _index) \ 1424 ((SOC_IS_DEFIP_HOLE_MEM(_u, mem) && \ 1425 (_index > SOC_DEFIP_HOLE_START(_u)) && \ 1426 (_index < SOC_DEFIP_HOLE_END(_u))) ? 1 : 0) 1427 1428 void 1429 soc_mem_field_acc_mode_get( 1430 int unit, 1431 soc_mem_t mem, 1432 soc_field_t field, 1433 uint32 *is_read_only, 1434 uint32 *is_write_only); 1435 1436 #endif /* !_SOC_MEM_H */