intr_iproc.h (5307B)
1 /* 2 * DO NOT EDIT THIS FILE! 3 * This file is auto-generated from the registers file. 4 * Edits to this file will be lost when it is regenerated. 5 * 6 * 7 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 8 * 9 * Copyright 2007-2020 Broadcom Inc. All rights reserved. 10 * 11 * File: intr_iproc.h 12 * Purpose: IPROC interrupt include file. 13 * Supports: bcm88790_a0 14 * bcm88690_a0 15 * bcm88690_b0 16 * bcm56870_a0 17 * bcm56980_a0 18 * bcm56980_b0 19 * bcm56370_a0 20 * bcm56770_a0 21 */ 22 23 /* Sorted on interrupt bit. Don't modify */ 24 typedef enum iproc_intr_num_type_e { 25 WDOG_INTR=0, 26 TIM_INTR1=8, 27 TIM_INTR2=9, 28 TIM_INTR=10, 29 UART_INTR=16, 30 EVENTBUS_ECC=17, 31 CR5_COMMTX=24, 32 CR5_COMMRX=25, 33 CR5_PMUIRQ=26, 34 CR5_VALIRQ=27, 35 CR5_VALFIQ=28, 36 GENRES_TIM0_INTR=32, 37 GENRES_TIM1_INTR=33, 38 GENRES_TIM2_INTR=34, 39 GENRES_TIM3_INTR=35, 40 GENRES_WDOG0_INTR=36, 41 PERIPH_UART0_INTR=40, 42 PERIPH_UART1_INTR=41, 43 PERIPH_SMBUS0_INTR=42, 44 PERIPH_SMBUS1_INTR=43, 45 PERIPH_GPIO_INTR=44, 46 PERIPH_SPI_INTR=45, 47 ARMDMA_IRQ=48, 48 ARMDMA_IRQ_BIT0=48, 49 ARMDMA_IRQ_BIT1=49, 50 ARMDMA_IRQ_BIT2=50, 51 ARMDMA_IRQ_BIT3=51, 52 ARMDMA_IRQ_BIT4=52, 53 ARMDMA_IRQ_BIT5=53, 54 ARMDMA_IRQ_BIT6=54, 55 ARMDMA_IRQ_BIT7=55, 56 PCIE_INTR=56, 57 PCIE_INTR_BIT0=56, 58 PCIE_INTR_BIT1=57, 59 PCIE_INTR_BIT2=58, 60 PCIE_INTR_BIT3=59, 61 PCIE_INTR_BIT4=60, 62 PCIE_INTR_BIT5=61, 63 TS_INTR=64, 64 QSPI_INTR=72, 65 SW_PROG_INTR=73, 66 ECCERR_INTR=74, 67 IDMERR_INTR=75, 68 ARMDMA_ABORT=76, 69 SRAM_LL_1024K_INTR=77, 70 MDIO_INTR=78, 71 RTS_ARMDMA_ABORT=79, 72 RTS_ARMDMA_IRQ=80, 73 RTS_ARMDMA_IRQ_BIT0=80, 74 RTS_ARMDMA_IRQ_BIT1=81, 75 RTS_ARMDMA_IRQ_BIT2=82, 76 RTS_ARMDMA_IRQ_BIT3=83, 77 RTS_ARMDMA_IRQ_BIT4=84, 78 RTS_ARMDMA_IRQ_BIT5=85, 79 RTS_ARMDMA_IRQ_BIT6=86, 80 RTS_ARMDMA_IRQ_BIT7=87, 81 SRAM_LL_7_INTR=88, 82 SRAM_LL_6_INTR=89, 83 SRAM_LL_5_INTR=90, 84 SRAM_LL_4_INTR=91, 85 SRAM_LL_3_INTR=92, 86 SRAM_LL_2_INTR=93, 87 SRAM_LL_1_INTR=94, 88 SRAM_LL_0_INTR=95, 89 QUAD_CM0_INTR=96, 90 CHIP_INTR_HIGH_PRIORITY_BIT0=104, 91 CHIP_INTR_HIGH_PRIORITY=104, 92 CHIP_INTR_HIGH_PRIORITY_BIT1=105, 93 CHIP_INTR_HIGH_PRIORITY_BIT2=106, 94 CHIP_INTR_HIGH_PRIORITY_BIT3=107, 95 CHIP_INTR_HIGH_PRIORITY_BIT4=108, 96 CHIP_INTR_HIGH_PRIORITY_BIT5=109, 97 CHIP_INTR_HIGH_PRIORITY_BIT6=110, 98 CHIP_INTR_HIGH_PRIORITY_BIT7=111, 99 CHIP_INTR_HIGH_PRIORITY_BIT8=112, 100 CHIP_INTR_HIGH_PRIORITY_BIT9=113, 101 CHIP_INTR_HIGH_PRIORITY_BIT10=114, 102 CHIP_INTR_HIGH_PRIORITY_BIT11=115, 103 CHIP_INTR_HIGH_PRIORITY_BIT12=116, 104 CHIP_INTR_HIGH_PRIORITY_BIT13=117, 105 CHIP_INTR_HIGH_PRIORITY_BIT14=118, 106 CHIP_INTR_LOW_PRIORITY=119, 107 CMIC_INTR_BIT0=128, 108 CMIC_INTR=128, 109 CMIC_INTR_BIT1=129, 110 CMIC_INTR_BIT2=130, 111 CMIC_INTR_BIT3=131, 112 CMIC_INTR_BIT4=132, 113 CMIC_INTR_BIT5=133, 114 CMIC_INTR_BIT6=134, 115 CMIC_INTR_BIT7=135, 116 CMIC_INTR_BIT8=136, 117 CMIC_INTR_BIT9=137, 118 CMIC_INTR_BIT10=138, 119 CMIC_INTR_BIT11=139, 120 CMIC_INTR_BIT12=140, 121 CMIC_INTR_BIT13=141, 122 CMIC_INTR_BIT14=142, 123 CMIC_INTR_BIT15=143, 124 CMIC_INTR_BIT16=144, 125 CMIC_INTR_BIT17=145, 126 CMIC_INTR_BIT18=146, 127 CMIC_INTR_BIT19=147, 128 CMIC_INTR_BIT20=148, 129 CMIC_INTR_BIT21=149, 130 CMIC_INTR_BIT22=150, 131 CMIC_INTR_BIT23=151, 132 CMIC_INTR_BIT24=152, 133 CMIC_INTR_BIT25=153, 134 CMIC_INTR_BIT26=154, 135 CMIC_INTR_BIT27=155, 136 CMIC_INTR_BIT28=156, 137 CMIC_INTR_BIT29=157, 138 CMIC_INTR_BIT30=158, 139 CMIC_INTR_BIT31=159, 140 CMIC_INTR_BIT32=160, 141 CMIC_INTR_BIT33=161, 142 CMIC_INTR_BIT34=162, 143 CMIC_INTR_BIT35=163, 144 CMIC_INTR_BIT36=164, 145 CMIC_INTR_BIT37=165, 146 CMIC_INTR_BIT38=166, 147 CMIC_INTR_BIT39=167, 148 CMIC_INTR_BIT40=168, 149 CMIC_INTR_BIT41=169, 150 CMIC_INTR_BIT42=170, 151 CMIC_INTR_BIT43=171, 152 CMIC_INTR_BIT44=172, 153 CMIC_INTR_BIT45=173, 154 CMIC_INTR_BIT46=174, 155 CMIC_INTR_BIT47=175, 156 CMIC_INTR_BIT48=176, 157 CMIC_INTR_BIT49=177, 158 CMIC_INTR_BIT50=178, 159 CMIC_INTR_BIT51=179, 160 CMIC_INTR_BIT52=180, 161 CMIC_INTR_BIT53=181, 162 CMIC_INTR_BIT54=182, 163 CMIC_INTR_BIT55=183, 164 CMIC_INTR_BIT56=184, 165 CMIC_INTR_BIT57=185, 166 CMIC_INTR_BIT58=186, 167 CMIC_INTR_BIT59=187, 168 CMIC_INTR_BIT60=188, 169 CMIC_INTR_BIT61=189, 170 CMIC_INTR_BIT62=190, 171 CMIC_INTR_BIT63=191, 172 CMIC_INTR_BIT64=192, 173 CMIC_INTR_BIT65=193, 174 CMIC_INTR_BIT66=194, 175 CMIC_INTR_BIT67=195, 176 CMIC_INTR_BIT68=196, 177 CMIC_INTR_BIT69=197, 178 CMIC_INTR_BIT70=198, 179 CMIC_INTR_BIT71=199, 180 CMIC_INTR_BIT72=200, 181 CMIC_INTR_BIT73=201, 182 CMIC_INTR_BIT74=202, 183 CMIC_INTR_BIT75=203, 184 CMIC_INTR_BIT76=204, 185 CMIC_INTR_BIT77=205, 186 CMIC_INTR_BIT78=206, 187 CMIC_INTR_BIT79=207, 188 CMIC_INTR_BIT80=208, 189 CMIC_INTR_BIT81=209, 190 CMIC_INTR_BIT82=210, 191 CMIC_INTR_BIT83=211, 192 CMIC_INTR_BIT84=212, 193 CMIC_INTR_BIT85=213, 194 CMIC_INTR_BIT86=214, 195 CMIC_INTR_BIT87=215, 196 CMIC_INTR_BIT88=216, 197 CMIC_INTR_BIT89=217, 198 CMIC_INTR_BIT90=218, 199 CMIC_INTR_BIT91=219, 200 CMIC_INTR_BIT92=220, 201 CMIC_INTR_BIT93=221, 202 CMIC_INTR_BIT94=222, 203 CMIC_INTR_BIT95=223, 204 CMIC_INTR_BIT96=224, 205 CMIC_INTR_BIT97=225, 206 CMIC_INTR_BIT98=226, 207 CMIC_INTR_BIT99=227, 208 CMIC_INTR_BIT100=228, 209 CMIC_INTR_BIT101=229, 210 CMIC_INTR_BIT102=230, 211 CMIC_INTR_BIT103=231, 212 CMIC_INTR_BIT104=232, 213 CMIC_INTR_BIT105=233, 214 CMIC_INTR_BIT106=234, 215 CMIC_INTR_BIT107=235, 216 CMIC_INTR_BIT108=236, 217 CMIC_INTR_BIT109=237, 218 CMIC_INTR_BIT110=238, 219 CMIC_INTR_BIT111=239, 220 CMIC_INTR_BIT112=240, 221 CMIC_INTR_BIT113=241, 222 CMIC_INTR_BIT114=242, 223 CMIC_INTR_BIT115=243, 224 CMIC_INTR_BIT116=244, 225 CMIC_INTR_BIT117=245, 226 CMIC_INTR_BIT118=246, 227 CMIC_INTR_BIT119=247, 228 CMIC_INTR_BIT120=248, 229 CMIC_INTR_BIT121=249, 230 CMIC_INTR_BIT122=250, 231 CMIC_INTR_BIT123=251, 232 CMIC_INTR_BIT124=252, 233 CMIC_INTR_BIT125=253, 234 CMIC_INTR_BIT126=254, 235 CMIC_INTR_BIT127=255, 236 IPROC_INTERRUPT_NUM_MAX 237 } iproc_intr_num_type_t;