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maverick2_tdm.h (6297B)


      1 /*
      2  * 
      3  * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file.
      4  * 
      5  * Copyright 2007-2019 Broadcom Inc. All rights reserved.
      6  *
      7  * File:        maverick2_tdm.h
      8  */
      9 
     10 #ifndef _SOC_MAVERICK2_TDM_H_
     11 #define _SOC_MAVERICK2_TDM_H_
     12 
     13 #include <soc/esw/port.h>
     14 
     15 /* MV2 specific defines */
     16 #define MAVERICK2_TDM_PORTS_PER_PBLK         4
     17 #define MAVERICK2_TDM_PBLKS_PER_PIPE         20
     18 #define MAVERICK2_TDM_PBLKS_PER_HPIPE        10
     19 #define MAVERICK2_TDM_PIPES_PER_DEV          1
     20 #define MAVERICK2_TDM_HPIPES_PER_PIPE        2
     21 
     22 #define MAVERICK2_TDM_PBLKS_PER_DEV          \
     23                  (MAVERICK2_TDM_PBLKS_PER_PIPE * MAVERICK2_TDM_PIPES_PER_DEV)
     24 #define MAVERICK2_TDM_GPORTS_PER_HPIPE       \
     25                  (MAVERICK2_TDM_PORTS_PER_PBLK * MAVERICK2_TDM_PBLKS_PER_HPIPE)
     26 #define MAVERICK2_TDM_GPORTS_PER_PIPE        \
     27                  (MAVERICK2_TDM_PORTS_PER_PBLK * MAVERICK2_TDM_PBLKS_PER_PIPE)
     28 #define MAVERICK2_TDM_GPORTS_PER_DEV         \
     29                  (MAVERICK2_TDM_GPORTS_PER_PIPE * MAVERICK2_TDM_PIPES_PER_DEV)
     30 
     31 /* Physical port */
     32 /* 64 General device port + 1 CPU + 1 Management + 1 Loopback */
     33 #define MAVERICK2_TDM_PHY_PORTS_PER_PIPE     \
     34                  (MAVERICK2_TDM_GPORTS_PER_PIPE + 3)
     35 #define MAVERICK2_TDM_PHY_PORTS_PER_DEV      \
     36                  (MAVERICK2_TDM_PHY_PORTS_PER_PIPE * MAVERICK2_TDM_PIPES_PER_DEV)
     37 #define MAVERICK2_TDM_PHY_MGMT0              81
     38 #define MAVERICK2_TDM_PHY_MGMT1              999 /* unused */
     39 #define MAVERICK2_TDM_DEV_MGMT0              64
     40 #define MAVERICK2_TDM_DEV_MGMT1              999 /* unused */
     41 
     42 /* MMU ancillary port number */
     43 #define MAVERICK2_TDM_MMU_OVSB_TOKEN         0x42
     44 #define MAVERICK2_TDM_MMU_NULL_TOKEN         0x43
     45 #define MAVERICK2_TDM_MMU_PURG_TOKEN         0x44
     46 #define MAVERICK2_TDM_MMU_UNUSED_TOKEN       0x7f
     47 #define MAVERICK2_TDM_MMU_MGMT1_TOKEN        0x3f
     48 
     49 /* IDB ancillary port number */
     50 #define MAVERICK2_TDM_IDB_OVSB_TOKEN         0x42
     51 #define MAVERICK2_TDM_IDB_NULL_TOKEN         0x43
     52 #define MAVERICK2_TDM_IDB_SBUS_TOKEN         0x44
     53 #define MAVERICK2_TDM_IDB_OPT1_TOKEN         0x45
     54 #define MAVERICK2_TDM_IDB_UNUSED_TOKEN       0x7f
     55 #define MAVERICK2_TDM_IDB_MGMT1_TOKEN        0x3f
     56 
     57 /* Oversub groups */
     58 #define MAVERICK2_TDM_OVS_GROUPS_PER_PIPE    12
     59 #define MAVERICK2_TDM_OVS_GROUPS_PER_HPIPE   6
     60 #define MAVERICK2_TDM_OVS_GROUP_LENGTH       12
     61 #define MAVERICK2_OVS_HPIPE_COUNT_PER_PIPE   2
     62 
     63 /*** START SDK API COMMON CODE ***/
     64 extern void _soc_mv2_tdm_print_port_map(int unit, soc_port_map_type_t *port_map);
     65 extern void _soc_mv2_tdm_print_tdm_info(int unit, soc_tdm_schedule_t *tdm_info,
     66                                         int hpipe, int is_ing);
     67 extern void _soc_mv2_tdm_print_port_resource(int unit,
     68                                  soc_port_resource_t *port_info, int entry_num);
     69 extern void _soc_mv2_tdm_print_schedule_state(int unit,
     70                                  soc_port_schedule_state_t *sch_info);
     71 extern int _soc_mv2_tdm_calculation(int unit,
     72                                  soc_port_schedule_state_t *sch_info);
     73 extern int _soc_mv2_tdm_set_idb_calendar(int unit,
     74                                  soc_port_schedule_state_t *sch_info);
     75 extern int _soc_mv2_tdm_set_idb_hsp(int unit,
     76                                  soc_port_schedule_state_t *sch_info);
     77 extern int _soc_mv2_tdm_set_idb_pkt_calendar(int unit,
     78                                  soc_port_schedule_state_t *sch_info);
     79 extern int _soc_mv2_tdm_set_idb_ppe_credit(int unit,
     80                                  soc_port_schedule_state_t *sch_info,
     81                                  int full_credit_threshold_0,
     82                                  int opp_credit_threshold_0,
     83                                  int full_credit_threshold_1,
     84                                  int opp_credit_threshold_1 );
     85 extern int _soc_mv2_tdm_set_idb_opportunistic(int unit,
     86                                  soc_port_schedule_state_t *sch_info,
     87                                  int cpu_op_en, int lb_opp_en, int opp1_port_en,
     88                                  int opp2_port_en, int opp_ovr_sub_en);
     89 extern int _soc_mv2_tdm_set_ovs_group_sel(int unit,
     90                                  soc_port_schedule_state_t *sch_info,
     91                                  int set_idb, int set_mmu);
     92 extern int _soc_mv2_tdm_set_ovs_group(int unit,
     93                                  soc_port_schedule_state_t *sch_info);
     94 extern int _soc_mv2_tdm_set_mmu_calendar(int unit,
     95                                  soc_port_schedule_state_t *sch_info);
     96 extern int _soc_mv2_tdm_set_mmu_hsp(int unit,
     97                                  soc_port_schedule_state_t *sch_info);
     98 extern int _soc_mv2_tdm_set_mmu_opportunistic(int unit,
     99                                  soc_port_schedule_state_t *sch_info,
    100                                  int cpu_op_en, int lb_opp_en, int opp1_port_en,
    101                                  int opp2_port_en, int opp_ovr_sub_en);
    102 
    103 extern int soc_mv2_tdm_set_idb_dpp_ctrl(int unit,
    104                                  soc_port_schedule_state_t *schedule_state,
    105                                  int credits);
    106 extern int soc_mv2_tdm_init(int unit, soc_port_schedule_state_t *schedule_state);
    107 
    108 extern void soc_mv2_tdm_get_port_ratio(int unit,
    109                                  soc_port_schedule_state_t *sch_info,
    110                                  int pm_num, int *pm_mode, int prev_or_new);
    111 extern void _soc_mv2_tdm_get_pipe_map(int unit,
    112                                  soc_port_schedule_state_t *sch_info,
    113                                  uint32 *pipe_map);
    114 extern void _soc_mv2_tdm_get_ovs_pipe_map(int unit,
    115                                  soc_port_schedule_state_t *sch_info,
    116                                  uint32 *ovs_pipe_map);
    117 extern int _soc_mv2_tdm_get_speed_ovs_class(int unit, int speed);
    118 extern int _soc_mv2_tdm_get_same_port_spacing_e(int unit, int speed);
    119 
    120 extern void soc_maverick2_port_schedule_speed_remap(int unit,
    121                                  soc_port_schedule_state_t *port_schedule_state);
    122 
    123 extern int soc_mv2_tdm_get_log_port_speed(int unit,
    124                     soc_port_schedule_state_t *port_schedule_state,
    125                     int log_port, int prev_or_new, int *speed, int *num_lanes);
    126 
    127 /*** END SDK API COMMON CODE ***/
    128 
    129 
    130 #endif	/* !_SOC_MAVERICK2_TDM_H_ */