openbcm

Git mirror of https://github.com/Broadcom-Network-Switching-Software/OpenBCM
git clone git://git.finwo.net/mirror/broadcom/openbcm
Log | Files | Refs | README

loopback.h (4162B)


      1 /*
      2  * 
      3  * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file.
      4  * 
      5  * Copyright 2007-2019 Broadcom Inc. All rights reserved.
      6  *
      7  * File:        loopback.h
      8  */
      9 
     10 #ifndef CMICM_EMBEDDED
     11 #include <soc/defs.h>
     12 #endif
     13 
     14 #ifndef _SOC_LOOPBACK_H
     15 #define _SOC_LOOPBACK_H
     16 
     17 #ifdef BCM_XGS3_SWITCH_SUPPORT
     18 #define START_LBMH_HDR  0xFB
     19 #define COMMON_LBMH_HDR   3
     20 #define TD3X_LBMH_HDR     1
     21 #define VIS_LBMH_HDR      1
     22 #define SRC_TYPE_GPP_LBMH_HDR 1
     23 #define SRC_TYPE_VP_LBMH_HDR  0
     24 
     25 typedef struct soc_loopback_hdr_s {
     26 #if defined(LE_HOST)
     27                                   /* byte # */
     28     uint32 start:8;             /* 0      */
     29 
     30     uint32 common_hdr0:4;       /* 1      */
     31     uint32 input_pri:4;         /* 1      */
     32 
     33     uint32 source0:6;           /* 2      */
     34     uint32 source_type:1;       /* 2      */
     35     uint32 common_hdr1:1;       /* 2      */
     36 
     37     uint32 source1:8;           /* 3      */
     38 
     39     uint32 reserved0_0:2;       /* 4      */
     40     uint32 pkt_profile:3;       /* 4      */
     41     uint32 visibility:1;        /* 4      */
     42     uint32 source2:2;           /* 4      */
     43 
     44     uint32 reserved0_1:8;       /* 5      */       
     45     uint32 reserved1_0:8;       /* 6      */
     46     uint32 reserved_1:5;        /* 7      */
     47     uint32 zero:1;              /* 7      */
     48     uint32 reserved1_1:2;       /* 7      */
     49 
     50     uint32 reserved_2:8;        /* 8      */
     51     uint32 reserved_3:8;        /* 9      */
     52     uint32 reserved_4:8;        /* 10     */
     53     uint32 reserved_5:8;        /* 11     */
     54     uint32 reserved_6:8;        /* 12     */
     55     uint32 reserved_7:8;        /* 13     */
     56     uint32 reserved_8:8;        /* 14     */
     57     uint32 pp_port:8;           /* 15      */
     58    
     59 #else /* !LE_HOST*/
     60                                  /* byte # */
     61     uint32 start:8;             /* 0      */
     62 
     63     uint32 input_pri:4;         /* 1      */
     64     uint32 common_hdr0:4;       /* 1      */
     65 
     66     uint32 common_hdr1:1;       /* 2      */
     67     uint32 source_type:1;       /* 2      */
     68     uint32 source0:6;           /* 2      */
     69 
     70     uint32 source1:8;           /* 3      */
     71 
     72     uint32 source2:2;           /* 4      */
     73     uint32 visibility:1;        /* 4      */
     74     uint32 pkt_profile:3;       /* 4      */
     75     uint32 reserved0_0:2;       /* 4      */
     76 
     77     uint32 reserved0_1:8;       /* 5      */       
     78     uint32 reserved1_0:8;       /* 6      */
     79     uint32 reserved1_1:2;       /* 7      */
     80     uint32 zero:1;              /* 7      */
     81     uint32 reserved_1:5;        /* 7      */
     82 
     83     uint32 reserved_2:8;        /* 8      */
     84     uint32 reserved_3:8;        /* 9      */
     85     uint32 reserved_4:8;        /* 10     */
     86     uint32 reserved_5:8;        /* 11     */
     87     uint32 reserved_6:8;        /* 12     */
     88     uint32 reserved_7:8;        /* 13     */
     89     uint32 reserved_8:8;        /* 14     */
     90     uint32 pp_port:8;           /* 15      */
     91  #endif   
     92 } soc_loopback_hdr_t;
     93 
     94 
     95 typedef enum {
     96         LBMH_invalid = -1,
     97         LBMH_start   =  0,
     98         LBMH_input_pri,
     99         LBMH_visibility,
    100         LBMH_pkt_profile,
    101         LBMH_src,
    102         LBMH_src_type,
    103         LBMH_common_hdr,
    104         LBMH_pp_port,
    105         LBMH_cng,
    106         LBMH_tc,
    107         LBMH_zero,
    108         LBMH_COUNT
    109 } soc_loopback_hdr_field_t;
    110 
    111 
    112 #ifndef CMICM_EMBEDDED
    113 
    114 extern soc_loopback_hdr_field_t soc_loopback_hdr_name_to_field(int unit, char *name);
    115 extern char  *soc_loopback_hdr_field_to_name(int unit, soc_loopback_hdr_field_t f);
    116 extern uint32 soc_loopback_hdr_field_get(int unit, soc_loopback_hdr_t *lh,
    117                                          soc_loopback_hdr_field_t field);
    118 extern void soc_loopback_hdr_field_set(int unit, soc_loopback_hdr_t *lh,
    119                                        soc_loopback_hdr_field_t field, uint32 val);
    120 extern void soc_loopback_hdr_dump(int unit, char *pfx, soc_loopback_hdr_t *lh);
    121 extern int  soc_loopback_lbport_num_get(int unit, uint32 pipe);
    122 #define soc_looopback_hdr_field_init(unit, mh) \
    123         sal_memset((mh), 0, sizeof (soc_loopback_hdr_t))
    124 
    125 #define LOOPBACK_HDR_SIZE sizeof(soc_loopback_hdr_t)
    126 #endif
    127 
    128 
    129 #endif /* BCM_XGS3_SWITCH_SUPPORT */
    130 #endif /* _SOC_LOOPBACK_H */
    131