ism_hash.h (8219B)
1 /* 2 * 3 * This license is set out in https://raw.githubusercontent.com/Broadcom-Network-Switching-Software/OpenBCM/master/Legal/LICENSE file. 4 * 5 * Copyright 2007-2019 Broadcom Inc. All rights reserved. 6 * 7 * ISM-HASH management routines 8 */ 9 10 #ifndef _SOC_ISM_HASH_H 11 #define _SOC_ISM_HASH_H 12 13 #include <soc/mem.h> 14 #include <soc/ism.h> 15 16 #ifdef BCM_ISM_SUPPORT 17 18 typedef enum soc_mem_view_type_e { 19 SOC_MEM_VIEW_VLAN_XLATE_1_XLATE = 1, 20 SOC_MEM_VIEW_VLAN_XLATE_1_MPLS, 21 SOC_MEM_VIEW_VLAN_XLATE_1_VLAN_MAC, 22 SOC_MEM_VIEW_VLAN_XLATE_1_VIF, 23 SOC_MEM_VIEW_VLAN_XLATE_2_XLATE, 24 SOC_MEM_VIEW_VLAN_XLATE_2_MPLS, 25 SOC_MEM_VIEW_VLAN_XLATE_2_MIM_NVP, 26 SOC_MEM_VIEW_VLAN_XLATE_2_MIM_ISID, 27 SOC_MEM_VIEW_VLAN_XLATE_2_TRILL, 28 SOC_MEM_VIEW_VLAN_XLATE_2_MAC_IP_BIND, 29 SOC_MEM_VIEW_L2_ENTRY_1_L2, 30 SOC_MEM_VIEW_L2_ENTRY_1_VLAN, 31 SOC_MEM_VIEW_L2_ENTRY_1_VIF, 32 SOC_MEM_VIEW_L2_ENTRY_1_TRILL_NONUC_NETWORK_LONG, 33 SOC_MEM_VIEW_L2_ENTRY_1_TRILL_NONUC_NETWORK_SHORT, 34 SOC_MEM_VIEW_L2_ENTRY_1_BFD, 35 SOC_MEM_VIEW_L2_ENTRY_2_L2, 36 SOC_MEM_VIEW_L3_ENTRY_1_IPV4UC, 37 SOC_MEM_VIEW_L3_ENTRY_1_LMEP, 38 SOC_MEM_VIEW_L3_ENTRY_1_RMEP, 39 SOC_MEM_VIEW_L3_ENTRY_1_TRILL, 40 SOC_MEM_VIEW_L3_ENTRY_2_IPV4UC, 41 SOC_MEM_VIEW_L3_ENTRY_2_IPV4MC, 42 SOC_MEM_VIEW_L3_ENTRY_2_IPV6UC, 43 SOC_MEM_VIEW_L3_ENTRY_4_IPV6UC, 44 SOC_MEM_VIEW_L3_ENTRY_4_IPV6MC, 45 SOC_MEM_VIEW_EP_VLAN_XLATE_1_XLATE, 46 SOC_MEM_VIEW_EP_VLAN_XLATE_1_MIM_ISID, 47 SOC_MEM_VIEW_MPLS_ENTRY_1_MPLS, 48 SOC_MEM_VIEW_MPLS_ENTRY_2_MPLS, 49 SOC_MEM_VIEW_MPLS_ENTRY_2_MIM_NVP, 50 SOC_MEM_VIEW_MPLS_ENTRY_2_MIM_ISID, 51 SOC_MEM_VIEW_MPLS_ENTRY_2_TRILL 52 } soc_mem_view_type_t; 53 54 typedef enum soc_mem_key_type_e { 55 SOC_MEM_KEY_VLAN_XLATE_1_XLATE_IVID_OVID = 0, 56 SOC_MEM_KEY_VLAN_XLATE_2_XLATE_IVID_OVID = 1, 57 SOC_MEM_KEY_VLAN_XLATE_1_XLATE_OVID = 2, 58 SOC_MEM_KEY_VLAN_XLATE_2_XLATE_OVID = 3, 59 SOC_MEM_KEY_VLAN_XLATE_1_XLATE_IVID = 4, 60 SOC_MEM_KEY_VLAN_XLATE_2_XLATE_IVID = 5, 61 SOC_MEM_KEY_VLAN_XLATE_1_XLATE_OTAG = 6, 62 SOC_MEM_KEY_VLAN_XLATE_2_XLATE_OTAG = 7, 63 SOC_MEM_KEY_VLAN_XLATE_1_XLATE_ITAG = 8, 64 SOC_MEM_KEY_VLAN_XLATE_2_XLATE_ITAG = 9, 65 SOC_MEM_KEY_VLAN_XLATE_1_XLATE_PRI_CFI = 10, 66 SOC_MEM_KEY_VLAN_XLATE_2_XLATE_PRI_CFI = 11, 67 SOC_MEM_KEY_VLAN_XLATE_1_XLATE_IVID_OVID_SVP = 12, 68 SOC_MEM_KEY_VLAN_XLATE_2_XLATE_IVID_OVID_SVP = 13, 69 SOC_MEM_KEY_VLAN_XLATE_1_XLATE_OVID_SVP = 14, 70 SOC_MEM_KEY_VLAN_XLATE_2_XLATE_OVID_SVP = 15, 71 SOC_MEM_KEY_VLAN_XLATE_1_VLAN_MAC_VLAN_MAC = 20, 72 SOC_MEM_KEY_VLAN_XLATE_1_VIF_VIF = 21, 73 SOC_MEM_KEY_VLAN_XLATE_1_VIF_VIF_VLAN = 22, 74 SOC_MEM_KEY_VLAN_XLATE_2_MAC_IP_BIND_HPAE = 27, 75 SOC_MEM_KEY_L2_ENTRY_1_L2_BRIDGE = 0, 76 SOC_MEM_KEY_L2_ENTRY_2_L2_BRIDGE = 1, 77 SOC_MEM_KEY_L2_ENTRY_1_L2_VFI = 2, 78 SOC_MEM_KEY_L2_ENTRY_2_L2_VFI = 3, 79 SOC_MEM_KEY_L2_ENTRY_1_VLAN_SINGLE_CROSS_CONNECT = 6, 80 SOC_MEM_KEY_L2_ENTRY_1_VLAN_DOUBLE_CROSS_CONNECT = 7, 81 SOC_MEM_KEY_L2_ENTRY_1_VIF_VIF = 8, 82 SOC_MEM_KEY_L2_ENTRY_2_L2_TRILL_NONUC_ACCESS = 9, 83 SOC_MEM_KEY_L2_ENTRY_1_TRILL_NONUC_NETWORK_LONG_TRILL_NONUC_NETWORK_LONG = 10, 84 SOC_MEM_KEY_L2_ENTRY_1_TRILL_NONUC_NETWORK_SHORT_TRILL_NONUC_NETWORK_SHORT = 11, 85 SOC_MEM_KEY_L2_ENTRY_1_BFD_BFD = 12, 86 SOC_MEM_KEY_L2_ENTRY_1_PE_VID_PE_VID = 13, 87 SOC_MEM_KEY_L3_ENTRY_1_IPV4UC_IPV4_UNICAST = 0, 88 SOC_MEM_KEY_L3_ENTRY_2_IPV4UC_IPV4_UNICAST = 1, 89 SOC_MEM_KEY_L3_ENTRY_2_IPV6UC_IPV6_UNICAST = 2, 90 SOC_MEM_KEY_L3_ENTRY_4_IPV6UC_IPV6_UNICAST = 3, 91 SOC_MEM_KEY_L3_ENTRY_2_IPV4MC_IPV4_MULTICAST = 6, 92 SOC_MEM_KEY_L3_ENTRY_4_IPV6MC_IPV6_MULTICAST = 7, 93 SOC_MEM_KEY_L3_ENTRY_1_LMEP_LMEP = 8, 94 SOC_MEM_KEY_L3_ENTRY_1_RMEP_RMEP = 9, 95 SOC_MEM_KEY_L3_ENTRY_1_TRILL_TRILL = 10, 96 SOC_MEM_KEY_EP_VLAN_XLATE_1_XLATE_VLAN_XLATE = 0, 97 SOC_MEM_KEY_EP_VLAN_XLATE_1_XLATE_VLAN_XLATE_DVP = 1, 98 SOC_MEM_KEY_EP_VLAN_XLATE_1_MIM_ISID_MIM_ISID = 2, 99 SOC_MEM_KEY_EP_VLAN_XLATE_1_MIM_ISID_MIM_ISID_DVP = 3, 100 SOC_MEM_KEY_MPLS_ENTRY_1_MPLS_MPLS_FIRST_PASS = 16, 101 SOC_MEM_KEY_MPLS_ENTRY_2_MPLS_MPLS_FIRST_PASS = 17, 102 SOC_MEM_KEY_MPLS_ENTRY_1_MPLS_MPLS_SECOND_PASS = 18, 103 SOC_MEM_KEY_MPLS_ENTRY_2_MPLS_MPLS_SECOND_PASS = 19, 104 SOC_MEM_KEY_MPLS_ENTRY_2_MIM_NVP_MIM_NVP = 23, 105 SOC_MEM_KEY_MPLS_ENTRY_2_MIM_ISID_MIM_ISID = 24, 106 SOC_MEM_KEY_MPLS_ENTRY_2_MIM_ISID_MIM_ISID_SVP = 25, 107 SOC_MEM_KEY_MPLS_ENTRY_2_TRILL_TRILL = 26 108 } soc_mem_key_type_t; 109 110 #define MAX_FIELDS 5 /* Max fields for any key */ 111 112 struct _soc_hash_bank; 113 struct _soc_hash_mem_set; 114 struct _soc_hash_mem; 115 struct _soc_hash_mem_view; 116 struct _soc_hash_key; 117 118 /* Physical bank representation */ 119 typedef struct _soc_hash_bank { 120 uint32 num_bkts; /* banks physical attribute */ 121 uint32 bkt_size; /* in terms of smallest entry (always 4 for ISM) */ 122 uint32 num_entries; /* product of num_bkts and bkt_size */ 123 uint16 hash_offset; /* offset of first bit of the key */ 124 uint32 hash_mask; /* used to pick particular number of bits for hashing */ 125 uint32 base_entry; /* starting location of this bank in a memory view */ 126 int8 bank_org; /* 0: dual 0, 1: dual 1, -1: ism */ 127 uint8 my_id; /* who am i */ 128 struct _soc_hash_mem_set *hms; /* pointer to mem set mapped to this bank */ 129 } soc_hash_bank_t; 130 131 #define SOC_HASH_MEM_MAX_KEY_BUFFER_SIZE_BYTES 64 132 /* Memory set / feature */ 133 typedef struct _soc_hash_mem_set { 134 uint8 mem_set; /* from soc_mem_set_type_t */ 135 struct _soc_hash_mem *shm; /* pointer to logical memory tables */ 136 uint8 num_mems; /* num of mem tables belonging to this set */ 137 struct _soc_hash_bank *shb; /* pointer to first bank in an ordered set of banks 138 used by memories of this set */ 139 uint8 num_banks; /* number of banks in this memory */ 140 struct _soc_hash_key *shk; /* ptr to key types */ 141 uint8 num_keys; /* number of key types */ 142 uint8 zero_lsb; /* Use lsb or 0 when offset is 48 */ 143 uint16 max_key_bits; /* used for preparing the key(with padding) */ 144 } soc_hash_mem_set_t; 145 146 /* Logical memory definition */ 147 typedef struct _soc_hash_mem { 148 soc_mem_t mem; /* memory type (L2_ENTRY_1 etc) */ 149 struct _soc_hash_mem_view *hmv; /* pointer to mem views */ 150 uint8 num_views; /* number of views belonging to this mem */ 151 struct _soc_hash_mem_set *shms; /* pointer to parent set */ 152 } soc_hash_mem_t; 153 154 /* Memory view definition */ 155 typedef struct _soc_hash_mem_view { 156 uint8 mem_view; /* from soc_mem_view_type_t */ 157 soc_field_t key_fields[MAX_FIELDS]; /* list of key fields */ 158 uint32 key_size; /* key size */ 159 soc_field_t lsb_field; /* field for hash lsb */ 160 struct _soc_hash_mem *shm; /* pointer to logical memory table */ 161 } soc_hash_mem_view_t; 162 163 /* Key type definition */ 164 typedef struct _soc_hash_key { 165 uint16 key_type; /* from soc_mem_key_type_t */ 166 struct _soc_hash_mem_view *hmv; /* pointer to the mem view */ 167 } soc_hash_key_t; 168 169 extern soc_hash_bank_t _soc_ism_shb[SOC_MAX_NUM_DEVICES][_SOC_ISM_MAX_BANKS]; 170 extern soc_hash_mem_set_t _soc_ism_shms[]; 171 extern soc_hash_mem_t _soc_ism_shm[]; 172 extern soc_hash_mem_view_t _soc_ism_shmv[]; 173 extern soc_hash_key_t _soc_ism_shk[]; 174 175 typedef struct _soc_ism_hash_s { 176 soc_hash_bank_t *shb; /* List of all banks ordered by allocation */ 177 soc_hash_mem_set_t *shms; /* List of all mem sets / feature */ 178 soc_hash_mem_t *shm; /* List of logical memories within the mem sets */ 179 soc_hash_mem_view_t *shmv; /* List of views within a logical memory */ 180 soc_hash_key_t *shk; /* All the key types in a set and/or view */ 181 } _soc_ism_hash_t; 182 183 #define _SOC_ISM_BANKS(unit) SOC_ISM_HASH_INFO(unit)->shb 184 #define _SOC_ISM_SETS(unit) SOC_ISM_HASH_INFO(unit)->shms 185 #define _SOC_ISM_MEMS(unit) SOC_ISM_HASH_INFO(unit)->shm 186 #define _SOC_ISM_VIEWS(unit) SOC_ISM_HASH_INFO(unit)->shmv 187 #define _SOC_ISM_KEYS(unit) SOC_ISM_HASH_INFO(unit)->shk 188 189 #endif /* BCM_ISM_SUPPORT */ 190 191 #endif /* _SOC_ISM_HASH_H */ 192